arch/x86/boot/video-bios.c

102

if (in_idx(crtc, 0x0f))

arch/x86/boot/video-bios.c

69

u16 crtc;

arch/x86/boot/video-bios.c

77

crtc = vga_crtc();

arch/x86/boot/video-mode.c

119

u16 crtc;

arch/x86/boot/video-mode.c

129

crtc = vga_crtc();

arch/x86/boot/video-mode.c

131

pt = in_idx(crtc, 0x11);

arch/x86/boot/video-mode.c

133

out_idx(pt, crtc, 0x11);

arch/x86/boot/video-mode.c

135

out_idx((u8)rows, crtc, 0x12); /* Lower height register */

arch/x86/boot/video-mode.c

137

ov = in_idx(crtc, 0x07); /* Overflow register */

arch/x86/boot/video-mode.c

141

out_idx(ov, crtc, 0x07);

arch/x86/boot/video-vga.c

139

u16 crtc; /* CRTC base address */

arch/x86/boot/video-vga.c

142

crtc = vga_crtc();

arch/x86/boot/video-vga.c

144

out_idx(0x0c, crtc, 0x11); /* Vertical sync end, unlock CR0-7 */

arch/x86/boot/video-vga.c

145

out_idx(0x0b, crtc, 0x06); /* Vertical total */

arch/x86/boot/video-vga.c

146

out_idx(0x3e, crtc, 0x07); /* Vertical overflow */

arch/x86/boot/video-vga.c

147

out_idx(0xea, crtc, 0x10); /* Vertical sync start */

arch/x86/boot/video-vga.c

148

out_idx(0xdf, crtc, 0x12); /* Vertical display end */

arch/x86/boot/video-vga.c

149

out_idx(0xe7, crtc, 0x15); /* Vertical blank start */

arch/x86/boot/video-vga.c

150

out_idx(0x04, crtc, 0x16); /* Vertical blank end */

arch/x86/boot/video-vga.c

159

u16 crtc; /* CRTC base address */

arch/x86/boot/video-vga.c

163

crtc = vga_crtc();

arch/x86/boot/video-vga.c

167

out_idx(ovfw, crtc, 0x07); /* Vertical overflow */

arch/x86/boot/video-vga.c

168

out_idx(end, crtc, 0x12); /* Vertical display end */

drivers/gpu/drm/adp/adp_drv.c

114

struct drm_crtc crtc;

drivers/gpu/drm/adp/adp_drv.c

129

#define crtc_to_adp(x) container_of(x, struct adp_drv_private, crtc)

drivers/gpu/drm/adp/adp_drv.c

139

if (!new_plane_state->crtc)

drivers/gpu/drm/adp/adp_drv.c

142

crtc_state = drm_atomic_get_crtc_state(state, new_plane_state->crtc);

drivers/gpu/drm/adp/adp_drv.c

254

static int adp_crtc_enable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/adp/adp_drv.c

256

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/adp/adp_drv.c

273

static void adp_crtc_disable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/adp/adp_drv.c

275

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/adp/adp_drv.c

281

static void adp_crtc_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/adp/adp_drv.c

284

struct adp_drv_private *adp = crtc_to_adp(crtc);

drivers/gpu/drm/adp/adp_drv.c

291

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/adp/adp_drv.c

294

static void adp_crtc_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/adp/adp_drv.c

297

struct adp_drv_private *adp = crtc_to_adp(crtc);

drivers/gpu/drm/adp/adp_drv.c

298

struct drm_crtc_state *old_state = drm_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/adp/adp_drv.c

307

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/adp/adp_drv.c

310

static void adp_crtc_atomic_flush(struct drm_crtc *crtc,

drivers/gpu/drm/adp/adp_drv.c

315

struct adp_drv_private *adp = crtc_to_adp(crtc);

drivers/gpu/drm/adp/adp_drv.c

316

struct drm_crtc_state *new_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/adp/adp_drv.c

322

dma_free_coherent(crtc->dev->dev, adp->mask_buf_size,

drivers/gpu/drm/adp/adp_drv.c

326

adp->mask_buf = dma_alloc_coherent(crtc->dev->dev, new_size,

drivers/gpu/drm/adp/adp_drv.c

335

if (crtc->state->event) {

drivers/gpu/drm/adp/adp_drv.c

336

struct drm_pending_vblank_event *event = crtc->state->event;

drivers/gpu/drm/adp/adp_drv.c

338

crtc->state->event = NULL;

drivers/gpu/drm/adp/adp_drv.c

339

spin_lock_irqsave(&crtc->dev->event_lock, flags);

drivers/gpu/drm/adp/adp_drv.c

341

if (drm_crtc_vblank_get(crtc) != 0)

drivers/gpu/drm/adp/adp_drv.c

342

drm_crtc_send_vblank_event(crtc, event);

drivers/gpu/drm/adp/adp_drv.c

346

spin_unlock_irqrestore(&crtc->dev->event_lock, flags);

drivers/gpu/drm/adp/adp_drv.c

378

ret = drm_crtc_init_with_planes(drm, &adp->crtc, primary,

drivers/gpu/drm/adp/adp_drv.c

383

drm_crtc_helper_add(&adp->crtc, &adp_crtc_helper_funcs);

drivers/gpu/drm/adp/adp_drv.c

495

drm_crtc_handle_vblank(&adp->crtc);

drivers/gpu/drm/adp/adp_drv.c

496

spin_lock(&adp->crtc.dev->event_lock);

drivers/gpu/drm/adp/adp_drv.c

500

drm_crtc_send_vblank_event(&adp->crtc, adp->event);

drivers/gpu/drm/adp/adp_drv.c

502

drm_crtc_vblank_put(&adp->crtc);

drivers/gpu/drm/adp/adp_drv.c

505

spin_unlock(&adp->crtc.dev->event_lock);

drivers/gpu/drm/amd/amdgpu/amdgpu.h

1572

u32 amdgpu_get_vblank_counter_kms(struct drm_crtc *crtc);

drivers/gpu/drm/amd/amdgpu/amdgpu.h

1573

int amdgpu_enable_vblank_kms(struct drm_crtc *crtc);

drivers/gpu/drm/amd/amdgpu/amdgpu.h

1574

void amdgpu_disable_vblank_kms(struct drm_crtc *crtc);

drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c

93

struct drm_crtc *crtc = encoder->crtc;

drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c

95

if (crtc && crtc->enabled) {

drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c

96

drm_crtc_helper_set_mode(crtc, &crtc->mode,

drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c

97

crtc->x, crtc->y, crtc->primary->fb);

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

128

struct drm_crtc *crtc = &amdgpu_crtc->base;

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

143

&crtc->hwmode)

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

147

amdgpu_get_vblank_counter_kms(crtc)) > 0) {

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

1495

bool amdgpu_display_crtc_scaling_mode_fixup(struct drm_crtc *crtc,

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

1499

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

1501

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

1511

if (encoder->crtc != crtc)

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

1528

src_v = crtc->mode.vdisplay;

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

153

spin_lock_irqsave(&crtc->dev->event_lock, flags);

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

1530

src_h = crtc->mode.hdisplay;

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

1548

src_v = crtc->mode.vdisplay;

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

1549

dst_v = crtc->mode.vdisplay - (amdgpu_crtc->v_border * 2);

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

1550

src_h = crtc->mode.hdisplay;

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

1551

dst_h = crtc->mode.hdisplay - (amdgpu_crtc->h_border * 2);

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

160

spin_unlock_irqrestore(&crtc->dev->event_lock, flags);

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

1706

int amdgpu_display_crtc_idx_to_irq_type(struct amdgpu_device *adev, int crtc)

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

1708

if (crtc < 0 || crtc >= adev->mode_info.num_crtc)

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

1711

switch (crtc) {

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

1729

bool amdgpu_crtc_get_scanout_position(struct drm_crtc *crtc,

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

1734

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

1735

unsigned int pipe = crtc->index;

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

1759

struct drm_crtc *crtc;

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

1775

list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

1776

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

1777

struct drm_framebuffer *fb = crtc->primary->fb;

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

1810

struct drm_crtc *crtc;

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

1814

list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

1815

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

191

int amdgpu_display_crtc_page_flip_target(struct drm_crtc *crtc,

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

197

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

199

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

220

obj = crtc->primary->fb->obj[0];

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

265

work->target_vblank = target - (uint32_t)drm_crtc_vblank_count(crtc) +

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

266

amdgpu_get_vblank_counter_kms(crtc);

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

269

spin_lock_irqsave(&crtc->dev->event_lock, flags);

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

272

spin_unlock_irqrestore(&crtc->dev->event_lock, flags);

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

284

crtc->primary->fb = fb;

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

285

spin_unlock_irqrestore(&crtc->dev->event_lock, flags);

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

316

struct drm_crtc *crtc;

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

320

if (!set || !set->crtc)

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

323

dev = set->crtc->dev;

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

331

list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

332

if (crtc->enabled)

drivers/gpu/drm/amd/amdgpu/amdgpu_display.h

28

#define amdgpu_display_vblank_get_counter(adev, crtc) (adev)->mode_info.funcs->vblank_get_counter((adev), (crtc))

drivers/gpu/drm/amd/amdgpu/amdgpu_display.h

35

#define amdgpu_display_page_flip(adev, crtc, base, async) (adev)->mode_info.funcs->page_flip((adev), (crtc), (base), (async))

drivers/gpu/drm/amd/amdgpu/amdgpu_display.h

36

#define amdgpu_display_page_flip_get_scanoutpos(adev, crtc, vbl, pos) (adev)->mode_info.funcs->page_flip_get_scanoutpos((adev), (crtc), (vbl), (pos))

drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c

2780

struct drm_crtc *crtc;

drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c

2782

drm_for_each_crtc(crtc, drm_dev) {

drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c

2783

drm_modeset_lock(&crtc->mutex, NULL);

drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c

2784

if (crtc->state->active)

drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c

2786

drm_modeset_unlock(&crtc->mutex);

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c

1634

u32 amdgpu_get_vblank_counter_kms(struct drm_crtc *crtc)

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c

1636

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c

1637

unsigned int pipe = crtc->index;

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c

1702

int amdgpu_enable_vblank_kms(struct drm_crtc *crtc)

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c

1704

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c

1705

unsigned int pipe = crtc->index;

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c

1719

void amdgpu_disable_vblank_kms(struct drm_crtc *crtc)

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c

1721

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c

1722

unsigned int pipe = crtc->index;

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c

664

struct drm_crtc *crtc;

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c

679

crtc = (struct drm_crtc *)minfo->crtcs[i];

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c

680

if (crtc && crtc->base.id == info->mode_crtc.id) {

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c

681

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h

266

u32 (*vblank_get_counter)(struct amdgpu_device *adev, int crtc);

drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h

280

int (*page_flip_get_scanoutpos)(struct amdgpu_device *adev, int crtc,

drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h

689

bool amdgpu_display_crtc_scaling_mode_fixup(struct drm_crtc *crtc,

drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h

694

int amdgpu_display_crtc_idx_to_irq_type(struct amdgpu_device *adev, int crtc);

drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h

696

bool amdgpu_crtc_get_scanout_position(struct drm_crtc *crtc,

drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h

706

int amdgpu_display_crtc_page_flip_target(struct drm_crtc *crtc,

drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c

269

u32 amdgpu_pll_get_use_mask(struct drm_crtc *crtc)

drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c

271

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c

277

if (crtc == test_crtc)

drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c

296

int amdgpu_pll_get_shared_dp_ppll(struct drm_crtc *crtc)

drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c

298

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c

303

if (crtc == test_crtc)

drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c

324

int amdgpu_pll_get_shared_nondp_ppll(struct drm_crtc *crtc)

drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c

326

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c

327

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c

338

if (crtc == test_crtc)

drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c

351

if ((crtc->mode.clock == test_crtc->mode.clock) &&

drivers/gpu/drm/amd/amdgpu/amdgpu_pll.h

35

u32 amdgpu_pll_get_use_mask(struct drm_crtc *crtc);

drivers/gpu/drm/amd/amdgpu/amdgpu_pll.h

36

int amdgpu_pll_get_shared_dp_ppll(struct drm_crtc *crtc);

drivers/gpu/drm/amd/amdgpu/amdgpu_pll.h

37

int amdgpu_pll_get_shared_nondp_ppll(struct drm_crtc *crtc);

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

132

static void amdgpu_vkms_crtc_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

135

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

138

static void amdgpu_vkms_crtc_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

141

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

144

static void amdgpu_vkms_crtc_atomic_flush(struct drm_crtc *crtc,

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

148

if (crtc->state->event) {

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

149

spin_lock_irqsave(&crtc->dev->event_lock, flags);

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

151

if (drm_crtc_vblank_get(crtc) != 0)

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

152

drm_crtc_send_vblank_event(crtc, crtc->state->event);

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

154

drm_crtc_arm_vblank_event(crtc, crtc->state->event);

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

156

spin_unlock_irqrestore(&crtc->dev->event_lock, flags);

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

158

crtc->state->event = NULL;

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

168

static int amdgpu_vkms_crtc_init(struct drm_device *dev, struct drm_crtc *crtc,

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

172

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

175

ret = drm_crtc_init_with_planes(dev, crtc, primary, cursor,

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

182

drm_crtc_helper_add(crtc, &amdgpu_vkms_crtc_helper_funcs);

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

184

amdgpu_crtc->crtc_id = drm_crtc_index(crtc);

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

185

adev->mode_info.crtcs[drm_crtc_index(crtc)] = amdgpu_crtc;

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

278

if (!new_plane_state->fb || WARN_ON(!new_plane_state->crtc))

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

282

new_plane_state->crtc);

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

438

struct drm_crtc *crtc = &output->crtc.base;

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

446

ret = amdgpu_vkms_crtc_init(dev, crtc, primary, cursor);

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

48

struct drm_crtc *crtc = &amdgpu_crtc->base;

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

483

drm_crtc_cleanup(crtc);

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

49

struct amdgpu_vkms_output *output = drm_crtc_to_amdgpu_vkms_output(crtc);

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

60

ret = drm_crtc_handle_vblank(crtc);

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

68

static int amdgpu_vkms_enable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

70

struct drm_vblank_crtc *vblank = drm_crtc_vblank_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

71

struct amdgpu_vkms_output *out = drm_crtc_to_amdgpu_vkms_output(crtc);

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

72

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

74

drm_calc_timestamping_constants(crtc, &crtc->mode);

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

82

static void amdgpu_vkms_disable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

84

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

89

static bool amdgpu_vkms_get_vblank_timestamp(struct drm_crtc *crtc,

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

94

struct amdgpu_vkms_output *output = drm_crtc_to_amdgpu_vkms_output(crtc);

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

95

struct drm_vblank_crtc *vblank = drm_crtc_vblank_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

96

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.h

13

container_of(target, struct amdgpu_vkms_output, crtc.base)

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.h

18

struct amdgpu_crtc crtc;

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

112

void amdgpu_atombios_crtc_lock(struct drm_crtc *crtc, int lock)

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

114

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

115

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

129

void amdgpu_atombios_crtc_enable(struct drm_crtc *crtc, int state)

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

131

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

132

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

145

void amdgpu_atombios_crtc_blank(struct drm_crtc *crtc, int state)

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

147

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

148

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

161

void amdgpu_atombios_crtc_powergate(struct drm_crtc *crtc, int state)

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

163

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

164

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

189

void amdgpu_atombios_crtc_set_dtd_timing(struct drm_crtc *crtc,

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

192

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

193

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

304

static u32 amdgpu_atombios_crtc_adjust_pll(struct drm_crtc *crtc,

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

307

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

308

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

38

void amdgpu_atombios_crtc_overscan_setup(struct drm_crtc *crtc,

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

42

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

44

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

575

void amdgpu_atombios_crtc_program_pll(struct drm_crtc *crtc,

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

589

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

746

int amdgpu_atombios_crtc_prepare_pll(struct drm_crtc *crtc,

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

749

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

750

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

811

amdgpu_crtc->adjusted_clock = amdgpu_atombios_crtc_adjust_pll(crtc, mode);

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

816

void amdgpu_atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

818

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

819

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

83

void amdgpu_atombios_crtc_scaler_setup(struct drm_crtc *crtc)

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

85

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

859

amdgpu_atombios_crtc_program_pll(crtc, amdgpu_crtc->crtc_id, amdgpu_crtc->pll_id,

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

87

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/atombios_crtc.h

27

void amdgpu_atombios_crtc_overscan_setup(struct drm_crtc *crtc,

drivers/gpu/drm/amd/amdgpu/atombios_crtc.h

30

void amdgpu_atombios_crtc_scaler_setup(struct drm_crtc *crtc);

drivers/gpu/drm/amd/amdgpu/atombios_crtc.h

31

void amdgpu_atombios_crtc_lock(struct drm_crtc *crtc, int lock);

drivers/gpu/drm/amd/amdgpu/atombios_crtc.h

32

void amdgpu_atombios_crtc_enable(struct drm_crtc *crtc, int state);

drivers/gpu/drm/amd/amdgpu/atombios_crtc.h

33

void amdgpu_atombios_crtc_blank(struct drm_crtc *crtc, int state);

drivers/gpu/drm/amd/amdgpu/atombios_crtc.h

34

void amdgpu_atombios_crtc_powergate(struct drm_crtc *crtc, int state);

drivers/gpu/drm/amd/amdgpu/atombios_crtc.h

36

void amdgpu_atombios_crtc_set_dtd_timing(struct drm_crtc *crtc,

drivers/gpu/drm/amd/amdgpu/atombios_crtc.h

42

void amdgpu_atombios_crtc_program_pll(struct drm_crtc *crtc,

drivers/gpu/drm/amd/amdgpu/atombios_crtc.h

55

int amdgpu_atombios_crtc_prepare_pll(struct drm_crtc *crtc,

drivers/gpu/drm/amd/amdgpu/atombios_crtc.h

57

void amdgpu_atombios_crtc_set_pll(struct drm_crtc *crtc,

drivers/gpu/drm/amd/amdgpu/atombios_encoders.c

1438

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(encoder->crtc);

drivers/gpu/drm/amd/amdgpu/atombios_encoders.c

346

if (encoder->crtc) {

drivers/gpu/drm/amd/amdgpu/atombios_encoders.c

347

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(encoder->crtc);

drivers/gpu/drm/amd/amdgpu/atombios_encoders.c

789

if (encoder->crtc) {

drivers/gpu/drm/amd/amdgpu/atombios_encoders.c

790

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(encoder->crtc);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1537

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(encoder->crtc);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1583

if (encoder->crtc) {

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1584

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(encoder->crtc);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1813

static void dce_v10_0_vga_enable(struct drm_crtc *crtc, bool enable)

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1815

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1816

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1827

static void dce_v10_0_grph_enable(struct drm_crtc *crtc, bool enable)

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1829

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1830

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1839

static int dce_v10_0_crtc_do_set_base(struct drm_crtc *crtc,

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1843

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1844

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1858

if (!crtc->primary->fb) {

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1863

target_fb = crtc->primary->fb;

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

197

static u32 dce_v10_0_vblank_get_counter(struct amdgpu_device *adev, int crtc)

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

199

if (crtc >= adev->mode_info.num_crtc)

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2003

dce_v10_0_vga_enable(crtc, false);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

202

return RREG32(mmCRTC_STATUS_FRAME_COUNT + crtc_offsets[crtc]);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2049

dce_v10_0_grph_enable(crtc, true);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2058

viewport_w = crtc->mode.hdisplay;

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2059

viewport_h = (crtc->mode.vdisplay + 1) & ~1;

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2066

if (fb && fb != crtc->primary->fb) {

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2081

static void dce_v10_0_set_interleave(struct drm_crtc *crtc,

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2084

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2086

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2097

static void dce_v10_0_crtc_load_lut(struct drm_crtc *crtc)

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2099

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2100

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2140

r = crtc->gamma_store;

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2141

g = r + crtc->gamma_size;

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2142

b = g + crtc->gamma_size;

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2232

static u32 dce_v10_0_pick_pll(struct drm_crtc *crtc)

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2234

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2235

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2246

pll = amdgpu_pll_get_shared_dp_ppll(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2252

pll = amdgpu_pll_get_shared_nondp_ppll(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2258

pll_in_use = amdgpu_pll_get_use_mask(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2269

static void dce_v10_0_lock_cursor(struct drm_crtc *crtc, bool lock)

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2271

struct amdgpu_device *adev = drm_to_adev(crtc->dev);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2272

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2283

static void dce_v10_0_hide_cursor(struct drm_crtc *crtc)

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2285

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2286

struct amdgpu_device *adev = drm_to_adev(crtc->dev);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2294

static void dce_v10_0_show_cursor(struct drm_crtc *crtc)

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2296

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2297

struct amdgpu_device *adev = drm_to_adev(crtc->dev);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2311

static int dce_v10_0_cursor_move_locked(struct drm_crtc *crtc,

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2314

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2315

struct amdgpu_device *adev = drm_to_adev(crtc->dev);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2322

x += crtc->x;

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2323

y += crtc->y;

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2324

DRM_DEBUG("x %d y %d c->x %d c->y %d\n", x, y, crtc->x, crtc->y);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2343

static int dce_v10_0_crtc_cursor_move(struct drm_crtc *crtc,

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2348

dce_v10_0_lock_cursor(crtc, true);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2349

ret = dce_v10_0_cursor_move_locked(crtc, x, y);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2350

dce_v10_0_lock_cursor(crtc, false);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2355

static int dce_v10_0_crtc_cursor_set2(struct drm_crtc *crtc,

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2363

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2370

dce_v10_0_hide_cursor(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2404

dce_v10_0_lock_cursor(crtc, true);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2415

dce_v10_0_cursor_move_locked(crtc, x, y);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2423

dce_v10_0_show_cursor(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2424

dce_v10_0_lock_cursor(crtc, false);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2441

static void dce_v10_0_cursor_reset(struct drm_crtc *crtc)

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2443

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2446

dce_v10_0_lock_cursor(crtc, true);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2448

dce_v10_0_cursor_move_locked(crtc, amdgpu_crtc->cursor_x,

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2451

dce_v10_0_show_cursor(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2453

dce_v10_0_lock_cursor(crtc, false);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2457

static int dce_v10_0_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2461

dce_v10_0_crtc_load_lut(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2466

static void dce_v10_0_crtc_destroy(struct drm_crtc *crtc)

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2468

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2470

drm_crtc_cleanup(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2487

static void dce_v10_0_crtc_dpms(struct drm_crtc *crtc, int mode)

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2489

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2491

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2497

amdgpu_atombios_crtc_enable(crtc, ATOM_ENABLE);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2498

dce_v10_0_vga_enable(crtc, true);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2499

amdgpu_atombios_crtc_blank(crtc, ATOM_DISABLE);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2500

dce_v10_0_vga_enable(crtc, false);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2506

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2507

dce_v10_0_crtc_load_lut(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2512

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2514

dce_v10_0_vga_enable(crtc, true);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2515

amdgpu_atombios_crtc_blank(crtc, ATOM_ENABLE);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2516

dce_v10_0_vga_enable(crtc, false);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2518

amdgpu_atombios_crtc_enable(crtc, ATOM_DISABLE);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2526

static void dce_v10_0_crtc_prepare(struct drm_crtc *crtc)

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2529

amdgpu_atombios_crtc_powergate(crtc, ATOM_DISABLE);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2530

amdgpu_atombios_crtc_lock(crtc, ATOM_ENABLE);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2531

dce_v10_0_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2534

static void dce_v10_0_crtc_commit(struct drm_crtc *crtc)

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2536

dce_v10_0_crtc_dpms(crtc, DRM_MODE_DPMS_ON);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2537

amdgpu_atombios_crtc_lock(crtc, ATOM_DISABLE);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2540

static void dce_v10_0_crtc_disable(struct drm_crtc *crtc)

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2542

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2543

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2548

dce_v10_0_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2549

if (crtc->primary->fb) {

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2553

abo = gem_to_amdgpu_bo(crtc->primary->fb->obj[0]);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2563

dce_v10_0_grph_enable(crtc, false);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2565

amdgpu_atombios_crtc_powergate(crtc, ATOM_ENABLE);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2584

amdgpu_atombios_crtc_program_pll(crtc, amdgpu_crtc->crtc_id, amdgpu_crtc->pll_id,

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

259

static int dce_v10_0_crtc_get_scanoutpos(struct amdgpu_device *adev, int crtc,

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2597

static int dce_v10_0_crtc_mode_set(struct drm_crtc *crtc,

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2602

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2607

amdgpu_atombios_crtc_set_pll(crtc, adjusted_mode);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2608

amdgpu_atombios_crtc_set_dtd_timing(crtc, adjusted_mode);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2609

dce_v10_0_crtc_do_set_base(crtc, old_fb, x, y);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2610

amdgpu_atombios_crtc_overscan_setup(crtc, mode, adjusted_mode);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2611

amdgpu_atombios_crtc_scaler_setup(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2612

dce_v10_0_cursor_reset(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2619

static bool dce_v10_0_crtc_mode_fixup(struct drm_crtc *crtc,

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

262

if ((crtc < 0) || (crtc >= adev->mode_info.num_crtc))

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2623

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2624

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2629

if (encoder->crtc == crtc) {

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2640

if (!amdgpu_display_crtc_scaling_mode_fixup(crtc, mode, adjusted_mode))

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2642

if (amdgpu_atombios_crtc_prepare_pll(crtc, adjusted_mode))

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2645

amdgpu_crtc->pll_id = dce_v10_0_pick_pll(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

265

*vbl = RREG32(mmCRTC_V_BLANK_START_END + crtc_offsets[crtc]);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2654

static int dce_v10_0_crtc_set_base(struct drm_crtc *crtc, int x, int y,

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2657

return dce_v10_0_crtc_do_set_base(crtc, old_fb, x, y);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

266

*position = RREG32(mmCRTC_STATUS_POSITION + crtc_offsets[crtc]);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2682

amdgpu_crtc = to_amdgpu_crtc(plane->crtc);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2994

int crtc,

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2999

if (crtc >= adev->mode_info.num_crtc) {

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3000

DRM_DEBUG("invalid crtc %d\n", crtc);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3006

lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3009

WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3012

lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3015

WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3023

int crtc,

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3028

if (crtc >= adev->mode_info.num_crtc) {

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3029

DRM_DEBUG("invalid crtc %d\n", crtc);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3035

lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3038

WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3041

lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3044

WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3221

int crtc)

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3225

if (crtc >= adev->mode_info.num_crtc) {

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3226

DRM_DEBUG("invalid crtc %d\n", crtc);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3230

tmp = RREG32(mmLB_VBLANK_STATUS + crtc_offsets[crtc]);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3232

WREG32(mmLB_VBLANK_STATUS + crtc_offsets[crtc], tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3236

int crtc)

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3240

if (crtc >= adev->mode_info.num_crtc) {

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3241

DRM_DEBUG("invalid crtc %d\n", crtc);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3245

tmp = RREG32(mmLB_VLINE_STATUS + crtc_offsets[crtc]);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3247

WREG32(mmLB_VLINE_STATUS + crtc_offsets[crtc], tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3254

unsigned crtc = entry->src_id - 1;

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3255

uint32_t disp_int = RREG32(interrupt_status_offsets[crtc].reg);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3256

unsigned int irq_type = amdgpu_display_crtc_idx_to_irq_type(adev, crtc);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3260

if (disp_int & interrupt_status_offsets[crtc].vblank)

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3261

dce_v10_0_crtc_vblank_int_ack(adev, crtc);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3266

drm_handle_vblank(adev_to_drm(adev), crtc);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3268

DRM_DEBUG("IH: D%d vblank\n", crtc + 1);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3272

if (disp_int & interrupt_status_offsets[crtc].vline)

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3273

dce_v10_0_crtc_vline_int_ack(adev, crtc);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3277

DRM_DEBUG("IH: D%d vline\n", crtc + 1);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3354

dce_v10_0_set_interleave(encoder->crtc, mode);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

509

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(encoder->crtc);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1562

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(encoder->crtc);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

161

static u32 dce_v6_0_vblank_get_counter(struct amdgpu_device *adev, int crtc)

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

163

if (crtc >= adev->mode_info.num_crtc)

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

166

return RREG32(mmCRTC_STATUS_FRAME_COUNT + crtc_offsets[crtc]);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1751

if (encoder->crtc) {

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1752

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(encoder->crtc);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1857

static void dce_v6_0_vga_enable(struct drm_crtc *crtc, bool enable)

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1859

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1860

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1868

static void dce_v6_0_grph_enable(struct drm_crtc *crtc, bool enable)

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1870

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1871

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1877

static int dce_v6_0_crtc_do_set_base(struct drm_crtc *crtc,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1881

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1882

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1895

if (!crtc->primary->fb) {

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1900

target_fb = crtc->primary->fb;

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2024

dce_v6_0_vga_enable(crtc, false);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2064

dce_v6_0_grph_enable(crtc, true);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2072

viewport_w = crtc->mode.hdisplay;

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2073

viewport_h = (crtc->mode.vdisplay + 1) & ~1;

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2081

if (fb && fb != crtc->primary->fb) {

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2097

static void dce_v6_0_set_interleave(struct drm_crtc *crtc,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2100

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2102

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2111

static void dce_v6_0_crtc_load_lut(struct drm_crtc *crtc)

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2113

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2114

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2146

r = crtc->gamma_store;

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2147

g = r + crtc->gamma_size;

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2148

b = g + crtc->gamma_size;

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2211

static u32 dce_v6_0_pick_pll(struct drm_crtc *crtc)

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2213

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2214

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2227

pll = amdgpu_pll_get_shared_nondp_ppll(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

223

static int dce_v6_0_crtc_get_scanoutpos(struct amdgpu_device *adev, int crtc,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2233

pll_in_use = amdgpu_pll_get_use_mask(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2242

static void dce_v6_0_lock_cursor(struct drm_crtc *crtc, bool lock)

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2244

struct amdgpu_device *adev = drm_to_adev(crtc->dev);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2245

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2256

static void dce_v6_0_hide_cursor(struct drm_crtc *crtc)

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2258

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2259

struct amdgpu_device *adev = drm_to_adev(crtc->dev);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

226

if ((crtc < 0) || (crtc >= adev->mode_info.num_crtc))

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2266

static void dce_v6_0_show_cursor(struct drm_crtc *crtc)

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2268

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2269

struct amdgpu_device *adev = drm_to_adev(crtc->dev);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2282

static int dce_v6_0_cursor_move_locked(struct drm_crtc *crtc,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2285

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2286

struct amdgpu_device *adev = drm_to_adev(crtc->dev);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

229

*vbl = RREG32(mmCRTC_V_BLANK_START_END + crtc_offsets[crtc]);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2295

x += crtc->x;

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2296

y += crtc->y;

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2297

DRM_DEBUG("x %d y %d c->x %d c->y %d\n", x, y, crtc->x, crtc->y);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

230

*position = RREG32(mmCRTC_STATUS_POSITION + crtc_offsets[crtc]);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2316

static int dce_v6_0_crtc_cursor_move(struct drm_crtc *crtc,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2321

dce_v6_0_lock_cursor(crtc, true);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2322

ret = dce_v6_0_cursor_move_locked(crtc, x, y);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2323

dce_v6_0_lock_cursor(crtc, false);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2328

static int dce_v6_0_crtc_cursor_set2(struct drm_crtc *crtc,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2336

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2343

dce_v6_0_hide_cursor(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2377

dce_v6_0_lock_cursor(crtc, true);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2388

dce_v6_0_cursor_move_locked(crtc, x, y);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2396

dce_v6_0_show_cursor(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2397

dce_v6_0_lock_cursor(crtc, false);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2414

static void dce_v6_0_cursor_reset(struct drm_crtc *crtc)

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2416

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2419

dce_v6_0_lock_cursor(crtc, true);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2421

dce_v6_0_cursor_move_locked(crtc, amdgpu_crtc->cursor_x,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2424

dce_v6_0_show_cursor(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2425

dce_v6_0_lock_cursor(crtc, false);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2429

static int dce_v6_0_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2433

dce_v6_0_crtc_load_lut(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2438

static void dce_v6_0_crtc_destroy(struct drm_crtc *crtc)

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2440

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2442

drm_crtc_cleanup(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2459

static void dce_v6_0_crtc_dpms(struct drm_crtc *crtc, int mode)

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2461

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2463

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2469

amdgpu_atombios_crtc_enable(crtc, ATOM_ENABLE);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2470

amdgpu_atombios_crtc_blank(crtc, ATOM_DISABLE);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2476

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2477

dce_v6_0_crtc_load_lut(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2482

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2484

amdgpu_atombios_crtc_blank(crtc, ATOM_ENABLE);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2485

amdgpu_atombios_crtc_enable(crtc, ATOM_DISABLE);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2493

static void dce_v6_0_crtc_prepare(struct drm_crtc *crtc)

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2496

amdgpu_atombios_crtc_powergate(crtc, ATOM_DISABLE);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2497

amdgpu_atombios_crtc_lock(crtc, ATOM_ENABLE);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2498

dce_v6_0_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2501

static void dce_v6_0_crtc_commit(struct drm_crtc *crtc)

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2503

dce_v6_0_crtc_dpms(crtc, DRM_MODE_DPMS_ON);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2504

amdgpu_atombios_crtc_lock(crtc, ATOM_DISABLE);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2507

static void dce_v6_0_crtc_disable(struct drm_crtc *crtc)

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2510

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2511

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2516

dce_v6_0_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2517

if (crtc->primary->fb) {

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2521

abo = gem_to_amdgpu_bo(crtc->primary->fb->obj[0]);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2531

dce_v6_0_grph_enable(crtc, false);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2533

amdgpu_atombios_crtc_powergate(crtc, ATOM_ENABLE);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2551

amdgpu_atombios_crtc_program_pll(crtc, amdgpu_crtc->crtc_id, amdgpu_crtc->pll_id,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2564

static int dce_v6_0_crtc_mode_set(struct drm_crtc *crtc,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2569

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2574

amdgpu_atombios_crtc_set_pll(crtc, adjusted_mode);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2575

amdgpu_atombios_crtc_set_dtd_timing(crtc, adjusted_mode);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2576

dce_v6_0_crtc_do_set_base(crtc, old_fb, x, y);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2577

amdgpu_atombios_crtc_overscan_setup(crtc, mode, adjusted_mode);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2578

amdgpu_atombios_crtc_scaler_setup(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2579

dce_v6_0_cursor_reset(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2586

static bool dce_v6_0_crtc_mode_fixup(struct drm_crtc *crtc,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2590

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2591

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2596

if (encoder->crtc == crtc) {

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2607

if (!amdgpu_display_crtc_scaling_mode_fixup(crtc, mode, adjusted_mode))

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2609

if (amdgpu_atombios_crtc_prepare_pll(crtc, adjusted_mode))

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2612

amdgpu_crtc->pll_id = dce_v6_0_pick_pll(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2621

static int dce_v6_0_crtc_set_base(struct drm_crtc *crtc, int x, int y,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2624

return dce_v6_0_crtc_do_set_base(crtc, old_fb, x, y);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2649

amdgpu_crtc = to_amdgpu_crtc(plane->crtc);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2932

int crtc,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2937

if (crtc >= adev->mode_info.num_crtc) {

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2938

DRM_DEBUG("invalid crtc %d\n", crtc);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2942

switch (crtc) {

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2962

DRM_DEBUG("invalid crtc %d\n", crtc);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2983

int crtc,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

3071

unsigned crtc = entry->src_id - 1;

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

3072

uint32_t disp_int = RREG32(interrupt_status_offsets[crtc].reg);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

3074

crtc);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

3078

if (disp_int & interrupt_status_offsets[crtc].vblank)

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

3079

WREG32(mmVBLANK_STATUS + crtc_offsets[crtc], VBLANK_STATUS__VBLANK_ACK_MASK);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

3084

drm_handle_vblank(adev_to_drm(adev), crtc);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

3086

DRM_DEBUG("IH: D%d vblank\n", crtc + 1);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

3089

if (disp_int & interrupt_status_offsets[crtc].vline)

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

3090

WREG32(mmVLINE_STATUS + crtc_offsets[crtc], VLINE_STATUS__VLINE_ACK_MASK);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

3094

DRM_DEBUG("IH: D%d vline\n", crtc + 1);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

3245

dce_v6_0_set_interleave(encoder->crtc, mode);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

462

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(encoder->crtc);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

148

static u32 dce_v8_0_vblank_get_counter(struct amdgpu_device *adev, int crtc)

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

150

if (crtc >= adev->mode_info.num_crtc)

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1506

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(encoder->crtc);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

153

return RREG32(mmCRTC_STATUS_FRAME_COUNT + crtc_offsets[crtc]);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1550

if (encoder->crtc) {

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1551

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(encoder->crtc);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1760

static void dce_v8_0_vga_enable(struct drm_crtc *crtc, bool enable)

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1762

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1763

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1774

static void dce_v8_0_grph_enable(struct drm_crtc *crtc, bool enable)

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1776

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1777

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1786

static int dce_v8_0_crtc_do_set_base(struct drm_crtc *crtc,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1790

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1791

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1805

if (!crtc->primary->fb) {

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1810

target_fb = crtc->primary->fb;

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1936

dce_v8_0_vga_enable(crtc, false);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1976

dce_v8_0_grph_enable(crtc, true);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1985

viewport_w = crtc->mode.hdisplay;

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1986

viewport_h = (crtc->mode.vdisplay + 1) & ~1;

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1993

if (fb && fb != crtc->primary->fb) {

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2008

static void dce_v8_0_set_interleave(struct drm_crtc *crtc,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2011

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2013

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2022

static void dce_v8_0_crtc_load_lut(struct drm_crtc *crtc)

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2024

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2025

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2057

r = crtc->gamma_store;

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2058

g = r + crtc->gamma_size;

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2059

b = g + crtc->gamma_size;

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

207

static int dce_v8_0_crtc_get_scanoutpos(struct amdgpu_device *adev, int crtc,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

210

if ((crtc < 0) || (crtc >= adev->mode_info.num_crtc))

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

213

*vbl = RREG32(mmCRTC_V_BLANK_START_END + crtc_offsets[crtc]);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

214

*position = RREG32(mmCRTC_STATUS_POSITION + crtc_offsets[crtc]);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2140

static u32 dce_v8_0_pick_pll(struct drm_crtc *crtc)

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2142

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2143

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2154

pll = amdgpu_pll_get_shared_dp_ppll(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2160

pll = amdgpu_pll_get_shared_nondp_ppll(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2168

pll_in_use = amdgpu_pll_get_use_mask(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2177

pll_in_use = amdgpu_pll_get_use_mask(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2190

static void dce_v8_0_lock_cursor(struct drm_crtc *crtc, bool lock)

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2192

struct amdgpu_device *adev = drm_to_adev(crtc->dev);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2193

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2204

static void dce_v8_0_hide_cursor(struct drm_crtc *crtc)

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2206

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2207

struct amdgpu_device *adev = drm_to_adev(crtc->dev);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2214

static void dce_v8_0_show_cursor(struct drm_crtc *crtc)

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2216

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2217

struct amdgpu_device *adev = drm_to_adev(crtc->dev);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2230

static int dce_v8_0_cursor_move_locked(struct drm_crtc *crtc,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2233

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2234

struct amdgpu_device *adev = drm_to_adev(crtc->dev);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2241

x += crtc->x;

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2242

y += crtc->y;

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2243

DRM_DEBUG("x %d y %d c->x %d c->y %d\n", x, y, crtc->x, crtc->y);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2262

static int dce_v8_0_crtc_cursor_move(struct drm_crtc *crtc,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2267

dce_v8_0_lock_cursor(crtc, true);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2268

ret = dce_v8_0_cursor_move_locked(crtc, x, y);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2269

dce_v8_0_lock_cursor(crtc, false);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2274

static int dce_v8_0_crtc_cursor_set2(struct drm_crtc *crtc,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2282

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2289

dce_v8_0_hide_cursor(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2323

dce_v8_0_lock_cursor(crtc, true);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2334

dce_v8_0_cursor_move_locked(crtc, x, y);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2342

dce_v8_0_show_cursor(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2343

dce_v8_0_lock_cursor(crtc, false);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2360

static void dce_v8_0_cursor_reset(struct drm_crtc *crtc)

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2362

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2365

dce_v8_0_lock_cursor(crtc, true);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2367

dce_v8_0_cursor_move_locked(crtc, amdgpu_crtc->cursor_x,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2370

dce_v8_0_show_cursor(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2372

dce_v8_0_lock_cursor(crtc, false);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2376

static int dce_v8_0_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2380

dce_v8_0_crtc_load_lut(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2385

static void dce_v8_0_crtc_destroy(struct drm_crtc *crtc)

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2387

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2389

drm_crtc_cleanup(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2406

static void dce_v8_0_crtc_dpms(struct drm_crtc *crtc, int mode)

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2408

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2410

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2416

amdgpu_atombios_crtc_enable(crtc, ATOM_ENABLE);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2417

dce_v8_0_vga_enable(crtc, true);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2418

amdgpu_atombios_crtc_blank(crtc, ATOM_DISABLE);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2419

dce_v8_0_vga_enable(crtc, false);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2425

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2426

dce_v8_0_crtc_load_lut(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2431

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2433

dce_v8_0_vga_enable(crtc, true);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2434

amdgpu_atombios_crtc_blank(crtc, ATOM_ENABLE);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2435

dce_v8_0_vga_enable(crtc, false);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2437

amdgpu_atombios_crtc_enable(crtc, ATOM_DISABLE);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2445

static void dce_v8_0_crtc_prepare(struct drm_crtc *crtc)

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2448

amdgpu_atombios_crtc_powergate(crtc, ATOM_DISABLE);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2449

amdgpu_atombios_crtc_lock(crtc, ATOM_ENABLE);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2450

dce_v8_0_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2453

static void dce_v8_0_crtc_commit(struct drm_crtc *crtc)

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2455

dce_v8_0_crtc_dpms(crtc, DRM_MODE_DPMS_ON);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2456

amdgpu_atombios_crtc_lock(crtc, ATOM_DISABLE);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2459

static void dce_v8_0_crtc_disable(struct drm_crtc *crtc)

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2461

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2462

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2467

dce_v8_0_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2468

if (crtc->primary->fb) {

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2472

abo = gem_to_amdgpu_bo(crtc->primary->fb->obj[0]);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2482

dce_v8_0_grph_enable(crtc, false);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2484

amdgpu_atombios_crtc_powergate(crtc, ATOM_ENABLE);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2502

amdgpu_atombios_crtc_program_pll(crtc, amdgpu_crtc->crtc_id, amdgpu_crtc->pll_id,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2510

amdgpu_atombios_crtc_program_pll(crtc, amdgpu_crtc->crtc_id, amdgpu_crtc->pll_id,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2523

static int dce_v8_0_crtc_mode_set(struct drm_crtc *crtc,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2528

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2533

amdgpu_atombios_crtc_set_pll(crtc, adjusted_mode);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2534

amdgpu_atombios_crtc_set_dtd_timing(crtc, adjusted_mode);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2535

dce_v8_0_crtc_do_set_base(crtc, old_fb, x, y);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2536

amdgpu_atombios_crtc_overscan_setup(crtc, mode, adjusted_mode);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2537

amdgpu_atombios_crtc_scaler_setup(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2538

dce_v8_0_cursor_reset(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2545

static bool dce_v8_0_crtc_mode_fixup(struct drm_crtc *crtc,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2549

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2550

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2555

if (encoder->crtc == crtc) {

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2566

if (!amdgpu_display_crtc_scaling_mode_fixup(crtc, mode, adjusted_mode))

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2568

if (amdgpu_atombios_crtc_prepare_pll(crtc, adjusted_mode))

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2571

amdgpu_crtc->pll_id = dce_v8_0_pick_pll(crtc);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2580

static int dce_v8_0_crtc_set_base(struct drm_crtc *crtc, int x, int y,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2583

return dce_v8_0_crtc_do_set_base(crtc, old_fb, x, y);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2608

amdgpu_crtc = to_amdgpu_crtc(plane->crtc);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2904

int crtc,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2909

if (crtc >= adev->mode_info.num_crtc) {

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2910

DRM_DEBUG("invalid crtc %d\n", crtc);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2914

switch (crtc) {

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2934

DRM_DEBUG("invalid crtc %d\n", crtc);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2955

int crtc,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2960

if (crtc >= adev->mode_info.num_crtc) {

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2961

DRM_DEBUG("invalid crtc %d\n", crtc);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2965

switch (crtc) {

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2985

DRM_DEBUG("invalid crtc %d\n", crtc);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

3087

unsigned crtc = entry->src_id - 1;

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

3088

uint32_t disp_int = RREG32(interrupt_status_offsets[crtc].reg);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

3090

crtc);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

3094

if (disp_int & interrupt_status_offsets[crtc].vblank)

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

3095

WREG32(mmLB_VBLANK_STATUS + crtc_offsets[crtc], LB_VBLANK_STATUS__VBLANK_ACK_MASK);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

3100

drm_handle_vblank(adev_to_drm(adev), crtc);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

3102

DRM_DEBUG("IH: D%d vblank\n", crtc + 1);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

3105

if (disp_int & interrupt_status_offsets[crtc].vline)

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

3106

WREG32(mmLB_VLINE_STATUS + crtc_offsets[crtc], LB_VLINE_STATUS__VLINE_ACK_MASK);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

3110

DRM_DEBUG("IH: D%d vline\n", crtc + 1);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

3262

dce_v8_0_set_interleave(encoder->crtc, mode);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

467

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(encoder->crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10003

if (!fb || !crtc || pcrtc != crtc)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10006

new_crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10072

!amdgpu_dm_crc_window_is_activated(acrtc_state->base.crtc) &&

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10092

if (crtc->state->async_flip &&

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10100

crtc->state->async_flip &&

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10323

if (old_con_state->crtc != new_con_state->crtc) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10328

if (!new_con_state->crtc)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10332

state, new_con_state->crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10356

if (!new_con_state->crtc)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10360

state, new_con_state->crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10416

struct drm_crtc *crtc;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10437

if (!dm_old_con_state->base.crtc)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10440

acrtc = to_amdgpu_crtc(dm_old_con_state->base.crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10453

for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10455

struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10470

for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10471

struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10542

crtc->hwmode = new_crtc_state->mode;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10576

for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10577

struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10630

acrtc = to_amdgpu_crtc(wb_conn->encoder.crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10723

struct amdgpu_crtc *acrtc = to_amdgpu_crtc(dm_new_con_state->base.crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10827

struct drm_crtc *crtc;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10836

for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10874

struct drm_crtc *crtc;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10900

struct amdgpu_crtc *acrtc = to_amdgpu_crtc(dm_new_con_state->base.crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10940

update_stream_scaling_settings(dev, &dm_new_con_state->base.crtc->mode,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11007

for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11008

struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11048

if (amdgpu_dm_crc_window_is_activated(crtc)) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11067

crtc, dm_new_crtc_state, cur_crc_src))

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11074

for_each_new_crtc_in_state(state, crtc, new_crtc_state, j)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11079

for_each_new_crtc_in_state(state, crtc, new_crtc_state, j) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11083

amdgpu_dm_commit_planes(state, dev, dm, crtc, wait_for_vblank);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11089

struct amdgpu_crtc *acrtc = to_amdgpu_crtc(dm_new_con_state->base.crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11126

for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11172

struct amdgpu_crtc *disconnected_acrtc = to_amdgpu_crtc(connector->encoder->crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11248

disconnected_acrtc = to_amdgpu_crtc(connector->encoder->crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11272

struct drm_crtc *crtc;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11285

list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11286

spin_lock(&crtc->commit_lock);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11287

commit = list_first_entry_or_null(&crtc->commit_list,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11291

spin_unlock(&crtc->commit_lock);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11308

crtc->base.id, crtc->name);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11416

struct drm_crtc *crtc,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11442

acrtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11443

connector = amdgpu_dm_find_first_crtc_matching_connector(state, crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11577

crtc->base.id);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11621

crtc->base.id);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11724

if (old_plane_state->crtc != new_plane_state->crtc)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11728

if (!new_plane_state->crtc)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11732

drm_atomic_get_new_crtc_state(state, new_plane_state->crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11734

drm_atomic_get_old_crtc_state(state, old_plane_state->crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11786

if (old_other_state->crtc != new_plane_state->crtc &&

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11787

new_other_state->crtc != new_plane_state->crtc)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11790

if (old_other_state->crtc != new_other_state->crtc)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11995

new_plane_crtc = new_plane_state->crtc;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11996

old_plane_crtc = old_plane_state->crtc;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12235

static int add_affected_mst_dsc_crtcs(struct drm_atomic_state *state, struct drm_crtc *crtc)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12243

if (!conn_state->crtc)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12246

if (conn_state->crtc != crtc)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12366

!(drm_plane_mask(crtc_state->crtc->cursor) & crtc_state->plane_mask)) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12371

crtc_state->crtc->cursor);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12484

struct drm_crtc *crtc;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12511

if (!new_con_state->crtc)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12514

new_crtc_state = drm_atomic_get_crtc_state(state, new_con_state->crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12527

for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12532

for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12534

ret = add_affected_mst_dsc_crtcs(state, crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12542

for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12560

ret = drm_atomic_add_affected_connectors(state, crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12566

ret = drm_atomic_add_affected_planes(state, crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12581

drm_for_each_crtc(crtc, dev) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12588

if (new_plane_state->crtc == crtc ||

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12589

old_plane_state->crtc == crtc) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12598

drm_for_each_plane_mask(plane, state->dev, crtc->state->plane_mask) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12629

for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12651

ret = drm_atomic_add_affected_planes(state, crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12673

for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12674

ret = dm_update_crtc_state(&adev->dm, state, crtc,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12686

for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12687

ret = dm_update_crtc_state(&adev->dm, state, crtc,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12727

for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12730

drm_dbg_atomic(dev, "MPO enablement requested on crtc:[%p]\n", crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12734

for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12744

if ((drm_plane_mask(crtc->cursor) & new_crtc_state->plane_mask) &&

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12746

new_cursor_state = drm_atomic_get_new_plane_state(state, crtc->cursor);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12755

crtc->dev,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12757

crtc->base.id, crtc->name);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12767

drm_dbg_driver(crtc->dev,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12769

crtc->base.id, crtc->name);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12772

drm_dbg_driver(crtc->dev,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12774

crtc->base.id, crtc->name);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12808

struct amdgpu_crtc *acrtc = to_amdgpu_crtc(dm_new_con_state->base.crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12947

for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12958

drm_dbg_atomic(crtc->dev,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12960

crtc->base.id, crtc->name);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

2245

if (adev->dm.secure_display_ctx.crtc_ctx[i].crtc) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

259

static u32 dm_vblank_get_counter(struct amdgpu_device *adev, int crtc)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

263

if (crtc >= adev->mode_info.num_crtc)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

266

acrtc = adev->mode_info.crtcs[crtc];

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

270

crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

277

static int dm_crtc_get_scanoutpos(struct amdgpu_device *adev, int crtc,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

284

if ((crtc < 0) || (crtc >= adev->mode_info.num_crtc))

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

287

acrtc = adev->mode_info.crtcs[crtc];

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

291

crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3153

struct drm_crtc *crtc;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3160

for_each_new_crtc_in_state(dm->cached_state, crtc, new_crtc_state, i) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3171

for_each_new_crtc_in_state(dm->cached_state, crtc, new_crtc_state, i) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3252

struct drm_crtc *crtc)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3260

crtc_from_state = new_con_state->crtc;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3262

if (crtc_from_state == crtc)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

342

struct drm_crtc *crtc;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

348

list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

349

amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8304

struct drm_crtc *crtc = new_con_state->crtc;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8320

if (!crtc)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8324

new_crtc_state = drm_atomic_get_crtc_state(state, crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8332

new_crtc_state = drm_atomic_get_crtc_state(state, crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8340

new_crtc_state = drm_atomic_get_crtc_state(state, crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8354

new_crtc_state = drm_atomic_get_crtc_state(state, crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8438

result = drm_crtc_helper_mode_valid_fixed(encoder->crtc, adjusted_mode, native_mode);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8514

if (!new_con_state || !new_con_state->crtc)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9506

if (!(old_conn_state->crtc && old_conn_state->crtc->enabled) &&

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9507

new_conn_state->crtc && new_conn_state->crtc->enabled &&

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9597

struct amdgpu_crtc *acrtc = to_amdgpu_crtc(new_crtc_state->base.crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9675

new_crtc_state->base.crtc->base.id,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9690

struct amdgpu_crtc *acrtc = to_amdgpu_crtc(new_crtc_state->base.crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9756

WARN_ON(amdgpu_dm_crtc_set_vupdate_irq(new_state->base.crtc, true) != 0);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9757

WARN_ON(drm_crtc_vblank_get(new_state->base.crtc) != 0);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9758

drm_dbg_driver(new_state->base.crtc->dev, "%s: crtc=%u VRR off->on: Get vblank ref\n",

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9759

__func__, new_state->base.crtc->base.id);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9764

WARN_ON(amdgpu_dm_crtc_set_vupdate_irq(new_state->base.crtc, false) != 0);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9765

drm_crtc_vblank_put(new_state->base.crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9766

drm_dbg_driver(new_state->base.crtc->dev, "%s: crtc=%u VRR on->off: Drop vblank ref\n",

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9767

__func__, new_state->base.crtc->base.id);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9799

struct drm_crtc *crtc = afb ? plane->state->crtc : old_plane_state->crtc;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9800

struct dm_crtc_state *crtc_state = crtc ? to_dm_crtc_state(crtc->state) : NULL;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9801

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9814

ret = amdgpu_dm_plane_get_cursor_position(plane, crtc, &position);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9903

!amdgpu_dm_crc_window_is_activated(acrtc_state->base.crtc) &&

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9982

struct drm_crtc *crtc = new_plane_state->crtc;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9993

if ((fb && crtc == pcrtc) ||

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9994

(old_plane_state->fb && old_plane_state->crtc == pcrtc)) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h

1079

int amdgpu_dm_update_crtc_color_mgmt(struct dm_crtc_state *crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h

1080

int amdgpu_dm_check_crtc_color_mgmt(struct dm_crtc_state *crtc,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h

1082

int amdgpu_dm_update_plane_color_mgmt(struct dm_crtc_state *crtc,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h

1119

struct drm_crtc *crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1194

int amdgpu_dm_check_crtc_color_mgmt(struct dm_crtc_state *crtc,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1197

struct dc_stream_state *stream = crtc->stream;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1198

struct amdgpu_device *adev = drm_to_adev(crtc->base.state->dev);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1208

tf = amdgpu_tf_to_dc_tf(crtc->regamma_tf);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1210

r = amdgpu_dm_verify_lut_sizes(&crtc->base);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1214

degamma_lut = __extract_blob_lut(crtc->base.degamma_lut, &degamma_size);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1215

regamma_lut = __extract_blob_lut(crtc->base.gamma_lut, &regamma_size);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1226

crtc->cm_has_degamma = false;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1227

crtc->cm_is_degamma_srgb = false;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1250

crtc->cm_is_degamma_srgb = true;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1273

crtc->cm_has_degamma = has_degamma;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1302

int amdgpu_dm_update_crtc_color_mgmt(struct dm_crtc_state *crtc)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1304

struct dc_stream_state *stream = crtc->stream;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1308

ret = amdgpu_dm_check_crtc_color_mgmt(crtc, false);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1313

if (crtc->base.ctm) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1314

ctm = (struct drm_color_ctm *)crtc->base.ctm->data;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1339

map_crtc_degamma_to_dc_plane(struct dm_crtc_state *crtc,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1359

if (crtc->cm_has_degamma) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1360

degamma_lut = __extract_blob_lut(crtc->base.degamma_lut,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1390

if (crtc->cm_is_degamma_srgb)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1973

int amdgpu_dm_update_plane_color_mgmt(struct dm_crtc_state *crtc,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1977

struct amdgpu_device *adev = drm_to_adev(crtc->base.state->dev);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1998

has_crtc_cm_degamma = (crtc->cm_has_degamma || crtc->cm_is_degamma_srgb);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

2010

drm_dbg_kms(crtc->base.crtc->dev,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

2027

ret = map_crtc_degamma_to_dc_plane(crtc, dc_plane_state, color_caps);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

298

static void amdgpu_dm_set_crc_window_default(struct drm_crtc *crtc, struct dc_stream_state *stream)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

300

struct drm_device *drm_dev = crtc->dev;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

302

struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

326

flush_work(&dm->secure_display_ctx.crtc_ctx[crtc->index].notify_ta_work);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

327

flush_work(&dm->secure_display_ctx.crtc_ctx[crtc->index].forward_roi_work);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

346

struct drm_crtc *crtc;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

358

crtc = crtc_ctx->crtc;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

360

if (!crtc)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

363

psp = &drm_to_adev(crtc->dev)->psp;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

370

dm = &drm_to_adev(crtc->dev)->dm;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

371

stream = to_amdgpu_crtc(crtc)->dm_irq_params.stream;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

376

mutex_lock(&crtc->dev->mode_config.mutex);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

379

mutex_unlock(&crtc->dev->mode_config.mutex);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

382

mutex_unlock(&crtc->dev->mode_config.mutex);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

384

spin_lock_irqsave(&crtc->dev->event_lock, flags);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

386

spin_unlock_irqrestore(&crtc->dev->event_lock, flags);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

428

struct drm_crtc *crtc;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

436

crtc = crtc_ctx->crtc;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

438

if (!crtc)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

441

dm = &drm_to_adev(crtc->dev)->dm;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

442

stream = to_amdgpu_crtc(crtc)->dm_irq_params.stream;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

448

mutex_lock(&crtc->dev->mode_config.mutex);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

451

mutex_unlock(&crtc->dev->mode_config.mutex);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

454

mutex_unlock(&crtc->dev->mode_config.mutex);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

456

spin_lock_irqsave(&crtc->dev->event_lock, flags);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

458

spin_unlock_irqrestore(&crtc->dev->event_lock, flags);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

470

bool amdgpu_dm_crc_window_is_activated(struct drm_crtc *crtc)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

472

struct drm_device *drm_dev = crtc->dev;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

473

struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

485

amdgpu_dm_crtc_verify_crc_source(struct drm_crtc *crtc, const char *src_name,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

492

src_name, crtc->index);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

500

int amdgpu_dm_crtc_configure_crc_source(struct drm_crtc *crtc,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

504

struct amdgpu_device *adev = drm_to_adev(crtc->dev);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

535

struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

573

int amdgpu_dm_crtc_set_crc_source(struct drm_crtc *crtc, const char *src_name)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

579

struct drm_device *drm_dev = crtc->dev;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

584

struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

592

src_name, crtc->index);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

596

ret = drm_modeset_lock(&crtc->mutex, NULL);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

600

spin_lock(&crtc->commit_lock);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

601

commit = list_first_entry_or_null(&crtc->commit_list,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

605

spin_unlock(&crtc->commit_lock);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

622

crtc_state = to_dm_crtc_state(crtc->state);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

647

drm_connector_list_iter_begin(crtc->dev, &conn_iter);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

649

if (!connector->state || connector->state->crtc != crtc)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

661

DRM_DEBUG_DRIVER("No amd connector matching CRTC-%d\n", crtc->index);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

689

ret = drm_crtc_vblank_get(crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

696

amdgpu_dm_set_crc_window_default(crtc, crtc_state->stream);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

699

if (amdgpu_dm_crtc_configure_crc_source(crtc, crtc_state, source)) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

706

if (drm_dp_start_crc(aux, crtc)) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

713

drm_crtc_vblank_put(crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

741

drm_modeset_unlock(&crtc->mutex);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

753

void amdgpu_dm_crtc_handle_crc_irq(struct drm_crtc *crtc)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

763

if (crtc == NULL)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

766

crtc_state = to_dm_crtc_state(crtc->state);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

768

acrtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

769

drm_dev = crtc->dev;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

795

drm_crtc_add_crc_entry(crtc, true,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

796

drm_crtc_accurate_vblank_count(crtc), crcs);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

801

void amdgpu_dm_crtc_handle_crc_window_irq(struct drm_crtc *crtc)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

81

const char *const *amdgpu_dm_crtc_get_crc_sources(struct drm_crtc *crtc,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

819

if (crtc == NULL)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

822

acrtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

823

adev = drm_to_adev(crtc->dev);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

824

drm_dev = crtc->dev;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

825

stream_state = to_dm_crtc_state(crtc->state)->stream;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

843

if (WARN_ON(crtc_ctx->crtc != crtc)) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

847

crtc_ctx->crtc = crtc;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

972

crtc_ctx[i].crtc = &adev->mode_info.crtcs[i]->base;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.h

125

int amdgpu_dm_crtc_configure_crc_source(struct drm_crtc *crtc,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.h

128

int amdgpu_dm_crtc_set_crc_source(struct drm_crtc *crtc, const char *src_name);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.h

129

int amdgpu_dm_crtc_verify_crc_source(struct drm_crtc *crtc,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.h

132

const char *const *amdgpu_dm_crtc_get_crc_sources(struct drm_crtc *crtc,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.h

134

void amdgpu_dm_crtc_handle_crc_irq(struct drm_crtc *crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.h

143

bool amdgpu_dm_crc_window_is_activated(struct drm_crtc *crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.h

144

void amdgpu_dm_crtc_handle_crc_window_irq(struct drm_crtc *crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.h

97

struct drm_crtc *crtc;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

290

static inline int amdgpu_dm_crtc_set_vblank(struct drm_crtc *crtc, bool enable)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

292

struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

293

struct amdgpu_device *adev = drm_to_adev(crtc->dev);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

294

struct dm_crtc_state *acrtc_state = to_dm_crtc_state(crtc->state);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

301

drm_dbg_vbl(crtc->dev,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

311

struct drm_vblank_crtc *vblank = drm_crtc_vblank_crtc(crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

327

drm_crtc_vblank_restore(crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

334

rc = amdgpu_dm_crtc_set_vupdate_irq(crtc, true);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

337

rc = amdgpu_dm_crtc_set_vupdate_irq(crtc, false);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

347

drm_dbg_vbl(crtc->dev, "Get crtc_irq ret=%d\n", rc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

350

drm_dbg_vbl(crtc->dev, "Put crtc_irq ret=%d\n", rc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

366

drm_dbg_vbl(crtc->dev, "Get pageflip_irq ret=%d\n", rc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

369

drm_dbg_vbl(crtc->dev, "Put pageflip_irq ret=%d\n", rc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

380

drm_dbg_vbl(crtc->dev, "Get vline0_irq ret=%d\n", rc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

383

drm_dbg_vbl(crtc->dev, "Put vline0_irq ret=%d\n", rc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

415

int amdgpu_dm_crtc_enable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

417

return amdgpu_dm_crtc_set_vblank(crtc, true);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

420

void amdgpu_dm_crtc_disable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

422

amdgpu_dm_crtc_set_vblank(crtc, false);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

425

static void amdgpu_dm_crtc_destroy_state(struct drm_crtc *crtc,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

43

struct drm_crtc *crtc = &acrtc->base;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

44

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

441

static struct drm_crtc_state *amdgpu_dm_crtc_duplicate_state(struct drm_crtc *crtc)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

445

cur = to_dm_crtc_state(crtc->state);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

447

if (WARN_ON(!crtc->state))

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

454

__drm_atomic_helper_crtc_duplicate_state(crtc, &state->base);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

47

drm_crtc_handle_vblank(crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

477

static void amdgpu_dm_crtc_destroy(struct drm_crtc *crtc)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

479

drm_crtc_cleanup(crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

480

kfree(crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

483

static void amdgpu_dm_crtc_reset_state(struct drm_crtc *crtc)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

487

if (crtc->state)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

488

amdgpu_dm_crtc_destroy_state(crtc, crtc->state);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

494

__drm_atomic_helper_crtc_reset(crtc, &state->base);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

498

static int amdgpu_dm_crtc_late_register(struct drm_crtc *crtc)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

500

crtc_debugfs_init(crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

517

dm_crtc_additional_color_mgmt(struct drm_crtc *crtc)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

519

struct amdgpu_device *adev = drm_to_adev(crtc->dev);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

522

drm_object_attach_property(&crtc->base,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

528

amdgpu_dm_atomic_crtc_set_property(struct drm_crtc *crtc,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

53

drm_crtc_send_vblank_event(crtc, acrtc->event);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

533

struct amdgpu_device *adev = drm_to_adev(crtc->dev);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

54

drm_crtc_vblank_put(crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

542

drm_dbg_atomic(crtc->dev,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

544

crtc->base.id, crtc->name,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

553

amdgpu_dm_atomic_crtc_get_property(struct drm_crtc *crtc,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

558

struct amdgpu_device *adev = drm_to_adev(crtc->dev);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

594

static void amdgpu_dm_crtc_helper_disable(struct drm_crtc *crtc)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

630

static void amdgpu_dm_crtc_update_crtc_active_planes(struct drm_crtc *crtc,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

645

static bool amdgpu_dm_crtc_helper_mode_fixup(struct drm_crtc *crtc,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

652

static int amdgpu_dm_crtc_helper_atomic_check(struct drm_crtc *crtc,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

656

crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

657

struct amdgpu_device *adev = drm_to_adev(crtc->dev);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

664

amdgpu_dm_crtc_update_crtc_active_planes(crtc, crtc_state);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

678

!(crtc_state->plane_mask & drm_plane_mask(crtc->primary))) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

689

drm_dbg_atomic(crtc->dev,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

691

crtc->base.id, crtc->name);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

699

primary_state = drm_atomic_get_plane_state(state, crtc->primary);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

77

int amdgpu_dm_crtc_set_vupdate_irq(struct drm_crtc *crtc, bool enable)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

80

struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

81

struct amdgpu_device *adev = drm_to_adev(crtc->dev);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.h

36

int amdgpu_dm_crtc_set_vupdate_irq(struct drm_crtc *crtc, bool enable);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.h

42

int amdgpu_dm_crtc_enable_vblank(struct drm_crtc *crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.h

44

void amdgpu_dm_crtc_disable_vblank(struct drm_crtc *crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1094

struct drm_crtc *crtc = m->private;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1095

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1101

drm_modeset_lock(&crtc->mutex, NULL);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1102

if (crtc->state == NULL)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1105

dm_crtc_state = to_dm_crtc_state(crtc->state);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1133

drm_modeset_unlock(&crtc->mutex);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1146

struct drm_crtc *crtc = m->private;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1147

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1152

drm_modeset_lock(&crtc->mutex, NULL);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1153

if (crtc->state == NULL)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1156

dm_crtc_state = to_dm_crtc_state(crtc->state);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1187

drm_modeset_unlock(&crtc->mutex);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1347

acrtc_state = to_dm_crtc_state(connector->base.state->crtc->state);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1644

struct drm_crtc *crtc = NULL;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1697

crtc = connector->state->crtc;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1698

if (crtc == NULL)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1701

drm_modeset_lock(&crtc->mutex, NULL);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1702

if (crtc->state == NULL)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1705

dm_crtc_state = to_dm_crtc_state(crtc->state);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1719

if (crtc)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1720

drm_modeset_unlock(&crtc->mutex);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1829

struct drm_crtc *crtc = NULL;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1881

crtc = connector->state->crtc;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1882

if (crtc == NULL)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1885

drm_modeset_lock(&crtc->mutex, NULL);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1886

if (crtc->state == NULL)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1889

dm_crtc_state = to_dm_crtc_state(crtc->state);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1903

if (crtc)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1904

drm_modeset_unlock(&crtc->mutex);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2012

struct drm_crtc *crtc = NULL;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2065

crtc = connector->state->crtc;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2066

if (crtc == NULL)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2069

drm_modeset_lock(&crtc->mutex, NULL);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2070

if (crtc->state == NULL)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2073

dm_crtc_state = to_dm_crtc_state(crtc->state);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2087

if (crtc)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2088

drm_modeset_unlock(&crtc->mutex);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2189

struct drm_crtc *crtc = NULL;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2242

crtc = connector->state->crtc;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2243

if (crtc == NULL)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2246

drm_modeset_lock(&crtc->mutex, NULL);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2247

if (crtc->state == NULL)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2250

dm_crtc_state = to_dm_crtc_state(crtc->state);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2259

if (crtc)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2260

drm_modeset_unlock(&crtc->mutex);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3661

struct drm_crtc *crtc = data;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3662

struct drm_device *drm_dev = crtc->dev;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3663

struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3678

struct drm_crtc *crtc = data;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3679

struct drm_device *drm_dev = crtc->dev;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3680

struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3698

struct drm_crtc *crtc = data;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3699

struct drm_device *drm_dev = crtc->dev;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3700

struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3715

struct drm_crtc *crtc = data;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3716

struct drm_device *drm_dev = crtc->dev;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3717

struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3734

struct drm_crtc *crtc = data;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3735

struct drm_device *drm_dev = crtc->dev;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3736

struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3751

struct drm_crtc *crtc = data;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3752

struct drm_device *drm_dev = crtc->dev;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3753

struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3770

struct drm_crtc *crtc = data;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3771

struct drm_device *drm_dev = crtc->dev;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3772

struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3787

struct drm_crtc *crtc = data;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3788

struct drm_device *drm_dev = crtc->dev;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3789

struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3805

struct drm_crtc *crtc = data;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3807

struct amdgpu_device *adev = drm_to_adev(crtc->dev);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3810

acrtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3850

struct drm_crtc *crtc = data;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3852

struct amdgpu_device *adev = drm_to_adev(crtc->dev);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3857

acrtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3873

struct drm_crtc *crtc = data;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3874

struct drm_device *drm_dev = crtc->dev;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3875

struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3887

void crtc_debugfs_init(struct drm_crtc *crtc)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3890

struct dentry *dir = debugfs_lookup("crc", crtc->debugfs_entry);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3895

debugfs_create_file_unsafe("crc_win_x_start", 0644, dir, crtc,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3897

debugfs_create_file_unsafe("crc_win_y_start", 0644, dir, crtc,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3899

debugfs_create_file_unsafe("crc_win_x_end", 0644, dir, crtc,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3901

debugfs_create_file_unsafe("crc_win_y_end", 0644, dir, crtc,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3903

debugfs_create_file_unsafe("crc_win_update", 0644, dir, crtc,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3905

debugfs_create_file_unsafe("crc_poly_mode", 0644, dir, crtc,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3909

debugfs_create_file("amdgpu_current_bpc", 0644, crtc->debugfs_entry,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3910

crtc, &amdgpu_current_bpc_fops);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3911

debugfs_create_file("amdgpu_current_colorspace", 0644, crtc->debugfs_entry,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3912

crtc, &amdgpu_current_colorspace_fops);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.h

35

void crtc_debugfs_init(struct drm_crtc *crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1410

if (!new_conn_state->crtc)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1413

new_crtc_state = drm_atomic_get_new_crtc_state(state, new_conn_state->crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1609

struct drm_crtc *crtc;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1612

for_each_oldnew_crtc_in_state(state, crtc, old_state, new_state, i) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1639

struct drm_crtc *crtc;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1643

for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1646

if (!amdgpu_dm_find_first_crtc_matching_connector(state, crtc)) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

505

struct amdgpu_crtc *acrtc = to_amdgpu_crtc(connector_state->crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1102

if (fb && state->crtc) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1132

amdgpu_dm_plane_get_min_max_dc_plane_scaling(state->crtc->dev, fb,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1251

new_plane_state->crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1292

new_crtc_state = drm_atomic_get_new_crtc_state(state, new_plane_state->crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1301

int amdgpu_dm_plane_get_cursor_position(struct drm_plane *plane, struct drm_crtc *crtc,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1304

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1309

if (!crtc || !plane->state->fb)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1353

struct drm_crtc *crtc = afb ? plane->state->crtc : old_plane_state->crtc;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1354

struct dm_crtc_state *crtc_state = crtc ? to_dm_crtc_state(crtc->state) : NULL;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1355

struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1368

ret = amdgpu_dm_plane_get_cursor_position(plane, crtc, &position);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.h

32

int amdgpu_dm_plane_get_cursor_position(struct drm_plane *plane, struct drm_crtc *crtc,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

132

__entry->crtc_id = state->crtc ? state->crtc->base.id : 0;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

190

__entry->crtc_id = state->crtc->base.id;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

262

__entry->crtc_id = state->crtc ? state->crtc->base.id : 0;

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

48

#define CRTC_REG(reg) (reg + tg110->offsets.crtc)

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h

89

int32_t crtc;

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

1030

dm_write_reg_soc15(ctx, mmCRTC0_CRTC_TEST_PATTERN_COLOR, tg110->offsets.crtc, 0);

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

1033

dm_write_reg_soc15(ctx, mmCRTC0_CRTC_TEST_PATTERN_CONTROL, tg110->offsets.crtc, 0);

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

1045

dm_write_reg_soc15(ctx, mmCRTC0_CRTC_TEST_PATTERN_CONTROL, tg110->offsets.crtc, value);

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

1046

dm_write_reg_soc15(ctx, mmCRTC0_CRTC_TEST_PATTERN_COLOR, tg110->offsets.crtc, value);

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

1047

dm_write_reg_soc15(ctx, mmCRTC0_CRTC_TEST_PATTERN_PARAMETERS, tg110->offsets.crtc, value);

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

1087

tg110->offsets.crtc);

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

1106

tg110->offsets.crtc, 0);

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

1181

tg110->offsets.crtc);

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

1191

tg110->offsets.crtc);

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

1196

tg110->offsets.crtc);

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

1201

tg110->offsets.crtc);

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

1206

tg110->offsets.crtc);

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

176

tg110->offsets.crtc);

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

192

tg110->offsets.crtc);

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

203

tg110->offsets.crtc);

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

253

tg110->offsets.crtc);

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

261

dm_write_reg_soc15(tg->ctx, mmCRTC0_CRTC_GSL_WINDOW, tg110->offsets.crtc, 0);

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

315

tg110->offsets.crtc);

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

377

tg110->offsets.crtc);

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

43

generic_reg_update_soc15(tg110->base.ctx, tg110->offsets.crtc, reg_name, n, __VA_ARGS__)

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

46

generic_reg_set_soc15(tg110->base.ctx, tg110->offsets.crtc, reg_name, n, __VA_ARGS__)

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

516

tg110->offsets.crtc);

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

521

tg110->offsets.crtc,

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

531

tg110->offsets.crtc,

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

605

tg110->offsets.crtc);

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

633

tg110->offsets.crtc);

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

655

tg110->offsets.crtc,

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

674

tg110->offsets.crtc);

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

678

tg110->offsets.crtc,

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

716

tg110->offsets.crtc);

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

744

tg110->offsets.crtc, 0);

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

904

dm_write_reg_soc15(ctx, mmCRTC0_CRTC_TEST_PATTERN_PARAMETERS, tg110->offsets.crtc, 0);

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

93

tg110->offsets.crtc);

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

943

dm_write_reg_soc15(ctx, mmCRTC0_CRTC_TEST_PATTERN_COLOR, tg110->offsets.crtc, value);

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

956

dm_write_reg_soc15(ctx, mmCRTC0_CRTC_TEST_PATTERN_COLOR, tg110->offsets.crtc, value);

drivers/gpu/drm/amd/display/dc/dce60/dce60_timing_generator.c

53

.crtc = (mmCRTC0_DCFE_MEM_LIGHT_SLEEP_CNTL - mmCRTC0_DCFE_MEM_LIGHT_SLEEP_CNTL),

drivers/gpu/drm/amd/display/dc/dce60/dce60_timing_generator.c

57

.crtc = (mmCRTC1_DCFE_MEM_LIGHT_SLEEP_CNTL - mmCRTC0_DCFE_MEM_LIGHT_SLEEP_CNTL),

drivers/gpu/drm/amd/display/dc/dce60/dce60_timing_generator.c

61

.crtc = (mmCRTC2_DCFE_MEM_LIGHT_SLEEP_CNTL - mmCRTC0_DCFE_MEM_LIGHT_SLEEP_CNTL),

drivers/gpu/drm/amd/display/dc/dce60/dce60_timing_generator.c

65

.crtc = (mmCRTC3_DCFE_MEM_LIGHT_SLEEP_CNTL - mmCRTC0_DCFE_MEM_LIGHT_SLEEP_CNTL),

drivers/gpu/drm/amd/display/dc/dce60/dce60_timing_generator.c

69

.crtc = (mmCRTC4_DCFE_MEM_LIGHT_SLEEP_CNTL - mmCRTC0_DCFE_MEM_LIGHT_SLEEP_CNTL),

drivers/gpu/drm/amd/display/dc/dce60/dce60_timing_generator.c

73

.crtc = (mmCRTC5_DCFE_MEM_LIGHT_SLEEP_CNTL - mmCRTC0_DCFE_MEM_LIGHT_SLEEP_CNTL),

drivers/gpu/drm/amd/display/dc/dce60/dce60_timing_generator.c

83

#define CRTC_REG(reg) (reg + tg110->offsets.crtc)

drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c

53

.crtc = (mmCRTC0_DCFE_MEM_LIGHT_SLEEP_CNTL - mmCRTC0_DCFE_MEM_LIGHT_SLEEP_CNTL),

drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c

57

.crtc = (mmCRTC1_DCFE_MEM_LIGHT_SLEEP_CNTL - mmCRTC0_DCFE_MEM_LIGHT_SLEEP_CNTL),

drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c

61

.crtc = (mmCRTC2_DCFE_MEM_LIGHT_SLEEP_CNTL - mmCRTC0_DCFE_MEM_LIGHT_SLEEP_CNTL),

drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c

65

.crtc = (mmCRTC3_DCFE_MEM_LIGHT_SLEEP_CNTL - mmCRTC0_DCFE_MEM_LIGHT_SLEEP_CNTL),

drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c

69

.crtc = (mmCRTC4_DCFE_MEM_LIGHT_SLEEP_CNTL - mmCRTC0_DCFE_MEM_LIGHT_SLEEP_CNTL),

drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c

73

.crtc = (mmCRTC5_DCFE_MEM_LIGHT_SLEEP_CNTL - mmCRTC0_DCFE_MEM_LIGHT_SLEEP_CNTL),

drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c

83

#define CRTC_REG(reg) (reg + tg110->offsets.crtc)

drivers/gpu/drm/amd/display/dc/hwss/dce100/dce100_hwseq.c

40

uint32_t crtc;

drivers/gpu/drm/amd/display/dc/hwss/dce100/dce100_hwseq.c

45

.crtc = (mmCRTC0_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),

drivers/gpu/drm/amd/display/dc/hwss/dce100/dce100_hwseq.c

48

.crtc = (mmCRTC1_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),

drivers/gpu/drm/amd/display/dc/hwss/dce100/dce100_hwseq.c

51

.crtc = (mmCRTC2_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),

drivers/gpu/drm/amd/display/dc/hwss/dce100/dce100_hwseq.c

54

.crtc = (mmCRTC3_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),

drivers/gpu/drm/amd/display/dc/hwss/dce100/dce100_hwseq.c

57

.crtc = (mmCRTC4_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),

drivers/gpu/drm/amd/display/dc/hwss/dce100/dce100_hwseq.c

60

.crtc = (mmCRTC5_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),

drivers/gpu/drm/amd/display/dc/hwss/dce100/dce100_hwseq.c

65

(reg + reg_offsets[id].crtc)

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

101

uint32_t crtc;

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

106

.crtc = (mmCRTC0_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

109

.crtc = (mmCRTC1_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

112

.crtc = (mmCRTC2_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

115

.crtc = (mmCRTCV_GSL_CONTROL - mmCRTC_GSL_CONTROL),

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

123

(reg + reg_offsets[id].crtc)

drivers/gpu/drm/amd/display/dc/hwss/dce112/dce112_hwseq.c

38

uint32_t crtc;

drivers/gpu/drm/amd/display/dc/hwss/dce112/dce112_hwseq.c

44

.crtc = (mmCRTC0_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),

drivers/gpu/drm/amd/display/dc/hwss/dce112/dce112_hwseq.c

47

.crtc = (mmCRTC1_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),

drivers/gpu/drm/amd/display/dc/hwss/dce112/dce112_hwseq.c

50

.crtc = (mmCRTC2_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),

drivers/gpu/drm/amd/display/dc/hwss/dce112/dce112_hwseq.c

53

.crtc = (mmCRTC3_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),

drivers/gpu/drm/amd/display/dc/hwss/dce112/dce112_hwseq.c

56

.crtc = (mmCRTC4_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),

drivers/gpu/drm/amd/display/dc/hwss/dce112/dce112_hwseq.c

59

.crtc = (mmCRTC5_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),

drivers/gpu/drm/amd/display/dc/hwss/dce112/dce112_hwseq.c

63

(reg + reg_offsets[id].crtc)

drivers/gpu/drm/amd/display/dc/hwss/dce120/dce120_hwseq.c

51

uint32_t crtc;

drivers/gpu/drm/amd/display/dc/hwss/dce120/dce120_hwseq.c

57

.crtc = (mmCRTC0_CRTC_GSL_CONTROL - mmCRTC0_CRTC_GSL_CONTROL),

drivers/gpu/drm/amd/display/dc/hwss/dce120/dce120_hwseq.c

60

.crtc = (mmCRTC1_CRTC_GSL_CONTROL - mmCRTC0_CRTC_GSL_CONTROL),

drivers/gpu/drm/amd/display/dc/hwss/dce120/dce120_hwseq.c

63

.crtc = (mmCRTC2_CRTC_GSL_CONTROL - mmCRTC0_CRTC_GSL_CONTROL),

drivers/gpu/drm/amd/display/dc/hwss/dce120/dce120_hwseq.c

66

.crtc = (mmCRTC3_CRTC_GSL_CONTROL - mmCRTC0_CRTC_GSL_CONTROL),

drivers/gpu/drm/amd/display/dc/hwss/dce120/dce120_hwseq.c

69

.crtc = (mmCRTC4_CRTC_GSL_CONTROL - mmCRTC0_CRTC_GSL_CONTROL),

drivers/gpu/drm/amd/display/dc/hwss/dce120/dce120_hwseq.c

72

.crtc = (mmCRTC5_CRTC_GSL_CONTROL - mmCRTC0_CRTC_GSL_CONTROL),

drivers/gpu/drm/amd/display/dc/hwss/dce120/dce120_hwseq.c

77

(reg + reg_offsets[id].crtc)

drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c

111

.crtc = (mmCRTC0_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c

115

.crtc = (mmCRTC1_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c

119

.crtc = (mmCRTC2_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c

123

.crtc = (mmCRTC3_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c

127

.crtc = (mmCRTC4_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c

131

.crtc = (mmCRTC5_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c

119

.crtc = (mmCRTC0_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c

123

.crtc = (mmCRTC1_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c

127

.crtc = (mmCRTC2_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c

131

.crtc = (mmCRTC3_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c

135

.crtc = (mmCRTC4_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c

139

.crtc = (mmCRTC5_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c

120

.crtc = (mmCRTC0_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c

124

.crtc = (mmCRTC1_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c

128

.crtc = (mmCRTC2_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c

132

.crtc = (mmCRTC3_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c

136

.crtc = (mmCRTC4_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c

140

.crtc = (mmCRTC5_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c

102

.crtc = (mmCRTC0_CRTC_CONTROL - mmCRTC0_CRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c

105

.crtc = (mmCRTC1_CRTC_CONTROL - mmCRTC0_CRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c

108

.crtc = (mmCRTC2_CRTC_CONTROL - mmCRTC0_CRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c

111

.crtc = (mmCRTC3_CRTC_CONTROL - mmCRTC0_CRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c

114

.crtc = (mmCRTC4_CRTC_CONTROL - mmCRTC0_CRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c

117

.crtc = (mmCRTC5_CRTC_CONTROL - mmCRTC0_CRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c

116

.crtc = (mmCRTC0_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c

122

.crtc = (mmCRTC1_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c

128

.crtc = (mmCRTC2_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c

134

.crtc = (mmCRTC3_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c

140

.crtc = (mmCRTC4_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c

146

.crtc = (mmCRTC5_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c

115

.crtc = (mmCRTC0_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c

121

.crtc = (mmCRTC1_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c

127

.crtc = (mmCRTC2_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c

133

.crtc = (mmCRTC3_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c

139

.crtc = (mmCRTC4_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c

145

.crtc = (mmCRTC5_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/pm/amdgpu_dpm_internal.c

35

struct drm_crtc *crtc;

drivers/gpu/drm/amd/pm/amdgpu_dpm_internal.c

45

list_for_each_entry(crtc, &ddev->mode_config.crtc_list, head) {

drivers/gpu/drm/amd/pm/amdgpu_dpm_internal.c

46

amdgpu_crtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/arm/display/komeda/d71/d71_component.c

1049

struct drm_crtc_state *crtc_st = state->crtc->state;

drivers/gpu/drm/arm/display/komeda/d71/d71_component.c

1169

struct drm_crtc_state *crtc_st = state->crtc->state;

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

206

struct drm_crtc *crtc = &kcrtc->base;

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

210

drm_crtc_handle_vblank(crtc);

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

229

spin_lock_irqsave(&crtc->dev->event_lock, flags);

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

233

} else if (crtc->state->event) {

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

234

event = crtc->state->event;

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

239

crtc->state->event = NULL;

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

240

drm_crtc_send_vblank_event(crtc, event);

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

245

spin_unlock_irqrestore(&crtc->dev->event_lock, flags);

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

250

komeda_crtc_do_flush(struct drm_crtc *crtc,

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

253

struct komeda_crtc *kcrtc = to_kcrtc(crtc);

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

254

struct komeda_crtc_state *kcrtc_st = to_kcrtc_st(crtc->state);

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

262

drm_crtc_index(crtc),

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

281

komeda_crtc_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

285

crtc);

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

286

pm_runtime_get_sync(crtc->dev->dev);

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

287

komeda_crtc_prepare(to_kcrtc(crtc));

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

288

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

289

WARN_ON(drm_crtc_vblank_get(crtc));

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

290

komeda_crtc_do_flush(crtc, old);

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

31

if (conn_st->crtc != crtc_st->crtc)

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

327

komeda_crtc_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

331

crtc);

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

332

struct komeda_crtc *kcrtc = to_kcrtc(crtc);

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

340

drm_crtc_index(crtc),

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

366

disable_done = (needs_phase2 || crtc->state->active) ?

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

367

NULL : &crtc->state->commit->flip_done;

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

376

disable_done = crtc->state->active ?

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

377

NULL : &crtc->state->commit->flip_done;

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

382

drm_crtc_vblank_put(crtc);

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

383

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

385

pm_runtime_put(crtc->dev->dev);

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

389

komeda_crtc_atomic_flush(struct drm_crtc *crtc,

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

393

crtc);

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

395

crtc);

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

400

komeda_crtc_do_flush(crtc, old);

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

420

struct drm_crtc *crtc = kcrtc_st->base.crtc;

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

421

struct komeda_dev *mdev = crtc->dev->dev_private;

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

425

min_aclk = komeda_calc_min_aclk_rate(to_kcrtc(crtc), pxlclk);

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

431

komeda_crtc_mode_valid(struct drm_crtc *crtc, const struct drm_display_mode *m)

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

433

struct komeda_dev *mdev = crtc->dev->dev_private;

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

434

struct komeda_crtc *kcrtc = to_kcrtc(crtc);

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

451

min_aclk = komeda_calc_min_aclk_rate(to_kcrtc(crtc), min_pxlclk);

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

462

static bool komeda_crtc_mode_fixup(struct drm_crtc *crtc,

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

466

struct komeda_crtc *kcrtc = to_kcrtc(crtc);

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

496

static void komeda_crtc_reset(struct drm_crtc *crtc)

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

500

if (crtc->state)

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

501

__drm_atomic_helper_crtc_destroy_state(crtc->state);

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

503

kfree(to_kcrtc_st(crtc->state));

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

504

crtc->state = NULL;

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

508

__drm_atomic_helper_crtc_reset(crtc, &state->base);

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

512

komeda_crtc_atomic_duplicate_state(struct drm_crtc *crtc)

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

514

struct komeda_crtc_state *old = to_kcrtc_st(crtc->state);

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

521

__drm_atomic_helper_crtc_duplicate_state(crtc, &new->base);

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

530

static void komeda_crtc_atomic_destroy_state(struct drm_crtc *crtc,

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

537

static int komeda_crtc_vblank_enable(struct drm_crtc *crtc)

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

539

struct komeda_dev *mdev = crtc->dev->dev_private;

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

540

struct komeda_crtc *kcrtc = to_kcrtc(crtc);

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

546

static void komeda_crtc_vblank_disable(struct drm_crtc *crtc)

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

548

struct komeda_dev *mdev = crtc->dev->dev_private;

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

549

struct komeda_crtc *kcrtc = to_kcrtc(crtc);

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

569

struct komeda_crtc *crtc;

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

577

crtc = &kms->crtcs[kms->n_crtcs];

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

580

crtc->master = master;

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

581

crtc->slave = komeda_pipeline_get_slave(master);

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

583

if (crtc->slave)

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

584

sprintf(str, "pipe-%d", crtc->slave->id);

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

598

get_crtc_primary(struct komeda_kms_dev *kms, struct komeda_crtc *crtc)

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

609

if (kplane->layer->base.pipeline == crtc->master)

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

641

struct drm_crtc *crtc = &kcrtc->base;

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

647

err = drm_crtc_init_with_planes(base, crtc,

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

653

drm_crtc_helper_add(crtc, &komeda_crtc_helper_funcs);

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

655

crtc->port = pipe->of_output_port;

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

660

kcrtc->encoder.possible_crtcs = drm_crtc_mask(crtc);

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

671

drm_crtc_enable_color_mgmt(crtc, 0, true, KOMEDA_COLOR_LUT_SIZE);

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

77

komeda_crtc_atomic_check(struct drm_crtc *crtc,

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

81

crtc);

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

82

struct komeda_crtc *kcrtc = to_kcrtc(crtc);

drivers/gpu/drm/arm/display/komeda/komeda_kms.c

153

static int komeda_crtc_normalize_zpos(struct drm_crtc *crtc,

drivers/gpu/drm/arm/display/komeda/komeda_kms.c

157

struct komeda_crtc *kcrtc = to_kcrtc(crtc);

drivers/gpu/drm/arm/display/komeda/komeda_kms.c

167

crtc->base.id, crtc->name);

drivers/gpu/drm/arm/display/komeda/komeda_kms.c

172

drm_for_each_plane_mask(plane, crtc->dev, crtc_st->plane_mask) {

drivers/gpu/drm/arm/display/komeda/komeda_kms.c

221

struct drm_crtc *crtc;

drivers/gpu/drm/arm/display/komeda/komeda_kms.c

233

for_each_new_crtc_in_state(state, crtc, new_crtc_st, i) {

drivers/gpu/drm/arm/display/komeda/komeda_kms.c

234

err = drm_atomic_add_affected_planes(state, crtc);

drivers/gpu/drm/arm/display/komeda/komeda_kms.c

238

err = komeda_crtc_normalize_zpos(crtc, new_crtc_st);

drivers/gpu/drm/arm/display/komeda/komeda_kms.h

141

struct komeda_wb_connector *wb_conn = to_kcrtc(st->crtc)->wb_conn;

drivers/gpu/drm/arm/display/komeda/komeda_kms.h

153

old_st = drm_atomic_get_old_crtc_state(st->state, st->crtc);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h

172

struct drm_crtc *crtc;

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h

456

struct drm_crtc *crtc;

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

1245

drm_st, NULL, new->crtc);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

154

struct drm_crtc *crtc)

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

161

state, crtc);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

354

plane_st->state, plane_st->plane, plane_st->crtc);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

413

conn_st->state, conn_st->connector, conn_st->crtc);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

529

drm_st, user, kcrtc_st->base.crtc);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

590

conn_st->state, conn_st->connector, conn_st->crtc);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

64

struct drm_crtc *crtc)

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

640

kcrtc_st->base.state, kcrtc_st->base.crtc, kcrtc_st->base.crtc);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

690

kcrtc_st->base.crtc, kcrtc_st->base.crtc);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

72

if (is_switching_user(crtc, st->crtc)) {

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

728

state->base.state, state->base.crtc, state->base.crtc);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

74

drm_crtc_index(crtc), pipe->id);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

762

struct drm_crtc *crtc = kcrtc_st->base.crtc;

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

768

kcrtc_st->base.state, crtc, crtc);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

79

if (!crtc && st->active_comps) {

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

822

struct drm_crtc *crtc = kcrtc_st->base.crtc;

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

827

kcrtc_st->base.state, crtc, crtc);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

84

st->crtc = crtc;

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

86

if (crtc) {

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

90

crtc));

drivers/gpu/drm/arm/display/komeda/komeda_plane.c

201

struct komeda_crtc *crtc;

drivers/gpu/drm/arm/display/komeda/komeda_plane.c

206

crtc = &kms->crtcs[i];

drivers/gpu/drm/arm/display/komeda/komeda_plane.c

208

if ((pipe == crtc->master) || (pipe == crtc->slave))

drivers/gpu/drm/arm/display/komeda/komeda_plane.c

28

if (pipe == to_kcrtc(st->crtc)->master)

drivers/gpu/drm/arm/display/komeda/komeda_plane.c

84

if (!new_plane_state->crtc || !new_plane_state->fb)

drivers/gpu/drm/arm/display/komeda/komeda_plane.c

88

new_plane_state->crtc);

drivers/gpu/drm/arm/hdlcd_crtc.c

135

static void hdlcd_crtc_mode_set_nofb(struct drm_crtc *crtc)

drivers/gpu/drm/arm/hdlcd_crtc.c

137

struct hdlcd_drm_private *hdlcd = crtc_to_hdlcd_priv(crtc);

drivers/gpu/drm/arm/hdlcd_crtc.c

138

struct drm_display_mode *m = &crtc->state->adjusted_mode;

drivers/gpu/drm/arm/hdlcd_crtc.c

170

err = hdlcd_set_pxl_fmt(crtc);

drivers/gpu/drm/arm/hdlcd_crtc.c

177

static void hdlcd_crtc_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/arm/hdlcd_crtc.c

180

struct hdlcd_drm_private *hdlcd = crtc_to_hdlcd_priv(crtc);

drivers/gpu/drm/arm/hdlcd_crtc.c

183

hdlcd_crtc_mode_set_nofb(crtc);

drivers/gpu/drm/arm/hdlcd_crtc.c

185

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/arm/hdlcd_crtc.c

188

static void hdlcd_crtc_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/arm/hdlcd_crtc.c

191

struct hdlcd_drm_private *hdlcd = crtc_to_hdlcd_priv(crtc);

drivers/gpu/drm/arm/hdlcd_crtc.c

193

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/arm/hdlcd_crtc.c

198

static enum drm_mode_status hdlcd_crtc_mode_valid(struct drm_crtc *crtc,

drivers/gpu/drm/arm/hdlcd_crtc.c

201

struct hdlcd_drm_private *hdlcd = crtc_to_hdlcd_priv(crtc);

drivers/gpu/drm/arm/hdlcd_crtc.c

214

static void hdlcd_crtc_atomic_begin(struct drm_crtc *crtc,

drivers/gpu/drm/arm/hdlcd_crtc.c

217

struct drm_pending_vblank_event *event = crtc->state->event;

drivers/gpu/drm/arm/hdlcd_crtc.c

220

crtc->state->event = NULL;

drivers/gpu/drm/arm/hdlcd_crtc.c

222

spin_lock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/arm/hdlcd_crtc.c

223

if (drm_crtc_vblank_get(crtc) == 0)

drivers/gpu/drm/arm/hdlcd_crtc.c

224

drm_crtc_arm_vblank_event(crtc, event);

drivers/gpu/drm/arm/hdlcd_crtc.c

226

drm_crtc_send_vblank_event(crtc, event);

drivers/gpu/drm/arm/hdlcd_crtc.c

227

spin_unlock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/arm/hdlcd_crtc.c

244

struct drm_crtc *crtc;

drivers/gpu/drm/arm/hdlcd_crtc.c

254

for_each_new_crtc_in_state(state, crtc, crtc_state,

drivers/gpu/drm/arm/hdlcd_crtc.c

337

ret = drm_crtc_init_with_planes(drm, &hdlcd->crtc, primary, NULL,

drivers/gpu/drm/arm/hdlcd_crtc.c

342

drm_crtc_helper_add(&hdlcd->crtc, &hdlcd_crtc_helper_funcs);

drivers/gpu/drm/arm/hdlcd_crtc.c

39

static void hdlcd_crtc_cleanup(struct drm_crtc *crtc)

drivers/gpu/drm/arm/hdlcd_crtc.c

41

struct hdlcd_drm_private *hdlcd = crtc_to_hdlcd_priv(crtc);

drivers/gpu/drm/arm/hdlcd_crtc.c

45

drm_crtc_cleanup(crtc);

drivers/gpu/drm/arm/hdlcd_crtc.c

48

static int hdlcd_crtc_enable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/arm/hdlcd_crtc.c

50

struct hdlcd_drm_private *hdlcd = crtc_to_hdlcd_priv(crtc);

drivers/gpu/drm/arm/hdlcd_crtc.c

58

static void hdlcd_crtc_disable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/arm/hdlcd_crtc.c

60

struct hdlcd_drm_private *hdlcd = crtc_to_hdlcd_priv(crtc);

drivers/gpu/drm/arm/hdlcd_crtc.c

92

static int hdlcd_set_pxl_fmt(struct drm_crtc *crtc)

drivers/gpu/drm/arm/hdlcd_crtc.c

95

struct hdlcd_drm_private *hdlcd = crtc_to_hdlcd_priv(crtc);

drivers/gpu/drm/arm/hdlcd_crtc.c

96

const struct drm_framebuffer *fb = crtc->primary->state->fb;

drivers/gpu/drm/arm/hdlcd_drv.c

165

drm_crtc_cleanup(&hdlcd->crtc);

drivers/gpu/drm/arm/hdlcd_drv.c

215

unsigned long mode_clock = hdlcd->crtc.mode.crtc_clock * 1000;

drivers/gpu/drm/arm/hdlcd_drv.c

264

hdlcd->crtc.port = of_graph_get_port_by_id(dev->of_node, 0);

drivers/gpu/drm/arm/hdlcd_drv.c

316

of_node_put(hdlcd->crtc.port);

drivers/gpu/drm/arm/hdlcd_drv.c

317

hdlcd->crtc.port = NULL;

drivers/gpu/drm/arm/hdlcd_drv.c

333

of_node_put(hdlcd->crtc.port);

drivers/gpu/drm/arm/hdlcd_drv.c

334

hdlcd->crtc.port = NULL;

drivers/gpu/drm/arm/hdlcd_drv.c

65

drm_crtc_handle_vblank(&hdlcd->crtc);

drivers/gpu/drm/arm/hdlcd_drv.h

13

struct drm_crtc crtc;

drivers/gpu/drm/arm/hdlcd_drv.h

25

#define crtc_to_hdlcd_priv(x) container_of(x, struct hdlcd_drm_private, crtc)

drivers/gpu/drm/arm/malidp_crtc.c

147

static int malidp_crtc_atomic_check_gamma(struct drm_crtc *crtc,

drivers/gpu/drm/arm/malidp_crtc.c

158

if (crtc->state->gamma_lut &&

drivers/gpu/drm/arm/malidp_crtc.c

159

(crtc->state->gamma_lut->base.id == state->gamma_lut->base.id))

drivers/gpu/drm/arm/malidp_crtc.c

185

ret = drm_atomic_helper_check_modeset(crtc->dev, state->state);

drivers/gpu/drm/arm/malidp_crtc.c

201

static int malidp_crtc_atomic_check_ctm(struct drm_crtc *crtc,

drivers/gpu/drm/arm/malidp_crtc.c

214

if (crtc->state->ctm && (crtc->state->ctm->base.id ==

drivers/gpu/drm/arm/malidp_crtc.c

246

static int malidp_crtc_atomic_check_scaling(struct drm_crtc *crtc,

drivers/gpu/drm/arm/malidp_crtc.c

249

struct malidp_drm *malidp = crtc_to_malidp_device(crtc);

drivers/gpu/drm/arm/malidp_crtc.c

25

static enum drm_mode_status malidp_crtc_mode_valid(struct drm_crtc *crtc,

drivers/gpu/drm/arm/malidp_crtc.c

28

struct malidp_drm *malidp = crtc_to_malidp_device(crtc);

drivers/gpu/drm/arm/malidp_crtc.c

336

static int malidp_crtc_atomic_check(struct drm_crtc *crtc,

drivers/gpu/drm/arm/malidp_crtc.c

340

crtc);

drivers/gpu/drm/arm/malidp_crtc.c

341

struct malidp_drm *malidp = crtc_to_malidp_device(crtc);

drivers/gpu/drm/arm/malidp_crtc.c

420

u32 old_mask = crtc->state->connector_mask;

drivers/gpu/drm/arm/malidp_crtc.c

428

ret = malidp_crtc_atomic_check_gamma(crtc, crtc_state);

drivers/gpu/drm/arm/malidp_crtc.c

429

ret = ret ? ret : malidp_crtc_atomic_check_ctm(crtc, crtc_state);

drivers/gpu/drm/arm/malidp_crtc.c

430

ret = ret ? ret : malidp_crtc_atomic_check_scaling(crtc, crtc_state);

drivers/gpu/drm/arm/malidp_crtc.c

442

static struct drm_crtc_state *malidp_crtc_duplicate_state(struct drm_crtc *crtc)

drivers/gpu/drm/arm/malidp_crtc.c

446

if (WARN_ON(!crtc->state))

drivers/gpu/drm/arm/malidp_crtc.c

449

old_state = to_malidp_crtc_state(crtc->state);

drivers/gpu/drm/arm/malidp_crtc.c

454

__drm_atomic_helper_crtc_duplicate_state(crtc, &state->base);

drivers/gpu/drm/arm/malidp_crtc.c

466

static void malidp_crtc_destroy_state(struct drm_crtc *crtc,

drivers/gpu/drm/arm/malidp_crtc.c

479

static void malidp_crtc_reset(struct drm_crtc *crtc)

drivers/gpu/drm/arm/malidp_crtc.c

483

if (crtc->state)

drivers/gpu/drm/arm/malidp_crtc.c

484

malidp_crtc_destroy_state(crtc, crtc->state);

drivers/gpu/drm/arm/malidp_crtc.c

487

__drm_atomic_helper_crtc_reset(crtc, &state->base);

drivers/gpu/drm/arm/malidp_crtc.c

489

__drm_atomic_helper_crtc_reset(crtc, NULL);

drivers/gpu/drm/arm/malidp_crtc.c

49

static void malidp_crtc_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/arm/malidp_crtc.c

492

static int malidp_crtc_enable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/arm/malidp_crtc.c

494

struct malidp_drm *malidp = crtc_to_malidp_device(crtc);

drivers/gpu/drm/arm/malidp_crtc.c

502

static void malidp_crtc_disable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/arm/malidp_crtc.c

504

struct malidp_drm *malidp = crtc_to_malidp_device(crtc);

drivers/gpu/drm/arm/malidp_crtc.c

52

struct malidp_drm *malidp = crtc_to_malidp_device(crtc);

drivers/gpu/drm/arm/malidp_crtc.c

545

ret = drmm_crtc_init_with_planes(drm, &malidp->crtc, primary, NULL,

drivers/gpu/drm/arm/malidp_crtc.c

55

int err = pm_runtime_get_sync(crtc->dev->dev);

drivers/gpu/drm/arm/malidp_crtc.c

550

drm_crtc_helper_add(&malidp->crtc, &malidp_crtc_helper_funcs);

drivers/gpu/drm/arm/malidp_crtc.c

551

drm_mode_crtc_set_gamma_size(&malidp->crtc, MALIDP_GAMMA_LUT_SIZE);

drivers/gpu/drm/arm/malidp_crtc.c

553

drm_crtc_enable_color_mgmt(&malidp->crtc, 0, true, MALIDP_GAMMA_LUT_SIZE);

drivers/gpu/drm/arm/malidp_crtc.c

62

drm_display_mode_to_videomode(&crtc->state->adjusted_mode, &vm);

drivers/gpu/drm/arm/malidp_crtc.c

66

clk_set_rate(hwdev->pxlclk, crtc->state->adjusted_mode.crtc_clock * 1000);

drivers/gpu/drm/arm/malidp_crtc.c

70

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/arm/malidp_crtc.c

73

static void malidp_crtc_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/arm/malidp_crtc.c

77

crtc);

drivers/gpu/drm/arm/malidp_crtc.c

78

struct malidp_drm *malidp = crtc_to_malidp_device(crtc);

drivers/gpu/drm/arm/malidp_crtc.c

84

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/arm/malidp_crtc.c

89

pm_runtime_put(crtc->dev->dev);

drivers/gpu/drm/arm/malidp_drv.c

101

if (!crtc->state->ctm) {

drivers/gpu/drm/arm/malidp_drv.c

106

to_malidp_crtc_state(crtc->state);

drivers/gpu/drm/arm/malidp_drv.c

108

if (!old_state->ctm || (crtc->state->ctm->base.id !=

drivers/gpu/drm/arm/malidp_drv.c

121

static void malidp_atomic_commit_se_config(struct drm_crtc *crtc,

drivers/gpu/drm/arm/malidp_drv.c

124

struct malidp_crtc_state *cs = to_malidp_crtc_state(crtc->state);

drivers/gpu/drm/arm/malidp_drv.c

126

struct malidp_drm *malidp = crtc_to_malidp_device(crtc);

drivers/gpu/drm/arm/malidp_drv.c

199

malidp->event = malidp->crtc.state->event;

drivers/gpu/drm/arm/malidp_drv.c

200

malidp->crtc.state->event = NULL;

drivers/gpu/drm/arm/malidp_drv.c

202

if (malidp->crtc.state->active) {

drivers/gpu/drm/arm/malidp_drv.c

209

drm_crtc_vblank_get(&malidp->crtc);

drivers/gpu/drm/arm/malidp_drv.c

227

drm_crtc_send_vblank_event(&malidp->crtc, malidp->event);

drivers/gpu/drm/arm/malidp_drv.c

238

struct drm_crtc *crtc;

drivers/gpu/drm/arm/malidp_drv.c

254

for_each_old_crtc_in_state(state, crtc, old_crtc_state, i) {

drivers/gpu/drm/arm/malidp_drv.c

255

malidp_atomic_commit_update_gamma(crtc, old_crtc_state);

drivers/gpu/drm/arm/malidp_drv.c

256

malidp_atomic_commit_update_coloradj(crtc, old_crtc_state);

drivers/gpu/drm/arm/malidp_drv.c

257

malidp_atomic_commit_se_config(crtc, old_crtc_state);

drivers/gpu/drm/arm/malidp_drv.c

64

static void malidp_atomic_commit_update_gamma(struct drm_crtc *crtc,

drivers/gpu/drm/arm/malidp_drv.c

67

struct malidp_drm *malidp = crtc_to_malidp_device(crtc);

drivers/gpu/drm/arm/malidp_drv.c

70

if (!crtc->state->color_mgmt_changed)

drivers/gpu/drm/arm/malidp_drv.c

73

if (!crtc->state->gamma_lut) {

drivers/gpu/drm/arm/malidp_drv.c

79

to_malidp_crtc_state(crtc->state);

drivers/gpu/drm/arm/malidp_drv.c

81

if (!old_state->gamma_lut || (crtc->state->gamma_lut->base.id !=

drivers/gpu/drm/arm/malidp_drv.c

821

malidp->crtc.port = of_graph_get_port_by_id(dev->of_node, 0);

drivers/gpu/drm/arm/malidp_drv.c

871

of_node_put(malidp->crtc.port);

drivers/gpu/drm/arm/malidp_drv.c

872

malidp->crtc.port = NULL;

drivers/gpu/drm/arm/malidp_drv.c

898

of_node_put(malidp->crtc.port);

drivers/gpu/drm/arm/malidp_drv.c

899

malidp->crtc.port = NULL;

drivers/gpu/drm/arm/malidp_drv.c

91

void malidp_atomic_commit_update_coloradj(struct drm_crtc *crtc,

drivers/gpu/drm/arm/malidp_drv.c

94

struct malidp_drm *malidp = crtc_to_malidp_device(crtc);

drivers/gpu/drm/arm/malidp_drv.c

98

if (!crtc->state->color_mgmt_changed)

drivers/gpu/drm/arm/malidp_drv.h

34

struct drm_crtc crtc;

drivers/gpu/drm/arm/malidp_drv.h

49

#define crtc_to_malidp_device(x) container_of(x, struct malidp_drm, crtc)

drivers/gpu/drm/arm/malidp_hw.c

1197

drm_crtc_send_vblank_event(&malidp->crtc, malidp->event);

drivers/gpu/drm/arm/malidp_hw.c

1212

if ((status & de->vsync_irq) && malidp->crtc.enabled)

drivers/gpu/drm/arm/malidp_hw.c

1213

drm_crtc_handle_vblank(&malidp->crtc);

drivers/gpu/drm/arm/malidp_hw.c

1218

drm_crtc_vblank_count(&malidp->crtc));

drivers/gpu/drm/arm/malidp_hw.c

1310

drm_crtc_vblank_count(&malidp->crtc));

drivers/gpu/drm/arm/malidp_mw.c

231

1 << drm_crtc_index(&malidp->crtc));

drivers/gpu/drm/arm/malidp_planes.c

266

drm_atomic_get_new_crtc_state(state->state, state->crtc);

drivers/gpu/drm/arm/malidp_planes.c

505

if (!new_plane_state->crtc || WARN_ON(!new_plane_state->fb))

drivers/gpu/drm/arm/malidp_planes.c

886

if (new_state->crtc) {

drivers/gpu/drm/arm/malidp_planes.c

888

to_malidp_crtc_state(new_state->crtc->state);

drivers/gpu/drm/armada/armada_crtc.c

1047

armada_drm_crtc_destroy(&dcrtc->crtc);

drivers/gpu/drm/armada/armada_crtc.c

122

static void armada_drm_crtc_queue_state_event(struct drm_crtc *crtc)

drivers/gpu/drm/armada/armada_crtc.c

124

struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);

drivers/gpu/drm/armada/armada_crtc.c

128

event = xchg(&crtc->state->event, NULL);

drivers/gpu/drm/armada/armada_crtc.c

130

WARN_ON(drm_crtc_vblank_get(crtc) != 0);

drivers/gpu/drm/armada/armada_crtc.c

135

static void armada_drm_update_gamma(struct drm_crtc *crtc)

drivers/gpu/drm/armada/armada_crtc.c

137

struct drm_property_blob *blob = crtc->state->gamma_lut;

drivers/gpu/drm/armada/armada_crtc.c

138

void __iomem *base = drm_to_armada_crtc(crtc)->base;

drivers/gpu/drm/armada/armada_crtc.c

173

static enum drm_mode_status armada_drm_crtc_mode_valid(struct drm_crtc *crtc,

drivers/gpu/drm/armada/armada_crtc.c

176

struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);

drivers/gpu/drm/armada/armada_crtc.c

200

static bool armada_drm_crtc_mode_fixup(struct drm_crtc *crtc,

drivers/gpu/drm/armada/armada_crtc.c

203

struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);

drivers/gpu/drm/armada/armada_crtc.c

217

if (armada_drm_crtc_mode_valid(crtc, adj) != MODE_OK)

drivers/gpu/drm/armada/armada_crtc.c

258

drm_crtc_handle_vblank(&dcrtc->crtc);

drivers/gpu/drm/armada/armada_crtc.c

298

spin_lock(&dcrtc->crtc.dev->event_lock);

drivers/gpu/drm/armada/armada_crtc.c

299

drm_crtc_send_vblank_event(&dcrtc->crtc, event);

drivers/gpu/drm/armada/armada_crtc.c

300

spin_unlock(&dcrtc->crtc.dev->event_lock);

drivers/gpu/drm/armada/armada_crtc.c

301

drm_crtc_vblank_put(&dcrtc->crtc);

drivers/gpu/drm/armada/armada_crtc.c

318

trace_armada_drm_irq(&dcrtc->crtc, stat);

drivers/gpu/drm/armada/armada_crtc.c

331

static void armada_drm_crtc_mode_set_nofb(struct drm_crtc *crtc)

drivers/gpu/drm/armada/armada_crtc.c

333

struct drm_display_mode *adj = &crtc->state->adjusted_mode;

drivers/gpu/drm/armada/armada_crtc.c

334

struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);

drivers/gpu/drm/armada/armada_crtc.c

348

crtc->base.id, crtc->name, DRM_MODE_ARG(adj));

drivers/gpu/drm/armada/armada_crtc.c

416

static int armada_drm_crtc_atomic_check(struct drm_crtc *crtc,

drivers/gpu/drm/armada/armada_crtc.c

420

crtc);

drivers/gpu/drm/armada/armada_crtc.c

421

DRM_DEBUG_KMS("[CRTC:%d:%s]\n", crtc->base.id, crtc->name);

drivers/gpu/drm/armada/armada_crtc.c

432

static void armada_drm_crtc_atomic_begin(struct drm_crtc *crtc,

drivers/gpu/drm/armada/armada_crtc.c

436

crtc);

drivers/gpu/drm/armada/armada_crtc.c

437

struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);

drivers/gpu/drm/armada/armada_crtc.c

439

DRM_DEBUG_KMS("[CRTC:%d:%s]\n", crtc->base.id, crtc->name);

drivers/gpu/drm/armada/armada_crtc.c

442

armada_drm_update_gamma(crtc);

drivers/gpu/drm/armada/armada_crtc.c

448

static void armada_drm_crtc_atomic_flush(struct drm_crtc *crtc,

drivers/gpu/drm/armada/armada_crtc.c

452

crtc);

drivers/gpu/drm/armada/armada_crtc.c

453

struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);

drivers/gpu/drm/armada/armada_crtc.c

455

DRM_DEBUG_KMS("[CRTC:%d:%s]\n", crtc->base.id, crtc->name);

drivers/gpu/drm/armada/armada_crtc.c

465

armada_drm_crtc_queue_state_event(crtc);

drivers/gpu/drm/armada/armada_crtc.c

476

static void armada_drm_crtc_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/armada/armada_crtc.c

480

crtc);

drivers/gpu/drm/armada/armada_crtc.c

481

struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);

drivers/gpu/drm/armada/armada_crtc.c

484

DRM_DEBUG_KMS("[CRTC:%d:%s]\n", crtc->base.id, crtc->name);

drivers/gpu/drm/armada/armada_crtc.c

487

drm_crtc_vblank_put(crtc);

drivers/gpu/drm/armada/armada_crtc.c

489

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/armada/armada_crtc.c

492

if (!crtc->state->active) {

drivers/gpu/drm/armada/armada_crtc.c

504

event = crtc->state->event;

drivers/gpu/drm/armada/armada_crtc.c

505

crtc->state->event = NULL;

drivers/gpu/drm/armada/armada_crtc.c

507

spin_lock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/armada/armada_crtc.c

508

drm_crtc_send_vblank_event(crtc, event);

drivers/gpu/drm/armada/armada_crtc.c

509

spin_unlock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/armada/armada_crtc.c

514

static void armada_drm_crtc_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/armada/armada_crtc.c

518

crtc);

drivers/gpu/drm/armada/armada_crtc.c

519

struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);

drivers/gpu/drm/armada/armada_crtc.c

521

DRM_DEBUG_KMS("[CRTC:%d:%s]\n", crtc->base.id, crtc->name);

drivers/gpu/drm/armada/armada_crtc.c

530

dcrtc->variant->enable(dcrtc, &crtc->state->adjusted_mode);

drivers/gpu/drm/armada/armada_crtc.c

533

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/armada/armada_crtc.c

535

if (crtc->state->adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE)

drivers/gpu/drm/armada/armada_crtc.c

536

WARN_ON(drm_crtc_vblank_get(crtc));

drivers/gpu/drm/armada/armada_crtc.c

538

armada_drm_crtc_queue_state_event(crtc);

drivers/gpu/drm/armada/armada_crtc.c

617

} else if (dcrtc->cursor_x + w > dcrtc->crtc.mode.hdisplay) {

drivers/gpu/drm/armada/armada_crtc.c

620

w = max_t(int, dcrtc->crtc.mode.hdisplay - dcrtc->cursor_x, 0);

drivers/gpu/drm/armada/armada_crtc.c

630

} else if (dcrtc->cursor_y + h > dcrtc->crtc.mode.vdisplay) {

drivers/gpu/drm/armada/armada_crtc.c

633

h = max_t(int, dcrtc->crtc.mode.vdisplay - dcrtc->cursor_y, 0);

drivers/gpu/drm/armada/armada_crtc.c

702

static int armada_drm_crtc_cursor_set(struct drm_crtc *crtc,

drivers/gpu/drm/armada/armada_crtc.c

705

struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);

drivers/gpu/drm/armada/armada_crtc.c

752

static int armada_drm_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)

drivers/gpu/drm/armada/armada_crtc.c

754

struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);

drivers/gpu/drm/armada/armada_crtc.c

768

static void armada_drm_crtc_destroy(struct drm_crtc *crtc)

drivers/gpu/drm/armada/armada_crtc.c

770

struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);

drivers/gpu/drm/armada/armada_crtc.c

771

struct armada_private *priv = drm_to_armada_dev(crtc->dev);

drivers/gpu/drm/armada/armada_crtc.c

777

drm_crtc_cleanup(&dcrtc->crtc);

drivers/gpu/drm/armada/armada_crtc.c

784

of_node_put(dcrtc->crtc.port);

drivers/gpu/drm/armada/armada_crtc.c

789

static int armada_drm_crtc_late_register(struct drm_crtc *crtc)

drivers/gpu/drm/armada/armada_crtc.c

792

armada_drm_crtc_debugfs_init(drm_to_armada_crtc(crtc));

drivers/gpu/drm/armada/armada_crtc.c

798

static int armada_drm_crtc_enable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/armada/armada_crtc.c

800

struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);

drivers/gpu/drm/armada/armada_crtc.c

809

static void armada_drm_crtc_disable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/armada/armada_crtc.c

811

struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);

drivers/gpu/drm/armada/armada_crtc.c

849

dcrtc->crtc.base.id, dcrtc->crtc.name, desired_hz);

drivers/gpu/drm/armada/armada_crtc.c

880

dcrtc->crtc.base.id, dcrtc->crtc.name,

drivers/gpu/drm/armada/armada_crtc.c

900

dcrtc->crtc.base.id, dcrtc->crtc.name,

drivers/gpu/drm/armada/armada_crtc.c

971

dcrtc->crtc.port = port;

drivers/gpu/drm/armada/armada_crtc.c

985

ret = drm_crtc_init_with_planes(drm, &dcrtc->crtc, primary, NULL,

drivers/gpu/drm/armada/armada_crtc.c

990

drm_crtc_helper_add(&dcrtc->crtc, &armada_crtc_helper_funcs);

drivers/gpu/drm/armada/armada_crtc.c

992

ret = drm_mode_crtc_set_gamma_size(&dcrtc->crtc, 256);

drivers/gpu/drm/armada/armada_crtc.c

996

drm_crtc_enable_color_mgmt(&dcrtc->crtc, 0, false, 256);

drivers/gpu/drm/armada/armada_crtc.h

37

struct drm_crtc crtc;

drivers/gpu/drm/armada/armada_crtc.h

71

#define drm_to_armada_crtc(c) container_of(c, struct armada_crtc, crtc)

drivers/gpu/drm/armada/armada_debugfs.c

98

debugfs_create_file("armada-regs", 0600, dcrtc->crtc.debugfs_entry,

drivers/gpu/drm/armada/armada_overlay.c

115

new_state->crtc->state->mode_changed) {

drivers/gpu/drm/armada/armada_overlay.c

233

if (!old_state->crtc)

drivers/gpu/drm/armada/armada_overlay.c

238

old_state->crtc->base.id, old_state->crtc->name,

drivers/gpu/drm/armada/armada_overlay.c

241

dcrtc = drm_to_armada_crtc(old_state->crtc);

drivers/gpu/drm/armada/armada_overlay.c

259

armada_overlay_plane_update(struct drm_plane *plane, struct drm_crtc *crtc,

drivers/gpu/drm/armada/armada_overlay.c

269

trace_armada_ovl_plane_update(plane, crtc, fb,

drivers/gpu/drm/armada/armada_overlay.c

284

ret = drm_atomic_set_crtc_for_plane(plane_state, crtc);

drivers/gpu/drm/armada/armada_overlay.c

85

if (!new_state->fb || WARN_ON(!new_state->crtc))

drivers/gpu/drm/armada/armada_overlay.c

90

new_state->crtc->base.id, new_state->crtc->name,

drivers/gpu/drm/armada/armada_overlay.c

94

dcrtc = drm_to_armada_crtc(new_state->crtc);

drivers/gpu/drm/armada/armada_plane.c

146

if (!new_state->fb || WARN_ON(!new_state->crtc))

drivers/gpu/drm/armada/armada_plane.c

151

new_state->crtc->base.id, new_state->crtc->name,

drivers/gpu/drm/armada/armada_plane.c

155

dcrtc = drm_to_armada_crtc(new_state->crtc);

drivers/gpu/drm/armada/armada_plane.c

177

new_state->crtc->state->mode_changed) {

drivers/gpu/drm/armada/armada_plane.c

187

new_state->crtc->state->mode_changed) {

drivers/gpu/drm/armada/armada_plane.c

233

if (!old_state->crtc)

drivers/gpu/drm/armada/armada_plane.c

238

old_state->crtc->base.id, old_state->crtc->name,

drivers/gpu/drm/armada/armada_plane.c

241

dcrtc = drm_to_armada_crtc(old_state->crtc);

drivers/gpu/drm/armada/armada_plane.c

88

struct drm_crtc *crtc = new_plane_state->crtc;

drivers/gpu/drm/armada/armada_plane.c

93

if (!new_plane_state->fb || WARN_ON(!new_plane_state->crtc)) {

drivers/gpu/drm/armada/armada_plane.c

98

crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/armada/armada_trace.h

16

TP_PROTO(struct drm_crtc *crtc, u32 stat),

drivers/gpu/drm/armada/armada_trace.h

17

TP_ARGS(crtc, stat),

drivers/gpu/drm/armada/armada_trace.h

19

__field(struct drm_crtc *, crtc)

drivers/gpu/drm/armada/armada_trace.h

23

__entry->crtc = crtc;

drivers/gpu/drm/armada/armada_trace.h

27

__entry->crtc, __entry->stat)

drivers/gpu/drm/armada/armada_trace.h

31

TP_PROTO(struct drm_plane *plane, struct drm_crtc *crtc,

drivers/gpu/drm/armada/armada_trace.h

35

TP_ARGS(plane, crtc, fb, crtc_x, crtc_y, crtc_w, crtc_h, src_x, src_y, src_w, src_h),

drivers/gpu/drm/armada/armada_trace.h

38

__field(struct drm_crtc *, crtc)

drivers/gpu/drm/armada/armada_trace.h

51

__entry->crtc = crtc;

drivers/gpu/drm/armada/armada_trace.h

63

__entry->plane, __entry->crtc, __entry->fb,

drivers/gpu/drm/armada/armada_trace.h

71

TP_PROTO(struct drm_crtc *crtc, struct drm_plane *plane),

drivers/gpu/drm/armada/armada_trace.h

72

TP_ARGS(crtc, plane),

drivers/gpu/drm/armada/armada_trace.h

75

__field(struct drm_crtc *, crtc)

drivers/gpu/drm/armada/armada_trace.h

79

__entry->crtc = crtc;

drivers/gpu/drm/armada/armada_trace.h

82

__entry->plane, __entry->crtc)

drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c

147

struct drm_crtc *crtc = &pipe->crtc;

drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c

151

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c

157

struct drm_crtc *crtc = &pipe->crtc;

drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c

159

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c

167

struct drm_crtc *crtc = &pipe->crtc;

drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c

172

spin_lock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c

173

event = crtc->state->event;

drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c

175

crtc->state->event = NULL;

drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c

177

if (drm_crtc_vblank_get(crtc) == 0)

drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c

178

drm_crtc_arm_vblank_event(crtc, event);

drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c

180

drm_crtc_send_vblank_event(crtc, event);

drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c

182

spin_unlock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c

28

struct drm_crtc *crtc = &priv->pipe.crtc;

drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c

29

struct drm_device *drm = crtc->dev;

drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c

30

const u32 format = crtc->primary->state->fb->format->format;

drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c

82

struct drm_display_mode *m = &priv->pipe.crtc.state->adjusted_mode;

drivers/gpu/drm/aspeed/aspeed_gfx_drv.c

133

drm_crtc_handle_vblank(&priv->pipe.crtc);

drivers/gpu/drm/ast/ast_cursor.c

174

if (new_plane_state->crtc)

drivers/gpu/drm/ast/ast_cursor.c

175

new_crtc_state = drm_atomic_get_new_crtc_state(state, new_plane_state->crtc);

drivers/gpu/drm/ast/ast_dp.c

538

struct drm_crtc *crtc = &ast->crtc;

drivers/gpu/drm/ast/ast_dp.c

553

encoder->possible_crtcs = drm_crtc_mask(crtc);

drivers/gpu/drm/ast/ast_dp501.c

571

struct drm_crtc *crtc = &ast->crtc;

drivers/gpu/drm/ast/ast_dp501.c

586

encoder->possible_crtcs = drm_crtc_mask(crtc);

drivers/gpu/drm/ast/ast_drv.h

211

struct drm_crtc crtc;

drivers/gpu/drm/ast/ast_drv.h

355

u8 crtc[25];

drivers/gpu/drm/ast/ast_mode.c

101

struct drm_crtc *crtc = &ast->crtc;

drivers/gpu/drm/ast/ast_mode.c

106

drm_crtc_fill_palette_8(crtc, ast_set_gamma_lut);

drivers/gpu/drm/ast/ast_mode.c

112

drm_crtc_fill_gamma_888(crtc, ast_set_gamma_lut);

drivers/gpu/drm/ast/ast_mode.c

125

struct drm_crtc *crtc = &ast->crtc;

drivers/gpu/drm/ast/ast_mode.c

130

drm_crtc_load_palette_8(crtc, lut, ast_set_gamma_lut);

drivers/gpu/drm/ast/ast_mode.c

136

drm_crtc_load_gamma_888(crtc, lut, ast_set_gamma_lut);

drivers/gpu/drm/ast/ast_mode.c

221

ast_set_index_reg(ast, AST_IO_VGACRI, i, stdtable->crtc[i]);

drivers/gpu/drm/ast/ast_mode.c

223

ast_set_index_reg(ast, AST_IO_VGACRI, i, stdtable->crtc[i]);

drivers/gpu/drm/ast/ast_mode.c

225

ast_set_index_reg(ast, AST_IO_VGACRI, i, stdtable->crtc[i]);

drivers/gpu/drm/ast/ast_mode.c

504

if (new_plane_state->crtc)

drivers/gpu/drm/ast/ast_mode.c

505

new_crtc_state = drm_atomic_get_new_crtc_state(state, new_plane_state->crtc);

drivers/gpu/drm/ast/ast_mode.c

514

if (drm_WARN_ON(dev, new_plane_state->crtc)) /* cannot legally happen */

drivers/gpu/drm/ast/ast_mode.c

554

struct drm_crtc *crtc = plane_state->crtc;

drivers/gpu/drm/ast/ast_mode.c

555

struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/ast/ast_mode.c

671

ast_crtc_helper_mode_valid(struct drm_crtc *crtc, const struct drm_display_mode *mode)

drivers/gpu/drm/ast/ast_mode.c

673

struct ast_device *ast = to_ast_device(crtc->dev);

drivers/gpu/drm/ast/ast_mode.c

683

static void ast_crtc_helper_mode_set_nofb(struct drm_crtc *crtc)

drivers/gpu/drm/ast/ast_mode.c

685

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/ast/ast_mode.c

687

struct drm_crtc_state *crtc_state = crtc->state;

drivers/gpu/drm/ast/ast_mode.c

710

static int ast_crtc_helper_atomic_check(struct drm_crtc *crtc,

drivers/gpu/drm/ast/ast_mode.c

713

struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/ast/ast_mode.c

715

struct drm_crtc_state *old_crtc_state = drm_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/ast/ast_mode.c

717

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/ast/ast_mode.c

75

static void ast_set_gamma_lut(struct drm_crtc *crtc, unsigned int index,

drivers/gpu/drm/ast/ast_mode.c

78

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/ast/ast_mode.c

810

ast_crtc_helper_atomic_flush(struct drm_crtc *crtc,

drivers/gpu/drm/ast/ast_mode.c

814

crtc);

drivers/gpu/drm/ast/ast_mode.c

815

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/ast/ast_mode.c

833

static void ast_crtc_helper_atomic_enable(struct drm_crtc *crtc, struct drm_atomic_state *state)

drivers/gpu/drm/ast/ast_mode.c

835

struct ast_device *ast = to_ast_device(crtc->dev);

drivers/gpu/drm/ast/ast_mode.c

846

static void ast_crtc_helper_atomic_disable(struct drm_crtc *crtc, struct drm_atomic_state *state)

drivers/gpu/drm/ast/ast_mode.c

848

struct drm_crtc_state *old_crtc_state = drm_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/ast/ast_mode.c

849

struct ast_device *ast = to_ast_device(crtc->dev);

drivers/gpu/drm/ast/ast_mode.c

877

static void ast_crtc_reset(struct drm_crtc *crtc)

drivers/gpu/drm/ast/ast_mode.c

881

if (crtc->state)

drivers/gpu/drm/ast/ast_mode.c

882

crtc->funcs->atomic_destroy_state(crtc, crtc->state);

drivers/gpu/drm/ast/ast_mode.c

885

__drm_atomic_helper_crtc_reset(crtc, &ast_state->base);

drivers/gpu/drm/ast/ast_mode.c

887

__drm_atomic_helper_crtc_reset(crtc, NULL);

drivers/gpu/drm/ast/ast_mode.c

891

ast_crtc_atomic_duplicate_state(struct drm_crtc *crtc)

drivers/gpu/drm/ast/ast_mode.c

894

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/ast/ast_mode.c

896

if (drm_WARN_ON(dev, !crtc->state))

drivers/gpu/drm/ast/ast_mode.c

902

__drm_atomic_helper_crtc_duplicate_state(crtc, &new_ast_state->base);

drivers/gpu/drm/ast/ast_mode.c

904

ast_state = to_ast_crtc_state(crtc->state);

drivers/gpu/drm/ast/ast_mode.c

913

static void ast_crtc_atomic_destroy_state(struct drm_crtc *crtc,

drivers/gpu/drm/ast/ast_mode.c

934

struct drm_crtc *crtc = &ast->crtc;

drivers/gpu/drm/ast/ast_mode.c

937

ret = drm_crtc_init_with_planes(dev, crtc, &ast->primary_plane.base,

drivers/gpu/drm/ast/ast_mode.c

943

drm_mode_crtc_set_gamma_size(crtc, AST_LUT_SIZE);

drivers/gpu/drm/ast/ast_mode.c

944

drm_crtc_enable_color_mgmt(crtc, 0, false, AST_LUT_SIZE);

drivers/gpu/drm/ast/ast_mode.c

946

drm_crtc_helper_add(crtc, &ast_crtc_helper_funcs);

drivers/gpu/drm/ast/ast_sil164.c

103

encoder->possible_crtcs = drm_crtc_mask(crtc);

drivers/gpu/drm/ast/ast_sil164.c

83

struct drm_crtc *crtc = &ast->crtc;

drivers/gpu/drm/ast/ast_vga.c

103

encoder->possible_crtcs = drm_crtc_mask(crtc);

drivers/gpu/drm/ast/ast_vga.c

83

struct drm_crtc *crtc = &ast->crtc;

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

103

ret = clk_prepare_enable(crtc->dc->hlcdc->sys_clk);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

127

prate = clk_get_rate(crtc->dc->hlcdc->sys_clk);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

129

if (!crtc->dc->desc->fixed_clksrc) {

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

170

if (!crtc->dc->desc->is_xlcdc) {

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

186

(crtc->dc->desc->is_xlcdc ? ATMEL_XLCDC_MODE_MASK |

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

190

clk_disable_unprepare(crtc->dc->hlcdc->sys_clk);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

197

struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

199

return atmel_hlcdc_dc_mode_valid(crtc->dc, mode);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

206

struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

207

struct regmap *regmap = crtc->dc->hlcdc->regmap;

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

214

if (crtc->dc->desc->is_xlcdc) {

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

246

clk_disable_unprepare(crtc->dc->hlcdc->sys_clk);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

258

struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

259

struct regmap *regmap = crtc->dc->hlcdc->regmap;

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

267

clk_prepare_enable(crtc->dc->hlcdc->sys_clk);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

287

if (crtc->dc->desc->is_xlcdc) {

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

422

struct atmel_hlcdc_crtc *crtc;

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

425

crtc = drm_crtc_to_atmel_hlcdc_crtc(state->crtc);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

426

output_fmts = crtc->dc->desc->is_xlcdc ? ATMEL_XLCDC_OUTPUT_MODE_MASK :

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

432

if (!cstate->crtc)

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

437

if (crtc->dc->desc->conflicting_output_formats)

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

448

if (crtc->dc->desc->is_xlcdc) {

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

486

struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

496

crtc->event = c->state->event;

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

512

static void atmel_hlcdc_crtc_finish_page_flip(struct atmel_hlcdc_crtc *crtc)

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

514

struct drm_device *dev = crtc->base.dev;

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

518

if (crtc->event) {

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

519

drm_crtc_send_vblank_event(&crtc->base, crtc->event);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

520

drm_crtc_vblank_put(&crtc->base);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

521

crtc->event = NULL;

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

532

static void atmel_hlcdc_crtc_reset(struct drm_crtc *crtc)

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

536

if (crtc->state) {

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

537

__drm_atomic_helper_crtc_destroy_state(crtc->state);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

538

state = drm_crtc_state_to_atmel_hlcdc_crtc_state(crtc->state);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

540

crtc->state = NULL;

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

545

__drm_atomic_helper_crtc_reset(crtc, &state->base);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

549

atmel_hlcdc_crtc_duplicate_state(struct drm_crtc *crtc)

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

552

struct atmel_hlcdc_crtc *c = drm_crtc_to_atmel_hlcdc_crtc(crtc);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

554

if (WARN_ON(!crtc->state))

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

560

__drm_atomic_helper_crtc_duplicate_state(crtc, &state->base);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

562

cur = drm_crtc_state_to_atmel_hlcdc_crtc_state(crtc->state);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

570

static void atmel_hlcdc_crtc_destroy_state(struct drm_crtc *crtc,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

582

struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

583

struct regmap *regmap = crtc->dc->hlcdc->regmap;

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

593

struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

594

struct regmap *regmap = crtc->dc->hlcdc->regmap;

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

613

struct atmel_hlcdc_crtc *crtc;

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

633

crtc = drmm_crtc_alloc_with_planes(dev, struct atmel_hlcdc_crtc, base,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

636

if (IS_ERR(crtc))

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

637

return PTR_ERR(crtc);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

639

crtc->dc = dc;

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

64

drm_crtc_to_atmel_hlcdc_crtc(struct drm_crtc *crtc)

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

640

crtc->id = drm_crtc_index(&crtc->base);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

648

overlay->base.possible_crtcs = 1 << crtc->id;

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

652

drm_crtc_helper_add(&crtc->base, &lcdc_crtc_helper_funcs);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

654

drm_mode_crtc_set_gamma_size(&crtc->base, ATMEL_HLCDC_CLUT_SIZE);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

655

drm_crtc_enable_color_mgmt(&crtc->base, 0, false,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

658

dc->crtc = &crtc->base;

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

66

return container_of(crtc, struct atmel_hlcdc_crtc, base);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

71

struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

72

struct regmap *regmap = crtc->dc->hlcdc->regmap;

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

88

if (en_iter->crtc == c) {

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c

658

atmel_hlcdc_crtc_irq(dc->crtc);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h

352

struct drm_crtc *crtc;

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_output.c

74

struct drm_crtc *crtc = dc->crtc;

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_output.c

98

output->encoder.possible_crtcs = drm_crtc_mask(crtc);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

524

struct drm_crtc *crtc = state->base.crtc;

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

528

if (!crtc || !crtc->state)

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

531

if (!crtc->state->color_mgmt_changed || !crtc->state->gamma_lut)

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

534

lut = (struct drm_color_lut *)crtc->state->gamma_lut->data;

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

652

primary = drm_plane_to_atmel_hlcdc_plane(c_state->crtc->primary);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

668

if (ovl == c_state->crtc->primary)

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

734

if (!hstate->base.crtc || WARN_ON(!fb))

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

737

crtc_state = drm_atomic_get_new_crtc_state(state, s->crtc);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

931

if (!new_s->crtc || !new_s->fb)

drivers/gpu/drm/bridge/adv7511/adv7511_drv.c

803

crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc);

drivers/gpu/drm/bridge/analogix/analogix_dp_core.c

1000

crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc);

drivers/gpu/drm/bridge/analogix/analogix_dp_core.c

1103

return conn_state->crtc;

drivers/gpu/drm/bridge/analogix/analogix_dp_core.c

1122

return conn_state->crtc;

drivers/gpu/drm/bridge/analogix/analogix_dp_core.c

1129

struct drm_crtc *crtc;

drivers/gpu/drm/bridge/analogix/analogix_dp_core.c

1132

crtc = analogix_dp_get_new_crtc(dp, old_state);

drivers/gpu/drm/bridge/analogix/analogix_dp_core.c

1133

if (!crtc)

drivers/gpu/drm/bridge/analogix/analogix_dp_core.c

1136

old_crtc_state = drm_atomic_get_old_crtc_state(old_state, crtc);

drivers/gpu/drm/bridge/analogix/analogix_dp_core.c

1184

struct drm_crtc *crtc;

drivers/gpu/drm/bridge/analogix/analogix_dp_core.c

1189

crtc = analogix_dp_get_new_crtc(dp, old_state);

drivers/gpu/drm/bridge/analogix/analogix_dp_core.c

1190

if (!crtc)

drivers/gpu/drm/bridge/analogix/analogix_dp_core.c

1193

old_crtc_state = drm_atomic_get_old_crtc_state(old_state, crtc);

drivers/gpu/drm/bridge/analogix/analogix_dp_core.c

1282

struct drm_crtc *crtc;

drivers/gpu/drm/bridge/analogix/analogix_dp_core.c

1286

crtc = analogix_dp_get_new_crtc(dp, old_state);

drivers/gpu/drm/bridge/analogix/analogix_dp_core.c

1287

if (!crtc)

drivers/gpu/drm/bridge/analogix/analogix_dp_core.c

1290

new_crtc_state = drm_atomic_get_new_crtc_state(old_state, crtc);

drivers/gpu/drm/bridge/analogix/analogix_dp_core.c

1658

if (!connector->state->crtc) {

drivers/gpu/drm/bridge/analogix/analogix_dp_core.c

1664

return drm_dp_start_crc(&dp->aux, connector->state->crtc);

drivers/gpu/drm/bridge/analogix/analogix_dp_core.c

997

if (!conn_state->crtc)

drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c

751

crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc);

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c

1590

if (!new_state->crtc) {

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c

1602

crtc_state = drm_atomic_get_new_crtc_state(state, new_state->crtc);

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c

1966

crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc);

drivers/gpu/drm/bridge/fsl-ldb.c

133

struct drm_crtc *crtc;

drivers/gpu/drm/bridge/fsl-ldb.c

175

crtc = drm_atomic_get_new_connector_state(state, connector)->crtc;

drivers/gpu/drm/bridge/fsl-ldb.c

176

crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/bridge/imx/imx8mp-hdmi-pvi.c

65

crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc);

drivers/gpu/drm/bridge/inno-hdmi.c

773

new_crtc_state = drm_atomic_get_new_crtc_state(state, new_conn_state->crtc);

drivers/gpu/drm/bridge/ite-it6263.c

601

struct drm_crtc *crtc;

drivers/gpu/drm/bridge/ite-it6263.c

608

crtc = drm_atomic_get_new_connector_state(state, connector)->crtc;

drivers/gpu/drm/bridge/ite-it6263.c

609

crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/bridge/ite-it6505.c

3146

crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc);

drivers/gpu/drm/bridge/lontium-lt9211.c

465

struct drm_crtc *crtc;

drivers/gpu/drm/bridge/lontium-lt9211.c

518

crtc = drm_atomic_get_new_connector_state(state, connector)->crtc;

drivers/gpu/drm/bridge/lontium-lt9211.c

519

crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/bridge/lontium-lt9611.c

662

crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc);

drivers/gpu/drm/bridge/panel.c

118

struct drm_crtc *crtc;

drivers/gpu/drm/bridge/panel.c

121

crtc = drm_atomic_get_new_crtc_for_encoder(atomic_state, encoder);

drivers/gpu/drm/bridge/panel.c

122

if (!crtc)

drivers/gpu/drm/bridge/panel.c

125

old_crtc_state = drm_atomic_get_old_crtc_state(atomic_state, crtc);

drivers/gpu/drm/bridge/panel.c

137

struct drm_crtc *crtc;

drivers/gpu/drm/bridge/panel.c

140

crtc = drm_atomic_get_new_crtc_for_encoder(atomic_state, encoder);

drivers/gpu/drm/bridge/panel.c

141

if (!crtc)

drivers/gpu/drm/bridge/panel.c

144

old_crtc_state = drm_atomic_get_old_crtc_state(atomic_state, crtc);

drivers/gpu/drm/bridge/panel.c

156

struct drm_crtc *crtc;

drivers/gpu/drm/bridge/panel.c

159

crtc = drm_atomic_get_old_crtc_for_encoder(atomic_state, encoder);

drivers/gpu/drm/bridge/panel.c

160

if (!crtc)

drivers/gpu/drm/bridge/panel.c

163

new_crtc_state = drm_atomic_get_new_crtc_state(atomic_state, crtc);

drivers/gpu/drm/bridge/panel.c

175

struct drm_crtc *crtc;

drivers/gpu/drm/bridge/panel.c

178

crtc = drm_atomic_get_old_crtc_for_encoder(atomic_state, encoder);

drivers/gpu/drm/bridge/panel.c

179

if (!crtc)

drivers/gpu/drm/bridge/panel.c

182

new_crtc_state = drm_atomic_get_new_crtc_state(atomic_state, crtc);

drivers/gpu/drm/bridge/sil-sii8620.c

1145

&ctx->bridge.encoder->crtc->state->adjusted_mode;

drivers/gpu/drm/bridge/ssd2825.c

492

struct drm_crtc *crtc;

drivers/gpu/drm/bridge/ssd2825.c

532

crtc = drm_atomic_get_new_connector_state(state, connector)->crtc;

drivers/gpu/drm/bridge/ssd2825.c

533

crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/bridge/synopsys/dw-hdmi.c

2538

struct drm_crtc *crtc = new_state->crtc;

drivers/gpu/drm/bridge/synopsys/dw-hdmi.c

2541

if (!crtc)

drivers/gpu/drm/bridge/synopsys/dw-hdmi.c

2545

crtc_state = drm_atomic_get_crtc_state(state, crtc);

drivers/gpu/drm/bridge/tc358768.c

731

crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc);

drivers/gpu/drm/bridge/tc358775.c

386

drm_atomic_get_new_crtc_state(state, conn_state->crtc);

drivers/gpu/drm/bridge/ti-sn65dsi83.c

525

struct drm_crtc *crtc;

drivers/gpu/drm/bridge/ti-sn65dsi83.c

583

crtc = drm_atomic_get_new_connector_state(state, connector)->crtc;

drivers/gpu/drm/bridge/ti-sn65dsi83.c

584

crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/bridge/ti-sn65dsi86.c

288

drm_atomic_get_new_crtc_state(state, conn_state->crtc);

drivers/gpu/drm/clients/drm_log.c

194

struct drm_crtc *crtc = mode_set->crtc;

drivers/gpu/drm/clients/drm_log.c

203

format = drm_log_find_usable_format(crtc->primary);

drivers/gpu/drm/display/drm_dp_helper.c

2291

struct drm_crtc *crtc;

drivers/gpu/drm/display/drm_dp_helper.c

2296

if (WARN_ON(!aux->crtc))

drivers/gpu/drm/display/drm_dp_helper.c

2299

crtc = aux->crtc;

drivers/gpu/drm/display/drm_dp_helper.c

2300

while (crtc->crc.opened) {

drivers/gpu/drm/display/drm_dp_helper.c

2301

drm_crtc_wait_one_vblank(crtc);

drivers/gpu/drm/display/drm_dp_helper.c

2302

if (!crtc->crc.opened)

drivers/gpu/drm/display/drm_dp_helper.c

2323

drm_crtc_add_crc_entry(crtc, false, 0, crcs);

drivers/gpu/drm/display/drm_dp_helper.c

2478

int drm_dp_start_crc(struct drm_dp_aux *aux, struct drm_crtc *crtc)

drivers/gpu/drm/display/drm_dp_helper.c

2492

aux->crtc = crtc;

drivers/gpu/drm/display/drm_dp_helper.c

2519

aux->crtc = NULL;

drivers/gpu/drm/display/drm_dp_mst_topology.c

4450

topology_state->pending_crtc_mask |= drm_crtc_mask(conn_state->crtc);

drivers/gpu/drm/display/drm_dp_mst_topology.c

4536

if (!old_conn_state->crtc)

drivers/gpu/drm/display/drm_dp_mst_topology.c

4541

if (new_conn_state->crtc) {

drivers/gpu/drm/display/drm_dp_mst_topology.c

4543

drm_atomic_get_new_crtc_state(state, new_conn_state->crtc);

drivers/gpu/drm/display/drm_dp_mst_topology.c

4557

topology_state->pending_crtc_mask |= drm_crtc_mask(old_conn_state->crtc);

drivers/gpu/drm/display/drm_dp_mst_topology.c

4568

if (new_conn_state->crtc)

drivers/gpu/drm/display/drm_dp_mst_topology.c

4598

struct drm_crtc *crtc;

drivers/gpu/drm/display/drm_dp_mst_topology.c

4614

for_each_new_crtc_in_state(state, crtc, crtc_state, j) {

drivers/gpu/drm/display/drm_dp_mst_topology.c

4615

if (mst_state->pending_crtc_mask & drm_crtc_mask(crtc)) {

drivers/gpu/drm/display/drm_dp_mst_topology.c

4656

old_mst_state->commit_deps[j]->crtc->name, ret);

drivers/gpu/drm/display/drm_dp_mst_topology.c

4707

if (new_conn_state->crtc) {

drivers/gpu/drm/display/drm_dp_mst_topology.c

4708

crtc_state = drm_atomic_get_new_crtc_state(state, new_conn_state->crtc);

drivers/gpu/drm/display/drm_dp_mst_topology.c

4714

mst_state->pending_crtc_mask |= drm_crtc_mask(new_conn_state->crtc);

drivers/gpu/drm/display/drm_dp_mst_topology.c

4718

if (old_conn_state->crtc) {

drivers/gpu/drm/display/drm_dp_mst_topology.c

4719

crtc_state = drm_atomic_get_new_crtc_state(state, old_conn_state->crtc);

drivers/gpu/drm/display/drm_dp_mst_topology.c

4727

mst_state->pending_crtc_mask |= drm_crtc_mask(old_conn_state->crtc);

drivers/gpu/drm/display/drm_dp_mst_topology.c

5423

struct drm_crtc *crtc;

drivers/gpu/drm/display/drm_dp_mst_topology.c

5443

crtc = conn_state->crtc;

drivers/gpu/drm/display/drm_dp_mst_topology.c

5445

if (!crtc)

drivers/gpu/drm/display/drm_dp_mst_topology.c

5451

crtc_state = drm_atomic_get_crtc_state(mst_state->base.state, crtc);

drivers/gpu/drm/display/drm_dp_mst_topology.c

5457

mgr, crtc);

drivers/gpu/drm/display/drm_hdmi_state_helper.c

334

struct drm_crtc *crtc;

drivers/gpu/drm/display/drm_hdmi_state_helper.c

340

crtc = conn_state->crtc;

drivers/gpu/drm/display/drm_hdmi_state_helper.c

341

if (!crtc)

drivers/gpu/drm/display/drm_hdmi_state_helper.c

344

crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/display/drm_hdmi_state_helper.c

849

if (!new_conn_state->crtc || !new_conn_state->best_encoder)

drivers/gpu/drm/display/drm_hdmi_state_helper.c

865

struct drm_crtc *crtc = new_conn_state->crtc;

drivers/gpu/drm/display/drm_hdmi_state_helper.c

868

crtc_state = drm_atomic_get_crtc_state(state, crtc);

drivers/gpu/drm/drm_atomic.c

1224

return conn_state->crtc;

drivers/gpu/drm/drm_atomic.c

1254

return conn_state->crtc;

drivers/gpu/drm/drm_atomic.c

1324

if (connector_state->crtc) {

drivers/gpu/drm/drm_atomic.c

1328

connector_state->crtc);

drivers/gpu/drm/drm_atomic.c

1343

drm_printf(p, "\tcrtc=%s\n", state->crtc ? state->crtc->name : "(null)");

drivers/gpu/drm/drm_atomic.c

1503

struct drm_crtc *crtc)

drivers/gpu/drm/drm_atomic.c

1512

crtc_state = drm_atomic_get_crtc_state(state, crtc);

drivers/gpu/drm/drm_atomic.c

1520

drm_dbg_atomic(crtc->dev,

drivers/gpu/drm/drm_atomic.c

1522

crtc->base.id, crtc->name, state);

drivers/gpu/drm/drm_atomic.c

1567

struct drm_crtc *crtc)

drivers/gpu/drm/drm_atomic.c

1570

drm_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/drm_atomic.c

1573

WARN_ON(!drm_atomic_get_new_crtc_state(state, crtc));

drivers/gpu/drm/drm_atomic.c

1575

drm_dbg_atomic(crtc->dev,

drivers/gpu/drm/drm_atomic.c

1577

crtc->base.id, crtc->name, state);

drivers/gpu/drm/drm_atomic.c

1654

struct drm_crtc *crtc;

drivers/gpu/drm/drm_atomic.c

1665

for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) {

drivers/gpu/drm/drm_atomic.c

1667

requested_crtc |= drm_crtc_mask(crtc);

drivers/gpu/drm/drm_atomic.c

1679

for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {

drivers/gpu/drm/drm_atomic.c

1683

crtc->base.id, crtc->name);

drivers/gpu/drm/drm_atomic.c

1708

for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) {

drivers/gpu/drm/drm_atomic.c

1711

crtc->base.id, crtc->name);

drivers/gpu/drm/drm_atomic.c

1717

for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) {

drivers/gpu/drm/drm_atomic.c

1719

affected_crtc |= drm_crtc_mask(crtc);

drivers/gpu/drm/drm_atomic.c

1835

struct drm_device *dev = set->crtc->dev;

drivers/gpu/drm/drm_atomic.c

1836

struct drm_crtc *crtc;

drivers/gpu/drm/drm_atomic.c

1848

ret = drm_atomic_add_affected_connectors(state, set->crtc);

drivers/gpu/drm/drm_atomic.c

1853

if (new_conn_state->crtc == set->crtc) {

drivers/gpu/drm/drm_atomic.c

1872

set->crtc);

drivers/gpu/drm/drm_atomic.c

1877

for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) {

drivers/gpu/drm/drm_atomic.c

1884

if (crtc == set->crtc)

drivers/gpu/drm/drm_atomic.c

1906

struct drm_crtc *crtc = set->crtc;

drivers/gpu/drm/drm_atomic.c

1910

crtc_state = drm_atomic_get_crtc_state(state, crtc);

drivers/gpu/drm/drm_atomic.c

1914

primary_state = drm_atomic_get_plane_state(state, crtc->primary);

drivers/gpu/drm/drm_atomic.c

1946

ret = drm_atomic_set_crtc_for_plane(primary_state, crtc);

drivers/gpu/drm/drm_atomic.c

2001

struct drm_crtc *crtc;

drivers/gpu/drm/drm_atomic.c

2019

for_each_new_crtc_in_state(state, crtc, crtc_state, i)

drivers/gpu/drm/drm_atomic.c

2036

struct drm_crtc *crtc;

drivers/gpu/drm/drm_atomic.c

2060

list_for_each_entry(crtc, &config->crtc_list, head) {

drivers/gpu/drm/drm_atomic.c

2062

drm_modeset_lock(&crtc->mutex, NULL);

drivers/gpu/drm/drm_atomic.c

2063

drm_atomic_crtc_print_state(p, crtc->state);

drivers/gpu/drm/drm_atomic.c

2065

drm_modeset_unlock(&crtc->mutex);

drivers/gpu/drm/drm_atomic.c

226

struct drm_crtc *crtc = state->crtcs[i].ptr;

drivers/gpu/drm/drm_atomic.c

228

if (!crtc)

drivers/gpu/drm/drm_atomic.c

231

crtc->funcs->atomic_destroy_state(crtc,

drivers/gpu/drm/drm_atomic.c

366

struct drm_crtc *crtc)

drivers/gpu/drm/drm_atomic.c

368

int ret, index = drm_crtc_index(crtc);

drivers/gpu/drm/drm_atomic.c

374

crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/drm_atomic.c

378

ret = drm_modeset_lock(&crtc->mutex, state->acquire_ctx);

drivers/gpu/drm/drm_atomic.c

382

crtc_state = crtc->funcs->atomic_duplicate_state(crtc);

drivers/gpu/drm/drm_atomic.c

387

state->crtcs[index].old_state = crtc->state;

drivers/gpu/drm/drm_atomic.c

389

state->crtcs[index].ptr = crtc;

drivers/gpu/drm/drm_atomic.c

393

crtc->base.id, crtc->name, crtc_state, state);

drivers/gpu/drm/drm_atomic.c

402

struct drm_crtc *crtc = new_crtc_state->crtc;

drivers/gpu/drm/drm_atomic.c

413

drm_dbg_atomic(crtc->dev,

drivers/gpu/drm/drm_atomic.c

415

crtc->base.id, crtc->name);

drivers/gpu/drm/drm_atomic.c

423

if (drm_core_check_feature(crtc->dev, DRIVER_ATOMIC) &&

drivers/gpu/drm/drm_atomic.c

425

drm_dbg_atomic(crtc->dev,

drivers/gpu/drm/drm_atomic.c

427

crtc->base.id, crtc->name);

drivers/gpu/drm/drm_atomic.c

431

if (drm_core_check_feature(crtc->dev, DRIVER_ATOMIC) &&

drivers/gpu/drm/drm_atomic.c

433

drm_dbg_atomic(crtc->dev,

drivers/gpu/drm/drm_atomic.c

435

crtc->base.id, crtc->name);

drivers/gpu/drm/drm_atomic.c

451

drm_dbg_atomic(crtc->dev,

drivers/gpu/drm/drm_atomic.c

453

crtc->base.id, crtc->name);

drivers/gpu/drm/drm_atomic.c

463

struct drm_crtc *crtc = state->crtc;

drivers/gpu/drm/drm_atomic.c

465

drm_printf(p, "crtc[%u]: %s\n", crtc->base.id, crtc->name);

drivers/gpu/drm/drm_atomic.c

479

if (crtc->funcs->atomic_print_state)

drivers/gpu/drm/drm_atomic.c

480

crtc->funcs->atomic_print_state(p, state);

drivers/gpu/drm/drm_atomic.c

497

if (writeback_job->fb && !state->crtc) {

drivers/gpu/drm/drm_atomic.c

504

if (state->crtc)

drivers/gpu/drm/drm_atomic.c

506

state->crtc);

drivers/gpu/drm/drm_atomic.c

512

state->crtc->base.id);

drivers/gpu/drm/drm_atomic.c

558

WARN_ON(plane->crtc);

drivers/gpu/drm/drm_atomic.c

581

if (plane_state->crtc) {

drivers/gpu/drm/drm_atomic.c

585

plane_state->crtc);

drivers/gpu/drm/drm_atomic.c

679

if (!old_plane_state->crtc || !new_plane_state->crtc)

drivers/gpu/drm/drm_atomic.c

682

if (old_plane_state->crtc == new_plane_state->crtc)

drivers/gpu/drm/drm_atomic.c

707

struct drm_crtc *crtc = new_plane_state->crtc;

drivers/gpu/drm/drm_atomic.c

714

if (crtc && !fb) {

drivers/gpu/drm/drm_atomic.c

718

} else if (fb && !crtc) {

drivers/gpu/drm/drm_atomic.c

725

if (!crtc)

drivers/gpu/drm/drm_atomic.c

729

if (!(plane->possible_crtcs & drm_crtc_mask(crtc))) {

drivers/gpu/drm/drm_atomic.c

732

crtc->base.id, crtc->name,

drivers/gpu/drm/drm_atomic.c

79

drm_err(commit->crtc->dev, "hw_done timed out\n");

drivers/gpu/drm/drm_atomic.c

862

drm_printf(p, "\tcrtc=%s\n", state->crtc ? state->crtc->name : "(null)");

drivers/gpu/drm/drm_atomic.c

89

drm_err(commit->crtc->dev, "flip_done timed out\n");

drivers/gpu/drm/drm_atomic_helper.c

1022

struct drm_crtc *crtc;

drivers/gpu/drm/drm_atomic_helper.c

1051

for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) {

drivers/gpu/drm/drm_atomic_helper.c

1054

funcs = crtc->helper_private;

drivers/gpu/drm/drm_atomic_helper.c

1059

ret = funcs->atomic_check(crtc, state);

drivers/gpu/drm/drm_atomic_helper.c

1061

drm_dbg_atomic(crtc->dev,

drivers/gpu/drm/drm_atomic_helper.c

1063

crtc->base.id, crtc->name);

drivers/gpu/drm/drm_atomic_helper.c

1152

old_state->crtc != new_state->crtc)

drivers/gpu/drm/drm_atomic_helper.c

1193

if (!old_conn_state->crtc)

drivers/gpu/drm/drm_atomic_helper.c

1196

old_crtc_state = drm_atomic_get_old_crtc_state(state, old_conn_state->crtc);

drivers/gpu/drm/drm_atomic_helper.c

1198

if (new_conn_state->crtc)

drivers/gpu/drm/drm_atomic_helper.c

1201

new_conn_state->crtc);

drivers/gpu/drm/drm_atomic_helper.c

1206

!drm_atomic_crtc_needs_modeset(old_conn_state->crtc->state))

drivers/gpu/drm/drm_atomic_helper.c

1234

else if (new_conn_state->crtc && funcs->prepare)

drivers/gpu/drm/drm_atomic_helper.c

1256

struct drm_crtc *crtc;

drivers/gpu/drm/drm_atomic_helper.c

126

if (!new_conn_state->crtc)

drivers/gpu/drm/drm_atomic_helper.c

1260

for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {

drivers/gpu/drm/drm_atomic_helper.c

1271

funcs = crtc->helper_private;

drivers/gpu/drm/drm_atomic_helper.c

1274

crtc->base.id, crtc->name);

drivers/gpu/drm/drm_atomic_helper.c

1279

funcs->prepare(crtc);

drivers/gpu/drm/drm_atomic_helper.c

1281

funcs->atomic_disable(crtc, state);

drivers/gpu/drm/drm_atomic_helper.c

1283

funcs->disable(crtc);

drivers/gpu/drm/drm_atomic_helper.c

1285

funcs->dpms(crtc, DRM_MODE_DPMS_OFF);

drivers/gpu/drm/drm_atomic_helper.c

1290

ret = drm_crtc_vblank_get(crtc);

drivers/gpu/drm/drm_atomic_helper.c

1302

drm_crtc_vblank_put(crtc);

drivers/gpu/drm/drm_atomic_helper.c

1331

if (!old_conn_state->crtc)

drivers/gpu/drm/drm_atomic_helper.c

1334

old_crtc_state = drm_atomic_get_old_crtc_state(state, old_conn_state->crtc);

drivers/gpu/drm/drm_atomic_helper.c

1336

if (new_conn_state->crtc)

drivers/gpu/drm/drm_atomic_helper.c

1338

new_conn_state->crtc);

drivers/gpu/drm/drm_atomic_helper.c

1343

!drm_atomic_crtc_needs_modeset(old_conn_state->crtc->state))

drivers/gpu/drm/drm_atomic_helper.c

1402

struct drm_crtc *crtc;

drivers/gpu/drm/drm_atomic_helper.c

1409

WARN_ON(!connector->encoder->crtc);

drivers/gpu/drm/drm_atomic_helper.c

1411

connector->encoder->crtc = NULL;

drivers/gpu/drm/drm_atomic_helper.c

1415

crtc = new_conn_state->crtc;

drivers/gpu/drm/drm_atomic_helper.c

1416

if ((!crtc && old_conn_state->crtc) ||

drivers/gpu/drm/drm_atomic_helper.c

1417

(crtc && drm_atomic_crtc_needs_modeset(crtc->state))) {

drivers/gpu/drm/drm_atomic_helper.c

1420

if (crtc && crtc->state->active)

drivers/gpu/drm/drm_atomic_helper.c

1429

if (!new_conn_state->crtc)

drivers/gpu/drm/drm_atomic_helper.c

1436

connector->encoder->crtc = new_conn_state->crtc;

drivers/gpu/drm/drm_atomic_helper.c

1440

for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) {

drivers/gpu/drm/drm_atomic_helper.c

1441

struct drm_plane *primary = crtc->primary;

drivers/gpu/drm/drm_atomic_helper.c

1444

crtc->mode = new_crtc_state->mode;

drivers/gpu/drm/drm_atomic_helper.c

1445

crtc->enabled = new_crtc_state->enable;

drivers/gpu/drm/drm_atomic_helper.c

1450

if (new_plane_state && new_plane_state->crtc == crtc) {

drivers/gpu/drm/drm_atomic_helper.c

1451

crtc->x = new_plane_state->src_x >> 16;

drivers/gpu/drm/drm_atomic_helper.c

1452

crtc->y = new_plane_state->src_y >> 16;

drivers/gpu/drm/drm_atomic_helper.c

1468

struct drm_crtc *crtc;

drivers/gpu/drm/drm_atomic_helper.c

1471

for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) {

drivers/gpu/drm/drm_atomic_helper.c

1473

drm_calc_timestamping_constants(crtc,

drivers/gpu/drm/drm_atomic_helper.c

1491

struct drm_crtc *crtc;

drivers/gpu/drm/drm_atomic_helper.c

1497

for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) {

drivers/gpu/drm/drm_atomic_helper.c

1503

funcs = crtc->helper_private;

drivers/gpu/drm/drm_atomic_helper.c

1507

crtc->base.id, crtc->name);

drivers/gpu/drm/drm_atomic_helper.c

1509

funcs->mode_set_nofb(crtc);

drivers/gpu/drm/drm_atomic_helper.c

1524

new_crtc_state = new_conn_state->crtc->state;

drivers/gpu/drm/drm_atomic_helper.c

1631

if (!new_conn_state->crtc->state->active ||

drivers/gpu/drm/drm_atomic_helper.c

1632

!drm_atomic_crtc_needs_modeset(new_conn_state->crtc->state))

drivers/gpu/drm/drm_atomic_helper.c

1662

struct drm_crtc *crtc;

drivers/gpu/drm/drm_atomic_helper.c

1667

for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {

drivers/gpu/drm/drm_atomic_helper.c

1677

funcs = crtc->helper_private;

drivers/gpu/drm/drm_atomic_helper.c

1681

crtc->base.id, crtc->name);

drivers/gpu/drm/drm_atomic_helper.c

1683

funcs->atomic_enable(crtc, state);

drivers/gpu/drm/drm_atomic_helper.c

1685

funcs->commit(crtc);

drivers/gpu/drm/drm_atomic_helper.c

1714

if (!new_conn_state->crtc->state->active ||

drivers/gpu/drm/drm_atomic_helper.c

1715

!drm_atomic_crtc_needs_modeset(new_conn_state->crtc->state))

drivers/gpu/drm/drm_atomic_helper.c

1779

struct drm_crtc *crtc;

drivers/gpu/drm/drm_atomic_helper.c

1786

for_each_new_crtc_in_state (state, crtc, new_crtc_state, i) {

drivers/gpu/drm/drm_atomic_helper.c

1795

if (drm_crtc_next_vblank_start(crtc, &v))

drivers/gpu/drm/drm_atomic_helper.c

180

connector->state->crtc->base.id,

drivers/gpu/drm/drm_atomic_helper.c

181

connector->state->crtc->name,

drivers/gpu/drm/drm_atomic_helper.c

1886

struct drm_crtc *crtc;

drivers/gpu/drm/drm_atomic_helper.c

1898

for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {

drivers/gpu/drm/drm_atomic_helper.c

1902

ret = drm_crtc_vblank_get(crtc);

drivers/gpu/drm/drm_atomic_helper.c

1906

crtc_mask |= drm_crtc_mask(crtc);

drivers/gpu/drm/drm_atomic_helper.c

1907

state->crtcs[i].last_vblank_count = drm_crtc_vblank_count(crtc);

drivers/gpu/drm/drm_atomic_helper.c

1910

for_each_old_crtc_in_state(state, crtc, old_crtc_state, i) {

drivers/gpu/drm/drm_atomic_helper.c

1911

wait_queue_head_t *queue = drm_crtc_vblank_waitqueue(crtc);

drivers/gpu/drm/drm_atomic_helper.c

1913

if (!(crtc_mask & drm_crtc_mask(crtc)))

drivers/gpu/drm/drm_atomic_helper.c

1918

drm_crtc_vblank_count(crtc),

drivers/gpu/drm/drm_atomic_helper.c

1922

crtc->base.id, crtc->name);

drivers/gpu/drm/drm_atomic_helper.c

1924

drm_crtc_vblank_put(crtc);

drivers/gpu/drm/drm_atomic_helper.c

1947

struct drm_crtc *crtc;

drivers/gpu/drm/drm_atomic_helper.c

1954

crtc = state->crtcs[i].ptr;

drivers/gpu/drm/drm_atomic_helper.c

1956

if (!crtc || !commit)

drivers/gpu/drm/drm_atomic_helper.c

196

new_conn_state->crtc->base.id, new_conn_state->crtc->name,

drivers/gpu/drm/drm_atomic_helper.c

1962

crtc->base.id, crtc->name);

drivers/gpu/drm/drm_atomic_helper.c

199

crtc_state = drm_atomic_get_new_crtc_state(state, new_conn_state->crtc);

drivers/gpu/drm/drm_atomic_helper.c

2039

struct drm_crtc *crtc;

drivers/gpu/drm/drm_atomic_helper.c

2067

for_each_new_crtc_in_state(state, crtc, new_crtc_state, i)

drivers/gpu/drm/drm_atomic_helper.c

2111

struct drm_crtc *crtc;

drivers/gpu/drm/drm_atomic_helper.c

2119

for_each_new_crtc_in_state(state, crtc, crtc_state, i) {

drivers/gpu/drm/drm_atomic_helper.c

2134

if (!new_plane_state->crtc ||

drivers/gpu/drm/drm_atomic_helper.c

2135

old_plane_state->crtc != new_plane_state->crtc) {

drivers/gpu/drm/drm_atomic_helper.c

226

struct drm_crtc *crtc;

drivers/gpu/drm/drm_atomic_helper.c

230

crtc = conn_state->connector->state->crtc;

drivers/gpu/drm/drm_atomic_helper.c

2375

static int stall_checks(struct drm_crtc *crtc, bool nonblock)

drivers/gpu/drm/drm_atomic_helper.c

238

WARN_ON(!crtc && encoder != conn_state->best_encoder);

drivers/gpu/drm/drm_atomic_helper.c

2382

spin_lock(&crtc->commit_lock);

drivers/gpu/drm/drm_atomic_helper.c

2384

list_for_each_entry(commit, &crtc->commit_list, commit_entry) {

drivers/gpu/drm/drm_atomic_helper.c

239

if (crtc) {

drivers/gpu/drm/drm_atomic_helper.c

2392

spin_unlock(&crtc->commit_lock);

drivers/gpu/drm/drm_atomic_helper.c

2393

drm_dbg_atomic(crtc->dev,

drivers/gpu/drm/drm_atomic_helper.c

2395

crtc->base.id, crtc->name);

drivers/gpu/drm/drm_atomic_helper.c

240

crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/drm_atomic_helper.c

2406

spin_unlock(&crtc->commit_lock);

drivers/gpu/drm/drm_atomic_helper.c

2417

drm_err(crtc->dev, "[CRTC:%d:%s] cleanup_done timed out\n",

drivers/gpu/drm/drm_atomic_helper.c

2418

crtc->base.id, crtc->name);

drivers/gpu/drm/drm_atomic_helper.c

2434

static void init_commit(struct drm_crtc_commit *commit, struct drm_crtc *crtc)

drivers/gpu/drm/drm_atomic_helper.c

2441

commit->crtc = crtc;

drivers/gpu/drm/drm_atomic_helper.c

2445

crtc_or_fake_commit(struct drm_atomic_state *state, struct drm_crtc *crtc)

drivers/gpu/drm/drm_atomic_helper.c

2447

if (crtc) {

drivers/gpu/drm/drm_atomic_helper.c

2450

new_crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/drm_atomic_helper.c

248

crtc = conn_state->crtc;

drivers/gpu/drm/drm_atomic_helper.c

249

WARN_ON(!crtc);

drivers/gpu/drm/drm_atomic_helper.c

250

if (crtc) {

drivers/gpu/drm/drm_atomic_helper.c

251

crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/drm_atomic_helper.c

2514

struct drm_crtc *crtc;

drivers/gpu/drm/drm_atomic_helper.c

2526

for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {

drivers/gpu/drm/drm_atomic_helper.c

2531

init_commit(commit, crtc);

drivers/gpu/drm/drm_atomic_helper.c

2535

ret = stall_checks(crtc, nonblock);

drivers/gpu/drm/drm_atomic_helper.c

2588

commit = crtc_or_fake_commit(state, new_conn_state->crtc ?: old_conn_state->crtc);

drivers/gpu/drm/drm_atomic_helper.c

2610

commit = crtc_or_fake_commit(state, new_plane_state->crtc ?: old_plane_state->crtc);

drivers/gpu/drm/drm_atomic_helper.c

2638

struct drm_crtc *crtc;

drivers/gpu/drm/drm_atomic_helper.c

2647

for_each_old_crtc_in_state(state, crtc, old_crtc_state, i) {

drivers/gpu/drm/drm_atomic_helper.c

2650

drm_err(crtc->dev,

drivers/gpu/drm/drm_atomic_helper.c

2652

crtc->base.id, crtc->name);

drivers/gpu/drm/drm_atomic_helper.c

2694

struct drm_crtc *crtc;

drivers/gpu/drm/drm_atomic_helper.c

2697

for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) {

drivers/gpu/drm/drm_atomic_helper.c

2705

drm_crtc_send_vblank_event(crtc,

drivers/gpu/drm/drm_atomic_helper.c

2731

struct drm_crtc *crtc;

drivers/gpu/drm/drm_atomic_helper.c

2736

for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {

drivers/gpu/drm/drm_atomic_helper.c

276

encoder_crtc = old_connector_state->crtc;

drivers/gpu/drm/drm_atomic_helper.c

2776

struct drm_crtc *crtc;

drivers/gpu/drm/drm_atomic_helper.c

2781

for_each_old_crtc_in_state(state, crtc, old_crtc_state, i) {

drivers/gpu/drm/drm_atomic_helper.c

2789

spin_lock(&crtc->commit_lock);

drivers/gpu/drm/drm_atomic_helper.c

2791

spin_unlock(&crtc->commit_lock);

drivers/gpu/drm/drm_atomic_helper.c

2928

return state->crtc && state->crtc->state->active;

drivers/gpu/drm/drm_atomic_helper.c

2976

struct drm_crtc *crtc;

drivers/gpu/drm/drm_atomic_helper.c

2984

for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {

drivers/gpu/drm/drm_atomic_helper.c

2987

funcs = crtc->helper_private;

drivers/gpu/drm/drm_atomic_helper.c

2995

funcs->atomic_begin(crtc, state);

drivers/gpu/drm/drm_atomic_helper.c

3030

crtc_state = old_plane_state->crtc->state;

drivers/gpu/drm/drm_atomic_helper.c

3037

} else if (new_plane_state->crtc || disabling) {

drivers/gpu/drm/drm_atomic_helper.c

3047

for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {

drivers/gpu/drm/drm_atomic_helper.c

3050

funcs = crtc->helper_private;

drivers/gpu/drm/drm_atomic_helper.c

3058

funcs->atomic_flush(crtc, state);

drivers/gpu/drm/drm_atomic_helper.c

306

if (old_connector_state->crtc != new_connector_state->crtc) {

drivers/gpu/drm/drm_atomic_helper.c

307

if (old_connector_state->crtc) {

drivers/gpu/drm/drm_atomic_helper.c

308

crtc_state = drm_atomic_get_new_crtc_state(state, old_connector_state->crtc);

drivers/gpu/drm/drm_atomic_helper.c

3095

struct drm_crtc *crtc = old_crtc_state->crtc;

drivers/gpu/drm/drm_atomic_helper.c

3098

drm_atomic_get_new_crtc_state(old_state, crtc);

drivers/gpu/drm/drm_atomic_helper.c

3105

crtc_funcs = crtc->helper_private;

drivers/gpu/drm/drm_atomic_helper.c

3107

crtc_funcs->atomic_begin(crtc, old_state);

drivers/gpu/drm/drm_atomic_helper.c

3109

drm_for_each_plane_mask(plane, crtc->dev, plane_mask) {

drivers/gpu/drm/drm_atomic_helper.c

312

if (new_connector_state->crtc) {

drivers/gpu/drm/drm_atomic_helper.c

3122

WARN_ON(new_plane_state->crtc &&

drivers/gpu/drm/drm_atomic_helper.c

3123

new_plane_state->crtc != crtc);

drivers/gpu/drm/drm_atomic_helper.c

3129

} else if (new_plane_state->crtc || disabling) {

drivers/gpu/drm/drm_atomic_helper.c

313

crtc_state = drm_atomic_get_new_crtc_state(state, new_connector_state->crtc);

drivers/gpu/drm/drm_atomic_helper.c

3140

crtc_funcs->atomic_flush(crtc, old_state);

drivers/gpu/drm/drm_atomic_helper.c

3164

struct drm_crtc *crtc = old_crtc_state->crtc;

drivers/gpu/drm/drm_atomic_helper.c

3166

crtc->helper_private;

drivers/gpu/drm/drm_atomic_helper.c

3170

crtc_funcs->atomic_begin(crtc, NULL);

drivers/gpu/drm/drm_atomic_helper.c

318

if (!new_connector_state->crtc) {

drivers/gpu/drm/drm_atomic_helper.c

3185

crtc_funcs->atomic_flush(crtc, NULL);

drivers/gpu/drm/drm_atomic_helper.c

3259

struct drm_crtc *crtc;

drivers/gpu/drm/drm_atomic_helper.c

3279

for_each_old_crtc_in_state(state, crtc, old_crtc_state, i) {

drivers/gpu/drm/drm_atomic_helper.c

328

new_connector_state->crtc);

drivers/gpu/drm/drm_atomic_helper.c

3323

for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {

drivers/gpu/drm/drm_atomic_helper.c

3324

WARN_ON(crtc->state != old_crtc_state);

drivers/gpu/drm/drm_atomic_helper.c

3330

crtc->state = new_crtc_state;

drivers/gpu/drm/drm_atomic_helper.c

3333

spin_lock(&crtc->commit_lock);

drivers/gpu/drm/drm_atomic_helper.c

3335

&crtc->commit_list);

drivers/gpu/drm/drm_atomic_helper.c

3336

spin_unlock(&crtc->commit_lock);

drivers/gpu/drm/drm_atomic_helper.c

3399

struct drm_crtc *crtc,

drivers/gpu/drm/drm_atomic_helper.c

3422

ret = drm_atomic_set_crtc_for_plane(plane_state, crtc);

drivers/gpu/drm/drm_atomic_helper.c

3435

if (plane == crtc->cursor)

drivers/gpu/drm/drm_atomic_helper.c

3473

if (plane_state->crtc && plane_state->crtc->cursor == plane)

drivers/gpu/drm/drm_atomic_helper.c

3507

struct drm_crtc *crtc = set->crtc;

drivers/gpu/drm/drm_atomic_helper.c

3510

state = drm_atomic_state_alloc(crtc->dev);

drivers/gpu/drm/drm_atomic_helper.c

3563

struct drm_crtc *crtc;

drivers/gpu/drm/drm_atomic_helper.c

3572

drm_for_each_crtc(crtc, dev) {

drivers/gpu/drm/drm_atomic_helper.c

3573

crtc_state = drm_atomic_get_crtc_state(state, crtc);

drivers/gpu/drm/drm_atomic_helper.c

3585

ret = drm_atomic_add_affected_planes(state, crtc);

drivers/gpu/drm/drm_atomic_helper.c

3589

ret = drm_atomic_add_affected_connectors(state, crtc);

drivers/gpu/drm/drm_atomic_helper.c

3634

int drm_atomic_helper_reset_crtc(struct drm_crtc *crtc,

drivers/gpu/drm/drm_atomic_helper.c

3641

state = drm_atomic_state_alloc(crtc->dev);

drivers/gpu/drm/drm_atomic_helper.c

3647

crtc_state = drm_atomic_get_crtc_state(state, crtc);

drivers/gpu/drm/drm_atomic_helper.c

3726

struct drm_crtc *crtc;

drivers/gpu/drm/drm_atomic_helper.c

3736

drm_for_each_crtc(crtc, dev) {

drivers/gpu/drm/drm_atomic_helper.c

3739

crtc_state = drm_atomic_get_crtc_state(state, crtc);

drivers/gpu/drm/drm_atomic_helper.c

375

if (!drm_encoder_crtc_ok(new_encoder, new_connector_state->crtc)) {

drivers/gpu/drm/drm_atomic_helper.c

380

new_connector_state->crtc->base.id,

drivers/gpu/drm/drm_atomic_helper.c

381

new_connector_state->crtc->name);

drivers/gpu/drm/drm_atomic_helper.c

3861

struct drm_crtc *crtc;

drivers/gpu/drm/drm_atomic_helper.c

3869

for_each_new_crtc_in_state(state, crtc, new_crtc_state, i)

drivers/gpu/drm/drm_atomic_helper.c

3870

state->crtcs[i].old_state = crtc->state;

drivers/gpu/drm/drm_atomic_helper.c

3919

struct drm_crtc *crtc,

drivers/gpu/drm/drm_atomic_helper.c

3924

struct drm_plane *plane = crtc->primary;

drivers/gpu/drm/drm_atomic_helper.c

3929

crtc_state = drm_atomic_get_crtc_state(state, crtc);

drivers/gpu/drm/drm_atomic_helper.c

394

new_connector_state->crtc->base.id,

drivers/gpu/drm/drm_atomic_helper.c

3940

ret = drm_atomic_set_crtc_for_plane(plane_state, crtc);

drivers/gpu/drm/drm_atomic_helper.c

3948

drm_dbg_atomic(crtc->dev,

drivers/gpu/drm/drm_atomic_helper.c

395

new_connector_state->crtc->name);

drivers/gpu/drm/drm_atomic_helper.c

3950

crtc->base.id, crtc->name);

drivers/gpu/drm/drm_atomic_helper.c

3974

int drm_atomic_helper_page_flip(struct drm_crtc *crtc,

drivers/gpu/drm/drm_atomic_helper.c

3980

struct drm_plane *plane = crtc->primary;

drivers/gpu/drm/drm_atomic_helper.c

3990

ret = page_flip_common(state, crtc, fb, event, flags);

drivers/gpu/drm/drm_atomic_helper.c

4017

int drm_atomic_helper_page_flip_target(struct drm_crtc *crtc,

drivers/gpu/drm/drm_atomic_helper.c

4024

struct drm_plane *plane = crtc->primary;

drivers/gpu/drm/drm_atomic_helper.c

4035

ret = page_flip_common(state, crtc, fb, event, flags);

drivers/gpu/drm/drm_atomic_helper.c

4039

crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/drm_atomic_helper.c

412

new_connector_state->crtc->base.id,

drivers/gpu/drm/drm_atomic_helper.c

413

new_connector_state->crtc->name);

drivers/gpu/drm/drm_atomic_helper.c

421

struct drm_crtc *crtc;

drivers/gpu/drm/drm_atomic_helper.c

428

for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) {

drivers/gpu/drm/drm_atomic_helper.c

441

WARN_ON(!!new_conn_state->best_encoder != !!new_conn_state->crtc);

drivers/gpu/drm/drm_atomic_helper.c

443

if (!new_conn_state->crtc || !new_conn_state->best_encoder)

drivers/gpu/drm/drm_atomic_helper.c

447

drm_atomic_get_new_crtc_state(state, new_conn_state->crtc);

drivers/gpu/drm/drm_atomic_helper.c

487

for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) {

drivers/gpu/drm/drm_atomic_helper.c

497

funcs = crtc->helper_private;

drivers/gpu/drm/drm_atomic_helper.c

501

ret = funcs->mode_fixup(crtc, &new_crtc_state->mode,

drivers/gpu/drm/drm_atomic_helper.c

504

drm_dbg_atomic(crtc->dev, "[CRTC:%d:%s] fixup failed\n",

drivers/gpu/drm/drm_atomic_helper.c

505

crtc->base.id, crtc->name);

drivers/gpu/drm/drm_atomic_helper.c

515

struct drm_crtc *crtc,

drivers/gpu/drm/drm_atomic_helper.c

538

ret = drm_crtc_mode_valid(crtc, mode);

drivers/gpu/drm/drm_atomic_helper.c

541

crtc->base.id, crtc->name);

drivers/gpu/drm/drm_atomic_helper.c

557

struct drm_crtc *crtc = conn_state->crtc;

drivers/gpu/drm/drm_atomic_helper.c

562

if (!crtc || !encoder)

drivers/gpu/drm/drm_atomic_helper.c

565

crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/drm_atomic_helper.c

573

mode_status = mode_valid_path(connector, encoder, crtc, mode);

drivers/gpu/drm/drm_atomic_helper.c

582

struct drm_crtc *crtc)

drivers/gpu/drm/drm_atomic_helper.c

586

crtc);

drivers/gpu/drm/drm_atomic_helper.c

588

drm_for_each_encoder_mask(drm_enc, crtc->dev, crtc_state->encoder_mask) {

drivers/gpu/drm/drm_atomic_helper.c

597

crtc->base.id, crtc_state->encoder_mask);

drivers/gpu/drm/drm_atomic_helper.c

652

struct drm_crtc *crtc;

drivers/gpu/drm/drm_atomic_helper.c

662

for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {

drivers/gpu/drm/drm_atomic_helper.c

666

WARN_ON(!drm_modeset_is_locked(&crtc->mutex));

drivers/gpu/drm/drm_atomic_helper.c

670

crtc->base.id, crtc->name);

drivers/gpu/drm/drm_atomic_helper.c

676

crtc->base.id, crtc->name);

drivers/gpu/drm/drm_atomic_helper.c

692

crtc->base.id, crtc->name);

drivers/gpu/drm/drm_atomic_helper.c

698

crtc->base.id, crtc->name,

drivers/gpu/drm/drm_atomic_helper.c

730

if (old_connector_state->crtc) {

drivers/gpu/drm/drm_atomic_helper.c

732

old_connector_state->crtc);

drivers/gpu/drm/drm_atomic_helper.c

760

for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {

drivers/gpu/drm/drm_atomic_helper.c

766

crtc->base.id, crtc->name,

drivers/gpu/drm/drm_atomic_helper.c

770

ret = drm_atomic_add_affected_connectors(state, crtc);

drivers/gpu/drm/drm_atomic_helper.c

774

ret = drm_atomic_add_affected_planes(state, crtc);

drivers/gpu/drm/drm_atomic_helper.c

778

ret = drm_atomic_check_valid_clones(state, crtc);

drivers/gpu/drm/drm_atomic_helper.c

87

if (old_plane_state->crtc) {

drivers/gpu/drm/drm_atomic_helper.c

89

old_plane_state->crtc);

drivers/gpu/drm/drm_atomic_helper.c

907

WARN_ON(plane_state->crtc && plane_state->crtc != crtc_state->crtc);

drivers/gpu/drm/drm_atomic_helper.c

918

if (WARN_ON(!plane_state->crtc)) {

drivers/gpu/drm/drm_atomic_helper.c

97

if (plane_state->crtc) {

drivers/gpu/drm/drm_atomic_helper.c

98

crtc_state = drm_atomic_get_new_crtc_state(state, plane_state->crtc);

drivers/gpu/drm/drm_atomic_helper.c

986

struct drm_crtc *crtc = crtc_state->crtc;

drivers/gpu/drm/drm_atomic_helper.c

987

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/drm_atomic_helper.c

996

drm_dbg_atomic(dev, "[CRTC:%d:%s] primary plane missing\n", crtc->base.id, crtc->name);

drivers/gpu/drm/drm_atomic_state_helper.c

100

if (drm_dev_has_vblank(crtc->dev))

drivers/gpu/drm/drm_atomic_state_helper.c

101

drm_crtc_vblank_reset(crtc);

drivers/gpu/drm/drm_atomic_state_helper.c

103

crtc->state = crtc_state;

drivers/gpu/drm/drm_atomic_state_helper.c

114

void drm_atomic_helper_crtc_reset(struct drm_crtc *crtc)

drivers/gpu/drm/drm_atomic_state_helper.c

117

kzalloc_obj(*crtc->state);

drivers/gpu/drm/drm_atomic_state_helper.c

119

if (crtc->state)

drivers/gpu/drm/drm_atomic_state_helper.c

120

crtc->funcs->atomic_destroy_state(crtc, crtc->state);

drivers/gpu/drm/drm_atomic_state_helper.c

122

__drm_atomic_helper_crtc_reset(crtc, crtc_state);

drivers/gpu/drm/drm_atomic_state_helper.c

134

void __drm_atomic_helper_crtc_duplicate_state(struct drm_crtc *crtc,

drivers/gpu/drm/drm_atomic_state_helper.c

137

memcpy(state, crtc->state, sizeof(*state));

drivers/gpu/drm/drm_atomic_state_helper.c

171

drm_atomic_helper_crtc_duplicate_state(struct drm_crtc *crtc)

drivers/gpu/drm/drm_atomic_state_helper.c

175

if (WARN_ON(!crtc->state))

drivers/gpu/drm/drm_atomic_state_helper.c

180

__drm_atomic_helper_crtc_duplicate_state(crtc, state);

drivers/gpu/drm/drm_atomic_state_helper.c

230

void drm_atomic_helper_crtc_destroy_state(struct drm_crtc *crtc,

drivers/gpu/drm/drm_atomic_state_helper.c

598

struct drm_crtc *crtc;

drivers/gpu/drm/drm_atomic_state_helper.c

600

crtc = new_conn_state->crtc;

drivers/gpu/drm/drm_atomic_state_helper.c

601

if (!crtc)

drivers/gpu/drm/drm_atomic_state_helper.c

604

crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/drm_atomic_state_helper.c

641

if (state->crtc)

drivers/gpu/drm/drm_atomic_state_helper.c

687

if (state->crtc)

drivers/gpu/drm/drm_atomic_state_helper.c

75

struct drm_crtc *crtc)

drivers/gpu/drm/drm_atomic_state_helper.c

77

crtc_state->crtc = crtc;

drivers/gpu/drm/drm_atomic_state_helper.c

94

__drm_atomic_helper_crtc_reset(struct drm_crtc *crtc,

drivers/gpu/drm/drm_atomic_state_helper.c

98

__drm_atomic_helper_crtc_state_reset(crtc_state, crtc);

drivers/gpu/drm/drm_atomic_uapi.c

101

drm_dbg_atomic(crtc->dev,

drivers/gpu/drm/drm_atomic_uapi.c

103

crtc->base.id, crtc->name, state);

drivers/gpu/drm/drm_atomic_uapi.c

1049

struct drm_crtc *crtc = obj_to_crtc(obj);

drivers/gpu/drm/drm_atomic_uapi.c

1051

WARN_ON(!drm_modeset_is_locked(&crtc->mutex));

drivers/gpu/drm/drm_atomic_uapi.c

1052

ret = drm_atomic_crtc_get_property(crtc,

drivers/gpu/drm/drm_atomic_uapi.c

1053

crtc->state, property, val);

drivers/gpu/drm/drm_atomic_uapi.c

1087

struct drm_crtc *crtc, uint64_t user_data)

drivers/gpu/drm/drm_atomic_uapi.c

1097

e->event.vbl.crtc_id = crtc->base.id;

drivers/gpu/drm/drm_atomic_uapi.c

1109

struct drm_crtc *crtc;

drivers/gpu/drm/drm_atomic_uapi.c

1127

crtc = connector->state->crtc;

drivers/gpu/drm/drm_atomic_uapi.c

1128

if (!crtc)

drivers/gpu/drm/drm_atomic_uapi.c

1130

ret = drm_atomic_add_affected_connectors(state, crtc);

drivers/gpu/drm/drm_atomic_uapi.c

1134

crtc_state = drm_atomic_get_crtc_state(state, crtc);

drivers/gpu/drm/drm_atomic_uapi.c

1141

if (new_conn_state->crtc != crtc)

drivers/gpu/drm/drm_atomic_uapi.c

1208

struct drm_crtc *crtc = obj_to_crtc(obj);

drivers/gpu/drm/drm_atomic_uapi.c

1211

crtc_state = drm_atomic_get_crtc_state(state, crtc);

drivers/gpu/drm/drm_atomic_uapi.c

1218

ret = drm_atomic_crtc_get_property(crtc, crtc_state,

drivers/gpu/drm/drm_atomic_uapi.c

1224

ret = drm_atomic_crtc_set_property(crtc,

drivers/gpu/drm/drm_atomic_uapi.c

126

struct drm_crtc *crtc = state->crtc;

drivers/gpu/drm/drm_atomic_uapi.c

1379

struct drm_crtc *crtc;

drivers/gpu/drm/drm_atomic_uapi.c

1388

for_each_new_crtc_in_state(state, crtc, crtc_state, i) {

drivers/gpu/drm/drm_atomic_uapi.c

1391

fence_ptr = get_out_fence_for_crtc(crtc_state->state, crtc);

drivers/gpu/drm/drm_atomic_uapi.c

1396

e = create_vblank_event(crtc, arg->user_data);

drivers/gpu/drm/drm_atomic_uapi.c

140

drm_dbg_atomic(crtc->dev,

drivers/gpu/drm/drm_atomic_uapi.c

142

crtc->base.id, crtc->name,

drivers/gpu/drm/drm_atomic_uapi.c

1432

fence = drm_crtc_create_fence(crtc);

drivers/gpu/drm/drm_atomic_uapi.c

147

ret = drm_mode_convert_umode(crtc->dev,

drivers/gpu/drm/drm_atomic_uapi.c

150

drm_dbg_atomic(crtc->dev,

drivers/gpu/drm/drm_atomic_uapi.c

1503

struct drm_crtc *crtc;

drivers/gpu/drm/drm_atomic_uapi.c

1516

for_each_new_crtc_in_state(state, crtc, crtc_state, i) {

drivers/gpu/drm/drm_atomic_uapi.c

152

crtc->base.id, crtc->name,

drivers/gpu/drm/drm_atomic_uapi.c

1550

struct drm_crtc *crtc;

drivers/gpu/drm/drm_atomic_uapi.c

1554

for_each_new_crtc_in_state(state, crtc, crtc_state, i) {

drivers/gpu/drm/drm_atomic_uapi.c

160

drm_dbg_atomic(crtc->dev,

drivers/gpu/drm/drm_atomic_uapi.c

162

state->mode.name, crtc->base.id, crtc->name,

drivers/gpu/drm/drm_atomic_uapi.c

166

drm_dbg_atomic(crtc->dev,

drivers/gpu/drm/drm_atomic_uapi.c

168

crtc->base.id, crtc->name, state);

drivers/gpu/drm/drm_atomic_uapi.c

191

struct drm_crtc *crtc)

drivers/gpu/drm/drm_atomic_uapi.c

196

if (plane_state->crtc == crtc)

drivers/gpu/drm/drm_atomic_uapi.c

198

if (plane_state->crtc) {

drivers/gpu/drm/drm_atomic_uapi.c

200

plane_state->crtc);

drivers/gpu/drm/drm_atomic_uapi.c

207

plane_state->crtc = crtc;

drivers/gpu/drm/drm_atomic_uapi.c

209

if (crtc) {

drivers/gpu/drm/drm_atomic_uapi.c

211

crtc);

drivers/gpu/drm/drm_atomic_uapi.c

217

if (crtc)

drivers/gpu/drm/drm_atomic_uapi.c

221

crtc->base.id, crtc->name);

drivers/gpu/drm/drm_atomic_uapi.c

305

struct drm_crtc *crtc)

drivers/gpu/drm/drm_atomic_uapi.c

310

if (conn_state->crtc == crtc)

drivers/gpu/drm/drm_atomic_uapi.c

313

if (conn_state->crtc) {

drivers/gpu/drm/drm_atomic_uapi.c

315

conn_state->crtc);

drivers/gpu/drm/drm_atomic_uapi.c

321

conn_state->crtc = NULL;

drivers/gpu/drm/drm_atomic_uapi.c

324

if (crtc) {

drivers/gpu/drm/drm_atomic_uapi.c

325

crtc_state = drm_atomic_get_crtc_state(conn_state->state, crtc);

drivers/gpu/drm/drm_atomic_uapi.c

333

conn_state->crtc = crtc;

drivers/gpu/drm/drm_atomic_uapi.c

338

conn_state, crtc->base.id, crtc->name);

drivers/gpu/drm/drm_atomic_uapi.c

351

struct drm_crtc *crtc, s32 __user *fence_ptr)

drivers/gpu/drm/drm_atomic_uapi.c

353

state->crtcs[drm_crtc_index(crtc)].out_fence_ptr = fence_ptr;

drivers/gpu/drm/drm_atomic_uapi.c

357

struct drm_crtc *crtc)

drivers/gpu/drm/drm_atomic_uapi.c

361

fence_ptr = state->crtcs[drm_crtc_index(crtc)].out_fence_ptr;

drivers/gpu/drm/drm_atomic_uapi.c

362

state->crtcs[drm_crtc_index(crtc)].out_fence_ptr = NULL;

drivers/gpu/drm/drm_atomic_uapi.c

396

static int drm_atomic_crtc_set_property(struct drm_crtc *crtc,

drivers/gpu/drm/drm_atomic_uapi.c

400

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/drm_atomic_uapi.c

419

ret = drm_object_immutable_property_get_value(&crtc->base,

drivers/gpu/drm/drm_atomic_uapi.c

444

ret = drm_object_immutable_property_get_value(&crtc->base,

drivers/gpu/drm/drm_atomic_uapi.c

466

set_out_fence_for_crtc(state->state, crtc, fence_ptr);

drivers/gpu/drm/drm_atomic_uapi.c

467

} else if (property == crtc->scaling_filter_property) {

drivers/gpu/drm/drm_atomic_uapi.c

469

} else if (property == crtc->sharpness_strength_property) {

drivers/gpu/drm/drm_atomic_uapi.c

471

} else if (crtc->funcs->atomic_set_property) {

drivers/gpu/drm/drm_atomic_uapi.c

472

return crtc->funcs->atomic_set_property(crtc, state, property, val);

drivers/gpu/drm/drm_atomic_uapi.c

474

drm_dbg_atomic(crtc->dev,

drivers/gpu/drm/drm_atomic_uapi.c

476

crtc->base.id, crtc->name,

drivers/gpu/drm/drm_atomic_uapi.c

485

drm_atomic_crtc_get_property(struct drm_crtc *crtc,

drivers/gpu/drm/drm_atomic_uapi.c

489

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/drm_atomic_uapi.c

506

else if (property == crtc->scaling_filter_property)

drivers/gpu/drm/drm_atomic_uapi.c

508

else if (property == crtc->sharpness_strength_property)

drivers/gpu/drm/drm_atomic_uapi.c

510

else if (crtc->funcs->atomic_get_property)

drivers/gpu/drm/drm_atomic_uapi.c

511

return crtc->funcs->atomic_get_property(crtc, state, property, val);

drivers/gpu/drm/drm_atomic_uapi.c

515

crtc->base.id, crtc->name,

drivers/gpu/drm/drm_atomic_uapi.c

551

struct drm_crtc *crtc = drm_crtc_find(dev, file_priv, val);

drivers/gpu/drm/drm_atomic_uapi.c

553

if (val && !crtc) {

drivers/gpu/drm/drm_atomic_uapi.c

559

return drm_atomic_set_crtc_for_plane(state, crtc);

drivers/gpu/drm/drm_atomic_uapi.c

656

*val = (state->crtc) ? state->crtc->base.id : 0;

drivers/gpu/drm/drm_atomic_uapi.c

72

struct drm_crtc *crtc = state->crtc;

drivers/gpu/drm/drm_atomic_uapi.c

831

struct drm_crtc *crtc = drm_crtc_find(dev, file_priv, val);

drivers/gpu/drm/drm_atomic_uapi.c

833

if (val && !crtc) {

drivers/gpu/drm/drm_atomic_uapi.c

839

return drm_atomic_set_crtc_for_connector(state, crtc);

drivers/gpu/drm/drm_atomic_uapi.c

86

blob = drm_property_create_blob(crtc->dev,

drivers/gpu/drm/drm_atomic_uapi.c

95

drm_dbg_atomic(crtc->dev,

drivers/gpu/drm/drm_atomic_uapi.c

957

*val = (state->crtc) ? state->crtc->base.id : 0;

drivers/gpu/drm/drm_atomic_uapi.c

959

if (state->crtc && state->crtc->state->self_refresh_active)

drivers/gpu/drm/drm_atomic_uapi.c

97

mode->name, crtc->base.id, crtc->name, state);

drivers/gpu/drm/drm_blend.c

448

static int drm_atomic_helper_crtc_normalize_zpos(struct drm_crtc *crtc,

drivers/gpu/drm/drm_blend.c

452

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/drm_blend.c

460

crtc->base.id, crtc->name);

drivers/gpu/drm/drm_blend.c

519

struct drm_crtc *crtc;

drivers/gpu/drm/drm_blend.c

526

crtc = new_plane_state->crtc;

drivers/gpu/drm/drm_blend.c

527

if (!crtc)

drivers/gpu/drm/drm_blend.c

530

new_crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/drm_blend.c

535

for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {

drivers/gpu/drm/drm_blend.c

538

ret = drm_atomic_helper_crtc_normalize_zpos(crtc,

drivers/gpu/drm/drm_bridge_helper.c

33

struct drm_crtc *crtc;

drivers/gpu/drm/drm_bridge_helper.c

51

crtc = connector->state->crtc;

drivers/gpu/drm/drm_bridge_helper.c

52

ret = drm_atomic_helper_reset_crtc(crtc, ctx);

drivers/gpu/drm/drm_client_modeset.c

1074

struct drm_plane *primary = mode_set->crtc->primary;

drivers/gpu/drm/drm_client_modeset.c

1094

struct drm_crtc *crtc = mode_set->crtc;

drivers/gpu/drm/drm_client_modeset.c

1095

struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/drm_client_modeset.c

112

drm_client_find_modeset(struct drm_client_dev *client, struct drm_crtc *crtc)

drivers/gpu/drm/drm_client_modeset.c

1143

struct drm_crtc *crtc = mode_set->crtc;

drivers/gpu/drm/drm_client_modeset.c

1145

if (crtc->funcs->cursor_set2) {

drivers/gpu/drm/drm_client_modeset.c

1146

ret = crtc->funcs->cursor_set2(crtc, NULL, 0, 0, 0, 0, 0);

drivers/gpu/drm/drm_client_modeset.c

1149

} else if (crtc->funcs->cursor_set) {

drivers/gpu/drm/drm_client_modeset.c

1150

ret = crtc->funcs->cursor_set(crtc, NULL, 0, 0, 0);

drivers/gpu/drm/drm_client_modeset.c

117

if (modeset->crtc == crtc)

drivers/gpu/drm/drm_client_modeset.c

1253

if (!modeset->crtc->enabled)

drivers/gpu/drm/drm_client_modeset.c

1312

struct drm_crtc *crtc;

drivers/gpu/drm/drm_client_modeset.c

1323

crtc = client->modesets[crtc_index].crtc;

drivers/gpu/drm/drm_client_modeset.c

1329

ret = drm_crtc_vblank_get(crtc);

drivers/gpu/drm/drm_client_modeset.c

1331

drm_crtc_wait_one_vblank(crtc);

drivers/gpu/drm/drm_client_modeset.c

1332

drm_crtc_vblank_put(crtc);

drivers/gpu/drm/drm_client_modeset.c

43

struct drm_crtc *crtc;

drivers/gpu/drm/drm_client_modeset.c

53

drm_for_each_crtc(crtc, dev)

drivers/gpu/drm/drm_client_modeset.c

532

struct drm_crtc *crtc)

drivers/gpu/drm/drm_client_modeset.c

537

if (encoder->possible_crtcs & drm_crtc_mask(crtc))

drivers/gpu/drm/drm_client_modeset.c

54

client->modesets[i++].crtc = crtc;

drivers/gpu/drm/drm_client_modeset.c

585

struct drm_crtc *crtc = modeset->crtc;

drivers/gpu/drm/drm_client_modeset.c

588

if (!connector_has_possible_crtc(connector, crtc))

drivers/gpu/drm/drm_client_modeset.c

592

if (best_crtcs[o] == crtc)

drivers/gpu/drm/drm_client_modeset.c

60

for (modeset = client->modesets; modeset->crtc; modeset++) {

drivers/gpu/drm/drm_client_modeset.c

604

crtcs[n] = crtc;

drivers/gpu/drm/drm_client_modeset.c

666

struct drm_crtc *crtc;

drivers/gpu/drm/drm_client_modeset.c

694

if (!encoder || drm_WARN_ON(dev, !connector->state->crtc)) {

drivers/gpu/drm/drm_client_modeset.c

707

crtc = connector->state->crtc;

drivers/gpu/drm/drm_client_modeset.c

715

if (crtcs[j] == crtc) {

drivers/gpu/drm/drm_client_modeset.c

742

&crtc->state->mode);

drivers/gpu/drm/drm_client_modeset.c

755

crtcs[i] = crtc;

drivers/gpu/drm/drm_client_modeset.c

759

crtc->base.id, crtc->name,

drivers/gpu/drm/drm_client_modeset.c

899

struct drm_crtc *crtc = crtcs[i];

drivers/gpu/drm/drm_client_modeset.c

902

if (mode && crtc) {

drivers/gpu/drm/drm_client_modeset.c

903

struct drm_mode_set *modeset = drm_client_find_modeset(client, crtc);

drivers/gpu/drm/drm_client_modeset.c

907

crtc->base.id, crtc->name,

drivers/gpu/drm/drm_client_modeset.c

963

struct drm_plane *plane = modeset->crtc->primary;

drivers/gpu/drm/drm_color_mgmt.c

166

void drm_crtc_enable_color_mgmt(struct drm_crtc *crtc,

drivers/gpu/drm/drm_color_mgmt.c

171

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/drm_color_mgmt.c

175

drm_object_attach_property(&crtc->base,

drivers/gpu/drm/drm_color_mgmt.c

177

drm_object_attach_property(&crtc->base,

drivers/gpu/drm/drm_color_mgmt.c

183

drm_object_attach_property(&crtc->base,

drivers/gpu/drm/drm_color_mgmt.c

187

drm_object_attach_property(&crtc->base,

drivers/gpu/drm/drm_color_mgmt.c

189

drm_object_attach_property(&crtc->base,

drivers/gpu/drm/drm_color_mgmt.c

208

int drm_mode_crtc_set_gamma_size(struct drm_crtc *crtc,

drivers/gpu/drm/drm_color_mgmt.c

214

crtc->gamma_size = gamma_size;

drivers/gpu/drm/drm_color_mgmt.c

216

crtc->gamma_store = kcalloc(gamma_size, sizeof(uint16_t) * 3,

drivers/gpu/drm/drm_color_mgmt.c

218

if (!crtc->gamma_store) {

drivers/gpu/drm/drm_color_mgmt.c

219

crtc->gamma_size = 0;

drivers/gpu/drm/drm_color_mgmt.c

223

r_base = crtc->gamma_store;

drivers/gpu/drm/drm_color_mgmt.c

244

static bool drm_crtc_supports_legacy_gamma(struct drm_crtc *crtc)

drivers/gpu/drm/drm_color_mgmt.c

246

u32 gamma_id = crtc->dev->mode_config.gamma_lut_property->base.id;

drivers/gpu/drm/drm_color_mgmt.c

247

u32 degamma_id = crtc->dev->mode_config.degamma_lut_property->base.id;

drivers/gpu/drm/drm_color_mgmt.c

249

if (!crtc->gamma_size)

drivers/gpu/drm/drm_color_mgmt.c

252

if (crtc->funcs->gamma_set)

drivers/gpu/drm/drm_color_mgmt.c

255

return !!(drm_mode_obj_find_prop_id(&crtc->base, gamma_id) ||

drivers/gpu/drm/drm_color_mgmt.c

256

drm_mode_obj_find_prop_id(&crtc->base, degamma_id));

drivers/gpu/drm/drm_color_mgmt.c

277

static int drm_crtc_legacy_gamma_set(struct drm_crtc *crtc,

drivers/gpu/drm/drm_color_mgmt.c

282

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/drm_color_mgmt.c

293

if (crtc->funcs->gamma_set)

drivers/gpu/drm/drm_color_mgmt.c

294

return crtc->funcs->gamma_set(crtc, red, green, blue, size, ctx);

drivers/gpu/drm/drm_color_mgmt.c

296

if (drm_mode_obj_find_prop_id(&crtc->base, gamma_id))

drivers/gpu/drm/drm_color_mgmt.c

298

else if (drm_mode_obj_find_prop_id(&crtc->base, degamma_id))

drivers/gpu/drm/drm_color_mgmt.c

303

state = drm_atomic_state_alloc(crtc->dev);

drivers/gpu/drm/drm_color_mgmt.c

325

crtc_state = drm_atomic_get_crtc_state(state, crtc);

drivers/gpu/drm/drm_color_mgmt.c

365

struct drm_crtc *crtc;

drivers/gpu/drm/drm_color_mgmt.c

374

crtc = drm_crtc_find(dev, file_priv, crtc_lut->crtc_id);

drivers/gpu/drm/drm_color_mgmt.c

375

if (!crtc)

drivers/gpu/drm/drm_color_mgmt.c

378

if (!drm_crtc_supports_legacy_gamma(crtc))

drivers/gpu/drm/drm_color_mgmt.c

382

if (crtc_lut->gamma_size != crtc->gamma_size)

drivers/gpu/drm/drm_color_mgmt.c

388

r_base = crtc->gamma_store;

drivers/gpu/drm/drm_color_mgmt.c

406

ret = drm_crtc_legacy_gamma_set(crtc, r_base, g_base, b_base,

drivers/gpu/drm/drm_color_mgmt.c

407

crtc->gamma_size, &ctx);

drivers/gpu/drm/drm_color_mgmt.c

434

struct drm_crtc *crtc;

drivers/gpu/drm/drm_color_mgmt.c

442

crtc = drm_crtc_find(dev, file_priv, crtc_lut->crtc_id);

drivers/gpu/drm/drm_color_mgmt.c

443

if (!crtc)

drivers/gpu/drm/drm_color_mgmt.c

447

if (crtc_lut->gamma_size != crtc->gamma_size)

drivers/gpu/drm/drm_color_mgmt.c

450

drm_modeset_lock(&crtc->mutex, NULL);

drivers/gpu/drm/drm_color_mgmt.c

452

r_base = crtc->gamma_store;

drivers/gpu/drm/drm_color_mgmt.c

470

drm_modeset_unlock(&crtc->mutex);

drivers/gpu/drm/drm_color_mgmt.c

651

void drm_crtc_load_gamma_888(struct drm_crtc *crtc, const struct drm_color_lut *lut,

drivers/gpu/drm/drm_color_mgmt.c

657

set_gamma(crtc, i, lut[i].red, lut[i].green, lut[i].blue);

drivers/gpu/drm/drm_color_mgmt.c

671

void drm_crtc_load_gamma_565_from_888(struct drm_crtc *crtc, const struct drm_color_lut *lut,

drivers/gpu/drm/drm_color_mgmt.c

681

set_gamma(crtc, i, r, g, b);

drivers/gpu/drm/drm_color_mgmt.c

686

set_gamma(crtc, i, 0, g, 0);

drivers/gpu/drm/drm_color_mgmt.c

701

void drm_crtc_load_gamma_555_from_888(struct drm_crtc *crtc, const struct drm_color_lut *lut,

drivers/gpu/drm/drm_color_mgmt.c

711

set_gamma(crtc, i, r, g, b);

drivers/gpu/drm/drm_color_mgmt.c

716

static void fill_gamma_888(struct drm_crtc *crtc, unsigned int i, u16 r, u16 g, u16 b,

drivers/gpu/drm/drm_color_mgmt.c

723

set_gamma(crtc, i, r, g, b);

drivers/gpu/drm/drm_color_mgmt.c

733

void drm_crtc_fill_gamma_888(struct drm_crtc *crtc, drm_crtc_set_lut_func set_gamma)

drivers/gpu/drm/drm_color_mgmt.c

738

fill_gamma_888(crtc, i, i, i, i, set_gamma);

drivers/gpu/drm/drm_color_mgmt.c

742

static void fill_gamma_565(struct drm_crtc *crtc, unsigned int i, u16 r, u16 g, u16 b,

drivers/gpu/drm/drm_color_mgmt.c

749

set_gamma(crtc, i, r, g, b);

drivers/gpu/drm/drm_color_mgmt.c

759

void drm_crtc_fill_gamma_565(struct drm_crtc *crtc, drm_crtc_set_lut_func set_gamma)

drivers/gpu/drm/drm_color_mgmt.c

764

fill_gamma_565(crtc, i, i, i, i, set_gamma);

drivers/gpu/drm/drm_color_mgmt.c

767

fill_gamma_565(crtc, i, 0, i, 0, set_gamma);

drivers/gpu/drm/drm_color_mgmt.c

771

static void fill_gamma_555(struct drm_crtc *crtc, unsigned int i, u16 r, u16 g, u16 b,

drivers/gpu/drm/drm_color_mgmt.c

778

set_gamma(crtc, i, r, g, b);

drivers/gpu/drm/drm_color_mgmt.c

788

void drm_crtc_fill_gamma_555(struct drm_crtc *crtc, drm_crtc_set_lut_func set_gamma)

drivers/gpu/drm/drm_color_mgmt.c

793

fill_gamma_555(crtc, i, i, i, i, set_gamma);

drivers/gpu/drm/drm_color_mgmt.c

810

void drm_crtc_load_palette_8(struct drm_crtc *crtc, const struct drm_color_lut *lut,

drivers/gpu/drm/drm_color_mgmt.c

816

set_palette(crtc, i, lut[i].red, lut[i].green, lut[i].blue);

drivers/gpu/drm/drm_color_mgmt.c

820

static void fill_palette_332(struct drm_crtc *crtc, u16 r, u16 g, u16 b,

drivers/gpu/drm/drm_color_mgmt.c

830

set_palette(crtc, i, r, g, b);

drivers/gpu/drm/drm_color_mgmt.c

840

void drm_crtc_fill_palette_332(struct drm_crtc *crtc, drm_crtc_set_lut_func set_palette)

drivers/gpu/drm/drm_color_mgmt.c

848

fill_palette_332(crtc, r, g, b, set_palette);

drivers/gpu/drm/drm_color_mgmt.c

854

static void fill_palette_8(struct drm_crtc *crtc, unsigned int i,

drivers/gpu/drm/drm_color_mgmt.c

859

set_palette(crtc, i, Y, Y, Y);

drivers/gpu/drm/drm_color_mgmt.c

869

void drm_crtc_fill_palette_8(struct drm_crtc *crtc, drm_crtc_set_lut_func set_palette)

drivers/gpu/drm/drm_color_mgmt.c

874

fill_palette_8(crtc, i, set_palette);

drivers/gpu/drm/drm_crtc.c

102

.crtc = crtc,

drivers/gpu/drm/drm_crtc.c

105

WARN_ON(drm_drv_uses_atomic_modeset(crtc->dev));

drivers/gpu/drm/drm_crtc.c

112

struct drm_crtc *crtc;

drivers/gpu/drm/drm_crtc.c

115

drm_for_each_crtc(crtc, dev) {

drivers/gpu/drm/drm_crtc.c

116

drm_debugfs_crtc_add(crtc);

drivers/gpu/drm/drm_crtc.c

118

if (crtc->funcs->late_register)

drivers/gpu/drm/drm_crtc.c

119

ret = crtc->funcs->late_register(crtc);

drivers/gpu/drm/drm_crtc.c

129

struct drm_crtc *crtc;

drivers/gpu/drm/drm_crtc.c

131

drm_for_each_crtc(crtc, dev) {

drivers/gpu/drm/drm_crtc.c

132

if (crtc->funcs->early_unregister)

drivers/gpu/drm/drm_crtc.c

133

crtc->funcs->early_unregister(crtc);

drivers/gpu/drm/drm_crtc.c

134

drm_debugfs_crtc_remove(crtc);

drivers/gpu/drm/drm_crtc.c

138

static int drm_crtc_crc_init(struct drm_crtc *crtc)

drivers/gpu/drm/drm_crtc.c

141

spin_lock_init(&crtc->crc.lock);

drivers/gpu/drm/drm_crtc.c

142

init_waitqueue_head(&crtc->crc.wq);

drivers/gpu/drm/drm_crtc.c

143

crtc->crc.source = kstrdup("auto", GFP_KERNEL);

drivers/gpu/drm/drm_crtc.c

144

if (!crtc->crc.source)

drivers/gpu/drm/drm_crtc.c

150

static void drm_crtc_crc_fini(struct drm_crtc *crtc)

drivers/gpu/drm/drm_crtc.c

153

kfree(crtc->crc.source);

drivers/gpu/drm/drm_crtc.c

167

struct drm_crtc *crtc = fence_to_crtc(fence);

drivers/gpu/drm/drm_crtc.c

169

return crtc->dev->driver->name;

drivers/gpu/drm/drm_crtc.c

174

struct drm_crtc *crtc = fence_to_crtc(fence);

drivers/gpu/drm/drm_crtc.c

176

return crtc->timeline_name;

drivers/gpu/drm/drm_crtc.c

184

struct dma_fence *drm_crtc_create_fence(struct drm_crtc *crtc)

drivers/gpu/drm/drm_crtc.c

192

dma_fence_init(fence, &drm_crtc_fence_ops, &crtc->fence_lock,

drivers/gpu/drm/drm_crtc.c

193

crtc->fence_context, ++crtc->fence_seqno);

drivers/gpu/drm/drm_crtc.c

254

static int __drm_crtc_init_with_planes(struct drm_device *dev, struct drm_crtc *crtc,

drivers/gpu/drm/drm_crtc.c

274

crtc->dev = dev;

drivers/gpu/drm/drm_crtc.c

275

crtc->funcs = funcs;

drivers/gpu/drm/drm_crtc.c

277

INIT_LIST_HEAD(&crtc->commit_list);

drivers/gpu/drm/drm_crtc.c

278

spin_lock_init(&crtc->commit_lock);

drivers/gpu/drm/drm_crtc.c

280

drm_modeset_lock_init(&crtc->mutex);

drivers/gpu/drm/drm_crtc.c

281

ret = drm_mode_object_add(dev, &crtc->base, DRM_MODE_OBJECT_CRTC);

drivers/gpu/drm/drm_crtc.c

286

crtc->name = kvasprintf(GFP_KERNEL, name, ap);

drivers/gpu/drm/drm_crtc.c

288

crtc->name = kasprintf(GFP_KERNEL, "crtc-%d", config->num_crtc);

drivers/gpu/drm/drm_crtc.c

290

if (!crtc->name) {

drivers/gpu/drm/drm_crtc.c

291

drm_mode_object_unregister(dev, &crtc->base);

drivers/gpu/drm/drm_crtc.c

295

crtc->fence_context = dma_fence_context_alloc(1);

drivers/gpu/drm/drm_crtc.c

296

spin_lock_init(&crtc->fence_lock);

drivers/gpu/drm/drm_crtc.c

297

snprintf(crtc->timeline_name, sizeof(crtc->timeline_name),

drivers/gpu/drm/drm_crtc.c

298

"CRTC:%d-%s", crtc->base.id, crtc->name);

drivers/gpu/drm/drm_crtc.c

300

crtc->base.properties = &crtc->properties;

drivers/gpu/drm/drm_crtc.c

302

list_add_tail(&crtc->head, &config->crtc_list);

drivers/gpu/drm/drm_crtc.c

303

crtc->index = config->num_crtc++;

drivers/gpu/drm/drm_crtc.c

305

crtc->primary = primary;

drivers/gpu/drm/drm_crtc.c

306

crtc->cursor = cursor;

drivers/gpu/drm/drm_crtc.c

308

primary->possible_crtcs = drm_crtc_mask(crtc);

drivers/gpu/drm/drm_crtc.c

310

cursor->possible_crtcs = drm_crtc_mask(crtc);

drivers/gpu/drm/drm_crtc.c

312

ret = drm_crtc_crc_init(crtc);

drivers/gpu/drm/drm_crtc.c

314

drm_mode_object_unregister(dev, &crtc->base);

drivers/gpu/drm/drm_crtc.c

319

drm_object_attach_property(&crtc->base, config->prop_active, 0);

drivers/gpu/drm/drm_crtc.c

320

drm_object_attach_property(&crtc->base, config->prop_mode_id, 0);

drivers/gpu/drm/drm_crtc.c

321

drm_object_attach_property(&crtc->base,

drivers/gpu/drm/drm_crtc.c

323

drm_object_attach_property(&crtc->base,

drivers/gpu/drm/drm_crtc.c

360

int drm_crtc_init_with_planes(struct drm_device *dev, struct drm_crtc *crtc,

drivers/gpu/drm/drm_crtc.c

372

ret = __drm_crtc_init_with_planes(dev, crtc, primary, cursor, funcs,

drivers/gpu/drm/drm_crtc.c

383

struct drm_crtc *crtc = ptr;

drivers/gpu/drm/drm_crtc.c

385

drm_crtc_cleanup(crtc);

drivers/gpu/drm/drm_crtc.c

390

struct drm_crtc *crtc,

drivers/gpu/drm/drm_crtc.c

401

ret = __drm_crtc_init_with_planes(dev, crtc, primary, cursor, funcs,

drivers/gpu/drm/drm_crtc.c

407

crtc);

drivers/gpu/drm/drm_crtc.c

442

int drmm_crtc_init_with_planes(struct drm_device *dev, struct drm_crtc *crtc,

drivers/gpu/drm/drm_crtc.c

452

ret = __drmm_crtc_init_with_planes(dev, crtc, primary, cursor, funcs,

drivers/gpu/drm/drm_crtc.c

470

struct drm_crtc *crtc;

drivers/gpu/drm/drm_crtc.c

481

crtc = container + offset;

drivers/gpu/drm/drm_crtc.c

484

ret = __drmm_crtc_init_with_planes(dev, crtc, primary, cursor, funcs,

drivers/gpu/drm/drm_crtc.c

502

void drm_crtc_cleanup(struct drm_crtc *crtc)

drivers/gpu/drm/drm_crtc.c

504

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/drm_crtc.c

511

drm_crtc_crc_fini(crtc);

drivers/gpu/drm/drm_crtc.c

513

kfree(crtc->gamma_store);

drivers/gpu/drm/drm_crtc.c

514

crtc->gamma_store = NULL;

drivers/gpu/drm/drm_crtc.c

516

drm_modeset_lock_fini(&crtc->mutex);

drivers/gpu/drm/drm_crtc.c

518

drm_mode_object_unregister(dev, &crtc->base);

drivers/gpu/drm/drm_crtc.c

519

list_del(&crtc->head);

drivers/gpu/drm/drm_crtc.c

522

WARN_ON(crtc->state && !crtc->funcs->atomic_destroy_state);

drivers/gpu/drm/drm_crtc.c

523

if (crtc->state && crtc->funcs->atomic_destroy_state)

drivers/gpu/drm/drm_crtc.c

524

crtc->funcs->atomic_destroy_state(crtc, crtc->state);

drivers/gpu/drm/drm_crtc.c

526

kfree(crtc->name);

drivers/gpu/drm/drm_crtc.c

528

memset(crtc, 0, sizeof(*crtc));

drivers/gpu/drm/drm_crtc.c

549

struct drm_crtc *crtc;

drivers/gpu/drm/drm_crtc.c

555

crtc = drm_crtc_find(dev, file_priv, crtc_resp->crtc_id);

drivers/gpu/drm/drm_crtc.c

556

if (!crtc)

drivers/gpu/drm/drm_crtc.c

559

plane = crtc->primary;

drivers/gpu/drm/drm_crtc.c

561

crtc_resp->gamma_size = crtc->gamma_size;

drivers/gpu/drm/drm_crtc.c

577

drm_modeset_lock(&crtc->mutex, NULL);

drivers/gpu/drm/drm_crtc.c

578

if (crtc->state) {

drivers/gpu/drm/drm_crtc.c

579

if (crtc->state->enable) {

drivers/gpu/drm/drm_crtc.c

580

drm_mode_convert_to_umode(&crtc_resp->mode, &crtc->state->mode);

drivers/gpu/drm/drm_crtc.c

586

crtc_resp->x = crtc->x;

drivers/gpu/drm/drm_crtc.c

587

crtc_resp->y = crtc->y;

drivers/gpu/drm/drm_crtc.c

589

if (crtc->enabled) {

drivers/gpu/drm/drm_crtc.c

590

drm_mode_convert_to_umode(&crtc_resp->mode, &crtc->mode);

drivers/gpu/drm/drm_crtc.c

599

drm_modeset_unlock(&crtc->mutex);

drivers/gpu/drm/drm_crtc.c

607

struct drm_crtc *crtc = set->crtc;

drivers/gpu/drm/drm_crtc.c

612

WARN_ON(drm_drv_uses_atomic_modeset(crtc->dev));

drivers/gpu/drm/drm_crtc.c

619

drm_for_each_crtc(tmp, crtc->dev) {

drivers/gpu/drm/drm_crtc.c

627

ret = crtc->funcs->set_config(set, ctx);

drivers/gpu/drm/drm_crtc.c

629

struct drm_plane *plane = crtc->primary;

drivers/gpu/drm/drm_crtc.c

631

plane->crtc = fb ? crtc : NULL;

drivers/gpu/drm/drm_crtc.c

635

drm_for_each_crtc(tmp, crtc->dev) {

drivers/gpu/drm/drm_crtc.c

663

WARN_ON(drm_drv_uses_atomic_modeset(set->crtc->dev));

drivers/gpu/drm/drm_crtc.c

678

int drm_crtc_check_viewport(const struct drm_crtc *crtc,

drivers/gpu/drm/drm_crtc.c

688

if (crtc->state &&

drivers/gpu/drm/drm_crtc.c

689

drm_rotation_90_or_270(crtc->primary->state->rotation))

drivers/gpu/drm/drm_crtc.c

716

struct drm_crtc *crtc;

drivers/gpu/drm/drm_crtc.c

736

crtc = drm_crtc_find(dev, file_priv, crtc_req->crtc_id);

drivers/gpu/drm/drm_crtc.c

737

if (!crtc) {

drivers/gpu/drm/drm_crtc.c

741

drm_dbg_kms(dev, "[CRTC:%d:%s]\n", crtc->base.id, crtc->name);

drivers/gpu/drm/drm_crtc.c

743

plane = crtc->primary;

drivers/gpu/drm/drm_crtc.c

819

ret = drm_crtc_check_viewport(crtc, crtc_req->x, crtc_req->y,

drivers/gpu/drm/drm_crtc.c

878

set.crtc = crtc;

drivers/gpu/drm/drm_crtc.c

887

ret = crtc->funcs->set_config(&set, &ctx);

drivers/gpu/drm/drm_crtc.c

89

struct drm_crtc *crtc;

drivers/gpu/drm/drm_crtc.c

91

drm_for_each_crtc(crtc, dev)

drivers/gpu/drm/drm_crtc.c

92

if (idx == crtc->index)

drivers/gpu/drm/drm_crtc.c

920

struct drm_crtc *crtc = obj_to_crtc(obj);

drivers/gpu/drm/drm_crtc.c

922

if (crtc->funcs->set_property)

drivers/gpu/drm/drm_crtc.c

923

ret = crtc->funcs->set_property(crtc, property, value);

drivers/gpu/drm/drm_crtc.c

93

return crtc;

drivers/gpu/drm/drm_crtc.c

944

int drm_crtc_create_scaling_filter_property(struct drm_crtc *crtc,

drivers/gpu/drm/drm_crtc.c

948

drm_create_scaling_filter_prop(crtc->dev, supported_filters);

drivers/gpu/drm/drm_crtc.c

953

drm_object_attach_property(&crtc->base, prop,

drivers/gpu/drm/drm_crtc.c

955

crtc->scaling_filter_property = prop;

drivers/gpu/drm/drm_crtc.c

961

int drm_crtc_create_sharpness_strength_property(struct drm_crtc *crtc)

drivers/gpu/drm/drm_crtc.c

963

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/drm_crtc.c

970

crtc->sharpness_strength_property = prop;

drivers/gpu/drm/drm_crtc.c

971

drm_object_attach_property(&crtc->base, prop, 0);

drivers/gpu/drm/drm_crtc.c

99

int drm_crtc_force_disable(struct drm_crtc *crtc)

drivers/gpu/drm/drm_crtc_helper.c

1003

drm_err(dev, "failed to set mode on crtc %p\n", crtc);

drivers/gpu/drm/drm_crtc_helper.c

1006

if (drm_helper_choose_crtc_dpms(crtc)) {

drivers/gpu/drm/drm_crtc_helper.c

1009

if(encoder->crtc != crtc)

drivers/gpu/drm/drm_crtc_helper.c

1018

crtc_funcs = crtc->helper_private;

drivers/gpu/drm/drm_crtc_helper.c

1020

(*crtc_funcs->dpms) (crtc,

drivers/gpu/drm/drm_crtc_helper.c

1021

drm_helper_choose_crtc_dpms(crtc));

drivers/gpu/drm/drm_crtc_helper.c

1046

struct drm_crtc *crtc;

drivers/gpu/drm/drm_crtc_helper.c

1050

drm_for_each_crtc(crtc, dev)

drivers/gpu/drm/drm_crtc_helper.c

1051

if (crtc->enabled) {

drivers/gpu/drm/drm_crtc_helper.c

1053

.crtc = crtc,

drivers/gpu/drm/drm_crtc_helper.c

148

bool drm_helper_crtc_in_use(struct drm_crtc *crtc)

drivers/gpu/drm/drm_crtc_helper.c

151

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/drm_crtc_helper.c

163

if (encoder->crtc == crtc && drm_helper_encoder_in_use(encoder))

drivers/gpu/drm/drm_crtc_helper.c

186

struct drm_crtc *crtc;

drivers/gpu/drm/drm_crtc_helper.c

194

encoder->crtc = NULL;

drivers/gpu/drm/drm_crtc_helper.c

198

drm_for_each_crtc(crtc, dev) {

drivers/gpu/drm/drm_crtc_helper.c

199

const struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private;

drivers/gpu/drm/drm_crtc_helper.c

201

crtc->enabled = drm_helper_crtc_in_use(crtc);

drivers/gpu/drm/drm_crtc_helper.c

202

if (!crtc->enabled) {

drivers/gpu/drm/drm_crtc_helper.c

204

(*crtc_funcs->disable)(crtc);

drivers/gpu/drm/drm_crtc_helper.c

206

(*crtc_funcs->dpms)(crtc, DRM_MODE_DPMS_OFF);

drivers/gpu/drm/drm_crtc_helper.c

207

crtc->primary->fb = NULL;

drivers/gpu/drm/drm_crtc_helper.c

258

if (encoder->crtc == NULL)

drivers/gpu/drm/drm_crtc_helper.c

283

bool drm_crtc_helper_set_mode(struct drm_crtc *crtc,

drivers/gpu/drm/drm_crtc_helper.c

288

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/drm_crtc_helper.c

290

const struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private;

drivers/gpu/drm/drm_crtc_helper.c

301

saved_enabled = crtc->enabled;

drivers/gpu/drm/drm_crtc_helper.c

302

crtc->enabled = drm_helper_crtc_in_use(crtc);

drivers/gpu/drm/drm_crtc_helper.c

303

if (!crtc->enabled)

drivers/gpu/drm/drm_crtc_helper.c

308

crtc->enabled = saved_enabled;

drivers/gpu/drm/drm_crtc_helper.c

312

drm_mode_init(&saved_mode, &crtc->mode);

drivers/gpu/drm/drm_crtc_helper.c

313

drm_mode_init(&saved_hwmode, &crtc->hwmode);

drivers/gpu/drm/drm_crtc_helper.c

314

saved_x = crtc->x;

drivers/gpu/drm/drm_crtc_helper.c

315

saved_y = crtc->y;

drivers/gpu/drm/drm_crtc_helper.c

320

drm_mode_copy(&crtc->mode, mode);

drivers/gpu/drm/drm_crtc_helper.c

321

crtc->x = x;

drivers/gpu/drm/drm_crtc_helper.c

322

crtc->y = y;

drivers/gpu/drm/drm_crtc_helper.c

330

if (encoder->crtc != crtc)

drivers/gpu/drm/drm_crtc_helper.c

348

if (!(ret = crtc_funcs->mode_fixup(crtc, mode,

drivers/gpu/drm/drm_crtc_helper.c

351

crtc->base.id, crtc->name);

drivers/gpu/drm/drm_crtc_helper.c

355

drm_dbg_kms(dev, "[CRTC:%d:%s]\n", crtc->base.id, crtc->name);

drivers/gpu/drm/drm_crtc_helper.c

357

drm_mode_copy(&crtc->hwmode, adjusted_mode);

drivers/gpu/drm/drm_crtc_helper.c

362

if (encoder->crtc != crtc)

drivers/gpu/drm/drm_crtc_helper.c

376

crtc_funcs->prepare(crtc);

drivers/gpu/drm/drm_crtc_helper.c

381

ret = !crtc_funcs->mode_set(crtc, mode, adjusted_mode, x, y, old_fb);

drivers/gpu/drm/drm_crtc_helper.c

387

if (encoder->crtc != crtc)

drivers/gpu/drm/drm_crtc_helper.c

401

crtc_funcs->commit(crtc);

drivers/gpu/drm/drm_crtc_helper.c

405

if (encoder->crtc != crtc)

drivers/gpu/drm/drm_crtc_helper.c

420

drm_calc_timestamping_constants(crtc, &crtc->hwmode);

drivers/gpu/drm/drm_crtc_helper.c

426

crtc->enabled = saved_enabled;

drivers/gpu/drm/drm_crtc_helper.c

427

drm_mode_copy(&crtc->mode, &saved_mode);

drivers/gpu/drm/drm_crtc_helper.c

428

drm_mode_copy(&crtc->hwmode, &saved_hwmode);

drivers/gpu/drm/drm_crtc_helper.c

429

crtc->x = saved_x;

drivers/gpu/drm/drm_crtc_helper.c

430

crtc->y = saved_y;

drivers/gpu/drm/drm_crtc_helper.c

449

int drm_crtc_helper_atomic_check(struct drm_crtc *crtc, struct drm_atomic_state *state)

drivers/gpu/drm/drm_crtc_helper.c

451

struct drm_crtc_state *new_crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/drm_crtc_helper.c

461

drm_crtc_helper_disable(struct drm_crtc *crtc)

drivers/gpu/drm/drm_crtc_helper.c

463

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/drm_crtc_helper.c

471

if (encoder->crtc != crtc)

drivers/gpu/drm/drm_crtc_helper.c

569

BUG_ON(!set->crtc);

drivers/gpu/drm/drm_crtc_helper.c

570

BUG_ON(!set->crtc->helper_private);

drivers/gpu/drm/drm_crtc_helper.c

576

crtc_funcs = set->crtc->helper_private;

drivers/gpu/drm/drm_crtc_helper.c

578

dev = set->crtc->dev;

drivers/gpu/drm/drm_crtc_helper.c

589

set->crtc->base.id, set->crtc->name,

drivers/gpu/drm/drm_crtc_helper.c

594

set->crtc->base.id, set->crtc->name);

drivers/gpu/drm/drm_crtc_helper.c

595

drm_crtc_helper_disable(set->crtc);

drivers/gpu/drm/drm_crtc_helper.c

624

save_encoder_crtcs[count++] = encoder->crtc;

drivers/gpu/drm/drm_crtc_helper.c

633

save_set.crtc = set->crtc;

drivers/gpu/drm/drm_crtc_helper.c

634

save_set.mode = &set->crtc->mode;

drivers/gpu/drm/drm_crtc_helper.c

635

save_set.x = set->crtc->x;

drivers/gpu/drm/drm_crtc_helper.c

636

save_set.y = set->crtc->y;

drivers/gpu/drm/drm_crtc_helper.c

637

save_set.fb = set->crtc->primary->fb;

drivers/gpu/drm/drm_crtc_helper.c

641

if (set->crtc->primary->fb != set->fb) {

drivers/gpu/drm/drm_crtc_helper.c

643

if (set->crtc->primary->fb == NULL) {

drivers/gpu/drm/drm_crtc_helper.c

645

set->crtc->base.id, set->crtc->name);

drivers/gpu/drm/drm_crtc_helper.c

647

} else if (set->fb->format != set->crtc->primary->fb->format) {

drivers/gpu/drm/drm_crtc_helper.c

653

if (set->x != set->crtc->x || set->y != set->crtc->y)

drivers/gpu/drm/drm_crtc_helper.c

656

if (!drm_mode_equal(set->mode, &set->crtc->mode)) {

drivers/gpu/drm/drm_crtc_helper.c

658

set->crtc->base.id, set->crtc->name);

drivers/gpu/drm/drm_crtc_helper.c

659

drm_dbg_kms(dev, DRM_MODE_FMT "\n", DRM_MODE_ARG(&set->crtc->mode));

drivers/gpu/drm/drm_crtc_helper.c

711

connector->encoder->crtc = NULL;

drivers/gpu/drm/drm_crtc_helper.c

728

if (connector->encoder->crtc == set->crtc)

drivers/gpu/drm/drm_crtc_helper.c

731

new_crtc = connector->encoder->crtc;

drivers/gpu/drm/drm_crtc_helper.c

735

new_crtc = set->crtc;

drivers/gpu/drm/drm_crtc_helper.c

745

if (new_crtc != connector->encoder->crtc) {

drivers/gpu/drm/drm_crtc_helper.c

749

connector->encoder->crtc = new_crtc;

drivers/gpu/drm/drm_crtc_helper.c

767

if (drm_helper_crtc_in_use(set->crtc)) {

drivers/gpu/drm/drm_crtc_helper.c

769

set->crtc->base.id, set->crtc->name, DRM_MODE_ARG(set->mode));

drivers/gpu/drm/drm_crtc_helper.c

770

set->crtc->primary->fb = set->fb;

drivers/gpu/drm/drm_crtc_helper.c

771

if (!drm_crtc_helper_set_mode(set->crtc, set->mode,

drivers/gpu/drm/drm_crtc_helper.c

775

set->crtc->base.id, set->crtc->name);

drivers/gpu/drm/drm_crtc_helper.c

776

set->crtc->primary->fb = save_set.fb;

drivers/gpu/drm/drm_crtc_helper.c

781

set->crtc->base.id, set->crtc->name);

drivers/gpu/drm/drm_crtc_helper.c

790

set->crtc->x = set->x;

drivers/gpu/drm/drm_crtc_helper.c

791

set->crtc->y = set->y;

drivers/gpu/drm/drm_crtc_helper.c

792

set->crtc->primary->fb = set->fb;

drivers/gpu/drm/drm_crtc_helper.c

793

ret = crtc_funcs->mode_set_base(set->crtc,

drivers/gpu/drm/drm_crtc_helper.c

796

set->crtc->x = save_set.x;

drivers/gpu/drm/drm_crtc_helper.c

797

set->crtc->y = save_set.y;

drivers/gpu/drm/drm_crtc_helper.c

798

set->crtc->primary->fb = save_set.fb;

drivers/gpu/drm/drm_crtc_helper.c

811

encoder->crtc = save_encoder_crtcs[count++];

drivers/gpu/drm/drm_crtc_helper.c

831

!drm_crtc_helper_set_mode(save_set.crtc, save_set.mode, save_set.x,

drivers/gpu/drm/drm_crtc_helper.c

871

static int drm_helper_choose_crtc_dpms(struct drm_crtc *crtc)

drivers/gpu/drm/drm_crtc_helper.c

876

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/drm_crtc_helper.c

880

if (connector->encoder && connector->encoder->crtc == crtc)

drivers/gpu/drm/drm_crtc_helper.c

912

struct drm_crtc *crtc = encoder ? encoder->crtc : NULL;

drivers/gpu/drm/drm_crtc_helper.c

928

if (crtc) {

drivers/gpu/drm/drm_crtc_helper.c

929

const struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private;

drivers/gpu/drm/drm_crtc_helper.c

932

(*crtc_funcs->dpms) (crtc,

drivers/gpu/drm/drm_crtc_helper.c

933

drm_helper_choose_crtc_dpms(crtc));

drivers/gpu/drm/drm_crtc_helper.c

943

if (crtc) {

drivers/gpu/drm/drm_crtc_helper.c

944

const struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private;

drivers/gpu/drm/drm_crtc_helper.c

947

(*crtc_funcs->dpms) (crtc,

drivers/gpu/drm/drm_crtc_helper.c

948

drm_helper_choose_crtc_dpms(crtc));

drivers/gpu/drm/drm_crtc_helper.c

984

struct drm_crtc *crtc;

drivers/gpu/drm/drm_crtc_helper.c

993

drm_for_each_crtc(crtc, dev) {

drivers/gpu/drm/drm_crtc_helper.c

995

if (!crtc->enabled)

drivers/gpu/drm/drm_crtc_helper.c

998

ret = drm_crtc_helper_set_mode(crtc, &crtc->mode,

drivers/gpu/drm/drm_crtc_helper.c

999

crtc->x, crtc->y, crtc->primary->fb);

drivers/gpu/drm/drm_crtc_helper_internal.h

40

enum drm_mode_status drm_crtc_mode_valid(struct drm_crtc *crtc,

drivers/gpu/drm/drm_crtc_internal.h

75

int drm_crtc_check_viewport(const struct drm_crtc *crtc,

drivers/gpu/drm/drm_crtc_internal.h

81

int drm_crtc_force_disable(struct drm_crtc *crtc);

drivers/gpu/drm/drm_crtc_internal.h

83

struct dma_fence *drm_crtc_create_fence(struct drm_crtc *crtc);

drivers/gpu/drm/drm_damage_helper.c

232

if (!state || !state->crtc || !state->fb || !state->visible)

drivers/gpu/drm/drm_damage_helper.c

74

if (plane_state->crtc) {

drivers/gpu/drm/drm_damage_helper.c

76

plane_state->crtc);

drivers/gpu/drm/drm_debugfs.c

834

void drm_debugfs_crtc_add(struct drm_crtc *crtc)

drivers/gpu/drm/drm_debugfs.c

836

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/drm_debugfs.c

840

name = kasprintf(GFP_KERNEL, "crtc-%d", crtc->index);

drivers/gpu/drm/drm_debugfs.c

847

crtc->debugfs_entry = root;

drivers/gpu/drm/drm_debugfs.c

849

drm_debugfs_crtc_crc_add(crtc);

drivers/gpu/drm/drm_debugfs.c

852

void drm_debugfs_crtc_remove(struct drm_crtc *crtc)

drivers/gpu/drm/drm_debugfs.c

854

debugfs_remove_recursive(crtc->debugfs_entry);

drivers/gpu/drm/drm_debugfs.c

855

crtc->debugfs_entry = NULL;

drivers/gpu/drm/drm_debugfs_crc.c

101

if (strcmp(sources[i], crtc->crc.source))

drivers/gpu/drm/drm_debugfs_crc.c

110

seq_printf(m, "%s*\n", crtc->crc.source);

drivers/gpu/drm/drm_debugfs_crc.c

116

struct drm_crtc *crtc = inode->i_private;

drivers/gpu/drm/drm_debugfs_crc.c

118

return single_open(file, crc_control_show, crtc);

drivers/gpu/drm/drm_debugfs_crc.c

125

struct drm_crtc *crtc = m->private;

drivers/gpu/drm/drm_debugfs_crc.c

126

struct drm_crtc_crc *crc = &crtc->crc;

drivers/gpu/drm/drm_debugfs_crc.c

147

ret = crtc->funcs->verify_crc_source(crtc, source, &values_cnt);

drivers/gpu/drm/drm_debugfs_crc.c

198

struct drm_crtc *crtc = inode->i_private;

drivers/gpu/drm/drm_debugfs_crc.c

199

struct drm_crtc_crc *crc = &crtc->crc;

drivers/gpu/drm/drm_debugfs_crc.c

204

if (drm_drv_uses_atomic_modeset(crtc->dev)) {

drivers/gpu/drm/drm_debugfs_crc.c

205

ret = drm_modeset_lock_single_interruptible(&crtc->mutex);

drivers/gpu/drm/drm_debugfs_crc.c

209

if (!crtc->state->active)

drivers/gpu/drm/drm_debugfs_crc.c

211

drm_modeset_unlock(&crtc->mutex);

drivers/gpu/drm/drm_debugfs_crc.c

217

ret = crtc->funcs->verify_crc_source(crtc, crc->source, &values_cnt);

drivers/gpu/drm/drm_debugfs_crc.c

246

ret = crtc->funcs->set_crc_source(crtc, crc->source);

drivers/gpu/drm/drm_debugfs_crc.c

261

struct drm_crtc *crtc = filep->f_inode->i_private;

drivers/gpu/drm/drm_debugfs_crc.c

262

struct drm_crtc_crc *crc = &crtc->crc;

drivers/gpu/drm/drm_debugfs_crc.c

269

crtc->funcs->set_crc_source(crtc, NULL);

drivers/gpu/drm/drm_debugfs_crc.c

288

struct drm_crtc *crtc = filep->f_inode->i_private;

drivers/gpu/drm/drm_debugfs_crc.c

289

struct drm_crtc_crc *crc = &crtc->crc;

drivers/gpu/drm/drm_debugfs_crc.c

347

struct drm_crtc *crtc = file->f_inode->i_private;

drivers/gpu/drm/drm_debugfs_crc.c

348

struct drm_crtc_crc *crc = &crtc->crc;

drivers/gpu/drm/drm_debugfs_crc.c

369

void drm_debugfs_crtc_crc_add(struct drm_crtc *crtc)

drivers/gpu/drm/drm_debugfs_crc.c

373

if (!crtc->funcs->set_crc_source || !crtc->funcs->verify_crc_source)

drivers/gpu/drm/drm_debugfs_crc.c

376

crc_ent = debugfs_create_dir("crc", crtc->debugfs_entry);

drivers/gpu/drm/drm_debugfs_crc.c

378

debugfs_create_file("control", S_IRUGO | S_IWUSR, crc_ent, crtc,

drivers/gpu/drm/drm_debugfs_crc.c

380

debugfs_create_file("data", S_IRUGO, crc_ent, crtc,

drivers/gpu/drm/drm_debugfs_crc.c

394

int drm_crtc_add_crc_entry(struct drm_crtc *crtc, bool has_frame,

drivers/gpu/drm/drm_debugfs_crc.c

397

struct drm_crtc_crc *crc = &crtc->crc;

drivers/gpu/drm/drm_debugfs_crc.c

86

struct drm_crtc *crtc = m->private;

drivers/gpu/drm/drm_debugfs_crc.c

88

if (crtc->funcs->get_crc_sources) {

drivers/gpu/drm/drm_debugfs_crc.c

90

const char *const *sources = crtc->funcs->get_crc_sources(crtc,

drivers/gpu/drm/drm_debugfs_crc.c

99

if (!crtc->funcs->verify_crc_source(crtc, sources[i],

drivers/gpu/drm/drm_encoder.c

324

return connector->state->crtc;

drivers/gpu/drm/drm_encoder.c

332

return encoder->crtc;

drivers/gpu/drm/drm_encoder.c

340

struct drm_crtc *crtc;

drivers/gpu/drm/drm_encoder.c

350

crtc = drm_encoder_get_crtc(encoder);

drivers/gpu/drm/drm_encoder.c

351

if (crtc && drm_lease_held(file_priv, crtc->base.id))

drivers/gpu/drm/drm_encoder.c

352

enc_resp->crtc_id = crtc->base.id;

drivers/gpu/drm/drm_fb_helper.c

1318

struct drm_crtc *crtc = mode_set->crtc;

drivers/gpu/drm/drm_fb_helper.c

1319

struct drm_plane *plane = crtc->primary;

drivers/gpu/drm/drm_fb_helper.c

1321

drm_dbg_kms(dev, "test CRTC %u primary plane\n", drm_crtc_index(crtc));

drivers/gpu/drm/drm_fb_helper.c

694

struct drm_crtc *crtc;

drivers/gpu/drm/drm_fb_helper.c

700

crtc = modeset->crtc;

drivers/gpu/drm/drm_fb_helper.c

701

if (!crtc->funcs->gamma_set || !crtc->gamma_size) {

drivers/gpu/drm/drm_fb_helper.c

706

if (cmap->start + cmap->len > crtc->gamma_size) {

drivers/gpu/drm/drm_fb_helper.c

711

r = crtc->gamma_store;

drivers/gpu/drm/drm_fb_helper.c

712

g = r + crtc->gamma_size;

drivers/gpu/drm/drm_fb_helper.c

713

b = g + crtc->gamma_size;

drivers/gpu/drm/drm_fb_helper.c

719

ret = crtc->funcs->gamma_set(crtc, r, g, b,

drivers/gpu/drm/drm_fb_helper.c

720

crtc->gamma_size, NULL);

drivers/gpu/drm/drm_fb_helper.c

730

static struct drm_property_blob *setcmap_new_gamma_lut(struct drm_crtc *crtc,

drivers/gpu/drm/drm_fb_helper.c

733

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/drm_fb_helper.c

736

int size = crtc->gamma_size;

drivers/gpu/drm/drm_fb_helper.c

748

u16 *r = crtc->gamma_store;

drivers/gpu/drm/drm_fb_helper.c

749

u16 *g = r + crtc->gamma_size;

drivers/gpu/drm/drm_fb_helper.c

750

u16 *b = g + crtc->gamma_size;

drivers/gpu/drm/drm_fb_helper.c

782

struct drm_crtc *crtc;

drivers/gpu/drm/drm_fb_helper.c

798

crtc = modeset->crtc;

drivers/gpu/drm/drm_fb_helper.c

801

gamma_lut = setcmap_new_gamma_lut(crtc, cmap);

drivers/gpu/drm/drm_fb_helper.c

808

crtc_state = drm_atomic_get_crtc_state(state, crtc);

drivers/gpu/drm/drm_fb_helper.c

832

crtc = modeset->crtc;

drivers/gpu/drm/drm_fb_helper.c

834

r = crtc->gamma_store;

drivers/gpu/drm/drm_fb_helper.c

835

g = r + crtc->gamma_size;

drivers/gpu/drm/drm_fb_helper.c

836

b = g + crtc->gamma_size;

drivers/gpu/drm/drm_framebuffer.c

1043

if (disable_crtcs && plane_state->crtc->primary == plane) {

drivers/gpu/drm/drm_framebuffer.c

1048

plane_state->crtc->base.id,

drivers/gpu/drm/drm_framebuffer.c

1049

plane_state->crtc->name, fb->base.id);

drivers/gpu/drm/drm_framebuffer.c

1051

crtc_state = drm_atomic_get_new_crtc_state(state, plane_state->crtc);

drivers/gpu/drm/drm_framebuffer.c

1053

ret = drm_atomic_add_affected_connectors(state, plane_state->crtc);

drivers/gpu/drm/drm_framebuffer.c

1106

struct drm_crtc *crtc;

drivers/gpu/drm/drm_framebuffer.c

1111

drm_for_each_crtc(crtc, dev) {

drivers/gpu/drm/drm_framebuffer.c

1112

if (crtc->primary->fb == fb) {

drivers/gpu/drm/drm_framebuffer.c

1115

crtc->base.id, crtc->name, fb->base.id);

drivers/gpu/drm/drm_framebuffer.c

1118

if (drm_crtc_force_disable(crtc))

drivers/gpu/drm/drm_framebuffer.c

1119

DRM_ERROR("failed to reset crtc %p when fb was deleted\n", crtc);

drivers/gpu/drm/drm_internal.h

206

void drm_debugfs_crtc_add(struct drm_crtc *crtc);

drivers/gpu/drm/drm_internal.h

207

void drm_debugfs_crtc_remove(struct drm_crtc *crtc);

drivers/gpu/drm/drm_internal.h

208

void drm_debugfs_crtc_crc_add(struct drm_crtc *crtc);

drivers/gpu/drm/drm_internal.h

236

static inline void drm_debugfs_crtc_add(struct drm_crtc *crtc)

drivers/gpu/drm/drm_internal.h

239

static inline void drm_debugfs_crtc_remove(struct drm_crtc *crtc)

drivers/gpu/drm/drm_internal.h

243

static inline void drm_debugfs_crtc_crc_add(struct drm_crtc *crtc)

drivers/gpu/drm/drm_ioctl.c

237

struct drm_crtc *crtc;

drivers/gpu/drm/drm_ioctl.c

280

drm_for_each_crtc(crtc, dev) {

drivers/gpu/drm/drm_ioctl.c

281

if (!crtc->funcs->page_flip_target)

drivers/gpu/drm/drm_lease.c

158

struct drm_crtc *crtc;

drivers/gpu/drm/drm_lease.c

176

list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {

drivers/gpu/drm/drm_lease.c

177

if (_drm_lease_held_master(master, crtc->base.id)) {

drivers/gpu/drm/drm_lease.c

440

struct drm_crtc *crtc = obj_to_crtc(obj);

drivers/gpu/drm/drm_lease.c

442

ret = idr_alloc(leases, &drm_lease_idr_object, crtc->primary->base.id, crtc->primary->base.id + 1, GFP_KERNEL);

drivers/gpu/drm/drm_lease.c

448

if (crtc->cursor) {

drivers/gpu/drm/drm_lease.c

449

ret = idr_alloc(leases, &drm_lease_idr_object, crtc->cursor->base.id, crtc->cursor->base.id + 1, GFP_KERNEL);

drivers/gpu/drm/drm_mipi_dbi.c

331

struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);

drivers/gpu/drm/drm_mipi_dbi.c

333

return drm_crtc_helper_mode_valid_fixed(&pipe->crtc, mode, &dbidev->mode);

drivers/gpu/drm/drm_mipi_dbi.c

354

if (!pipe->crtc.state->active)

drivers/gpu/drm/drm_mipi_dbi.c

444

struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);

drivers/gpu/drm/drm_mode_config.c

132

drm_for_each_crtc(crtc, dev) {

drivers/gpu/drm/drm_mode_config.c

133

if (drm_lease_held(file_priv, crtc->base.id)) {

drivers/gpu/drm/drm_mode_config.c

135

put_user(crtc->base.id, crtc_id + count))

drivers/gpu/drm/drm_mode_config.c

195

struct drm_crtc *crtc;

drivers/gpu/drm/drm_mode_config.c

209

drm_for_each_crtc(crtc, dev)

drivers/gpu/drm/drm_mode_config.c

210

if (crtc->funcs->reset)

drivers/gpu/drm/drm_mode_config.c

211

crtc->funcs->reset(crtc);

drivers/gpu/drm/drm_mode_config.c

521

struct drm_crtc *crtc, *ct;

drivers/gpu/drm/drm_mode_config.c

561

list_for_each_entry_safe(crtc, ct, &dev->mode_config.crtc_list, head) {

drivers/gpu/drm/drm_mode_config.c

562

crtc->funcs->destroy(crtc);

drivers/gpu/drm/drm_mode_config.c

644

struct drm_crtc *crtc;

drivers/gpu/drm/drm_mode_config.c

647

drm_for_each_crtc(crtc, dev)

drivers/gpu/drm/drm_mode_config.c

648

crtc_mask |= drm_crtc_mask(crtc);

drivers/gpu/drm/drm_mode_config.c

668

struct drm_crtc *crtc;

drivers/gpu/drm/drm_mode_config.c

684

drm_for_each_crtc(crtc, dev) {

drivers/gpu/drm/drm_mode_config.c

685

WARN(!crtc->primary, "Missing primary plane on [CRTC:%d:%s]\n",

drivers/gpu/drm/drm_mode_config.c

686

crtc->base.id, crtc->name);

drivers/gpu/drm/drm_mode_config.c

688

WARN(crtc->cursor && crtc->funcs->cursor_set,

drivers/gpu/drm/drm_mode_config.c

690

crtc->base.id, crtc->name);

drivers/gpu/drm/drm_mode_config.c

691

WARN(crtc->cursor && crtc->funcs->cursor_set2,

drivers/gpu/drm/drm_mode_config.c

693

crtc->base.id, crtc->name);

drivers/gpu/drm/drm_mode_config.c

694

WARN(crtc->cursor && crtc->funcs->cursor_move,

drivers/gpu/drm/drm_mode_config.c

696

crtc->base.id, crtc->name);

drivers/gpu/drm/drm_mode_config.c

698

if (crtc->primary) {

drivers/gpu/drm/drm_mode_config.c

699

WARN(!(crtc->primary->possible_crtcs & drm_crtc_mask(crtc)),

drivers/gpu/drm/drm_mode_config.c

701

crtc->primary->base.id, crtc->primary->name,

drivers/gpu/drm/drm_mode_config.c

702

crtc->base.id, crtc->name);

drivers/gpu/drm/drm_mode_config.c

703

WARN(primary_with_crtc & drm_plane_mask(crtc->primary),

drivers/gpu/drm/drm_mode_config.c

705

crtc->primary->base.id, crtc->primary->name);

drivers/gpu/drm/drm_mode_config.c

706

primary_with_crtc |= drm_plane_mask(crtc->primary);

drivers/gpu/drm/drm_mode_config.c

708

if (crtc->cursor) {

drivers/gpu/drm/drm_mode_config.c

709

WARN(!(crtc->cursor->possible_crtcs & drm_crtc_mask(crtc)),

drivers/gpu/drm/drm_mode_config.c

711

crtc->cursor->base.id, crtc->cursor->name,

drivers/gpu/drm/drm_mode_config.c

712

crtc->base.id, crtc->name);

drivers/gpu/drm/drm_mode_config.c

713

WARN(cursor_with_crtc & drm_plane_mask(crtc->cursor),

drivers/gpu/drm/drm_mode_config.c

715

crtc->cursor->base.id, crtc->cursor->name);

drivers/gpu/drm/drm_mode_config.c

716

cursor_with_crtc |= drm_plane_mask(crtc->cursor);

drivers/gpu/drm/drm_mode_config.c

99

struct drm_crtc *crtc;

drivers/gpu/drm/drm_modeset_helper.c

145

int drm_crtc_init(struct drm_device *dev, struct drm_crtc *crtc,

drivers/gpu/drm/drm_modeset_helper.c

166

ret = drm_crtc_init_with_planes(dev, crtc, primary, NULL, funcs, NULL);

drivers/gpu/drm/drm_modeset_lock.c

225

struct drm_crtc *crtc;

drivers/gpu/drm/drm_modeset_lock.c

231

drm_for_each_crtc(crtc, dev)

drivers/gpu/drm/drm_modeset_lock.c

232

WARN_ON(!drm_modeset_is_locked(&crtc->mutex));

drivers/gpu/drm/drm_modeset_lock.c

455

struct drm_crtc *crtc;

drivers/gpu/drm/drm_modeset_lock.c

463

drm_for_each_crtc(crtc, dev) {

drivers/gpu/drm/drm_modeset_lock.c

464

ret = drm_modeset_lock(&crtc->mutex, ctx);

drivers/gpu/drm/drm_of.c

202

struct drm_crtc *crtc = encoder->crtc;

drivers/gpu/drm/drm_of.c

206

if (!node || !crtc)

drivers/gpu/drm/drm_of.c

212

if (port == crtc->port) {

drivers/gpu/drm/drm_plane.c

1019

struct drm_crtc *crtc,

drivers/gpu/drm/drm_plane.c

1037

plane->crtc = NULL;

drivers/gpu/drm/drm_plane.c

1045

ret = __setplane_check(plane, crtc, fb,

drivers/gpu/drm/drm_plane.c

1052

ret = plane->funcs->update_plane(plane, crtc, fb,

drivers/gpu/drm/drm_plane.c

1056

plane->crtc = crtc;

drivers/gpu/drm/drm_plane.c

1072

struct drm_crtc *crtc,

drivers/gpu/drm/drm_plane.c

1095

ret = __setplane_check(plane, crtc, fb,

drivers/gpu/drm/drm_plane.c

1101

return plane->funcs->update_plane(plane, crtc, fb,

drivers/gpu/drm/drm_plane.c

1107

struct drm_crtc *crtc,

drivers/gpu/drm/drm_plane.c

1122

ret = __setplane_atomic(plane, crtc, fb,

drivers/gpu/drm/drm_plane.c

1126

ret = __setplane_internal(plane, crtc, fb,

drivers/gpu/drm/drm_plane.c

1140

struct drm_crtc *crtc = NULL;

drivers/gpu/drm/drm_plane.c

1166

crtc = drm_crtc_find(dev, file_priv, plane_req->crtc_id);

drivers/gpu/drm/drm_plane.c

1167

if (!crtc) {

drivers/gpu/drm/drm_plane.c

1175

ret = setplane_internal(plane, crtc, fb,

drivers/gpu/drm/drm_plane.c

1187

static int drm_mode_cursor_universal(struct drm_crtc *crtc,

drivers/gpu/drm/drm_plane.c

1192

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/drm_plane.c

1193

struct drm_plane *plane = crtc->cursor;

drivers/gpu/drm/drm_plane.c

1208

WARN_ON(plane->crtc != crtc && plane->crtc != NULL);

drivers/gpu/drm/drm_plane.c

1244

crtc_x = crtc->cursor_x;

drivers/gpu/drm/drm_plane.c

1245

crtc_y = crtc->cursor_y;

drivers/gpu/drm/drm_plane.c

1256

ret = __setplane_atomic(plane, crtc, fb,

drivers/gpu/drm/drm_plane.c

1260

ret = __setplane_internal(plane, crtc, fb,

drivers/gpu/drm/drm_plane.c

1269

crtc->cursor_x = req->x;

drivers/gpu/drm/drm_plane.c

1270

crtc->cursor_y = req->y;

drivers/gpu/drm/drm_plane.c

1280

struct drm_crtc *crtc;

drivers/gpu/drm/drm_plane.c

1290

crtc = drm_crtc_find(dev, file_priv, req->crtc_id);

drivers/gpu/drm/drm_plane.c

1291

if (!crtc) {

drivers/gpu/drm/drm_plane.c

1298

ret = drm_modeset_lock(&crtc->mutex, &ctx);

drivers/gpu/drm/drm_plane.c

1305

if (crtc->cursor) {

drivers/gpu/drm/drm_plane.c

1306

ret = drm_modeset_lock(&crtc->cursor->mutex, &ctx);

drivers/gpu/drm/drm_plane.c

1310

if (!drm_lease_held(file_priv, crtc->cursor->base.id)) {

drivers/gpu/drm/drm_plane.c

1315

ret = drm_mode_cursor_universal(crtc, req, file_priv, &ctx);

drivers/gpu/drm/drm_plane.c

1320

if (!crtc->funcs->cursor_set && !crtc->funcs->cursor_set2) {

drivers/gpu/drm/drm_plane.c

1325

if (crtc->funcs->cursor_set2)

drivers/gpu/drm/drm_plane.c

1326

ret = crtc->funcs->cursor_set2(crtc, file_priv, req->handle,

drivers/gpu/drm/drm_plane.c

1329

ret = crtc->funcs->cursor_set(crtc, file_priv, req->handle,

drivers/gpu/drm/drm_plane.c

1334

if (crtc->funcs->cursor_move) {

drivers/gpu/drm/drm_plane.c

1335

ret = crtc->funcs->cursor_move(crtc, req->x, req->y);

drivers/gpu/drm/drm_plane.c

1385

struct drm_crtc *crtc;

drivers/gpu/drm/drm_plane.c

1411

crtc = drm_crtc_find(dev, file_priv, page_flip->crtc_id);

drivers/gpu/drm/drm_plane.c

1412

if (!crtc)

drivers/gpu/drm/drm_plane.c

1415

plane = crtc->primary;

drivers/gpu/drm/drm_plane.c

1420

if (crtc->funcs->page_flip_target) {

drivers/gpu/drm/drm_plane.c

1424

r = drm_crtc_vblank_get(crtc);

drivers/gpu/drm/drm_plane.c

1428

current_vblank = (u32)drm_crtc_vblank_count(crtc);

drivers/gpu/drm/drm_plane.c

1436

drm_crtc_vblank_put(crtc);

drivers/gpu/drm/drm_plane.c

1444

drm_crtc_vblank_put(crtc);

drivers/gpu/drm/drm_plane.c

1454

} else if (crtc->funcs->page_flip == NULL ||

drivers/gpu/drm/drm_plane.c

1461

ret = drm_modeset_lock(&crtc->mutex, &ctx);

drivers/gpu/drm/drm_plane.c

1497

ret = drm_crtc_check_viewport(crtc, crtc->x, crtc->y,

drivers/gpu/drm/drm_plane.c

1498

&crtc->mode, fb);

drivers/gpu/drm/drm_plane.c

1526

e->event.vbl.crtc_id = crtc->base.id;

drivers/gpu/drm/drm_plane.c

1537

if (crtc->funcs->page_flip_target)

drivers/gpu/drm/drm_plane.c

1538

ret = crtc->funcs->page_flip_target(crtc, fb, e,

drivers/gpu/drm/drm_plane.c

1543

ret = crtc->funcs->page_flip(crtc, fb, e, page_flip->flags,

drivers/gpu/drm/drm_plane.c

1574

if (ret && crtc->funcs->page_flip_target)

drivers/gpu/drm/drm_plane.c

1575

drm_crtc_vblank_put(crtc);

drivers/gpu/drm/drm_plane.c

769

plane->crtc = NULL;

drivers/gpu/drm/drm_plane.c

868

if (plane->state && plane->state->crtc && drm_lease_held(file_priv, plane->state->crtc->base.id))

drivers/gpu/drm/drm_plane.c

869

plane_resp->crtc_id = plane->state->crtc->base.id;

drivers/gpu/drm/drm_plane.c

870

else if (!plane->state && plane->crtc && drm_lease_held(file_priv, plane->crtc->base.id))

drivers/gpu/drm/drm_plane.c

871

plane_resp->crtc_id = plane->crtc->base.id;

drivers/gpu/drm/drm_plane.c

948

struct drm_crtc *crtc,

drivers/gpu/drm/drm_plane.c

958

if (!(plane->possible_crtcs & drm_crtc_mask(crtc))) {

drivers/gpu/drm/drm_plane_helper.c

109

.crtc = crtc,

drivers/gpu/drm/drm_plane_helper.c

122

.crtc = crtc,

drivers/gpu/drm/drm_plane_helper.c

123

.enable = crtc->enabled,

drivers/gpu/drm/drm_plane_helper.c

124

.mode = crtc->mode,

drivers/gpu/drm/drm_plane_helper.c

165

int drm_plane_helper_update_primary(struct drm_plane *plane, struct drm_crtc *crtc,

drivers/gpu/drm/drm_plane_helper.c

174

.crtc = crtc,

drivers/gpu/drm/drm_plane_helper.c

176

.mode = &crtc->mode,

drivers/gpu/drm/drm_plane_helper.c

200

ret = drm_plane_helper_check_update(plane, crtc, fb,

drivers/gpu/drm/drm_plane_helper.c

218

num_connectors = get_connectors_for_crtc(crtc, NULL, 0);

drivers/gpu/drm/drm_plane_helper.c

223

get_connectors_for_crtc(crtc, connector_list, num_connectors);

drivers/gpu/drm/drm_plane_helper.c

236

ret = crtc->funcs->set_config(&set, ctx);

drivers/gpu/drm/drm_plane_helper.c

65

static int get_connectors_for_crtc(struct drm_crtc *crtc,

drivers/gpu/drm/drm_plane_helper.c

69

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/drm_plane_helper.c

83

if (connector->encoder && connector->encoder->crtc == crtc) {

drivers/gpu/drm/drm_plane_helper.c

96

struct drm_crtc *crtc,

drivers/gpu/drm/drm_probe_helper.c

107

struct drm_crtc *crtc;

drivers/gpu/drm/drm_probe_helper.c

1131

enum drm_mode_status drm_crtc_helper_mode_valid_fixed(struct drm_crtc *crtc,

drivers/gpu/drm/drm_probe_helper.c

129

drm_for_each_crtc(crtc, dev) {

drivers/gpu/drm/drm_probe_helper.c

130

if (!drm_encoder_crtc_ok(encoder, crtc))

drivers/gpu/drm/drm_probe_helper.c

133

*status = drm_crtc_mode_valid(crtc, mode);

drivers/gpu/drm/drm_probe_helper.c

181

enum drm_mode_status drm_crtc_mode_valid(struct drm_crtc *crtc,

drivers/gpu/drm/drm_probe_helper.c

184

const struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private;

drivers/gpu/drm/drm_probe_helper.c

189

return crtc_funcs->mode_valid(crtc, mode);

drivers/gpu/drm/drm_self_refresh_helper.c

102

ret = drm_atomic_add_affected_connectors(state, crtc);

drivers/gpu/drm/drm_self_refresh_helper.c

150

struct drm_crtc *crtc;

drivers/gpu/drm/drm_self_refresh_helper.c

154

for_each_old_crtc_in_state(state, crtc, old_crtc_state, i) {

drivers/gpu/drm/drm_self_refresh_helper.c

156

struct drm_self_refresh_data *sr_data = crtc->self_refresh_data;

drivers/gpu/drm/drm_self_refresh_helper.c

190

struct drm_crtc *crtc;

drivers/gpu/drm/drm_self_refresh_helper.c

195

for_each_old_crtc_in_state(state, crtc, crtc_state, i) {

drivers/gpu/drm/drm_self_refresh_helper.c

204

for_each_new_crtc_in_state(state, crtc, crtc_state, i) {

drivers/gpu/drm/drm_self_refresh_helper.c

212

sr_data = crtc->self_refresh_data;

drivers/gpu/drm/drm_self_refresh_helper.c

233

int drm_self_refresh_helper_init(struct drm_crtc *crtc)

drivers/gpu/drm/drm_self_refresh_helper.c

235

struct drm_self_refresh_data *sr_data = crtc->self_refresh_data;

drivers/gpu/drm/drm_self_refresh_helper.c

247

sr_data->crtc = crtc;

drivers/gpu/drm/drm_self_refresh_helper.c

260

crtc->self_refresh_data = sr_data;

drivers/gpu/drm/drm_self_refresh_helper.c

269

void drm_self_refresh_helper_cleanup(struct drm_crtc *crtc)

drivers/gpu/drm/drm_self_refresh_helper.c

271

struct drm_self_refresh_data *sr_data = crtc->self_refresh_data;

drivers/gpu/drm/drm_self_refresh_helper.c

277

crtc->self_refresh_data = NULL;

drivers/gpu/drm/drm_self_refresh_helper.c

60

struct drm_crtc *crtc;

drivers/gpu/drm/drm_self_refresh_helper.c

73

struct drm_crtc *crtc = sr_data->crtc;

drivers/gpu/drm/drm_self_refresh_helper.c

74

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/drm_self_refresh_helper.c

93

crtc_state = drm_atomic_get_crtc_state(state, crtc);

drivers/gpu/drm/drm_simple_kms_helper.c

100

static int drm_simple_kms_crtc_check(struct drm_crtc *crtc,

drivers/gpu/drm/drm_simple_kms_helper.c

103

struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/drm_simple_kms_helper.c

114

return drm_atomic_add_affected_planes(state, crtc);

drivers/gpu/drm/drm_simple_kms_helper.c

117

static void drm_simple_kms_crtc_enable(struct drm_crtc *crtc,

drivers/gpu/drm/drm_simple_kms_helper.c

123

pipe = container_of(crtc, struct drm_simple_display_pipe, crtc);

drivers/gpu/drm/drm_simple_kms_helper.c

128

pipe->funcs->enable(pipe, crtc->state, plane->state);

drivers/gpu/drm/drm_simple_kms_helper.c

131

static void drm_simple_kms_crtc_disable(struct drm_crtc *crtc,

drivers/gpu/drm/drm_simple_kms_helper.c

136

pipe = container_of(crtc, struct drm_simple_display_pipe, crtc);

drivers/gpu/drm/drm_simple_kms_helper.c

150

static void drm_simple_kms_crtc_reset(struct drm_crtc *crtc)

drivers/gpu/drm/drm_simple_kms_helper.c

154

pipe = container_of(crtc, struct drm_simple_display_pipe, crtc);

drivers/gpu/drm/drm_simple_kms_helper.c

156

return drm_atomic_helper_crtc_reset(crtc);

drivers/gpu/drm/drm_simple_kms_helper.c

161

static struct drm_crtc_state *drm_simple_kms_crtc_duplicate_state(struct drm_crtc *crtc)

drivers/gpu/drm/drm_simple_kms_helper.c

165

pipe = container_of(crtc, struct drm_simple_display_pipe, crtc);

drivers/gpu/drm/drm_simple_kms_helper.c

167

return drm_atomic_helper_crtc_duplicate_state(crtc);

drivers/gpu/drm/drm_simple_kms_helper.c

172

static void drm_simple_kms_crtc_destroy_state(struct drm_crtc *crtc, struct drm_crtc_state *state)

drivers/gpu/drm/drm_simple_kms_helper.c

176

pipe = container_of(crtc, struct drm_simple_display_pipe, crtc);

drivers/gpu/drm/drm_simple_kms_helper.c

178

drm_atomic_helper_crtc_destroy_state(crtc, state);

drivers/gpu/drm/drm_simple_kms_helper.c

183

static int drm_simple_kms_crtc_enable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/drm_simple_kms_helper.c

187

pipe = container_of(crtc, struct drm_simple_display_pipe, crtc);

drivers/gpu/drm/drm_simple_kms_helper.c

194

static void drm_simple_kms_crtc_disable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/drm_simple_kms_helper.c

198

pipe = container_of(crtc, struct drm_simple_display_pipe, crtc);

drivers/gpu/drm/drm_simple_kms_helper.c

227

&pipe->crtc);

drivers/gpu/drm/drm_simple_kms_helper.c

427

struct drm_crtc *crtc = &pipe->crtc;

drivers/gpu/drm/drm_simple_kms_helper.c

442

drm_crtc_helper_add(crtc, &drm_simple_kms_crtc_helper_funcs);

drivers/gpu/drm/drm_simple_kms_helper.c

443

ret = drm_crtc_init_with_planes(dev, crtc, plane, NULL,

drivers/gpu/drm/drm_simple_kms_helper.c

448

encoder->possible_crtcs = drm_crtc_mask(crtc);

drivers/gpu/drm/drm_simple_kms_helper.c

87

drm_simple_kms_crtc_mode_valid(struct drm_crtc *crtc,

drivers/gpu/drm/drm_simple_kms_helper.c

92

pipe = container_of(crtc, struct drm_simple_display_pipe, crtc);

drivers/gpu/drm/drm_trace.h

16

TP_PROTO(int crtc, unsigned int seq, ktime_t time, bool high_prec),

drivers/gpu/drm/drm_trace.h

17

TP_ARGS(crtc, seq, time, high_prec),

drivers/gpu/drm/drm_trace.h

19

__field(int, crtc)

drivers/gpu/drm/drm_trace.h

25

__entry->crtc = crtc;

drivers/gpu/drm/drm_trace.h

31

__entry->crtc, __entry->seq, __entry->time,

drivers/gpu/drm/drm_trace.h

36

TP_PROTO(struct drm_file *file, int crtc, unsigned int seq),

drivers/gpu/drm/drm_trace.h

37

TP_ARGS(file, crtc, seq),

drivers/gpu/drm/drm_trace.h

40

__field(int, crtc)

drivers/gpu/drm/drm_trace.h

45

__entry->crtc = crtc;

drivers/gpu/drm/drm_trace.h

48

TP_printk("file=%p, crtc=%d, seq=%u", __entry->file, __entry->crtc, \

drivers/gpu/drm/drm_trace.h

53

TP_PROTO(struct drm_file *file, int crtc, unsigned int seq),

drivers/gpu/drm/drm_trace.h

54

TP_ARGS(file, crtc, seq),

drivers/gpu/drm/drm_trace.h

57

__field(int, crtc)

drivers/gpu/drm/drm_trace.h

62

__entry->crtc = crtc;

drivers/gpu/drm/drm_trace.h

65

TP_printk("file=%p, crtc=%d, seq=%u", __entry->file, __entry->crtc, \

drivers/gpu/drm/drm_vblank.c

1012

int drm_crtc_next_vblank_start(struct drm_crtc *crtc, ktime_t *vblanktime)

drivers/gpu/drm/drm_vblank.c

1018

if (!drm_dev_has_vblank(crtc->dev))

drivers/gpu/drm/drm_vblank.c

1021

vblank = drm_crtc_vblank_crtc(crtc);

drivers/gpu/drm/drm_vblank.c

1027

if (!drm_crtc_get_last_vbltimestamp(crtc, vblanktime, false))

drivers/gpu/drm/drm_vblank.c

1113

void drm_crtc_arm_vblank_event(struct drm_crtc *crtc,

drivers/gpu/drm/drm_vblank.c

1116

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/drm_vblank.c

1117

unsigned int pipe = drm_crtc_index(crtc);

drivers/gpu/drm/drm_vblank.c

1122

e->sequence = drm_crtc_accurate_vblank_count(crtc) + 1;

drivers/gpu/drm/drm_vblank.c

1138

void drm_crtc_send_vblank_event(struct drm_crtc *crtc,

drivers/gpu/drm/drm_vblank.c

1141

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/drm_vblank.c

1143

unsigned int pipe = drm_crtc_index(crtc);

drivers/gpu/drm/drm_vblank.c

1161

struct drm_crtc *crtc = drm_crtc_from_index(dev, pipe);

drivers/gpu/drm/drm_vblank.c

1163

if (drm_WARN_ON(dev, !crtc))

drivers/gpu/drm/drm_vblank.c

1166

if (crtc->funcs->enable_vblank)

drivers/gpu/drm/drm_vblank.c

1167

return crtc->funcs->enable_vblank(crtc);

drivers/gpu/drm/drm_vblank.c

1248

int drm_crtc_vblank_get(struct drm_crtc *crtc)

drivers/gpu/drm/drm_vblank.c

1250

return drm_vblank_get(crtc->dev, drm_crtc_index(crtc));

drivers/gpu/drm/drm_vblank.c

1285

void drm_crtc_vblank_put(struct drm_crtc *crtc)

drivers/gpu/drm/drm_vblank.c

1287

drm_vblank_put(crtc->dev, drm_crtc_index(crtc));

drivers/gpu/drm/drm_vblank.c

1301

int drm_crtc_wait_one_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/drm_vblank.c

1303

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/drm_vblank.c

1304

int pipe = drm_crtc_index(crtc);

drivers/gpu/drm/drm_vblank.c

1305

struct drm_vblank_crtc *vblank = drm_crtc_vblank_crtc(crtc);

drivers/gpu/drm/drm_vblank.c

1339

void drm_crtc_vblank_off(struct drm_crtc *crtc)

drivers/gpu/drm/drm_vblank.c

1341

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/drm_vblank.c

1342

unsigned int pipe = drm_crtc_index(crtc);

drivers/gpu/drm/drm_vblank.c

1343

struct drm_vblank_crtc *vblank = drm_crtc_vblank_crtc(crtc);

drivers/gpu/drm/drm_vblank.c

1418

void drm_crtc_vblank_reset(struct drm_crtc *crtc)

drivers/gpu/drm/drm_vblank.c

1420

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/drm_vblank.c

1421

struct drm_vblank_crtc *vblank = drm_crtc_vblank_crtc(crtc);

drivers/gpu/drm/drm_vblank.c

1456

void drm_crtc_set_max_vblank_count(struct drm_crtc *crtc,

drivers/gpu/drm/drm_vblank.c

1459

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/drm_vblank.c

1460

struct drm_vblank_crtc *vblank = drm_crtc_vblank_crtc(crtc);

drivers/gpu/drm/drm_vblank.c

1482

void drm_crtc_vblank_on_config(struct drm_crtc *crtc,

drivers/gpu/drm/drm_vblank.c

1485

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/drm_vblank.c

1486

unsigned int pipe = drm_crtc_index(crtc);

drivers/gpu/drm/drm_vblank.c

1487

struct drm_vblank_crtc *vblank = drm_crtc_vblank_crtc(crtc);

drivers/gpu/drm/drm_vblank.c

1528

void drm_crtc_vblank_on(struct drm_crtc *crtc)

drivers/gpu/drm/drm_vblank.c

1532

.disable_immediate = crtc->dev->vblank_disable_immediate

drivers/gpu/drm/drm_vblank.c

1535

drm_crtc_vblank_on_config(crtc, &config);

drivers/gpu/drm/drm_vblank.c

1593

void drm_crtc_vblank_restore(struct drm_crtc *crtc)

drivers/gpu/drm/drm_vblank.c

1595

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/drm_vblank.c

1596

unsigned int pipe = drm_crtc_index(crtc);

drivers/gpu/drm/drm_vblank.c

1599

drm_WARN_ON_ONCE(dev, !crtc->funcs->get_vblank_timestamp);

drivers/gpu/drm/drm_vblank.c

1630

struct drm_crtc *crtc = drm_crtc_from_index(dev, pipe);

drivers/gpu/drm/drm_vblank.c

1632

if (crtc)

drivers/gpu/drm/drm_vblank.c

1633

e->event.vbl.crtc_id = crtc->base.id;

drivers/gpu/drm/drm_vblank.c

1737

struct drm_crtc *crtc;

drivers/gpu/drm/drm_vblank.c

1772

drm_for_each_crtc(crtc, dev) {

drivers/gpu/drm/drm_vblank.c

1773

if (drm_lease_held(file_priv, crtc->base.id)) {

drivers/gpu/drm/drm_vblank.c

185

drm_crtc_vblank_crtc(struct drm_crtc *crtc)

drivers/gpu/drm/drm_vblank.c

187

return drm_vblank_crtc(crtc->dev, drm_crtc_index(crtc));

drivers/gpu/drm/drm_vblank.c

1878

struct drm_crtc *crtc = drm_crtc_from_index(dev, pipe);

drivers/gpu/drm/drm_vblank.c

1902

if (crtc && crtc->funcs->get_vblank_timestamp)

drivers/gpu/drm/drm_vblank.c

1992

bool drm_crtc_handle_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/drm_vblank.c

1994

return drm_handle_vblank(crtc->dev, drm_crtc_index(crtc));

drivers/gpu/drm/drm_vblank.c

2009

struct drm_crtc *crtc;

drivers/gpu/drm/drm_vblank.c

2023

crtc = drm_crtc_find(dev, file_priv, get_seq->crtc_id);

drivers/gpu/drm/drm_vblank.c

2024

if (!crtc)

drivers/gpu/drm/drm_vblank.c

2027

pipe = drm_crtc_index(crtc);

drivers/gpu/drm/drm_vblank.c

2029

vblank = drm_crtc_vblank_crtc(crtc);

drivers/gpu/drm/drm_vblank.c

2034

ret = drm_crtc_vblank_get(crtc);

drivers/gpu/drm/drm_vblank.c

2042

drm_modeset_lock(&crtc->mutex, NULL);

drivers/gpu/drm/drm_vblank.c

2043

if (crtc->state)

drivers/gpu/drm/drm_vblank.c

2044

get_seq->active = crtc->state->enable;

drivers/gpu/drm/drm_vblank.c

2046

get_seq->active = crtc->enabled;

drivers/gpu/drm/drm_vblank.c

2047

drm_modeset_unlock(&crtc->mutex);

drivers/gpu/drm/drm_vblank.c

2051

drm_crtc_vblank_put(crtc);

drivers/gpu/drm/drm_vblank.c

2066

struct drm_crtc *crtc;

drivers/gpu/drm/drm_vblank.c

2083

crtc = drm_crtc_find(dev, file_priv, queue_seq->crtc_id);

drivers/gpu/drm/drm_vblank.c

2084

if (!crtc)

drivers/gpu/drm/drm_vblank.c

2093

pipe = drm_crtc_index(crtc);

drivers/gpu/drm/drm_vblank.c

2095

vblank = drm_crtc_vblank_crtc(crtc);

drivers/gpu/drm/drm_vblank.c

2101

ret = drm_crtc_vblank_get(crtc);

drivers/gpu/drm/drm_vblank.c

2145

drm_crtc_vblank_put(crtc);

drivers/gpu/drm/drm_vblank.c

2159

drm_crtc_vblank_put(crtc);

drivers/gpu/drm/drm_vblank.c

2173

struct drm_crtc *crtc = vtimer->crtc;

drivers/gpu/drm/drm_vblank.c

2174

const struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private;

drivers/gpu/drm/drm_vblank.c

2175

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/drm_vblank.c

2193

succ = crtc_funcs->handle_vblank_timeout(crtc);

drivers/gpu/drm/drm_vblank.c

2195

succ = drm_crtc_handle_vblank(crtc);

drivers/gpu/drm/drm_vblank.c

2213

int drm_crtc_vblank_start_timer(struct drm_crtc *crtc)

drivers/gpu/drm/drm_vblank.c

2215

struct drm_vblank_crtc *vblank = drm_crtc_vblank_crtc(crtc);

drivers/gpu/drm/drm_vblank.c

2219

if (!vtimer->crtc) {

drivers/gpu/drm/drm_vblank.c

2223

vtimer->crtc = crtc;

drivers/gpu/drm/drm_vblank.c

2236

drm_calc_timestamping_constants(crtc, &crtc->mode);

drivers/gpu/drm/drm_vblank.c

2255

void drm_crtc_vblank_cancel_timer(struct drm_crtc *crtc)

drivers/gpu/drm/drm_vblank.c

2257

struct drm_vblank_crtc *vblank = drm_crtc_vblank_crtc(crtc);

drivers/gpu/drm/drm_vblank.c

227

struct drm_crtc *crtc = drm_crtc_from_index(dev, pipe);

drivers/gpu/drm/drm_vblank.c

2285

void drm_crtc_vblank_get_vblank_timeout(struct drm_crtc *crtc, ktime_t *vblank_time)

drivers/gpu/drm/drm_vblank.c

2287

struct drm_vblank_crtc *vblank = drm_crtc_vblank_crtc(crtc);

drivers/gpu/drm/drm_vblank.c

229

if (drm_WARN_ON(dev, !crtc))

drivers/gpu/drm/drm_vblank.c

2304

cur_count = drm_crtc_vblank_count_and_time(crtc, &cur_time);

drivers/gpu/drm/drm_vblank.c

2306

} while (cur_count != drm_crtc_vblank_count_and_time(crtc, &cur_time));

drivers/gpu/drm/drm_vblank.c

2308

if (drm_WARN_ON(crtc->dev, !ktime_compare(*vblank_time, cur_time)))

drivers/gpu/drm/drm_vblank.c

232

if (crtc->funcs->get_vblank_counter)

drivers/gpu/drm/drm_vblank.c

233

return crtc->funcs->get_vblank_counter(crtc);

drivers/gpu/drm/drm_vblank.c

420

u64 drm_crtc_accurate_vblank_count(struct drm_crtc *crtc)

drivers/gpu/drm/drm_vblank.c

422

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/drm_vblank.c

423

unsigned int pipe = drm_crtc_index(crtc);

drivers/gpu/drm/drm_vblank.c

428

!crtc->funcs->get_vblank_timestamp,

drivers/gpu/drm/drm_vblank.c

445

struct drm_crtc *crtc = drm_crtc_from_index(dev, pipe);

drivers/gpu/drm/drm_vblank.c

447

if (drm_WARN_ON(dev, !crtc))

drivers/gpu/drm/drm_vblank.c

450

if (crtc->funcs->disable_vblank)

drivers/gpu/drm/drm_vblank.c

451

crtc->funcs->disable_vblank(crtc);

drivers/gpu/drm/drm_vblank.c

520

if (vblank->vblank_timer.crtc)

drivers/gpu/drm/drm_vblank.c

606

wait_queue_head_t *drm_crtc_vblank_waitqueue(struct drm_crtc *crtc)

drivers/gpu/drm/drm_vblank.c

608

struct drm_vblank_crtc *vblank = drm_crtc_vblank_crtc(crtc);

drivers/gpu/drm/drm_vblank.c

626

void drm_calc_timestamping_constants(struct drm_crtc *crtc,

drivers/gpu/drm/drm_vblank.c

629

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/drm_vblank.c

630

unsigned int pipe = drm_crtc_index(crtc);

drivers/gpu/drm/drm_vblank.c

631

struct drm_vblank_crtc *vblank = drm_crtc_vblank_crtc(crtc);

drivers/gpu/drm/drm_vblank.c

660

crtc->base.id);

drivers/gpu/drm/drm_vblank.c

669

crtc->base.id, mode->crtc_htotal,

drivers/gpu/drm/drm_vblank.c

672

crtc->base.id, dotclock, framedur_ns, linedur_ns);

drivers/gpu/drm/drm_vblank.c

709

struct drm_crtc *crtc, int *max_error, ktime_t *vblank_time,

drivers/gpu/drm/drm_vblank.c

713

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/drm_vblank.c

714

unsigned int pipe = crtc->index;

drivers/gpu/drm/drm_vblank.c

734

struct drm_vblank_crtc *vblank = drm_crtc_vblank_crtc(crtc);

drivers/gpu/drm/drm_vblank.c

738

mode = &crtc->hwmode;

drivers/gpu/drm/drm_vblank.c

763

vbl_status = get_scanout_position(crtc, in_vblank_irq,

drivers/gpu/drm/drm_vblank.c

851

bool drm_crtc_vblank_helper_get_vblank_timestamp(struct drm_crtc *crtc,

drivers/gpu/drm/drm_vblank.c

857

crtc, max_error, vblank_time, in_vblank_irq,

drivers/gpu/drm/drm_vblank.c

858

crtc->helper_private->get_scanout_position);

drivers/gpu/drm/drm_vblank.c

883

drm_crtc_get_last_vbltimestamp(struct drm_crtc *crtc, ktime_t *tvblank,

drivers/gpu/drm/drm_vblank.c

892

if (crtc && crtc->funcs->get_vblank_timestamp && max_error > 0) {

drivers/gpu/drm/drm_vblank.c

893

ret = crtc->funcs->get_vblank_timestamp(crtc, &max_error,

drivers/gpu/drm/drm_vblank.c

910

struct drm_crtc *crtc = drm_crtc_from_index(dev, pipe);

drivers/gpu/drm/drm_vblank.c

912

return drm_crtc_get_last_vbltimestamp(crtc, tvblank, in_vblank_irq);

drivers/gpu/drm/drm_vblank.c

936

u64 drm_crtc_vblank_count(struct drm_crtc *crtc)

drivers/gpu/drm/drm_vblank.c

938

return drm_vblank_count(crtc->dev, drm_crtc_index(crtc));

drivers/gpu/drm/drm_vblank.c

996

u64 drm_crtc_vblank_count_and_time(struct drm_crtc *crtc,

drivers/gpu/drm/drm_vblank.c

999

return drm_vblank_count_and_time(crtc->dev, drm_crtc_index(crtc),

drivers/gpu/drm/drm_vblank_helper.c

101

void drm_crtc_vblank_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/drm_vblank_helper.c

104

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/drm_vblank_helper.c

127

int drm_crtc_vblank_helper_enable_vblank_timer(struct drm_crtc *crtc)

drivers/gpu/drm/drm_vblank_helper.c

129

return drm_crtc_vblank_start_timer(crtc);

drivers/gpu/drm/drm_vblank_helper.c

143

void drm_crtc_vblank_helper_disable_vblank_timer(struct drm_crtc *crtc)

drivers/gpu/drm/drm_vblank_helper.c

145

drm_crtc_vblank_cancel_timer(crtc);

drivers/gpu/drm/drm_vblank_helper.c

167

bool drm_crtc_vblank_helper_get_vblank_timestamp_from_timer(struct drm_crtc *crtc,

drivers/gpu/drm/drm_vblank_helper.c

172

drm_crtc_vblank_get_vblank_timeout(crtc, vblank_time);

drivers/gpu/drm/drm_vblank_helper.c

51

void drm_crtc_vblank_atomic_flush(struct drm_crtc *crtc,

drivers/gpu/drm/drm_vblank_helper.c

54

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/drm_vblank_helper.c

55

struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/drm_vblank_helper.c

64

if (drm_crtc_vblank_get(crtc) == 0)

drivers/gpu/drm/drm_vblank_helper.c

65

drm_crtc_arm_vblank_event(crtc, event);

drivers/gpu/drm/drm_vblank_helper.c

67

drm_crtc_send_vblank_event(crtc, event);

drivers/gpu/drm/drm_vblank_helper.c

84

void drm_crtc_vblank_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/drm_vblank_helper.c

87

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/drm_vblank_work.c

244

void drm_vblank_work_flush_all(struct drm_crtc *crtc)

drivers/gpu/drm/drm_vblank_work.c

246

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/drm_vblank_work.c

247

struct drm_vblank_crtc *vblank = drm_crtc_vblank_crtc(crtc);

drivers/gpu/drm/drm_vblank_work.c

267

void drm_vblank_work_init(struct drm_vblank_work *work, struct drm_crtc *crtc,

drivers/gpu/drm/drm_vblank_work.c

272

work->vblank = drm_crtc_vblank_crtc(crtc);

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

104

static int decon_enable_vblank(struct exynos_drm_crtc *crtc)

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

106

struct decon_context *ctx = crtc->ctx;

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

110

if (crtc->i80_mode)

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

124

static void decon_disable_vblank(struct exynos_drm_crtc *crtc)

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

126

struct decon_context *ctx = crtc->ctx;

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

159

if (!(ctx->crtc->i80_mode))

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

179

if (!ctx->crtc->i80_mode && !(ctx->out_type & I80_HW_TRG))

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

197

static void decon_commit(struct exynos_drm_crtc *crtc)

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

199

struct decon_context *ctx = crtc->ctx;

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

200

struct drm_display_mode *m = &crtc->base.mode;

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

219

if (crtc->i80_mode) {

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

235

if (!crtc->i80_mode) {

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

390

static void decon_atomic_begin(struct exynos_drm_crtc *crtc)

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

392

struct decon_context *ctx = crtc->ctx;

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

401

static void decon_update_plane(struct exynos_drm_crtc *crtc,

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

406

struct decon_context *ctx = crtc->ctx;

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

414

if (crtc->base.mode.flags & DRM_MODE_FLAG_INTERLACE) {

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

415

val = COORDINATE_X(state->crtc.x) |

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

416

COORDINATE_Y(state->crtc.y / 2);

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

419

val = COORDINATE_X(state->crtc.x + state->crtc.w - 1) |

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

420

COORDINATE_Y((state->crtc.y + state->crtc.h) / 2 - 1);

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

423

val = COORDINATE_X(state->crtc.x) | COORDINATE_Y(state->crtc.y);

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

426

val = COORDINATE_X(state->crtc.x + state->crtc.w - 1) |

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

427

COORDINATE_Y(state->crtc.y + state->crtc.h - 1);

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

445

val = BIT_VAL(pitch - state->crtc.w * cpp, 27, 14)

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

446

| BIT_VAL(state->crtc.w * cpp, 13, 0);

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

448

val = BIT_VAL(pitch - state->crtc.w * cpp, 29, 15)

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

449

| BIT_VAL(state->crtc.w * cpp, 14, 0);

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

458

static void decon_disable_plane(struct exynos_drm_crtc *crtc,

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

461

struct decon_context *ctx = crtc->ctx;

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

467

static void decon_atomic_flush(struct exynos_drm_crtc *crtc)

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

469

struct decon_context *ctx = crtc->ctx;

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

480

exynos_crtc_handle_event(crtc);

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

516

static void decon_atomic_enable(struct exynos_drm_crtc *crtc)

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

518

struct decon_context *ctx = crtc->ctx;

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

527

exynos_drm_pipe_clk_enable(crtc, true);

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

531

decon_commit(ctx->crtc);

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

534

static void decon_atomic_disable(struct exynos_drm_crtc *crtc)

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

536

struct decon_context *ctx = crtc->ctx;

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

549

decon_disable_plane(crtc, &ctx->planes[i]);

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

553

exynos_drm_pipe_clk_enable(crtc, false);

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

567

static void decon_clear_channels(struct exynos_drm_crtc *crtc)

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

569

struct decon_context *ctx = crtc->ctx;

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

593

static enum drm_mode_status decon_mode_valid(struct exynos_drm_crtc *crtc,

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

596

struct decon_context *ctx = crtc->ctx;

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

598

ctx->irq = crtc->i80_mode ? ctx->irq_lcd_sys : ctx->irq_vsync;

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

604

crtc->i80_mode ? "command" : "video");

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

61

struct exynos_drm_crtc *crtc;

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

648

ctx->crtc = exynos_drm_crtc_create(drm_dev, &exynos_plane->base,

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

650

if (IS_ERR(ctx->crtc))

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

651

return PTR_ERR(ctx->crtc);

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

653

decon_clear_channels(ctx->crtc);

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

662

decon_atomic_disable(ctx->crtc);

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

684

drm_crtc_handle_vblank(&ctx->crtc->base);

drivers/gpu/drm/exynos/exynos7_drm_decon.c

204

static void decon_commit(struct exynos_drm_crtc *crtc)

drivers/gpu/drm/exynos/exynos7_drm_decon.c

206

struct decon_context *ctx = crtc->ctx;

drivers/gpu/drm/exynos/exynos7_drm_decon.c

207

struct drm_display_mode *mode = &crtc->base.state->adjusted_mode;

drivers/gpu/drm/exynos/exynos7_drm_decon.c

266

static int decon_enable_vblank(struct exynos_drm_crtc *crtc)

drivers/gpu/drm/exynos/exynos7_drm_decon.c

268

struct decon_context *ctx = crtc->ctx;

drivers/gpu/drm/exynos/exynos7_drm_decon.c

288

static void decon_disable_vblank(struct exynos_drm_crtc *crtc)

drivers/gpu/drm/exynos/exynos7_drm_decon.c

290

struct decon_context *ctx = crtc->ctx;

drivers/gpu/drm/exynos/exynos7_drm_decon.c

390

static void decon_atomic_begin(struct exynos_drm_crtc *crtc)

drivers/gpu/drm/exynos/exynos7_drm_decon.c

392

struct decon_context *ctx = crtc->ctx;

drivers/gpu/drm/exynos/exynos7_drm_decon.c

399

static void decon_update_plane(struct exynos_drm_crtc *crtc,

drivers/gpu/drm/exynos/exynos7_drm_decon.c

404

struct decon_context *ctx = crtc->ctx;

drivers/gpu/drm/exynos/exynos7_drm_decon.c

442

state->crtc.w, state->crtc.h);

drivers/gpu/drm/exynos/exynos7_drm_decon.c

444

val = VIDOSDxA_TOPLEFT_X(state->crtc.x) |

drivers/gpu/drm/exynos/exynos7_drm_decon.c

445

VIDOSDxA_TOPLEFT_Y(state->crtc.y);

drivers/gpu/drm/exynos/exynos7_drm_decon.c

448

last_x = state->crtc.x + state->crtc.w;

drivers/gpu/drm/exynos/exynos7_drm_decon.c

451

last_y = state->crtc.y + state->crtc.h;

drivers/gpu/drm/exynos/exynos7_drm_decon.c

460

state->crtc.x, state->crtc.y, last_x, last_y);

drivers/gpu/drm/exynos/exynos7_drm_decon.c

495

static void decon_disable_plane(struct exynos_drm_crtc *crtc,

drivers/gpu/drm/exynos/exynos7_drm_decon.c

498

struct decon_context *ctx = crtc->ctx;

drivers/gpu/drm/exynos/exynos7_drm_decon.c

515

static void decon_atomic_flush(struct exynos_drm_crtc *crtc)

drivers/gpu/drm/exynos/exynos7_drm_decon.c

517

struct decon_context *ctx = crtc->ctx;

drivers/gpu/drm/exynos/exynos7_drm_decon.c

522

exynos_crtc_handle_event(crtc);

drivers/gpu/drm/exynos/exynos7_drm_decon.c

542

static void decon_atomic_enable(struct exynos_drm_crtc *crtc)

drivers/gpu/drm/exynos/exynos7_drm_decon.c

544

struct decon_context *ctx = crtc->ctx;

drivers/gpu/drm/exynos/exynos7_drm_decon.c

557

decon_enable_vblank(ctx->crtc);

drivers/gpu/drm/exynos/exynos7_drm_decon.c

559

decon_commit(ctx->crtc);

drivers/gpu/drm/exynos/exynos7_drm_decon.c

562

static void decon_atomic_disable(struct exynos_drm_crtc *crtc)

drivers/gpu/drm/exynos/exynos7_drm_decon.c

564

struct decon_context *ctx = crtc->ctx;

drivers/gpu/drm/exynos/exynos7_drm_decon.c

573

decon_disable_plane(crtc, &ctx->planes[i]);

drivers/gpu/drm/exynos/exynos7_drm_decon.c

610

drm_crtc_handle_vblank(&ctx->crtc->base);

drivers/gpu/drm/exynos/exynos7_drm_decon.c

63

struct exynos_drm_crtc *crtc;

drivers/gpu/drm/exynos/exynos7_drm_decon.c

649

ctx->crtc = exynos_drm_crtc_create(drm_dev, &exynos_plane->base,

drivers/gpu/drm/exynos/exynos7_drm_decon.c

651

if (IS_ERR(ctx->crtc)) {

drivers/gpu/drm/exynos/exynos7_drm_decon.c

653

return PTR_ERR(ctx->crtc);

drivers/gpu/drm/exynos/exynos7_drm_decon.c

668

decon_atomic_disable(ctx->crtc);

drivers/gpu/drm/exynos/exynos_dp.c

54

if (!encoder->crtc)

drivers/gpu/drm/exynos/exynos_dp.c

57

exynos_drm_pipe_clk_enable(to_exynos_crtc(encoder->crtc), enable);

drivers/gpu/drm/exynos/exynos_drm_crtc.c

121

struct drm_crtc *crtc = &exynos_crtc->base;

drivers/gpu/drm/exynos/exynos_drm_crtc.c

122

struct drm_pending_vblank_event *event = crtc->state->event;

drivers/gpu/drm/exynos/exynos_drm_crtc.c

127

crtc->state->event = NULL;

drivers/gpu/drm/exynos/exynos_drm_crtc.c

129

WARN_ON(drm_crtc_vblank_get(crtc) != 0);

drivers/gpu/drm/exynos/exynos_drm_crtc.c

131

spin_lock_irqsave(&crtc->dev->event_lock, flags);

drivers/gpu/drm/exynos/exynos_drm_crtc.c

132

drm_crtc_arm_vblank_event(crtc, event);

drivers/gpu/drm/exynos/exynos_drm_crtc.c

133

spin_unlock_irqrestore(&crtc->dev->event_lock, flags);

drivers/gpu/drm/exynos/exynos_drm_crtc.c

136

static void exynos_drm_crtc_destroy(struct drm_crtc *crtc)

drivers/gpu/drm/exynos/exynos_drm_crtc.c

138

struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);

drivers/gpu/drm/exynos/exynos_drm_crtc.c

140

drm_crtc_cleanup(crtc);

drivers/gpu/drm/exynos/exynos_drm_crtc.c

144

static int exynos_drm_crtc_enable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/exynos/exynos_drm_crtc.c

146

struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);

drivers/gpu/drm/exynos/exynos_drm_crtc.c

154

static void exynos_drm_crtc_disable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/exynos/exynos_drm_crtc.c

156

struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);

drivers/gpu/drm/exynos/exynos_drm_crtc.c

180

struct drm_crtc *crtc;

drivers/gpu/drm/exynos/exynos_drm_crtc.c

191

crtc = &exynos_crtc->base;

drivers/gpu/drm/exynos/exynos_drm_crtc.c

193

ret = drm_crtc_init_with_planes(drm_dev, crtc, plane, NULL,

drivers/gpu/drm/exynos/exynos_drm_crtc.c

198

drm_crtc_helper_add(crtc, &exynos_crtc_helper_funcs);

drivers/gpu/drm/exynos/exynos_drm_crtc.c

21

static void exynos_drm_crtc_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/exynos/exynos_drm_crtc.c

211

struct drm_crtc *crtc;

drivers/gpu/drm/exynos/exynos_drm_crtc.c

213

drm_for_each_crtc(crtc, drm_dev)

drivers/gpu/drm/exynos/exynos_drm_crtc.c

214

if (to_exynos_crtc(crtc)->type == out_type)

drivers/gpu/drm/exynos/exynos_drm_crtc.c

215

return to_exynos_crtc(crtc);

drivers/gpu/drm/exynos/exynos_drm_crtc.c

223

struct exynos_drm_crtc *crtc = exynos_drm_crtc_get_by_type(encoder->dev,

drivers/gpu/drm/exynos/exynos_drm_crtc.c

226

if (IS_ERR(crtc))

drivers/gpu/drm/exynos/exynos_drm_crtc.c

227

return PTR_ERR(crtc);

drivers/gpu/drm/exynos/exynos_drm_crtc.c

229

encoder->possible_crtcs = drm_crtc_mask(&crtc->base);

drivers/gpu/drm/exynos/exynos_drm_crtc.c

234

void exynos_drm_crtc_te_handler(struct drm_crtc *crtc)

drivers/gpu/drm/exynos/exynos_drm_crtc.c

236

struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);

drivers/gpu/drm/exynos/exynos_drm_crtc.c

24

struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);

drivers/gpu/drm/exynos/exynos_drm_crtc.c

29

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/exynos/exynos_drm_crtc.c

32

static void exynos_drm_crtc_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/exynos/exynos_drm_crtc.c

35

struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);

drivers/gpu/drm/exynos/exynos_drm_crtc.c

37

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/exynos/exynos_drm_crtc.c

42

spin_lock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/exynos/exynos_drm_crtc.c

43

if (crtc->state->event && !crtc->state->active) {

drivers/gpu/drm/exynos/exynos_drm_crtc.c

44

drm_crtc_send_vblank_event(crtc, crtc->state->event);

drivers/gpu/drm/exynos/exynos_drm_crtc.c

45

crtc->state->event = NULL;

drivers/gpu/drm/exynos/exynos_drm_crtc.c

47

spin_unlock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/exynos/exynos_drm_crtc.c

50

static int exynos_crtc_atomic_check(struct drm_crtc *crtc,

drivers/gpu/drm/exynos/exynos_drm_crtc.c

54

crtc);

drivers/gpu/drm/exynos/exynos_drm_crtc.c

55

struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);

drivers/gpu/drm/exynos/exynos_drm_crtc.c

66

static void exynos_crtc_atomic_begin(struct drm_crtc *crtc,

drivers/gpu/drm/exynos/exynos_drm_crtc.c

69

struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);

drivers/gpu/drm/exynos/exynos_drm_crtc.c

75

static void exynos_crtc_atomic_flush(struct drm_crtc *crtc,

drivers/gpu/drm/exynos/exynos_drm_crtc.c

78

struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);

drivers/gpu/drm/exynos/exynos_drm_crtc.c

84

static enum drm_mode_status exynos_crtc_mode_valid(struct drm_crtc *crtc,

drivers/gpu/drm/exynos/exynos_drm_crtc.c

87

struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);

drivers/gpu/drm/exynos/exynos_drm_crtc.c

95

static bool exynos_crtc_mode_fixup(struct drm_crtc *crtc,

drivers/gpu/drm/exynos/exynos_drm_crtc.c

99

struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);

drivers/gpu/drm/exynos/exynos_drm_crtc.h

35

void exynos_drm_crtc_te_handler(struct drm_crtc *crtc);

drivers/gpu/drm/exynos/exynos_drm_drv.h

136

void (*atomic_enable)(struct exynos_drm_crtc *crtc);

drivers/gpu/drm/exynos/exynos_drm_drv.h

137

void (*atomic_disable)(struct exynos_drm_crtc *crtc);

drivers/gpu/drm/exynos/exynos_drm_drv.h

138

int (*enable_vblank)(struct exynos_drm_crtc *crtc);

drivers/gpu/drm/exynos/exynos_drm_drv.h

139

void (*disable_vblank)(struct exynos_drm_crtc *crtc);

drivers/gpu/drm/exynos/exynos_drm_drv.h

140

enum drm_mode_status (*mode_valid)(struct exynos_drm_crtc *crtc,

drivers/gpu/drm/exynos/exynos_drm_drv.h

142

bool (*mode_fixup)(struct exynos_drm_crtc *crtc,

drivers/gpu/drm/exynos/exynos_drm_drv.h

145

int (*atomic_check)(struct exynos_drm_crtc *crtc,

drivers/gpu/drm/exynos/exynos_drm_drv.h

147

void (*atomic_begin)(struct exynos_drm_crtc *crtc);

drivers/gpu/drm/exynos/exynos_drm_drv.h

148

void (*update_plane)(struct exynos_drm_crtc *crtc,

drivers/gpu/drm/exynos/exynos_drm_drv.h

150

void (*disable_plane)(struct exynos_drm_crtc *crtc,

drivers/gpu/drm/exynos/exynos_drm_drv.h

152

void (*atomic_flush)(struct exynos_drm_crtc *crtc);

drivers/gpu/drm/exynos/exynos_drm_drv.h

153

void (*te_handler)(struct exynos_drm_crtc *crtc);

drivers/gpu/drm/exynos/exynos_drm_drv.h

178

static inline void exynos_drm_pipe_clk_enable(struct exynos_drm_crtc *crtc,

drivers/gpu/drm/exynos/exynos_drm_drv.h

181

if (crtc->pipe_clk)

drivers/gpu/drm/exynos/exynos_drm_drv.h

182

crtc->pipe_clk->enable(crtc->pipe_clk, enable);

drivers/gpu/drm/exynos/exynos_drm_drv.h

65

struct exynos_drm_rect crtc;

drivers/gpu/drm/exynos/exynos_drm_dsi.c

31

exynos_drm_crtc_te_handler(encoder->crtc);

drivers/gpu/drm/exynos/exynos_drm_fimd.c

1017

static void fimd_te_handler(struct exynos_drm_crtc *crtc)

drivers/gpu/drm/exynos/exynos_drm_fimd.c

1019

struct fimd_context *ctx = crtc->ctx;

drivers/gpu/drm/exynos/exynos_drm_fimd.c

1044

drm_crtc_handle_vblank(&ctx->crtc->base);

drivers/gpu/drm/exynos/exynos_drm_fimd.c

1095

drm_crtc_handle_vblank(&ctx->crtc->base);

drivers/gpu/drm/exynos/exynos_drm_fimd.c

1141

ctx->crtc = exynos_drm_crtc_create(drm_dev, &exynos_plane->base,

drivers/gpu/drm/exynos/exynos_drm_fimd.c

1143

if (IS_ERR(ctx->crtc))

drivers/gpu/drm/exynos/exynos_drm_fimd.c

1144

return PTR_ERR(ctx->crtc);

drivers/gpu/drm/exynos/exynos_drm_fimd.c

1148

ctx->crtc->pipe_clk = &ctx->dp_clk;

drivers/gpu/drm/exynos/exynos_drm_fimd.c

1157

ret = fimd_clear_channels(ctx->crtc);

drivers/gpu/drm/exynos/exynos_drm_fimd.c

1170

fimd_atomic_disable(ctx->crtc);

drivers/gpu/drm/exynos/exynos_drm_fimd.c

177

struct exynos_drm_crtc *crtc;

drivers/gpu/drm/exynos/exynos_drm_fimd.c

263

static int fimd_enable_vblank(struct exynos_drm_crtc *crtc)

drivers/gpu/drm/exynos/exynos_drm_fimd.c

265

struct fimd_context *ctx = crtc->ctx;

drivers/gpu/drm/exynos/exynos_drm_fimd.c

295

static void fimd_disable_vblank(struct exynos_drm_crtc *crtc)

drivers/gpu/drm/exynos/exynos_drm_fimd.c

297

struct fimd_context *ctx = crtc->ctx;

drivers/gpu/drm/exynos/exynos_drm_fimd.c

319

static void fimd_wait_for_vblank(struct exynos_drm_crtc *crtc)

drivers/gpu/drm/exynos/exynos_drm_fimd.c

321

struct fimd_context *ctx = crtc->ctx;

drivers/gpu/drm/exynos/exynos_drm_fimd.c

365

static int fimd_clear_channels(struct exynos_drm_crtc *crtc)

drivers/gpu/drm/exynos/exynos_drm_fimd.c

367

struct fimd_context *ctx = crtc->ctx;

drivers/gpu/drm/exynos/exynos_drm_fimd.c

400

fimd_enable_vblank(ctx->crtc);

drivers/gpu/drm/exynos/exynos_drm_fimd.c

401

fimd_wait_for_vblank(ctx->crtc);

drivers/gpu/drm/exynos/exynos_drm_fimd.c

402

fimd_disable_vblank(ctx->crtc);

drivers/gpu/drm/exynos/exynos_drm_fimd.c

416

static int fimd_atomic_check(struct exynos_drm_crtc *crtc,

drivers/gpu/drm/exynos/exynos_drm_fimd.c

420

struct fimd_context *ctx = crtc->ctx;

drivers/gpu/drm/exynos/exynos_drm_fimd.c

480

static void fimd_commit(struct exynos_drm_crtc *crtc)

drivers/gpu/drm/exynos/exynos_drm_fimd.c

482

struct fimd_context *ctx = crtc->ctx;

drivers/gpu/drm/exynos/exynos_drm_fimd.c

483

struct drm_display_mode *mode = &crtc->base.state->adjusted_mode;

drivers/gpu/drm/exynos/exynos_drm_fimd.c

805

static void fimd_atomic_begin(struct exynos_drm_crtc *crtc)

drivers/gpu/drm/exynos/exynos_drm_fimd.c

807

struct fimd_context *ctx = crtc->ctx;

drivers/gpu/drm/exynos/exynos_drm_fimd.c

817

static void fimd_atomic_flush(struct exynos_drm_crtc *crtc)

drivers/gpu/drm/exynos/exynos_drm_fimd.c

819

struct fimd_context *ctx = crtc->ctx;

drivers/gpu/drm/exynos/exynos_drm_fimd.c

828

exynos_crtc_handle_event(crtc);

drivers/gpu/drm/exynos/exynos_drm_fimd.c

831

static void fimd_update_plane(struct exynos_drm_crtc *crtc,

drivers/gpu/drm/exynos/exynos_drm_fimd.c

836

struct fimd_context *ctx = crtc->ctx;

drivers/gpu/drm/exynos/exynos_drm_fimd.c

857

size = pitch * state->crtc.h;

drivers/gpu/drm/exynos/exynos_drm_fimd.c

865

state->crtc.w, state->crtc.h);

drivers/gpu/drm/exynos/exynos_drm_fimd.c

868

buf_offsize = pitch - (state->crtc.w * cpp);

drivers/gpu/drm/exynos/exynos_drm_fimd.c

869

line_size = state->crtc.w * cpp;

drivers/gpu/drm/exynos/exynos_drm_fimd.c

877

val = VIDOSDxA_TOPLEFT_X(state->crtc.x) |

drivers/gpu/drm/exynos/exynos_drm_fimd.c

878

VIDOSDxA_TOPLEFT_Y(state->crtc.y) |

drivers/gpu/drm/exynos/exynos_drm_fimd.c

879

VIDOSDxA_TOPLEFT_X_E(state->crtc.x) |

drivers/gpu/drm/exynos/exynos_drm_fimd.c

880

VIDOSDxA_TOPLEFT_Y_E(state->crtc.y);

drivers/gpu/drm/exynos/exynos_drm_fimd.c

883

last_x = state->crtc.x + state->crtc.w;

drivers/gpu/drm/exynos/exynos_drm_fimd.c

886

last_y = state->crtc.y + state->crtc.h;

drivers/gpu/drm/exynos/exynos_drm_fimd.c

897

state->crtc.x, state->crtc.y, last_x, last_y);

drivers/gpu/drm/exynos/exynos_drm_fimd.c

904

val = state->crtc.w * state->crtc.h;

drivers/gpu/drm/exynos/exynos_drm_fimd.c

926

static void fimd_disable_plane(struct exynos_drm_crtc *crtc,

drivers/gpu/drm/exynos/exynos_drm_fimd.c

929

struct fimd_context *ctx = crtc->ctx;

drivers/gpu/drm/exynos/exynos_drm_fimd.c

941

static void fimd_atomic_enable(struct exynos_drm_crtc *crtc)

drivers/gpu/drm/exynos/exynos_drm_fimd.c

943

struct fimd_context *ctx = crtc->ctx;

drivers/gpu/drm/exynos/exynos_drm_fimd.c

957

fimd_enable_vblank(ctx->crtc);

drivers/gpu/drm/exynos/exynos_drm_fimd.c

959

fimd_commit(ctx->crtc);

drivers/gpu/drm/exynos/exynos_drm_fimd.c

962

static void fimd_atomic_disable(struct exynos_drm_crtc *crtc)

drivers/gpu/drm/exynos/exynos_drm_fimd.c

964

struct fimd_context *ctx = crtc->ctx;

drivers/gpu/drm/exynos/exynos_drm_fimd.c

976

fimd_disable_plane(crtc, &ctx->planes[i]);

drivers/gpu/drm/exynos/exynos_drm_fimd.c

978

fimd_enable_vblank(crtc);

drivers/gpu/drm/exynos/exynos_drm_fimd.c

979

fimd_wait_for_vblank(crtc);

drivers/gpu/drm/exynos/exynos_drm_fimd.c

980

fimd_disable_vblank(crtc);

drivers/gpu/drm/exynos/exynos_drm_mic.c

256

mic->i80_mode = to_exynos_crtc(bridge->encoder->crtc)->i80_mode;

drivers/gpu/drm/exynos/exynos_drm_mic.c

308

struct exynos_drm_crtc *crtc = exynos_drm_crtc_get_by_type(drm_dev,

drivers/gpu/drm/exynos/exynos_drm_mic.c

313

if (e->possible_crtcs == drm_crtc_mask(&crtc->base))

drivers/gpu/drm/exynos/exynos_drm_plane.c

114

exynos_state->crtc.x = crtc_x;

drivers/gpu/drm/exynos/exynos_drm_plane.c

115

exynos_state->crtc.y = crtc_y;

drivers/gpu/drm/exynos/exynos_drm_plane.c

116

exynos_state->crtc.w = actual_w;

drivers/gpu/drm/exynos/exynos_drm_plane.c

117

exynos_state->crtc.h = actual_h;

drivers/gpu/drm/exynos/exynos_drm_plane.c

119

DRM_DEV_DEBUG_KMS(crtc->dev->dev,

drivers/gpu/drm/exynos/exynos_drm_plane.c

121

exynos_state->crtc.x, exynos_state->crtc.y,

drivers/gpu/drm/exynos/exynos_drm_plane.c

122

exynos_state->crtc.w, exynos_state->crtc.h);

drivers/gpu/drm/exynos/exynos_drm_plane.c

205

struct drm_crtc *crtc = state->base.crtc;

drivers/gpu/drm/exynos/exynos_drm_plane.c

211

if (state->src.w == state->crtc.w)

drivers/gpu/drm/exynos/exynos_drm_plane.c

214

if (state->src.h == state->crtc.h)

drivers/gpu/drm/exynos/exynos_drm_plane.c

228

DRM_DEV_DEBUG_KMS(crtc->dev->dev, "scaling mode is not supported");

drivers/gpu/drm/exynos/exynos_drm_plane.c

242

if (!new_plane_state->crtc || !new_plane_state->fb)

drivers/gpu/drm/exynos/exynos_drm_plane.c

261

struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(new_state->crtc);

drivers/gpu/drm/exynos/exynos_drm_plane.c

264

if (!new_state->crtc)

drivers/gpu/drm/exynos/exynos_drm_plane.c

276

struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(old_state->crtc);

drivers/gpu/drm/exynos/exynos_drm_plane.c

278

if (!old_state->crtc)

drivers/gpu/drm/exynos/exynos_drm_plane.c

60

struct drm_crtc *crtc = state->crtc;

drivers/gpu/drm/exynos/exynos_drm_plane.c

62

drm_atomic_get_new_crtc_state(state->state, crtc);

drivers/gpu/drm/exynos/exynos_drm_vidi.c

108

static void vidi_disable_vblank(struct exynos_drm_crtc *crtc)

drivers/gpu/drm/exynos/exynos_drm_vidi.c

112

static void vidi_update_plane(struct exynos_drm_crtc *crtc,

drivers/gpu/drm/exynos/exynos_drm_vidi.c

116

struct vidi_context *ctx = crtc->ctx;

drivers/gpu/drm/exynos/exynos_drm_vidi.c

126

static void vidi_atomic_enable(struct exynos_drm_crtc *crtc)

drivers/gpu/drm/exynos/exynos_drm_vidi.c

128

struct vidi_context *ctx = crtc->ctx;

drivers/gpu/drm/exynos/exynos_drm_vidi.c

136

drm_crtc_vblank_on(&crtc->base);

drivers/gpu/drm/exynos/exynos_drm_vidi.c

139

static void vidi_atomic_disable(struct exynos_drm_crtc *crtc)

drivers/gpu/drm/exynos/exynos_drm_vidi.c

141

struct vidi_context *ctx = crtc->ctx;

drivers/gpu/drm/exynos/exynos_drm_vidi.c

143

drm_crtc_vblank_off(&crtc->base);

drivers/gpu/drm/exynos/exynos_drm_vidi.c

165

if (drm_crtc_handle_vblank(&ctx->crtc->base))

drivers/gpu/drm/exynos/exynos_drm_vidi.c

42

struct exynos_drm_crtc *crtc;

drivers/gpu/drm/exynos/exynos_drm_vidi.c

441

ctx->crtc = exynos_drm_crtc_create(drm_dev, &exynos_plane->base,

drivers/gpu/drm/exynos/exynos_drm_vidi.c

443

if (IS_ERR(ctx->crtc)) {

drivers/gpu/drm/exynos/exynos_drm_vidi.c

445

return PTR_ERR(ctx->crtc);

drivers/gpu/drm/exynos/exynos_drm_vidi.c

95

static int vidi_enable_vblank(struct exynos_drm_crtc *crtc)

drivers/gpu/drm/exynos/exynos_drm_vidi.c

97

struct vidi_context *ctx = crtc->ctx;

drivers/gpu/drm/exynos/exynos_hdmi.c

1142

struct drm_display_mode *m = &hdata->encoder.crtc->state->mode;

drivers/gpu/drm/exynos/exynos_hdmi.c

1217

struct drm_display_mode *m = &hdata->encoder.crtc->state->mode;

drivers/gpu/drm/exynos/exynos_hdmi.c

1296

struct drm_display_mode *m = &hdata->encoder.crtc->state->mode;

drivers/gpu/drm/exynos/exynos_hdmi.c

1298

&hdata->encoder.crtc->state->adjusted_mode;

drivers/gpu/drm/exynos/exynos_hdmi.c

1442

struct drm_display_mode *m = &hdata->encoder.crtc->state->mode;

drivers/gpu/drm/exynos/exynos_hdmi.c

1858

struct exynos_drm_crtc *crtc;

drivers/gpu/drm/exynos/exynos_hdmi.c

1873

crtc = exynos_drm_crtc_get_by_type(drm_dev, EXYNOS_DISPLAY_TYPE_HDMI);

drivers/gpu/drm/exynos/exynos_hdmi.c

1874

if (IS_ERR(crtc))

drivers/gpu/drm/exynos/exynos_hdmi.c

1875

return PTR_ERR(crtc);

drivers/gpu/drm/exynos/exynos_hdmi.c

1876

crtc->pipe_clk = &hdata->phy_clk;

drivers/gpu/drm/exynos/exynos_hdmi.c

813

struct drm_display_mode *m = &hdata->encoder.crtc->state->mode;

drivers/gpu/drm/exynos/exynos_mixer.c

1007

exynos_drm_pipe_clk_enable(crtc, true);

drivers/gpu/drm/exynos/exynos_mixer.c

101

struct exynos_drm_crtc *crtc;

drivers/gpu/drm/exynos/exynos_mixer.c

1027

static void mixer_atomic_disable(struct exynos_drm_crtc *crtc)

drivers/gpu/drm/exynos/exynos_mixer.c

1029

struct mixer_context *ctx = crtc->ctx;

drivers/gpu/drm/exynos/exynos_mixer.c

1039

mixer_disable_plane(crtc, &ctx->planes[i]);

drivers/gpu/drm/exynos/exynos_mixer.c

1041

exynos_drm_pipe_clk_enable(crtc, false);

drivers/gpu/drm/exynos/exynos_mixer.c

1048

static enum drm_mode_status mixer_mode_valid(struct exynos_drm_crtc *crtc,

drivers/gpu/drm/exynos/exynos_mixer.c

1051

struct mixer_context *ctx = crtc->ctx;

drivers/gpu/drm/exynos/exynos_mixer.c

1074

static bool mixer_mode_fixup(struct exynos_drm_crtc *crtc,

drivers/gpu/drm/exynos/exynos_mixer.c

1078

struct mixer_context *ctx = crtc->ctx;

drivers/gpu/drm/exynos/exynos_mixer.c

1200

ctx->crtc = exynos_drm_crtc_create(drm_dev, &exynos_plane->base,

drivers/gpu/drm/exynos/exynos_mixer.c

1202

if (IS_ERR(ctx->crtc)) {

drivers/gpu/drm/exynos/exynos_mixer.c

1204

ret = PTR_ERR(ctx->crtc);

drivers/gpu/drm/exynos/exynos_mixer.c

507

struct drm_display_mode *mode = &ctx->crtc->base.state->adjusted_mode;

drivers/gpu/drm/exynos/exynos_mixer.c

566

vp_reg_write(ctx, VP_DST_WIDTH, state->crtc.w);

drivers/gpu/drm/exynos/exynos_mixer.c

567

vp_reg_write(ctx, VP_DST_H_POSITION, state->crtc.x);

drivers/gpu/drm/exynos/exynos_mixer.c

572

vp_reg_write(ctx, VP_DST_HEIGHT, state->crtc.h / 2);

drivers/gpu/drm/exynos/exynos_mixer.c

573

vp_reg_write(ctx, VP_DST_V_POSITION, state->crtc.y / 2);

drivers/gpu/drm/exynos/exynos_mixer.c

577

vp_reg_write(ctx, VP_DST_HEIGHT, state->crtc.h);

drivers/gpu/drm/exynos/exynos_mixer.c

578

vp_reg_write(ctx, VP_DST_V_POSITION, state->crtc.y);

drivers/gpu/drm/exynos/exynos_mixer.c

648

dst_x_offset = state->crtc.x;

drivers/gpu/drm/exynos/exynos_mixer.c

649

dst_y_offset = state->crtc.y;

drivers/gpu/drm/exynos/exynos_mixer.c

765

drm_crtc_handle_vblank(&ctx->crtc->base);

drivers/gpu/drm/exynos/exynos_mixer.c

909

static int mixer_enable_vblank(struct exynos_drm_crtc *crtc)

drivers/gpu/drm/exynos/exynos_mixer.c

911

struct mixer_context *mixer_ctx = crtc->ctx;

drivers/gpu/drm/exynos/exynos_mixer.c

924

static void mixer_disable_vblank(struct exynos_drm_crtc *crtc)

drivers/gpu/drm/exynos/exynos_mixer.c

926

struct mixer_context *mixer_ctx = crtc->ctx;

drivers/gpu/drm/exynos/exynos_mixer.c

938

static void mixer_atomic_begin(struct exynos_drm_crtc *crtc)

drivers/gpu/drm/exynos/exynos_mixer.c

940

struct mixer_context *ctx = crtc->ctx;

drivers/gpu/drm/exynos/exynos_mixer.c

950

static void mixer_update_plane(struct exynos_drm_crtc *crtc,

drivers/gpu/drm/exynos/exynos_mixer.c

953

struct mixer_context *mixer_ctx = crtc->ctx;

drivers/gpu/drm/exynos/exynos_mixer.c

966

static void mixer_disable_plane(struct exynos_drm_crtc *crtc,

drivers/gpu/drm/exynos/exynos_mixer.c

969

struct mixer_context *mixer_ctx = crtc->ctx;

drivers/gpu/drm/exynos/exynos_mixer.c

982

static void mixer_atomic_flush(struct exynos_drm_crtc *crtc)

drivers/gpu/drm/exynos/exynos_mixer.c

984

struct mixer_context *mixer_ctx = crtc->ctx;

drivers/gpu/drm/exynos/exynos_mixer.c

990

exynos_crtc_handle_event(crtc);

drivers/gpu/drm/exynos/exynos_mixer.c

993

static void mixer_atomic_enable(struct exynos_drm_crtc *crtc)

drivers/gpu/drm/exynos/exynos_mixer.c

995

struct mixer_context *ctx = crtc->ctx;

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c

135

static int fsl_dcu_drm_crtc_enable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c

137

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c

148

static void fsl_dcu_drm_crtc_disable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c

150

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c

173

struct drm_crtc *crtc = &fsl_dev->crtc;

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c

182

ret = drm_crtc_init_with_planes(fsl_dev->drm, crtc, primary, NULL,

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c

189

drm_crtc_helper_add(crtc, &fsl_dcu_drm_crtc_helper_funcs);

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c

23

static void fsl_dcu_drm_crtc_atomic_flush(struct drm_crtc *crtc,

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c

26

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c

28

struct drm_pending_vblank_event *event = crtc->state->event;

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c

34

crtc->state->event = NULL;

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c

36

spin_lock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c

37

if (drm_crtc_vblank_get(crtc) == 0)

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c

38

drm_crtc_arm_vblank_event(crtc, event);

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c

40

drm_crtc_send_vblank_event(crtc, event);

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c

41

spin_unlock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c

45

static void fsl_dcu_drm_crtc_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c

49

crtc);

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c

50

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c

56

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c

66

static void fsl_dcu_drm_crtc_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c

69

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c

79

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c

82

static void fsl_dcu_drm_crtc_mode_set_nofb(struct drm_crtc *crtc)

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c

84

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c

87

struct drm_display_mode *mode = &crtc->state->mode;

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h

193

struct drm_crtc crtc;

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_kms.c

37

ret = fsl_dcu_drm_encoder_create(fsl_dev, &fsl_dev->crtc);

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_output.h

25

struct drm_crtc *crtc);

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c

45

if (!new_plane_state->fb || !new_plane_state->crtc)

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_rgb.c

23

struct drm_crtc *crtc)

drivers/gpu/drm/gma500/cdv_device.h

19

struct drm_crtc *crtc);

drivers/gpu/drm/gma500/cdv_device.h

20

extern void cdv_update_wm(struct drm_device *dev, struct drm_crtc *crtc);

drivers/gpu/drm/gma500/cdv_intel_crt.c

94

struct drm_crtc *crtc = encoder->crtc;

drivers/gpu/drm/gma500/cdv_intel_crt.c

95

struct gma_crtc *gma_crtc = to_gma_crtc(crtc);

drivers/gpu/drm/gma500/cdv_intel_display.c

214

cdv_dpll_set_clock_cdv(struct drm_device *dev, struct drm_crtc *crtc,

drivers/gpu/drm/gma500/cdv_intel_display.c

217

struct gma_crtc *gma_crtc = to_gma_crtc(crtc);

drivers/gpu/drm/gma500/cdv_intel_display.c

25

struct drm_crtc *crtc, int target,

drivers/gpu/drm/gma500/cdv_intel_display.c

365

static const struct gma_limit_t *cdv_intel_limit(struct drm_crtc *crtc,

drivers/gpu/drm/gma500/cdv_intel_display.c

369

if (gma_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) {

drivers/gpu/drm/gma500/cdv_intel_display.c

378

} else if (gma_pipe_has_type(crtc, INTEL_OUTPUT_DISPLAYPORT) ||

drivers/gpu/drm/gma500/cdv_intel_display.c

379

gma_pipe_has_type(crtc, INTEL_OUTPUT_EDP)) {

drivers/gpu/drm/gma500/cdv_intel_display.c

403

struct drm_crtc *crtc, int target,

drivers/gpu/drm/gma500/cdv_intel_display.c

407

struct gma_crtc *gma_crtc = to_gma_crtc(crtc);

drivers/gpu/drm/gma500/cdv_intel_display.c

459

struct drm_crtc *crtc;

drivers/gpu/drm/gma500/cdv_intel_display.c

463

crtc = dev_priv->pipe_to_crtc_mapping[pipe];

drivers/gpu/drm/gma500/cdv_intel_display.c

464

gma_crtc = to_gma_crtc(crtc);

drivers/gpu/drm/gma500/cdv_intel_display.c

466

if (crtc->primary->fb == NULL || !gma_crtc->active)

drivers/gpu/drm/gma500/cdv_intel_display.c

492

void cdv_update_wm(struct drm_device *dev, struct drm_crtc *crtc)

drivers/gpu/drm/gma500/cdv_intel_display.c

495

struct gma_crtc *gma_crtc = to_gma_crtc(crtc);

drivers/gpu/drm/gma500/cdv_intel_display.c

521

gma_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) {

drivers/gpu/drm/gma500/cdv_intel_display.c

572

static int cdv_intel_crtc_mode_set(struct drm_crtc *crtc,

drivers/gpu/drm/gma500/cdv_intel_display.c

578

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/gma500/cdv_intel_display.c

580

struct gma_crtc *gma_crtc = to_gma_crtc(crtc);

drivers/gpu/drm/gma500/cdv_intel_display.c

601

|| connector->encoder->crtc != crtc)

drivers/gpu/drm/gma500/cdv_intel_display.c

656

limit = gma_crtc->clock_funcs->limit(crtc, refclk);

drivers/gpu/drm/gma500/cdv_intel_display.c

658

ok = limit->find_pll(limit, crtc, adjusted_mode->clock, refclk,

drivers/gpu/drm/gma500/cdv_intel_display.c

669

cdv_intel_dp_set_m_n(crtc, mode, adjusted_mode);

drivers/gpu/drm/gma500/cdv_intel_display.c

726

cdv_dpll_set_clock_cdv(dev, crtc, &clock, is_lvds, ddi_select);

drivers/gpu/drm/gma500/cdv_intel_display.c

814

crtc->helper_private;

drivers/gpu/drm/gma500/cdv_intel_display.c

815

crtc_funcs->mode_set_base(crtc, x, y, old_fb);

drivers/gpu/drm/gma500/cdv_intel_display.c

837

struct drm_crtc *crtc)

drivers/gpu/drm/gma500/cdv_intel_display.c

840

struct gma_crtc *gma_crtc = to_gma_crtc(crtc);

drivers/gpu/drm/gma500/cdv_intel_display.c

916

struct drm_crtc *crtc)

drivers/gpu/drm/gma500/cdv_intel_display.c

918

struct gma_crtc *gma_crtc = to_gma_crtc(crtc);

drivers/gpu/drm/gma500/cdv_intel_display.c

946

mode->clock = cdv_intel_crtc_clock_get(dev, crtc);

drivers/gpu/drm/gma500/cdv_intel_dp.c

1001

if (encoder->crtc != crtc)

drivers/gpu/drm/gma500/cdv_intel_dp.c

1039

struct drm_crtc *crtc = encoder->crtc;

drivers/gpu/drm/gma500/cdv_intel_dp.c

1040

struct gma_crtc *gma_crtc = to_gma_crtc(crtc);

drivers/gpu/drm/gma500/cdv_intel_dp.c

1848

if (encoder->base.crtc) {

drivers/gpu/drm/gma500/cdv_intel_dp.c

1849

struct drm_crtc *crtc = encoder->base.crtc;

drivers/gpu/drm/gma500/cdv_intel_dp.c

1850

drm_crtc_helper_set_mode(crtc, &crtc->mode,

drivers/gpu/drm/gma500/cdv_intel_dp.c

1851

crtc->x, crtc->y,

drivers/gpu/drm/gma500/cdv_intel_dp.c

1852

crtc->primary->fb);

drivers/gpu/drm/gma500/cdv_intel_dp.c

982

cdv_intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode,

drivers/gpu/drm/gma500/cdv_intel_dp.c

985

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/gma500/cdv_intel_dp.c

989

struct gma_crtc *gma_crtc = to_gma_crtc(crtc);

drivers/gpu/drm/gma500/cdv_intel_hdmi.c

159

struct gma_crtc *crtc = to_gma_crtc(encoder->crtc);

drivers/gpu/drm/gma500/cdv_intel_hdmi.c

163

if (!crtc)

drivers/gpu/drm/gma500/cdv_intel_hdmi.c

191

if (crtc->saved_mode.hdisplay != 0 &&

drivers/gpu/drm/gma500/cdv_intel_hdmi.c

192

crtc->saved_mode.vdisplay != 0) {

drivers/gpu/drm/gma500/cdv_intel_hdmi.c

194

if (!drm_crtc_helper_set_mode(encoder->crtc, &crtc->saved_mode,

drivers/gpu/drm/gma500/cdv_intel_hdmi.c

195

encoder->crtc->x, encoder->crtc->y, encoder->crtc->primary->fb))

drivers/gpu/drm/gma500/cdv_intel_hdmi.c

200

helpers->mode_set(encoder, &crtc->saved_mode,

drivers/gpu/drm/gma500/cdv_intel_hdmi.c

201

&crtc->saved_adjusted_mode);

drivers/gpu/drm/gma500/cdv_intel_hdmi.c

70

struct drm_crtc *crtc = encoder->crtc;

drivers/gpu/drm/gma500/cdv_intel_hdmi.c

71

struct gma_crtc *gma_crtc = to_gma_crtc(crtc);

drivers/gpu/drm/gma500/cdv_intel_lvds.c

195

&& tmp_encoder->crtc == encoder->crtc) {

drivers/gpu/drm/gma500/cdv_intel_lvds.c

267

struct gma_crtc *gma_crtc = to_gma_crtc(encoder->crtc);

drivers/gpu/drm/gma500/cdv_intel_lvds.c

343

struct gma_crtc *crtc = to_gma_crtc(encoder->crtc);

drivers/gpu/drm/gma500/cdv_intel_lvds.c

346

if (!crtc)

drivers/gpu/drm/gma500/cdv_intel_lvds.c

373

if (crtc->saved_mode.hdisplay != 0 &&

drivers/gpu/drm/gma500/cdv_intel_lvds.c

374

crtc->saved_mode.vdisplay != 0) {

drivers/gpu/drm/gma500/cdv_intel_lvds.c

375

if (!drm_crtc_helper_set_mode(encoder->crtc,

drivers/gpu/drm/gma500/cdv_intel_lvds.c

376

&crtc->saved_mode,

drivers/gpu/drm/gma500/cdv_intel_lvds.c

377

encoder->crtc->x,

drivers/gpu/drm/gma500/cdv_intel_lvds.c

378

encoder->crtc->y,

drivers/gpu/drm/gma500/cdv_intel_lvds.c

379

encoder->crtc->primary->fb))

drivers/gpu/drm/gma500/cdv_intel_lvds.c

487

struct drm_crtc *crtc;

drivers/gpu/drm/gma500/cdv_intel_lvds.c

615

crtc = psb_intel_get_crtc_from_pipe(dev, pipe);

drivers/gpu/drm/gma500/cdv_intel_lvds.c

617

if (crtc && (lvds & LVDS_PORT_EN)) {

drivers/gpu/drm/gma500/cdv_intel_lvds.c

619

cdv_intel_crtc_mode_get(dev, crtc);

drivers/gpu/drm/gma500/gma_display.c

144

void gma_crtc_load_lut(struct drm_crtc *crtc)

drivers/gpu/drm/gma500/gma_display.c

146

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/gma500/gma_display.c

148

struct gma_crtc *gma_crtc = to_gma_crtc(crtc);

drivers/gpu/drm/gma500/gma_display.c

155

if (!crtc->enabled)

drivers/gpu/drm/gma500/gma_display.c

158

r = crtc->gamma_store;

drivers/gpu/drm/gma500/gma_display.c

159

g = r + crtc->gamma_size;

drivers/gpu/drm/gma500/gma_display.c

160

b = g + crtc->gamma_size;

drivers/gpu/drm/gma500/gma_display.c

182

static int gma_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,

drivers/gpu/drm/gma500/gma_display.c

186

gma_crtc_load_lut(crtc);

drivers/gpu/drm/gma500/gma_display.c

197

void gma_crtc_dpms(struct drm_crtc *crtc, int mode)

drivers/gpu/drm/gma500/gma_display.c

199

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/gma500/gma_display.c

201

struct gma_crtc *gma_crtc = to_gma_crtc(crtc);

drivers/gpu/drm/gma500/gma_display.c

261

gma_crtc_load_lut(crtc);

drivers/gpu/drm/gma500/gma_display.c

267

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/gma500/gma_display.c

283

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/gma500/gma_display.c

30

bool gma_pipe_has_type(struct drm_crtc *crtc, int type)

drivers/gpu/drm/gma500/gma_display.c

32

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/gma500/gma_display.c

323

dev_priv->ops->update_wm(dev, crtc);

drivers/gpu/drm/gma500/gma_display.c

329

static int gma_crtc_cursor_set(struct drm_crtc *crtc,

drivers/gpu/drm/gma500/gma_display.c

333

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/gma500/gma_display.c

335

struct gma_crtc *gma_crtc = to_gma_crtc(crtc);

drivers/gpu/drm/gma500/gma_display.c

38

if (connector->encoder && connector->encoder->crtc == crtc) {

drivers/gpu/drm/gma500/gma_display.c

444

static int gma_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)

drivers/gpu/drm/gma500/gma_display.c

446

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/gma500/gma_display.c

447

struct gma_crtc *gma_crtc = to_gma_crtc(crtc);

drivers/gpu/drm/gma500/gma_display.c

474

void gma_crtc_prepare(struct drm_crtc *crtc)

drivers/gpu/drm/gma500/gma_display.c

476

const struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private;

drivers/gpu/drm/gma500/gma_display.c

477

crtc_funcs->dpms(crtc, DRM_MODE_DPMS_OFF);

drivers/gpu/drm/gma500/gma_display.c

480

void gma_crtc_commit(struct drm_crtc *crtc)

drivers/gpu/drm/gma500/gma_display.c

482

const struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private;

drivers/gpu/drm/gma500/gma_display.c

483

crtc_funcs->dpms(crtc, DRM_MODE_DPMS_ON);

drivers/gpu/drm/gma500/gma_display.c

486

void gma_crtc_disable(struct drm_crtc *crtc)

drivers/gpu/drm/gma500/gma_display.c

489

const struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private;

drivers/gpu/drm/gma500/gma_display.c

491

crtc_funcs->dpms(crtc, DRM_MODE_DPMS_OFF);

drivers/gpu/drm/gma500/gma_display.c

493

if (crtc->primary->fb) {

drivers/gpu/drm/gma500/gma_display.c

494

pobj = to_psb_gem_object(crtc->primary->fb->obj[0]);

drivers/gpu/drm/gma500/gma_display.c

499

void gma_crtc_destroy(struct drm_crtc *crtc)

drivers/gpu/drm/gma500/gma_display.c

501

struct gma_crtc *gma_crtc = to_gma_crtc(crtc);

drivers/gpu/drm/gma500/gma_display.c

507

drm_crtc_cleanup(crtc);

drivers/gpu/drm/gma500/gma_display.c

511

int gma_crtc_page_flip(struct drm_crtc *crtc,

drivers/gpu/drm/gma500/gma_display.c

517

struct gma_crtc *gma_crtc = to_gma_crtc(crtc);

drivers/gpu/drm/gma500/gma_display.c

518

struct drm_framebuffer *current_fb = crtc->primary->fb;

drivers/gpu/drm/gma500/gma_display.c

519

struct drm_framebuffer *old_fb = crtc->primary->old_fb;

drivers/gpu/drm/gma500/gma_display.c

520

const struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private;

drivers/gpu/drm/gma500/gma_display.c

521

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/gma500/gma_display.c

529

crtc->primary->fb = fb;

drivers/gpu/drm/gma500/gma_display.c

534

WARN_ON(drm_crtc_vblank_get(crtc) != 0);

drivers/gpu/drm/gma500/gma_display.c

540

ret = crtc_funcs->mode_set_base(crtc, crtc->x, crtc->y, old_fb);

drivers/gpu/drm/gma500/gma_display.c

545

drm_crtc_vblank_put(crtc);

drivers/gpu/drm/gma500/gma_display.c

550

ret = crtc_funcs->mode_set_base(crtc, crtc->x, crtc->y, old_fb);

drivers/gpu/drm/gma500/gma_display.c

555

crtc->primary->fb = current_fb;

drivers/gpu/drm/gma500/gma_display.c

575

void gma_crtc_save(struct drm_crtc *crtc)

drivers/gpu/drm/gma500/gma_display.c

577

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/gma500/gma_display.c

579

struct gma_crtc *gma_crtc = to_gma_crtc(crtc);

drivers/gpu/drm/gma500/gma_display.c

58

int gma_pipe_set_base(struct drm_crtc *crtc, int x, int y,

drivers/gpu/drm/gma500/gma_display.c

61

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/gma500/gma_display.c

618

void gma_crtc_restore(struct drm_crtc *crtc)

drivers/gpu/drm/gma500/gma_display.c

620

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/gma500/gma_display.c

622

struct gma_crtc *gma_crtc = to_gma_crtc(crtc);

drivers/gpu/drm/gma500/gma_display.c

63

struct gma_crtc *gma_crtc = to_gma_crtc(crtc);

drivers/gpu/drm/gma500/gma_display.c

64

struct drm_framebuffer *fb = crtc->primary->fb;

drivers/gpu/drm/gma500/gma_display.c

719

bool gma_pll_is_valid(struct drm_crtc *crtc,

drivers/gpu/drm/gma500/gma_display.c

751

struct drm_crtc *crtc, int target, int refclk,

drivers/gpu/drm/gma500/gma_display.c

754

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/gma500/gma_display.c

756

to_gma_crtc(crtc)->clock_funcs;

drivers/gpu/drm/gma500/gma_display.c

760

if (gma_pipe_has_type(crtc, INTEL_OUTPUT_LVDS) &&

drivers/gpu/drm/gma500/gma_display.c

796

if (!clock_funcs->pll_is_valid(crtc,

drivers/gpu/drm/gma500/gma_display.h

50

const struct gma_limit_t *(*limit)(struct drm_crtc *crtc, int refclk);

drivers/gpu/drm/gma500/gma_display.h

51

bool (*pll_is_valid)(struct drm_crtc *crtc,

drivers/gpu/drm/gma500/gma_display.h

57

extern bool gma_pipe_has_type(struct drm_crtc *crtc, int type);

drivers/gpu/drm/gma500/gma_display.h

59

extern int gma_pipe_set_base(struct drm_crtc *crtc, int x, int y,

drivers/gpu/drm/gma500/gma_display.h

61

extern void gma_crtc_load_lut(struct drm_crtc *crtc);

drivers/gpu/drm/gma500/gma_display.h

62

extern void gma_crtc_dpms(struct drm_crtc *crtc, int mode);

drivers/gpu/drm/gma500/gma_display.h

63

extern void gma_crtc_prepare(struct drm_crtc *crtc);

drivers/gpu/drm/gma500/gma_display.h

64

extern void gma_crtc_commit(struct drm_crtc *crtc);

drivers/gpu/drm/gma500/gma_display.h

65

extern void gma_crtc_disable(struct drm_crtc *crtc);

drivers/gpu/drm/gma500/gma_display.h

66

extern void gma_crtc_destroy(struct drm_crtc *crtc);

drivers/gpu/drm/gma500/gma_display.h

67

extern int gma_crtc_page_flip(struct drm_crtc *crtc,

drivers/gpu/drm/gma500/gma_display.h

73

extern void gma_crtc_save(struct drm_crtc *crtc);

drivers/gpu/drm/gma500/gma_display.h

74

extern void gma_crtc_restore(struct drm_crtc *crtc);

drivers/gpu/drm/gma500/gma_display.h

83

extern const struct gma_limit_t *gma_limit(struct drm_crtc *crtc, int refclk);

drivers/gpu/drm/gma500/gma_display.h

84

extern bool gma_pll_is_valid(struct drm_crtc *crtc,

drivers/gpu/drm/gma500/gma_display.h

88

struct drm_crtc *crtc, int target, int refclk,

drivers/gpu/drm/gma500/oaktrail.h

242

extern int oaktrail_crtc_hdmi_mode_set(struct drm_crtc *crtc, struct drm_display_mode *mode,

drivers/gpu/drm/gma500/oaktrail.h

245

extern void oaktrail_crtc_hdmi_dpms(struct drm_crtc *crtc, int mode);

drivers/gpu/drm/gma500/oaktrail_crtc.c

104

} else if (gma_pipe_has_type(crtc, INTEL_OUTPUT_SDVO)) {

drivers/gpu/drm/gma500/oaktrail_crtc.c

128

struct drm_crtc *crtc, int target,

drivers/gpu/drm/gma500/oaktrail_crtc.c

186

struct drm_crtc *crtc, int target,

drivers/gpu/drm/gma500/oaktrail_crtc.c

218

static void oaktrail_crtc_dpms(struct drm_crtc *crtc, int mode)

drivers/gpu/drm/gma500/oaktrail_crtc.c

220

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/gma500/oaktrail_crtc.c

222

struct gma_crtc *gma_crtc = to_gma_crtc(crtc);

drivers/gpu/drm/gma500/oaktrail_crtc.c

227

int need_aux = gma_pipe_has_type(crtc, INTEL_OUTPUT_SDVO) ? 1 : 0;

drivers/gpu/drm/gma500/oaktrail_crtc.c

229

if (gma_pipe_has_type(crtc, INTEL_OUTPUT_HDMI)) {

drivers/gpu/drm/gma500/oaktrail_crtc.c

230

oaktrail_crtc_hdmi_dpms(crtc, mode);

drivers/gpu/drm/gma500/oaktrail_crtc.c

283

gma_crtc_load_lut(crtc);

drivers/gpu/drm/gma500/oaktrail_crtc.c

360

static int oaktrail_crtc_mode_set(struct drm_crtc *crtc,

drivers/gpu/drm/gma500/oaktrail_crtc.c

366

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/gma500/oaktrail_crtc.c

367

struct gma_crtc *gma_crtc = to_gma_crtc(crtc);

drivers/gpu/drm/gma500/oaktrail_crtc.c

383

int need_aux = gma_pipe_has_type(crtc, INTEL_OUTPUT_SDVO) ? 1 : 0;

drivers/gpu/drm/gma500/oaktrail_crtc.c

385

if (gma_pipe_has_type(crtc, INTEL_OUTPUT_HDMI))

drivers/gpu/drm/gma500/oaktrail_crtc.c

386

return oaktrail_crtc_hdmi_mode_set(crtc, mode, adjusted_mode, x, y, old_fb);

drivers/gpu/drm/gma500/oaktrail_crtc.c

396

if (!connector->encoder || connector->encoder->crtc != crtc)

drivers/gpu/drm/gma500/oaktrail_crtc.c

41

struct drm_crtc *crtc, int target,

drivers/gpu/drm/gma500/oaktrail_crtc.c

45

struct drm_crtc *crtc, int target,

drivers/gpu/drm/gma500/oaktrail_crtc.c

484

crtc->helper_private;

drivers/gpu/drm/gma500/oaktrail_crtc.c

485

crtc_funcs->mode_set_base(crtc, x, y, old_fb);

drivers/gpu/drm/gma500/oaktrail_crtc.c

507

limit = mrst_limit(crtc, refclk);

drivers/gpu/drm/gma500/oaktrail_crtc.c

508

ok = limit->find_pll(limit, crtc, adjusted_mode->clock,

drivers/gpu/drm/gma500/oaktrail_crtc.c

593

static int oaktrail_pipe_set_base(struct drm_crtc *crtc,

drivers/gpu/drm/gma500/oaktrail_crtc.c

596

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/gma500/oaktrail_crtc.c

598

struct gma_crtc *gma_crtc = to_gma_crtc(crtc);

drivers/gpu/drm/gma500/oaktrail_crtc.c

599

struct drm_framebuffer *fb = crtc->primary->fb;

drivers/gpu/drm/gma500/oaktrail_crtc.c

84

static const struct gma_limit_t *mrst_limit(struct drm_crtc *crtc,

drivers/gpu/drm/gma500/oaktrail_crtc.c

88

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/gma500/oaktrail_crtc.c

91

if (gma_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)

drivers/gpu/drm/gma500/oaktrail_crtc.c

92

|| gma_pipe_has_type(crtc, INTEL_OUTPUT_MIPI)) {

drivers/gpu/drm/gma500/oaktrail_hdmi.c

179

static void oaktrail_hdmi_find_dpll(struct drm_crtc *crtc, int target,

drivers/gpu/drm/gma500/oaktrail_hdmi.c

264

int oaktrail_crtc_hdmi_mode_set(struct drm_crtc *crtc,

drivers/gpu/drm/gma500/oaktrail_hdmi.c

270

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/gma500/oaktrail_hdmi.c

309

oaktrail_hdmi_find_dpll(crtc, adjusted_mode->clock, refclk, &clock);

drivers/gpu/drm/gma500/oaktrail_hdmi.c

355

const struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private;

drivers/gpu/drm/gma500/oaktrail_hdmi.c

356

crtc_funcs->mode_set_base(crtc, x, y, old_fb);

drivers/gpu/drm/gma500/oaktrail_hdmi.c

384

void oaktrail_crtc_hdmi_dpms(struct drm_crtc *crtc, int mode)

drivers/gpu/drm/gma500/oaktrail_hdmi.c

386

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/gma500/oaktrail_hdmi.c

472

gma_crtc_load_lut(crtc);

drivers/gpu/drm/gma500/oaktrail_lvds.c

117

if (connector->encoder && connector->encoder->crtc == crtc)

drivers/gpu/drm/gma500/oaktrail_lvds.c

90

struct drm_crtc *crtc = encoder->crtc;

drivers/gpu/drm/gma500/psb_device.c

107

struct drm_crtc *crtc;

drivers/gpu/drm/gma500/psb_device.c

124

list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {

drivers/gpu/drm/gma500/psb_device.c

125

if (drm_helper_crtc_in_use(crtc))

drivers/gpu/drm/gma500/psb_device.c

126

dev_priv->ops->save_crtc(crtc);

drivers/gpu/drm/gma500/psb_device.c

151

struct drm_crtc *crtc;

drivers/gpu/drm/gma500/psb_device.c

170

list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)

drivers/gpu/drm/gma500/psb_device.c

171

if (drm_helper_crtc_in_use(crtc))

drivers/gpu/drm/gma500/psb_device.c

172

dev_priv->ops->restore_crtc(crtc);

drivers/gpu/drm/gma500/psb_drv.h

573

void (*save_crtc)(struct drm_crtc *crtc);

drivers/gpu/drm/gma500/psb_drv.h

574

void (*restore_crtc)(struct drm_crtc *crtc);

drivers/gpu/drm/gma500/psb_drv.h

577

void (*update_wm)(struct drm_device *dev, struct drm_crtc *crtc);

drivers/gpu/drm/gma500/psb_intel_display.c

100

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/gma500/psb_intel_display.c

102

struct gma_crtc *gma_crtc = to_gma_crtc(crtc);

drivers/gpu/drm/gma500/psb_intel_display.c

103

const struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private;

drivers/gpu/drm/gma500/psb_intel_display.c

116

if (crtc->primary->fb == NULL) {

drivers/gpu/drm/gma500/psb_intel_display.c

117

crtc_funcs->mode_set_base(crtc, x, y, old_fb);

drivers/gpu/drm/gma500/psb_intel_display.c

126

|| connector->encoder->crtc != crtc)

drivers/gpu/drm/gma500/psb_intel_display.c

147

limit = gma_crtc->clock_funcs->limit(crtc, refclk);

drivers/gpu/drm/gma500/psb_intel_display.c

149

ok = limit->find_pll(limit, crtc, adjusted_mode->clock, refclk,

drivers/gpu/drm/gma500/psb_intel_display.c

296

crtc_funcs->mode_set_base(crtc, x, y, old_fb);

drivers/gpu/drm/gma500/psb_intel_display.c

305

struct drm_crtc *crtc)

drivers/gpu/drm/gma500/psb_intel_display.c

307

struct gma_crtc *gma_crtc = to_gma_crtc(crtc);

drivers/gpu/drm/gma500/psb_intel_display.c

381

struct drm_crtc *crtc)

drivers/gpu/drm/gma500/psb_intel_display.c

383

struct gma_crtc *gma_crtc = to_gma_crtc(crtc);

drivers/gpu/drm/gma500/psb_intel_display.c

411

mode->clock = psb_intel_crtc_clock_get(dev, crtc);

drivers/gpu/drm/gma500/psb_intel_display.c

516

gma_crtc->mode_set.crtc = &gma_crtc->base;

drivers/gpu/drm/gma500/psb_intel_display.c

531

struct drm_crtc *crtc;

drivers/gpu/drm/gma500/psb_intel_display.c

533

list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {

drivers/gpu/drm/gma500/psb_intel_display.c

534

struct gma_crtc *gma_crtc = to_gma_crtc(crtc);

drivers/gpu/drm/gma500/psb_intel_display.c

537

return crtc;

drivers/gpu/drm/gma500/psb_intel_display.c

57

static const struct gma_limit_t *psb_intel_limit(struct drm_crtc *crtc,

drivers/gpu/drm/gma500/psb_intel_display.c

62

if (gma_pipe_has_type(crtc, INTEL_OUTPUT_LVDS))

drivers/gpu/drm/gma500/psb_intel_display.c

94

static int psb_intel_crtc_mode_set(struct drm_crtc *crtc,

drivers/gpu/drm/gma500/psb_intel_drv.h

207

struct drm_crtc *crtc);

drivers/gpu/drm/gma500/psb_intel_drv.h

229

extern void cdv_intel_dp_set_m_n(struct drm_crtc *crtc,

drivers/gpu/drm/gma500/psb_intel_lvds.c

369

struct gma_crtc *gma_crtc = to_gma_crtc(encoder->crtc);

drivers/gpu/drm/gma500/psb_intel_lvds.c

390

&& tmp_encoder->crtc == encoder->crtc) {

drivers/gpu/drm/gma500/psb_intel_lvds.c

538

struct gma_crtc *crtc = to_gma_crtc(encoder->crtc);

drivers/gpu/drm/gma500/psb_intel_lvds.c

541

if (!crtc)

drivers/gpu/drm/gma500/psb_intel_lvds.c

568

if (crtc->saved_mode.hdisplay != 0 &&

drivers/gpu/drm/gma500/psb_intel_lvds.c

569

crtc->saved_mode.vdisplay != 0) {

drivers/gpu/drm/gma500/psb_intel_lvds.c

570

if (!drm_crtc_helper_set_mode(encoder->crtc,

drivers/gpu/drm/gma500/psb_intel_lvds.c

571

&crtc->saved_mode,

drivers/gpu/drm/gma500/psb_intel_lvds.c

572

encoder->crtc->x,

drivers/gpu/drm/gma500/psb_intel_lvds.c

573

encoder->crtc->y,

drivers/gpu/drm/gma500/psb_intel_lvds.c

574

encoder->crtc->primary->fb))

drivers/gpu/drm/gma500/psb_intel_lvds.c

635

struct drm_crtc *crtc;

drivers/gpu/drm/gma500/psb_intel_lvds.c

763

crtc = psb_intel_get_crtc_from_pipe(dev, pipe);

drivers/gpu/drm/gma500/psb_intel_lvds.c

765

if (crtc && (lvds & LVDS_PORT_EN)) {

drivers/gpu/drm/gma500/psb_intel_lvds.c

767

psb_intel_crtc_mode_get(dev, crtc);

drivers/gpu/drm/gma500/psb_intel_sdvo.c

1728

if (psb_intel_sdvo->base.base.crtc) {

drivers/gpu/drm/gma500/psb_intel_sdvo.c

1729

struct drm_crtc *crtc = psb_intel_sdvo->base.base.crtc;

drivers/gpu/drm/gma500/psb_intel_sdvo.c

1730

drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,

drivers/gpu/drm/gma500/psb_intel_sdvo.c

1731

crtc->y, crtc->primary->fb);

drivers/gpu/drm/gma500/psb_intel_sdvo.c

1752

struct drm_crtc *crtc = encoder->crtc;

drivers/gpu/drm/gma500/psb_intel_sdvo.c

1759

drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x, crtc->y,

drivers/gpu/drm/gma500/psb_intel_sdvo.c

994

struct drm_crtc *crtc = encoder->crtc;

drivers/gpu/drm/gma500/psb_intel_sdvo.c

995

struct gma_crtc *gma_crtc = to_gma_crtc(crtc);

drivers/gpu/drm/gma500/psb_irq.c

116

struct drm_crtc *crtc = drm_crtc_from_index(dev, pipe);

drivers/gpu/drm/gma500/psb_irq.c

117

struct gma_crtc *gma_crtc = to_gma_crtc(crtc);

drivers/gpu/drm/gma500/psb_irq.c

124

drm_crtc_send_vblank_event(crtc,

drivers/gpu/drm/gma500/psb_irq.c

127

drm_crtc_vblank_put(crtc);

drivers/gpu/drm/gma500/psb_irq.c

377

int gma_crtc_enable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/gma500/psb_irq.c

379

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/gma500/psb_irq.c

380

unsigned int pipe = crtc->index;

drivers/gpu/drm/gma500/psb_irq.c

410

void gma_crtc_disable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/gma500/psb_irq.c

412

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/gma500/psb_irq.c

413

unsigned int pipe = crtc->index;

drivers/gpu/drm/gma500/psb_irq.c

434

u32 gma_crtc_get_vblank_counter(struct drm_crtc *crtc)

drivers/gpu/drm/gma500/psb_irq.c

436

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/gma500/psb_irq.c

437

unsigned int pipe = crtc->index;

drivers/gpu/drm/gma500/psb_irq.h

23

int gma_crtc_enable_vblank(struct drm_crtc *crtc);

drivers/gpu/drm/gma500/psb_irq.h

24

void gma_crtc_disable_vblank(struct drm_crtc *crtc);

drivers/gpu/drm/gma500/psb_irq.h

25

u32 gma_crtc_get_vblank_counter(struct drm_crtc *crtc);

drivers/gpu/drm/gud/gud_connector.c

295

if (!new_state->crtc)

drivers/gpu/drm/gud/gud_connector.c

299

new_crtc_state = drm_atomic_get_new_crtc_state(state, new_state->crtc);

drivers/gpu/drm/gud/gud_connector.c

686

gconn->encoder.possible_crtcs = drm_crtc_mask(&gdrm->crtc);

drivers/gpu/drm/gud/gud_drv.c

628

ret = drm_crtc_init_with_planes(drm, &gdrm->crtc, &gdrm->plane, NULL,

drivers/gpu/drm/gud/gud_drv.c

633

drm_crtc_helper_add(&gdrm->crtc, &gud_crtc_helper_funcs);

drivers/gpu/drm/gud/gud_internal.h

18

struct drm_crtc crtc;

drivers/gpu/drm/gud/gud_internal.h

65

void gud_crtc_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/gud/gud_internal.h

67

void gud_crtc_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/gud/gud_pipe.c

459

struct drm_crtc *crtc = new_plane_state->crtc;

drivers/gpu/drm/gud/gud_pipe.c

472

if (crtc)

drivers/gpu/drm/gud/gud_pipe.c

473

crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/gud/gud_pipe.c

505

if (connector_state->crtc)

drivers/gpu/drm/gud/gud_pipe.c

518

if (connector->state->crtc) {

drivers/gpu/drm/gud/gud_pipe.c

583

void gud_crtc_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/gud/gud_pipe.c

586

struct drm_device *drm = crtc->dev;

drivers/gpu/drm/gud/gud_pipe.c

600

void gud_crtc_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/gud/gud_pipe.c

603

struct drm_device *drm = crtc->dev;

drivers/gpu/drm/gud/gud_pipe.c

625

struct drm_crtc *crtc = new_state->crtc;

drivers/gpu/drm/gud/gud_pipe.c

630

if (!crtc || crtc->state->mode_changed || !crtc->state->enable) {

drivers/gpu/drm/gud/gud_pipe.c

643

if (!crtc || !drm_dev_enter(drm, &idx))

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

160

static void hibmc_crtc_dpms(struct drm_crtc *crtc, u32 dpms)

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

162

struct hibmc_drm_private *priv = to_hibmc_drm_private(crtc->dev);

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

174

static void hibmc_crtc_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

178

struct hibmc_drm_private *priv = to_hibmc_drm_private(crtc->dev);

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

189

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

190

hibmc_crtc_dpms(crtc, HIBMC_CRT_DPMS_ON);

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

193

static void hibmc_crtc_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

197

struct hibmc_drm_private *priv = to_hibmc_drm_private(crtc->dev);

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

199

hibmc_crtc_dpms(crtc, HIBMC_CRT_DPMS_OFF);

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

200

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

214

hibmc_crtc_mode_valid(struct drm_crtc *crtc,

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

360

static void hibmc_crtc_mode_set_nofb(struct drm_crtc *crtc)

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

363

struct drm_display_mode *mode = &crtc->state->mode;

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

364

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

394

static void hibmc_crtc_atomic_begin(struct drm_crtc *crtc,

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

398

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

414

static void hibmc_crtc_atomic_flush(struct drm_crtc *crtc,

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

420

spin_lock_irqsave(&crtc->dev->event_lock, flags);

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

421

if (crtc->state->event)

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

422

drm_crtc_send_vblank_event(crtc, crtc->state->event);

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

423

crtc->state->event = NULL;

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

424

spin_unlock_irqrestore(&crtc->dev->event_lock, flags);

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

427

static int hibmc_crtc_enable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

429

struct hibmc_drm_private *priv = to_hibmc_drm_private(crtc->dev);

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

437

static void hibmc_crtc_disable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

439

struct hibmc_drm_private *priv = to_hibmc_drm_private(crtc->dev);

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

445

static void hibmc_crtc_load_lut(struct drm_crtc *crtc)

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

447

struct hibmc_drm_private *priv = to_hibmc_drm_private(crtc->dev);

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

453

r = crtc->gamma_store;

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

454

g = r + crtc->gamma_size;

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

455

b = g + crtc->gamma_size;

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

457

for (i = 0; i < crtc->gamma_size; i++) {

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

472

static int hibmc_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

476

hibmc_crtc_load_lut(crtc);

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

505

struct drm_crtc *crtc = &priv->crtc;

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

523

ret = drm_crtc_init_with_planes(dev, crtc, plane,

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

530

ret = drm_mode_crtc_set_gamma_size(crtc, 256);

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

535

drm_crtc_helper_add(crtc, &hibmc_crtc_helper_funcs);

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

61

struct drm_crtc *crtc = new_plane_state->crtc;

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

66

if (!crtc || !fb)

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

69

crtc_state = drm_atomic_get_crtc_state(state, crtc);

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_dp.c

154

struct drm_display_mode *mode = &drm_encoder->crtc->state->mode;

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_dp.c

205

struct drm_crtc *crtc = &priv->crtc;

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_dp.c

222

encoder->possible_crtcs = drm_crtc_mask(crtc);

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h

43

struct drm_crtc crtc;

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c

109

encoder->possible_crtcs = drm_crtc_mask(crtc);

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c

99

struct drm_crtc *crtc = &priv->crtc;

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c

645

struct drm_crtc *crtc = NULL;

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c

655

drm_for_each_crtc(crtc, encoder->dev) {

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c

662

crtc_funcs = crtc->helper_private;

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c

664

if (!crtc_funcs->mode_fixup(crtc, mode, &adj_mode))

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

142

static bool ade_crtc_mode_fixup(struct drm_crtc *crtc,

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

146

struct kirin_crtc *kcrtc = to_kirin_crtc(crtc);

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

277

static int ade_crtc_enable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

279

struct kirin_crtc *kcrtc = to_kirin_crtc(crtc);

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

292

static void ade_crtc_disable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

294

struct kirin_crtc *kcrtc = to_kirin_crtc(crtc);

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

310

struct drm_crtc *crtc = ctx->crtc;

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

321

drm_crtc_handle_vblank(crtc);

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

440

static void ade_crtc_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

443

struct kirin_crtc *kcrtc = to_kirin_crtc(crtc);

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

459

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

463

static void ade_crtc_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

466

struct kirin_crtc *kcrtc = to_kirin_crtc(crtc);

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

472

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

477

static void ade_crtc_mode_set_nofb(struct drm_crtc *crtc)

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

479

struct kirin_crtc *kcrtc = to_kirin_crtc(crtc);

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

481

struct drm_display_mode *mode = &crtc->state->mode;

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

482

struct drm_display_mode *adj_mode = &crtc->state->adjusted_mode;

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

489

static void ade_crtc_atomic_begin(struct drm_crtc *crtc,

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

492

struct kirin_crtc *kcrtc = to_kirin_crtc(crtc);

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

494

struct drm_display_mode *mode = &crtc->state->mode;

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

495

struct drm_display_mode *adj_mode = &crtc->state->adjusted_mode;

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

502

static void ade_crtc_atomic_flush(struct drm_crtc *crtc,

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

506

struct kirin_crtc *kcrtc = to_kirin_crtc(crtc);

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

508

struct drm_pending_vblank_event *event = crtc->state->event;

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

519

crtc->state->event = NULL;

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

521

spin_lock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

522

if (drm_crtc_vblank_get(crtc) == 0)

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

523

drm_crtc_arm_vblank_event(crtc, event);

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

525

drm_crtc_send_vblank_event(crtc, event);

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

526

spin_unlock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

54

struct drm_crtc *crtc;

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

767

struct drm_crtc *crtc = new_plane_state->crtc;

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

779

if (!crtc || !fb)

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

786

crtc_state = drm_atomic_get_crtc_state(state, crtc);

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

846

struct drm_crtc *crtc)

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

906

ctx->crtc = crtc;

drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c

121

ctx = driver_data->alloc_hw_ctx(pdev, &kirin_priv->crtc.base);

drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c

148

ret = kirin_drm_crtc_init(dev, &kirin_priv->crtc.base,

drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c

152

kirin_priv->crtc.hw_ctx = ctx;

drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c

36

struct kirin_crtc crtc;

drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c

41

static int kirin_drm_crtc_init(struct drm_device *dev, struct drm_crtc *crtc,

drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c

57

crtc->port = port;

drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c

59

ret = drm_crtc_init_with_planes(dev, crtc, plane, NULL,

drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c

66

drm_crtc_helper_add(crtc, driver_data->crtc_helper_funcs);

drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.h

10

#define to_kirin_crtc(crtc) \

drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.h

11

container_of(crtc, struct kirin_crtc, base)

drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.h

51

struct drm_crtc *crtc);

drivers/gpu/drm/hyperv/hyperv_drm.h

15

struct drm_crtc crtc;

drivers/gpu/drm/hyperv/hyperv_drm_modeset.c

104

static void hyperv_crtc_helper_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/hyperv/hyperv_drm_modeset.c

107

struct hyperv_drm_device *hv = to_hv(crtc->dev);

drivers/gpu/drm/hyperv/hyperv_drm_modeset.c

110

struct drm_crtc_state *crtc_state = crtc->state;

drivers/gpu/drm/hyperv/hyperv_drm_modeset.c

118

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/hyperv/hyperv_drm_modeset.c

144

struct drm_crtc *crtc = plane_state->crtc;

drivers/gpu/drm/hyperv/hyperv_drm_modeset.c

148

if (crtc)

drivers/gpu/drm/hyperv/hyperv_drm_modeset.c

149

crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/hyperv/hyperv_drm_modeset.c

250

struct drm_crtc *crtc = &hv->crtc;

drivers/gpu/drm/hyperv/hyperv_drm_modeset.c

264

ret = drm_crtc_init_with_planes(dev, crtc, plane, NULL,

drivers/gpu/drm/hyperv/hyperv_drm_modeset.c

268

drm_crtc_helper_add(crtc, &hyperv_crtc_helper_funcs);

drivers/gpu/drm/hyperv/hyperv_drm_modeset.c

270

encoder->possible_crtcs = drm_crtc_mask(crtc);

drivers/gpu/drm/i915/display/g4x_dp.c

143

intel_dp->DP |= DP_PIPE_SEL_IVB(crtc->pipe);

drivers/gpu/drm/i915/display/g4x_dp.c

147

intel_de_rmw(display, TRANS_DP_CTL(crtc->pipe),

drivers/gpu/drm/i915/display/g4x_dp.c

165

intel_dp->DP |= DP_PIPE_SEL_CHV(crtc->pipe);

drivers/gpu/drm/i915/display/g4x_dp.c

167

intel_dp->DP |= DP_PIPE_SEL(crtc->pipe);

drivers/gpu/drm/i915/display/g4x_dp.c

199

struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);

drivers/gpu/drm/i915/display/g4x_dp.c

226

intel_wait_for_vblank_if_active(display, !crtc->pipe);

drivers/gpu/drm/i915/display/g4x_dp.c

323

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/g4x_dp.c

326

intel_pch_transcoder_get_m1_n1(crtc, &crtc_state->dp_m_n);

drivers/gpu/drm/i915/display/g4x_dp.c

327

intel_pch_transcoder_get_m2_n2(crtc, &crtc_state->dp_m2_n2);

drivers/gpu/drm/i915/display/g4x_dp.c

329

intel_cpu_transcoder_get_m1_n1(crtc, crtc_state->cpu_transcoder,

drivers/gpu/drm/i915/display/g4x_dp.c

331

intel_cpu_transcoder_get_m2_n2(crtc, crtc_state->cpu_transcoder,

drivers/gpu/drm/i915/display/g4x_dp.c

343

struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);

drivers/gpu/drm/i915/display/g4x_dp.c

356

TRANS_DP_CTL(crtc->pipe));

drivers/gpu/drm/i915/display/g4x_dp.c

417

struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/g4x_dp.c

436

if (HAS_PCH_IBX(display) && crtc->pipe == PIPE_B && port != PORT_A) {

drivers/gpu/drm/i915/display/g4x_dp.c

99

struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);

drivers/gpu/drm/i915/display/g4x_hdmi.c

110

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/g4x_hdmi.c

115

crtc = to_intel_crtc(conn_state->crtc);

drivers/gpu/drm/i915/display/g4x_hdmi.c

116

if (!crtc)

drivers/gpu/drm/i915/display/g4x_hdmi.c

119

crtc_state = intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/g4x_hdmi.c

124

return crtc == this_crtc;

drivers/gpu/drm/i915/display/g4x_hdmi.c

136

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/g4x_hdmi.c

142

crtc_state->has_hdmi_sink = g4x_compute_has_hdmi_sink(state, crtc);

drivers/gpu/drm/i915/display/g4x_hdmi.c

32

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/g4x_hdmi.c

326

struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);

drivers/gpu/drm/i915/display/g4x_hdmi.c

328

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/g4x_hdmi.c

384

struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/g4x_hdmi.c

398

if (HAS_PCH_IBX(display) && crtc->pipe == PIPE_B) {

drivers/gpu/drm/i915/display/g4x_hdmi.c

56

hdmi_val |= SDVO_PIPE_SEL_CPT(crtc->pipe);

drivers/gpu/drm/i915/display/g4x_hdmi.c

58

hdmi_val |= SDVO_PIPE_SEL_CHV(crtc->pipe);

drivers/gpu/drm/i915/display/g4x_hdmi.c

60

hdmi_val |= SDVO_PIPE_SEL(crtc->pipe);

drivers/gpu/drm/i915/display/g4x_hdmi.c

625

struct drm_crtc *crtc;

drivers/gpu/drm/i915/display/g4x_hdmi.c

639

crtc = conn_state->crtc;

drivers/gpu/drm/i915/display/g4x_hdmi.c

640

if (!crtc)

drivers/gpu/drm/i915/display/g4x_hdmi.c

643

crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/g4x_hdmi.c

646

ret = drm_atomic_add_affected_planes(state, crtc);

drivers/gpu/drm/i915/display/hsw_ips.c

100

intel_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/hsw_ips.c

102

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/hsw_ips.c

125

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/hsw_ips.c

128

intel_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/hsw_ips.c

130

if (!hsw_ips_need_disable(state, crtc))

drivers/gpu/drm/i915/display/hsw_ips.c

137

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/hsw_ips.c

141

intel_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/hsw_ips.c

143

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/hsw_ips.c

173

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/hsw_ips.c

176

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/hsw_ips.c

178

if (!hsw_ips_need_enable(state, crtc))

drivers/gpu/drm/i915/display/hsw_ips.c

185

bool hsw_crtc_supports_ips(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/hsw_ips.c

187

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/hsw_ips.c

189

return HAS_IPS(display) && crtc->pipe == PIPE_A;

drivers/gpu/drm/i915/display/hsw_ips.c

194

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/hsw_ips.c

196

if (!hsw_crtc_supports_ips(crtc))

drivers/gpu/drm/i915/display/hsw_ips.c

237

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/hsw_ips.c

241

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/hsw_ips.c

275

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/hsw_ips.c

277

if (!hsw_crtc_supports_ips(crtc))

drivers/gpu/drm/i915/display/hsw_ips.c

294

struct intel_crtc *crtc = data;

drivers/gpu/drm/i915/display/hsw_ips.c

295

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/hsw_ips.c

304

struct intel_crtc *crtc = data;

drivers/gpu/drm/i915/display/hsw_ips.c

305

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/hsw_ips.c

309

ret = drm_modeset_lock(&crtc->base.mutex, NULL);

drivers/gpu/drm/i915/display/hsw_ips.c

315

crtc_state = to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/hsw_ips.c

327

drm_modeset_unlock(&crtc->base.mutex);

drivers/gpu/drm/i915/display/hsw_ips.c

339

struct intel_crtc *crtc = m->private;

drivers/gpu/drm/i915/display/hsw_ips.c

340

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/hsw_ips.c

364

void hsw_ips_crtc_debugfs_add(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/hsw_ips.c

366

if (!hsw_crtc_supports_ips(crtc))

drivers/gpu/drm/i915/display/hsw_ips.c

369

debugfs_create_file("i915_ips_false_color", 0644, crtc->base.debugfs_entry,

drivers/gpu/drm/i915/display/hsw_ips.c

370

crtc, &hsw_ips_debugfs_false_color_fops);

drivers/gpu/drm/i915/display/hsw_ips.c

372

debugfs_create_file("i915_ips_status", 0444, crtc->base.debugfs_entry,

drivers/gpu/drm/i915/display/hsw_ips.c

373

crtc, &hsw_ips_debugfs_status_fops);

drivers/gpu/drm/i915/display/hsw_ips.c

96

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/hsw_ips.h

18

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/hsw_ips.h

20

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/hsw_ips.h

21

bool hsw_crtc_supports_ips(struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/hsw_ips.h

24

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/hsw_ips.h

26

void hsw_ips_crtc_debugfs_add(struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/hsw_ips.h

33

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/hsw_ips.h

38

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/hsw_ips.h

41

static inline bool hsw_crtc_supports_ips(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/hsw_ips.h

50

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/hsw_ips.h

57

static inline void hsw_ips_crtc_debugfs_add(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/i9xx_plane.c

1159

i9xx_get_initial_plane_config(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/i9xx_plane.c

1162

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/i9xx_plane.c

1163

struct intel_plane *plane = to_intel_plane(crtc->base.primary);

drivers/gpu/drm/i915/display/i9xx_plane.c

1175

drm_WARN_ON(display->drm, pipe != crtc->pipe);

drivers/gpu/drm/i915/display/i9xx_plane.c

1239

crtc->base.base.id, crtc->base.name,

drivers/gpu/drm/i915/display/i9xx_plane.c

1247

bool i9xx_fixup_initial_plane_config(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/i9xx_plane.c

1250

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/i9xx_plane.c

1251

struct intel_plane *plane = to_intel_plane(crtc->base.primary);

drivers/gpu/drm/i915/display/i9xx_plane.c

377

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/i9xx_plane.c

387

dspcntr |= DISP_PIPE_SEL(crtc->pipe);

drivers/gpu/drm/i915/display/i9xx_plane.c

566

static void g4x_primary_capture_error(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/i9xx_plane.c

578

static void i965_plane_capture_error(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/i9xx_plane.c

589

static void i8xx_plane_capture_error(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/i9xx_plane.h

33

void i9xx_get_initial_plane_config(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/i9xx_plane.h

35

bool i9xx_fixup_initial_plane_config(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/i9xx_plane.h

53

static inline void i9xx_get_initial_plane_config(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/i9xx_plane.h

57

static inline bool i9xx_fixup_initial_plane_config(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/i9xx_wm.c

1158

static void g4x_invalidate_wms(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/i9xx_wm.c

1164

for_each_plane_id_on_crtc(crtc, plane_id)

drivers/gpu/drm/i915/display/i9xx_wm.c

1202

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/i9xx_wm.c

1214

for_each_plane_id_on_crtc(crtc, plane_id)

drivers/gpu/drm/i915/display/i9xx_wm.c

1246

g4x_invalidate_wms(crtc, wm_state, level);

drivers/gpu/drm/i915/display/i9xx_wm.c

1261

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/i9xx_wm.c

1264

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/i9xx_wm.c

1274

if (new_plane_state->hw.crtc != &crtc->base &&

drivers/gpu/drm/i915/display/i9xx_wm.c

1275

old_plane_state->hw.crtc != &crtc->base)

drivers/gpu/drm/i915/display/i9xx_wm.c

1289

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/i9xx_wm.c

1293

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/i9xx_wm.c

1295

intel_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/i9xx_wm.c

1316

for_each_plane_id_on_crtc(crtc, plane_id) {

drivers/gpu/drm/i915/display/i9xx_wm.c

1371

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/i9xx_wm.c

1375

ret = g4x_compute_pipe_wm(state, crtc);

drivers/gpu/drm/i915/display/i9xx_wm.c

1379

ret = g4x_compute_intermediate_wm(state, crtc);

drivers/gpu/drm/i915/display/i9xx_wm.c

1389

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/i9xx_wm.c

1396

for_each_intel_crtc(display->drm, crtc) {

drivers/gpu/drm/i915/display/i9xx_wm.c

1397

const struct g4x_wm_state *wm_state = &crtc->wm.active.g4x;

drivers/gpu/drm/i915/display/i9xx_wm.c

1399

if (!crtc->active)

drivers/gpu/drm/i915/display/i9xx_wm.c

1418

for_each_intel_crtc(display->drm, crtc) {

drivers/gpu/drm/i915/display/i9xx_wm.c

1419

const struct g4x_wm_state *wm_state = &crtc->wm.active.g4x;

drivers/gpu/drm/i915/display/i9xx_wm.c

1420

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/i9xx_wm.c

1423

if (crtc->active && wm->cxsr)

drivers/gpu/drm/i915/display/i9xx_wm.c

1425

if (crtc->active && wm->hpll_en)

drivers/gpu/drm/i915/display/i9xx_wm.c

1452

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/i9xx_wm.c

1454

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/i9xx_wm.c

1456

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/i9xx_wm.c

1459

crtc->wm.active.g4x = crtc_state->wm.g4x.intermediate;

drivers/gpu/drm/i915/display/i9xx_wm.c

1465

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/i9xx_wm.c

1467

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/i9xx_wm.c

1469

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/i9xx_wm.c

1475

crtc->wm.active.g4x = crtc_state->wm.g4x.optimal;

drivers/gpu/drm/i915/display/i9xx_wm.c

1557

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/i9xx_wm.c

1591

for_each_plane_id_on_crtc(crtc, plane_id) {

drivers/gpu/drm/i915/display/i9xx_wm.c

1612

for_each_plane_id_on_crtc(crtc, plane_id) {

drivers/gpu/drm/i915/display/i9xx_wm.c

1638

static void vlv_invalidate_wms(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/i9xx_wm.c

1641

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/i9xx_wm.c

1646

for_each_plane_id_on_crtc(crtc, plane_id)

drivers/gpu/drm/i915/display/i9xx_wm.c

1745

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/i9xx_wm.c

1761

wm_state->cxsr = crtc->pipe != PIPE_C && num_active_planes == 1;

drivers/gpu/drm/i915/display/i9xx_wm.c

1770

for_each_plane_id_on_crtc(crtc, plane_id) {

drivers/gpu/drm/i915/display/i9xx_wm.c

1794

vlv_invalidate_wms(crtc, wm_state, level);

drivers/gpu/drm/i915/display/i9xx_wm.c

1800

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/i9xx_wm.c

1803

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/i9xx_wm.c

1813

if (new_plane_state->hw.crtc != &crtc->base &&

drivers/gpu/drm/i915/display/i9xx_wm.c

1814

old_plane_state->hw.crtc != &crtc->base)

drivers/gpu/drm/i915/display/i9xx_wm.c

1839

intel_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/i9xx_wm.c

1863

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/i9xx_wm.c

1865

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/i9xx_wm.c

1868

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/i9xx_wm.c

1884

trace_vlv_fifo_size(crtc, sprite0_start, sprite1_start, fifo_size);

drivers/gpu/drm/i915/display/i9xx_wm.c

1897

switch (crtc->pipe) {

drivers/gpu/drm/i915/display/i9xx_wm.c

1961

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/i9xx_wm.c

1964

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/i9xx_wm.c

1966

intel_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/i9xx_wm.c

1987

for_each_plane_id_on_crtc(crtc, plane_id) {

drivers/gpu/drm/i915/display/i9xx_wm.c

1999

vlv_invalidate_wms(crtc, intermediate, level);

drivers/gpu/drm/i915/display/i9xx_wm.c

2013

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/i9xx_wm.c

2017

ret = vlv_compute_pipe_wm(state, crtc);

drivers/gpu/drm/i915/display/i9xx_wm.c

2021

ret = vlv_compute_intermediate_wm(state, crtc);

drivers/gpu/drm/i915/display/i9xx_wm.c

2031

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/i9xx_wm.c

2037

for_each_intel_crtc(display->drm, crtc) {

drivers/gpu/drm/i915/display/i9xx_wm.c

2038

const struct vlv_wm_state *wm_state = &crtc->wm.active.vlv;

drivers/gpu/drm/i915/display/i9xx_wm.c

2040

if (!crtc->active)

drivers/gpu/drm/i915/display/i9xx_wm.c

2056

for_each_intel_crtc(display->drm, crtc) {

drivers/gpu/drm/i915/display/i9xx_wm.c

2057

const struct vlv_wm_state *wm_state = &crtc->wm.active.vlv;

drivers/gpu/drm/i915/display/i9xx_wm.c

2058

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/i9xx_wm.c

2061

if (crtc->active && wm->cxsr)

drivers/gpu/drm/i915/display/i9xx_wm.c

2105

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/i9xx_wm.c

2107

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/i9xx_wm.c

2109

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/i9xx_wm.c

2112

crtc->wm.active.vlv = crtc_state->wm.vlv.intermediate;

drivers/gpu/drm/i915/display/i9xx_wm.c

2118

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/i9xx_wm.c

2120

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/i9xx_wm.c

2122

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/i9xx_wm.c

2128

crtc->wm.active.vlv = crtc_state->wm.vlv.optimal;

drivers/gpu/drm/i915/display/i9xx_wm.c

2135

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/i9xx_wm.c

2141

crtc = single_enabled_crtc(display);

drivers/gpu/drm/i915/display/i9xx_wm.c

2142

if (crtc) {

drivers/gpu/drm/i915/display/i9xx_wm.c

2146

&crtc->config->hw.pipe_mode;

drivers/gpu/drm/i915/display/i9xx_wm.c

2148

crtc->base.primary->state->fb;

drivers/gpu/drm/i915/display/i9xx_wm.c

2149

int pixel_rate = crtc->config->pixel_rate;

drivers/gpu/drm/i915/display/i9xx_wm.c

2151

int width = drm_rect_width(&crtc->base.primary->state->src) >> 16;

drivers/gpu/drm/i915/display/i9xx_wm.c

2167

crtc->base.cursor->state->crtc_w, 4,

drivers/gpu/drm/i915/display/i9xx_wm.c

2233

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/i9xx_wm.c

2246

crtc = intel_crtc_for_plane(display, PLANE_A);

drivers/gpu/drm/i915/display/i9xx_wm.c

2247

if (intel_crtc_active(crtc)) {

drivers/gpu/drm/i915/display/i9xx_wm.c

2249

crtc->base.primary->state->fb;

drivers/gpu/drm/i915/display/i9xx_wm.c

2257

planea_wm = intel_calculate_wm(display, crtc->config->pixel_rate,

drivers/gpu/drm/i915/display/i9xx_wm.c

2273

crtc = intel_crtc_for_plane(display, PLANE_B);

drivers/gpu/drm/i915/display/i9xx_wm.c

2274

if (intel_crtc_active(crtc)) {

drivers/gpu/drm/i915/display/i9xx_wm.c

2276

crtc->base.primary->state->fb;

drivers/gpu/drm/i915/display/i9xx_wm.c

2284

planeb_wm = intel_calculate_wm(display, crtc->config->pixel_rate,

drivers/gpu/drm/i915/display/i9xx_wm.c

2296

crtc = single_enabled_crtc(display);

drivers/gpu/drm/i915/display/i9xx_wm.c

2297

if (display->platform.i915gm && crtc) {

drivers/gpu/drm/i915/display/i9xx_wm.c

2299

crtc->base.primary->state->fb;

drivers/gpu/drm/i915/display/i9xx_wm.c

2303

crtc = NULL;

drivers/gpu/drm/i915/display/i9xx_wm.c

2315

if (HAS_FW_BLC(display) && crtc) {

drivers/gpu/drm/i915/display/i9xx_wm.c

2319

&crtc->config->hw.pipe_mode;

drivers/gpu/drm/i915/display/i9xx_wm.c

2321

crtc->base.primary->state->fb;

drivers/gpu/drm/i915/display/i9xx_wm.c

2322

int pixel_rate = crtc->config->pixel_rate;

drivers/gpu/drm/i915/display/i9xx_wm.c

2324

int width = drm_rect_width(&crtc->base.primary->state->src) >> 16;

drivers/gpu/drm/i915/display/i9xx_wm.c

2363

if (crtc)

drivers/gpu/drm/i915/display/i9xx_wm.c

2369

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/i9xx_wm.c

2373

crtc = single_enabled_crtc(display);

drivers/gpu/drm/i915/display/i9xx_wm.c

2374

if (crtc == NULL)

drivers/gpu/drm/i915/display/i9xx_wm.c

2377

planea_wm = intel_calculate_wm(display, crtc->config->pixel_rate,

drivers/gpu/drm/i915/display/i9xx_wm.c

2709

const struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/i9xx_wm.c

287

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/i9xx_wm.c

289

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/i9xx_wm.c

2922

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/i9xx_wm.c

2926

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/i9xx_wm.c

2962

ilk_compute_wm_level(display, crtc, 0, crtc_state,

drivers/gpu/drm/i915/display/i9xx_wm.c

2973

ilk_compute_wm_level(display, crtc, level, crtc_state,

drivers/gpu/drm/i915/display/i9xx_wm.c

2996

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/i9xx_wm.c

2998

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/i9xx_wm.c

3000

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/i9xx_wm.c

3002

intel_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/i9xx_wm.c

3058

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/i9xx_wm.c

3062

ret = ilk_compute_pipe_wm(state, crtc);

drivers/gpu/drm/i915/display/i9xx_wm.c

3066

ret = ilk_compute_intermediate_wm(state, crtc);

drivers/gpu/drm/i915/display/i9xx_wm.c

3080

const struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/i9xx_wm.c

3084

for_each_intel_crtc(display->drm, crtc) {

drivers/gpu/drm/i915/display/i9xx_wm.c

3085

const struct intel_pipe_wm *active = &crtc->wm.active.ilk;

drivers/gpu/drm/i915/display/i9xx_wm.c

3180

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/i9xx_wm.c

3224

for_each_intel_crtc(display->drm, crtc) {

drivers/gpu/drm/i915/display/i9xx_wm.c

3225

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/i9xx_wm.c

3226

const struct intel_pipe_wm *pipe_wm = &crtc->wm.active.ilk;

drivers/gpu/drm/i915/display/i9xx_wm.c

3419

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/i9xx_wm.c

3422

for_each_intel_crtc(display->drm, crtc) {

drivers/gpu/drm/i915/display/i9xx_wm.c

3423

const struct intel_pipe_wm *wm = &crtc->wm.active.ilk;

drivers/gpu/drm/i915/display/i9xx_wm.c

3467

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/i9xx_wm.c

3469

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/i9xx_wm.c

3471

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/i9xx_wm.c

3474

crtc->wm.active.ilk = crtc_state->wm.ilk.intermediate;

drivers/gpu/drm/i915/display/i9xx_wm.c

3480

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/i9xx_wm.c

3482

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/i9xx_wm.c

3484

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/i9xx_wm.c

3490

crtc->wm.active.ilk = crtc_state->wm.ilk.optimal;

drivers/gpu/drm/i915/display/i9xx_wm.c

3495

static void ilk_pipe_wm_get_hw_state(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/i9xx_wm.c

3497

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/i9xx_wm.c

3499

struct intel_crtc_state *crtc_state = to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/i9xx_wm.c

3501

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/i9xx_wm.c

3507

active->pipe_enabled = crtc->active;

drivers/gpu/drm/i915/display/i9xx_wm.c

3534

crtc->wm.active.ilk = *active;

drivers/gpu/drm/i915/display/i9xx_wm.c

3540

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/i9xx_wm.c

3542

for_each_intel_crtc(state->dev, crtc) {

drivers/gpu/drm/i915/display/i9xx_wm.c

3545

crtc_state = intel_atomic_get_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/i9xx_wm.c

3583

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/i9xx_wm.c

3625

for_each_new_intel_crtc_in_state(intel_state, crtc, crtc_state, i) {

drivers/gpu/drm/i915/display/i9xx_wm.c

3627

intel_optimize_watermarks(intel_state, crtc);

drivers/gpu/drm/i915/display/i9xx_wm.c

3629

to_intel_crtc_state(crtc->base.state)->wm = crtc_state->wm;

drivers/gpu/drm/i915/display/i9xx_wm.c

3769

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/i9xx_wm.c

3775

for_each_intel_crtc(display->drm, crtc) {

drivers/gpu/drm/i915/display/i9xx_wm.c

3777

to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/i9xx_wm.c

3778

struct g4x_wm_state *active = &crtc->wm.active.g4x;

drivers/gpu/drm/i915/display/i9xx_wm.c

3780

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/i9xx_wm.c

3791

for_each_plane_id_on_crtc(crtc, plane_id) {

drivers/gpu/drm/i915/display/i9xx_wm.c

3805

for_each_plane_id_on_crtc(crtc, plane_id)

drivers/gpu/drm/i915/display/i9xx_wm.c

3830

for_each_plane_id_on_crtc(crtc, plane_id)

drivers/gpu/drm/i915/display/i9xx_wm.c

3835

g4x_invalidate_wms(crtc, active, level);

drivers/gpu/drm/i915/display/i9xx_wm.c

3862

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/i9xx_wm.c

3867

struct intel_crtc *crtc =

drivers/gpu/drm/i915/display/i9xx_wm.c

3870

to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/i9xx_wm.c

3890

for_each_intel_crtc(display->drm, crtc) {

drivers/gpu/drm/i915/display/i9xx_wm.c

3892

to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/i9xx_wm.c

3900

crtc->wm.active.g4x = crtc_state->wm.g4x.optimal;

drivers/gpu/drm/i915/display/i9xx_wm.c

3911

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/i9xx_wm.c

3957

for_each_intel_crtc(display->drm, crtc) {

drivers/gpu/drm/i915/display/i9xx_wm.c

3959

to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/i9xx_wm.c

3960

struct vlv_wm_state *active = &crtc->wm.active.vlv;

drivers/gpu/drm/i915/display/i9xx_wm.c

3963

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/i9xx_wm.c

3979

for_each_plane_id_on_crtc(crtc, plane_id) {

drivers/gpu/drm/i915/display/i9xx_wm.c

3989

for_each_plane_id_on_crtc(crtc, plane_id)

drivers/gpu/drm/i915/display/i9xx_wm.c

3992

vlv_invalidate_wms(crtc, active, level);

drivers/gpu/drm/i915/display/i9xx_wm.c

4014

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/i9xx_wm.c

4019

struct intel_crtc *crtc =

drivers/gpu/drm/i915/display/i9xx_wm.c

4022

to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/i9xx_wm.c

4039

for_each_intel_crtc(display->drm, crtc) {

drivers/gpu/drm/i915/display/i9xx_wm.c

4041

to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/i9xx_wm.c

4049

crtc->wm.active.vlv = crtc_state->wm.vlv.optimal;

drivers/gpu/drm/i915/display/i9xx_wm.c

4076

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/i9xx_wm.c

4080

for_each_intel_crtc(display->drm, crtc)

drivers/gpu/drm/i915/display/i9xx_wm.c

4081

ilk_pipe_wm_get_hw_state(crtc);

drivers/gpu/drm/i915/display/i9xx_wm.c

620

static bool intel_crtc_active(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/i9xx_wm.c

635

return crtc->active && crtc->base.primary->state->fb &&

drivers/gpu/drm/i915/display/i9xx_wm.c

636

crtc->config->hw.adjusted_mode.crtc_clock;

drivers/gpu/drm/i915/display/i9xx_wm.c

641

struct intel_crtc *crtc, *enabled = NULL;

drivers/gpu/drm/i915/display/i9xx_wm.c

643

for_each_intel_crtc(display->drm, crtc) {

drivers/gpu/drm/i915/display/i9xx_wm.c

644

if (intel_crtc_active(crtc)) {

drivers/gpu/drm/i915/display/i9xx_wm.c

647

enabled = crtc;

drivers/gpu/drm/i915/display/i9xx_wm.c

656

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/i9xx_wm.c

668

crtc = single_enabled_crtc(display);

drivers/gpu/drm/i915/display/i9xx_wm.c

669

if (crtc) {

drivers/gpu/drm/i915/display/i9xx_wm.c

671

crtc->base.primary->state->fb;

drivers/gpu/drm/i915/display/i9xx_wm.c

672

int pixel_rate = crtc->config->pixel_rate;

drivers/gpu/drm/i915/display/i9xx_wm.c

769

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/i9xx_wm.c

772

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/i9xx_wm.c

780

if (plane->pipe != crtc->pipe)

drivers/gpu/drm/i915/display/icl_dsi.c

1282

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/icl_dsi.c

1285

icl_apply_kvmr_pipe_a_wa(encoder, crtc->pipe, true);

drivers/gpu/drm/i915/display/icl_dsi.c

1450

struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/icl_dsi.c

1458

icl_apply_kvmr_pipe_a_wa(encoder, crtc->pipe, false);

drivers/gpu/drm/i915/display/icl_dsi.c

1568

struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);

drivers/gpu/drm/i915/display/icl_dsi.c

1579

pipe_config->pipe_bpp = bdw_get_pipe_misc_bpp(crtc);

drivers/gpu/drm/i915/display/icl_dsi.c

1599

intel_crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/icl_dsi.c

305

struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);

drivers/gpu/drm/i915/display/icl_dsi.c

307

dss_ctl1_reg = ICL_PIPE_DSS_CTL1(crtc->pipe);

drivers/gpu/drm/i915/display/icl_dsi.c

308

dss_ctl2_reg = ICL_PIPE_DSS_CTL2(crtc->pipe);

drivers/gpu/drm/i915/display/icl_dsi.c

705

struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);

drivers/gpu/drm/i915/display/icl_dsi.c

706

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_alpm.c

386

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_alpm.c

390

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_alpm.c

392

intel_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_alpm.c

441

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_alpm.c

445

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_alpm.c

447

intel_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_alpm.c

474

struct drm_crtc *crtc;

drivers/gpu/drm/i915/display/intel_alpm.c

484

crtc = connector->base.state->crtc;

drivers/gpu/drm/i915/display/intel_alpm.c

485

if (connector->base.status != connector_status_connected || !crtc) {

drivers/gpu/drm/i915/display/intel_alpm.c

490

crtc_state = to_intel_crtc_state(crtc->state);

drivers/gpu/drm/i915/display/intel_alpm.h

29

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_alpm.h

33

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_atomic.c

129

if (!new_state->crtc)

drivers/gpu/drm/i915/display/intel_atomic.c

132

crtc_state = drm_atomic_get_new_crtc_state(state, new_state->crtc);

drivers/gpu/drm/i915/display/intel_atomic.c

187

return old_conn_state->crtc != new_conn_state->crtc ||

drivers/gpu/drm/i915/display/intel_atomic.c

188

(new_conn_state->crtc &&

drivers/gpu/drm/i915/display/intel_atomic.c

190

new_conn_state->crtc)));

drivers/gpu/drm/i915/display/intel_atomic.c

201

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_atomic.c

205

for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {

drivers/gpu/drm/i915/display/intel_atomic.c

237

intel_crtc_duplicate_state(struct drm_crtc *crtc)

drivers/gpu/drm/i915/display/intel_atomic.c

239

const struct intel_crtc_state *old_crtc_state = to_intel_crtc_state(crtc->state);

drivers/gpu/drm/i915/display/intel_atomic.c

246

__drm_atomic_helper_crtc_duplicate_state(crtc, &crtc_state->uapi);

drivers/gpu/drm/i915/display/intel_atomic.c

308

intel_crtc_destroy_state(struct drm_crtc *crtc,

drivers/gpu/drm/i915/display/intel_atomic.c

313

drm_WARN_ON(crtc->dev, crtc_state->dsb_color);

drivers/gpu/drm/i915/display/intel_atomic.c

314

drm_WARN_ON(crtc->dev, crtc_state->dsb_commit);

drivers/gpu/drm/i915/display/intel_atomic.c

361

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_atomic.c

364

crtc_state = drm_atomic_get_crtc_state(state, &crtc->base);

drivers/gpu/drm/i915/display/intel_atomic.h

42

struct drm_crtc_state *intel_crtc_duplicate_state(struct drm_crtc *crtc);

drivers/gpu/drm/i915/display/intel_atomic.h

43

void intel_crtc_destroy_state(struct drm_crtc *crtc,

drivers/gpu/drm/i915/display/intel_atomic.h

52

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_audio.c

1181

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_audio.c

1202

crtc = to_intel_crtc(encoder->base.crtc);

drivers/gpu/drm/i915/display/intel_audio.c

1208

hsw_audio_config_update(encoder, crtc->config);

drivers/gpu/drm/i915/display/intel_audio.c

291

struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_audio.c

297

intel_crtc_wait_for_next_vblank(crtc);

drivers/gpu/drm/i915/display/intel_audio.c

298

intel_crtc_wait_for_next_vblank(crtc);

drivers/gpu/drm/i915/display/intel_audio.c

306

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_audio.c

310

intel_crtc_wait_for_next_vblank(crtc);

drivers/gpu/drm/i915/display/intel_audio.c

418

struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_audio.c

436

intel_crtc_wait_for_next_vblank(crtc);

drivers/gpu/drm/i915/display/intel_audio.c

437

intel_crtc_wait_for_next_vblank(crtc);

drivers/gpu/drm/i915/display/intel_audio.c

564

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_audio.c

582

intel_crtc_wait_for_next_vblank(crtc);

drivers/gpu/drm/i915/display/intel_audio.c

630

struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_audio.c

632

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_audio.c

657

intel_crtc_wait_for_next_vblank(crtc);

drivers/gpu/drm/i915/display/intel_audio.c

658

intel_crtc_wait_for_next_vblank(crtc);

drivers/gpu/drm/i915/display/intel_audio.c

666

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_audio.c

668

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_audio.c

674

intel_crtc_wait_for_next_vblank(crtc);

drivers/gpu/drm/i915/display/intel_audio.c

743

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_audio.c

756

crtc->base.base.id, crtc->base.name,

drivers/gpu/drm/i915/display/intel_audio.c

803

struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_audio.c

816

crtc->base.base.id, crtc->base.name);

drivers/gpu/drm/i915/display/intel_audio.c

939

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_audio.c

946

ret = drm_modeset_lock(&crtc->base.mutex, state->base.acquire_ctx);

drivers/gpu/drm/i915/display/intel_audio.c

964

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_audio.c

967

crtc = intel_first_crtc(display);

drivers/gpu/drm/i915/display/intel_audio.c

968

if (!crtc)

drivers/gpu/drm/i915/display/intel_audio.c

980

ret = glk_force_audio_cdclk_commit(to_intel_atomic_state(state), crtc,

drivers/gpu/drm/i915/display/intel_backlight.c

266

enum pipe pipe = to_intel_crtc(conn_state->crtc)->pipe;

drivers/gpu/drm/i915/display/intel_backlight.c

320

if (!panel->backlight.present || !conn_state->crtc)

drivers/gpu/drm/i915/display/intel_backlight.c

399

enum pipe pipe = to_intel_crtc(old_conn_state->crtc)->pipe;

drivers/gpu/drm/i915/display/intel_backlight.c

617

enum pipe pipe = to_intel_crtc(conn_state->crtc)->pipe;

drivers/gpu/drm/i915/display/intel_backlight.c

654

enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe;

drivers/gpu/drm/i915/display/intel_backlight.c

686

enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe;

drivers/gpu/drm/i915/display/intel_backlight.c

803

enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe;

drivers/gpu/drm/i915/display/intel_bw.c

1226

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_bw.c

1229

for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,

drivers/gpu/drm/i915/display/intel_bw.c

1253

new_bw_state->data_rate[crtc->pipe] = new_data_rate;

drivers/gpu/drm/i915/display/intel_bw.c

1254

new_bw_state->num_active_planes[crtc->pipe] = new_active_planes;

drivers/gpu/drm/i915/display/intel_bw.c

1260

crtc->base.base.id, crtc->base.name,

drivers/gpu/drm/i915/display/intel_bw.c

1261

new_bw_state->data_rate[crtc->pipe],

drivers/gpu/drm/i915/display/intel_bw.c

1262

new_bw_state->num_active_planes[crtc->pipe]);

drivers/gpu/drm/i915/display/intel_bw.c

1300

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_bw.c

1303

for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,

drivers/gpu/drm/i915/display/intel_bw.c

1316

new_bw_state->pipe_sagv_reject &= ~BIT(crtc->pipe);

drivers/gpu/drm/i915/display/intel_bw.c

1318

new_bw_state->pipe_sagv_reject |= BIT(crtc->pipe);

drivers/gpu/drm/i915/display/intel_bw.c

1391

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_bw.c

1393

bw_state->data_rate[crtc->pipe] =

drivers/gpu/drm/i915/display/intel_bw.c

1395

bw_state->num_active_planes[crtc->pipe] =

drivers/gpu/drm/i915/display/intel_bw.c

1399

pipe_name(crtc->pipe),

drivers/gpu/drm/i915/display/intel_bw.c

1400

bw_state->data_rate[crtc->pipe],

drivers/gpu/drm/i915/display/intel_bw.c

1401

bw_state->num_active_planes[crtc->pipe]);

drivers/gpu/drm/i915/display/intel_bw.c

1408

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_bw.c

1416

for_each_intel_crtc(display->drm, crtc) {

drivers/gpu/drm/i915/display/intel_bw.c

1418

to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/intel_bw.c

1419

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_bw.c

1432

void intel_bw_crtc_disable_noatomic(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_bw.c

1434

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_bw.c

1437

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_bw.h

33

void intel_bw_crtc_disable_noatomic(struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_casf.c

142

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_casf.c

145

sharp = intel_de_read(display, SHARPNESS_CTL(crtc->pipe));

drivers/gpu/drm/i915/display/intel_casf.c

193

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_casf.c

202

intel_de_write_fw(display, GLK_PS_COEF_INDEX_SET(crtc->pipe, id, 0),

drivers/gpu/drm/i915/display/intel_casf.c

215

intel_de_write_fw(display, GLK_PS_COEF_DATA_SET(crtc->pipe, id, 0),

drivers/gpu/drm/i915/display/intel_casf.c

265

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_casf.c

268

intel_casf_filter_lut_load(crtc, crtc_state);

drivers/gpu/drm/i915/display/intel_casf.c

276

intel_de_write(display, SHARPNESS_CTL(crtc->pipe), sharpness_ctl);

drivers/gpu/drm/i915/display/intel_casf.c

284

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_casf.c

286

intel_de_write(display, SKL_PS_CTRL(crtc->pipe, 1), 0);

drivers/gpu/drm/i915/display/intel_casf.c

287

intel_de_write(display, SKL_PS_WIN_POS(crtc->pipe, 1), 0);

drivers/gpu/drm/i915/display/intel_casf.c

288

intel_de_write(display, SHARPNESS_CTL(crtc->pipe), 0);

drivers/gpu/drm/i915/display/intel_casf.c

289

intel_de_write(display, SKL_PS_WIN_SZ(crtc->pipe, 1), 0);

drivers/gpu/drm/i915/display/intel_casf.c

65

static void intel_casf_filter_lut_load(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_casf.c

71

intel_de_write(display, SHRPLUT_INDEX(crtc->pipe),

drivers/gpu/drm/i915/display/intel_casf.c

75

intel_de_write(display, SHRPLUT_DATA(crtc->pipe),

drivers/gpu/drm/i915/display/intel_casf.c

82

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_casf.c

85

intel_de_rmw(display, SHARPNESS_CTL(crtc->pipe), FILTER_STRENGTH_MASK,

drivers/gpu/drm/i915/display/intel_casf.c

88

win_size = intel_de_read(display, SKL_PS_WIN_SZ(crtc->pipe, 1));

drivers/gpu/drm/i915/display/intel_casf.c

90

intel_de_write_fw(display, SKL_PS_WIN_SZ(crtc->pipe, 1), win_size);

drivers/gpu/drm/i915/display/intel_cdclk.c

2900

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_cdclk.c

2901

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_cdclk.c

2905

for_each_intel_plane_on_crtc(display->drm, crtc, plane)

drivers/gpu/drm/i915/display/intel_cdclk.c

2931

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_cdclk.c

2950

old_min_cdclk = cdclk_state->min_cdclk[crtc->pipe];

drivers/gpu/drm/i915/display/intel_cdclk.c

2958

cdclk_state->min_cdclk[crtc->pipe] = new_min_cdclk;

drivers/gpu/drm/i915/display/intel_cdclk.c

2968

crtc->base.base.id, crtc->base.name,

drivers/gpu/drm/i915/display/intel_cdclk.c

2975

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_cdclk.c

2996

old_min_voltage_level = cdclk_state->min_voltage_level[crtc->pipe];

drivers/gpu/drm/i915/display/intel_cdclk.c

3005

cdclk_state->min_voltage_level[crtc->pipe] = new_min_voltage_level;

drivers/gpu/drm/i915/display/intel_cdclk.c

3015

crtc->base.base.id, crtc->base.name,

drivers/gpu/drm/i915/display/intel_cdclk.c

3123

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_cdclk.c

3129

for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {

drivers/gpu/drm/i915/display/intel_cdclk.c

3137

if (cdclk_state->min_voltage_level[crtc->pipe] == min_voltage_level)

drivers/gpu/drm/i915/display/intel_cdclk.c

3140

cdclk_state->min_voltage_level[crtc->pipe] = min_voltage_level;

drivers/gpu/drm/i915/display/intel_cdclk.c

3219

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_cdclk.c

3227

for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {

drivers/gpu/drm/i915/display/intel_cdclk.c

3425

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_cdclk.c

3428

for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,

drivers/gpu/drm/i915/display/intel_cdclk.c

3430

ret = intel_cdclk_update_crtc_min_cdclk(state, crtc,

drivers/gpu/drm/i915/display/intel_cdclk.c

3437

ret = intel_cdclk_update_crtc_min_voltage_level(state, crtc,

drivers/gpu/drm/i915/display/intel_cdclk.c

3529

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_cdclk.c

3533

crtc = intel_crtc_for_pipe(display, pipe);

drivers/gpu/drm/i915/display/intel_cdclk.c

3535

crtc_state = intel_atomic_get_crtc_state(&state->base, crtc);

drivers/gpu/drm/i915/display/intel_cdclk.c

3644

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_cdclk.c

3649

for_each_intel_crtc(display->drm, crtc) {

drivers/gpu/drm/i915/display/intel_cdclk.c

3651

to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/intel_cdclk.c

3652

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_cdclk.c

3666

void intel_cdclk_crtc_disable_noatomic(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_cdclk.c

3668

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_cdclk.h

48

void intel_cdclk_crtc_disable_noatomic(struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_color.c

1037

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_color.c

1038

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_color.c

1043

intel_de_write_fw(display, PIPE_CSC_MODE(crtc->pipe),

drivers/gpu/drm/i915/display/intel_color.c

1050

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_color.c

1051

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_color.c

1053

intel_de_write(display, GAMMA_MODE(crtc->pipe),

drivers/gpu/drm/i915/display/intel_color.c

1056

intel_de_write_fw(display, PIPE_CSC_MODE(crtc->pipe),

drivers/gpu/drm/i915/display/intel_color.c

1060

static u32 hsw_read_gamma_mode(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_color.c

1062

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_color.c

1064

return intel_de_read(display, GAMMA_MODE(crtc->pipe));

drivers/gpu/drm/i915/display/intel_color.c

1067

static u32 ilk_read_csc_mode(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_color.c

1069

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_color.c

1071

return intel_de_read(display, PIPE_CSC_MODE(crtc->pipe));

drivers/gpu/drm/i915/display/intel_color.c

1077

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_color.c

1078

struct intel_plane *plane = to_intel_plane(crtc->base.primary);

drivers/gpu/drm/i915/display/intel_color.c

1093

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_color.c

1095

crtc_state->gamma_mode = hsw_read_gamma_mode(crtc);

drivers/gpu/drm/i915/display/intel_color.c

1096

crtc_state->csc_mode = ilk_read_csc_mode(crtc);

drivers/gpu/drm/i915/display/intel_color.c

1104

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_color.c

1106

crtc_state->gamma_mode = hsw_read_gamma_mode(crtc);

drivers/gpu/drm/i915/display/intel_color.c

1107

crtc_state->csc_mode = ilk_read_csc_mode(crtc);

drivers/gpu/drm/i915/display/intel_color.c

1110

u32 tmp = intel_de_read(display, SKL_BOTTOM_COLOR(crtc->pipe));

drivers/gpu/drm/i915/display/intel_color.c

1124

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_color.c

1125

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

1142

intel_de_write_dsb(display, dsb, GAMMA_MODE(crtc->pipe), crtc_state->gamma_mode);

drivers/gpu/drm/i915/display/intel_color.c

1144

intel_de_write_dsb(display, dsb, PIPE_CSC_MODE(crtc->pipe), crtc_state->csc_mode);

drivers/gpu/drm/i915/display/intel_color.c

1151

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_color.c

1152

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

1160

intel_de_write_dsb(display, dsb, GAMMA_MODE(crtc->pipe), crtc_state->gamma_mode);

drivers/gpu/drm/i915/display/intel_color.c

1162

intel_de_write_dsb(display, dsb, PIPE_CSC_MODE(crtc->pipe), crtc_state->csc_mode);

drivers/gpu/drm/i915/display/intel_color.c

1168

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_color.c

1184

intel_de_read_fw(display, PIPE_CSC_PREOFF_HI(crtc->pipe));

drivers/gpu/drm/i915/display/intel_color.c

1256

static void i9xx_load_lut_8(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_color.c

1259

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_color.c

1261

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

1274

static void i9xx_load_lut_10(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_color.c

1277

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_color.c

1280

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

1294

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_color.c

1299

i9xx_load_lut_8(crtc, post_csc_lut);

drivers/gpu/drm/i915/display/intel_color.c

1302

i9xx_load_lut_10(crtc, post_csc_lut);

drivers/gpu/drm/i915/display/intel_color.c

1310

static void i965_load_lut_10p6(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_color.c

1313

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_color.c

1316

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

1334

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_color.c

1339

i9xx_load_lut_8(crtc, post_csc_lut);

drivers/gpu/drm/i915/display/intel_color.c

1342

i965_load_lut_10p6(crtc, post_csc_lut);

drivers/gpu/drm/i915/display/intel_color.c

1375

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_color.c

1377

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

1414

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_color.c

1417

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

1460

const struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_color.c

1463

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

1485

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_color.c

1488

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

1510

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_color.c

1511

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

1521

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_color.c

1522

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

1621

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_color.c

1624

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

1692

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_color.c

1693

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

1704

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_color.c

1707

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

1739

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_color.c

1743

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

1831

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_color.c

1834

vlv_load_wgc_csc(crtc, &crtc_state->csc);

drivers/gpu/drm/i915/display/intel_color.c

1857

static void chv_load_cgm_degamma(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_color.c

1860

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_color.c

1863

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

1891

static void chv_load_cgm_gamma(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_color.c

1894

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_color.c

1897

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

1910

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_color.c

1915

chv_load_cgm_csc(crtc, &crtc_state->csc);

drivers/gpu/drm/i915/display/intel_color.c

1918

chv_load_cgm_degamma(crtc, pre_csc_lut);

drivers/gpu/drm/i915/display/intel_color.c

1921

chv_load_cgm_gamma(crtc, post_csc_lut);

drivers/gpu/drm/i915/display/intel_color.c

1925

intel_de_write_fw(display, CGM_PIPE_MODE(crtc->pipe),

drivers/gpu/drm/i915/display/intel_color.c

1973

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_color.c

1974

struct intel_plane *plane = to_intel_plane(crtc->base.primary);

drivers/gpu/drm/i915/display/intel_color.c

2001

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_color.c

2005

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_color.c

2018

crtc_state->dsb_color = intel_dsb_prepare(state, crtc, INTEL_DSB_0, 1024);

drivers/gpu/drm/i915/display/intel_color.c

2020

crtc_state->dsb_color = intel_dsb_prepare(state, crtc, INTEL_DSB_1, 1024);

drivers/gpu/drm/i915/display/intel_color.c

2055

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_color.c

2059

intel_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_color.c

2069

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_color.c

2072

intel_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_color.c

2079

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_color.c

2082

intel_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_color.c

2084

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_color.c

2094

return vlv_can_preload_luts(state, crtc);

drivers/gpu/drm/i915/display/intel_color.c

2098

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_color.c

2102

intel_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_color.c

2104

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_color.c

2116

return display->funcs.color->color_check(state, crtc);

drivers/gpu/drm/i915/display/intel_color.c

2165

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_color.c

2169

intel_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_color.c

2171

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_color.c

2182

for_each_intel_plane_on_crtc(display->drm, crtc, plane) {

drivers/gpu/drm/i915/display/intel_color.c

2240

static int check_lut_size(struct intel_crtc *crtc, const char *lut_name,

drivers/gpu/drm/i915/display/intel_color.c

2243

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_color.c

225

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_color.c

2253

crtc->base.base.id, crtc->base.name, lut_name, len, expected);

drivers/gpu/drm/i915/display/intel_color.c

2264

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_color.c

2273

crtc->base.base.id, crtc->base.name);

drivers/gpu/drm/i915/display/intel_color.c

228

struct intel_display *display = to_intel_display(crtc->base.dev);

drivers/gpu/drm/i915/display/intel_color.c

2280

if (check_lut_size(crtc, "degamma", degamma_lut, degamma_length) ||

drivers/gpu/drm/i915/display/intel_color.c

2281

check_lut_size(crtc, "gamma", gamma_lut, gamma_length))

drivers/gpu/drm/i915/display/intel_color.c

229

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

2313

static int i9xx_check_lut_10(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_color.c

2316

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_color.c

2327

crtc->base.base.id, crtc->base.name);

drivers/gpu/drm/i915/display/intel_color.c

2373

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_color.c

2377

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_color.c

2392

ret = i9xx_check_lut_10(crtc, crtc_state->hw.gamma_lut);

drivers/gpu/drm/i915/display/intel_color.c

2397

ret = intel_color_add_affected_planes(state, crtc);

drivers/gpu/drm/i915/display/intel_color.c

2403

crtc_state->preload_luts = intel_can_preload_luts(state, crtc);

drivers/gpu/drm/i915/display/intel_color.c

2413

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_color.c

2416

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_color.c

2431

ret = intel_color_add_affected_planes(state, crtc);

drivers/gpu/drm/i915/display/intel_color.c

2439

crtc_state->preload_luts = vlv_can_preload_luts(state, crtc);

drivers/gpu/drm/i915/display/intel_color.c

2475

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_color.c

2478

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_color.c

2503

ret = intel_color_add_affected_planes(state, crtc);

drivers/gpu/drm/i915/display/intel_color.c

2511

crtc_state->preload_luts = chv_can_preload_luts(state, crtc);

drivers/gpu/drm/i915/display/intel_color.c

2596

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_color.c

2600

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_color.c

2610

crtc->base.base.id, crtc->base.name);

drivers/gpu/drm/i915/display/intel_color.c

2618

crtc->base.base.id, crtc->base.name);

drivers/gpu/drm/i915/display/intel_color.c

2630

ret = intel_color_add_affected_planes(state, crtc);

drivers/gpu/drm/i915/display/intel_color.c

264

static void ilk_read_pipe_csc(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_color.c

2640

crtc_state->preload_luts = intel_can_preload_luts(state, crtc);

drivers/gpu/drm/i915/display/intel_color.c

267

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_color.c

268

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

2702

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_color.c

2706

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_color.c

2716

crtc->base.base.id, crtc->base.name);

drivers/gpu/drm/i915/display/intel_color.c

2724

crtc->base.base.id, crtc->base.name);

drivers/gpu/drm/i915/display/intel_color.c

2732

crtc->base.base.id, crtc->base.name);

drivers/gpu/drm/i915/display/intel_color.c

2744

ret = intel_color_add_affected_planes(state, crtc);

drivers/gpu/drm/i915/display/intel_color.c

2754

crtc_state->preload_luts = intel_can_preload_luts(state, crtc);

drivers/gpu/drm/i915/display/intel_color.c

2839

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_color.c

2843

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_color.c

2854

crtc->base.base.id, crtc->base.name);

drivers/gpu/drm/i915/display/intel_color.c

2862

crtc->base.base.id, crtc->base.name);

drivers/gpu/drm/i915/display/intel_color.c

2882

ret = intel_color_add_affected_planes(state, crtc);

drivers/gpu/drm/i915/display/intel_color.c

2892

crtc_state->preload_luts = intel_can_preload_luts(state, crtc);

drivers/gpu/drm/i915/display/intel_color.c

2940

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_color.c

2943

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_color.c

2958

crtc_state->preload_luts = intel_can_preload_luts(state, crtc);

drivers/gpu/drm/i915/display/intel_color.c

303

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_color.c

306

ilk_read_pipe_csc(crtc, &crtc_state->csc);

drivers/gpu/drm/i915/display/intel_color.c

311

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_color.c

327

ilk_read_pipe_csc(crtc, &crtc_state->csc);

drivers/gpu/drm/i915/display/intel_color.c

3296

static struct drm_property_blob *i9xx_read_lut_8(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_color.c

3298

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_color.c

3299

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

331

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_color.c

3322

static struct drm_property_blob *i9xx_read_lut_10(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_color.c

3324

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_color.c

3326

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

334

struct intel_display *display = to_intel_display(crtc->base.dev);

drivers/gpu/drm/i915/display/intel_color.c

335

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

3355

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_color.c

3362

crtc_state->post_csc_lut = i9xx_read_lut_8(crtc);

drivers/gpu/drm/i915/display/intel_color.c

3365

crtc_state->post_csc_lut = i9xx_read_lut_10(crtc);

drivers/gpu/drm/i915/display/intel_color.c

3373

static struct drm_property_blob *i965_read_lut_10p6(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_color.c

3375

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_color.c

3377

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

3407

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_color.c

3414

crtc_state->post_csc_lut = i9xx_read_lut_8(crtc);

drivers/gpu/drm/i915/display/intel_color.c

3417

crtc_state->post_csc_lut = i965_read_lut_10p6(crtc);

drivers/gpu/drm/i915/display/intel_color.c

3425

static struct drm_property_blob *chv_read_cgm_degamma(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_color.c

3427

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_color.c

3429

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

3451

static struct drm_property_blob *chv_read_cgm_gamma(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_color.c

3453

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_color.c

3455

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

3480

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_color.c

3482

crtc_state->cgm_mode = intel_de_read(display, CGM_PIPE_MODE(crtc->pipe));

drivers/gpu/drm/i915/display/intel_color.c

3489

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_color.c

3492

crtc_state->pre_csc_lut = chv_read_cgm_degamma(crtc);

drivers/gpu/drm/i915/display/intel_color.c

3495

crtc_state->post_csc_lut = chv_read_cgm_gamma(crtc);

drivers/gpu/drm/i915/display/intel_color.c

3500

static struct drm_property_blob *ilk_read_lut_8(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_color.c

3502

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_color.c

3503

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

3525

static struct drm_property_blob *ilk_read_lut_10(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_color.c

3527

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_color.c

3529

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

3552

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_color.c

3554

crtc_state->csc_mode = ilk_read_csc_mode(crtc);

drivers/gpu/drm/i915/display/intel_color.c

3561

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_color.c

3571

*blob = ilk_read_lut_8(crtc);

drivers/gpu/drm/i915/display/intel_color.c

3574

*blob = ilk_read_lut_10(crtc);

drivers/gpu/drm/i915/display/intel_color.c

3587

static struct drm_property_blob *ivb_read_lut_10(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_color.c

3590

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_color.c

3592

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

3622

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_color.c

3632

*blob = ilk_read_lut_8(crtc);

drivers/gpu/drm/i915/display/intel_color.c

3636

ivb_read_lut_10(crtc, PAL_PREC_SPLIT_MODE |

drivers/gpu/drm/i915/display/intel_color.c

3639

ivb_read_lut_10(crtc, PAL_PREC_SPLIT_MODE |

drivers/gpu/drm/i915/display/intel_color.c

3643

*blob = ivb_read_lut_10(crtc, PAL_PREC_INDEX_VALUE(0));

drivers/gpu/drm/i915/display/intel_color.c

3652

static struct drm_property_blob *bdw_read_lut_10(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_color.c

3655

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_color.c

3657

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

367

static void icl_read_output_csc(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_color.c

3689

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_color.c

3699

*blob = ilk_read_lut_8(crtc);

drivers/gpu/drm/i915/display/intel_color.c

370

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_color.c

3703

bdw_read_lut_10(crtc, PAL_PREC_SPLIT_MODE |

drivers/gpu/drm/i915/display/intel_color.c

3706

bdw_read_lut_10(crtc, PAL_PREC_SPLIT_MODE |

drivers/gpu/drm/i915/display/intel_color.c

371

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

3710

*blob = bdw_read_lut_10(crtc, PAL_PREC_INDEX_VALUE(0));

drivers/gpu/drm/i915/display/intel_color.c

3718

static struct drm_property_blob *glk_read_degamma_lut(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_color.c

3720

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_color.c

3722

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

3762

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_color.c

3765

crtc_state->pre_csc_lut = glk_read_degamma_lut(crtc);

drivers/gpu/drm/i915/display/intel_color.c

3772

crtc_state->post_csc_lut = ilk_read_lut_8(crtc);

drivers/gpu/drm/i915/display/intel_color.c

3775

crtc_state->post_csc_lut = bdw_read_lut_10(crtc, PAL_PREC_INDEX_VALUE(0));

drivers/gpu/drm/i915/display/intel_color.c

3784

icl_read_lut_multi_segment(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_color.c

3786

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_color.c

3788

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

3827

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_color.c

3830

crtc_state->pre_csc_lut = glk_read_degamma_lut(crtc);

drivers/gpu/drm/i915/display/intel_color.c

3837

crtc_state->post_csc_lut = ilk_read_lut_8(crtc);

drivers/gpu/drm/i915/display/intel_color.c

3840

crtc_state->post_csc_lut = bdw_read_lut_10(crtc, PAL_PREC_INDEX_VALUE(0));

drivers/gpu/drm/i915/display/intel_color.c

3843

crtc_state->post_csc_lut = icl_read_lut_multi_segment(crtc);

drivers/gpu/drm/i915/display/intel_color.c

40

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_color.c

403

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_color.c

4073

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_color.c

4076

struct intel_display *display = to_intel_display(crtc->base.dev);

drivers/gpu/drm/i915/display/intel_color.c

4079

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

4083

crtc->base.base.id, crtc->base.name);

drivers/gpu/drm/i915/display/intel_color.c

4093

static void glk_lut_3d_commit(struct intel_dsb *dsb, struct intel_crtc *crtc, bool enable)

drivers/gpu/drm/i915/display/intel_color.c

4095

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_color.c

4096

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

4101

crtc->base.base.id, crtc->base.name);

drivers/gpu/drm/i915/display/intel_color.c

411

ilk_read_pipe_csc(crtc, &crtc_state->csc);

drivers/gpu/drm/i915/display/intel_color.c

414

icl_read_output_csc(crtc, &crtc_state->output_csc);

drivers/gpu/drm/i915/display/intel_color.c

4244

struct intel_crtc *crtc = to_intel_crtc(plane_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_color.c

4246

if (crtc && intel_color_crtc_has_3dlut(display, crtc->pipe))

drivers/gpu/drm/i915/display/intel_color.c

4247

glk_lut_3d_commit(dsb, crtc, !!plane_state->hw.lut_3d);

drivers/gpu/drm/i915/display/intel_color.c

4284

struct intel_crtc *crtc = to_intel_crtc(plane_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_color.c

4286

if (crtc && intel_color_crtc_has_3dlut(display, crtc->pipe))

drivers/gpu/drm/i915/display/intel_color.c

4287

glk_load_lut_3d(dsb, crtc, plane_state->hw.lut_3d);

drivers/gpu/drm/i915/display/intel_color.c

4301

void intel_color_crtc_init(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_color.c

4303

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_color.c

4307

drm_mode_crtc_set_gamma_size(&crtc->base, 256);

drivers/gpu/drm/i915/display/intel_color.c

4321

if (DISPLAY_VER(display) == 3 && crtc->pipe == PIPE_A)

drivers/gpu/drm/i915/display/intel_color.c

4324

drm_crtc_enable_color_mgmt(&crtc->base, degamma_lut_size,

drivers/gpu/drm/i915/display/intel_color.c

562

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_color.c

565

ilk_update_pipe_csc(dsb, crtc, &crtc_state->csc);

drivers/gpu/drm/i915/display/intel_color.c

600

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_color.c

603

ilk_update_pipe_csc(dsb, crtc, &crtc_state->csc);

drivers/gpu/drm/i915/display/intel_color.c

606

icl_update_output_csc(dsb, crtc, &crtc_state->output_csc);

drivers/gpu/drm/i915/display/intel_color.c

648

static void vlv_load_wgc_csc(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_color.c

651

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_color.c

652

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

670

static void vlv_read_wgc_csc(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_color.c

673

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_color.c

674

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

701

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_color.c

704

vlv_read_wgc_csc(crtc, &crtc_state->csc);

drivers/gpu/drm/i915/display/intel_color.c

750

static void chv_load_cgm_csc(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_color.c

753

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_color.c

754

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

768

static void chv_read_cgm_csc(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_color.c

771

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_color.c

772

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

797

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_color.c

800

chv_read_cgm_csc(crtc, &crtc_state->csc);

drivers/gpu/drm/i915/display/intel_color.h

22

void intel_color_crtc_init(struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_color.h

24

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_color.h

26

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_connector.c

202

if (!connector->base.state->crtc)

drivers/gpu/drm/i915/display/intel_connector.c

205

return to_intel_crtc(connector->base.state->crtc)->pipe;

drivers/gpu/drm/i915/display/intel_crt.c

180

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_crt.c

198

adpa |= ADPA_PIPE_SEL_CPT(crtc->pipe);

drivers/gpu/drm/i915/display/intel_crt.c

200

adpa |= ADPA_PIPE_SEL(crtc->pipe);

drivers/gpu/drm/i915/display/intel_crt.c

203

intel_de_write(display, BCLRPAT(display, crtc->pipe), 0);

drivers/gpu/drm/i915/display/intel_crt.c

264

struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_crt.c

278

lpt_pch_disable(state, crtc);

drivers/gpu/drm/i915/display/intel_crt.c

305

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_crt.c

306

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_crt.c

323

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_crt.c

324

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_crt.c

332

lpt_pch_enable(state, crtc);

drivers/gpu/drm/i915/display/intel_crt.c

338

intel_crtc_wait_for_next_vblank(crtc);

drivers/gpu/drm/i915/display/intel_crt.c

339

intel_crtc_wait_for_next_vblank(crtc);

drivers/gpu/drm/i915/display/intel_crt.c

920

to_intel_crtc(connector->state->crtc)->pipe);

drivers/gpu/drm/i915/display/intel_crtc.c

130

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_crtc.c

132

crtc->vblank_psr_notify = intel_psr_needs_vblank_notification(crtc_state);

drivers/gpu/drm/i915/display/intel_crtc.c

134

assert_vblank_disabled(&crtc->base);

drivers/gpu/drm/i915/display/intel_crtc.c

135

drm_crtc_set_max_vblank_count(&crtc->base,

drivers/gpu/drm/i915/display/intel_crtc.c

137

drm_crtc_vblank_on(&crtc->base);

drivers/gpu/drm/i915/display/intel_crtc.c

144

trace_intel_pipe_enable(crtc);

drivers/gpu/drm/i915/display/intel_crtc.c

150

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_crtc.c

157

trace_intel_pipe_disable(crtc);

drivers/gpu/drm/i915/display/intel_crtc.c

159

drm_crtc_vblank_off(&crtc->base);

drivers/gpu/drm/i915/display/intel_crtc.c

160

assert_vblank_disabled(&crtc->base);

drivers/gpu/drm/i915/display/intel_crtc.c

162

crtc->vblank_psr_notify = false;

drivers/gpu/drm/i915/display/intel_crtc.c

167

struct intel_crtc_state *intel_crtc_state_alloc(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_crtc.c

174

intel_crtc_state_reset(crtc_state, crtc);

drivers/gpu/drm/i915/display/intel_crtc.c

180

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_crtc.c

184

__drm_atomic_helper_crtc_state_reset(&crtc_state->uapi, &crtc->base);

drivers/gpu/drm/i915/display/intel_crtc.c

197

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_crtc.c

199

crtc = kzalloc_obj(*crtc);

drivers/gpu/drm/i915/display/intel_crtc.c

200

if (!crtc)

drivers/gpu/drm/i915/display/intel_crtc.c

203

crtc_state = intel_crtc_state_alloc(crtc);

drivers/gpu/drm/i915/display/intel_crtc.c

205

kfree(crtc);

drivers/gpu/drm/i915/display/intel_crtc.c

209

crtc->base.state = &crtc_state->uapi;

drivers/gpu/drm/i915/display/intel_crtc.c

210

crtc->config = crtc_state;

drivers/gpu/drm/i915/display/intel_crtc.c

212

return crtc;

drivers/gpu/drm/i915/display/intel_crtc.c

215

static void intel_crtc_free(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_crtc.c

217

intel_crtc_destroy_state(&crtc->base, crtc->base.state);

drivers/gpu/drm/i915/display/intel_crtc.c

218

kfree(crtc);

drivers/gpu/drm/i915/display/intel_crtc.c

223

struct intel_crtc *crtc = to_intel_crtc(_crtc);

drivers/gpu/drm/i915/display/intel_crtc.c

225

cpu_latency_qos_remove_request(&crtc->vblank_pm_qos);

drivers/gpu/drm/i915/display/intel_crtc.c

227

drm_crtc_cleanup(&crtc->base);

drivers/gpu/drm/i915/display/intel_crtc.c

228

kfree(crtc);

drivers/gpu/drm/i915/display/intel_crtc.c

231

static int intel_crtc_late_register(struct drm_crtc *crtc)

drivers/gpu/drm/i915/display/intel_crtc.c

233

intel_crtc_debugfs_add(to_intel_crtc(crtc));

drivers/gpu/drm/i915/display/intel_crtc.c

315

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_crtc.c

318

crtc = intel_crtc_alloc();

drivers/gpu/drm/i915/display/intel_crtc.c

319

if (IS_ERR(crtc))

drivers/gpu/drm/i915/display/intel_crtc.c

320

return PTR_ERR(crtc);

drivers/gpu/drm/i915/display/intel_crtc.c

322

crtc->pipe = pipe;

drivers/gpu/drm/i915/display/intel_crtc.c

323

crtc->num_scalers = DISPLAY_RUNTIME_INFO(display)->num_scalers[pipe];

drivers/gpu/drm/i915/display/intel_crtc.c

333

crtc->plane_ids_mask |= BIT(primary->id);

drivers/gpu/drm/i915/display/intel_crtc.c

335

intel_init_fifo_underrun_reporting(display, crtc, false);

drivers/gpu/drm/i915/display/intel_crtc.c

348

crtc->plane_ids_mask |= BIT(plane->id);

drivers/gpu/drm/i915/display/intel_crtc.c

356

crtc->plane_ids_mask |= BIT(cursor->id);

drivers/gpu/drm/i915/display/intel_crtc.c

379

ret = drm_crtc_init_with_planes(display->drm, &crtc->base,

drivers/gpu/drm/i915/display/intel_crtc.c

38

static void assert_vblank_disabled(struct drm_crtc *crtc)

drivers/gpu/drm/i915/display/intel_crtc.c

386

drm_crtc_create_scaling_filter_property(&crtc->base,

drivers/gpu/drm/i915/display/intel_crtc.c

390

intel_color_crtc_init(crtc);

drivers/gpu/drm/i915/display/intel_crtc.c

391

intel_drrs_crtc_init(crtc);

drivers/gpu/drm/i915/display/intel_crtc.c

392

intel_crtc_crc_init(crtc);

drivers/gpu/drm/i915/display/intel_crtc.c

394

cpu_latency_qos_add_request(&crtc->vblank_pm_qos, PM_QOS_DEFAULT_VALUE);

drivers/gpu/drm/i915/display/intel_crtc.c

396

drm_WARN_ON(display->drm, drm_crtc_index(&crtc->base) != crtc->pipe);

drivers/gpu/drm/i915/display/intel_crtc.c

398

if (HAS_CASF(display) && crtc->num_scalers >= 2)

drivers/gpu/drm/i915/display/intel_crtc.c

399

drm_crtc_create_sharpness_strength_property(&crtc->base);

drivers/gpu/drm/i915/display/intel_crtc.c

40

struct intel_display *display = to_intel_display(crtc->dev);

drivers/gpu/drm/i915/display/intel_crtc.c

404

intel_crtc_free(crtc);

drivers/gpu/drm/i915/display/intel_crtc.c

42

if (INTEL_DISPLAY_STATE_WARN(display, drm_crtc_vblank_get(crtc) == 0,

drivers/gpu/drm/i915/display/intel_crtc.c

431

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_crtc.c

437

crtc = to_intel_crtc(drm_crtc);

drivers/gpu/drm/i915/display/intel_crtc.c

438

pipe_from_crtc_id->pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_crtc.c

44

crtc->base.id, crtc->name))

drivers/gpu/drm/i915/display/intel_crtc.c

45

drm_crtc_vblank_put(crtc);

drivers/gpu/drm/i915/display/intel_crtc.c

461

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_crtc.c

463

trace_intel_crtc_vblank_work_start(crtc);

drivers/gpu/drm/i915/display/intel_crtc.c

468

spin_lock_irq(&crtc->base.dev->event_lock);

drivers/gpu/drm/i915/display/intel_crtc.c

469

drm_crtc_send_vblank_event(&crtc->base, crtc_state->uapi.event);

drivers/gpu/drm/i915/display/intel_crtc.c

470

spin_unlock_irq(&crtc->base.dev->event_lock);

drivers/gpu/drm/i915/display/intel_crtc.c

474

trace_intel_crtc_vblank_work_end(crtc);

drivers/gpu/drm/i915/display/intel_crtc.c

479

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_crtc.c

481

drm_vblank_work_init(&crtc_state->vblank_work, &crtc->base,

drivers/gpu/drm/i915/display/intel_crtc.c

487

cpu_latency_qos_update_request(&crtc->vblank_pm_qos, 0);

drivers/gpu/drm/i915/display/intel_crtc.c

493

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_crtc.c

496

for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {

drivers/gpu/drm/i915/display/intel_crtc.c

501

cpu_latency_qos_update_request(&crtc->vblank_pm_qos,

drivers/gpu/drm/i915/display/intel_crtc.c

542

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_crtc.c

546

intel_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_crtc.c

548

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_crtc.c

558

&crtc->flip_done_event);

drivers/gpu/drm/i915/display/intel_crtc.c

56

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_crtc.c

572

if (old_plane_state->hw.crtc == &crtc->base)

drivers/gpu/drm/i915/display/intel_crtc.c

58

for_each_intel_crtc(display->drm, crtc) {

drivers/gpu/drm/i915/display/intel_crtc.c

580

if (drm_WARN_ON(display->drm, drm_crtc_vblank_get(&crtc->base)))

drivers/gpu/drm/i915/display/intel_crtc.c

59

if (crtc->pipe == pipe)

drivers/gpu/drm/i915/display/intel_crtc.c

592

crtc->debug.min_vbl = evade.min;

drivers/gpu/drm/i915/display/intel_crtc.c

593

crtc->debug.max_vbl = evade.max;

drivers/gpu/drm/i915/display/intel_crtc.c

594

trace_intel_pipe_update_start(crtc);

drivers/gpu/drm/i915/display/intel_crtc.c

598

drm_crtc_vblank_put(&crtc->base);

drivers/gpu/drm/i915/display/intel_crtc.c

60

return crtc;

drivers/gpu/drm/i915/display/intel_crtc.c

600

crtc->debug.scanline_start = scanline;

drivers/gpu/drm/i915/display/intel_crtc.c

601

crtc->debug.start_vbl_time = ktime_get();

drivers/gpu/drm/i915/display/intel_crtc.c

602

crtc->debug.start_vbl_count = intel_crtc_get_vblank_counter(crtc);

drivers/gpu/drm/i915/display/intel_crtc.c

604

trace_intel_pipe_update_vblank_evaded(crtc);

drivers/gpu/drm/i915/display/intel_crtc.c

612

static void dbg_vblank_evade(struct intel_crtc *crtc, ktime_t end)

drivers/gpu/drm/i915/display/intel_crtc.c

614

u64 delta = ktime_to_ns(ktime_sub(end, crtc->debug.start_vbl_time));

drivers/gpu/drm/i915/display/intel_crtc.c

618

if (h >= ARRAY_SIZE(crtc->debug.vbl.times))

drivers/gpu/drm/i915/display/intel_crtc.c

619

h = ARRAY_SIZE(crtc->debug.vbl.times) - 1;

drivers/gpu/drm/i915/display/intel_crtc.c

620

crtc->debug.vbl.times[h]++;

drivers/gpu/drm/i915/display/intel_crtc.c

622

crtc->debug.vbl.sum += delta;

drivers/gpu/drm/i915/display/intel_crtc.c

623

if (!crtc->debug.vbl.min || delta < crtc->debug.vbl.min)

drivers/gpu/drm/i915/display/intel_crtc.c

624

crtc->debug.vbl.min = delta;

drivers/gpu/drm/i915/display/intel_crtc.c

625

if (delta > crtc->debug.vbl.max)

drivers/gpu/drm/i915/display/intel_crtc.c

626

crtc->debug.vbl.max = delta;

drivers/gpu/drm/i915/display/intel_crtc.c

629

drm_dbg_kms(crtc->base.dev,

drivers/gpu/drm/i915/display/intel_crtc.c

631

pipe_name(crtc->pipe),

drivers/gpu/drm/i915/display/intel_crtc.c

634

crtc->debug.vbl.over++;

drivers/gpu/drm/i915/display/intel_crtc.c

638

static void dbg_vblank_evade(struct intel_crtc *crtc, ktime_t end) {}

drivers/gpu/drm/i915/display/intel_crtc.c

643

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_crtc.c

649

drm_WARN_ON(crtc->base.dev, drm_crtc_vblank_get(&crtc->base) != 0);

drivers/gpu/drm/i915/display/intel_crtc.c

651

spin_lock_irqsave(&crtc->base.dev->event_lock, irqflags);

drivers/gpu/drm/i915/display/intel_crtc.c

652

drm_crtc_arm_vblank_event(&crtc->base, crtc_state->uapi.event);

drivers/gpu/drm/i915/display/intel_crtc.c

653

spin_unlock_irqrestore(&crtc->base.dev->event_lock, irqflags);

drivers/gpu/drm/i915/display/intel_crtc.c

66

void intel_crtc_wait_for_next_vblank(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_crtc.c

661

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_crtc.c

664

spin_lock_irqsave(&crtc->base.dev->event_lock, irqflags);

drivers/gpu/drm/i915/display/intel_crtc.c

666

spin_unlock_irqrestore(&crtc->base.dev->event_lock, irqflags);

drivers/gpu/drm/i915/display/intel_crtc.c

68

drm_crtc_wait_one_vblank(&crtc->base);

drivers/gpu/drm/i915/display/intel_crtc.c

681

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_crtc.c

685

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_crtc.c

686

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_crtc.c

687

int scanline_end = intel_get_crtc_scanline(crtc);

drivers/gpu/drm/i915/display/intel_crtc.c

688

u32 end_vbl_count = intel_crtc_get_vblank_counter(crtc);

drivers/gpu/drm/i915/display/intel_crtc.c

696

trace_intel_pipe_update_end(crtc, end_vbl_count, scanline_end);

drivers/gpu/drm/i915/display/intel_crtc.c

712

drm_crtc_accurate_vblank_count(&crtc->base) + 1,

drivers/gpu/drm/i915/display/intel_crtc.c

724

if (old_plane_state->hw.crtc == &crtc->base &&

drivers/gpu/drm/i915/display/intel_crtc.c

727

drm_crtc_accurate_vblank_count(&crtc->base) + 1,

drivers/gpu/drm/i915/display/intel_crtc.c

74

struct intel_crtc *crtc = intel_crtc_for_pipe(display, pipe);

drivers/gpu/drm/i915/display/intel_crtc.c

758

if (crtc->debug.start_vbl_count &&

drivers/gpu/drm/i915/display/intel_crtc.c

759

crtc->debug.start_vbl_count != end_vbl_count) {

drivers/gpu/drm/i915/display/intel_crtc.c

76

if (crtc->active)

drivers/gpu/drm/i915/display/intel_crtc.c

762

pipe_name(pipe), crtc->debug.start_vbl_count,

drivers/gpu/drm/i915/display/intel_crtc.c

765

crtc->debug.start_vbl_time),

drivers/gpu/drm/i915/display/intel_crtc.c

766

crtc->debug.min_vbl, crtc->debug.max_vbl,

drivers/gpu/drm/i915/display/intel_crtc.c

767

crtc->debug.scanline_start, scanline_end);

drivers/gpu/drm/i915/display/intel_crtc.c

77

intel_crtc_wait_for_next_vblank(crtc);

drivers/gpu/drm/i915/display/intel_crtc.c

770

dbg_vblank_evade(crtc, end_vbl_time);

drivers/gpu/drm/i915/display/intel_crtc.c

785

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_crtc.c

788

for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,

drivers/gpu/drm/i915/display/intel_crtc.c

80

u32 intel_crtc_get_vblank_counter(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_crtc.c

806

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_crtc.c

809

for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,

drivers/gpu/drm/i915/display/intel_crtc.c

82

struct drm_vblank_crtc *vblank = drm_crtc_vblank_crtc(&crtc->base);

drivers/gpu/drm/i915/display/intel_crtc.c

830

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_crtc.c

834

for_each_plane_id_on_crtc(crtc, plane_id) {

drivers/gpu/drm/i915/display/intel_crtc.c

84

if (!crtc->active)

drivers/gpu/drm/i915/display/intel_crtc.c

90

return (u32)drm_crtc_vblank_count(&crtc->base);

drivers/gpu/drm/i915/display/intel_crtc.c

92

return (u32)drm_crtc_accurate_vblank_count(&crtc->base);

drivers/gpu/drm/i915/display/intel_crtc.c

95

return crtc->base.funcs->get_vblank_counter(&crtc->base);

drivers/gpu/drm/i915/display/intel_crtc.h

43

struct intel_crtc_state *intel_crtc_state_alloc(struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_crtc.h

45

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_crtc.h

46

u32 intel_crtc_get_vblank_counter(struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_crtc.h

50

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_crtc.h

52

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_crtc.h

59

void intel_crtc_wait_for_next_vblank(struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_crtc_state_dump.c

181

struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);

drivers/gpu/drm/i915/display/intel_crtc_state_dump.c

194

crtc->base.base.id, crtc->base.name,

drivers/gpu/drm/i915/display/intel_crtc_state_dump.c

332

crtc->num_scalers,

drivers/gpu/drm/i915/display/intel_crtc_state_dump.c

393

if (plane->pipe == crtc->pipe)

drivers/gpu/drm/i915/display/intel_cursor.c

382

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_cursor.c

395

cntl |= MCURSOR_PIPE_SEL(crtc->pipe);

drivers/gpu/drm/i915/display/intel_cursor.c

758

static void g4x_cursor_capture_error(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_cursor.c

764

error->ctl = intel_de_read(display, CURCNTR(display, crtc->pipe));

drivers/gpu/drm/i915/display/intel_cursor.c

765

error->surf = intel_de_read(display, CURBASE(display, crtc->pipe));

drivers/gpu/drm/i915/display/intel_cursor.c

766

error->surflive = intel_de_read(display, CURSURFLIVE(display, crtc->pipe));

drivers/gpu/drm/i915/display/intel_cursor.c

769

static void i9xx_cursor_capture_error(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_cursor.c

775

error->ctl = intel_de_read(display, CURCNTR(display, crtc->pipe));

drivers/gpu/drm/i915/display/intel_cursor.c

776

error->surf = intel_de_read(display, CURBASE(display, crtc->pipe));

drivers/gpu/drm/i915/display/intel_cursor.c

810

struct intel_crtc *crtc = to_intel_crtc(_crtc);

drivers/gpu/drm/i915/display/intel_cursor.c

816

to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/intel_cursor.c

850

if (old_plane_state->uapi.crtc != &crtc->base ||

drivers/gpu/drm/i915/display/intel_cursor.c

862

new_crtc_state = to_intel_crtc_state(intel_crtc_duplicate_state(&crtc->base));

drivers/gpu/drm/i915/display/intel_cursor.c

879

intel_plane_copy_uapi_to_hw_state(new_plane_state, new_plane_state, crtc);

drivers/gpu/drm/i915/display/intel_cursor.c

915

if (!drm_WARN_ON(display->drm, drm_crtc_vblank_get(&crtc->base))) {

drivers/gpu/drm/i915/display/intel_cursor.c

926

drm_crtc_vblank_put(&crtc->base);

drivers/gpu/drm/i915/display/intel_cursor.c

943

drm_vblank_work_init(&old_plane_state->unpin_work, &crtc->base,

drivers/gpu/drm/i915/display/intel_cursor.c

947

drm_crtc_accurate_vblank_count(&crtc->base) + 1,

drivers/gpu/drm/i915/display/intel_cursor.c

957

intel_crtc_destroy_state(&crtc->base, &new_crtc_state->uapi);

drivers/gpu/drm/i915/display/intel_cursor.c

965

return drm_atomic_helper_update_plane(&plane->base, &crtc->base, fb,

drivers/gpu/drm/i915/display/intel_dbuf_bw.c

103

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_dbuf_bw.c

121

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_dbuf_bw.c

129

for_each_plane_id_on_crtc(crtc, plane_id) {

drivers/gpu/drm/i915/display/intel_dbuf_bw.c

137

skl_plane_calc_dbuf_bw(dbuf_bw, crtc, plane_id,

drivers/gpu/drm/i915/display/intel_dbuf_bw.c

142

skl_plane_calc_dbuf_bw(dbuf_bw, crtc, plane_id,

drivers/gpu/drm/i915/display/intel_dbuf_bw.c

186

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_dbuf_bw.c

192

for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,

drivers/gpu/drm/i915/display/intel_dbuf_bw.c

208

new_dbuf_bw_state->dbuf_bw[crtc->pipe] = new_dbuf_bw;

drivers/gpu/drm/i915/display/intel_dbuf_bw.c

234

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_dbuf_bw.c

239

for_each_intel_crtc(display->drm, crtc) {

drivers/gpu/drm/i915/display/intel_dbuf_bw.c

241

to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/intel_dbuf_bw.c

243

skl_crtc_calc_dbuf_bw(&dbuf_bw_state->dbuf_bw[crtc->pipe], crtc_state);

drivers/gpu/drm/i915/display/intel_dbuf_bw.c

247

void intel_dbuf_bw_crtc_disable_noatomic(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_dbuf_bw.c

249

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_dbuf_bw.c

252

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_dbuf_bw.c

98

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_dbuf_bw.h

35

void intel_dbuf_bw_crtc_disable_noatomic(struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_ddi.c

2113

if (!encoder->base.crtc && intel_encoder_is_dp(encoder)) {

drivers/gpu/drm/i915/display/intel_ddi.c

2127

ddi_clk_needed = encoder->base.crtc;

drivers/gpu/drm/i915/display/intel_ddi.c

2500

struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);

drivers/gpu/drm/i915/display/intel_ddi.c

2501

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_ddi.c

2537

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_ddi.c

2538

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_ddi.c

3033

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_ddi.c

3034

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_ddi.c

3343

struct intel_crtc *slave_crtc = to_intel_crtc(conn_state->crtc);

drivers/gpu/drm/i915/display/intel_ddi.c

3665

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_ddi.c

3669

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_ddi.c

3697

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_ddi.c

3700

intel_ddi_update_active_dpll(state, encoder, crtc);

drivers/gpu/drm/i915/display/intel_ddi.c

4040

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_ddi.c

4056

intel_cpu_transcoder_get_m1_n1(crtc, cpu_transcoder, &crtc_state->dp_m_n);

drivers/gpu/drm/i915/display/intel_ddi.c

4057

intel_cpu_transcoder_get_m2_n2(crtc, cpu_transcoder, &crtc_state->dp_m2_n2);

drivers/gpu/drm/i915/display/intel_ddi.c

4081

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_ddi.c

4092

intel_cpu_transcoder_get_m1_n1(crtc, cpu_transcoder, &crtc_state->dp_m_n);

drivers/gpu/drm/i915/display/intel_ddi.c

4502

struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);

drivers/gpu/drm/i915/display/intel_ddi.c

4521

if (display->platform.haswell && crtc->pipe == PIPE_A &&

drivers/gpu/drm/i915/display/intel_ddi.c

4597

struct intel_crtc *crtc = to_intel_crtc(conn_state->crtc);

drivers/gpu/drm/i915/display/intel_ddi.c

4600

if (!crtc)

drivers/gpu/drm/i915/display/intel_ddi.c

4608

crtc);

drivers/gpu/drm/i915/display/intel_ddi.c

4635

crtc_state->uapi.crtc->base.id, crtc_state->uapi.crtc->name);

drivers/gpu/drm/i915/display/intel_ddi.c

4753

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_ddi.c

4767

crtc = to_intel_crtc(conn_state->crtc);

drivers/gpu/drm/i915/display/intel_ddi.c

4768

if (!crtc)

drivers/gpu/drm/i915/display/intel_ddi.c

4771

ret = drm_modeset_lock(&crtc->base.mutex, ctx);

drivers/gpu/drm/i915/display/intel_ddi.c

4775

crtc_state = to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/intel_ddi.c

4813

return intel_modeset_commit_pipes(display, BIT(crtc->pipe), ctx);

drivers/gpu/drm/i915/display/intel_ddi.c

516

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_ddi.c

517

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_ddi.c

683

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_ddi.c

695

drm_WARN_ON(crtc->base.dev, ctl & TRANS_DDI_HDCP_SIGNALLING);

drivers/gpu/drm/i915/display/intel_ddi.h

86

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_display.c

1015

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display.c

1019

intel_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

1021

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

1022

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

1029

intel_fbc_post_update(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

1051

intel_encoders_audio_enable(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

1058

intel_alpm_post_plane_update(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

1060

intel_psr_post_plane_update(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

1064

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display.c

1067

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

1070

hsw_ips_post_update(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

1080

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display.c

1083

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

1090

if (plane->pipe == crtc->pipe &&

drivers/gpu/drm/i915/display/intel_display.c

1097

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display.c

1100

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

1107

if (plane->pipe == crtc->pipe &&

drivers/gpu/drm/i915/display/intel_display.c

1114

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display.c

1117

intel_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

1119

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

1129

plane->pipe == crtc->pipe &&

drivers/gpu/drm/i915/display/intel_display.c

1142

intel_crtc_wait_for_next_vblank(crtc);

drivers/gpu/drm/i915/display/intel_display.c

1146

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display.c

1150

intel_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

1152

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

1153

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

1155

intel_alpm_pre_plane_update(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

1156

intel_psr_pre_plane_update(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

1158

if (intel_crtc_vrr_disabling(state, crtc)) {

drivers/gpu/drm/i915/display/intel_display.c

1160

intel_vrr_dcb_reset(old_crtc_state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

1165

intel_encoders_audio_disable(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

1172

if (hsw_ips_pre_update(state, crtc))

drivers/gpu/drm/i915/display/intel_display.c

1173

intel_crtc_wait_for_next_vblank(crtc);

drivers/gpu/drm/i915/display/intel_display.c

1175

if (intel_fbc_pre_update(state, crtc))

drivers/gpu/drm/i915/display/intel_display.c

1176

intel_crtc_wait_for_next_vblank(crtc);

drivers/gpu/drm/i915/display/intel_display.c

1208

intel_crtc_wait_for_next_vblank(crtc);

drivers/gpu/drm/i915/display/intel_display.c

1219

intel_crtc_wait_for_next_vblank(crtc);

drivers/gpu/drm/i915/display/intel_display.c

1240

if (!intel_initial_watermarks(state, crtc))

drivers/gpu/drm/i915/display/intel_display.c

1261

intel_crtc_async_flip_disable_wa(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

1265

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display.c

1269

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

1276

intel_crtc_dpms_overlay_disable(crtc);

drivers/gpu/drm/i915/display/intel_display.c

1279

if (crtc->pipe != plane->pipe ||

drivers/gpu/drm/i915/display/intel_display.c

1296

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_display.c

1304

for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {

drivers/gpu/drm/i915/display/intel_display.c

1315

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display.c

1318

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

1327

if (conn_state->crtc != &crtc->base)

drivers/gpu/drm/i915/display/intel_display.c

1337

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display.c

1340

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

1349

if (conn_state->crtc != &crtc->base)

drivers/gpu/drm/i915/display/intel_display.c

1359

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display.c

1362

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

1371

if (conn_state->crtc != &crtc->base)

drivers/gpu/drm/i915/display/intel_display.c

1382

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display.c

1385

intel_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

1394

if (old_conn_state->crtc != &crtc->base)

drivers/gpu/drm/i915/display/intel_display.c

1405

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display.c

1408

intel_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

1417

if (old_conn_state->crtc != &crtc->base)

drivers/gpu/drm/i915/display/intel_display.c

1427

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display.c

1430

intel_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

1439

if (old_conn_state->crtc != &crtc->base)

drivers/gpu/drm/i915/display/intel_display.c

1449

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display.c

1452

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

1461

if (conn_state->crtc != &crtc->base)

drivers/gpu/drm/i915/display/intel_display.c

1472

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_display.c

1476

intel_cpu_transcoder_set_m1_n1(crtc, cpu_transcoder,

drivers/gpu/drm/i915/display/intel_display.c

1479

intel_cpu_transcoder_set_m1_n1(crtc, cpu_transcoder,

drivers/gpu/drm/i915/display/intel_display.c

1481

intel_cpu_transcoder_set_m2_n2(crtc, cpu_transcoder,

drivers/gpu/drm/i915/display/intel_display.c

1491

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display.c

1493

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_display.c

1495

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

1496

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

1498

if (drm_WARN_ON(display->drm, crtc->active))

drivers/gpu/drm/i915/display/intel_display.c

1518

crtc->active = true;

drivers/gpu/drm/i915/display/intel_display.c

1520

intel_encoders_pre_enable(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

1523

ilk_pch_pre_enable(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

1537

intel_initial_watermarks(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

1541

ilk_pch_enable(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

1545

intel_encoders_enable(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

1548

intel_wait_for_pipe_scanline_moving(crtc);

drivers/gpu/drm/i915/display/intel_display.c

1557

intel_crtc_wait_for_next_vblank(crtc);

drivers/gpu/drm/i915/display/intel_display.c

1558

intel_crtc_wait_for_next_vblank(crtc);

drivers/gpu/drm/i915/display/intel_display.c

1572

static void glk_pipe_scaler_clock_gating_wa(struct intel_crtc *crtc, bool enable)

drivers/gpu/drm/i915/display/intel_display.c

1574

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_display.c

1577

intel_de_rmw(display, CLKGATE_DIS_PSL(crtc->pipe),

drivers/gpu/drm/i915/display/intel_display.c

1584

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_display.c

1586

intel_de_write(display, WM_LINETIME(crtc->pipe),

drivers/gpu/drm/i915/display/intel_display.c

1603

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_display.c

1607

intel_cpu_transcoder_set_m1_n1(crtc, cpu_transcoder,

drivers/gpu/drm/i915/display/intel_display.c

1610

intel_cpu_transcoder_set_m1_n1(crtc, cpu_transcoder,

drivers/gpu/drm/i915/display/intel_display.c

1612

intel_cpu_transcoder_set_m2_n2(crtc, cpu_transcoder,

drivers/gpu/drm/i915/display/intel_display.c

1628

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display.c

1632

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

1637

if (drm_WARN_ON(display->drm, crtc->active))

drivers/gpu/drm/i915/display/intel_display.c

1646

intel_encoders_pre_pll_enable(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

1651

intel_encoders_pre_enable(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

1699

intel_encoders_enable(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

1727

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display.c

1729

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_display.c

1731

intel_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

1732

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

1742

intel_encoders_disable(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

1751

ilk_pch_disable(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

1753

intel_encoders_post_disable(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

1756

ilk_pch_post_disable(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

1763

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display.c

1767

intel_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

1775

intel_encoders_disable(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

1776

intel_encoders_post_disable(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

1780

intel_encoders_post_pll_disable(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

1951

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_display.c

1954

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

1981

set_bit(intel_dsc_power_domain(crtc, cpu_transcoder), mask->bits);

drivers/gpu/drm/i915/display/intel_display.c

1988

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_display.c

1996

crtc->enabled_power_domains.mask.bits,

drivers/gpu/drm/i915/display/intel_display.c

1999

crtc->enabled_power_domains.mask.bits,

drivers/gpu/drm/i915/display/intel_display.c

2005

&crtc->enabled_power_domains,

drivers/gpu/drm/i915/display/intel_display.c

2009

void intel_modeset_put_crtc_power_domains(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_display.c

2012

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_display.c

2015

&crtc->enabled_power_domains,

drivers/gpu/drm/i915/display/intel_display.c

2021

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_display.c

2025

intel_cpu_transcoder_set_m1_n1(crtc, cpu_transcoder,

drivers/gpu/drm/i915/display/intel_display.c

2027

intel_cpu_transcoder_set_m2_n2(crtc, cpu_transcoder,

drivers/gpu/drm/i915/display/intel_display.c

2037

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display.c

2039

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_display.c

2041

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

2042

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

2044

if (drm_WARN_ON(display->drm, crtc->active))

drivers/gpu/drm/i915/display/intel_display.c

2059

crtc->active = true;

drivers/gpu/drm/i915/display/intel_display.c

2063

intel_encoders_pre_pll_enable(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

2070

intel_encoders_pre_enable(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

2076

intel_initial_watermarks(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

2081

intel_encoders_enable(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

2085

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display.c

2087

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_display.c

2089

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

2090

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

2092

if (drm_WARN_ON(display->drm, crtc->active))

drivers/gpu/drm/i915/display/intel_display.c

2099

crtc->active = true;

drivers/gpu/drm/i915/display/intel_display.c

2104

intel_encoders_pre_enable(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

2112

if (!intel_initial_watermarks(state, crtc))

drivers/gpu/drm/i915/display/intel_display.c

2118

intel_encoders_enable(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

2122

intel_crtc_wait_for_next_vblank(crtc);

drivers/gpu/drm/i915/display/intel_display.c

2126

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display.c

2130

intel_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

2131

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

2138

intel_crtc_wait_for_next_vblank(crtc);

drivers/gpu/drm/i915/display/intel_display.c

2140

intel_encoders_disable(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

2148

intel_encoders_post_disable(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

2159

intel_encoders_post_pll_disable(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

2180

static bool intel_crtc_supports_double_wide(const struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display.c

2182

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_display.c

2186

(crtc->pipe == PIPE_A || display->platform.i915g);

drivers/gpu/drm/i915/display/intel_display.c

230

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_display.c

2347

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_display.c

235

return BIT(crtc->pipe) & bigjoiner_primary_pipes(crtc_state);

drivers/gpu/drm/i915/display/intel_display.c

2361

crtc->base.base.id, crtc->base.name);

drivers/gpu/drm/i915/display/intel_display.c

2369

crtc->base.base.id, crtc->base.name);

drivers/gpu/drm/i915/display/intel_display.c

2380

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_display.c

240

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_display.c

2405

if (intel_crtc_supports_double_wide(crtc) &&

drivers/gpu/drm/i915/display/intel_display.c

2415

crtc->base.base.id, crtc->base.name,

drivers/gpu/drm/i915/display/intel_display.c

2439

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display.c

2443

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

245

return BIT(crtc->pipe) & bigjoiner_secondary_pipes(crtc_state);

drivers/gpu/drm/i915/display/intel_display.c

2454

crtc->base.base.id, crtc->base.name,

drivers/gpu/drm/i915/display/intel_display.c

2467

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display.c

2470

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

2473

ret = intel_dpll_crtc_compute_clock(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

2477

ret = intel_crtc_compute_set_context_latency(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

2492

return ilk_fdi_compute_config(crtc, crtc_state);

drivers/gpu/drm/i915/display/intel_display.c

250

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_display.c

253

return BIT(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display.c

2603

void intel_cpu_transcoder_set_m1_n1(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_display.c

2607

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_display.c

2608

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

2622

void intel_cpu_transcoder_set_m2_n2(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_display.c

2626

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_display.c

2650

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_display.c

2651

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

278

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_display.c

281

BIT(crtc->pipe) & ultrajoiner_primary_pipes(crtc_state);

drivers/gpu/drm/i915/display/intel_display.c

2823

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_display.c

2826

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

2852

static void intel_get_transcoder_timings(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_display.c

2855

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_display.c

2922

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_display.c

2924

enum pipe primary_pipe, pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

2937

static void intel_get_pipe_src_size(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_display.c

2940

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_display.c

2943

tmp = intel_de_read(display, PIPESRC(display, crtc->pipe));

drivers/gpu/drm/i915/display/intel_display.c

299

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_display.c

302

BIT(crtc->pipe) & ultrajoiner_enable_pipes(crtc_state);

drivers/gpu/drm/i915/display/intel_display.c

3020

bdw_get_pipe_misc_output_format(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display.c

3022

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_display.c

3025

tmp = intel_de_read(display, PIPE_MISC(crtc->pipe));

drivers/gpu/drm/i915/display/intel_display.c

3045

static bool i9xx_get_pipe_config(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_display.c

3048

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_display.c

3050

enum transcoder cpu_transcoder = (enum transcoder)crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

3055

power_domain = POWER_DOMAIN_PIPE(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display.c

3104

intel_get_transcoder_timings(crtc, pipe_config);

drivers/gpu/drm/i915/display/intel_display.c

3105

intel_get_pipe_src_size(crtc, pipe_config);

drivers/gpu/drm/i915/display/intel_display.c

3109

i9xx_dpll_get_hw_state(crtc, &pipe_config->dpll_hw_state);

drivers/gpu/drm/i915/display/intel_display.c

315

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_display.c

318

crtc->pipe != joiner_primary_pipe(crtc_state);

drivers/gpu/drm/i915/display/intel_display.c

323

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_display.c

3250

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_display.c

326

crtc->pipe == joiner_primary_pipe(crtc_state);

drivers/gpu/drm/i915/display/intel_display.c

3294

intel_de_write_dsb(display, dsb, PIPE_MISC(crtc->pipe), val);

drivers/gpu/drm/i915/display/intel_display.c

3297

int bdw_get_pipe_misc_bpp(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display.c

3299

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_display.c

3302

tmp = intel_de_read(display, PIPE_MISC(crtc->pipe));

drivers/gpu/drm/i915/display/intel_display.c

3354

void intel_cpu_transcoder_get_m1_n1(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_display.c

3358

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_display.c

3359

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

336

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_display.c

3373

void intel_cpu_transcoder_get_m2_n2(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_display.c

3377

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_display.c

338

return BIT(crtc->pipe) | crtc_state->joiner_pipes;

drivers/gpu/drm/i915/display/intel_display.c

3389

static bool ilk_get_pipe_config(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_display.c

3392

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_display.c

3394

enum transcoder cpu_transcoder = (enum transcoder)crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

3399

power_domain = POWER_DOMAIN_PIPE(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display.c

3454

intel_get_transcoder_timings(crtc, pipe_config);

drivers/gpu/drm/i915/display/intel_display.c

3455

intel_get_pipe_src_size(crtc, pipe_config);

drivers/gpu/drm/i915/display/intel_display.c

348

return to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_display.c

3499

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_display.c

3507

for_each_intel_crtc_in_pipe_mask(display->drm, crtc,

drivers/gpu/drm/i915/display/intel_display.c

3510

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

3527

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_display.c

3535

for_each_intel_crtc_in_pipe_mask(display->drm, crtc,

drivers/gpu/drm/i915/display/intel_display.c

3538

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

3540

power_domain = intel_dsc_power_domain(crtc, (enum transcoder)pipe);

drivers/gpu/drm/i915/display/intel_display.c

355

struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_display.c

3596

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_display.c

3604

for_each_intel_crtc_in_pipe_mask(display->drm, crtc,

drivers/gpu/drm/i915/display/intel_display.c

3607

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

3609

power_domain = intel_dsc_power_domain(crtc, (enum transcoder)pipe);

drivers/gpu/drm/i915/display/intel_display.c

365

intel_wait_for_pipe_scanline_stopped(crtc);

drivers/gpu/drm/i915/display/intel_display.c

3753

static u8 hsw_enabled_transcoders(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display.c

3755

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_display.c

3800

if (trans_pipe == crtc->pipe)

drivers/gpu/drm/i915/display/intel_display.c

3805

cpu_transcoder = (enum transcoder) crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

3810

enabled_joiner_pipes(display, crtc->pipe, &primary_pipe, &secondary_pipes);

drivers/gpu/drm/i915/display/intel_display.c

3811

if (secondary_pipes & BIT(crtc->pipe)) {

drivers/gpu/drm/i915/display/intel_display.c

3853

static bool hsw_get_transcoder_state(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_display.c

3857

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_display.c

3861

enabled_transcoders = hsw_enabled_transcoders(crtc);

drivers/gpu/drm/i915/display/intel_display.c

3892

static bool bxt_get_dsi_transcoder_state(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_display.c

3896

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_display.c

3927

if ((tmp & BXT_PIPE_SELECT_MASK) != BXT_PIPE_SELECT(crtc->pipe))

drivers/gpu/drm/i915/display/intel_display.c

3940

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_display.c

3942

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

3952

static bool hsw_get_pipe_config(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_display.c

3955

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_display.c

3959

if (!intel_display_power_get_in_set_if_enabled(display, &crtc->hw_readout_power_domains,

drivers/gpu/drm/i915/display/intel_display.c

3960

POWER_DOMAIN_PIPE(crtc->pipe)))

drivers/gpu/drm/i915/display/intel_display.c

3963

active = hsw_get_transcoder_state(crtc, pipe_config, &crtc->hw_readout_power_domains);

drivers/gpu/drm/i915/display/intel_display.c

3966

bxt_get_dsi_transcoder_state(crtc, pipe_config, &crtc->hw_readout_power_domains)) {

drivers/gpu/drm/i915/display/intel_display.c

3993

intel_get_transcoder_timings(crtc, pipe_config);

drivers/gpu/drm/i915/display/intel_display.c

3998

intel_get_pipe_src_size(crtc, pipe_config);

drivers/gpu/drm/i915/display/intel_display.c

4010

bdw_get_pipe_misc_output_format(crtc);

drivers/gpu/drm/i915/display/intel_display.c

4017

tmp = intel_de_read(display, WM_LINETIME(crtc->pipe));

drivers/gpu/drm/i915/display/intel_display.c

4023

if (intel_display_power_get_in_set_if_enabled(display, &crtc->hw_readout_power_domains,

drivers/gpu/drm/i915/display/intel_display.c

4024

POWER_DOMAIN_PIPE_PANEL_FITTER(crtc->pipe))) {

drivers/gpu/drm/i915/display/intel_display.c

4043

intel_display_power_put_all_in_set(display, &crtc->hw_readout_power_domains);

drivers/gpu/drm/i915/display/intel_display.c

4051

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_display.c

4053

if (!display->funcs.display->get_pipe_config(crtc, crtc_state))

drivers/gpu/drm/i915/display/intel_display.c

4116

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_display.c

4122

crtc = intel_crtc_for_pipe(display, pipe);

drivers/gpu/drm/i915/display/intel_display.c

4128

crtc_state = intel_crtc_state_alloc(crtc);

drivers/gpu/drm/i915/display/intel_display.c

4135

intel_crtc_destroy_state(&crtc->base, &crtc_state->uapi);

drivers/gpu/drm/i915/display/intel_display.c

4144

intel_crtc_destroy_state(&crtc->base, &crtc_state->uapi);

drivers/gpu/drm/i915/display/intel_display.c

415

static void assert_planes_disabled(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display.c

4158

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_display.c

4167

if (connector_state->crtc != &crtc->base)

drivers/gpu/drm/i915/display/intel_display.c

417

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_display.c

420

for_each_intel_plane_on_crtc(display->drm, crtc, plane)

drivers/gpu/drm/i915/display/intel_display.c

4232

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display.c

4236

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

4244

if (!hsw_crtc_supports_ips(crtc))

drivers/gpu/drm/i915/display/intel_display.c

4258

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display.c

4260

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_display.c

4262

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

427

struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_display.c

4271

ret = intel_dpll_crtc_get_dpll(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

4276

ret = intel_color_check(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

4280

ret = intel_wm_compute(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

4284

crtc->base.base.id, crtc->base.name);

drivers/gpu/drm/i915/display/intel_display.c

429

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

4301

ret = intel_atomic_setup_scalers(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

4307

ret = hsw_ips_compute_config(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

4314

ret = hsw_compute_linetime_wm(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

4320

ret = intel_psr2_sel_fetch_update(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

434

assert_planes_disabled(crtc);

drivers/gpu/drm/i915/display/intel_display.c

4387

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display.c

4389

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_display.c

4391

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

4402

if (connector_state->crtc != &crtc->base)

drivers/gpu/drm/i915/display/intel_display.c

4449

drm_WARN_ON(display->drm, !connector_state->crtc);

drivers/gpu/drm/i915/display/intel_display.c

4484

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display.c

4487

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

450

intel_crtc_pch_transcoder(crtc));

drivers/gpu/drm/i915/display/intel_display.c

4501

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display.c

4504

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

4516

intel_crtc_copy_uapi_to_hw_state_nomodeset(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

4599

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display.c

4603

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

4607

saved_state = intel_crtc_state_alloc(crtc);

drivers/gpu/drm/i915/display/intel_display.c

4641

intel_crtc_copy_uapi_to_hw_state_modeset(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

4648

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_display.c

4651

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_display.c

4653

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

4659

crtc_state->cpu_transcoder = (enum transcoder) crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

4676

ret = compute_baseline_pipe_bpp(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

4680

crtc_state->dsc.compression_enabled_on_link = limits->link_dsc_pipes & BIT(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display.c

4681

crtc_state->max_link_bpp_x16 = limits->max_bpp_x16[crtc->pipe];

drivers/gpu/drm/i915/display/intel_display.c

4686

crtc->base.base.id, crtc->base.name,

drivers/gpu/drm/i915/display/intel_display.c

4710

if (connector_state->crtc != &crtc->base)

drivers/gpu/drm/i915/display/intel_display.c

4713

if (!check_single_encoder_cloning(state, crtc, encoder)) {

drivers/gpu/drm/i915/display/intel_display.c

4748

if (connector_state->crtc != &crtc->base)

drivers/gpu/drm/i915/display/intel_display.c

4768

ret = intel_crtc_compute_config(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

4773

crtc->base.base.id, crtc->base.name, ret);

drivers/gpu/drm/i915/display/intel_display.c

4785

crtc->base.base.id, crtc->base.name,

drivers/gpu/drm/i915/display/intel_display.c

4793

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display.c

4796

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

4807

if (conn_state->crtc != &crtc->base ||

drivers/gpu/drm/i915/display/intel_display.c

4886

const struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_display.c

4898

crtc->base.base.id, crtc->base.name, name, &vaf);

drivers/gpu/drm/i915/display/intel_display.c

4901

crtc->base.base.id, crtc->base.name, name, &vaf);

drivers/gpu/drm/i915/display/intel_display.c

4908

const struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_display.c

4913

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_display.c

4925

pipe_config_mismatch(p, fastset, crtc, name, "infoframe");

drivers/gpu/drm/i915/display/intel_display.c

4935

const struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_display.c

4940

pipe_config_mismatch(p, fastset, crtc, name, "dp vsc sdp");

drivers/gpu/drm/i915/display/intel_display.c

4950

const struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_display.c

4955

pipe_config_mismatch(p, fastset, crtc, name, "dp as sdp");

drivers/gpu/drm/i915/display/intel_display.c

4979

const struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_display.c

4983

pipe_config_mismatch(p, fastset, crtc, name, "buffer");

drivers/gpu/drm/i915/display/intel_display.c

4994

const struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_display.c

4999

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_display.c

500

intel_wait_for_pipe_scanline_moving(crtc);

drivers/gpu/drm/i915/display/intel_display.c

5001

pipe_config_mismatch(p, fastset, crtc, name, " "); /* stupid -Werror=format-zero-length */

drivers/gpu/drm/i915/display/intel_display.c

5030

const struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_display.c

5035

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_display.c

5038

pipe_config_mismatch(p, fastset, crtc, name, chipname);

drivers/gpu/drm/i915/display/intel_display.c

5052

struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);

drivers/gpu/drm/i915/display/intel_display.c

506

struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_display.c

5066

pipe_config_mismatch(&p, fastset, crtc, __stringify(name), \

drivers/gpu/drm/i915/display/intel_display.c

5078

pipe_config_mismatch(&p, fastset, crtc, __stringify(name), \

drivers/gpu/drm/i915/display/intel_display.c

508

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

5090

pipe_config_mismatch(&p, fastset, crtc, __stringify(name), \

drivers/gpu/drm/i915/display/intel_display.c

5100

pipe_config_mismatch(&p, fastset, crtc, __stringify(name), \

drivers/gpu/drm/i915/display/intel_display.c

5112

pipe_config_mismatch(&p, fastset, crtc, __stringify(name), \

drivers/gpu/drm/i915/display/intel_display.c

5122

pipe_config_mismatch(&p, fastset, crtc, __stringify(name), \

drivers/gpu/drm/i915/display/intel_display.c

5133

pipe_config_mismatch(&p, fastset, crtc, __stringify(name), \

drivers/gpu/drm/i915/display/intel_display.c

5153

pipe_config_pll_mismatch(&p, fastset, crtc, __stringify(name), \

drivers/gpu/drm/i915/display/intel_display.c

5163

pipe_config_lt_phy_pll_mismatch(&p, fastset, crtc, __stringify(name), \

drivers/gpu/drm/i915/display/intel_display.c

517

assert_planes_disabled(crtc);

drivers/gpu/drm/i915/display/intel_display.c

5197

pipe_config_mismatch(&p, fastset, crtc, __stringify(name), \

drivers/gpu/drm/i915/display/intel_display.c

5209

pipe_config_infoframe_mismatch(&p, fastset, crtc, __stringify(name), \

drivers/gpu/drm/i915/display/intel_display.c

5219

pipe_config_dp_vsc_sdp_mismatch(&p, fastset, crtc, __stringify(name), \

drivers/gpu/drm/i915/display/intel_display.c

5229

pipe_config_dp_as_sdp_mismatch(&p, fastset, crtc, __stringify(name), \

drivers/gpu/drm/i915/display/intel_display.c

5240

pipe_config_buffer_mismatch(&p, fastset, crtc, __stringify(name), \

drivers/gpu/drm/i915/display/intel_display.c

5253

pipe_config_mismatch(&p, fastset, crtc, __stringify(lut), \

drivers/gpu/drm/i915/display/intel_display.c

553

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_display.c

5532

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_display.c

5536

crtc->base.base.id, crtc->base.name, reason);

drivers/gpu/drm/i915/display/intel_display.c

5539

&crtc->base);

drivers/gpu/drm/i915/display/intel_display.c

5543

ret = intel_dp_tunnel_atomic_add_state_for_crtc(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

5547

ret = intel_dp_mst_add_topology_state_for_crtc(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

5551

ret = intel_plane_add_affected(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

5576

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_display.c

5578

for_each_intel_crtc_in_pipe_mask(display->drm, crtc, mask) {

drivers/gpu/drm/i915/display/intel_display.c

5582

crtc_state = intel_atomic_get_crtc_state(&state->base, crtc);

drivers/gpu/drm/i915/display/intel_display.c

561

crtc = intel_first_crtc(display);

drivers/gpu/drm/i915/display/intel_display.c

562

if (!crtc)

drivers/gpu/drm/i915/display/intel_display.c

5623

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_display.c

5625

for_each_intel_crtc(display->drm, crtc) {

drivers/gpu/drm/i915/display/intel_display.c

5629

crtc_state = intel_atomic_get_crtc_state(&state->base, crtc);

drivers/gpu/drm/i915/display/intel_display.c

565

plane = to_intel_plane(crtc->base.primary);

drivers/gpu/drm/i915/display/intel_display.c

5656

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_display.c

5666

for_each_intel_crtc_in_pipe_mask(display->drm, crtc, pipe_mask) {

drivers/gpu/drm/i915/display/intel_display.c

5668

intel_atomic_get_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

5694

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_display.c

5701

for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {

drivers/gpu/drm/i915/display/intel_display.c

5711

first_pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

5720

for_each_intel_crtc(state->base.dev, crtc) {

drivers/gpu/drm/i915/display/intel_display.c

5721

crtc_state = intel_atomic_get_crtc_state(&state->base, crtc);

drivers/gpu/drm/i915/display/intel_display.c

5735

enabled_pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

5750

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_display.c

5753

for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {

drivers/gpu/drm/i915/display/intel_display.c

5755

enabled_pipes |= BIT(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display.c

5757

enabled_pipes &= ~BIT(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display.c

5767

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_display.c

5770

for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {

drivers/gpu/drm/i915/display/intel_display.c

5772

active_pipes |= BIT(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display.c

5774

active_pipes &= ~BIT(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display.c

5808

struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_display.c

5816

crtc->base.base.id, crtc->base.name);

drivers/gpu/drm/i915/display/intel_display.c

5840

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_display.c

5843

for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {

drivers/gpu/drm/i915/display/intel_display.c

5846

ret = intel_crtc_atomic_check(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

5850

crtc->base.base.id, crtc->base.name);

drivers/gpu/drm/i915/display/intel_display.c

5862

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_display.c

5865

for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {

drivers/gpu/drm/i915/display/intel_display.c

5879

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_display.c

5882

for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {

drivers/gpu/drm/i915/display/intel_display.c

5884

pipes & BIT(crtc->pipe) &&

drivers/gpu/drm/i915/display/intel_display.c

6003

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display.c

6007

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

6019

crtc->base.base.id, crtc->base.name);

drivers/gpu/drm/i915/display/intel_display.c

6026

crtc->base.base.id, crtc->base.name);

drivers/gpu/drm/i915/display/intel_display.c

6037

crtc->base.base.id, crtc->base.name);

drivers/gpu/drm/i915/display/intel_display.c

6043

if (plane->pipe != crtc->pipe)

drivers/gpu/drm/i915/display/intel_display.c

6071

static int intel_async_flip_check_hw(struct intel_atomic_state *state, struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display.c

6079

old_crtc_state = intel_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

6080

new_crtc_state = intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

6088

crtc->base.base.id, crtc->base.name);

drivers/gpu/drm/i915/display/intel_display.c

6095

crtc->base.base.id, crtc->base.name);

drivers/gpu/drm/i915/display/intel_display.c

6102

crtc->base.base.id, crtc->base.name);

drivers/gpu/drm/i915/display/intel_display.c

6108

if (plane->pipe != crtc->pipe)

drivers/gpu/drm/i915/display/intel_display.c

618

void intel_plane_disable_noatomic(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_display.c

621

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_display.c

623

to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/intel_display.c

6243

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_display.c

6254

crtc = to_intel_crtc(plane_state->hw.crtc);

drivers/gpu/drm/i915/display/intel_display.c

6255

if (!crtc)

drivers/gpu/drm/i915/display/intel_display.c

6258

crtc_state = intel_atomic_get_crtc_state(&state->base, crtc);

drivers/gpu/drm/i915/display/intel_display.c

6264

for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {

drivers/gpu/drm/i915/display/intel_display.c

6270

for_each_intel_crtc_in_pipe_mask(display->drm, crtc, affected_pipes) {

drivers/gpu/drm/i915/display/intel_display.c

6271

crtc_state = intel_atomic_get_crtc_state(&state->base, crtc);

drivers/gpu/drm/i915/display/intel_display.c

6276

for_each_intel_crtc_in_pipe_mask(display->drm, crtc, modeset_pipes) {

drivers/gpu/drm/i915/display/intel_display.c

6279

crtc_state = intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

6283

ret = drm_atomic_add_affected_connectors(&state->base, &crtc->base);

drivers/gpu/drm/i915/display/intel_display.c

6287

ret = intel_plane_add_affected(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

6292

for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {

drivers/gpu/drm/i915/display/intel_display.c

6296

kill_joiner_secondaries(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

630

crtc->base.base.id, crtc->base.name);

drivers/gpu/drm/i915/display/intel_display.c

6308

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_display.c

6322

for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {

drivers/gpu/drm/i915/display/intel_display.c

6325

copy_joiner_crtc_state_nomodeset(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

6327

intel_crtc_copy_uapi_to_hw_state_nomodeset(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

6334

ret = intel_crtc_prepare_cleared_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

6341

ret = intel_modeset_pipe_config(state, crtc, limits);

drivers/gpu/drm/i915/display/intel_display.c

6346

for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {

drivers/gpu/drm/i915/display/intel_display.c

6356

ret = intel_modeset_pipe_config_late(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

636

skl_wm_plane_disable_noatomic(crtc, plane);

drivers/gpu/drm/i915/display/intel_display.c

6363

*failed_pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

641

intel_initial_plane_vblank_wait(crtc);

drivers/gpu/drm/i915/display/intel_display.c

6417

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_display.c

6423

for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,

drivers/gpu/drm/i915/display/intel_display.c

6446

for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {

drivers/gpu/drm/i915/display/intel_display.c

6447

ret = intel_async_flip_check_uapi(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

6456

for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {

drivers/gpu/drm/i915/display/intel_display.c

6465

ret = intel_atomic_check_joiner(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

6470

for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,

drivers/gpu/drm/i915/display/intel_display.c

6491

for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {

drivers/gpu/drm/i915/display/intel_display.c

6495

if (intel_dp_mst_crtc_needs_modeset(state, crtc))

drivers/gpu/drm/i915/display/intel_display.c

6521

for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,

drivers/gpu/drm/i915/display/intel_display.c

6526

intel_dpll_release(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

6539

for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i)

drivers/gpu/drm/i915/display/intel_display.c

655

intel_initial_plane_vblank_wait(crtc);

drivers/gpu/drm/i915/display/intel_display.c

6572

for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,

drivers/gpu/drm/i915/display/intel_display.c

6576

ret = intel_async_flip_check_hw(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

6604

for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,

drivers/gpu/drm/i915/display/intel_display.c

662

intel_set_cpu_fifo_underrun_reporting(display, crtc->pipe, false);

drivers/gpu/drm/i915/display/intel_display.c

6622

void intel_crtc_arm_fifo_underrun(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_display.c

6625

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_display.c

6628

intel_set_cpu_fifo_underrun_reporting(display, crtc->pipe, true);

drivers/gpu/drm/i915/display/intel_display.c

6632

intel_crtc_pch_transcoder(crtc);

drivers/gpu/drm/i915/display/intel_display.c

6642

struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_display.c

665

intel_initial_plane_vblank_wait(crtc);

drivers/gpu/drm/i915/display/intel_display.c

6678

intel_cpu_transcoder_set_m1_n1(crtc, new_crtc_state->cpu_transcoder,

drivers/gpu/drm/i915/display/intel_display.c

6686

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display.c

6690

intel_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

6692

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

6714

intel_atomic_update_watermarks(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

6718

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display.c

6722

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

6741

if (intel_crtc_vrr_enabling(state, crtc))

drivers/gpu/drm/i915/display/intel_display.c

6746

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display.c

6750

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

6765

intel_psr_notify_pipe_change(state, crtc, true);

drivers/gpu/drm/i915/display/intel_display.c

6767

display->funcs.display->crtc_enable(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

6770

intel_crtc_enable_pipe_crc(crtc);

drivers/gpu/drm/i915/display/intel_display.c

6774

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display.c

6778

intel_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

6780

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

6786

intel_dpt_configure(crtc);

drivers/gpu/drm/i915/display/intel_display.c

6794

intel_pre_plane_update(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

6797

intel_encoders_update_pipe(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

6813

intel_fbc_update(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

682

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_display.c

6823

intel_crtc_planes_update_noarm(NULL, state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

6827

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display.c

683

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

6830

intel_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

6832

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

6837

intel_crtc_prepare_vblank_event(new_crtc_state, &crtc->flipq_event);

drivers/gpu/drm/i915/display/intel_display.c

6839

intel_flipq_add(crtc, INTEL_FLIPQ_PLANE_1, 0, INTEL_DSB_0,

drivers/gpu/drm/i915/display/intel_display.c

6842

intel_crtc_prepare_vblank_event(new_crtc_state, &crtc->dsb_event);

drivers/gpu/drm/i915/display/intel_display.c

6847

intel_pipe_update_start(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

6852

commit_pipe_pre_planes(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

6854

intel_crtc_planes_update_arm(NULL, state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

6856

commit_pipe_post_planes(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

6858

intel_pipe_update_end(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

6866

if (intel_crtc_vrr_enabling(state, crtc) ||

drivers/gpu/drm/i915/display/intel_display.c

6872

intel_vrr_dcb_increment_flip_count(new_crtc_state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

6882

intel_crtc_arm_fifo_underrun(crtc, new_crtc_state);

drivers/gpu/drm/i915/display/intel_display.c

6886

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display.c

6890

intel_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

6901

intel_psr_notify_pipe_change(state, crtc, false);

drivers/gpu/drm/i915/display/intel_display.c

6903

display->funcs.display->crtc_disable(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

6922

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_display.c

6926

for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,

drivers/gpu/drm/i915/display/intel_display.c

6935

intel_pre_plane_update(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

6940

disable_pipes |= BIT(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display.c

6943

for_each_old_intel_crtc_in_state(state, crtc, old_crtc_state, i) {

drivers/gpu/drm/i915/display/intel_display.c

6944

if ((disable_pipes & BIT(crtc->pipe)) == 0)

drivers/gpu/drm/i915/display/intel_display.c

6947

intel_crtc_disable_planes(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

6949

drm_vblank_work_flush_all(&crtc->base);

drivers/gpu/drm/i915/display/intel_display.c

6953

for_each_old_intel_crtc_in_state(state, crtc, old_crtc_state, i) {

drivers/gpu/drm/i915/display/intel_display.c

6954

if ((disable_pipes & BIT(crtc->pipe)) == 0)

drivers/gpu/drm/i915/display/intel_display.c

6969

intel_old_crtc_state_disables(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

6975

for_each_old_intel_crtc_in_state(state, crtc, old_crtc_state, i) {

drivers/gpu/drm/i915/display/intel_display.c

6976

if ((disable_pipes & BIT(crtc->pipe)) == 0)

drivers/gpu/drm/i915/display/intel_display.c

6982

intel_old_crtc_state_disables(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

6993

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_display.c

6996

for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {

drivers/gpu/drm/i915/display/intel_display.c

7000

intel_enable_crtc(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

7001

intel_pre_update_crtc(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

7004

for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {

drivers/gpu/drm/i915/display/intel_display.c

7008

intel_update_crtc(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

7015

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_display.c

7021

for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {

drivers/gpu/drm/i915/display/intel_display.c

7022

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

7045

for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {

drivers/gpu/drm/i915/display/intel_display.c

7046

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

7051

intel_pre_update_crtc(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

7061

for_each_oldnew_intel_crtc_in_state_reverse(state, crtc, old_crtc_state,

drivers/gpu/drm/i915/display/intel_display.c

7063

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

7075

intel_update_crtc(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

7086

intel_crtc_wait_for_next_vblank(crtc);

drivers/gpu/drm/i915/display/intel_display.c

7098

for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {

drivers/gpu/drm/i915/display/intel_display.c

7099

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

7113

intel_enable_crtc(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

7120

for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {

drivers/gpu/drm/i915/display/intel_display.c

7121

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

7131

intel_enable_crtc(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

7137

for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {

drivers/gpu/drm/i915/display/intel_display.c

7138

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

7143

intel_pre_update_crtc(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

7150

for_each_new_intel_crtc_in_state_reverse(state, crtc, new_crtc_state, i) {

drivers/gpu/drm/i915/display/intel_display.c

7151

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

7163

intel_update_crtc(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

720

struct drm_crtc *crtc;

drivers/gpu/drm/i915/display/intel_display.c

7214

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_display.c

7217

for_each_old_intel_crtc_in_state(state, crtc, old_crtc_state, i)

drivers/gpu/drm/i915/display/intel_display.c

723

drm_for_each_crtc(crtc, display->drm) {

drivers/gpu/drm/i915/display/intel_display.c

725

spin_lock(&crtc->commit_lock);

drivers/gpu/drm/i915/display/intel_display.c

726

commit = list_first_entry_or_null(&crtc->commit_list,

drivers/gpu/drm/i915/display/intel_display.c

7269

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display.c

7273

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

7298

intel_color_prepare_commit(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

730

spin_unlock(&crtc->commit_lock);

drivers/gpu/drm/i915/display/intel_display.c

7302

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display.c

7306

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

7321

new_crtc_state->dsb_commit = intel_dsb_prepare(state, crtc, INTEL_DSB_0,

drivers/gpu/drm/i915/display/intel_display.c

7334

intel_flipq_wait_dmc_halt(new_crtc_state->dsb_commit, crtc);

drivers/gpu/drm/i915/display/intel_display.c

7348

intel_pipedmc_dcb_disable(NULL, crtc);

drivers/gpu/drm/i915/display/intel_display.c

735

intel_crtc_wait_for_next_vblank(to_intel_crtc(crtc));

drivers/gpu/drm/i915/display/intel_display.c

7355

state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

7363

state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

7379

state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

7387

intel_flipq_unhalt_dmc(new_crtc_state->dsb_commit, crtc);

drivers/gpu/drm/i915/display/intel_display.c

7406

intel_pipedmc_dcb_enable(new_crtc_state->dsb_commit, crtc);

drivers/gpu/drm/i915/display/intel_display.c

7419

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_display.c

7424

for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i)

drivers/gpu/drm/i915/display/intel_display.c

7425

intel_atomic_dsb_prepare(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

7433

for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i)

drivers/gpu/drm/i915/display/intel_display.c

7434

intel_fbc_prepare_dirty_rect(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

7436

for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i)

drivers/gpu/drm/i915/display/intel_display.c

7437

intel_atomic_dsb_finish(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

7472

for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,

drivers/gpu/drm/i915/display/intel_display.c

7476

intel_modeset_get_crtc_power_domains(new_crtc_state, &put_domains[crtc->pipe]);

drivers/gpu/drm/i915/display/intel_display.c

7484

for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i)

drivers/gpu/drm/i915/display/intel_display.c

7485

crtc->config = new_crtc_state;

drivers/gpu/drm/i915/display/intel_display.c

7506

for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {

drivers/gpu/drm/i915/display/intel_display.c

7512

drm_crtc_send_vblank_event(&crtc->base,

drivers/gpu/drm/i915/display/intel_display.c

7524

for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {

drivers/gpu/drm/i915/display/intel_display.c

7526

intel_crtc_enable_flip_done(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

7548

for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {

drivers/gpu/drm/i915/display/intel_display.c

7550

intel_crtc_disable_flip_done(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

7568

for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,

drivers/gpu/drm/i915/display/intel_display.c

7579

intel_set_cpu_fifo_underrun_reporting(display, crtc->pipe, true);

drivers/gpu/drm/i915/display/intel_display.c

7581

intel_optimize_watermarks(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

7586

for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {

drivers/gpu/drm/i915/display/intel_display.c

7587

intel_post_plane_update(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

7589

intel_modeset_put_crtc_power_domains(crtc, &put_domains[crtc->pipe]);

drivers/gpu/drm/i915/display/intel_display.c

7591

intel_modeset_verify_crtc(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

7593

intel_post_plane_update_after_readout(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

761

if (connector_state->crtc != &primary_crtc->base)

drivers/gpu/drm/i915/display/intel_display.c

7729

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_display.c

7732

for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i)

drivers/gpu/drm/i915/display/intel_display.c

775

static void intel_crtc_dpms_overlay_disable(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display.c

777

if (crtc->overlay)

drivers/gpu/drm/i915/display/intel_display.c

778

(void) intel_overlay_switch_off(crtc->overlay);

drivers/gpu/drm/i915/display/intel_display.c

7789

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_display.c

7792

for_each_intel_crtc_in_pipe_mask(display->drm, crtc, encoder->pipe_mask)

drivers/gpu/drm/i915/display/intel_display.c

7793

possible_crtcs |= drm_crtc_mask(&crtc->base);

drivers/gpu/drm/i915/display/intel_display.c

8252

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_display.c

8265

for_each_intel_crtc(display->drm, crtc) {

drivers/gpu/drm/i915/display/intel_display.c

8267

intel_atomic_get_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

8280

ret = drm_atomic_add_affected_planes(state, &crtc->base);

drivers/gpu/drm/i915/display/intel_display.c

8297

&crtc->base);

drivers/gpu/drm/i915/display/intel_display.c

8324

struct intel_crtc *crtc = intel_crtc_for_pipe(display, pipe);

drivers/gpu/drm/i915/display/intel_display.c

8400

intel_wait_for_pipe_scanline_moving(crtc);

drivers/gpu/drm/i915/display/intel_display.c

8405

struct intel_crtc *crtc = intel_crtc_for_pipe(display, pipe);

drivers/gpu/drm/i915/display/intel_display.c

8424

intel_wait_for_pipe_scanline_stopped(crtc);

drivers/gpu/drm/i915/display/intel_display.c

852

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display.c

855

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

864

if (conn_state->crtc != &crtc->base)

drivers/gpu/drm/i915/display/intel_display.c

873

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display.c

876

intel_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

885

if (old_conn_state->crtc != &crtc->base)

drivers/gpu/drm/i915/display/intel_display.c

938

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display.c

941

intel_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

943

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

955

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display.c

958

intel_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

960

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_display.h

288

for_each_if((intel_encoder)->base.crtc == (__crtc))

drivers/gpu/drm/i915/display/intel_display.h

298

#define for_each_old_intel_crtc_in_state(__state, crtc, old_crtc_state, __i) \

drivers/gpu/drm/i915/display/intel_display.h

301

((crtc) = to_intel_crtc((__state)->base.crtcs[__i].ptr), \

drivers/gpu/drm/i915/display/intel_display.h

304

for_each_if(crtc)

drivers/gpu/drm/i915/display/intel_display.h

314

#define for_each_new_intel_crtc_in_state(__state, crtc, new_crtc_state, __i) \

drivers/gpu/drm/i915/display/intel_display.h

317

((crtc) = to_intel_crtc((__state)->base.crtcs[__i].ptr), \

drivers/gpu/drm/i915/display/intel_display.h

320

for_each_if(crtc)

drivers/gpu/drm/i915/display/intel_display.h

322

#define for_each_new_intel_crtc_in_state_reverse(__state, crtc, new_crtc_state, __i) \

drivers/gpu/drm/i915/display/intel_display.h

325

((crtc) = to_intel_crtc((__state)->base.crtcs[__i].ptr), \

drivers/gpu/drm/i915/display/intel_display.h

328

for_each_if(crtc)

drivers/gpu/drm/i915/display/intel_display.h

339

#define for_each_oldnew_intel_crtc_in_state(__state, crtc, old_crtc_state, new_crtc_state, __i) \

drivers/gpu/drm/i915/display/intel_display.h

342

((crtc) = to_intel_crtc((__state)->base.crtcs[__i].ptr), \

drivers/gpu/drm/i915/display/intel_display.h

346

for_each_if(crtc)

drivers/gpu/drm/i915/display/intel_display.h

348

#define for_each_oldnew_intel_crtc_in_state_reverse(__state, crtc, old_crtc_state, new_crtc_state, __i) \

drivers/gpu/drm/i915/display/intel_display.h

351

((crtc) = to_intel_crtc((__state)->base.crtcs[__i].ptr), \

drivers/gpu/drm/i915/display/intel_display.h

355

for_each_if(crtc)

drivers/gpu/drm/i915/display/intel_display.h

373

#define for_each_crtc_in_masks(display, crtc, first_pipes, second_pipes, i) \

drivers/gpu/drm/i915/display/intel_display.h

375

(i) < (I915_MAX_PIPES * 2) && ((crtc) = intel_crtc_for_pipe(display, (i) % I915_MAX_PIPES), 1); \

drivers/gpu/drm/i915/display/intel_display.h

377

for_each_if((crtc) && ((first_pipes) | ((second_pipes) << I915_MAX_PIPES)) & BIT(i))

drivers/gpu/drm/i915/display/intel_display.h

379

#define for_each_crtc_in_masks_reverse(display, crtc, first_pipes, second_pipes, i) \

drivers/gpu/drm/i915/display/intel_display.h

381

(i) >= 0 && ((crtc) = intel_crtc_for_pipe(display, (i) % I915_MAX_PIPES), 1); \

drivers/gpu/drm/i915/display/intel_display.h

383

for_each_if((crtc) && ((first_pipes) | ((second_pipes) << I915_MAX_PIPES)) & BIT(i))

drivers/gpu/drm/i915/display/intel_display.h

385

#define for_each_pipe_crtc_modeset_disable(display, crtc, crtc_state, i) \

drivers/gpu/drm/i915/display/intel_display.h

386

for_each_crtc_in_masks(display, crtc, \

drivers/gpu/drm/i915/display/intel_display.h

391

#define for_each_pipe_crtc_modeset_enable(display, crtc, crtc_state, i) \

drivers/gpu/drm/i915/display/intel_display.h

392

for_each_crtc_in_masks_reverse(display, crtc, \

drivers/gpu/drm/i915/display/intel_display.h

477

void intel_cpu_transcoder_set_m1_n1(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_display.h

480

void intel_cpu_transcoder_set_m2_n2(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_display.h

483

void intel_cpu_transcoder_get_m1_n1(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_display.h

486

void intel_cpu_transcoder_get_m2_n2(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_display.h

494

void intel_crtc_arm_fifo_underrun(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_display.h

496

int bdw_get_pipe_misc_bpp(struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_display.h

502

void intel_plane_disable_noatomic(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_display.h

510

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_display.h

525

void intel_modeset_put_crtc_power_domains(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_display_core.h

71

bool (*fixup_initial_plane_config)(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_display_core.h

74

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_display_core.h

76

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_display_core.h

85

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_display_core.h

87

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_display_core.h

89

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_display_core.h

91

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_display_debugfs.c

1011

struct drm_crtc *crtc;

drivers/gpu/drm/i915/display/intel_display_debugfs.c

1022

crtc = connector->base.state->crtc;

drivers/gpu/drm/i915/display/intel_display_debugfs.c

1023

if (connector->base.status != connector_status_connected || !crtc) {

drivers/gpu/drm/i915/display/intel_display_debugfs.c

1028

crtc_state = to_intel_crtc_state(crtc->state);

drivers/gpu/drm/i915/display/intel_display_debugfs.c

1077

struct drm_crtc *crtc;

drivers/gpu/drm/i915/display/intel_display_debugfs.c

1088

crtc = connector->base.state->crtc;

drivers/gpu/drm/i915/display/intel_display_debugfs.c

1089

if (connector->base.status != connector_status_connected || !crtc) {

drivers/gpu/drm/i915/display/intel_display_debugfs.c

1094

crtc_state = to_intel_crtc_state(crtc->state);

drivers/gpu/drm/i915/display/intel_display_debugfs.c

1144

struct drm_crtc *crtc;

drivers/gpu/drm/i915/display/intel_display_debugfs.c

1155

crtc = connector->base.state->crtc;

drivers/gpu/drm/i915/display/intel_display_debugfs.c

1156

if (connector->base.status != connector_status_connected || !crtc) {

drivers/gpu/drm/i915/display/intel_display_debugfs.c

1223

struct intel_crtc *crtc = m->private;

drivers/gpu/drm/i915/display/intel_display_debugfs.c

1227

ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex);

drivers/gpu/drm/i915/display/intel_display_debugfs.c

1231

crtc_state = to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/intel_display_debugfs.c

1234

drm_modeset_unlock(&crtc->base.mutex);

drivers/gpu/drm/i915/display/intel_display_debugfs.c

1243

struct intel_crtc *crtc = m->private;

drivers/gpu/drm/i915/display/intel_display_debugfs.c

1245

seq_printf(m, "%c\n", pipe_name(crtc->pipe));

drivers/gpu/drm/i915/display/intel_display_debugfs.c

1376

void intel_crtc_debugfs_add(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display_debugfs.c

1378

struct dentry *root = crtc->base.debugfs_entry;

drivers/gpu/drm/i915/display/intel_display_debugfs.c

1383

crtc_updates_add(crtc);

drivers/gpu/drm/i915/display/intel_display_debugfs.c

1384

intel_drrs_crtc_debugfs_add(crtc);

drivers/gpu/drm/i915/display/intel_display_debugfs.c

1385

intel_fbc_crtc_debugfs_add(crtc);

drivers/gpu/drm/i915/display/intel_display_debugfs.c

1386

hsw_ips_crtc_debugfs_add(crtc);

drivers/gpu/drm/i915/display/intel_display_debugfs.c

1388

debugfs_create_file("i915_current_bpc", 0444, root, crtc,

drivers/gpu/drm/i915/display/intel_display_debugfs.c

1390

debugfs_create_file("i915_pipe", 0444, root, crtc,

drivers/gpu/drm/i915/display/intel_display_debugfs.c

176

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_display_debugfs.c

396

static void intel_plane_info(struct seq_file *m, struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display_debugfs.c

401

for_each_intel_plane_on_crtc(display->drm, crtc, plane) {

drivers/gpu/drm/i915/display/intel_display_debugfs.c

410

static void intel_scaler_info(struct seq_file *m, struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display_debugfs.c

413

to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/intel_display_debugfs.c

414

int num_scalers = crtc->num_scalers;

drivers/gpu/drm/i915/display/intel_display_debugfs.c

440

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_display_debugfs.c

447

for (row = 0; row < ARRAY_SIZE(crtc->debug.vbl.times); row++)

drivers/gpu/drm/i915/display/intel_display_debugfs.c

448

count += crtc->debug.vbl.times[row];

drivers/gpu/drm/i915/display/intel_display_debugfs.c

453

for (row = 0; row < ARRAY_SIZE(crtc->debug.vbl.times); row++) {

drivers/gpu/drm/i915/display/intel_display_debugfs.c

472

if (crtc->debug.vbl.times[row]) {

drivers/gpu/drm/i915/display/intel_display_debugfs.c

473

x = ilog2(crtc->debug.vbl.times[row]);

drivers/gpu/drm/i915/display/intel_display_debugfs.c

482

hdr, crtc->debug.vbl.min);

drivers/gpu/drm/i915/display/intel_display_debugfs.c

484

hdr, crtc->debug.vbl.max);

drivers/gpu/drm/i915/display/intel_display_debugfs.c

486

hdr, div64_u64(crtc->debug.vbl.sum, count));

drivers/gpu/drm/i915/display/intel_display_debugfs.c

488

hdr, VBLANK_EVASION_TIME_US, crtc->debug.vbl.over);

drivers/gpu/drm/i915/display/intel_display_debugfs.c

507

struct intel_crtc *crtc = m->private;

drivers/gpu/drm/i915/display/intel_display_debugfs.c

510

memset(&crtc->debug.vbl, 0, sizeof(crtc->debug.vbl));

drivers/gpu/drm/i915/display/intel_display_debugfs.c

524

static void crtc_updates_add(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display_debugfs.c

526

debugfs_create_file("i915_update_info", 0644, crtc->base.debugfs_entry,

drivers/gpu/drm/i915/display/intel_display_debugfs.c

527

crtc, &crtc_updates_fops);

drivers/gpu/drm/i915/display/intel_display_debugfs.c

532

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_display_debugfs.c

537

static void crtc_updates_add(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display_debugfs.c

542

static void intel_crtc_info(struct seq_file *m, struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display_debugfs.c

547

to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/intel_display_debugfs.c

551

crtc->base.base.id, crtc->base.name);

drivers/gpu/drm/i915/display/intel_display_debugfs.c

571

intel_scaler_info(m, crtc);

drivers/gpu/drm/i915/display/intel_display_debugfs.c

582

intel_encoder_info(m, crtc, encoder);

drivers/gpu/drm/i915/display/intel_display_debugfs.c

584

intel_plane_info(m, crtc);

drivers/gpu/drm/i915/display/intel_display_debugfs.c

587

str_yes_no(!crtc->cpu_fifo_underrun_disabled),

drivers/gpu/drm/i915/display/intel_display_debugfs.c

588

str_yes_no(!crtc->pch_fifo_underrun_disabled));

drivers/gpu/drm/i915/display/intel_display_debugfs.c

590

crtc_updates_info(m, crtc, "\t");

drivers/gpu/drm/i915/display/intel_display_debugfs.c

596

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_display_debugfs.c

607

for_each_intel_crtc(display->drm, crtc)

drivers/gpu/drm/i915/display/intel_display_debugfs.c

608

intel_crtc_info(m, crtc);

drivers/gpu/drm/i915/display/intel_display_debugfs.c

656

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_display_debugfs.c

665

for_each_intel_crtc(display->drm, crtc) {

drivers/gpu/drm/i915/display/intel_display_debugfs.c

667

to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/intel_display_debugfs.c

668

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display_debugfs.c

673

for_each_plane_id_on_crtc(crtc, plane_id) {

drivers/gpu/drm/i915/display/intel_display_debugfs.c

761

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_display_debugfs.c

772

for_each_intel_crtc(display->drm, crtc) {

drivers/gpu/drm/i915/display/intel_display_debugfs.c

776

ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex);

drivers/gpu/drm/i915/display/intel_display_debugfs.c

780

crtc_state = to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/intel_display_debugfs.c

791

pipe_name(crtc->pipe));

drivers/gpu/drm/i915/display/intel_display_debugfs.c

793

intel_crtc_arm_fifo_underrun(crtc, crtc_state);

drivers/gpu/drm/i915/display/intel_display_debugfs.c

796

drm_modeset_unlock(&crtc->base.mutex);

drivers/gpu/drm/i915/display/intel_display_debugfs.c

894

struct drm_crtc *crtc;

drivers/gpu/drm/i915/display/intel_display_debugfs.c

914

crtc = connector->base.state->crtc;

drivers/gpu/drm/i915/display/intel_display_debugfs.c

915

if (connector->base.status != connector_status_connected || !crtc) {

drivers/gpu/drm/i915/display/intel_display_debugfs.c

919

ret = drm_modeset_lock(&crtc->mutex, &ctx);

drivers/gpu/drm/i915/display/intel_display_debugfs.c

931

crtc_state = to_intel_crtc_state(crtc->state);

drivers/gpu/drm/i915/display/intel_display_debugfs.h

16

void intel_crtc_debugfs_add(struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_display_debugfs.h

20

static inline void intel_crtc_debugfs_add(struct intel_crtc *crtc) {}

drivers/gpu/drm/i915/display/intel_display_driver.c

164

struct intel_crtc *crtc = intel_crtc_for_pipe(display,

drivers/gpu/drm/i915/display/intel_display_driver.c

167

plane->base.possible_crtcs = drm_crtc_mask(&crtc->base);

drivers/gpu/drm/i915/display/intel_display_driver.c

714

struct drm_crtc *crtc;

drivers/gpu/drm/i915/display/intel_display_driver.c

727

for_each_new_crtc_in_state(state, crtc, crtc_state, i) {

drivers/gpu/drm/i915/display/intel_display_irq.c

100

bool (*handle)(struct intel_crtc *crtc, enum plane_id plane_id);

drivers/gpu/drm/i915/display/intel_display_irq.c

105

static bool handle_plane_fault(struct intel_crtc *crtc, enum plane_id plane_id)

drivers/gpu/drm/i915/display/intel_display_irq.c

107

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_display_irq.c

111

plane = intel_crtc_get_plane(crtc, plane_id);

drivers/gpu/drm/i915/display/intel_display_irq.c

1144

static bool handle_plane_ats_fault(struct intel_crtc *crtc, enum plane_id plane_id)

drivers/gpu/drm/i915/display/intel_display_irq.c

1146

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_display_irq.c

115

plane->capture_error(crtc, plane, &error);

drivers/gpu/drm/i915/display/intel_display_irq.c

1150

crtc->base.base.id, crtc->base.name);

drivers/gpu/drm/i915/display/intel_display_irq.c

1155

static bool handle_pipedmc_ats_fault(struct intel_crtc *crtc, enum plane_id plane_id)

drivers/gpu/drm/i915/display/intel_display_irq.c

1157

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_display_irq.c

1161

crtc->base.base.id, crtc->base.name);

drivers/gpu/drm/i915/display/intel_display_irq.c

1166

static bool handle_pipedmc_fault(struct intel_crtc *crtc, enum plane_id plane_id)

drivers/gpu/drm/i915/display/intel_display_irq.c

1168

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_display_irq.c

1172

crtc->base.base.id, crtc->base.name);

drivers/gpu/drm/i915/display/intel_display_irq.c

119

crtc->base.base.id, crtc->base.name,

drivers/gpu/drm/i915/display/intel_display_irq.c

130

struct intel_crtc *crtc = intel_crtc_for_pipe(display, pipe);

drivers/gpu/drm/i915/display/intel_display_irq.c

137

if (handler->handle(crtc, handler->plane_id))

drivers/gpu/drm/i915/display/intel_display_irq.c

142

crtc->base.base.id, crtc->base.name, fault_errors);

drivers/gpu/drm/i915/display/intel_display_irq.c

148

struct intel_crtc *crtc = intel_crtc_for_pipe(display, pipe);

drivers/gpu/drm/i915/display/intel_display_irq.c

150

drm_crtc_handle_vblank(&crtc->base);

drivers/gpu/drm/i915/display/intel_display_irq.c

1646

int i8xx_enable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display_irq.c

1648

struct intel_display *display = to_intel_display(crtc->dev);

drivers/gpu/drm/i915/display/intel_display_irq.c

1649

enum pipe pipe = to_intel_crtc(crtc)->pipe;

drivers/gpu/drm/i915/display/intel_display_irq.c

1659

void i8xx_disable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display_irq.c

1661

struct intel_display *display = to_intel_display(crtc->dev);

drivers/gpu/drm/i915/display/intel_display_irq.c

1662

enum pipe pipe = to_intel_crtc(crtc)->pipe;

drivers/gpu/drm/i915/display/intel_display_irq.c

1670

int i915gm_enable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display_irq.c

1672

struct intel_display *display = to_intel_display(crtc->dev);

drivers/gpu/drm/i915/display/intel_display_irq.c

1676

return i8xx_enable_vblank(crtc);

drivers/gpu/drm/i915/display/intel_display_irq.c

1679

void i915gm_disable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display_irq.c

1681

struct intel_display *display = to_intel_display(crtc->dev);

drivers/gpu/drm/i915/display/intel_display_irq.c

1683

i8xx_disable_vblank(crtc);

drivers/gpu/drm/i915/display/intel_display_irq.c

1688

int i965_enable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display_irq.c

1690

struct intel_display *display = to_intel_display(crtc->dev);

drivers/gpu/drm/i915/display/intel_display_irq.c

1691

enum pipe pipe = to_intel_crtc(crtc)->pipe;

drivers/gpu/drm/i915/display/intel_display_irq.c

1702

void i965_disable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display_irq.c

1704

struct intel_display *display = to_intel_display(crtc->dev);

drivers/gpu/drm/i915/display/intel_display_irq.c

1705

enum pipe pipe = to_intel_crtc(crtc)->pipe;

drivers/gpu/drm/i915/display/intel_display_irq.c

1714

int ilk_enable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display_irq.c

1716

struct intel_display *display = to_intel_display(crtc->dev);

drivers/gpu/drm/i915/display/intel_display_irq.c

1717

enum pipe pipe = to_intel_crtc(crtc)->pipe;

drivers/gpu/drm/i915/display/intel_display_irq.c

1730

drm_crtc_vblank_restore(crtc);

drivers/gpu/drm/i915/display/intel_display_irq.c

1735

void ilk_disable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display_irq.c

1737

struct intel_display *display = to_intel_display(crtc->dev);

drivers/gpu/drm/i915/display/intel_display_irq.c

1738

enum pipe pipe = to_intel_crtc(crtc)->pipe;

drivers/gpu/drm/i915/display/intel_display_irq.c

1782

struct intel_crtc *crtc = to_intel_crtc(_crtc);

drivers/gpu/drm/i915/display/intel_display_irq.c

1783

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_display_irq.c

1784

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display_irq.c

1787

if (gen11_dsi_configure_te(crtc, true))

drivers/gpu/drm/i915/display/intel_display_irq.c

1790

if (crtc->vblank_psr_notify && display->irq.vblank_enable_count++ == 0)

drivers/gpu/drm/i915/display/intel_display_irq.c

1801

drm_crtc_vblank_restore(&crtc->base);

drivers/gpu/drm/i915/display/intel_display_irq.c

1808

struct intel_crtc *crtc = to_intel_crtc(_crtc);

drivers/gpu/drm/i915/display/intel_display_irq.c

1809

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_display_irq.c

1810

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display_irq.c

1813

if (gen11_dsi_configure_te(crtc, false))

drivers/gpu/drm/i915/display/intel_display_irq.c

1820

if (crtc->vblank_psr_notify && --display->irq.vblank_enable_count == 0)

drivers/gpu/drm/i915/display/intel_display_irq.c

426

struct intel_crtc *crtc = intel_crtc_for_pipe(display, pipe);

drivers/gpu/drm/i915/display/intel_display_irq.c

427

struct intel_pipe_crc *pipe_crc = &crtc->pipe_crc;

drivers/gpu/drm/i915/display/intel_display_irq.c

430

trace_intel_pipe_crc(crtc, crcs);

drivers/gpu/drm/i915/display/intel_display_irq.c

449

drm_crtc_add_crc_entry(&crtc->base, true,

drivers/gpu/drm/i915/display/intel_display_irq.c

450

drm_crtc_accurate_vblank_count(&crtc->base),

drivers/gpu/drm/i915/display/intel_display_irq.c

465

struct intel_crtc *crtc = intel_crtc_for_pipe(display, pipe);

drivers/gpu/drm/i915/display/intel_display_irq.c

469

if (crtc->flip_done_event) {

drivers/gpu/drm/i915/display/intel_display_irq.c

470

trace_intel_crtc_flip_done(crtc);

drivers/gpu/drm/i915/display/intel_display_irq.c

471

drm_crtc_send_vblank_event(&crtc->base, crtc->flip_done_event);

drivers/gpu/drm/i915/display/intel_display_irq.c

472

crtc->flip_done_event = NULL;

drivers/gpu/drm/i915/display/intel_display_irq.h

41

int i8xx_enable_vblank(struct drm_crtc *crtc);

drivers/gpu/drm/i915/display/intel_display_irq.h

42

int i915gm_enable_vblank(struct drm_crtc *crtc);

drivers/gpu/drm/i915/display/intel_display_irq.h

43

int i965_enable_vblank(struct drm_crtc *crtc);

drivers/gpu/drm/i915/display/intel_display_irq.h

44

int ilk_enable_vblank(struct drm_crtc *crtc);

drivers/gpu/drm/i915/display/intel_display_irq.h

45

int bdw_enable_vblank(struct drm_crtc *crtc);

drivers/gpu/drm/i915/display/intel_display_irq.h

46

void i8xx_disable_vblank(struct drm_crtc *crtc);

drivers/gpu/drm/i915/display/intel_display_irq.h

47

void i915gm_disable_vblank(struct drm_crtc *crtc);

drivers/gpu/drm/i915/display/intel_display_irq.h

48

void i965_disable_vblank(struct drm_crtc *crtc);

drivers/gpu/drm/i915/display/intel_display_irq.h

49

void ilk_disable_vblank(struct drm_crtc *crtc);

drivers/gpu/drm/i915/display/intel_display_irq.h

50

void bdw_disable_vblank(struct drm_crtc *crtc);

drivers/gpu/drm/i915/display/intel_display_power.c

1204

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_display_power.c

1206

for_each_intel_crtc(display->drm, crtc)

drivers/gpu/drm/i915/display/intel_display_power.c

1207

INTEL_DISPLAY_STATE_WARN(display, crtc->active,

drivers/gpu/drm/i915/display/intel_display_power.c

1209

pipe_name(crtc->pipe));

drivers/gpu/drm/i915/display/intel_display_rps.c

21

struct drm_crtc *crtc;

drivers/gpu/drm/i915/display/intel_display_rps.c

29

struct intel_display *display = to_intel_display(wait->crtc->dev);

drivers/gpu/drm/i915/display/intel_display_rps.c

40

drm_crtc_vblank_put(wait->crtc);

drivers/gpu/drm/i915/display/intel_display_rps.c

47

void intel_display_rps_boost_after_vblank(struct drm_crtc *crtc,

drivers/gpu/drm/i915/display/intel_display_rps.c

50

struct intel_display *display = to_intel_display(crtc->dev);

drivers/gpu/drm/i915/display/intel_display_rps.c

59

if (drm_crtc_vblank_get(crtc))

drivers/gpu/drm/i915/display/intel_display_rps.c

64

drm_crtc_vblank_put(crtc);

drivers/gpu/drm/i915/display/intel_display_rps.c

69

wait->crtc = crtc;

drivers/gpu/drm/i915/display/intel_display_rps.c

74

add_wait_queue(drm_crtc_vblank_waitqueue(crtc), &wait->wait);

drivers/gpu/drm/i915/display/intel_display_rps.h

16

void intel_display_rps_boost_after_vblank(struct drm_crtc *crtc,

drivers/gpu/drm/i915/display/intel_display_trace.h

100

TP_ARGS(crtc),

drivers/gpu/drm/i915/display/intel_display_trace.h

103

__string(dev, __dev_name_kms(crtc))

drivers/gpu/drm/i915/display/intel_display_trace.h

110

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_display_trace.h

121

__entry->pipe_name = pipe_name(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

129

TP_PROTO(struct intel_crtc *crtc),

drivers/gpu/drm/i915/display/intel_display_trace.h

130

TP_ARGS(crtc),

drivers/gpu/drm/i915/display/intel_display_trace.h

133

__string(dev, __dev_name_kms(crtc))

drivers/gpu/drm/i915/display/intel_display_trace.h

141

__entry->pipe_name = pipe_name(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

142

__entry->frame = intel_crtc_get_vblank_counter(crtc);

drivers/gpu/drm/i915/display/intel_display_trace.h

143

__entry->scanline = intel_get_crtc_scanline(crtc);

drivers/gpu/drm/i915/display/intel_display_trace.h

152

TP_PROTO(struct intel_crtc *crtc, const u32 *crcs),

drivers/gpu/drm/i915/display/intel_display_trace.h

153

TP_ARGS(crtc, crcs),

drivers/gpu/drm/i915/display/intel_display_trace.h

156

__string(dev, __dev_name_kms(crtc))

drivers/gpu/drm/i915/display/intel_display_trace.h

165

__entry->pipe_name = pipe_name(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

166

__entry->frame = intel_crtc_get_vblank_counter(crtc);

drivers/gpu/drm/i915/display/intel_display_trace.h

167

__entry->scanline = intel_get_crtc_scanline(crtc);

drivers/gpu/drm/i915/display/intel_display_trace.h

191

struct intel_crtc *crtc = intel_crtc_for_pipe(display, pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

194

__entry->frame = intel_crtc_get_vblank_counter(crtc);

drivers/gpu/drm/i915/display/intel_display_trace.h

195

__entry->scanline = intel_get_crtc_scanline(crtc);

drivers/gpu/drm/i915/display/intel_display_trace.h

216

struct intel_crtc *crtc = intel_crtc_for_pipe(display, pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

219

__entry->frame = intel_crtc_get_vblank_counter(crtc);

drivers/gpu/drm/i915/display/intel_display_trace.h

220

__entry->scanline = intel_get_crtc_scanline(crtc);

drivers/gpu/drm/i915/display/intel_display_trace.h

241

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_display_trace.h

247

for_each_intel_crtc(display->drm, crtc) {

drivers/gpu/drm/i915/display/intel_display_trace.h

248

__entry->frame[crtc->pipe] = intel_crtc_get_vblank_counter(crtc);

drivers/gpu/drm/i915/display/intel_display_trace.h

249

__entry->scanline[crtc->pipe] = intel_get_crtc_scanline(crtc);

drivers/gpu/drm/i915/display/intel_display_trace.h

261

TP_PROTO(struct intel_crtc *crtc, const struct g4x_wm_values *wm),

drivers/gpu/drm/i915/display/intel_display_trace.h

262

TP_ARGS(crtc, wm),

drivers/gpu/drm/i915/display/intel_display_trace.h

265

__string(dev, __dev_name_kms(crtc))

drivers/gpu/drm/i915/display/intel_display_trace.h

285

__entry->pipe_name = pipe_name(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

286

__entry->frame = intel_crtc_get_vblank_counter(crtc);

drivers/gpu/drm/i915/display/intel_display_trace.h

287

__entry->scanline = intel_get_crtc_scanline(crtc);

drivers/gpu/drm/i915/display/intel_display_trace.h

288

__entry->primary = wm->pipe[crtc->pipe].plane[PLANE_PRIMARY];

drivers/gpu/drm/i915/display/intel_display_trace.h

289

__entry->sprite = wm->pipe[crtc->pipe].plane[PLANE_SPRITE0];

drivers/gpu/drm/i915/display/intel_display_trace.h

290

__entry->cursor = wm->pipe[crtc->pipe].plane[PLANE_CURSOR];

drivers/gpu/drm/i915/display/intel_display_trace.h

312

TP_PROTO(struct intel_crtc *crtc, const struct vlv_wm_values *wm),

drivers/gpu/drm/i915/display/intel_display_trace.h

313

TP_ARGS(crtc, wm),

drivers/gpu/drm/i915/display/intel_display_trace.h

316

__string(dev, __dev_name_kms(crtc))

drivers/gpu/drm/i915/display/intel_display_trace.h

332

__entry->pipe_name = pipe_name(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

333

__entry->frame = intel_crtc_get_vblank_counter(crtc);

drivers/gpu/drm/i915/display/intel_display_trace.h

334

__entry->scanline = intel_get_crtc_scanline(crtc);

drivers/gpu/drm/i915/display/intel_display_trace.h

337

__entry->primary = wm->pipe[crtc->pipe].plane[PLANE_PRIMARY];

drivers/gpu/drm/i915/display/intel_display_trace.h

338

__entry->sprite0 = wm->pipe[crtc->pipe].plane[PLANE_SPRITE0];

drivers/gpu/drm/i915/display/intel_display_trace.h

339

__entry->sprite1 = wm->pipe[crtc->pipe].plane[PLANE_SPRITE1];

drivers/gpu/drm/i915/display/intel_display_trace.h

340

__entry->cursor = wm->pipe[crtc->pipe].plane[PLANE_CURSOR];

drivers/gpu/drm/i915/display/intel_display_trace.h

354

TP_PROTO(struct intel_crtc *crtc, u32 sprite0_start, u32 sprite1_start, u32 fifo_size),

drivers/gpu/drm/i915/display/intel_display_trace.h

355

TP_ARGS(crtc, sprite0_start, sprite1_start, fifo_size),

drivers/gpu/drm/i915/display/intel_display_trace.h

358

__string(dev, __dev_name_kms(crtc))

drivers/gpu/drm/i915/display/intel_display_trace.h

369

__entry->pipe_name = pipe_name(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

370

__entry->frame = intel_crtc_get_vblank_counter(crtc);

drivers/gpu/drm/i915/display/intel_display_trace.h

371

__entry->scanline = intel_get_crtc_scanline(crtc);

drivers/gpu/drm/i915/display/intel_display_trace.h

384

TP_PROTO(struct intel_plane *plane, struct intel_crtc *crtc, bool async_flip),

drivers/gpu/drm/i915/display/intel_display_trace.h

385

TP_ARGS(plane, crtc, async_flip),

drivers/gpu/drm/i915/display/intel_display_trace.h

399

__entry->pipe_name = pipe_name(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

400

__entry->frame = intel_crtc_get_vblank_counter(crtc);

drivers/gpu/drm/i915/display/intel_display_trace.h

401

__entry->scanline = intel_get_crtc_scanline(crtc);

drivers/gpu/drm/i915/display/intel_display_trace.h

411

TP_PROTO(const struct intel_plane_state *plane_state, struct intel_crtc *crtc),

drivers/gpu/drm/i915/display/intel_display_trace.h

412

TP_ARGS(plane_state, crtc),

drivers/gpu/drm/i915/display/intel_display_trace.h

428

__entry->pipe_name = pipe_name(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

429

__entry->frame = intel_crtc_get_vblank_counter(crtc);

drivers/gpu/drm/i915/display/intel_display_trace.h

430

__entry->scanline = intel_get_crtc_scanline(crtc);

drivers/gpu/drm/i915/display/intel_display_trace.h

444

TP_PROTO(const struct intel_plane_state *plane_state, struct intel_crtc *crtc),

drivers/gpu/drm/i915/display/intel_display_trace.h

445

TP_ARGS(plane_state, crtc),

drivers/gpu/drm/i915/display/intel_display_trace.h

461

__entry->pipe_name = pipe_name(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

462

__entry->frame = intel_crtc_get_vblank_counter(crtc);

drivers/gpu/drm/i915/display/intel_display_trace.h

463

__entry->scanline = intel_get_crtc_scanline(crtc);

drivers/gpu/drm/i915/display/intel_display_trace.h

477

TP_PROTO(struct intel_plane *plane, struct intel_crtc *crtc),

drivers/gpu/drm/i915/display/intel_display_trace.h

478

TP_ARGS(plane, crtc),

drivers/gpu/drm/i915/display/intel_display_trace.h

491

__entry->pipe_name = pipe_name(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

492

__entry->frame = intel_crtc_get_vblank_counter(crtc);

drivers/gpu/drm/i915/display/intel_display_trace.h

493

__entry->scanline = intel_get_crtc_scanline(crtc);

drivers/gpu/drm/i915/display/intel_display_trace.h

521

struct intel_crtc *crtc = intel_crtc_for_pipe(display, plane->pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

524

__entry->pipe_name = pipe_name(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

526

__entry->frame = intel_crtc_get_vblank_counter(crtc);

drivers/gpu/drm/i915/display/intel_display_trace.h

527

__entry->scanline = intel_get_crtc_scanline(crtc);

drivers/gpu/drm/i915/display/intel_display_trace.h

541

TP_PROTO(struct intel_crtc *crtc, int scaler_id,

drivers/gpu/drm/i915/display/intel_display_trace.h

543

TP_ARGS(crtc, scaler_id, x, y, w, h),

drivers/gpu/drm/i915/display/intel_display_trace.h

546

__string(dev, __dev_name_kms(crtc))

drivers/gpu/drm/i915/display/intel_display_trace.h

559

__entry->pipe_name = pipe_name(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

561

__entry->frame = intel_crtc_get_vblank_counter(crtc);

drivers/gpu/drm/i915/display/intel_display_trace.h

562

__entry->scanline = intel_get_crtc_scanline(crtc);

drivers/gpu/drm/i915/display/intel_display_trace.h

576

TP_PROTO(struct intel_crtc *crtc, int scaler_id),

drivers/gpu/drm/i915/display/intel_display_trace.h

577

TP_ARGS(crtc, scaler_id),

drivers/gpu/drm/i915/display/intel_display_trace.h

580

__string(dev, __dev_name_kms(crtc))

drivers/gpu/drm/i915/display/intel_display_trace.h

589

__entry->pipe_name = pipe_name(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

591

__entry->frame = intel_crtc_get_vblank_counter(crtc);

drivers/gpu/drm/i915/display/intel_display_trace.h

592

__entry->scanline = intel_get_crtc_scanline(crtc);

drivers/gpu/drm/i915/display/intel_display_trace.h

614

struct intel_crtc *crtc = intel_crtc_for_pipe(display,

drivers/gpu/drm/i915/display/intel_display_trace.h

618

__entry->pipe_name = pipe_name(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

619

__entry->frame = intel_crtc_get_vblank_counter(crtc);

drivers/gpu/drm/i915/display/intel_display_trace.h

620

__entry->scanline = intel_get_crtc_scanline(crtc);

drivers/gpu/drm/i915/display/intel_display_trace.h

642

struct intel_crtc *crtc = intel_crtc_for_pipe(display,

drivers/gpu/drm/i915/display/intel_display_trace.h

646

__entry->pipe_name = pipe_name(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

647

__entry->frame = intel_crtc_get_vblank_counter(crtc);

drivers/gpu/drm/i915/display/intel_display_trace.h

648

__entry->scanline = intel_get_crtc_scanline(crtc);

drivers/gpu/drm/i915/display/intel_display_trace.h

670

struct intel_crtc *crtc = intel_crtc_for_pipe(display,

drivers/gpu/drm/i915/display/intel_display_trace.h

674

__entry->pipe_name = pipe_name(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

675

__entry->frame = intel_crtc_get_vblank_counter(crtc);

drivers/gpu/drm/i915/display/intel_display_trace.h

676

__entry->scanline = intel_get_crtc_scanline(crtc);

drivers/gpu/drm/i915/display/intel_display_trace.h

685

TP_PROTO(struct intel_crtc *crtc),

drivers/gpu/drm/i915/display/intel_display_trace.h

686

TP_ARGS(crtc),

drivers/gpu/drm/i915/display/intel_display_trace.h

689

__string(dev, __dev_name_kms(crtc))

drivers/gpu/drm/i915/display/intel_display_trace.h

697

__entry->pipe_name = pipe_name(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

698

__entry->frame = intel_crtc_get_vblank_counter(crtc);

drivers/gpu/drm/i915/display/intel_display_trace.h

699

__entry->scanline = intel_get_crtc_scanline(crtc);

drivers/gpu/drm/i915/display/intel_display_trace.h

70

TP_PROTO(struct intel_crtc *crtc),

drivers/gpu/drm/i915/display/intel_display_trace.h

708

TP_PROTO(struct intel_crtc *crtc),

drivers/gpu/drm/i915/display/intel_display_trace.h

709

TP_ARGS(crtc),

drivers/gpu/drm/i915/display/intel_display_trace.h

71

TP_ARGS(crtc),

drivers/gpu/drm/i915/display/intel_display_trace.h

712

__string(dev, __dev_name_kms(crtc))

drivers/gpu/drm/i915/display/intel_display_trace.h

720

__entry->pipe_name = pipe_name(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

721

__entry->frame = intel_crtc_get_vblank_counter(crtc);

drivers/gpu/drm/i915/display/intel_display_trace.h

722

__entry->scanline = intel_get_crtc_scanline(crtc);

drivers/gpu/drm/i915/display/intel_display_trace.h

731

TP_PROTO(struct intel_crtc *crtc),

drivers/gpu/drm/i915/display/intel_display_trace.h

732

TP_ARGS(crtc),

drivers/gpu/drm/i915/display/intel_display_trace.h

735

__string(dev, __dev_name_kms(crtc))

drivers/gpu/drm/i915/display/intel_display_trace.h

74

__string(dev, __dev_name_kms(crtc))

drivers/gpu/drm/i915/display/intel_display_trace.h

745

__entry->pipe_name = pipe_name(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

746

__entry->frame = intel_crtc_get_vblank_counter(crtc);

drivers/gpu/drm/i915/display/intel_display_trace.h

747

__entry->scanline = intel_get_crtc_scanline(crtc);

drivers/gpu/drm/i915/display/intel_display_trace.h

748

__entry->min = crtc->debug.min_vbl;

drivers/gpu/drm/i915/display/intel_display_trace.h

749

__entry->max = crtc->debug.max_vbl;

drivers/gpu/drm/i915/display/intel_display_trace.h

759

TP_PROTO(struct intel_crtc *crtc),

drivers/gpu/drm/i915/display/intel_display_trace.h

760

TP_ARGS(crtc),

drivers/gpu/drm/i915/display/intel_display_trace.h

763

__string(dev, __dev_name_kms(crtc))

drivers/gpu/drm/i915/display/intel_display_trace.h

773

__entry->pipe_name = pipe_name(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

774

__entry->frame = crtc->debug.start_vbl_count;

drivers/gpu/drm/i915/display/intel_display_trace.h

775

__entry->scanline = crtc->debug.scanline_start;

drivers/gpu/drm/i915/display/intel_display_trace.h

776

__entry->min = crtc->debug.min_vbl;

drivers/gpu/drm/i915/display/intel_display_trace.h

777

__entry->max = crtc->debug.max_vbl;

drivers/gpu/drm/i915/display/intel_display_trace.h

787

TP_PROTO(struct intel_crtc *crtc, u32 frame, int scanline_end),

drivers/gpu/drm/i915/display/intel_display_trace.h

788

TP_ARGS(crtc, frame, scanline_end),

drivers/gpu/drm/i915/display/intel_display_trace.h

791

__string(dev, __dev_name_kms(crtc))

drivers/gpu/drm/i915/display/intel_display_trace.h

799

__entry->pipe_name = pipe_name(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

80

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_display_trace.h

91

__entry->pipe_name = pipe_name(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

99

TP_PROTO(struct intel_crtc *crtc),

drivers/gpu/drm/i915/display/intel_display_types.h

1626

void (*capture_error)(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_display_types.h

2176

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display_types.h

2179

&crtc->base));

drivers/gpu/drm/i915/display/intel_display_types.h

2184

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_display_types.h

2187

&crtc->base));

drivers/gpu/drm/i915/display/intel_display_types.h

2268

__drm_device_to_intel_display((p)->uapi.crtc->dev)

drivers/gpu/drm/i915/display/intel_display_types.h

671

struct drm_crtc *crtc;

drivers/gpu/drm/i915/display/intel_dmc.c

1698

struct intel_crtc *crtc = intel_crtc_for_pipe(display, pipe);

drivers/gpu/drm/i915/display/intel_dmc.c

1708

if (crtc->flipq_event) {

drivers/gpu/drm/i915/display/intel_dmc.c

1713

drm_crtc_accurate_vblank_count(&crtc->base);

drivers/gpu/drm/i915/display/intel_dmc.c

1715

drm_crtc_send_vblank_event(&crtc->base, crtc->flipq_event);

drivers/gpu/drm/i915/display/intel_dmc.c

1716

crtc->flipq_event = NULL;

drivers/gpu/drm/i915/display/intel_dmc.c

1724

crtc->base.base.id, crtc->base.name);

drivers/gpu/drm/i915/display/intel_dmc.c

1727

crtc->base.base.id, crtc->base.name);

drivers/gpu/drm/i915/display/intel_dmc.c

1730

crtc->base.base.id, crtc->base.name);

drivers/gpu/drm/i915/display/intel_dmc.c

1736

crtc->base.base.id, crtc->base.name, int_vector);

drivers/gpu/drm/i915/display/intel_dmc.c

1739

void intel_pipedmc_enable_event(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_dmc.c

1742

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_dmc.c

1743

enum intel_dmc_id dmc_id = PIPE_TO_DMC_ID(crtc->pipe);

drivers/gpu/drm/i915/display/intel_dmc.c

1748

void intel_pipedmc_disable_event(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_dmc.c

1751

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_dmc.c

1752

enum intel_dmc_id dmc_id = PIPE_TO_DMC_ID(crtc->pipe);

drivers/gpu/drm/i915/display/intel_dmc.c

1757

u32 intel_pipedmc_start_mmioaddr(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_dmc.c

1759

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_dmc.c

1761

enum intel_dmc_id dmc_id = PIPE_TO_DMC_ID(crtc->pipe);

drivers/gpu/drm/i915/display/intel_dmc.c

1766

void intel_pipedmc_dcb_enable(struct intel_dsb *dsb, struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_dmc.c

1768

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_dmc.c

1769

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_dmc.c

1775

void intel_pipedmc_dcb_disable(struct intel_dsb *dsb, struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_dmc.c

1777

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_dmc.c

1778

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_dmc.c

782

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_dmc.c

783

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_dmc.c

817

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_dmc.c

818

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_dmc.h

45

void intel_pipedmc_dcb_enable(struct intel_dsb *dsb, struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_dmc.h

46

void intel_pipedmc_dcb_disable(struct intel_dsb *dsb, struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_dmc.h

48

u32 intel_pipedmc_start_mmioaddr(struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_dmc.h

49

void intel_pipedmc_enable_event(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_dmc.h

51

void intel_pipedmc_disable_event(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_dp.c

2584

const struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_dp.c

2617

crtc->base.base.id, crtc->base.name,

drivers/gpu/drm/i915/display/intel_dp.c

2773

struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);

drivers/gpu/drm/i915/display/intel_dp.c

2792

pipe_config->joiner_pipes = GENMASK(crtc->pipe + num_joined_pipes - 1, crtc->pipe);

drivers/gpu/drm/i915/display/intel_dp.c

3270

if (!conn_state->base.crtc)

drivers/gpu/drm/i915/display/intel_dp.c

3631

(for_get_ref && !new_conn_state->crtc) ||

drivers/gpu/drm/i915/display/intel_dp.c

3632

(!for_get_ref && !old_conn_state->crtc));

drivers/gpu/drm/i915/display/intel_dp.c

5538

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_dp.c

5543

crtc = to_intel_crtc(conn_state->crtc);

drivers/gpu/drm/i915/display/intel_dp.c

5544

if (!crtc)

drivers/gpu/drm/i915/display/intel_dp.c

5547

ret = drm_modeset_lock(&crtc->base.mutex, ctx);

drivers/gpu/drm/i915/display/intel_dp.c

5551

crtc_state = to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/intel_dp.c

5561

*pipe_mask |= BIT(crtc->pipe);

drivers/gpu/drm/i915/display/intel_dp.c

6385

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_dp.c

6398

crtc = to_intel_crtc(conn_state->crtc);

drivers/gpu/drm/i915/display/intel_dp.c

6400

if (!crtc)

drivers/gpu/drm/i915/display/intel_dp.c

6403

crtc_state = intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dp.c

6406

ret = drm_atomic_add_affected_planes(&state->base, &crtc->base);

drivers/gpu/drm/i915/display/intel_dp.c

6418

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_dp.c

6423

for_each_intel_crtc(display->drm, crtc) {

drivers/gpu/drm/i915/display/intel_dp.c

6427

crtc_state = intel_atomic_get_crtc_state(&state->base, crtc);

drivers/gpu/drm/i915/display/intel_dp.c

6439

ret = drm_atomic_add_affected_connectors(&state->base, &crtc->base);

drivers/gpu/drm/i915/display/intel_dp.c

6443

ret = drm_atomic_add_affected_planes(&state->base, &crtc->base);

drivers/gpu/drm/i915/display/intel_dp.c

6462

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_dp.c

6465

crtc = to_intel_crtc(old_conn_state->crtc);

drivers/gpu/drm/i915/display/intel_dp.c

6466

if (!crtc)

drivers/gpu/drm/i915/display/intel_dp.c

6469

old_crtc_state = intel_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dp_mst.c

1124

to_intel_crtc(pipe_config->uapi.crtc));

drivers/gpu/drm/i915/display/intel_dp_mst.c

1527

struct intel_crtc *crtc = to_intel_crtc(connector_state->crtc);

drivers/gpu/drm/i915/display/intel_dp_mst.c

1529

return &intel_dp->mst.stream_encoders[crtc->pipe]->base.base;

drivers/gpu/drm/i915/display/intel_dp_mst.c

1581

if (!encoder || !connector->base.state->crtc)

drivers/gpu/drm/i915/display/intel_dp_mst.c

1901

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_dp_mst.c

1913

mst_state->pending_crtc_mask |= drm_crtc_mask(&crtc->base);

drivers/gpu/drm/i915/display/intel_dp_mst.c

1928

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_dp_mst.c

1938

if (conn_state->crtc != &crtc->base)

drivers/gpu/drm/i915/display/intel_dp_mst.c

1941

ret = intel_dp_mst_add_topology_state_for_connector(state, connector, crtc);

drivers/gpu/drm/i915/display/intel_dp_mst.c

1951

const struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_dp_mst.c

1963

if (old_conn_state->crtc == &crtc->base ||

drivers/gpu/drm/i915/display/intel_dp_mst.c

1964

new_conn_state->crtc == &crtc->base)

drivers/gpu/drm/i915/display/intel_dp_mst.c

1983

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_dp_mst.c

1990

if (!intel_crtc_has_type(intel_atomic_get_new_crtc_state(state, crtc),

drivers/gpu/drm/i915/display/intel_dp_mst.c

1994

crtc_connector = get_connector_in_state_for_crtc(state, crtc);

drivers/gpu/drm/i915/display/intel_dp_mst.c

2008

!conn_state->crtc)

drivers/gpu/drm/i915/display/intel_dp_mst.c

2011

crtc_iter = to_intel_crtc(conn_state->crtc);

drivers/gpu/drm/i915/display/intel_dp_mst.c

524

const struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_dp_mst.c

534

crtc->base.base.id, crtc->base.name,

drivers/gpu/drm/i915/display/intel_dp_mst.c

541

crtc->base.base.id, crtc->base.name,

drivers/gpu/drm/i915/display/intel_dp_mst.c

564

crtc->base.base.id, crtc->base.name,

drivers/gpu/drm/i915/display/intel_dp_mst.c

604

struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);

drivers/gpu/drm/i915/display/intel_dp_mst.c

626

pipe_config->joiner_pipes = GENMASK(crtc->pipe + num_joined_pipes - 1, crtc->pipe);

drivers/gpu/drm/i915/display/intel_dp_mst.c

733

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_dp_mst.c

735

if (connector->mst.dp != mst_port || !conn_state->base.crtc)

drivers/gpu/drm/i915/display/intel_dp_mst.c

738

crtc = to_intel_crtc(conn_state->base.crtc);

drivers/gpu/drm/i915/display/intel_dp_mst.c

739

crtc_state = intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dp_mst.c

760

if (!conn_state->base.crtc)

drivers/gpu/drm/i915/display/intel_dp_mst.c

772

mask |= BIT(to_intel_crtc(conn_state->base.crtc)->pipe);

drivers/gpu/drm/i915/display/intel_dp_mst.c

783

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_dp_mst.c

790

for_each_intel_crtc_in_pipe_mask(display->drm, crtc, mst_pipe_mask) {

drivers/gpu/drm/i915/display/intel_dp_mst.c

792

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dp_mst.c

799

dsc_pipe_mask |= BIT(crtc->pipe);

drivers/gpu/drm/i915/display/intel_dp_mst.c

917

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_dp_mst.c

930

if (!conn_iter_state->base.crtc)

drivers/gpu/drm/i915/display/intel_dp_mst.c

933

crtc = to_intel_crtc(conn_iter_state->base.crtc);

drivers/gpu/drm/i915/display/intel_dp_mst.c

934

crtc_state = intel_atomic_get_crtc_state(&state->base, crtc);

drivers/gpu/drm/i915/display/intel_dp_mst.c

940

ret = drm_atomic_add_affected_planes(&state->base, &crtc->base);

drivers/gpu/drm/i915/display/intel_dp_mst.h

26

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_dp_mst.h

30

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_dp_test.c

226

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_dp_test.c

228

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_dp_test.c

418

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_dp_test.c

423

crtc = to_intel_crtc(conn_state->crtc);

drivers/gpu/drm/i915/display/intel_dp_test.c

424

if (!crtc)

drivers/gpu/drm/i915/display/intel_dp_test.c

427

ret = drm_modeset_lock(&crtc->base.mutex, ctx);

drivers/gpu/drm/i915/display/intel_dp_test.c

431

crtc_state = to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/intel_dp_test.c

443

*pipe_mask |= BIT(crtc->pipe);

drivers/gpu/drm/i915/display/intel_dp_test.c

455

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_dp_test.c

474

for_each_intel_crtc_in_pipe_mask(display->drm, crtc, pipe_mask) {

drivers/gpu/drm/i915/display/intel_dp_test.c

476

to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/intel_dp_tunnel.c

126

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_dp_tunnel.c

130

for_each_intel_crtc_in_pipe_mask(display->drm, crtc, pipe_mask) {

drivers/gpu/drm/i915/display/intel_dp_tunnel.c

132

to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/intel_dp_tunnel.c

141

crtc->base.base.id, crtc->base.name,

drivers/gpu/drm/i915/display/intel_dp_tunnel.c

142

crtc->pipe,

drivers/gpu/drm/i915/display/intel_dp_tunnel.c

339

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_dp_tunnel.c

342

pipe_mask |= BIT(crtc->pipe);

drivers/gpu/drm/i915/display/intel_dp_tunnel.c

361

get_inherited_tunnel(struct intel_atomic_state *state, struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_dp_tunnel.c

366

return state->inherited_dp_tunnels->ref[crtc->pipe].tunnel;

drivers/gpu/drm/i915/display/intel_dp_tunnel.c

372

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_dp_tunnel.c

377

old_tunnel = get_inherited_tunnel(state, crtc);

drivers/gpu/drm/i915/display/intel_dp_tunnel.c

389

drm_dp_tunnel_ref_get(tunnel, &state->inherited_dp_tunnels->ref[crtc->pipe]);

drivers/gpu/drm/i915/display/intel_dp_tunnel.c

416

if (!old_conn_state->base.crtc)

drivers/gpu/drm/i915/display/intel_dp_tunnel.c

419

old_crtc = to_intel_crtc(old_conn_state->base.crtc);

drivers/gpu/drm/i915/display/intel_dp_tunnel.c

487

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_dp_tunnel.c

490

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dp_tunnel.c

507

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_dp_tunnel.c

512

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dp_tunnel.c

522

crtc->base.base.id, crtc->base.name,

drivers/gpu/drm/i915/display/intel_dp_tunnel.c

551

if (old_conn_state->base.crtc) {

drivers/gpu/drm/i915/display/intel_dp_tunnel.c

553

to_intel_crtc(old_conn_state->base.crtc));

drivers/gpu/drm/i915/display/intel_dp_tunnel.c

558

if (new_conn_state->base.crtc &&

drivers/gpu/drm/i915/display/intel_dp_tunnel.c

559

new_conn_state->base.crtc != old_conn_state->base.crtc) {

drivers/gpu/drm/i915/display/intel_dp_tunnel.c

561

to_intel_crtc(new_conn_state->base.crtc));

drivers/gpu/drm/i915/display/intel_dp_tunnel.c

590

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_dp_tunnel.c

602

crtc->base.base.id, crtc->base.name,

drivers/gpu/drm/i915/display/intel_dp_tunnel.c

603

crtc->pipe,

drivers/gpu/drm/i915/display/intel_dp_tunnel.c

607

crtc->pipe, required_rate);

drivers/gpu/drm/i915/display/intel_dp_tunnel.c

630

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_dp_tunnel.c

638

crtc->pipe, 0);

drivers/gpu/drm/i915/display/intel_dp_tunnel.c

684

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_dp_tunnel.c

689

for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {

drivers/gpu/drm/i915/display/intel_dp_tunnel.c

698

tunnel = get_inherited_tunnel(state, crtc);

drivers/gpu/drm/i915/display/intel_dp_tunnel.c

740

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_dp_tunnel.c

744

for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {

drivers/gpu/drm/i915/display/intel_dp_tunnel.h

100

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_dp_tunnel.h

47

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_dpio_phy.c

1042

enum pipe pipe = to_intel_crtc(old_crtc_state->uapi.crtc)->pipe;

drivers/gpu/drm/i915/display/intel_dpio_phy.c

1134

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_dpio_phy.c

1137

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_dpio_phy.c

872

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_dpio_phy.c

875

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_dpll.c

1153

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_dpll.c

1157

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll.c

1166

ret = intel_dpll_compute(state, crtc, encoder);

drivers/gpu/drm/i915/display/intel_dpll.c

1182

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_dpll.c

1186

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll.c

1194

return intel_dpll_reserve(state, crtc, encoder);

drivers/gpu/drm/i915/display/intel_dpll.c

1198

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_dpll.c

1201

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll.c

1216

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_dpll.c

1219

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll.c

1354

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_dpll.c

1358

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll.c

1400

ret = intel_dpll_compute(state, crtc, NULL);

drivers/gpu/drm/i915/display/intel_dpll.c

1411

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_dpll.c

1414

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll.c

1420

return intel_dpll_reserve(state, crtc, NULL);

drivers/gpu/drm/i915/display/intel_dpll.c

1425

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_dpll.c

1431

if (crtc->pipe != PIPE_A)

drivers/gpu/drm/i915/display/intel_dpll.c

1451

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_dpll.c

1457

if (crtc->pipe != PIPE_A)

drivers/gpu/drm/i915/display/intel_dpll.c

1476

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_dpll.c

1479

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll.c

1503

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_dpll.c

1506

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll.c

1530

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_dpll.c

1534

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll.c

1579

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_dpll.c

1583

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll.c

1617

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_dpll.c

1621

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll.c

1657

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_dpll.c

1661

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll.c

1744

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_dpll.c

1748

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll.c

1759

ret = display->funcs.dpll->crtc_compute_clock(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll.c

1762

crtc->base.base.id, crtc->base.name);

drivers/gpu/drm/i915/display/intel_dpll.c

1770

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_dpll.c

1774

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll.c

1786

ret = display->funcs.dpll->crtc_get_dpll(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll.c

1789

crtc->base.base.id, crtc->base.name);

drivers/gpu/drm/i915/display/intel_dpll.c

1834

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_dpll.c

1836

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_dpll.c

1913

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_dpll.c

1915

enum dpio_channel ch = vlv_pipe_to_channel(crtc->pipe);

drivers/gpu/drm/i915/display/intel_dpll.c

1916

enum dpio_phy phy = vlv_pipe_to_phy(crtc->pipe);

drivers/gpu/drm/i915/display/intel_dpll.c

1917

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_dpll.c

1994

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_dpll.c

1996

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_dpll.c

2009

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_dpll.c

2011

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_dpll.c

2034

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_dpll.c

2036

enum dpio_channel ch = vlv_pipe_to_channel(crtc->pipe);

drivers/gpu/drm/i915/display/intel_dpll.c

2037

enum dpio_phy phy = vlv_pipe_to_phy(crtc->pipe);

drivers/gpu/drm/i915/display/intel_dpll.c

2123

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_dpll.c

2125

enum dpio_channel ch = vlv_pipe_to_channel(crtc->pipe);

drivers/gpu/drm/i915/display/intel_dpll.c

2126

enum dpio_phy phy = vlv_pipe_to_phy(crtc->pipe);

drivers/gpu/drm/i915/display/intel_dpll.c

2127

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_dpll.c

2155

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_dpll.c

2157

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_dpll.c

2213

struct intel_crtc *crtc = intel_crtc_for_pipe(display, pipe);

drivers/gpu/drm/i915/display/intel_dpll.c

2216

crtc_state = intel_crtc_state_alloc(crtc);

drivers/gpu/drm/i915/display/intel_dpll.c

2233

intel_crtc_destroy_state(&crtc->base, &crtc_state->uapi);

drivers/gpu/drm/i915/display/intel_dpll.c

2284

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_dpll.c

2285

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_dpll.c

31

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_dpll.c

33

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_dpll.c

391

void i9xx_dpll_get_hw_state(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_dpll.c

394

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_dpll.c

401

if (display->platform.cherryview && crtc->pipe != PIPE_A)

drivers/gpu/drm/i915/display/intel_dpll.c

402

tmp = display->state.chv_dpll_md[crtc->pipe];

drivers/gpu/drm/i915/display/intel_dpll.c

405

DPLL_MD(display, crtc->pipe));

drivers/gpu/drm/i915/display/intel_dpll.c

410

hw_state->dpll = intel_de_read(display, DPLL(display, crtc->pipe));

drivers/gpu/drm/i915/display/intel_dpll.c

413

hw_state->fp0 = intel_de_read(display, FP0(crtc->pipe));

drivers/gpu/drm/i915/display/intel_dpll.c

414

hw_state->fp1 = intel_de_read(display, FP1(crtc->pipe));

drivers/gpu/drm/i915/display/intel_dpll.c

427

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_dpll.c

482

lvds_pipe == crtc->pipe) {

drivers/gpu/drm/i915/display/intel_dpll.c

519

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_dpll.c

520

enum dpio_channel ch = vlv_pipe_to_channel(crtc->pipe);

drivers/gpu/drm/i915/display/intel_dpll.c

521

enum dpio_phy phy = vlv_pipe_to_phy(crtc->pipe);

drivers/gpu/drm/i915/display/intel_dpll.c

547

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_dpll.c

548

enum dpio_channel ch = vlv_pipe_to_channel(crtc->pipe);

drivers/gpu/drm/i915/display/intel_dpll.c

549

enum dpio_phy phy = vlv_pipe_to_phy(crtc->pipe);

drivers/gpu/drm/i915/display/intel_dpll.h

21

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_dpll.h

23

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_dpll.h

26

void i9xx_dpll_get_hw_state(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

1057

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

106

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

1061

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

1080

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

1083

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

1085

return intel_find_dpll(state, crtc,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

109

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

112

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

114

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

1166

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

1169

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

1172

if (drm_WARN_ON(crtc->base.dev, crtc_state->port_clock / 2 != 135000))

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

1183

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

1186

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

1188

return intel_find_dpll(state, crtc, &crtc_state->dpll_hw_state,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

1218

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

1222

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

1225

return hsw_ddi_wrpll_compute_dpll(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

1229

return hsw_ddi_spll_compute_dpll(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

1235

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

1239

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

1243

pll = hsw_ddi_wrpll_get_dpll(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

1247

pll = hsw_ddi_spll_get_dpll(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

1252

intel_reference_dpll(state, crtc,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

1938

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

1942

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

1953

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

1957

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

1961

pll = intel_find_dpll(state, crtc,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

1965

pll = intel_find_dpll(state, crtc,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

1973

intel_reference_dpll(state, crtc,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2434

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2438

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2449

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2454

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2463

crtc->base.base.id, crtc->base.name, pll->info->name);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2465

intel_reference_dpll(state, crtc,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

277

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

297

crtc->base.base.id, crtc->base.name);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

323

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3316

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3320

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3337

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3341

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3368

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

337

crtc->base.base.id, crtc->base.name))

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3371

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3373

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3414

port_dpll->pll = intel_find_dpll(state, crtc,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3420

intel_reference_dpll(state, crtc,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3423

icl_update_active_dpll(state, crtc, encoder);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3429

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

343

crtc->base.base.id, crtc->base.name);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3433

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3435

intel_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3467

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3471

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3478

port_dpll->pll = intel_find_dpll(state, crtc,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3483

intel_reference_dpll(state, crtc,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3488

port_dpll->pll = intel_find_dpll(state, crtc,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3495

intel_reference_dpll(state, crtc,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3498

icl_update_active_dpll(state, crtc, encoder);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3504

intel_unreference_dpll(state, crtc, port_dpll->pll);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3516

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3519

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3521

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3526

port_dpll->pll = intel_find_dpll(state, crtc,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3532

intel_reference_dpll(state, crtc,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3535

icl_update_active_dpll(state, crtc, encoder);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3541

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3545

return icl_compute_combo_phy_dpll(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3547

return icl_compute_tc_phy_dplls(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3555

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3559

return icl_get_combo_phy_dpll(state, crtc, encoder);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3561

return icl_get_tc_phy_dplls(state, crtc, encoder);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3569

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3572

intel_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3574

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3590

intel_unreference_dpll(state, crtc, old_port_dpll->pll);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

378

const struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

382

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

411

crtc->base.base.id, crtc->base.name,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

422

crtc->base.base.id, crtc->base.name,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

439

intel_dpll_crtc_get(const struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

443

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

445

drm_WARN_ON(display->drm, (dpll_state->pipe_mask & BIT(crtc->pipe)) != 0);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

447

dpll_state->pipe_mask |= BIT(crtc->pipe);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4473

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4477

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4496

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

450

crtc->base.base.id, crtc->base.name, pll->info->name);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4500

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4502

intel_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4528

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4532

return mtl_compute_tc_phy_dplls(state, crtc, encoder);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4534

return mtl_compute_non_tc_phy_dpll(state, crtc, encoder);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4538

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4542

return icl_get_tc_phy_dplls(state, crtc, encoder);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4544

return mtl_get_non_tc_phy_dpll(state, crtc, encoder);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

455

const struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4652

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

466

intel_dpll_crtc_get(crtc, pll, &dpll_state[pll->index]);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4661

return dpll_mgr->compute_dplls(state, crtc, encoder);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4685

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4694

return dpll_mgr->get_dplls(state, crtc, encoder);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4709

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4723

dpll_mgr->put_dplls(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4737

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4746

dpll_mgr->update_active_dpll(state, crtc, encoder);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

478

intel_dpll_crtc_put(const struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4785

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4793

for_each_intel_crtc(display->drm, crtc) {

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4795

to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4798

intel_dpll_crtc_get(crtc, pll, &pll->state);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

482

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

484

drm_WARN_ON(display->drm, (dpll_state->pipe_mask & BIT(crtc->pipe)) == 0);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

486

dpll_state->pipe_mask &= ~BIT(crtc->pipe);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

489

crtc->base.base.id, crtc->base.name, pll->info->name);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4900

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4921

if (!crtc) {

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

493

const struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4930

pipe_mask = BIT(crtc->pipe);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4935

pll->info->name, pipe_name(crtc->pipe), pll->active_mask);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4939

pll->info->name, pipe_name(crtc->pipe), pll->active_mask);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4967

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4971

intel_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4973

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4977

crtc, new_crtc_state);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4981

u8 pipe_mask = BIT(crtc->pipe);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4986

pll->info->name, pipe_name(crtc->pipe), pll->active_mask);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4993

pll->info->name, pipe_name(crtc->pipe), pll->state.pipe_mask);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

500

intel_dpll_crtc_put(crtc, pll, &dpll_state[pll->index]);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

504

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

507

intel_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

509

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

516

intel_unreference_dpll(state, crtc, old_crtc_state->intel_dpll);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

620

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

627

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

632

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

638

id = (enum intel_dpll_id) crtc->pipe;

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

643

crtc->base.base.id, crtc->base.name,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

646

pll = intel_find_dpll(state, crtc,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

656

intel_reference_dpll(state, crtc,

drivers/gpu/drm/i915/display/intel_dpll_mgr.h

417

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_dpll_mgr.h

420

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_dpll_mgr.h

423

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_dpll_mgr.h

424

void intel_dpll_crtc_put(const struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_dpll_mgr.h

430

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_dpll_mgr.h

457

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_dpt_common.c

12

void intel_dpt_configure(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_dpt_common.c

14

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_dpt_common.c

17

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_dpt_common.c

20

for_each_plane_id_on_crtc(crtc, plane_id) {

drivers/gpu/drm/i915/display/intel_dpt_common.h

11

void intel_dpt_configure(struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_drrs.c

101

&crtc->drrs.m2_n2 : &crtc->drrs.m_n);

drivers/gpu/drm/i915/display/intel_drrs.c

104

bool intel_drrs_is_active(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_drrs.c

106

return crtc->drrs.cpu_transcoder != INVALID_TRANSCODER;

drivers/gpu/drm/i915/display/intel_drrs.c

109

static void intel_drrs_set_state(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_drrs.c

112

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_drrs.c

114

if (refresh_rate == crtc->drrs.refresh_rate)

drivers/gpu/drm/i915/display/intel_drrs.c

117

if (intel_cpu_transcoder_has_m2_n2(display, crtc->drrs.cpu_transcoder))

drivers/gpu/drm/i915/display/intel_drrs.c

118

intel_drrs_set_refresh_rate_pipeconf(crtc, refresh_rate);

drivers/gpu/drm/i915/display/intel_drrs.c

120

intel_drrs_set_refresh_rate_m_n(crtc, refresh_rate);

drivers/gpu/drm/i915/display/intel_drrs.c

122

crtc->drrs.refresh_rate = refresh_rate;

drivers/gpu/drm/i915/display/intel_drrs.c

125

static void intel_drrs_schedule_work(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_drrs.c

127

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_drrs.c

129

mod_delayed_work(display->wq.unordered, &crtc->drrs.work, msecs_to_jiffies(1000));

drivers/gpu/drm/i915/display/intel_drrs.c

135

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_drrs.c

138

frontbuffer_bits = INTEL_FRONTBUFFER_ALL_MASK(crtc->pipe);

drivers/gpu/drm/i915/display/intel_drrs.c

140

for_each_intel_crtc_in_pipe_mask(display->drm, crtc,

drivers/gpu/drm/i915/display/intel_drrs.c

142

frontbuffer_bits |= INTEL_FRONTBUFFER_ALL_MASK(crtc->pipe);

drivers/gpu/drm/i915/display/intel_drrs.c

155

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_drrs.c

166

mutex_lock(&crtc->drrs.mutex);

drivers/gpu/drm/i915/display/intel_drrs.c

168

crtc->drrs.cpu_transcoder = crtc_state->cpu_transcoder;

drivers/gpu/drm/i915/display/intel_drrs.c

169

crtc->drrs.m_n = crtc_state->dp_m_n;

drivers/gpu/drm/i915/display/intel_drrs.c

170

crtc->drrs.m2_n2 = crtc_state->dp_m2_n2;

drivers/gpu/drm/i915/display/intel_drrs.c

171

crtc->drrs.frontbuffer_bits = intel_drrs_frontbuffer_bits(crtc_state);

drivers/gpu/drm/i915/display/intel_drrs.c

172

crtc->drrs.busy_frontbuffer_bits = 0;

drivers/gpu/drm/i915/display/intel_drrs.c

174

intel_drrs_schedule_work(crtc);

drivers/gpu/drm/i915/display/intel_drrs.c

176

mutex_unlock(&crtc->drrs.mutex);

drivers/gpu/drm/i915/display/intel_drrs.c

187

struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_drrs.c

198

mutex_lock(&crtc->drrs.mutex);

drivers/gpu/drm/i915/display/intel_drrs.c

200

if (intel_drrs_is_active(crtc))

drivers/gpu/drm/i915/display/intel_drrs.c

201

intel_drrs_set_state(crtc, DRRS_REFRESH_RATE_HIGH);

drivers/gpu/drm/i915/display/intel_drrs.c

203

crtc->drrs.cpu_transcoder = INVALID_TRANSCODER;

drivers/gpu/drm/i915/display/intel_drrs.c

204

crtc->drrs.frontbuffer_bits = 0;

drivers/gpu/drm/i915/display/intel_drrs.c

205

crtc->drrs.busy_frontbuffer_bits = 0;

drivers/gpu/drm/i915/display/intel_drrs.c

207

mutex_unlock(&crtc->drrs.mutex);

drivers/gpu/drm/i915/display/intel_drrs.c

209

cancel_delayed_work_sync(&crtc->drrs.work);

drivers/gpu/drm/i915/display/intel_drrs.c

214

struct intel_crtc *crtc = container_of(work, typeof(*crtc), drrs.work.work);

drivers/gpu/drm/i915/display/intel_drrs.c

216

mutex_lock(&crtc->drrs.mutex);

drivers/gpu/drm/i915/display/intel_drrs.c

218

if (intel_drrs_is_active(crtc) && !crtc->drrs.busy_frontbuffer_bits)

drivers/gpu/drm/i915/display/intel_drrs.c

219

intel_drrs_set_state(crtc, DRRS_REFRESH_RATE_LOW);

drivers/gpu/drm/i915/display/intel_drrs.c

221

mutex_unlock(&crtc->drrs.mutex);

drivers/gpu/drm/i915/display/intel_drrs.c

228

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_drrs.c

230

for_each_intel_crtc(display->drm, crtc) {

drivers/gpu/drm/i915/display/intel_drrs.c

233

mutex_lock(&crtc->drrs.mutex);

drivers/gpu/drm/i915/display/intel_drrs.c

235

frontbuffer_bits = all_frontbuffer_bits & crtc->drrs.frontbuffer_bits;

drivers/gpu/drm/i915/display/intel_drrs.c

237

mutex_unlock(&crtc->drrs.mutex);

drivers/gpu/drm/i915/display/intel_drrs.c

242

crtc->drrs.busy_frontbuffer_bits |= frontbuffer_bits;

drivers/gpu/drm/i915/display/intel_drrs.c

244

crtc->drrs.busy_frontbuffer_bits &= ~frontbuffer_bits;

drivers/gpu/drm/i915/display/intel_drrs.c

247

intel_drrs_set_state(crtc, DRRS_REFRESH_RATE_HIGH);

drivers/gpu/drm/i915/display/intel_drrs.c

253

if (!crtc->drrs.busy_frontbuffer_bits)

drivers/gpu/drm/i915/display/intel_drrs.c

254

intel_drrs_schedule_work(crtc);

drivers/gpu/drm/i915/display/intel_drrs.c

256

cancel_delayed_work(&crtc->drrs.work);

drivers/gpu/drm/i915/display/intel_drrs.c

258

mutex_unlock(&crtc->drrs.mutex);

drivers/gpu/drm/i915/display/intel_drrs.c

304

void intel_drrs_crtc_init(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_drrs.c

306

INIT_DELAYED_WORK(&crtc->drrs.work, intel_drrs_downclock_work);

drivers/gpu/drm/i915/display/intel_drrs.c

307

mutex_init(&crtc->drrs.mutex);

drivers/gpu/drm/i915/display/intel_drrs.c

308

crtc->drrs.cpu_transcoder = INVALID_TRANSCODER;

drivers/gpu/drm/i915/display/intel_drrs.c

313

struct intel_crtc *crtc = m->private;

drivers/gpu/drm/i915/display/intel_drrs.c

314

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_drrs.c

318

ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex);

drivers/gpu/drm/i915/display/intel_drrs.c

322

crtc_state = to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/intel_drrs.c

324

mutex_lock(&crtc->drrs.mutex);

drivers/gpu/drm/i915/display/intel_drrs.c

334

str_yes_no(intel_drrs_is_active(crtc)));

drivers/gpu/drm/i915/display/intel_drrs.c

337

crtc->drrs.refresh_rate == DRRS_REFRESH_RATE_LOW ?

drivers/gpu/drm/i915/display/intel_drrs.c

341

crtc->drrs.busy_frontbuffer_bits);

drivers/gpu/drm/i915/display/intel_drrs.c

343

mutex_unlock(&crtc->drrs.mutex);

drivers/gpu/drm/i915/display/intel_drrs.c

345

drm_modeset_unlock(&crtc->base.mutex);

drivers/gpu/drm/i915/display/intel_drrs.c

354

struct intel_crtc *crtc = data;

drivers/gpu/drm/i915/display/intel_drrs.c

355

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_drrs.c

360

ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex);

drivers/gpu/drm/i915/display/intel_drrs.c

364

crtc_state = to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/intel_drrs.c

385

drm_modeset_unlock(&crtc->base.mutex);

drivers/gpu/drm/i915/display/intel_drrs.c

393

void intel_drrs_crtc_debugfs_add(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_drrs.c

395

debugfs_create_file("i915_drrs_status", 0444, crtc->base.debugfs_entry,

drivers/gpu/drm/i915/display/intel_drrs.c

396

crtc, &intel_drrs_debugfs_status_fops);

drivers/gpu/drm/i915/display/intel_drrs.c

398

debugfs_create_file_unsafe("i915_drrs_ctl", 0644, crtc->base.debugfs_entry,

drivers/gpu/drm/i915/display/intel_drrs.c

399

crtc, &intel_drrs_debugfs_ctl_fops);

drivers/gpu/drm/i915/display/intel_drrs.c

79

intel_drrs_set_refresh_rate_pipeconf(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_drrs.c

82

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_drrs.c

83

enum transcoder cpu_transcoder = crtc->drrs.cpu_transcoder;

drivers/gpu/drm/i915/display/intel_drrs.c

96

intel_drrs_set_refresh_rate_m_n(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_drrs.c

99

intel_cpu_transcoder_set_m1_n1(crtc, crtc->drrs.cpu_transcoder,

drivers/gpu/drm/i915/display/intel_drrs.h

22

bool intel_drrs_is_active(struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_drrs.h

29

void intel_drrs_crtc_init(struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_drrs.h

30

void intel_drrs_crtc_debugfs_add(struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_dsb.c

1000

dsb_scanline_to_hw(state, crtc, dsb_dewake_scanline_start(state, crtc));

drivers/gpu/drm/i915/display/intel_dsb.c

1010

crtc->base.base.id, crtc->base.name, dsb_id);

drivers/gpu/drm/i915/display/intel_dsb.c

103

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_dsb.c

1031

struct intel_crtc *crtc = intel_crtc_for_pipe(display, pipe);

drivers/gpu/drm/i915/display/intel_dsb.c

1040

if (crtc->dsb_event) {

drivers/gpu/drm/i915/display/intel_dsb.c

1045

drm_crtc_accurate_vblank_count(&crtc->base);

drivers/gpu/drm/i915/display/intel_dsb.c

1047

drm_crtc_send_vblank_event(&crtc->base, crtc->dsb_event);

drivers/gpu/drm/i915/display/intel_dsb.c

1048

crtc->dsb_event = NULL;

drivers/gpu/drm/i915/display/intel_dsb.c

1057

crtc->base.base.id, crtc->base.name, dsb_id);

drivers/gpu/drm/i915/display/intel_dsb.c

106

intel_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dsb.c

1060

crtc->base.base.id, crtc->base.name, dsb_id);

drivers/gpu/drm/i915/display/intel_dsb.c

1063

crtc->base.base.id, crtc->base.name, dsb_id);

drivers/gpu/drm/i915/display/intel_dsb.c

1066

crtc->base.base.id, crtc->base.name, dsb_id);

drivers/gpu/drm/i915/display/intel_dsb.c

1069

crtc->base.base.id, crtc->base.name, dsb_id);

drivers/gpu/drm/i915/display/intel_dsb.c

108

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dsb.c

115

return old_crtc_state->vrr.enable && !intel_crtc_vrr_disabling(state, crtc);

drivers/gpu/drm/i915/display/intel_dsb.c

119

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_dsb.c

122

intel_pre_commit_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dsb.c

124

if (pre_commit_is_vrr_active(state, crtc))

drivers/gpu/drm/i915/display/intel_dsb.c

131

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_dsb.c

135

intel_pre_commit_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dsb.c

143

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_dsb.c

146

intel_pre_commit_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dsb.c

152

struct intel_crtc *crtc, int scanline)

drivers/gpu/drm/i915/display/intel_dsb.c

155

intel_pre_commit_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dsb.c

156

int vtotal = dsb_vtotal(state, crtc);

drivers/gpu/drm/i915/display/intel_dsb.c

172

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_dsb.c

174

if (pre_commit_is_vrr_active(state, crtc))

drivers/gpu/drm/i915/display/intel_dsb.c

185

struct intel_crtc *crtc = dsb->crtc;

drivers/gpu/drm/i915/display/intel_dsb.c

186

struct intel_display *display = to_intel_display(crtc->base.dev);

drivers/gpu/drm/i915/display/intel_dsb.c

191

crtc->base.base.id, crtc->base.name, dsb->id);

drivers/gpu/drm/i915/display/intel_dsb.c

196

struct intel_crtc *crtc = dsb->crtc;

drivers/gpu/drm/i915/display/intel_dsb.c

197

struct intel_display *display = to_intel_display(crtc->base.dev);

drivers/gpu/drm/i915/display/intel_dsb.c

205

struct intel_crtc *crtc = dsb->crtc;

drivers/gpu/drm/i915/display/intel_dsb.c

206

struct intel_display *display = to_intel_display(crtc->base.dev);

drivers/gpu/drm/i915/display/intel_dsb.c

210

crtc->base.base.id, crtc->base.name, dsb->id);

drivers/gpu/drm/i915/display/intel_dsb.c

30

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_dsb.c

385

struct intel_crtc *crtc = dsb->crtc;

drivers/gpu/drm/i915/display/intel_dsb.c

386

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_dsb.c

395

struct intel_crtc *crtc = dsb->crtc;

drivers/gpu/drm/i915/display/intel_dsb.c

396

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_dsb.c

438

struct intel_crtc *crtc = dsb->crtc;

drivers/gpu/drm/i915/display/intel_dsb.c

440

lower_in = dsb_scanline_to_hw(state, crtc, lower_in);

drivers/gpu/drm/i915/display/intel_dsb.c

441

upper_in = dsb_scanline_to_hw(state, crtc, upper_in);

drivers/gpu/drm/i915/display/intel_dsb.c

443

lower_out = dsb_scanline_to_hw(state, crtc, lower_out);

drivers/gpu/drm/i915/display/intel_dsb.c

444

upper_out = dsb_scanline_to_hw(state, crtc, upper_out);

drivers/gpu/drm/i915/display/intel_dsb.c

453

drm_WARN_ON(crtc->base.dev, 1); /* assert_dsl_ok() should have caught it already */

drivers/gpu/drm/i915/display/intel_dsb.c

460

struct intel_crtc *crtc = dsb->crtc;

drivers/gpu/drm/i915/display/intel_dsb.c

461

int vtotal = dsb_vtotal(state, crtc);

drivers/gpu/drm/i915/display/intel_dsb.c

467

drm_WARN(crtc->base.dev, (end - start + vtotal) % vtotal == vtotal - 1,

drivers/gpu/drm/i915/display/intel_dsb.c

469

crtc->base.base.id, crtc->base.name, dsb->id,

drivers/gpu/drm/i915/display/intel_dsb.c

499

struct intel_crtc *crtc = dsb->crtc;

drivers/gpu/drm/i915/display/intel_dsb.c

500

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_dsb.c

553

struct intel_crtc *crtc = dsb->crtc;

drivers/gpu/drm/i915/display/intel_dsb.c

554

struct intel_display *display = to_intel_display(crtc->base.dev);

drivers/gpu/drm/i915/display/intel_dsb.c

688

struct intel_crtc *crtc = dsb->crtc;

drivers/gpu/drm/i915/display/intel_dsb.c

690

intel_pre_commit_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dsb.c

707

if (pre_commit_is_vrr_active(state, crtc) && crtc_state->vrr.dc_balance.enable) {

drivers/gpu/drm/i915/display/intel_dsb.c

736

} else if (pre_commit_is_vrr_active(state, crtc)) {

drivers/gpu/drm/i915/display/intel_dsb.c

761

struct intel_crtc *crtc = dsb->crtc;

drivers/gpu/drm/i915/display/intel_dsb.c

762

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_dsb.c

774

dsb_chicken(state, crtc));

drivers/gpu/drm/i915/display/intel_dsb.c

781

int dewake_scanline = dsb_dewake_scanline_start(state, crtc);

drivers/gpu/drm/i915/display/intel_dsb.c

782

int hw_dewake_scanline = dsb_scanline_to_hw(state, crtc, dewake_scanline);

drivers/gpu/drm/i915/display/intel_dsb.c

808

dsb_dewake_scanline_start(state, crtc),

drivers/gpu/drm/i915/display/intel_dsb.c

809

dsb_dewake_scanline_end(state, crtc));

drivers/gpu/drm/i915/display/intel_dsb.c

815

intel_dsb_reg_write_masked(dsb, DSB_PMCTRL_2(crtc->pipe, dsb->id),

drivers/gpu/drm/i915/display/intel_dsb.c

832

struct intel_crtc *crtc = dsb->crtc;

drivers/gpu/drm/i915/display/intel_dsb.c

834

intel_pre_commit_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_dsb.c

839

if (pre_commit_is_vrr_active(state, crtc)) {

drivers/gpu/drm/i915/display/intel_dsb.c

876

struct intel_crtc *crtc = dsb->crtc;

drivers/gpu/drm/i915/display/intel_dsb.c

877

struct intel_display *display = to_intel_display(crtc->base.dev);

drivers/gpu/drm/i915/display/intel_dsb.c

878

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_dsb.c

885

crtc->base.base.id, crtc->base.name, dsb->id);

drivers/gpu/drm/i915/display/intel_dsb.c

910

struct intel_crtc *crtc = dsb->crtc;

drivers/gpu/drm/i915/display/intel_dsb.c

911

struct intel_display *display = to_intel_display(crtc->base.dev);

drivers/gpu/drm/i915/display/intel_dsb.c

912

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_dsb.c

927

crtc->base.base.id, crtc->base.name, dsb->id,

drivers/gpu/drm/i915/display/intel_dsb.c

961

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_dsb.c

995

dsb->crtc = crtc;

drivers/gpu/drm/i915/display/intel_dsb.c

998

dsb->chicken = dsb_chicken(state, crtc);

drivers/gpu/drm/i915/display/intel_dsb.h

32

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_dvo.c

293

struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);

drivers/gpu/drm/i915/display/intel_dvo.c

296

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_fbc.c

132

struct intel_crtc *crtc = intel_crtc_for_pipe(display, pipe);

drivers/gpu/drm/i915/display/intel_fbc.c

135

primary = to_intel_plane(crtc->base.primary);

drivers/gpu/drm/i915/display/intel_fbc.c

1441

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_fbc.c

1446

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_fbc.c

1542

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_fbc.c

1546

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_fbc.c

1557

if (!fbc || plane->pipe != crtc->pipe)

drivers/gpu/drm/i915/display/intel_fbc.c

1589

struct intel_crtc *crtc = to_intel_crtc(plane_state->hw.crtc);

drivers/gpu/drm/i915/display/intel_fbc.c

1638

crtc_state = intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_fbc.c

1744

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_fbc.c

1745

struct intel_plane *plane = to_intel_plane(crtc->base.primary);

drivers/gpu/drm/i915/display/intel_fbc.c

1764

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_fbc.c

1768

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_fbc.c

1809

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_fbc.c

1820

if (intel_fbc_can_flip_nuke(state, crtc, plane))

drivers/gpu/drm/i915/display/intel_fbc.c

1846

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_fbc.c

1856

if (!fbc || plane->pipe != crtc->pipe)

drivers/gpu/drm/i915/display/intel_fbc.c

1862

need_vblank_wait |= __intel_fbc_pre_update(state, crtc, plane);

drivers/gpu/drm/i915/display/intel_fbc.c

1907

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_fbc.c

1916

if (!fbc || plane->pipe != crtc->pipe)

drivers/gpu/drm/i915/display/intel_fbc.c

2024

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_fbc.c

2039

intel_fbc_update_state(state, crtc, plane);

drivers/gpu/drm/i915/display/intel_fbc.c

2072

intel_fbc_update_state(state, crtc, plane);

drivers/gpu/drm/i915/display/intel_fbc.c

2089

void intel_fbc_disable(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_fbc.c

2091

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_fbc.c

2097

if (!fbc || plane->pipe != crtc->pipe)

drivers/gpu/drm/i915/display/intel_fbc.c

2108

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_fbc.c

2111

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_fbc.c

2119

if (!fbc || plane->pipe != crtc->pipe)

drivers/gpu/drm/i915/display/intel_fbc.c

2129

__intel_fbc_enable(state, crtc, plane);

drivers/gpu/drm/i915/display/intel_fbc.c

2470

void intel_fbc_crtc_debugfs_add(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_fbc.c

2472

struct intel_plane *plane = to_intel_plane(crtc->base.primary);

drivers/gpu/drm/i915/display/intel_fbc.c

2475

intel_fbc_debugfs_add(plane->fbc, crtc->base.debugfs_entry);

drivers/gpu/drm/i915/display/intel_fbc.h

34

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_fbc.h

36

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_fbc.h

41

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_fbc.h

42

void intel_fbc_disable(struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_fbc.h

53

void intel_fbc_crtc_debugfs_add(struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_fbc.h

56

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_fbdev.c

378

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_fbdev.c

382

for_each_intel_crtc(display->drm, crtc) {

drivers/gpu/drm/i915/display/intel_fbdev.c

384

to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/intel_fbdev.c

386

to_intel_plane(crtc->base.primary);

drivers/gpu/drm/i915/display/intel_fbdev.c

394

crtc->base.base.id, crtc->base.name);

drivers/gpu/drm/i915/display/intel_fbdev.c

421

for_each_intel_crtc(display->drm, crtc) {

drivers/gpu/drm/i915/display/intel_fbdev.c

423

to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/intel_fbdev.c

425

to_intel_plane(crtc->base.primary);

drivers/gpu/drm/i915/display/intel_fbdev.c

431

crtc->base.base.id, crtc->base.name);

drivers/gpu/drm/i915/display/intel_fbdev.c

459

crtc->base.base.id, crtc->base.name,

drivers/gpu/drm/i915/display/intel_fbdev.c

491

for_each_intel_crtc(display->drm, crtc) {

drivers/gpu/drm/i915/display/intel_fbdev.c

493

to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/intel_fbdev.c

495

to_intel_plane(crtc->base.primary);

drivers/gpu/drm/i915/display/intel_fdi.c

1030

void ilk_fdi_pll_disable(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_fdi.c

1032

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_fdi.c

1033

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_fdi.c

1049

void ilk_fdi_disable(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_fdi.c

1051

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_fdi.c

1052

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_fdi.c

121

void intel_fdi_link_train(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_fdi.c

124

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_fdi.c

126

display->funcs.fdi->fdi_link_train(crtc, crtc_state);

drivers/gpu/drm/i915/display/intel_fdi.c

145

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_fdi.c

150

crtc = intel_crtc_for_pipe(display, PIPE_C);

drivers/gpu/drm/i915/display/intel_fdi.c

151

new_crtc_state = intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_fdi.c

158

old_crtc_state = intel_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_fdi.c

162

crtc = intel_crtc_for_pipe(display, PIPE_B);

drivers/gpu/drm/i915/display/intel_fdi.c

163

new_crtc_state = intel_atomic_get_crtc_state(&state->base, crtc);

drivers/gpu/drm/i915/display/intel_fdi.c

167

old_crtc_state = intel_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_fdi.c

25

void (*fdi_link_train)(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_fdi.c

295

int ilk_fdi_compute_config(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_fdi.c

298

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_fdi.c

328

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_fdi.c

332

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_fdi.c

336

ret = ilk_check_fdi_lanes(display, crtc->pipe, pipe_config,

drivers/gpu/drm/i915/display/intel_fdi.c

369

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_fdi.c

373

for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {

drivers/gpu/drm/i915/display/intel_fdi.c

381

ret = intel_fdi_atomic_check_bw(state, crtc, crtc_state, limits);

drivers/gpu/drm/i915/display/intel_fdi.c

417

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_fdi.c

419

switch (crtc->pipe) {

drivers/gpu/drm/i915/display/intel_fdi.c

434

MISSING_CASE(crtc->pipe);

drivers/gpu/drm/i915/display/intel_fdi.c

438

void intel_fdi_normal_train(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_fdi.c

440

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_fdi.c

441

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_fdi.c

478

static void ilk_fdi_link_train(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_fdi.c

481

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_fdi.c

482

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_fdi.c

579

static void gen6_fdi_link_train(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_fdi.c

582

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_fdi.c

583

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_fdi.c

714

static void ivb_manual_fdi_link_train(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_fdi.c

717

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_fdi.c

718

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_fdi.c

998

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_fdi.c

999

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_fdi.h

27

void intel_fdi_normal_train(struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_fdi.h

28

void ilk_fdi_disable(struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_fdi.h

37

void intel_fdi_link_train(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

158

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

164

crtc = intel_crtc_for_pipe(display, pipe);

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

166

if (crtc->cpu_fifo_underrun_disabled)

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

176

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

181

crtc = intel_crtc_for_pipe(display, pipe);

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

183

if (crtc->pch_fifo_underrun_disabled)

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

190

static void i9xx_check_fifo_underruns(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

192

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

193

i915_reg_t reg = PIPESTAT(display, crtc->pipe);

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

201

enable_mask = i915_pipestat_enable_mask(display, crtc->pipe);

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

205

trace_intel_cpu_fifo_underrun(display, crtc->pipe);

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

206

drm_err(display->drm, "pipe %c underrun\n", pipe_name(crtc->pipe));

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

242

static void ivb_check_fifo_underruns(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

244

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

245

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

306

static void cpt_check_pch_fifo_underruns(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

308

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

309

enum pipe pch_transcoder = crtc->pipe;

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

353

struct intel_crtc *crtc = intel_crtc_for_pipe(display, pipe);

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

358

old = !crtc->cpu_fifo_underrun_disabled;

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

359

crtc->cpu_fifo_underrun_disabled = !enable;

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

431

struct intel_crtc *crtc = intel_crtc_for_pipe(display, pch_transcoder);

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

446

old = !crtc->pch_fifo_underrun_disabled;

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

447

crtc->pch_fifo_underrun_disabled = !enable;

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

474

struct intel_crtc *crtc = intel_crtc_for_pipe(display, pipe);

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

477

if (crtc == NULL)

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

482

crtc->cpu_fifo_underrun_disabled)

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

527

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

531

for_each_intel_crtc(display->drm, crtc) {

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

532

if (crtc->cpu_fifo_underrun_disabled)

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

536

i9xx_check_fifo_underruns(crtc);

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

538

ivb_check_fifo_underruns(crtc);

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

554

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

558

for_each_intel_crtc(display->drm, crtc) {

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

559

if (crtc->pch_fifo_underrun_disabled)

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

563

cpt_check_pch_fifo_underruns(crtc);

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

570

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

573

crtc->cpu_fifo_underrun_disabled = !enable;

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

584

if (intel_has_pch_trancoder(display, crtc->pipe))

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

585

crtc->pch_fifo_underrun_disabled = !enable;

drivers/gpu/drm/i915/display/intel_fifo_underrun.h

16

struct intel_crtc *crtc, bool enable);

drivers/gpu/drm/i915/display/intel_flipq.c

102

struct intel_flipq *flipq = &crtc->flipq[flipq_id];

drivers/gpu/drm/i915/display/intel_flipq.c

104

flipq->start_mmioaddr = intel_pipedmc_start_mmioaddr(crtc) + intel_flipq_offset(flipq_id);

drivers/gpu/drm/i915/display/intel_flipq.c

108

crtc->base.base.id, crtc->base.name,

drivers/gpu/drm/i915/display/intel_flipq.c

130

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_flipq.c

134

for_each_intel_crtc(display->drm, crtc)

drivers/gpu/drm/i915/display/intel_flipq.c

135

intel_flipq_crtc_init(crtc);

drivers/gpu/drm/i915/display/intel_flipq.c

158

static void intel_flipq_preempt(struct intel_crtc *crtc, bool preempt)

drivers/gpu/drm/i915/display/intel_flipq.c

160

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_flipq.c

162

intel_de_rmw(display, PIPEDMC_FQ_CTRL(crtc->pipe),

drivers/gpu/drm/i915/display/intel_flipq.c

167

PIPEDMC_FQ_STATUS(crtc->pipe),

drivers/gpu/drm/i915/display/intel_flipq.c

171

crtc->base.base.id, crtc->base.name);

drivers/gpu/drm/i915/display/intel_flipq.c

174

static int intel_flipq_current_head(struct intel_crtc *crtc, enum intel_flipq_id flipq_id)

drivers/gpu/drm/i915/display/intel_flipq.c

176

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_flipq.c

178

return intel_de_read(display, PIPEDMC_FPQ_CHP(crtc->pipe, flipq_id));

drivers/gpu/drm/i915/display/intel_flipq.c

181

static void intel_flipq_write_tail(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_flipq.c

183

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_flipq.c

185

intel_de_write(display, PIPEDMC_FPQ_ATOMIC_TP(crtc->pipe),

drivers/gpu/drm/i915/display/intel_flipq.c

186

PIPEDMC_FPQ_PLANEQ_3_TP(crtc->flipq[INTEL_FLIPQ_PLANE_3].tail) |

drivers/gpu/drm/i915/display/intel_flipq.c

187

PIPEDMC_FPQ_PLANEQ_2_TP(crtc->flipq[INTEL_FLIPQ_PLANE_2].tail) |

drivers/gpu/drm/i915/display/intel_flipq.c

188

PIPEDMC_FPQ_PLANEQ_1_TP(crtc->flipq[INTEL_FLIPQ_PLANE_1].tail) |

drivers/gpu/drm/i915/display/intel_flipq.c

189

PIPEDMC_FPQ_FASTQ_TP(crtc->flipq[INTEL_FLIPQ_FAST].tail) |

drivers/gpu/drm/i915/display/intel_flipq.c

190

PIPEDMC_FPQ_GENERALQ_TP(crtc->flipq[INTEL_FLIPQ_GENERAL].tail));

drivers/gpu/drm/i915/display/intel_flipq.c

193

static void intel_flipq_sw_dmc_wake(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_flipq.c

195

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_flipq.c

197

intel_de_write(display, PIPEDMC_FPQ_CTL1(crtc->pipe), PIPEDMC_SW_DMC_WAKE);

drivers/gpu/drm/i915/display/intel_flipq.c

208

void intel_flipq_dump(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_flipq.c

211

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_flipq.c

212

struct intel_flipq *flipq = &crtc->flipq[flipq_id];

drivers/gpu/drm/i915/display/intel_flipq.c

217

crtc->base.base.id, crtc->base.name, flipq_id,

drivers/gpu/drm/i915/display/intel_flipq.c

228

crtc->base.base.id, crtc->base.name, flipq_id,

drivers/gpu/drm/i915/display/intel_flipq.c

229

intel_de_read(display, PIPEDMC_FPQ_CHP(crtc->pipe, flipq_id)),

drivers/gpu/drm/i915/display/intel_flipq.c

230

intel_de_read(display, PIPEDMC_FPQ_HP(crtc->pipe, flipq_id)));

drivers/gpu/drm/i915/display/intel_flipq.c

234

crtc->base.base.id, crtc->base.name, flipq_id,

drivers/gpu/drm/i915/display/intel_flipq.c

235

intel_flipq_current_head(crtc, flipq_id));

drivers/gpu/drm/i915/display/intel_flipq.c

239

crtc->base.base.id, crtc->base.name,

drivers/gpu/drm/i915/display/intel_flipq.c

240

intel_de_read(display, PIPEDMC_FPQ_TS(crtc->pipe)));

drivers/gpu/drm/i915/display/intel_flipq.c

242

tmp = intel_de_read(display, PIPEDMC_FPQ_ATOMIC_TP(crtc->pipe));

drivers/gpu/drm/i915/display/intel_flipq.c

246

crtc->base.base.id, crtc->base.name,

drivers/gpu/drm/i915/display/intel_flipq.c

256

struct intel_crtc *crtc = intel_crtc_for_pipe(display, pipe);

drivers/gpu/drm/i915/display/intel_flipq.c

265

struct intel_flipq *flipq = &crtc->flipq[flipq_id];

drivers/gpu/drm/i915/display/intel_flipq.c

287

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_flipq.c

293

u32 start_mmioaddr = intel_pipedmc_start_mmioaddr(crtc);

drivers/gpu/drm/i915/display/intel_flipq.c

302

intel_de_write(display, PIPEDMC_SCANLINECMPUPPER(crtc->pipe),

drivers/gpu/drm/i915/display/intel_flipq.c

304

intel_de_write(display, PIPEDMC_SCANLINECMPLOWER(crtc->pipe),

drivers/gpu/drm/i915/display/intel_flipq.c

308

intel_pipedmc_enable_event(crtc, flipq_event_id(display));

drivers/gpu/drm/i915/display/intel_flipq.c

310

intel_de_write(display, PIPEDMC_FQ_CTRL(crtc->pipe), PIPEDMC_FQ_CTRL_ENABLE);

drivers/gpu/drm/i915/display/intel_flipq.c

316

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_flipq.c

318

intel_flipq_preempt(crtc, true);

drivers/gpu/drm/i915/display/intel_flipq.c

320

intel_de_write(display, PIPEDMC_FQ_CTRL(crtc->pipe), 0);

drivers/gpu/drm/i915/display/intel_flipq.c

322

intel_pipedmc_disable_event(crtc, flipq_event_id(display));

drivers/gpu/drm/i915/display/intel_flipq.c

324

intel_de_write(display, PIPEDMC_SCANLINECMPLOWER(crtc->pipe), 0);

drivers/gpu/drm/i915/display/intel_flipq.c

325

intel_de_write(display, PIPEDMC_SCANLINECMPUPPER(crtc->pipe), 0);

drivers/gpu/drm/i915/display/intel_flipq.c

328

static bool assert_flipq_has_room(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_flipq.c

331

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_flipq.c

332

struct intel_flipq *flipq = &crtc->flipq[flipq_id];

drivers/gpu/drm/i915/display/intel_flipq.c

335

head = intel_flipq_current_head(crtc, flipq_id);

drivers/gpu/drm/i915/display/intel_flipq.c

340

crtc->base.base.id, crtc->base.name, flipq_id,

drivers/gpu/drm/i915/display/intel_flipq.c

421

void intel_flipq_add(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_flipq.c

427

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_flipq.c

428

struct intel_flipq *flipq = &crtc->flipq[flipq_id];

drivers/gpu/drm/i915/display/intel_flipq.c

430

if (!assert_flipq_has_room(crtc, flipq_id))

drivers/gpu/drm/i915/display/intel_flipq.c

433

pts += intel_de_read(display, PIPEDMC_FPQ_TS(crtc->pipe));

drivers/gpu/drm/i915/display/intel_flipq.c

435

intel_flipq_preempt(crtc, true);

drivers/gpu/drm/i915/display/intel_flipq.c

443

intel_flipq_write_tail(crtc);

drivers/gpu/drm/i915/display/intel_flipq.c

445

intel_flipq_preempt(crtc, false);

drivers/gpu/drm/i915/display/intel_flipq.c

447

intel_flipq_sw_dmc_wake(crtc);

drivers/gpu/drm/i915/display/intel_flipq.c

458

void intel_flipq_wait_dmc_halt(struct intel_dsb *dsb, struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_flipq.c

460

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_flipq.c

466

void intel_flipq_unhalt_dmc(struct intel_dsb *dsb, struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_flipq.c

468

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_flipq.c

471

intel_dsb_reg_write(dsb, PIPEDMC_CTL(crtc->pipe), 0);

drivers/gpu/drm/i915/display/intel_flipq.c

96

static void intel_flipq_crtc_init(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_flipq.c

98

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_flipq.h

26

void intel_flipq_add(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_flipq.h

32

void intel_flipq_wait_dmc_halt(struct intel_dsb *dsb, struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_flipq.h

33

void intel_flipq_unhalt_dmc(struct intel_dsb *dsb, struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_flipq.h

34

void intel_flipq_dump(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_global_state.c

141

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_global_state.c

143

for_each_intel_crtc(display->drm, crtc)

drivers/gpu/drm/i915/display/intel_global_state.c

144

drm_modeset_lock_assert_held(&crtc->base.mutex);

drivers/gpu/drm/i915/display/intel_global_state.c

164

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_global_state.c

166

for_each_intel_crtc(display->drm, crtc) {

drivers/gpu/drm/i915/display/intel_global_state.c

167

if (modeset_lock_is_held(ctx, &crtc->base.mutex))

drivers/gpu/drm/i915/display/intel_global_state.c

302

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_global_state.c

304

for_each_intel_crtc(display->drm, crtc) {

drivers/gpu/drm/i915/display/intel_global_state.c

307

ret = drm_modeset_lock(&crtc->base.mutex,

drivers/gpu/drm/i915/display/intel_global_state.c

335

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_global_state.c

337

for_each_intel_crtc(display->drm, crtc)

drivers/gpu/drm/i915/display/intel_global_state.c

338

if (!intel_atomic_get_new_crtc_state(state, crtc))

drivers/gpu/drm/i915/display/intel_hdcp.c

2684

if (!new_state->crtc) {

drivers/gpu/drm/i915/display/intel_hdcp.c

2696

new_state->crtc);

drivers/gpu/drm/i915/display/intel_hdcp.c

2833

struct drm_crtc *crtc;

drivers/gpu/drm/i915/display/intel_hdcp.c

2843

crtc = connector->base.state->crtc;

drivers/gpu/drm/i915/display/intel_hdcp.c

2844

if (connector->base.status != connector_status_connected || !crtc) {

drivers/gpu/drm/i915/display/intel_hdmi.c

1008

reg = VLV_TVIDEO_DIP_GCP(crtc->pipe);

drivers/gpu/drm/i915/display/intel_hdmi.c

1010

reg = TVIDEO_DIP_GCP(crtc->pipe);

drivers/gpu/drm/i915/display/intel_hdmi.c

1023

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_hdmi.c

1033

reg = VLV_TVIDEO_DIP_GCP(crtc->pipe);

drivers/gpu/drm/i915/display/intel_hdmi.c

1035

reg = TVIDEO_DIP_GCP(crtc->pipe);

drivers/gpu/drm/i915/display/intel_hdmi.c

1070

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_hdmi.c

1073

i915_reg_t reg = TVIDEO_DIP_CTL(crtc->pipe);

drivers/gpu/drm/i915/display/intel_hdmi.c

1129

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_hdmi.c

1131

i915_reg_t reg = TVIDEO_DIP_CTL(crtc->pipe);

drivers/gpu/drm/i915/display/intel_hdmi.c

1178

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_hdmi.c

1180

i915_reg_t reg = VLV_TVIDEO_DIP_CTL(crtc->pipe);

drivers/gpu/drm/i915/display/intel_hdmi.c

1517

struct intel_crtc *crtc = to_intel_crtc(connector->base.state->crtc);

drivers/gpu/drm/i915/display/intel_hdmi.c

1523

PIPEDSL(display, crtc->pipe));

drivers/gpu/drm/i915/display/intel_hdmi.c

2101

if (connector_state->base.crtc != crtc_state->uapi.crtc)

drivers/gpu/drm/i915/display/intel_hdmi.c

301

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_hdmi.c

302

i915_reg_t reg = TVIDEO_DIP_CTL(crtc->pipe);

drivers/gpu/drm/i915/display/intel_hdmi.c

317

intel_de_write(display, TVIDEO_DIP_DATA(crtc->pipe),

drivers/gpu/drm/i915/display/intel_hdmi.c

323

intel_de_write(display, TVIDEO_DIP_DATA(crtc->pipe), 0);

drivers/gpu/drm/i915/display/intel_hdmi.c

339

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_hdmi.c

343

intel_de_rmw(display, TVIDEO_DIP_CTL(crtc->pipe),

drivers/gpu/drm/i915/display/intel_hdmi.c

347

*data++ = intel_de_read(display, TVIDEO_DIP_DATA(crtc->pipe));

drivers/gpu/drm/i915/display/intel_hdmi.c

354

enum pipe pipe = to_intel_crtc(pipe_config->uapi.crtc)->pipe;

drivers/gpu/drm/i915/display/intel_hdmi.c

376

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_hdmi.c

377

i915_reg_t reg = TVIDEO_DIP_CTL(crtc->pipe);

drivers/gpu/drm/i915/display/intel_hdmi.c

395

intel_de_write(display, TVIDEO_DIP_DATA(crtc->pipe),

drivers/gpu/drm/i915/display/intel_hdmi.c

401

intel_de_write(display, TVIDEO_DIP_DATA(crtc->pipe), 0);

drivers/gpu/drm/i915/display/intel_hdmi.c

417

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_hdmi.c

421

intel_de_rmw(display, TVIDEO_DIP_CTL(crtc->pipe),

drivers/gpu/drm/i915/display/intel_hdmi.c

425

*data++ = intel_de_read(display, TVIDEO_DIP_DATA(crtc->pipe));

drivers/gpu/drm/i915/display/intel_hdmi.c

432

enum pipe pipe = to_intel_crtc(pipe_config->uapi.crtc)->pipe;

drivers/gpu/drm/i915/display/intel_hdmi.c

450

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_hdmi.c

451

i915_reg_t reg = VLV_TVIDEO_DIP_CTL(crtc->pipe);

drivers/gpu/drm/i915/display/intel_hdmi.c

467

VLV_TVIDEO_DIP_DATA(crtc->pipe), *data);

drivers/gpu/drm/i915/display/intel_hdmi.c

473

VLV_TVIDEO_DIP_DATA(crtc->pipe), 0);

drivers/gpu/drm/i915/display/intel_hdmi.c

489

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_hdmi.c

493

intel_de_rmw(display, VLV_TVIDEO_DIP_CTL(crtc->pipe),

drivers/gpu/drm/i915/display/intel_hdmi.c

498

VLV_TVIDEO_DIP_DATA(crtc->pipe));

drivers/gpu/drm/i915/display/intel_hdmi.c

505

enum pipe pipe = to_intel_crtc(pipe_config->uapi.crtc)->pipe;

drivers/gpu/drm/i915/display/intel_hdmi.c

998

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_initial_plane.c

125

plane_state->uapi.crtc = &crtc->base;

drivers/gpu/drm/i915/display/intel_initial_plane.c

126

intel_plane_copy_uapi_to_hw_state(plane_state, plane_state, crtc);

drivers/gpu/drm/i915/display/intel_initial_plane.c

14

void intel_initial_plane_vblank_wait(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_initial_plane.c

140

intel_plane_disable_noatomic(crtc, plane);

drivers/gpu/drm/i915/display/intel_initial_plane.c

16

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_initial_plane.c

162

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_initial_plane.c

164

for_each_intel_crtc(display->drm, crtc) {

drivers/gpu/drm/i915/display/intel_initial_plane.c

166

to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/intel_initial_plane.c

168

&plane_configs[crtc->pipe];

drivers/gpu/drm/i915/display/intel_initial_plane.c

18

display->parent->initial_plane->vblank_wait(&crtc->base);

drivers/gpu/drm/i915/display/intel_initial_plane.c

180

display->funcs.display->get_initial_plane_config(crtc, plane_config);

drivers/gpu/drm/i915/display/intel_initial_plane.c

186

intel_find_initial_plane_obj(crtc, plane_configs);

drivers/gpu/drm/i915/display/intel_initial_plane.c

188

if (display->funcs.display->fixup_initial_plane_config(crtc, plane_config))

drivers/gpu/drm/i915/display/intel_initial_plane.c

189

intel_initial_plane_vblank_wait(crtc);

drivers/gpu/drm/i915/display/intel_initial_plane.c

26

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_initial_plane.c

28

for_each_intel_crtc(display->drm, crtc) {

drivers/gpu/drm/i915/display/intel_initial_plane.c

30

to_intel_plane(crtc->base.primary);

drivers/gpu/drm/i915/display/intel_initial_plane.c

34

to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/intel_initial_plane.c

42

if (plane_configs[this->pipe].base == plane_configs[crtc->pipe].base)

drivers/gpu/drm/i915/display/intel_initial_plane.c

71

intel_find_initial_plane_obj(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_initial_plane.c

74

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_initial_plane.c

75

struct intel_initial_plane_config *plane_config = &plane_configs[crtc->pipe];

drivers/gpu/drm/i915/display/intel_initial_plane.c

76

struct intel_plane *plane = to_intel_plane(crtc->base.primary);

drivers/gpu/drm/i915/display/intel_initial_plane.c

96

other_plane_state = intel_reuse_initial_plane_obj(crtc, plane_configs);

drivers/gpu/drm/i915/display/intel_initial_plane.h

13

void intel_initial_plane_vblank_wait(struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_link_bw.c

108

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_link_bw.c

111

for_each_intel_crtc_in_pipe_mask(display->drm, crtc, pipe_mask) {

drivers/gpu/drm/i915/display/intel_link_bw.c

115

if (limits->bpp_limit_reached_pipes & BIT(crtc->pipe))

drivers/gpu/drm/i915/display/intel_link_bw.c

119

crtc);

drivers/gpu/drm/i915/display/intel_link_bw.c

135

link_bpp_x16 <= get_forced_link_bpp_x16(state, crtc))

drivers/gpu/drm/i915/display/intel_link_bw.c

140

max_bpp_pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_link_bw.c

26

const struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_link_bw.c

34

if (conn_state->base.crtc != &crtc->base)

drivers/gpu/drm/i915/display/intel_link_bw.c

62

struct intel_crtc *crtc = intel_crtc_for_pipe(display, pipe);

drivers/gpu/drm/i915/display/intel_link_bw.c

64

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_link_bw.c

65

int forced_bpp_x16 = get_forced_link_bpp_x16(state, crtc);

drivers/gpu/drm/i915/display/intel_load_detect.c

106

crtc = possible_crtc;

drivers/gpu/drm/i915/display/intel_load_detect.c

113

if (!crtc) {

drivers/gpu/drm/i915/display/intel_load_detect.c

140

ret = drm_atomic_set_crtc_for_connector(connector_state, &crtc->base);

drivers/gpu/drm/i915/display/intel_load_detect.c

144

crtc_state = intel_atomic_get_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_load_detect.c

157

ret = intel_modeset_disable_planes(state, &crtc->base);

drivers/gpu/drm/i915/display/intel_load_detect.c

163

ret = PTR_ERR_OR_ZERO(drm_atomic_get_crtc_state(restore_state, &crtc->base));

drivers/gpu/drm/i915/display/intel_load_detect.c

165

ret = drm_atomic_add_affected_planes(restore_state, &crtc->base);

drivers/gpu/drm/i915/display/intel_load_detect.c

183

intel_crtc_wait_for_next_vblank(crtc);

drivers/gpu/drm/i915/display/intel_load_detect.c

24

struct drm_crtc *crtc)

drivers/gpu/drm/i915/display/intel_load_detect.c

30

ret = drm_atomic_add_affected_planes(state, crtc);

drivers/gpu/drm/i915/display/intel_load_detect.c

35

if (plane_state->crtc != crtc)

drivers/gpu/drm/i915/display/intel_load_detect.c

56

struct intel_crtc *crtc = NULL;

drivers/gpu/drm/i915/display/intel_load_detect.c

80

if (connector->state->crtc) {

drivers/gpu/drm/i915/display/intel_load_detect.c

81

crtc = to_intel_crtc(connector->state->crtc);

drivers/gpu/drm/i915/display/intel_load_detect.c

83

ret = drm_modeset_lock(&crtc->base.mutex, ctx);

drivers/gpu/drm/i915/display/intel_lt_phy.c

2263

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_lt_phy.c

2268

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_lt_phy.c

2293

crtc->base.base.id, crtc->base.name,

drivers/gpu/drm/i915/display/intel_lt_phy.c

2297

crtc->base.base.id, crtc->base.name,

drivers/gpu/drm/i915/display/intel_lt_phy.h

37

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_lvds.c

245

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_lvds.c

247

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_lvds.c

425

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_lvds.c

430

if (DISPLAY_VER(display) < 4 && crtc->pipe == 0) {

drivers/gpu/drm/i915/display/intel_modeset_setup.c

1001

to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

1006

intel_modeset_put_crtc_power_domains(crtc, &put_domains);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

108

if (conn_state->crtc)

drivers/gpu/drm/i915/display/intel_modeset_setup.c

113

conn_state->crtc = encoder->base.crtc;

drivers/gpu/drm/i915/display/intel_modeset_setup.c

117

conn_state->crtc = NULL;

drivers/gpu/drm/i915/display/intel_modeset_setup.c

146

static void reset_crtc_encoder_state(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_modeset_setup.c

148

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

151

for_each_encoder_on_crtc(display->drm, &crtc->base, encoder) {

drivers/gpu/drm/i915/display/intel_modeset_setup.c

153

encoder->base.crtc = NULL;

drivers/gpu/drm/i915/display/intel_modeset_setup.c

157

static void intel_crtc_disable_noatomic_complete(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_modeset_setup.c

159

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

163

to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

164

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_modeset_setup.c

168

intel_crtc_state_reset(crtc_state, crtc);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

170

reset_crtc_encoder_state(crtc);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

172

intel_fbc_disable(crtc);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

175

intel_display_power_put_all_in_set(display, &crtc->enabled_power_domains);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

177

intel_cdclk_crtc_disable_noatomic(crtc);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

178

skl_wm_crtc_disable_noatomic(crtc);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

179

intel_bw_crtc_disable_noatomic(crtc);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

180

intel_dbuf_bw_crtc_disable_noatomic(crtc);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

216

static void get_portsync_pipes(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_modeset_setup.c

219

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

221

to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

227

*master_pipe_mask = BIT(crtc->pipe);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

261

static void intel_crtc_disable_noatomic(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_modeset_setup.c

264

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

271

get_portsync_pipes(crtc, &portsync_master_mask, &portsync_slaves_mask);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

311

struct intel_crtc *crtc =

drivers/gpu/drm/i915/display/intel_modeset_setup.c

312

to_intel_crtc(encoder->base.crtc);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

314

to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

331

drm_WARN_ON(crtc_state->uapi.crtc->dev,

drivers/gpu/drm/i915/display/intel_modeset_setup.c

373

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_modeset_setup.c

378

for_each_intel_crtc(display->drm, crtc) {

drivers/gpu/drm/i915/display/intel_modeset_setup.c

380

to_intel_plane(crtc->base.primary);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

387

if (pipe == crtc->pipe)

drivers/gpu/drm/i915/display/intel_modeset_setup.c

399

static bool intel_crtc_has_encoders(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_modeset_setup.c

40

static void intel_crtc_disable_noatomic_begin(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_modeset_setup.c

401

struct drm_device *dev = crtc->base.dev;

drivers/gpu/drm/i915/display/intel_modeset_setup.c

404

for_each_encoder_on_crtc(dev, &crtc->base, encoder)

drivers/gpu/drm/i915/display/intel_modeset_setup.c

410

static bool intel_crtc_needs_link_reset(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_modeset_setup.c

412

struct drm_device *dev = crtc->base.dev;

drivers/gpu/drm/i915/display/intel_modeset_setup.c

415

for_each_encoder_on_crtc(dev, &crtc->base, encoder) {

drivers/gpu/drm/i915/display/intel_modeset_setup.c

43

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

447

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

45

to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

462

intel_init_fifo_underrun_reporting(display, crtc,

drivers/gpu/drm/i915/display/intel_modeset_setup.c

467

static bool intel_sanitize_crtc(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_modeset_setup.c

470

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

471

struct intel_crtc_state *crtc_state = to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

478

for_each_intel_plane_on_crtc(display->drm, crtc, plane) {

drivers/gpu/drm/i915/display/intel_modeset_setup.c

484

intel_plane_disable_noatomic(crtc, plane);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

49

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_modeset_setup.c

496

needs_link_reset = intel_crtc_needs_link_reset(crtc);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

502

if (!needs_link_reset && intel_crtc_has_encoders(crtc))

drivers/gpu/drm/i915/display/intel_modeset_setup.c

505

intel_crtc_disable_noatomic(crtc, ctx);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

522

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_modeset_setup.c

534

for_each_intel_crtc(display->drm, crtc) {

drivers/gpu/drm/i915/display/intel_modeset_setup.c

535

u32 crtc_mask = drm_crtc_mask(&crtc->base);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

54

for_each_intel_plane_on_crtc(display->drm, crtc, plane) {

drivers/gpu/drm/i915/display/intel_modeset_setup.c

540

if (intel_sanitize_crtc(crtc, ctx))

drivers/gpu/drm/i915/display/intel_modeset_setup.c

547

for_each_intel_crtc(display->drm, crtc) {

drivers/gpu/drm/i915/display/intel_modeset_setup.c

549

to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

579

struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

580

struct intel_crtc_state *crtc_state = crtc ?

drivers/gpu/drm/i915/display/intel_modeset_setup.c

581

to_intel_crtc_state(crtc->base.state) : NULL;

drivers/gpu/drm/i915/display/intel_modeset_setup.c

59

intel_plane_disable_noatomic(crtc, plane);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

596

pipe_name(crtc->pipe));

drivers/gpu/drm/i915/display/intel_modeset_setup.c

638

encoder->base.crtc = NULL;

drivers/gpu/drm/i915/display/intel_modeset_setup.c

66

crtc->base.base.id, crtc->base.name);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

661

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_modeset_setup.c

672

crtc = intel_crtc_for_pipe(display, pipe);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

673

crtc_state = to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

683

for_each_intel_crtc(display->drm, crtc) {

drivers/gpu/drm/i915/display/intel_modeset_setup.c

685

to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

696

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_modeset_setup.c

701

for_each_intel_crtc(display->drm, crtc) {

drivers/gpu/drm/i915/display/intel_modeset_setup.c

703

to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

707

intel_crtc_state_reset(crtc_state, crtc);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

713

crtc->base.enabled = crtc_state->hw.enable;

drivers/gpu/drm/i915/display/intel_modeset_setup.c

714

crtc->active = crtc_state->hw.active;

drivers/gpu/drm/i915/display/intel_modeset_setup.c

718

crtc->base.base.id, crtc->base.name,

drivers/gpu/drm/i915/display/intel_modeset_setup.c

730

crtc = intel_crtc_for_pipe(display, pipe);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

731

crtc_state = to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

733

encoder->base.crtc = &crtc->base;

drivers/gpu/drm/i915/display/intel_modeset_setup.c

760

encoder->base.crtc = NULL;

drivers/gpu/drm/i915/display/intel_modeset_setup.c

769

str_enabled_disabled(encoder->base.crtc),

drivers/gpu/drm/i915/display/intel_modeset_setup.c

780

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_modeset_setup.c

787

crtc = to_intel_crtc(encoder->base.crtc);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

788

crtc_state = crtc ? to_intel_crtc_state(crtc->base.state) : NULL;

drivers/gpu/drm/i915/display/intel_modeset_setup.c

816

for_each_intel_crtc(display->drm, crtc) {

drivers/gpu/drm/i915/display/intel_modeset_setup.c

818

to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

839

for_each_intel_plane_on_crtc(display->drm, crtc, plane) {

drivers/gpu/drm/i915/display/intel_modeset_setup.c

86

display->funcs.display->crtc_disable(to_intel_atomic_state(state), crtc);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

871

crtc->base.base.id, crtc->base.name, crtc_state->min_cdclk);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

903

if (!encoder->base.crtc)

drivers/gpu/drm/i915/display/intel_modeset_setup.c

906

crtc_state = to_intel_crtc_state(encoder->base.crtc->state);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

92

crtc->base.base.id, crtc->base.name);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

94

crtc->active = false;

drivers/gpu/drm/i915/display/intel_modeset_setup.c

942

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_modeset_setup.c

95

crtc->base.enabled = false;

drivers/gpu/drm/i915/display/intel_modeset_setup.c

963

for_each_intel_crtc(display->drm, crtc) {

drivers/gpu/drm/i915/display/intel_modeset_setup.c

965

to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

969

drm_crtc_vblank_reset(&crtc->base);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

98

intel_dpll_crtc_put(crtc,

drivers/gpu/drm/i915/display/intel_modeset_setup.c

999

for_each_intel_crtc(display->drm, crtc) {

drivers/gpu/drm/i915/display/intel_modeset_verify.c

141

new_conn_state->crtc != encoder->base.crtc,

drivers/gpu/drm/i915/display/intel_modeset_verify.c

148

INTEL_DISPLAY_STATE_WARN(display, !!encoder->base.crtc != enabled,

drivers/gpu/drm/i915/display/intel_modeset_verify.c

150

!!encoder->base.crtc, enabled);

drivers/gpu/drm/i915/display/intel_modeset_verify.c

152

if (!encoder->base.crtc) {

drivers/gpu/drm/i915/display/intel_modeset_verify.c

165

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_modeset_verify.c

169

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_modeset_verify.c

174

hw_crtc_state = intel_crtc_state_alloc(crtc);

drivers/gpu/drm/i915/display/intel_modeset_verify.c

178

drm_dbg_kms(display->drm, "[CRTC:%d:%s]\n", crtc->base.base.id,

drivers/gpu/drm/i915/display/intel_modeset_verify.c

179

crtc->base.name);

drivers/gpu/drm/i915/display/intel_modeset_verify.c

194

INTEL_DISPLAY_STATE_WARN(display, crtc->active != sw_crtc_state->hw.active,

drivers/gpu/drm/i915/display/intel_modeset_verify.c

196

sw_crtc_state->hw.active, crtc->active);

drivers/gpu/drm/i915/display/intel_modeset_verify.c

231

intel_crtc_destroy_state(&crtc->base, &hw_crtc_state->uapi);

drivers/gpu/drm/i915/display/intel_modeset_verify.c

235

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_modeset_verify.c

238

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_modeset_verify.c

244

intel_wm_state_verify(state, crtc);

drivers/gpu/drm/i915/display/intel_modeset_verify.c

245

verify_connector_state(state, crtc);

drivers/gpu/drm/i915/display/intel_modeset_verify.c

246

verify_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_modeset_verify.c

247

intel_dpll_state_verify(state, crtc);

drivers/gpu/drm/i915/display/intel_modeset_verify.c

248

intel_mpllb_state_verify(state, crtc);

drivers/gpu/drm/i915/display/intel_modeset_verify.c

249

intel_lt_phy_pll_state_verify(state, crtc);

drivers/gpu/drm/i915/display/intel_modeset_verify.c

56

INTEL_DISPLAY_STATE_WARN(display, conn_state->crtc != encoder->base.crtc,

drivers/gpu/drm/i915/display/intel_modeset_verify.c

68

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_modeset_verify.c

79

if (new_conn_state->crtc != &crtc->base)

drivers/gpu/drm/i915/display/intel_modeset_verify.c

82

if (crtc)

drivers/gpu/drm/i915/display/intel_modeset_verify.c

83

crtc_state = intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_modeset_verify.h

13

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_overlay.c

1125

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_overlay.c

1146

crtc = to_intel_crtc(drmmode_crtc);

drivers/gpu/drm/i915/display/intel_overlay.c

1165

if (overlay->crtc != crtc) {

drivers/gpu/drm/i915/display/intel_overlay.c

1170

ret = check_overlay_possible_on_crtc(overlay, crtc);

drivers/gpu/drm/i915/display/intel_overlay.c

1174

overlay->crtc = crtc;

drivers/gpu/drm/i915/display/intel_overlay.c

1175

crtc->overlay = overlay;

drivers/gpu/drm/i915/display/intel_overlay.c

1178

if (drm_rect_width(&crtc->config->pipe_src) > 1024 &&

drivers/gpu/drm/i915/display/intel_overlay.c

1179

crtc->config->gmch_pfit.control & PFIT_ENABLE) {

drivers/gpu/drm/i915/display/intel_overlay.c

193

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_overlay.c

296

enum pipe pipe = overlay->crtc->pipe;

drivers/gpu/drm/i915/display/intel_overlay.c

367

intel_frontbuffer_flip(display, INTEL_FRONTBUFFER_OVERLAY(overlay->crtc->pipe));

drivers/gpu/drm/i915/display/intel_overlay.c

385

overlay->crtc->overlay = NULL;

drivers/gpu/drm/i915/display/intel_overlay.c

386

overlay->crtc = NULL;

drivers/gpu/drm/i915/display/intel_overlay.c

507

overlay->crtc = NULL;

drivers/gpu/drm/i915/display/intel_overlay.c

687

to_intel_plane_state(overlay->crtc->base.primary->state);

drivers/gpu/drm/i915/display/intel_overlay.c

803

enum pipe pipe = overlay->crtc->pipe;

drivers/gpu/drm/i915/display/intel_overlay.c

825

overlay->crtc->config;

drivers/gpu/drm/i915/display/intel_overlay.c

931

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_overlay.c

933

if (!crtc->active)

drivers/gpu/drm/i915/display/intel_overlay.c

937

if (crtc->config->double_wide)

drivers/gpu/drm/i915/display/intel_overlay.c

974

overlay->crtc->config;

drivers/gpu/drm/i915/display/intel_panel.c

480

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_panel.c

489

crtc = to_intel_crtc(conn_state->crtc);

drivers/gpu/drm/i915/display/intel_panel.c

490

if (crtc) {

drivers/gpu/drm/i915/display/intel_panel.c

493

crtc_state = to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/intel_pch_display.c

179

static void intel_pch_transcoder_set_m1_n1(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_pch_display.c

182

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_pch_display.c

183

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_pch_display.c

190

static void intel_pch_transcoder_set_m2_n2(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_pch_display.c

193

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_pch_display.c

194

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_pch_display.c

201

void intel_pch_transcoder_get_m1_n1(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_pch_display.c

204

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_pch_display.c

205

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_pch_display.c

212

void intel_pch_transcoder_get_m2_n2(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_pch_display.c

215

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_pch_display.c

216

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_pch_display.c

249

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_pch_display.c

250

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_pch_display.c

313

static void ilk_disable_pch_transcoder(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_pch_display.c

315

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_pch_display.c

316

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_pch_display.c

32

enum pipe intel_crtc_pch_transcoder(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_pch_display.c

34

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_pch_display.c

340

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_pch_display.c

343

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_pch_display.c

362

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_pch_display.c

364

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_pch_display.c

366

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_pch_display.c

367

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_pch_display.c

373

intel_fdi_link_train(crtc, crtc_state);

drivers/gpu/drm/i915/display/intel_pch_display.c

39

return crtc->pipe;

drivers/gpu/drm/i915/display/intel_pch_display.c

407

intel_pch_transcoder_set_m1_n1(crtc, &crtc_state->dp_m_n);

drivers/gpu/drm/i915/display/intel_pch_display.c

408

intel_pch_transcoder_set_m2_n2(crtc, &crtc_state->dp_m2_n2);

drivers/gpu/drm/i915/display/intel_pch_display.c

412

intel_fdi_normal_train(crtc);

drivers/gpu/drm/i915/display/intel_pch_display.c

448

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_pch_display.c

450

ilk_fdi_disable(crtc);

drivers/gpu/drm/i915/display/intel_pch_display.c

454

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_pch_display.c

456

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_pch_display.c

458

intel_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_pch_display.c

459

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_pch_display.c

461

ilk_disable_pch_transcoder(crtc);

drivers/gpu/drm/i915/display/intel_pch_display.c

474

ilk_fdi_pll_disable(crtc);

drivers/gpu/drm/i915/display/intel_pch_display.c

499

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_pch_display.c

501

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_pch_display.c

515

intel_cpu_transcoder_get_m1_n1(crtc, crtc_state->cpu_transcoder,

drivers/gpu/drm/i915/display/intel_pch_display.c

593

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_pch_display.c

595

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_pch_display.c

597

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_pch_display.c

610

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_pch_display.c

612

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_pch_display.c

622

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_pch_display.c

634

intel_cpu_transcoder_get_m1_n1(crtc, crtc_state->cpu_transcoder,

drivers/gpu/drm/i915/display/intel_pch_display.h

21

enum pipe intel_crtc_pch_transcoder(struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_pch_display.h

24

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_pch_display.h

26

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_pch_display.h

28

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_pch_display.h

30

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_pch_display.h

34

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_pch_display.h

36

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_pch_display.h

39

void intel_pch_transcoder_get_m1_n1(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_pch_display.h

41

void intel_pch_transcoder_get_m2_n2(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_pch_display.h

51

static inline int intel_crtc_pch_transcoder(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_pch_display.h

56

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_pch_display.h

60

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_pch_display.h

64

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_pch_display.h

68

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_pch_display.h

75

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_pch_display.h

79

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_pch_display.h

85

static inline void intel_pch_transcoder_get_m1_n1(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_pch_display.h

89

static inline void intel_pch_transcoder_get_m2_n2(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_pfit.c

100

crtc->base.base.id, crtc->base.name,

drivers/gpu/drm/i915/display/intel_pfit.c

111

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_pfit.c

124

crtc->base.base.id, crtc->base.name,

drivers/gpu/drm/i915/display/intel_pfit.c

134

crtc->base.base.id, crtc->base.name,

drivers/gpu/drm/i915/display/intel_pfit.c

146

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_pfit.c

153

crtc->base.base.id, crtc->base.name,

drivers/gpu/drm/i915/display/intel_pfit.c

164

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_pfit.c

177

crtc->base.base.id, crtc->base.name);

drivers/gpu/drm/i915/display/intel_pfit.c

22

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_pfit.c

35

crtc->base.base.id, crtc->base.name, DRM_RECT_ARG(dst));

drivers/gpu/drm/i915/display/intel_pfit.c

422

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_pfit.c

435

crtc->base.base.id, crtc->base.name,

drivers/gpu/drm/i915/display/intel_pfit.c

443

crtc->base.base.id, crtc->base.name,

drivers/gpu/drm/i915/display/intel_pfit.c

455

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_pfit.c

473

crtc->base.base.id, crtc->base.name,

drivers/gpu/drm/i915/display/intel_pfit.c

480

crtc->base.base.id, crtc->base.name,

drivers/gpu/drm/i915/display/intel_pfit.c

52

crtc->base.base.id, crtc->base.name, DRM_RECT_ARG(dst));

drivers/gpu/drm/i915/display/intel_pfit.c

528

pfit_control |= PFIT_PIPE(crtc->pipe) | PFIT_FILTER_FUZZY;

drivers/gpu/drm/i915/display/intel_pfit.c

574

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_pfit.c

576

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_pfit.c

604

struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_pfit.c

605

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_pfit.c

622

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_pfit.c

626

ctl = intel_de_read(display, PF_CTL(crtc->pipe));

drivers/gpu/drm/i915/display/intel_pfit.c

63

crtc->base.base.id, crtc->base.name, DRM_RECT_ARG(dst));

drivers/gpu/drm/i915/display/intel_pfit.c

633

pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_pfit.c

637

pos = intel_de_read(display, PF_WIN_POS(crtc->pipe));

drivers/gpu/drm/i915/display/intel_pfit.c

638

size = intel_de_read(display, PF_WIN_SZ(crtc->pipe));

drivers/gpu/drm/i915/display/intel_pfit.c

651

drm_WARN_ON(display->drm, pipe != crtc->pipe);

drivers/gpu/drm/i915/display/intel_pfit.c

657

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_pfit.c

679

intel_de_write(display, BCLRPAT(display, crtc->pipe), 0);

drivers/gpu/drm/i915/display/intel_pfit.c

708

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_pfit.c

725

if (pipe != crtc->pipe)

drivers/gpu/drm/i915/display/intel_pfit.c

73

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_pfit.c

90

max_src_w = crtc->pipe == PIPE_A ? 4096 : 2048;

drivers/gpu/drm/i915/display/intel_pipe_crc.c

283

intel_crtc_crc_setup_workarounds(struct intel_crtc *crtc, bool enable)

drivers/gpu/drm/i915/display/intel_pipe_crc.c

285

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_pipe_crc.c

306

pipe_config = intel_atomic_get_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_pipe_crc.c

316

pipe_config->hw.active && crtc->pipe == PIPE_A &&

drivers/gpu/drm/i915/display/intel_pipe_crc.c

444

void intel_crtc_crc_init(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_pipe_crc.c

446

struct intel_pipe_crc *pipe_crc = &crtc->pipe_crc;

drivers/gpu/drm/i915/display/intel_pipe_crc.c

556

const char *const *intel_crtc_get_crc_sources(struct drm_crtc *crtc,

drivers/gpu/drm/i915/display/intel_pipe_crc.c

563

int intel_crtc_verify_crc_source(struct drm_crtc *crtc, const char *source_name,

drivers/gpu/drm/i915/display/intel_pipe_crc.c

566

struct intel_display *display = to_intel_display(crtc->dev);

drivers/gpu/drm/i915/display/intel_pipe_crc.c

585

struct intel_crtc *crtc = to_intel_crtc(_crtc);

drivers/gpu/drm/i915/display/intel_pipe_crc.c

586

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_pipe_crc.c

587

struct intel_pipe_crc *pipe_crc = &crtc->pipe_crc;

drivers/gpu/drm/i915/display/intel_pipe_crc.c

590

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_pipe_crc.c

611

intel_crtc_crc_setup_workarounds(crtc, true);

drivers/gpu/drm/i915/display/intel_pipe_crc.c

630

intel_crtc_crc_setup_workarounds(crtc, false);

drivers/gpu/drm/i915/display/intel_pipe_crc.c

637

void intel_crtc_enable_pipe_crc(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_pipe_crc.c

639

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_pipe_crc.c

640

struct intel_pipe_crc *pipe_crc = &crtc->pipe_crc;

drivers/gpu/drm/i915/display/intel_pipe_crc.c

641

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_pipe_crc.c

644

if (!crtc->base.crc.opened)

drivers/gpu/drm/i915/display/intel_pipe_crc.c

657

void intel_crtc_disable_pipe_crc(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_pipe_crc.c

659

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_pipe_crc.c

660

struct intel_pipe_crc *pipe_crc = &crtc->pipe_crc;

drivers/gpu/drm/i915/display/intel_pipe_crc.c

661

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_pipe_crc.c

84

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_pipe_crc.c

91

if (!encoder->base.crtc)

drivers/gpu/drm/i915/display/intel_pipe_crc.c

94

crtc = to_intel_crtc(encoder->base.crtc);

drivers/gpu/drm/i915/display/intel_pipe_crc.c

96

if (crtc->pipe != pipe)

drivers/gpu/drm/i915/display/intel_pipe_crc.h

15

void intel_crtc_crc_init(struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_pipe_crc.h

16

int intel_crtc_set_crc_source(struct drm_crtc *crtc, const char *source_name);

drivers/gpu/drm/i915/display/intel_pipe_crc.h

17

int intel_crtc_verify_crc_source(struct drm_crtc *crtc,

drivers/gpu/drm/i915/display/intel_pipe_crc.h

19

const char *const *intel_crtc_get_crc_sources(struct drm_crtc *crtc,

drivers/gpu/drm/i915/display/intel_pipe_crc.h

21

void intel_crtc_disable_pipe_crc(struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_pipe_crc.h

22

void intel_crtc_enable_pipe_crc(struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_pipe_crc.h

24

static inline void intel_crtc_crc_init(struct intel_crtc *crtc) {}

drivers/gpu/drm/i915/display/intel_pipe_crc.h

28

static inline void intel_crtc_disable_pipe_crc(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_pipe_crc.h

32

static inline void intel_crtc_enable_pipe_crc(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_plane.c

1003

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_plane.c

1008

skl_crtc_planes_update_arm(dsb, state, crtc);

drivers/gpu/drm/i915/display/intel_plane.c

1010

i9xx_crtc_planes_update_arm(dsb, state, crtc);

drivers/gpu/drm/i915/display/intel_plane.c

1215

to_intel_crtc(old_plane_state->hw.crtc));

drivers/gpu/drm/i915/display/intel_plane.c

1249

intel_display_rps_boost_after_vblank(new_plane_state->hw.crtc,

drivers/gpu/drm/i915/display/intel_plane.c

1347

struct intel_crtc *crtc = to_intel_crtc(plane_state->hw.crtc);

drivers/gpu/drm/i915/display/intel_plane.c

1348

const struct intel_crtc_state *crtc_state = to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/intel_plane.c

1474

drm_vblank_work_init(&old_plane_state->unpin_work, old_plane_state->hw.crtc,

drivers/gpu/drm/i915/display/intel_plane.c

1541

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_plane.c

1545

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_plane.c

1558

if (plane->pipe != crtc->pipe)

drivers/gpu/drm/i915/display/intel_plane.c

1571

if (plane->pipe != crtc->pipe)

drivers/gpu/drm/i915/display/intel_plane.c

1577

for_each_intel_plane_on_crtc(display->drm, crtc, y_plane) {

drivers/gpu/drm/i915/display/intel_plane.c

1594

crtc->base.base.id, crtc->base.name,

drivers/gpu/drm/i915/display/intel_plane.c

1606

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_plane.c

1612

for_each_intel_plane_on_crtc(display->drm, crtc, plane) {

drivers/gpu/drm/i915/display/intel_plane.c

1627

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_plane.c

1630

intel_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_plane.c

1632

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_plane.c

1634

return intel_crtc_add_planes_to_state(state, crtc,

drivers/gpu/drm/i915/display/intel_plane.c

1687

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_plane.c

1689

for_each_intel_crtc_in_pipe_mask(state->base.dev, crtc, joined_pipes) {

drivers/gpu/drm/i915/display/intel_plane.c

1692

ret = intel_crtc_add_planes_to_state(state, crtc, affected_planes);

drivers/gpu/drm/i915/display/intel_plane.c

1707

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_plane.c

1710

for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {

drivers/gpu/drm/i915/display/intel_plane.c

1727

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_plane.c

1744

for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,

drivers/gpu/drm/i915/display/intel_plane.c

1748

ret = icl_check_nv12_planes(state, crtc);

drivers/gpu/drm/i915/display/intel_plane.c

1766

ret = intel_crtc_add_planes_to_state(state, crtc, new_active_planes);

drivers/gpu/drm/i915/display/intel_plane.c

304

struct intel_crtc *crtc = to_intel_crtc(plane_state->hw.crtc);

drivers/gpu/drm/i915/display/intel_plane.c

310

new_crtc_state = intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_plane.c

363

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_plane.c

372

intel_atomic_get_new_crtc_state(intel_atomic_state, crtc) : NULL;

drivers/gpu/drm/i915/display/intel_plane.c

397

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_plane.c

407

plane_state->hw.crtc = from_plane_state->uapi.crtc ? &crtc->base : NULL;

drivers/gpu/drm/i915/display/intel_plane.c

424

intel_plane_color_copy_uapi_to_hw_state(plane_state, from_plane_state, crtc);

drivers/gpu/drm/i915/display/intel_plane.c

603

struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_plane.c

646

crtc->base.base.id, crtc->base.name,

drivers/gpu/drm/i915/display/intel_plane.c

695

if (!new_plane_state->hw.crtc && !old_plane_state->hw.crtc)

drivers/gpu/drm/i915/display/intel_plane.c

751

intel_crtc_get_plane(struct intel_crtc *crtc, enum plane_id plane_id)

drivers/gpu/drm/i915/display/intel_plane.c

753

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_plane.c

756

for_each_intel_plane_on_crtc(display->drm, crtc, plane) {

drivers/gpu/drm/i915/display/intel_plane.c

774

struct intel_crtc *crtc = intel_crtc_for_pipe(display, plane->pipe);

drivers/gpu/drm/i915/display/intel_plane.c

776

intel_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_plane.c

778

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_plane.c

801

crtc);

drivers/gpu/drm/i915/display/intel_plane.c

815

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_plane.c

821

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_plane.c

832

if (crtc->pipe != plane->pipe ||

drivers/gpu/drm/i915/display/intel_plane.c

860

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_plane.c

862

trace_intel_plane_update_noarm(plane_state, crtc);

drivers/gpu/drm/i915/display/intel_plane.c

877

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_plane.c

879

trace_intel_plane_async_flip(plane, crtc, async_flip);

drivers/gpu/drm/i915/display/intel_plane.c

888

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_plane.c

895

trace_intel_plane_update_arm(plane_state, crtc);

drivers/gpu/drm/i915/display/intel_plane.c

903

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_plane.c

905

trace_intel_plane_disable_arm(plane, crtc);

drivers/gpu/drm/i915/display/intel_plane.c

911

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_plane.c

914

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_plane.c

928

if (crtc->pipe != plane->pipe ||

drivers/gpu/drm/i915/display/intel_plane.c

942

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_plane.c

945

intel_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_plane.c

947

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_plane.c

958

while ((plane = skl_next_plane_to_commit(state, crtc, ddb, ddb_y, &update_mask))) {

drivers/gpu/drm/i915/display/intel_plane.c

976

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_plane.c

979

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_plane.c

986

if (crtc->pipe != plane->pipe ||

drivers/gpu/drm/i915/display/intel_plane.h

24

intel_crtc_get_plane(struct intel_crtc *crtc, enum plane_id plane_id);

drivers/gpu/drm/i915/display/intel_plane.h

39

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_plane.h

66

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_plane.h

69

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_plane.h

86

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_pmdemand.c

188

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_pmdemand.c

191

for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i)

drivers/gpu/drm/i915/display/intel_pmdemand.c

193

crtc->pipe,

drivers/gpu/drm/i915/display/intel_pmdemand.c

210

struct intel_crtc *crtc = to_intel_crtc(conn_state->crtc);

drivers/gpu/drm/i915/display/intel_pmdemand.c

213

if (!crtc)

drivers/gpu/drm/i915/display/intel_pmdemand.c

217

crtc_state = intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_pmdemand.c

219

crtc_state = intel_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_pmdemand.c

299

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_pmdemand.c

311

for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,

drivers/gpu/drm/i915/display/intel_pps.c

1268

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_pps.c

1275

intel_dp->pps.vlv_pps_pipe != crtc->pipe) {

drivers/gpu/drm/i915/display/intel_pps.c

1288

vlv_steal_power_sequencer(display, crtc->pipe);

drivers/gpu/drm/i915/display/intel_pps.c

1290

intel_dp->pps.vlv_active_pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_pps.c

1296

intel_dp->pps.vlv_pps_pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_psr.c

1228

enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe;

drivers/gpu/drm/i915/display/intel_psr.c

1785

if (to_intel_crtc(crtc_state->uapi.crtc)->pipe != PIPE_A &&

drivers/gpu/drm/i915/display/intel_psr.c

1786

to_intel_crtc(crtc_state->uapi.crtc)->pipe != PIPE_B)

drivers/gpu/drm/i915/display/intel_psr.c

1828

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_psr.c

1841

for_each_intel_crtc(display->drm, crtc)

drivers/gpu/drm/i915/display/intel_psr.c

1842

active_pipes |= crtc->active ? BIT(crtc->pipe) : 0;

drivers/gpu/drm/i915/display/intel_psr.c

1847

~BIT(to_intel_crtc(crtc_state->uapi.crtc)->pipe);

drivers/gpu/drm/i915/display/intel_psr.c

2177

intel_dp->psr.pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe;

drivers/gpu/drm/i915/display/intel_psr.c

2482

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_psr.c

2486

for_each_encoder_on_crtc(crtc->base.dev, &crtc->base, encoder) {

drivers/gpu/drm/i915/display/intel_psr.c

2519

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_psr.c

2522

intel_pre_commit_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_psr.c

2523

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_psr.c

2527

CURSURFLIVE(display, crtc->pipe), 0);

drivers/gpu/drm/i915/display/intel_psr.c

2595

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_psr.c

2621

intel_de_write_dsb(display, dsb, PIPE_SRCSZ_ERLY_TPT(crtc->pipe),

drivers/gpu/drm/i915/display/intel_psr.c

2652

drm_WARN_ON(crtc_state->uapi.crtc->dev,

drivers/gpu/drm/i915/display/intel_psr.c

2733

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_psr.c

2736

struct intel_crtc_state *crtc_state = intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_psr.c

2747

if (new_plane_state->hw.crtc != crtc_state->uapi.crtc)

drivers/gpu/drm/i915/display/intel_psr.c

2852

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_psr.c

2855

struct intel_crtc_state *crtc_state = intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_psr.c

2885

if (new_plane_state->hw.crtc != crtc_state->uapi.crtc)

drivers/gpu/drm/i915/display/intel_psr.c

2952

pipe_name(crtc->pipe));

drivers/gpu/drm/i915/display/intel_psr.c

2961

ret = drm_atomic_add_affected_planes(&state->base, &crtc->base);

drivers/gpu/drm/i915/display/intel_psr.c

2975

intel_psr2_sel_fetch_et_alignment(state, crtc, &cursor_in_su_area);

drivers/gpu/drm/i915/display/intel_psr.c

3001

if (new_plane_state->hw.crtc != crtc_state->uapi.crtc ||

drivers/gpu/drm/i915/display/intel_psr.c

3063

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_psr.c

3077

intel_de_write_fw(display, PIPE_SRCSZ_ERLY_TPT(crtc->pipe), 0);

drivers/gpu/drm/i915/display/intel_psr.c

3081

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_psr.c

3085

intel_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_psr.c

3087

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_psr.c

3146

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_psr.c

3150

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_psr.c

3370

if (!conn_state->crtc)

drivers/gpu/drm/i915/display/intel_psr.c

3373

crtc_state = drm_atomic_get_crtc_state(state, conn_state->crtc);

drivers/gpu/drm/i915/display/intel_psr.c

4047

struct intel_crtc *crtc, bool enable)

drivers/gpu/drm/i915/display/intel_psr.c

4068

active_non_psr_pipes |= BIT(crtc->pipe);

drivers/gpu/drm/i915/display/intel_psr.c

4070

active_non_psr_pipes &= ~BIT(crtc->pipe);

drivers/gpu/drm/i915/display/intel_psr.c

929

struct intel_crtc *crtc = intel_crtc_for_pipe(display, intel_dp->psr.pipe);

drivers/gpu/drm/i915/display/intel_psr.c

930

struct drm_vblank_crtc *vblank = drm_crtc_vblank_crtc(&crtc->base);

drivers/gpu/drm/i915/display/intel_psr.h

34

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_psr.h

36

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_psr.h

59

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_psr.h

67

struct intel_crtc *crtc, bool enable);

drivers/gpu/drm/i915/display/intel_psr.h

78

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_sdvo.c

1528

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_sdvo.c

1635

sdvox |= SDVO_PIPE_SEL_CPT(crtc->pipe);

drivers/gpu/drm/i915/display/intel_sdvo.c

1637

sdvox |= SDVO_PIPE_SEL(crtc->pipe);

drivers/gpu/drm/i915/display/intel_sdvo.c

1841

struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_sdvo.c

1859

if (HAS_PCH_IBX(display) && crtc->pipe == PIPE_B) {

drivers/gpu/drm/i915/display/intel_sdvo.c

1904

struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);

drivers/gpu/drm/i915/display/intel_sdvo.c

1915

intel_crtc_wait_for_next_vblank(crtc);

drivers/gpu/drm/i915/display/intel_sdvo.c

2443

if (state->crtc) {

drivers/gpu/drm/i915/display/intel_sdvo.c

2445

drm_atomic_get_new_crtc_state(state->state, state->crtc);

drivers/gpu/drm/i915/display/intel_sdvo.c

2526

if (new_conn_state->crtc &&

drivers/gpu/drm/i915/display/intel_sdvo.c

2531

new_conn_state->crtc);

drivers/gpu/drm/i915/display/intel_snps_phy.c

1982

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_snps_phy.c

1986

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_snps_phy.c

2008

crtc->base.base.id, crtc->base.name, \

drivers/gpu/drm/i915/display/intel_snps_phy.h

36

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_sprite.c

1219

static void g4x_sprite_capture_error(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_sprite.c

1225

error->ctl = intel_de_read(display, DVSCNTR(crtc->pipe));

drivers/gpu/drm/i915/display/intel_sprite.c

1226

error->surf = intel_de_read(display, DVSSURF(crtc->pipe));

drivers/gpu/drm/i915/display/intel_sprite.c

1227

error->surflive = intel_de_read(display, DVSSURFLIVE(crtc->pipe));

drivers/gpu/drm/i915/display/intel_sprite.c

447

static void vlv_sprite_capture_error(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_sprite.c

453

error->ctl = intel_de_read(display, SPCNTR(crtc->pipe, plane->id));

drivers/gpu/drm/i915/display/intel_sprite.c

454

error->surf = intel_de_read(display, SPSURF(crtc->pipe, plane->id));

drivers/gpu/drm/i915/display/intel_sprite.c

455

error->surflive = intel_de_read(display, SPSURFLIVE(crtc->pipe, plane->id));

drivers/gpu/drm/i915/display/intel_sprite.c

879

static void ivb_sprite_capture_error(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/intel_sprite.c

885

error->ctl = intel_de_read(display, SPRCTL(crtc->pipe));

drivers/gpu/drm/i915/display/intel_sprite.c

886

error->surf = intel_de_read(display, SPRSURF(crtc->pipe));

drivers/gpu/drm/i915/display/intel_sprite.c

887

error->surflive = intel_de_read(display, SPRSURFLIVE(crtc->pipe));

drivers/gpu/drm/i915/display/intel_sprite_uapi.c

102

struct intel_crtc *crtc =

drivers/gpu/drm/i915/display/intel_sprite_uapi.c

107

crtc->base.primary);

drivers/gpu/drm/i915/display/intel_tc.c

1768

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_tc.c

1783

for_each_intel_crtc_in_pipe_mask(display->drm, crtc, pipe_mask) {

drivers/gpu/drm/i915/display/intel_tc.c

1786

crtc_state = intel_atomic_get_crtc_state(&state->base, crtc);

drivers/gpu/drm/i915/display/intel_tv.c

1197

struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);

drivers/gpu/drm/i915/display/intel_tv.c

1221

ret = intel_dpll_crtc_compute_clock(state, crtc);

drivers/gpu/drm/i915/display/intel_tv.c

1438

struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);

drivers/gpu/drm/i915/display/intel_tv.c

1481

tv_ctl |= TV_ENC_PIPE_SEL(crtc->pipe);

drivers/gpu/drm/i915/display/intel_tv.c

1587

struct intel_crtc *crtc = to_intel_crtc(connector->state->crtc);

drivers/gpu/drm/i915/display/intel_tv.c

1607

tv_ctl |= TV_ENC_PIPE_SEL(crtc->pipe);

drivers/gpu/drm/i915/display/intel_tv.c

1632

intel_crtc_wait_for_next_vblank(crtc);

drivers/gpu/drm/i915/display/intel_tv.c

1665

intel_crtc_wait_for_next_vblank(crtc);

drivers/gpu/drm/i915/display/intel_tv.c

1857

if (!new_state->crtc)

drivers/gpu/drm/i915/display/intel_tv.c

1861

new_crtc_state = drm_atomic_get_new_crtc_state(state, new_state->crtc);

drivers/gpu/drm/i915/display/intel_tv.c

935

intel_crtc_wait_for_next_vblank(to_intel_crtc(pipe_config->uapi.crtc));

drivers/gpu/drm/i915/display/intel_vblank.c

126

u32 g4x_get_vblank_counter(struct drm_crtc *crtc)

drivers/gpu/drm/i915/display/intel_vblank.c

128

struct intel_display *display = to_intel_display(crtc->dev);

drivers/gpu/drm/i915/display/intel_vblank.c

129

struct drm_vblank_crtc *vblank = drm_crtc_vblank_crtc(crtc);

drivers/gpu/drm/i915/display/intel_vblank.c

130

enum pipe pipe = to_intel_crtc(crtc)->pipe;

drivers/gpu/drm/i915/display/intel_vblank.c

138

static u32 intel_crtc_scanlines_since_frame_timestamp(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_vblank.c

140

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_vblank.c

141

struct drm_vblank_crtc *vblank = drm_crtc_vblank_crtc(&crtc->base);

drivers/gpu/drm/i915/display/intel_vblank.c

160

PIPE_FRMTMSTMP(crtc->pipe));

drivers/gpu/drm/i915/display/intel_vblank.c

169

PIPE_FRMTMSTMP(crtc->pipe));

drivers/gpu/drm/i915/display/intel_vblank.c

184

static u32 __intel_get_crtc_scanline_from_timestamp(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_vblank.c

186

struct drm_vblank_crtc *vblank = drm_crtc_vblank_crtc(&crtc->base);

drivers/gpu/drm/i915/display/intel_vblank.c

192

scanline = intel_crtc_scanlines_since_frame_timestamp(crtc);

drivers/gpu/drm/i915/display/intel_vblank.c

244

static int __intel_get_crtc_scanline(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_vblank.c

246

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_vblank.c

247

struct drm_vblank_crtc *vblank = drm_crtc_vblank_crtc(&crtc->base);

drivers/gpu/drm/i915/display/intel_vblank.c

249

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_vblank.c

252

if (!crtc->active)

drivers/gpu/drm/i915/display/intel_vblank.c

255

if (crtc->mode_flags & I915_MODE_FLAG_GET_SCANLINE_FROM_TIMESTAMP)

drivers/gpu/drm/i915/display/intel_vblank.c

256

return __intel_get_crtc_scanline_from_timestamp(crtc);

drivers/gpu/drm/i915/display/intel_vblank.c

292

return (position + vtotal + crtc->scanline_offset) % vtotal;

drivers/gpu/drm/i915/display/intel_vblank.c

336

struct intel_crtc *crtc = to_intel_crtc(_crtc);

drivers/gpu/drm/i915/display/intel_vblank.c

337

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_vblank.c

343

crtc->mode_flags & I915_MODE_FLAG_USE_SCANLINE_COUNTER;

drivers/gpu/drm/i915/display/intel_vblank.c

372

if (crtc->mode_flags & I915_MODE_FLAG_VRR) {

drivers/gpu/drm/i915/display/intel_vblank.c

373

int scanlines = intel_crtc_scanlines_since_frame_timestamp(crtc);

drivers/gpu/drm/i915/display/intel_vblank.c

375

position = __intel_get_crtc_scanline(crtc);

drivers/gpu/drm/i915/display/intel_vblank.c

384

position = min(crtc->vmax_vblank_start + scanlines, vtotal - 1);

drivers/gpu/drm/i915/display/intel_vblank.c

389

position = __intel_get_crtc_scanline(crtc);

drivers/gpu/drm/i915/display/intel_vblank.c

457

bool intel_crtc_get_vblank_timestamp(struct drm_crtc *crtc, int *max_error,

drivers/gpu/drm/i915/display/intel_vblank.c

461

crtc, max_error, vblank_time, in_vblank_irq,

drivers/gpu/drm/i915/display/intel_vblank.c

465

int intel_get_crtc_scanline(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_vblank.c

467

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_vblank.c

474

position = __intel_get_crtc_scanline(crtc);

drivers/gpu/drm/i915/display/intel_vblank.c

495

static void wait_for_pipe_scanline_moving(struct intel_crtc *crtc, bool state)

drivers/gpu/drm/i915/display/intel_vblank.c

497

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_vblank.c

498

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_vblank.c

512

void intel_wait_for_pipe_scanline_stopped(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_vblank.c

514

wait_for_pipe_scanline_moving(crtc, false);

drivers/gpu/drm/i915/display/intel_vblank.c

517

void intel_wait_for_pipe_scanline_moving(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_vblank.c

519

wait_for_pipe_scanline_moving(crtc, true);

drivers/gpu/drm/i915/display/intel_vblank.c

543

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_vblank.c

572

drm_calc_timestamping_constants(&crtc->base, &adjusted_mode);

drivers/gpu/drm/i915/display/intel_vblank.c

574

crtc->vmax_vblank_start = vmax_vblank_start;

drivers/gpu/drm/i915/display/intel_vblank.c

576

crtc->mode_flags = mode_flags;

drivers/gpu/drm/i915/display/intel_vblank.c

578

crtc->scanline_offset = intel_crtc_scanline_offset(crtc_state);

drivers/gpu/drm/i915/display/intel_vblank.c

644

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_vblank.c

647

intel_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_vblank.c

649

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/intel_vblank.c

687

struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_vblank.c

692

evade->crtc = crtc;

drivers/gpu/drm/i915/display/intel_vblank.c

703

if (crtc->mode_flags & I915_MODE_FLAG_VRR) {

drivers/gpu/drm/i915/display/intel_vblank.c

705

drm_WARN_ON(crtc->base.dev, intel_crtc_needs_modeset(new_crtc_state) ||

drivers/gpu/drm/i915/display/intel_vblank.c

738

struct intel_crtc *crtc = evade->crtc;

drivers/gpu/drm/i915/display/intel_vblank.c

739

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_vblank.c

74

u32 i915_get_vblank_counter(struct drm_crtc *crtc)

drivers/gpu/drm/i915/display/intel_vblank.c

741

wait_queue_head_t *wq = drm_crtc_vblank_waitqueue(&crtc->base);

drivers/gpu/drm/i915/display/intel_vblank.c

756

scanline = intel_get_crtc_scanline(crtc);

drivers/gpu/drm/i915/display/intel_vblank.c

76

struct intel_display *display = to_intel_display(crtc->dev);

drivers/gpu/drm/i915/display/intel_vblank.c

763

pipe_name(crtc->pipe));

drivers/gpu/drm/i915/display/intel_vblank.c

77

struct drm_vblank_crtc *vblank = drm_crtc_vblank_crtc(crtc);

drivers/gpu/drm/i915/display/intel_vblank.c

79

enum pipe pipe = to_intel_crtc(crtc)->pipe;

drivers/gpu/drm/i915/display/intel_vblank.c

792

scanline = intel_get_crtc_scanline(crtc);

drivers/gpu/drm/i915/display/intel_vblank.h

19

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_vblank.h

36

u32 i915_get_vblank_counter(struct drm_crtc *crtc);

drivers/gpu/drm/i915/display/intel_vblank.h

37

u32 g4x_get_vblank_counter(struct drm_crtc *crtc);

drivers/gpu/drm/i915/display/intel_vblank.h

38

bool intel_crtc_get_vblank_timestamp(struct drm_crtc *crtc, int *max_error,

drivers/gpu/drm/i915/display/intel_vblank.h

40

int intel_get_crtc_scanline(struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_vblank.h

41

void intel_wait_for_pipe_scanline_stopped(struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_vblank.h

42

void intel_wait_for_pipe_scanline_moving(struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_vblank.h

49

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_vdsc.c

1022

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_vdsc.c

1031

power_domain = intel_dsc_power_domain(crtc, cpu_transcoder);

drivers/gpu/drm/i915/display/intel_vdsc.c

1037

dss_ctl1 = intel_de_read(display, dss_ctl1_reg(crtc, cpu_transcoder));

drivers/gpu/drm/i915/display/intel_vdsc.c

1038

dss_ctl2 = intel_de_read(display, dss_ctl2_reg(crtc, cpu_transcoder));

drivers/gpu/drm/i915/display/intel_vdsc.c

38

static bool is_pipe_dsc(struct intel_crtc *crtc, enum transcoder cpu_transcoder)

drivers/gpu/drm/i915/display/intel_vdsc.c

392

intel_dsc_power_domain(struct intel_crtc *crtc, enum transcoder cpu_transcoder)

drivers/gpu/drm/i915/display/intel_vdsc.c

394

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_vdsc.c

395

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_vdsc.c

40

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/intel_vdsc.c

411

else if (is_pipe_dsc(crtc, cpu_transcoder))

drivers/gpu/drm/i915/display/intel_vdsc.c

435

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_vdsc.c

437

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_vdsc.c

440

pipe_dsc = is_pipe_dsc(crtc, cpu_transcoder);

drivers/gpu/drm/i915/display/intel_vdsc.c

473

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_vdsc.c

476

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_vdsc.c

51

drm_WARN_ON(display->drm, crtc->pipe == PIPE_A);

drivers/gpu/drm/i915/display/intel_vdsc.c

584

if (!is_pipe_dsc(crtc, cpu_transcoder)) {

drivers/gpu/drm/i915/display/intel_vdsc.c

638

if (!is_pipe_dsc(crtc, cpu_transcoder)) {

drivers/gpu/drm/i915/display/intel_vdsc.c

774

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_vdsc.c

776

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_vdsc.c

793

static i915_reg_t dss_ctl1_reg(struct intel_crtc *crtc, enum transcoder cpu_transcoder)

drivers/gpu/drm/i915/display/intel_vdsc.c

795

return is_pipe_dsc(crtc, cpu_transcoder) ?

drivers/gpu/drm/i915/display/intel_vdsc.c

796

ICL_PIPE_DSS_CTL1(crtc->pipe) : DSS_CTL1;

drivers/gpu/drm/i915/display/intel_vdsc.c

799

static i915_reg_t dss_ctl2_reg(struct intel_crtc *crtc, enum transcoder cpu_transcoder)

drivers/gpu/drm/i915/display/intel_vdsc.c

801

return is_pipe_dsc(crtc, cpu_transcoder) ?

drivers/gpu/drm/i915/display/intel_vdsc.c

802

ICL_PIPE_DSS_CTL2(crtc->pipe) : DSS_CTL2;

drivers/gpu/drm/i915/display/intel_vdsc.c

808

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_vdsc.c

817

intel_de_write(display, dss_ctl1_reg(crtc, crtc_state->cpu_transcoder),

drivers/gpu/drm/i915/display/intel_vdsc.c

825

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_vdsc.c

858

intel_de_write(display, dss_ctl1_reg(crtc, crtc_state->cpu_transcoder), dss_ctl1_val);

drivers/gpu/drm/i915/display/intel_vdsc.c

859

intel_de_write(display, dss_ctl2_reg(crtc, crtc_state->cpu_transcoder), dss_ctl2_val);

drivers/gpu/drm/i915/display/intel_vdsc.c

865

struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_vdsc.c

870

intel_de_write(display, dss_ctl1_reg(crtc, old_crtc_state->cpu_transcoder), 0);

drivers/gpu/drm/i915/display/intel_vdsc.c

871

intel_de_write(display, dss_ctl2_reg(crtc, old_crtc_state->cpu_transcoder), 0);

drivers/gpu/drm/i915/display/intel_vdsc.h

28

intel_dsc_power_domain(struct intel_crtc *crtc, enum transcoder cpu_transcoder);

drivers/gpu/drm/i915/display/intel_vrr.c

358

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_vrr.c

359

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_vrr.c

665

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_vrr.c

668

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_vrr.c

674

++crtc->dc_balance.flip_count);

drivers/gpu/drm/i915/display/intel_vrr.c

679

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_vrr.c

682

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_vrr.c

715

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_vrr.c

741

crtc->base.base.id, crtc->base.name);

drivers/gpu/drm/i915/display/intel_vrr.c

803

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_vrr.c

804

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_vrr.c

843

intel_pipedmc_dcb_enable(NULL, crtc);

drivers/gpu/drm/i915/display/intel_vrr.c

854

struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_vrr.c

855

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_vrr.c

861

intel_pipedmc_dcb_disable(NULL, crtc);

drivers/gpu/drm/i915/display/intel_vrr.c

88

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/intel_vrr.c

90

for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,

drivers/gpu/drm/i915/display/intel_vrr.c

986

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/intel_vrr.c

987

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_vrr.h

33

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_vrr.h

46

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_wm.c

56

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_wm.c

63

return display->funcs.wm->compute_watermarks(state, crtc);

drivers/gpu/drm/i915/display/intel_wm.c

67

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_wm.c

72

display->funcs.wm->initial_watermarks(state, crtc);

drivers/gpu/drm/i915/display/intel_wm.c

80

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_wm.c

85

display->funcs.wm->atomic_update_watermarks(state, crtc);

drivers/gpu/drm/i915/display/intel_wm.c

89

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_wm.c

94

display->funcs.wm->optimize_watermarks(state, crtc);

drivers/gpu/drm/i915/display/intel_wm.h

19

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_wm.h

21

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_wm.h

23

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_wm.h

25

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/skl_scaler.c

1026

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/skl_scaler.c

1034

SKL_PS_ECC_STAT(crtc->pipe, scaler_state->scaler_id),

drivers/gpu/drm/i915/display/skl_scaler.c

1098

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/skl_scaler.c

1101

if (crtc->num_scalers < 1)

drivers/gpu/drm/i915/display/skl_scaler.c

1106

if (crtc->num_scalers > 1)

drivers/gpu/drm/i915/display/skl_scaler.c

1114

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/skl_scaler.c

1117

if (crtc->num_scalers < 1)

drivers/gpu/drm/i915/display/skl_scaler.c

1128

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/skl_scaler.c

1131

if (crtc->num_scalers < 1)

drivers/gpu/drm/i915/display/skl_scaler.c

1142

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/skl_scaler.c

1144

if (crtc->num_scalers > 0)

drivers/gpu/drm/i915/display/skl_scaler.c

1152

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/skl_scaler.c

1154

if (crtc->num_scalers > 1)

drivers/gpu/drm/i915/display/skl_scaler.c

1162

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/skl_scaler.c

1164

if (crtc->num_scalers > 0)

drivers/gpu/drm/i915/display/skl_scaler.c

1172

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/skl_scaler.c

1174

if (crtc->num_scalers > 1)

drivers/gpu/drm/i915/display/skl_scaler.c

121

static void skl_scaler_max_dst_size(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/skl_scaler.c

124

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/skl_scaler.c

165

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/skl_scaler.c

191

crtc->base.base.id, crtc->base.name);

drivers/gpu/drm/i915/display/skl_scaler.c

213

crtc->base.base.id, crtc->base.name,

drivers/gpu/drm/i915/display/skl_scaler.c

214

crtc->pipe, scaler_user, *scaler_id,

drivers/gpu/drm/i915/display/skl_scaler.c

225

skl_scaler_max_dst_size(crtc, &max_dst_w, &max_dst_h);

drivers/gpu/drm/i915/display/skl_scaler.c

235

crtc->base.base.id, crtc->base.name,

drivers/gpu/drm/i915/display/skl_scaler.c

236

crtc->pipe, scaler_user, src_w, src_h,

drivers/gpu/drm/i915/display/skl_scaler.c

253

crtc->base.base.id, crtc->base.name,

drivers/gpu/drm/i915/display/skl_scaler.c

254

crtc->pipe, scaler_user, pipe_src_w, pipe_src_h);

drivers/gpu/drm/i915/display/skl_scaler.c

262

crtc->base.base.id, crtc->base.name,

drivers/gpu/drm/i915/display/skl_scaler.c

263

crtc->pipe, scaler_user, src_w, src_h, dst_w, dst_h,

drivers/gpu/drm/i915/display/skl_scaler.c

327

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/skl_scaler.c

333

for (i = 0; i < crtc->num_scalers; i++) {

drivers/gpu/drm/i915/display/skl_scaler.c

350

calculate_max_scale(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/skl_scaler.c

355

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/skl_scaler.c

388

int num_scalers_need, struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/skl_scaler.c

393

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/skl_scaler.c

400

*scaler_id = intel_allocate_scaler(scaler_state, crtc, plane_state, casf_scaler);

drivers/gpu/drm/i915/display/skl_scaler.c

432

} else if (num_scalers_need == 1 && crtc->num_scalers > 1) {

drivers/gpu/drm/i915/display/skl_scaler.c

452

calculate_max_scale(crtc,

drivers/gpu/drm/i915/display/skl_scaler.c

468

crtc->base.base.id, crtc->base.name, *scaler_id);

drivers/gpu/drm/i915/display/skl_scaler.c

484

calculate_max_scale(crtc, 0, *scaler_id,

drivers/gpu/drm/i915/display/skl_scaler.c

517

crtc->base.base.id, crtc->base.name,

drivers/gpu/drm/i915/display/skl_scaler.c

518

crtc->pipe, *scaler_id, name, idx);

drivers/gpu/drm/i915/display/skl_scaler.c

525

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/skl_scaler.c

528

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/skl_scaler.c

537

crtc, "CRTC", crtc->base.base.id,

drivers/gpu/drm/i915/display/skl_scaler.c

543

struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/skl_scaler.c

548

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/skl_scaler.c

554

if (drm_WARN_ON(display->drm, plane->pipe != crtc->pipe))

drivers/gpu/drm/i915/display/skl_scaler.c

573

crtc, "PLANE", plane->base.base.id,

drivers/gpu/drm/i915/display/skl_scaler.c

595

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/skl_scaler.c

597

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/skl_scaler.c

599

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/skl_scaler.c

620

if (num_scalers_need > crtc->num_scalers) {

drivers/gpu/drm/i915/display/skl_scaler.c

623

crtc->base.base.id, crtc->base.name,

drivers/gpu/drm/i915/display/skl_scaler.c

624

num_scalers_need, crtc->num_scalers);

drivers/gpu/drm/i915/display/skl_scaler.c

637

ret = setup_crtc_scaler(state, crtc);

drivers/gpu/drm/i915/display/skl_scaler.c

644

ret = setup_plane_scaler(state, crtc, plane);

drivers/gpu/drm/i915/display/skl_scaler.c

764

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/skl_scaler.c

765

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/skl_scaler.c

773

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/skl_scaler.c

789

trace_intel_pipe_scaler_update_arm(crtc, id, x, y, width, height);

drivers/gpu/drm/i915/display/skl_scaler.c

804

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/skl_scaler.c

809

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/skl_scaler.c

844

trace_intel_pipe_scaler_update_arm(crtc, id, x, y, width, height);

drivers/gpu/drm/i915/display/skl_scaler.c

929

struct intel_crtc *crtc, int id)

drivers/gpu/drm/i915/display/skl_scaler.c

931

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/skl_scaler.c

933

trace_intel_scaler_disable_arm(crtc, id);

drivers/gpu/drm/i915/display/skl_scaler.c

935

intel_de_write_dsb(display, dsb, SKL_PS_CTRL(crtc->pipe, id), 0);

drivers/gpu/drm/i915/display/skl_scaler.c

936

intel_de_write_dsb(display, dsb, SKL_PS_WIN_POS(crtc->pipe, id), 0);

drivers/gpu/drm/i915/display/skl_scaler.c

937

intel_de_write_dsb(display, dsb, SKL_PS_WIN_SZ(crtc->pipe, id), 0);

drivers/gpu/drm/i915/display/skl_scaler.c

946

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/skl_scaler.c

952

for (i = 0; i < crtc->num_scalers; i++) {

drivers/gpu/drm/i915/display/skl_scaler.c

954

skl_detach_scaler(dsb, crtc, i);

drivers/gpu/drm/i915/display/skl_scaler.c

960

struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/skl_scaler.c

963

for (i = 0; i < crtc->num_scalers; i++)

drivers/gpu/drm/i915/display/skl_scaler.c

964

skl_detach_scaler(NULL, crtc, i);

drivers/gpu/drm/i915/display/skl_scaler.c

970

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/skl_scaler.c

976

for (i = 0; i < crtc->num_scalers; i++) {

drivers/gpu/drm/i915/display/skl_scaler.c

979

ctl = intel_de_read(display, SKL_PS_CTRL(crtc->pipe, i));

drivers/gpu/drm/i915/display/skl_scaler.c

992

pos = intel_de_read(display, SKL_PS_WIN_POS(crtc->pipe, i));

drivers/gpu/drm/i915/display/skl_scaler.c

993

size = intel_de_read(display, SKL_PS_WIN_SZ(crtc->pipe, i));

drivers/gpu/drm/i915/display/skl_scaler.h

25

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1696

static void skl_plane_capture_error(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/skl_universal_plane.c

1702

error->ctl = intel_de_read(display, PLANE_CTL(crtc->pipe, plane->id));

drivers/gpu/drm/i915/display/skl_universal_plane.c

1703

error->surf = intel_de_read(display, PLANE_SURF(crtc->pipe, plane->id));

drivers/gpu/drm/i915/display/skl_universal_plane.c

1704

error->surflive = intel_de_read(display, PLANE_SURFLIVE(crtc->pipe, plane->id));

drivers/gpu/drm/i915/display/skl_universal_plane.c

3045

skl_get_initial_plane_config(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/skl_universal_plane.c

3048

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/skl_universal_plane.c

3049

struct intel_crtc_state *crtc_state = to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/skl_universal_plane.c

3050

struct intel_plane *plane = to_intel_plane(crtc->base.primary);

drivers/gpu/drm/i915/display/skl_universal_plane.c

3063

drm_WARN_ON(display->drm, pipe != crtc->pipe);

drivers/gpu/drm/i915/display/skl_universal_plane.c

3068

crtc->base.base.id, crtc->base.name);

drivers/gpu/drm/i915/display/skl_universal_plane.c

3205

crtc->base.base.id, crtc->base.name,

drivers/gpu/drm/i915/display/skl_universal_plane.c

3217

bool skl_fixup_initial_plane_config(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/skl_universal_plane.c

3220

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/skl_universal_plane.c

3221

struct intel_plane *plane = to_intel_plane(crtc->base.primary);

drivers/gpu/drm/i915/display/skl_universal_plane.c

3225

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/skl_universal_plane.h

25

void skl_get_initial_plane_config(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/skl_universal_plane.h

27

bool skl_fixup_initial_plane_config(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/skl_watermark.c

1246

static u8 skl_compute_dbuf_slices(struct intel_crtc *crtc, u8 active_pipes, bool join_mbus)

drivers/gpu/drm/i915/display/skl_watermark.c

1248

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/skl_watermark.c

1249

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/skl_watermark.c

1298

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/skl_watermark.c

1302

for_each_plane_id_on_crtc(crtc, plane_id) {

drivers/gpu/drm/i915/display/skl_watermark.c

1422

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/skl_watermark.c

1425

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/skl_watermark.c

1428

const struct skl_ddb_entry *alloc = &dbuf_state->ddb[crtc->pipe];

drivers/gpu/drm/i915/display/skl_watermark.c

1467

for_each_plane_id_on_crtc(crtc, plane_id) {

drivers/gpu/drm/i915/display/skl_watermark.c

1511

for_each_plane_id_on_crtc(crtc, plane_id) {

drivers/gpu/drm/i915/display/skl_watermark.c

1550

for_each_plane_id_on_crtc(crtc, plane_id) {

drivers/gpu/drm/i915/display/skl_watermark.c

1578

for_each_plane_id_on_crtc(crtc, plane_id) {

drivers/gpu/drm/i915/display/skl_watermark.c

2163

struct intel_plane *plane = to_intel_plane(crtc_state->uapi.crtc->primary);

drivers/gpu/drm/i915/display/skl_watermark.c

2213

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/skl_watermark.c

2217

for_each_plane_id_on_crtc(crtc, plane_id) {

drivers/gpu/drm/i915/display/skl_watermark.c

2241

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/skl_watermark.c

2261

crtc->base.base.id, crtc->base.name);

drivers/gpu/drm/i915/display/skl_watermark.c

2269

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/skl_watermark.c

2298

for_each_plane_id_on_crtc(crtc, plane_id) {

drivers/gpu/drm/i915/display/skl_watermark.c

2317

for_each_plane_id_on_crtc(crtc, plane_id) {

drivers/gpu/drm/i915/display/skl_watermark.c

2330

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/skl_watermark.c

2332

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/skl_watermark.c

2334

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/skl_watermark.c

2345

if (plane->pipe != crtc->pipe)

drivers/gpu/drm/i915/display/skl_watermark.c

2427

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/skl_watermark.c

2431

intel_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/skl_watermark.c

2433

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/skl_watermark.c

2436

for_each_intel_plane_on_crtc(display->drm, crtc, plane) {

drivers/gpu/drm/i915/display/skl_watermark.c

2489

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/skl_watermark.c

2492

for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {

drivers/gpu/drm/i915/display/skl_watermark.c

2524

for_each_intel_crtc(display->drm, crtc) {

drivers/gpu/drm/i915/display/skl_watermark.c

2525

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/skl_watermark.c

2528

skl_compute_dbuf_slices(crtc, new_dbuf_state->active_pipes,

drivers/gpu/drm/i915/display/skl_watermark.c

2556

for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {

drivers/gpu/drm/i915/display/skl_watermark.c

2557

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/skl_watermark.c

2569

for_each_intel_crtc(display->drm, crtc) {

drivers/gpu/drm/i915/display/skl_watermark.c

2570

ret = skl_crtc_allocate_ddb(state, crtc);

drivers/gpu/drm/i915/display/skl_watermark.c

2575

for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {

drivers/gpu/drm/i915/display/skl_watermark.c

2576

ret = skl_crtc_allocate_plane_ddb(state, crtc);

drivers/gpu/drm/i915/display/skl_watermark.c

2580

ret = skl_ddb_add_affected_planes(state, crtc);

drivers/gpu/drm/i915/display/skl_watermark.c

2691

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/skl_watermark.c

2697

for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,

drivers/gpu/drm/i915/display/skl_watermark.c

2704

for_each_intel_plane_on_crtc(display->drm, crtc, plane) {

drivers/gpu/drm/i915/display/skl_watermark.c

2720

for_each_intel_plane_on_crtc(display->drm, crtc, plane) {

drivers/gpu/drm/i915/display/skl_watermark.c

2789

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/skl_watermark.c

2793

intel_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/skl_watermark.c

2795

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/skl_watermark.c

2798

for_each_intel_plane_on_crtc(display->drm, crtc, plane) {

drivers/gpu/drm/i915/display/skl_watermark.c

2838

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/skl_watermark.c

2845

for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {

drivers/gpu/drm/i915/display/skl_watermark.c

2846

display->pkgc.disable[crtc->pipe] = crtc_state->vrr.enable;

drivers/gpu/drm/i915/display/skl_watermark.c

2847

display->pkgc.linetime[crtc->pipe] = DIV_ROUND_UP(crtc_state->linetime, 8);

drivers/gpu/drm/i915/display/skl_watermark.c

2851

for_each_intel_crtc(display->drm, crtc) {

drivers/gpu/drm/i915/display/skl_watermark.c

2852

if (display->pkgc.disable[crtc->pipe])

drivers/gpu/drm/i915/display/skl_watermark.c

2855

max_linetime = max(display->pkgc.linetime[crtc->pipe], max_linetime);

drivers/gpu/drm/i915/display/skl_watermark.c

2913

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/skl_watermark.c

2917

for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {

drivers/gpu/drm/i915/display/skl_watermark.c

2918

ret = skl_build_pipe_wm(state, crtc);

drivers/gpu/drm/i915/display/skl_watermark.c

2932

for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {

drivers/gpu/drm/i915/display/skl_watermark.c

2956

ret = skl_wm_add_affected_planes(state, crtc);

drivers/gpu/drm/i915/display/skl_watermark.c

2977

static void skl_pipe_wm_get_hw_state(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/skl_watermark.c

2980

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/skl_watermark.c

2981

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/skl_watermark.c

2986

for_each_plane_id_on_crtc(crtc, plane_id) {

drivers/gpu/drm/i915/display/skl_watermark.c

3030

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/skl_watermark.c

3038

for_each_intel_crtc(display->drm, crtc) {

drivers/gpu/drm/i915/display/skl_watermark.c

3040

to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/skl_watermark.c

3041

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/skl_watermark.c

3049

skl_pipe_wm_get_hw_state(crtc, &crtc_state->wm.skl.optimal);

drivers/gpu/drm/i915/display/skl_watermark.c

3056

for_each_plane_id_on_crtc(crtc, plane_id) {

drivers/gpu/drm/i915/display/skl_watermark.c

3069

skl_ddb_get_hw_plane_state(display, crtc->pipe,

drivers/gpu/drm/i915/display/skl_watermark.c

308

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/skl_watermark.c

3083

slices = skl_compute_dbuf_slices(crtc, dbuf_state->active_pipes,

drivers/gpu/drm/i915/display/skl_watermark.c

3095

crtc->base.base.id, crtc->base.name,

drivers/gpu/drm/i915/display/skl_watermark.c

321

for_each_plane_id_on_crtc(crtc, plane_id) {

drivers/gpu/drm/i915/display/skl_watermark.c

3398

static u32 pipe_mbus_dbox_ctl(const struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/skl_watermark.c

3401

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/skl_watermark.c

343

for_each_plane_id_on_crtc(crtc, plane_id) {

drivers/gpu/drm/i915/display/skl_watermark.c

3437

if (xelpdp_is_only_pipe_per_dbuf_bank(crtc->pipe, dbuf_state->active_pipes))

drivers/gpu/drm/i915/display/skl_watermark.c

3449

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/skl_watermark.c

3451

for_each_intel_crtc_in_pipe_mask(display->drm, crtc, dbuf_state->active_pipes)

drivers/gpu/drm/i915/display/skl_watermark.c

3452

intel_de_write(display, PIPE_MBUS_DBOX_CTL(crtc->pipe),

drivers/gpu/drm/i915/display/skl_watermark.c

3453

pipe_mbus_dbox_ctl(crtc, dbuf_state));

drivers/gpu/drm/i915/display/skl_watermark.c

3547

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/skl_watermark.c

3552

crtc = intel_crtc_for_pipe(display, pipe);

drivers/gpu/drm/i915/display/skl_watermark.c

3553

new_crtc_state = intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/skl_watermark.c

360

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/skl_watermark.c

3641

struct intel_crtc *crtc = intel_crtc_for_pipe(display, pipe);

drivers/gpu/drm/i915/display/skl_watermark.c

3643

intel_crtc_wait_for_next_vblank(crtc);

drivers/gpu/drm/i915/display/skl_watermark.c

366

for_each_plane_id_on_crtc(crtc, plane_id) {

drivers/gpu/drm/i915/display/skl_watermark.c

3761

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/skl_watermark.c

3763

for_each_intel_crtc(display->drm, crtc) {

drivers/gpu/drm/i915/display/skl_watermark.c

3765

to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/skl_watermark.c

3767

entries[crtc->pipe] = crtc_state->wm.skl.ddb;

drivers/gpu/drm/i915/display/skl_watermark.c

3770

for_each_intel_crtc(display->drm, crtc) {

drivers/gpu/drm/i915/display/skl_watermark.c

3772

to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/skl_watermark.c

3775

slices = skl_compute_dbuf_slices(crtc, dbuf_state->active_pipes,

drivers/gpu/drm/i915/display/skl_watermark.c

3777

if (dbuf_state->slices[crtc->pipe] & ~slices)

drivers/gpu/drm/i915/display/skl_watermark.c

3781

I915_MAX_PIPES, crtc->pipe))

drivers/gpu/drm/i915/display/skl_watermark.c

3790

struct intel_crtc *crtc;

drivers/gpu/drm/i915/display/skl_watermark.c

3808

for_each_intel_crtc(display->drm, crtc) {

drivers/gpu/drm/i915/display/skl_watermark.c

3809

struct intel_plane *plane = to_intel_plane(crtc->base.primary);

drivers/gpu/drm/i915/display/skl_watermark.c

3813

to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/skl_watermark.c

3816

intel_plane_disable_noatomic(crtc, plane);

drivers/gpu/drm/i915/display/skl_watermark.c

3830

void skl_wm_crtc_disable_noatomic(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/skl_watermark.c

3832

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/skl_watermark.c

3834

to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/skl_watermark.c

3837

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/skl_watermark.c

3852

void skl_wm_plane_disable_noatomic(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/skl_watermark.c

3855

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/skl_watermark.c

3857

to_intel_crtc_state(crtc->base.state);

drivers/gpu/drm/i915/display/skl_watermark.c

3875

struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/skl_watermark.c

3879

intel_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/i915/display/skl_watermark.c

3899

skl_pipe_wm_get_hw_state(crtc, &hw->wm);

drivers/gpu/drm/i915/display/skl_watermark.c

3901

skl_pipe_ddb_get_hw_state(crtc, hw->ddb, hw->ddb_y, hw->min_ddb, hw->interim_ddb);

drivers/gpu/drm/i915/display/skl_watermark.c

3912

for_each_intel_plane_on_crtc(display->drm, crtc, plane) {

drivers/gpu/drm/i915/display/skl_watermark.c

526

skl_crtc_allocate_ddb(struct intel_atomic_state *state, struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/skl_watermark.c

528

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/skl_watermark.c

536

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/skl_watermark.c

574

crtc_state = intel_atomic_get_crtc_state(&state->base, crtc);

drivers/gpu/drm/i915/display/skl_watermark.c

587

crtc->base.base.id, crtc->base.name,

drivers/gpu/drm/i915/display/skl_watermark.c

637

struct intel_plane *plane = to_intel_plane(crtc_state->uapi.crtc->cursor);

drivers/gpu/drm/i915/display/skl_watermark.c

713

static void skl_pipe_ddb_get_hw_state(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/skl_watermark.c

718

struct intel_display *display = to_intel_display(crtc);

drivers/gpu/drm/i915/display/skl_watermark.c

720

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/skl_watermark.c

729

for_each_plane_id_on_crtc(crtc, plane_id)

drivers/gpu/drm/i915/display/skl_watermark.h

38

struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/skl_watermark.h

40

void skl_wm_crtc_disable_noatomic(struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/skl_watermark.h

41

void skl_wm_plane_disable_noatomic(struct intel_crtc *crtc,

drivers/gpu/drm/i915/display/vlv_dsi.c

1017

struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);

drivers/gpu/drm/i915/display/vlv_dsi.c

1028

adjusted_mode_sw = &crtc->config->hw.adjusted_mode;

drivers/gpu/drm/i915/display/vlv_dsi.c

1043

pipe_config->pipe_bpp = bdw_get_pipe_misc_bpp(crtc);

drivers/gpu/drm/i915/display/vlv_dsi.c

1307

struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);

drivers/gpu/drm/i915/display/vlv_dsi.c

1315

drm_dbg_kms(display->drm, "pipe %c\n", pipe_name(crtc->pipe));

drivers/gpu/drm/i915/display/vlv_dsi.c

1342

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/vlv_dsi.c

615

struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

drivers/gpu/drm/i915/display/vlv_dsi.c

649

temp |= crtc->pipe ?

drivers/gpu/drm/i915/display/vlv_dsi.c

730

struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);

drivers/gpu/drm/i915/display/vlv_dsi.c

731

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/i915_initial_plane.c

18

static void i915_initial_plane_vblank_wait(struct drm_crtc *crtc)

drivers/gpu/drm/i915/i915_initial_plane.c

20

intel_crtc_wait_for_next_vblank(to_intel_crtc(crtc));

drivers/gpu/drm/imx/dc/dc-crtc.c

115

struct drm_crtc *crtc = crtc_state->crtc;

drivers/gpu/drm/imx/dc/dc-crtc.c

116

struct dc_crtc *dc_crtc = to_dc_crtc(crtc);

drivers/gpu/drm/imx/dc/dc-crtc.c

118

spin_lock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/imx/dc/dc-crtc.c

120

WARN_ON(drm_crtc_vblank_get(crtc));

drivers/gpu/drm/imx/dc/dc-crtc.c

125

spin_unlock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/imx/dc/dc-crtc.c

135

dc_crtc_mode_valid(struct drm_crtc *crtc, const struct drm_display_mode *mode)

drivers/gpu/drm/imx/dc/dc-crtc.c

137

struct dc_crtc *dc_crtc = to_dc_crtc(crtc);

drivers/gpu/drm/imx/dc/dc-crtc.c

151

dc_crtc_atomic_check(struct drm_crtc *crtc, struct drm_atomic_state *state)

drivers/gpu/drm/imx/dc/dc-crtc.c

154

drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/imx/dc/dc-crtc.c

156

struct dc_crtc *dc_crtc = to_dc_crtc(crtc);

drivers/gpu/drm/imx/dc/dc-crtc.c

167

dc_crtc_atomic_begin(struct drm_crtc *crtc, struct drm_atomic_state *state)

drivers/gpu/drm/imx/dc/dc-crtc.c

170

drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/imx/dc/dc-crtc.c

171

struct dc_drm_device *dc_drm = to_dc_drm_device(crtc->dev);

drivers/gpu/drm/imx/dc/dc-crtc.c

178

if (!drm_dev_enter(crtc->dev, &idx))

drivers/gpu/drm/imx/dc/dc-crtc.c

184

dc_crtc_err(crtc, "failed to get DC pixel engine RPM: %d\n",

drivers/gpu/drm/imx/dc/dc-crtc.c

191

dc_crtc_atomic_flush(struct drm_crtc *crtc, struct drm_atomic_state *state)

drivers/gpu/drm/imx/dc/dc-crtc.c

194

drm_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/imx/dc/dc-crtc.c

196

drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/imx/dc/dc-crtc.c

197

struct dc_crtc *dc_crtc = to_dc_crtc(crtc);

drivers/gpu/drm/imx/dc/dc-crtc.c

204

if (!drm_dev_enter(crtc->dev, &idx))

drivers/gpu/drm/imx/dc/dc-crtc.c

225

dc_crtc_atomic_enable(struct drm_crtc *crtc, struct drm_atomic_state *state)

drivers/gpu/drm/imx/dc/dc-crtc.c

228

drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/imx/dc/dc-crtc.c

230

struct dc_crtc *dc_crtc = to_dc_crtc(crtc);

drivers/gpu/drm/imx/dc/dc-crtc.c

234

dc_crtc_dbg(crtc, "mode " DRM_MODE_FMT "\n", DRM_MODE_ARG(adj));

drivers/gpu/drm/imx/dc/dc-crtc.c

236

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/imx/dc/dc-crtc.c

238

if (!drm_dev_enter(crtc->dev, &idx))

drivers/gpu/drm/imx/dc/dc-crtc.c

244

dc_crtc_err(crtc, "failed to get DC display engine RPM: %d\n",

drivers/gpu/drm/imx/dc/dc-crtc.c

297

dc_crtc_atomic_disable(struct drm_crtc *crtc, struct drm_atomic_state *state)

drivers/gpu/drm/imx/dc/dc-crtc.c

30

#define dc_crtc_dbg(crtc, fmt, ...) \

drivers/gpu/drm/imx/dc/dc-crtc.c

300

drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/imx/dc/dc-crtc.c

301

struct dc_drm_device *dc_drm = to_dc_drm_device(crtc->dev);

drivers/gpu/drm/imx/dc/dc-crtc.c

302

struct dc_crtc *dc_crtc = to_dc_crtc(crtc);

drivers/gpu/drm/imx/dc/dc-crtc.c

305

if (!drm_dev_enter(crtc->dev, &idx))

drivers/gpu/drm/imx/dc/dc-crtc.c

32

struct drm_crtc *_crtc = (crtc); \

drivers/gpu/drm/imx/dc/dc-crtc.c

324

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/imx/dc/dc-crtc.c

326

spin_lock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/imx/dc/dc-crtc.c

328

drm_crtc_send_vblank_event(crtc, new_crtc_state->event);

drivers/gpu/drm/imx/dc/dc-crtc.c

331

spin_unlock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/imx/dc/dc-crtc.c

334

static bool dc_crtc_get_scanout_position(struct drm_crtc *crtc,

drivers/gpu/drm/imx/dc/dc-crtc.c

340

struct dc_crtc *dc_crtc = to_dc_crtc(crtc);

drivers/gpu/drm/imx/dc/dc-crtc.c

350

if (!drm_dev_enter(crtc->dev, &idx)) {

drivers/gpu/drm/imx/dc/dc-crtc.c

37

#define dc_crtc_err(crtc, fmt, ...) \

drivers/gpu/drm/imx/dc/dc-crtc.c

39

struct drm_crtc *_crtc = (crtc); \

drivers/gpu/drm/imx/dc/dc-crtc.c

392

struct drm_crtc *crtc = &dc_crtc->base;

drivers/gpu/drm/imx/dc/dc-crtc.c

395

drm_crtc_handle_vblank(crtc);

drivers/gpu/drm/imx/dc/dc-crtc.c

397

spin_lock_irqsave(&crtc->dev->event_lock, flags);

drivers/gpu/drm/imx/dc/dc-crtc.c

399

drm_crtc_send_vblank_event(crtc, dc_crtc->event);

drivers/gpu/drm/imx/dc/dc-crtc.c

401

drm_crtc_vblank_put(crtc);

drivers/gpu/drm/imx/dc/dc-crtc.c

403

spin_unlock_irqrestore(&crtc->dev->event_lock, flags);

drivers/gpu/drm/imx/dc/dc-crtc.c

49

dc_crtc_err(crtc, "%s: wait for " #c " timeout\n", \

drivers/gpu/drm/imx/dc/dc-crtc.c

58

dc_crtc_err(crtc, "%s: FrameGen FIFO empty\n", \

drivers/gpu/drm/imx/dc/dc-crtc.c

66

dc_crtc_err(crtc, \

drivers/gpu/drm/imx/dc/dc-crtc.c

71

static inline struct dc_crtc *to_dc_crtc(struct drm_crtc *crtc)

drivers/gpu/drm/imx/dc/dc-crtc.c

73

return container_of(crtc, struct dc_crtc, base);

drivers/gpu/drm/imx/dc/dc-crtc.c

76

static u32 dc_crtc_get_vblank_counter(struct drm_crtc *crtc)

drivers/gpu/drm/imx/dc/dc-crtc.c

78

struct dc_crtc *dc_crtc = to_dc_crtc(crtc);

drivers/gpu/drm/imx/dc/dc-crtc.c

83

static int dc_crtc_enable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/imx/dc/dc-crtc.c

85

struct dc_crtc *dc_crtc = to_dc_crtc(crtc);

drivers/gpu/drm/imx/dc/dc-crtc.c

92

static void dc_crtc_disable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/imx/dc/dc-crtc.c

94

struct dc_crtc *dc_crtc = to_dc_crtc(crtc);

drivers/gpu/drm/imx/dc/dc-kms.c

38

struct drm_crtc *crtc = &dc_crtc->base;

drivers/gpu/drm/imx/dc/dc-kms.c

54

crtc->index);

drivers/gpu/drm/imx/dc/dc-kms.c

61

crtc->index, ret);

drivers/gpu/drm/imx/dc/dc-kms.c

65

encoder->possible_crtcs = drm_crtc_mask(crtc);

drivers/gpu/drm/imx/dc/dc-kms.c

72

crtc->index, ret);

drivers/gpu/drm/imx/dc/dc-kms.c

80

crtc->index, ret);

drivers/gpu/drm/imx/dc/dc-kms.c

88

crtc->index, ret);

drivers/gpu/drm/imx/dc/dc-plane.c

103

if (!plane_state->crtc) {

drivers/gpu/drm/imx/dc/dc-plane.c

109

drm_atomic_get_new_crtc_state(state, plane_state->crtc);

drivers/gpu/drm/imx/dcss/dcss-crtc.c

116

static void dcss_crtc_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/imx/dcss/dcss-crtc.c

120

crtc);

drivers/gpu/drm/imx/dcss/dcss-crtc.c

121

struct dcss_crtc *dcss_crtc = container_of(crtc, struct dcss_crtc,

drivers/gpu/drm/imx/dcss/dcss-crtc.c

124

struct drm_display_mode *mode = &crtc->state->adjusted_mode;

drivers/gpu/drm/imx/dcss/dcss-crtc.c

129

spin_lock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/imx/dcss/dcss-crtc.c

130

if (crtc->state->event) {

drivers/gpu/drm/imx/dcss/dcss-crtc.c

131

drm_crtc_send_vblank_event(crtc, crtc->state->event);

drivers/gpu/drm/imx/dcss/dcss-crtc.c

132

crtc->state->event = NULL;

drivers/gpu/drm/imx/dcss/dcss-crtc.c

134

spin_unlock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/imx/dcss/dcss-crtc.c

144

if (!drm_mode_equal(mode, old_mode) || !crtc->state->active)

drivers/gpu/drm/imx/dcss/dcss-crtc.c

15

static int dcss_enable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/imx/dcss/dcss-crtc.c

155

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/imx/dcss/dcss-crtc.c

17

struct dcss_crtc *dcss_crtc = container_of(crtc, struct dcss_crtc,

drivers/gpu/drm/imx/dcss/dcss-crtc.c

184

int dcss_crtc_init(struct dcss_crtc *crtc, struct drm_device *drm)

drivers/gpu/drm/imx/dcss/dcss-crtc.c

19

struct dcss_dev *dcss = crtc->dev->dev_private;

drivers/gpu/drm/imx/dcss/dcss-crtc.c

190

crtc->plane[0] = dcss_plane_init(drm, drm_crtc_mask(&crtc->base),

drivers/gpu/drm/imx/dcss/dcss-crtc.c

192

if (IS_ERR(crtc->plane[0]))

drivers/gpu/drm/imx/dcss/dcss-crtc.c

193

return PTR_ERR(crtc->plane[0]);

drivers/gpu/drm/imx/dcss/dcss-crtc.c

195

crtc->base.port = dcss->of_port;

drivers/gpu/drm/imx/dcss/dcss-crtc.c

197

drm_crtc_helper_add(&crtc->base, &dcss_helper_funcs);

drivers/gpu/drm/imx/dcss/dcss-crtc.c

198

ret = drm_crtc_init_with_planes(drm, &crtc->base, &crtc->plane[0]->base,

drivers/gpu/drm/imx/dcss/dcss-crtc.c

205

crtc->irq = platform_get_irq_byname(pdev, "vblank");

drivers/gpu/drm/imx/dcss/dcss-crtc.c

206

if (crtc->irq < 0)

drivers/gpu/drm/imx/dcss/dcss-crtc.c

207

return crtc->irq;

drivers/gpu/drm/imx/dcss/dcss-crtc.c

209

ret = request_irq(crtc->irq, dcss_crtc_irq_handler, IRQF_NO_AUTOEN,

drivers/gpu/drm/imx/dcss/dcss-crtc.c

210

"dcss_drm", crtc);

drivers/gpu/drm/imx/dcss/dcss-crtc.c

219

void dcss_crtc_deinit(struct dcss_crtc *crtc, struct drm_device *drm)

drivers/gpu/drm/imx/dcss/dcss-crtc.c

221

free_irq(crtc->irq, crtc);

drivers/gpu/drm/imx/dcss/dcss-crtc.c

30

static void dcss_disable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/imx/dcss/dcss-crtc.c

32

struct dcss_crtc *dcss_crtc = container_of(crtc, struct dcss_crtc,

drivers/gpu/drm/imx/dcss/dcss-crtc.c

55

static void dcss_crtc_atomic_begin(struct drm_crtc *crtc,

drivers/gpu/drm/imx/dcss/dcss-crtc.c

58

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/imx/dcss/dcss-crtc.c

61

static void dcss_crtc_atomic_flush(struct drm_crtc *crtc,

drivers/gpu/drm/imx/dcss/dcss-crtc.c

64

struct dcss_crtc *dcss_crtc = container_of(crtc, struct dcss_crtc,

drivers/gpu/drm/imx/dcss/dcss-crtc.c

68

spin_lock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/imx/dcss/dcss-crtc.c

69

if (crtc->state->event) {

drivers/gpu/drm/imx/dcss/dcss-crtc.c

70

WARN_ON(drm_crtc_vblank_get(crtc));

drivers/gpu/drm/imx/dcss/dcss-crtc.c

71

drm_crtc_arm_vblank_event(crtc, crtc->state->event);

drivers/gpu/drm/imx/dcss/dcss-crtc.c

72

crtc->state->event = NULL;

drivers/gpu/drm/imx/dcss/dcss-crtc.c

74

spin_unlock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/imx/dcss/dcss-crtc.c

80

static void dcss_crtc_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/imx/dcss/dcss-crtc.c

84

crtc);

drivers/gpu/drm/imx/dcss/dcss-crtc.c

85

struct dcss_crtc *dcss_crtc = container_of(crtc, struct dcss_crtc,

drivers/gpu/drm/imx/dcss/dcss-crtc.c

88

struct drm_display_mode *mode = &crtc->state->adjusted_mode;

drivers/gpu/drm/imx/dcss/dcss-kms.c

115

struct dcss_crtc *crtc;

drivers/gpu/drm/imx/dcss/dcss-kms.c

124

crtc = &kms->crtc;

drivers/gpu/drm/imx/dcss/dcss-kms.c

138

ret = dcss_crtc_init(crtc, drm);

drivers/gpu/drm/imx/dcss/dcss-kms.c

156

dcss_crtc_deinit(crtc, drm);

drivers/gpu/drm/imx/dcss/dcss-kms.c

172

drm_crtc_vblank_off(&kms->crtc.base);

drivers/gpu/drm/imx/dcss/dcss-kms.c

174

dcss_crtc_deinit(&kms->crtc, drm);

drivers/gpu/drm/imx/dcss/dcss-kms.c

70

struct drm_crtc *crtc = (struct drm_crtc *)&kms->crtc;

drivers/gpu/drm/imx/dcss/dcss-kms.c

85

encoder->possible_crtcs = drm_crtc_mask(crtc);

drivers/gpu/drm/imx/dcss/dcss-kms.h

30

struct dcss_crtc crtc;

drivers/gpu/drm/imx/dcss/dcss-kms.h

38

int dcss_crtc_init(struct dcss_crtc *crtc, struct drm_device *drm);

drivers/gpu/drm/imx/dcss/dcss-kms.h

39

void dcss_crtc_deinit(struct dcss_crtc *crtc, struct drm_device *drm);

drivers/gpu/drm/imx/dcss/dcss-plane.c

157

if (!fb || !new_plane_state->crtc)

drivers/gpu/drm/imx/dcss/dcss-plane.c

164

new_plane_state->crtc);

drivers/gpu/drm/imx/dcss/dcss-plane.c

286

if (!fb || !new_state->crtc || !new_state->visible)

drivers/gpu/drm/imx/dcss/dcss-plane.c

289

crtc_state = new_state->crtc->state;

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

100

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

102

spin_lock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

103

if (crtc->state->event && !crtc->state->active) {

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

104

drm_crtc_send_vblank_event(crtc, crtc->state->event);

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

105

crtc->state->event = NULL;

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

107

spin_unlock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

110

static void imx_drm_crtc_reset(struct drm_crtc *crtc)

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

114

if (crtc->state)

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

115

__drm_atomic_helper_crtc_destroy_state(crtc->state);

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

117

kfree(to_imx_crtc_state(crtc->state));

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

118

crtc->state = NULL;

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

122

__drm_atomic_helper_crtc_reset(crtc, &state->base);

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

125

static struct drm_crtc_state *imx_drm_crtc_duplicate_state(struct drm_crtc *crtc)

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

133

__drm_atomic_helper_crtc_duplicate_state(crtc, &state->base);

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

135

WARN_ON(state->base.crtc != crtc);

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

136

state->base.crtc = crtc;

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

141

static void imx_drm_crtc_destroy_state(struct drm_crtc *crtc,

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

148

static int ipu_enable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

150

struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

157

static void ipu_disable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

159

struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

177

struct drm_crtc *crtc = &ipu_crtc->base;

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

181

drm_crtc_handle_vblank(crtc);

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

195

spin_lock_irqsave(&crtc->dev->event_lock, flags);

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

196

drm_crtc_send_vblank_event(crtc, ipu_crtc->event);

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

198

drm_crtc_vblank_put(crtc);

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

199

spin_unlock_irqrestore(&crtc->dev->event_lock, flags);

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

206

static bool ipu_crtc_mode_fixup(struct drm_crtc *crtc,

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

210

struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

228

static int ipu_crtc_atomic_check(struct drm_crtc *crtc,

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

232

crtc);

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

233

u32 primary_plane_mask = drm_plane_mask(crtc->primary);

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

241

static void ipu_crtc_atomic_begin(struct drm_crtc *crtc,

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

244

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

247

static void ipu_crtc_atomic_flush(struct drm_crtc *crtc,

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

250

spin_lock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

251

if (crtc->state->event) {

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

252

struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

254

WARN_ON(drm_crtc_vblank_get(crtc));

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

255

ipu_crtc->event = crtc->state->event;

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

256

crtc->state->event = NULL;

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

258

spin_unlock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

261

static void ipu_crtc_mode_set_nofb(struct drm_crtc *crtc)

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

263

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

265

struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

266

struct drm_display_mode *mode = &crtc->state->adjusted_mode;

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

267

struct imx_crtc_state *imx_crtc_state = to_imx_crtc_state(crtc->state);

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

277

if (encoder->crtc == crtc)

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

371

struct drm_crtc *crtc;

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

391

crtc = &ipu_crtc->base;

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

392

crtc->port = pdata->of_node;

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

393

drm_crtc_helper_add(crtc, &ipu_helper_funcs);

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

44

static inline struct ipu_crtc *to_ipu_crtc(struct drm_crtc *crtc)

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

46

return container_of(crtc, struct ipu_crtc, base);

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

49

static void ipu_crtc_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

52

struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

81

static void ipu_crtc_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

85

crtc);

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

86

struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);

drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c

386

if (WARN_ON(!new_state->crtc))

drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c

390

drm_atomic_get_new_crtc_state(state, new_state->crtc);

drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c

583

struct drm_crtc_state *crtc_state = new_state->crtc->state;

drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c

790

if (!state->crtc)

drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c

814

struct drm_crtc *crtc;

drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c

818

for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, crtc_state, i) {

drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c

819

ret = drm_atomic_add_affected_planes(state, crtc);

drivers/gpu/drm/imx/ipuv3/ipuv3-plane.h

37

int ipu_plane_mode_set(struct ipu_plane *plane, struct drm_crtc *crtc,

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

142

struct drm_crtc *crtc = &pipe->crtc;

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

145

struct imx_lcdc *lcdc = imx_lcdc_from_drmdev(pipe->crtc.dev);

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

158

if (old_state && old_state->crtc && old_state->crtc->enabled)

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

162

framesize = FIELD_PREP(IMX21LCDC_LSR_XMAX, crtc->mode.hdisplay >> 4) |

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

163

FIELD_PREP(IMX21LCDC_LSR_YMAX, crtc->mode.vdisplay);

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

167

lhcr = FIELD_PREP(IMX21LCDC_LHCR_HFPORCH, crtc->mode.hsync_start - crtc->mode.hdisplay - 1) |

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

168

FIELD_PREP(IMX21LCDC_LHCR_HWIDTH, crtc->mode.hsync_end - crtc->mode.hsync_start - 1) |

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

169

FIELD_PREP(IMX21LCDC_LHCR_HBPORCH, crtc->mode.htotal - crtc->mode.hsync_end - 3);

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

173

lvcr = FIELD_PREP(IMX21LCDC_LVCR_VFPORCH, crtc->mode.vsync_start - crtc->mode.vdisplay) |

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

174

FIELD_PREP(IMX21LCDC_LVCR_VWIDTH, crtc->mode.vsync_end - crtc->mode.vsync_start) |

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

175

FIELD_PREP(IMX21LCDC_LVCR_VBPORCH, crtc->mode.vtotal - crtc->mode.vsync_end);

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

187

if (new_state->crtc->enabled)

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

198

struct imx_lcdc *lcdc = imx_lcdc_from_drmdev(pipe->crtc.dev);

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

199

struct drm_display_mode *mode = &pipe->crtc.mode;

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

234

dev_err(pipe->crtc.dev->dev, "Cannot enable ipg clock: %pe\n", ERR_PTR(ret));

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

239

dev_err(pipe->crtc.dev->dev, "Cannot enable ahb clock: %pe\n", ERR_PTR(ret));

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

254

struct imx_lcdc *lcdc = imx_lcdc_from_drmdev(pipe->crtc.dev);

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

255

struct drm_crtc *crtc = &lcdc->pipe.crtc;

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

261

if (pipe->crtc.enabled)

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

265

event = crtc->state->event;

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

267

crtc->state->event = NULL;

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

268

drm_crtc_send_vblank_event(crtc, event);

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

281

const struct drm_display_mode *old_mode = &pipe->crtc.state->mode;

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

286

drm_err(pipe->crtc.dev, "unsupported display mode (%u x %u)\n",

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

301

struct drm_crtc *crtc = &pipe->crtc;

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

302

struct drm_pending_vblank_event *event = crtc->state->event;

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

306

struct drm_crtc *old_crtc = old_state->crtc;

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

311

else if (old_crtc != crtc)

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

317

crtc->state->event = NULL;

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

319

spin_lock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

321

if (crtc->state->active && drm_crtc_vblank_get(crtc) == 0)

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

322

drm_crtc_arm_vblank_event(crtc, event);

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

324

drm_crtc_send_vblank_event(crtc, event);

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

326

spin_unlock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

372

struct drm_crtc *crtc = &lcdc->pipe.crtc;

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

378

drm_crtc_handle_vblank(crtc);

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

1224

drm_crtc_helper_add(&priv->crtc, &ingenic_drm_crtc_helper_funcs);

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

1226

ret = drm_crtc_init_with_planes(drm, &priv->crtc, primary,

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

1233

drm_crtc_enable_color_mgmt(&priv->crtc, 0, false,

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

1299

encoder->possible_crtcs = drm_crtc_mask(&priv->crtc);

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

195

static inline struct ingenic_drm *drm_crtc_get_priv(struct drm_crtc *crtc)

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

197

return container_of(crtc, struct ingenic_drm, crtc);

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

223

drm_crtc_wait_one_vblank(&priv->crtc);

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

243

static void ingenic_drm_crtc_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

246

struct ingenic_drm *priv = drm_crtc_get_priv(crtc);

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

259

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

276

static void ingenic_drm_crtc_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

279

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

336

static int ingenic_drm_crtc_atomic_check(struct drm_crtc *crtc,

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

340

crtc);

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

341

struct ingenic_drm *priv = drm_crtc_get_priv(crtc);

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

389

ingenic_drm_crtc_mode_valid(struct drm_crtc *crtc, const struct drm_display_mode *mode)

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

391

struct ingenic_drm *priv = drm_crtc_get_priv(crtc);

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

406

static void ingenic_drm_crtc_atomic_begin(struct drm_crtc *crtc,

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

410

crtc);

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

411

struct ingenic_drm *priv = drm_crtc_get_priv(crtc);

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

428

static void ingenic_drm_crtc_atomic_flush(struct drm_crtc *crtc,

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

431

struct ingenic_drm *priv = drm_crtc_get_priv(crtc);

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

433

crtc);

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

452

spin_lock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

453

if (drm_crtc_vblank_get(crtc) == 0)

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

454

drm_crtc_arm_vblank_event(crtc, event);

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

456

drm_crtc_send_vblank_event(crtc, event);

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

457

spin_unlock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

471

struct drm_crtc *crtc = new_plane_state->crtc ?: old_plane_state->crtc;

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

474

if (!crtc)

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

480

crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

679

crtc_state = newstate->crtc->state;

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

882

drm_crtc_handle_vblank(&priv->crtc);

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

887

static int ingenic_drm_enable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

889

struct ingenic_drm *priv = drm_crtc_get_priv(crtc);

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

900

static void ingenic_drm_disable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

902

struct ingenic_drm *priv = drm_crtc_get_priv(crtc);

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

92

struct drm_crtc crtc;

drivers/gpu/drm/ingenic/ingenic-ipu.c

355

needs_modeset = drm_atomic_crtc_needs_modeset(newstate->crtc->state);

drivers/gpu/drm/ingenic/ingenic-ipu.c

576

struct drm_crtc *crtc = new_plane_state->crtc ?: old_plane_state->crtc;

drivers/gpu/drm/ingenic/ingenic-ipu.c

580

if (!crtc)

drivers/gpu/drm/ingenic/ingenic-ipu.c

583

crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/ingenic/ingenic-ipu.c

592

if (!old_plane_state->crtc ^ !new_plane_state->crtc)

drivers/gpu/drm/ingenic/ingenic-ipu.c

595

if (!new_plane_state->crtc ||

drivers/gpu/drm/ingenic/ingenic-ipu.c

707

if (state->crtc) {

drivers/gpu/drm/ingenic/ingenic-ipu.c

708

crtc_state = drm_atomic_get_new_crtc_state(state->state, state->crtc);

drivers/gpu/drm/ingenic/ingenic-ipu.c

761

struct drm_crtc *crtc = drm_crtc_from_index(ipu->drm, 0);

drivers/gpu/drm/ingenic/ingenic-ipu.c

780

drm_crtc_handle_vblank(crtc);

drivers/gpu/drm/kmb/kmb_crtc.c

135

static void kmb_crtc_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/kmb/kmb_crtc.c

138

struct kmb_drm_private *kmb = crtc_to_kmb_priv(crtc);

drivers/gpu/drm/kmb/kmb_crtc.c

141

kmb_crtc_set_mode(crtc, state);

drivers/gpu/drm/kmb/kmb_crtc.c

142

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/kmb/kmb_crtc.c

145

static void kmb_crtc_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/kmb/kmb_crtc.c

148

struct kmb_drm_private *kmb = crtc_to_kmb_priv(crtc);

drivers/gpu/drm/kmb/kmb_crtc.c

149

struct drm_crtc_state *old_state = drm_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/kmb/kmb_crtc.c

154

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/kmb/kmb_crtc.c

158

static void kmb_crtc_atomic_begin(struct drm_crtc *crtc,

drivers/gpu/drm/kmb/kmb_crtc.c

161

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/kmb/kmb_crtc.c

168

static void kmb_crtc_atomic_flush(struct drm_crtc *crtc,

drivers/gpu/drm/kmb/kmb_crtc.c

171

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/kmb/kmb_crtc.c

177

spin_lock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/kmb/kmb_crtc.c

178

if (crtc->state->event) {

drivers/gpu/drm/kmb/kmb_crtc.c

179

if (drm_crtc_vblank_get(crtc) == 0)

drivers/gpu/drm/kmb/kmb_crtc.c

180

drm_crtc_arm_vblank_event(crtc, crtc->state->event);

drivers/gpu/drm/kmb/kmb_crtc.c

182

drm_crtc_send_vblank_event(crtc, crtc->state->event);

drivers/gpu/drm/kmb/kmb_crtc.c

184

crtc->state->event = NULL;

drivers/gpu/drm/kmb/kmb_crtc.c

185

spin_unlock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/kmb/kmb_crtc.c

189

kmb_crtc_mode_valid(struct drm_crtc *crtc,

drivers/gpu/drm/kmb/kmb_crtc.c

193

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/kmb/kmb_crtc.c

239

ret = drm_crtc_init_with_planes(drm, &kmb->crtc, &primary->base_plane,

drivers/gpu/drm/kmb/kmb_crtc.c

246

drm_crtc_helper_add(&kmb->crtc, &kmb_crtc_helper_funcs);

drivers/gpu/drm/kmb/kmb_crtc.c

29

static int kmb_crtc_enable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/kmb/kmb_crtc.c

31

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/kmb/kmb_crtc.c

45

static void kmb_crtc_disable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/kmb/kmb_crtc.c

47

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/kmb/kmb_crtc.c

68

static void kmb_crtc_set_mode(struct drm_crtc *crtc,

drivers/gpu/drm/kmb/kmb_crtc.c

71

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/kmb/kmb_crtc.c

72

struct drm_display_mode *m = &crtc->state->adjusted_mode;

drivers/gpu/drm/kmb/kmb_drv.c

193

kmb->crtc.port = of_graph_get_port_by_id(drm->dev->of_node, 0);

drivers/gpu/drm/kmb/kmb_drv.c

295

drm_crtc_handle_vblank(&kmb->crtc);

drivers/gpu/drm/kmb/kmb_drv.c

461

of_node_put(kmb->crtc.port);

drivers/gpu/drm/kmb/kmb_drv.c

462

kmb->crtc.port = NULL;

drivers/gpu/drm/kmb/kmb_drv.c

575

drm_crtc_cleanup(&kmb->crtc);

drivers/gpu/drm/kmb/kmb_drv.h

53

struct drm_crtc crtc;

drivers/gpu/drm/kmb/kmb_drv.h

73

return container_of(x, struct kmb_drm_private, crtc);

drivers/gpu/drm/kmb/kmb_plane.c

109

if (!fb || !new_plane_state->crtc)

drivers/gpu/drm/kmb/kmb_plane.c

133

drm_atomic_get_new_crtc_state(state, new_plane_state->crtc);

drivers/gpu/drm/logicvc/logicvc_crtc.c

146

crtc->event = drm_crtc->state->event;

drivers/gpu/drm/logicvc/logicvc_crtc.c

229

struct logicvc_crtc *crtc = logicvc->crtc;

drivers/gpu/drm/logicvc/logicvc_crtc.c

232

if (!crtc)

drivers/gpu/drm/logicvc/logicvc_crtc.c

235

drm_crtc_handle_vblank(&crtc->drm_crtc);

drivers/gpu/drm/logicvc/logicvc_crtc.c

237

if (crtc->event) {

drivers/gpu/drm/logicvc/logicvc_crtc.c

239

drm_crtc_send_vblank_event(&crtc->drm_crtc, crtc->event);

drivers/gpu/drm/logicvc/logicvc_crtc.c

240

drm_crtc_vblank_put(&crtc->drm_crtc);

drivers/gpu/drm/logicvc/logicvc_crtc.c

241

crtc->event = NULL;

drivers/gpu/drm/logicvc/logicvc_crtc.c

251

struct logicvc_crtc *crtc;

drivers/gpu/drm/logicvc/logicvc_crtc.c

255

crtc = devm_kzalloc(dev, sizeof(*crtc), GFP_KERNEL);

drivers/gpu/drm/logicvc/logicvc_crtc.c

256

if (!crtc)

drivers/gpu/drm/logicvc/logicvc_crtc.c

265

ret = drm_crtc_init_with_planes(drm_dev, &crtc->drm_crtc,

drivers/gpu/drm/logicvc/logicvc_crtc.c

273

drm_crtc_helper_add(&crtc->drm_crtc, &logicvc_crtc_helper_funcs);

drivers/gpu/drm/logicvc/logicvc_crtc.c

275

crtc->drm_crtc.port = of_graph_get_port_by_id(of_node, 1);

drivers/gpu/drm/logicvc/logicvc_crtc.c

277

logicvc->crtc = crtc;

drivers/gpu/drm/logicvc/logicvc_crtc.c

41

struct logicvc_crtc *crtc = logicvc_crtc(drm_crtc);

drivers/gpu/drm/logicvc/logicvc_crtc.c

55

crtc->event = drm_crtc->state->event;

drivers/gpu/drm/logicvc/logicvc_crtc.c

65

struct logicvc_crtc *crtc = logicvc_crtc(drm_crtc);

drivers/gpu/drm/logicvc/logicvc_drm.h

63

struct logicvc_crtc *crtc;

drivers/gpu/drm/logicvc/logicvc_interface.c

136

uint32_t possible_crtcs = drm_crtc_mask(&logicvc->crtc->drm_crtc);

drivers/gpu/drm/logicvc/logicvc_layer.c

100

new_state->crtc);

drivers/gpu/drm/logicvc/logicvc_layer.c

145

struct drm_crtc *drm_crtc = &logicvc->crtc->drm_crtc;

drivers/gpu/drm/logicvc/logicvc_layer.c

568

uint32_t possible_crtcs = drm_crtc_mask(&logicvc->crtc->drm_crtc);

drivers/gpu/drm/logicvc/logicvc_layer.c

96

if (!new_state->crtc)

drivers/gpu/drm/loongson/lsdc_crtc.c

1009

ret = drm_crtc_init_with_planes(ddev, crtc, primary, cursor,

drivers/gpu/drm/loongson/lsdc_crtc.c

1017

drm_crtc_helper_add(crtc, &lsdc_crtc_helper_funcs);

drivers/gpu/drm/loongson/lsdc_crtc.c

1019

ret = drm_mode_crtc_set_gamma_size(crtc, 256);

drivers/gpu/drm/loongson/lsdc_crtc.c

1023

drm_crtc_enable_color_mgmt(crtc, 0, false, 256);

drivers/gpu/drm/loongson/lsdc_crtc.c

391

static void lsdc_crtc_reset(struct drm_crtc *crtc)

drivers/gpu/drm/loongson/lsdc_crtc.c

393

struct lsdc_crtc *lcrtc = to_lsdc_crtc(crtc);

drivers/gpu/drm/loongson/lsdc_crtc.c

397

if (crtc->state)

drivers/gpu/drm/loongson/lsdc_crtc.c

398

crtc->funcs->atomic_destroy_state(crtc, crtc->state);

drivers/gpu/drm/loongson/lsdc_crtc.c

403

__drm_atomic_helper_crtc_reset(crtc, NULL);

drivers/gpu/drm/loongson/lsdc_crtc.c

405

__drm_atomic_helper_crtc_reset(crtc, &priv_crtc_state->base);

drivers/gpu/drm/loongson/lsdc_crtc.c

411

static void lsdc_crtc_atomic_destroy_state(struct drm_crtc *crtc,

drivers/gpu/drm/loongson/lsdc_crtc.c

422

lsdc_crtc_atomic_duplicate_state(struct drm_crtc *crtc)

drivers/gpu/drm/loongson/lsdc_crtc.c

431

__drm_atomic_helper_crtc_duplicate_state(crtc, &new_priv_state->base);

drivers/gpu/drm/loongson/lsdc_crtc.c

433

old_priv_state = to_lsdc_crtc_state(crtc->state);

drivers/gpu/drm/loongson/lsdc_crtc.c

441

static u32 lsdc_crtc_get_vblank_counter(struct drm_crtc *crtc)

drivers/gpu/drm/loongson/lsdc_crtc.c

443

struct lsdc_crtc *lcrtc = to_lsdc_crtc(crtc);

drivers/gpu/drm/loongson/lsdc_crtc.c

449

static int lsdc_crtc_enable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/loongson/lsdc_crtc.c

451

struct lsdc_crtc *lcrtc = to_lsdc_crtc(crtc);

drivers/gpu/drm/loongson/lsdc_crtc.c

461

static void lsdc_crtc_disable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/loongson/lsdc_crtc.c

463

struct lsdc_crtc *lcrtc = to_lsdc_crtc(crtc);

drivers/gpu/drm/loongson/lsdc_crtc.c

579

struct drm_crtc *crtc = &lcrtc->base;

drivers/gpu/drm/loongson/lsdc_crtc.c

580

struct drm_display_mode *mode = &crtc->state->mode;

drivers/gpu/drm/loongson/lsdc_crtc.c

586

seq_printf(m, "%s: %dx%d@%d\n", crtc->name,

drivers/gpu/drm/loongson/lsdc_crtc.c

628

struct drm_crtc *crtc = inode->i_private;

drivers/gpu/drm/loongson/lsdc_crtc.c

630

return single_open(file, lsdc_crtc_man_op_show, crtc);

drivers/gpu/drm/loongson/lsdc_crtc.c

674

static int lsdc_crtc_late_register(struct drm_crtc *crtc)

drivers/gpu/drm/loongson/lsdc_crtc.c

676

struct lsdc_display_pipe *dispipe = crtc_to_display_pipe(crtc);

drivers/gpu/drm/loongson/lsdc_crtc.c

677

struct lsdc_crtc *lcrtc = to_lsdc_crtc(crtc);

drivers/gpu/drm/loongson/lsdc_crtc.c

678

struct drm_minor *minor = crtc->dev->primary;

drivers/gpu/drm/loongson/lsdc_crtc.c

691

crtc->debugfs_entry, minor);

drivers/gpu/drm/loongson/lsdc_crtc.c

694

debugfs_create_file("ops", 0644, crtc->debugfs_entry, lcrtc,

drivers/gpu/drm/loongson/lsdc_crtc.c

744

lsdc_crtc_mode_valid(struct drm_crtc *crtc, const struct drm_display_mode *mode)

drivers/gpu/drm/loongson/lsdc_crtc.c

746

struct drm_device *ddev = crtc->dev;

drivers/gpu/drm/loongson/lsdc_crtc.c

775

static int lsdc_pixpll_atomic_check(struct drm_crtc *crtc,

drivers/gpu/drm/loongson/lsdc_crtc.c

778

struct lsdc_crtc *lcrtc = to_lsdc_crtc(crtc);

drivers/gpu/drm/loongson/lsdc_crtc.c

787

drm_warn(crtc->dev, "Failed to find PLL params for %ukHz\n",

drivers/gpu/drm/loongson/lsdc_crtc.c

795

static int lsdc_crtc_helper_atomic_check(struct drm_crtc *crtc,

drivers/gpu/drm/loongson/lsdc_crtc.c

798

struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/loongson/lsdc_crtc.c

803

return lsdc_pixpll_atomic_check(crtc, crtc_state);

drivers/gpu/drm/loongson/lsdc_crtc.c

806

static void lsdc_crtc_mode_set_nofb(struct drm_crtc *crtc)

drivers/gpu/drm/loongson/lsdc_crtc.c

808

struct lsdc_crtc *lcrtc = to_lsdc_crtc(crtc);

drivers/gpu/drm/loongson/lsdc_crtc.c

812

struct drm_crtc_state *state = crtc->state;

drivers/gpu/drm/loongson/lsdc_crtc.c

841

static void lsdc_crtc_send_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/loongson/lsdc_crtc.c

843

struct drm_device *ddev = crtc->dev;

drivers/gpu/drm/loongson/lsdc_crtc.c

846

if (!crtc->state || !crtc->state->event)

drivers/gpu/drm/loongson/lsdc_crtc.c

852

drm_crtc_send_vblank_event(crtc, crtc->state->event);

drivers/gpu/drm/loongson/lsdc_crtc.c

853

crtc->state->event = NULL;

drivers/gpu/drm/loongson/lsdc_crtc.c

857

static void lsdc_crtc_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/loongson/lsdc_crtc.c

860

struct lsdc_crtc *lcrtc = to_lsdc_crtc(crtc);

drivers/gpu/drm/loongson/lsdc_crtc.c

863

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/loongson/lsdc_crtc.c

868

static void lsdc_crtc_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/loongson/lsdc_crtc.c

871

struct lsdc_crtc *lcrtc = to_lsdc_crtc(crtc);

drivers/gpu/drm/loongson/lsdc_crtc.c

874

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/loongson/lsdc_crtc.c

882

lsdc_crtc_send_vblank(crtc);

drivers/gpu/drm/loongson/lsdc_crtc.c

885

static void lsdc_crtc_atomic_flush(struct drm_crtc *crtc,

drivers/gpu/drm/loongson/lsdc_crtc.c

888

spin_lock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/loongson/lsdc_crtc.c

889

if (crtc->state->event) {

drivers/gpu/drm/loongson/lsdc_crtc.c

890

if (drm_crtc_vblank_get(crtc) == 0)

drivers/gpu/drm/loongson/lsdc_crtc.c

891

drm_crtc_arm_vblank_event(crtc, crtc->state->event);

drivers/gpu/drm/loongson/lsdc_crtc.c

893

drm_crtc_send_vblank_event(crtc, crtc->state->event);

drivers/gpu/drm/loongson/lsdc_crtc.c

894

crtc->state->event = NULL;

drivers/gpu/drm/loongson/lsdc_crtc.c

896

spin_unlock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/loongson/lsdc_crtc.c

899

static bool lsdc_crtc_get_scanout_position(struct drm_crtc *crtc,

drivers/gpu/drm/loongson/lsdc_crtc.c

907

struct lsdc_crtc *lcrtc = to_lsdc_crtc(crtc);

drivers/gpu/drm/loongson/lsdc_crtc.c

951

struct drm_crtc *crtc,

drivers/gpu/drm/loongson/lsdc_crtc.c

957

struct lsdc_crtc *lcrtc = to_lsdc_crtc(crtc);

drivers/gpu/drm/loongson/lsdc_crtc.c

970

ret = drm_crtc_init_with_planes(ddev, crtc, primary, cursor,

drivers/gpu/drm/loongson/lsdc_crtc.c

978

drm_crtc_helper_add(crtc, &lsdc_crtc_helper_funcs);

drivers/gpu/drm/loongson/lsdc_crtc.c

980

ret = drm_mode_crtc_set_gamma_size(crtc, 256);

drivers/gpu/drm/loongson/lsdc_crtc.c

984

drm_crtc_enable_color_mgmt(crtc, 0, false, 256);

drivers/gpu/drm/loongson/lsdc_crtc.c

990

struct drm_crtc *crtc,

drivers/gpu/drm/loongson/lsdc_crtc.c

996

struct lsdc_crtc *lcrtc = to_lsdc_crtc(crtc);

drivers/gpu/drm/loongson/lsdc_drv.c

107

ret = funcs->crtc_init(ddev, &dispipe->crtc.base,

drivers/gpu/drm/loongson/lsdc_drv.h

188

struct lsdc_crtc crtc;

drivers/gpu/drm/loongson/lsdc_drv.h

223

struct drm_crtc *crtc,

drivers/gpu/drm/loongson/lsdc_drv.h

231

to_lsdc_crtc(struct drm_crtc *crtc)

drivers/gpu/drm/loongson/lsdc_drv.h

233

return container_of(crtc, struct lsdc_crtc, base);

drivers/gpu/drm/loongson/lsdc_drv.h

237

crtc_to_display_pipe(struct drm_crtc *crtc)

drivers/gpu/drm/loongson/lsdc_drv.h

239

return container_of(crtc, struct lsdc_display_pipe, crtc.base);

drivers/gpu/drm/loongson/lsdc_drv.h

319

struct drm_crtc *crtc,

drivers/gpu/drm/loongson/lsdc_drv.h

326

struct drm_crtc *crtc,

drivers/gpu/drm/loongson/lsdc_plane.c

200

crtc_state = drm_atomic_get_new_crtc_state(state, new_state->crtc);

drivers/gpu/drm/loongson/lsdc_plane.c

204

if (plane->state->crtc != new_state->crtc ||

drivers/gpu/drm/loongson/lsdc_plane.c

275

struct drm_crtc *crtc;

drivers/gpu/drm/loongson/lsdc_plane.c

279

crtc = new_plane_state->crtc;

drivers/gpu/drm/loongson/lsdc_plane.c

280

if (!crtc) {

drivers/gpu/drm/loongson/lsdc_plane.c

291

new_crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/loongson/lsdc_plane.c

348

struct drm_crtc *crtc;

drivers/gpu/drm/loongson/lsdc_plane.c

352

crtc = new_plane_state->crtc;

drivers/gpu/drm/loongson/lsdc_plane.c

353

if (!crtc) {

drivers/gpu/drm/loongson/lsdc_plane.c

370

new_crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/loongson/lsdc_plane.c

54

struct drm_crtc *crtc = new_plane_state->crtc;

drivers/gpu/drm/loongson/lsdc_plane.c

57

if (!crtc)

drivers/gpu/drm/loongson/lsdc_plane.c

60

new_crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/mcde/mcde_display.c

1156

struct drm_crtc *crtc = &pipe->crtc;

drivers/gpu/drm/mcde/mcde_display.c

1158

struct drm_device *drm = crtc->dev;

drivers/gpu/drm/mcde/mcde_display.c

1278

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/mcde/mcde_display.c

1303

struct drm_crtc *crtc = &pipe->crtc;

drivers/gpu/drm/mcde/mcde_display.c

1304

struct drm_device *drm = crtc->dev;

drivers/gpu/drm/mcde/mcde_display.c

1309

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/mcde/mcde_display.c

1321

event = crtc->state->event;

drivers/gpu/drm/mcde/mcde_display.c

1323

crtc->state->event = NULL;

drivers/gpu/drm/mcde/mcde_display.c

1325

spin_lock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/mcde/mcde_display.c

1326

drm_crtc_send_vblank_event(crtc, event);

drivers/gpu/drm/mcde/mcde_display.c

1327

spin_unlock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/mcde/mcde_display.c

135

drm_crtc_handle_vblank(&mcde->pipe.crtc);

drivers/gpu/drm/mcde/mcde_display.c

1387

struct drm_crtc *crtc = &pipe->crtc;

drivers/gpu/drm/mcde/mcde_display.c

1388

struct drm_device *drm = crtc->dev;

drivers/gpu/drm/mcde/mcde_display.c

1390

struct drm_pending_vblank_event *event = crtc->state->event;

drivers/gpu/drm/mcde/mcde_display.c

1401

crtc->state->event = NULL;

drivers/gpu/drm/mcde/mcde_display.c

1403

spin_lock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/mcde/mcde_display.c

1411

if (crtc->state->active && drm_crtc_vblank_get(crtc) == 0) {

drivers/gpu/drm/mcde/mcde_display.c

1413

drm_crtc_arm_vblank_event(crtc, event);

drivers/gpu/drm/mcde/mcde_display.c

1416

drm_crtc_send_vblank_event(crtc, event);

drivers/gpu/drm/mcde/mcde_display.c

1419

spin_unlock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/mcde/mcde_display.c

1448

struct drm_crtc *crtc = &pipe->crtc;

drivers/gpu/drm/mcde/mcde_display.c

1449

struct drm_device *drm = crtc->dev;

drivers/gpu/drm/mcde/mcde_display.c

1467

struct drm_crtc *crtc = &pipe->crtc;

drivers/gpu/drm/mcde/mcde_display.c

1468

struct drm_device *drm = crtc->dev;

drivers/gpu/drm/mediatek/mtk_crtc.c

102

spin_lock_irqsave(&crtc->dev->event_lock, flags);

drivers/gpu/drm/mediatek/mtk_crtc.c

103

drm_crtc_send_vblank_event(crtc, mtk_crtc->event);

drivers/gpu/drm/mediatek/mtk_crtc.c

104

drm_crtc_vblank_put(crtc);

drivers/gpu/drm/mediatek/mtk_crtc.c

106

spin_unlock_irqrestore(&crtc->dev->event_lock, flags);

drivers/gpu/drm/mediatek/mtk_crtc.c

129

static void mtk_crtc_destroy(struct drm_crtc *crtc)

drivers/gpu/drm/mediatek/mtk_crtc.c

131

struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);

drivers/gpu/drm/mediatek/mtk_crtc.c

150

drm_crtc_cleanup(crtc);

drivers/gpu/drm/mediatek/mtk_crtc.c

153

static void mtk_crtc_reset(struct drm_crtc *crtc)

drivers/gpu/drm/mediatek/mtk_crtc.c

157

if (crtc->state)

drivers/gpu/drm/mediatek/mtk_crtc.c

158

__drm_atomic_helper_crtc_destroy_state(crtc->state);

drivers/gpu/drm/mediatek/mtk_crtc.c

160

kfree(to_mtk_crtc_state(crtc->state));

drivers/gpu/drm/mediatek/mtk_crtc.c

161

crtc->state = NULL;

drivers/gpu/drm/mediatek/mtk_crtc.c

165

__drm_atomic_helper_crtc_reset(crtc, &state->base);

drivers/gpu/drm/mediatek/mtk_crtc.c

168

static struct drm_crtc_state *mtk_crtc_duplicate_state(struct drm_crtc *crtc)

drivers/gpu/drm/mediatek/mtk_crtc.c

176

__drm_atomic_helper_crtc_duplicate_state(crtc, &state->base);

drivers/gpu/drm/mediatek/mtk_crtc.c

178

WARN_ON(state->base.crtc != crtc);

drivers/gpu/drm/mediatek/mtk_crtc.c

179

state->base.crtc = crtc;

drivers/gpu/drm/mediatek/mtk_crtc.c

185

static void mtk_crtc_destroy_state(struct drm_crtc *crtc,

drivers/gpu/drm/mediatek/mtk_crtc.c

193

mtk_crtc_mode_valid(struct drm_crtc *crtc, const struct drm_display_mode *mode)

drivers/gpu/drm/mediatek/mtk_crtc.c

195

struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);

drivers/gpu/drm/mediatek/mtk_crtc.c

207

static bool mtk_crtc_mode_fixup(struct drm_crtc *crtc,

drivers/gpu/drm/mediatek/mtk_crtc.c

215

static void mtk_crtc_mode_set_nofb(struct drm_crtc *crtc)

drivers/gpu/drm/mediatek/mtk_crtc.c

217

struct mtk_crtc_state *state = to_mtk_crtc_state(crtc->state);

drivers/gpu/drm/mediatek/mtk_crtc.c

219

state->pending_width = crtc->mode.hdisplay;

drivers/gpu/drm/mediatek/mtk_crtc.c

220

state->pending_height = crtc->mode.vdisplay;

drivers/gpu/drm/mediatek/mtk_crtc.c

221

state->pending_vrefresh = drm_mode_vrefresh(&crtc->mode);

drivers/gpu/drm/mediatek/mtk_crtc.c

256

struct mtk_ddp_comp *mtk_ddp_comp_for_plane(struct drm_crtc *crtc,

drivers/gpu/drm/mediatek/mtk_crtc.c

260

struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);

drivers/gpu/drm/mediatek/mtk_crtc.c

343

struct drm_crtc *crtc = &mtk_crtc->base;

drivers/gpu/drm/mediatek/mtk_crtc.c

352

if (WARN_ON(!crtc->state))

drivers/gpu/drm/mediatek/mtk_crtc.c

355

width = crtc->state->adjusted_mode.hdisplay;

drivers/gpu/drm/mediatek/mtk_crtc.c

356

height = crtc->state->adjusted_mode.vdisplay;

drivers/gpu/drm/mediatek/mtk_crtc.c

357

vrefresh = drm_mode_vrefresh(&crtc->state->adjusted_mode);

drivers/gpu/drm/mediatek/mtk_crtc.c

359

drm_for_each_encoder(encoder, crtc->dev) {

drivers/gpu/drm/mediatek/mtk_crtc.c

360

if (encoder->crtc != crtc)

drivers/gpu/drm/mediatek/mtk_crtc.c

363

drm_connector_list_iter_begin(crtc->dev, &conn_iter);

drivers/gpu/drm/mediatek/mtk_crtc.c

374

ret = pm_runtime_resume_and_get(crtc->dev->dev);

drivers/gpu/drm/mediatek/mtk_crtc.c

427

comp = mtk_ddp_comp_for_plane(crtc, plane, &local_layer);

drivers/gpu/drm/mediatek/mtk_crtc.c

438

pm_runtime_put(crtc->dev->dev);

drivers/gpu/drm/mediatek/mtk_crtc.c

445

struct drm_crtc *crtc = &mtk_crtc->base;

drivers/gpu/drm/mediatek/mtk_crtc.c

477

if (crtc->state->event && !crtc->state->active) {

drivers/gpu/drm/mediatek/mtk_crtc.c

478

spin_lock_irqsave(&crtc->dev->event_lock, flags);

drivers/gpu/drm/mediatek/mtk_crtc.c

479

drm_crtc_send_vblank_event(crtc, crtc->state->event);

drivers/gpu/drm/mediatek/mtk_crtc.c

480

crtc->state->event = NULL;

drivers/gpu/drm/mediatek/mtk_crtc.c

481

spin_unlock_irqrestore(&crtc->dev->event_lock, flags);

drivers/gpu/drm/mediatek/mtk_crtc.c

485

static void mtk_crtc_ddp_config(struct drm_crtc *crtc,

drivers/gpu/drm/mediatek/mtk_crtc.c

488

struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);

drivers/gpu/drm/mediatek/mtk_crtc.c

519

comp = mtk_ddp_comp_for_plane(crtc, plane, &local_layer);

drivers/gpu/drm/mediatek/mtk_crtc.c

543

comp = mtk_ddp_comp_for_plane(crtc, plane, &local_layer);

drivers/gpu/drm/mediatek/mtk_crtc.c

563

struct drm_crtc *crtc = &mtk_crtc->base;

drivers/gpu/drm/mediatek/mtk_crtc.c

564

struct mtk_drm_private *priv = crtc->dev->dev_private;

drivers/gpu/drm/mediatek/mtk_crtc.c

600

mtk_crtc_ddp_config(crtc, NULL);

drivers/gpu/drm/mediatek/mtk_crtc.c

609

mtk_crtc_ddp_config(crtc, cmdq_handle);

drivers/gpu/drm/mediatek/mtk_crtc.c

648

struct drm_crtc *crtc = data;

drivers/gpu/drm/mediatek/mtk_crtc.c

649

struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);

drivers/gpu/drm/mediatek/mtk_crtc.c

650

struct mtk_drm_private *priv = crtc->dev->dev_private;

drivers/gpu/drm/mediatek/mtk_crtc.c

655

mtk_crtc_ddp_config(crtc, NULL);

drivers/gpu/drm/mediatek/mtk_crtc.c

661

mtk_crtc_ddp_config(crtc, NULL);

drivers/gpu/drm/mediatek/mtk_crtc.c

666

static int mtk_crtc_enable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/mediatek/mtk_crtc.c

668

struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);

drivers/gpu/drm/mediatek/mtk_crtc.c

676

static void mtk_crtc_disable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/mediatek/mtk_crtc.c

678

struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);

drivers/gpu/drm/mediatek/mtk_crtc.c

684

static void mtk_crtc_update_output(struct drm_crtc *crtc,

drivers/gpu/drm/mediatek/mtk_crtc.c

687

int crtc_index = drm_crtc_index(crtc);

drivers/gpu/drm/mediatek/mtk_crtc.c

691

struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);

drivers/gpu/drm/mediatek/mtk_crtc.c

701

priv = ((struct mtk_drm_private *)crtc->dev->dev_private)->all_drm_private[crtc_index];

drivers/gpu/drm/mediatek/mtk_crtc.c

721

int mtk_crtc_plane_check(struct drm_crtc *crtc, struct drm_plane *plane,

drivers/gpu/drm/mediatek/mtk_crtc.c

727

comp = mtk_ddp_comp_for_plane(crtc, plane, &local_layer);

drivers/gpu/drm/mediatek/mtk_crtc.c

733

void mtk_crtc_plane_disable(struct drm_crtc *crtc, struct drm_plane *plane)

drivers/gpu/drm/mediatek/mtk_crtc.c

736

struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);

drivers/gpu/drm/mediatek/mtk_crtc.c

766

void mtk_crtc_async_update(struct drm_crtc *crtc, struct drm_plane *plane,

drivers/gpu/drm/mediatek/mtk_crtc.c

769

struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);

drivers/gpu/drm/mediatek/mtk_crtc.c

777

static void mtk_crtc_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/mediatek/mtk_crtc.c

780

struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);

drivers/gpu/drm/mediatek/mtk_crtc.c

785

drm_dbg_driver(dev, "%s %d\n", __func__, crtc->base.id);

drivers/gpu/drm/mediatek/mtk_crtc.c

793

mtk_crtc_update_output(crtc, state);

drivers/gpu/drm/mediatek/mtk_crtc.c

801

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/mediatek/mtk_crtc.c

805

static void mtk_crtc_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/mediatek/mtk_crtc.c

808

struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);

drivers/gpu/drm/mediatek/mtk_crtc.c

813

drm_dbg_driver(dev, "%s %d\n", __func__, crtc->base.id);

drivers/gpu/drm/mediatek/mtk_crtc.c

837

drm_crtc_wait_one_vblank(crtc);

drivers/gpu/drm/mediatek/mtk_crtc.c

839

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/mediatek/mtk_crtc.c

846

static void mtk_crtc_atomic_begin(struct drm_crtc *crtc,

drivers/gpu/drm/mediatek/mtk_crtc.c

850

crtc);

drivers/gpu/drm/mediatek/mtk_crtc.c

852

struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);

drivers/gpu/drm/mediatek/mtk_crtc.c

860

mtk_crtc_state->base.event->pipe = drm_crtc_index(crtc);

drivers/gpu/drm/mediatek/mtk_crtc.c

861

WARN_ON(drm_crtc_vblank_get(crtc) != 0);

drivers/gpu/drm/mediatek/mtk_crtc.c

863

spin_lock_irqsave(&crtc->dev->event_lock, flags);

drivers/gpu/drm/mediatek/mtk_crtc.c

865

spin_unlock_irqrestore(&crtc->dev->event_lock, flags);

drivers/gpu/drm/mediatek/mtk_crtc.c

871

static void mtk_crtc_atomic_flush(struct drm_crtc *crtc,

drivers/gpu/drm/mediatek/mtk_crtc.c

874

struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);

drivers/gpu/drm/mediatek/mtk_crtc.c

877

if (crtc->state->color_mgmt_changed)

drivers/gpu/drm/mediatek/mtk_crtc.c

879

mtk_ddp_gamma_set(mtk_crtc->ddp_comp[i], crtc->state);

drivers/gpu/drm/mediatek/mtk_crtc.c

880

mtk_ddp_ctm_set(mtk_crtc->ddp_comp[i], crtc->state);

drivers/gpu/drm/mediatek/mtk_crtc.c

98

struct drm_crtc *crtc = &mtk_crtc->base;

drivers/gpu/drm/mediatek/mtk_crtc.c

990

struct device *mtk_crtc_dma_dev_get(struct drm_crtc *crtc)

drivers/gpu/drm/mediatek/mtk_crtc.c

994

if (!crtc)

drivers/gpu/drm/mediatek/mtk_crtc.c

997

mtk_crtc = to_mtk_crtc(crtc);

drivers/gpu/drm/mediatek/mtk_crtc.h

17

void mtk_crtc_commit(struct drm_crtc *crtc);

drivers/gpu/drm/mediatek/mtk_crtc.h

22

int mtk_crtc_plane_check(struct drm_crtc *crtc, struct drm_plane *plane,

drivers/gpu/drm/mediatek/mtk_crtc.h

24

void mtk_crtc_plane_disable(struct drm_crtc *crtc, struct drm_plane *plane);

drivers/gpu/drm/mediatek/mtk_crtc.h

25

void mtk_crtc_async_update(struct drm_crtc *crtc, struct drm_plane *plane,

drivers/gpu/drm/mediatek/mtk_crtc.h

27

struct device *mtk_crtc_dma_dev_get(struct drm_crtc *crtc);

drivers/gpu/drm/mediatek/mtk_disp_color.c

39

struct drm_crtc *crtc;

drivers/gpu/drm/mediatek/mtk_disp_ovl.c

161

struct drm_crtc *crtc;

drivers/gpu/drm/mediatek/mtk_dp.c

2550

struct drm_crtc *crtc = conn_state->crtc;

drivers/gpu/drm/mediatek/mtk_dp.c

2564

if (!crtc) {

drivers/gpu/drm/mediatek/mtk_drm_drv.c

466

struct drm_crtc *crtc;

drivers/gpu/drm/mediatek/mtk_drm_drv.c

559

crtc = drm_crtc_from_index(drm, 0);

drivers/gpu/drm/mediatek/mtk_drm_drv.c

560

if (crtc)

drivers/gpu/drm/mediatek/mtk_drm_drv.c

561

dma_dev = mtk_crtc_dma_dev_get(crtc);

drivers/gpu/drm/mediatek/mtk_plane.c

105

new_plane_state->crtc);

drivers/gpu/drm/mediatek/mtk_plane.c

217

mtk_crtc_async_update(new_state->crtc, plane, state);

drivers/gpu/drm/mediatek/mtk_plane.c

242

if (WARN_ON(!new_plane_state->crtc))

drivers/gpu/drm/mediatek/mtk_plane.c

245

ret = mtk_crtc_plane_check(new_plane_state->crtc, plane,

drivers/gpu/drm/mediatek/mtk_plane.c

251

new_plane_state->crtc);

drivers/gpu/drm/mediatek/mtk_plane.c

275

if (old_state && old_state->crtc)

drivers/gpu/drm/mediatek/mtk_plane.c

276

mtk_crtc_plane_disable(old_state->crtc, plane);

drivers/gpu/drm/mediatek/mtk_plane.c

286

if (!new_state->crtc || WARN_ON(!new_state->fb))

drivers/gpu/drm/mediatek/mtk_plane.c

90

if (plane != new_plane_state->crtc->cursor)

drivers/gpu/drm/mediatek/mtk_plane.c

99

ret = mtk_crtc_plane_check(new_plane_state->crtc, plane,

drivers/gpu/drm/meson/meson_crtc.c

117

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/meson/meson_crtc.c

120

static void meson_crtc_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/meson/meson_crtc.c

123

struct meson_crtc *meson_crtc = to_meson_crtc(crtc);

drivers/gpu/drm/meson/meson_crtc.c

124

struct drm_crtc_state *crtc_state = crtc->state;

drivers/gpu/drm/meson/meson_crtc.c

145

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/meson/meson_crtc.c

148

static void meson_g12a_crtc_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/meson/meson_crtc.c

151

struct meson_crtc *meson_crtc = to_meson_crtc(crtc);

drivers/gpu/drm/meson/meson_crtc.c

156

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/meson/meson_crtc.c

164

if (crtc->state->event && !crtc->state->active) {

drivers/gpu/drm/meson/meson_crtc.c

165

spin_lock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/meson/meson_crtc.c

166

drm_crtc_send_vblank_event(crtc, crtc->state->event);

drivers/gpu/drm/meson/meson_crtc.c

167

spin_unlock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/meson/meson_crtc.c

169

crtc->state->event = NULL;

drivers/gpu/drm/meson/meson_crtc.c

173

static void meson_crtc_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/meson/meson_crtc.c

176

struct meson_crtc *meson_crtc = to_meson_crtc(crtc);

drivers/gpu/drm/meson/meson_crtc.c

181

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/meson/meson_crtc.c

194

if (crtc->state->event && !crtc->state->active) {

drivers/gpu/drm/meson/meson_crtc.c

195

spin_lock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/meson/meson_crtc.c

196

drm_crtc_send_vblank_event(crtc, crtc->state->event);

drivers/gpu/drm/meson/meson_crtc.c

197

spin_unlock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/meson/meson_crtc.c

199

crtc->state->event = NULL;

drivers/gpu/drm/meson/meson_crtc.c

203

static void meson_crtc_atomic_begin(struct drm_crtc *crtc,

drivers/gpu/drm/meson/meson_crtc.c

206

struct meson_crtc *meson_crtc = to_meson_crtc(crtc);

drivers/gpu/drm/meson/meson_crtc.c

209

if (crtc->state->event) {

drivers/gpu/drm/meson/meson_crtc.c

210

WARN_ON(drm_crtc_vblank_get(crtc) != 0);

drivers/gpu/drm/meson/meson_crtc.c

212

spin_lock_irqsave(&crtc->dev->event_lock, flags);

drivers/gpu/drm/meson/meson_crtc.c

213

meson_crtc->event = crtc->state->event;

drivers/gpu/drm/meson/meson_crtc.c

214

spin_unlock_irqrestore(&crtc->dev->event_lock, flags);

drivers/gpu/drm/meson/meson_crtc.c

215

crtc->state->event = NULL;

drivers/gpu/drm/meson/meson_crtc.c

219

static void meson_crtc_atomic_flush(struct drm_crtc *crtc,

drivers/gpu/drm/meson/meson_crtc.c

222

struct meson_crtc *meson_crtc = to_meson_crtc(crtc);

drivers/gpu/drm/meson/meson_crtc.c

315

struct meson_crtc *meson_crtc = to_meson_crtc(priv->crtc);

drivers/gpu/drm/meson/meson_crtc.c

50

static int meson_crtc_enable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/meson/meson_crtc.c

52

struct meson_crtc *meson_crtc = to_meson_crtc(crtc);

drivers/gpu/drm/meson/meson_crtc.c

61

static void meson_crtc_disable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/meson/meson_crtc.c

63

struct meson_crtc *meson_crtc = to_meson_crtc(crtc);

drivers/gpu/drm/meson/meson_crtc.c

663

drm_crtc_handle_vblank(priv->crtc);

drivers/gpu/drm/meson/meson_crtc.c

667

drm_crtc_send_vblank_event(priv->crtc, meson_crtc->event);

drivers/gpu/drm/meson/meson_crtc.c

668

drm_crtc_vblank_put(priv->crtc);

drivers/gpu/drm/meson/meson_crtc.c

677

struct drm_crtc *crtc;

drivers/gpu/drm/meson/meson_crtc.c

686

crtc = &meson_crtc->base;

drivers/gpu/drm/meson/meson_crtc.c

687

ret = drm_crtc_init_with_planes(priv->drm, crtc,

drivers/gpu/drm/meson/meson_crtc.c

703

drm_crtc_helper_add(crtc, &meson_g12a_crtc_helper_funcs);

drivers/gpu/drm/meson/meson_crtc.c

713

drm_crtc_helper_add(crtc, &meson_crtc_helper_funcs);

drivers/gpu/drm/meson/meson_crtc.c

716

priv->crtc = crtc;

drivers/gpu/drm/meson/meson_crtc.c

84

static void meson_g12a_crtc_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/meson/meson_crtc.c

87

struct meson_crtc *meson_crtc = to_meson_crtc(crtc);

drivers/gpu/drm/meson/meson_crtc.c

88

struct drm_crtc_state *crtc_state = crtc->state;

drivers/gpu/drm/meson/meson_drv.h

57

struct drm_crtc *crtc;

drivers/gpu/drm/meson/meson_encoder_cvbs.c

159

crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc);

drivers/gpu/drm/meson/meson_encoder_dsi.c

61

crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc);

drivers/gpu/drm/meson/meson_encoder_hdmi.c

212

crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc);

drivers/gpu/drm/meson/meson_overlay.c

176

if (!new_plane_state->crtc)

drivers/gpu/drm/meson/meson_overlay.c

180

new_plane_state->crtc);

drivers/gpu/drm/meson/meson_overlay.c

233

struct drm_crtc_state *crtc_state = priv->crtc->state;

drivers/gpu/drm/meson/meson_overlay.c

486

interlace_mode = new_state->crtc->mode.flags & DRM_MODE_FLAG_INTERLACE;

drivers/gpu/drm/meson/meson_plane.c

255

if (new_state->crtc->mode.flags & DRM_MODE_FLAG_INTERLACE) {

drivers/gpu/drm/meson/meson_plane.c

277

if (new_state->crtc->mode.flags & DRM_MODE_FLAG_INTERLACE) {

drivers/gpu/drm/meson/meson_plane.c

286

if (new_state->crtc->mode.flags & DRM_MODE_FLAG_INTERLACE)

drivers/gpu/drm/meson/meson_plane.c

318

if (new_state->crtc->mode.flags & DRM_MODE_FLAG_INTERLACE)

drivers/gpu/drm/meson/meson_plane.c

82

if (!new_plane_state->crtc)

drivers/gpu/drm/meson/meson_plane.c

86

new_plane_state->crtc);

drivers/gpu/drm/mgag200/mgag200_drv.h

256

int (*pixpllc_atomic_check)(struct drm_crtc *crtc, struct drm_atomic_state *new_state);

drivers/gpu/drm/mgag200/mgag200_drv.h

263

void (*pixpllc_atomic_update)(struct drm_crtc *crtc, struct drm_atomic_state *old_state);

drivers/gpu/drm/mgag200/mgag200_drv.h

281

struct drm_crtc crtc;

drivers/gpu/drm/mgag200/mgag200_drv.h

335

void mgag200_g200wb_pixpllc_atomic_update(struct drm_crtc *crtc, struct drm_atomic_state *old_state);

drivers/gpu/drm/mgag200/mgag200_drv.h

339

void mgag200_g200eh_pixpllc_atomic_update(struct drm_crtc *crtc, struct drm_atomic_state *old_state);

drivers/gpu/drm/mgag200/mgag200_drv.h

396

enum drm_mode_status mgag200_crtc_helper_mode_valid(struct drm_crtc *crtc,

drivers/gpu/drm/mgag200/mgag200_drv.h

398

int mgag200_crtc_helper_atomic_check(struct drm_crtc *crtc, struct drm_atomic_state *new_state);

drivers/gpu/drm/mgag200/mgag200_drv.h

399

void mgag200_crtc_helper_atomic_flush(struct drm_crtc *crtc, struct drm_atomic_state *old_state);

drivers/gpu/drm/mgag200/mgag200_drv.h

400

void mgag200_crtc_helper_atomic_enable(struct drm_crtc *crtc, struct drm_atomic_state *old_state);

drivers/gpu/drm/mgag200/mgag200_drv.h

401

void mgag200_crtc_helper_atomic_disable(struct drm_crtc *crtc, struct drm_atomic_state *old_state);

drivers/gpu/drm/mgag200/mgag200_drv.h

410

void mgag200_crtc_reset(struct drm_crtc *crtc);

drivers/gpu/drm/mgag200/mgag200_drv.h

411

struct drm_crtc_state *mgag200_crtc_atomic_duplicate_state(struct drm_crtc *crtc);

drivers/gpu/drm/mgag200/mgag200_drv.h

412

void mgag200_crtc_atomic_destroy_state(struct drm_crtc *crtc, struct drm_crtc_state *crtc_state);

drivers/gpu/drm/mgag200/mgag200_g200.c

140

static void mgag200_g200_pixpllc_atomic_update(struct drm_crtc *crtc,

drivers/gpu/drm/mgag200/mgag200_g200.c

143

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/mgag200/mgag200_g200.c

145

struct drm_crtc_state *crtc_state = crtc->state;

drivers/gpu/drm/mgag200/mgag200_g200.c

191

struct drm_crtc *crtc = &mdev->crtc;

drivers/gpu/drm/mgag200/mgag200_g200.c

207

ret = drm_crtc_init_with_planes(dev, crtc, primary_plane, NULL,

drivers/gpu/drm/mgag200/mgag200_g200.c

213

drm_crtc_helper_add(crtc, &mgag200_g200_crtc_helper_funcs);

drivers/gpu/drm/mgag200/mgag200_g200.c

216

drm_mode_crtc_set_gamma_size(crtc, MGAG200_LUT_SIZE);

drivers/gpu/drm/mgag200/mgag200_g200.c

217

drm_crtc_enable_color_mgmt(crtc, 0, false, MGAG200_LUT_SIZE);

drivers/gpu/drm/mgag200/mgag200_g200.c

65

static int mgag200_g200_pixpllc_atomic_check(struct drm_crtc *crtc, struct drm_atomic_state *new_state)

drivers/gpu/drm/mgag200/mgag200_g200.c

73

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/mgag200/mgag200_g200.c

75

struct drm_crtc_state *new_crtc_state = drm_atomic_get_new_crtc_state(new_state, crtc);

drivers/gpu/drm/mgag200/mgag200_g200eh.c

190

struct drm_crtc *crtc = &mdev->crtc;

drivers/gpu/drm/mgag200/mgag200_g200eh.c

206

ret = drm_crtc_init_with_planes(dev, crtc, primary_plane, NULL,

drivers/gpu/drm/mgag200/mgag200_g200eh.c

212

drm_crtc_helper_add(crtc, &mgag200_g200eh_crtc_helper_funcs);

drivers/gpu/drm/mgag200/mgag200_g200eh.c

215

drm_mode_crtc_set_gamma_size(crtc, MGAG200_LUT_SIZE);

drivers/gpu/drm/mgag200/mgag200_g200eh.c

216

drm_crtc_enable_color_mgmt(crtc, 0, false, MGAG200_LUT_SIZE);

drivers/gpu/drm/mgag200/mgag200_g200eh.c

43

static int mgag200_g200eh_pixpllc_atomic_check(struct drm_crtc *crtc,

drivers/gpu/drm/mgag200/mgag200_g200eh.c

50

struct drm_crtc_state *new_crtc_state = drm_atomic_get_new_crtc_state(new_state, crtc);

drivers/gpu/drm/mgag200/mgag200_g200eh.c

93

void mgag200_g200eh_pixpllc_atomic_update(struct drm_crtc *crtc,

drivers/gpu/drm/mgag200/mgag200_g200eh.c

96

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/mgag200/mgag200_g200eh.c

98

struct drm_crtc_state *crtc_state = crtc->state;

drivers/gpu/drm/mgag200/mgag200_g200eh3.c

110

ret = drm_crtc_init_with_planes(dev, crtc, primary_plane, NULL,

drivers/gpu/drm/mgag200/mgag200_g200eh3.c

116

drm_crtc_helper_add(crtc, &mgag200_g200eh3_crtc_helper_funcs);

drivers/gpu/drm/mgag200/mgag200_g200eh3.c

119

drm_mode_crtc_set_gamma_size(crtc, MGAG200_LUT_SIZE);

drivers/gpu/drm/mgag200/mgag200_g200eh3.c

120

drm_crtc_enable_color_mgmt(crtc, 0, false, MGAG200_LUT_SIZE);

drivers/gpu/drm/mgag200/mgag200_g200eh3.c

18

static int mgag200_g200eh3_pixpllc_atomic_check(struct drm_crtc *crtc,

drivers/gpu/drm/mgag200/mgag200_g200eh3.c

25

struct drm_crtc_state *new_crtc_state = drm_atomic_get_new_crtc_state(new_state, crtc);

drivers/gpu/drm/mgag200/mgag200_g200eh3.c

94

struct drm_crtc *crtc = &mdev->crtc;

drivers/gpu/drm/mgag200/mgag200_g200eh5.c

112

struct drm_crtc *crtc = &mdev->crtc;

drivers/gpu/drm/mgag200/mgag200_g200eh5.c

128

ret = drm_crtc_init_with_planes(dev, crtc, primary_plane, NULL,

drivers/gpu/drm/mgag200/mgag200_g200eh5.c

135

drm_crtc_helper_add(crtc, &mgag200_g200eh5_crtc_helper_funcs);

drivers/gpu/drm/mgag200/mgag200_g200eh5.c

138

drm_mode_crtc_set_gamma_size(crtc, MGAG200_LUT_SIZE);

drivers/gpu/drm/mgag200/mgag200_g200eh5.c

139

drm_crtc_enable_color_mgmt(crtc, 0, false, MGAG200_LUT_SIZE);

drivers/gpu/drm/mgag200/mgag200_g200eh5.c

20

static int mgag200_g200eh5_pixpllc_atomic_check(struct drm_crtc *crtc,

drivers/gpu/drm/mgag200/mgag200_g200eh5.c

27

struct drm_crtc_state *new_crtc_state = drm_atomic_get_new_crtc_state(new_state, crtc);

drivers/gpu/drm/mgag200/mgag200_g200er.c

121

static void mgag200_g200er_pixpllc_atomic_update(struct drm_crtc *crtc,

drivers/gpu/drm/mgag200/mgag200_g200er.c

124

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/mgag200/mgag200_g200er.c

126

struct drm_crtc_state *crtc_state = crtc->state;

drivers/gpu/drm/mgag200/mgag200_g200er.c

184

static void mgag200_g200er_crtc_helper_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/mgag200/mgag200_g200er.c

187

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/mgag200/mgag200_g200er.c

190

struct drm_crtc_state *crtc_state = crtc->state;

drivers/gpu/drm/mgag200/mgag200_g200er.c

199

funcs->pixpllc_atomic_update(crtc, old_state);

drivers/gpu/drm/mgag200/mgag200_g200er.c

227

struct drm_crtc *crtc = &mdev->crtc;

drivers/gpu/drm/mgag200/mgag200_g200er.c

243

ret = drm_crtc_init_with_planes(dev, crtc, primary_plane, NULL,

drivers/gpu/drm/mgag200/mgag200_g200er.c

249

drm_crtc_helper_add(crtc, &mgag200_g200er_crtc_helper_funcs);

drivers/gpu/drm/mgag200/mgag200_g200er.c

252

drm_mode_crtc_set_gamma_size(crtc, MGAG200_LUT_SIZE);

drivers/gpu/drm/mgag200/mgag200_g200er.c

253

drm_crtc_enable_color_mgmt(crtc, 0, false, MGAG200_LUT_SIZE);

drivers/gpu/drm/mgag200/mgag200_g200er.c

60

static int mgag200_g200er_pixpllc_atomic_check(struct drm_crtc *crtc,

drivers/gpu/drm/mgag200/mgag200_g200er.c

68

struct drm_crtc_state *new_crtc_state = drm_atomic_get_new_crtc_state(new_state, crtc);

drivers/gpu/drm/mgag200/mgag200_g200ev.c

100

static void mgag200_g200ev_pixpllc_atomic_update(struct drm_crtc *crtc,

drivers/gpu/drm/mgag200/mgag200_g200ev.c

103

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/mgag200/mgag200_g200ev.c

105

struct drm_crtc_state *crtc_state = crtc->state;

drivers/gpu/drm/mgag200/mgag200_g200ev.c

185

static void mgag200_g200ev_crtc_helper_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/mgag200/mgag200_g200ev.c

188

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/mgag200/mgag200_g200ev.c

191

struct drm_crtc_state *crtc_state = crtc->state;

drivers/gpu/drm/mgag200/mgag200_g200ev.c

200

funcs->pixpllc_atomic_update(crtc, old_state);

drivers/gpu/drm/mgag200/mgag200_g200ev.c

228

struct drm_crtc *crtc = &mdev->crtc;

drivers/gpu/drm/mgag200/mgag200_g200ev.c

244

ret = drm_crtc_init_with_planes(dev, crtc, primary_plane, NULL,

drivers/gpu/drm/mgag200/mgag200_g200ev.c

250

drm_crtc_helper_add(crtc, &mgag200_g200ev_crtc_helper_funcs);

drivers/gpu/drm/mgag200/mgag200_g200ev.c

253

drm_mode_crtc_set_gamma_size(crtc, MGAG200_LUT_SIZE);

drivers/gpu/drm/mgag200/mgag200_g200ev.c

254

drm_crtc_enable_color_mgmt(crtc, 0, false, MGAG200_LUT_SIZE);

drivers/gpu/drm/mgag200/mgag200_g200ev.c

49

static int mgag200_g200ev_pixpllc_atomic_check(struct drm_crtc *crtc,

drivers/gpu/drm/mgag200/mgag200_g200ev.c

56

struct drm_crtc_state *new_crtc_state = drm_atomic_get_new_crtc_state(new_state, crtc);

drivers/gpu/drm/mgag200/mgag200_g200ew3.c

103

struct drm_crtc *crtc = &mdev->crtc;

drivers/gpu/drm/mgag200/mgag200_g200ew3.c

119

ret = drm_crtc_init_with_planes(dev, crtc, primary_plane, NULL,

drivers/gpu/drm/mgag200/mgag200_g200ew3.c

125

drm_crtc_helper_add(crtc, &mgag200_g200ew3_crtc_helper_funcs);

drivers/gpu/drm/mgag200/mgag200_g200ew3.c

128

drm_mode_crtc_set_gamma_size(crtc, MGAG200_LUT_SIZE);

drivers/gpu/drm/mgag200/mgag200_g200ew3.c

129

drm_crtc_enable_color_mgmt(crtc, 0, false, MGAG200_LUT_SIZE);

drivers/gpu/drm/mgag200/mgag200_g200ew3.c

25

static int mgag200_g200ew3_pixpllc_atomic_check(struct drm_crtc *crtc,

drivers/gpu/drm/mgag200/mgag200_g200ew3.c

32

struct drm_crtc_state *new_crtc_state = drm_atomic_get_new_crtc_state(new_state, crtc);

drivers/gpu/drm/mgag200/mgag200_g200se.c

115

static int mgag200_g200se_00_pixpllc_atomic_check(struct drm_crtc *crtc,

drivers/gpu/drm/mgag200/mgag200_g200se.c

122

struct drm_crtc_state *new_crtc_state = drm_atomic_get_new_crtc_state(new_state, crtc);

drivers/gpu/drm/mgag200/mgag200_g200se.c

171

static void mgag200_g200se_00_pixpllc_atomic_update(struct drm_crtc *crtc,

drivers/gpu/drm/mgag200/mgag200_g200se.c

174

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/mgag200/mgag200_g200se.c

176

struct drm_crtc_state *crtc_state = crtc->state;

drivers/gpu/drm/mgag200/mgag200_g200se.c

198

static int mgag200_g200se_04_pixpllc_atomic_check(struct drm_crtc *crtc,

drivers/gpu/drm/mgag200/mgag200_g200se.c

206

struct drm_crtc_state *new_crtc_state = drm_atomic_get_new_crtc_state(new_state, crtc);

drivers/gpu/drm/mgag200/mgag200_g200se.c

272

static void mgag200_g200se_04_pixpllc_atomic_update(struct drm_crtc *crtc,

drivers/gpu/drm/mgag200/mgag200_g200se.c

275

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/mgag200/mgag200_g200se.c

277

struct drm_crtc_state *crtc_state = crtc->state;

drivers/gpu/drm/mgag200/mgag200_g200se.c

316

static void mgag200_g200se_crtc_helper_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/mgag200/mgag200_g200se.c

319

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/mgag200/mgag200_g200se.c

322

struct drm_crtc_state *crtc_state = crtc->state;

drivers/gpu/drm/mgag200/mgag200_g200se.c

331

funcs->pixpllc_atomic_update(crtc, old_state);

drivers/gpu/drm/mgag200/mgag200_g200se.c

359

struct drm_crtc *crtc = &mdev->crtc;

drivers/gpu/drm/mgag200/mgag200_g200se.c

375

ret = drm_crtc_init_with_planes(dev, crtc, primary_plane, NULL,

drivers/gpu/drm/mgag200/mgag200_g200se.c

381

drm_crtc_helper_add(crtc, &mgag200_g200se_crtc_helper_funcs);

drivers/gpu/drm/mgag200/mgag200_g200se.c

384

drm_mode_crtc_set_gamma_size(crtc, MGAG200_LUT_SIZE);

drivers/gpu/drm/mgag200/mgag200_g200se.c

385

drm_crtc_enable_color_mgmt(crtc, 0, false, MGAG200_LUT_SIZE);

drivers/gpu/drm/mgag200/mgag200_g200wb.c

237

struct drm_crtc *crtc = &mdev->crtc;

drivers/gpu/drm/mgag200/mgag200_g200wb.c

253

ret = drm_crtc_init_with_planes(dev, crtc, primary_plane, NULL,

drivers/gpu/drm/mgag200/mgag200_g200wb.c

259

drm_crtc_helper_add(crtc, &mgag200_g200wb_crtc_helper_funcs);

drivers/gpu/drm/mgag200/mgag200_g200wb.c

262

drm_mode_crtc_set_gamma_size(crtc, MGAG200_LUT_SIZE);

drivers/gpu/drm/mgag200/mgag200_g200wb.c

263

drm_crtc_enable_color_mgmt(crtc, 0, false, MGAG200_LUT_SIZE);

drivers/gpu/drm/mgag200/mgag200_g200wb.c

41

static int mgag200_g200wb_pixpllc_atomic_check(struct drm_crtc *crtc,

drivers/gpu/drm/mgag200/mgag200_g200wb.c

48

struct drm_crtc_state *new_crtc_state = drm_atomic_get_new_crtc_state(new_state, crtc);

drivers/gpu/drm/mgag200/mgag200_g200wb.c

92

void mgag200_g200wb_pixpllc_atomic_update(struct drm_crtc *crtc,

drivers/gpu/drm/mgag200/mgag200_g200wb.c

95

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/mgag200/mgag200_g200wb.c

97

struct drm_crtc_state *crtc_state = crtc->state;

drivers/gpu/drm/mgag200/mgag200_mode.c

34

static void mgag200_set_gamma_lut(struct drm_crtc *crtc, unsigned int index,

drivers/gpu/drm/mgag200/mgag200_mode.c

37

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/mgag200/mgag200_mode.c

482

struct drm_crtc *new_crtc = new_plane_state->crtc;

drivers/gpu/drm/mgag200/mgag200_mode.c

56

struct drm_crtc *crtc = &mdev->crtc;

drivers/gpu/drm/mgag200/mgag200_mode.c

581

enum drm_mode_status mgag200_crtc_helper_mode_valid(struct drm_crtc *crtc,

drivers/gpu/drm/mgag200/mgag200_mode.c

584

struct mga_device *mdev = to_mga_device(crtc->dev);

drivers/gpu/drm/mgag200/mgag200_mode.c

60

drm_crtc_fill_gamma_565(crtc, mgag200_set_gamma_lut);

drivers/gpu/drm/mgag200/mgag200_mode.c

611

int mgag200_crtc_helper_atomic_check(struct drm_crtc *crtc, struct drm_atomic_state *new_state)

drivers/gpu/drm/mgag200/mgag200_mode.c

613

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/mgag200/mgag200_mode.c

616

struct drm_crtc_state *new_crtc_state = drm_atomic_get_new_crtc_state(new_state, crtc);

drivers/gpu/drm/mgag200/mgag200_mode.c

629

ret = funcs->pixpllc_atomic_check(crtc, new_state);

drivers/gpu/drm/mgag200/mgag200_mode.c

64

drm_crtc_fill_gamma_888(crtc, mgag200_set_gamma_lut);

drivers/gpu/drm/mgag200/mgag200_mode.c

645

void mgag200_crtc_helper_atomic_flush(struct drm_crtc *crtc, struct drm_atomic_state *old_state)

drivers/gpu/drm/mgag200/mgag200_mode.c

647

struct drm_crtc_state *crtc_state = crtc->state;

drivers/gpu/drm/mgag200/mgag200_mode.c

649

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/mgag200/mgag200_mode.c

662

void mgag200_crtc_helper_atomic_enable(struct drm_crtc *crtc, struct drm_atomic_state *old_state)

drivers/gpu/drm/mgag200/mgag200_mode.c

664

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/mgag200/mgag200_mode.c

667

struct drm_crtc_state *crtc_state = crtc->state;

drivers/gpu/drm/mgag200/mgag200_mode.c

676

funcs->pixpllc_atomic_update(crtc, old_state);

drivers/gpu/drm/mgag200/mgag200_mode.c

686

void mgag200_crtc_helper_atomic_disable(struct drm_crtc *crtc, struct drm_atomic_state *old_state)

drivers/gpu/drm/mgag200/mgag200_mode.c

688

struct mga_device *mdev = to_mga_device(crtc->dev);

drivers/gpu/drm/mgag200/mgag200_mode.c

693

void mgag200_crtc_reset(struct drm_crtc *crtc)

drivers/gpu/drm/mgag200/mgag200_mode.c

697

if (crtc->state)

drivers/gpu/drm/mgag200/mgag200_mode.c

698

crtc->funcs->atomic_destroy_state(crtc, crtc->state);

drivers/gpu/drm/mgag200/mgag200_mode.c

702

__drm_atomic_helper_crtc_reset(crtc, &mgag200_crtc_state->base);

drivers/gpu/drm/mgag200/mgag200_mode.c

704

__drm_atomic_helper_crtc_reset(crtc, NULL);

drivers/gpu/drm/mgag200/mgag200_mode.c

707

struct drm_crtc_state *mgag200_crtc_atomic_duplicate_state(struct drm_crtc *crtc)

drivers/gpu/drm/mgag200/mgag200_mode.c

709

struct drm_crtc_state *crtc_state = crtc->state;

drivers/gpu/drm/mgag200/mgag200_mode.c

719

__drm_atomic_helper_crtc_duplicate_state(crtc, &new_mgag200_crtc_state->base);

drivers/gpu/drm/mgag200/mgag200_mode.c

729

void mgag200_crtc_atomic_destroy_state(struct drm_crtc *crtc, struct drm_crtc_state *crtc_state)

drivers/gpu/drm/mgag200/mgag200_mode.c

77

struct drm_crtc *crtc = &mdev->crtc;

drivers/gpu/drm/mgag200/mgag200_mode.c

81

drm_crtc_load_gamma_565_from_888(crtc, lut, mgag200_set_gamma_lut);

drivers/gpu/drm/mgag200/mgag200_mode.c

85

drm_crtc_load_gamma_888(crtc, lut, mgag200_set_gamma_lut);

drivers/gpu/drm/mgag200/mgag200_vga.c

31

struct drm_crtc *crtc = &mdev->crtc;

drivers/gpu/drm/mgag200/mgag200_vga.c

44

encoder->possible_crtcs = drm_crtc_mask(crtc);

drivers/gpu/drm/mgag200/mgag200_vga_bmc.c

113

struct drm_crtc *crtc = &mdev->crtc;

drivers/gpu/drm/mgag200/mgag200_vga_bmc.c

128

encoder->possible_crtcs = drm_crtc_mask(crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

104

drm_atomic_crtc_for_each_plane(plane, crtc) {

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

115

static struct dpu_kms *_dpu_crtc_get_kms(struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

118

priv = crtc->dev->dev_private;

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

123

struct drm_crtc *crtc,

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

129

if (!perf_cfg || !crtc || !state || !perf) {

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

134

perf->bw_ctl = _dpu_core_perf_calc_bw(perf_cfg, crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

136

perf->core_clk_rate = _dpu_core_perf_calc_clk(perf_cfg, crtc, state);

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

139

crtc->base.id, perf->core_clk_rate,

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

174

int dpu_core_perf_crtc_check(struct drm_crtc *crtc,

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

182

if (!crtc || !state) {

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

187

kms = _dpu_crtc_get_kms(crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

190

if (dpu_crtc_get_client_type(crtc) == NRT_CLIENT)

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

196

_dpu_core_perf_calc_crtc(&kms->perf, crtc, state, &dpu_cstate->new_perf);

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

198

dpu_core_perf_aggregate(crtc->dev, dpu_crtc_get_client_type(crtc), &perf);

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

221

struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

238

dpu_core_perf_aggregate(crtc->dev, dpu_crtc_get_client_type(crtc), &perf);

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

260

void dpu_core_perf_crtc_release_bw(struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

265

if (!crtc) {

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

270

kms = _dpu_crtc_get_kms(crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

271

dpu_crtc = to_dpu_crtc(crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

278

trace_dpu_cmd_release_bw(crtc->base.id);

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

279

DRM_DEBUG_ATOMIC("Release BW crtc=%d\n", crtc->base.id);

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

281

_dpu_core_perf_crtc_update_bus(kms, crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

288

struct drm_crtc *crtc;

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

298

drm_for_each_crtc(crtc, kms->dev) {

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

299

if (crtc->enabled) {

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

300

dpu_cstate = to_dpu_crtc_state(crtc->state);

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

315

int dpu_core_perf_crtc_update(struct drm_crtc *crtc,

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

326

if (!crtc) {

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

331

kms = _dpu_crtc_get_kms(crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

333

dpu_crtc = to_dpu_crtc(crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

334

dpu_cstate = to_dpu_crtc_state(crtc->state);

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

337

crtc->base.id, crtc->enabled, kms->perf.core_clk_rate);

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

342

if (crtc->enabled) {

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

355

crtc->base.id, params_changed,

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

368

DRM_DEBUG_ATOMIC("crtc=%d disable\n", crtc->base.id);

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

374

trace_dpu_perf_crtc_update(crtc->base.id, new->bw_ctl,

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

375

new->core_clk_rate, !crtc->enabled, update_bus, update_clk);

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

378

ret = _dpu_core_perf_crtc_update_bus(kms, crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

381

crtc->base.id);

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

395

trace_dpu_core_perf_update_clk(kms->dev, !crtc->enabled, clk_rate);

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

61

struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

68

drm_atomic_crtc_for_each_plane(plane, crtc) {

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

93

struct drm_crtc *crtc, struct drm_crtc_state *state)

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h

60

int dpu_core_perf_crtc_check(struct drm_crtc *crtc,

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h

63

int dpu_core_perf_crtc_update(struct drm_crtc *crtc,

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h

66

void dpu_core_perf_crtc_release_bw(struct drm_crtc *crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1010

static void dpu_crtc_destroy_state(struct drm_crtc *crtc,

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1015

DRM_DEBUG_ATOMIC("crtc%d\n", crtc->base.id);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1022

static int _dpu_crtc_wait_for_frame_done(struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1024

struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1044

static int dpu_crtc_kickoff_clone_mode(struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1048

struct dpu_kms *dpu_kms = _dpu_crtc_get_kms(crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1051

drm_for_each_encoder_mask(encoder, crtc->dev,

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1052

crtc->state->encoder_mask) {

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1087

void dpu_crtc_commit_kickoff(struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1090

struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1091

struct dpu_kms *dpu_kms = _dpu_crtc_get_kms(crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1092

struct dpu_crtc_state *cstate = to_dpu_crtc_state(crtc->state);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1104

drm_for_each_encoder_mask(encoder, crtc->dev,

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1105

crtc->state->encoder_mask) {

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1112

if (drm_crtc_in_clone_mode(crtc->state)) {

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1113

if (dpu_crtc_kickoff_clone_mode(crtc))

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1120

drm_for_each_encoder_mask(encoder, crtc->dev,

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1121

crtc->state->encoder_mask)

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1126

drm_for_each_encoder_mask(encoder, crtc->dev,

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1127

crtc->state->encoder_mask) {

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1135

DRM_DEBUG_ATOMIC("crtc%d first commit\n", crtc->base.id);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1137

DRM_DEBUG_ATOMIC("crtc%d commit\n", crtc->base.id);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1147

static void dpu_crtc_reset(struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1151

if (crtc->state)

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1152

dpu_crtc_destroy_state(crtc, crtc->state);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1155

__drm_atomic_helper_crtc_reset(crtc, &cstate->base);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1157

__drm_atomic_helper_crtc_reset(crtc, NULL);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1164

static struct drm_crtc_state *dpu_crtc_duplicate_state(struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1166

struct dpu_crtc_state *cstate, *old_cstate = to_dpu_crtc_state(crtc->state);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1175

__drm_atomic_helper_crtc_duplicate_state(crtc, &cstate->base);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1194

static void dpu_crtc_disable(struct drm_crtc *crtc,

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1198

crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1199

struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1200

struct dpu_crtc_state *cstate = to_dpu_crtc_state(crtc->state);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1205

DRM_DEBUG_KMS("crtc%d\n", crtc->base.id);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

121

static void dpu_crtc_setup_encoder_misr(struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1212

drm_for_each_encoder_mask(encoder, crtc->dev,

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1220

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1222

drm_for_each_encoder_mask(encoder, crtc->dev,

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1236

if (!crtc->state->self_refresh_active)

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1241

if (_dpu_crtc_wait_for_frame_done(crtc))

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1243

crtc->base.id,

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1246

trace_dpu_crtc_disable(DRMID(crtc), false, dpu_crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

125

drm_for_each_encoder_mask(drm_enc, crtc->dev, crtc->state->encoder_mask)

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1250

trace_dpu_crtc_disable_frame_pending(DRMID(crtc),

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1253

dpu_core_perf_crtc_release_bw(crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1257

dpu_core_perf_crtc_update(crtc, 0);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1263

if (crtc->state->event && !crtc->state->active) {

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1264

spin_lock_irqsave(&crtc->dev->event_lock, flags);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1265

drm_crtc_send_vblank_event(crtc, crtc->state->event);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1266

crtc->state->event = NULL;

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1267

spin_unlock_irqrestore(&crtc->dev->event_lock, flags);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1270

pm_runtime_put_sync(crtc->dev->dev);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1273

static void dpu_crtc_enable(struct drm_crtc *crtc,

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1276

struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1281

old_crtc_state = drm_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1283

pm_runtime_get_sync(crtc->dev->dev);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1285

DRM_DEBUG_KMS("crtc%d\n", crtc->base.id);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1287

drm_for_each_encoder_mask(encoder, crtc->dev, crtc->state->encoder_mask) {

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

129

static int dpu_crtc_set_crc_source(struct drm_crtc *crtc, const char *src_name)

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1297

atomic_inc(&_dpu_crtc_get_kms(crtc)->bandwidth_ref);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1299

trace_dpu_crtc_enable(DRMID(crtc), true, dpu_crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1303

drm_for_each_encoder_mask(encoder, crtc->dev, crtc->state->encoder_mask)

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1304

dpu_encoder_assign_crtc(encoder, crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1308

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1313

struct drm_crtc *crtc = cstate->crtc;

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1319

drm_for_each_encoder_mask (encoder, crtc->dev, cstate->encoder_mask) {

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1328

static int dpu_crtc_reassign_planes(struct drm_crtc *crtc, struct drm_crtc_state *crtc_state)

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1330

int total_planes = crtc->dev->mode_config.num_total_plane;

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

134

struct drm_device *drm_dev = crtc->dev;

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1341

dpu_rm_release_all_sspp(global_state, crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1362

ret = dpu_assign_plane_resources(global_state, state, crtc, states, total_planes);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1373

struct drm_crtc *crtc,

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1381

drm_for_each_encoder_mask(drm_enc, crtc->dev, crtc_state->encoder_mask)

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

141

DRM_DEBUG_DRIVER("Invalid CRC source %s for CRTC%d\n", src_name, crtc->index);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1424

static int dpu_crtc_assign_resources(struct drm_crtc *crtc,

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1431

struct dpu_kms *dpu_kms = _dpu_crtc_get_kms(crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1444

dpu_rm_release(global_state, crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1449

topology = dpu_crtc_get_topology(crtc, dpu_kms, crtc_state);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

145

ret = drm_modeset_lock(&crtc->mutex, NULL);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1451

crtc_state->crtc, &topology);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1458

crtc_state->crtc,

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1462

crtc_state->crtc,

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1466

crtc_state->crtc,

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1495

struct drm_crtc *crtc = new_crtc_state->crtc;

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1499

DRM_DEBUG_ATOMIC("%d\n", crtc->base.id);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1502

drm_for_each_encoder_mask(drm_enc, crtc->dev, new_crtc_state->encoder_mask) {

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

151

crtc_state = to_dpu_crtc_state(crtc->state);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1514

static int dpu_crtc_atomic_check(struct drm_crtc *crtc,

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1518

crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1519

struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1532

rc = dpu_crtc_assign_resources(crtc, crtc_state);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1539

rc = dpu_crtc_reassign_planes(crtc, crtc_state);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1546

crtc->base.id, crtc_state->enable,

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1555

rc = _dpu_crtc_check_and_setup_lm_bounds(crtc, crtc_state);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1577

atomic_inc(&_dpu_crtc_get_kms(crtc)->bandwidth_ref);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1579

rc = dpu_core_perf_crtc_check(crtc, crtc_state);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1582

crtc->base.id, rc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1589

static enum drm_mode_status dpu_crtc_mode_valid(struct drm_crtc *crtc,

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1592

struct dpu_kms *dpu_kms = _dpu_crtc_get_kms(crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

160

ret = drm_crtc_vblank_get(crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1628

int dpu_crtc_vblank(struct drm_crtc *crtc, bool en)

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1630

struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1650

list_for_each_entry(enc, &crtc->dev->mode_config.encoder_list, head) {

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1651

trace_dpu_crtc_vblank_enable(DRMID(crtc), DRMID(enc), en,

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1654

dpu_encoder_toggle_vblank_for_crtc(enc, crtc, en);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

166

drm_crtc_vblank_put(crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1667

struct drm_crtc *crtc;

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1677

crtc = &dpu_crtc->base;

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1679

drm_modeset_lock_all(crtc->dev);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1680

cstate = to_dpu_crtc_state(crtc->state);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1682

mode = &crtc->state->adjusted_mode;

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1685

seq_printf(s, "crtc:%d width:%d height:%d\n", crtc->base.id,

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1699

drm_atomic_crtc_for_each_plane(plane, crtc) {

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1771

drm_modeset_unlock_all(crtc->dev);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

178

dpu_crtc_setup_encoder_misr(crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1780

struct drm_crtc *crtc = s->private;

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1781

struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1783

seq_printf(s, "client type: %d\n", dpu_crtc_get_client_type(crtc));

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1784

seq_printf(s, "intf_mode: %d\n", dpu_crtc_get_intf_mode(crtc));

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1796

static int _dpu_crtc_init_debugfs(struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1798

struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1801

crtc->debugfs_entry,

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1804

crtc->debugfs_entry,

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1811

static int _dpu_crtc_init_debugfs(struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1817

static int dpu_crtc_late_register(struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1819

return _dpu_crtc_init_debugfs(crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

183

drm_modeset_unlock(&crtc->mutex);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1862

struct drm_crtc *crtc = NULL;

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1874

crtc = &dpu_crtc->base;

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1875

crtc->dev = dev;

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

188

static u32 dpu_crtc_get_vblank_counter(struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1892

drm_crtc_helper_add(crtc, &dpu_crtc_helper_funcs);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1898

drm_mode_crtc_set_gamma_size(crtc, DPU_GAMMA_LUT_SIZE);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1899

drm_crtc_enable_color_mgmt(crtc, 0, true, DPU_GAMMA_LUT_SIZE);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

190

struct drm_encoder *encoder = get_encoder_from_crtc(crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1901

drm_crtc_enable_color_mgmt(crtc, 0, true, 0);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1906

snprintf(dpu_crtc->name, DPU_CRTC_NAME_SIZE, "crtc%u", crtc->base.id);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1911

ret = drm_self_refresh_helper_init(crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1914

crtc->name, ret);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1919

return crtc;

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

192

DRM_ERROR("no encoder found for crtc %d\n", crtc->index);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

199

static int dpu_crtc_get_lm_crc(struct drm_crtc *crtc,

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

226

return drm_crtc_add_crc_entry(crtc, true,

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

227

drm_crtc_accurate_vblank_count(crtc), crcs);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

230

static int dpu_crtc_get_encoder_crc(struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

236

drm_for_each_encoder_mask(drm_enc, crtc->dev, crtc->state->encoder_mask) {

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

248

return drm_crtc_add_crc_entry(crtc, true,

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

249

drm_crtc_accurate_vblank_count(crtc), crcs);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

252

static int dpu_crtc_get_crc(struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

254

struct dpu_crtc_state *crtc_state = to_dpu_crtc_state(crtc->state);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

263

return dpu_crtc_get_lm_crc(crtc, crtc_state);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

265

return dpu_crtc_get_encoder_crc(crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

270

static bool dpu_crtc_get_scanout_position(struct drm_crtc *crtc,

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

276

unsigned int pipe = crtc->index;

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

280

encoder = get_encoder_from_crtc(crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

377

static void _dpu_crtc_program_lm_output_roi(struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

382

crtc_state = to_dpu_crtc_state(crtc->state);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

400

static void _dpu_crtc_blend_setup_pipe(struct drm_crtc *crtc,

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

420

trace_dpu_crtc_setup_mixer(DRMID(crtc), DRMID(plane),

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

426

crtc->base.id,

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

441

static void _dpu_crtc_blend_setup_mixer(struct drm_crtc *crtc,

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

448

struct dpu_crtc_state *cstate = to_dpu_crtc_state(crtc->state);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

459

drm_atomic_crtc_for_each_plane(plane, crtc) {

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

47

static struct dpu_kms *_dpu_crtc_get_kms(struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

486

_dpu_crtc_blend_setup_pipe(crtc, plane,

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

49

struct msm_drm_private *priv = crtc->dev->dev_private;

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

515

_dpu_crtc_program_lm_output_roi(crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

522

static void _dpu_crtc_blend_setup(struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

524

struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

525

struct dpu_crtc_state *cstate = to_dpu_crtc_state(crtc->state);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

54

static struct drm_encoder *get_encoder_from_crtc(struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

553

_dpu_crtc_blend_setup_mixer(crtc, dpu_crtc, mixer, stage_cfg);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

56

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

597

static void _dpu_crtc_complete_flip(struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

599

struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

60

if (encoder->crtc == crtc)

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

600

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

607

trace_dpu_crtc_complete_flip(DRMID(crtc));

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

608

drm_crtc_send_vblank_event(crtc, dpu_crtc->event);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

618

enum dpu_intf_mode dpu_crtc_get_intf_mode(struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

631

WARN_ON(!drm_modeset_is_locked(&crtc->mutex));

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

634

drm_for_each_encoder_mask(encoder, crtc->dev, crtc->state->encoder_mask)

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

644

void dpu_crtc_vblank_callback(struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

646

struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

654

dpu_crtc_get_crc(crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

656

drm_crtc_handle_vblank(crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

657

trace_dpu_crtc_vblank_cb(DRMID(crtc));

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

664

struct drm_crtc *crtc = fevent->crtc;

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

665

struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

671

DRM_DEBUG_ATOMIC("crtc%d event:%u ts:%lld\n", crtc->base.id, fevent->event,

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

682

trace_dpu_crtc_frame_event_done(DRMID(crtc),

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

684

dpu_core_perf_crtc_release_bw(crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

686

trace_dpu_crtc_frame_event_more_pending(DRMID(crtc),

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

697

crtc->base.id, ktime_to_ns(fevent->ts));

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

718

void dpu_crtc_frame_event_cb(struct drm_crtc *crtc, u32 event)

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

730

dpu_crtc = to_dpu_crtc(crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

731

priv = crtc->dev->dev_private;

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

732

crtc_id = drm_crtc_index(crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

734

trace_dpu_crtc_frame_event_cb(DRMID(crtc), event);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

744

DRM_ERROR_RATELIMITED("crtc%d event %d overflow\n", crtc->base.id, event);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

749

fevent->crtc = crtc;

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

758

void dpu_crtc_complete_commit(struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

760

trace_dpu_crtc_complete_commit(DRMID(crtc));

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

761

dpu_core_perf_crtc_update(crtc, 0);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

762

_dpu_crtc_complete_flip(crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

765

static int _dpu_crtc_check_and_setup_lm_bounds(struct drm_crtc *crtc,

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

771

struct dpu_kms *dpu_kms = _dpu_crtc_get_kms(crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

788

trace_dpu_crtc_setup_lm_bounds(DRMID(crtc), i, r);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

80

static int dpu_crtc_verify_crc_source(struct drm_crtc *crtc,

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

84

struct dpu_crtc_state *crtc_state = to_dpu_crtc_state(crtc->state);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

851

static void _dpu_crtc_setup_cp_blocks(struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

853

struct drm_crtc_state *state = crtc->state;

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

854

struct dpu_crtc_state *cstate = to_dpu_crtc_state(crtc->state);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

87

DRM_DEBUG_DRIVER("Invalid source %s for CRTC%d\n", src_name, crtc->index);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

905

static void dpu_crtc_atomic_begin(struct drm_crtc *crtc,

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

908

struct dpu_crtc_state *cstate = to_dpu_crtc_state(crtc->state);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

911

if (!crtc->state->enable) {

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

913

crtc->base.id, crtc->state->enable);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

917

DRM_DEBUG_ATOMIC("crtc%d\n", crtc->base.id);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

919

_dpu_crtc_check_and_setup_lm_bounds(crtc, crtc->state);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

922

drm_for_each_encoder_mask(encoder, crtc->dev, crtc->state->encoder_mask)

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

933

_dpu_crtc_blend_setup(crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

935

_dpu_crtc_setup_cp_blocks(crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

946

static void dpu_crtc_atomic_flush(struct drm_crtc *crtc,

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

956

if (!crtc->state->enable) {

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

958

crtc->base.id, crtc->state->enable);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

962

DRM_DEBUG_ATOMIC("crtc%d\n", crtc->base.id);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

964

dpu_crtc = to_dpu_crtc(crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

965

cstate = to_dpu_crtc_state(crtc->state);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

966

dev = crtc->dev;

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

969

if (crtc->index >= ARRAY_SIZE(priv->kms->event_thread)) {

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

970

DPU_ERROR("invalid crtc index[%d]\n", crtc->index);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

976

dpu_crtc->event = crtc->state->event;

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

977

crtc->state->event = NULL;

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

98

drm_for_each_encoder_mask(drm_enc, crtc->dev, crtc->state->encoder_mask)

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

989

dpu_core_perf_crtc_update(crtc, 1);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

996

drm_atomic_crtc_for_each_plane(plane, crtc) {

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h

112

struct drm_crtc *crtc;

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h

237

static inline int dpu_crtc_frame_pending(struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h

239

return crtc ? atomic_read(&to_dpu_crtc(crtc)->frame_pending) : -EINVAL;

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h

245

int dpu_crtc_vblank(struct drm_crtc *crtc, bool en);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h

247

void dpu_crtc_vblank_callback(struct drm_crtc *crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h

249

void dpu_crtc_commit_kickoff(struct drm_crtc *crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h

251

void dpu_crtc_complete_commit(struct drm_crtc *crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h

256

enum dpu_intf_mode dpu_crtc_get_intf_mode(struct drm_crtc *crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h

263

struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h

265

return crtc && crtc->state ? RT_CLIENT : NRT_CLIENT;

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h

268

void dpu_crtc_frame_event_cb(struct drm_crtc *crtc, u32 event);

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

1195

drm_enc->crtc,

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

1199

drm_enc->crtc,

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

1204

drm_enc->crtc,

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

1217

drm_enc->crtc, DPU_HW_BLK_CTL, hw_ctl, ARRAY_SIZE(hw_ctl));

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

1224

drm_enc->crtc, DPU_HW_BLK_DSC,

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

1238

drm_enc->crtc, DPU_HW_BLK_CDM,

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

1355

cur_mode = &dpu_enc->base.crtc->state->adjusted_mode;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

1388

struct drm_crtc *crtc;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

1395

crtc = drm_atomic_get_old_crtc_for_encoder(state, drm_enc);

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

1396

if (crtc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

1397

old_state = drm_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

1479

if (dpu_enc->crtc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

1480

dpu_crtc_vblank_callback(dpu_enc->crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

1515

void dpu_encoder_assign_crtc(struct drm_encoder *drm_enc, struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

1522

WARN_ON(crtc && dpu_enc->crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

1523

dpu_enc->crtc = crtc;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

1535

struct drm_crtc *crtc, bool enable)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

1544

if (dpu_enc->crtc != crtc) {

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

1604

if (dpu_enc->crtc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

1605

dpu_crtc_frame_event_cb(dpu_enc->crtc, event);

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

1608

if (dpu_enc->crtc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

1609

dpu_crtc_frame_event_cb(dpu_enc->crtc, event);

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

1931

if (!drm_enc->crtc || !drm_enc->crtc->state) {

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

1935

mode = &drm_enc->crtc->state->adjusted_mode;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

194

struct drm_crtc *crtc;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

2142

drm_mode_vrefresh(&drm_enc->crtc->state->adjusted_mode);

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

2194

phys_enc->parent->crtc, DPU_HW_BLK_LM, hw_lm, ARRAY_SIZE(hw_lm));

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

2375

phys_enc->parent->crtc,

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

2722

if (!dpu_enc->frame_busy_mask[0] || !dpu_enc->crtc) {

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

2738

dpu_crtc_frame_event_cb(dpu_enc->crtc, event);

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

365

if (!drm_enc->crtc) {

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

789

vsync_cfg.frame_rate = drm_mode_vrefresh(&dpu_enc->base.crtc->state->adjusted_mode);

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

904

if (!drm_enc || !drm_enc->dev || !drm_enc->crtc) {

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

981

if (dpu_crtc_frame_pending(drm_enc->crtc) > 1) {

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h

42

struct drm_crtc *crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h

45

struct drm_crtc *crtc, bool enable);

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

301

dpu_cstate = to_dpu_crtc_state(phys_enc->parent->crtc->state);

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c

98

if (!phys_enc || !phys_enc->parent || !phys_enc->parent->crtc) {

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

428

static int dpu_kms_enable_vblank(struct msm_kms *kms, struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

430

return dpu_crtc_vblank(crtc, true);

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

433

static void dpu_kms_disable_vblank(struct msm_kms *kms, struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

435

dpu_crtc_vblank(crtc, false);

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

454

struct drm_crtc *crtc;

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

457

for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i)

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

466

struct drm_crtc *crtc;

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

468

for_each_crtc_mask(dpu_kms->dev, crtc, crtc_mask) {

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

469

if (!crtc->state->active)

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

472

trace_dpu_kms_commit(DRMID(crtc));

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

473

dpu_crtc_commit_kickoff(crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

480

struct drm_crtc *crtc;

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

484

for_each_crtc_mask(dpu_kms->dev, crtc, crtc_mask)

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

485

dpu_crtc_complete_commit(crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

491

struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

497

if (!kms || !crtc || !crtc->state) {

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

502

dev = crtc->dev;

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

504

if (!crtc->state->enable) {

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

505

DPU_DEBUG("[crtc:%d] not enable\n", crtc->base.id);

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

509

if (!drm_atomic_crtc_effectively_active(crtc->state)) {

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

510

DPU_DEBUG("[crtc:%d] not active\n", crtc->base.id);

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

515

if (encoder->crtc != crtc)

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

522

trace_dpu_kms_wait_for_commit_done(DRMID(crtc));

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

534

struct drm_crtc *crtc;

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

536

for_each_crtc_mask(dpu_kms->dev, crtc, crtc_mask)

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

537

dpu_kms_wait_for_commit_done(kms, crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

806

struct drm_crtc *crtc;

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

873

crtc = dpu_crtc_init(dev, primary_planes[i], cursor_planes[i]);

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

874

if (IS_ERR(crtc)) {

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

875

ret = PTR_ERR(crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h

167

int dpu_enable_vblank(struct msm_kms *kms, struct drm_crtc *crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h

168

void dpu_disable_vblank(struct msm_kms *kms, struct drm_crtc *crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1119

if (new_plane_state->crtc)

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1121

new_plane_state->crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1164

if (plane_state->crtc)

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1166

plane_state->crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1204

struct drm_crtc *crtc,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1215

pipe->sspp = dpu_rm_reserve_sspp(&dpu_kms->rm, global_state, crtc, reqs);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1230

r_pipe->sspp = dpu_rm_reserve_sspp(&dpu_kms->rm, global_state, crtc, reqs);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1239

static int dpu_plane_virtual_assign_resources(struct drm_crtc *crtc,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1255

if (plane_state->crtc)

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1257

plane_state->crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1292

crtc, &reqs);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1302

struct drm_crtc *crtc,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1316

int ret = dpu_plane_virtual_assign_resources(crtc, global_state,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1479

struct drm_crtc *crtc = state->crtc;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1488

is_rt_pipe = (dpu_crtc_get_client_type(crtc) != NRT_CLIENT);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1496

crtc->base.id, DRM_RECT_ARG(&state->dst),

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1504

drm_mode_vrefresh(&crtc->mode),

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1517

&crtc->mode, &pstate->pipe_cfg[i]);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1520

_dpu_plane_calc_clk(&crtc->mode,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h

74

struct drm_crtc *crtc,

drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c

730

struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c

732

uint32_t crtc_id = crtc->base.id;

drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c

765

struct drm_crtc *crtc,

drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c

775

DRM_DEBUG_KMS("reserving hw for crtc %d\n", crtc->base.id);

drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c

781

ret = _dpu_rm_make_reservation(rm, global_state, crtc->base.id, topology);

drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c

790

struct drm_crtc *crtc,

drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c

794

uint32_t crtc_id = crtc->base.id;

drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c

840

struct drm_crtc *crtc,

drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c

846

hw_sspp = dpu_rm_try_sspp(rm, global_state, crtc, reqs, SSPP_TYPE_DMA);

drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c

848

hw_sspp = dpu_rm_try_sspp(rm, global_state, crtc, reqs, SSPP_TYPE_RGB);

drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c

850

hw_sspp = dpu_rm_try_sspp(rm, global_state, crtc, reqs, SSPP_TYPE_VIG);

drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c

862

struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c

864

uint32_t crtc_id = crtc->base.id;

drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c

896

struct dpu_global_state *global_state, struct drm_crtc *crtc,

drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c

899

uint32_t crtc_id = crtc->base.id;

drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h

77

struct drm_crtc *crtc,

drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h

81

struct drm_crtc *crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h

85

struct drm_crtc *crtc,

drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h

89

struct drm_crtc *crtc);

drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h

92

struct dpu_global_state *global_state, struct drm_crtc *crtc,

drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h

141

TP_PROTO(u32 crtc, u64 bw_ctl, u32 core_clk_rate,

drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h

143

TP_ARGS(crtc, bw_ctl, core_clk_rate, stop_req, update_bus, update_clk),

drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h

145

__field(u32, crtc)

drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h

153

__entry->crtc = crtc;

drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h

162

__entry->crtc,

drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h

716

struct dpu_crtc *crtc),

drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h

717

TP_ARGS(drm_id, enc_id, enable, crtc),

drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h

728

__entry->enabled = crtc->enabled;

drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h

737

TP_PROTO(uint32_t drm_id, bool enable, struct dpu_crtc *crtc),

drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h

738

TP_ARGS(drm_id, enable, crtc),

drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h

747

__entry->enabled = crtc->enabled;

drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h

754

TP_PROTO(uint32_t drm_id, bool enable, struct dpu_crtc *crtc),

drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h

755

TP_ARGS(drm_id, enable, crtc)

drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h

758

TP_PROTO(uint32_t drm_id, bool enable, struct dpu_crtc *crtc),

drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h

759

TP_ARGS(drm_id, enable, crtc)

drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h

762

TP_PROTO(uint32_t drm_id, bool enable, struct dpu_crtc *crtc),

drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h

763

TP_ARGS(drm_id, enable, crtc)

drivers/gpu/drm/msm/disp/dpu1/dpu_writeback.c

35

struct drm_crtc *crtc;

drivers/gpu/drm/msm/disp/dpu1/dpu_writeback.c

47

crtc = conn_state->crtc;

drivers/gpu/drm/msm/disp/dpu1/dpu_writeback.c

48

if (!crtc)

drivers/gpu/drm/msm/disp/dpu1/dpu_writeback.c

54

crtc_state = drm_atomic_get_crtc_state(state, crtc);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

100

struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

101

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

110

drm_crtc_send_vblank_event(crtc, event);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

146

struct drm_crtc *crtc;

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

152

list_for_each_entry(crtc, &config->crtc_list, head) {

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

153

struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

156

drm_atomic_crtc_for_each_plane(plane, crtc) {

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

167

static void blend_setup(struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

169

struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

170

struct mdp4_kms *mdp4_kms = get_kms(crtc);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

180

drm_atomic_crtc_for_each_plane(plane, crtc) {

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

215

static void mdp4_crtc_mode_set_nofb(struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

217

struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

218

struct mdp4_kms *mdp4_kms = get_kms(crtc);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

223

if (WARN_ON(!crtc->state))

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

226

mode = &crtc->state->adjusted_mode;

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

257

static void mdp4_crtc_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

260

struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

261

struct mdp4_kms *mdp4_kms = get_kms(crtc);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

270

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

275

if (crtc->state->event && !crtc->state->active) {

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

278

drm_crtc_send_vblank_event(crtc, crtc->state->event);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

279

crtc->state->event = NULL;

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

286

static void mdp4_crtc_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

289

struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

290

struct mdp4_kms *mdp4_kms = get_kms(crtc);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

300

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

304

crtc_flush(crtc);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

309

static int mdp4_crtc_atomic_check(struct drm_crtc *crtc,

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

312

struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

318

static void mdp4_crtc_atomic_begin(struct drm_crtc *crtc,

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

321

struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

325

static void mdp4_crtc_atomic_flush(struct drm_crtc *crtc,

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

328

struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

329

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

332

DBG("%s: event: %p", mdp4_crtc->name, crtc->state->event);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

337

mdp4_crtc->event = crtc->state->event;

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

338

crtc->state->event = NULL;

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

341

blend_setup(crtc);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

342

crtc_flush(crtc);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

343

request_pending(crtc, PENDING_FLIP);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

354

static void update_cursor(struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

356

struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

357

struct mdp4_kms *mdp4_kms = get_kms(crtc);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

402

static int mdp4_crtc_cursor_set(struct drm_crtc *crtc,

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

406

struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

407

struct mdp4_kms *mdp4_kms = get_kms(crtc);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

409

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

450

request_pending(crtc, PENDING_CURSOR);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

459

static int mdp4_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

461

struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

469

crtc_flush(crtc);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

470

request_pending(crtc, PENDING_CURSOR);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

499

struct drm_crtc *crtc = &mdp4_crtc->base;

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

500

struct msm_drm_private *priv = crtc->dev->dev_private;

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

503

mdp_irq_unregister(&get_kms(crtc)->base, &mdp4_crtc->vblank);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

508

complete_flip(crtc, NULL);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

512

update_cursor(crtc);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

520

struct drm_crtc *crtc = &mdp4_crtc->base;

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

522

crtc_flush(crtc);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

525

static void mdp4_crtc_wait_for_flush_done(struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

527

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

528

struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

529

struct mdp4_kms *mdp4_kms = get_kms(crtc);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

530

wait_queue_head_t *queue = drm_crtc_vblank_waitqueue(crtc);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

533

ret = drm_crtc_vblank_get(crtc);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

546

drm_crtc_vblank_put(crtc);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

549

uint32_t mdp4_crtc_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

551

struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

556

void mdp4_crtc_set_config(struct drm_crtc *crtc, uint32_t config)

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

558

struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

559

struct mdp4_kms *mdp4_kms = get_kms(crtc);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

565

void mdp4_crtc_set_intf(struct drm_crtc *crtc, enum mdp4_intf intf, int mixer)

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

567

struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

568

struct mdp4_kms *mdp4_kms = get_kms(crtc);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

598

blend_setup(crtc);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

605

void mdp4_crtc_wait_for_commit_done(struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

611

mdp4_crtc_wait_for_flush_done(crtc);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

62

static struct mdp4_kms *get_kms(struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

630

struct drm_crtc *crtc = NULL;

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

64

struct msm_drm_private *priv = crtc->dev->dev_private;

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

640

crtc = &mdp4_crtc->base;

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

662

drm_crtc_helper_add(crtc, &mdp4_crtc_helper_funcs);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

664

return crtc;

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

68

static void request_pending(struct drm_crtc *crtc, uint32_t pending)

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

70

struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

73

mdp_irq_register(&get_kms(crtc)->base, &mdp4_crtc->vblank);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

76

static void crtc_flush(struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

78

struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

79

struct mdp4_kms *mdp4_kms = get_kms(crtc);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

83

drm_atomic_crtc_for_each_plane(plane, crtc) {

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

98

static void complete_flip(struct drm_crtc *crtc, struct drm_file *file)

drivers/gpu/drm/msm/disp/mdp4/mdp4_dsi_encoder.c

114

mdp4_crtc_set_config(encoder->crtc,

drivers/gpu/drm/msm/disp/mdp4/mdp4_dsi_encoder.c

123

mdp4_crtc_set_intf(encoder->crtc, INTF_DSI_VIDEO, 0);

drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c

123

mdp4_crtc_set_config(encoder->crtc,

drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c

128

mdp4_crtc_set_intf(encoder->crtc, INTF_LCDC_DTV, 1);

drivers/gpu/drm/msm/disp/mdp4/mdp4_irq.c

102

void mdp4_disable_vblank(struct msm_kms *kms, struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/mdp4/mdp4_irq.c

108

mdp4_crtc_vblank(crtc), false);

drivers/gpu/drm/msm/disp/mdp4/mdp4_irq.c

72

struct drm_crtc *crtc;

drivers/gpu/drm/msm/disp/mdp4/mdp4_irq.c

83

drm_for_each_crtc(crtc, dev)

drivers/gpu/drm/msm/disp/mdp4/mdp4_irq.c

84

if (status & mdp4_crtc_vblank(crtc))

drivers/gpu/drm/msm/disp/mdp4/mdp4_irq.c

85

drm_crtc_handle_vblank(crtc);

drivers/gpu/drm/msm/disp/mdp4/mdp4_irq.c

90

int mdp4_enable_vblank(struct msm_kms *kms, struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/mdp4/mdp4_irq.c

96

mdp4_crtc_vblank(crtc), true);

drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c

100

mdp4_crtc_wait_for_commit_done(crtc);

drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c

301

struct drm_crtc *crtc;

drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c

341

crtc = mdp4_crtc_init(dev, plane, i,

drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c

343

if (IS_ERR(crtc)) {

drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c

346

ret = PTR_ERR(crtc);

drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c

97

struct drm_crtc *crtc;

drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c

99

for_each_crtc_mask(mdp4_kms->dev, crtc, crtc_mask)

drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h

158

int mdp4_enable_vblank(struct msm_kms *kms, struct drm_crtc *crtc);

drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h

159

void mdp4_disable_vblank(struct msm_kms *kms, struct drm_crtc *crtc);

drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h

183

uint32_t mdp4_crtc_vblank(struct drm_crtc *crtc);

drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h

184

void mdp4_crtc_set_config(struct drm_crtc *crtc, uint32_t config);

drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h

185

void mdp4_crtc_set_intf(struct drm_crtc *crtc, enum mdp4_intf intf, int mixer);

drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h

186

void mdp4_crtc_wait_for_commit_done(struct drm_crtc *crtc);

drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c

313

mdp4_crtc_set_config(encoder->crtc, config);

drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c

314

mdp4_crtc_set_intf(encoder->crtc, INTF_LCDC_DTV, 0);

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

118

new_state->crtc, new_state->fb,

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

189

struct drm_crtc *crtc, struct drm_framebuffer *fb,

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

205

if (!(crtc && fb)) {

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

220

crtc->base.id, crtc_x, crtc_y, crtc_w, crtc_h);

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

44

struct drm_crtc *crtc, struct drm_framebuffer *fb,

drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c

106

struct mdp5_hw_mixer *mixer = mdp5_crtc_get_mixer(encoder->crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c

121

mdp5_crtc_set_pipeline(encoder->crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c

129

struct mdp5_pipeline *pipeline = mdp5_crtc_get_pipeline(encoder->crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c

147

struct mdp5_pipeline *pipeline = mdp5_crtc_get_pipeline(encoder->crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c

27

struct mdp5_hw_mixer *mixer = mdp5_crtc_get_mixer(encoder->crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c

80

struct mdp5_hw_mixer *mixer = mdp5_crtc_get_mixer(encoder->crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

100

DBG("%s: flush=%08x", crtc->name, flush_mask);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1012

mdp5_crtc_restore_cursor(crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1024

crtc_flush(crtc, flush_mask);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1031

request_pending(crtc, PENDING_CURSOR);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1036

static int mdp5_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1038

struct mdp5_kms *mdp5_kms = get_kms(crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1039

struct mdp5_crtc *mdp5_crtc = to_mdp5_crtc(crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1040

struct mdp5_crtc_state *mdp5_cstate = to_mdp5_crtc_state(crtc->state);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1042

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1058

if (unlikely(!crtc->state->enable))

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1065

get_roi(crtc, &roi_w, &roi_h);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1070

mdp5_crtc_restore_cursor(crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1073

crtc_flush(crtc, flush_mask);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1086

struct mdp5_kms *mdp5_kms = get_kms(state->crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

110

static u32 crtc_flush_all(struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1105

mdp5_crtc_duplicate_state(struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1109

if (WARN_ON(!crtc->state))

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1112

mdp5_cstate = kmemdup(to_mdp5_crtc_state(crtc->state),

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1117

__drm_atomic_helper_crtc_duplicate_state(crtc, &mdp5_cstate->base);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

112

struct mdp5_crtc_state *mdp5_cstate = to_mdp5_crtc_state(crtc->state);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1122

static void mdp5_crtc_destroy_state(struct drm_crtc *crtc, struct drm_crtc_state *state)

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1131

static void mdp5_crtc_reset(struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1135

if (crtc->state)

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1136

mdp5_crtc_destroy_state(crtc, crtc->state);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1139

__drm_atomic_helper_crtc_reset(crtc, &mdp5_cstate->base);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1141

__drm_atomic_helper_crtc_reset(crtc, NULL);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1185

struct drm_crtc *crtc = &mdp5_crtc->base;

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1186

struct msm_drm_private *priv = crtc->dev->dev_private;

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1189

mdp_irq_unregister(&get_kms(crtc)->base, &mdp5_crtc->vblank);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1194

complete_flip(crtc, NULL);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

121

drm_atomic_crtc_for_each_plane(plane, crtc) {

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1216

static void mdp5_crtc_wait_for_pp_done(struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1218

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1219

struct mdp5_crtc *mdp5_crtc = to_mdp5_crtc(crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1220

struct mdp5_crtc_state *mdp5_cstate = to_mdp5_crtc_state(crtc->state);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1230

static void mdp5_crtc_wait_for_flush_done(struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1232

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1233

struct mdp5_crtc *mdp5_crtc = to_mdp5_crtc(crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1234

struct mdp5_crtc_state *mdp5_cstate = to_mdp5_crtc_state(crtc->state);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1236

wait_queue_head_t *queue = drm_crtc_vblank_waitqueue(crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1243

ret = drm_crtc_vblank_get(crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1256

drm_crtc_vblank_put(crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1259

uint32_t mdp5_crtc_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1261

struct mdp5_crtc *mdp5_crtc = to_mdp5_crtc(crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1265

void mdp5_crtc_set_pipeline(struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1267

struct mdp5_crtc_state *mdp5_cstate = to_mdp5_crtc_state(crtc->state);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1268

struct mdp5_kms *mdp5_kms = get_kms(crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1276

struct mdp5_ctl *mdp5_crtc_get_ctl(struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1278

struct mdp5_crtc_state *mdp5_cstate = to_mdp5_crtc_state(crtc->state);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1283

struct mdp5_hw_mixer *mdp5_crtc_get_mixer(struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1287

if (WARN_ON(!crtc))

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1290

mdp5_cstate = to_mdp5_crtc_state(crtc->state);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1296

struct mdp5_pipeline *mdp5_crtc_get_pipeline(struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1300

if (WARN_ON(!crtc))

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1303

mdp5_cstate = to_mdp5_crtc_state(crtc->state);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1308

void mdp5_crtc_wait_for_commit_done(struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1310

struct mdp5_crtc_state *mdp5_cstate = to_mdp5_crtc_state(crtc->state);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1313

mdp5_crtc_wait_for_pp_done(crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1315

mdp5_crtc_wait_for_flush_done(crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1323

struct drm_crtc *crtc = NULL;

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1336

crtc = &mdp5_crtc->base;

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

134

return crtc_flush(crtc, flush_mask);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1356

drm_crtc_helper_add(crtc, &mdp5_crtc_helper_funcs);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1358

return crtc;

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

138

static void complete_flip(struct drm_crtc *crtc, struct drm_file *file)

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

140

struct mdp5_crtc_state *mdp5_cstate = to_mdp5_crtc_state(crtc->state);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

142

struct mdp5_crtc *mdp5_crtc = to_mdp5_crtc(crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

144

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

152

DBG("%s: send event: %p", crtc->name, event);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

153

drm_crtc_send_vblank_event(crtc, event);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

157

if (ctl && !crtc->state->enable) {

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

211

static void blend_setup(struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

213

struct mdp5_crtc *mdp5_crtc = to_mdp5_crtc(crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

214

struct mdp5_crtc_state *mdp5_cstate = to_mdp5_crtc_state(crtc->state);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

216

struct mdp5_kms *mdp5_kms = get_kms(crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

243

drm_atomic_crtc_for_each_plane(plane, crtc) {

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

361

static void mdp5_crtc_mode_set_nofb(struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

363

struct mdp5_crtc *mdp5_crtc = to_mdp5_crtc(crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

364

struct mdp5_crtc_state *mdp5_cstate = to_mdp5_crtc_state(crtc->state);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

365

struct mdp5_kms *mdp5_kms = get_kms(crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

373

if (WARN_ON(!crtc->state))

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

376

mode = &crtc->state->adjusted_mode;

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

378

DBG("%s: set mode: " DRM_MODE_FMT, crtc->name, DRM_MODE_ARG(mode));

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

410

static struct drm_encoder *get_encoder_from_crtc(struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

412

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

416

if (encoder->crtc == crtc)

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

422

static bool mdp5_crtc_get_scanout_position(struct drm_crtc *crtc,

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

428

unsigned int pipe = crtc->index;

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

433

encoder = get_encoder_from_crtc(crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

476

static u32 mdp5_crtc_get_vblank_counter(struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

480

encoder = get_encoder_from_crtc(crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

487

static void mdp5_crtc_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

490

struct mdp5_crtc *mdp5_crtc = to_mdp5_crtc(crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

491

struct mdp5_crtc_state *mdp5_cstate = to_mdp5_crtc_state(crtc->state);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

492

struct mdp5_kms *mdp5_kms = get_kms(crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

496

DBG("%s", crtc->name);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

502

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

510

if (crtc->state->event && !crtc->state->active) {

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

513

drm_crtc_send_vblank_event(crtc, crtc->state->event);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

514

crtc->state->event = NULL;

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

521

static void mdp5_crtc_vblank_on(struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

523

struct mdp5_crtc_state *mdp5_cstate = to_mdp5_crtc_state(crtc->state);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

528

drm_crtc_set_max_vblank_count(crtc, count);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

530

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

533

static void mdp5_crtc_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

536

struct mdp5_crtc *mdp5_crtc = to_mdp5_crtc(crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

537

struct mdp5_crtc_state *mdp5_cstate = to_mdp5_crtc_state(crtc->state);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

538

struct mdp5_kms *mdp5_kms = get_kms(crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

541

DBG("%s", crtc->name);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

557

mdp5_crtc_restore_cursor(crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

569

mdp5_crtc_vblank_on(crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

571

mdp5_crtc_mode_set_nofb(crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

581

static int mdp5_crtc_setup_pipeline(struct drm_crtc *crtc,

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

607

ret = mdp5_mixer_assign(new_crtc_state->state, crtc, caps,

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

669

static enum mdp_mixer_stage_id get_start_stage(struct drm_crtc *crtc,

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

69

static void mdp5_crtc_restore_cursor(struct drm_crtc *crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

692

static int mdp5_crtc_atomic_check(struct drm_crtc *crtc,

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

696

crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

699

struct mdp5_kms *mdp5_kms = get_kms(crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

701

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

71

static struct mdp5_kms *get_kms(struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

712

DBG("%s: check", crtc->name);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

73

struct msm_drm_private *priv = crtc->dev->dev_private;

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

752

ret = mdp5_crtc_setup_pipeline(crtc, crtc_state, need_right_mixer);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

765

start = get_start_stage(crtc, crtc_state, &pstates[0].state->base);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

77

static void request_pending(struct drm_crtc *crtc, uint32_t pending)

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

781

DBG("%s: assign pipe %s on stage=%d", crtc->name,

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

789

static void mdp5_crtc_atomic_begin(struct drm_crtc *crtc,

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

79

struct mdp5_crtc *mdp5_crtc = to_mdp5_crtc(crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

792

DBG("%s: begin", crtc->name);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

795

static void mdp5_crtc_atomic_flush(struct drm_crtc *crtc,

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

798

struct mdp5_crtc *mdp5_crtc = to_mdp5_crtc(crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

799

struct mdp5_crtc_state *mdp5_cstate = to_mdp5_crtc_state(crtc->state);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

800

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

803

DBG("%s: event: %p", crtc->name, crtc->state->event);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

808

mdp5_crtc->event = crtc->state->event;

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

809

crtc->state->event = NULL;

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

82

mdp_irq_register(&get_kms(crtc)->base, &mdp5_crtc->vblank);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

821

blend_setup(crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

830

request_pp_done_pending(crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

832

mdp5_crtc->flushed_mask = crtc_flush_all(crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

839

request_pending(crtc, PENDING_FLIP);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

842

static void get_roi(struct drm_crtc *crtc, uint32_t *roi_w, uint32_t *roi_h)

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

844

struct mdp5_crtc *mdp5_crtc = to_mdp5_crtc(crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

845

uint32_t xres = crtc->mode.hdisplay;

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

846

uint32_t yres = crtc->mode.vdisplay;

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

85

static void request_pp_done_pending(struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

87

struct mdp5_crtc *mdp5_crtc = to_mdp5_crtc(crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

879

static void mdp5_crtc_restore_cursor(struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

882

struct mdp5_crtc_state *mdp5_cstate = to_mdp5_crtc_state(crtc->state);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

883

struct mdp5_crtc *mdp5_crtc = to_mdp5_crtc(crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

884

struct mdp5_kms *mdp5_kms = get_kms(crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

902

get_roi(crtc, &roi_w, &roi_h);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

91

static u32 crtc_flush(struct drm_crtc *crtc, u32 flush_mask)

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

922

crtc->name, x, y, roi_w, roi_h, src_x, src_y);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

93

struct mdp5_crtc_state *mdp5_cstate = to_mdp5_crtc_state(crtc->state);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

947

static int mdp5_crtc_cursor_set(struct drm_crtc *crtc,

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

951

struct mdp5_crtc *mdp5_crtc = to_mdp5_crtc(crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

952

struct mdp5_crtc_state *mdp5_cstate = to_mdp5_crtc_state(crtc->state);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

954

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

955

struct mdp5_kms *mdp5_kms = get_kms(crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c

117

mdp5_crtc_set_pipeline(encoder->crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c

125

struct mdp5_pipeline *pipeline = mdp5_crtc_get_pipeline(encoder->crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c

126

struct mdp5_hw_mixer *mixer = mdp5_crtc_get_mixer(encoder->crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c

160

struct mdp5_pipeline *pipeline = mdp5_crtc_get_pipeline(encoder->crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c

206

struct drm_crtc_state *cstate = encoder->crtc->state;

drivers/gpu/drm/msm/disp/mdp5/mdp5_irq.c

101

int mdp5_enable_vblank(struct msm_kms *kms, struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/mdp5/mdp5_irq.c

108

mdp5_crtc_vblank(crtc), true);

drivers/gpu/drm/msm/disp/mdp5/mdp5_irq.c

114

void mdp5_disable_vblank(struct msm_kms *kms, struct drm_crtc *crtc)

drivers/gpu/drm/msm/disp/mdp5/mdp5_irq.c

121

mdp5_crtc_vblank(crtc), false);

drivers/gpu/drm/msm/disp/mdp5/mdp5_irq.c

83

struct drm_crtc *crtc;

drivers/gpu/drm/msm/disp/mdp5/mdp5_irq.c

94

drm_for_each_crtc(crtc, dev)

drivers/gpu/drm/msm/disp/mdp5/mdp5_irq.c

95

if (status & mdp5_crtc_vblank(crtc))

drivers/gpu/drm/msm/disp/mdp5/mdp5_irq.c

96

drm_crtc_handle_vblank(crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c

179

struct drm_crtc *crtc;

drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c

181

for_each_crtc_mask(mdp5_kms->dev, crtc, crtc_mask)

drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c

182

mdp5_crtc_wait_for_commit_done(crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c

438

struct drm_crtc *crtc;

drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c

440

crtc = mdp5_crtc_init(dev, primary[i], cursor[i], i);

drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c

441

if (IS_ERR(crtc)) {

drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c

442

ret = PTR_ERR(crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h

269

int mdp5_enable_vblank(struct msm_kms *kms, struct drm_crtc *crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h

270

void mdp5_disable_vblank(struct msm_kms *kms, struct drm_crtc *crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h

280

struct mdp5_ctl *mdp5_crtc_get_ctl(struct drm_crtc *crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h

281

uint32_t mdp5_crtc_vblank(struct drm_crtc *crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h

283

struct mdp5_hw_mixer *mdp5_crtc_get_mixer(struct drm_crtc *crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h

284

struct mdp5_pipeline *mdp5_crtc_get_pipeline(struct drm_crtc *crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h

285

void mdp5_crtc_set_pipeline(struct drm_crtc *crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h

286

void mdp5_crtc_wait_for_commit_done(struct drm_crtc *crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_mixer.c

107

DBG("assigning Layer Mixer %d to crtc %s", (*mixer)->lm, crtc->name);

drivers/gpu/drm/msm/disp/mdp5/mdp5_mixer.c

109

new_state->hwmixer_to_crtc[(*mixer)->idx] = crtc;

drivers/gpu/drm/msm/disp/mdp5/mdp5_mixer.c

112

crtc->name);

drivers/gpu/drm/msm/disp/mdp5/mdp5_mixer.c

113

new_state->hwmixer_to_crtc[(*r_mixer)->idx] = crtc;

drivers/gpu/drm/msm/disp/mdp5/mdp5_mixer.c

38

int mdp5_mixer_assign(struct drm_atomic_state *s, struct drm_crtc *crtc,

drivers/gpu/drm/msm/disp/mdp5/mdp5_mixer.c

64

new_state->hwmixer_to_crtc[cur->idx] != crtc)

drivers/gpu/drm/msm/disp/mdp5/mdp5_mixer.h

30

int mdp5_mixer_assign(struct drm_atomic_state *s, struct drm_crtc *crtc,

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

24

struct drm_crtc *crtc, struct drm_framebuffer *fb,

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

332

struct drm_crtc *crtc;

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

335

crtc = new_plane_state->crtc ? new_plane_state->crtc : old_plane_state->crtc;

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

336

if (!crtc)

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

339

crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

358

new_state->crtc, new_state->fb,

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

376

new_plane_state->crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

388

if (plane->state->crtc != new_plane_state->crtc ||

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

434

mdp5_crtc_get_pipeline(new_state->crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

437

ret = mdp5_plane_mode_set(plane, new_state->crtc, new_state->fb,

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

441

ctl = mdp5_crtc_get_ctl(new_state->crtc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

840

struct drm_crtc *crtc, struct drm_framebuffer *fb,

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

893

crtc->base.id, crtc_x, crtc_y, crtc_w, crtc_h);

drivers/gpu/drm/msm/dp/dp_drm.c

137

if (!conn_state->crtc || !crtc_state)

drivers/gpu/drm/msm/dp/dp_drm.c

149

struct drm_crtc *crtc;

drivers/gpu/drm/msm/dp/dp_drm.c

160

crtc = drm_atomic_get_new_crtc_for_encoder(state,

drivers/gpu/drm/msm/dp/dp_drm.c

162

if (!crtc)

drivers/gpu/drm/msm/dp/dp_drm.c

165

old_crtc_state = drm_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/msm/dp/dp_drm.c

178

struct drm_crtc *crtc;

drivers/gpu/drm/msm/dp/dp_drm.c

183

crtc = drm_atomic_get_old_crtc_for_encoder(atomic_state,

drivers/gpu/drm/msm/dp/dp_drm.c

185

if (!crtc)

drivers/gpu/drm/msm/dp/dp_drm.c

188

new_crtc_state = drm_atomic_get_new_crtc_state(atomic_state, crtc);

drivers/gpu/drm/msm/dp/dp_drm.c

192

old_crtc_state = drm_atomic_get_old_crtc_state(atomic_state, crtc);

drivers/gpu/drm/msm/dp/dp_drm.c

222

struct drm_crtc *crtc;

drivers/gpu/drm/msm/dp/dp_drm.c

225

crtc = drm_atomic_get_old_crtc_for_encoder(atomic_state,

drivers/gpu/drm/msm/dp/dp_drm.c

227

if (!crtc)

drivers/gpu/drm/msm/dp/dp_drm.c

230

new_crtc_state = drm_atomic_get_new_crtc_state(atomic_state, crtc);

drivers/gpu/drm/msm/hdmi/hdmi_bridge.c

300

crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc);

drivers/gpu/drm/msm/msm_atomic.c

145

struct drm_crtc *crtc;

drivers/gpu/drm/msm/msm_atomic.c

155

for_each_new_crtc_in_state(state, crtc, crtc_state, i) {

drivers/gpu/drm/msm/msm_atomic.c

162

*async_crtc = crtc;

drivers/gpu/drm/msm/msm_atomic.c

175

struct drm_crtc *crtc;

drivers/gpu/drm/msm/msm_atomic.c

178

for_each_new_crtc_in_state(state, crtc, crtc_state, i)

drivers/gpu/drm/msm/msm_atomic.c

179

mask |= drm_crtc_mask(crtc);

drivers/gpu/drm/msm/msm_atomic.c

189

struct drm_crtc *crtc;

drivers/gpu/drm/msm/msm_atomic.c

196

for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state,

drivers/gpu/drm/msm/msm_atomic.c

23

struct drm_crtc *crtc;

drivers/gpu/drm/msm/msm_atomic.c

25

for_each_crtc_mask(kms->dev, crtc, crtc_mask) {

drivers/gpu/drm/msm/msm_atomic.c

26

if (!crtc->state->active)

drivers/gpu/drm/msm/msm_atomic.c

28

drm_crtc_vblank_get(crtc);

drivers/gpu/drm/msm/msm_atomic.c

34

struct drm_crtc *crtc;

drivers/gpu/drm/msm/msm_atomic.c

36

for_each_crtc_mask(kms->dev, crtc, crtc_mask) {

drivers/gpu/drm/msm/msm_atomic.c

37

if (!crtc->state->active)

drivers/gpu/drm/msm/msm_atomic.c

39

drm_crtc_vblank_put(crtc);

drivers/gpu/drm/msm/msm_atomic.c

46

struct drm_crtc *crtc;

drivers/gpu/drm/msm/msm_atomic.c

48

for_each_crtc_mask(kms->dev, crtc, crtc_mask) {

drivers/gpu/drm/msm/msm_atomic.c

49

crtc_index = drm_crtc_index(crtc);

drivers/gpu/drm/msm/msm_atomic.c

56

struct drm_crtc *crtc;

drivers/gpu/drm/msm/msm_atomic.c

58

for_each_crtc_mask_reverse(kms->dev, crtc, crtc_mask)

drivers/gpu/drm/msm/msm_atomic.c

59

mutex_unlock(&kms->commit_lock[drm_crtc_index(crtc)]);

drivers/gpu/drm/msm/msm_drv.h

226

int msm_crtc_enable_vblank(struct drm_crtc *crtc);

drivers/gpu/drm/msm/msm_drv.h

227

void msm_crtc_disable_vblank(struct drm_crtc *crtc);

drivers/gpu/drm/msm/msm_kms.c

106

struct drm_crtc *crtc;

drivers/gpu/drm/msm/msm_kms.c

119

kms->funcs->enable_vblank(kms, vbl_work->crtc);

drivers/gpu/drm/msm/msm_kms.c

121

kms->funcs->disable_vblank(kms, vbl_work->crtc);

drivers/gpu/drm/msm/msm_kms.c

127

struct drm_crtc *crtc, bool enable)

drivers/gpu/drm/msm/msm_kms.c

137

vbl_work->crtc = crtc;

drivers/gpu/drm/msm/msm_kms.c

146

int msm_crtc_enable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/msm/msm_kms.c

148

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/msm/msm_kms.c

153

drm_dbg_vbl(dev, "crtc=%u\n", crtc->base.id);

drivers/gpu/drm/msm/msm_kms.c

154

return vblank_ctrl_queue_work(priv, crtc, true);

drivers/gpu/drm/msm/msm_kms.c

157

void msm_crtc_disable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/msm/msm_kms.c

159

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/msm/msm_kms.c

164

drm_dbg_vbl(dev, "crtc=%u\n", crtc->base.id);

drivers/gpu/drm/msm/msm_kms.c

165

vblank_ctrl_queue_work(priv, crtc, false);

drivers/gpu/drm/msm/msm_kms.c

268

struct drm_crtc *crtc;

drivers/gpu/drm/msm/msm_kms.c

303

drm_for_each_crtc(crtc, ddev) {

drivers/gpu/drm/msm/msm_kms.c

307

ev_thread = &kms->event_thread[drm_crtc_index(crtc)];

drivers/gpu/drm/msm/msm_kms.c

309

ev_thread->worker = kthread_run_worker(0, "crtc_event:%d", crtc->base.id);

drivers/gpu/drm/msm/msm_kms.h

209

#define for_each_crtc_mask(dev, crtc, crtc_mask) \

drivers/gpu/drm/msm/msm_kms.h

210

drm_for_each_crtc(crtc, dev) \

drivers/gpu/drm/msm/msm_kms.h

211

for_each_if (drm_crtc_mask(crtc) & (crtc_mask))

drivers/gpu/drm/msm/msm_kms.h

213

#define for_each_crtc_mask_reverse(dev, crtc, crtc_mask) \

drivers/gpu/drm/msm/msm_kms.h

214

drm_for_each_crtc_reverse(crtc, dev) \

drivers/gpu/drm/msm/msm_kms.h

215

for_each_if (drm_crtc_mask(crtc) & (crtc_mask))

drivers/gpu/drm/msm/msm_kms.h

33

int (*enable_vblank)(struct msm_kms *kms, struct drm_crtc *crtc);

drivers/gpu/drm/msm/msm_kms.h

34

void (*disable_vblank)(struct msm_kms *kms, struct drm_crtc *crtc);

drivers/gpu/drm/mxsfb/lcdif_drv.c

125

drm_crtc_handle_vblank(&lcdif->crtc);

drivers/gpu/drm/mxsfb/lcdif_drv.c

188

drm_crtc_vblank_off(&lcdif->crtc);

drivers/gpu/drm/mxsfb/lcdif_drv.c

230

drm_crtc_vblank_off(&lcdif->crtc);

drivers/gpu/drm/mxsfb/lcdif_drv.c

90

encoder->possible_crtcs = drm_crtc_mask(&lcdif->crtc);

drivers/gpu/drm/mxsfb/lcdif_drv.h

31

struct drm_crtc crtc;

drivers/gpu/drm/mxsfb/lcdif_kms.c

298

struct drm_display_mode *m = &lcdif->crtc.state->adjusted_mode;

drivers/gpu/drm/mxsfb/lcdif_kms.c

342

CTRLDESCL0_3_PITCH(lcdif->crtc.primary->state->fb->pitches[0]);

drivers/gpu/drm/mxsfb/lcdif_kms.c

406

struct drm_device *drm = crtc_state->crtc->dev;

drivers/gpu/drm/mxsfb/lcdif_kms.c

424

static int lcdif_crtc_atomic_check(struct drm_crtc *crtc,

drivers/gpu/drm/mxsfb/lcdif_kms.c

427

struct drm_device *drm = crtc->dev;

drivers/gpu/drm/mxsfb/lcdif_kms.c

429

crtc);

drivers/gpu/drm/mxsfb/lcdif_kms.c

432

drm_plane_mask(crtc->primary);

drivers/gpu/drm/mxsfb/lcdif_kms.c

445

ret = drm_atomic_add_affected_planes(state, crtc);

drivers/gpu/drm/mxsfb/lcdif_kms.c

451

if (!connector_state->crtc)

drivers/gpu/drm/mxsfb/lcdif_kms.c

505

static void lcdif_crtc_atomic_flush(struct drm_crtc *crtc,

drivers/gpu/drm/mxsfb/lcdif_kms.c

508

struct lcdif_drm_private *lcdif = to_lcdif_drm_private(crtc->dev);

drivers/gpu/drm/mxsfb/lcdif_kms.c

516

event = crtc->state->event;

drivers/gpu/drm/mxsfb/lcdif_kms.c

517

crtc->state->event = NULL;

drivers/gpu/drm/mxsfb/lcdif_kms.c

522

spin_lock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/mxsfb/lcdif_kms.c

523

if (drm_crtc_vblank_get(crtc) == 0)

drivers/gpu/drm/mxsfb/lcdif_kms.c

524

drm_crtc_arm_vblank_event(crtc, event);

drivers/gpu/drm/mxsfb/lcdif_kms.c

526

drm_crtc_send_vblank_event(crtc, event);

drivers/gpu/drm/mxsfb/lcdif_kms.c

527

spin_unlock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/mxsfb/lcdif_kms.c

530

static void lcdif_crtc_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/mxsfb/lcdif_kms.c

533

struct lcdif_drm_private *lcdif = to_lcdif_drm_private(crtc->dev);

drivers/gpu/drm/mxsfb/lcdif_kms.c

534

struct drm_crtc_state *new_cstate = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/mxsfb/lcdif_kms.c

536

crtc->primary);

drivers/gpu/drm/mxsfb/lcdif_kms.c

537

struct drm_display_mode *m = &lcdif->crtc.state->adjusted_mode;

drivers/gpu/drm/mxsfb/lcdif_kms.c

557

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/mxsfb/lcdif_kms.c

560

static void lcdif_crtc_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/mxsfb/lcdif_kms.c

563

struct lcdif_drm_private *lcdif = to_lcdif_drm_private(crtc->dev);

drivers/gpu/drm/mxsfb/lcdif_kms.c

567

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/mxsfb/lcdif_kms.c

572

event = crtc->state->event;

drivers/gpu/drm/mxsfb/lcdif_kms.c

574

crtc->state->event = NULL;

drivers/gpu/drm/mxsfb/lcdif_kms.c

575

drm_crtc_send_vblank_event(crtc, event);

drivers/gpu/drm/mxsfb/lcdif_kms.c

582

static void lcdif_crtc_atomic_destroy_state(struct drm_crtc *crtc,

drivers/gpu/drm/mxsfb/lcdif_kms.c

589

static void lcdif_crtc_reset(struct drm_crtc *crtc)

drivers/gpu/drm/mxsfb/lcdif_kms.c

593

if (crtc->state)

drivers/gpu/drm/mxsfb/lcdif_kms.c

594

lcdif_crtc_atomic_destroy_state(crtc, crtc->state);

drivers/gpu/drm/mxsfb/lcdif_kms.c

596

crtc->state = NULL;

drivers/gpu/drm/mxsfb/lcdif_kms.c

600

__drm_atomic_helper_crtc_reset(crtc, &state->base);

drivers/gpu/drm/mxsfb/lcdif_kms.c

604

lcdif_crtc_atomic_duplicate_state(struct drm_crtc *crtc)

drivers/gpu/drm/mxsfb/lcdif_kms.c

606

struct lcdif_crtc_state *old = to_lcdif_crtc_state(crtc->state);

drivers/gpu/drm/mxsfb/lcdif_kms.c

609

if (WARN_ON(!crtc->state))

drivers/gpu/drm/mxsfb/lcdif_kms.c

616

__drm_atomic_helper_crtc_duplicate_state(crtc, &new->base);

drivers/gpu/drm/mxsfb/lcdif_kms.c

624

static int lcdif_crtc_enable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/mxsfb/lcdif_kms.c

626

struct lcdif_drm_private *lcdif = to_lcdif_drm_private(crtc->dev);

drivers/gpu/drm/mxsfb/lcdif_kms.c

635

static void lcdif_crtc_disable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/mxsfb/lcdif_kms.c

637

struct lcdif_drm_private *lcdif = to_lcdif_drm_private(crtc->dev);

drivers/gpu/drm/mxsfb/lcdif_kms.c

675

&lcdif->crtc);

drivers/gpu/drm/mxsfb/lcdif_kms.c

754

struct drm_crtc *crtc = &lcdif->crtc;

drivers/gpu/drm/mxsfb/lcdif_kms.c

776

drm_crtc_helper_add(crtc, &lcdif_crtc_helper_funcs);

drivers/gpu/drm/mxsfb/lcdif_kms.c

777

return drm_crtc_init_with_planes(lcdif->drm, crtc,

drivers/gpu/drm/mxsfb/mxsfb_drv.c

165

drm_crtc_handle_vblank(&mxsfb->crtc);

drivers/gpu/drm/mxsfb/mxsfb_drv.c

168

vbc = drm_crtc_accurate_vblank_count(&mxsfb->crtc);

drivers/gpu/drm/mxsfb/mxsfb_drv.c

169

drm_crtc_add_crc_entry(&mxsfb->crtc, true, vbc, &crc);

drivers/gpu/drm/mxsfb/mxsfb_drv.c

266

drm_crtc_vblank_off(&mxsfb->crtc);

drivers/gpu/drm/mxsfb/mxsfb_drv.h

44

struct drm_crtc crtc;

drivers/gpu/drm/mxsfb/mxsfb_kms.c

103

struct drm_display_mode *m = &mxsfb->crtc.state->adjusted_mode;

drivers/gpu/drm/mxsfb/mxsfb_kms.c

283

struct drm_device *drm = mxsfb->crtc.dev;

drivers/gpu/drm/mxsfb/mxsfb_kms.c

284

struct drm_display_mode *m = &mxsfb->crtc.state->adjusted_mode;

drivers/gpu/drm/mxsfb/mxsfb_kms.c

312

static int mxsfb_crtc_atomic_check(struct drm_crtc *crtc,

drivers/gpu/drm/mxsfb/mxsfb_kms.c

316

crtc);

drivers/gpu/drm/mxsfb/mxsfb_kms.c

318

drm_plane_mask(crtc->primary);

drivers/gpu/drm/mxsfb/mxsfb_kms.c

325

return drm_atomic_add_affected_planes(state, crtc);

drivers/gpu/drm/mxsfb/mxsfb_kms.c

328

static void mxsfb_crtc_atomic_flush(struct drm_crtc *crtc,

drivers/gpu/drm/mxsfb/mxsfb_kms.c

333

event = crtc->state->event;

drivers/gpu/drm/mxsfb/mxsfb_kms.c

334

crtc->state->event = NULL;

drivers/gpu/drm/mxsfb/mxsfb_kms.c

339

spin_lock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/mxsfb/mxsfb_kms.c

340

if (drm_crtc_vblank_get(crtc) == 0)

drivers/gpu/drm/mxsfb/mxsfb_kms.c

341

drm_crtc_arm_vblank_event(crtc, event);

drivers/gpu/drm/mxsfb/mxsfb_kms.c

343

drm_crtc_send_vblank_event(crtc, event);

drivers/gpu/drm/mxsfb/mxsfb_kms.c

344

spin_unlock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/mxsfb/mxsfb_kms.c

347

static void mxsfb_crtc_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/mxsfb/mxsfb_kms.c

350

struct mxsfb_drm_private *mxsfb = to_mxsfb_drm_private(crtc->dev);

drivers/gpu/drm/mxsfb/mxsfb_kms.c

352

crtc->primary);

drivers/gpu/drm/mxsfb/mxsfb_kms.c

361

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/mxsfb/mxsfb_kms.c

401

static void mxsfb_crtc_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/mxsfb/mxsfb_kms.c

404

struct mxsfb_drm_private *mxsfb = to_mxsfb_drm_private(crtc->dev);

drivers/gpu/drm/mxsfb/mxsfb_kms.c

411

event = crtc->state->event;

drivers/gpu/drm/mxsfb/mxsfb_kms.c

413

crtc->state->event = NULL;

drivers/gpu/drm/mxsfb/mxsfb_kms.c

414

drm_crtc_send_vblank_event(crtc, event);

drivers/gpu/drm/mxsfb/mxsfb_kms.c

418

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/mxsfb/mxsfb_kms.c

424

static int mxsfb_crtc_enable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/mxsfb/mxsfb_kms.c

426

struct mxsfb_drm_private *mxsfb = to_mxsfb_drm_private(crtc->dev);

drivers/gpu/drm/mxsfb/mxsfb_kms.c

435

static void mxsfb_crtc_disable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/mxsfb/mxsfb_kms.c

437

struct mxsfb_drm_private *mxsfb = to_mxsfb_drm_private(crtc->dev);

drivers/gpu/drm/mxsfb/mxsfb_kms.c

444

static int mxsfb_crtc_set_crc_source(struct drm_crtc *crtc, const char *source)

drivers/gpu/drm/mxsfb/mxsfb_kms.c

448

if (!crtc)

drivers/gpu/drm/mxsfb/mxsfb_kms.c

451

mxsfb = to_mxsfb_drm_private(crtc->dev);

drivers/gpu/drm/mxsfb/mxsfb_kms.c

463

static int mxsfb_crtc_verify_crc_source(struct drm_crtc *crtc,

drivers/gpu/drm/mxsfb/mxsfb_kms.c

466

if (!crtc)

drivers/gpu/drm/mxsfb/mxsfb_kms.c

471

source, crtc->name);

drivers/gpu/drm/mxsfb/mxsfb_kms.c

531

&mxsfb->crtc);

drivers/gpu/drm/mxsfb/mxsfb_kms.c

56

const u32 format = mxsfb->crtc.primary->state->fb->format->format;

drivers/gpu/drm/mxsfb/mxsfb_kms.c

678

struct drm_crtc *crtc = &mxsfb->crtc;

drivers/gpu/drm/mxsfb/mxsfb_kms.c

706

drm_crtc_helper_add(crtc, &mxsfb_crtc_helper_funcs);

drivers/gpu/drm/mxsfb/mxsfb_kms.c

708

ret = drm_crtc_init_with_planes(mxsfb->drm, crtc,

drivers/gpu/drm/mxsfb/mxsfb_kms.c

713

ret = drm_crtc_init_with_planes(mxsfb->drm, crtc,

drivers/gpu/drm/mxsfb/mxsfb_kms.c

720

encoder->possible_crtcs = drm_crtc_mask(crtc);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

1022

nv04_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)

drivers/gpu/drm/nouveau/dispnv04/crtc.c

1024

struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

1033

struct drm_crtc *crtc;

drivers/gpu/drm/nouveau/dispnv04/crtc.c

1058

drm_crtc_arm_vblank_event(s->crtc, s->event);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

1061

drm_crtc_vblank_put(s->crtc);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

1082

nv_set_crtc_base(drm->dev, drm_crtc_index(state.crtc),

drivers/gpu/drm/nouveau/dispnv04/crtc.c

1083

state.offset + state.crtc->y *

drivers/gpu/drm/nouveau/dispnv04/crtc.c

1084

state.pitch + state.crtc->x *

drivers/gpu/drm/nouveau/dispnv04/crtc.c

1136

nv04_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb,

drivers/gpu/drm/nouveau/dispnv04/crtc.c

1141

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/nouveau/dispnv04/crtc.c

1143

struct drm_framebuffer *old_fb = crtc->primary->fb;

drivers/gpu/drm/nouveau/dispnv04/crtc.c

1152

int head = nouveau_crtc(crtc)->index;

drivers/gpu/drm/nouveau/dispnv04/crtc.c

117

static void nv_crtc_calc_state_ext(struct drm_crtc *crtc, struct drm_display_mode * mode, int dot_clock)

drivers/gpu/drm/nouveau/dispnv04/crtc.c

119

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/nouveau/dispnv04/crtc.c

1193

{ { }, event, crtc, fb->format->cpp[0] * 8, fb->pitches[0],

drivers/gpu/drm/nouveau/dispnv04/crtc.c

1197

drm_crtc_vblank_get(crtc);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

1223

crtc->primary->fb = fb;

drivers/gpu/drm/nouveau/dispnv04/crtc.c

123

struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

1233

drm_crtc_vblank_put(crtc);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

175

nv_crtc_dpms(struct drm_crtc *crtc, int mode)

drivers/gpu/drm/nouveau/dispnv04/crtc.c

177

struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

178

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/nouveau/dispnv04/crtc.c

237

nv_crtc_mode_set_vga(struct drm_crtc *crtc, struct drm_display_mode *mode)

drivers/gpu/drm/nouveau/dispnv04/crtc.c

239

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/nouveau/dispnv04/crtc.c

240

struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

242

struct drm_framebuffer *fb = crtc->primary->fb;

drivers/gpu/drm/nouveau/dispnv04/crtc.c

264

if (encoder->crtc == crtc &&

drivers/gpu/drm/nouveau/dispnv04/crtc.c

461

nv_crtc_mode_set_regs(struct drm_crtc *crtc, struct drm_display_mode * mode)

drivers/gpu/drm/nouveau/dispnv04/crtc.c

463

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/nouveau/dispnv04/crtc.c

465

struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

468

const struct drm_framebuffer *fb = crtc->primary->fb;

drivers/gpu/drm/nouveau/dispnv04/crtc.c

477

if (encoder->crtc != crtc)

drivers/gpu/drm/nouveau/dispnv04/crtc.c

53

nv04_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,

drivers/gpu/drm/nouveau/dispnv04/crtc.c

534

nv_crtc_set_digital_vibrance(crtc, nv_crtc->saturation);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

57

crtc_wr_cio_state(struct drm_crtc *crtc, struct nv04_crtc_reg *crtcstate, int index)

drivers/gpu/drm/nouveau/dispnv04/crtc.c

59

NVWriteVgaCrtc(crtc->dev, nouveau_crtc(crtc)->index, index,

drivers/gpu/drm/nouveau/dispnv04/crtc.c

600

nv_crtc_set_image_sharpening(crtc, nv_crtc->sharpness);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

610

nv_crtc_swap_fbs(struct drm_crtc *crtc, struct drm_framebuffer *old_fb)

drivers/gpu/drm/nouveau/dispnv04/crtc.c

612

struct nv04_display *disp = nv04_display(crtc->dev);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

613

struct drm_framebuffer *fb = crtc->primary->fb;

drivers/gpu/drm/nouveau/dispnv04/crtc.c

615

struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

63

static void nv_crtc_set_digital_vibrance(struct drm_crtc *crtc, int level)

drivers/gpu/drm/nouveau/dispnv04/crtc.c

643

nv_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *mode,

drivers/gpu/drm/nouveau/dispnv04/crtc.c

647

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/nouveau/dispnv04/crtc.c

648

struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

65

struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

655

ret = nv_crtc_swap_fbs(crtc, old_fb);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

66

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/nouveau/dispnv04/crtc.c

662

nv_crtc_mode_set_vga(crtc, adjusted_mode);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

666

nv_crtc_mode_set_regs(crtc, adjusted_mode);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

667

nv_crtc_calc_state_ext(crtc, mode, adjusted_mode->clock);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

671

static void nv_crtc_save(struct drm_crtc *crtc)

drivers/gpu/drm/nouveau/dispnv04/crtc.c

673

struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

674

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/nouveau/dispnv04/crtc.c

680

if (nv_two_heads(crtc->dev))

drivers/gpu/drm/nouveau/dispnv04/crtc.c

681

NVSetOwner(crtc->dev, nv_crtc->index);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

683

nouveau_hw_save_state(crtc->dev, nv_crtc->index, saved);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

692

static void nv_crtc_restore(struct drm_crtc *crtc)

drivers/gpu/drm/nouveau/dispnv04/crtc.c

694

struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

695

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/nouveau/dispnv04/crtc.c

699

if (nv_two_heads(crtc->dev))

drivers/gpu/drm/nouveau/dispnv04/crtc.c

70

if (nv_crtc->saturation && nv_gf4_disp_arch(crtc->dev)) {

drivers/gpu/drm/nouveau/dispnv04/crtc.c

700

NVSetOwner(crtc->dev, head);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

702

nouveau_hw_load_state(crtc->dev, head, &nv04_display(dev)->saved_reg);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

703

nv_lock_vga_crtc_shadow(crtc->dev, head, saved_cr21);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

708

static void nv_crtc_prepare(struct drm_crtc *crtc)

drivers/gpu/drm/nouveau/dispnv04/crtc.c

710

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/nouveau/dispnv04/crtc.c

712

struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

713

const struct drm_crtc_helper_funcs *funcs = crtc->helper_private;

drivers/gpu/drm/nouveau/dispnv04/crtc.c

718

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

719

funcs->dpms(crtc, DRM_MODE_DPMS_OFF);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

73

crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_5B);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

731

static void nv_crtc_commit(struct drm_crtc *crtc)

drivers/gpu/drm/nouveau/dispnv04/crtc.c

733

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/nouveau/dispnv04/crtc.c

734

const struct drm_crtc_helper_funcs *funcs = crtc->helper_private;

drivers/gpu/drm/nouveau/dispnv04/crtc.c

735

struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

738

nv04_crtc_mode_set_base(crtc, crtc->x, crtc->y, NULL);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

749

funcs->dpms(crtc, DRM_MODE_DPMS_ON);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

75

crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_CSB);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

750

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

753

static void nv_crtc_destroy(struct drm_crtc *crtc)

drivers/gpu/drm/nouveau/dispnv04/crtc.c

755

struct nv04_display *disp = nv04_display(crtc->dev);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

756

struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

761

drm_crtc_cleanup(crtc);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

778

nv_crtc_gamma_load(struct drm_crtc *crtc)

drivers/gpu/drm/nouveau/dispnv04/crtc.c

78

static void nv_crtc_set_image_sharpening(struct drm_crtc *crtc, int level)

drivers/gpu/drm/nouveau/dispnv04/crtc.c

780

struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

787

r = crtc->gamma_store;

drivers/gpu/drm/nouveau/dispnv04/crtc.c

788

g = r + crtc->gamma_size;

drivers/gpu/drm/nouveau/dispnv04/crtc.c

789

b = g + crtc->gamma_size;

drivers/gpu/drm/nouveau/dispnv04/crtc.c

80

struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

801

nv_crtc_disable(struct drm_crtc *crtc)

drivers/gpu/drm/nouveau/dispnv04/crtc.c

803

struct nv04_display *disp = nv04_display(crtc->dev);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

804

struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

81

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/nouveau/dispnv04/crtc.c

816

nv_crtc_gamma_set(struct drm_crtc *crtc, u16 *r, u16 *g, u16 *b,

drivers/gpu/drm/nouveau/dispnv04/crtc.c

820

struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

832

nv_crtc_gamma_load(crtc);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

838

nv04_crtc_do_mode_set_base(struct drm_crtc *crtc,

drivers/gpu/drm/nouveau/dispnv04/crtc.c

842

struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

843

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/nouveau/dispnv04/crtc.c

853

if (!crtc->primary->fb) {

drivers/gpu/drm/nouveau/dispnv04/crtc.c

858

drm_fb = crtc->primary->fb;

drivers/gpu/drm/nouveau/dispnv04/crtc.c

865

nv_crtc_gamma_load(crtc);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

874

crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_PIXEL_INDEX);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

88

NVWriteRAMDAC(crtc->dev, nv_crtc->index, NV_PRAMDAC_634, regp->ramdac_634);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

883

crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_RPC0_INDEX);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

884

crtc_wr_cio_state(crtc, regp, NV_CIO_CR_OFFSET_INDEX);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

885

crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_42);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

893

nouveau_calc_arb(dev, crtc->mode.clock, drm_fb->format->cpp[0] * 8,

drivers/gpu/drm/nouveau/dispnv04/crtc.c

898

crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_FF_INDEX);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

899

crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_FFLWM__INDEX);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

903

crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_47);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

910

nv04_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,

drivers/gpu/drm/nouveau/dispnv04/crtc.c

913

int ret = nv_crtc_swap_fbs(crtc, old_fb);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

916

return nv04_crtc_do_mode_set_base(crtc, old_fb, x, y);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

980

nv04_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv,

drivers/gpu/drm/nouveau/dispnv04/crtc.c

983

struct nouveau_drm *drm = nouveau_drm(crtc->dev);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

985

struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);

drivers/gpu/drm/nouveau/dispnv04/cursor.c

31

crtc_wr_cio_state(struct drm_crtc *crtc, struct nv04_crtc_reg *crtcstate, int index)

drivers/gpu/drm/nouveau/dispnv04/cursor.c

33

NVWriteVgaCrtc(crtc->dev, nouveau_crtc(crtc)->index, index,

drivers/gpu/drm/nouveau/dispnv04/cursor.c

43

struct drm_crtc *crtc = &nv_crtc->base;

drivers/gpu/drm/nouveau/dispnv04/cursor.c

50

if (crtc->mode.flags & DRM_MODE_FLAG_DBLSCAN)

drivers/gpu/drm/nouveau/dispnv04/cursor.c

55

crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_HCUR_ADDR0_INDEX);

drivers/gpu/drm/nouveau/dispnv04/cursor.c

56

crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_HCUR_ADDR1_INDEX);

drivers/gpu/drm/nouveau/dispnv04/cursor.c

57

crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_HCUR_ADDR2_INDEX);

drivers/gpu/drm/nouveau/dispnv04/cursor.c

63

nv04_cursor_init(struct nouveau_crtc *crtc)

drivers/gpu/drm/nouveau/dispnv04/cursor.c

65

crtc->cursor.set_offset = nv04_cursor_set_offset;

drivers/gpu/drm/nouveau/dispnv04/cursor.c

66

crtc->cursor.set_pos = nv04_cursor_set_pos;

drivers/gpu/drm/nouveau/dispnv04/cursor.c

67

crtc->cursor.hide = nv04_cursor_hide;

drivers/gpu/drm/nouveau/dispnv04/cursor.c

68

crtc->cursor.show = nv04_cursor_show;

drivers/gpu/drm/nouveau/dispnv04/dac.c

368

int head = nouveau_crtc(encoder->crtc)->index;

drivers/gpu/drm/nouveau/dispnv04/dac.c

381

int head = nouveau_crtc(encoder->crtc)->index;

drivers/gpu/drm/nouveau/dispnv04/dac.c

416

struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc);

drivers/gpu/drm/nouveau/dispnv04/dfp.c

116

struct drm_crtc *crtc;

drivers/gpu/drm/nouveau/dispnv04/dfp.c

121

nv_crtc = nouveau_crtc(encoder->crtc);

drivers/gpu/drm/nouveau/dispnv04/dfp.c

135

list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {

drivers/gpu/drm/nouveau/dispnv04/dfp.c

136

nv_crtc = nouveau_crtc(crtc);

drivers/gpu/drm/nouveau/dispnv04/dfp.c

250

int head = nouveau_crtc(encoder->crtc)->index;

drivers/gpu/drm/nouveau/dispnv04/dfp.c

287

struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc);

drivers/gpu/drm/nouveau/dispnv04/dfp.c

294

const struct drm_framebuffer *fb = encoder->crtc->primary->fb;

drivers/gpu/drm/nouveau/dispnv04/dfp.c

451

struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc);

drivers/gpu/drm/nouveau/dispnv04/dfp.c

454

int head = nouveau_crtc(encoder->crtc)->index;

drivers/gpu/drm/nouveau/dispnv04/dfp.c

518

struct drm_crtc *crtc = encoder->crtc;

drivers/gpu/drm/nouveau/dispnv04/dfp.c

537

int head = crtc ? nouveau_crtc(crtc)->index :

drivers/gpu/drm/nouveau/dispnv04/dfp.c

555

nv04_dfp_prepare_sel_clk(dev, nv_encoder, nouveau_crtc(crtc)->index);

drivers/gpu/drm/nouveau/dispnv04/disp.c

104

struct drm_crtc *crtc;

drivers/gpu/drm/nouveau/dispnv04/disp.c

115

list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {

drivers/gpu/drm/nouveau/dispnv04/disp.c

116

struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);

drivers/gpu/drm/nouveau/dispnv04/disp.c

130

list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {

drivers/gpu/drm/nouveau/dispnv04/disp.c

131

struct drm_framebuffer *fb = crtc->primary->fb;

drivers/gpu/drm/nouveau/dispnv04/disp.c

142

list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {

drivers/gpu/drm/nouveau/dispnv04/disp.c

143

struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);

drivers/gpu/drm/nouveau/dispnv04/disp.c

156

list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {

drivers/gpu/drm/nouveau/dispnv04/disp.c

157

struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);

drivers/gpu/drm/nouveau/dispnv04/disp.c

172

list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {

drivers/gpu/drm/nouveau/dispnv04/disp.c

173

struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);

drivers/gpu/drm/nouveau/dispnv04/disp.c

219

struct nouveau_crtc *crtc;

drivers/gpu/drm/nouveau/dispnv04/disp.c

298

list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head)

drivers/gpu/drm/nouveau/dispnv04/disp.c

299

crtc->save(&crtc->base);

drivers/gpu/drm/nouveau/dispnv04/disp.c

61

struct drm_crtc *crtc;

drivers/gpu/drm/nouveau/dispnv04/disp.c

78

list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {

drivers/gpu/drm/nouveau/dispnv04/disp.c

79

struct drm_framebuffer *fb = crtc->primary->fb;

drivers/gpu/drm/nouveau/dispnv04/disp.c

88

list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {

drivers/gpu/drm/nouveau/dispnv04/disp.c

89

struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);

drivers/gpu/drm/nouveau/dispnv04/disp.h

177

struct dcb_output *outp, int crtc)

drivers/gpu/drm/nouveau/dispnv04/disp.h

181

init.head = crtc;

drivers/gpu/drm/nouveau/dispnv04/i2c/ch7006_drv.c

292

struct drm_crtc *crtc = encoder->crtc;

drivers/gpu/drm/nouveau/dispnv04/i2c/ch7006_drv.c

364

if (crtc)

drivers/gpu/drm/nouveau/dispnv04/i2c/ch7006_drv.c

365

drm_crtc_helper_set_mode(crtc, &crtc->mode,

drivers/gpu/drm/nouveau/dispnv04/i2c/ch7006_drv.c

366

crtc->x, crtc->y,

drivers/gpu/drm/nouveau/dispnv04/i2c/ch7006_drv.c

367

crtc->primary->fb);

drivers/gpu/drm/nouveau/dispnv04/i2c/sil164_drv.c

223

bool duallink = (on && encoder->crtc->mode.clock > 165000);

drivers/gpu/drm/nouveau/dispnv04/overlay.c

113

nv10_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,

drivers/gpu/drm/nouveau/dispnv04/overlay.c

124

struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);

drivers/gpu/drm/nouveau/dispnv04/overlay.c

364

nv04_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,

drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c

318

struct drm_display_mode *mode = &encoder->crtc->mode;

drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c

545

int head = nouveau_crtc(encoder->crtc)->index;

drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c

547

struct drm_display_mode *crtc_mode = &encoder->crtc->mode;

drivers/gpu/drm/nouveau/dispnv04/tvnv04.c

127

int head = nouveau_crtc(encoder->crtc)->index;

drivers/gpu/drm/nouveau/dispnv04/tvnv04.c

145

struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc);

drivers/gpu/drm/nouveau/dispnv04/tvnv04.c

169

struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc);

drivers/gpu/drm/nouveau/dispnv04/tvnv04.c

88

int head = nouveau_crtc(encoder->crtc)->index;

drivers/gpu/drm/nouveau/dispnv04/tvnv17.c

409

int head = nouveau_crtc(encoder->crtc)->index;

drivers/gpu/drm/nouveau/dispnv04/tvnv17.c

430

!enc->crtc &&

drivers/gpu/drm/nouveau/dispnv04/tvnv17.c

470

int head = nouveau_crtc(encoder->crtc)->index;

drivers/gpu/drm/nouveau/dispnv04/tvnv17.c

583

struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc);

drivers/gpu/drm/nouveau/dispnv04/tvnv17.c

696

struct drm_crtc *crtc = encoder->crtc;

drivers/gpu/drm/nouveau/dispnv04/tvnv17.c

703

if (encoder->crtc) {

drivers/gpu/drm/nouveau/dispnv04/tvnv17.c

729

if (encoder->crtc)

drivers/gpu/drm/nouveau/dispnv04/tvnv17.c

756

if (crtc)

drivers/gpu/drm/nouveau/dispnv04/tvnv17.c

757

drm_crtc_helper_set_mode(crtc, &crtc->mode,

drivers/gpu/drm/nouveau/dispnv04/tvnv17.c

758

crtc->x, crtc->y,

drivers/gpu/drm/nouveau/dispnv04/tvnv17.c

759

crtc->primary->fb);

drivers/gpu/drm/nouveau/dispnv50/atom.h

152

nv50_head_atom_get(struct drm_atomic_state *state, struct drm_crtc *crtc)

drivers/gpu/drm/nouveau/dispnv50/atom.h

154

struct drm_crtc_state *statec = drm_atomic_get_crtc_state(state, crtc);

drivers/gpu/drm/nouveau/dispnv50/atom.h

163

nv50_head_atom_get_new(struct drm_atomic_state *state, struct drm_crtc *crtc)

drivers/gpu/drm/nouveau/dispnv50/atom.h

165

struct drm_crtc_state *statec = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/nouveau/dispnv50/atom.h

179

drm_for_each_encoder_mask(encoder, atom->state.crtc->dev,

drivers/gpu/drm/nouveau/dispnv50/crc.c

100

drm_dbg_kms(dev, "Lock contended, delaying CRC ctx flip for %s\n", crtc->name);

drivers/gpu/drm/nouveau/dispnv50/crc.c

106

crtc->name, crc->ctx_idx, new_idx);

drivers/gpu/drm/nouveau/dispnv50/crc.c

112

end_vbl = drm_crtc_vblank_count(crtc);

drivers/gpu/drm/nouveau/dispnv50/crc.c

116

crtc->name, end_vbl, start_vbl);

drivers/gpu/drm/nouveau/dispnv50/crc.c

133

struct drm_crtc *crtc = &head->base.base;

drivers/gpu/drm/nouveau/dispnv50/crc.c

148

drm_crtc_add_crc_entry(crtc, true, crc->frame, &output_crc);

drivers/gpu/drm/nouveau/dispnv50/crc.c

156

struct drm_crtc *crtc = &head->base.base;

drivers/gpu/drm/nouveau/dispnv50/crc.c

211

drm_crtc_vblank_count(crtc)

drivers/gpu/drm/nouveau/dispnv50/crc.c

243

struct drm_crtc *crtc;

drivers/gpu/drm/nouveau/dispnv50/crc.c

246

for_each_new_crtc_in_state(state, crtc, crtc_state, i) {

drivers/gpu/drm/nouveau/dispnv50/crc.c

247

struct nv50_head *head = nv50_head(crtc);

drivers/gpu/drm/nouveau/dispnv50/crc.c

258

drm_crtc_vblank_put(crtc);

drivers/gpu/drm/nouveau/dispnv50/crc.c

261

NV_ATOMIC(nouveau_drm(crtc->dev),

drivers/gpu/drm/nouveau/dispnv50/crc.c

275

struct drm_crtc *crtc;

drivers/gpu/drm/nouveau/dispnv50/crc.c

278

for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) {

drivers/gpu/drm/nouveau/dispnv50/crc.c

279

struct nv50_head *head = nv50_head(crtc);

drivers/gpu/drm/nouveau/dispnv50/crc.c

299

struct drm_crtc *crtc;

drivers/gpu/drm/nouveau/dispnv50/crc.c

302

for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) {

drivers/gpu/drm/nouveau/dispnv50/crc.c

303

struct nv50_head *head = nv50_head(crtc);

drivers/gpu/drm/nouveau/dispnv50/crc.c

322

struct drm_crtc *crtc;

drivers/gpu/drm/nouveau/dispnv50/crc.c

325

for_each_new_crtc_in_state(state, crtc, crtc_state, i) {

drivers/gpu/drm/nouveau/dispnv50/crc.c

326

struct nv50_head *head = nv50_head(crtc);

drivers/gpu/drm/nouveau/dispnv50/crc.c

334

drm_crtc_vblank_get(crtc);

drivers/gpu/drm/nouveau/dispnv50/crc.c

337

vbl_count = drm_crtc_vblank_count(crtc);

drivers/gpu/drm/nouveau/dispnv50/crc.c

345

NV_ATOMIC(nouveau_drm(crtc->dev),

drivers/gpu/drm/nouveau/dispnv50/crc.c

383

struct drm_crtc *crtc;

drivers/gpu/drm/nouveau/dispnv50/crc.c

390

for_each_oldnew_crtc_in_state(&atom->state, crtc, old_crtc_state,

drivers/gpu/drm/nouveau/dispnv50/crc.c

453

struct drm_crtc *crtc = &head->base.base;

drivers/gpu/drm/nouveau/dispnv50/crc.c

454

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/nouveau/dispnv50/crc.c

50

nv50_crc_verify_source(struct drm_crtc *crtc, const char *source_name,

drivers/gpu/drm/nouveau/dispnv50/crc.c

53

struct nouveau_drm *drm = nouveau_drm(crtc->dev);

drivers/gpu/drm/nouveau/dispnv50/crc.c

544

int nv50_crc_set_source(struct drm_crtc *crtc, const char *source_str)

drivers/gpu/drm/nouveau/dispnv50/crc.c

546

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/nouveau/dispnv50/crc.c

549

struct nv50_head *head = nv50_head(crtc);

drivers/gpu/drm/nouveau/dispnv50/crc.c

635

struct drm_crtc *crtc = &head->base.base;

drivers/gpu/drm/nouveau/dispnv50/crc.c

639

ret = drm_modeset_lock_single_interruptible(&crtc->mutex);

drivers/gpu/drm/nouveau/dispnv50/crc.c

645

drm_modeset_unlock(&crtc->mutex);

drivers/gpu/drm/nouveau/dispnv50/crc.c

65

const char *const *nv50_crc_get_sources(struct drm_crtc *crtc, size_t *count)

drivers/gpu/drm/nouveau/dispnv50/crc.c

664

struct drm_crtc *crtc = &head->base.base;

drivers/gpu/drm/nouveau/dispnv50/crc.c

665

struct nouveau_drm *drm = nouveau_drm(crtc->dev);

drivers/gpu/drm/nouveau/dispnv50/crc.c

668

nv50_disp(crtc->dev)->core->func->crc;

drivers/gpu/drm/nouveau/dispnv50/crc.c

682

ret = drm_modeset_lock_single_interruptible(&crtc->mutex);

drivers/gpu/drm/nouveau/dispnv50/crc.c

686

armh = nv50_head_atom(crtc->state);

drivers/gpu/drm/nouveau/dispnv50/crc.c

699

drm_modeset_unlock(&crtc->mutex);

drivers/gpu/drm/nouveau/dispnv50/crc.c

713

struct drm_crtc *crtc = &head->base.base;

drivers/gpu/drm/nouveau/dispnv50/crc.c

715

nv50_disp(crtc->dev)->core->func->crc;

drivers/gpu/drm/nouveau/dispnv50/crc.c

718

if (!func || !crtc->debugfs_entry)

drivers/gpu/drm/nouveau/dispnv50/crc.c

721

root = debugfs_create_dir("nv_crc", crtc->debugfs_entry);

drivers/gpu/drm/nouveau/dispnv50/crc.c

743

struct drm_crtc *crtc;

drivers/gpu/drm/nouveau/dispnv50/crc.c

749

drm_for_each_crtc(crtc, dev)

drivers/gpu/drm/nouveau/dispnv50/crc.c

750

nv50_crc_init_head(disp, func, nv50_head(crtc));

drivers/gpu/drm/nouveau/dispnv50/crc.c

88

struct drm_crtc *crtc = &head->base.base;

drivers/gpu/drm/nouveau/dispnv50/crc.c

89

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/nouveau/dispnv50/crc.c

91

const uint64_t start_vbl = drm_crtc_vblank_count(crtc);

drivers/gpu/drm/nouveau/dispnv50/curs507a.c

103

struct nv50_head *head = nv50_head(asyw->state.crtc);

drivers/gpu/drm/nouveau/dispnv50/disp.c

1142

struct drm_crtc *crtc = connector_state->crtc;

drivers/gpu/drm/nouveau/dispnv50/disp.c

1144

if (!(mstc->mstm->outp->dcb->heads & drm_crtc_mask(crtc)))

drivers/gpu/drm/nouveau/dispnv50/disp.c

1147

return &nv50_head(crtc)->msto->encoder;

drivers/gpu/drm/nouveau/dispnv50/disp.c

1266

struct drm_crtc *crtc;

drivers/gpu/drm/nouveau/dispnv50/disp.c

1288

drm_for_each_crtc(crtc, dev) {

drivers/gpu/drm/nouveau/dispnv50/disp.c

1289

if (!(mstm->outp->dcb->heads & drm_crtc_mask(crtc)))

drivers/gpu/drm/nouveau/dispnv50/disp.c

1293

&nv50_head(crtc)->msto->encoder);

drivers/gpu/drm/nouveau/dispnv50/disp.c

1568

struct nv50_head *head = nv50_head(nv_encoder->crtc);

drivers/gpu/drm/nouveau/dispnv50/disp.c

1598

nv_encoder->crtc = NULL;

drivers/gpu/drm/nouveau/dispnv50/disp.c

1766

nv_encoder->crtc = &nv_crtc->base;

drivers/gpu/drm/nouveau/dispnv50/disp.c

1977

nv_encoder->crtc = NULL;

drivers/gpu/drm/nouveau/dispnv50/disp.c

2022

nv_encoder->crtc = &nv_crtc->base;

drivers/gpu/drm/nouveau/dispnv50/disp.c

2139

nv50_audio_enable(outp->encoder, nouveau_crtc(nv_encoder->crtc),

drivers/gpu/drm/nouveau/dispnv50/disp.c

2173

struct drm_crtc *crtc;

drivers/gpu/drm/nouveau/dispnv50/disp.c

2197

for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {

drivers/gpu/drm/nouveau/dispnv50/disp.c

2199

struct nv50_head *head = nv50_head(crtc);

drivers/gpu/drm/nouveau/dispnv50/disp.c

2201

NV_ATOMIC(drm, "%s: clr %04x (set %04x)\n", crtc->name,

drivers/gpu/drm/nouveau/dispnv50/disp.c

2206

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/nouveau/dispnv50/disp.c

2280

for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {

drivers/gpu/drm/nouveau/dispnv50/disp.c

2282

struct nv50_head *head = nv50_head(crtc);

drivers/gpu/drm/nouveau/dispnv50/disp.c

2284

NV_ATOMIC(drm, "%s: set %04x (clr %04x)\n", crtc->name,

drivers/gpu/drm/nouveau/dispnv50/disp.c

2294

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/nouveau/dispnv50/disp.c

2298

drm_crtc_vblank_get(crtc);

drivers/gpu/drm/nouveau/dispnv50/disp.c

2331

for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {

drivers/gpu/drm/nouveau/dispnv50/disp.c

2333

struct nv50_head *head = nv50_head(crtc);

drivers/gpu/drm/nouveau/dispnv50/disp.c

2335

NV_ATOMIC(drm, "%s: set %04x (clr %04x)\n", crtc->name,

drivers/gpu/drm/nouveau/dispnv50/disp.c

2388

for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) {

drivers/gpu/drm/nouveau/dispnv50/disp.c

2393

drm_crtc_accurate_vblank_count(crtc);

drivers/gpu/drm/nouveau/dispnv50/disp.c

2394

spin_lock_irqsave(&crtc->dev->event_lock, flags);

drivers/gpu/drm/nouveau/dispnv50/disp.c

2395

drm_crtc_send_vblank_event(crtc, new_crtc_state->event);

drivers/gpu/drm/nouveau/dispnv50/disp.c

2396

spin_unlock_irqrestore(&crtc->dev->event_lock, flags);

drivers/gpu/drm/nouveau/dispnv50/disp.c

2400

drm_crtc_vblank_put(crtc);

drivers/gpu/drm/nouveau/dispnv50/disp.c

2514

struct drm_crtc *crtc;

drivers/gpu/drm/nouveau/dispnv50/disp.c

2517

if (!(crtc = old_connector_state->crtc))

drivers/gpu/drm/nouveau/dispnv50/disp.c

2520

old_crtc_state = drm_atomic_get_old_crtc_state(&atom->state, crtc);

drivers/gpu/drm/nouveau/dispnv50/disp.c

2521

new_crtc_state = drm_atomic_get_new_crtc_state(&atom->state, crtc);

drivers/gpu/drm/nouveau/dispnv50/disp.c

2543

struct drm_crtc *crtc;

drivers/gpu/drm/nouveau/dispnv50/disp.c

2546

if (!(crtc = connector_state->crtc))

drivers/gpu/drm/nouveau/dispnv50/disp.c

2549

new_crtc_state = drm_atomic_get_new_crtc_state(&atom->state, crtc);

drivers/gpu/drm/nouveau/dispnv50/disp.c

2570

struct drm_crtc *crtc;

drivers/gpu/drm/nouveau/dispnv50/disp.c

2576

drm_for_each_crtc(crtc, dev) {

drivers/gpu/drm/nouveau/dispnv50/disp.c

2578

crtc);

drivers/gpu/drm/nouveau/dispnv50/disp.c

2582

head = nv50_head(crtc);

drivers/gpu/drm/nouveau/dispnv50/disp.c

2589

for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) {

drivers/gpu/drm/nouveau/dispnv50/disp.c

2591

ret = drm_atomic_add_affected_planes(state, crtc);

drivers/gpu/drm/nouveau/dispnv50/disp.c

2693

struct drm_crtc *crtc;

drivers/gpu/drm/nouveau/dispnv50/disp.c

2728

drm_for_each_crtc(crtc, dev) {

drivers/gpu/drm/nouveau/dispnv50/disp.c

2729

if (crtc->index != head_idx)

drivers/gpu/drm/nouveau/dispnv50/disp.c

2732

armh = nv50_head_atom(crtc->state);

drivers/gpu/drm/nouveau/dispnv50/disp.c

2757

outp->crtc = crtc;

drivers/gpu/drm/nouveau/dispnv50/disp.c

2758

outp->ctrl = NVVAL(NV507D, SOR_SET_CONTROL, PROTOCOL, proto) | BIT(crtc->index);

drivers/gpu/drm/nouveau/dispnv50/disp.c

2761

conn->state->crtc = crtc;

drivers/gpu/drm/nouveau/dispnv50/disp.c

465

struct drm_crtc *crtc;

drivers/gpu/drm/nouveau/dispnv50/disp.c

470

for_each_new_crtc_in_state(state, crtc, crtc_state, i) {

drivers/gpu/drm/nouveau/dispnv50/disp.c

472

return nouveau_crtc(crtc);

drivers/gpu/drm/nouveau/dispnv50/disp.c

489

nv_encoder->crtc = NULL;

drivers/gpu/drm/nouveau/dispnv50/disp.c

520

nv_encoder->crtc = &nv_crtc->base;

drivers/gpu/drm/nouveau/dispnv50/disp.c

623

nv_crtc = nouveau_crtc(nv_encoder->crtc);

drivers/gpu/drm/nouveau/dispnv50/head.c

229

struct drm_crtc *crtc = &head->base.base;

drivers/gpu/drm/nouveau/dispnv50/head.c

241

size, crtc->base.id, crtc->name);

drivers/gpu/drm/nouveau/dispnv50/head.c

273

size, crtc->base.id, crtc->name);

drivers/gpu/drm/nouveau/dispnv50/head.c

333

nv50_head_atomic_check(struct drm_crtc *crtc, struct drm_atomic_state *state)

drivers/gpu/drm/nouveau/dispnv50/head.c

336

crtc);

drivers/gpu/drm/nouveau/dispnv50/head.c

338

crtc);

drivers/gpu/drm/nouveau/dispnv50/head.c

339

struct nouveau_drm *drm = nouveau_drm(crtc->dev);

drivers/gpu/drm/nouveau/dispnv50/head.c

340

struct nv50_head *head = nv50_head(crtc);

drivers/gpu/drm/nouveau/dispnv50/head.c

350

NV_ATOMIC(drm, "%s atomic_check %d\n", crtc->name, asyh->state.active);

drivers/gpu/drm/nouveau/dispnv50/head.c

360

if (conns->crtc == crtc) {

drivers/gpu/drm/nouveau/dispnv50/head.c

460

nv50_head_atomic_destroy_state(struct drm_crtc *crtc,

drivers/gpu/drm/nouveau/dispnv50/head.c

469

nv50_head_atomic_duplicate_state(struct drm_crtc *crtc)

drivers/gpu/drm/nouveau/dispnv50/head.c

471

struct nv50_head_atom *armh = nv50_head_atom(crtc->state);

drivers/gpu/drm/nouveau/dispnv50/head.c

475

__drm_atomic_helper_crtc_duplicate_state(crtc, &asyh->state);

drivers/gpu/drm/nouveau/dispnv50/head.c

495

nv50_head_reset(struct drm_crtc *crtc)

drivers/gpu/drm/nouveau/dispnv50/head.c

502

if (crtc->state)

drivers/gpu/drm/nouveau/dispnv50/head.c

503

nv50_head_atomic_destroy_state(crtc, crtc->state);

drivers/gpu/drm/nouveau/dispnv50/head.c

505

__drm_atomic_helper_crtc_reset(crtc, &asyh->state);

drivers/gpu/drm/nouveau/dispnv50/head.c

509

nv50_head_late_register(struct drm_crtc *crtc)

drivers/gpu/drm/nouveau/dispnv50/head.c

511

return nv50_head_crc_late_register(nv50_head(crtc));

drivers/gpu/drm/nouveau/dispnv50/head.c

515

nv50_head_destroy(struct drm_crtc *crtc)

drivers/gpu/drm/nouveau/dispnv50/head.c

517

struct nv50_head *head = nv50_head(crtc);

drivers/gpu/drm/nouveau/dispnv50/head.c

522

drm_crtc_cleanup(crtc);

drivers/gpu/drm/nouveau/dispnv50/head.c

576

struct drm_crtc *crtc;

drivers/gpu/drm/nouveau/dispnv50/head.c

610

crtc = &nv_crtc->base;

drivers/gpu/drm/nouveau/dispnv50/head.c

611

drm_crtc_init_with_planes(dev, crtc, &base->plane, &curs->plane,

drivers/gpu/drm/nouveau/dispnv50/head.c

613

drm_crtc_helper_add(crtc, &nv50_head_help);

drivers/gpu/drm/nouveau/dispnv50/head.c

615

drm_mode_crtc_set_gamma_size(crtc, 256);

drivers/gpu/drm/nouveau/dispnv50/head.c

616

drm_crtc_enable_color_mgmt(crtc, base->func->ilut_size,

drivers/gpu/drm/nouveau/dispnv50/head.c

623

nv50_head_destroy(crtc);

drivers/gpu/drm/nouveau/dispnv50/wndw.c

461

if (asyw->state.crtc) {

drivers/gpu/drm/nouveau/dispnv50/wndw.c

462

asyh = nv50_head_atom_get(asyw->state.state, asyw->state.crtc);

drivers/gpu/drm/nouveau/dispnv50/wndw.c

472

if (armw->state.crtc) {

drivers/gpu/drm/nouveau/dispnv50/wndw.c

473

harm = nv50_head_atom_get(asyw->state.state, armw->state.crtc);

drivers/gpu/drm/nouveau/dispnv50/wndw.c

586

asyh = nv50_head_atom_get_new(asyw->state.state, asyw->state.crtc);

drivers/gpu/drm/nouveau/nouveau_backlight.c

121

struct drm_crtc *crtc;

drivers/gpu/drm/nouveau/nouveau_backlight.c

134

crtc = connector->state->crtc;

drivers/gpu/drm/nouveau/nouveau_backlight.c

135

if (!crtc)

drivers/gpu/drm/nouveau/nouveau_backlight.c

138

ret = drm_modeset_lock(&crtc->mutex, &ctx);

drivers/gpu/drm/nouveau/nouveau_backlight.c

144

if (!crtc->state->active)

drivers/gpu/drm/nouveau/nouveau_backlight.c

163

struct drm_crtc *crtc;

drivers/gpu/drm/nouveau/nouveau_backlight.c

177

crtc = connector->state->crtc;

drivers/gpu/drm/nouveau/nouveau_backlight.c

178

if (!crtc)

drivers/gpu/drm/nouveau/nouveau_backlight.c

181

ret = drm_modeset_lock(&crtc->mutex, &ctx);

drivers/gpu/drm/nouveau/nouveau_backlight.c

187

if (crtc->state->active)

drivers/gpu/drm/nouveau/nouveau_connector.c

809

if (connector->encoder && connector->encoder->crtc) {

drivers/gpu/drm/nouveau/nouveau_connector.c

810

ret = drm_crtc_helper_set_mode(connector->encoder->crtc,

drivers/gpu/drm/nouveau/nouveau_connector.c

811

&connector->encoder->crtc->mode,

drivers/gpu/drm/nouveau/nouveau_connector.c

812

connector->encoder->crtc->x,

drivers/gpu/drm/nouveau/nouveau_connector.c

813

connector->encoder->crtc->y,

drivers/gpu/drm/nouveau/nouveau_connector.h

187

struct drm_crtc *crtc = to_drm_crtc(nv_crtc);

drivers/gpu/drm/nouveau/nouveau_connector.h

191

if (connector->encoder && connector->encoder->crtc == crtc) {

drivers/gpu/drm/nouveau/nouveau_crtc.h

69

void (*save)(struct drm_crtc *crtc);

drivers/gpu/drm/nouveau/nouveau_crtc.h

70

void (*restore)(struct drm_crtc *crtc);

drivers/gpu/drm/nouveau/nouveau_crtc.h

73

static inline struct nouveau_crtc *nouveau_crtc(struct drm_crtc *crtc)

drivers/gpu/drm/nouveau/nouveau_crtc.h

75

return crtc ? container_of(crtc, struct nouveau_crtc, base) : NULL;

drivers/gpu/drm/nouveau/nouveau_crtc.h

78

static inline struct drm_crtc *to_drm_crtc(struct nouveau_crtc *crtc)

drivers/gpu/drm/nouveau/nouveau_crtc.h

80

return &crtc->base;

drivers/gpu/drm/nouveau/nouveau_display.c

118

nouveau_display_scanoutpos(struct drm_crtc *crtc,

drivers/gpu/drm/nouveau/nouveau_display.c

123

return nouveau_display_scanoutpos_head(crtc, vpos, hpos,

drivers/gpu/drm/nouveau/nouveau_display.c

51

nouveau_display_vblank_enable(struct drm_crtc *crtc)

drivers/gpu/drm/nouveau/nouveau_display.c

55

nv_crtc = nouveau_crtc(crtc);

drivers/gpu/drm/nouveau/nouveau_display.c

62

nouveau_display_vblank_disable(struct drm_crtc *crtc)

drivers/gpu/drm/nouveau/nouveau_display.c

66

nv_crtc = nouveau_crtc(crtc);

drivers/gpu/drm/nouveau/nouveau_display.c

85

nouveau_display_scanoutpos_head(struct drm_crtc *crtc, int *vpos, int *hpos,

drivers/gpu/drm/nouveau/nouveau_display.c

88

struct drm_vblank_crtc *vblank = drm_crtc_vblank_crtc(crtc);

drivers/gpu/drm/nouveau/nouveau_display.c

89

struct nvif_head *head = &nouveau_crtc(crtc)->head;

drivers/gpu/drm/nouveau/nouveau_display.h

55

int nouveau_display_vblank_enable(struct drm_crtc *crtc);

drivers/gpu/drm/nouveau/nouveau_display.h

56

void nouveau_display_vblank_disable(struct drm_crtc *crtc);

drivers/gpu/drm/nouveau/nouveau_display.h

57

bool nouveau_display_scanoutpos(struct drm_crtc *crtc,

drivers/gpu/drm/nouveau/nouveau_encoder.h

59

struct drm_crtc *crtc;

drivers/gpu/drm/omapdrm/dss/hdmi4.c

365

crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc);

drivers/gpu/drm/omapdrm/dss/hdmi5.c

363

crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc);

drivers/gpu/drm/omapdrm/dss/omapdss.h

280

void omap_crtc_set_enabled(struct drm_crtc *crtc, bool enable);

drivers/gpu/drm/omapdrm/omap_crtc.c

110

void omap_crtc_set_enabled(struct drm_crtc *crtc, bool enable)

drivers/gpu/drm/omapdrm/omap_crtc.c

112

struct omap_crtc_state *omap_state = to_omap_crtc_state(crtc->state);

drivers/gpu/drm/omapdrm/omap_crtc.c

113

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/omapdrm/omap_crtc.c

115

struct omap_crtc *omap_crtc = to_omap_crtc(crtc);

drivers/gpu/drm/omapdrm/omap_crtc.c

125

omap_irq_enable_framedone(crtc, enable);

drivers/gpu/drm/omapdrm/omap_crtc.c

185

struct drm_crtc *crtc = priv->channels[channel]->crtc;

drivers/gpu/drm/omapdrm/omap_crtc.c

186

struct omap_crtc *omap_crtc = to_omap_crtc(crtc);

drivers/gpu/drm/omapdrm/omap_crtc.c

197

struct drm_crtc *crtc = priv->channels[channel]->crtc;

drivers/gpu/drm/omapdrm/omap_crtc.c

198

struct omap_crtc *omap_crtc = to_omap_crtc(crtc);

drivers/gpu/drm/omapdrm/omap_crtc.c

207

struct drm_crtc *crtc = priv->channels[channel]->crtc;

drivers/gpu/drm/omapdrm/omap_crtc.c

208

struct omap_crtc *omap_crtc = to_omap_crtc(crtc);

drivers/gpu/drm/omapdrm/omap_crtc.c

218

struct drm_crtc *crtc = priv->channels[channel]->crtc;

drivers/gpu/drm/omapdrm/omap_crtc.c

219

struct omap_crtc *omap_crtc = to_omap_crtc(crtc);

drivers/gpu/drm/omapdrm/omap_crtc.c

230

struct drm_crtc *crtc = priv->channels[channel]->crtc;

drivers/gpu/drm/omapdrm/omap_crtc.c

231

struct omap_crtc *omap_crtc = to_omap_crtc(crtc);

drivers/gpu/drm/omapdrm/omap_crtc.c

249

struct drm_crtc *crtc = priv->channels[channel]->crtc;

drivers/gpu/drm/omapdrm/omap_crtc.c

250

struct omap_crtc *omap_crtc = to_omap_crtc(crtc);

drivers/gpu/drm/omapdrm/omap_crtc.c

266

void omap_crtc_error_irq(struct drm_crtc *crtc, u32 irqstatus)

drivers/gpu/drm/omapdrm/omap_crtc.c

268

struct omap_crtc *omap_crtc = to_omap_crtc(crtc);

drivers/gpu/drm/omapdrm/omap_crtc.c

279

void omap_crtc_vblank_irq(struct drm_crtc *crtc)

drivers/gpu/drm/omapdrm/omap_crtc.c

281

struct omap_crtc *omap_crtc = to_omap_crtc(crtc);

drivers/gpu/drm/omapdrm/omap_crtc.c

286

spin_lock(&crtc->dev->event_lock);

drivers/gpu/drm/omapdrm/omap_crtc.c

292

spin_unlock(&crtc->dev->event_lock);

drivers/gpu/drm/omapdrm/omap_crtc.c

298

drm_crtc_send_vblank_event(crtc, omap_crtc->event);

drivers/gpu/drm/omapdrm/omap_crtc.c

304

spin_unlock(&crtc->dev->event_lock);

drivers/gpu/drm/omapdrm/omap_crtc.c

307

drm_crtc_vblank_put(crtc);

drivers/gpu/drm/omapdrm/omap_crtc.c

315

void omap_crtc_framedone_irq(struct drm_crtc *crtc, uint32_t irqstatus)

drivers/gpu/drm/omapdrm/omap_crtc.c

317

struct omap_crtc *omap_crtc = to_omap_crtc(crtc);

drivers/gpu/drm/omapdrm/omap_crtc.c

324

spin_lock(&crtc->dev->event_lock);

drivers/gpu/drm/omapdrm/omap_crtc.c

327

drm_crtc_send_vblank_event(crtc, omap_crtc->event);

drivers/gpu/drm/omapdrm/omap_crtc.c

331

spin_unlock(&crtc->dev->event_lock);

drivers/gpu/drm/omapdrm/omap_crtc.c

337

void omap_crtc_flush(struct drm_crtc *crtc)

drivers/gpu/drm/omapdrm/omap_crtc.c

339

struct omap_crtc *omap_crtc = to_omap_crtc(crtc);

drivers/gpu/drm/omapdrm/omap_crtc.c

340

struct omap_crtc_state *omap_state = to_omap_crtc_state(crtc->state);

drivers/gpu/drm/omapdrm/omap_crtc.c

396

static void omap_crtc_write_crtc_properties(struct drm_crtc *crtc)

drivers/gpu/drm/omapdrm/omap_crtc.c

398

struct omap_drm_private *priv = crtc->dev->dev_private;

drivers/gpu/drm/omapdrm/omap_crtc.c

399

struct omap_crtc *omap_crtc = to_omap_crtc(crtc);

drivers/gpu/drm/omapdrm/omap_crtc.c

408

if (crtc->state->ctm) {

drivers/gpu/drm/omapdrm/omap_crtc.c

409

struct drm_color_ctm *ctm = crtc->state->ctm->data;

drivers/gpu/drm/omapdrm/omap_crtc.c

424

static void omap_crtc_destroy(struct drm_crtc *crtc)

drivers/gpu/drm/omapdrm/omap_crtc.c

426

struct omap_crtc *omap_crtc = to_omap_crtc(crtc);

drivers/gpu/drm/omapdrm/omap_crtc.c

430

drm_crtc_cleanup(crtc);

drivers/gpu/drm/omapdrm/omap_crtc.c

435

static void omap_crtc_arm_event(struct drm_crtc *crtc)

drivers/gpu/drm/omapdrm/omap_crtc.c

437

struct omap_crtc *omap_crtc = to_omap_crtc(crtc);

drivers/gpu/drm/omapdrm/omap_crtc.c

442

if (crtc->state->event) {

drivers/gpu/drm/omapdrm/omap_crtc.c

443

omap_crtc->event = crtc->state->event;

drivers/gpu/drm/omapdrm/omap_crtc.c

444

crtc->state->event = NULL;

drivers/gpu/drm/omapdrm/omap_crtc.c

448

static void omap_crtc_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/omapdrm/omap_crtc.c

451

struct omap_drm_private *priv = crtc->dev->dev_private;

drivers/gpu/drm/omapdrm/omap_crtc.c

452

struct omap_crtc *omap_crtc = to_omap_crtc(crtc);

drivers/gpu/drm/omapdrm/omap_crtc.c

453

struct omap_crtc_state *omap_state = to_omap_crtc_state(crtc->state);

drivers/gpu/drm/omapdrm/omap_crtc.c

464

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/omapdrm/omap_crtc.c

466

ret = drm_crtc_vblank_get(crtc);

drivers/gpu/drm/omapdrm/omap_crtc.c

469

spin_lock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/omapdrm/omap_crtc.c

470

omap_crtc_arm_event(crtc);

drivers/gpu/drm/omapdrm/omap_crtc.c

471

spin_unlock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/omapdrm/omap_crtc.c

474

static void omap_crtc_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/omapdrm/omap_crtc.c

477

struct omap_drm_private *priv = crtc->dev->dev_private;

drivers/gpu/drm/omapdrm/omap_crtc.c

478

struct omap_crtc *omap_crtc = to_omap_crtc(crtc);

drivers/gpu/drm/omapdrm/omap_crtc.c

479

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/omapdrm/omap_crtc.c

483

spin_lock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/omapdrm/omap_crtc.c

484

if (crtc->state->event) {

drivers/gpu/drm/omapdrm/omap_crtc.c

485

drm_crtc_send_vblank_event(crtc, crtc->state->event);

drivers/gpu/drm/omapdrm/omap_crtc.c

486

crtc->state->event = NULL;

drivers/gpu/drm/omapdrm/omap_crtc.c

488

spin_unlock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/omapdrm/omap_crtc.c

492

if (!omap_crtc_wait_pending(crtc))

drivers/gpu/drm/omapdrm/omap_crtc.c

495

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/omapdrm/omap_crtc.c

500

static enum drm_mode_status omap_crtc_mode_valid(struct drm_crtc *crtc,

drivers/gpu/drm/omapdrm/omap_crtc.c

503

struct omap_drm_private *priv = crtc->dev->dev_private;

drivers/gpu/drm/omapdrm/omap_crtc.c

504

struct omap_crtc *omap_crtc = to_omap_crtc(crtc);

drivers/gpu/drm/omapdrm/omap_crtc.c

553

static void omap_crtc_mode_set_nofb(struct drm_crtc *crtc)

drivers/gpu/drm/omapdrm/omap_crtc.c

555

struct omap_crtc *omap_crtc = to_omap_crtc(crtc);

drivers/gpu/drm/omapdrm/omap_crtc.c

556

struct drm_display_mode *mode = &crtc->state->adjusted_mode;

drivers/gpu/drm/omapdrm/omap_crtc.c

56

struct videomode *omap_crtc_timings(struct drm_crtc *crtc)

drivers/gpu/drm/omapdrm/omap_crtc.c

564

static bool omap_crtc_is_manually_updated(struct drm_crtc *crtc)

drivers/gpu/drm/omapdrm/omap_crtc.c

566

struct omap_crtc *omap_crtc = to_omap_crtc(crtc);

drivers/gpu/drm/omapdrm/omap_crtc.c

579

static int omap_crtc_atomic_check(struct drm_crtc *crtc,

drivers/gpu/drm/omapdrm/omap_crtc.c

58

struct omap_crtc *omap_crtc = to_omap_crtc(crtc);

drivers/gpu/drm/omapdrm/omap_crtc.c

583

crtc);

drivers/gpu/drm/omapdrm/omap_crtc.c

595

crtc->primary);

drivers/gpu/drm/omapdrm/omap_crtc.c

605

omap_crtc_state->manually_updated = omap_crtc_is_manually_updated(crtc);

drivers/gpu/drm/omapdrm/omap_crtc.c

611

static void omap_crtc_atomic_begin(struct drm_crtc *crtc,

drivers/gpu/drm/omapdrm/omap_crtc.c

616

static void omap_crtc_atomic_flush(struct drm_crtc *crtc,

drivers/gpu/drm/omapdrm/omap_crtc.c

619

struct omap_drm_private *priv = crtc->dev->dev_private;

drivers/gpu/drm/omapdrm/omap_crtc.c

62

enum omap_channel omap_crtc_channel(struct drm_crtc *crtc)

drivers/gpu/drm/omapdrm/omap_crtc.c

620

struct omap_crtc *omap_crtc = to_omap_crtc(crtc);

drivers/gpu/drm/omapdrm/omap_crtc.c

621

struct omap_crtc_state *omap_crtc_state = to_omap_crtc_state(crtc->state);

drivers/gpu/drm/omapdrm/omap_crtc.c

624

if (crtc->state->color_mgmt_changed) {

drivers/gpu/drm/omapdrm/omap_crtc.c

628

if (crtc->state->degamma_lut) {

drivers/gpu/drm/omapdrm/omap_crtc.c

630

crtc->state->degamma_lut->data;

drivers/gpu/drm/omapdrm/omap_crtc.c

631

length = crtc->state->degamma_lut->length /

drivers/gpu/drm/omapdrm/omap_crtc.c

638

omap_crtc_write_crtc_properties(crtc);

drivers/gpu/drm/omapdrm/omap_crtc.c

64

struct omap_crtc *omap_crtc = to_omap_crtc(crtc);

drivers/gpu/drm/omapdrm/omap_crtc.c

648

spin_lock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/omapdrm/omap_crtc.c

649

omap_crtc_flush(crtc);

drivers/gpu/drm/omapdrm/omap_crtc.c

650

omap_crtc_arm_event(crtc);

drivers/gpu/drm/omapdrm/omap_crtc.c

651

spin_unlock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/omapdrm/omap_crtc.c

655

ret = drm_crtc_vblank_get(crtc);

drivers/gpu/drm/omapdrm/omap_crtc.c

658

spin_lock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/omapdrm/omap_crtc.c

660

omap_crtc_arm_event(crtc);

drivers/gpu/drm/omapdrm/omap_crtc.c

661

spin_unlock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/omapdrm/omap_crtc.c

664

static int omap_crtc_atomic_set_property(struct drm_crtc *crtc,

drivers/gpu/drm/omapdrm/omap_crtc.c

669

struct omap_drm_private *priv = crtc->dev->dev_private;

drivers/gpu/drm/omapdrm/omap_crtc.c

678

plane_state = drm_atomic_get_plane_state(state->state, crtc->primary);

drivers/gpu/drm/omapdrm/omap_crtc.c

68

static bool omap_crtc_is_pending(struct drm_crtc *crtc)

drivers/gpu/drm/omapdrm/omap_crtc.c

682

if (property == crtc->primary->rotation_property)

drivers/gpu/drm/omapdrm/omap_crtc.c

692

static int omap_crtc_atomic_get_property(struct drm_crtc *crtc,

drivers/gpu/drm/omapdrm/omap_crtc.c

697

struct omap_drm_private *priv = crtc->dev->dev_private;

drivers/gpu/drm/omapdrm/omap_crtc.c

70

struct omap_crtc *omap_crtc = to_omap_crtc(crtc);

drivers/gpu/drm/omapdrm/omap_crtc.c

700

if (property == crtc->primary->rotation_property)

drivers/gpu/drm/omapdrm/omap_crtc.c

710

static void omap_crtc_reset(struct drm_crtc *crtc)

drivers/gpu/drm/omapdrm/omap_crtc.c

714

if (crtc->state)

drivers/gpu/drm/omapdrm/omap_crtc.c

715

__drm_atomic_helper_crtc_destroy_state(crtc->state);

drivers/gpu/drm/omapdrm/omap_crtc.c

717

kfree(crtc->state);

drivers/gpu/drm/omapdrm/omap_crtc.c

721

__drm_atomic_helper_crtc_reset(crtc, &state->base);

drivers/gpu/drm/omapdrm/omap_crtc.c

725

omap_crtc_duplicate_state(struct drm_crtc *crtc)

drivers/gpu/drm/omapdrm/omap_crtc.c

729

if (WARN_ON(!crtc->state))

drivers/gpu/drm/omapdrm/omap_crtc.c

732

current_state = to_omap_crtc_state(crtc->state);

drivers/gpu/drm/omapdrm/omap_crtc.c

738

__drm_atomic_helper_crtc_duplicate_state(crtc, &state->base);

drivers/gpu/drm/omapdrm/omap_crtc.c

74

spin_lock_irqsave(&crtc->dev->event_lock, flags);

drivers/gpu/drm/omapdrm/omap_crtc.c

76

spin_unlock_irqrestore(&crtc->dev->event_lock, flags);

drivers/gpu/drm/omapdrm/omap_crtc.c

787

struct drm_crtc *crtc = NULL;

drivers/gpu/drm/omapdrm/omap_crtc.c

800

crtc = &omap_crtc->base;

drivers/gpu/drm/omapdrm/omap_crtc.c

81

int omap_crtc_wait_pending(struct drm_crtc *crtc)

drivers/gpu/drm/omapdrm/omap_crtc.c

821

ret = drm_crtc_init_with_planes(dev, crtc, plane, NULL,

drivers/gpu/drm/omapdrm/omap_crtc.c

83

struct omap_crtc *omap_crtc = to_omap_crtc(crtc);

drivers/gpu/drm/omapdrm/omap_crtc.c

830

drm_crtc_helper_add(crtc, &omap_crtc_helper_funcs);

drivers/gpu/drm/omapdrm/omap_crtc.c

842

drm_crtc_enable_color_mgmt(crtc, gamma_lut_size, true, 0);

drivers/gpu/drm/omapdrm/omap_crtc.c

843

drm_mode_crtc_set_gamma_size(crtc, gamma_lut_size);

drivers/gpu/drm/omapdrm/omap_crtc.c

846

omap_plane_install_properties(crtc->primary, &crtc->base);

drivers/gpu/drm/omapdrm/omap_crtc.c

848

return crtc;

drivers/gpu/drm/omapdrm/omap_crtc.c

90

!omap_crtc_is_pending(crtc),

drivers/gpu/drm/omapdrm/omap_crtc.h

23

struct videomode *omap_crtc_timings(struct drm_crtc *crtc);

drivers/gpu/drm/omapdrm/omap_crtc.h

24

enum omap_channel omap_crtc_channel(struct drm_crtc *crtc);

drivers/gpu/drm/omapdrm/omap_crtc.h

28

int omap_crtc_wait_pending(struct drm_crtc *crtc);

drivers/gpu/drm/omapdrm/omap_crtc.h

29

void omap_crtc_error_irq(struct drm_crtc *crtc, u32 irqstatus);

drivers/gpu/drm/omapdrm/omap_crtc.h

30

void omap_crtc_vblank_irq(struct drm_crtc *crtc);

drivers/gpu/drm/omapdrm/omap_crtc.h

31

void omap_crtc_framedone_irq(struct drm_crtc *crtc, uint32_t irqstatus);

drivers/gpu/drm/omapdrm/omap_crtc.h

32

void omap_crtc_flush(struct drm_crtc *crtc);

drivers/gpu/drm/omapdrm/omap_drv.c

141

struct drm_crtc *crtc;

drivers/gpu/drm/omapdrm/omap_drv.c

153

for_each_oldnew_crtc_in_state(state, crtc, old_state, new_state, c) {

drivers/gpu/drm/omapdrm/omap_drv.c

490

struct drm_crtc *crtc;

drivers/gpu/drm/omapdrm/omap_drv.c

502

crtc = omap_crtc_init(dev, pipe, priv->planes[i]);

drivers/gpu/drm/omapdrm/omap_drv.c

503

if (IS_ERR(crtc))

drivers/gpu/drm/omapdrm/omap_drv.c

504

return PTR_ERR(crtc);

drivers/gpu/drm/omapdrm/omap_drv.c

507

pipe->crtc = crtc;

drivers/gpu/drm/omapdrm/omap_drv.c

52

struct drm_crtc *crtc;

drivers/gpu/drm/omapdrm/omap_drv.c

56

for_each_new_crtc_in_state(old_state, crtc, new_crtc_state, i) {

drivers/gpu/drm/omapdrm/omap_drv.c

60

ret = omap_crtc_wait_pending(crtc);

drivers/gpu/drm/omapdrm/omap_drv.h

38

struct drm_crtc *crtc;

drivers/gpu/drm/omapdrm/omap_fb.c

68

struct drm_crtc *crtc;

drivers/gpu/drm/omapdrm/omap_fb.c

72

drm_for_each_crtc(crtc, fb->dev)

drivers/gpu/drm/omapdrm/omap_fb.c

73

omap_crtc_flush(crtc);

drivers/gpu/drm/omapdrm/omap_irq.c

114

int omap_irq_enable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/omapdrm/omap_irq.c

116

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/omapdrm/omap_irq.c

119

enum omap_channel channel = omap_crtc_channel(crtc);

drivers/gpu/drm/omapdrm/omap_irq.c

140

void omap_irq_disable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/omapdrm/omap_irq.c

142

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/omapdrm/omap_irq.c

145

enum omap_channel channel = omap_crtc_channel(crtc);

drivers/gpu/drm/omapdrm/omap_irq.c

222

struct drm_crtc *crtc = priv->pipes[id].crtc;

drivers/gpu/drm/omapdrm/omap_irq.c

223

enum omap_channel channel = omap_crtc_channel(crtc);

drivers/gpu/drm/omapdrm/omap_irq.c

227

omap_crtc_vblank_irq(crtc);

drivers/gpu/drm/omapdrm/omap_irq.c

231

omap_crtc_error_irq(crtc, irqstatus);

drivers/gpu/drm/omapdrm/omap_irq.c

234

omap_crtc_framedone_irq(crtc, irqstatus);

drivers/gpu/drm/omapdrm/omap_irq.c

80

int omap_irq_enable_framedone(struct drm_crtc *crtc, bool enable)

drivers/gpu/drm/omapdrm/omap_irq.c

82

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/omapdrm/omap_irq.c

85

enum omap_channel channel = omap_crtc_channel(crtc);

drivers/gpu/drm/omapdrm/omap_irq.h

18

int omap_irq_enable_vblank(struct drm_crtc *crtc);

drivers/gpu/drm/omapdrm/omap_irq.h

19

int omap_irq_enable_framedone(struct drm_crtc *crtc, bool enable);

drivers/gpu/drm/omapdrm/omap_irq.h

20

void omap_irq_disable_vblank(struct drm_crtc *crtc);

drivers/gpu/drm/omapdrm/omap_plane.c

142

omap_crtc_timings(new_state->crtc), false,

drivers/gpu/drm/omapdrm/omap_plane.c

143

omap_crtc_channel(new_state->crtc));

drivers/gpu/drm/omapdrm/omap_plane.c

155

omap_crtc_timings(new_state->crtc), false,

drivers/gpu/drm/omapdrm/omap_plane.c

156

omap_crtc_channel(new_state->crtc));

drivers/gpu/drm/omapdrm/omap_plane.c

215

struct drm_crtc *crtc;

drivers/gpu/drm/omapdrm/omap_plane.c

229

crtc = new_plane_state->crtc ? new_plane_state->crtc : plane->state->crtc;

drivers/gpu/drm/omapdrm/omap_plane.c

230

if (!crtc)

drivers/gpu/drm/omapdrm/omap_plane.c

233

crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/omapdrm/omap_plane.c

96

DBG("%s, crtc=%p fb=%p", plane->name, new_state->crtc,

drivers/gpu/drm/panel/panel-novatek-nt35950.c

240

if (!connector->state || !connector->state->crtc)

drivers/gpu/drm/panel/panel-novatek-nt35950.c

243

crtc_state = connector->state->crtc->state;

drivers/gpu/drm/pl111/pl111_display.c

124

struct drm_crtc *crtc = &pipe->crtc;

drivers/gpu/drm/pl111/pl111_display.c

126

struct drm_device *drm = crtc->dev;

drivers/gpu/drm/pl111/pl111_display.c

355

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/pl111/pl111_display.c

360

struct drm_crtc *crtc = &pipe->crtc;

drivers/gpu/drm/pl111/pl111_display.c

361

struct drm_device *drm = crtc->dev;

drivers/gpu/drm/pl111/pl111_display.c

366

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/pl111/pl111_display.c

393

struct drm_crtc *crtc = &pipe->crtc;

drivers/gpu/drm/pl111/pl111_display.c

394

struct drm_device *drm = crtc->dev;

drivers/gpu/drm/pl111/pl111_display.c

396

struct drm_pending_vblank_event *event = crtc->state->event;

drivers/gpu/drm/pl111/pl111_display.c

40

drm_crtc_handle_vblank(&priv->pipe.crtc);

drivers/gpu/drm/pl111/pl111_display.c

408

crtc->state->event = NULL;

drivers/gpu/drm/pl111/pl111_display.c

410

spin_lock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/pl111/pl111_display.c

411

if (crtc->state->active && drm_crtc_vblank_get(crtc) == 0)

drivers/gpu/drm/pl111/pl111_display.c

412

drm_crtc_arm_vblank_event(crtc, event);

drivers/gpu/drm/pl111/pl111_display.c

414

drm_crtc_send_vblank_event(crtc, event);

drivers/gpu/drm/pl111/pl111_display.c

415

spin_unlock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/pl111/pl111_display.c

421

struct drm_crtc *crtc = &pipe->crtc;

drivers/gpu/drm/pl111/pl111_display.c

422

struct drm_device *drm = crtc->dev;

drivers/gpu/drm/pl111/pl111_display.c

432

struct drm_crtc *crtc = &pipe->crtc;

drivers/gpu/drm/pl111/pl111_display.c

433

struct drm_device *drm = crtc->dev;

drivers/gpu/drm/pl111/pl111_display.c

55

struct drm_device *drm = pipe->crtc.dev;

drivers/gpu/drm/qxl/qxl_display.c

320

static void qxl_crtc_update_monitors_config(struct drm_crtc *crtc,

drivers/gpu/drm/qxl/qxl_display.c

323

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/qxl/qxl_display.c

325

struct qxl_crtc *qcrtc = to_qxl_crtc(crtc);

drivers/gpu/drm/qxl/qxl_display.c

341

if (crtc->state->active) {

drivers/gpu/drm/qxl/qxl_display.c

342

struct drm_display_mode *mode = &crtc->mode;

drivers/gpu/drm/qxl/qxl_display.c

346

head.x = crtc->x;

drivers/gpu/drm/qxl/qxl_display.c

347

head.y = crtc->y;

drivers/gpu/drm/qxl/qxl_display.c

373

crtc->state->active ? "on" : "off", reason);

drivers/gpu/drm/qxl/qxl_display.c

384

static void qxl_crtc_atomic_flush(struct drm_crtc *crtc,

drivers/gpu/drm/qxl/qxl_display.c

387

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/qxl/qxl_display.c

388

struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/qxl/qxl_display.c

391

qxl_crtc_update_monitors_config(crtc, "flush");

drivers/gpu/drm/qxl/qxl_display.c

399

if (drm_crtc_vblank_get(crtc) == 0)

drivers/gpu/drm/qxl/qxl_display.c

400

drm_crtc_arm_vblank_event(crtc, event);

drivers/gpu/drm/qxl/qxl_display.c

402

drm_crtc_send_vblank_event(crtc, event);

drivers/gpu/drm/qxl/qxl_display.c

408

static void qxl_crtc_destroy(struct drm_crtc *crtc)

drivers/gpu/drm/qxl/qxl_display.c

410

struct qxl_crtc *qxl_crtc = to_qxl_crtc(crtc);

drivers/gpu/drm/qxl/qxl_display.c

413

drm_crtc_cleanup(crtc);

drivers/gpu/drm/qxl/qxl_display.c

475

static void qxl_crtc_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/qxl/qxl_display.c

478

qxl_crtc_update_monitors_config(crtc, "enable");

drivers/gpu/drm/qxl/qxl_display.c

480

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/qxl/qxl_display.c

483

static void qxl_crtc_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/qxl/qxl_display.c

486

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/qxl/qxl_display.c

488

qxl_crtc_update_monitors_config(crtc, "disable");

drivers/gpu/drm/qxl/qxl_display.c

505

if (!new_plane_state->crtc || !new_plane_state->fb)

drivers/gpu/drm/qxl/qxl_display.c

516

struct qxl_crtc *qcrtc = to_qxl_crtc(plane_state->crtc);

drivers/gpu/drm/qxl/qxl_display.c

561

struct qxl_crtc *qcrtc = to_qxl_crtc(plane_state->crtc);

drivers/gpu/drm/qxl/qxl_display.c

691

qdev->dumb_heads[new_state->crtc->index].x;

drivers/gpu/drm/qxl/qxl_display.c

761

qcrtc = to_qxl_crtc(old_state->crtc);

drivers/gpu/drm/qxl/qxl_display.c

871

qxl_prepare_shadow(qdev, user_bo, new_state->crtc->index);

drivers/gpu/drm/qxl/qxl_display.c

876

struct qxl_crtc *qcrtc = to_qxl_crtc(new_state->crtc);

drivers/gpu/drm/radeon/atombios_crtc.c

1048

radeon_crtc->adjusted_clock = atombios_adjust_pll(crtc, mode);

drivers/gpu/drm/radeon/atombios_crtc.c

1053

static void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)

drivers/gpu/drm/radeon/atombios_crtc.c

1055

struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/atombios_crtc.c

1056

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/radeon/atombios_crtc.c

1105

atombios_crtc_program_pll(crtc, radeon_crtc->crtc_id, radeon_crtc->pll_id,

drivers/gpu/drm/radeon/atombios_crtc.c

1134

static int dce4_crtc_do_set_base(struct drm_crtc *crtc,

drivers/gpu/drm/radeon/atombios_crtc.c

1138

struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/atombios_crtc.c

1139

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/radeon/atombios_crtc.c

1153

if (!crtc->primary->fb) {

drivers/gpu/drm/radeon/atombios_crtc.c

1158

target_fb = crtc->primary->fb;

drivers/gpu/drm/radeon/atombios_crtc.c

1419

viewport_w = crtc->mode.hdisplay;

drivers/gpu/drm/radeon/atombios_crtc.c

1420

viewport_h = (crtc->mode.vdisplay + 1) & ~1;

drivers/gpu/drm/radeon/atombios_crtc.c

1422

(crtc->mode.flags & DRM_MODE_FLAG_INTERLACE))

drivers/gpu/drm/radeon/atombios_crtc.c

1430

if (fb && fb != crtc->primary->fb) {

drivers/gpu/drm/radeon/atombios_crtc.c

1445

static int avivo_crtc_do_set_base(struct drm_crtc *crtc,

drivers/gpu/drm/radeon/atombios_crtc.c

1449

struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/atombios_crtc.c

1450

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/radeon/atombios_crtc.c

1463

if (!crtc->primary->fb) {

drivers/gpu/drm/radeon/atombios_crtc.c

1468

target_fb = crtc->primary->fb;

drivers/gpu/drm/radeon/atombios_crtc.c

1620

viewport_w = crtc->mode.hdisplay;

drivers/gpu/drm/radeon/atombios_crtc.c

1621

viewport_h = (crtc->mode.vdisplay + 1) & ~1;

drivers/gpu/drm/radeon/atombios_crtc.c

1628

if (fb && fb != crtc->primary->fb) {

drivers/gpu/drm/radeon/atombios_crtc.c

1643

int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,

drivers/gpu/drm/radeon/atombios_crtc.c

1646

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/radeon/atombios_crtc.c

1650

return dce4_crtc_do_set_base(crtc, old_fb, x, y);

drivers/gpu/drm/radeon/atombios_crtc.c

1652

return avivo_crtc_do_set_base(crtc, old_fb, x, y);

drivers/gpu/drm/radeon/atombios_crtc.c

1654

return radeon_crtc_do_set_base(crtc, old_fb, x, y);

drivers/gpu/drm/radeon/atombios_crtc.c

1658

static void radeon_legacy_atom_fixup(struct drm_crtc *crtc)

drivers/gpu/drm/radeon/atombios_crtc.c

1660

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/radeon/atombios_crtc.c

1662

struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/atombios_crtc.c

167

static void atombios_lock_crtc(struct drm_crtc *crtc, int lock)

drivers/gpu/drm/radeon/atombios_crtc.c

1688

static u32 radeon_get_pll_use_mask(struct drm_crtc *crtc)

drivers/gpu/drm/radeon/atombios_crtc.c

169

struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/atombios_crtc.c

1690

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/radeon/atombios_crtc.c

1696

if (crtc == test_crtc)

drivers/gpu/drm/radeon/atombios_crtc.c

170

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/radeon/atombios_crtc.c

1715

static int radeon_get_shared_dp_ppll(struct drm_crtc *crtc)

drivers/gpu/drm/radeon/atombios_crtc.c

1717

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/radeon/atombios_crtc.c

1723

if (crtc == test_crtc)

drivers/gpu/drm/radeon/atombios_crtc.c

1748

static int radeon_get_shared_nondp_ppll(struct drm_crtc *crtc)

drivers/gpu/drm/radeon/atombios_crtc.c

1750

struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/atombios_crtc.c

1751

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/radeon/atombios_crtc.c

1763

if (crtc == test_crtc)

drivers/gpu/drm/radeon/atombios_crtc.c

1780

if ((crtc->mode.clock == test_crtc->mode.clock) &&

drivers/gpu/drm/radeon/atombios_crtc.c

1827

static int radeon_atom_pick_pll(struct drm_crtc *crtc)

drivers/gpu/drm/radeon/atombios_crtc.c

1829

struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/atombios_crtc.c

1830

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/radeon/atombios_crtc.c

184

static void atombios_enable_crtc(struct drm_crtc *crtc, int state)

drivers/gpu/drm/radeon/atombios_crtc.c

1844

pll = radeon_get_shared_dp_ppll(crtc);

drivers/gpu/drm/radeon/atombios_crtc.c

1850

pll = radeon_get_shared_nondp_ppll(crtc);

drivers/gpu/drm/radeon/atombios_crtc.c

1858

pll_in_use = radeon_get_pll_use_mask(crtc);

drivers/gpu/drm/radeon/atombios_crtc.c

186

struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/atombios_crtc.c

1867

pll_in_use = radeon_get_pll_use_mask(crtc);

drivers/gpu/drm/radeon/atombios_crtc.c

187

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/radeon/atombios_crtc.c

1892

pll = radeon_get_shared_dp_ppll(crtc);

drivers/gpu/drm/radeon/atombios_crtc.c

1898

pll = radeon_get_shared_nondp_ppll(crtc);

drivers/gpu/drm/radeon/atombios_crtc.c

1903

pll_in_use = radeon_get_pll_use_mask(crtc);

drivers/gpu/drm/radeon/atombios_crtc.c

1917

pll_in_use = radeon_get_pll_use_mask(crtc);

drivers/gpu/drm/radeon/atombios_crtc.c

1947

pll = radeon_get_shared_dp_ppll(crtc);

drivers/gpu/drm/radeon/atombios_crtc.c

1953

pll = radeon_get_shared_nondp_ppll(crtc);

drivers/gpu/drm/radeon/atombios_crtc.c

1958

pll_in_use = radeon_get_pll_use_mask(crtc);

drivers/gpu/drm/radeon/atombios_crtc.c

200

static void atombios_enable_crtc_memreq(struct drm_crtc *crtc, int state)

drivers/gpu/drm/radeon/atombios_crtc.c

2005

int atombios_crtc_mode_set(struct drm_crtc *crtc,

drivers/gpu/drm/radeon/atombios_crtc.c

2010

struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/atombios_crtc.c

2011

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/radeon/atombios_crtc.c

202

struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/atombios_crtc.c

2024

atombios_crtc_set_pll(crtc, adjusted_mode);

drivers/gpu/drm/radeon/atombios_crtc.c

2027

atombios_set_crtc_dtd_timing(crtc, adjusted_mode);

drivers/gpu/drm/radeon/atombios_crtc.c

203

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/radeon/atombios_crtc.c

2030

atombios_crtc_set_timing(crtc, adjusted_mode);

drivers/gpu/drm/radeon/atombios_crtc.c

2032

atombios_set_crtc_dtd_timing(crtc, adjusted_mode);

drivers/gpu/drm/radeon/atombios_crtc.c

2034

atombios_crtc_set_timing(crtc, adjusted_mode);

drivers/gpu/drm/radeon/atombios_crtc.c

2036

atombios_set_crtc_dtd_timing(crtc, adjusted_mode);

drivers/gpu/drm/radeon/atombios_crtc.c

2037

radeon_legacy_atom_fixup(crtc);

drivers/gpu/drm/radeon/atombios_crtc.c

2039

atombios_crtc_set_base(crtc, x, y, old_fb);

drivers/gpu/drm/radeon/atombios_crtc.c

2040

atombios_overscan_setup(crtc, mode, adjusted_mode);

drivers/gpu/drm/radeon/atombios_crtc.c

2041

atombios_scaler_setup(crtc);

drivers/gpu/drm/radeon/atombios_crtc.c

2042

radeon_cursor_reset(crtc);

drivers/gpu/drm/radeon/atombios_crtc.c

2049

static bool atombios_crtc_mode_fixup(struct drm_crtc *crtc,

drivers/gpu/drm/radeon/atombios_crtc.c

2053

struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/atombios_crtc.c

2054

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/radeon/atombios_crtc.c

2059

if (encoder->crtc == crtc) {

drivers/gpu/drm/radeon/atombios_crtc.c

2076

if (!radeon_crtc_scaling_mode_fixup(crtc, mode, adjusted_mode))

drivers/gpu/drm/radeon/atombios_crtc.c

2078

if (!atombios_crtc_prepare_pll(crtc, adjusted_mode))

drivers/gpu/drm/radeon/atombios_crtc.c

2081

radeon_crtc->pll_id = radeon_atom_pick_pll(crtc);

drivers/gpu/drm/radeon/atombios_crtc.c

2090

static void atombios_crtc_prepare(struct drm_crtc *crtc)

drivers/gpu/drm/radeon/atombios_crtc.c

2092

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/radeon/atombios_crtc.c

2097

atombios_powergate_crtc(crtc, ATOM_DISABLE);

drivers/gpu/drm/radeon/atombios_crtc.c

2099

atombios_lock_crtc(crtc, ATOM_ENABLE);

drivers/gpu/drm/radeon/atombios_crtc.c

2100

atombios_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);

drivers/gpu/drm/radeon/atombios_crtc.c

2103

static void atombios_crtc_commit(struct drm_crtc *crtc)

drivers/gpu/drm/radeon/atombios_crtc.c

2105

atombios_crtc_dpms(crtc, DRM_MODE_DPMS_ON);

drivers/gpu/drm/radeon/atombios_crtc.c

2106

atombios_lock_crtc(crtc, ATOM_DISABLE);

drivers/gpu/drm/radeon/atombios_crtc.c

2109

static void atombios_crtc_disable(struct drm_crtc *crtc)

drivers/gpu/drm/radeon/atombios_crtc.c

2111

struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/atombios_crtc.c

2112

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/radeon/atombios_crtc.c

2117

atombios_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);

drivers/gpu/drm/radeon/atombios_crtc.c

2118

if (crtc->primary->fb) {

drivers/gpu/drm/radeon/atombios_crtc.c

2122

rbo = gem_to_radeon_bo(crtc->primary->fb->obj[0]);

drivers/gpu/drm/radeon/atombios_crtc.c

2138

atombios_powergate_crtc(crtc, ATOM_ENABLE);

drivers/gpu/drm/radeon/atombios_crtc.c

2156

atombios_crtc_program_pll(crtc, radeon_crtc->crtc_id, radeon_crtc->pll_id,

drivers/gpu/drm/radeon/atombios_crtc.c

2165

atombios_crtc_program_pll(crtc, radeon_crtc->crtc_id, radeon_crtc->pll_id,

drivers/gpu/drm/radeon/atombios_crtc.c

226

static void atombios_blank_crtc(struct drm_crtc *crtc, int state)

drivers/gpu/drm/radeon/atombios_crtc.c

228

struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/atombios_crtc.c

229

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/radeon/atombios_crtc.c

251

static void atombios_powergate_crtc(struct drm_crtc *crtc, int state)

drivers/gpu/drm/radeon/atombios_crtc.c

253

struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/atombios_crtc.c

254

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/radeon/atombios_crtc.c

267

void atombios_crtc_dpms(struct drm_crtc *crtc, int mode)

drivers/gpu/drm/radeon/atombios_crtc.c

269

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/radeon/atombios_crtc.c

271

struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/atombios_crtc.c

276

atombios_enable_crtc(crtc, ATOM_ENABLE);

drivers/gpu/drm/radeon/atombios_crtc.c

278

atombios_enable_crtc_memreq(crtc, ATOM_ENABLE);

drivers/gpu/drm/radeon/atombios_crtc.c

279

atombios_blank_crtc(crtc, ATOM_DISABLE);

drivers/gpu/drm/radeon/atombios_crtc.c

281

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/radeon/atombios_crtc.c

282

radeon_crtc_load_lut(crtc);

drivers/gpu/drm/radeon/atombios_crtc.c

288

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/radeon/atombios_crtc.c

290

atombios_blank_crtc(crtc, ATOM_ENABLE);

drivers/gpu/drm/radeon/atombios_crtc.c

292

atombios_enable_crtc_memreq(crtc, ATOM_DISABLE);

drivers/gpu/drm/radeon/atombios_crtc.c

293

atombios_enable_crtc(crtc, ATOM_DISABLE);

drivers/gpu/drm/radeon/atombios_crtc.c

302

atombios_set_crtc_dtd_timing(struct drm_crtc *crtc,

drivers/gpu/drm/radeon/atombios_crtc.c

305

struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/atombios_crtc.c

306

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/radeon/atombios_crtc.c

349

static void atombios_crtc_set_timing(struct drm_crtc *crtc,

drivers/gpu/drm/radeon/atombios_crtc.c

352

struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/atombios_crtc.c

353

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/radeon/atombios_crtc.c

38

static void atombios_overscan_setup(struct drm_crtc *crtc,

drivers/gpu/drm/radeon/atombios_crtc.c

42

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/radeon/atombios_crtc.c

44

struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/atombios_crtc.c

557

static u32 atombios_adjust_pll(struct drm_crtc *crtc,

drivers/gpu/drm/radeon/atombios_crtc.c

560

struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/atombios_crtc.c

561

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/radeon/atombios_crtc.c

815

static void atombios_crtc_program_pll(struct drm_crtc *crtc,

drivers/gpu/drm/radeon/atombios_crtc.c

829

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/radeon/atombios_crtc.c

83

static void atombios_scaler_setup(struct drm_crtc *crtc)

drivers/gpu/drm/radeon/atombios_crtc.c

85

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/radeon/atombios_crtc.c

87

struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/atombios_crtc.c

955

static bool atombios_crtc_prepare_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)

drivers/gpu/drm/radeon/atombios_crtc.c

957

struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/atombios_crtc.c

958

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/radeon/atombios_encoders.c

1042

if (encoder->crtc) {

drivers/gpu/drm/radeon/atombios_encoders.c

1043

struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);

drivers/gpu/drm/radeon/atombios_encoders.c

1531

struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);

drivers/gpu/drm/radeon/atombios_encoders.c

1850

struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);

drivers/gpu/drm/radeon/atombios_encoders.c

1999

struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);

drivers/gpu/drm/radeon/atombios_encoders.c

2051

struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);

drivers/gpu/drm/radeon/atombios_encoders.c

456

if (encoder->crtc) {

drivers/gpu/drm/radeon/atombios_encoders.c

457

struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);

drivers/gpu/drm/radeon/cik.c

8746

struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);

drivers/gpu/drm/radeon/dce3_1_afmt.c

118

struct radeon_crtc *crtc, unsigned int clock)

drivers/gpu/drm/radeon/dce3_1_afmt.c

127

if (!crtc)

drivers/gpu/drm/radeon/dce3_1_afmt.c

130

radeon_encoder = to_radeon_encoder(crtc->encoder);

drivers/gpu/drm/radeon/dce6_afmt.c

271

struct radeon_crtc *crtc, unsigned int clock)

drivers/gpu/drm/radeon/dce6_afmt.c

276

if (crtc)

drivers/gpu/drm/radeon/dce6_afmt.c

277

value |= DCCG_AUDIO_DTO0_SOURCE_SEL(crtc->crtc_id);

drivers/gpu/drm/radeon/dce6_afmt.c

290

struct radeon_crtc *crtc, unsigned int clock)

drivers/gpu/drm/radeon/dce6_afmt.c

296

if (crtc)

drivers/gpu/drm/radeon/dce6_afmt.c

297

value |= DCCG_AUDIO_DTO0_SOURCE_SEL(crtc->crtc_id);

drivers/gpu/drm/radeon/dce6_afmt.h

48

struct radeon_crtc *crtc, unsigned int clock);

drivers/gpu/drm/radeon/dce6_afmt.h

50

struct radeon_crtc *crtc, unsigned int clock);

drivers/gpu/drm/radeon/evergreen.c

1297

struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);

drivers/gpu/drm/radeon/evergreen.c

1348

static bool dce4_is_in_vblank(struct radeon_device *rdev, int crtc)

drivers/gpu/drm/radeon/evergreen.c

1350

if (RREG32(EVERGREEN_CRTC_STATUS + crtc_offsets[crtc]) & EVERGREEN_CRTC_V_BLANK)

drivers/gpu/drm/radeon/evergreen.c

1356

static bool dce4_is_counter_moving(struct radeon_device *rdev, int crtc)

drivers/gpu/drm/radeon/evergreen.c

1360

pos1 = RREG32(EVERGREEN_CRTC_STATUS_POSITION + crtc_offsets[crtc]);

drivers/gpu/drm/radeon/evergreen.c

1361

pos2 = RREG32(EVERGREEN_CRTC_STATUS_POSITION + crtc_offsets[crtc]);

drivers/gpu/drm/radeon/evergreen.c

1377

void dce4_wait_for_vblank(struct radeon_device *rdev, int crtc)

drivers/gpu/drm/radeon/evergreen.c

1381

if (crtc >= rdev->num_crtc)

drivers/gpu/drm/radeon/evergreen.c

1384

if (!(RREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[crtc]) & EVERGREEN_CRTC_MASTER_EN))

drivers/gpu/drm/radeon/evergreen.c

1390

while (dce4_is_in_vblank(rdev, crtc)) {

drivers/gpu/drm/radeon/evergreen.c

1392

if (!dce4_is_counter_moving(rdev, crtc))

drivers/gpu/drm/radeon/evergreen.c

1397

while (!dce4_is_in_vblank(rdev, crtc)) {

drivers/gpu/drm/radeon/evergreen.c

1399

if (!dce4_is_counter_moving(rdev, crtc))

drivers/gpu/drm/radeon/evergreen.c

1678

struct drm_crtc *crtc;

drivers/gpu/drm/radeon/evergreen.c

1683

list_for_each_entry(crtc, &ddev->mode_config.crtc_list, head) {

drivers/gpu/drm/radeon/evergreen.c

1684

radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/evergreen.c

1703

struct drm_crtc *crtc;

drivers/gpu/drm/radeon/evergreen.c

1708

list_for_each_entry(crtc, &ddev->mode_config.crtc_list, head) {

drivers/gpu/drm/radeon/evergreen.c

1709

radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/evergreen.c

4455

u32 evergreen_get_vblank_counter(struct radeon_device *rdev, int crtc)

drivers/gpu/drm/radeon/evergreen.c

4457

if (crtc >= rdev->num_crtc)

drivers/gpu/drm/radeon/evergreen.c

4460

return RREG32(CRTC_STATUS_FRAME_COUNT + crtc_offsets[crtc]);

drivers/gpu/drm/radeon/evergreen_hdmi.c

230

struct radeon_crtc *crtc, unsigned int clock)

drivers/gpu/drm/radeon/evergreen_hdmi.c

259

if (crtc)

drivers/gpu/drm/radeon/evergreen_hdmi.c

260

value |= DCCG_AUDIO_DTO0_SOURCE_SEL(crtc->crtc_id);

drivers/gpu/drm/radeon/evergreen_hdmi.c

273

struct radeon_crtc *crtc, unsigned int clock)

drivers/gpu/drm/radeon/evergreen_hdmi.c

285

if (crtc)

drivers/gpu/drm/radeon/evergreen_hdmi.c

286

value |= DCCG_AUDIO_DTO0_SOURCE_SEL(crtc->crtc_id);

drivers/gpu/drm/radeon/evergreen_hdmi.c

76

if (encoder->crtc) {

drivers/gpu/drm/radeon/evergreen_hdmi.c

77

struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);

drivers/gpu/drm/radeon/evergreen_hdmi.h

60

struct radeon_crtc *crtc, unsigned int clock);

drivers/gpu/drm/radeon/evergreen_hdmi.h

62

struct radeon_crtc *crtc, unsigned int clock);

drivers/gpu/drm/radeon/r100.c

118

void r100_wait_for_vblank(struct radeon_device *rdev, int crtc)

drivers/gpu/drm/radeon/r100.c

122

if (crtc >= rdev->num_crtc)

drivers/gpu/drm/radeon/r100.c

125

if (crtc == 0) {

drivers/gpu/drm/radeon/r100.c

136

while (r100_is_in_vblank(rdev, crtc)) {

drivers/gpu/drm/radeon/r100.c

138

if (!r100_is_counter_moving(rdev, crtc))

drivers/gpu/drm/radeon/r100.c

143

while (!r100_is_in_vblank(rdev, crtc)) {

drivers/gpu/drm/radeon/r100.c

145

if (!r100_is_counter_moving(rdev, crtc))

drivers/gpu/drm/radeon/r100.c

1455

struct drm_crtc *crtc;

drivers/gpu/drm/radeon/r100.c

1494

crtc = drm_crtc_find(rdev_to_drm(p->rdev), p->filp, crtc_id);

drivers/gpu/drm/radeon/r100.c

1495

if (!crtc) {

drivers/gpu/drm/radeon/r100.c

1499

radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/r100.c

1502

if (!crtc->enabled) {

drivers/gpu/drm/radeon/r100.c

463

struct drm_crtc *crtc;

drivers/gpu/drm/radeon/r100.c

468

list_for_each_entry(crtc, &ddev->mode_config.crtc_list, head) {

drivers/gpu/drm/radeon/r100.c

469

radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/r100.c

494

struct drm_crtc *crtc;

drivers/gpu/drm/radeon/r100.c

499

list_for_each_entry(crtc, &ddev->mode_config.crtc_list, head) {

drivers/gpu/drm/radeon/r100.c

500

radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/r100.c

78

static bool r100_is_in_vblank(struct radeon_device *rdev, int crtc)

drivers/gpu/drm/radeon/r100.c

80

if (crtc == 0) {

drivers/gpu/drm/radeon/r100.c

845

u32 r100_get_vblank_counter(struct radeon_device *rdev, int crtc)

drivers/gpu/drm/radeon/r100.c

847

if (crtc == 0)

drivers/gpu/drm/radeon/r100.c

93

static bool r100_is_counter_moving(struct radeon_device *rdev, int crtc)

drivers/gpu/drm/radeon/r100.c

97

if (crtc == 0) {

drivers/gpu/drm/radeon/r600.c

301

struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);

drivers/gpu/drm/radeon/r600.h

47

struct radeon_crtc *crtc, unsigned int clock);

drivers/gpu/drm/radeon/r600_cs.c

831

struct drm_crtc *crtc;

drivers/gpu/drm/radeon/r600_cs.c

892

crtc = drm_crtc_find(rdev_to_drm(p->rdev), p->filp, crtc_id);

drivers/gpu/drm/radeon/r600_cs.c

893

if (!crtc) {

drivers/gpu/drm/radeon/r600_cs.c

897

radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/r600_cs.c

900

if (!crtc->enabled) {

drivers/gpu/drm/radeon/r600_dpm.c

157

struct drm_crtc *crtc;

drivers/gpu/drm/radeon/r600_dpm.c

163

list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {

drivers/gpu/drm/radeon/r600_dpm.c

164

radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/r600_dpm.c

165

if (crtc->enabled && radeon_crtc->enabled && radeon_crtc->hw_mode.clock) {

drivers/gpu/drm/radeon/r600_dpm.c

184

struct drm_crtc *crtc;

drivers/gpu/drm/radeon/r600_dpm.c

189

list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {

drivers/gpu/drm/radeon/r600_dpm.c

190

radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/r600_dpm.c

191

if (crtc->enabled && radeon_crtc->enabled && radeon_crtc->hw_mode.clock) {

drivers/gpu/drm/radeon/r600_hdmi.c

294

struct radeon_crtc *crtc, unsigned int clock)

drivers/gpu/drm/radeon/r600_hdmi.c

299

if (!crtc)

drivers/gpu/drm/radeon/r600_hdmi.c

302

radeon_encoder = to_radeon_encoder(crtc->encoder);

drivers/gpu/drm/radeon/radeon.h

1889

u32 (*get_vblank_counter)(struct radeon_device *rdev, int crtc);

drivers/gpu/drm/radeon/radeon.h

1891

void (*wait_for_vblank)(struct radeon_device *rdev, int crtc);

drivers/gpu/drm/radeon/radeon.h

1985

void (*page_flip)(struct radeon_device *rdev, int crtc, u64 crtc_base, bool async);

drivers/gpu/drm/radeon/radeon.h

1986

bool (*page_flip_pending)(struct radeon_device *rdev, int crtc);

drivers/gpu/drm/radeon/radeon.h

2720

#define radeon_get_vblank_counter(rdev, crtc) (rdev)->asic->display.get_vblank_counter((rdev), (crtc))

drivers/gpu/drm/radeon/radeon.h

2756

#define radeon_page_flip(rdev, crtc, base, async) (rdev)->asic->pflip.page_flip((rdev), (crtc), (base), (async))

drivers/gpu/drm/radeon/radeon.h

2757

#define radeon_page_flip_pending(rdev, crtc) (rdev)->asic->pflip.page_flip_pending((rdev), (crtc))

drivers/gpu/drm/radeon/radeon.h

2758

#define radeon_wait_for_vblank(rdev, crtc) (rdev)->asic->display.wait_for_vblank((rdev), (crtc))

drivers/gpu/drm/radeon/radeon.h

2825

u32 radeon_get_vblank_counter_kms(struct drm_crtc *crtc);

drivers/gpu/drm/radeon/radeon.h

2826

int radeon_enable_vblank_kms(struct drm_crtc *crtc);

drivers/gpu/drm/radeon/radeon.h

2827

void radeon_disable_vblank_kms(struct drm_crtc *crtc);

drivers/gpu/drm/radeon/radeon.h

768

void radeon_irq_kms_pflip_irq_get(struct radeon_device *rdev, int crtc);

drivers/gpu/drm/radeon/radeon.h

769

void radeon_irq_kms_pflip_irq_put(struct radeon_device *rdev, int crtc);

drivers/gpu/drm/radeon/radeon_asic.h

140

extern void r100_page_flip(struct radeon_device *rdev, int crtc,

drivers/gpu/drm/radeon/radeon_asic.h

142

extern bool r100_page_flip_pending(struct radeon_device *rdev, int crtc);

drivers/gpu/drm/radeon/radeon_asic.h

143

extern void r100_wait_for_vblank(struct radeon_device *rdev, int crtc);

drivers/gpu/drm/radeon/radeon_asic.h

236

u32 rs600_get_vblank_counter(struct radeon_device *rdev, int crtc);

drivers/gpu/drm/radeon/radeon_asic.h

252

extern void rs600_page_flip(struct radeon_device *rdev, int crtc,

drivers/gpu/drm/radeon/radeon_asic.h

254

extern bool rs600_page_flip_pending(struct radeon_device *rdev, int crtc);

drivers/gpu/drm/radeon/radeon_asic.h

256

extern void avivo_wait_for_vblank(struct radeon_device *rdev, int crtc);

drivers/gpu/drm/radeon/radeon_asic.h

465

void rv770_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base,

drivers/gpu/drm/radeon/radeon_asic.h

467

bool rv770_page_flip_pending(struct radeon_device *rdev, int crtc);

drivers/gpu/drm/radeon/radeon_asic.h

523

u32 evergreen_get_vblank_counter(struct radeon_device *rdev, int crtc);

drivers/gpu/drm/radeon/radeon_asic.h

535

extern void evergreen_page_flip(struct radeon_device *rdev, int crtc,

drivers/gpu/drm/radeon/radeon_asic.h

537

extern bool evergreen_page_flip_pending(struct radeon_device *rdev, int crtc);

drivers/gpu/drm/radeon/radeon_asic.h

538

extern void dce4_wait_for_vblank(struct radeon_device *rdev, int crtc);

drivers/gpu/drm/radeon/radeon_asic.h

68

u32 r100_get_vblank_counter(struct radeon_device *rdev, int crtc);

drivers/gpu/drm/radeon/radeon_atombios.c

4338

radeon_atombios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc)

drivers/gpu/drm/radeon/radeon_atombios.c

4355

bios_3_scratch |= (crtc << 18);

drivers/gpu/drm/radeon/radeon_atombios.c

4359

bios_3_scratch |= (crtc << 24);

drivers/gpu/drm/radeon/radeon_atombios.c

4363

bios_3_scratch |= (crtc << 16);

drivers/gpu/drm/radeon/radeon_atombios.c

4367

bios_3_scratch |= (crtc << 20);

drivers/gpu/drm/radeon/radeon_atombios.c

4371

bios_3_scratch |= (crtc << 17);

drivers/gpu/drm/radeon/radeon_atombios.c

4375

bios_3_scratch |= (crtc << 19);

drivers/gpu/drm/radeon/radeon_atombios.c

4379

bios_3_scratch |= (crtc << 23);

drivers/gpu/drm/radeon/radeon_atombios.c

4383

bios_3_scratch |= (crtc << 25);

drivers/gpu/drm/radeon/radeon_audio.c

444

struct radeon_crtc *crtc = to_radeon_crtc(encoder->crtc);

drivers/gpu/drm/radeon/radeon_audio.c

447

radeon_encoder->audio->set_dto(rdev, crtc, clock);

drivers/gpu/drm/radeon/radeon_audio.c

601

if (encoder->crtc) {

drivers/gpu/drm/radeon/radeon_audio.c

602

struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);

drivers/gpu/drm/radeon/radeon_audio.h

55

struct radeon_crtc *crtc, unsigned int clock);

drivers/gpu/drm/radeon/radeon_audio.h

91

struct radeon_crtc *crtc, unsigned int clock);

drivers/gpu/drm/radeon/radeon_combios.c

3541

radeon_combios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc)

drivers/gpu/drm/radeon/radeon_combios.c

3550

bios_5_scratch |= (crtc << RADEON_TV1_CRTC_SHIFT);

drivers/gpu/drm/radeon/radeon_combios.c

3554

bios_5_scratch |= (crtc << RADEON_CRT1_CRTC_SHIFT);

drivers/gpu/drm/radeon/radeon_combios.c

3558

bios_5_scratch |= (crtc << RADEON_CRT2_CRTC_SHIFT);

drivers/gpu/drm/radeon/radeon_combios.c

3562

bios_5_scratch |= (crtc << RADEON_LCD1_CRTC_SHIFT);

drivers/gpu/drm/radeon/radeon_combios.c

3566

bios_5_scratch |= (crtc << RADEON_DFP1_CRTC_SHIFT);

drivers/gpu/drm/radeon/radeon_combios.c

3570

bios_5_scratch |= (crtc << RADEON_DFP2_CRTC_SHIFT);

drivers/gpu/drm/radeon/radeon_connectors.c

719

if (connector->encoder && connector->encoder->crtc) {

drivers/gpu/drm/radeon/radeon_connectors.c

720

struct drm_crtc *crtc = connector->encoder->crtc;

drivers/gpu/drm/radeon/radeon_connectors.c

721

struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/radeon_connectors.c

729

crtc->funcs->gamma_set(crtc, NULL, NULL, NULL, 0, NULL);

drivers/gpu/drm/radeon/radeon_connectors.c

91

struct drm_crtc *crtc = encoder->crtc;

drivers/gpu/drm/radeon/radeon_connectors.c

93

if (crtc && crtc->enabled) {

drivers/gpu/drm/radeon/radeon_connectors.c

94

drm_crtc_helper_set_mode(crtc, &crtc->mode,

drivers/gpu/drm/radeon/radeon_connectors.c

95

crtc->x, crtc->y, crtc->primary->fb);

drivers/gpu/drm/radeon/radeon_cursor.c

144

static int radeon_cursor_move_locked(struct drm_crtc *crtc, int x, int y)

drivers/gpu/drm/radeon/radeon_cursor.c

146

struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/radeon_cursor.c

147

struct radeon_device *rdev = crtc->dev->dev_private;

drivers/gpu/drm/radeon/radeon_cursor.c

156

x += crtc->x;

drivers/gpu/drm/radeon/radeon_cursor.c

157

y += crtc->y;

drivers/gpu/drm/radeon/radeon_cursor.c

166

x += crtc->x;

drivers/gpu/drm/radeon/radeon_cursor.c

167

y += crtc->y;

drivers/gpu/drm/radeon/radeon_cursor.c

169

DRM_DEBUG("x %d y %d c->x %d c->y %d\n", x, y, crtc->x, crtc->y);

drivers/gpu/drm/radeon/radeon_cursor.c

185

list_for_each_entry(crtc_p, &crtc->dev->mode_config.crtc_list, head) {

drivers/gpu/drm/radeon/radeon_cursor.c

193

frame_end = crtc->x + crtc->mode.crtc_hdisplay;

drivers/gpu/drm/radeon/radeon_cursor.c

209

if (x <= (crtc->x - w) || y <= (crtc->y - radeon_crtc->cursor_height) ||

drivers/gpu/drm/radeon/radeon_cursor.c

210

x >= (crtc->x + crtc->mode.hdisplay) ||

drivers/gpu/drm/radeon/radeon_cursor.c

211

y >= (crtc->y + crtc->mode.vdisplay))

drivers/gpu/drm/radeon/radeon_cursor.c

228

x -= crtc->x;

drivers/gpu/drm/radeon/radeon_cursor.c

229

y -= crtc->y;

drivers/gpu/drm/radeon/radeon_cursor.c

231

if (crtc->mode.flags & DRM_MODE_FLAG_DBLSCAN)

drivers/gpu/drm/radeon/radeon_cursor.c

251

radeon_show_cursor(crtc);

drivers/gpu/drm/radeon/radeon_cursor.c

258

radeon_hide_cursor(crtc);

drivers/gpu/drm/radeon/radeon_cursor.c

264

int radeon_crtc_cursor_move(struct drm_crtc *crtc,

drivers/gpu/drm/radeon/radeon_cursor.c

269

radeon_lock_cursor(crtc, true);

drivers/gpu/drm/radeon/radeon_cursor.c

270

ret = radeon_cursor_move_locked(crtc, x, y);

drivers/gpu/drm/radeon/radeon_cursor.c

271

radeon_lock_cursor(crtc, false);

drivers/gpu/drm/radeon/radeon_cursor.c

276

int radeon_crtc_cursor_set2(struct drm_crtc *crtc,

drivers/gpu/drm/radeon/radeon_cursor.c

284

struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/radeon_cursor.c

285

struct radeon_device *rdev = crtc->dev->dev_private;

drivers/gpu/drm/radeon/radeon_cursor.c

292

radeon_hide_cursor(crtc);

drivers/gpu/drm/radeon/radeon_cursor.c

32

static void radeon_lock_cursor(struct drm_crtc *crtc, bool lock)

drivers/gpu/drm/radeon/radeon_cursor.c

326

radeon_lock_cursor(crtc, true);

drivers/gpu/drm/radeon/radeon_cursor.c

34

struct radeon_device *rdev = crtc->dev->dev_private;

drivers/gpu/drm/radeon/radeon_cursor.c

342

radeon_cursor_move_locked(crtc, x, y);

drivers/gpu/drm/radeon/radeon_cursor.c

345

radeon_show_cursor(crtc);

drivers/gpu/drm/radeon/radeon_cursor.c

347

radeon_lock_cursor(crtc, false);

drivers/gpu/drm/radeon/radeon_cursor.c

35

struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/radeon_cursor.c

372

void radeon_cursor_reset(struct drm_crtc *crtc)

drivers/gpu/drm/radeon/radeon_cursor.c

374

struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/radeon_cursor.c

377

radeon_lock_cursor(crtc, true);

drivers/gpu/drm/radeon/radeon_cursor.c

379

radeon_cursor_move_locked(crtc, radeon_crtc->cursor_x,

drivers/gpu/drm/radeon/radeon_cursor.c

382

radeon_show_cursor(crtc);

drivers/gpu/drm/radeon/radeon_cursor.c

384

radeon_lock_cursor(crtc, false);

drivers/gpu/drm/radeon/radeon_cursor.c

62

static void radeon_hide_cursor(struct drm_crtc *crtc)

drivers/gpu/drm/radeon/radeon_cursor.c

64

struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/radeon_cursor.c

65

struct radeon_device *rdev = crtc->dev->dev_private;

drivers/gpu/drm/radeon/radeon_cursor.c

90

static void radeon_show_cursor(struct drm_crtc *crtc)

drivers/gpu/drm/radeon/radeon_cursor.c

92

struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/radeon_cursor.c

93

struct radeon_device *rdev = crtc->dev->dev_private;

drivers/gpu/drm/radeon/radeon_device.c

1550

struct drm_crtc *crtc;

drivers/gpu/drm/radeon/radeon_device.c

1574

list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {

drivers/gpu/drm/radeon/radeon_device.c

1575

struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/radeon_device.c

1576

struct drm_framebuffer *fb = crtc->primary->fb;

drivers/gpu/drm/radeon/radeon_device.c

1656

struct drm_crtc *crtc;

drivers/gpu/drm/radeon/radeon_device.c

1691

list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {

drivers/gpu/drm/radeon/radeon_device.c

1692

struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/radeon_display.c

111

r = crtc->gamma_store;

drivers/gpu/drm/radeon/radeon_display.c

112

g = r + crtc->gamma_size;

drivers/gpu/drm/radeon/radeon_display.c

113

b = g + crtc->gamma_size;

drivers/gpu/drm/radeon/radeon_display.c

122

static void dce5_crtc_load_lut(struct drm_crtc *crtc)

drivers/gpu/drm/radeon/radeon_display.c

124

struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/radeon_display.c

125

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/radeon/radeon_display.c

159

r = crtc->gamma_store;

drivers/gpu/drm/radeon/radeon_display.c

160

g = r + crtc->gamma_size;

drivers/gpu/drm/radeon/radeon_display.c

161

b = g + crtc->gamma_size;

drivers/gpu/drm/radeon/radeon_display.c

1691

bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc,

drivers/gpu/drm/radeon/radeon_display.c

1695

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/radeon/radeon_display.c

1698

struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/radeon_display.c

1709

if (encoder->crtc != crtc)

drivers/gpu/drm/radeon/radeon_display.c

1727

src_v = crtc->mode.vdisplay;

drivers/gpu/drm/radeon/radeon_display.c

1729

src_h = crtc->mode.hdisplay;

drivers/gpu/drm/radeon/radeon_display.c

1748

src_v = crtc->mode.vdisplay;

drivers/gpu/drm/radeon/radeon_display.c

1749

dst_v = crtc->mode.vdisplay - (radeon_crtc->v_border * 2);

drivers/gpu/drm/radeon/radeon_display.c

1750

src_h = crtc->mode.hdisplay;

drivers/gpu/drm/radeon/radeon_display.c

1751

dst_h = crtc->mode.hdisplay - (radeon_crtc->h_border * 2);

drivers/gpu/drm/radeon/radeon_display.c

194

static void legacy_crtc_load_lut(struct drm_crtc *crtc)

drivers/gpu/drm/radeon/radeon_display.c

196

struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/radeon_display.c

197

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/radeon/radeon_display.c

1994

radeon_get_crtc_scanout_position(struct drm_crtc *crtc,

drivers/gpu/drm/radeon/radeon_display.c

1999

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/radeon/radeon_display.c

2000

unsigned int pipe = crtc->index;

drivers/gpu/drm/radeon/radeon_display.c

211

r = crtc->gamma_store;

drivers/gpu/drm/radeon/radeon_display.c

212

g = r + crtc->gamma_size;

drivers/gpu/drm/radeon/radeon_display.c

213

b = g + crtc->gamma_size;

drivers/gpu/drm/radeon/radeon_display.c

222

void radeon_crtc_load_lut(struct drm_crtc *crtc)

drivers/gpu/drm/radeon/radeon_display.c

224

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/radeon/radeon_display.c

227

if (!crtc->enabled)

drivers/gpu/drm/radeon/radeon_display.c

231

dce5_crtc_load_lut(crtc);

drivers/gpu/drm/radeon/radeon_display.c

233

dce4_crtc_load_lut(crtc);

drivers/gpu/drm/radeon/radeon_display.c

235

avivo_crtc_load_lut(crtc);

drivers/gpu/drm/radeon/radeon_display.c

237

legacy_crtc_load_lut(crtc);

drivers/gpu/drm/radeon/radeon_display.c

240

static int radeon_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,

drivers/gpu/drm/radeon/radeon_display.c

244

radeon_crtc_load_lut(crtc);

drivers/gpu/drm/radeon/radeon_display.c

249

static void radeon_crtc_destroy(struct drm_crtc *crtc)

drivers/gpu/drm/radeon/radeon_display.c

251

struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/radeon_display.c

253

drm_crtc_cleanup(crtc);

drivers/gpu/drm/radeon/radeon_display.c

415

struct drm_crtc *crtc = &radeon_crtc->base;

drivers/gpu/drm/radeon/radeon_display.c

457

&crtc->hwmode)

drivers/gpu/drm/radeon/radeon_display.c

462

crtc->funcs->get_vblank_counter(crtc)) > 0)))

drivers/gpu/drm/radeon/radeon_display.c

466

spin_lock_irqsave(&crtc->dev->event_lock, flags);

drivers/gpu/drm/radeon/radeon_display.c

475

spin_unlock_irqrestore(&crtc->dev->event_lock, flags);

drivers/gpu/drm/radeon/radeon_display.c

479

static int radeon_crtc_page_flip_target(struct drm_crtc *crtc,

drivers/gpu/drm/radeon/radeon_display.c

486

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/radeon/radeon_display.c

488

struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/radeon_display.c

50

static void avivo_crtc_load_lut(struct drm_crtc *crtc)

drivers/gpu/drm/radeon/radeon_display.c

510

obj = crtc->primary->fb->obj[0];

drivers/gpu/drm/radeon/radeon_display.c

52

struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/radeon_display.c

53

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/radeon/radeon_display.c

557

int tile_addr = (((crtc->y >> 3) * pitch_pixels + crtc->x) >> (8 - byteshift)) << 11;

drivers/gpu/drm/radeon/radeon_display.c

558

base += tile_addr + ((crtc->x << byteshift) % 256) + ((crtc->y % 8) << 8);

drivers/gpu/drm/radeon/radeon_display.c

561

int offset = crtc->y * pitch_pixels + crtc->x;

drivers/gpu/drm/radeon/radeon_display.c

583

work->target_vblank = target - (uint32_t)drm_crtc_vblank_count(crtc) +

drivers/gpu/drm/radeon/radeon_display.c

584

crtc->funcs->get_vblank_counter(crtc);

drivers/gpu/drm/radeon/radeon_display.c

587

spin_lock_irqsave(&crtc->dev->event_lock, flags);

drivers/gpu/drm/radeon/radeon_display.c

591

spin_unlock_irqrestore(&crtc->dev->event_lock, flags);

drivers/gpu/drm/radeon/radeon_display.c

599

crtc->primary->fb = fb;

drivers/gpu/drm/radeon/radeon_display.c

601

spin_unlock_irqrestore(&crtc->dev->event_lock, flags);

drivers/gpu/drm/radeon/radeon_display.c

627

struct drm_crtc *crtc;

drivers/gpu/drm/radeon/radeon_display.c

631

if (!set || !set->crtc)

drivers/gpu/drm/radeon/radeon_display.c

634

dev = set->crtc->dev;

drivers/gpu/drm/radeon/radeon_display.c

644

list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)

drivers/gpu/drm/radeon/radeon_display.c

645

if (crtc->enabled)

drivers/gpu/drm/radeon/radeon_display.c

74

r = crtc->gamma_store;

drivers/gpu/drm/radeon/radeon_display.c

75

g = r + crtc->gamma_size;

drivers/gpu/drm/radeon/radeon_display.c

76

b = g + crtc->gamma_size;

drivers/gpu/drm/radeon/radeon_display.c

88

static void dce4_crtc_load_lut(struct drm_crtc *crtc)

drivers/gpu/drm/radeon/radeon_display.c

90

struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/radeon_display.c

91

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/radeon/radeon_drv.c

476

struct drm_crtc *crtc;

drivers/gpu/drm/radeon/radeon_drv.c

483

list_for_each_entry(crtc, &drm_dev->mode_config.crtc_list, head) {

drivers/gpu/drm/radeon/radeon_drv.c

484

if (crtc->enabled) {

drivers/gpu/drm/radeon/radeon_irq_kms.c

439

void radeon_irq_kms_pflip_irq_get(struct radeon_device *rdev, int crtc)

drivers/gpu/drm/radeon/radeon_irq_kms.c

443

if (crtc < 0 || crtc >= rdev->num_crtc)

drivers/gpu/drm/radeon/radeon_irq_kms.c

449

if (atomic_inc_return(&rdev->irq.pflip[crtc]) == 1) {

drivers/gpu/drm/radeon/radeon_irq_kms.c

465

void radeon_irq_kms_pflip_irq_put(struct radeon_device *rdev, int crtc)

drivers/gpu/drm/radeon/radeon_irq_kms.c

469

if (crtc < 0 || crtc >= rdev->num_crtc)

drivers/gpu/drm/radeon/radeon_irq_kms.c

475

if (atomic_dec_and_test(&rdev->irq.pflip[crtc])) {

drivers/gpu/drm/radeon/radeon_kms.c

237

struct drm_crtc *crtc;

drivers/gpu/drm/radeon/radeon_kms.c

267

crtc = (struct drm_crtc *)minfo->crtcs[i];

drivers/gpu/drm/radeon/radeon_kms.c

268

if (crtc && crtc->base.id == *value) {

drivers/gpu/drm/radeon/radeon_kms.c

269

struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/radeon_kms.c

750

u32 radeon_get_vblank_counter_kms(struct drm_crtc *crtc)

drivers/gpu/drm/radeon/radeon_kms.c

752

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/radeon/radeon_kms.c

753

unsigned int pipe = crtc->index;

drivers/gpu/drm/radeon/radeon_kms.c

820

int radeon_enable_vblank_kms(struct drm_crtc *crtc)

drivers/gpu/drm/radeon/radeon_kms.c

822

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/radeon/radeon_kms.c

823

unsigned int pipe = crtc->index;

drivers/gpu/drm/radeon/radeon_kms.c

847

void radeon_disable_vblank_kms(struct drm_crtc *crtc)

drivers/gpu/drm/radeon/radeon_kms.c

849

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/radeon/radeon_kms.c

850

unsigned int pipe = crtc->index;

drivers/gpu/drm/radeon/radeon_kms.h

31

u32 radeon_get_vblank_counter_kms(struct drm_crtc *crtc);

drivers/gpu/drm/radeon/radeon_kms.h

32

int radeon_enable_vblank_kms(struct drm_crtc *crtc);

drivers/gpu/drm/radeon/radeon_kms.h

33

void radeon_disable_vblank_kms(struct drm_crtc *crtc);

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

1016

static bool radeon_crtc_mode_fixup(struct drm_crtc *crtc,

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

1020

if (!radeon_crtc_scaling_mode_fixup(crtc, mode, adjusted_mode))

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

1025

static int radeon_crtc_mode_set(struct drm_crtc *crtc,

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

1030

struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

1033

radeon_crtc_set_base(crtc, x, y, old_fb);

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

1034

radeon_set_crtc_timing(crtc, adjusted_mode);

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

1035

radeon_set_pll(crtc, adjusted_mode);

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

1036

radeon_overscan_setup(crtc, adjusted_mode);

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

1038

radeon_legacy_rmx_mode_set(crtc, adjusted_mode);

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

1047

radeon_cursor_reset(crtc);

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

1051

static void radeon_crtc_prepare(struct drm_crtc *crtc)

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

1053

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

1064

static void radeon_crtc_commit(struct drm_crtc *crtc)

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

1066

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

1078

static void radeon_crtc_disable(struct drm_crtc *crtc)

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

1080

radeon_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

1081

if (crtc->primary->fb) {

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

1085

rbo = gem_to_radeon_bo(crtc->primary->fb->obj[0]);

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

297

static void radeon_crtc_dpms(struct drm_crtc *crtc, int mode)

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

299

struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

300

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

338

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

339

radeon_crtc_load_lut(crtc);

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

345

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

360

int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

363

return radeon_crtc_do_set_base(crtc, old_fb, x, y);

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

366

int radeon_crtc_do_set_base(struct drm_crtc *crtc,

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

37

static void radeon_overscan_setup(struct drm_crtc *crtc,

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

370

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

372

struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

386

if (!crtc->primary->fb) {

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

391

target_fb = crtc->primary->fb;

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

40

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

42

struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

438

if (fb && fb != crtc->primary->fb) {

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

49

static void radeon_legacy_rmx_mode_set(struct drm_crtc *crtc,

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

52

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

54

struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

548

if (fb && fb != crtc->primary->fb) {

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

563

static bool radeon_set_crtc_timing(struct drm_crtc *crtc, struct drm_display_mode *mode)

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

565

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

567

struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

568

const struct drm_framebuffer *fb = crtc->primary->fb;

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

582

if (encoder->crtc == crtc) {

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

723

static void radeon_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

725

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

727

struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

776

if (encoder->crtc == crtc) {

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1151

struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1536

struct drm_crtc *crtc;

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1539

list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1540

struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1541

if ((radeon_crtc->crtc_id == 1) && crtc->enabled) {

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1542

if (encoder->crtc != crtc) {

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

192

struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

583

struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

780

struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

945

struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);

drivers/gpu/drm/radeon/radeon_legacy_tv.c

246

radeon_crtc = to_radeon_crtc(radeon_encoder->base.crtc);

drivers/gpu/drm/radeon/radeon_legacy_tv.c

549

radeon_crtc = to_radeon_crtc(encoder->crtc);

drivers/gpu/drm/radeon/radeon_mode.h

804

extern void radeon_crtc_load_lut(struct drm_crtc *crtc);

drivers/gpu/drm/radeon/radeon_mode.h

805

extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,

drivers/gpu/drm/radeon/radeon_mode.h

807

extern int atombios_crtc_mode_set(struct drm_crtc *crtc,

drivers/gpu/drm/radeon/radeon_mode.h

812

extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode);

drivers/gpu/drm/radeon/radeon_mode.h

814

extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,

drivers/gpu/drm/radeon/radeon_mode.h

816

extern int radeon_crtc_do_set_base(struct drm_crtc *crtc,

drivers/gpu/drm/radeon/radeon_mode.h

819

extern int radeon_crtc_cursor_set2(struct drm_crtc *crtc,

drivers/gpu/drm/radeon/radeon_mode.h

826

extern int radeon_crtc_cursor_move(struct drm_crtc *crtc,

drivers/gpu/drm/radeon/radeon_mode.h

828

extern void radeon_cursor_reset(struct drm_crtc *crtc);

drivers/gpu/drm/radeon/radeon_mode.h

836

radeon_get_crtc_scanout_position(struct drm_crtc *crtc, bool in_vblank_irq,

drivers/gpu/drm/radeon/radeon_mode.h

877

radeon_atombios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);

drivers/gpu/drm/radeon/radeon_mode.h

881

radeon_combios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);

drivers/gpu/drm/radeon/radeon_mode.h

906

bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc,

drivers/gpu/drm/radeon/radeon_pm.c

1695

struct drm_crtc *crtc;

drivers/gpu/drm/radeon/radeon_pm.c

1706

list_for_each_entry(crtc,

drivers/gpu/drm/radeon/radeon_pm.c

1708

radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/radeon_pm.c

1768

struct drm_crtc *crtc;

drivers/gpu/drm/radeon/radeon_pm.c

1782

list_for_each_entry(crtc,

drivers/gpu/drm/radeon/radeon_pm.c

1784

radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/radeon_pm.c

1785

if (crtc->enabled) {

drivers/gpu/drm/radeon/radeon_pm.c

1820

int crtc, vpos, hpos, vbl_status;

drivers/gpu/drm/radeon/radeon_pm.c

1826

for (crtc = 0; (crtc < rdev->num_crtc) && in_vbl; crtc++) {

drivers/gpu/drm/radeon/radeon_pm.c

1827

if (rdev->pm.active_crtcs & (1 << crtc)) {

drivers/gpu/drm/radeon/radeon_pm.c

1829

crtc,

drivers/gpu/drm/radeon/radeon_pm.c

1832

&rdev->mode_info.crtcs[crtc]->base.hwmode);

drivers/gpu/drm/radeon/radeon_pm.c

255

struct drm_crtc *crtc;

drivers/gpu/drm/radeon/radeon_pm.c

285

drm_for_each_crtc(crtc, rdev_to_drm(rdev)) {

drivers/gpu/drm/radeon/radeon_pm.c

288

if (drm_crtc_vblank_get(crtc) == 0)

drivers/gpu/drm/radeon/radeon_pm.c

302

drm_for_each_crtc(crtc, rdev_to_drm(rdev)) {

drivers/gpu/drm/radeon/radeon_pm.c

305

drm_crtc_vblank_put(crtc);

drivers/gpu/drm/radeon/rs600.c

104

while (avivo_is_in_vblank(rdev, crtc)) {

drivers/gpu/drm/radeon/rs600.c

106

if (!avivo_is_counter_moving(rdev, crtc))

drivers/gpu/drm/radeon/rs600.c

111

while (!avivo_is_in_vblank(rdev, crtc)) {

drivers/gpu/drm/radeon/rs600.c

113

if (!avivo_is_counter_moving(rdev, crtc))

drivers/gpu/drm/radeon/rs600.c

325

struct drm_crtc *crtc;

drivers/gpu/drm/radeon/rs600.c

330

list_for_each_entry(crtc, &ddev->mode_config.crtc_list, head) {

drivers/gpu/drm/radeon/rs600.c

331

radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/rs600.c

343

struct drm_crtc *crtc;

drivers/gpu/drm/radeon/rs600.c

348

list_for_each_entry(crtc, &ddev->mode_config.crtc_list, head) {

drivers/gpu/drm/radeon/rs600.c

349

radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/rs600.c

62

static bool avivo_is_in_vblank(struct radeon_device *rdev, int crtc)

drivers/gpu/drm/radeon/rs600.c

64

if (RREG32(AVIVO_D1CRTC_STATUS + crtc_offsets[crtc]) & AVIVO_D1CRTC_V_BLANK)

drivers/gpu/drm/radeon/rs600.c

70

static bool avivo_is_counter_moving(struct radeon_device *rdev, int crtc)

drivers/gpu/drm/radeon/rs600.c

74

pos1 = RREG32(AVIVO_D1CRTC_STATUS_POSITION + crtc_offsets[crtc]);

drivers/gpu/drm/radeon/rs600.c

75

pos2 = RREG32(AVIVO_D1CRTC_STATUS_POSITION + crtc_offsets[crtc]);

drivers/gpu/drm/radeon/rs600.c

851

u32 rs600_get_vblank_counter(struct radeon_device *rdev, int crtc)

drivers/gpu/drm/radeon/rs600.c

853

if (crtc == 0)

drivers/gpu/drm/radeon/rs600.c

91

void avivo_wait_for_vblank(struct radeon_device *rdev, int crtc)

drivers/gpu/drm/radeon/rs600.c

95

if (crtc >= rdev->num_crtc)

drivers/gpu/drm/radeon/rs600.c

98

if (!(RREG32(AVIVO_D1CRTC_CONTROL + crtc_offsets[crtc]) & AVIVO_CRTC_EN))

drivers/gpu/drm/radeon/rs690.c

273

struct radeon_crtc *crtc,

drivers/gpu/drm/radeon/rs690.c

277

struct drm_display_mode *mode = &crtc->base.mode;

drivers/gpu/drm/radeon/rs690.c

284

if (!crtc->base.enabled) {

drivers/gpu/drm/radeon/rs690.c

305

if (crtc->vsc.full > dfixed_const(2))

drivers/gpu/drm/radeon/rs690.c

331

if (crtc->rmx_type != RMX_OFF) {

drivers/gpu/drm/radeon/rs690.c

333

if (crtc->vsc.full > b.full)

drivers/gpu/drm/radeon/rs690.c

334

b.full = crtc->vsc.full;

drivers/gpu/drm/radeon/rs690.c

335

b.full = dfixed_mul(b, crtc->hsc);

drivers/gpu/drm/radeon/rs690.c

351

a.full = dfixed_const(crtc->base.mode.crtc_htotal);

drivers/gpu/drm/radeon/rs690.c

359

a.full = dfixed_const(crtc->base.mode.crtc_htotal);

drivers/gpu/drm/radeon/rs690.c

360

b.full = dfixed_const(crtc->base.mode.crtc_hdisplay);

drivers/gpu/drm/radeon/rs690.c

443

wm->priority_mark_max.full = dfixed_const(crtc->base.mode.crtc_hdisplay);

drivers/gpu/drm/radeon/rs690.c

450

if (dfixed_trunc(estimated_width) > crtc->base.mode.crtc_hdisplay) {

drivers/gpu/drm/radeon/rs780_dpm.c

53

struct drm_crtc *crtc;

drivers/gpu/drm/radeon/rs780_dpm.c

62

crtc = (struct drm_crtc *)minfo->crtcs[i];

drivers/gpu/drm/radeon/rs780_dpm.c

63

if (crtc && crtc->enabled) {

drivers/gpu/drm/radeon/rs780_dpm.c

64

radeon_crtc = to_radeon_crtc(crtc);

drivers/gpu/drm/radeon/rs780_dpm.c

66

if (crtc->mode.htotal && crtc->mode.vtotal)

drivers/gpu/drm/radeon/rs780_dpm.c

67

pi->refresh_rate = drm_mode_vrefresh(&crtc->mode);

drivers/gpu/drm/radeon/rv515.c

1007

a.full = dfixed_const(crtc->base.mode.crtc_htotal);

drivers/gpu/drm/radeon/rv515.c

1008

b.full = dfixed_const(crtc->base.mode.crtc_hdisplay);

drivers/gpu/drm/radeon/rv515.c

1062

wm->priority_mark_max.full = dfixed_const(crtc->base.mode.crtc_hdisplay);

drivers/gpu/drm/radeon/rv515.c

1069

if (dfixed_trunc(estimated_width) > crtc->base.mode.crtc_hdisplay) {

drivers/gpu/drm/radeon/rv515.c

680

void atom_rv515_force_tv_scaler(struct radeon_device *rdev, struct radeon_crtc *crtc)

drivers/gpu/drm/radeon/rv515.c

682

int index_reg = 0x6578 + crtc->crtc_offset;

drivers/gpu/drm/radeon/rv515.c

683

int data_reg = 0x657c + crtc->crtc_offset;

drivers/gpu/drm/radeon/rv515.c

685

WREG32(0x659C + crtc->crtc_offset, 0x0);

drivers/gpu/drm/radeon/rv515.c

686

WREG32(0x6594 + crtc->crtc_offset, 0x705);

drivers/gpu/drm/radeon/rv515.c

687

WREG32(0x65A4 + crtc->crtc_offset, 0x10001);

drivers/gpu/drm/radeon/rv515.c

688

WREG32(0x65D8 + crtc->crtc_offset, 0x0);

drivers/gpu/drm/radeon/rv515.c

689

WREG32(0x65B0 + crtc->crtc_offset, 0x0);

drivers/gpu/drm/radeon/rv515.c

690

WREG32(0x65C0 + crtc->crtc_offset, 0x0);

drivers/gpu/drm/radeon/rv515.c

691

WREG32(0x65D4 + crtc->crtc_offset, 0x0);

drivers/gpu/drm/radeon/rv515.c

924

struct radeon_crtc *crtc,

drivers/gpu/drm/radeon/rv515.c

928

struct drm_display_mode *mode = &crtc->base.mode;

drivers/gpu/drm/radeon/rv515.c

935

if (!crtc->base.enabled) {

drivers/gpu/drm/radeon/rv515.c

953

if (crtc->vsc.full > dfixed_const(2))

drivers/gpu/drm/radeon/rv515.c

979

if (crtc->rmx_type != RMX_OFF) {

drivers/gpu/drm/radeon/rv515.c

981

if (crtc->vsc.full > b.full)

drivers/gpu/drm/radeon/rv515.c

982

b.full = crtc->vsc.full;

drivers/gpu/drm/radeon/rv515.c

983

b.full = dfixed_mul(b, crtc->hsc);

drivers/gpu/drm/radeon/rv515.c

999

a.full = dfixed_const(crtc->base.mode.crtc_htotal);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

1000

static void rcar_du_crtc_reset(struct drm_crtc *crtc)

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

1004

if (crtc->state) {

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

1005

rcar_du_crtc_atomic_destroy_state(crtc, crtc->state);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

1006

crtc->state = NULL;

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

1016

__drm_atomic_helper_crtc_reset(crtc, &state->state);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

1019

static int rcar_du_crtc_enable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

1021

struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

1030

static void rcar_du_crtc_disable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

1032

struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

1075

static int rcar_du_crtc_verify_crc_source(struct drm_crtc *crtc,

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

1079

struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

1092

rcar_du_crtc_get_crc_sources(struct drm_crtc *crtc, size_t *count)

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

1094

struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

1100

static int rcar_du_crtc_set_crc_source(struct drm_crtc *crtc,

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

1103

struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

1120

state = drm_atomic_state_alloc(crtc->dev);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

1129

crtc_state = drm_atomic_get_crtc_state(state, crtc);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

1214

drm_crtc_handle_vblank(&rcrtc->crtc);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

1238

struct drm_crtc *crtc = &rcrtc->crtc;

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

1295

ret = drm_crtc_init_with_planes(&rcdu->ddev, crtc, primary, NULL,

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

1307

drm_mode_crtc_set_gamma_size(crtc, CM2_LUT_SIZE);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

1308

drm_crtc_enable_color_mgmt(crtc, 0, false, CM2_LUT_SIZE);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

1311

drm_crtc_helper_add(crtc, &crtc_helper_funcs);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

209

const struct drm_display_mode *mode = &rcrtc->crtc.state->adjusted_mode;

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

356

if (plane->plane.state->crtc != &rcrtc->crtc ||

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

440

struct drm_device *dev = rcrtc->crtc.dev;

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

452

drm_crtc_send_vblank_event(&rcrtc->crtc, event);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

456

drm_crtc_vblank_put(&rcrtc->crtc);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

461

struct drm_device *dev = rcrtc->crtc.dev;

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

490

static int rcar_du_cmm_check(struct drm_crtc *crtc,

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

494

struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

510

static void rcar_du_cmm_setup(struct drm_crtc *crtc)

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

512

struct drm_property_blob *drm_lut = crtc->state->gamma_lut;

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

513

struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

547

drm_crtc_vblank_on(&rcrtc->crtc);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

604

interlaced = rcrtc->crtc.mode.flags & DRM_MODE_FLAG_INTERLACE;

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

615

struct drm_crtc *crtc = &rcrtc->crtc;

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

619

drm_crtc_vblank_get(crtc);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

638

drm_crtc_vblank_put(crtc);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

643

struct drm_crtc *crtc = &rcrtc->crtc;

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

664

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

691

static int rcar_du_crtc_atomic_check(struct drm_crtc *crtc,

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

695

crtc);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

700

ret = rcar_du_cmm_check(crtc, crtc_state);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

707

drm_for_each_encoder_mask(encoder, crtc->dev,

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

722

static void rcar_du_crtc_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

725

struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

726

struct rcar_du_crtc_state *rstate = to_rcar_crtc_state(crtc->state);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

743

&crtc->state->adjusted_mode;

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

767

rcar_du_cmm_setup(crtc);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

770

static void rcar_du_crtc_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

774

crtc);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

775

struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

806

spin_lock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

807

if (crtc->state->event) {

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

808

drm_crtc_send_vblank_event(crtc, crtc->state->event);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

809

crtc->state->event = NULL;

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

811

spin_unlock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

814

static void rcar_du_crtc_atomic_begin(struct drm_crtc *crtc,

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

817

struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

819

WARN_ON(!crtc->state->enable);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

836

if (crtc->state->color_mgmt_changed && !crtc->state->active_changed)

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

837

rcar_du_cmm_setup(crtc);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

843

static void rcar_du_crtc_atomic_flush(struct drm_crtc *crtc,

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

846

struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

847

struct drm_device *dev = rcrtc->crtc.dev;

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

852

if (crtc->state->event) {

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

853

WARN_ON(drm_crtc_vblank_get(crtc) != 0);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

856

rcrtc->event = crtc->state->event;

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

857

crtc->state->event = NULL;

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

866

rcar_du_crtc_mode_valid(struct drm_crtc *crtc,

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

869

struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

966

rcar_du_crtc_atomic_duplicate_state(struct drm_crtc *crtc)

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

971

if (WARN_ON(!crtc->state))

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

974

state = to_rcar_crtc_state(crtc->state);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

979

__drm_atomic_helper_crtc_duplicate_state(crtc, &copy->state);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

984

static void rcar_du_crtc_atomic_destroy_state(struct drm_crtc *crtc,

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

991

static void rcar_du_crtc_cleanup(struct drm_crtc *crtc)

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

993

struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

997

drm_crtc_cleanup(crtc);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.h

48

struct drm_crtc crtc;

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.h

78

#define to_rcar_crtc(c) container_of(c, struct rcar_du_crtc, crtc)

drivers/gpu/drm/renesas/rcar-du/rcar_du_group.c

297

struct rcar_du_crtc *crtc;

drivers/gpu/drm/renesas/rcar-du/rcar_du_group.c

313

crtc = &rcdu->crtcs[index * 2];

drivers/gpu/drm/renesas/rcar-du/rcar_du_group.c

315

ret = clk_prepare_enable(crtc->clock);

drivers/gpu/drm/renesas/rcar-du/rcar_du_group.c

321

clk_disable_unprepare(crtc->clock);

drivers/gpu/drm/renesas/rcar-du/rcar_du_group.c

358

rstate = to_rcar_crtc_state(rcrtc->crtc.state);

drivers/gpu/drm/renesas/rcar-du/rcar_du_kms.c

525

struct drm_crtc *crtc;

drivers/gpu/drm/renesas/rcar-du/rcar_du_kms.c

534

for_each_new_crtc_in_state(old_state, crtc, crtc_state, i) {

drivers/gpu/drm/renesas/rcar-du/rcar_du_kms.c

537

struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

282

crtc_planes = to_rcar_crtc(new_plane_state->state.crtc)->index % 2

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

339

interlaced = state->state.crtc->state->adjusted_mode.flags

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

600

if (!state->crtc) {

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

611

crtc_state = drm_atomic_get_crtc_state(state->state, state->crtc);

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

102

void rcar_du_vsp_atomic_flush(struct rcar_du_crtc *crtc)

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

107

state = to_rcar_crtc_state(crtc->crtc.state);

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

110

rcar_du_writeback_setup(crtc, &cfg.writeback);

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

112

vsp1_du_atomic_flush(crtc->vsp->vsp, crtc->vsp_pipe, &cfg);

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

223

struct rcar_du_crtc *crtc = to_rcar_crtc(state->state.crtc);

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

254

vsp1_du_atomic_update(plane->vsp->vsp, crtc->vsp_pipe,

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

383

struct rcar_du_crtc *crtc = to_rcar_crtc(old_state->crtc);

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

387

else if (old_state->crtc)

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

388

vsp1_du_atomic_update(rplane->vsp->vsp, crtc->vsp_pipe,

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

39

struct rcar_du_crtc *crtc = private;

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

41

if (crtc->vblank_enable)

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

42

drm_crtc_handle_vblank(&crtc->crtc);

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

45

rcar_du_crtc_finish_page_flip(crtc);

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

47

rcar_du_writeback_complete(crtc);

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

49

drm_crtc_add_crc_entry(&crtc->crtc, false, 0, &crc);

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

52

void rcar_du_vsp_enable(struct rcar_du_crtc *crtc)

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

54

const struct drm_display_mode *mode = &crtc->crtc.state->adjusted_mode;

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

55

struct rcar_du_device *rcdu = crtc->dev;

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

61

.callback_data = crtc,

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

66

.crtc = &crtc->crtc,

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

83

state.hwindex = (crtc->index % 2) ? 2 : 0;

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

85

state.hwindex = crtc->index % 2;

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

87

__rcar_du_plane_setup(crtc->group, &state);

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

89

vsp1_du_setup_lif(crtc->vsp->vsp, crtc->vsp_pipe, &cfg);

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

92

void rcar_du_vsp_disable(struct rcar_du_crtc *crtc)

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

94

vsp1_du_setup_lif(crtc->vsp->vsp, crtc->vsp_pipe, NULL);

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

97

void rcar_du_vsp_atomic_begin(struct rcar_du_crtc *crtc)

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

99

vsp1_du_atomic_begin(crtc->vsp->vsp, crtc->vsp_pipe);

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.h

61

void rcar_du_vsp_enable(struct rcar_du_crtc *crtc);

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.h

62

void rcar_du_vsp_disable(struct rcar_du_crtc *crtc);

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.h

63

void rcar_du_vsp_atomic_begin(struct rcar_du_crtc *crtc);

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.h

64

void rcar_du_vsp_atomic_flush(struct rcar_du_crtc *crtc);

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.h

76

static inline void rcar_du_vsp_enable(struct rcar_du_crtc *crtc) { };

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.h

77

static inline void rcar_du_vsp_disable(struct rcar_du_crtc *crtc) { };

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.h

78

static inline void rcar_du_vsp_atomic_begin(struct rcar_du_crtc *crtc) { };

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.h

79

static inline void rcar_du_vsp_atomic_flush(struct rcar_du_crtc *crtc) { };

drivers/gpu/drm/renesas/rcar-du/rcar_du_writeback.c

213

1 << drm_crtc_index(&rcrtc->crtc));

drivers/gpu/drm/renesas/rcar-du/rcar_lvds.c

355

struct drm_crtc *crtc,

drivers/gpu/drm/renesas/rcar-du/rcar_lvds.c

369

rcar_lvds_enable(lvds->companion, state, crtc, connector);

drivers/gpu/drm/renesas/rcar-du/rcar_lvds.c

430

drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/renesas/rcar-du/rcar_lvds.c

441

if (drm_crtc_index(crtc) == 2)

drivers/gpu/drm/renesas/rcar-du/rcar_lvds.c

588

struct drm_crtc *crtc;

drivers/gpu/drm/renesas/rcar-du/rcar_lvds.c

592

crtc = drm_atomic_get_new_connector_state(state, connector)->crtc;

drivers/gpu/drm/renesas/rcar-du/rcar_lvds.c

594

rcar_lvds_enable(bridge, state, crtc, connector);

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c

853

struct drm_crtc *crtc;

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c

858

crtc = drm_atomic_get_new_connector_state(state, connector)->crtc;

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c

859

mode = &drm_atomic_get_new_crtc_state(state, crtc)->adjusted_mode;

drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c

110

struct drm_device *dev = rcrtc->crtc.dev;

drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c

122

drm_crtc_send_vblank_event(&rcrtc->crtc, event);

drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c

126

drm_crtc_vblank_put(&rcrtc->crtc);

drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c

131

struct drm_device *dev = rcrtc->crtc.dev;

drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c

169

drm_crtc_vblank_on(&rcrtc->crtc);

drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c

231

struct drm_crtc *crtc = &rcrtc->crtc;

drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c

239

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c

251

static void rzg2l_du_crtc_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c

254

struct rzg2l_du_crtc *rcrtc = to_rzg2l_crtc(crtc);

drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c

261

static void rzg2l_du_crtc_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c

264

struct rzg2l_du_crtc *rcrtc = to_rzg2l_crtc(crtc);

drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c

269

spin_lock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c

270

if (crtc->state->event) {

drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c

271

drm_crtc_send_vblank_event(crtc, crtc->state->event);

drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c

272

crtc->state->event = NULL;

drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c

274

spin_unlock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c

277

static void rzg2l_du_crtc_atomic_flush(struct drm_crtc *crtc,

drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c

280

struct rzg2l_du_crtc *rcrtc = to_rzg2l_crtc(crtc);

drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c

281

struct drm_device *dev = rcrtc->crtc.dev;

drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c

284

WARN_ON(!crtc->state->enable);

drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c

286

if (crtc->state->event) {

drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c

287

WARN_ON(drm_crtc_vblank_get(crtc) != 0);

drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c

290

rcrtc->event = crtc->state->event;

drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c

291

crtc->state->event = NULL;

drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c

305

rzg2l_du_crtc_atomic_duplicate_state(struct drm_crtc *crtc)

drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c

310

if (WARN_ON(!crtc->state))

drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c

313

state = to_rzg2l_crtc_state(crtc->state);

drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c

318

__drm_atomic_helper_crtc_duplicate_state(crtc, &copy->state);

drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c

323

static void rzg2l_du_crtc_atomic_destroy_state(struct drm_crtc *crtc,

drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c

330

static void rzg2l_du_crtc_reset(struct drm_crtc *crtc)

drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c

334

if (crtc->state) {

drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c

335

rzg2l_du_crtc_atomic_destroy_state(crtc, crtc->state);

drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c

336

crtc->state = NULL;

drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c

343

__drm_atomic_helper_crtc_reset(crtc, &state->state);

drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c

346

static int rzg2l_du_crtc_enable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c

348

struct rzg2l_du_crtc *rcrtc = to_rzg2l_crtc(crtc);

drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c

355

static void rzg2l_du_crtc_disable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c

357

struct rzg2l_du_crtc *rcrtc = to_rzg2l_crtc(crtc);

drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c

379

struct drm_crtc *crtc = &rcrtc->crtc;

drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c

414

ret = drmm_crtc_init_with_planes(&rcdu->ddev, crtc, primary, NULL,

drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c

419

drm_crtc_helper_add(crtc, &crtc_helper_funcs);

drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c

66

const struct drm_display_mode *mode = &rcrtc->crtc.state->adjusted_mode;

drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.h

42

struct drm_crtc crtc;

drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.h

67

return container_of(c, struct rzg2l_du_crtc, crtc);

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

121

struct rzg2l_du_crtc *crtc = to_rzg2l_crtc(state->state.crtc);

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

171

vsp1_du_atomic_update(plane->vsp->vsp, crtc->vsp_pipe,

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

182

if (!state->crtc) {

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

193

crtc_state = drm_atomic_get_crtc_state(state->state, state->crtc);

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

230

struct rzg2l_du_crtc *crtc = to_rzg2l_crtc(old_state->crtc);

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

234

else if (old_state->crtc)

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

235

vsp1_du_atomic_update(rplane->vsp->vsp, crtc->vsp_pipe,

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

36

struct rzg2l_du_crtc *crtc = private;

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

38

if (crtc->vblank_enable)

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

39

drm_crtc_handle_vblank(&crtc->crtc);

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

42

rzg2l_du_crtc_finish_page_flip(crtc);

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

44

drm_crtc_add_crc_entry(&crtc->crtc, false, 0, &crc);

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

47

void rzg2l_du_vsp_enable(struct rzg2l_du_crtc *crtc)

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

49

const struct drm_display_mode *mode = &crtc->crtc.state->adjusted_mode;

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

55

.callback_data = crtc,

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

58

vsp1_du_setup_lif(crtc->vsp->vsp, crtc->vsp_pipe, &cfg);

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

61

void rzg2l_du_vsp_disable(struct rzg2l_du_crtc *crtc)

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

63

vsp1_du_setup_lif(crtc->vsp->vsp, crtc->vsp_pipe, NULL);

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

66

void rzg2l_du_vsp_atomic_flush(struct rzg2l_du_crtc *crtc)

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

70

vsp1_du_atomic_flush(crtc->vsp->vsp, crtc->vsp_pipe, &cfg);

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

73

struct drm_plane *rzg2l_du_vsp_get_drm_plane(struct rzg2l_du_crtc *crtc,

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

76

struct rzg2l_du_device *rcdu = crtc->vsp->dev;

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.h

60

void rzg2l_du_vsp_enable(struct rzg2l_du_crtc *crtc);

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.h

61

void rzg2l_du_vsp_disable(struct rzg2l_du_crtc *crtc);

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.h

62

void rzg2l_du_vsp_atomic_flush(struct rzg2l_du_crtc *crtc);

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.h

63

struct drm_plane *rzg2l_du_vsp_get_drm_plane(struct rzg2l_du_crtc *crtc,

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.h

72

static inline void rzg2l_du_vsp_enable(struct rzg2l_du_crtc *crtc) { };

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.h

73

static inline void rzg2l_du_vsp_disable(struct rzg2l_du_crtc *crtc) { };

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.h

74

static inline void rzg2l_du_vsp_atomic_flush(struct rzg2l_du_crtc *crtc) { };

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.h

75

static inline struct drm_plane *rzg2l_du_vsp_get_drm_plane(struct rzg2l_du_crtc *crtc,

drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c

1028

struct drm_crtc *crtc;

drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c

1032

crtc = drm_atomic_get_new_connector_state(state, connector)->crtc;

drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c

1033

mode = &drm_atomic_get_new_crtc_state(state, crtc)->adjusted_mode;

drivers/gpu/drm/renesas/shmobile/shmob_drm_crtc.c

112

struct drm_crtc *crtc = &scrtc->base;

drivers/gpu/drm/renesas/shmobile/shmob_drm_crtc.c

113

struct shmob_drm_device *sdev = to_shmob_device(crtc->dev);

drivers/gpu/drm/renesas/shmobile/shmob_drm_crtc.c

115

const struct drm_display_mode *mode = &crtc->mode;

drivers/gpu/drm/renesas/shmobile/shmob_drm_crtc.c

195

static inline struct shmob_drm_crtc *to_shmob_crtc(struct drm_crtc *crtc)

drivers/gpu/drm/renesas/shmobile/shmob_drm_crtc.c

197

return container_of(crtc, struct shmob_drm_crtc, base);

drivers/gpu/drm/renesas/shmobile/shmob_drm_crtc.c

200

static void shmob_drm_crtc_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/renesas/shmobile/shmob_drm_crtc.c

203

struct shmob_drm_crtc *scrtc = to_shmob_crtc(crtc);

drivers/gpu/drm/renesas/shmobile/shmob_drm_crtc.c

204

struct shmob_drm_device *sdev = to_shmob_device(crtc->dev);

drivers/gpu/drm/renesas/shmobile/shmob_drm_crtc.c

255

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/renesas/shmobile/shmob_drm_crtc.c

258

static void shmob_drm_crtc_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/renesas/shmobile/shmob_drm_crtc.c

261

struct shmob_drm_crtc *scrtc = to_shmob_crtc(crtc);

drivers/gpu/drm/renesas/shmobile/shmob_drm_crtc.c

262

struct shmob_drm_device *sdev = to_shmob_device(crtc->dev);

drivers/gpu/drm/renesas/shmobile/shmob_drm_crtc.c

270

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/renesas/shmobile/shmob_drm_crtc.c

281

static void shmob_drm_crtc_atomic_flush(struct drm_crtc *crtc,

drivers/gpu/drm/renesas/shmobile/shmob_drm_crtc.c

285

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/renesas/shmobile/shmob_drm_crtc.c

288

if (crtc->state->event) {

drivers/gpu/drm/renesas/shmobile/shmob_drm_crtc.c

290

event = crtc->state->event;

drivers/gpu/drm/renesas/shmobile/shmob_drm_crtc.c

291

crtc->state->event = NULL;

drivers/gpu/drm/renesas/shmobile/shmob_drm_crtc.c

292

drm_crtc_send_vblank_event(crtc, event);

drivers/gpu/drm/renesas/shmobile/shmob_drm_crtc.c

303

static int shmob_drm_crtc_page_flip(struct drm_crtc *crtc,

drivers/gpu/drm/renesas/shmobile/shmob_drm_crtc.c

309

struct shmob_drm_crtc *scrtc = to_shmob_crtc(crtc);

drivers/gpu/drm/renesas/shmobile/shmob_drm_crtc.c

320

drm_atomic_set_fb_for_plane(crtc->primary->state, fb);

drivers/gpu/drm/renesas/shmobile/shmob_drm_crtc.c

350

static int shmob_drm_enable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/renesas/shmobile/shmob_drm_crtc.c

352

struct shmob_drm_device *sdev = to_shmob_device(crtc->dev);

drivers/gpu/drm/renesas/shmobile/shmob_drm_crtc.c

359

static void shmob_drm_disable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/renesas/shmobile/shmob_drm_crtc.c

361

struct shmob_drm_device *sdev = to_shmob_device(crtc->dev);

drivers/gpu/drm/renesas/shmobile/shmob_drm_crtc.c

379

struct drm_crtc *crtc = &sdev->crtc.base;

drivers/gpu/drm/renesas/shmobile/shmob_drm_crtc.c

384

init_waitqueue_head(&sdev->crtc.flip_wait);

drivers/gpu/drm/renesas/shmobile/shmob_drm_crtc.c

396

ret = drm_crtc_init_with_planes(&sdev->ddev, crtc, primary, NULL,

drivers/gpu/drm/renesas/shmobile/shmob_drm_crtc.c

401

drm_crtc_helper_add(crtc, &crtc_helper_funcs);

drivers/gpu/drm/renesas/shmobile/shmob_drm_crtc.c

404

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/renesas/shmobile/shmob_drm_crtc.c

79

struct drm_crtc *crtc = &scrtc->base;

drivers/gpu/drm/renesas/shmobile/shmob_drm_crtc.c

80

struct shmob_drm_device *sdev = to_shmob_device(crtc->dev);

drivers/gpu/drm/renesas/shmobile/shmob_drm_drv.c

94

drm_crtc_handle_vblank(&sdev->crtc.base);

drivers/gpu/drm/renesas/shmobile/shmob_drm_drv.c

95

shmob_drm_crtc_finish_page_flip(&sdev->crtc);

drivers/gpu/drm/renesas/shmobile/shmob_drm_drv.h

42

struct shmob_drm_crtc crtc;

drivers/gpu/drm/renesas/shmobile/shmob_drm_plane.c

154

if (!new_plane_state->crtc) {

drivers/gpu/drm/renesas/shmobile/shmob_drm_plane.c

165

crtc_state = drm_atomic_get_crtc_state(state, new_plane_state->crtc);

drivers/gpu/drm/renesas/shmobile/shmob_drm_plane.c

216

if (!old_state->crtc)

drivers/gpu/drm/rockchip/analogix_dp-rockchip.c

217

return conn_state->crtc;

drivers/gpu/drm/rockchip/analogix_dp-rockchip.c

224

struct drm_crtc *crtc;

drivers/gpu/drm/rockchip/analogix_dp-rockchip.c

232

crtc = rockchip_dp_drm_get_new_crtc(encoder, state);

drivers/gpu/drm/rockchip/analogix_dp-rockchip.c

233

if (!crtc)

drivers/gpu/drm/rockchip/analogix_dp-rockchip.c

236

old_crtc_state = drm_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/rockchip/analogix_dp-rockchip.c

278

struct drm_crtc *crtc;

drivers/gpu/drm/rockchip/analogix_dp-rockchip.c

282

crtc = rockchip_dp_drm_get_new_crtc(encoder, state);

drivers/gpu/drm/rockchip/analogix_dp-rockchip.c

284

if (!crtc)

drivers/gpu/drm/rockchip/analogix_dp-rockchip.c

287

new_crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/rockchip/analogix_dp-rockchip.c

292

ret = rockchip_drm_wait_vact_end(crtc, PSR_WAIT_LINE_FLAG_TIMEOUT_MS);

drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c

121

struct drm_crtc *crtc = encoder->crtc;

drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c

126

if (!crtc || !crtc->state)

drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c

130

hdmi->ctrl_ops->enc_init(hdmi, to_rockchip_crtc_state(crtc->state));

drivers/gpu/drm/rockchip/rk3066_hdmi.c

331

new_crtc_state = drm_atomic_get_new_crtc_state(state, new_conn_state->crtc);

drivers/gpu/drm/rockchip/rk3066_hdmi.c

408

crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc);

drivers/gpu/drm/rockchip/rockchip_drm_drv.h

85

int rockchip_drm_wait_vact_end(struct drm_crtc *crtc, unsigned int mstimeout);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

107

#define to_vop(x) container_of(x, struct vop, crtc)

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1086

if (plane != new_plane_state->crtc->cursor)

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1096

new_plane_state->crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1100

crtc_state = plane->crtc->state;

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1112

struct vop *vop = to_vop(plane->state->crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1141

WARN_ON(drm_crtc_vblank_get(plane->state->crtc) != 0);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1166

static int vop_crtc_enable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1168

struct vop *vop = to_vop(crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1184

static void vop_crtc_disable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1186

struct vop *vop = to_vop(crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1199

static enum drm_mode_status vop_crtc_mode_valid(struct drm_crtc *crtc,

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1202

struct vop *vop = to_vop(crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1210

static bool vop_crtc_mode_fixup(struct drm_crtc *crtc,

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1214

struct vop *vop = to_vop(crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1262

static void vop_crtc_write_gamma_lut(struct vop *vop, struct drm_crtc *crtc)

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1264

struct drm_color_lut *lut = crtc->state->gamma_lut->data;

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1267

for (i = 0; i < crtc->gamma_size; i++) {

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1277

static void vop_crtc_gamma_set(struct vop *vop, struct drm_crtc *crtc,

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1280

struct drm_crtc_state *state = crtc->state;

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1320

vop_crtc_write_gamma_lut(vop, crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1344

static void vop_crtc_atomic_begin(struct drm_crtc *crtc,

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1348

crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1350

crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1351

struct vop *vop = to_vop(crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1359

vop_crtc_gamma_set(vop, crtc, old_crtc_state);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1362

static void vop_crtc_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1366

crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1367

struct vop *vop = to_vop(crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1369

struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc->state);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1370

struct drm_display_mode *adjusted_mode = &crtc->state->adjusted_mode;

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1386

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1387

rockchip_drm_set_win_enabled(crtc, true);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1395

ret = vop_enable(crtc, old_state);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

141

struct drm_crtc crtc;

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1487

if (crtc->state->gamma_lut)

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1488

vop_crtc_gamma_set(vop, crtc, old_state);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1517

static int vop_crtc_atomic_check(struct drm_crtc *crtc,

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1521

crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1522

struct vop *vop = to_vop(crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1533

if (len != crtc->gamma_size) {

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1535

len, crtc->gamma_size);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1564

static void vop_crtc_atomic_flush(struct drm_crtc *crtc,

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1568

crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1571

struct vop *vop = to_vop(crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1582

s = to_rockchip_crtc_state(crtc->state);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1599

spin_lock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1600

if (crtc->state->event) {

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1601

WARN_ON(drm_crtc_vblank_get(crtc) != 0);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1604

vop->event = crtc->state->event;

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1605

crtc->state->event = NULL;

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1607

spin_unlock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1618

WARN_ON(drm_crtc_vblank_get(crtc) != 0);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1634

static struct drm_crtc_state *vop_crtc_duplicate_state(struct drm_crtc *crtc)

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1638

if (WARN_ON(!crtc->state))

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1641

rockchip_state = kmemdup(to_rockchip_crtc_state(crtc->state),

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1646

__drm_atomic_helper_crtc_duplicate_state(crtc, &rockchip_state->base);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1650

static void vop_crtc_destroy_state(struct drm_crtc *crtc,

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1659

static void vop_crtc_reset(struct drm_crtc *crtc)

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1663

if (crtc->state)

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1664

vop_crtc_destroy_state(crtc, crtc->state);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1667

__drm_atomic_helper_crtc_reset(crtc, &crtc_state->base);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1669

__drm_atomic_helper_crtc_reset(crtc, NULL);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1690

static int vop_crtc_set_crc_source(struct drm_crtc *crtc,

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1693

struct vop *vop = to_vop(crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1712

vop_crtc_verify_crc_source(struct drm_crtc *crtc, const char *source_name,

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1723

static int vop_crtc_set_crc_source(struct drm_crtc *crtc,

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1730

vop_crtc_verify_crc_source(struct drm_crtc *crtc, const char *source_name,

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1755

drm_crtc_vblank_put(&vop->crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1762

struct drm_crtc *crtc = &vop->crtc;

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1766

drm_crtc_send_vblank_event(crtc, vop->event);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1767

drm_crtc_vblank_put(crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1779

struct drm_crtc *crtc = &vop->crtc;

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1825

drm_crtc_handle_vblank(crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1861

struct drm_crtc *crtc = &vop->crtc;

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1900

ret = drm_crtc_init_with_planes(drm_dev, crtc, primary, cursor,

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1905

drm_crtc_helper_add(crtc, &vop_crtc_helper_funcs);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1907

drm_mode_crtc_set_gamma_size(crtc, vop_data->lut_size);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1908

drm_crtc_enable_color_mgmt(crtc, 0, false, vop_data->lut_size);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1918

unsigned long possible_crtcs = drm_crtc_mask(crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1952

crtc->port = port;

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1954

ret = drm_self_refresh_helper_init(crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1958

crtc->name, ret);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1963

drm_crtc_cleanup(crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1973

struct drm_crtc *crtc = &vop->crtc;

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1977

drm_self_refresh_helper_cleanup(crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1979

of_node_put(crtc->port);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1997

drm_crtc_cleanup(crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

2144

int rockchip_drm_wait_vact_end(struct drm_crtc *crtc, unsigned int mstimeout)

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

2146

struct vop *vop = to_vop(crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

2150

if (!crtc || !vop->is_enabled)

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

2260

vop->rgb = rockchip_rgb_init(dev, &vop->crtc, vop->drm_dev, 0);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

620

static int vop_enable(struct drm_crtc *crtc, struct drm_crtc_state *old_state)

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

622

struct vop *vop = to_vop(crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

679

s = to_rockchip_crtc_state(crtc->state);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

698

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

711

static void rockchip_drm_set_win_enabled(struct drm_crtc *crtc, bool enabled)

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

713

struct vop *vop = to_vop(crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

730

static void vop_crtc_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

733

struct vop *vop = to_vop(crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

737

if (crtc->state->self_refresh_active) {

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

738

rockchip_drm_set_win_enabled(crtc, false);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

744

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

764

WARN(1, "%s: timed out waiting for DSP hold", crtc->name);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

782

if (crtc->state->event && !crtc->state->active) {

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

783

spin_lock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

784

drm_crtc_send_vblank_event(crtc, crtc->state->event);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

785

spin_unlock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

787

crtc->state->event = NULL;

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

816

struct drm_crtc *crtc = new_plane_state->crtc;

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

827

if (!crtc || WARN_ON(!fb))

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

830

crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

862

struct vop *vop = to_vop(crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

897

struct vop *vop = to_vop(old_state->crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

899

if (!old_state->crtc)

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

914

struct drm_crtc *crtc = new_state->crtc;

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

918

struct vop *vop = to_vop(new_state->crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

939

if (WARN_ON(!crtc))

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

960

dsp_stx = dest->x1 + crtc->mode.htotal - crtc->mode.hsync_start;

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

961

dsp_sty = dest->y1 + crtc->mode.vtotal - crtc->mode.vsync_start;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1001

if (!crtc)

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1004

vp = to_vop2_video_port(crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1008

cstate = drm_atomic_get_new_crtc_state(pstate->state, crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1097

if (old_pstate && !old_pstate->crtc)

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1158

struct drm_crtc *crtc = pstate->crtc;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1160

struct vop2_video_port *vp = to_vop2_video_port(crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1161

struct drm_display_mode *adjusted_mode = &crtc->state->adjusted_mode;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1190

if (WARN_ON(!crtc))

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1413

static int vop2_crtc_enable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1415

struct vop2_video_port *vp = to_vop2_video_port(crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1422

static void vop2_crtc_disable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1424

struct vop2_video_port *vp = to_vop2_video_port(crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1429

static enum drm_mode_status vop2_crtc_mode_valid(struct drm_crtc *crtc,

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1432

struct vop2_video_port *vp = to_vop2_video_port(crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1440

static bool vop2_crtc_mode_fixup(struct drm_crtc *crtc,

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1450

static void vop2_crtc_write_gamma_lut(struct vop2 *vop2, struct drm_crtc *crtc)

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1452

const struct vop2_video_port *vp = to_vop2_video_port(crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1454

struct drm_color_lut *lut = crtc->state->gamma_lut->data;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1458

for (i = 0; i < crtc->gamma_size; i++) {

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1469

struct drm_crtc *crtc)

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1474

vop2_crtc_write_gamma_lut(vop2, crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1480

struct drm_crtc *crtc)

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1488

vop2_crtc_write_gamma_lut(vop2, crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1494

struct drm_crtc *crtc,

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1506

vop2_crtc_atomic_set_gamma_seamless(vop2, vp, crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1508

vop2_crtc_atomic_set_gamma_rk356x(vop2, vp, crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1513

struct drm_crtc *crtc,

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1517

vop2_crtc_atomic_try_set_gamma(vop2, vp, crtc, crtc_state);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1521

static void vop2_dither_setup(struct drm_crtc *crtc, u32 *dsp_ctrl)

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1523

struct rockchip_crtc_state *vcstate = to_rockchip_crtc_state(crtc->state);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1550

static void vop2_post_config(struct drm_crtc *crtc)

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1552

struct vop2_video_port *vp = to_vop2_video_port(crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1554

struct drm_display_mode *mode = &crtc->state->adjusted_mode;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1608

static void vop2_crtc_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1611

struct vop2_video_port *vp = to_vop2_video_port(crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1615

struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1616

struct rockchip_crtc_state *vcstate = to_rockchip_crtc_state(crtc->state);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1617

struct drm_display_mode *mode = &crtc->state->adjusted_mode;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1667

drm_for_each_encoder_mask(encoder, crtc->dev, crtc_state->encoder_mask) {

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1699

vop2_dither_setup(crtc, &dsp_ctrl);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1748

drm_for_each_encoder_mask(encoder, crtc->dev, crtc_state->encoder_mask) {

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1786

vop2_post_config(crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1792

vop2_crtc_atomic_try_set_gamma(vop2, vp, crtc, crtc_state);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1794

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1800

struct drm_crtc *crtc,

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1812

if (len != crtc->gamma_size) {

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1814

len, crtc->gamma_size);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1826

static int vop2_crtc_atomic_check(struct drm_crtc *crtc,

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1829

struct vop2_video_port *vp = to_vop2_video_port(crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1832

struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1835

ret = vop2_crtc_atomic_check_gamma(vp, crtc, state, crtc_state);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1848

static void vop2_crtc_atomic_begin(struct drm_crtc *crtc,

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1851

struct vop2_video_port *vp = to_vop2_video_port(crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1857

static void vop2_crtc_atomic_flush(struct drm_crtc *crtc,

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1860

struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1861

struct vop2_video_port *vp = to_vop2_video_port(crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1866

vop2_crtc_atomic_try_set_gamma_locked(vop2, vp, crtc, crtc_state);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1868

vop2_post_config(crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1872

spin_lock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1874

if (crtc->state->event) {

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1875

WARN_ON(drm_crtc_vblank_get(crtc));

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1876

vp->event = crtc->state->event;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1877

crtc->state->event = NULL;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1880

spin_unlock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1893

static void vop2_dump_connector_on_crtc(struct drm_crtc *crtc, struct seq_file *s)

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1898

drm_connector_list_iter_begin(crtc->dev, &conn_iter);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1900

if (crtc->state->connector_mask & drm_connector_mask(connector))

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1922

"DISABLED" : pstate->crtc ? "ACTIVE" : "DISABLED");

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1962

static int vop2_crtc_state_dump(struct drm_crtc *crtc, struct seq_file *s)

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1964

struct vop2_video_port *vp = to_vop2_video_port(crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1965

struct drm_crtc_state *cstate = crtc->state;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1977

mode = &crtc->state->adjusted_mode;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1981

vop2_dump_connector_on_crtc(crtc, s);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1996

drm_atomic_crtc_for_each_plane(plane, crtc) {

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2008

struct drm_crtc *crtc;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2011

drm_for_each_crtc(crtc, drm_dev) {

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2012

vop2_crtc_state_dump(crtc, s);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2104

static int vop2_crtc_late_register(struct drm_crtc *crtc)

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2106

struct vop2_video_port *vp = to_vop2_video_port(crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2109

if (drm_crtc_index(crtc) == 0)

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2110

vop2_debugfs_init(vop2, crtc->dev->primary);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2115

static struct drm_crtc_state *vop2_crtc_duplicate_state(struct drm_crtc *crtc)

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2119

if (WARN_ON(!crtc->state))

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2122

vcstate = kmemdup(to_rockchip_crtc_state(crtc->state),

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2127

__drm_atomic_helper_crtc_duplicate_state(crtc, &vcstate->base);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2132

static void vop2_crtc_destroy_state(struct drm_crtc *crtc,

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2141

static void vop2_crtc_reset(struct drm_crtc *crtc)

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2145

if (crtc->state)

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2146

vop2_crtc_destroy_state(crtc, crtc->state);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2149

__drm_atomic_helper_crtc_reset(crtc, &vcstate->base);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2151

__drm_atomic_helper_crtc_reset(crtc, NULL);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2170

struct drm_crtc *crtc = &vp->crtc;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2186

drm_crtc_handle_vblank(crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2187

spin_lock(&crtc->dev->event_lock);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2192

drm_crtc_send_vblank_event(crtc, vp->event);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2194

drm_crtc_vblank_put(crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2197

spin_unlock(&crtc->dev->event_lock);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2230

struct drm_crtc *crtc = &vp->crtc;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2242

drm_crtc_handle_vblank(crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2243

spin_lock(&crtc->dev->event_lock);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2248

drm_crtc_send_vblank_event(crtc, vp->event);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2250

drm_crtc_vblank_put(crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2253

spin_unlock(&crtc->dev->event_lock);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2383

vp->crtc.port = port;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2392

if (!vp->crtc.port)

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2445

if (!vp->crtc.port)

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2462

if (!vp->crtc.port)

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2467

ret = drm_crtc_init_with_planes(drm, &vp->crtc, plane, NULL,

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2474

drm_crtc_helper_add(&vp->crtc, &vop2_crtc_helper_funcs);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2478

drm_mode_crtc_set_gamma_size(&vp->crtc, vp_data->gamma_lut_len);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2479

drm_crtc_enable_color_mgmt(&vp->crtc, 0, false, vp_data->gamma_lut_len);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2492

if (vp->crtc.port)

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2504

struct drm_crtc *crtc, *tmpc;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2514

list_for_each_entry_safe(crtc, tmpc, crtc_list, head) {

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2515

of_node_put(crtc->port);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2516

drm_crtc_cleanup(crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2745

struct drm_crtc *crtc;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2747

drm_for_each_crtc(crtc, drm) {

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2748

struct vop2_video_port *vp = to_vop2_video_port(crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2770

vop2->rgb = rockchip_rgb_init(dev, &vop2->vps[ret].crtc,

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

704

struct rockchip_crtc_state *vcstate = to_rockchip_crtc_state(vp->crtc.state);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

925

static void vop2_crtc_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

928

struct vop2_video_port *vp = to_vop2_video_port(crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

935

old_crtc_state = drm_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

938

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

972

if (crtc->state->event && !crtc->state->active) {

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

973

spin_lock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

974

drm_crtc_send_vblank_event(crtc, crtc->state->event);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

975

spin_unlock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

977

crtc->state->event = NULL;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

986

struct drm_crtc *crtc = pstate->crtc;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.h

237

struct drm_crtc crtc;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.h

837

static inline struct vop2_video_port *to_vop2_video_port(struct drm_crtc *crtc)

drivers/gpu/drm/rockchip/rockchip_drm_vop2.h

839

return container_of(crtc, struct vop2_video_port, crtc);

drivers/gpu/drm/rockchip/rockchip_lvds.c

291

struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode;

drivers/gpu/drm/rockchip/rockchip_lvds.c

392

struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode;

drivers/gpu/drm/rockchip/rockchip_rgb.c

128

encoder->possible_crtcs = drm_crtc_mask(crtc);

drivers/gpu/drm/rockchip/rockchip_rgb.c

74

struct drm_crtc *crtc,

drivers/gpu/drm/rockchip/rockchip_rgb.h

10

struct drm_crtc *crtc,

drivers/gpu/drm/rockchip/rockchip_rgb.h

16

struct drm_crtc *crtc,

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1394

struct drm_crtc *crtc = &vp->crtc;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1464

return crtc->state->adjusted_mode.crtc_clock * 1000LL;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1470

struct drm_crtc *crtc = &vp->crtc;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1471

struct drm_display_mode *adjusted_mode = &crtc->state->adjusted_mode;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1472

struct rockchip_crtc_state *vcstate = to_rockchip_crtc_state(crtc->state);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1572

struct drm_crtc *crtc = &vp->crtc;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1573

struct drm_display_mode *adjusted_mode = &crtc->state->adjusted_mode;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1574

struct rockchip_crtc_state *vcstate = to_rockchip_crtc_state(crtc->state);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1979

drm_atomic_crtc_for_each_plane(plane, &vp->crtc) {

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2007

drm_atomic_crtc_for_each_plane(plane, &vp->crtc) {

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2152

struct rockchip_crtc_state *vcstate = to_rockchip_crtc_state(vp->crtc.state);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2198

drm_atomic_crtc_for_each_plane(plane, &vp->crtc) {

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2363

struct drm_crtc *crtc = &vp->crtc;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2368

drm_atomic_crtc_for_each_plane(plane, crtc) {

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2389

struct rockchip_crtc_state *vcstate = to_rockchip_crtc_state(vp->crtc.state);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2403

drm_atomic_crtc_for_each_plane(plane, &vp->crtc) {

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2420

drm_atomic_crtc_for_each_plane(plane, &vp->crtc) {

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2429

struct drm_crtc *crtc = &vp->crtc;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2434

drm_atomic_crtc_for_each_plane(plane, crtc) {

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2454

struct drm_crtc *crtc = &vp->crtc;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2455

struct drm_display_mode *mode = &crtc->state->adjusted_mode;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2471

struct drm_crtc *crtc = &vp->crtc;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2472

struct drm_display_mode *mode = &crtc->state->adjusted_mode;

drivers/gpu/drm/sitronix/st7571.c

330

struct drm_crtc *new_crtc = new_plane_state->crtc;

drivers/gpu/drm/sitronix/st7571.c

413

static enum drm_mode_status st7571_crtc_mode_valid(struct drm_crtc *crtc,

drivers/gpu/drm/sitronix/st7571.c

416

struct st7571_device *st7571 = drm_to_st7571(crtc->dev);

drivers/gpu/drm/sitronix/st7571.c

418

return drm_crtc_helper_mode_valid_fixed(crtc, mode, &st7571->mode);

drivers/gpu/drm/sitronix/st7571.c

547

struct drm_crtc *crtc = &st7571->crtc;

drivers/gpu/drm/sitronix/st7571.c

551

ret = drm_crtc_init_with_planes(drm, crtc, primary_plane, NULL,

drivers/gpu/drm/sitronix/st7571.c

556

drm_crtc_helper_add(crtc, &st7571_crtc_helper_funcs);

drivers/gpu/drm/sitronix/st7571.c

564

struct drm_crtc *crtc = &st7571->crtc;

drivers/gpu/drm/sitronix/st7571.c

574

encoder->possible_crtcs = drm_crtc_mask(crtc);

drivers/gpu/drm/sitronix/st7571.h

58

struct drm_crtc crtc;

drivers/gpu/drm/sitronix/st7586.c

159

if (!pipe->crtc.state->active)

drivers/gpu/drm/sitronix/st7586.c

176

struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);

drivers/gpu/drm/sitronix/st7586.c

189

if (!drm_dev_enter(pipe->crtc.dev, &idx))

drivers/gpu/drm/sitronix/st7586.c

255

struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);

drivers/gpu/drm/sitronix/st7735r.c

64

struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);

drivers/gpu/drm/sitronix/st7735r.c

71

if (!drm_dev_enter(pipe->crtc.dev, &idx))

drivers/gpu/drm/sitronix/st7920.c

348

struct drm_crtc *crtc = plane_state->crtc;

drivers/gpu/drm/sitronix/st7920.c

354

if (crtc)

drivers/gpu/drm/sitronix/st7920.c

355

crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/sitronix/st7920.c

395

struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, plane_state->crtc);

drivers/gpu/drm/sitronix/st7920.c

441

if (!plane_state->crtc)

drivers/gpu/drm/sitronix/st7920.c

444

crtc_state = drm_atomic_get_new_crtc_state(state, plane_state->crtc);

drivers/gpu/drm/sitronix/st7920.c

516

static enum drm_mode_status st7920_crtc_mode_valid(struct drm_crtc *crtc,

drivers/gpu/drm/sitronix/st7920.c

519

struct st7920_device *st7920 = drm_to_st7920(crtc->dev);

drivers/gpu/drm/sitronix/st7920.c

521

return drm_crtc_helper_mode_valid_fixed(crtc, mode, &st7920->mode);

drivers/gpu/drm/sitronix/st7920.c

524

static int st7920_crtc_atomic_check(struct drm_crtc *crtc,

drivers/gpu/drm/sitronix/st7920.c

527

struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/sitronix/st7920.c

531

ret = drm_crtc_helper_atomic_check(crtc, state);

drivers/gpu/drm/sitronix/st7920.c

542

static void st7920_crtc_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/sitronix/st7920.c

545

struct drm_device *drm = crtc->dev;

drivers/gpu/drm/sitronix/st7920.c

562

static void st7920_crtc_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/sitronix/st7920.c

566

struct drm_device *drm = crtc->dev;

drivers/gpu/drm/sitronix/st7920.c

578

static void st7920_crtc_reset(struct drm_crtc *crtc)

drivers/gpu/drm/sitronix/st7920.c

582

drm_WARN_ON_ONCE(crtc->dev, crtc->state);

drivers/gpu/drm/sitronix/st7920.c

588

__drm_atomic_helper_crtc_reset(crtc, &st7920_state->base);

drivers/gpu/drm/sitronix/st7920.c

591

static struct drm_crtc_state *st7920_crtc_duplicate_state(struct drm_crtc *crtc)

drivers/gpu/drm/sitronix/st7920.c

595

if (drm_WARN_ON_ONCE(crtc->dev, !crtc->state))

drivers/gpu/drm/sitronix/st7920.c

602

__drm_atomic_helper_crtc_duplicate_state(crtc, &st7920_state->base);

drivers/gpu/drm/sitronix/st7920.c

607

static void st7920_crtc_destroy_state(struct drm_crtc *crtc,

drivers/gpu/drm/sitronix/st7920.c

692

struct drm_crtc *crtc;

drivers/gpu/drm/sitronix/st7920.c

747

crtc = &st7920->crtc;

drivers/gpu/drm/sitronix/st7920.c

748

ret = drm_crtc_init_with_planes(drm, crtc, primary_plane, NULL,

drivers/gpu/drm/sitronix/st7920.c

755

drm_crtc_helper_add(crtc, &st7920_crtc_helper_funcs);

drivers/gpu/drm/sitronix/st7920.c

767

encoder->possible_crtcs = drm_crtc_mask(crtc);

drivers/gpu/drm/sitronix/st7920.c

78

struct drm_crtc crtc;

drivers/gpu/drm/solomon/ssd130x.c

1084

struct drm_crtc *crtc = plane_state->crtc;

drivers/gpu/drm/solomon/ssd130x.c

1090

if (crtc)

drivers/gpu/drm/solomon/ssd130x.c

1091

crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/solomon/ssd130x.c

1133

struct drm_crtc *crtc = plane_state->crtc;

drivers/gpu/drm/solomon/ssd130x.c

1139

if (crtc)

drivers/gpu/drm/solomon/ssd130x.c

1140

crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/solomon/ssd130x.c

1178

struct drm_crtc *crtc = plane_state->crtc;

drivers/gpu/drm/solomon/ssd130x.c

1182

if (crtc)

drivers/gpu/drm/solomon/ssd130x.c

1183

crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/solomon/ssd130x.c

1203

struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, plane_state->crtc);

drivers/gpu/drm/solomon/ssd130x.c

1244

struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, plane_state->crtc);

drivers/gpu/drm/solomon/ssd130x.c

1285

struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, plane_state->crtc);

drivers/gpu/drm/solomon/ssd130x.c

1328

if (!plane_state->crtc)

drivers/gpu/drm/solomon/ssd130x.c

1331

crtc_state = drm_atomic_get_new_crtc_state(state, plane_state->crtc);

drivers/gpu/drm/solomon/ssd130x.c

1352

if (!plane_state->crtc)

drivers/gpu/drm/solomon/ssd130x.c

1355

crtc_state = drm_atomic_get_new_crtc_state(state, plane_state->crtc);

drivers/gpu/drm/solomon/ssd130x.c

1376

if (!plane_state->crtc)

drivers/gpu/drm/solomon/ssd130x.c

1379

crtc_state = drm_atomic_get_new_crtc_state(state, plane_state->crtc);

drivers/gpu/drm/solomon/ssd130x.c

1470

static enum drm_mode_status ssd130x_crtc_mode_valid(struct drm_crtc *crtc,

drivers/gpu/drm/solomon/ssd130x.c

1473

struct ssd130x_device *ssd130x = drm_to_ssd130x(crtc->dev);

drivers/gpu/drm/solomon/ssd130x.c

1475

return drm_crtc_helper_mode_valid_fixed(crtc, mode, &ssd130x->mode);

drivers/gpu/drm/solomon/ssd130x.c

1478

static int ssd130x_crtc_atomic_check(struct drm_crtc *crtc,

drivers/gpu/drm/solomon/ssd130x.c

1481

struct drm_device *drm = crtc->dev;

drivers/gpu/drm/solomon/ssd130x.c

1483

struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/solomon/ssd130x.c

1488

ret = drm_crtc_helper_atomic_check(crtc, state);

drivers/gpu/drm/solomon/ssd130x.c

1499

static int ssd132x_crtc_atomic_check(struct drm_crtc *crtc,

drivers/gpu/drm/solomon/ssd130x.c

1502

struct drm_device *drm = crtc->dev;

drivers/gpu/drm/solomon/ssd130x.c

1504

struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/solomon/ssd130x.c

1509

ret = drm_crtc_helper_atomic_check(crtc, state);

drivers/gpu/drm/solomon/ssd130x.c

1520

static int ssd133x_crtc_atomic_check(struct drm_crtc *crtc,

drivers/gpu/drm/solomon/ssd130x.c

1523

struct drm_device *drm = crtc->dev;

drivers/gpu/drm/solomon/ssd130x.c

1525

struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/solomon/ssd130x.c

1534

ret = drm_crtc_helper_atomic_check(crtc, state);

drivers/gpu/drm/solomon/ssd130x.c

1548

static void ssd130x_crtc_reset(struct drm_crtc *crtc)

drivers/gpu/drm/solomon/ssd130x.c

1552

drm_WARN_ON_ONCE(crtc->dev, crtc->state);

drivers/gpu/drm/solomon/ssd130x.c

1558

__drm_atomic_helper_crtc_reset(crtc, &ssd130x_state->base);

drivers/gpu/drm/solomon/ssd130x.c

1561

static struct drm_crtc_state *ssd130x_crtc_duplicate_state(struct drm_crtc *crtc)

drivers/gpu/drm/solomon/ssd130x.c

1566

if (drm_WARN_ON_ONCE(crtc->dev, !crtc->state))

drivers/gpu/drm/solomon/ssd130x.c

1569

old_ssd130x_state = to_ssd130x_crtc_state(crtc->state);

drivers/gpu/drm/solomon/ssd130x.c

1577

__drm_atomic_helper_crtc_duplicate_state(crtc, &ssd130x_state->base);

drivers/gpu/drm/solomon/ssd130x.c

1582

static void ssd130x_crtc_destroy_state(struct drm_crtc *crtc,

drivers/gpu/drm/solomon/ssd130x.c

1852

struct drm_crtc *crtc;

drivers/gpu/drm/solomon/ssd130x.c

1907

crtc = &ssd130x->crtc;

drivers/gpu/drm/solomon/ssd130x.c

1908

ret = drm_crtc_init_with_planes(drm, crtc, primary_plane, NULL,

drivers/gpu/drm/solomon/ssd130x.c

1915

drm_crtc_helper_add(crtc, &ssd130x_crtc_helper_funcs[family_id]);

drivers/gpu/drm/solomon/ssd130x.c

1929

encoder->possible_crtcs = drm_crtc_mask(crtc);

drivers/gpu/drm/solomon/ssd130x.h

66

struct drm_crtc crtc;

drivers/gpu/drm/sprd/sprd_dpu.c

511

if (!plane_state->fb || !plane_state->crtc)

drivers/gpu/drm/sprd/sprd_dpu.c

518

crtc_state = drm_atomic_get_crtc_state(plane_state->state, plane_state->crtc);

drivers/gpu/drm/sprd/sprd_dpu.c

533

struct sprd_dpu *dpu = to_sprd_crtc(new_state->crtc);

drivers/gpu/drm/sprd/sprd_dpu.c

544

struct sprd_dpu *dpu = to_sprd_crtc(old_state->crtc);

drivers/gpu/drm/sprd/sprd_dpu.c

616

static void sprd_crtc_mode_set_nofb(struct drm_crtc *crtc)

drivers/gpu/drm/sprd/sprd_dpu.c

618

struct sprd_dpu *dpu = to_sprd_crtc(crtc);

drivers/gpu/drm/sprd/sprd_dpu.c

619

struct drm_display_mode *mode = &crtc->state->adjusted_mode;

drivers/gpu/drm/sprd/sprd_dpu.c

625

drm_for_each_encoder_mask(encoder, crtc->dev,

drivers/gpu/drm/sprd/sprd_dpu.c

626

crtc->state->encoder_mask) {

drivers/gpu/drm/sprd/sprd_dpu.c

638

static void sprd_crtc_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/sprd/sprd_dpu.c

641

struct sprd_dpu *dpu = to_sprd_crtc(crtc);

drivers/gpu/drm/sprd/sprd_dpu.c

648

static void sprd_crtc_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/sprd/sprd_dpu.c

651

struct sprd_dpu *dpu = to_sprd_crtc(crtc);

drivers/gpu/drm/sprd/sprd_dpu.c

659

if (crtc->state->event) {

drivers/gpu/drm/sprd/sprd_dpu.c

660

drm_crtc_send_vblank_event(crtc, crtc->state->event);

drivers/gpu/drm/sprd/sprd_dpu.c

661

crtc->state->event = NULL;

drivers/gpu/drm/sprd/sprd_dpu.c

666

static void sprd_crtc_atomic_flush(struct drm_crtc *crtc,

drivers/gpu/drm/sprd/sprd_dpu.c

670

struct sprd_dpu *dpu = to_sprd_crtc(crtc);

drivers/gpu/drm/sprd/sprd_dpu.c

676

if (crtc->state->event) {

drivers/gpu/drm/sprd/sprd_dpu.c

677

drm_crtc_send_vblank_event(crtc, crtc->state->event);

drivers/gpu/drm/sprd/sprd_dpu.c

678

crtc->state->event = NULL;

drivers/gpu/drm/sprd/sprd_dpu.c

683

static int sprd_crtc_enable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/sprd/sprd_dpu.c

685

struct sprd_dpu *dpu = to_sprd_crtc(crtc);

drivers/gpu/drm/sprd/sprd_dpu.c

692

static void sprd_crtc_disable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/sprd/sprd_dpu.c

694

struct sprd_dpu *dpu = to_sprd_crtc(crtc);

drivers/gpu/drm/sprd/sprd_dpu.h

69

static inline struct sprd_dpu *to_sprd_crtc(struct drm_crtc *crtc)

drivers/gpu/drm/sprd/sprd_dpu.h

71

return container_of(crtc, struct sprd_dpu, base);

drivers/gpu/drm/sprd/sprd_dsi.c

793

struct sprd_dpu *dpu = to_sprd_crtc(encoder->crtc);

drivers/gpu/drm/sprd/sprd_dsi.c

830

struct sprd_dpu *dpu = to_sprd_crtc(encoder->crtc);

drivers/gpu/drm/sti/sti_crtc.c

103

static void sti_crtc_disable(struct drm_crtc *crtc)

drivers/gpu/drm/sti/sti_crtc.c

105

struct sti_mixer *mixer = to_sti_mixer(crtc);

drivers/gpu/drm/sti/sti_crtc.c

109

DRM_DEBUG_KMS("CRTC:%d (%s)\n", crtc->base.id, sti_mixer_to_str(mixer));

drivers/gpu/drm/sti/sti_crtc.c

114

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/sti/sti_crtc.c

129

sti_crtc_mode_set_nofb(struct drm_crtc *crtc)

drivers/gpu/drm/sti/sti_crtc.c

131

sti_crtc_mode_set(crtc, &crtc->state->adjusted_mode);

drivers/gpu/drm/sti/sti_crtc.c

134

static void sti_crtc_atomic_flush(struct drm_crtc *crtc,

drivers/gpu/drm/sti/sti_crtc.c

137

struct drm_device *drm_dev = crtc->dev;

drivers/gpu/drm/sti/sti_crtc.c

138

struct sti_mixer *mixer = to_sti_mixer(crtc);

drivers/gpu/drm/sti/sti_crtc.c

153

if (p->state->crtc != crtc)

drivers/gpu/drm/sti/sti_crtc.c

208

event = crtc->state->event;

drivers/gpu/drm/sti/sti_crtc.c

210

crtc->state->event = NULL;

drivers/gpu/drm/sti/sti_crtc.c

212

spin_lock_irqsave(&crtc->dev->event_lock, flags);

drivers/gpu/drm/sti/sti_crtc.c

213

if (drm_crtc_vblank_get(crtc) == 0)

drivers/gpu/drm/sti/sti_crtc.c

214

drm_crtc_arm_vblank_event(crtc, event);

drivers/gpu/drm/sti/sti_crtc.c

216

drm_crtc_send_vblank_event(crtc, event);

drivers/gpu/drm/sti/sti_crtc.c

217

spin_unlock_irqrestore(&crtc->dev->event_lock, flags);

drivers/gpu/drm/sti/sti_crtc.c

228

static void sti_crtc_destroy(struct drm_crtc *crtc)

drivers/gpu/drm/sti/sti_crtc.c

231

drm_crtc_cleanup(crtc);

drivers/gpu/drm/sti/sti_crtc.c

234

static int sti_crtc_set_property(struct drm_crtc *crtc,

drivers/gpu/drm/sti/sti_crtc.c

24

static void sti_crtc_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/sti/sti_crtc.c

246

struct drm_crtc *crtc = data;

drivers/gpu/drm/sti/sti_crtc.c

250

pipe = drm_crtc_index(crtc);

drivers/gpu/drm/sti/sti_crtc.c

260

drm_crtc_handle_vblank(crtc);

drivers/gpu/drm/sti/sti_crtc.c

267

list_for_each_entry(p, &crtc->dev->mode_config.plane_list,

drivers/gpu/drm/sti/sti_crtc.c

27

struct sti_mixer *mixer = to_sti_mixer(crtc);

drivers/gpu/drm/sti/sti_crtc.c

275

sti_crtc_disable(crtc);

drivers/gpu/drm/sti/sti_crtc.c

281

static int sti_crtc_enable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/sti/sti_crtc.c

283

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/sti/sti_crtc.c

284

unsigned int pipe = crtc->index;

drivers/gpu/drm/sti/sti_crtc.c

292

if (sti_vtg_register_client(vtg, vtg_vblank_nb, crtc)) {

drivers/gpu/drm/sti/sti_crtc.c

300

static void sti_crtc_disable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/sti/sti_crtc.c

302

struct drm_device *drm_dev = crtc->dev;

drivers/gpu/drm/sti/sti_crtc.c

303

unsigned int pipe = crtc->index;

drivers/gpu/drm/sti/sti_crtc.c

315

static int sti_crtc_late_register(struct drm_crtc *crtc)

drivers/gpu/drm/sti/sti_crtc.c

317

struct sti_mixer *mixer = to_sti_mixer(crtc);

drivers/gpu/drm/sti/sti_crtc.c

320

if (drm_crtc_index(crtc) == 0)

drivers/gpu/drm/sti/sti_crtc.c

321

sti_compositor_debugfs_init(compo, crtc->dev->primary);

drivers/gpu/drm/sti/sti_crtc.c

33

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/sti/sti_crtc.c

339

bool sti_crtc_is_main(struct drm_crtc *crtc)

drivers/gpu/drm/sti/sti_crtc.c

341

struct sti_mixer *mixer = to_sti_mixer(crtc);

drivers/gpu/drm/sti/sti_crtc.c

352

struct drm_crtc *crtc = &mixer->drm_crtc;

drivers/gpu/drm/sti/sti_crtc.c

355

res = drm_crtc_init_with_planes(drm_dev, crtc, primary, cursor,

drivers/gpu/drm/sti/sti_crtc.c

36

static void sti_crtc_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/sti/sti_crtc.c

362

drm_crtc_helper_add(crtc, &sti_crtc_helper_funcs);

drivers/gpu/drm/sti/sti_crtc.c

365

crtc->base.id, sti_mixer_to_str(mixer));

drivers/gpu/drm/sti/sti_crtc.c

39

struct sti_mixer *mixer = to_sti_mixer(crtc);

drivers/gpu/drm/sti/sti_crtc.c

45

drm_crtc_wait_one_vblank(crtc);

drivers/gpu/drm/sti/sti_crtc.c

49

sti_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *mode)

drivers/gpu/drm/sti/sti_crtc.c

51

struct sti_mixer *mixer = to_sti_mixer(crtc);

drivers/gpu/drm/sti/sti_crtc.c

58

crtc->base.id, sti_mixer_to_str(mixer), mode->name);

drivers/gpu/drm/sti/sti_crtc.c

86

sti_vtg_set_config(compo->vtg[mixer->id], &crtc->mode);

drivers/gpu/drm/sti/sti_crtc.c

88

if (sti_mixer_active_video_area(mixer, &crtc->mode)) {

drivers/gpu/drm/sti/sti_cursor.c

192

struct drm_crtc *crtc = new_plane_state->crtc;

drivers/gpu/drm/sti/sti_cursor.c

200

if (!crtc || !fb)

drivers/gpu/drm/sti/sti_cursor.c

203

crtc_state = drm_atomic_get_crtc_state(state, crtc);

drivers/gpu/drm/sti/sti_cursor.c

256

crtc->base.id, sti_mixer_to_str(to_sti_mixer(crtc)),

drivers/gpu/drm/sti/sti_cursor.c

270

struct drm_crtc *crtc = newstate->crtc;

drivers/gpu/drm/sti/sti_cursor.c

278

if (!crtc || !fb)

drivers/gpu/drm/sti/sti_cursor.c

281

mode = &crtc->mode;

drivers/gpu/drm/sti/sti_cursor.c

325

if (!oldstate->crtc) {

drivers/gpu/drm/sti/sti_cursor.c

332

oldstate->crtc->base.id,

drivers/gpu/drm/sti/sti_cursor.c

333

sti_mixer_to_str(to_sti_mixer(oldstate->crtc)),

drivers/gpu/drm/sti/sti_dvo.c

285

struct sti_mixer *mixer = to_sti_mixer(dvo->encoder->crtc);

drivers/gpu/drm/sti/sti_gdp.c

221

struct drm_crtc *crtc;

drivers/gpu/drm/sti/sti_gdp.c

224

crtc = drm_plane->state->crtc;

drivers/gpu/drm/sti/sti_gdp.c

252

if (!crtc)

drivers/gpu/drm/sti/sti_gdp.c

256

crtc->base.id, sti_mixer_to_str(to_sti_mixer(crtc)));

drivers/gpu/drm/sti/sti_gdp.c

627

struct drm_crtc *crtc = new_plane_state->crtc;

drivers/gpu/drm/sti/sti_gdp.c

637

if (!crtc || !fb)

drivers/gpu/drm/sti/sti_gdp.c

640

mixer = to_sti_mixer(crtc);

drivers/gpu/drm/sti/sti_gdp.c

641

crtc_state = drm_atomic_get_crtc_state(state, crtc);

drivers/gpu/drm/sti/sti_gdp.c

697

crtc->base.id, sti_mixer_to_str(mixer),

drivers/gpu/drm/sti/sti_gdp.c

716

struct drm_crtc *crtc = newstate->crtc;

drivers/gpu/drm/sti/sti_gdp.c

731

if (!crtc || !fb)

drivers/gpu/drm/sti/sti_gdp.c

751

struct sti_mixer *mixer = to_sti_mixer(crtc);

drivers/gpu/drm/sti/sti_gdp.c

755

sti_vtg_register_client(gdp->vtg, &gdp->vtg_field_nb, crtc);

drivers/gpu/drm/sti/sti_gdp.c

759

mode = &crtc->mode;

drivers/gpu/drm/sti/sti_gdp.c

882

if (!oldstate->crtc) {

drivers/gpu/drm/sti/sti_gdp.c

889

oldstate->crtc->base.id,

drivers/gpu/drm/sti/sti_gdp.c

890

sti_mixer_to_str(to_sti_mixer(oldstate->crtc)),

drivers/gpu/drm/sti/sti_hqvdp.c

1029

struct drm_crtc *crtc = new_plane_state->crtc;

drivers/gpu/drm/sti/sti_hqvdp.c

1037

if (!crtc || !fb)

drivers/gpu/drm/sti/sti_hqvdp.c

1040

crtc_state = drm_atomic_get_crtc_state(state, crtc);

drivers/gpu/drm/sti/sti_hqvdp.c

1098

crtc)) {

drivers/gpu/drm/sti/sti_hqvdp.c

1107

crtc->base.id, sti_mixer_to_str(to_sti_mixer(crtc)),

drivers/gpu/drm/sti/sti_hqvdp.c

1126

struct drm_crtc *crtc = newstate->crtc;

drivers/gpu/drm/sti/sti_hqvdp.c

1136

if (!crtc || !fb)

drivers/gpu/drm/sti/sti_hqvdp.c

1154

mode = &crtc->mode;

drivers/gpu/drm/sti/sti_hqvdp.c

1258

if (!oldstate->crtc) {

drivers/gpu/drm/sti/sti_hqvdp.c

1265

oldstate->crtc->base.id,

drivers/gpu/drm/sti/sti_hqvdp.c

1266

sti_mixer_to_str(to_sti_mixer(oldstate->crtc)),

drivers/gpu/drm/sti/sti_tvout.c

501

struct drm_crtc *crtc;

drivers/gpu/drm/sti/sti_tvout.c

506

crtc = tvout->hdmi->crtc;

drivers/gpu/drm/sti/sti_tvout.c

507

if (crtc) {

drivers/gpu/drm/sti/sti_tvout.c

509

sti_crtc_is_main(crtc) ? "main" : "aux");

drivers/gpu/drm/sti/sti_tvout.c

518

crtc = tvout->dvo->crtc;

drivers/gpu/drm/sti/sti_tvout.c

519

if (crtc) {

drivers/gpu/drm/sti/sti_tvout.c

521

sti_crtc_is_main(crtc) ? "main" : "aux");

drivers/gpu/drm/sti/sti_tvout.c

531

crtc = tvout->hda->crtc;

drivers/gpu/drm/sti/sti_tvout.c

532

if (crtc) {

drivers/gpu/drm/sti/sti_tvout.c

534

sti_crtc_is_main(crtc) ? "main" : "aux");

drivers/gpu/drm/sti/sti_tvout.c

636

tvout_preformatter_set_matrix(tvout, &encoder->crtc->mode);

drivers/gpu/drm/sti/sti_tvout.c

638

tvout_dvo_start(tvout, sti_crtc_is_main(encoder->crtc));

drivers/gpu/drm/sti/sti_tvout.c

686

tvout_preformatter_set_matrix(tvout, &encoder->crtc->mode);

drivers/gpu/drm/sti/sti_tvout.c

688

tvout_hda_start(tvout, sti_crtc_is_main(encoder->crtc));

drivers/gpu/drm/sti/sti_tvout.c

737

tvout_preformatter_set_matrix(tvout, &encoder->crtc->mode);

drivers/gpu/drm/sti/sti_tvout.c

739

tvout_hdmi_start(tvout, sti_crtc_is_main(encoder->crtc));

drivers/gpu/drm/sti/sti_vid.c

142

struct drm_crtc *crtc = state->crtc;

drivers/gpu/drm/sti/sti_vid.c

143

struct drm_display_mode *mode = &crtc->mode;

drivers/gpu/drm/sti/sti_vtg.c

140

struct drm_crtc *crtc;

drivers/gpu/drm/sti/sti_vtg.c

346

struct drm_crtc *crtc)

drivers/gpu/drm/sti/sti_vtg.c

348

vtg->crtc = crtc;

drivers/gpu/drm/sti/sti_vtg.c

365

raw_notifier_call_chain(&vtg->notifier_list, event, vtg->crtc);

drivers/gpu/drm/sti/sti_vtg.h

27

struct drm_crtc *crtc);

drivers/gpu/drm/stm/ltdc.c

1039

static void ltdc_crtc_atomic_flush(struct drm_crtc *crtc,

drivers/gpu/drm/stm/ltdc.c

1042

struct ltdc_device *ldev = crtc_to_ltdc(crtc);

drivers/gpu/drm/stm/ltdc.c

1043

struct drm_device *ddev = crtc->dev;

drivers/gpu/drm/stm/ltdc.c

1044

struct drm_pending_vblank_event *event = crtc->state->event;

drivers/gpu/drm/stm/ltdc.c

1046

drm_dbg_atomic(crtc->dev, "\n");

drivers/gpu/drm/stm/ltdc.c

1048

ltdc_crtc_update_clut(crtc);

drivers/gpu/drm/stm/ltdc.c

1055

crtc->state->event = NULL;

drivers/gpu/drm/stm/ltdc.c

1058

if (drm_crtc_vblank_get(crtc) == 0)

drivers/gpu/drm/stm/ltdc.c

1059

drm_crtc_arm_vblank_event(crtc, event);

drivers/gpu/drm/stm/ltdc.c

1061

drm_crtc_send_vblank_event(crtc, event);

drivers/gpu/drm/stm/ltdc.c

1066

static bool ltdc_crtc_get_scanout_position(struct drm_crtc *crtc,

drivers/gpu/drm/stm/ltdc.c

1072

struct drm_device *ddev = crtc->dev;

drivers/gpu/drm/stm/ltdc.c

1129

static int ltdc_crtc_enable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/stm/ltdc.c

1131

struct ltdc_device *ldev = crtc_to_ltdc(crtc);

drivers/gpu/drm/stm/ltdc.c

1132

struct drm_crtc_state *state = crtc->state;

drivers/gpu/drm/stm/ltdc.c

1134

drm_dbg_driver(crtc->dev, "\n");

drivers/gpu/drm/stm/ltdc.c

1144

static void ltdc_crtc_disable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/stm/ltdc.c

1146

struct ltdc_device *ldev = crtc_to_ltdc(crtc);

drivers/gpu/drm/stm/ltdc.c

1148

drm_dbg_driver(crtc->dev, "\n");

drivers/gpu/drm/stm/ltdc.c

1152

static int ltdc_crtc_set_crc_source(struct drm_crtc *crtc, const char *source)

drivers/gpu/drm/stm/ltdc.c

1157

if (!crtc)

drivers/gpu/drm/stm/ltdc.c

1160

drm_dbg_driver(crtc->dev, "\n");

drivers/gpu/drm/stm/ltdc.c

1162

ldev = crtc_to_ltdc(crtc);

drivers/gpu/drm/stm/ltdc.c

1178

static int ltdc_crtc_verify_crc_source(struct drm_crtc *crtc,

drivers/gpu/drm/stm/ltdc.c

1181

if (!crtc)

drivers/gpu/drm/stm/ltdc.c

1184

drm_dbg_driver(crtc->dev, "\n");

drivers/gpu/drm/stm/ltdc.c

1187

drm_dbg_driver(crtc->dev, "Unknown CRC source %s for %s\n",

drivers/gpu/drm/stm/ltdc.c

1188

source, crtc->name);

drivers/gpu/drm/stm/ltdc.c

1199

struct drm_crtc *crtc = state->crtc;

drivers/gpu/drm/stm/ltdc.c

1200

struct ltdc_device *ldev = crtc_to_ltdc(crtc);

drivers/gpu/drm/stm/ltdc.c

1282

if (!newstate->crtc || !fb) {

drivers/gpu/drm/stm/ltdc.c

1531

oldstate->crtc->base.id, plane->base.id);

drivers/gpu/drm/stm/ltdc.c

1650

static int ltdc_crtc_init(struct drm_device *ddev, struct drm_crtc *crtc)

drivers/gpu/drm/stm/ltdc.c

1675

ret = drmm_crtc_init_with_planes(ddev, crtc, primary, NULL,

drivers/gpu/drm/stm/ltdc.c

1678

ret = drmm_crtc_init_with_planes(ddev, crtc, primary, NULL,

drivers/gpu/drm/stm/ltdc.c

1685

drm_crtc_helper_add(crtc, &ltdc_crtc_helper_funcs);

drivers/gpu/drm/stm/ltdc.c

1687

drm_mode_crtc_set_gamma_size(crtc, CLUT_SIZE);

drivers/gpu/drm/stm/ltdc.c

1688

drm_crtc_enable_color_mgmt(crtc, 0, false, CLUT_SIZE);

drivers/gpu/drm/stm/ltdc.c

1690

drm_dbg_driver(ddev, "CRTC:%d created\n", crtc->base.id);

drivers/gpu/drm/stm/ltdc.c

1931

struct drm_crtc *crtc;

drivers/gpu/drm/stm/ltdc.c

2064

crtc = drmm_kzalloc(ddev, sizeof(*crtc), GFP_KERNEL);

drivers/gpu/drm/stm/ltdc.c

2065

if (!crtc) {

drivers/gpu/drm/stm/ltdc.c

2071

ret = ltdc_crtc_init(ddev, crtc);

drivers/gpu/drm/stm/ltdc.c

490

static inline struct ltdc_device *crtc_to_ltdc(struct drm_crtc *crtc)

drivers/gpu/drm/stm/ltdc.c

492

return (struct ltdc_device *)crtc->dev->dev_private;

drivers/gpu/drm/stm/ltdc.c

690

struct drm_crtc *crtc)

drivers/gpu/drm/stm/ltdc.c

706

drm_crtc_add_crc_entry(crtc, true, drm_crtc_accurate_vblank_count(crtc), &crc);

drivers/gpu/drm/stm/ltdc.c

713

struct drm_crtc *crtc = drm_crtc_from_index(ddev, 0);

drivers/gpu/drm/stm/ltdc.c

717

drm_crtc_handle_vblank(crtc);

drivers/gpu/drm/stm/ltdc.c

721

ltdc_irq_crc_handle(ldev, crtc);

drivers/gpu/drm/stm/ltdc.c

756

static void ltdc_crtc_update_clut(struct drm_crtc *crtc)

drivers/gpu/drm/stm/ltdc.c

758

struct ltdc_device *ldev = crtc_to_ltdc(crtc);

drivers/gpu/drm/stm/ltdc.c

763

if (!crtc->state->color_mgmt_changed || !crtc->state->gamma_lut)

drivers/gpu/drm/stm/ltdc.c

766

lut = (struct drm_color_lut *)crtc->state->gamma_lut->data;

drivers/gpu/drm/stm/ltdc.c

775

static void ltdc_crtc_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/stm/ltdc.c

778

struct ltdc_device *ldev = crtc_to_ltdc(crtc);

drivers/gpu/drm/stm/ltdc.c

779

struct drm_device *ddev = crtc->dev;

drivers/gpu/drm/stm/ltdc.c

781

drm_dbg_driver(crtc->dev, "\n");

drivers/gpu/drm/stm/ltdc.c

795

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/stm/ltdc.c

798

static void ltdc_crtc_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/stm/ltdc.c

801

struct ltdc_device *ldev = crtc_to_ltdc(crtc);

drivers/gpu/drm/stm/ltdc.c

802

struct drm_device *ddev = crtc->dev;

drivers/gpu/drm/stm/ltdc.c

805

drm_dbg_driver(crtc->dev, "\n");

drivers/gpu/drm/stm/ltdc.c

807

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/stm/ltdc.c

833

ltdc_crtc_mode_valid(struct drm_crtc *crtc,

drivers/gpu/drm/stm/ltdc.c

836

struct ltdc_device *ldev = crtc_to_ltdc(crtc);

drivers/gpu/drm/stm/ltdc.c

844

drm_dbg_driver(crtc->dev, "lvds pixclk rate target %d, available %d\n",

drivers/gpu/drm/stm/ltdc.c

850

drm_dbg_driver(crtc->dev, "clk rate target %d, available %d\n", target, result);

drivers/gpu/drm/stm/ltdc.c

877

static bool ltdc_crtc_mode_fixup(struct drm_crtc *crtc,

drivers/gpu/drm/stm/ltdc.c

881

struct ltdc_device *ldev = crtc_to_ltdc(crtc);

drivers/gpu/drm/stm/ltdc.c

885

drm_err(crtc->dev, "Cannot set rate (%dHz) for pixel clk\n", rate);

drivers/gpu/drm/stm/ltdc.c

891

drm_dbg_driver(crtc->dev, "requested clock %dkHz, adjusted clock %dkHz\n",

drivers/gpu/drm/stm/ltdc.c

897

static void ltdc_crtc_mode_set_nofb(struct drm_crtc *crtc)

drivers/gpu/drm/stm/ltdc.c

899

struct ltdc_device *ldev = crtc_to_ltdc(crtc);

drivers/gpu/drm/stm/ltdc.c

900

struct drm_device *ddev = crtc->dev;

drivers/gpu/drm/stm/ltdc.c

905

struct drm_display_mode *mode = &crtc->state->adjusted_mode;

drivers/gpu/drm/stm/ltdc.c

915

if (en_iter->crtc == crtc) {

drivers/gpu/drm/stm/ltdc.c

947

drm_err(crtc->dev, "Failed to set mode, cannot get sync\n");

drivers/gpu/drm/stm/ltdc.c

952

drm_dbg_driver(crtc->dev, "CRTC:%d mode:%s\n", crtc->base.id, mode->name);

drivers/gpu/drm/stm/ltdc.c

953

drm_dbg_driver(crtc->dev, "Video mode: %dx%d", mode->hdisplay, mode->vdisplay);

drivers/gpu/drm/stm/ltdc.c

954

drm_dbg_driver(crtc->dev, " hfp %d hbp %d hsl %d vfp %d vbp %d vsl %d\n",

drivers/gpu/drm/stm/lvds.c

905

if (!conn_state->crtc)

drivers/gpu/drm/stm/lvds.c

912

crtc_state = drm_atomic_get_crtc_state(state, conn_state->crtc);

drivers/gpu/drm/sun4i/sun4i_backend.c

74

struct drm_crtc *crtc,

drivers/gpu/drm/sun4i/sun4i_crtc.c

100

if (drm_crtc_vblank_get(crtc) == 0)

drivers/gpu/drm/sun4i/sun4i_crtc.c

101

drm_crtc_arm_vblank_event(crtc, event);

drivers/gpu/drm/sun4i/sun4i_crtc.c

103

drm_crtc_send_vblank_event(crtc, event);

drivers/gpu/drm/sun4i/sun4i_crtc.c

104

spin_unlock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/sun4i/sun4i_crtc.c

108

static void sun4i_crtc_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/sun4i/sun4i_crtc.c

111

struct drm_encoder *encoder = sun4i_crtc_get_encoder(crtc);

drivers/gpu/drm/sun4i/sun4i_crtc.c

112

struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);

drivers/gpu/drm/sun4i/sun4i_crtc.c

116

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/sun4i/sun4i_crtc.c

120

if (crtc->state->event && !crtc->state->active) {

drivers/gpu/drm/sun4i/sun4i_crtc.c

121

spin_lock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/sun4i/sun4i_crtc.c

122

drm_crtc_send_vblank_event(crtc, crtc->state->event);

drivers/gpu/drm/sun4i/sun4i_crtc.c

123

spin_unlock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/sun4i/sun4i_crtc.c

125

crtc->state->event = NULL;

drivers/gpu/drm/sun4i/sun4i_crtc.c

129

static void sun4i_crtc_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/sun4i/sun4i_crtc.c

132

struct drm_encoder *encoder = sun4i_crtc_get_encoder(crtc);

drivers/gpu/drm/sun4i/sun4i_crtc.c

133

struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);

drivers/gpu/drm/sun4i/sun4i_crtc.c

139

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/sun4i/sun4i_crtc.c

142

static void sun4i_crtc_mode_set_nofb(struct drm_crtc *crtc)

drivers/gpu/drm/sun4i/sun4i_crtc.c

144

struct drm_display_mode *mode = &crtc->state->adjusted_mode;

drivers/gpu/drm/sun4i/sun4i_crtc.c

145

struct drm_encoder *encoder = sun4i_crtc_get_encoder(crtc);

drivers/gpu/drm/sun4i/sun4i_crtc.c

146

struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);

drivers/gpu/drm/sun4i/sun4i_crtc.c

161

static int sun4i_crtc_enable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/sun4i/sun4i_crtc.c

163

struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);

drivers/gpu/drm/sun4i/sun4i_crtc.c

165

DRM_DEBUG_DRIVER("Enabling VBLANK on crtc %p\n", crtc);

drivers/gpu/drm/sun4i/sun4i_crtc.c

172

static void sun4i_crtc_disable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/sun4i/sun4i_crtc.c

174

struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);

drivers/gpu/drm/sun4i/sun4i_crtc.c

176

DRM_DEBUG_DRIVER("Disabling VBLANK on crtc %p\n", crtc);

drivers/gpu/drm/sun4i/sun4i_crtc.c

230

ret = drm_crtc_init_with_planes(drm, &scrtc->crtc,

drivers/gpu/drm/sun4i/sun4i_crtc.c

240

drm_crtc_helper_add(&scrtc->crtc, &sun4i_crtc_helper_funcs);

drivers/gpu/drm/sun4i/sun4i_crtc.c

243

scrtc->crtc.port = of_graph_get_port_by_id(scrtc->tcon->dev->of_node,

drivers/gpu/drm/sun4i/sun4i_crtc.c

248

uint32_t possible_crtcs = drm_crtc_mask(&scrtc->crtc);

drivers/gpu/drm/sun4i/sun4i_crtc.c

37

static struct drm_encoder *sun4i_crtc_get_encoder(struct drm_crtc *crtc)

drivers/gpu/drm/sun4i/sun4i_crtc.c

41

drm_for_each_encoder(encoder, crtc->dev)

drivers/gpu/drm/sun4i/sun4i_crtc.c

42

if (encoder->crtc == crtc)

drivers/gpu/drm/sun4i/sun4i_crtc.c

48

static int sun4i_crtc_atomic_check(struct drm_crtc *crtc,

drivers/gpu/drm/sun4i/sun4i_crtc.c

52

crtc);

drivers/gpu/drm/sun4i/sun4i_crtc.c

53

struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);

drivers/gpu/drm/sun4i/sun4i_crtc.c

63

static void sun4i_crtc_atomic_begin(struct drm_crtc *crtc,

drivers/gpu/drm/sun4i/sun4i_crtc.c

67

crtc);

drivers/gpu/drm/sun4i/sun4i_crtc.c

68

struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);

drivers/gpu/drm/sun4i/sun4i_crtc.c

69

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/sun4i/sun4i_crtc.c

73

if (crtc->state->event) {

drivers/gpu/drm/sun4i/sun4i_crtc.c

74

WARN_ON(drm_crtc_vblank_get(crtc) != 0);

drivers/gpu/drm/sun4i/sun4i_crtc.c

77

scrtc->event = crtc->state->event;

drivers/gpu/drm/sun4i/sun4i_crtc.c

79

crtc->state->event = NULL;

drivers/gpu/drm/sun4i/sun4i_crtc.c

86

static void sun4i_crtc_atomic_flush(struct drm_crtc *crtc,

drivers/gpu/drm/sun4i/sun4i_crtc.c

89

struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);

drivers/gpu/drm/sun4i/sun4i_crtc.c

90

struct drm_pending_vblank_event *event = crtc->state->event;

drivers/gpu/drm/sun4i/sun4i_crtc.c

94

sunxi_engine_commit(scrtc->engine, crtc, state);

drivers/gpu/drm/sun4i/sun4i_crtc.c

97

crtc->state->event = NULL;

drivers/gpu/drm/sun4i/sun4i_crtc.c

99

spin_lock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/sun4i/sun4i_crtc.h

13

struct drm_crtc crtc;

drivers/gpu/drm/sun4i/sun4i_crtc.h

20

static inline struct sun4i_crtc *drm_crtc_to_sun4i_crtc(struct drm_crtc *crtc)

drivers/gpu/drm/sun4i/sun4i_crtc.h

22

return container_of(crtc, struct sun4i_crtc, crtc);

drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c

96

struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode;

drivers/gpu/drm/sun4i/sun4i_lvds.c

126

lvds->encoder.possible_crtcs = drm_crtc_mask(&tcon->crtc->crtc);

drivers/gpu/drm/sun4i/sun4i_rgb.c

218

rgb->encoder.possible_crtcs = drm_crtc_mask(&tcon->crtc->crtc);

drivers/gpu/drm/sun4i/sun4i_rgb.c

62

static enum drm_mode_status sun4i_rgb_mode_valid(struct drm_encoder *crtc,

drivers/gpu/drm/sun4i/sun4i_rgb.c

65

struct sun4i_rgb *rgb = drm_encoder_to_sun4i_rgb(crtc);

drivers/gpu/drm/sun4i/sun4i_tcon.c

1241

tcon->crtc = sun4i_crtc_init(drm, engine, tcon);

drivers/gpu/drm/sun4i/sun4i_tcon.c

1242

if (IS_ERR(tcon->crtc)) {

drivers/gpu/drm/sun4i/sun4i_tcon.c

1244

ret = PTR_ERR(tcon->crtc);

drivers/gpu/drm/sun4i/sun4i_tcon.c

273

encoder->name, encoder->crtc->name, ret);

drivers/gpu/drm/sun4i/sun4i_tcon.c

746

drm_crtc_send_vblank_event(&scrtc->crtc, scrtc->event);

drivers/gpu/drm/sun4i/sun4i_tcon.c

747

drm_crtc_vblank_put(&scrtc->crtc);

drivers/gpu/drm/sun4i/sun4i_tcon.c

757

struct sun4i_crtc *scrtc = tcon->crtc;

drivers/gpu/drm/sun4i/sun4i_tcon.c

768

drm_crtc_handle_vblank(&scrtc->crtc);

drivers/gpu/drm/sun4i/sun4i_tcon.h

283

struct sun4i_crtc *crtc;

drivers/gpu/drm/sun4i/sun4i_tcon.h

298

void sun4i_tcon_set_status(struct sun4i_tcon *crtc,

drivers/gpu/drm/sun4i/sun4i_tv.c

267

struct sun4i_crtc *crtc = drm_crtc_to_sun4i_crtc(encoder->crtc);

drivers/gpu/drm/sun4i/sun4i_tv.c

275

sunxi_engine_disable_color_correction(crtc->engine);

drivers/gpu/drm/sun4i/sun4i_tv.c

282

struct sun4i_crtc *crtc = drm_crtc_to_sun4i_crtc(encoder->crtc);

drivers/gpu/drm/sun4i/sun4i_tv.c

284

drm_atomic_get_new_crtc_state(state, encoder->crtc);

drivers/gpu/drm/sun4i/sun4i_tv.c

387

sunxi_engine_apply_color_correction(crtc->engine);

drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c

718

struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode;

drivers/gpu/drm/sun4i/sun8i_csc.c

212

if (!state->crtc || !state->visible)

drivers/gpu/drm/sun4i/sun8i_mixer.c

255

struct drm_crtc *crtc,

drivers/gpu/drm/sun4i/sun8i_mixer.c

272

if (!(plane->possible_crtcs & drm_crtc_mask(crtc)))

drivers/gpu/drm/sun4i/sun8i_mixer.c

279

enable = plane_state->crtc && plane_state->visible;

drivers/gpu/drm/sun4i/sun8i_ui_layer.c

166

struct drm_crtc *crtc = new_plane_state->crtc;

drivers/gpu/drm/sun4i/sun8i_ui_layer.c

172

if (!crtc)

drivers/gpu/drm/sun4i/sun8i_ui_layer.c

175

crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/sun4i/sun8i_ui_layer.c

208

if (!new_state->crtc || !new_state->visible) {

drivers/gpu/drm/sun4i/sun8i_vi_layer.c

139

mode = &plane->state->crtc->state->mode;

drivers/gpu/drm/sun4i/sun8i_vi_layer.c

257

struct drm_crtc *crtc = new_plane_state->crtc;

drivers/gpu/drm/sun4i/sun8i_vi_layer.c

263

if (!crtc)

drivers/gpu/drm/sun4i/sun8i_vi_layer.c

266

crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/sun4i/sun8i_vi_layer.c

298

if (!new_state->crtc || !new_state->visible) {

drivers/gpu/drm/sun4i/sun8i_vi_layer.c

67

struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(state->crtc);

drivers/gpu/drm/sun4i/sunxi_engine.h

155

struct drm_crtc *crtc,

drivers/gpu/drm/sun4i/sunxi_engine.h

159

engine->ops->commit(engine, crtc, state);

drivers/gpu/drm/sun4i/sunxi_engine.h

64

struct drm_crtc *crtc,

drivers/gpu/drm/sysfb/drm_sysfb_helper.h

166

enum drm_mode_status drm_sysfb_crtc_helper_mode_valid(struct drm_crtc *crtc,

drivers/gpu/drm/sysfb/drm_sysfb_helper.h

168

int drm_sysfb_crtc_helper_atomic_check(struct drm_crtc *crtc, struct drm_atomic_state *new_state);

drivers/gpu/drm/sysfb/drm_sysfb_helper.h

174

void drm_sysfb_crtc_reset(struct drm_crtc *crtc);

drivers/gpu/drm/sysfb/drm_sysfb_helper.h

175

struct drm_crtc_state *drm_sysfb_crtc_atomic_duplicate_state(struct drm_crtc *crtc);

drivers/gpu/drm/sysfb/drm_sysfb_helper.h

176

void drm_sysfb_crtc_atomic_destroy_state(struct drm_crtc *crtc, struct drm_crtc_state *crtc_state);

drivers/gpu/drm/sysfb/drm_sysfb_modeset.c

261

crtc_state = drm_atomic_get_new_crtc_state(plane_state->state, plane_state->crtc);

drivers/gpu/drm/sysfb/drm_sysfb_modeset.c

293

struct drm_crtc *new_crtc = new_plane_state->crtc;

drivers/gpu/drm/sysfb/drm_sysfb_modeset.c

299

new_crtc_state = drm_atomic_get_new_crtc_state(new_state, new_plane_state->crtc);

drivers/gpu/drm/sysfb/drm_sysfb_modeset.c

310

new_crtc_state = drm_atomic_get_new_crtc_state(new_state, new_plane_state->crtc);

drivers/gpu/drm/sysfb/drm_sysfb_modeset.c

339

struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, plane_state->crtc);

drivers/gpu/drm/sysfb/drm_sysfb_modeset.c

480

enum drm_mode_status drm_sysfb_crtc_helper_mode_valid(struct drm_crtc *crtc,

drivers/gpu/drm/sysfb/drm_sysfb_modeset.c

483

struct drm_sysfb_device *sysfb = to_drm_sysfb_device(crtc->dev);

drivers/gpu/drm/sysfb/drm_sysfb_modeset.c

485

return drm_crtc_helper_mode_valid_fixed(crtc, mode, &sysfb->fb_mode);

drivers/gpu/drm/sysfb/drm_sysfb_modeset.c

489

int drm_sysfb_crtc_helper_atomic_check(struct drm_crtc *crtc, struct drm_atomic_state *new_state)

drivers/gpu/drm/sysfb/drm_sysfb_modeset.c

491

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/sysfb/drm_sysfb_modeset.c

493

struct drm_crtc_state *new_crtc_state = drm_atomic_get_new_crtc_state(new_state, crtc);

drivers/gpu/drm/sysfb/drm_sysfb_modeset.c

518

void drm_sysfb_crtc_reset(struct drm_crtc *crtc)

drivers/gpu/drm/sysfb/drm_sysfb_modeset.c

520

struct drm_sysfb_device *sysfb = to_drm_sysfb_device(crtc->dev);

drivers/gpu/drm/sysfb/drm_sysfb_modeset.c

523

if (crtc->state)

drivers/gpu/drm/sysfb/drm_sysfb_modeset.c

524

drm_sysfb_crtc_state_destroy(to_drm_sysfb_crtc_state(crtc->state));

drivers/gpu/drm/sysfb/drm_sysfb_modeset.c

529

__drm_atomic_helper_crtc_reset(crtc, &sysfb_crtc_state->base);

drivers/gpu/drm/sysfb/drm_sysfb_modeset.c

531

__drm_atomic_helper_crtc_reset(crtc, NULL);

drivers/gpu/drm/sysfb/drm_sysfb_modeset.c

536

struct drm_crtc_state *drm_sysfb_crtc_atomic_duplicate_state(struct drm_crtc *crtc)

drivers/gpu/drm/sysfb/drm_sysfb_modeset.c

538

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/sysfb/drm_sysfb_modeset.c

539

struct drm_crtc_state *crtc_state = crtc->state;

drivers/gpu/drm/sysfb/drm_sysfb_modeset.c

552

__drm_atomic_helper_crtc_duplicate_state(crtc, &new_sysfb_crtc_state->base);

drivers/gpu/drm/sysfb/drm_sysfb_modeset.c

559

void drm_sysfb_crtc_atomic_destroy_state(struct drm_crtc *crtc, struct drm_crtc_state *crtc_state)

drivers/gpu/drm/sysfb/efidrm.c

155

struct drm_crtc *crtc;

drivers/gpu/drm/sysfb/efidrm.c

308

crtc = &efi->crtc;

drivers/gpu/drm/sysfb/efidrm.c

309

ret = drm_crtc_init_with_planes(dev, crtc, primary_plane, NULL,

drivers/gpu/drm/sysfb/efidrm.c

313

drm_crtc_helper_add(crtc, &efidrm_crtc_helper_funcs);

drivers/gpu/drm/sysfb/efidrm.c

322

encoder->possible_crtcs = drm_crtc_mask(crtc);

drivers/gpu/drm/sysfb/efidrm.c

88

struct drm_crtc crtc;

drivers/gpu/drm/sysfb/ofdrm.c

1033

crtc = &odev->crtc;

drivers/gpu/drm/sysfb/ofdrm.c

1034

ret = drm_crtc_init_with_planes(dev, crtc, primary_plane, NULL,

drivers/gpu/drm/sysfb/ofdrm.c

1038

drm_crtc_helper_add(crtc, &ofdrm_crtc_helper_funcs);

drivers/gpu/drm/sysfb/ofdrm.c

1041

ret = drm_mode_crtc_set_gamma_size(crtc, sysfb->fb_gamma_lut_size);

drivers/gpu/drm/sysfb/ofdrm.c

1043

drm_crtc_enable_color_mgmt(crtc, 0, false, sysfb->fb_gamma_lut_size);

drivers/gpu/drm/sysfb/ofdrm.c

1052

encoder->possible_crtcs = drm_crtc_mask(crtc);

drivers/gpu/drm/sysfb/ofdrm.c

310

struct drm_crtc crtc;

drivers/gpu/drm/sysfb/ofdrm.c

648

static void ofdrm_set_gamma_lut(struct drm_crtc *crtc, unsigned int index,

drivers/gpu/drm/sysfb/ofdrm.c

651

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/sysfb/ofdrm.c

668

struct drm_crtc *crtc = &odev->crtc;

drivers/gpu/drm/sysfb/ofdrm.c

673

drm_crtc_fill_gamma_565(crtc, ofdrm_set_gamma_lut);

drivers/gpu/drm/sysfb/ofdrm.c

677

drm_crtc_fill_gamma_888(crtc, ofdrm_set_gamma_lut);

drivers/gpu/drm/sysfb/ofdrm.c

691

struct drm_crtc *crtc = &odev->crtc;

drivers/gpu/drm/sysfb/ofdrm.c

696

drm_crtc_load_gamma_565_from_888(crtc, lut, ofdrm_set_gamma_lut);

drivers/gpu/drm/sysfb/ofdrm.c

700

drm_crtc_load_gamma_888(crtc, lut, ofdrm_set_gamma_lut);

drivers/gpu/drm/sysfb/ofdrm.c

726

static void ofdrm_crtc_helper_atomic_flush(struct drm_crtc *crtc, struct drm_atomic_state *state)

drivers/gpu/drm/sysfb/ofdrm.c

728

struct ofdrm_device *odev = ofdrm_device_of_dev(crtc->dev);

drivers/gpu/drm/sysfb/ofdrm.c

729

struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/sysfb/ofdrm.c

833

struct drm_crtc *crtc;

drivers/gpu/drm/sysfb/simpledrm.c

228

struct drm_crtc crtc;

drivers/gpu/drm/sysfb/simpledrm.c

607

struct drm_crtc *crtc;

drivers/gpu/drm/sysfb/simpledrm.c

779

crtc = &sdev->crtc;

drivers/gpu/drm/sysfb/simpledrm.c

780

ret = drm_crtc_init_with_planes(dev, crtc, primary_plane, NULL,

drivers/gpu/drm/sysfb/simpledrm.c

784

drm_crtc_helper_add(crtc, &simpledrm_crtc_helper_funcs);

drivers/gpu/drm/sysfb/simpledrm.c

793

encoder->possible_crtcs = drm_crtc_mask(crtc);

drivers/gpu/drm/sysfb/vesadrm.c

132

static void vesadrm_set_color_lut(struct drm_crtc *crtc, unsigned int index,

drivers/gpu/drm/sysfb/vesadrm.c

135

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/sysfb/vesadrm.c

149

struct drm_crtc *crtc = &vesa->crtc;

drivers/gpu/drm/sysfb/vesadrm.c

153

drm_crtc_fill_gamma_555(crtc, vesadrm_set_color_lut);

drivers/gpu/drm/sysfb/vesadrm.c

156

drm_crtc_fill_gamma_565(crtc, vesadrm_set_color_lut);

drivers/gpu/drm/sysfb/vesadrm.c

161

drm_crtc_fill_gamma_888(crtc, vesadrm_set_color_lut);

drivers/gpu/drm/sysfb/vesadrm.c

175

struct drm_crtc *crtc = &vesa->crtc;

drivers/gpu/drm/sysfb/vesadrm.c

179

drm_crtc_load_gamma_555_from_888(crtc, lut, vesadrm_set_color_lut);

drivers/gpu/drm/sysfb/vesadrm.c

182

drm_crtc_load_gamma_565_from_888(crtc, lut, vesadrm_set_color_lut);

drivers/gpu/drm/sysfb/vesadrm.c

187

drm_crtc_load_gamma_888(crtc, lut, vesadrm_set_color_lut);

drivers/gpu/drm/sysfb/vesadrm.c

200

struct drm_crtc *crtc = &vesa->crtc;

drivers/gpu/drm/sysfb/vesadrm.c

204

drm_crtc_fill_palette_8(crtc, vesadrm_set_color_lut);

drivers/gpu/drm/sysfb/vesadrm.c

207

drm_crtc_fill_palette_332(crtc, vesadrm_set_color_lut);

drivers/gpu/drm/sysfb/vesadrm.c

221

struct drm_crtc *crtc = &vesa->crtc;

drivers/gpu/drm/sysfb/vesadrm.c

225

drm_crtc_load_palette_8(crtc, lut, vesadrm_set_color_lut);

drivers/gpu/drm/sysfb/vesadrm.c

264

new_crtc_state = drm_atomic_get_new_crtc_state(new_state, new_plane_state->crtc);

drivers/gpu/drm/sysfb/vesadrm.c

311

static void vesadrm_crtc_helper_atomic_flush(struct drm_crtc *crtc,

drivers/gpu/drm/sysfb/vesadrm.c

314

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/sysfb/vesadrm.c

317

struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/sysfb/vesadrm.c

332

} else if (crtc->state->gamma_lut) {

drivers/gpu/drm/sysfb/vesadrm.c

406

struct drm_crtc *crtc;

drivers/gpu/drm/sysfb/vesadrm.c

548

crtc = &vesa->crtc;

drivers/gpu/drm/sysfb/vesadrm.c

549

ret = drm_crtc_init_with_planes(dev, crtc, primary_plane, NULL,

drivers/gpu/drm/sysfb/vesadrm.c

553

drm_crtc_helper_add(crtc, &vesadrm_crtc_helper_funcs);

drivers/gpu/drm/sysfb/vesadrm.c

556

ret = drm_mode_crtc_set_gamma_size(crtc, sysfb->fb_gamma_lut_size);

drivers/gpu/drm/sysfb/vesadrm.c

558

drm_crtc_enable_color_mgmt(crtc, 0, false, sysfb->fb_gamma_lut_size);

drivers/gpu/drm/sysfb/vesadrm.c

568

encoder->possible_crtcs = drm_crtc_mask(crtc);

drivers/gpu/drm/sysfb/vesadrm.c

75

struct drm_crtc crtc;

drivers/gpu/drm/tegra/dc.c

1019

if (!old_state || !old_state->crtc)

drivers/gpu/drm/tegra/dc.c

1022

dc = to_tegra_dc(old_state->crtc);

drivers/gpu/drm/tegra/dc.c

1037

crtc_state = drm_atomic_get_new_crtc_state(state, new_state->crtc);

drivers/gpu/drm/tegra/dc.c

1044

if (plane->state->crtc != new_state->crtc ||

drivers/gpu/drm/tegra/dc.c

1071

struct tegra_dc *dc = to_tegra_dc(new_state->crtc);

drivers/gpu/drm/tegra/dc.c

1385

static void tegra_dc_destroy(struct drm_crtc *crtc)

drivers/gpu/drm/tegra/dc.c

1387

drm_crtc_cleanup(crtc);

drivers/gpu/drm/tegra/dc.c

1390

static void tegra_crtc_reset(struct drm_crtc *crtc)

drivers/gpu/drm/tegra/dc.c

1394

if (crtc->state)

drivers/gpu/drm/tegra/dc.c

1395

tegra_crtc_atomic_destroy_state(crtc, crtc->state);

drivers/gpu/drm/tegra/dc.c

1398

__drm_atomic_helper_crtc_reset(crtc, &state->base);

drivers/gpu/drm/tegra/dc.c

1400

__drm_atomic_helper_crtc_reset(crtc, NULL);

drivers/gpu/drm/tegra/dc.c

1404

tegra_crtc_atomic_duplicate_state(struct drm_crtc *crtc)

drivers/gpu/drm/tegra/dc.c

1406

struct tegra_dc_state *state = to_dc_state(crtc->state);

drivers/gpu/drm/tegra/dc.c

1413

__drm_atomic_helper_crtc_duplicate_state(crtc, &copy->base);

drivers/gpu/drm/tegra/dc.c

1422

static void tegra_crtc_atomic_destroy_state(struct drm_crtc *crtc,

drivers/gpu/drm/tegra/dc.c

1727

static int tegra_dc_late_register(struct drm_crtc *crtc)

drivers/gpu/drm/tegra/dc.c

1730

struct drm_minor *minor = crtc->dev->primary;

drivers/gpu/drm/tegra/dc.c

1732

struct tegra_dc *dc = to_tegra_dc(crtc);

drivers/gpu/drm/tegra/dc.c

1735

root = crtc->debugfs_entry;

drivers/gpu/drm/tegra/dc.c

1753

static void tegra_dc_early_unregister(struct drm_crtc *crtc)

drivers/gpu/drm/tegra/dc.c

1756

struct drm_minor *minor = crtc->dev->primary;

drivers/gpu/drm/tegra/dc.c

1757

struct tegra_dc *dc = to_tegra_dc(crtc);

drivers/gpu/drm/tegra/dc.c

1761

root = crtc->debugfs_entry;

drivers/gpu/drm/tegra/dc.c

1771

static u32 tegra_dc_get_vblank_counter(struct drm_crtc *crtc)

drivers/gpu/drm/tegra/dc.c

1773

struct tegra_dc *dc = to_tegra_dc(crtc);

drivers/gpu/drm/tegra/dc.c

1783

static int tegra_dc_enable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/tegra/dc.c

1785

struct tegra_dc *dc = to_tegra_dc(crtc);

drivers/gpu/drm/tegra/dc.c

1795

static void tegra_dc_disable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/tegra/dc.c

1797

struct tegra_dc *dc = to_tegra_dc(crtc);

drivers/gpu/drm/tegra/dc.c

2000

tegra_crtc_update_memory_bandwidth(struct drm_crtc *crtc,

drivers/gpu/drm/tegra/dc.c

2009

struct tegra_dc *dc = to_tegra_dc(crtc);

drivers/gpu/drm/tegra/dc.c

2016

old_crtc_state = drm_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/tegra/dc.c

2018

if (!crtc->state->active) {

drivers/gpu/drm/tegra/dc.c

2027

drm_atomic_crtc_for_each_plane(plane, crtc) {

drivers/gpu/drm/tegra/dc.c

2096

static void tegra_crtc_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/tegra/dc.c

2099

struct tegra_dc *dc = to_tegra_dc(crtc);

drivers/gpu/drm/tegra/dc.c

2137

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/tegra/dc.c

2139

spin_lock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/tegra/dc.c

2141

if (crtc->state->event) {

drivers/gpu/drm/tegra/dc.c

2142

drm_crtc_send_vblank_event(crtc, crtc->state->event);

drivers/gpu/drm/tegra/dc.c

2143

crtc->state->event = NULL;

drivers/gpu/drm/tegra/dc.c

2146

spin_unlock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/tegra/dc.c

2160

static void tegra_crtc_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/tegra/dc.c

2163

struct drm_display_mode *mode = &crtc->state->adjusted_mode;

drivers/gpu/drm/tegra/dc.c

2164

struct tegra_dc_state *crtc_state = to_dc_state(crtc->state);

drivers/gpu/drm/tegra/dc.c

2165

struct tegra_dc *dc = to_tegra_dc(crtc);

drivers/gpu/drm/tegra/dc.c

2288

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/tegra/dc.c

2291

static void tegra_crtc_atomic_begin(struct drm_crtc *crtc,

drivers/gpu/drm/tegra/dc.c

2296

tegra_crtc_update_memory_bandwidth(crtc, state, true);

drivers/gpu/drm/tegra/dc.c

2298

if (crtc->state->event) {

drivers/gpu/drm/tegra/dc.c

2299

spin_lock_irqsave(&crtc->dev->event_lock, flags);

drivers/gpu/drm/tegra/dc.c

2301

if (drm_crtc_vblank_get(crtc) != 0)

drivers/gpu/drm/tegra/dc.c

2302

drm_crtc_send_vblank_event(crtc, crtc->state->event);

drivers/gpu/drm/tegra/dc.c

2304

drm_crtc_arm_vblank_event(crtc, crtc->state->event);

drivers/gpu/drm/tegra/dc.c

2306

spin_unlock_irqrestore(&crtc->dev->event_lock, flags);

drivers/gpu/drm/tegra/dc.c

2308

crtc->state->event = NULL;

drivers/gpu/drm/tegra/dc.c

2312

static void tegra_crtc_atomic_flush(struct drm_crtc *crtc,

drivers/gpu/drm/tegra/dc.c

2316

crtc);

drivers/gpu/drm/tegra/dc.c

2318

struct tegra_dc *dc = to_tegra_dc(crtc);

drivers/gpu/drm/tegra/dc.c

2332

const struct tegra_dc_soc_info *soc = to_tegra_dc(state->crtc)->soc;

drivers/gpu/drm/tegra/dc.c

2392

static int tegra_crtc_calculate_memory_bandwidth(struct drm_crtc *crtc,

drivers/gpu/drm/tegra/dc.c

2400

struct tegra_dc *dc = to_tegra_dc(crtc);

drivers/gpu/drm/tegra/dc.c

2414

new_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/tegra/dc.c

2504

static int tegra_crtc_atomic_check(struct drm_crtc *crtc,

drivers/gpu/drm/tegra/dc.c

2509

err = tegra_crtc_calculate_memory_bandwidth(crtc, state);

drivers/gpu/drm/tegra/dc.c

2516

void tegra_crtc_atomic_post_commit(struct drm_crtc *crtc,

drivers/gpu/drm/tegra/dc.c

2524

tegra_crtc_update_memory_bandwidth(crtc, state, false);

drivers/gpu/drm/tegra/dc.c

39

static void tegra_crtc_atomic_destroy_state(struct drm_crtc *crtc,

drivers/gpu/drm/tegra/dc.c

630

struct tegra_dc *dc = to_tegra_dc(new_plane_state->crtc);

drivers/gpu/drm/tegra/dc.c

637

if (!new_plane_state->crtc) {

drivers/gpu/drm/tegra/dc.c

719

if (!old_state || !old_state->crtc)

drivers/gpu/drm/tegra/dc.c

739

if (!new_state->crtc || !new_state->fb)

drivers/gpu/drm/tegra/dc.c

879

if (!new_plane_state->crtc) {

drivers/gpu/drm/tegra/dc.c

908

struct tegra_dc *dc = to_tegra_dc(new_state->crtc);

drivers/gpu/drm/tegra/dc.c

917

if (!new_state->crtc || !new_state->fb)

drivers/gpu/drm/tegra/dc.h

114

static inline struct tegra_dc *to_tegra_dc(struct drm_crtc *crtc)

drivers/gpu/drm/tegra/dc.h

116

return crtc ? container_of(crtc, struct tegra_dc, base) : NULL;

drivers/gpu/drm/tegra/dc.h

167

void tegra_crtc_atomic_post_commit(struct drm_crtc *crtc,

drivers/gpu/drm/tegra/drm.c

68

struct drm_crtc *crtc;

drivers/gpu/drm/tegra/drm.c

71

for_each_old_crtc_in_state(old_state, crtc, old_crtc_state, i)

drivers/gpu/drm/tegra/drm.c

72

tegra_crtc_atomic_post_commit(crtc, old_state);

drivers/gpu/drm/tegra/dsi.c

204

struct drm_crtc *crtc = dsi->output.encoder.crtc;

drivers/gpu/drm/tegra/dsi.c

211

if (!crtc || !crtc->state->active) {

drivers/gpu/drm/tegra/dsi.c

847

struct tegra_dc *dc = to_tegra_dc(encoder->crtc);

drivers/gpu/drm/tegra/dsi.c

910

struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode;

drivers/gpu/drm/tegra/dsi.c

912

struct tegra_dc *dc = to_tegra_dc(encoder->crtc);

drivers/gpu/drm/tegra/dsi.c

960

struct tegra_dc *dc = to_tegra_dc(conn_state->crtc);

drivers/gpu/drm/tegra/hdmi.c

1066

struct drm_crtc *crtc = hdmi->output.encoder.crtc;

drivers/gpu/drm/tegra/hdmi.c

1073

if (!crtc || !crtc->state->active) {

drivers/gpu/drm/tegra/hdmi.c

1168

struct tegra_dc *dc = to_tegra_dc(encoder->crtc);

drivers/gpu/drm/tegra/hdmi.c

1210

struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode;

drivers/gpu/drm/tegra/hdmi.c

1213

struct tegra_dc *dc = to_tegra_dc(encoder->crtc);

drivers/gpu/drm/tegra/hdmi.c

1443

struct tegra_dc *dc = to_tegra_dc(conn_state->crtc);

drivers/gpu/drm/tegra/hub.c

434

struct tegra_dc *dc = to_tegra_dc(new_plane_state->crtc);

drivers/gpu/drm/tegra/hub.c

438

if (!new_plane_state->crtc || !new_plane_state->fb)

drivers/gpu/drm/tegra/hub.c

495

if (!old_state || !old_state->crtc)

drivers/gpu/drm/tegra/hub.c

498

dc = to_tegra_dc(old_state->crtc);

drivers/gpu/drm/tegra/hub.c

540

struct tegra_dc *dc = to_tegra_dc(new_state->crtc);

drivers/gpu/drm/tegra/hub.c

551

if (!new_state->crtc || !new_state->fb)

drivers/gpu/drm/tegra/hub.c

852

struct drm_crtc *crtc;

drivers/gpu/drm/tegra/hub.c

870

for_each_oldnew_crtc_in_state(state, crtc, old, new, i) {

drivers/gpu/drm/tegra/hub.c

875

hub_state->dc = to_tegra_dc(dc->base.crtc);

drivers/gpu/drm/tegra/output.c

250

struct drm_crtc *crtc;

drivers/gpu/drm/tegra/output.c

253

drm_for_each_crtc(crtc, drm) {

drivers/gpu/drm/tegra/output.c

254

struct tegra_dc *dc = to_tegra_dc(crtc);

drivers/gpu/drm/tegra/output.c

257

mask |= drm_crtc_mask(crtc);

drivers/gpu/drm/tegra/plane.c

203

struct tegra_dc *dc = to_tegra_dc(state->crtc);

drivers/gpu/drm/tegra/plane.c

219

struct tegra_dc *dc = to_tegra_dc(state->crtc);

drivers/gpu/drm/tegra/plane.c

237

crtc_state = drm_atomic_get_new_crtc_state(state->state, state->crtc);

drivers/gpu/drm/tegra/plane.c

247

soc = to_tegra_dc(state->crtc)->soc;

drivers/gpu/drm/tegra/plane.c

305

crtc_state = drm_atomic_get_crtc_state(state->state, state->crtc);

drivers/gpu/drm/tegra/plane.c

93

struct drm_crtc *crtc;

drivers/gpu/drm/tegra/plane.c

95

drm_for_each_crtc(crtc, plane->dev) {

drivers/gpu/drm/tegra/plane.c

96

if (plane->possible_crtcs & drm_crtc_mask(crtc)) {

drivers/gpu/drm/tegra/plane.c

97

struct tegra_dc *dc = to_tegra_dc(crtc);

drivers/gpu/drm/tegra/rgb.c

102

struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode;

drivers/gpu/drm/tegra/rgb.c

153

struct tegra_dc *dc = to_tegra_dc(conn_state->crtc);

drivers/gpu/drm/tegra/sor.c

1290

struct tegra_dc *dc = to_tegra_dc(sor->output.encoder.crtc);

drivers/gpu/drm/tegra/sor.c

1495

struct drm_crtc *crtc = sor->output.encoder.crtc;

drivers/gpu/drm/tegra/sor.c

1502

if (!crtc || !crtc->state->active) {

drivers/gpu/drm/tegra/sor.c

1657

struct drm_crtc *crtc = sor->output.encoder.crtc;

drivers/gpu/drm/tegra/sor.c

1664

if (!crtc || !crtc->state->active) {

drivers/gpu/drm/tegra/sor.c

1810

struct tegra_dc *dc = to_tegra_dc(conn_state->crtc);

drivers/gpu/drm/tegra/sor.c

2197

mode = &sor->output.encoder.crtc->state->adjusted_mode;

drivers/gpu/drm/tegra/sor.c

2209

struct tegra_dc *dc = to_tegra_dc(encoder->crtc);

drivers/gpu/drm/tegra/sor.c

2251

struct tegra_dc *dc = to_tegra_dc(encoder->crtc);

drivers/gpu/drm/tegra/sor.c

2262

mode = &encoder->crtc->state->adjusted_mode;

drivers/gpu/drm/tegra/sor.c

2657

struct tegra_dc *dc = to_tegra_dc(encoder->crtc);

drivers/gpu/drm/tegra/sor.c

2721

struct tegra_dc *dc = to_tegra_dc(encoder->crtc);

drivers/gpu/drm/tegra/sor.c

2732

mode = &encoder->crtc->state->adjusted_mode;

drivers/gpu/drm/tests/drm_atomic_state_test.c

101

KUNIT_ASSERT_NOT_ERR_OR_NULL(test, priv->crtc);

drivers/gpu/drm/tests/drm_atomic_state_test.c

110

enc->possible_crtcs = drm_crtc_mask(priv->crtc);

drivers/gpu/drm/tests/drm_atomic_state_test.c

148

struct drm_crtc *crtc = priv->crtc;

drivers/gpu/drm/tests/drm_atomic_state_test.c

162

ret = drm_atomic_set_crtc_for_connector(conn_state, crtc);

drivers/gpu/drm/tests/drm_atomic_state_test.c

167

crtc_state = drm_atomic_get_crtc_state(state, crtc);

drivers/gpu/drm/tests/drm_atomic_state_test.c

235

ret = drm_atomic_set_crtc_for_connector(new_conn_state, priv->crtc);

drivers/gpu/drm/tests/drm_atomic_state_test.c

304

crtc_state = drm_atomic_get_crtc_state(state, priv->crtc);

drivers/gpu/drm/tests/drm_atomic_state_test.c

35

struct drm_crtc *crtc;

drivers/gpu/drm/tests/drm_atomic_state_test.c

97

priv->crtc = drm_kunit_helper_create_crtc(test, drm,

drivers/gpu/drm/tests/drm_atomic_test.c

112

priv->crtc, &priv->connector,

drivers/gpu/drm/tests/drm_atomic_test.c

17

struct drm_crtc *crtc;

drivers/gpu/drm/tests/drm_atomic_test.c

38

struct drm_crtc *crtc;

drivers/gpu/drm/tests/drm_atomic_test.c

62

crtc = drm_kunit_helper_create_crtc(test, drm,

drivers/gpu/drm/tests/drm_atomic_test.c

66

if (IS_ERR(crtc))

drivers/gpu/drm/tests/drm_atomic_test.c

67

return ERR_CAST(crtc);

drivers/gpu/drm/tests/drm_atomic_test.c

68

priv->crtc = crtc;

drivers/gpu/drm/tests/drm_atomic_test.c

75

enc->possible_crtcs = drm_crtc_mask(crtc);

drivers/gpu/drm/tests/drm_bridge_test.c

147

priv->crtc = drm_kunit_helper_create_crtc(test, drm,

drivers/gpu/drm/tests/drm_bridge_test.c

151

if (IS_ERR(priv->crtc))

drivers/gpu/drm/tests/drm_bridge_test.c

152

return ERR_CAST(priv->crtc);

drivers/gpu/drm/tests/drm_bridge_test.c

159

enc->possible_crtcs = drm_crtc_mask(priv->crtc);

drivers/gpu/drm/tests/drm_bridge_test.c

301

&priv->drm, priv->crtc,

drivers/gpu/drm/tests/drm_bridge_test.c

33

struct drm_crtc *crtc;

drivers/gpu/drm/tests/drm_bridge_test.c

396

&priv->drm, priv->crtc,

drivers/gpu/drm/tests/drm_damage_helper_test.c

222

mock->state.crtc = NULL;

drivers/gpu/drm/tests/drm_damage_helper_test.c

36

mock->state.crtc = ZERO_SIZE_PTR;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1020

crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1044

struct drm_crtc *crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1055

crtc = priv->crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1064

crtc, conn,

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1100

crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1121

struct drm_crtc *crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1134

crtc = priv->crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1146

crtc, conn,

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1178

struct drm_crtc *crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1189

crtc = priv->crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1199

crtc, conn,

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1233

struct drm_crtc *crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1244

crtc = priv->crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1254

crtc, conn,

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1288

struct drm_crtc *crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1299

crtc = priv->crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1309

crtc, conn,

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1347

struct drm_crtc *crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1356

crtc = priv->crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1366

crtc, conn,

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1382

crtc_state = drm_atomic_get_crtc_state(state, crtc);

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1415

struct drm_crtc *crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1426

crtc = priv->crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1446

crtc, conn,

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1489

struct drm_crtc *crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1501

crtc = priv->crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1521

ret = drm_kunit_helper_enable_crtc_connector(test, drm, crtc, conn,

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1564

struct drm_crtc *crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1577

crtc = priv->crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1600

crtc, conn,

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1643

struct drm_crtc *crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1655

crtc = priv->crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1679

ret = drm_kunit_helper_enable_crtc_connector(test, drm, crtc, conn,

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1714

struct drm_crtc *crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1725

crtc = priv->crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1742

ret = drm_kunit_helper_enable_crtc_connector(test, drm, crtc, conn,

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1759

crtc_state = drm_atomic_get_crtc_state(state, crtc);

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1799

struct drm_crtc *crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1832

crtc = priv->crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1836

crtc, conn,

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1870

struct drm_crtc *crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1881

crtc = priv->crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1909

crtc, conn,

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1943

struct drm_crtc *crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1956

crtc = priv->crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1984

crtc, conn,

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

2019

struct drm_crtc *crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

2030

crtc = priv->crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

2050

crtc, conn,

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

2085

struct drm_crtc *crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

2098

crtc = priv->crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

2118

crtc, conn,

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

2149

struct drm_crtc *crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

2164

crtc = priv->crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

2168

crtc, conn,

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

2181

crtc_state = drm_atomic_get_crtc_state(state, crtc);

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

229

priv->crtc = drm_kunit_helper_create_crtc(test, drm,

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

233

KUNIT_ASSERT_NOT_ERR_OR_NULL(test, priv->crtc);

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

239

enc->possible_crtcs = drm_crtc_mask(priv->crtc);

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

2538

struct drm_crtc *crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

2550

crtc = priv->crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

2560

crtc, conn,

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

2574

crtc_state = drm_atomic_get_crtc_state(state, crtc);

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

2641

struct drm_crtc *crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

2653

crtc = priv->crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

2663

crtc, conn,

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

2679

crtc_state = drm_atomic_get_crtc_state(state, crtc);

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

2745

struct drm_crtc *crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

2757

crtc = priv->crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

2767

crtc, conn,

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

2792

crtc_state = drm_atomic_get_crtc_state(state, crtc);

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

2856

struct drm_crtc *crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

2871

crtc = priv->crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

2881

crtc, conn,

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

2906

crtc_state = drm_atomic_get_crtc_state(state, crtc);

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

299

struct drm_crtc *crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

2993

struct drm_crtc *crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

3006

crtc = priv->crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

3016

crtc, conn,

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

3032

crtc_state = drm_atomic_get_crtc_state(state, crtc);

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

308

crtc = priv->crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

3083

crtc_state = drm_atomic_get_crtc_state(state, crtc);

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

318

crtc, conn,

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

32

struct drm_crtc *crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

350

crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

374

struct drm_crtc *crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

383

crtc = priv->crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

393

crtc, conn,

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

427

crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

449

struct drm_crtc *crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

458

crtc = priv->crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

470

crtc, conn,

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

516

struct drm_crtc *crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

533

crtc = priv->crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

537

crtc, conn,

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

583

struct drm_crtc *crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

592

crtc = priv->crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

604

crtc, conn,

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

652

struct drm_crtc *crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

669

crtc = priv->crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

673

crtc, conn,

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

721

struct drm_crtc *crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

730

crtc = priv->crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

742

crtc, conn,

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

790

struct drm_crtc *crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

807

crtc = priv->crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

811

crtc, conn,

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

860

struct drm_crtc *crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

874

crtc = priv->crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

884

ret = drm_kunit_helper_enable_crtc_connector(test, drm, crtc, conn,

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

962

struct drm_crtc *crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

973

crtc = priv->crtc;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

982

crtc, conn,

drivers/gpu/drm/tests/drm_kunit_helpers.c

251

struct drm_crtc *crtc;

drivers/gpu/drm/tests/drm_kunit_helpers.c

260

crtc = drmm_kzalloc(drm, sizeof(*crtc), GFP_KERNEL);

drivers/gpu/drm/tests/drm_kunit_helpers.c

261

KUNIT_ASSERT_NOT_NULL(test, crtc);

drivers/gpu/drm/tests/drm_kunit_helpers.c

263

ret = drmm_crtc_init_with_planes(drm, crtc,

drivers/gpu/drm/tests/drm_kunit_helpers.c

270

drm_crtc_helper_add(crtc, helper_funcs);

drivers/gpu/drm/tests/drm_kunit_helpers.c

272

return crtc;

drivers/gpu/drm/tests/drm_kunit_helpers.c

295

struct drm_crtc *crtc,

drivers/gpu/drm/tests/drm_kunit_helpers.c

313

ret = drm_atomic_set_crtc_for_connector(conn_state, crtc);

drivers/gpu/drm/tests/drm_kunit_helpers.c

317

crtc_state = drm_atomic_get_crtc_state(state, crtc);

drivers/gpu/drm/tests/drm_plane_helper_test.c

143

.crtc = { 0, 0, 2048, 2048 },

drivers/gpu/drm/tests/drm_plane_helper_test.c

157

.crtc = { 0, 0, 2048, 2048 },

drivers/gpu/drm/tests/drm_plane_helper_test.c

16

.crtc = ZERO_SIZE_PTR,

drivers/gpu/drm/tests/drm_plane_helper_test.c

169

.crtc = { 0, 0, 1023, 767 },

drivers/gpu/drm/tests/drm_plane_helper_test.c

181

.crtc = { 0, 0, 1024, 768 },

drivers/gpu/drm/tests/drm_plane_helper_test.c

193

.crtc = { 0, 0, 1024, 768 },

drivers/gpu/drm/tests/drm_plane_helper_test.c

205

.crtc = { 1022, 766, 4, 4 },

drivers/gpu/drm/tests/drm_plane_helper_test.c

217

.crtc = { -2, -2, 1028, 772 },

drivers/gpu/drm/tests/drm_plane_helper_test.c

229

.crtc = { 1022, 766, 4, 4 },

drivers/gpu/drm/tests/drm_plane_helper_test.c

242

.crtc = { -2, -2, 1028, 772 },

drivers/gpu/drm/tests/drm_plane_helper_test.c

272

.crtc = { 0, 0, 1023, 767 },

drivers/gpu/drm/tests/drm_plane_helper_test.c

282

.crtc = { 0, 0, 1024, 768 },

drivers/gpu/drm/tests/drm_plane_helper_test.c

292

.crtc = { 0, 0, 1024, 768 },

drivers/gpu/drm/tests/drm_plane_helper_test.c

40

} crtc, crtc_expected;

drivers/gpu/drm/tests/drm_plane_helper_test.c

65

mock->crtc = ZERO_SIZE_PTR;

drivers/gpu/drm/tests/drm_plane_helper_test.c

72

mock->crtc_x = params->crtc.x;

drivers/gpu/drm/tests/drm_plane_helper_test.c

73

mock->crtc_y = params->crtc.y;

drivers/gpu/drm/tests/drm_plane_helper_test.c

74

mock->crtc_w = params->crtc.w;

drivers/gpu/drm/tests/drm_plane_helper_test.c

75

mock->crtc_h = params->crtc.h;

drivers/gpu/drm/tidss/tidss_crtc.c

122

struct drm_crtc *crtc,

drivers/gpu/drm/tidss/tidss_crtc.c

127

struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);

drivers/gpu/drm/tidss/tidss_crtc.c

128

struct drm_crtc_state *cstate = crtc->state;

drivers/gpu/drm/tidss/tidss_crtc.c

142

if (pstate->crtc != crtc || !pstate->visible)

drivers/gpu/drm/tidss/tidss_crtc.c

164

static void tidss_crtc_atomic_flush(struct drm_crtc *crtc,

drivers/gpu/drm/tidss/tidss_crtc.c

168

crtc);

drivers/gpu/drm/tidss/tidss_crtc.c

169

struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);

drivers/gpu/drm/tidss/tidss_crtc.c

170

struct drm_device *ddev = crtc->dev;

drivers/gpu/drm/tidss/tidss_crtc.c

175

__func__, crtc->name, crtc->state->active ? "" : "not ",

drivers/gpu/drm/tidss/tidss_crtc.c

176

drm_atomic_crtc_needs_modeset(crtc->state) ? "needs" : "doesn't need",

drivers/gpu/drm/tidss/tidss_crtc.c

177

crtc->state->event);

drivers/gpu/drm/tidss/tidss_crtc.c

183

if (drm_atomic_crtc_needs_modeset(crtc->state))

drivers/gpu/drm/tidss/tidss_crtc.c

191

if (WARN_ON(!crtc->state->event))

drivers/gpu/drm/tidss/tidss_crtc.c

195

dispc_vp_setup(tidss->dispc, tcrtc->hw_videoport, crtc->state, false);

drivers/gpu/drm/tidss/tidss_crtc.c

198

tidss_crtc_position_planes(tidss, crtc, old_crtc_state, false);

drivers/gpu/drm/tidss/tidss_crtc.c

200

WARN_ON(drm_crtc_vblank_get(crtc) != 0);

drivers/gpu/drm/tidss/tidss_crtc.c

207

tcrtc->event = crtc->state->event;

drivers/gpu/drm/tidss/tidss_crtc.c

208

crtc->state->event = NULL;

drivers/gpu/drm/tidss/tidss_crtc.c

213

static void tidss_crtc_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/tidss/tidss_crtc.c

217

crtc);

drivers/gpu/drm/tidss/tidss_crtc.c

218

struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);

drivers/gpu/drm/tidss/tidss_crtc.c

219

struct drm_device *ddev = crtc->dev;

drivers/gpu/drm/tidss/tidss_crtc.c

221

const struct drm_display_mode *mode = &crtc->state->adjusted_mode;

drivers/gpu/drm/tidss/tidss_crtc.c

225

dev_dbg(ddev->dev, "%s, event %p\n", __func__, crtc->state->event);

drivers/gpu/drm/tidss/tidss_crtc.c

238

dispc_vp_setup(tidss->dispc, tcrtc->hw_videoport, crtc->state, true);

drivers/gpu/drm/tidss/tidss_crtc.c

239

tidss_crtc_position_planes(tidss, crtc, old_state, true);

drivers/gpu/drm/tidss/tidss_crtc.c

24

struct drm_device *ddev = tcrtc->crtc.dev;

drivers/gpu/drm/tidss/tidss_crtc.c

242

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/tidss/tidss_crtc.c

244

dispc_vp_prepare(tidss->dispc, tcrtc->hw_videoport, crtc->state);

drivers/gpu/drm/tidss/tidss_crtc.c

250

if (crtc->state->event) {

drivers/gpu/drm/tidss/tidss_crtc.c

251

struct drm_vblank_crtc *vblank = drm_crtc_vblank_crtc(crtc);

drivers/gpu/drm/tidss/tidss_crtc.c

255

drm_crtc_send_vblank_event(crtc, crtc->state->event);

drivers/gpu/drm/tidss/tidss_crtc.c

256

crtc->state->event = NULL;

drivers/gpu/drm/tidss/tidss_crtc.c

262

static void tidss_crtc_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/tidss/tidss_crtc.c

265

struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);

drivers/gpu/drm/tidss/tidss_crtc.c

266

struct drm_device *ddev = crtc->dev;

drivers/gpu/drm/tidss/tidss_crtc.c

270

dev_dbg(ddev->dev, "%s, event %p\n", __func__, crtc->state->event);

drivers/gpu/drm/tidss/tidss_crtc.c

294

if (crtc->state->event) {

drivers/gpu/drm/tidss/tidss_crtc.c

295

drm_crtc_send_vblank_event(crtc, crtc->state->event);

drivers/gpu/drm/tidss/tidss_crtc.c

296

crtc->state->event = NULL;

drivers/gpu/drm/tidss/tidss_crtc.c

300

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/tidss/tidss_crtc.c

308

enum drm_mode_status tidss_crtc_mode_valid(struct drm_crtc *crtc,

drivers/gpu/drm/tidss/tidss_crtc.c

311

struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);

drivers/gpu/drm/tidss/tidss_crtc.c

312

struct drm_device *ddev = crtc->dev;

drivers/gpu/drm/tidss/tidss_crtc.c

329

static int tidss_crtc_enable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/tidss/tidss_crtc.c

331

struct drm_device *ddev = crtc->dev;

drivers/gpu/drm/tidss/tidss_crtc.c

336

tidss_irq_enable_vblank(crtc);

drivers/gpu/drm/tidss/tidss_crtc.c

341

static void tidss_crtc_disable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/tidss/tidss_crtc.c

343

struct drm_device *ddev = crtc->dev;

drivers/gpu/drm/tidss/tidss_crtc.c

346

tidss_irq_disable_vblank(crtc);

drivers/gpu/drm/tidss/tidss_crtc.c

351

static void tidss_crtc_destroy_state(struct drm_crtc *crtc,

drivers/gpu/drm/tidss/tidss_crtc.c

360

static void tidss_crtc_reset(struct drm_crtc *crtc)

drivers/gpu/drm/tidss/tidss_crtc.c

364

if (crtc->state)

drivers/gpu/drm/tidss/tidss_crtc.c

365

tidss_crtc_destroy_state(crtc, crtc->state);

drivers/gpu/drm/tidss/tidss_crtc.c

369

crtc->state = NULL;

drivers/gpu/drm/tidss/tidss_crtc.c

373

__drm_atomic_helper_crtc_reset(crtc, &tstate->base);

drivers/gpu/drm/tidss/tidss_crtc.c

376

static struct drm_crtc_state *tidss_crtc_duplicate_state(struct drm_crtc *crtc)

drivers/gpu/drm/tidss/tidss_crtc.c

380

if (WARN_ON(!crtc->state))

drivers/gpu/drm/tidss/tidss_crtc.c

383

current_state = to_tidss_crtc_state(crtc->state);

drivers/gpu/drm/tidss/tidss_crtc.c

389

__drm_atomic_helper_crtc_duplicate_state(crtc, &state->base);

drivers/gpu/drm/tidss/tidss_crtc.c

399

static void tidss_crtc_destroy(struct drm_crtc *crtc)

drivers/gpu/drm/tidss/tidss_crtc.c

401

struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);

drivers/gpu/drm/tidss/tidss_crtc.c

403

drm_crtc_cleanup(crtc);

drivers/gpu/drm/tidss/tidss_crtc.c

423

struct drm_crtc *crtc;

drivers/gpu/drm/tidss/tidss_crtc.c

435

crtc = &tcrtc->crtc;

drivers/gpu/drm/tidss/tidss_crtc.c

437

ret = drm_crtc_init_with_planes(&tidss->ddev, crtc, primary,

drivers/gpu/drm/tidss/tidss_crtc.c

444

drm_crtc_helper_add(crtc, &tidss_crtc_helper_funcs);

drivers/gpu/drm/tidss/tidss_crtc.c

454

drm_crtc_enable_color_mgmt(crtc, 0, has_ctm, gamma_lut_size);

drivers/gpu/drm/tidss/tidss_crtc.c

456

drm_mode_crtc_set_gamma_size(crtc, gamma_lut_size);

drivers/gpu/drm/tidss/tidss_crtc.c

52

drm_crtc_send_vblank_event(&tcrtc->crtc, event);

drivers/gpu/drm/tidss/tidss_crtc.c

56

drm_crtc_vblank_put(&tcrtc->crtc);

drivers/gpu/drm/tidss/tidss_crtc.c

59

void tidss_crtc_vblank_irq(struct drm_crtc *crtc)

drivers/gpu/drm/tidss/tidss_crtc.c

61

struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);

drivers/gpu/drm/tidss/tidss_crtc.c

63

drm_crtc_handle_vblank(crtc);

drivers/gpu/drm/tidss/tidss_crtc.c

68

void tidss_crtc_framedone_irq(struct drm_crtc *crtc)

drivers/gpu/drm/tidss/tidss_crtc.c

70

struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);

drivers/gpu/drm/tidss/tidss_crtc.c

75

void tidss_crtc_error_irq(struct drm_crtc *crtc, u64 irqstatus)

drivers/gpu/drm/tidss/tidss_crtc.c

77

struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);

drivers/gpu/drm/tidss/tidss_crtc.c

79

dev_err_ratelimited(crtc->dev->dev, "CRTC%u SYNC LOST: (irq %llx)\n",

drivers/gpu/drm/tidss/tidss_crtc.c

85

static int tidss_crtc_atomic_check(struct drm_crtc *crtc,

drivers/gpu/drm/tidss/tidss_crtc.c

89

crtc);

drivers/gpu/drm/tidss/tidss_crtc.c

90

struct drm_device *ddev = crtc->dev;

drivers/gpu/drm/tidss/tidss_crtc.c

93

struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);

drivers/gpu/drm/tidss/tidss_crtc.h

15

#define to_tidss_crtc(c) container_of((c), struct tidss_crtc, crtc)

drivers/gpu/drm/tidss/tidss_crtc.h

20

struct drm_crtc crtc;

drivers/gpu/drm/tidss/tidss_crtc.h

41

void tidss_crtc_vblank_irq(struct drm_crtc *crtc);

drivers/gpu/drm/tidss/tidss_crtc.h

42

void tidss_crtc_framedone_irq(struct drm_crtc *crtc);

drivers/gpu/drm/tidss/tidss_crtc.h

43

void tidss_crtc_error_irq(struct drm_crtc *crtc, u64 irqstatus);

drivers/gpu/drm/tidss/tidss_irq.c

25

void tidss_irq_enable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/tidss/tidss_irq.c

27

struct drm_device *ddev = crtc->dev;

drivers/gpu/drm/tidss/tidss_irq.c

29

struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);

drivers/gpu/drm/tidss/tidss_irq.c

40

void tidss_irq_disable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/tidss/tidss_irq.c

42

struct drm_device *ddev = crtc->dev;

drivers/gpu/drm/tidss/tidss_irq.c

44

struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);

drivers/gpu/drm/tidss/tidss_irq.c

67

struct drm_crtc *crtc = tidss->crtcs[id];

drivers/gpu/drm/tidss/tidss_irq.c

68

struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);

drivers/gpu/drm/tidss/tidss_irq.c

73

tidss_crtc_vblank_irq(crtc);

drivers/gpu/drm/tidss/tidss_irq.c

76

tidss_crtc_framedone_irq(crtc);

drivers/gpu/drm/tidss/tidss_irq.c

79

tidss_crtc_error_irq(crtc, irqstatus);

drivers/gpu/drm/tidss/tidss_irq.h

65

void tidss_irq_enable_vblank(struct drm_crtc *crtc);

drivers/gpu/drm/tidss/tidss_irq.h

66

void tidss_irq_disable_vblank(struct drm_crtc *crtc);

drivers/gpu/drm/tidss/tidss_kms.c

100

npstate->crtc);

drivers/gpu/drm/tidss/tidss_kms.c

107

for_each_new_crtc_in_state(state, crtc, cstate, i) {

drivers/gpu/drm/tidss/tidss_kms.c

110

ret = drm_atomic_add_affected_planes(state, crtc);

drivers/gpu/drm/tidss/tidss_kms.c

233

tidss->crtcs[tidss->num_crtcs++] = &tcrtc->crtc;

drivers/gpu/drm/tidss/tidss_kms.c

237

1 << tcrtc->crtc.index);

drivers/gpu/drm/tidss/tidss_kms.c

76

struct drm_crtc *crtc;

drivers/gpu/drm/tidss/tidss_kms.c

94

if (!npstate->crtc || !npstate->visible)

drivers/gpu/drm/tidss/tidss_kms.c

97

if (!opstate->crtc || opstate->crtc_x != npstate->crtc_x ||

drivers/gpu/drm/tidss/tidss_oldi.c

244

crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc);

drivers/gpu/drm/tidss/tidss_plane.c

105

hw_videoport = to_tidss_crtc(new_plane_state->crtc)->hw_videoport;

drivers/gpu/drm/tidss/tidss_plane.c

130

hw_videoport = to_tidss_crtc(new_state->crtc)->hw_videoport;

drivers/gpu/drm/tidss/tidss_plane.c

45

if (!new_plane_state->crtc) {

drivers/gpu/drm/tidss/tidss_plane.c

56

new_plane_state->crtc);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

100

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

1014

struct drm_crtc *crtc;

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

1030

crtc = &tilcdc_crtc->base;

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

1043

ret = drm_crtc_init_with_planes(dev, crtc,

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

1051

drm_crtc_helper_add(crtc, &tilcdc_crtc_helper_funcs);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

1054

crtc->port = of_graph_get_port_by_id(dev->dev->of_node, 0);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

1055

if (!crtc->port) { /* This should never happen */

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

1063

priv->crtc = crtc;

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

1067

tilcdc_crtc_destroy(crtc);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

177

static void reset(struct drm_crtc *crtc)

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

179

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

202

static void tilcdc_crtc_set_clk(struct drm_crtc *crtc)

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

204

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

206

struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

214

pclk_rate = crtc->mode.clock * 1000;

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

255

tilcdc_crtc->lcd_fck_rate, crtc->mode.clock, clkdiv);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

273

static void tilcdc_crtc_set_mode(struct drm_crtc *crtc)

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

275

struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

276

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

280

struct drm_display_mode *mode = &crtc->state->adjusted_mode;

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

281

struct drm_framebuffer *fb = crtc->primary->state->fb;

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

431

tilcdc_crtc_set_clk(crtc);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

433

tilcdc_crtc_load_palette(crtc);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

435

set_scanout(crtc, fb);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

437

drm_mode_copy(&crtc->hwmode, &crtc->state->adjusted_mode);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

440

tilcdc_mode_hvtotal(&crtc->hwmode);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

443

static void tilcdc_crtc_enable(struct drm_crtc *crtc)

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

445

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

446

struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

457

reset(crtc);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

459

tilcdc_crtc_set_mode(crtc);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

479

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

485

static void tilcdc_crtc_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

488

tilcdc_crtc_enable(crtc);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

491

static void tilcdc_crtc_off(struct drm_crtc *crtc, bool shutdown)

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

493

struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

494

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

518

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

520

spin_lock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

522

if (crtc->state->event) {

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

523

drm_crtc_send_vblank_event(crtc, crtc->state->event);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

524

crtc->state->event = NULL;

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

527

spin_unlock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

537

static void tilcdc_crtc_disable(struct drm_crtc *crtc)

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

539

tilcdc_crtc_off(crtc, false);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

542

static void tilcdc_crtc_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

545

tilcdc_crtc_disable(crtc);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

548

static void tilcdc_crtc_atomic_flush(struct drm_crtc *crtc,

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

551

if (!crtc->state->event)

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

554

spin_lock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

555

drm_crtc_send_vblank_event(crtc, crtc->state->event);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

556

crtc->state->event = NULL;

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

557

spin_unlock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

560

void tilcdc_crtc_shutdown(struct drm_crtc *crtc)

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

562

tilcdc_crtc_off(crtc, true);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

565

static bool tilcdc_crtc_is_on(struct drm_crtc *crtc)

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

567

return crtc->state && crtc->state->enable && crtc->state->active;

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

574

struct drm_crtc *crtc = &tilcdc_crtc->base;

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

576

dev_info(crtc->dev->dev, "%s: Reset CRTC", __func__);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

578

drm_modeset_lock(&crtc->mutex, NULL);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

580

if (!tilcdc_crtc_is_on(crtc))

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

583

tilcdc_crtc_disable(crtc);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

584

tilcdc_crtc_enable(crtc);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

586

drm_modeset_unlock(&crtc->mutex);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

589

void tilcdc_crtc_destroy(struct drm_crtc *crtc)

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

591

struct tilcdc_drm_private *priv = crtc->dev->dev_private;

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

593

tilcdc_crtc_shutdown(crtc);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

597

of_node_put(crtc->port);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

598

drm_crtc_cleanup(crtc);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

601

int tilcdc_crtc_update_fb(struct drm_crtc *crtc,

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

605

struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

606

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

63

static void set_scanout(struct drm_crtc *crtc, struct drm_framebuffer *fb)

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

631

set_scanout(crtc, fb);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

641

static bool tilcdc_crtc_mode_fixup(struct drm_crtc *crtc,

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

645

struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

65

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

670

static int tilcdc_crtc_atomic_check(struct drm_crtc *crtc,

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

674

crtc);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

682

static int tilcdc_crtc_enable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

684

struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

685

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

705

static void tilcdc_crtc_disable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

707

struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

708

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

724

static void tilcdc_crtc_reset(struct drm_crtc *crtc)

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

726

struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

727

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

730

drm_atomic_helper_crtc_reset(crtc);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

74

crtc->y * fb->pitches[0] +

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

75

crtc->x * fb->format->cpp[0];

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

764

tilcdc_crtc_mode_valid(struct drm_crtc *crtc,

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

767

struct tilcdc_drm_private *priv = crtc->dev->dev_private;

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

77

end = start + (crtc->mode.vdisplay * fb->pitches[0]);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

862

void tilcdc_crtc_set_panel_info(struct drm_crtc *crtc,

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

865

struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

869

void tilcdc_crtc_set_simulate_vesa_sync(struct drm_crtc *crtc,

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

872

struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

877

void tilcdc_crtc_update_clk(struct drm_crtc *crtc)

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

879

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

881

struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

883

drm_modeset_lock(&crtc->mutex, NULL);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

885

if (tilcdc_crtc_is_on(crtc)) {

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

887

tilcdc_crtc_disable(crtc);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

889

tilcdc_crtc_set_clk(crtc);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

891

tilcdc_crtc_enable(crtc);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

895

drm_modeset_unlock(&crtc->mutex);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

900

irqreturn_t tilcdc_crtc_irq(struct drm_crtc *crtc)

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

902

struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

903

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

921

set_scanout(crtc, tilcdc_crtc->next_fb);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

928

drm_crtc_handle_vblank(crtc);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

938

drm_crtc_send_vblank_event(crtc, event);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

97

static void tilcdc_crtc_load_palette(struct drm_crtc *crtc)

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

99

struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);

drivers/gpu/drm/tilcdc/tilcdc_drv.c

119

tilcdc_crtc_update_clk(priv->crtc);

drivers/gpu/drm/tilcdc/tilcdc_drv.c

130

return tilcdc_crtc_irq(priv->crtc);

drivers/gpu/drm/tilcdc/tilcdc_drv.c

172

if (priv->crtc)

drivers/gpu/drm/tilcdc/tilcdc_drv.c

173

tilcdc_crtc_shutdown(priv->crtc);

drivers/gpu/drm/tilcdc/tilcdc_drv.c

392

tilcdc_crtc_destroy(priv->crtc);

drivers/gpu/drm/tilcdc/tilcdc_drv.h

159

irqreturn_t tilcdc_crtc_irq(struct drm_crtc *crtc);

drivers/gpu/drm/tilcdc/tilcdc_drv.h

160

void tilcdc_crtc_update_clk(struct drm_crtc *crtc);

drivers/gpu/drm/tilcdc/tilcdc_drv.h

161

void tilcdc_crtc_set_panel_info(struct drm_crtc *crtc,

drivers/gpu/drm/tilcdc/tilcdc_drv.h

163

void tilcdc_crtc_set_simulate_vesa_sync(struct drm_crtc *crtc,

drivers/gpu/drm/tilcdc/tilcdc_drv.h

165

void tilcdc_crtc_shutdown(struct drm_crtc *crtc);

drivers/gpu/drm/tilcdc/tilcdc_drv.h

166

void tilcdc_crtc_destroy(struct drm_crtc *crtc);

drivers/gpu/drm/tilcdc/tilcdc_drv.h

167

int tilcdc_crtc_update_fb(struct drm_crtc *crtc,

drivers/gpu/drm/tilcdc/tilcdc_drv.h

74

struct drm_crtc *crtc;

drivers/gpu/drm/tilcdc/tilcdc_external.c

101

tilcdc_crtc_set_panel_info(priv->crtc, &panel_info_default);

drivers/gpu/drm/tilcdc/tilcdc_external.c

66

if (iter->possible_crtcs & (1 << priv->crtc->index)) {

drivers/gpu/drm/tilcdc/tilcdc_external.c

83

tilcdc_crtc_set_simulate_vesa_sync(priv->crtc, true);

drivers/gpu/drm/tilcdc/tilcdc_external.c

84

tilcdc_crtc_set_panel_info(priv->crtc, &panel_info_tda998x);

drivers/gpu/drm/tilcdc/tilcdc_panel.c

243

tilcdc_crtc_set_panel_info(priv->crtc,

drivers/gpu/drm/tilcdc/tilcdc_plane.c

33

if (!new_state->crtc)

drivers/gpu/drm/tilcdc/tilcdc_plane.c

45

crtc_state = drm_atomic_get_new_crtc_state(state, new_state->crtc);

drivers/gpu/drm/tilcdc/tilcdc_plane.c

83

if (!new_state->crtc)

drivers/gpu/drm/tilcdc/tilcdc_plane.c

86

if (WARN_ON(!new_state->fb || !new_state->crtc->state))

drivers/gpu/drm/tilcdc/tilcdc_plane.c

89

if (tilcdc_crtc_update_fb(new_state->crtc,

drivers/gpu/drm/tilcdc/tilcdc_plane.c

91

new_state->crtc->state->event) == 0) {

drivers/gpu/drm/tilcdc/tilcdc_plane.c

92

new_state->crtc->state->event = NULL;

drivers/gpu/drm/tiny/appletbdrm.c

136

struct drm_crtc crtc;

drivers/gpu/drm/tiny/appletbdrm.c

323

struct drm_crtc *new_crtc = new_plane_state->crtc;

drivers/gpu/drm/tiny/appletbdrm.c

570

static enum drm_mode_status appletbdrm_crtc_helper_mode_valid(struct drm_crtc *crtc,

drivers/gpu/drm/tiny/appletbdrm.c

573

struct appletbdrm_device *adev = drm_to_adev(crtc->dev);

drivers/gpu/drm/tiny/appletbdrm.c

575

return drm_crtc_helper_mode_valid_fixed(crtc, mode, &adev->mode);

drivers/gpu/drm/tiny/appletbdrm.c

629

struct drm_crtc *crtc;

drivers/gpu/drm/tiny/appletbdrm.c

655

crtc = &adev->crtc;

drivers/gpu/drm/tiny/appletbdrm.c

656

ret = drm_crtc_init_with_planes(drm, crtc, primary_plane, NULL,

drivers/gpu/drm/tiny/appletbdrm.c

663

drm_crtc_helper_add(crtc, &appletbdrm_crtc_helper_funcs);

drivers/gpu/drm/tiny/appletbdrm.c

673

encoder->possible_crtcs = drm_crtc_mask(crtc);

drivers/gpu/drm/tiny/arcpgu.c

158

struct drm_display_mode *m = &arcpgu->pipe.crtc.state->adjusted_mode;

drivers/gpu/drm/tiny/arcpgu.c

344

unsigned long mode_clock = arcpgu->pipe.crtc.mode.crtc_clock * 1000;

drivers/gpu/drm/tiny/bochs.c

102

struct drm_crtc crtc;

drivers/gpu/drm/tiny/bochs.c

425

struct drm_crtc *new_crtc = new_plane_state->crtc;

drivers/gpu/drm/tiny/bochs.c

507

static void bochs_crtc_helper_mode_set_nofb(struct drm_crtc *crtc)

drivers/gpu/drm/tiny/bochs.c

509

struct bochs_device *bochs = to_bochs_device(crtc->dev);

drivers/gpu/drm/tiny/bochs.c

510

struct drm_crtc_state *crtc_state = crtc->state;

drivers/gpu/drm/tiny/bochs.c

515

static int bochs_crtc_helper_atomic_check(struct drm_crtc *crtc,

drivers/gpu/drm/tiny/bochs.c

518

struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/tiny/bochs.c

526

static void bochs_crtc_helper_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/tiny/bochs.c

529

struct bochs_device *bochs = to_bochs_device(crtc->dev);

drivers/gpu/drm/tiny/bochs.c

532

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/tiny/bochs.c

535

static void bochs_crtc_helper_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/tiny/bochs.c

538

struct bochs_device *bochs = to_bochs_device(crtc->dev);

drivers/gpu/drm/tiny/bochs.c

540

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/tiny/bochs.c

628

struct drm_crtc *crtc;

drivers/gpu/drm/tiny/bochs.c

657

crtc = &bochs->crtc;

drivers/gpu/drm/tiny/bochs.c

658

ret = drm_crtc_init_with_planes(dev, crtc, primary_plane, NULL,

drivers/gpu/drm/tiny/bochs.c

662

drm_crtc_helper_add(crtc, &bochs_crtc_helper_funcs);

drivers/gpu/drm/tiny/bochs.c

669

encoder->possible_crtcs = drm_crtc_mask(crtc);

drivers/gpu/drm/tiny/cirrus-qemu.c

303

struct drm_crtc *new_crtc = new_plane_state->crtc;

drivers/gpu/drm/tiny/cirrus-qemu.c

377

static int cirrus_crtc_helper_atomic_check(struct drm_crtc *crtc, struct drm_atomic_state *state)

drivers/gpu/drm/tiny/cirrus-qemu.c

379

struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/tiny/cirrus-qemu.c

392

static void cirrus_crtc_helper_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/tiny/cirrus-qemu.c

395

struct cirrus_device *cirrus = to_cirrus(crtc->dev);

drivers/gpu/drm/tiny/cirrus-qemu.c

396

struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/tiny/cirrus-qemu.c

411

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/tiny/cirrus-qemu.c

462

struct drm_crtc *crtc;

drivers/gpu/drm/tiny/cirrus-qemu.c

479

crtc = &cirrus->crtc;

drivers/gpu/drm/tiny/cirrus-qemu.c

480

ret = drm_crtc_init_with_planes(dev, crtc, primary_plane, NULL,

drivers/gpu/drm/tiny/cirrus-qemu.c

484

drm_crtc_helper_add(crtc, &cirrus_crtc_helper_funcs);

drivers/gpu/drm/tiny/cirrus-qemu.c

491

encoder->possible_crtcs = drm_crtc_mask(crtc);

drivers/gpu/drm/tiny/cirrus-qemu.c

65

struct drm_crtc crtc;

drivers/gpu/drm/tiny/gm12u320.c

564

struct gm12u320_device *gm12u320 = to_gm12u320(pipe->crtc.dev);

drivers/gpu/drm/tiny/gm12u320.c

573

struct gm12u320_device *gm12u320 = to_gm12u320(pipe->crtc.dev);

drivers/gpu/drm/tiny/hx8357d.c

53

struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);

drivers/gpu/drm/tiny/hx8357d.c

58

if (!drm_dev_enter(pipe->crtc.dev, &idx))

drivers/gpu/drm/tiny/ili9163.c

42

struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);

drivers/gpu/drm/tiny/ili9163.c

47

if (!drm_dev_enter(pipe->crtc.dev, &idx))

drivers/gpu/drm/tiny/ili9225.c

169

if (!pipe->crtc.state->active)

drivers/gpu/drm/tiny/ili9225.c

186

struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);

drivers/gpu/drm/tiny/ili9225.c

189

struct device *dev = pipe->crtc.dev->dev;

drivers/gpu/drm/tiny/ili9225.c

200

if (!drm_dev_enter(pipe->crtc.dev, &idx))

drivers/gpu/drm/tiny/ili9225.c

296

struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);

drivers/gpu/drm/tiny/ili9341.c

59

struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);

drivers/gpu/drm/tiny/ili9341.c

64

if (!drm_dev_enter(pipe->crtc.dev, &idx))

drivers/gpu/drm/tiny/ili9486.c

101

struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);

drivers/gpu/drm/tiny/ili9486.c

106

if (!drm_dev_enter(pipe->crtc.dev, &idx))

drivers/gpu/drm/tiny/mi0283qt.c

57

struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);

drivers/gpu/drm/tiny/mi0283qt.c

62

if (!drm_dev_enter(pipe->crtc.dev, &idx))

drivers/gpu/drm/tiny/panel-mipi-dbi.c

240

struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);

drivers/gpu/drm/tiny/panel-mipi-dbi.c

244

if (!drm_dev_enter(pipe->crtc.dev, &idx))

drivers/gpu/drm/tiny/panel-mipi-dbi.c

247

drm_dbg(pipe->crtc.dev, "\n");

drivers/gpu/drm/tiny/pixpaper.c

1099

ret = drm_crtc_init_with_planes(drm, &panel->crtc, &panel->plane, NULL,

drivers/gpu/drm/tiny/pixpaper.c

1103

drm_crtc_helper_add(&panel->crtc, &pixpaper_crtc_helper_funcs);

drivers/gpu/drm/tiny/pixpaper.c

1109

panel->encoder.possible_crtcs = drm_crtc_mask(&panel->crtc);

drivers/gpu/drm/tiny/pixpaper.c

498

struct drm_crtc crtc;

drivers/gpu/drm/tiny/pixpaper.c

781

struct drm_crtc *new_crtc = new_plane_state->crtc;

drivers/gpu/drm/tiny/pixpaper.c

799

static int pixpaper_crtc_helper_atomic_check(struct drm_crtc *crtc,

drivers/gpu/drm/tiny/pixpaper.c

803

drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/tiny/pixpaper.c

811

static void pixpaper_crtc_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/tiny/pixpaper.c

814

struct pixpaper_panel *panel = to_pixpaper_panel(crtc->dev);

drivers/gpu/drm/tiny/pixpaper.c

836

static void pixpaper_crtc_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/tiny/pixpaper.c

839

struct pixpaper_panel *panel = to_pixpaper_panel(crtc->dev);

drivers/gpu/drm/tiny/pixpaper.c

867

struct drm_crtc *crtc = plane_state->crtc;

drivers/gpu/drm/tiny/pixpaper.c

868

struct pixpaper_panel *panel = to_pixpaper_panel(crtc->dev);

drivers/gpu/drm/tiny/pixpaper.c

973

pixpaper_mode_valid(struct drm_crtc *crtc, const struct drm_display_mode *mode)

drivers/gpu/drm/tiny/repaper.c

628

struct drm_crtc *crtc = &pipe->crtc;

drivers/gpu/drm/tiny/repaper.c

629

struct repaper_epd *epd = drm_to_epd(crtc->dev);

drivers/gpu/drm/tiny/repaper.c

631

return drm_crtc_helper_mode_valid_fixed(crtc, mode, epd->mode);

drivers/gpu/drm/tiny/repaper.c

638

struct repaper_epd *epd = drm_to_epd(pipe->crtc.dev);

drivers/gpu/drm/tiny/repaper.c

644

if (!drm_dev_enter(pipe->crtc.dev, &idx))

drivers/gpu/drm/tiny/repaper.c

776

struct repaper_epd *epd = drm_to_epd(pipe->crtc.dev);

drivers/gpu/drm/tiny/repaper.c

837

if (!pipe->crtc.state->active)

drivers/gpu/drm/tiny/sharp-memory.c

233

crtc_state = drm_atomic_get_new_crtc_state(state, &smd->crtc);

drivers/gpu/drm/tiny/sharp-memory.c

251

if (!smd->crtc.state->active)

drivers/gpu/drm/tiny/sharp-memory.c

281

static enum drm_mode_status sharp_memory_crtc_mode_valid(struct drm_crtc *crtc,

drivers/gpu/drm/tiny/sharp-memory.c

284

struct sharp_memory_device *smd = drm_to_sharp_memory_device(crtc->dev);

drivers/gpu/drm/tiny/sharp-memory.c

286

return drm_crtc_helper_mode_valid_fixed(crtc, mode, smd->mode);

drivers/gpu/drm/tiny/sharp-memory.c

289

static int sharp_memory_crtc_check(struct drm_crtc *crtc,

drivers/gpu/drm/tiny/sharp-memory.c

292

struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/tiny/sharp-memory.c

303

return drm_atomic_add_affected_planes(state, crtc);

drivers/gpu/drm/tiny/sharp-memory.c

319

static void sharp_memory_crtc_enable(struct drm_crtc *crtc,

drivers/gpu/drm/tiny/sharp-memory.c

322

struct sharp_memory_device *smd = drm_to_sharp_memory_device(crtc->dev);

drivers/gpu/drm/tiny/sharp-memory.c

330

static void sharp_memory_crtc_disable(struct drm_crtc *crtc,

drivers/gpu/drm/tiny/sharp-memory.c

333

struct sharp_memory_device *smd = drm_to_sharp_memory_device(crtc->dev);

drivers/gpu/drm/tiny/sharp-memory.c

465

struct drm_crtc *crtc = &smd->crtc;

drivers/gpu/drm/tiny/sharp-memory.c

477

drm_crtc_helper_add(crtc, &sharp_memory_crtc_helper_funcs);

drivers/gpu/drm/tiny/sharp-memory.c

478

ret = drm_crtc_init_with_planes(dev, crtc, plane, NULL,

drivers/gpu/drm/tiny/sharp-memory.c

483

encoder->possible_crtcs = drm_crtc_mask(crtc);

drivers/gpu/drm/tiny/sharp-memory.c

63

struct drm_crtc crtc;

drivers/gpu/drm/tve200/tve200_display.c

126

struct drm_crtc *crtc = &pipe->crtc;

drivers/gpu/drm/tve200/tve200_display.c

128

struct drm_device *drm = crtc->dev;

drivers/gpu/drm/tve200/tve200_display.c

240

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/tve200/tve200_display.c

245

struct drm_crtc *crtc = &pipe->crtc;

drivers/gpu/drm/tve200/tve200_display.c

246

struct drm_device *drm = crtc->dev;

drivers/gpu/drm/tve200/tve200_display.c

249

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/tve200/tve200_display.c

261

struct drm_crtc *crtc = &pipe->crtc;

drivers/gpu/drm/tve200/tve200_display.c

262

struct drm_device *drm = crtc->dev;

drivers/gpu/drm/tve200/tve200_display.c

264

struct drm_pending_vblank_event *event = crtc->state->event;

drivers/gpu/drm/tve200/tve200_display.c

284

crtc->state->event = NULL;

drivers/gpu/drm/tve200/tve200_display.c

286

spin_lock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/tve200/tve200_display.c

287

if (crtc->state->active && drm_crtc_vblank_get(crtc) == 0)

drivers/gpu/drm/tve200/tve200_display.c

288

drm_crtc_arm_vblank_event(crtc, event);

drivers/gpu/drm/tve200/tve200_display.c

290

drm_crtc_send_vblank_event(crtc, event);

drivers/gpu/drm/tve200/tve200_display.c

291

spin_unlock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/tve200/tve200_display.c

297

struct drm_crtc *crtc = &pipe->crtc;

drivers/gpu/drm/tve200/tve200_display.c

298

struct drm_device *drm = crtc->dev;

drivers/gpu/drm/tve200/tve200_display.c

309

struct drm_crtc *crtc = &pipe->crtc;

drivers/gpu/drm/tve200/tve200_display.c

310

struct drm_device *drm = crtc->dev;

drivers/gpu/drm/tve200/tve200_display.c

55

drm_crtc_handle_vblank(&priv->pipe.crtc);

drivers/gpu/drm/udl/udl_drv.h

57

struct drm_crtc crtc;

drivers/gpu/drm/udl/udl_modeset.c

269

struct drm_crtc *new_crtc = new_plane_state->crtc;

drivers/gpu/drm/udl/udl_modeset.c

331

static void udl_crtc_helper_atomic_enable(struct drm_crtc *crtc, struct drm_atomic_state *state)

drivers/gpu/drm/udl/udl_modeset.c

333

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/udl/udl_modeset.c

335

struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/udl/udl_modeset.c

366

static void udl_crtc_helper_atomic_disable(struct drm_crtc *crtc, struct drm_atomic_state *state)

drivers/gpu/drm/udl/udl_modeset.c

368

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/udl/udl_modeset.c

486

struct drm_crtc *crtc;

drivers/gpu/drm/udl/udl_modeset.c

514

crtc = &udl->crtc;

drivers/gpu/drm/udl/udl_modeset.c

515

ret = drm_crtc_init_with_planes(dev, crtc, primary_plane, NULL,

drivers/gpu/drm/udl/udl_modeset.c

519

drm_crtc_helper_add(crtc, &udl_crtc_helper_funcs);

drivers/gpu/drm/udl/udl_modeset.c

525

encoder->possible_crtcs = drm_crtc_mask(crtc);

drivers/gpu/drm/vboxvideo/vbox_mode.c

178

static void vbox_crtc_set_base_and_mode(struct drm_crtc *crtc,

drivers/gpu/drm/vboxvideo/vbox_mode.c

183

struct vbox_private *vbox = to_vbox_dev(crtc->dev);

drivers/gpu/drm/vboxvideo/vbox_mode.c

184

struct vbox_crtc *vbox_crtc = to_vbox_crtc(crtc);

drivers/gpu/drm/vboxvideo/vbox_mode.c

185

bool needs_modeset = drm_atomic_crtc_needs_modeset(crtc->state);

drivers/gpu/drm/vboxvideo/vbox_mode.c

189

if (crtc->state->enable) {

drivers/gpu/drm/vboxvideo/vbox_mode.c

190

vbox_crtc->width = crtc->state->mode.hdisplay;

drivers/gpu/drm/vboxvideo/vbox_mode.c

191

vbox_crtc->height = crtc->state->mode.vdisplay;

drivers/gpu/drm/vboxvideo/vbox_mode.c

204

if (crtci == crtc)

drivers/gpu/drm/vboxvideo/vbox_mode.c

210

vbox_set_view(crtc);

drivers/gpu/drm/vboxvideo/vbox_mode.c

211

vbox_do_modeset(crtc);

drivers/gpu/drm/vboxvideo/vbox_mode.c

221

static void vbox_crtc_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/vboxvideo/vbox_mode.c

226

static void vbox_crtc_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/vboxvideo/vbox_mode.c

231

static void vbox_crtc_atomic_flush(struct drm_crtc *crtc,

drivers/gpu/drm/vboxvideo/vbox_mode.c

242

static void vbox_crtc_destroy(struct drm_crtc *crtc)

drivers/gpu/drm/vboxvideo/vbox_mode.c

244

drm_crtc_cleanup(crtc);

drivers/gpu/drm/vboxvideo/vbox_mode.c

245

kfree(crtc);

drivers/gpu/drm/vboxvideo/vbox_mode.c

265

if (new_state->crtc) {

drivers/gpu/drm/vboxvideo/vbox_mode.c

267

new_state->crtc);

drivers/gpu/drm/vboxvideo/vbox_mode.c

283

struct drm_crtc *crtc = new_state->crtc;

drivers/gpu/drm/vboxvideo/vbox_mode.c

289

vbox_crtc_set_base_and_mode(crtc, fb,

drivers/gpu/drm/vboxvideo/vbox_mode.c

305

unsigned int crtc_id = to_vbox_crtc(crtc)->crtc_id;

drivers/gpu/drm/vboxvideo/vbox_mode.c

329

struct drm_crtc *crtc = old_state->crtc;

drivers/gpu/drm/vboxvideo/vbox_mode.c

332

vbox_crtc_set_base_and_mode(crtc, old_state->fb,

drivers/gpu/drm/vboxvideo/vbox_mode.c

347

if (new_state->crtc) {

drivers/gpu/drm/vboxvideo/vbox_mode.c

349

new_state->crtc);

drivers/gpu/drm/vboxvideo/vbox_mode.c

36

static void vbox_do_modeset(struct drm_crtc *crtc)

drivers/gpu/drm/vboxvideo/vbox_mode.c

38

struct drm_framebuffer *fb = crtc->primary->state->fb;

drivers/gpu/drm/vboxvideo/vbox_mode.c

39

struct vbox_crtc *vbox_crtc = to_vbox_crtc(crtc);

drivers/gpu/drm/vboxvideo/vbox_mode.c

398

struct vbox_crtc *vbox_crtc = to_vbox_crtc(new_state->crtc);

drivers/gpu/drm/vboxvideo/vbox_mode.c

447

struct vbox_crtc *vbox_crtc = to_vbox_crtc(old_state->crtc);

drivers/gpu/drm/vboxvideo/vbox_mode.c

45

vbox = to_vbox_dev(crtc->dev);

drivers/gpu/drm/vboxvideo/vbox_mode.c

60

vbox_crtc->fb_offset / pitch < 0xffff - crtc->y &&

drivers/gpu/drm/vboxvideo/vbox_mode.c

74

flags |= (fb && crtc->state->enable) ? 0 : VBVA_SCREEN_F_BLANK;

drivers/gpu/drm/vboxvideo/vbox_mode.c

83

static int vbox_set_view(struct drm_crtc *crtc)

drivers/gpu/drm/vboxvideo/vbox_mode.c

85

struct vbox_crtc *vbox_crtc = to_vbox_crtc(crtc);

drivers/gpu/drm/vboxvideo/vbox_mode.c

86

struct vbox_private *vbox = to_vbox_dev(crtc->dev);

drivers/gpu/drm/vc4/tests/vc4_mock.c

114

struct drm_crtc *crtc;

drivers/gpu/drm/vc4/tests/vc4_mock.c

123

crtc = &dummy_crtc->crtc.base;

drivers/gpu/drm/vc4/tests/vc4_mock.c

128

dummy_output = vc4_dummy_output(test, drm, crtc,

drivers/gpu/drm/vc4/tests/vc4_mock.h

13

struct drm_crtc *crtc;

drivers/gpu/drm/vc4/tests/vc4_mock.h

17

drm_for_each_crtc(crtc, drm)

drivers/gpu/drm/vc4/tests/vc4_mock.h

18

if (encoder->possible_crtcs & drm_crtc_mask(crtc))

drivers/gpu/drm/vc4/tests/vc4_mock.h

19

return crtc;

drivers/gpu/drm/vc4/tests/vc4_mock.h

28

struct vc4_crtc crtc;

drivers/gpu/drm/vc4/tests/vc4_mock.h

46

struct drm_crtc *crtc,

drivers/gpu/drm/vc4/tests/vc4_mock_crtc.c

32

vc4_crtc = &dummy_crtc->crtc;

drivers/gpu/drm/vc4/tests/vc4_mock_output.c

104

ret = drm_atomic_set_crtc_for_connector(conn_state, crtc);

drivers/gpu/drm/vc4/tests/vc4_mock_output.c

108

crtc_state = drm_atomic_get_crtc_state(state, crtc);

drivers/gpu/drm/vc4/tests/vc4_mock_output.c

144

struct drm_crtc *crtc;

drivers/gpu/drm/vc4/tests/vc4_mock_output.c

151

crtc = vc4_find_crtc_for_encoder(test, drm, encoder);

drivers/gpu/drm/vc4/tests/vc4_mock_output.c

152

if (!crtc)

drivers/gpu/drm/vc4/tests/vc4_mock_output.c

155

crtc_state = drm_atomic_get_crtc_state(state, crtc);

drivers/gpu/drm/vc4/tests/vc4_mock_output.c

25

struct drm_crtc *crtc,

drivers/gpu/drm/vc4/tests/vc4_mock_output.c

45

enc->possible_crtcs = drm_crtc_mask(crtc);

drivers/gpu/drm/vc4/tests/vc4_mock_output.c

87

struct drm_crtc *crtc;

drivers/gpu/drm/vc4/tests/vc4_mock_output.c

94

crtc = vc4_find_crtc_for_encoder(test, drm, encoder);

drivers/gpu/drm/vc4/tests/vc4_mock_output.c

95

if (!crtc)

drivers/gpu/drm/vc4/tests/vc4_test_pv_muxing.c

128

struct drm_crtc *crtc;

drivers/gpu/drm/vc4/tests/vc4_test_pv_muxing.c

133

crtc = vc4_find_crtc_for_encoder(test, drm, encoder);

drivers/gpu/drm/vc4/tests/vc4_test_pv_muxing.c

134

KUNIT_ASSERT_NOT_ERR_OR_NULL(test, crtc);

drivers/gpu/drm/vc4/tests/vc4_test_pv_muxing.c

136

new_crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/vc4/vc4_crtc.c

1006

flip_state->crtc = crtc;

drivers/gpu/drm/vc4/vc4_crtc.c

1021

WARN_ON(drm_crtc_vblank_get(crtc) != 0);

drivers/gpu/drm/vc4/vc4_crtc.c

1041

static int vc4_async_page_flip(struct drm_crtc *crtc,

drivers/gpu/drm/vc4/vc4_crtc.c

1046

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/vc4/vc4_crtc.c

106

static bool vc4_crtc_get_scanout_position(struct drm_crtc *crtc,

drivers/gpu/drm/vc4/vc4_crtc.c

1068

ret = vc4_async_page_flip_common(crtc, fb, event, flags);

drivers/gpu/drm/vc4/vc4_crtc.c

1077

static int vc5_async_page_flip(struct drm_crtc *crtc,

drivers/gpu/drm/vc4/vc4_crtc.c

1082

return vc4_async_page_flip_common(crtc, fb, event, flags);

drivers/gpu/drm/vc4/vc4_crtc.c

1085

int vc4_page_flip(struct drm_crtc *crtc,

drivers/gpu/drm/vc4/vc4_crtc.c

1092

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/vc4/vc4_crtc.c

1096

return vc5_async_page_flip(crtc, fb, event, flags);

drivers/gpu/drm/vc4/vc4_crtc.c

1098

return vc4_async_page_flip(crtc, fb, event, flags);

drivers/gpu/drm/vc4/vc4_crtc.c

1100

return drm_atomic_helper_page_flip(crtc, fb, event, flags, ctx);

drivers/gpu/drm/vc4/vc4_crtc.c

1104

struct drm_crtc_state *vc4_crtc_duplicate_state(struct drm_crtc *crtc)

drivers/gpu/drm/vc4/vc4_crtc.c

1112

old_vc4_state = to_vc4_crtc_state(crtc->state);

drivers/gpu/drm/vc4/vc4_crtc.c

1116

__drm_atomic_helper_crtc_duplicate_state(crtc, &vc4_state->base);

drivers/gpu/drm/vc4/vc4_crtc.c

112

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/vc4/vc4_crtc.c

1120

void vc4_crtc_destroy_state(struct drm_crtc *crtc,

drivers/gpu/drm/vc4/vc4_crtc.c

1123

struct vc4_dev *vc4 = to_vc4_dev(crtc->dev);

drivers/gpu/drm/vc4/vc4_crtc.c

1135

drm_atomic_helper_crtc_destroy_state(crtc, state);

drivers/gpu/drm/vc4/vc4_crtc.c

1138

void vc4_crtc_reset(struct drm_crtc *crtc)

drivers/gpu/drm/vc4/vc4_crtc.c

1142

if (crtc->state)

drivers/gpu/drm/vc4/vc4_crtc.c

1143

vc4_crtc_destroy_state(crtc, crtc->state);

drivers/gpu/drm/vc4/vc4_crtc.c

1147

crtc->state = NULL;

drivers/gpu/drm/vc4/vc4_crtc.c

115

struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);

drivers/gpu/drm/vc4/vc4_crtc.c

1152

__drm_atomic_helper_crtc_reset(crtc, &vc4_crtc_state->base);

drivers/gpu/drm/vc4/vc4_crtc.c

1155

int vc4_crtc_late_register(struct drm_crtc *crtc)

drivers/gpu/drm/vc4/vc4_crtc.c

1157

struct drm_device *drm = crtc->dev;

drivers/gpu/drm/vc4/vc4_crtc.c

1158

struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);

drivers/gpu/drm/vc4/vc4_crtc.c

116

struct vc4_crtc_state *vc4_crtc_state = to_vc4_crtc_state(crtc->state);

drivers/gpu/drm/vc4/vc4_crtc.c

1350

struct drm_crtc *crtc)

drivers/gpu/drm/vc4/vc4_crtc.c

1352

struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);

drivers/gpu/drm/vc4/vc4_crtc.c

1368

encoder->possible_crtcs |= drm_crtc_mask(crtc);

drivers/gpu/drm/vc4/vc4_crtc.c

1403

struct drm_crtc *crtc = &vc4_crtc->base;

drivers/gpu/drm/vc4/vc4_crtc.c

1411

ret = drmm_crtc_init_with_planes(drm, crtc, primary_plane, NULL,

drivers/gpu/drm/vc4/vc4_crtc.c

1416

drm_crtc_helper_add(crtc, crtc_helper_funcs);

drivers/gpu/drm/vc4/vc4_crtc.c

1419

drm_mode_crtc_set_gamma_size(crtc, ARRAY_SIZE(vc4_crtc->lut_r));

drivers/gpu/drm/vc4/vc4_crtc.c

1420

drm_crtc_enable_color_mgmt(crtc, 0, false, crtc->gamma_size);

drivers/gpu/drm/vc4/vc4_crtc.c

1425

drm_crtc_enable_color_mgmt(crtc, 0, true, crtc->gamma_size);

drivers/gpu/drm/vc4/vc4_crtc.c

1428

for (i = 0; i < crtc->gamma_size; i++) {

drivers/gpu/drm/vc4/vc4_crtc.c

1468

struct drm_crtc *crtc;

drivers/gpu/drm/vc4/vc4_crtc.c

1474

crtc = &vc4_crtc->base;

drivers/gpu/drm/vc4/vc4_crtc.c

1493

vc4_set_crtc_possible_masks(drm, crtc);

drivers/gpu/drm/vc4/vc4_crtc.c

316

struct drm_encoder *vc4_get_crtc_encoder(struct drm_crtc *crtc,

drivers/gpu/drm/vc4/vc4_crtc.c

323

drm_for_each_encoder_mask(encoder, crtc->dev, state->encoder_mask)

drivers/gpu/drm/vc4/vc4_crtc.c

329

static void vc4_crtc_pixelvalve_reset(struct drm_crtc *crtc)

drivers/gpu/drm/vc4/vc4_crtc.c

331

struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);

drivers/gpu/drm/vc4/vc4_crtc.c

332

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/vc4/vc4_crtc.c

345

static void vc4_crtc_config_pv(struct drm_crtc *crtc, struct drm_encoder *encoder,

drivers/gpu/drm/vc4/vc4_crtc.c

348

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/vc4/vc4_crtc.c

351

struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);

drivers/gpu/drm/vc4/vc4_crtc.c

353

struct drm_crtc_state *crtc_state = crtc->state;

drivers/gpu/drm/vc4/vc4_crtc.c

379

drm_crtc_index(crtc));

drivers/gpu/drm/vc4/vc4_crtc.c

383

vc4_crtc_pixelvalve_reset(crtc);

drivers/gpu/drm/vc4/vc4_crtc.c

480

drm_crtc_index(crtc));

drivers/gpu/drm/vc4/vc4_crtc.c

498

static int vc4_crtc_disable(struct drm_crtc *crtc,

drivers/gpu/drm/vc4/vc4_crtc.c

504

struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);

drivers/gpu/drm/vc4/vc4_crtc.c

505

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/vc4/vc4_crtc.c

538

vc4_crtc_pixelvalve_reset(crtc);

drivers/gpu/drm/vc4/vc4_crtc.c

549

int vc4_crtc_disable_at_boot(struct drm_crtc *crtc)

drivers/gpu/drm/vc4/vc4_crtc.c

551

struct drm_device *drm = crtc->dev;

drivers/gpu/drm/vc4/vc4_crtc.c

553

struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);

drivers/gpu/drm/vc4/vc4_crtc.c

597

ret = vc4_crtc_disable(crtc, encoder, NULL, channel);

drivers/gpu/drm/vc4/vc4_crtc.c

610

void vc4_crtc_send_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/vc4/vc4_crtc.c

612

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/vc4/vc4_crtc.c

615

if (!crtc->state || !crtc->state->event)

drivers/gpu/drm/vc4/vc4_crtc.c

619

drm_crtc_send_vblank_event(crtc, crtc->state->event);

drivers/gpu/drm/vc4/vc4_crtc.c

620

crtc->state->event = NULL;

drivers/gpu/drm/vc4/vc4_crtc.c

624

static void vc4_crtc_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/vc4/vc4_crtc.c

628

crtc);

drivers/gpu/drm/vc4/vc4_crtc.c

630

struct drm_encoder *encoder = vc4_get_crtc_encoder(crtc, old_state);

drivers/gpu/drm/vc4/vc4_crtc.c

631

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/vc4/vc4_crtc.c

634

crtc->name, crtc->base.id, encoder->name, encoder->base.id);

drivers/gpu/drm/vc4/vc4_crtc.c

639

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/vc4/vc4_crtc.c

641

vc4_crtc_disable(crtc, encoder, state, old_vc4_state->assigned_channel);

drivers/gpu/drm/vc4/vc4_crtc.c

647

vc4_crtc_send_vblank(crtc);

drivers/gpu/drm/vc4/vc4_crtc.c

650

static void vc4_crtc_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/vc4/vc4_crtc.c

654

crtc);

drivers/gpu/drm/vc4/vc4_crtc.c

655

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/vc4/vc4_crtc.c

656

struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);

drivers/gpu/drm/vc4/vc4_crtc.c

657

struct drm_encoder *encoder = vc4_get_crtc_encoder(crtc, new_state);

drivers/gpu/drm/vc4/vc4_crtc.c

662

crtc->name, crtc->base.id, encoder->name, encoder->base.id);

drivers/gpu/drm/vc4/vc4_crtc.c

672

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/vc4/vc4_crtc.c

674

vc4_hvs_atomic_enable(crtc, state);

drivers/gpu/drm/vc4/vc4_crtc.c

679

vc4_crtc_config_pv(crtc, encoder, state);

drivers/gpu/drm/vc4/vc4_crtc.c

698

static enum drm_mode_status vc4_crtc_mode_valid(struct drm_crtc *crtc,

drivers/gpu/drm/vc4/vc4_crtc.c

704

crtc->base.id);

drivers/gpu/drm/vc4/vc4_crtc.c

731

if (conn_state->crtc != state->crtc)

drivers/gpu/drm/vc4/vc4_crtc.c

742

int vc4_crtc_atomic_check(struct drm_crtc *crtc,

drivers/gpu/drm/vc4/vc4_crtc.c

746

crtc);

drivers/gpu/drm/vc4/vc4_crtc.c

753

ret = vc4_hvs_atomic_check(crtc, state);

drivers/gpu/drm/vc4/vc4_crtc.c

757

encoder = vc4_get_crtc_encoder(crtc, crtc_state);

drivers/gpu/drm/vc4/vc4_crtc.c

772

if (conn_state->crtc != crtc)

drivers/gpu/drm/vc4/vc4_crtc.c

792

static int vc4_enable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/vc4/vc4_crtc.c

794

struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);

drivers/gpu/drm/vc4/vc4_crtc.c

795

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/vc4/vc4_crtc.c

808

static void vc4_disable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/vc4/vc4_crtc.c

810

struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);

drivers/gpu/drm/vc4/vc4_crtc.c

811

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/vc4/vc4_crtc.c

824

struct drm_crtc *crtc = &vc4_crtc->base;

drivers/gpu/drm/vc4/vc4_crtc.c

825

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/vc4/vc4_crtc.c

843

drm_crtc_send_vblank_event(crtc, vc4_crtc->event);

drivers/gpu/drm/vc4/vc4_crtc.c

845

drm_crtc_vblank_put(crtc);

drivers/gpu/drm/vc4/vc4_crtc.c

860

void vc4_crtc_handle_vblank(struct vc4_crtc *crtc)

drivers/gpu/drm/vc4/vc4_crtc.c

862

crtc->t_vblank = ktime_get();

drivers/gpu/drm/vc4/vc4_crtc.c

863

drm_crtc_handle_vblank(&crtc->base);

drivers/gpu/drm/vc4/vc4_crtc.c

864

vc4_crtc_handle_page_flip(crtc);

drivers/gpu/drm/vc4/vc4_crtc.c

883

struct drm_crtc *crtc;

drivers/gpu/drm/vc4/vc4_crtc.c

896

struct drm_crtc *crtc = flip_state->crtc;

drivers/gpu/drm/vc4/vc4_crtc.c

897

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/vc4/vc4_crtc.c

898

struct drm_plane *plane = crtc->primary;

drivers/gpu/drm/vc4/vc4_crtc.c

905

drm_crtc_send_vblank_event(crtc, flip_state->event);

drivers/gpu/drm/vc4/vc4_crtc.c

909

drm_crtc_vblank_put(crtc);

drivers/gpu/drm/vc4/vc4_crtc.c

991

vc4_async_page_flip_common(struct drm_crtc *crtc,

drivers/gpu/drm/vc4/vc4_crtc.c

996

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/vc4/vc4_crtc.c

997

struct drm_plane *plane = crtc->primary;

drivers/gpu/drm/vc4/vc4_dpi.c

138

struct drm_display_mode *mode = &encoder->crtc->mode;

drivers/gpu/drm/vc4/vc4_drv.c

296

struct drm_crtc *crtc;

drivers/gpu/drm/vc4/vc4_drv.c

394

drm_for_each_crtc(crtc, drm)

drivers/gpu/drm/vc4/vc4_drv.c

395

vc4_crtc_disable_at_boot(crtc);

drivers/gpu/drm/vc4/vc4_drv.h

1031

int vc4_hvs_atomic_check(struct drm_crtc *crtc, struct drm_atomic_state *state);

drivers/gpu/drm/vc4/vc4_drv.h

1032

void vc4_hvs_atomic_begin(struct drm_crtc *crtc, struct drm_atomic_state *state);

drivers/gpu/drm/vc4/vc4_drv.h

1033

void vc4_hvs_atomic_enable(struct drm_crtc *crtc, struct drm_atomic_state *state);

drivers/gpu/drm/vc4/vc4_drv.h

1034

void vc4_hvs_atomic_disable(struct drm_crtc *crtc, struct drm_atomic_state *state);

drivers/gpu/drm/vc4/vc4_drv.h

1035

void vc4_hvs_atomic_flush(struct drm_crtc *crtc, struct drm_atomic_state *state);

drivers/gpu/drm/vc4/vc4_drv.h

603

vc4_crtc_to_vc4_crtc_data(const struct vc4_crtc *crtc)

drivers/gpu/drm/vc4/vc4_drv.h

605

return crtc->data;

drivers/gpu/drm/vc4/vc4_drv.h

609

vc4_crtc_to_vc4_pv_data(const struct vc4_crtc *crtc)

drivers/gpu/drm/vc4/vc4_drv.h

611

const struct vc4_crtc_data *data = vc4_crtc_to_vc4_crtc_data(crtc);

drivers/gpu/drm/vc4/vc4_drv.h

616

struct drm_encoder *vc4_get_crtc_encoder(struct drm_crtc *crtc,

drivers/gpu/drm/vc4/vc4_drv.h

933

int vc4_crtc_disable_at_boot(struct drm_crtc *crtc);

drivers/gpu/drm/vc4/vc4_drv.h

945

int vc4_page_flip(struct drm_crtc *crtc,

drivers/gpu/drm/vc4/vc4_drv.h

950

int vc4_crtc_atomic_check(struct drm_crtc *crtc,

drivers/gpu/drm/vc4/vc4_drv.h

952

struct drm_crtc_state *vc4_crtc_duplicate_state(struct drm_crtc *crtc);

drivers/gpu/drm/vc4/vc4_drv.h

953

void vc4_crtc_destroy_state(struct drm_crtc *crtc,

drivers/gpu/drm/vc4/vc4_drv.h

955

void vc4_crtc_reset(struct drm_crtc *crtc);

drivers/gpu/drm/vc4/vc4_drv.h

956

void vc4_crtc_handle_vblank(struct vc4_crtc *crtc);

drivers/gpu/drm/vc4/vc4_drv.h

957

void vc4_crtc_send_vblank(struct drm_crtc *crtc);

drivers/gpu/drm/vc4/vc4_drv.h

958

int vc4_crtc_late_register(struct drm_crtc *crtc);

drivers/gpu/drm/vc4/vc4_dsi.c

884

struct drm_crtc *crtc;

drivers/gpu/drm/vc4/vc4_dsi.c

911

crtc = drm_atomic_get_new_connector_state(state, connector)->crtc;

drivers/gpu/drm/vc4/vc4_dsi.c

912

crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/vc4/vc4_hdmi.c

283

struct drm_crtc *crtc;

drivers/gpu/drm/vc4/vc4_hdmi.c

297

crtc = conn_state->crtc;

drivers/gpu/drm/vc4/vc4_hdmi.c

298

if (!crtc)

drivers/gpu/drm/vc4/vc4_hdmi.c

301

ret = drm_modeset_lock(&crtc->mutex, ctx);

drivers/gpu/drm/vc4/vc4_hdmi.c

305

crtc_state = crtc->state;

drivers/gpu/drm/vc4/vc4_hdmi.c

354

return drm_atomic_helper_reset_crtc(crtc, ctx);

drivers/gpu/drm/vc4/vc4_hdmi.c

464

struct drm_crtc *crtc = new_state->crtc;

drivers/gpu/drm/vc4/vc4_hdmi.c

466

if (!crtc)

drivers/gpu/drm/vc4/vc4_hdmi.c

476

crtc_state = drm_atomic_get_crtc_state(state, crtc);

drivers/gpu/drm/vc4/vc4_hdmi.c

490

ret = drm_atomic_add_affected_planes(state, crtc);

drivers/gpu/drm/vc4/vc4_hdmi.c

498

crtc_state = drm_atomic_get_crtc_state(state, crtc);

drivers/gpu/drm/vc4/vc4_hvs.c

1025

if (crtc->state->active && old_state->active) {

drivers/gpu/drm/vc4/vc4_hvs.c

1026

vc4_hvs_install_dlist(crtc);

drivers/gpu/drm/vc4/vc4_hvs.c

1027

vc4_hvs_update_dlist(crtc);

drivers/gpu/drm/vc4/vc4_hvs.c

1030

if (crtc->state->color_mgmt_changed) {

drivers/gpu/drm/vc4/vc4_hvs.c

1035

if (crtc->state->gamma_lut) {

drivers/gpu/drm/vc4/vc4_hvs.c

1049

DRM_INFO("CRTC %d HVS after:\n", drm_crtc_index(crtc));

drivers/gpu/drm/vc4/vc4_hvs.c

425

struct drm_crtc *crtc = &vc4_crtc->base;

drivers/gpu/drm/vc4/vc4_hvs.c

426

struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc->state);

drivers/gpu/drm/vc4/vc4_hvs.c

444

(vc4_state->assigned_channel * 3 * crtc->gamma_size));

drivers/gpu/drm/vc4/vc4_hvs.c

446

for (i = 0; i < crtc->gamma_size; i++)

drivers/gpu/drm/vc4/vc4_hvs.c

448

for (i = 0; i < crtc->gamma_size; i++)

drivers/gpu/drm/vc4/vc4_hvs.c

450

for (i = 0; i < crtc->gamma_size; i++)

drivers/gpu/drm/vc4/vc4_hvs.c

619

static int vc4_hvs_init_channel(struct vc4_hvs *hvs, struct drm_crtc *crtc,

drivers/gpu/drm/vc4/vc4_hvs.c

624

struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);

drivers/gpu/drm/vc4/vc4_hvs.c

625

struct vc4_crtc_state *vc4_crtc_state = to_vc4_crtc_state(crtc->state);

drivers/gpu/drm/vc4/vc4_hvs.c

684

static int vc6_hvs_init_channel(struct vc4_hvs *hvs, struct drm_crtc *crtc,

drivers/gpu/drm/vc4/vc4_hvs.c

689

struct vc4_crtc_state *vc4_crtc_state = to_vc4_crtc_state(crtc->state);

drivers/gpu/drm/vc4/vc4_hvs.c

790

int vc4_hvs_atomic_check(struct drm_crtc *crtc, struct drm_atomic_state *state)

drivers/gpu/drm/vc4/vc4_hvs.c

792

struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/vc4/vc4_hvs.c

794

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/vc4/vc4_hvs.c

812

crtc->base.id, crtc->name,

drivers/gpu/drm/vc4/vc4_hvs.c

822

crtc->base.id, crtc->name, dlist_count);

drivers/gpu/drm/vc4/vc4_hvs.c

835

static void vc4_hvs_install_dlist(struct drm_crtc *crtc)

drivers/gpu/drm/vc4/vc4_hvs.c

837

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/vc4/vc4_hvs.c

840

struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc->state);

drivers/gpu/drm/vc4/vc4_hvs.c

857

static void vc4_hvs_update_dlist(struct drm_crtc *crtc)

drivers/gpu/drm/vc4/vc4_hvs.c

859

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/vc4/vc4_hvs.c

860

struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);

drivers/gpu/drm/vc4/vc4_hvs.c

861

struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc->state);

drivers/gpu/drm/vc4/vc4_hvs.c

864

if (crtc->state->event) {

drivers/gpu/drm/vc4/vc4_hvs.c

865

crtc->state->event->pipe = drm_crtc_index(crtc);

drivers/gpu/drm/vc4/vc4_hvs.c

867

WARN_ON(drm_crtc_vblank_get(crtc) != 0);

drivers/gpu/drm/vc4/vc4_hvs.c

872

vc4_crtc->event = crtc->state->event;

drivers/gpu/drm/vc4/vc4_hvs.c

873

crtc->state->event = NULL;

drivers/gpu/drm/vc4/vc4_hvs.c

884

void vc4_hvs_atomic_begin(struct drm_crtc *crtc,

drivers/gpu/drm/vc4/vc4_hvs.c

887

struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);

drivers/gpu/drm/vc4/vc4_hvs.c

888

struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc->state);

drivers/gpu/drm/vc4/vc4_hvs.c

896

void vc4_hvs_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/vc4/vc4_hvs.c

899

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/vc4/vc4_hvs.c

901

struct drm_display_mode *mode = &crtc->state->adjusted_mode;

drivers/gpu/drm/vc4/vc4_hvs.c

902

struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);

drivers/gpu/drm/vc4/vc4_hvs.c

905

vc4_hvs_install_dlist(crtc);

drivers/gpu/drm/vc4/vc4_hvs.c

906

vc4_hvs_update_dlist(crtc);

drivers/gpu/drm/vc4/vc4_hvs.c

909

vc6_hvs_init_channel(vc4->hvs, crtc, mode, oneshot);

drivers/gpu/drm/vc4/vc4_hvs.c

911

vc4_hvs_init_channel(vc4->hvs, crtc, mode, oneshot);

drivers/gpu/drm/vc4/vc4_hvs.c

914

void vc4_hvs_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/vc4/vc4_hvs.c

917

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/vc4/vc4_hvs.c

919

struct drm_crtc_state *old_state = drm_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/vc4/vc4_hvs.c

926

void vc4_hvs_atomic_flush(struct drm_crtc *crtc,

drivers/gpu/drm/vc4/vc4_hvs.c

930

crtc);

drivers/gpu/drm/vc4/vc4_hvs.c

931

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/vc4/vc4_hvs.c

934

struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);

drivers/gpu/drm/vc4/vc4_hvs.c

935

struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc->state);

drivers/gpu/drm/vc4/vc4_hvs.c

950

vc4_crtc_send_vblank(crtc);

drivers/gpu/drm/vc4/vc4_hvs.c

958

DRM_INFO("CRTC %d HVS before:\n", drm_crtc_index(crtc));

drivers/gpu/drm/vc4/vc4_hvs.c

966

drm_atomic_crtc_for_each_plane(plane, crtc) {

drivers/gpu/drm/vc4/vc4_kms.c

1004

struct drm_crtc *crtc;

drivers/gpu/drm/vc4/vc4_kms.c

1021

for_each_oldnew_crtc_in_state(state, crtc,

drivers/gpu/drm/vc4/vc4_kms.c

216

struct drm_crtc *crtc;

drivers/gpu/drm/vc4/vc4_kms.c

221

for_each_new_crtc_in_state(state, crtc, crtc_state, i) {

drivers/gpu/drm/vc4/vc4_kms.c

222

struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);

drivers/gpu/drm/vc4/vc4_kms.c

259

struct drm_crtc *crtc;

drivers/gpu/drm/vc4/vc4_kms.c

266

for_each_new_crtc_in_state(state, crtc, crtc_state, i) {

drivers/gpu/drm/vc4/vc4_kms.c

268

struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);

drivers/gpu/drm/vc4/vc4_kms.c

335

struct drm_crtc *crtc;

drivers/gpu/drm/vc4/vc4_kms.c

340

for_each_new_crtc_in_state(state, crtc, crtc_state, i) {

drivers/gpu/drm/vc4/vc4_kms.c

353

encoder = vc4_get_crtc_encoder(crtc, crtc_state);

drivers/gpu/drm/vc4/vc4_kms.c

397

struct drm_crtc *crtc;

drivers/gpu/drm/vc4/vc4_kms.c

400

for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) {

drivers/gpu/drm/vc4/vc4_kms.c

506

struct drm_crtc *crtc;

drivers/gpu/drm/vc4/vc4_kms.c

513

for_each_new_crtc_in_state(state, crtc, crtc_state, i) {

drivers/gpu/drm/vc4/vc4_kms.c

585

struct drm_crtc *crtc;

drivers/gpu/drm/vc4/vc4_kms.c

590

for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {

drivers/gpu/drm/vc4/vc4_kms.c

600

for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {

drivers/gpu/drm/vc4/vc4_kms.c

666

if (old_plane_state->fb && old_plane_state->crtc) {

drivers/gpu/drm/vc4/vc4_kms.c

672

if (new_plane_state->fb && new_plane_state->crtc) {

drivers/gpu/drm/vc4/vc4_kms.c

880

struct drm_crtc *crtc;

drivers/gpu/drm/vc4/vc4_kms.c

919

drm_for_each_crtc(crtc, dev)

drivers/gpu/drm/vc4/vc4_kms.c

920

sorted_crtcs[i++] = crtc;

drivers/gpu/drm/vc4/vc4_kms.c

931

crtc = sorted_crtcs[i];

drivers/gpu/drm/vc4/vc4_kms.c

932

if (!crtc)

drivers/gpu/drm/vc4/vc4_kms.c

934

vc4_crtc = to_vc4_crtc(crtc);

drivers/gpu/drm/vc4/vc4_kms.c

936

old_crtc_state = drm_atomic_get_old_crtc_state(state, crtc);

drivers/gpu/drm/vc4/vc4_kms.c

941

new_crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/vc4/vc4_kms.c

946

drm_dbg(dev, "%s: Trying to find a channel.\n", crtc->name);

drivers/gpu/drm/vc4/vc4_kms.c

952

crtc->name, new_vc4_crtc_state->assigned_channel);

drivers/gpu/drm/vc4/vc4_kms.c

954

drm_dbg(dev, "%s: Disabled, ignoring.\n", crtc->name);

drivers/gpu/drm/vc4/vc4_kms.c

967

crtc->name, channel);

drivers/gpu/drm/vc4/vc4_kms.c

982

drm_dbg(dev, "Assigned HVS channel %d to CRTC %s\n", channel, crtc->name);

drivers/gpu/drm/vc4/vc4_plane.c

1678

vc4_state->crtc_w == state->crtc->mode.hdisplay &&

drivers/gpu/drm/vc4/vc4_plane.c

1679

vc4_state->crtc_h == state->crtc->mode.vdisplay;

drivers/gpu/drm/vc4/vc4_plane.c

2093

vc4_state->crtc_w == state->crtc->mode.hdisplay &&

drivers/gpu/drm/vc4/vc4_plane.c

2094

vc4_state->crtc_h == state->crtc->mode.vdisplay;

drivers/gpu/drm/vc4/vc4_plane.c

2577

struct drm_crtc *crtc;

drivers/gpu/drm/vc4/vc4_plane.c

2604

drm_for_each_crtc(crtc, drm) {

drivers/gpu/drm/vc4/vc4_plane.c

2610

drm_crtc_mask(crtc));

drivers/gpu/drm/vc4/vc4_plane.c

2612

crtc->cursor = cursor_plane;

drivers/gpu/drm/vc4/vc4_plane.c

277

return state->fb && !WARN_ON(!state->crtc);

drivers/gpu/drm/vc4/vc4_plane.c

452

pstate->crtc);

drivers/gpu/drm/vc4/vc4_plane.c

501

crtc_state = drm_atomic_get_new_crtc_state(state->state, state->crtc);

drivers/gpu/drm/vc4/vc4_plane.c

878

crtc_state = drm_atomic_get_new_crtc_state(state->state, state->crtc);

drivers/gpu/drm/vc4/vc4_txp.c

260

crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc);

drivers/gpu/drm/vc4/vc4_txp.c

308

mode = &conn_state->crtc->state->adjusted_mode;

drivers/gpu/drm/vc4/vc4_txp.c

419

static int vc4_txp_enable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/vc4/vc4_txp.c

424

static void vc4_txp_disable_vblank(struct drm_crtc *crtc) {}

drivers/gpu/drm/vc4/vc4_txp.c

437

static int vc4_txp_atomic_check(struct drm_crtc *crtc,

drivers/gpu/drm/vc4/vc4_txp.c

441

crtc);

drivers/gpu/drm/vc4/vc4_txp.c

444

ret = vc4_hvs_atomic_check(crtc, state);

drivers/gpu/drm/vc4/vc4_txp.c

453

static void vc4_txp_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/vc4/vc4_txp.c

456

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/vc4/vc4_txp.c

457

vc4_hvs_atomic_enable(crtc, state);

drivers/gpu/drm/vc4/vc4_txp.c

460

static void vc4_txp_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/vc4/vc4_txp.c

463

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/vc4/vc4_txp.c

466

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/vc4/vc4_txp.c

468

vc4_hvs_atomic_disable(crtc, state);

drivers/gpu/drm/vc4/vc4_txp.c

474

if (crtc->state->event) {

drivers/gpu/drm/vc4/vc4_txp.c

478

drm_crtc_send_vblank_event(crtc, crtc->state->event);

drivers/gpu/drm/vc4/vc4_txp.c

479

crtc->state->event = NULL;

drivers/gpu/drm/vc4/vc4_vec.c

573

&encoder->crtc->state->adjusted_mode;

drivers/gpu/drm/virtio/virtgpu_display.c

103

static void virtio_gpu_crtc_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/virtio/virtgpu_display.c

106

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/virtio/virtgpu_display.c

109

static void virtio_gpu_crtc_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/virtio/virtgpu_display.c

112

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/virtio/virtgpu_display.c

114

struct virtio_gpu_output *output = drm_crtc_to_virtio_gpu_output(crtc);

drivers/gpu/drm/virtio/virtgpu_display.c

116

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/virtio/virtgpu_display.c

122

static int virtio_gpu_crtc_atomic_check(struct drm_crtc *crtc,

drivers/gpu/drm/virtio/virtgpu_display.c

128

static void virtio_gpu_crtc_atomic_flush(struct drm_crtc *crtc,

drivers/gpu/drm/virtio/virtgpu_display.c

131

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/virtio/virtgpu_display.c

132

struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/virtio/virtgpu_display.c

133

struct virtio_gpu_output *output = drm_crtc_to_virtio_gpu_output(crtc);

drivers/gpu/drm/virtio/virtgpu_display.c

151

if (drm_crtc_vblank_get(crtc) == 0)

drivers/gpu/drm/virtio/virtgpu_display.c

152

drm_crtc_arm_vblank_event(crtc, event);

drivers/gpu/drm/virtio/virtgpu_display.c

154

drm_crtc_send_vblank_event(crtc, event);

drivers/gpu/drm/virtio/virtgpu_display.c

280

struct drm_crtc *crtc = &output->crtc;

drivers/gpu/drm/virtio/virtgpu_display.c

297

ret = drm_crtc_init_with_planes(dev, crtc, primary, cursor,

drivers/gpu/drm/virtio/virtgpu_display.c

301

drm_crtc_helper_add(crtc, &virtio_gpu_crtc_helper_funcs);

drivers/gpu/drm/virtio/virtgpu_display.c

91

static void virtio_gpu_crtc_mode_set_nofb(struct drm_crtc *crtc)

drivers/gpu/drm/virtio/virtgpu_display.c

93

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/virtio/virtgpu_display.c

95

struct virtio_gpu_output *output = drm_crtc_to_virtio_gpu_output(crtc);

drivers/gpu/drm/virtio/virtgpu_display.c

98

crtc->mode.hdisplay,

drivers/gpu/drm/virtio/virtgpu_display.c

99

crtc->mode.vdisplay, 0, 0);

drivers/gpu/drm/virtio/virtgpu_drv.h

178

struct drm_crtc crtc;

drivers/gpu/drm/virtio/virtgpu_drv.h

189

container_of(x, struct virtio_gpu_output, crtc)

drivers/gpu/drm/virtio/virtgpu_plane.c

110

if (!new_plane_state->fb || WARN_ON(!new_plane_state->crtc))

drivers/gpu/drm/virtio/virtgpu_plane.c

122

new_plane_state->crtc);

drivers/gpu/drm/virtio/virtgpu_plane.c

243

if (plane->state->crtc)

drivers/gpu/drm/virtio/virtgpu_plane.c

244

output = drm_crtc_to_virtio_gpu_output(plane->state->crtc);

drivers/gpu/drm/virtio/virtgpu_plane.c

245

if (old_state->crtc)

drivers/gpu/drm/virtio/virtgpu_plane.c

246

output = drm_crtc_to_virtio_gpu_output(old_state->crtc);

drivers/gpu/drm/virtio/virtgpu_plane.c

250

if (!plane->state->fb || !output->crtc.state->active) {

drivers/gpu/drm/virtio/virtgpu_plane.c

438

if (plane->state->crtc)

drivers/gpu/drm/virtio/virtgpu_plane.c

439

output = drm_crtc_to_virtio_gpu_output(plane->state->crtc);

drivers/gpu/drm/virtio/virtgpu_plane.c

440

if (old_state->crtc)

drivers/gpu/drm/virtio/virtgpu_plane.c

441

output = drm_crtc_to_virtio_gpu_output(old_state->crtc);

drivers/gpu/drm/vkms/vkms_composer.c

599

struct drm_crtc *crtc = crtc_state->base.crtc;

drivers/gpu/drm/vkms/vkms_composer.c

601

struct vkms_output *out = drm_crtc_to_vkms_output(crtc);

drivers/gpu/drm/vkms/vkms_composer.c

616

if (crtc->state->gamma_lut) {

drivers/gpu/drm/vkms/vkms_composer.c

620

crtc_state->gamma_lut.base = (struct drm_color_lut *)crtc->state->gamma_lut->data;

drivers/gpu/drm/vkms/vkms_composer.c

622

crtc->state->gamma_lut->length / sizeof(struct drm_color_lut);

drivers/gpu/drm/vkms/vkms_composer.c

659

drm_crtc_add_crc_entry(crtc, true, frame_start++, &crc32);

drivers/gpu/drm/vkms/vkms_composer.c

664

const char *const *vkms_get_crc_sources(struct drm_crtc *crtc,

drivers/gpu/drm/vkms/vkms_composer.c

687

int vkms_verify_crc_source(struct drm_crtc *crtc, const char *src_name,

drivers/gpu/drm/vkms/vkms_composer.c

707

drm_crtc_vblank_get(&out->crtc);

drivers/gpu/drm/vkms/vkms_composer.c

715

drm_crtc_vblank_put(&out->crtc);

drivers/gpu/drm/vkms/vkms_composer.c

718

int vkms_set_crc_source(struct drm_crtc *crtc, const char *src_name)

drivers/gpu/drm/vkms/vkms_composer.c

720

struct vkms_output *out = drm_crtc_to_vkms_output(crtc);

drivers/gpu/drm/vkms/vkms_config.h

76

struct vkms_output *crtc;

drivers/gpu/drm/vkms/vkms_configfs.c

139

struct vkms_configfs_crtc *crtc;

drivers/gpu/drm/vkms/vkms_configfs.c

142

crtc = crtc_item_to_vkms_configfs_crtc(item);

drivers/gpu/drm/vkms/vkms_configfs.c

144

scoped_guard(mutex, &crtc->dev->lock)

drivers/gpu/drm/vkms/vkms_configfs.c

145

writeback = vkms_config_crtc_get_writeback(crtc->config);

drivers/gpu/drm/vkms/vkms_configfs.c

153

struct vkms_configfs_crtc *crtc;

drivers/gpu/drm/vkms/vkms_configfs.c

156

crtc = crtc_item_to_vkms_configfs_crtc(item);

drivers/gpu/drm/vkms/vkms_configfs.c

161

scoped_guard(mutex, &crtc->dev->lock) {

drivers/gpu/drm/vkms/vkms_configfs.c

162

if (crtc->dev->enabled)

drivers/gpu/drm/vkms/vkms_configfs.c

165

vkms_config_crtc_set_writeback(crtc->config, writeback);

drivers/gpu/drm/vkms/vkms_configfs.c

180

struct vkms_configfs_crtc *crtc;

drivers/gpu/drm/vkms/vkms_configfs.c

183

crtc = crtc_item_to_vkms_configfs_crtc(item);

drivers/gpu/drm/vkms/vkms_configfs.c

184

lock = &crtc->dev->lock;

drivers/gpu/drm/vkms/vkms_configfs.c

187

vkms_config_destroy_crtc(crtc->dev->config, crtc->config);

drivers/gpu/drm/vkms/vkms_configfs.c

188

kfree(crtc);

drivers/gpu/drm/vkms/vkms_configfs.c

206

struct vkms_configfs_crtc *crtc;

drivers/gpu/drm/vkms/vkms_configfs.c

215

crtc = kzalloc(sizeof(*crtc), GFP_KERNEL);

drivers/gpu/drm/vkms/vkms_configfs.c

216

if (!crtc)

drivers/gpu/drm/vkms/vkms_configfs.c

219

crtc->dev = dev;

drivers/gpu/drm/vkms/vkms_configfs.c

221

crtc->config = vkms_config_create_crtc(dev->config);

drivers/gpu/drm/vkms/vkms_configfs.c

222

if (IS_ERR(crtc->config)) {

drivers/gpu/drm/vkms/vkms_configfs.c

223

ret = PTR_ERR(crtc->config);

drivers/gpu/drm/vkms/vkms_configfs.c

224

kfree(crtc);

drivers/gpu/drm/vkms/vkms_configfs.c

228

config_group_init_type_name(&crtc->group, name, &crtc_item_type);

drivers/gpu/drm/vkms/vkms_configfs.c

231

return &crtc->group;

drivers/gpu/drm/vkms/vkms_configfs.c

247

struct vkms_configfs_crtc *crtc;

drivers/gpu/drm/vkms/vkms_configfs.c

254

crtc = crtc_item_to_vkms_configfs_crtc(target);

drivers/gpu/drm/vkms/vkms_configfs.c

260

ret = vkms_config_plane_attach_crtc(plane->config, crtc->config);

drivers/gpu/drm/vkms/vkms_configfs.c

270

struct vkms_configfs_crtc *crtc;

drivers/gpu/drm/vkms/vkms_configfs.c

273

crtc = crtc_item_to_vkms_configfs_crtc(target);

drivers/gpu/drm/vkms/vkms_configfs.c

276

vkms_config_plane_detach_crtc(plane->config, crtc->config);

drivers/gpu/drm/vkms/vkms_configfs.c

409

struct vkms_configfs_crtc *crtc;

drivers/gpu/drm/vkms/vkms_configfs.c

416

crtc = crtc_item_to_vkms_configfs_crtc(target);

drivers/gpu/drm/vkms/vkms_configfs.c

422

ret = vkms_config_encoder_attach_crtc(encoder->config, crtc->config);

drivers/gpu/drm/vkms/vkms_configfs.c

432

struct vkms_configfs_crtc *crtc;

drivers/gpu/drm/vkms/vkms_configfs.c

435

crtc = crtc_item_to_vkms_configfs_crtc(target);

drivers/gpu/drm/vkms/vkms_configfs.c

438

vkms_config_encoder_detach_crtc(encoder->config, crtc->config);

drivers/gpu/drm/vkms/vkms_crtc.c

112

static int vkms_crtc_atomic_check(struct drm_crtc *crtc,

drivers/gpu/drm/vkms/vkms_crtc.c

116

crtc);

drivers/gpu/drm/vkms/vkms_crtc.c

125

ret = drm_atomic_add_affected_planes(crtc_state->state, crtc);

drivers/gpu/drm/vkms/vkms_crtc.c

129

drm_for_each_plane_mask(plane, crtc->dev, crtc_state->plane_mask) {

drivers/gpu/drm/vkms/vkms_crtc.c

145

drm_for_each_plane_mask(plane, crtc->dev, crtc_state->plane_mask) {

drivers/gpu/drm/vkms/vkms_crtc.c

15

static bool vkms_crtc_handle_vblank_timeout(struct drm_crtc *crtc)

drivers/gpu/drm/vkms/vkms_crtc.c

158

static void vkms_crtc_atomic_begin(struct drm_crtc *crtc,

drivers/gpu/drm/vkms/vkms_crtc.c

162

struct vkms_output *vkms_output = drm_crtc_to_vkms_output(crtc);

drivers/gpu/drm/vkms/vkms_crtc.c

17

struct vkms_output *output = drm_crtc_to_vkms_output(crtc);

drivers/gpu/drm/vkms/vkms_crtc.c

170

static void vkms_crtc_atomic_flush(struct drm_crtc *crtc,

drivers/gpu/drm/vkms/vkms_crtc.c

174

struct vkms_output *vkms_output = drm_crtc_to_vkms_output(crtc);

drivers/gpu/drm/vkms/vkms_crtc.c

176

if (crtc->state->event) {

drivers/gpu/drm/vkms/vkms_crtc.c

177

spin_lock(&crtc->dev->event_lock);

drivers/gpu/drm/vkms/vkms_crtc.c

179

if (drm_crtc_vblank_get(crtc) != 0)

drivers/gpu/drm/vkms/vkms_crtc.c

180

drm_crtc_send_vblank_event(crtc, crtc->state->event);

drivers/gpu/drm/vkms/vkms_crtc.c

182

drm_crtc_arm_vblank_event(crtc, crtc->state->event);

drivers/gpu/drm/vkms/vkms_crtc.c

184

spin_unlock(&crtc->dev->event_lock);

drivers/gpu/drm/vkms/vkms_crtc.c

186

crtc->state->event = NULL;

drivers/gpu/drm/vkms/vkms_crtc.c

189

vkms_output->composer_state = to_vkms_crtc_state(crtc->state);

drivers/gpu/drm/vkms/vkms_crtc.c

207

struct drm_crtc *crtc;

drivers/gpu/drm/vkms/vkms_crtc.c

210

vkms_out = drmm_crtc_alloc_with_planes(dev, struct vkms_output, crtc,

drivers/gpu/drm/vkms/vkms_crtc.c

218

crtc = &vkms_out->crtc;

drivers/gpu/drm/vkms/vkms_crtc.c

220

drm_crtc_helper_add(crtc, &vkms_crtc_helper_funcs);

drivers/gpu/drm/vkms/vkms_crtc.c

222

ret = drm_mode_crtc_set_gamma_size(crtc, VKMS_LUT_SIZE);

drivers/gpu/drm/vkms/vkms_crtc.c

228

drm_crtc_enable_color_mgmt(crtc, 0, false, VKMS_LUT_SIZE);

drivers/gpu/drm/vkms/vkms_crtc.c

24

ret = drm_crtc_handle_vblank(crtc);

drivers/gpu/drm/vkms/vkms_crtc.c

32

u64 frame = drm_crtc_accurate_vblank_count(crtc);

drivers/gpu/drm/vkms/vkms_crtc.c

58

vkms_atomic_crtc_duplicate_state(struct drm_crtc *crtc)

drivers/gpu/drm/vkms/vkms_crtc.c

62

if (WARN_ON(!crtc->state))

drivers/gpu/drm/vkms/vkms_crtc.c

69

__drm_atomic_helper_crtc_duplicate_state(crtc, &vkms_state->base);

drivers/gpu/drm/vkms/vkms_crtc.c

76

static void vkms_atomic_crtc_destroy_state(struct drm_crtc *crtc,

drivers/gpu/drm/vkms/vkms_crtc.c

88

static void vkms_atomic_crtc_reset(struct drm_crtc *crtc)

drivers/gpu/drm/vkms/vkms_crtc.c

92

if (crtc->state)

drivers/gpu/drm/vkms/vkms_crtc.c

93

vkms_atomic_crtc_destroy_state(crtc, crtc->state);

drivers/gpu/drm/vkms/vkms_crtc.c

95

__drm_atomic_helper_crtc_reset(crtc, &vkms_state->base);

drivers/gpu/drm/vkms/vkms_drv.c

107

struct drm_crtc *crtc;

drivers/gpu/drm/vkms/vkms_drv.c

111

for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) {

drivers/gpu/drm/vkms/vkms_drv.c

68

struct drm_crtc *crtc;

drivers/gpu/drm/vkms/vkms_drv.c

84

for_each_old_crtc_in_state(old_state, crtc, old_crtc_state, i) {

drivers/gpu/drm/vkms/vkms_drv.h

219

struct drm_crtc crtc;

drivers/gpu/drm/vkms/vkms_drv.h

253

container_of(target, struct vkms_output, crtc)

drivers/gpu/drm/vkms/vkms_drv.h

312

const char *const *vkms_get_crc_sources(struct drm_crtc *crtc,

drivers/gpu/drm/vkms/vkms_drv.h

314

int vkms_set_crc_source(struct drm_crtc *crtc, const char *src_name);

drivers/gpu/drm/vkms/vkms_drv.h

315

int vkms_verify_crc_source(struct drm_crtc *crtc, const char *source_name,

drivers/gpu/drm/vkms/vkms_output.c

36

crtc_cfg->crtc = vkms_crtc_init(dev, &primary->plane->base,

drivers/gpu/drm/vkms/vkms_output.c

38

if (IS_ERR(crtc_cfg->crtc)) {

drivers/gpu/drm/vkms/vkms_output.c

40

return PTR_ERR(crtc_cfg->crtc);

drivers/gpu/drm/vkms/vkms_output.c

45

writeback = vkms_enable_writeback_connector(vkmsdev, crtc_cfg->crtc);

drivers/gpu/drm/vkms/vkms_output.c

57

drm_crtc_mask(&possible_crtc->crtc->crtc);

drivers/gpu/drm/vkms/vkms_output.c

82

drm_crtc_mask(&possible_crtc->crtc->crtc);

drivers/gpu/drm/vkms/vkms_output.c

86

&possible_crtc->crtc->wb_encoder;

drivers/gpu/drm/vkms/vkms_plane.c

135

if (!new_state->crtc || !fb)

drivers/gpu/drm/vkms/vkms_plane.c

163

if (!new_plane_state->fb || WARN_ON(!new_plane_state->crtc))

drivers/gpu/drm/vkms/vkms_plane.c

167

new_plane_state->crtc);

drivers/gpu/drm/vkms/vkms_plane.c

81

struct drm_crtc *crtc = vkms_state->base.base.crtc;

drivers/gpu/drm/vkms/vkms_plane.c

83

if (crtc && vkms_state->frame_info->fb) {

drivers/gpu/drm/vkms/vkms_writeback.c

130

struct vkms_output *output = drm_crtc_to_vkms_output(connector_state->crtc);

drivers/gpu/drm/vkms/vkms_writeback.c

177

vkms_output->wb_encoder.possible_crtcs |= drm_crtc_mask(&vkms_output->crtc);

drivers/gpu/drm/vkms/vkms_writeback.c

47

if (!conn_state->crtc)

drivers/gpu/drm/vkms/vkms_writeback.c

50

crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_cursor_plane.c

705

if (new_state->crtc)

drivers/gpu/drm/vmwgfx/vmwgfx_cursor_plane.c

707

new_state->crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_cursor_plane.c

749

struct drm_crtc *crtc = new_state->crtc ?: old_state->crtc;

drivers/gpu/drm/vmwgfx/vmwgfx_cursor_plane.c

751

struct vmw_display_unit *du = vmw_crtc_to_du(crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_cursor_plane.c

803

struct drm_crtc *crtc;

drivers/gpu/drm/vmwgfx/vmwgfx_cursor_plane.c

808

list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {

drivers/gpu/drm/vmwgfx/vmwgfx_cursor_plane.c

809

du = vmw_crtc_to_du(crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_cursor_plane.c

819

crtc = drm_crtc_find(dev, file_priv, arg->crtc_id);

drivers/gpu/drm/vmwgfx/vmwgfx_cursor_plane.c

820

if (!crtc) {

drivers/gpu/drm/vmwgfx/vmwgfx_cursor_plane.c

825

du = vmw_crtc_to_du(crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

1040

struct drm_crtc *crtc;

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

1055

for_each_new_crtc_in_state(state, crtc, crtc_state, i) {

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

1139

struct drm_crtc *crtc;

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

1146

for_each_old_crtc_in_state(old_state, crtc, old_crtc_state, i) {

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

1147

struct vmw_display_unit *du = vmw_crtc_to_du(crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

123

if (new_state->crtc)

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

125

new_state->crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

1256

struct drm_crtc *crtc;

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

1263

drm_for_each_crtc(crtc, dev) {

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

1264

ret = drm_modeset_lock(&crtc->mutex, &ctx);

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

1322

int vmw_du_crtc_gamma_set(struct drm_crtc *crtc,

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

1327

struct vmw_private *dev_priv = vmw_priv(crtc->dev);

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

134

int vmw_du_crtc_atomic_check(struct drm_crtc *crtc,

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

137

struct vmw_private *vmw = vmw_priv(crtc->dev);

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

139

crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

140

struct vmw_display_unit *du = vmw_crtc_to_du(new_state->crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

143

drm_plane_mask(crtc->primary);

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

1515

struct drm_crtc *crtc;

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

1522

if (dirty->crtc) {

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

1523

units[num_units++] = vmw_crtc_to_du(dirty->crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

1525

list_for_each_entry(crtc, &dev_priv->drm.mode_config.crtc_list,

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

1527

struct drm_plane *plane = crtc->primary;

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

1530

units[num_units++] = vmw_crtc_to_du(crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

1536

s32 crtc_x = unit->crtc.x;

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

1537

s32 crtc_y = unit->crtc.y;

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

1538

s32 crtc_width = unit->crtc.mode.hdisplay;

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

1539

s32 crtc_height = unit->crtc.mode.vdisplay;

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

171

void vmw_du_crtc_atomic_begin(struct drm_crtc *crtc,

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

174

vmw_vkms_crtc_atomic_begin(crtc, state);

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

187

vmw_du_crtc_duplicate_state(struct drm_crtc *crtc)

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

192

if (WARN_ON(!crtc->state))

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

195

vcs = kmemdup(crtc->state, sizeof(*vcs), GFP_KERNEL);

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

202

__drm_atomic_helper_crtc_duplicate_state(crtc, state);

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

216

void vmw_du_crtc_reset(struct drm_crtc *crtc)

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

221

if (crtc->state) {

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

222

__drm_atomic_helper_crtc_destroy_state(crtc->state);

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

224

kfree(vmw_crtc_state_to_vcs(crtc->state));

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

234

__drm_atomic_helper_crtc_reset(crtc, &vcs->base);

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

247

vmw_du_crtc_destroy_state(struct drm_crtc *crtc,

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

250

drm_atomic_helper_crtc_destroy_state(crtc, state);

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

26

vmw_vkms_crtc_init(&du->crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

33

vmw_vkms_crtc_cleanup(&du->crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

39

drm_crtc_cleanup(&du->crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

867

vmw_crtc_state_and_lock(struct drm_atomic_state *state, struct drm_crtc *crtc)

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

871

crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

873

lockdep_assert_held(&crtc->mutex.mutex.base);

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

875

int ret = drm_modeset_lock(&crtc->mutex, state->acquire_ctx);

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

880

crtc_state = crtc->state;

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

901

struct drm_crtc *crtc;

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

905

drm_for_each_crtc(crtc, dev) {

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

906

struct vmw_display_unit *du = vmw_crtc_to_du(crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

911

crtc_state = vmw_crtc_state_and_lock(state, crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

923

if (plane_state->crtc != crtc)

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

948

struct drm_crtc *crtc;

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

956

drm_for_each_crtc(crtc, dev) {

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

957

struct vmw_display_unit *du = vmw_crtc_to_du(crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

960

i = drm_crtc_index(crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

962

crtc_state = vmw_crtc_state_and_lock(state, crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

985

for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state,

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

987

struct vmw_display_unit *du = vmw_crtc_to_du(crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_kms.h

173

struct drm_crtc *crtc;

drivers/gpu/drm/vmwgfx/vmwgfx_kms.h

299

struct drm_crtc crtc;

drivers/gpu/drm/vmwgfx/vmwgfx_kms.h

344

container_of(x, struct vmw_display_unit, crtc)

drivers/gpu/drm/vmwgfx/vmwgfx_kms.h

354

int vmw_du_crtc_gamma_set(struct drm_crtc *crtc,

drivers/gpu/drm/vmwgfx/vmwgfx_kms.h

422

int vmw_du_crtc_atomic_check(struct drm_crtc *crtc,

drivers/gpu/drm/vmwgfx/vmwgfx_kms.h

424

void vmw_du_crtc_atomic_begin(struct drm_crtc *crtc,

drivers/gpu/drm/vmwgfx/vmwgfx_kms.h

426

void vmw_du_crtc_reset(struct drm_crtc *crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_kms.h

427

struct drm_crtc_state *vmw_du_crtc_duplicate_state(struct drm_crtc *crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_kms.h

428

void vmw_du_crtc_destroy_state(struct drm_crtc *crtc,

drivers/gpu/drm/vmwgfx/vmwgfx_kms.h

460

struct drm_crtc *crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_kms.h

468

struct drm_crtc *crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_kms.h

475

struct drm_crtc *crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_kms.h

490

struct drm_crtc *crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_kms.h

499

struct drm_crtc *crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c

101

fb = crtc->primary->state->fb;

drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c

110

fb = entry->base.crtc.primary->state->fb;

drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c

122

crtc = &entry->base.crtc;

drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c

126

vmw_write(dev_priv, SVGA_REG_DISPLAY_POSITION_X, crtc->x);

drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c

127

vmw_write(dev_priv, SVGA_REG_DISPLAY_POSITION_Y, crtc->y);

drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c

128

vmw_write(dev_priv, SVGA_REG_DISPLAY_WIDTH, crtc->mode.hdisplay);

drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c

129

vmw_write(dev_priv, SVGA_REG_DISPLAY_HEIGHT, crtc->mode.vdisplay);

drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c

245

static void vmw_ldu_crtc_mode_set_nofb(struct drm_crtc *crtc)

drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c

323

struct drm_crtc *crtc = new_state->crtc ?: old_state->crtc;

drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c

325

ldu = vmw_crtc_to_ldu(crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c

39

container_of(x, struct vmw_legacy_display_unit, base.crtc)

drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c

416

struct drm_crtc *crtc;

drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c

424

crtc = &ldu->base.crtc;

drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c

500

ret = drm_crtc_init_with_planes(dev, crtc, primary,

drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c

508

drm_crtc_helper_add(crtc, &vmw_ldu_crtc_helper_funcs);

drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c

510

drm_mode_crtc_set_gamma_size(crtc, 256);

drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c

75

static void vmw_ldu_crtc_destroy(struct drm_crtc *crtc)

drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c

77

vmw_ldu_destroy(vmw_crtc_to_ldu(crtc));

drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c

85

struct drm_crtc *crtc = NULL;

drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c

94

crtc = &entry->base.crtc;

drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c

95

w = max(w, crtc->x + crtc->mode.hdisplay);

drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c

96

h = max(h, crtc->y + crtc->mode.vdisplay);

drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c

99

if (crtc == NULL)

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

1102

struct drm_crtc *crtc)

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

111

static void vmw_sou_crtc_destroy(struct drm_crtc *crtc)

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

1127

sdirty.base.crtc = crtc;

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

113

vmw_sou_destroy(vmw_crtc_to_sou(crtc));

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

1216

struct drm_crtc *crtc)

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

1239

dirty.crtc = crtc;

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

1325

struct drm_crtc *crtc)

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

1347

dirty.crtc = crtc;

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

213

static void vmw_sou_crtc_mode_set_nofb(struct drm_crtc *crtc)

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

223

sou = vmw_crtc_to_sou(crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

224

dev_priv = vmw_priv(crtc->dev);

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

225

ps = crtc->primary->state;

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

252

ret = vmw_sou_fifo_create(dev_priv, sou, x, y, &crtc->mode);

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

255

crtc->x, crtc->y);

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

269

static void vmw_sou_crtc_helper_prepare(struct drm_crtc *crtc)

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

279

static void vmw_sou_crtc_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

287

if (!crtc) {

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

292

sou = vmw_crtc_to_sou(crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

293

dev_priv = vmw_priv(crtc->dev);

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

296

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

378

struct drm_crtc *crtc = plane->state->crtc ?

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

379

plane->state->crtc : old_state->crtc;

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

383

vmw_bo_unpin(vmw_priv(crtc->dev), bo, false);

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

40

container_of(x, struct vmw_screen_object_unit, base.crtc)

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

406

struct drm_crtc *crtc = plane->state->crtc ?: new_state->crtc;

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

426

dev_priv = vmw_priv(crtc->dev);

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

543

bo_update.base.du = vmw_crtc_to_du(plane->state->crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

705

srf_update.base.du = vmw_crtc_to_du(plane->state->crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

726

struct drm_crtc *crtc = new_state->crtc;

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

731

if (crtc && new_state->fb) {

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

732

struct vmw_private *dev_priv = vmw_priv(crtc->dev);

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

811

struct drm_crtc *crtc;

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

819

crtc = &sou->base.crtc;

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

889

ret = drm_crtc_init_with_planes(dev, crtc, primary,

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

897

drm_crtc_helper_add(crtc, &vmw_sou_crtc_helper_funcs);

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

899

drm_mode_crtc_set_gamma_size(crtc, 256);

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

995

s32 trans_x = dirty->unit->crtc.x - sdirty->dst_x;

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

996

s32 trans_y = dirty->unit->crtc.y - sdirty->dst_y;

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

1255

bo_update.base.du = vmw_crtc_to_du(plane->state->crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

1363

stdu = vmw_crtc_to_stdu(plane->state->crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

1370

srf_update.du = vmw_crtc_to_du(plane->state->crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

1407

struct drm_crtc *crtc = new_state->crtc;

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

1414

if (crtc && new_state->fb) {

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

1417

stdu = vmw_crtc_to_stdu(crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

1418

dev_priv = vmw_priv(crtc->dev);

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

1438

crtc = old_state->crtc;

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

1439

stdu = vmw_crtc_to_stdu(crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

1440

dev_priv = vmw_priv(crtc->dev);

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

1462

vmw_stdu_crtc_atomic_flush(struct drm_crtc *crtc,

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

1465

struct vmw_private *vmw = vmw_priv(crtc->dev);

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

1466

struct vmw_screen_target_display_unit *stdu = vmw_crtc_to_stdu(crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

1469

vmw_vkms_set_crc_surface(crtc, stdu->display_srf);

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

1470

vmw_vkms_crtc_atomic_flush(crtc, state);

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

149

static void vmw_stdu_crtc_destroy(struct drm_crtc *crtc)

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

151

vmw_stdu_destroy(vmw_crtc_to_stdu(crtc));

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

1541

struct drm_crtc *crtc;

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

1549

crtc = &stdu->base.crtc;

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

1615

ret = drm_crtc_init_with_planes(dev, crtc, primary,

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

1623

drm_crtc_helper_add(crtc, &vmw_stdu_crtc_helper_funcs);

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

1625

drm_mode_crtc_set_gamma_size(crtc, 256);

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

375

static void vmw_stdu_crtc_mode_set_nofb(struct drm_crtc *crtc)

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

383

stdu = vmw_crtc_to_stdu(crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

384

dev_priv = vmw_priv(crtc->dev);

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

402

if (!crtc->state->enable)

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

409

ret = vmw_stdu_define_st(dev_priv, stdu, &crtc->mode, x, y);

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

413

crtc->x, crtc->y);

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

416

static void vmw_stdu_crtc_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

42

container_of(x, struct vmw_screen_target_display_unit, base.crtc)

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

424

if (!crtc) {

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

429

stdu = vmw_crtc_to_stdu(crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

430

dev_priv = vmw_priv(crtc->dev);

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

431

new_crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

434

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

563

struct drm_crtc *crtc)

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

599

ddirty.base.crtc = crtc;

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

731

struct drm_crtc *crtc)

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

756

sdirty.base.crtc = crtc;

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

895

if (!conn_state->crtc)

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

898

new_crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

111

struct drm_crtc *crtc = &du->crtc;

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

112

struct vmw_private *vmw = vmw_priv(crtc->dev);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

136

crtc->dev,

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

141

compute_crc(crtc, surf, &crc32);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

157

drm_crtc_add_crc_entry(crtc, true, frame_start++, &crc32);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

164

struct drm_crtc *crtc = &du->crtc;

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

165

struct vmw_private *vmw = vmw_priv(crtc->dev);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

173

drm_dbg_driver(crtc->dev, "vblank timer missed %lld frames.\n",

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

176

locked = vmw_vkms_vblank_trylock(crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

177

ret = drm_crtc_handle_vblank(crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

182

vmw_vkms_unlock(crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

185

u64 frame = drm_crtc_accurate_vblank_count(crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

191

drm_dbg_driver(crtc->dev,

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

200

drm_dbg_driver(crtc->dev, "Composer worker already queued\n");

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

243

vmw_vkms_get_vblank_timestamp(struct drm_crtc *crtc,

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

248

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

250

struct vmw_display_unit *du = vmw_crtc_to_du(crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

251

struct drm_vblank_crtc *vblank = drm_crtc_vblank_crtc(crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

279

vmw_vkms_enable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

281

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

283

struct drm_vblank_crtc *vblank = drm_crtc_vblank_crtc(crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

284

struct vmw_display_unit *du = vmw_crtc_to_du(crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

289

drm_calc_timestamping_constants(crtc, &crtc->mode);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

300

vmw_vkms_disable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

302

struct vmw_display_unit *du = vmw_crtc_to_du(crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

303

struct vmw_private *vmw = vmw_priv(crtc->dev);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

320

vmw_vkms_crtc_init(struct drm_crtc *crtc)

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

322

struct vmw_display_unit *du = vmw_crtc_to_du(crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

332

vmw_vkms_crtc_cleanup(struct drm_crtc *crtc)

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

334

struct vmw_display_unit *du = vmw_crtc_to_du(crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

343

vmw_vkms_crtc_atomic_begin(struct drm_crtc *crtc,

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

346

struct vmw_private *vmw = vmw_priv(crtc->dev);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

349

vmw_vkms_modeset_lock(crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

353

vmw_vkms_crtc_atomic_flush(struct drm_crtc *crtc,

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

357

struct vmw_private *vmw = vmw_priv(crtc->dev);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

362

if (crtc->state->event) {

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

363

spin_lock_irqsave(&crtc->dev->event_lock, flags);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

365

if (drm_crtc_vblank_get(crtc) != 0)

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

366

drm_crtc_send_vblank_event(crtc, crtc->state->event);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

368

drm_crtc_arm_vblank_event(crtc, crtc->state->event);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

370

spin_unlock_irqrestore(&crtc->dev->event_lock, flags);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

372

crtc->state->event = NULL;

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

375

vmw_vkms_unlock(crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

379

vmw_vkms_crtc_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

382

struct vmw_private *vmw = vmw_priv(crtc->dev);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

385

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

389

vmw_vkms_crtc_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

392

struct vmw_private *vmw = vmw_priv(crtc->dev);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

395

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

399

is_crc_supported(struct drm_crtc *crtc)

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

401

struct vmw_private *vmw = vmw_priv(crtc->dev);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

433

vmw_vkms_get_crc_sources(struct drm_crtc *crtc,

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

437

if (!is_crc_supported(crtc))

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

445

vmw_vkms_verify_crc_source(struct drm_crtc *crtc,

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

451

if (!is_crc_supported(crtc))

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

455

drm_dbg_driver(crtc->dev, "unknown source '%s'\n", src_name);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

465

vmw_vkms_set_crc_source(struct drm_crtc *crtc,

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

468

struct vmw_display_unit *du = vmw_crtc_to_du(crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

472

if (!is_crc_supported(crtc))

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

478

drm_crtc_vblank_get(crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

480

locked = vmw_vkms_modeset_lock_relaxed(crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

484

vmw_vkms_unlock(crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

487

drm_crtc_vblank_put(crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

493

vmw_vkms_set_crc_surface(struct drm_crtc *crtc,

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

496

struct vmw_display_unit *du = vmw_crtc_to_du(crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

497

struct vmw_private *vmw = vmw_priv(crtc->dev);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

543

vmw_vkms_modeset_lock(struct drm_crtc *crtc)

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

545

struct vmw_display_unit *du = vmw_crtc_to_du(crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

562

drm_warn(crtc->dev, "VKMS lock expired! total_delay = %lld, ret = %d, cur = %d\n",

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

577

vmw_vkms_modeset_lock_relaxed(struct drm_crtc *crtc)

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

579

struct vmw_display_unit *du = vmw_crtc_to_du(crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

598

drm_warn(crtc->dev, "VKMS relaxed lock expired!\n");

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

614

vmw_vkms_vblank_trylock(struct drm_crtc *crtc)

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

616

struct vmw_display_unit *du = vmw_crtc_to_du(crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

627

vmw_vkms_unlock(struct drm_crtc *crtc)

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

629

struct vmw_display_unit *du = vmw_crtc_to_du(crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

79

compute_crc(struct drm_crtc *crtc,

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.h

43

void vmw_vkms_modeset_lock(struct drm_crtc *crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.h

44

bool vmw_vkms_modeset_lock_relaxed(struct drm_crtc *crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.h

45

bool vmw_vkms_vblank_trylock(struct drm_crtc *crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.h

46

void vmw_vkms_unlock(struct drm_crtc *crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.h

48

bool vmw_vkms_get_vblank_timestamp(struct drm_crtc *crtc,

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.h

52

int vmw_vkms_enable_vblank(struct drm_crtc *crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.h

53

void vmw_vkms_disable_vblank(struct drm_crtc *crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.h

55

void vmw_vkms_crtc_init(struct drm_crtc *crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.h

56

void vmw_vkms_crtc_cleanup(struct drm_crtc *crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.h

57

void vmw_vkms_crtc_atomic_begin(struct drm_crtc *crtc,

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.h

59

void vmw_vkms_crtc_atomic_flush(struct drm_crtc *crtc, struct drm_atomic_state *state);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.h

60

void vmw_vkms_crtc_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.h

62

void vmw_vkms_crtc_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.h

65

const char *const *vmw_vkms_get_crc_sources(struct drm_crtc *crtc,

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.h

67

int vmw_vkms_verify_crc_source(struct drm_crtc *crtc,

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.h

70

int vmw_vkms_set_crc_source(struct drm_crtc *crtc,

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.h

72

void vmw_vkms_set_crc_surface(struct drm_crtc *crtc,

drivers/gpu/drm/xe/display/xe_display.c

257

struct intel_crtc *crtc;

drivers/gpu/drm/xe/display/xe_display.c

259

for_each_intel_crtc(&xe->drm, crtc) {

drivers/gpu/drm/xe/display/xe_display.c

262

spin_lock(&crtc->base.commit_lock);

drivers/gpu/drm/xe/display/xe_display.c

263

commit = list_first_entry_or_null(&crtc->base.commit_list,

drivers/gpu/drm/xe/display/xe_display.c

267

spin_unlock(&crtc->base.commit_lock);

drivers/gpu/drm/xe/display/xe_initial_plane.c

30

struct intel_crtc *crtc = to_intel_crtc(_crtc);

drivers/gpu/drm/xe/display/xe_initial_plane.c

31

struct xe_device *xe = to_xe_device(crtc->base.dev);

drivers/gpu/drm/xe/display/xe_initial_plane.c

32

struct xe_reg pipe_frmtmstmp = XE_REG(i915_mmio_reg_offset(PIPE_FRMTMSTMP(crtc->pipe)));

drivers/gpu/drm/xen/xen_drm_front_kms.c

103

drm_crtc_send_vblank_event(crtc, pipeline->pending_event);

drivers/gpu/drm/xen/xen_drm_front_kms.c

114

struct drm_crtc *crtc = &pipe->crtc;

drivers/gpu/drm/xen/xen_drm_front_kms.c

118

if (!drm_dev_enter(pipe->crtc.dev, &idx))

drivers/gpu/drm/xen/xen_drm_front_kms.c

121

ret = xen_drm_front_mode_set(pipeline, crtc->x, crtc->y,

drivers/gpu/drm/xen/xen_drm_front_kms.c

140

if (drm_dev_enter(pipe->crtc.dev, &idx)) {

drivers/gpu/drm/xen/xen_drm_front_kms.c

250

struct drm_crtc *crtc = &pipe->crtc;

drivers/gpu/drm/xen/xen_drm_front_kms.c

254

event = crtc->state->event;

drivers/gpu/drm/xen/xen_drm_front_kms.c

256

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/xen/xen_drm_front_kms.c

262

crtc->state->event = NULL;

drivers/gpu/drm/xen/xen_drm_front_kms.c

268

if (!drm_dev_enter(pipe->crtc.dev, &idx)) {

drivers/gpu/drm/xen/xen_drm_front_kms.c

97

struct drm_crtc *crtc = &pipeline->pipe.crtc;

drivers/gpu/drm/xen/xen_drm_front_kms.c

98

struct drm_device *dev = crtc->dev;

drivers/gpu/drm/xlnx/zynqmp_dp.c

1559

struct drm_crtc *crtc;

drivers/gpu/drm/xlnx/zynqmp_dp.c

1576

crtc = drm_atomic_get_new_connector_state(state, connector)->crtc;

drivers/gpu/drm/xlnx/zynqmp_dp.c

1577

crtc_state = drm_atomic_get_new_crtc_state(state, crtc);

drivers/gpu/drm/xlnx/zynqmp_kms.c

190

static inline struct zynqmp_dpsub *crtc_to_dpsub(struct drm_crtc *crtc)

drivers/gpu/drm/xlnx/zynqmp_kms.c

192

return container_of(crtc, struct zynqmp_dpsub_drm, crtc)->dpsub;

drivers/gpu/drm/xlnx/zynqmp_kms.c

195

static void zynqmp_dpsub_crtc_atomic_enable(struct drm_crtc *crtc,

drivers/gpu/drm/xlnx/zynqmp_kms.c

198

struct zynqmp_dpsub *dpsub = crtc_to_dpsub(crtc);

drivers/gpu/drm/xlnx/zynqmp_kms.c

199

struct drm_display_mode *adjusted_mode = &crtc->state->adjusted_mode;

drivers/gpu/drm/xlnx/zynqmp_kms.c

221

static void zynqmp_dpsub_crtc_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/xlnx/zynqmp_kms.c

224

struct zynqmp_dpsub *dpsub = crtc_to_dpsub(crtc);

drivers/gpu/drm/xlnx/zynqmp_kms.c

232

old_plane_state = drm_atomic_get_old_plane_state(state, crtc->primary);

drivers/gpu/drm/xlnx/zynqmp_kms.c

234

zynqmp_dpsub_plane_atomic_disable(crtc->primary, state);

drivers/gpu/drm/xlnx/zynqmp_kms.c

238

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/xlnx/zynqmp_kms.c

240

spin_lock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/xlnx/zynqmp_kms.c

241

if (crtc->state->event) {

drivers/gpu/drm/xlnx/zynqmp_kms.c

242

drm_crtc_send_vblank_event(crtc, crtc->state->event);

drivers/gpu/drm/xlnx/zynqmp_kms.c

243

crtc->state->event = NULL;

drivers/gpu/drm/xlnx/zynqmp_kms.c

245

spin_unlock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/xlnx/zynqmp_kms.c

251

static int zynqmp_dpsub_crtc_atomic_check(struct drm_crtc *crtc,

drivers/gpu/drm/xlnx/zynqmp_kms.c

254

return drm_atomic_add_affected_planes(state, crtc);

drivers/gpu/drm/xlnx/zynqmp_kms.c

257

static void zynqmp_dpsub_crtc_atomic_begin(struct drm_crtc *crtc,

drivers/gpu/drm/xlnx/zynqmp_kms.c

260

drm_crtc_vblank_on(crtc);

drivers/gpu/drm/xlnx/zynqmp_kms.c

263

static void zynqmp_dpsub_crtc_atomic_flush(struct drm_crtc *crtc,

drivers/gpu/drm/xlnx/zynqmp_kms.c

266

if (crtc->state->event) {

drivers/gpu/drm/xlnx/zynqmp_kms.c

270

event = crtc->state->event;

drivers/gpu/drm/xlnx/zynqmp_kms.c

271

crtc->state->event = NULL;

drivers/gpu/drm/xlnx/zynqmp_kms.c

273

event->pipe = drm_crtc_index(crtc);

drivers/gpu/drm/xlnx/zynqmp_kms.c

275

WARN_ON(drm_crtc_vblank_get(crtc) != 0);

drivers/gpu/drm/xlnx/zynqmp_kms.c

277

spin_lock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/xlnx/zynqmp_kms.c

278

drm_crtc_arm_vblank_event(crtc, event);

drivers/gpu/drm/xlnx/zynqmp_kms.c

279

spin_unlock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/xlnx/zynqmp_kms.c

291

static int zynqmp_dpsub_crtc_enable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/xlnx/zynqmp_kms.c

293

struct zynqmp_dpsub *dpsub = crtc_to_dpsub(crtc);

drivers/gpu/drm/xlnx/zynqmp_kms.c

300

static void zynqmp_dpsub_crtc_disable_vblank(struct drm_crtc *crtc)

drivers/gpu/drm/xlnx/zynqmp_kms.c

302

struct zynqmp_dpsub *dpsub = crtc_to_dpsub(crtc);

drivers/gpu/drm/xlnx/zynqmp_kms.c

321

struct drm_crtc *crtc = &dpsub->drm->crtc;

drivers/gpu/drm/xlnx/zynqmp_kms.c

324

ret = drm_crtc_init_with_planes(&dpsub->drm->dev, crtc, plane,

drivers/gpu/drm/xlnx/zynqmp_kms.c

329

drm_crtc_helper_add(crtc, &zynqmp_dpsub_crtc_helper_funcs);

drivers/gpu/drm/xlnx/zynqmp_kms.c

332

drm_crtc_vblank_off(crtc);

drivers/gpu/drm/xlnx/zynqmp_kms.c

339

u32 possible_crtcs = drm_crtc_mask(&dpsub->drm->crtc);

drivers/gpu/drm/xlnx/zynqmp_kms.c

355

drm_crtc_handle_vblank(&dpsub->drm->crtc);

drivers/gpu/drm/xlnx/zynqmp_kms.c

438

encoder->possible_crtcs |= drm_crtc_mask(&dpsub->drm->crtc);

drivers/gpu/drm/xlnx/zynqmp_kms.c

62

if (!new_plane_state->crtc)

drivers/gpu/drm/xlnx/zynqmp_kms.c

65

crtc_state = drm_atomic_get_crtc_state(state, new_plane_state->crtc);

drivers/gpu/drm/xlnx/zynqmp_kms.h

37

struct drm_crtc crtc;

drivers/rtc/rtc-cadence.c

102

struct cdns_rtc *crtc = dev_get_drvdata(dev);

drivers/rtc/rtc-cadence.c

105

if (!(readl(crtc->regs + CDNS_RTC_EFLR) & CDNS_RTC_AEI_ALRM))

drivers/rtc/rtc-cadence.c

108

rtc_update_irq(crtc->rtc_dev, 1, RTC_IRQF | RTC_AF);

drivers/rtc/rtc-cadence.c

128

struct cdns_rtc *crtc = dev_get_drvdata(dev);

drivers/rtc/rtc-cadence.c

132

if (!cdns_rtc_get_enabled(crtc))

drivers/rtc/rtc-cadence.c

135

cdns_rtc_set_enabled(crtc, false);

drivers/rtc/rtc-cadence.c

137

reg = readl(crtc->regs + CDNS_RTC_TIMR);

drivers/rtc/rtc-cadence.c

140

reg = readl(crtc->regs + CDNS_RTC_CALR);

drivers/rtc/rtc-cadence.c

147

cdns_rtc_set_enabled(crtc, true);

drivers/rtc/rtc-cadence.c

153

struct cdns_rtc *crtc = dev_get_drvdata(dev);

drivers/rtc/rtc-cadence.c

159

cdns_rtc_set_enabled(crtc, false);

drivers/rtc/rtc-cadence.c

171

writel(timr, crtc->regs + CDNS_RTC_TIMR);

drivers/rtc/rtc-cadence.c

172

writel(calr, crtc->regs + CDNS_RTC_CALR);

drivers/rtc/rtc-cadence.c

173

stsr = readl(crtc->regs + CDNS_RTC_STSR);

drivers/rtc/rtc-cadence.c

181

cdns_rtc_set_enabled(crtc, true);

drivers/rtc/rtc-cadence.c

187

struct cdns_rtc *crtc = dev_get_drvdata(dev);

drivers/rtc/rtc-cadence.c

192

crtc->regs + CDNS_RTC_AENR);

drivers/rtc/rtc-cadence.c

193

writel(CDNS_RTC_AEI_ALRM, crtc->regs + CDNS_RTC_IENR);

drivers/rtc/rtc-cadence.c

195

writel(0, crtc->regs + CDNS_RTC_AENR);

drivers/rtc/rtc-cadence.c

196

writel(CDNS_RTC_AEI_ALRM, crtc->regs + CDNS_RTC_IDISR);

drivers/rtc/rtc-cadence.c

204

struct cdns_rtc *crtc = dev_get_drvdata(dev);

drivers/rtc/rtc-cadence.c

207

reg = readl(crtc->regs + CDNS_RTC_TIMAR);

drivers/rtc/rtc-cadence.c

210

reg = readl(crtc->regs + CDNS_RTC_CALAR);

drivers/rtc/rtc-cadence.c

219

struct cdns_rtc *crtc = dev_get_drvdata(dev);

drivers/rtc/rtc-cadence.c

232

writel(timar, crtc->regs + CDNS_RTC_TIMAR);

drivers/rtc/rtc-cadence.c

233

writel(calar, crtc->regs + CDNS_RTC_CALAR);

drivers/rtc/rtc-cadence.c

234

stsr = readl(crtc->regs + CDNS_RTC_STSR);

drivers/rtc/rtc-cadence.c

257

struct cdns_rtc *crtc;

drivers/rtc/rtc-cadence.c

261

crtc = devm_kzalloc(&pdev->dev, sizeof(*crtc), GFP_KERNEL);

drivers/rtc/rtc-cadence.c

262

if (!crtc)

drivers/rtc/rtc-cadence.c

265

crtc->regs = devm_platform_ioremap_resource(pdev, 0);

drivers/rtc/rtc-cadence.c

266

if (IS_ERR(crtc->regs))

drivers/rtc/rtc-cadence.c

267

return PTR_ERR(crtc->regs);

drivers/rtc/rtc-cadence.c

269

crtc->irq = platform_get_irq(pdev, 0);

drivers/rtc/rtc-cadence.c

270

if (crtc->irq < 0)

drivers/rtc/rtc-cadence.c

273

crtc->pclk = devm_clk_get(&pdev->dev, "pclk");

drivers/rtc/rtc-cadence.c

274

if (IS_ERR(crtc->pclk)) {

drivers/rtc/rtc-cadence.c

275

ret = PTR_ERR(crtc->pclk);

drivers/rtc/rtc-cadence.c

281

crtc->ref_clk = devm_clk_get(&pdev->dev, "ref_clk");

drivers/rtc/rtc-cadence.c

282

if (IS_ERR(crtc->ref_clk)) {

drivers/rtc/rtc-cadence.c

283

ret = PTR_ERR(crtc->ref_clk);

drivers/rtc/rtc-cadence.c

289

crtc->rtc_dev = devm_rtc_allocate_device(&pdev->dev);

drivers/rtc/rtc-cadence.c

290

if (IS_ERR(crtc->rtc_dev))

drivers/rtc/rtc-cadence.c

291

return PTR_ERR(crtc->rtc_dev);

drivers/rtc/rtc-cadence.c

293

platform_set_drvdata(pdev, crtc);

drivers/rtc/rtc-cadence.c

295

ret = clk_prepare_enable(crtc->pclk);

drivers/rtc/rtc-cadence.c

302

ret = clk_prepare_enable(crtc->ref_clk);

drivers/rtc/rtc-cadence.c

309

ref_clk_freq = clk_get_rate(crtc->ref_clk);

drivers/rtc/rtc-cadence.c

318

ret = devm_request_irq(&pdev->dev, crtc->irq,

drivers/rtc/rtc-cadence.c

329

crtc->rtc_dev->range_min = mktime64(1900, 1, 1, 0, 0, 0);

drivers/rtc/rtc-cadence.c

330

crtc->rtc_dev->range_max = mktime64(2999, 12, 31, 23, 59, 59);

drivers/rtc/rtc-cadence.c

332

crtc->rtc_dev->ops = &cdns_rtc_ops;

drivers/rtc/rtc-cadence.c

336

writel(0, crtc->regs + CDNS_RTC_HMR);

drivers/rtc/rtc-cadence.c

337

writel(CDNS_RTC_KRTCR_KRTC, crtc->regs + CDNS_RTC_KRTCR);

drivers/rtc/rtc-cadence.c

339

ret = devm_rtc_register_device(crtc->rtc_dev);

drivers/rtc/rtc-cadence.c

349

clk_disable_unprepare(crtc->ref_clk);

drivers/rtc/rtc-cadence.c

352

clk_disable_unprepare(crtc->pclk);

drivers/rtc/rtc-cadence.c

359

struct cdns_rtc *crtc = platform_get_drvdata(pdev);

drivers/rtc/rtc-cadence.c

364

clk_disable_unprepare(crtc->pclk);

drivers/rtc/rtc-cadence.c

365

clk_disable_unprepare(crtc->ref_clk);

drivers/rtc/rtc-cadence.c

371

struct cdns_rtc *crtc = dev_get_drvdata(dev);

drivers/rtc/rtc-cadence.c

374

enable_irq_wake(crtc->irq);

drivers/rtc/rtc-cadence.c

381

struct cdns_rtc *crtc = dev_get_drvdata(dev);

drivers/rtc/rtc-cadence.c

384

disable_irq_wake(crtc->irq);

drivers/rtc/rtc-cadence.c

87

static void cdns_rtc_set_enabled(struct cdns_rtc *crtc, bool enabled)

drivers/rtc/rtc-cadence.c

91

writel(reg, crtc->regs + CDNS_RTC_CTLR);

drivers/rtc/rtc-cadence.c

94

static bool cdns_rtc_get_enabled(struct cdns_rtc *crtc)

drivers/rtc/rtc-cadence.c

96

return !(readl(crtc->regs + CDNS_RTC_CTLR) & CDNS_RTC_CTLR_TIME_CAL);

drivers/staging/sm750fb/sm750.c

108

struct lynxfb_crtc *crtc;

drivers/staging/sm750fb/sm750.c

112

crtc = &par->crtc;

drivers/staging/sm750fb/sm750.c

113

cursor = &crtc->cursor;

drivers/staging/sm750fb/sm750.c

176

base = par->crtc.o_screen;

drivers/staging/sm750fb/sm750.c

214

base = par->crtc.o_screen;

drivers/staging/sm750fb/sm750.c

248

base = par->crtc.o_screen;

drivers/staging/sm750fb/sm750.c

288

struct lynxfb_crtc *crtc;

drivers/staging/sm750fb/sm750.c

294

crtc = &par->crtc;

drivers/staging/sm750fb/sm750.c

295

return hw_sm750_pan_display(crtc, var, info);

drivers/staging/sm750fb/sm750.c

357

struct lynxfb_crtc *crtc;

drivers/staging/sm750fb/sm750.c

369

crtc = &par->crtc;

drivers/staging/sm750fb/sm750.c

376

line_length = ALIGN(line_length, crtc->line_pad);

drivers/staging/sm750fb/sm750.c

395

ret = hw_sm750_crtc_set_mode(crtc, var, fix);

drivers/staging/sm750fb/sm750.c

437

struct lynxfb_crtc *crtc;

drivers/staging/sm750fb/sm750.c

450

crtc = &par->crtc;

drivers/staging/sm750fb/sm750.c

451

cursor = &crtc->cursor;

drivers/staging/sm750fb/sm750.c

453

memset_io(crtc->v_screen, 0x0, crtc->vidmem_size);

drivers/staging/sm750fb/sm750.c

462

crtc = &par->crtc;

drivers/staging/sm750fb/sm750.c

463

cursor = &crtc->cursor;

drivers/staging/sm750fb/sm750.c

465

memset_io(crtc->v_screen, 0x0, crtc->vidmem_size);

drivers/staging/sm750fb/sm750.c

481

struct lynxfb_crtc *crtc;

drivers/staging/sm750fb/sm750.c

486

crtc = &par->crtc;

drivers/staging/sm750fb/sm750.c

508

request = ALIGN(request, crtc->line_pad);

drivers/staging/sm750fb/sm750.c

510

if (crtc->vidmem_size < request) {

drivers/staging/sm750fb/sm750.c

515

return hw_sm750_crtc_check_mode(crtc, var);

drivers/staging/sm750fb/sm750.c

526

struct lynxfb_crtc *crtc;

drivers/staging/sm750fb/sm750.c

531

crtc = &par->crtc;

drivers/staging/sm750fb/sm750.c

553

ret = hw_sm750_set_col_reg(crtc, regno, red, green, blue);

drivers/staging/sm750fb/sm750.c

599

struct lynxfb_crtc *crtc;

drivers/staging/sm750fb/sm750.c

605

crtc = &par->crtc;

drivers/staging/sm750fb/sm750.c

607

crtc->vidmem_size = sm750_dev->vidmem_size;

drivers/staging/sm750fb/sm750.c

609

crtc->vidmem_size >>= 1;

drivers/staging/sm750fb/sm750.c

614

crtc->line_pad = 16;

drivers/staging/sm750fb/sm750.c

615

crtc->xpanstep = 8;

drivers/staging/sm750fb/sm750.c

616

crtc->ypanstep = 1;

drivers/staging/sm750fb/sm750.c

617

crtc->ywrapstep = 0;

drivers/staging/sm750fb/sm750.c

625

crtc->channel = sm750_primary;

drivers/staging/sm750fb/sm750.c

626

crtc->o_screen = 0;

drivers/staging/sm750fb/sm750.c

627

crtc->v_screen = sm750_dev->pvMem;

drivers/staging/sm750fb/sm750.c

632

crtc->channel = sm750_secondary;

drivers/staging/sm750fb/sm750.c

633

crtc->o_screen = 0;

drivers/staging/sm750fb/sm750.c

634

crtc->v_screen = sm750_dev->pvMem;

drivers/staging/sm750fb/sm750.c

639

crtc->channel = sm750_primary;

drivers/staging/sm750fb/sm750.c

640

crtc->o_screen = 0;

drivers/staging/sm750fb/sm750.c

641

crtc->v_screen = sm750_dev->pvMem;

drivers/staging/sm750fb/sm750.c

644

crtc->channel = sm750_secondary;

drivers/staging/sm750fb/sm750.c

646

crtc->o_screen = sm750_dev->vidmem_size >> 1;

drivers/staging/sm750fb/sm750.c

647

crtc->v_screen = sm750_dev->pvMem + crtc->o_screen;

drivers/staging/sm750fb/sm750.c

653

crtc->channel = sm750_secondary;

drivers/staging/sm750fb/sm750.c

654

crtc->o_screen = 0;

drivers/staging/sm750fb/sm750.c

655

crtc->v_screen = sm750_dev->pvMem;

drivers/staging/sm750fb/sm750.c

658

crtc->channel = sm750_primary;

drivers/staging/sm750fb/sm750.c

662

crtc->o_screen = sm750_dev->vidmem_size >> 1;

drivers/staging/sm750fb/sm750.c

663

crtc->v_screen = sm750_dev->pvMem + crtc->o_screen;

drivers/staging/sm750fb/sm750.c

728

struct lynxfb_crtc *crtc;

drivers/staging/sm750fb/sm750.c

752

crtc = &par->crtc;

drivers/staging/sm750fb/sm750.c

759

output->channel = &crtc->channel;

drivers/staging/sm750fb/sm750.c

766

crtc->cursor.offset = crtc->o_screen + crtc->vidmem_size - 1024;

drivers/staging/sm750fb/sm750.c

767

crtc->cursor.mmio = sm750_dev->pvReg +

drivers/staging/sm750fb/sm750.c

768

0x800f0 + (int)crtc->channel * 0x140;

drivers/staging/sm750fb/sm750.c

770

pr_info("crtc->cursor.mmio = %p\n", crtc->cursor.mmio);

drivers/staging/sm750fb/sm750.c

771

crtc->cursor.max_h = 64;

drivers/staging/sm750fb/sm750.c

772

crtc->cursor.max_w = 64;

drivers/staging/sm750fb/sm750.c

773

crtc->cursor.size = crtc->cursor.max_h * crtc->cursor.max_w * 2 / 8;

drivers/staging/sm750fb/sm750.c

774

crtc->cursor.vstart = sm750_dev->pvMem + crtc->cursor.offset;

drivers/staging/sm750fb/sm750.c

776

memset_io(crtc->cursor.vstart, 0, crtc->cursor.size);

drivers/staging/sm750fb/sm750.c

778

sm750_hw_cursor_disable(&crtc->cursor);

drivers/staging/sm750fb/sm750.c

850

crtc->line_pad);

drivers/staging/sm750fb/sm750.c

853

info->screen_base = crtc->v_screen;

drivers/staging/sm750fb/sm750.c

860

fix->xpanstep = crtc->xpanstep;

drivers/staging/sm750fb/sm750.c

861

fix->ypanstep = crtc->ypanstep;

drivers/staging/sm750fb/sm750.c

862

fix->ywrapstep = crtc->ywrapstep;

drivers/staging/sm750fb/sm750.c

867

fix->smem_start = crtc->o_screen + sm750_dev->vidmem_start;

drivers/staging/sm750fb/sm750.c

876

fix->smem_len = crtc->vidmem_size;

drivers/staging/sm750fb/sm750.h

178

struct lynxfb_crtc crtc;

drivers/staging/sm750fb/sm750.h

202

int hw_sm750_crtc_check_mode(struct lynxfb_crtc *crtc,

drivers/staging/sm750fb/sm750.h

205

int hw_sm750_crtc_set_mode(struct lynxfb_crtc *crtc,

drivers/staging/sm750fb/sm750.h

209

int hw_sm750_set_col_reg(struct lynxfb_crtc *crtc, ushort index,

drivers/staging/sm750fb/sm750.h

214

int hw_sm750_pan_display(struct lynxfb_crtc *crtc,

drivers/staging/sm750fb/sm750_hw.c

222

int hw_sm750_crtc_check_mode(struct lynxfb_crtc *crtc,

drivers/staging/sm750fb/sm750_hw.c

226

struct lynxfb_par *par = container_of(crtc, struct lynxfb_par, crtc);

drivers/staging/sm750fb/sm750_hw.c

248

int hw_sm750_crtc_set_mode(struct lynxfb_crtc *crtc,

drivers/staging/sm750fb/sm750_hw.c

260

par = container_of(crtc, struct lynxfb_par, crtc);

drivers/staging/sm750fb/sm750_hw.c

300

if (crtc->channel != sm750_secondary)

drivers/staging/sm750fb/sm750_hw.c

312

if (crtc->channel != sm750_secondary) {

drivers/staging/sm750fb/sm750_hw.c

315

crtc->o_screen & PANEL_FB_ADDRESS_ADDRESS_MASK);

drivers/staging/sm750fb/sm750_hw.c

322

reg = ALIGN(reg, crtc->line_pad);

drivers/staging/sm750fb/sm750_hw.c

351

poke32(CRT_FB_ADDRESS, crtc->o_screen);

drivers/staging/sm750fb/sm750_hw.c

357

reg = ALIGN(reg, crtc->line_pad) << CRT_FB_WIDTH_WIDTH_SHIFT;

drivers/staging/sm750fb/sm750_hw.c

373

int hw_sm750_set_col_reg(struct lynxfb_crtc *crtc, ushort index, ushort red,

drivers/staging/sm750fb/sm750_hw.c

378

poke32(add[crtc->channel] + index * 4,

drivers/staging/sm750fb/sm750_hw.c

542

int hw_sm750_pan_display(struct lynxfb_crtc *crtc,

drivers/staging/sm750fb/sm750_hw.c

555

total += crtc->o_screen;

drivers/staging/sm750fb/sm750_hw.c

556

if (crtc->channel == sm750_primary) {

drivers/video/fbdev/aty/aty128fb.c

1014

static void aty128_set_crtc(const struct aty128_crtc *crtc,

drivers/video/fbdev/aty/aty128fb.c

1017

aty_st_le32(CRTC_GEN_CNTL, crtc->gen_cntl);

drivers/video/fbdev/aty/aty128fb.c

1018

aty_st_le32(CRTC_H_TOTAL_DISP, crtc->h_total);

drivers/video/fbdev/aty/aty128fb.c

1019

aty_st_le32(CRTC_H_SYNC_STRT_WID, crtc->h_sync_strt_wid);

drivers/video/fbdev/aty/aty128fb.c

1020

aty_st_le32(CRTC_V_TOTAL_DISP, crtc->v_total);

drivers/video/fbdev/aty/aty128fb.c

1021

aty_st_le32(CRTC_V_SYNC_STRT_WID, crtc->v_sync_strt_wid);

drivers/video/fbdev/aty/aty128fb.c

1022

aty_st_le32(CRTC_PITCH, crtc->pitch);

drivers/video/fbdev/aty/aty128fb.c

1023

aty_st_le32(CRTC_OFFSET, crtc->offset);

drivers/video/fbdev/aty/aty128fb.c

1024

aty_st_le32(CRTC_OFFSET_CNTL, crtc->offset_cntl);

drivers/video/fbdev/aty/aty128fb.c

1031

struct aty128_crtc *crtc,

drivers/video/fbdev/aty/aty128fb.c

1128

crtc->gen_cntl = 0x3000000L | c_sync | (dst << 8);

drivers/video/fbdev/aty/aty128fb.c

1130

crtc->h_total = h_total | (h_disp << 16);

drivers/video/fbdev/aty/aty128fb.c

1131

crtc->v_total = v_total | (v_disp << 16);

drivers/video/fbdev/aty/aty128fb.c

1133

crtc->h_sync_strt_wid = h_sync_strt | (h_sync_wid << 16) |

drivers/video/fbdev/aty/aty128fb.c

1135

crtc->v_sync_strt_wid = v_sync_strt | (v_sync_wid << 16) |

drivers/video/fbdev/aty/aty128fb.c

1138

crtc->pitch = vxres >> 3;

drivers/video/fbdev/aty/aty128fb.c

1140

crtc->offset = 0;

drivers/video/fbdev/aty/aty128fb.c

1143

crtc->offset_cntl = 0x00010000;

drivers/video/fbdev/aty/aty128fb.c

1145

crtc->offset_cntl = 0;

drivers/video/fbdev/aty/aty128fb.c

1147

crtc->vxres = vxres;

drivers/video/fbdev/aty/aty128fb.c

1148

crtc->vyres = vyres;

drivers/video/fbdev/aty/aty128fb.c

1149

crtc->xoffset = xoffset;

drivers/video/fbdev/aty/aty128fb.c

1150

crtc->yoffset = yoffset;

drivers/video/fbdev/aty/aty128fb.c

1151

crtc->depth = depth;

drivers/video/fbdev/aty/aty128fb.c

1152

crtc->bpp = bpp;

drivers/video/fbdev/aty/aty128fb.c

1221

static int aty128_crtc_to_var(const struct aty128_crtc *crtc,

drivers/video/fbdev/aty/aty128fb.c

1230

h_total = crtc->h_total & 0x1ff;

drivers/video/fbdev/aty/aty128fb.c

1231

h_disp = (crtc->h_total >> 16) & 0xff;

drivers/video/fbdev/aty/aty128fb.c

1232

h_sync_strt = (crtc->h_sync_strt_wid >> 3) & 0x1ff;

drivers/video/fbdev/aty/aty128fb.c

1233

h_sync_dly = crtc->h_sync_strt_wid & 0x7;

drivers/video/fbdev/aty/aty128fb.c

1234

h_sync_wid = (crtc->h_sync_strt_wid >> 16) & 0x3f;

drivers/video/fbdev/aty/aty128fb.c

1235

h_sync_pol = (crtc->h_sync_strt_wid >> 23) & 0x1;

drivers/video/fbdev/aty/aty128fb.c

1236

v_total = crtc->v_total & 0x7ff;

drivers/video/fbdev/aty/aty128fb.c

1237

v_disp = (crtc->v_total >> 16) & 0x7ff;

drivers/video/fbdev/aty/aty128fb.c

1238

v_sync_strt = crtc->v_sync_strt_wid & 0x7ff;

drivers/video/fbdev/aty/aty128fb.c

1239

v_sync_wid = (crtc->v_sync_strt_wid >> 16) & 0x1f;

drivers/video/fbdev/aty/aty128fb.c

1240

v_sync_pol = (crtc->v_sync_strt_wid >> 23) & 0x1;

drivers/video/fbdev/aty/aty128fb.c

1241

c_sync = crtc->gen_cntl & CRTC_CSYNC_EN ? 1 : 0;

drivers/video/fbdev/aty/aty128fb.c

1242

pix_width = crtc->gen_cntl & CRTC_PIX_WIDTH_MASK;

drivers/video/fbdev/aty/aty128fb.c

1261

var->xres_virtual = crtc->vxres;

drivers/video/fbdev/aty/aty128fb.c

1262

var->yres_virtual = crtc->vyres;

drivers/video/fbdev/aty/aty128fb.c

1263

var->xoffset = crtc->xoffset;

drivers/video/fbdev/aty/aty128fb.c

1264

var->yoffset = crtc->yoffset;

drivers/video/fbdev/aty/aty128fb.c

1510

aty128_set_crtc(&par->crtc, par);

drivers/video/fbdev/aty/aty128fb.c

1517

if (par->crtc.bpp == 32)

drivers/video/fbdev/aty/aty128fb.c

1519

else if (par->crtc.bpp == 16)

drivers/video/fbdev/aty/aty128fb.c

1526

info->fix.line_length = (par->crtc.vxres * par->crtc.bpp) >> 3;

drivers/video/fbdev/aty/aty128fb.c

1527

info->fix.visual = par->crtc.bpp == 8 ? FB_VISUAL_PSEUDOCOLOR

drivers/video/fbdev/aty/aty128fb.c

1539

(((par->crtc.h_total>>16) & 0xff)+1)*8,

drivers/video/fbdev/aty/aty128fb.c

1540

((par->crtc.v_total>>16) & 0x7ff)+1,

drivers/video/fbdev/aty/aty128fb.c

1541

par->crtc.bpp,

drivers/video/fbdev/aty/aty128fb.c

1542

par->crtc.vxres*par->crtc.bpp/8);

drivers/video/fbdev/aty/aty128fb.c

1556

struct aty128_crtc crtc;

drivers/video/fbdev/aty/aty128fb.c

1560

if ((err = aty128_var_to_crtc(var, &crtc, par)))

drivers/video/fbdev/aty/aty128fb.c

1566

if ((err = aty128_ddafifo(&fifo_reg, &pll, crtc.depth, par)))

drivers/video/fbdev/aty/aty128fb.c

1569

par->crtc = crtc;

drivers/video/fbdev/aty/aty128fb.c

1583

if ((err = aty128_crtc_to_var(&par->crtc, var)))

drivers/video/fbdev/aty/aty128fb.c

1625

xres = (((par->crtc.h_total >> 16) & 0xff) + 1) << 3;

drivers/video/fbdev/aty/aty128fb.c

1626

yres = ((par->crtc.v_total >> 16) & 0x7ff) + 1;

drivers/video/fbdev/aty/aty128fb.c

1631

if (xoffset+xres > par->crtc.vxres || yoffset+yres > par->crtc.vyres)

drivers/video/fbdev/aty/aty128fb.c

1634

par->crtc.xoffset = xoffset;

drivers/video/fbdev/aty/aty128fb.c

1635

par->crtc.yoffset = yoffset;

drivers/video/fbdev/aty/aty128fb.c

1637

offset = ((yoffset * par->crtc.vxres + xoffset) * (par->crtc.bpp >> 3))

drivers/video/fbdev/aty/aty128fb.c

1640

if (par->crtc.bpp == 24)

drivers/video/fbdev/aty/aty128fb.c

2237

|| (par->crtc.depth == 16 && regno > 63)

drivers/video/fbdev/aty/aty128fb.c

2238

|| (par->crtc.depth == 15 && regno > 31))

drivers/video/fbdev/aty/aty128fb.c

2249

switch (par->crtc.depth) {

drivers/video/fbdev/aty/aty128fb.c

2266

if (par->crtc.depth == 16 && regno > 0) {

drivers/video/fbdev/aty/aty128fb.c

2284

} else if (par->crtc.bpp == 16)

drivers/video/fbdev/aty/aty128fb.c

436

struct aty128_crtc crtc;

drivers/video/fbdev/aty/aty128fb.c

730

pitch_value = par->crtc.pitch;

drivers/video/fbdev/aty/aty128fb.c

731

if (par->crtc.bpp == 24) {

drivers/video/fbdev/aty/aty128fb.c

752

(depth_to_dst(par->crtc.depth) << 8) |

drivers/video/fbdev/aty/atyfb.h

138

struct crtc crtc;

drivers/video/fbdev/aty/atyfb.h

191

struct crtc saved_crtc;

drivers/video/fbdev/aty/atyfb_base.c

1021

crtc->vxres = vxres;

drivers/video/fbdev/aty/atyfb_base.c

1022

crtc->vyres = vyres;

drivers/video/fbdev/aty/atyfb_base.c

1023

crtc->xoffset = xoffset;

drivers/video/fbdev/aty/atyfb_base.c

1024

crtc->yoffset = yoffset;

drivers/video/fbdev/aty/atyfb_base.c

1025

crtc->bpp = bpp;

drivers/video/fbdev/aty/atyfb_base.c

1026

crtc->off_pitch =

drivers/video/fbdev/aty/atyfb_base.c

1029

crtc->vline_crnt_vline = 0;

drivers/video/fbdev/aty/atyfb_base.c

1031

crtc->h_tot_disp = h_total | (h_disp << 16);

drivers/video/fbdev/aty/atyfb_base.c

1032

crtc->h_sync_strt_wid = (h_sync_strt & 0xff) | (h_sync_dly << 8) |

drivers/video/fbdev/aty/atyfb_base.c

1035

crtc->v_tot_disp = v_total | (v_disp << 16);

drivers/video/fbdev/aty/atyfb_base.c

1036

crtc->v_sync_strt_wid = v_sync_strt | (v_sync_wid << 16) |

drivers/video/fbdev/aty/atyfb_base.c

1040

crtc->gen_cntl = CRTC_EXT_DISP_EN | CRTC_EN | pix_width | c_sync;

drivers/video/fbdev/aty/atyfb_base.c

1041

crtc->gen_cntl |= CRTC_VGA_LINEAR;

drivers/video/fbdev/aty/atyfb_base.c

1045

crtc->gen_cntl |= CRTC_DBL_SCAN_EN;

drivers/video/fbdev/aty/atyfb_base.c

1048

crtc->gen_cntl |= CRTC_INTERLACE_EN;

drivers/video/fbdev/aty/atyfb_base.c

1054

crtc->gen_cntl &= ~(CRTC2_EN | CRTC2_PIX_WIDTH);

drivers/video/fbdev/aty/atyfb_base.c

1055

crtc->lcd_gen_cntl &= ~(HORZ_DIVBY2_EN | DIS_HOR_CRT_DIVBY2 |

drivers/video/fbdev/aty/atyfb_base.c

1060

crtc->lcd_gen_cntl |= DONT_SHADOW_VPAR/* | LOCK_8DOT*/;

drivers/video/fbdev/aty/atyfb_base.c

1063

crtc->horz_stretching = aty_ld_lcd(HORZ_STRETCHING, par);

drivers/video/fbdev/aty/atyfb_base.c

1065

crtc->ext_vert_stretch = aty_ld_lcd(EXT_VERT_STRETCH, par) &

drivers/video/fbdev/aty/atyfb_base.c

1068

crtc->horz_stretching &= ~(HORZ_STRETCH_RATIO |

drivers/video/fbdev/aty/atyfb_base.c

1071

if (xres < par->lcd_width && crtc->lcd_gen_cntl & LCD_ON) {

drivers/video/fbdev/aty/atyfb_base.c

1125

crtc->horz_stretching |= (HORZ_STRETCH_EN |

drivers/video/fbdev/aty/atyfb_base.c

1132

crtc->horz_stretching |= (HORZ_STRETCH_MODE | HORZ_STRETCH_EN |

drivers/video/fbdev/aty/atyfb_base.c

1137

if (vdisplay < par->lcd_height && crtc->lcd_gen_cntl & LCD_ON) {

drivers/video/fbdev/aty/atyfb_base.c

1138

crtc->vert_stretching = (VERT_STRETCH_USE0 | VERT_STRETCH_EN |

drivers/video/fbdev/aty/atyfb_base.c

1143

crtc->ext_vert_stretch |= VERT_STRETCH_MODE;

drivers/video/fbdev/aty/atyfb_base.c

1149

crtc->vert_stretching = 0;

drivers/video/fbdev/aty/atyfb_base.c

1152

crtc->shadow_h_tot_disp = crtc->h_tot_disp;

drivers/video/fbdev/aty/atyfb_base.c

1153

crtc->shadow_h_sync_strt_wid = crtc->h_sync_strt_wid;

drivers/video/fbdev/aty/atyfb_base.c

1154

crtc->shadow_v_tot_disp = crtc->v_tot_disp;

drivers/video/fbdev/aty/atyfb_base.c

1155

crtc->shadow_v_sync_strt_wid = crtc->v_sync_strt_wid;

drivers/video/fbdev/aty/atyfb_base.c

1161

crtc->gen_cntl |= (aty_ld_le32(CRTC_GEN_CNTL, par) & CRTC_FIFO_LWM);

drivers/video/fbdev/aty/atyfb_base.c

1163

crtc->dp_pix_width = dp_pix_width;

drivers/video/fbdev/aty/atyfb_base.c

1164

crtc->dp_chain_mask = dp_chain_mask;

drivers/video/fbdev/aty/atyfb_base.c

1169

static int aty_crtc_to_var(const struct crtc *crtc,

drivers/video/fbdev/aty/atyfb_base.c

1179

h_total = crtc->h_tot_disp & 0x1ff;

drivers/video/fbdev/aty/atyfb_base.c

1180

h_disp = (crtc->h_tot_disp >> 16) & 0xff;

drivers/video/fbdev/aty/atyfb_base.c

1181

h_sync_strt = (crtc->h_sync_strt_wid & 0xff) | ((crtc->h_sync_strt_wid >> 4) & 0x100);

drivers/video/fbdev/aty/atyfb_base.c

1182

h_sync_dly = (crtc->h_sync_strt_wid >> 8) & 0x7;

drivers/video/fbdev/aty/atyfb_base.c

1183

h_sync_wid = (crtc->h_sync_strt_wid >> 16) & 0x1f;

drivers/video/fbdev/aty/atyfb_base.c

1184

h_sync_pol = (crtc->h_sync_strt_wid >> 21) & 0x1;

drivers/video/fbdev/aty/atyfb_base.c

1185

v_total = crtc->v_tot_disp & 0x7ff;

drivers/video/fbdev/aty/atyfb_base.c

1186

v_disp = (crtc->v_tot_disp >> 16) & 0x7ff;

drivers/video/fbdev/aty/atyfb_base.c

1187

v_sync_strt = crtc->v_sync_strt_wid & 0x7ff;

drivers/video/fbdev/aty/atyfb_base.c

1188

v_sync_wid = (crtc->v_sync_strt_wid >> 16) & 0x1f;

drivers/video/fbdev/aty/atyfb_base.c

1189

v_sync_pol = (crtc->v_sync_strt_wid >> 21) & 0x1;

drivers/video/fbdev/aty/atyfb_base.c

1190

c_sync = crtc->gen_cntl & CRTC_CSYNC_EN ? 1 : 0;

drivers/video/fbdev/aty/atyfb_base.c

1191

pix_width = crtc->gen_cntl & CRTC_PIX_WIDTH_MASK;

drivers/video/fbdev/aty/atyfb_base.c

1192

double_scan = crtc->gen_cntl & CRTC_DBL_SCAN_EN;

drivers/video/fbdev/aty/atyfb_base.c

1193

interlace = crtc->gen_cntl & CRTC_INTERLACE_EN;

drivers/video/fbdev/aty/atyfb_base.c

1272

var->xres_virtual = crtc->vxres;

drivers/video/fbdev/aty/atyfb_base.c

1273

var->yres_virtual = crtc->vyres;

drivers/video/fbdev/aty/atyfb_base.c

1318

err = aty_var_to_crtc(info, var, &par->crtc);

drivers/video/fbdev/aty/atyfb_base.c

1347

aty_set_crtc(par, &par->crtc);

drivers/video/fbdev/aty/atyfb_base.c

1364

if (!aty_crtc_to_var(&par->crtc, &debug)) {

drivers/video/fbdev/aty/atyfb_base.c

1380

if (par->crtc.gen_cntl & CRTC_INTERLACE_EN)

drivers/video/fbdev/aty/atyfb_base.c

1382

if (par->crtc.gen_cntl & CRTC_DBL_SCAN_EN)

drivers/video/fbdev/aty/atyfb_base.c

1469

(((par->crtc.h_tot_disp >> 16) & 0xff) + 1) * 8,

drivers/video/fbdev/aty/atyfb_base.c

1470

((par->crtc.v_tot_disp >> 16) & 0x7ff) + 1,

drivers/video/fbdev/aty/atyfb_base.c

1472

par->crtc.vxres * var->bits_per_pixel / 8);

drivers/video/fbdev/aty/atyfb_base.c

1540

struct crtc crtc;

drivers/video/fbdev/aty/atyfb_base.c

1546

err = aty_var_to_crtc(info, var, &crtc);

drivers/video/fbdev/aty/atyfb_base.c

1568

aty_crtc_to_var(&crtc, var);

drivers/video/fbdev/aty/atyfb_base.c

1580

par->crtc.off_pitch =

drivers/video/fbdev/aty/atyfb_base.c

1620

aty_st_le32(CRTC_OFF_PITCH, par->crtc.off_pitch, par);

drivers/video/fbdev/aty/atyfb_base.c

1670

aty_st_le32(CRTC_OFF_PITCH, par->crtc.off_pitch, par);

drivers/video/fbdev/aty/atyfb_base.c

1746

xres = (((par->crtc.h_tot_disp >> 16) & 0xff) + 1) * 8;

drivers/video/fbdev/aty/atyfb_base.c

1747

yres = ((par->crtc.v_tot_disp >> 16) & 0x7ff) + 1;

drivers/video/fbdev/aty/atyfb_base.c

1748

if (par->crtc.gen_cntl & CRTC_DBL_SCAN_EN)

drivers/video/fbdev/aty/atyfb_base.c

1752

if (xoffset + xres > par->crtc.vxres ||

drivers/video/fbdev/aty/atyfb_base.c

1753

yoffset + yres > par->crtc.vyres)

drivers/video/fbdev/aty/atyfb_base.c

1765

aty_st_le32(CRTC_OFF_PITCH, par->crtc.off_pitch, par);

drivers/video/fbdev/aty/atyfb_base.c

1771

static int aty_waitforvblank(struct atyfb_par *par, u32 crtc)

drivers/video/fbdev/aty/atyfb_base.c

1777

switch (crtc) {

drivers/video/fbdev/aty/atyfb_base.c

1838

fbtyp.fb_width = par->crtc.vxres;

drivers/video/fbdev/aty/atyfb_base.c

1839

fbtyp.fb_height = par->crtc.vyres;

drivers/video/fbdev/aty/atyfb_base.c

1851

u32 crtc;

drivers/video/fbdev/aty/atyfb_base.c

1853

if (get_user(crtc, (__u32 __user *) arg))

drivers/video/fbdev/aty/atyfb_base.c

1856

return aty_waitforvblank(par, crtc);

drivers/video/fbdev/aty/atyfb_base.c

266

static void aty_get_crtc(const struct atyfb_par *par, struct crtc *crtc);

drivers/video/fbdev/aty/atyfb_base.c

268

static void aty_set_crtc(const struct atyfb_par *par, const struct crtc *crtc);

drivers/video/fbdev/aty/atyfb_base.c

271

struct crtc *crtc);

drivers/video/fbdev/aty/atyfb_base.c

272

static int aty_crtc_to_var(const struct crtc *crtc,

drivers/video/fbdev/aty/atyfb_base.c

3077

struct crtc crtc;

drivers/video/fbdev/aty/atyfb_base.c

3081

crtc.vxres = of_getintprop_default(dp, "width", 1024);

drivers/video/fbdev/aty/atyfb_base.c

3082

crtc.vyres = of_getintprop_default(dp, "height", 768);

drivers/video/fbdev/aty/atyfb_base.c

3085

crtc.h_tot_disp = aty_ld_le32(CRTC_H_TOTAL_DISP, par);

drivers/video/fbdev/aty/atyfb_base.c

3086

crtc.h_sync_strt_wid = aty_ld_le32(CRTC_H_SYNC_STRT_WID, par);

drivers/video/fbdev/aty/atyfb_base.c

3087

crtc.v_tot_disp = aty_ld_le32(CRTC_V_TOTAL_DISP, par);

drivers/video/fbdev/aty/atyfb_base.c

3088

crtc.v_sync_strt_wid = aty_ld_le32(CRTC_V_SYNC_STRT_WID, par);

drivers/video/fbdev/aty/atyfb_base.c

3089

crtc.gen_cntl = aty_ld_le32(CRTC_GEN_CNTL, par);

drivers/video/fbdev/aty/atyfb_base.c

3090

aty_crtc_to_var(&crtc, var);

drivers/video/fbdev/aty/atyfb_base.c

660

static void aty_get_crtc(const struct atyfb_par *par, struct crtc *crtc)

drivers/video/fbdev/aty/atyfb_base.c

665

crtc->lcd_index = aty_ld_le32(LCD_INDEX, par);

drivers/video/fbdev/aty/atyfb_base.c

666

aty_st_le32(LCD_INDEX, crtc->lcd_index, par);

drivers/video/fbdev/aty/atyfb_base.c

668

crtc->lcd_config_panel = aty_ld_lcd(CNFG_PANEL, par);

drivers/video/fbdev/aty/atyfb_base.c

669

crtc->lcd_gen_cntl = aty_ld_lcd(LCD_GEN_CNTL, par);

drivers/video/fbdev/aty/atyfb_base.c

673

aty_st_lcd(LCD_GEN_CNTL, crtc->lcd_gen_cntl &

drivers/video/fbdev/aty/atyfb_base.c

677

crtc->horz_stretching = aty_ld_lcd(HORZ_STRETCHING, par);

drivers/video/fbdev/aty/atyfb_base.c

678

crtc->vert_stretching = aty_ld_lcd(VERT_STRETCHING, par);

drivers/video/fbdev/aty/atyfb_base.c

680

crtc->ext_vert_stretch = aty_ld_lcd(EXT_VERT_STRETCH, par);

drivers/video/fbdev/aty/atyfb_base.c

683

crtc->h_tot_disp = aty_ld_le32(CRTC_H_TOTAL_DISP, par);

drivers/video/fbdev/aty/atyfb_base.c

684

crtc->h_sync_strt_wid = aty_ld_le32(CRTC_H_SYNC_STRT_WID, par);

drivers/video/fbdev/aty/atyfb_base.c

685

crtc->v_tot_disp = aty_ld_le32(CRTC_V_TOTAL_DISP, par);

drivers/video/fbdev/aty/atyfb_base.c

686

crtc->v_sync_strt_wid = aty_ld_le32(CRTC_V_SYNC_STRT_WID, par);

drivers/video/fbdev/aty/atyfb_base.c

687

crtc->vline_crnt_vline = aty_ld_le32(CRTC_VLINE_CRNT_VLINE, par);

drivers/video/fbdev/aty/atyfb_base.c

688

crtc->off_pitch = aty_ld_le32(CRTC_OFF_PITCH, par);

drivers/video/fbdev/aty/atyfb_base.c

689

crtc->gen_cntl = aty_ld_le32(CRTC_GEN_CNTL, par);

drivers/video/fbdev/aty/atyfb_base.c

694

aty_st_lcd(LCD_GEN_CNTL, (crtc->lcd_gen_cntl & ~CRTC_RW_SELECT) |

drivers/video/fbdev/aty/atyfb_base.c

697

crtc->shadow_h_tot_disp = aty_ld_le32(CRTC_H_TOTAL_DISP, par);

drivers/video/fbdev/aty/atyfb_base.c

698

crtc->shadow_h_sync_strt_wid = aty_ld_le32(CRTC_H_SYNC_STRT_WID, par);

drivers/video/fbdev/aty/atyfb_base.c

699

crtc->shadow_v_tot_disp = aty_ld_le32(CRTC_V_TOTAL_DISP, par);

drivers/video/fbdev/aty/atyfb_base.c

700

crtc->shadow_v_sync_strt_wid = aty_ld_le32(CRTC_V_SYNC_STRT_WID, par);

drivers/video/fbdev/aty/atyfb_base.c

702

aty_st_le32(LCD_GEN_CNTL, crtc->lcd_gen_cntl, par);

drivers/video/fbdev/aty/atyfb_base.c

707

static void aty_set_crtc(const struct atyfb_par *par, const struct crtc *crtc)

drivers/video/fbdev/aty/atyfb_base.c

712

aty_st_le32(CRTC_GEN_CNTL, crtc->gen_cntl &

drivers/video/fbdev/aty/atyfb_base.c

716

aty_st_lcd(CNFG_PANEL, crtc->lcd_config_panel, par);

drivers/video/fbdev/aty/atyfb_base.c

717

aty_st_lcd(LCD_GEN_CNTL, crtc->lcd_gen_cntl &

drivers/video/fbdev/aty/atyfb_base.c

721

aty_st_lcd(HORZ_STRETCHING, crtc->horz_stretching &

drivers/video/fbdev/aty/atyfb_base.c

723

aty_st_lcd(VERT_STRETCHING, crtc->vert_stretching &

drivers/video/fbdev/aty/atyfb_base.c

729

aty_st_le32(CRTC_GEN_CNTL, crtc->gen_cntl & ~CRTC_EN, par);

drivers/video/fbdev/aty/atyfb_base.c

733

((((crtc->h_tot_disp >> 16) & 0xff) + 1) << 3),

drivers/video/fbdev/aty/atyfb_base.c

734

(((crtc->v_tot_disp >> 16) & 0x7ff) + 1),

drivers/video/fbdev/aty/atyfb_base.c

735

(crtc->h_sync_strt_wid & 0x200000) ? 'N' : 'P',

drivers/video/fbdev/aty/atyfb_base.c

736

(crtc->v_sync_strt_wid & 0x200000) ? 'N' : 'P',

drivers/video/fbdev/aty/atyfb_base.c

737

(crtc->gen_cntl & CRTC_CSYNC_EN) ? 'P' : 'N');

drivers/video/fbdev/aty/atyfb_base.c

739

DPRINTK("CRTC_H_TOTAL_DISP: %x\n", crtc->h_tot_disp);

drivers/video/fbdev/aty/atyfb_base.c

740

DPRINTK("CRTC_H_SYNC_STRT_WID: %x\n", crtc->h_sync_strt_wid);

drivers/video/fbdev/aty/atyfb_base.c

741

DPRINTK("CRTC_V_TOTAL_DISP: %x\n", crtc->v_tot_disp);

drivers/video/fbdev/aty/atyfb_base.c

742

DPRINTK("CRTC_V_SYNC_STRT_WID: %x\n", crtc->v_sync_strt_wid);

drivers/video/fbdev/aty/atyfb_base.c

743

DPRINTK("CRTC_OFF_PITCH: %x\n", crtc->off_pitch);

drivers/video/fbdev/aty/atyfb_base.c

744

DPRINTK("CRTC_VLINE_CRNT_VLINE: %x\n", crtc->vline_crnt_vline);

drivers/video/fbdev/aty/atyfb_base.c

745

DPRINTK("CRTC_GEN_CNTL: %x\n", crtc->gen_cntl);

drivers/video/fbdev/aty/atyfb_base.c

747

aty_st_le32(CRTC_H_TOTAL_DISP, crtc->h_tot_disp, par);

drivers/video/fbdev/aty/atyfb_base.c

748

aty_st_le32(CRTC_H_SYNC_STRT_WID, crtc->h_sync_strt_wid, par);

drivers/video/fbdev/aty/atyfb_base.c

749

aty_st_le32(CRTC_V_TOTAL_DISP, crtc->v_tot_disp, par);

drivers/video/fbdev/aty/atyfb_base.c

750

aty_st_le32(CRTC_V_SYNC_STRT_WID, crtc->v_sync_strt_wid, par);

drivers/video/fbdev/aty/atyfb_base.c

751

aty_st_le32(CRTC_OFF_PITCH, crtc->off_pitch, par);

drivers/video/fbdev/aty/atyfb_base.c

752

aty_st_le32(CRTC_VLINE_CRNT_VLINE, crtc->vline_crnt_vline, par);

drivers/video/fbdev/aty/atyfb_base.c

754

aty_st_le32(CRTC_GEN_CNTL, crtc->gen_cntl, par);

drivers/video/fbdev/aty/atyfb_base.c

764

aty_st_lcd(LCD_GEN_CNTL, (crtc->lcd_gen_cntl & ~CRTC_RW_SELECT) |

drivers/video/fbdev/aty/atyfb_base.c

768

((((crtc->shadow_h_tot_disp >> 16) & 0xff) + 1) << 3),

drivers/video/fbdev/aty/atyfb_base.c

769

(((crtc->shadow_v_tot_disp >> 16) & 0x7ff) + 1),

drivers/video/fbdev/aty/atyfb_base.c

770

(crtc->shadow_h_sync_strt_wid & 0x200000) ? 'N' : 'P',

drivers/video/fbdev/aty/atyfb_base.c

771

(crtc->shadow_v_sync_strt_wid & 0x200000) ? 'N' : 'P');

drivers/video/fbdev/aty/atyfb_base.c

774

crtc->shadow_h_tot_disp);

drivers/video/fbdev/aty/atyfb_base.c

776

crtc->shadow_h_sync_strt_wid);

drivers/video/fbdev/aty/atyfb_base.c

778

crtc->shadow_v_tot_disp);

drivers/video/fbdev/aty/atyfb_base.c

780

crtc->shadow_v_sync_strt_wid);

drivers/video/fbdev/aty/atyfb_base.c

782

aty_st_le32(CRTC_H_TOTAL_DISP, crtc->shadow_h_tot_disp, par);

drivers/video/fbdev/aty/atyfb_base.c

783

aty_st_le32(CRTC_H_SYNC_STRT_WID, crtc->shadow_h_sync_strt_wid, par);

drivers/video/fbdev/aty/atyfb_base.c

784

aty_st_le32(CRTC_V_TOTAL_DISP, crtc->shadow_v_tot_disp, par);

drivers/video/fbdev/aty/atyfb_base.c

785

aty_st_le32(CRTC_V_SYNC_STRT_WID, crtc->shadow_v_sync_strt_wid, par);

drivers/video/fbdev/aty/atyfb_base.c

788

DPRINTK("LCD_GEN_CNTL: %x\n", crtc->lcd_gen_cntl);

drivers/video/fbdev/aty/atyfb_base.c

789

DPRINTK("HORZ_STRETCHING: %x\n", crtc->horz_stretching);

drivers/video/fbdev/aty/atyfb_base.c

790

DPRINTK("VERT_STRETCHING: %x\n", crtc->vert_stretching);

drivers/video/fbdev/aty/atyfb_base.c

792

DPRINTK("EXT_VERT_STRETCH: %x\n", crtc->ext_vert_stretch);

drivers/video/fbdev/aty/atyfb_base.c

794

aty_st_lcd(LCD_GEN_CNTL, crtc->lcd_gen_cntl, par);

drivers/video/fbdev/aty/atyfb_base.c

795

aty_st_lcd(HORZ_STRETCHING, crtc->horz_stretching, par);

drivers/video/fbdev/aty/atyfb_base.c

796

aty_st_lcd(VERT_STRETCHING, crtc->vert_stretching, par);

drivers/video/fbdev/aty/atyfb_base.c

798

aty_st_lcd(EXT_VERT_STRETCH, crtc->ext_vert_stretch, par);

drivers/video/fbdev/aty/atyfb_base.c

800

aty_st_le32(LCD_INDEX, crtc->lcd_index, par);

drivers/video/fbdev/aty/atyfb_base.c

819

struct crtc *crtc)

drivers/video/fbdev/aty/atyfb_base.c

909

crtc->lcd_index = lcd_index &

drivers/video/fbdev/aty/atyfb_base.c

916

crtc->lcd_index |= CRTC2_DISPLAY_DIS;

drivers/video/fbdev/aty/atyfb_base.c

918

crtc->lcd_config_panel = aty_ld_lcd(CNFG_PANEL, par) | 0x4000;

drivers/video/fbdev/aty/atyfb_base.c

919

crtc->lcd_gen_cntl = aty_ld_lcd(LCD_GEN_CNTL, par) & ~CRTC_RW_SELECT;

drivers/video/fbdev/aty/atyfb_base.c

921

crtc->lcd_gen_cntl &=

drivers/video/fbdev/aty/atyfb_base.c

925

crtc->lcd_gen_cntl |= DONT_SHADOW_VPAR | LOCK_8DOT;

drivers/video/fbdev/aty/atyfb_base.c

927

if ((crtc->lcd_gen_cntl & LCD_ON) &&

drivers/video/fbdev/aty/atyfb_base.c

936

if (crtc->lcd_gen_cntl & CRT_ON) {

drivers/video/fbdev/aty/atyfb_base.c

939

crtc->lcd_gen_cntl &= ~LCD_ON;

drivers/video/fbdev/aty/atyfb_base.c

949

if ((par->lcd_table != 0) && (crtc->lcd_gen_cntl & LCD_ON)) {

drivers/video/fbdev/aty/mach64_accel.c

142

aty_st_le32(SC_BOTTOM, par->crtc.vyres - 1, par);

drivers/video/fbdev/aty/mach64_accel.c

171

aty_st_le32(DP_PIX_WIDTH, par->crtc.dp_pix_width, par);

drivers/video/fbdev/aty/mach64_accel.c

172

aty_st_le32(DP_CHAIN_MASK, par->crtc.dp_chain_mask, par);

drivers/video/fbdev/aty/mach64_accel.c

239

aty_st_le32(DP_PIX_WIDTH, par->crtc.dp_pix_width, par);

drivers/video/fbdev/aty/mach64_accel.c

276

aty_st_le32(DP_PIX_WIDTH, par->crtc.dp_pix_width, par);

drivers/video/fbdev/aty/mach64_accel.c

303

pix_width = par->crtc.dp_pix_width;

drivers/video/fbdev/aty/mach64_cursor.c

118

if (par->crtc.gen_cntl & CRTC_DBL_SCAN_EN) {

drivers/video/fbdev/cyber2000fb.c

415

u_char crtc[19];

drivers/video/fbdev/cyber2000fb.c

472

cyber2000_crtcw(crtc_idx[i], hw->crtc[i], cfb);

drivers/video/fbdev/cyber2000fb.c

559

hw->crtc[13] = hw->pitch;

drivers/video/fbdev/cyber2000fb.c

560

hw->crtc[17] = 0xe3;

drivers/video/fbdev/cyber2000fb.c

561

hw->crtc[14] = 0;

drivers/video/fbdev/cyber2000fb.c

562

hw->crtc[8] = 0;

drivers/video/fbdev/cyber2000fb.c

570

hw->crtc[0] = (Htotal >> 3) - 5;

drivers/video/fbdev/cyber2000fb.c

571

hw->crtc[1] = (var->xres >> 3) - 1;

drivers/video/fbdev/cyber2000fb.c

572

hw->crtc[2] = var->xres >> 3;

drivers/video/fbdev/cyber2000fb.c

573

hw->crtc[4] = (var->xres + var->right_margin) >> 3;

drivers/video/fbdev/cyber2000fb.c

577

hw->crtc[3] = ENCODE_BIT(Hblankend, 0, 0x1f, 0) |

drivers/video/fbdev/cyber2000fb.c

582

hw->crtc[5] = ENCODE_BIT(Hsyncend, 0, 0x1f, 0) |

drivers/video/fbdev/cyber2000fb.c

597

hw->crtc[6] = Vtotal;

drivers/video/fbdev/cyber2000fb.c

598

hw->crtc[7] = ENCODE_BIT(Vtotal, 8, 0x01, 0) |

drivers/video/fbdev/cyber2000fb.c

606

hw->crtc[9] = ENCODE_BIT(0, 0, 0x1f, 0) |

drivers/video/fbdev/cyber2000fb.c

609

hw->crtc[10] = Vsyncstart;

drivers/video/fbdev/cyber2000fb.c

610

hw->crtc[11] = ENCODE_BIT(Vsyncend, 0, 0x0f, 0) |

drivers/video/fbdev/cyber2000fb.c

612

hw->crtc[12] = Vdispend;

drivers/video/fbdev/cyber2000fb.c

613

hw->crtc[15] = Vblankstart;

drivers/video/fbdev/cyber2000fb.c

614

hw->crtc[16] = Vblankend;

drivers/video/fbdev/cyber2000fb.c

615

hw->crtc[18] = 0xff;

drivers/video/fbdev/i740fb.c

48

u8 crtc[VGA_CRT_C];

drivers/video/fbdev/i740fb.c

501

par->crtc[VGA_CRTC_H_TOTAL] = (xtotal >> 3) - 5;

drivers/video/fbdev/i740fb.c

502

par->crtc[VGA_CRTC_H_DISP] = (xres >> 3) - 1;

drivers/video/fbdev/i740fb.c

503

par->crtc[VGA_CRTC_H_BLANK_START] = ((xres + right) >> 3) - 1;

drivers/video/fbdev/i740fb.c

504

par->crtc[VGA_CRTC_H_SYNC_START] = (xres + right) >> 3;

drivers/video/fbdev/i740fb.c

505

par->crtc[VGA_CRTC_H_SYNC_END] = (((xres + right + hslen) >> 3) & 0x1F)

drivers/video/fbdev/i740fb.c

507

par->crtc[VGA_CRTC_H_BLANK_END] = ((xres + right + hslen) >> 3 & 0x1F)

drivers/video/fbdev/i740fb.c

510

par->crtc[VGA_CRTC_V_TOTAL] = ytotal - 2;

drivers/video/fbdev/i740fb.c

518

par->crtc[VGA_CRTC_PRESET_ROW] = 0;

drivers/video/fbdev/i740fb.c

519

par->crtc[VGA_CRTC_MAX_SCAN] = 0x40; /* 1 scanline, no linecmp */

drivers/video/fbdev/i740fb.c

521

par->crtc[VGA_CRTC_MAX_SCAN] |= 0x80;

drivers/video/fbdev/i740fb.c

522

par->crtc[VGA_CRTC_CURSOR_START] = 0x00;

drivers/video/fbdev/i740fb.c

523

par->crtc[VGA_CRTC_CURSOR_END] = 0x00;

drivers/video/fbdev/i740fb.c

524

par->crtc[VGA_CRTC_CURSOR_HI] = 0x00;

drivers/video/fbdev/i740fb.c

525

par->crtc[VGA_CRTC_CURSOR_LO] = 0x00;

drivers/video/fbdev/i740fb.c

526

par->crtc[VGA_CRTC_V_DISP_END] = yres-1;

drivers/video/fbdev/i740fb.c

532

par->crtc[VGA_CRTC_V_BLANK_START] = yres + lower - 1;

drivers/video/fbdev/i740fb.c

533

par->crtc[VGA_CRTC_V_SYNC_START] = yres + lower - 1;

drivers/video/fbdev/i740fb.c

537

par->crtc[VGA_CRTC_MAX_SCAN] |= 0x20;

drivers/video/fbdev/i740fb.c

542

par->crtc[VGA_CRTC_V_SYNC_END] =

drivers/video/fbdev/i740fb.c

545

par->crtc[VGA_CRTC_V_BLANK_END] = (yres + lower - 1 + vslen) & 0xFF;

drivers/video/fbdev/i740fb.c

547

par->crtc[VGA_CRTC_UNDERLINE] = 0x00;

drivers/video/fbdev/i740fb.c

548

par->crtc[VGA_CRTC_MODE] = 0xC3 ;

drivers/video/fbdev/i740fb.c

549

par->crtc[VGA_CRTC_LINE_COMPARE] = 0xFF;

drivers/video/fbdev/i740fb.c

550

par->crtc[VGA_CRTC_OVERFLOW] = r7;

drivers/video/fbdev/i740fb.c

585

par->crtc[VGA_CRTC_OFFSET] = vxres >> 3;

drivers/video/fbdev/i740fb.c

594

par->crtc[VGA_CRTC_OFFSET] = vxres >> 2;

drivers/video/fbdev/i740fb.c

600

par->crtc[VGA_CRTC_OFFSET] = (vxres * 3) >> 3;

drivers/video/fbdev/i740fb.c

608

par->crtc[VGA_CRTC_OFFSET] = vxres >> 1;

drivers/video/fbdev/i740fb.c

616

par->crtc[VGA_CRTC_START_LO] = base & 0x000000FF;

drivers/video/fbdev/i740fb.c

617

par->crtc[VGA_CRTC_START_HI] = (base & 0x0000FF00) >> 8;

drivers/video/fbdev/i740fb.c

786

par->crtc[VGA_CRTC_V_SYNC_END]);

drivers/video/fbdev/i740fb.c

790

i740outreg(par, VGA_CRT_IC, i, par->crtc[i]);

drivers/video/fbdev/i740fb.c

934

par->crtc[VGA_CRTC_START_LO] = base & 0x000000FF;

drivers/video/fbdev/i740fb.c

935

par->crtc[VGA_CRTC_START_HI] = (base & 0x0000FF00) >> 8;

drivers/video/fbdev/matrox/matroxfb_DAC1064.c

519

m->mnp = matroxfb_g450_setclk(minfo, m->pixclock, (m->crtc == MATROXFB_SRC_CRTC1) ? M_PIXEL_PLL_C : M_VIDEO_PLL);

drivers/video/fbdev/matrox/matroxfb_base.c

1176

int crtc;

drivers/video/fbdev/matrox/matroxfb_base.c

1186

case FB_BLANK_NORMAL: seq = 0x20; crtc = 0x00; break; /* works ??? */

drivers/video/fbdev/matrox/matroxfb_base.c

1187

case FB_BLANK_VSYNC_SUSPEND: seq = 0x20; crtc = 0x10; break;

drivers/video/fbdev/matrox/matroxfb_base.c

1188

case FB_BLANK_HSYNC_SUSPEND: seq = 0x20; crtc = 0x20; break;

drivers/video/fbdev/matrox/matroxfb_base.c

1189

case FB_BLANK_POWERDOWN: seq = 0x20; crtc = 0x30; break;

drivers/video/fbdev/matrox/matroxfb_base.c

1190

default: seq = 0x00; crtc = 0x00; break;

drivers/video/fbdev/matrox/matroxfb_base.c

1198

mga_outb(M_EXTVGA_DATA, (mga_inb(M_EXTVGA_DATA) & ~0x30) | crtc);

drivers/video/fbdev/matrox/matroxfb_base.c

271

int matroxfb_wait_for_sync(struct matrox_fb_info *minfo, u_int32_t crtc)

drivers/video/fbdev/matrox/matroxfb_base.c

277

switch (crtc) {

drivers/video/fbdev/matrox/matroxfb_base.c

790

mt.crtc = MATROXFB_SRC_CRTC1;

drivers/video/fbdev/matrox/matroxfb_base.h

189

unsigned int crtc;

drivers/video/fbdev/matrox/matroxfb_base.h

696

extern int matroxfb_wait_for_sync(struct matrox_fb_info *minfo, u_int32_t crtc);

drivers/video/fbdev/matrox/matroxfb_crtc2.c

350

mt.crtc = MATROXFB_SRC_CRTC2;

drivers/video/fbdev/matrox/matroxfb_g450.c

528

if (mt->crtc == MATROXFB_SRC_CRTC2 &&

drivers/video/fbdev/matrox/matroxfb_g450.c

554

mt->mnp = matroxfb_g450_setclk(minfo, mt->pixclock, (mt->crtc == MATROXFB_SRC_CRTC1) ? M_PIXEL_PLL_C : M_VIDEO_PLL);

drivers/video/fbdev/matrox/matroxfb_g450.c

584

mt->mnp = matroxfb_g450_setclk(minfo, mt->pixclock, (mt->crtc == MATROXFB_SRC_CRTC1) ? M_PIXEL_PLL_C : M_VIDEO_PLL);

drivers/video/fbdev/nvidia/nv_type.h

50

u8 crtc[NUM_CRT_REGS];

drivers/video/fbdev/nvidia/nvidia.c

228

state->crtc[i] = NVReadCrtc(par, i);

drivers/video/fbdev/nvidia/nvidia.c

262

NVWriteCrtc(par, 0x11, state->crtc[0x11] & ~0x80);

drivers/video/fbdev/nvidia/nvidia.c

271

printk("CRTC[%02x] = %08x\n", i, state->crtc[i]);

drivers/video/fbdev/nvidia/nvidia.c

273

NVWriteCrtc(par, i, state->crtc[i]);

drivers/video/fbdev/nvidia/nvidia.c

332

state->crtc[0x0] = Set8Bits(h_total);

drivers/video/fbdev/nvidia/nvidia.c

333

state->crtc[0x1] = Set8Bits(h_display);

drivers/video/fbdev/nvidia/nvidia.c

334

state->crtc[0x2] = Set8Bits(h_blank_s);

drivers/video/fbdev/nvidia/nvidia.c

335

state->crtc[0x3] = SetBitField(h_blank_e, 4: 0, 4:0)

drivers/video/fbdev/nvidia/nvidia.c

337

state->crtc[0x4] = Set8Bits(h_start);

drivers/video/fbdev/nvidia/nvidia.c

338

state->crtc[0x5] = SetBitField(h_blank_e, 5: 5, 7:7)

drivers/video/fbdev/nvidia/nvidia.c

340

state->crtc[0x6] = SetBitField(v_total, 7: 0, 7:0);

drivers/video/fbdev/nvidia/nvidia.c

341

state->crtc[0x7] = SetBitField(v_total, 8: 8, 0:0)

drivers/video/fbdev/nvidia/nvidia.c

349

state->crtc[0x9] = SetBitField(v_blank_s, 9: 9, 5:5)

drivers/video/fbdev/nvidia/nvidia.c

352

state->crtc[0x10] = Set8Bits(v_start);

drivers/video/fbdev/nvidia/nvidia.c

353

state->crtc[0x11] = SetBitField(v_end, 3: 0, 3:0) | SetBit(5);

drivers/video/fbdev/nvidia/nvidia.c

354

state->crtc[0x12] = Set8Bits(v_display);

drivers/video/fbdev/nvidia/nvidia.c

355

state->crtc[0x13] = ((info->var.xres_virtual / 8) *

drivers/video/fbdev/nvidia/nvidia.c

357

state->crtc[0x15] = Set8Bits(v_blank_s);

drivers/video/fbdev/nvidia/nvidia.c

358

state->crtc[0x16] = Set8Bits(v_blank_e);

drivers/video/fbdev/nvidia/nvidia.c

505

memset(state->crtc, 0x00, NUM_CRT_REGS);

drivers/video/fbdev/nvidia/nvidia.c

506

state->crtc[0x0a] = 0x20;

drivers/video/fbdev/nvidia/nvidia.c

507

state->crtc[0x17] = 0xe3;

drivers/video/fbdev/nvidia/nvidia.c

508

state->crtc[0x18] = 0xff;

drivers/video/fbdev/nvidia/nvidia.c

509

state->crtc[0x28] = 0x40;

drivers/video/fbdev/ps3fb.c

757

static int ps3fb_wait_for_vsync(u32 crtc)

drivers/video/fbdev/riva/fbdev.c

591

regs->crtc[i] = CRTCin(par, i);

drivers/video/fbdev/riva/fbdev.c

638

CRTCout(par, i, regs->crtc[i]);

drivers/video/fbdev/riva/fbdev.c

715

newmode.crtc[0x0] = Set8Bits (hTotal);

drivers/video/fbdev/riva/fbdev.c

716

newmode.crtc[0x1] = Set8Bits (hDisplay);

drivers/video/fbdev/riva/fbdev.c

717

newmode.crtc[0x2] = Set8Bits (hBlankStart);

drivers/video/fbdev/riva/fbdev.c

718

newmode.crtc[0x3] = SetBitField (hBlankEnd, 4: 0, 4:0) | SetBit (7);

drivers/video/fbdev/riva/fbdev.c

719

newmode.crtc[0x4] = Set8Bits (hStart);

drivers/video/fbdev/riva/fbdev.c

720

newmode.crtc[0x5] = SetBitField (hBlankEnd, 5: 5, 7:7)

drivers/video/fbdev/riva/fbdev.c

722

newmode.crtc[0x6] = SetBitField (vTotal, 7: 0, 7:0);

drivers/video/fbdev/riva/fbdev.c

723

newmode.crtc[0x7] = SetBitField (vTotal, 8: 8, 0:0)

drivers/video/fbdev/riva/fbdev.c

731

newmode.crtc[0x9] = SetBitField (vBlankStart, 9: 9, 5:5)

drivers/video/fbdev/riva/fbdev.c

733

newmode.crtc[0x10] = Set8Bits (vStart);

drivers/video/fbdev/riva/fbdev.c

734

newmode.crtc[0x11] = SetBitField (vEnd, 3: 0, 3:0)

drivers/video/fbdev/riva/fbdev.c

736

newmode.crtc[0x12] = Set8Bits (vDisplay);

drivers/video/fbdev/riva/fbdev.c

737

newmode.crtc[0x13] = (width / 8) * ((bpp + 1) / 8);

drivers/video/fbdev/riva/fbdev.c

738

newmode.crtc[0x15] = Set8Bits (vBlankStart);

drivers/video/fbdev/riva/fbdev.c

739

newmode.crtc[0x16] = Set8Bits (vBlankEnd);

drivers/video/fbdev/riva/rivafb.h

28

u8 crtc[NUM_CRT_REGS];

drivers/video/fbdev/s3c-fb.c

1021

u32 crtc;

drivers/video/fbdev/s3c-fb.c

1025

if (get_user(crtc, (u32 __user *)arg)) {

drivers/video/fbdev/s3c-fb.c

1030

ret = s3c_fb_wait_for_vsync(sfb, crtc);

drivers/video/fbdev/s3c-fb.c

991

static int s3c_fb_wait_for_vsync(struct s3c_fb *sfb, u32 crtc)

drivers/video/fbdev/s3c-fb.c

996

if (crtc != 0)

drivers/video/fbdev/uvesafb.c

1217

struct vbe_crtc_ib *crtc = NULL;

drivers/video/fbdev/uvesafb.c

1243

crtc = kzalloc_obj(struct vbe_crtc_ib);

drivers/video/fbdev/uvesafb.c

1244

if (!crtc) {

drivers/video/fbdev/uvesafb.c

1248

crtc->horiz_start = info->var.xres + info->var.right_margin;

drivers/video/fbdev/uvesafb.c

1249

crtc->horiz_end = crtc->horiz_start + info->var.hsync_len;

drivers/video/fbdev/uvesafb.c

1250

crtc->horiz_total = crtc->horiz_end + info->var.left_margin;

drivers/video/fbdev/uvesafb.c

1252

crtc->vert_start = info->var.yres + info->var.lower_margin;

drivers/video/fbdev/uvesafb.c

1253

crtc->vert_end = crtc->vert_start + info->var.vsync_len;

drivers/video/fbdev/uvesafb.c

1254

crtc->vert_total = crtc->vert_end + info->var.upper_margin;

drivers/video/fbdev/uvesafb.c

1256

crtc->pixel_clock = PICOS2KHZ(info->var.pixclock) * 1000;

drivers/video/fbdev/uvesafb.c

1257

crtc->refresh_rate = (u16)(100 * (crtc->pixel_clock /

drivers/video/fbdev/uvesafb.c

1258

(crtc->vert_total * crtc->horiz_total)));

drivers/video/fbdev/uvesafb.c

1261

crtc->flags |= 0x1;

drivers/video/fbdev/uvesafb.c

1263

crtc->flags |= 0x2;

drivers/video/fbdev/uvesafb.c

1265

crtc->flags |= 0x4;

drivers/video/fbdev/uvesafb.c

1267

crtc->flags |= 0x8;

drivers/video/fbdev/uvesafb.c

1268

memcpy(&par->crtc, crtc, sizeof(*crtc));

drivers/video/fbdev/uvesafb.c

1270

memset(&par->crtc, 0, sizeof(*crtc));

drivers/video/fbdev/uvesafb.c

1274

task->buf = &par->crtc;

drivers/video/fbdev/uvesafb.c

1282

if (crtc != NULL) {

drivers/video/fbdev/uvesafb.c

1286

kfree(crtc);

drivers/video/fbdev/uvesafb.c

1287

crtc = NULL;

drivers/video/fbdev/uvesafb.c

1320

kfree(crtc);

drivers/video/fbdev/vga16fb.c

401

par->crtc[VGA_CRTC_H_TOTAL] = xtotal - 5;

drivers/video/fbdev/vga16fb.c

402

par->crtc[VGA_CRTC_H_BLANK_START] = xres - 1;

drivers/video/fbdev/vga16fb.c

403

par->crtc[VGA_CRTC_H_DISP] = xres - 1;

drivers/video/fbdev/vga16fb.c

405

par->crtc[VGA_CRTC_H_SYNC_START] = pos;

drivers/video/fbdev/vga16fb.c

407

par->crtc[VGA_CRTC_H_SYNC_END] = pos & 0x1F;

drivers/video/fbdev/vga16fb.c

409

par->crtc[VGA_CRTC_H_BLANK_END] = (pos & 0x1F) | 0x80;

drivers/video/fbdev/vga16fb.c

411

par->crtc[VGA_CRTC_H_SYNC_END] |= 0x80;

drivers/video/fbdev/vga16fb.c

456

par->crtc[VGA_CRTC_V_TOTAL] = ytotal - 2;

drivers/video/fbdev/vga16fb.c

460

par->crtc[VGA_CRTC_PRESET_ROW] = 0;

drivers/video/fbdev/vga16fb.c

461

par->crtc[VGA_CRTC_MAX_SCAN] = 0x40; /* 1 scanline, no linecmp */

drivers/video/fbdev/vga16fb.c

463

par->crtc[VGA_CRTC_MAX_SCAN] |= 0x80;

drivers/video/fbdev/vga16fb.c

464

par->crtc[VGA_CRTC_CURSOR_START] = 0x20;

drivers/video/fbdev/vga16fb.c

465

par->crtc[VGA_CRTC_CURSOR_END] = 0x00;

drivers/video/fbdev/vga16fb.c

469

par->crtc[VGA_CRTC_START_HI] = pos >> 8;

drivers/video/fbdev/vga16fb.c

470

par->crtc[VGA_CRTC_START_LO] = pos & 0xFF;

drivers/video/fbdev/vga16fb.c

471

par->crtc[VGA_CRTC_CURSOR_HI] = 0x00;

drivers/video/fbdev/vga16fb.c

472

par->crtc[VGA_CRTC_CURSOR_LO] = 0x00;

drivers/video/fbdev/vga16fb.c

474

par->crtc[VGA_CRTC_V_DISP_END] = pos & 0xFF;

drivers/video/fbdev/vga16fb.c

475

par->crtc[VGA_CRTC_V_BLANK_START] = pos & 0xFF;

drivers/video/fbdev/vga16fb.c

480

par->crtc[VGA_CRTC_MAX_SCAN] |= 0x20; /* BLANK_START */

drivers/video/fbdev/vga16fb.c

483

par->crtc[VGA_CRTC_V_SYNC_START] = pos & 0xFF;

drivers/video/fbdev/vga16fb.c

489

par->crtc[VGA_CRTC_V_SYNC_END] = (pos & 0x0F) & ~0x10; /* disabled IRQ */

drivers/video/fbdev/vga16fb.c

491

par->crtc[VGA_CRTC_V_BLANK_END] = pos & 0xFF; /* 0x7F for original VGA,

drivers/video/fbdev/vga16fb.c

495

par->crtc[VGA_CRTC_OFFSET] = vxres >> 1;

drivers/video/fbdev/vga16fb.c

497

par->crtc[VGA_CRTC_UNDERLINE] = 0x5F; /* 256, cfb8 */

drivers/video/fbdev/vga16fb.c

499

par->crtc[VGA_CRTC_UNDERLINE] = 0x1F; /* 16, vgap */

drivers/video/fbdev/vga16fb.c

500

par->crtc[VGA_CRTC_MODE] = rMode | ((mode & MODE_TEXT) ? 0xA3 : 0xE3);

drivers/video/fbdev/vga16fb.c

501

par->crtc[VGA_CRTC_LINE_COMPARE] = 0xFF;

drivers/video/fbdev/vga16fb.c

502

par->crtc[VGA_CRTC_OVERFLOW] = r7;

drivers/video/fbdev/vga16fb.c

591

par->crtc[VGA_CRTC_MAX_SCAN] = (par->crtc[VGA_CRTC_MAX_SCAN]

drivers/video/fbdev/vga16fb.c

61

u8 crtc[VGA_CRT_C];

drivers/video/fbdev/vga16fb.c

622

vga_io_wcrt(VGA_CRTC_V_SYNC_END, par->crtc[VGA_CRTC_V_SYNC_END]);

drivers/video/fbdev/vga16fb.c

626

vga_io_wcrt(i, par->crtc[i]);

drivers/video/fbdev/via/share.h

308

struct via_display_timing crtc;

drivers/video/vgastate.c

239

saved->crtc[i] = vga_rcrtcs(state->vgabase, iobase, i);

drivers/video/vgastate.c

28

__u8 *crtc;

drivers/video/vgastate.c

286

vga_wcrtcs(state->vgabase, iobase, 17, saved->crtc[17] & ~0x80);

drivers/video/vgastate.c

288

vga_wcrtcs(state->vgabase, iobase, i, saved->crtc[i]);

drivers/video/vgastate.c

389

saved->crtc = saved->attr + state->num_attr;

drivers/video/vgastate.c

390

saved->gfx = saved->crtc + state->num_crtc;

include/drm/display/drm_dp_helper.h

413

struct drm_crtc *crtc;

include/drm/display/drm_dp_helper.h

779

int drm_dp_start_crc(struct drm_dp_aux *aux, struct drm_crtc *crtc);

include/drm/drm_atomic.h

1003

((crtc) = (__state)->crtcs[__i].ptr, \

include/drm/drm_atomic.h

1004

(void)(crtc) /* Only to avoid unused-but-set-variable warning */, \

include/drm/drm_atomic.h

1021

#define for_each_old_crtc_in_state(__state, crtc, old_crtc_state, __i) \

include/drm/drm_atomic.h

1026

((crtc) = (__state)->crtcs[__i].ptr, \

include/drm/drm_atomic.h

1027

(void)(crtc) /* Only to avoid unused-but-set-variable warning */, \

include/drm/drm_atomic.h

1041

#define for_each_new_crtc_in_state(__state, crtc, new_crtc_state, __i) \

include/drm/drm_atomic.h

1046

((crtc) = (__state)->crtcs[__i].ptr, \

include/drm/drm_atomic.h

1047

(void)(crtc) /* Only to avoid unused-but-set-variable warning */, \

include/drm/drm_atomic.h

707

struct drm_crtc *crtc);

include/drm/drm_atomic.h

769

struct drm_crtc *crtc)

include/drm/drm_atomic.h

771

return state->crtcs[drm_crtc_index(crtc)].old_state;

include/drm/drm_atomic.h

78

struct drm_crtc *crtc;

include/drm/drm_atomic.h

783

struct drm_crtc *crtc)

include/drm/drm_atomic.h

785

return state->crtcs[drm_crtc_index(crtc)].new_state;

include/drm/drm_atomic.h

905

struct drm_crtc *crtc);

include/drm/drm_atomic.h

908

struct drm_crtc *crtc);

include/drm/drm_atomic.h

998

#define for_each_oldnew_crtc_in_state(__state, crtc, old_crtc_state, new_crtc_state, __i) \

include/drm/drm_atomic_helper.h

150

struct drm_crtc *crtc,

include/drm/drm_atomic_helper.h

164

int drm_atomic_helper_reset_crtc(struct drm_crtc *crtc,

include/drm/drm_atomic_helper.h

176

int drm_atomic_helper_page_flip(struct drm_crtc *crtc,

include/drm/drm_atomic_helper.h

182

struct drm_crtc *crtc,

include/drm/drm_atomic_helper.h

200

#define drm_atomic_crtc_for_each_plane(plane, crtc) \

include/drm/drm_atomic_helper.h

201

drm_for_each_plane_mask(plane, (crtc)->dev, (crtc)->state->plane_mask)

include/drm/drm_atomic_helper.h

257

WARN_ON((!new_plane_state->crtc && new_plane_state->fb) ||

include/drm/drm_atomic_helper.h

258

(new_plane_state->crtc && !new_plane_state->fb));

include/drm/drm_atomic_helper.h

260

return !old_plane_state->crtc && new_plane_state->crtc;

include/drm/drm_atomic_helper.h

284

WARN_ON((new_plane_state->crtc == NULL && new_plane_state->fb != NULL) ||

include/drm/drm_atomic_helper.h

285

(new_plane_state->crtc != NULL && new_plane_state->fb == NULL));

include/drm/drm_atomic_helper.h

287

return old_plane_state->crtc && !new_plane_state->crtc;

include/drm/drm_atomic_state_helper.h

44

struct drm_crtc *crtc);

include/drm/drm_atomic_state_helper.h

45

void __drm_atomic_helper_crtc_reset(struct drm_crtc *crtc,

include/drm/drm_atomic_state_helper.h

47

void drm_atomic_helper_crtc_reset(struct drm_crtc *crtc);

include/drm/drm_atomic_state_helper.h

48

void __drm_atomic_helper_crtc_duplicate_state(struct drm_crtc *crtc,

include/drm/drm_atomic_state_helper.h

51

drm_atomic_helper_crtc_duplicate_state(struct drm_crtc *crtc);

include/drm/drm_atomic_state_helper.h

53

void drm_atomic_helper_crtc_destroy_state(struct drm_crtc *crtc,

include/drm/drm_atomic_uapi.h

50

struct drm_crtc *crtc);

include/drm/drm_atomic_uapi.h

57

struct drm_crtc *crtc);

include/drm/drm_client.h

226

modeset = (client)->modesets; modeset->crtc; modeset++)

include/drm/drm_color_mgmt.h

156

void drm_crtc_load_gamma_888(struct drm_crtc *crtc, const struct drm_color_lut *lut,

include/drm/drm_color_mgmt.h

158

void drm_crtc_load_gamma_565_from_888(struct drm_crtc *crtc, const struct drm_color_lut *lut,

include/drm/drm_color_mgmt.h

160

void drm_crtc_load_gamma_555_from_888(struct drm_crtc *crtc, const struct drm_color_lut *lut,

include/drm/drm_color_mgmt.h

163

void drm_crtc_fill_gamma_888(struct drm_crtc *crtc, drm_crtc_set_lut_func set_gamma);

include/drm/drm_color_mgmt.h

164

void drm_crtc_fill_gamma_565(struct drm_crtc *crtc, drm_crtc_set_lut_func set_gamma);

include/drm/drm_color_mgmt.h

165

void drm_crtc_fill_gamma_555(struct drm_crtc *crtc, drm_crtc_set_lut_func set_gamma);

include/drm/drm_color_mgmt.h

171

void drm_crtc_load_palette_8(struct drm_crtc *crtc, const struct drm_color_lut *lut,

include/drm/drm_color_mgmt.h

174

void drm_crtc_fill_palette_332(struct drm_crtc *crtc, drm_crtc_set_lut_func set_palette);

include/drm/drm_color_mgmt.h

175

void drm_crtc_fill_palette_8(struct drm_crtc *crtc, drm_crtc_set_lut_func set_palette);

include/drm/drm_color_mgmt.h

71

void drm_crtc_enable_color_mgmt(struct drm_crtc *crtc,

include/drm/drm_color_mgmt.h

76

int drm_mode_crtc_set_gamma_size(struct drm_crtc *crtc,

include/drm/drm_connector.h

1015

struct drm_crtc *crtc;

include/drm/drm_crtc.h

1212

struct drm_crtc *crtc;

include/drm/drm_crtc.h

1226

struct drm_crtc *crtc,

include/drm/drm_crtc.h

1234

struct drm_crtc *crtc,

include/drm/drm_crtc.h

1240

void drm_crtc_cleanup(struct drm_crtc *crtc);

include/drm/drm_crtc.h

1282

static inline unsigned int drm_crtc_index(const struct drm_crtc *crtc)

include/drm/drm_crtc.h

1284

return crtc->index;

include/drm/drm_crtc.h

1294

static inline uint32_t drm_crtc_mask(const struct drm_crtc *crtc)

include/drm/drm_crtc.h

1296

return 1 << drm_crtc_index(crtc);

include/drm/drm_crtc.h

1328

#define drm_for_each_crtc(crtc, dev) \

include/drm/drm_crtc.h

1329

list_for_each_entry(crtc, &(dev)->mode_config.crtc_list, head)

include/drm/drm_crtc.h

1338

#define drm_for_each_crtc_reverse(crtc, dev) \

include/drm/drm_crtc.h

1339

list_for_each_entry_reverse(crtc, &(dev)->mode_config.crtc_list, head)

include/drm/drm_crtc.h

1341

int drm_crtc_create_scaling_filter_property(struct drm_crtc *crtc,

include/drm/drm_crtc.h

1344

int drm_crtc_create_sharpness_strength_property(struct drm_crtc *crtc);

include/drm/drm_crtc.h

424

void (*reset)(struct drm_crtc *crtc);

include/drm/drm_crtc.h

447

int (*cursor_set)(struct drm_crtc *crtc, struct drm_file *file_priv,

include/drm/drm_crtc.h

469

int (*cursor_set2)(struct drm_crtc *crtc, struct drm_file *file_priv,

include/drm/drm_crtc.h

489

int (*cursor_move)(struct drm_crtc *crtc, int x, int y);

include/drm/drm_crtc.h

504

int (*gamma_set)(struct drm_crtc *crtc, u16 *r, u16 *g, u16 *b,

include/drm/drm_crtc.h

515

void (*destroy)(struct drm_crtc *crtc);

include/drm/drm_crtc.h

587

int (*page_flip)(struct drm_crtc *crtc,

include/drm/drm_crtc.h

606

int (*page_flip_target)(struct drm_crtc *crtc,

include/drm/drm_crtc.h

626

int (*set_property)(struct drm_crtc *crtc,

include/drm/drm_crtc.h

660

struct drm_crtc_state *(*atomic_duplicate_state)(struct drm_crtc *crtc);

include/drm/drm_crtc.h

670

void (*atomic_destroy_state)(struct drm_crtc *crtc,

include/drm/drm_crtc.h

715

int (*atomic_set_property)(struct drm_crtc *crtc,

include/drm/drm_crtc.h

737

int (*atomic_get_property)(struct drm_crtc *crtc,

include/drm/drm_crtc.h

755

int (*late_register)(struct drm_crtc *crtc);

include/drm/drm_crtc.h

766

void (*early_unregister)(struct drm_crtc *crtc);

include/drm/drm_crtc.h

795

int (*set_crc_source)(struct drm_crtc *crtc, const char *source);

include/drm/drm_crtc.h

811

int (*verify_crc_source)(struct drm_crtc *crtc, const char *source,

include/drm/drm_crtc.h

83

struct drm_crtc *crtc;

include/drm/drm_crtc.h

833

const char *const *(*get_crc_sources)(struct drm_crtc *crtc,

include/drm/drm_crtc.h

872

u32 (*get_vblank_counter)(struct drm_crtc *crtc);

include/drm/drm_crtc.h

885

int (*enable_vblank)(struct drm_crtc *crtc);

include/drm/drm_crtc.h

893

void (*disable_vblank)(struct drm_crtc *crtc);

include/drm/drm_crtc.h

931

bool (*get_vblank_timestamp)(struct drm_crtc *crtc,

include/drm/drm_crtc_helper.h

51

bool drm_crtc_helper_set_mode(struct drm_crtc *crtc,

include/drm/drm_crtc_helper.h

55

int drm_crtc_helper_atomic_check(struct drm_crtc *crtc,

include/drm/drm_crtc_helper.h

57

bool drm_helper_crtc_in_use(struct drm_crtc *crtc);

include/drm/drm_debugfs_crc.h

70

int drm_crtc_add_crc_entry(struct drm_crtc *crtc, bool has_frame,

include/drm/drm_debugfs_crc.h

73

static inline int drm_crtc_add_crc_entry(struct drm_crtc *crtc, bool has_frame,

include/drm/drm_encoder.h

184

struct drm_crtc *crtc;

include/drm/drm_encoder.h

297

struct drm_crtc *crtc)

include/drm/drm_encoder.h

299

return !!(encoder->possible_crtcs & drm_crtc_mask(crtc));

include/drm/drm_kunit_helpers.h

124

struct drm_crtc *crtc,

include/drm/drm_modeset_helper.h

40

int drm_crtc_init(struct drm_device *dev, struct drm_crtc *crtc,

include/drm/drm_modeset_helper_vtables.h

108

void (*commit)(struct drm_crtc *crtc);

include/drm/drm_modeset_helper_vtables.h

141

enum drm_mode_status (*mode_valid)(struct drm_crtc *crtc,

include/drm/drm_modeset_helper_vtables.h

187

bool (*mode_fixup)(struct drm_crtc *crtc,

include/drm/drm_modeset_helper_vtables.h

206

int (*mode_set)(struct drm_crtc *crtc, struct drm_display_mode *mode,

include/drm/drm_modeset_helper_vtables.h

229

void (*mode_set_nofb)(struct drm_crtc *crtc);

include/drm/drm_modeset_helper_vtables.h

248

int (*mode_set_base)(struct drm_crtc *crtc, int x, int y,

include/drm/drm_modeset_helper_vtables.h

282

void (*disable)(struct drm_crtc *crtc);

include/drm/drm_modeset_helper_vtables.h

334

int (*atomic_check)(struct drm_crtc *crtc,

include/drm/drm_modeset_helper_vtables.h

355

void (*atomic_begin)(struct drm_crtc *crtc,

include/drm/drm_modeset_helper_vtables.h

379

void (*atomic_flush)(struct drm_crtc *crtc,

include/drm/drm_modeset_helper_vtables.h

401

void (*atomic_enable)(struct drm_crtc *crtc,

include/drm/drm_modeset_helper_vtables.h

421

void (*atomic_disable)(struct drm_crtc *crtc,

include/drm/drm_modeset_helper_vtables.h

466

bool (*get_scanout_position)(struct drm_crtc *crtc,

include/drm/drm_modeset_helper_vtables.h

481

bool (*handle_vblank_timeout)(struct drm_crtc *crtc);

include/drm/drm_modeset_helper_vtables.h

489

static inline void drm_crtc_helper_add(struct drm_crtc *crtc,

include/drm/drm_modeset_helper_vtables.h

492

crtc->helper_private = funcs;

include/drm/drm_modeset_helper_vtables.h

551

enum drm_mode_status (*mode_valid)(struct drm_encoder *crtc,

include/drm/drm_modeset_helper_vtables.h

78

void (*dpms)(struct drm_crtc *crtc, int mode);

include/drm/drm_modeset_helper_vtables.h

93

void (*prepare)(struct drm_crtc *crtc);

include/drm/drm_plane.h

328

struct drm_crtc *crtc, struct drm_framebuffer *fb,

include/drm/drm_plane.h

64

struct drm_crtc *crtc;

include/drm/drm_plane.h

698

struct drm_crtc *crtc;

include/drm/drm_plane_helper.h

34

int drm_plane_helper_update_primary(struct drm_plane *plane, struct drm_crtc *crtc,

include/drm/drm_probe_helper.h

33

enum drm_mode_status drm_crtc_helper_mode_valid_fixed(struct drm_crtc *crtc,

include/drm/drm_self_refresh_helper.h

19

int drm_self_refresh_helper_init(struct drm_crtc *crtc);

include/drm/drm_self_refresh_helper.h

20

void drm_self_refresh_helper_cleanup(struct drm_crtc *crtc);

include/drm/drm_simple_kms_helper.h

243

struct drm_crtc crtc;

include/drm/drm_vblank.h

126

struct drm_crtc *crtc;

include/drm/drm_vblank.h

287

struct drm_vblank_crtc *drm_crtc_vblank_crtc(struct drm_crtc *crtc);

include/drm/drm_vblank.h

290

u64 drm_crtc_vblank_count(struct drm_crtc *crtc);

include/drm/drm_vblank.h

291

u64 drm_crtc_vblank_count_and_time(struct drm_crtc *crtc,

include/drm/drm_vblank.h

293

int drm_crtc_next_vblank_start(struct drm_crtc *crtc, ktime_t *vblanktime);

include/drm/drm_vblank.h

294

void drm_crtc_send_vblank_event(struct drm_crtc *crtc,

include/drm/drm_vblank.h

296

void drm_crtc_arm_vblank_event(struct drm_crtc *crtc,

include/drm/drm_vblank.h

302

bool drm_crtc_handle_vblank(struct drm_crtc *crtc);

include/drm/drm_vblank.h

303

int drm_crtc_vblank_get(struct drm_crtc *crtc);

include/drm/drm_vblank.h

304

void drm_crtc_vblank_put(struct drm_crtc *crtc);

include/drm/drm_vblank.h

305

int drm_crtc_wait_one_vblank(struct drm_crtc *crtc);

include/drm/drm_vblank.h

306

void drm_crtc_vblank_off(struct drm_crtc *crtc);

include/drm/drm_vblank.h

307

void drm_crtc_vblank_reset(struct drm_crtc *crtc);

include/drm/drm_vblank.h

308

void drm_crtc_vblank_on_config(struct drm_crtc *crtc,

include/drm/drm_vblank.h

310

void drm_crtc_vblank_on(struct drm_crtc *crtc);

include/drm/drm_vblank.h

311

u64 drm_crtc_accurate_vblank_count(struct drm_crtc *crtc);

include/drm/drm_vblank.h

312

void drm_crtc_vblank_restore(struct drm_crtc *crtc);

include/drm/drm_vblank.h

314

void drm_calc_timestamping_constants(struct drm_crtc *crtc,

include/drm/drm_vblank.h

316

wait_queue_head_t *drm_crtc_vblank_waitqueue(struct drm_crtc *crtc);

include/drm/drm_vblank.h

317

void drm_crtc_set_max_vblank_count(struct drm_crtc *crtc,

include/drm/drm_vblank.h

320

int drm_crtc_vblank_start_timer(struct drm_crtc *crtc);

include/drm/drm_vblank.h

321

void drm_crtc_vblank_cancel_timer(struct drm_crtc *crtc);

include/drm/drm_vblank.h

322

void drm_crtc_vblank_get_vblank_timeout(struct drm_crtc *crtc, ktime_t *vblank_time);

include/drm/drm_vblank.h

328

typedef bool (*drm_vblank_get_scanout_position_func)(struct drm_crtc *crtc,

include/drm/drm_vblank.h

336

drm_crtc_vblank_helper_get_vblank_timestamp_internal(struct drm_crtc *crtc,

include/drm/drm_vblank.h

341

bool drm_crtc_vblank_helper_get_vblank_timestamp(struct drm_crtc *crtc,

include/drm/drm_vblank_helper.h

16

void drm_crtc_vblank_atomic_flush(struct drm_crtc *crtc,

include/drm/drm_vblank_helper.h

18

void drm_crtc_vblank_atomic_enable(struct drm_crtc *crtc,

include/drm/drm_vblank_helper.h

20

void drm_crtc_vblank_atomic_disable(struct drm_crtc *crtc,

include/drm/drm_vblank_helper.h

38

int drm_crtc_vblank_helper_enable_vblank_timer(struct drm_crtc *crtc);

include/drm/drm_vblank_helper.h

39

void drm_crtc_vblank_helper_disable_vblank_timer(struct drm_crtc *crtc);

include/drm/drm_vblank_helper.h

40

bool drm_crtc_vblank_helper_get_vblank_timestamp_from_timer(struct drm_crtc *crtc,

include/drm/drm_vblank_work.h

67

void drm_vblank_work_init(struct drm_vblank_work *work, struct drm_crtc *crtc,

include/drm/drm_vblank_work.h

71

void drm_vblank_work_flush_all(struct drm_crtc *crtc);

include/drm/intel/display_parent_interface.h

35

void (*vblank_wait)(struct drm_crtc *crtc);

include/uapi/drm/drm.h

526

__u32 crtc;

include/video/uvesafb.h

135

struct vbe_crtc_ib crtc;

tools/include/uapi/drm/drm.h

526

__u32 crtc;