crypto/heimdal/lib/hdb/hdb-mitdb.c
217
uint32_t u32;
crypto/heimdal/lib/hdb/hdb-mitdb.c
249
CHECK(ret = krb5_ret_uint32(sp, &u32));
crypto/heimdal/lib/hdb/hdb-mitdb.c
250
attr_to_flags(u32, &entry->flags);
crypto/heimdal/lib/hdb/hdb-mitdb.c
253
CHECK(ret = krb5_ret_uint32(sp, &u32));
crypto/heimdal/lib/hdb/hdb-mitdb.c
254
if (u32) {
crypto/heimdal/lib/hdb/hdb-mitdb.c
256
*entry->max_life = u32;
crypto/heimdal/lib/hdb/hdb-mitdb.c
259
CHECK(ret = krb5_ret_uint32(sp, &u32));
crypto/heimdal/lib/hdb/hdb-mitdb.c
260
if (u32) {
crypto/heimdal/lib/hdb/hdb-mitdb.c
262
*entry->max_renew = u32;
crypto/heimdal/lib/hdb/hdb-mitdb.c
265
CHECK(ret = krb5_ret_uint32(sp, &u32));
crypto/heimdal/lib/hdb/hdb-mitdb.c
266
if (u32) {
crypto/heimdal/lib/hdb/hdb-mitdb.c
268
*entry->valid_end = u32;
crypto/heimdal/lib/hdb/hdb-mitdb.c
271
CHECK(ret = krb5_ret_uint32(sp, &u32));
crypto/heimdal/lib/hdb/hdb-mitdb.c
272
if (u32) {
crypto/heimdal/lib/hdb/hdb-mitdb.c
274
*entry->pw_end = u32;
crypto/heimdal/lib/hdb/hdb-mitdb.c
277
CHECK(ret = krb5_ret_uint32(sp, &u32));
crypto/heimdal/lib/hdb/hdb-mitdb.c
279
CHECK(ret = krb5_ret_uint32(sp, &u32));
crypto/heimdal/lib/hdb/hdb-mitdb.c
281
CHECK(ret = krb5_ret_uint32(sp, &u32));
crypto/heimdal/lib/hdb/hdb-mitdb.c
332
CHECK(ret = krb5_ret_uint32(sp, &u32));
crypto/heimdal/lib/hdb/hdb-mitdb.c
333
CHECK(ret = hdb_entry_set_pw_change_time(context, entry, u32));
crypto/heimdal/lib/hdb/hdb-mitdb.c
340
CHECK(ret = krb5_ret_uint32(sp, &u32)); /* mod time */
crypto/heimdal/lib/hdb/hdb-mitdb.c
353
ret = hdb_set_last_modified_by(context, entry, modby, u32);
crypto/heimdal/lib/ipc/server.c
733
uint32_t u32;
crypto/heimdal/lib/ipc/server.c
736
u32 = htonl(reply->length);
crypto/heimdal/lib/ipc/server.c
737
output_data(c, &u32, sizeof(u32));
crypto/heimdal/lib/ipc/server.c
741
u32 = htonl(returnvalue);
crypto/heimdal/lib/ipc/server.c
742
output_data(c, &u32, sizeof(u32));
crypto/krb5/src/lib/crypto/builtin/camellia/camellia.c
1068
camellia_decrypt128(const u32 *subkey, u32 *io)
crypto/krb5/src/lib/crypto/builtin/camellia/camellia.c
1070
u32 il,ir,t0,t1; /* temporary valiables */
crypto/krb5/src/lib/crypto/builtin/camellia/camellia.c
1162
camellia_encrypt256(const u32 *subkey, u32 *io)
crypto/krb5/src/lib/crypto/builtin/camellia/camellia.c
1164
u32 il,ir,t0,t1; /* temporary valiables */
crypto/krb5/src/lib/crypto/builtin/camellia/camellia.c
1277
camellia_decrypt256(const u32 *subkey, u32 *io)
crypto/krb5/src/lib/crypto/builtin/camellia/camellia.c
1279
u32 il,ir,t0,t1; /* temporary valiables */
crypto/krb5/src/lib/crypto/builtin/camellia/camellia.c
1423
u32 tmp[4];
crypto/krb5/src/lib/crypto/builtin/camellia/camellia.c
1455
u32 tmp[4];
crypto/krb5/src/lib/crypto/builtin/camellia/camellia.c
179
static const u32 camellia_sp1110[256] = {
crypto/krb5/src/lib/crypto/builtin/camellia/camellia.c
246
static const u32 camellia_sp0222[256] = {
crypto/krb5/src/lib/crypto/builtin/camellia/camellia.c
313
static const u32 camellia_sp3033[256] = {
crypto/krb5/src/lib/crypto/builtin/camellia/camellia.c
380
static const u32 camellia_sp4404[256] = {
crypto/krb5/src/lib/crypto/builtin/camellia/camellia.c
455
camellia_setup128(const unsigned char *key, u32 *subkey)
crypto/krb5/src/lib/crypto/builtin/camellia/camellia.c
457
u32 kll, klr, krl, krr;
crypto/krb5/src/lib/crypto/builtin/camellia/camellia.c
458
u32 il, ir, t0, t1, w0, w1;
crypto/krb5/src/lib/crypto/builtin/camellia/camellia.c
459
u32 kw4l, kw4r, dw, tl, tr;
crypto/krb5/src/lib/crypto/builtin/camellia/camellia.c
460
u32 subL[26];
crypto/krb5/src/lib/crypto/builtin/camellia/camellia.c
461
u32 subR[26];
crypto/krb5/src/lib/crypto/builtin/camellia/camellia.c
65
# define GETU32(p) SWAP(*((u32 *)(p)))
crypto/krb5/src/lib/crypto/builtin/camellia/camellia.c
66
# define PUTU32(ct, st) {*((u32 *)(ct)) = SWAP((st));}
crypto/krb5/src/lib/crypto/builtin/camellia/camellia.c
667
camellia_setup256(const unsigned char *key, u32 *subkey)
crypto/krb5/src/lib/crypto/builtin/camellia/camellia.c
669
u32 kll,klr,krl,krr; /* left half of key */
crypto/krb5/src/lib/crypto/builtin/camellia/camellia.c
670
u32 krll,krlr,krrl,krrr; /* right half of key */
crypto/krb5/src/lib/crypto/builtin/camellia/camellia.c
671
u32 il, ir, t0, t1, w0, w1; /* temporary variables */
crypto/krb5/src/lib/crypto/builtin/camellia/camellia.c
672
u32 kw4l, kw4r, dw, tl, tr;
crypto/krb5/src/lib/crypto/builtin/camellia/camellia.c
673
u32 subL[34];
crypto/krb5/src/lib/crypto/builtin/camellia/camellia.c
674
u32 subR[34];
crypto/krb5/src/lib/crypto/builtin/camellia/camellia.c
71
(((u32)(pt)[0] << 24) \
crypto/krb5/src/lib/crypto/builtin/camellia/camellia.c
72
^ ((u32)(pt)[1] << 16) \
crypto/krb5/src/lib/crypto/builtin/camellia/camellia.c
73
^ ((u32)(pt)[2] << 8) \
crypto/krb5/src/lib/crypto/builtin/camellia/camellia.c
74
^ ((u32)(pt)[3]))
crypto/krb5/src/lib/crypto/builtin/camellia/camellia.c
954
camellia_setup192(const unsigned char *key, u32 *subkey)
crypto/krb5/src/lib/crypto/builtin/camellia/camellia.c
957
u32 krll, krlr, krrl,krrr;
crypto/krb5/src/lib/crypto/builtin/camellia/camellia.c
977
camellia_encrypt128(const u32 *subkey, u32 *io)
crypto/krb5/src/lib/crypto/builtin/camellia/camellia.c
979
u32 il, ir, t0, t1;
crypto/krb5/src/lib/crypto/builtin/camellia/camellia.h
63
void camellia_setup128(const unsigned char *key, u32 *subkey);
crypto/krb5/src/lib/crypto/builtin/camellia/camellia.h
64
void camellia_setup192(const unsigned char *key, u32 *subkey);
crypto/krb5/src/lib/crypto/builtin/camellia/camellia.h
65
void camellia_setup256(const unsigned char *key, u32 *subkey);
crypto/krb5/src/lib/crypto/builtin/camellia/camellia.h
66
void camellia_encrypt128(const u32 *subkey, u32 *io);
crypto/krb5/src/lib/crypto/builtin/camellia/camellia.h
67
void camellia_decrypt128(const u32 *subkey, u32 *io);
crypto/krb5/src/lib/crypto/builtin/camellia/camellia.h
68
void camellia_encrypt256(const u32 *subkey, u32 *io);
crypto/krb5/src/lib/crypto/builtin/camellia/camellia.h
69
void camellia_decrypt256(const u32 *subkey, u32 *io);
crypto/libecc/include/libecc/curves/aff_pt.h
118
ATTRIBUTE_WARN_UNUSED_RET int aff_pt_montgomery_export_to_buf(aff_pt_montgomery_src_t pt, u8 *pt_buf, u32 pt_buf_len);
crypto/libecc/include/libecc/curves/aff_pt.h
51
ATTRIBUTE_WARN_UNUSED_RET int aff_pt_export_to_buf(aff_pt_src_t pt, u8 *pt_buf, u32 pt_buf_len);
crypto/libecc/include/libecc/curves/aff_pt.h
77
ATTRIBUTE_WARN_UNUSED_RET int aff_pt_edwards_export_to_buf(aff_pt_edwards_src_t pt, u8 *pt_buf, u32 pt_buf_len);
crypto/libecc/include/libecc/curves/prj_pt.h
72
ATTRIBUTE_WARN_UNUSED_RET int prj_pt_export_to_buf(prj_pt_src_t pt, u8 *pt_buf, u32 pt_buf_len);
crypto/libecc/include/libecc/curves/prj_pt.h
73
ATTRIBUTE_WARN_UNUSED_RET int prj_pt_export_to_aff_buf(prj_pt_src_t pt, u8 *pt_buf, u32 pt_buf_len);
crypto/libecc/include/libecc/hash/bash224.h
57
ATTRIBUTE_WARN_UNUSED_RET int bash224_update(bash224_context *ctx, const u8 *input, u32 ilen);
crypto/libecc/include/libecc/hash/bash224.h
59
ATTRIBUTE_WARN_UNUSED_RET int bash224_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/include/libecc/hash/bash224.h
61
ATTRIBUTE_WARN_UNUSED_RET int bash224(const u8 *input, u32 ilen, u8 output[BASH224_DIGEST_SIZE]);
crypto/libecc/include/libecc/hash/bash256.h
57
ATTRIBUTE_WARN_UNUSED_RET int bash256_update(bash256_context *ctx, const u8 *input, u32 ilen);
crypto/libecc/include/libecc/hash/bash256.h
59
ATTRIBUTE_WARN_UNUSED_RET int bash256_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/include/libecc/hash/bash256.h
61
ATTRIBUTE_WARN_UNUSED_RET int bash256(const u8 *input, u32 ilen, u8 output[BASH256_DIGEST_SIZE]);
crypto/libecc/include/libecc/hash/bash384.h
57
ATTRIBUTE_WARN_UNUSED_RET int bash384_update(bash384_context *ctx, const u8 *input, u32 ilen);
crypto/libecc/include/libecc/hash/bash384.h
59
ATTRIBUTE_WARN_UNUSED_RET int bash384_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/include/libecc/hash/bash384.h
61
ATTRIBUTE_WARN_UNUSED_RET int bash384(const u8 *input, u32 ilen, u8 output[BASH384_DIGEST_SIZE]);
crypto/libecc/include/libecc/hash/bash512.h
57
ATTRIBUTE_WARN_UNUSED_RET int bash512_update(bash512_context *ctx, const u8 *input, u32 ilen);
crypto/libecc/include/libecc/hash/bash512.h
59
ATTRIBUTE_WARN_UNUSED_RET int bash512_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/include/libecc/hash/bash512.h
61
ATTRIBUTE_WARN_UNUSED_RET int bash512(const u8 *input, u32 ilen, u8 output[BASH512_DIGEST_SIZE]);
crypto/libecc/include/libecc/hash/belt-hash.h
152
ATTRIBUTE_WARN_UNUSED_RET int belt_init(const u8 *k, u32 k_len, u8 ks[BELT_KEY_SCHED_LEN]);
crypto/libecc/include/libecc/hash/belt-hash.h
157
ATTRIBUTE_WARN_UNUSED_RET int belt_hash_update(belt_hash_context *ctx, const u8 *input, u32 ilen);
crypto/libecc/include/libecc/hash/belt-hash.h
159
ATTRIBUTE_WARN_UNUSED_RET int belt_hash_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/include/libecc/hash/belt-hash.h
161
ATTRIBUTE_WARN_UNUSED_RET int belt_hash(const u8 *input, u32 ilen, u8 output[BELT_HASH_DIGEST_SIZE]);
crypto/libecc/include/libecc/hash/belt-hash.h
26
(n) = ( ((u32) (b)[(i) + 3]) << 24 ) \
crypto/libecc/include/libecc/hash/belt-hash.h
27
| ( ((u32) (b)[(i) + 2]) << 16 ) \
crypto/libecc/include/libecc/hash/belt-hash.h
28
| ( ((u32) (b)[(i) + 1]) << 8 ) \
crypto/libecc/include/libecc/hash/belt-hash.h
29
| ( ((u32) (b)[(i) ]) ); \
crypto/libecc/include/libecc/hash/hash_algs.h
117
const unsigned char *chunk, u32 chunklen);
crypto/libecc/include/libecc/hash/hash_algs.h
120
const u32 *ilens, unsigned char *output);
crypto/libecc/include/libecc/hash/hash_algs.h
128
ATTRIBUTE_WARN_UNUSED_RET int _sha224_update(hash_context * hctx, const unsigned char *chunk, u32 chunklen);
crypto/libecc/include/libecc/hash/hash_algs.h
133
ATTRIBUTE_WARN_UNUSED_RET int _sha256_update(hash_context * hctx, const unsigned char *chunk, u32 chunklen);
crypto/libecc/include/libecc/hash/hash_algs.h
138
ATTRIBUTE_WARN_UNUSED_RET int _sha384_update(hash_context * hctx, const unsigned char *chunk, u32 chunklen);
crypto/libecc/include/libecc/hash/hash_algs.h
143
ATTRIBUTE_WARN_UNUSED_RET int _sha512_update(hash_context * hctx, const unsigned char *chunk, u32 chunklen);
crypto/libecc/include/libecc/hash/hash_algs.h
148
ATTRIBUTE_WARN_UNUSED_RET int _sha512_224_update(hash_context * hctx, const unsigned char *chunk, u32 chunklen);
crypto/libecc/include/libecc/hash/hash_algs.h
153
ATTRIBUTE_WARN_UNUSED_RET int _sha512_256_update(hash_context * hctx, const unsigned char *chunk, u32 chunklen);
crypto/libecc/include/libecc/hash/hash_algs.h
158
ATTRIBUTE_WARN_UNUSED_RET int _sha3_224_update(hash_context * hctx, const unsigned char *chunk, u32 chunklen);
crypto/libecc/include/libecc/hash/hash_algs.h
163
ATTRIBUTE_WARN_UNUSED_RET int _sha3_256_update(hash_context * hctx, const unsigned char *chunk, u32 chunklen);
crypto/libecc/include/libecc/hash/hash_algs.h
168
ATTRIBUTE_WARN_UNUSED_RET int _sha3_384_update(hash_context * hctx, const unsigned char *chunk, u32 chunklen);
crypto/libecc/include/libecc/hash/hash_algs.h
173
ATTRIBUTE_WARN_UNUSED_RET int _sha3_512_update(hash_context * hctx, const unsigned char *chunk, u32 chunklen);
crypto/libecc/include/libecc/hash/hash_algs.h
178
ATTRIBUTE_WARN_UNUSED_RET int _sm3_update(hash_context * hctx, const unsigned char *chunk, u32 chunklen);
crypto/libecc/include/libecc/hash/hash_algs.h
183
ATTRIBUTE_WARN_UNUSED_RET int _shake256_update(hash_context * hctx, const unsigned char *chunk, u32 chunklen);
crypto/libecc/include/libecc/hash/hash_algs.h
188
ATTRIBUTE_WARN_UNUSED_RET int _streebog256_update(hash_context * hctx, const unsigned char *chunk, u32 chunklen);
crypto/libecc/include/libecc/hash/hash_algs.h
193
ATTRIBUTE_WARN_UNUSED_RET int _streebog512_update(hash_context * hctx, const unsigned char *chunk, u32 chunklen);
crypto/libecc/include/libecc/hash/hash_algs.h
198
ATTRIBUTE_WARN_UNUSED_RET int _ripemd160_update(hash_context * hctx, const unsigned char *chunk, u32 chunklen);
crypto/libecc/include/libecc/hash/hash_algs.h
203
ATTRIBUTE_WARN_UNUSED_RET int _belt_hash_update(hash_context * hctx, const unsigned char *chunk, u32 chunklen);
crypto/libecc/include/libecc/hash/hash_algs.h
208
ATTRIBUTE_WARN_UNUSED_RET int _bash224_update(hash_context * hctx, const unsigned char *chunk, u32 chunklen);
crypto/libecc/include/libecc/hash/hash_algs.h
213
ATTRIBUTE_WARN_UNUSED_RET int _bash256_update(hash_context * hctx, const unsigned char *chunk, u32 chunklen);
crypto/libecc/include/libecc/hash/hash_algs.h
218
ATTRIBUTE_WARN_UNUSED_RET int _bash384_update(hash_context * hctx, const unsigned char *chunk, u32 chunklen);
crypto/libecc/include/libecc/hash/hash_algs.h
223
ATTRIBUTE_WARN_UNUSED_RET int _bash512_update(hash_context * hctx, const unsigned char *chunk, u32 chunklen);
crypto/libecc/include/libecc/hash/hmac.h
26
ATTRIBUTE_WARN_UNUSED_RET int hmac_init(hmac_context *ctx, const u8 *hmackey, u32 hmackey_len, hash_alg_type hash_type);
crypto/libecc/include/libecc/hash/hmac.h
28
ATTRIBUTE_WARN_UNUSED_RET int hmac_update(hmac_context *ctx, const u8 *input, u32 ilen);
crypto/libecc/include/libecc/hash/hmac.h
32
ATTRIBUTE_WARN_UNUSED_RET int hmac(const u8 *hmackey, u32 hmackey_len, hash_alg_type hash_type, const u8 *input, u32 ilen, u8 *output, u8 *outlen);
crypto/libecc/include/libecc/hash/hmac.h
34
ATTRIBUTE_WARN_UNUSED_RET int hmac_scattered(const u8 *hmackey, u32 hmackey_len, hash_alg_type hash_type, const u8 **inputs, const u32 *ilens, u8 *output, u8 *outlen);
crypto/libecc/include/libecc/hash/ripemd160.h
58
u32 ripemd160_state[RIPEMD160_STATE_SIZE];
crypto/libecc/include/libecc/hash/ripemd160.h
66
ATTRIBUTE_WARN_UNUSED_RET int ripemd160_update(ripemd160_context *ctx, const u8 *input, u32 ilen);
crypto/libecc/include/libecc/hash/ripemd160.h
68
ATTRIBUTE_WARN_UNUSED_RET int ripemd160_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/include/libecc/hash/ripemd160.h
70
ATTRIBUTE_WARN_UNUSED_RET int ripemd160(const u8 *input, u32 ilen, u8 output[RIPEMD160_DIGEST_SIZE]);
crypto/libecc/include/libecc/hash/sha2.h
128
#define SHR_SHA256(x, n) (((u32)(x)) >> (n))
crypto/libecc/include/libecc/hash/sha2.h
129
#define ROTR_SHA256(x, n) ((((u32)(x)) >> (n)) | (((u32)(x)) << (32-(n))))
crypto/libecc/include/libecc/hash/sha2.h
135
SHA2CORE(a, b, c, d, e, f, g, h, w, k, u32, SHA256)
crypto/libecc/include/libecc/hash/sha2.h
137
static const u32 K_SHA256[] = {
crypto/libecc/include/libecc/hash/sha2.h
55
(n) = ( ((u32) (b)[(i) ]) << 24 ) \
crypto/libecc/include/libecc/hash/sha2.h
56
| ( ((u32) (b)[(i) + 1]) << 16 ) \
crypto/libecc/include/libecc/hash/sha2.h
57
| ( ((u32) (b)[(i) + 2]) << 8 ) \
crypto/libecc/include/libecc/hash/sha2.h
58
| ( ((u32) (b)[(i) + 3]) ); \
crypto/libecc/include/libecc/hash/sha224.h
64
u32 sha224_state[SHA224_STATE_SIZE];
crypto/libecc/include/libecc/hash/sha224.h
72
ATTRIBUTE_WARN_UNUSED_RET int sha224_update(sha224_context *ctx, const u8 *input, u32 ilen);
crypto/libecc/include/libecc/hash/sha224.h
74
ATTRIBUTE_WARN_UNUSED_RET int sha224_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/include/libecc/hash/sha224.h
76
ATTRIBUTE_WARN_UNUSED_RET int sha224(const u8 *input, u32 ilen, u8 output[SHA224_DIGEST_SIZE]);
crypto/libecc/include/libecc/hash/sha256.h
64
u32 sha256_state[SHA256_STATE_SIZE];
crypto/libecc/include/libecc/hash/sha256.h
72
ATTRIBUTE_WARN_UNUSED_RET int sha256_update(sha256_context *ctx, const u8 *input, u32 ilen);
crypto/libecc/include/libecc/hash/sha256.h
74
ATTRIBUTE_WARN_UNUSED_RET int sha256_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/include/libecc/hash/sha256.h
76
ATTRIBUTE_WARN_UNUSED_RET int sha256(const u8 *input, u32 ilen, u8 output[SHA256_DIGEST_SIZE]);
crypto/libecc/include/libecc/hash/sha3-224.h
62
ATTRIBUTE_WARN_UNUSED_RET int sha3_224_update(sha3_224_context *ctx, const u8 *input, u32 ilen);
crypto/libecc/include/libecc/hash/sha3-224.h
64
ATTRIBUTE_WARN_UNUSED_RET int sha3_224_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/include/libecc/hash/sha3-224.h
66
ATTRIBUTE_WARN_UNUSED_RET int sha3_224(const u8 *input, u32 ilen, u8 output[SHA3_224_DIGEST_SIZE]);
crypto/libecc/include/libecc/hash/sha3-256.h
62
ATTRIBUTE_WARN_UNUSED_RET int sha3_256_update(sha3_256_context *ctx, const u8 *input, u32 ilen);
crypto/libecc/include/libecc/hash/sha3-256.h
64
ATTRIBUTE_WARN_UNUSED_RET int sha3_256_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/include/libecc/hash/sha3-256.h
66
ATTRIBUTE_WARN_UNUSED_RET int sha3_256(const u8 *input, u32 ilen, u8 output[SHA3_256_DIGEST_SIZE]);
crypto/libecc/include/libecc/hash/sha3-384.h
62
ATTRIBUTE_WARN_UNUSED_RET int sha3_384_update(sha3_384_context *ctx, const u8 *input, u32 ilen);
crypto/libecc/include/libecc/hash/sha3-384.h
64
ATTRIBUTE_WARN_UNUSED_RET int sha3_384_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/include/libecc/hash/sha3-384.h
66
ATTRIBUTE_WARN_UNUSED_RET int sha3_384(const u8 *input, u32 ilen, u8 output[SHA3_384_DIGEST_SIZE]);
crypto/libecc/include/libecc/hash/sha3-512.h
62
ATTRIBUTE_WARN_UNUSED_RET int sha3_512_update(sha3_512_context *ctx, const u8 *input, u32 ilen);
crypto/libecc/include/libecc/hash/sha3-512.h
64
ATTRIBUTE_WARN_UNUSED_RET int sha3_512_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/include/libecc/hash/sha3-512.h
66
ATTRIBUTE_WARN_UNUSED_RET int sha3_512(const u8 *input, u32 ilen, u8 output[SHA3_512_DIGEST_SIZE]);
crypto/libecc/include/libecc/hash/sha3.h
43
ATTRIBUTE_WARN_UNUSED_RET int _sha3_update(sha3_context *ctx, const u8 *buf, u32 buflen);
crypto/libecc/include/libecc/hash/sha384.h
72
ATTRIBUTE_WARN_UNUSED_RET int sha384_update(sha384_context *ctx, const u8 *input, u32 ilen);
crypto/libecc/include/libecc/hash/sha384.h
74
ATTRIBUTE_WARN_UNUSED_RET int sha384_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/include/libecc/hash/sha384.h
76
ATTRIBUTE_WARN_UNUSED_RET int sha384(const u8 *input, u32 ilen, u8 output[SHA384_DIGEST_SIZE]);
crypto/libecc/include/libecc/hash/sha512-224.h
64
ATTRIBUTE_WARN_UNUSED_RET int sha512_224_update(sha512_224_context *ctx, const u8 *input, u32 ilen);
crypto/libecc/include/libecc/hash/sha512-224.h
66
ATTRIBUTE_WARN_UNUSED_RET int sha512_224_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/include/libecc/hash/sha512-224.h
68
ATTRIBUTE_WARN_UNUSED_RET int sha512_224(const u8 *input, u32 ilen, u8 output[SHA512_224_DIGEST_SIZE]);
crypto/libecc/include/libecc/hash/sha512-256.h
64
ATTRIBUTE_WARN_UNUSED_RET int sha512_256_update(sha512_256_context *ctx, const u8 *input, u32 ilen);
crypto/libecc/include/libecc/hash/sha512-256.h
66
ATTRIBUTE_WARN_UNUSED_RET int sha512_256_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/include/libecc/hash/sha512-256.h
68
ATTRIBUTE_WARN_UNUSED_RET int sha512_256(const u8 *input, u32 ilen, u8 output[SHA512_256_DIGEST_SIZE]);
crypto/libecc/include/libecc/hash/sha512.h
64
ATTRIBUTE_WARN_UNUSED_RET int sha512_update(sha512_context *ctx, const u8 *input, u32 ilen);
crypto/libecc/include/libecc/hash/sha512.h
66
ATTRIBUTE_WARN_UNUSED_RET int sha512_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/include/libecc/hash/sha512.h
68
ATTRIBUTE_WARN_UNUSED_RET int sha512(const u8 *input, u32 ilen, u8 output[SHA512_DIGEST_SIZE]);
crypto/libecc/include/libecc/hash/sha512_core.h
42
ATTRIBUTE_WARN_UNUSED_RET int sha512_core_update(sha512_core_context *ctx, const u8 *input, u32 ilen);
crypto/libecc/include/libecc/hash/sha512_core.h
43
ATTRIBUTE_WARN_UNUSED_RET int sha512_core_final(sha512_core_context *ctx, u8 *output, u32 output_size);
crypto/libecc/include/libecc/hash/shake.h
38
ATTRIBUTE_WARN_UNUSED_RET int _shake_update(shake_context *ctx, const u8 *buf, u32 buflen);
crypto/libecc/include/libecc/hash/shake256.h
61
ATTRIBUTE_WARN_UNUSED_RET int shake256_update(shake256_context *ctx, const u8 *input, u32 ilen);
crypto/libecc/include/libecc/hash/shake256.h
63
ATTRIBUTE_WARN_UNUSED_RET int shake256_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/include/libecc/hash/shake256.h
65
ATTRIBUTE_WARN_UNUSED_RET int shake256(const u8 *input, u32 ilen, u8 output[SHAKE256_DIGEST_SIZE]);
crypto/libecc/include/libecc/hash/sm3.h
58
u32 sm3_state[SM3_STATE_SIZE];
crypto/libecc/include/libecc/hash/sm3.h
66
ATTRIBUTE_WARN_UNUSED_RET int sm3_update(sm3_context *ctx, const u8 *input, u32 ilen);
crypto/libecc/include/libecc/hash/sm3.h
68
ATTRIBUTE_WARN_UNUSED_RET int sm3_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/include/libecc/hash/sm3.h
70
ATTRIBUTE_WARN_UNUSED_RET int sm3(const u8 *input, u32 ilen, u8 output[SM3_DIGEST_SIZE]);
crypto/libecc/include/libecc/hash/streebog256.h
58
ATTRIBUTE_WARN_UNUSED_RET int streebog256_update(streebog256_context *ctx, const u8 *input, u32 ilen);
crypto/libecc/include/libecc/hash/streebog256.h
60
ATTRIBUTE_WARN_UNUSED_RET int streebog256_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/include/libecc/hash/streebog256.h
62
ATTRIBUTE_WARN_UNUSED_RET int streebog256(const u8 *input, u32 ilen, u8 output[STREEBOG256_DIGEST_SIZE]);
crypto/libecc/include/libecc/hash/streebog512.h
58
ATTRIBUTE_WARN_UNUSED_RET int streebog512_update(streebog512_context *ctx, const u8 *input, u32 ilen);
crypto/libecc/include/libecc/hash/streebog512.h
60
ATTRIBUTE_WARN_UNUSED_RET int streebog512_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/include/libecc/hash/streebog512.h
62
ATTRIBUTE_WARN_UNUSED_RET int streebog512(const u8 *input, u32 ilen, u8 output[STREEBOG512_DIGEST_SIZE]);
crypto/libecc/include/libecc/sig/bign.h
27
const u8 *chunk, u32 chunklen);
crypto/libecc/include/libecc/sig/bign.h
35
const u8 *chunk, u32 chunklen);
crypto/libecc/include/libecc/sig/bign_common.h
78
const u8 *chunk, u32 chunklen, ec_alg_type key_type);
crypto/libecc/include/libecc/sig/bign_common.h
96
const u8 *chunk, u32 chunklen, ec_alg_type key_type);
crypto/libecc/include/libecc/sig/bip0340.h
48
const u8 *m, u32 mlen, int (*rand) (nn_t out, nn_src_t q),
crypto/libecc/include/libecc/sig/bip0340.h
63
const u8 *chunk, u32 chunklen);
crypto/libecc/include/libecc/sig/bip0340.h
68
const u8 **m, const u32 *m_len, u32 num, ec_alg_type sig_type,
crypto/libecc/include/libecc/sig/bip0340.h
70
verify_batch_scratch_pad *scratch_pad_area, u32 *scratch_pad_area_len);
crypto/libecc/include/libecc/sig/dbign.h
27
const u8 *chunk, u32 chunklen);
crypto/libecc/include/libecc/sig/dbign.h
35
const u8 *chunk, u32 chunklen);
crypto/libecc/include/libecc/sig/decdsa.h
32
const u8 *chunk, u32 chunklen);
crypto/libecc/include/libecc/sig/decdsa.h
40
const u8 *chunk, u32 chunklen);
crypto/libecc/include/libecc/sig/ec_key.h
221
u32 index;
crypto/libecc/include/libecc/sig/ecdsa.h
32
const u8 *chunk, u32 chunklen);
crypto/libecc/include/libecc/sig/ecdsa.h
40
const u8 *chunk, u32 chunklen);
crypto/libecc/include/libecc/sig/ecdsa_common.h
62
const u8 *chunk, u32 chunklen, ec_alg_type key_type);
crypto/libecc/include/libecc/sig/ecdsa_common.h
79
const u8 *chunk, u32 chunklen, ec_alg_type key_type);
crypto/libecc/include/libecc/sig/ecfsdsa.h
65
const u8 *chunk, u32 chunklen);
crypto/libecc/include/libecc/sig/ecfsdsa.h
82
const u8 *chunk, u32 chunklen);
crypto/libecc/include/libecc/sig/ecfsdsa.h
88
const u8 **m, const u32 *m_len, u32 num, ec_alg_type sig_type,
crypto/libecc/include/libecc/sig/ecfsdsa.h
90
verify_batch_scratch_pad *scratch_pad_area, u32 *scratch_pad_area_len);
crypto/libecc/include/libecc/sig/ecgdsa.h
63
const u8 *chunk, u32 chunklen);
crypto/libecc/include/libecc/sig/ecgdsa.h
80
const u8 *chunk, u32 chunklen);
crypto/libecc/include/libecc/sig/eckcdsa.h
62
const u8 *chunk, u32 chunklen);
crypto/libecc/include/libecc/sig/eckcdsa.h
79
const u8 *chunk, u32 chunklen);
crypto/libecc/include/libecc/sig/ecosdsa.h
56
const u8 *chunk, u32 chunklen);
crypto/libecc/include/libecc/sig/ecosdsa.h
64
const u8 *chunk, u32 chunklen);
crypto/libecc/include/libecc/sig/ecrdsa.h
63
const u8 *chunk, u32 chunklen);
crypto/libecc/include/libecc/sig/ecrdsa.h
80
const u8 *chunk, u32 chunklen);
crypto/libecc/include/libecc/sig/ecsdsa.h
61
const u8 *chunk, u32 chunklen);
crypto/libecc/include/libecc/sig/ecsdsa.h
76
const u8 *chunk, u32 chunklen);
crypto/libecc/include/libecc/sig/ecsdsa_common.h
40
const u8 *chunk, u32 chunklen);
crypto/libecc/include/libecc/sig/ecsdsa_common.h
47
const u8 *chunk, u32 chunklen);
crypto/libecc/include/libecc/sig/eddsa.h
110
const u8 *chunk, u32 chunklen);
crypto/libecc/include/libecc/sig/eddsa.h
129
const u8 **m, const u32 *m_len, u32 num, ec_alg_type sig_type,
crypto/libecc/include/libecc/sig/eddsa.h
131
verify_batch_scratch_pad *scratch_pad_area, u32 *scratch_pad_area_len);
crypto/libecc/include/libecc/sig/eddsa.h
86
const u8 *chunk, u32 chunklen);
crypto/libecc/include/libecc/sig/eddsa.h
92
const u8 *m, u32 mlen, int (*rand) (nn_t out, nn_src_t q),
crypto/libecc/include/libecc/sig/sig_algs.h
103
ATTRIBUTE_WARN_UNUSED_RET int ec_structured_sig_export_to_buf(const u8 *sig, u32 siglen,
crypto/libecc/include/libecc/sig/sig_algs.h
104
u8 *out_buf, u32 outlen,
crypto/libecc/include/libecc/sig/sig_algs.h
111
u32 num, bitcnt_t bits);
crypto/libecc/include/libecc/sig/sig_algs.h
59
ATTRIBUTE_WARN_UNUSED_RET int ec_sign_update(struct ec_sign_context *ctx, const u8 *chunk, u32 chunklen);
crypto/libecc/include/libecc/sig/sig_algs.h
64
const u8 *m, u32 mlen,
crypto/libecc/include/libecc/sig/sig_algs.h
70
const u8 *m, u32 mlen,
crypto/libecc/include/libecc/sig/sig_algs.h
81
const u8 *chunk, u32 chunklen);
crypto/libecc/include/libecc/sig/sig_algs.h
86
const u8 *m, u32 mlen,
crypto/libecc/include/libecc/sig/sig_algs.h
91
const u8 **m, const u32 *m_len, u32 num, ec_alg_type sig_type,
crypto/libecc/include/libecc/sig/sig_algs.h
93
verify_batch_scratch_pad *scratch_pad_area, u32 *scratch_pad_area_len);
crypto/libecc/include/libecc/sig/sig_algs.h
97
ATTRIBUTE_WARN_UNUSED_RET int ec_structured_sig_import_from_buf(u8 *sig, u32 siglen,
crypto/libecc/include/libecc/sig/sig_algs.h
98
const u8 *out_buf, u32 outlen,
crypto/libecc/include/libecc/sig/sig_algs_internal.h
240
const u8 *m, u32 mlen, int (*rand) (nn_t out, nn_src_t q),
crypto/libecc/include/libecc/sig/sig_algs_internal.h
243
const u8 *m, u32 mlen, ec_alg_type sig_type,
crypto/libecc/include/libecc/sig/sig_algs_internal.h
251
const u8 *chunk, u32 chunklen);
crypto/libecc/include/libecc/sig/sig_algs_internal.h
260
const u8 *chunk, u32 chunklen);
crypto/libecc/include/libecc/sig/sig_algs_internal.h
270
const u8 **m, const u32 *m_len, u32 num, ec_alg_type sig_type,
crypto/libecc/include/libecc/sig/sig_algs_internal.h
272
verify_batch_scratch_pad *scratch_pad_area, u32 *scratch_pad_area_len);
crypto/libecc/include/libecc/sig/sig_algs_internal.h
62
const u8 *chunk, u32 chunklen);
crypto/libecc/include/libecc/sig/sig_algs_internal.h
66
const u8 *m, u32 mlen, int (*rand) (nn_t out, nn_src_t q),
crypto/libecc/include/libecc/sig/sig_algs_internal.h
73
const u8 *chunk, u32 chunklen);
crypto/libecc/include/libecc/sig/sig_algs_internal.h
76
const u8 *m, u32 mlen, ec_alg_type sig_type,
crypto/libecc/include/libecc/sig/sig_algs_internal.h
79
const u8 **m, const u32 *m_len, u32 num, ec_alg_type sig_type,
crypto/libecc/include/libecc/sig/sig_algs_internal.h
81
verify_batch_scratch_pad *scratch_pad_area, u32 *scratch_pad_area_len);
crypto/libecc/include/libecc/sig/sm2.h
61
const u8 *chunk, u32 chunklen);
crypto/libecc/include/libecc/sig/sm2.h
78
const u8 *chunk, u32 chunklen);
crypto/libecc/include/libecc/utils/utils.h
169
ATTRIBUTE_WARN_UNUSED_RET int are_equal(const void *a, const void *b, u32 len, int *check);
crypto/libecc/include/libecc/utils/utils.h
170
ATTRIBUTE_WARN_UNUSED_RET int local_memcpy(void *dst, const void *src, u32 n);
crypto/libecc/include/libecc/utils/utils.h
171
ATTRIBUTE_WARN_UNUSED_RET int local_memset(void *v, u8 c, u32 n);
crypto/libecc/include/libecc/utils/utils.h
173
ATTRIBUTE_WARN_UNUSED_RET int are_str_equal_nlen(const char *s1, const char *s2, u32 maxlen, int *check);
crypto/libecc/include/libecc/utils/utils.h
174
ATTRIBUTE_WARN_UNUSED_RET int local_strlen(const char *s, u32 *len);
crypto/libecc/include/libecc/utils/utils.h
175
ATTRIBUTE_WARN_UNUSED_RET int local_strnlen(const char *s, u32 maxlen, u32 *len);
crypto/libecc/include/libecc/utils/utils.h
176
ATTRIBUTE_WARN_UNUSED_RET int local_strncpy(char *dst, const char *src, u32 n);
crypto/libecc/include/libecc/utils/utils.h
177
ATTRIBUTE_WARN_UNUSED_RET int local_strncat(char *dest, const char *src, u32 n);
crypto/libecc/src/arithmetic_tests/arithmetic_tests.c
72
static int nn_import_from_hexbuf(nn_t out_nn, const char *hbuf, u32 hbuflen)
crypto/libecc/src/arithmetic_tests/arithmetic_tests.c
76
u32 wlen;
crypto/libecc/src/arithmetic_tests/arithmetic_tests.c
77
u32 k;
crypto/libecc/src/curves/aff_pt.c
325
int aff_pt_export_to_buf(aff_pt_src_t pt, u8 *pt_buf, u32 pt_buf_len)
crypto/libecc/src/curves/aff_pt_edwards.c
273
u8 *pt_buf, u32 pt_buf_len)
crypto/libecc/src/curves/aff_pt_montgomery.c
258
int aff_pt_montgomery_export_to_buf(aff_pt_montgomery_src_t pt, u8 *pt_buf, u32 pt_buf_len)
crypto/libecc/src/curves/curves.c
135
u32 len;
crypto/libecc/src/curves/curves.c
30
u32 len;
crypto/libecc/src/curves/curves.c
88
u32 len;
crypto/libecc/src/curves/prj_pt.c
562
int prj_pt_export_to_buf(prj_pt_src_t pt, u8 *pt_buf, u32 pt_buf_len)
crypto/libecc/src/curves/prj_pt.c
600
int prj_pt_export_to_aff_buf(prj_pt_src_t pt, u8 *pt_buf, u32 pt_buf_len)
crypto/libecc/src/examples/basic/curve_basic_examples.c
121
u32 len;
crypto/libecc/src/examples/basic/curve_ecdh.c
180
(u32)(2 * BYTECEIL(curve_params.ec_fp.p_bitlen))); EG(ret, err);
crypto/libecc/src/examples/basic/curve_ecdh.c
99
u32 len;
crypto/libecc/src/examples/hash/gostr34_11_94.c
139
u32 R_i, L_i, R_i1 = 0, L_i1 = 0;
crypto/libecc/src/examples/hash/gostr34_11_94.c
149
u32 sk;
crypto/libecc/src/examples/hash/gostr34_11_94.c
161
R_i1 = (u32)(R_i + sk); /* add round key */
crypto/libecc/src/examples/hash/gostr34_11_94.c
174
R_i1 = (u32)(ROTL_GOSTR34_11_94(R_i1, 11) ^ L_i);
crypto/libecc/src/examples/hash/gostr34_11_94.c
447
ATTRIBUTE_WARN_UNUSED_RET int gostr34_11_94_update(gostr34_11_94_context *ctx, const u8 *input, u32 ilen)
crypto/libecc/src/examples/hash/gostr34_11_94.c
450
u32 remain_ilen = ilen;
crypto/libecc/src/examples/hash/gostr34_11_94.c
570
ATTRIBUTE_WARN_UNUSED_RET int gostr34_11_94_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/src/examples/hash/gostr34_11_94.c
592
ATTRIBUTE_WARN_UNUSED_RET int gostr34_11_94_scattered_norm(const u8 **inputs, const u32 *ilens,
crypto/libecc/src/examples/hash/gostr34_11_94.c
598
ATTRIBUTE_WARN_UNUSED_RET int gostr34_11_94_scattered_rfc4357(const u8 **inputs, const u32 *ilens,
crypto/libecc/src/examples/hash/gostr34_11_94.c
609
ATTRIBUTE_WARN_UNUSED_RET int gostr34_11_94(const u8 *input, u32 ilen, u8 output[GOSTR34_11_94_DIGEST_SIZE], gostr34_11_94_type type)
crypto/libecc/src/examples/hash/gostr34_11_94.c
623
ATTRIBUTE_WARN_UNUSED_RET int gostr34_11_94_norm(const u8 *input, u32 ilen, u8 output[GOSTR34_11_94_DIGEST_SIZE])
crypto/libecc/src/examples/hash/gostr34_11_94.c
628
ATTRIBUTE_WARN_UNUSED_RET int gostr34_11_94_rfc4357(const u8 *input, u32 ilen, u8 output[GOSTR34_11_94_DIGEST_SIZE])
crypto/libecc/src/examples/hash/gostr34_11_94.h
129
#define ROTL_GOSTR34_11_94(x, n) ((((u32)(x)) << (n)) | (((u32)(x)) >> (32-(n))))
crypto/libecc/src/examples/hash/gostr34_11_94.h
163
ATTRIBUTE_WARN_UNUSED_RET int gostr34_11_94_update(gostr34_11_94_context *ctx, const u8 *input, u32 ilen);
crypto/libecc/src/examples/hash/gostr34_11_94.h
174
ATTRIBUTE_WARN_UNUSED_RET int gostr34_11_94_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/src/examples/hash/gostr34_11_94.h
177
ATTRIBUTE_WARN_UNUSED_RET int gostr34_11_94_scattered_norm(const u8 **inputs, const u32 *ilens,
crypto/libecc/src/examples/hash/gostr34_11_94.h
180
ATTRIBUTE_WARN_UNUSED_RET int gostr34_11_94_scattered_rfc4357(const u8 **inputs, const u32 *ilens,
crypto/libecc/src/examples/hash/gostr34_11_94.h
187
ATTRIBUTE_WARN_UNUSED_RET int gostr34_11_94(const u8 *input, u32 ilen, u8 output[GOSTR34_11_94_DIGEST_SIZE], gostr34_11_94_type type);
crypto/libecc/src/examples/hash/gostr34_11_94.h
189
ATTRIBUTE_WARN_UNUSED_RET int gostr34_11_94_norm(const u8 *input, u32 ilen, u8 output[GOSTR34_11_94_DIGEST_SIZE]);
crypto/libecc/src/examples/hash/gostr34_11_94.h
191
ATTRIBUTE_WARN_UNUSED_RET int gostr34_11_94_rfc4357(const u8 *input, u32 ilen, u8 output[GOSTR34_11_94_DIGEST_SIZE]);
crypto/libecc/src/examples/hash/gostr34_11_94.h
24
(n) = ( ((u32) (b)[(i) ]) << 24 ) \
crypto/libecc/src/examples/hash/gostr34_11_94.h
25
| ( ((u32) (b)[(i) + 1]) << 16 ) \
crypto/libecc/src/examples/hash/gostr34_11_94.h
26
| ( ((u32) (b)[(i) + 2]) << 8 ) \
crypto/libecc/src/examples/hash/gostr34_11_94.h
27
| ( ((u32) (b)[(i) + 3]) ); \
crypto/libecc/src/examples/hash/gostr34_11_94.h
33
(n) = ( ((u32) (b)[(i) + 3]) << 24 ) \
crypto/libecc/src/examples/hash/gostr34_11_94.h
34
| ( ((u32) (b)[(i) + 2]) << 16 ) \
crypto/libecc/src/examples/hash/gostr34_11_94.h
35
| ( ((u32) (b)[(i) + 1]) << 8 ) \
crypto/libecc/src/examples/hash/gostr34_11_94.h
36
| ( ((u32) (b)[(i) ]) ); \
crypto/libecc/src/examples/hash/hash.c
233
int gen_hash_hfunc_scattered(const u8 **input, const u32 *ilen, u8 *digest, gen_hash_alg_type gen_hash_type)
crypto/libecc/src/examples/hash/hash.c
290
int gen_hash_hfunc(const u8 *input, u32 ilen, u8 *digest, gen_hash_alg_type gen_hash_type)
crypto/libecc/src/examples/hash/hash.c
293
u32 ilens[2] = { ilen, 0 };
crypto/libecc/src/examples/hash/hash.c
361
int gen_hash_update(gen_hash_context *ctx, const u8 *chunk, u32 chunklen, gen_hash_alg_type gen_hash_type)
crypto/libecc/src/examples/hash/hash.h
101
ATTRIBUTE_WARN_UNUSED_RET int gen_hash_update(gen_hash_context *ctx, const u8 *chunk, u32 chunklen, gen_hash_alg_type gen_hash_type);
crypto/libecc/src/examples/hash/hash.h
103
ATTRIBUTE_WARN_UNUSED_RET int gen_hash_hfunc(const u8 *input, u32 ilen, u8 *digest, gen_hash_alg_type gen_hash_type);
crypto/libecc/src/examples/hash/hash.h
104
ATTRIBUTE_WARN_UNUSED_RET int gen_hash_hfunc_scattered(const u8 **input, const u32 *ilen, u8 *digest, gen_hash_alg_type gen_hash_type);
crypto/libecc/src/examples/hash/md2.c
104
ATTRIBUTE_WARN_UNUSED_RET int md2_update(md2_context *ctx, const u8 *input, u32 ilen)
crypto/libecc/src/examples/hash/md2.c
107
u32 remain_ilen = ilen;
crypto/libecc/src/examples/hash/md2.c
192
ATTRIBUTE_WARN_UNUSED_RET int md2_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/src/examples/hash/md2.c
217
ATTRIBUTE_WARN_UNUSED_RET int md2(const u8 *input, u32 ilen, u8 output[MD2_DIGEST_SIZE])
crypto/libecc/src/examples/hash/md2.h
43
ATTRIBUTE_WARN_UNUSED_RET int md2_update(md2_context *ctx, const u8 *input, u32 ilen);
crypto/libecc/src/examples/hash/md2.h
54
ATTRIBUTE_WARN_UNUSED_RET int md2_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/src/examples/hash/md2.h
61
ATTRIBUTE_WARN_UNUSED_RET int md2(const u8 *input, u32 ilen, u8 output[MD2_DIGEST_SIZE]);
crypto/libecc/src/examples/hash/md4.c
120
ATTRIBUTE_WARN_UNUSED_RET int md4_update(md4_context *ctx, const u8 *input, u32 ilen)
crypto/libecc/src/examples/hash/md4.c
123
u32 remain_ilen = ilen;
crypto/libecc/src/examples/hash/md4.c
14
static const u32 C1_MD4[13] = {
crypto/libecc/src/examples/hash/md4.c
17
static const u32 C2_MD4[13] = {
crypto/libecc/src/examples/hash/md4.c
20
static const u32 C3_MD4[13] = {
crypto/libecc/src/examples/hash/md4.c
228
ATTRIBUTE_WARN_UNUSED_RET int md4_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/src/examples/hash/md4.c
253
ATTRIBUTE_WARN_UNUSED_RET int md4(const u8 *input, u32 ilen, u8 output[MD4_DIGEST_SIZE])
crypto/libecc/src/examples/hash/md4.c
32
u32 A, B, C, D;
crypto/libecc/src/examples/hash/md4.c
33
u32 W[16];
crypto/libecc/src/examples/hash/md4.c
34
u32 idx;
crypto/libecc/src/examples/hash/md4.h
100
#define ROTL_MD4(x, n) ((((u32)(x)) << (n)) | (((u32)(x)) >> (32-(n))))
crypto/libecc/src/examples/hash/md4.h
106
u32 md4_state[MD4_STATE_SIZE];
crypto/libecc/src/examples/hash/md4.h
116
ATTRIBUTE_WARN_UNUSED_RET int md4_update(md4_context *ctx, const u8 *input, u32 ilen);
crypto/libecc/src/examples/hash/md4.h
127
ATTRIBUTE_WARN_UNUSED_RET int md4_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/src/examples/hash/md4.h
134
ATTRIBUTE_WARN_UNUSED_RET int md4(const u8 *input, u32 ilen, u8 output[MD4_DIGEST_SIZE]);
crypto/libecc/src/examples/hash/md4.h
23
(n) = ( ((u32) (b)[(i) ]) << 24 ) \
crypto/libecc/src/examples/hash/md4.h
24
| ( ((u32) (b)[(i) + 1]) << 16 ) \
crypto/libecc/src/examples/hash/md4.h
25
| ( ((u32) (b)[(i) + 2]) << 8 ) \
crypto/libecc/src/examples/hash/md4.h
26
| ( ((u32) (b)[(i) + 3]) ); \
crypto/libecc/src/examples/hash/md4.h
32
(n) = ( ((u32) (b)[(i) + 3]) << 24 ) \
crypto/libecc/src/examples/hash/md4.h
33
| ( ((u32) (b)[(i) + 2]) << 16 ) \
crypto/libecc/src/examples/hash/md4.h
34
| ( ((u32) (b)[(i) + 1]) << 8 ) \
crypto/libecc/src/examples/hash/md4.h
35
| ( ((u32) (b)[(i) ]) ); \
crypto/libecc/src/examples/hash/md5.c
121
ATTRIBUTE_WARN_UNUSED_RET int md5_update(md5_context *ctx, const u8 *input, u32 ilen)
crypto/libecc/src/examples/hash/md5.c
124
u32 remain_ilen = ilen;
crypto/libecc/src/examples/hash/md5.c
14
static const u32 K_MD5[64] = {
crypto/libecc/src/examples/hash/md5.c
229
ATTRIBUTE_WARN_UNUSED_RET int md5_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/src/examples/hash/md5.c
254
ATTRIBUTE_WARN_UNUSED_RET int md5(const u8 *input, u32 ilen, u8 output[MD5_DIGEST_SIZE])
crypto/libecc/src/examples/hash/md5.c
41
u32 A, B, C, D, tmp;
crypto/libecc/src/examples/hash/md5.c
42
u32 W[16];
crypto/libecc/src/examples/hash/md5.c
60
u32 f, g;
crypto/libecc/src/examples/hash/md5.h
101
#define ROTL_MD5(x, n) ((((u32)(x)) << (n)) | (((u32)(x)) >> (32-(n))))
crypto/libecc/src/examples/hash/md5.h
107
u32 md5_state[MD5_STATE_SIZE];
crypto/libecc/src/examples/hash/md5.h
117
ATTRIBUTE_WARN_UNUSED_RET int md5_update(md5_context *ctx, const u8 *input, u32 ilen);
crypto/libecc/src/examples/hash/md5.h
128
ATTRIBUTE_WARN_UNUSED_RET int md5_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/src/examples/hash/md5.h
135
ATTRIBUTE_WARN_UNUSED_RET int md5(const u8 *input, u32 ilen, u8 output[MD5_DIGEST_SIZE]);
crypto/libecc/src/examples/hash/md5.h
24
(n) = ( ((u32) (b)[(i) ]) << 24 ) \
crypto/libecc/src/examples/hash/md5.h
25
| ( ((u32) (b)[(i) + 1]) << 16 ) \
crypto/libecc/src/examples/hash/md5.h
26
| ( ((u32) (b)[(i) + 2]) << 8 ) \
crypto/libecc/src/examples/hash/md5.h
27
| ( ((u32) (b)[(i) + 3]) ); \
crypto/libecc/src/examples/hash/md5.h
33
(n) = ( ((u32) (b)[(i) + 3]) << 24 ) \
crypto/libecc/src/examples/hash/md5.h
34
| ( ((u32) (b)[(i) + 2]) << 16 ) \
crypto/libecc/src/examples/hash/md5.h
35
| ( ((u32) (b)[(i) + 1]) << 8 ) \
crypto/libecc/src/examples/hash/md5.h
36
| ( ((u32) (b)[(i) ]) ); \
crypto/libecc/src/examples/hash/mdc2.c
113
ATTRIBUTE_WARN_UNUSED_RET int mdc2_update(mdc2_context *ctx, const u8 *input, u32 ilen)
crypto/libecc/src/examples/hash/mdc2.c
116
u32 remain_ilen = ilen;
crypto/libecc/src/examples/hash/mdc2.c
223
ATTRIBUTE_WARN_UNUSED_RET int mdc2_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/src/examples/hash/mdc2.c
252
ATTRIBUTE_WARN_UNUSED_RET int mdc2_scattered_padding1(const u8 **inputs, const u32 *ilens,
crypto/libecc/src/examples/hash/mdc2.c
264
ATTRIBUTE_WARN_UNUSED_RET int mdc2_scattered_padding2(const u8 **inputs, const u32 *ilens,
crypto/libecc/src/examples/hash/mdc2.c
274
ATTRIBUTE_WARN_UNUSED_RET int mdc2(const u8 *input, u32 ilen, u8 output[MDC2_DIGEST_SIZE], padding_type p)
crypto/libecc/src/examples/hash/mdc2.c
293
ATTRIBUTE_WARN_UNUSED_RET int mdc2_padding1(const u8 *input, u32 ilen, u8 output[MDC2_DIGEST_SIZE])
crypto/libecc/src/examples/hash/mdc2.c
302
ATTRIBUTE_WARN_UNUSED_RET int mdc2_padding2(const u8 *input, u32 ilen, u8 output[MDC2_DIGEST_SIZE])
crypto/libecc/src/examples/hash/mdc2.h
100
ATTRIBUTE_WARN_UNUSED_RET int mdc2_padding2(const u8 *input, u32 ilen, u8 output[MDC2_DIGEST_SIZE]);
crypto/libecc/src/examples/hash/mdc2.h
53
ATTRIBUTE_WARN_UNUSED_RET int mdc2_update(mdc2_context *ctx, const u8 *input, u32 ilen);
crypto/libecc/src/examples/hash/mdc2.h
64
ATTRIBUTE_WARN_UNUSED_RET int mdc2_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/src/examples/hash/mdc2.h
73
ATTRIBUTE_WARN_UNUSED_RET int mdc2_scattered_padding1(const u8 **inputs, const u32 *ilens,
crypto/libecc/src/examples/hash/mdc2.h
82
ATTRIBUTE_WARN_UNUSED_RET int mdc2_scattered_padding2(const u8 **inputs, const u32 *ilens,
crypto/libecc/src/examples/hash/mdc2.h
88
ATTRIBUTE_WARN_UNUSED_RET int mdc2(const u8 *input, u32 ilen, u8 output[MDC2_DIGEST_SIZE], padding_type p);
crypto/libecc/src/examples/hash/mdc2.h
94
ATTRIBUTE_WARN_UNUSED_RET int mdc2_padding1(const u8 *input, u32 ilen, u8 output[MDC2_DIGEST_SIZE]);
crypto/libecc/src/examples/hash/sha0.c
119
ATTRIBUTE_WARN_UNUSED_RET int sha0_update(sha0_context *ctx, const u8 *input, u32 ilen)
crypto/libecc/src/examples/hash/sha0.c
122
u32 remain_ilen = ilen;
crypto/libecc/src/examples/hash/sha0.c
13
#define ROTL_SHA0(x, n) ((((u32)(x)) << (n)) | (((u32)(x)) >> (32-(n))))
crypto/libecc/src/examples/hash/sha0.c
228
ATTRIBUTE_WARN_UNUSED_RET int sha0_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/src/examples/hash/sha0.c
253
ATTRIBUTE_WARN_UNUSED_RET int sha0(const u8 *input, u32 ilen, u8 output[SHA0_DIGEST_SIZE])
crypto/libecc/src/examples/hash/sha0.c
29
u32 A_, B_, C_, D_, E_; \
crypto/libecc/src/examples/hash/sha0.c
43
u32 A, B, C, D, E;
crypto/libecc/src/examples/hash/sha0.c
44
u32 W[16];
crypto/libecc/src/examples/hash/sha0.h
105
u32 sha0_state[SHA0_STATE_SIZE];
crypto/libecc/src/examples/hash/sha0.h
115
ATTRIBUTE_WARN_UNUSED_RET int sha0_update(sha0_context *ctx, const u8 *input, u32 ilen);
crypto/libecc/src/examples/hash/sha0.h
126
ATTRIBUTE_WARN_UNUSED_RET int sha0_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/src/examples/hash/sha0.h
133
ATTRIBUTE_WARN_UNUSED_RET int sha0(const u8 *input, u32 ilen, u8 output[SHA0_DIGEST_SIZE]);
crypto/libecc/src/examples/hash/sha0.h
24
(n) = ( ((u32) (b)[(i) ]) << 24 ) \
crypto/libecc/src/examples/hash/sha0.h
25
| ( ((u32) (b)[(i) + 1]) << 16 ) \
crypto/libecc/src/examples/hash/sha0.h
26
| ( ((u32) (b)[(i) + 2]) << 8 ) \
crypto/libecc/src/examples/hash/sha0.h
27
| ( ((u32) (b)[(i) + 3]) ); \
crypto/libecc/src/examples/hash/sha0.h
33
(n) = ( ((u32) (b)[(i) + 3]) << 24 ) \
crypto/libecc/src/examples/hash/sha0.h
34
| ( ((u32) (b)[(i) + 2]) << 16 ) \
crypto/libecc/src/examples/hash/sha0.h
35
| ( ((u32) (b)[(i) + 1]) << 8 ) \
crypto/libecc/src/examples/hash/sha0.h
36
| ( ((u32) (b)[(i) ]) ); \
crypto/libecc/src/examples/hash/sha1.c
119
ATTRIBUTE_WARN_UNUSED_RET int sha1_update(sha1_context *ctx, const u8 *input, u32 ilen)
crypto/libecc/src/examples/hash/sha1.c
122
u32 remain_ilen = ilen;
crypto/libecc/src/examples/hash/sha1.c
13
#define ROTL_SHA1(x, n) ((((u32)(x)) << (n)) | (((u32)(x)) >> (32-(n))))
crypto/libecc/src/examples/hash/sha1.c
228
ATTRIBUTE_WARN_UNUSED_RET int sha1_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/src/examples/hash/sha1.c
253
ATTRIBUTE_WARN_UNUSED_RET int sha1(const u8 *input, u32 ilen, u8 output[SHA1_DIGEST_SIZE])
crypto/libecc/src/examples/hash/sha1.c
29
u32 A_, B_, C_, D_, E_; \
crypto/libecc/src/examples/hash/sha1.c
43
u32 A, B, C, D, E;
crypto/libecc/src/examples/hash/sha1.c
44
u32 W[16];
crypto/libecc/src/examples/hash/sha1.h
105
u32 sha1_state[SHA1_STATE_SIZE];
crypto/libecc/src/examples/hash/sha1.h
115
ATTRIBUTE_WARN_UNUSED_RET int sha1_update(sha1_context *ctx, const u8 *input, u32 ilen);
crypto/libecc/src/examples/hash/sha1.h
126
ATTRIBUTE_WARN_UNUSED_RET int sha1_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/src/examples/hash/sha1.h
133
ATTRIBUTE_WARN_UNUSED_RET int sha1(const u8 *input, u32 ilen, u8 output[SHA1_DIGEST_SIZE]);
crypto/libecc/src/examples/hash/sha1.h
24
(n) = ( ((u32) (b)[(i) ]) << 24 ) \
crypto/libecc/src/examples/hash/sha1.h
25
| ( ((u32) (b)[(i) + 1]) << 16 ) \
crypto/libecc/src/examples/hash/sha1.h
26
| ( ((u32) (b)[(i) + 2]) << 8 ) \
crypto/libecc/src/examples/hash/sha1.h
27
| ( ((u32) (b)[(i) + 3]) ); \
crypto/libecc/src/examples/hash/sha1.h
33
(n) = ( ((u32) (b)[(i) + 3]) << 24 ) \
crypto/libecc/src/examples/hash/sha1.h
34
| ( ((u32) (b)[(i) + 2]) << 16 ) \
crypto/libecc/src/examples/hash/sha1.h
35
| ( ((u32) (b)[(i) + 1]) << 8 ) \
crypto/libecc/src/examples/hash/sha1.h
36
| ( ((u32) (b)[(i) ]) ); \
crypto/libecc/src/examples/hash/tdes.c
187
static const u32 LH[16] =
crypto/libecc/src/examples/hash/tdes.c
195
static const u32 RH[16] =
crypto/libecc/src/examples/hash/tdes.c
20
(n) = ( (u32) (b)[(i) ] << 24 ) \
crypto/libecc/src/examples/hash/tdes.c
204
static inline void des_ip(u32 L[1], u32 R[1])
crypto/libecc/src/examples/hash/tdes.c
206
u32 T;
crypto/libecc/src/examples/hash/tdes.c
21
| ( (u32) (b)[(i) + 1] << 16 ) \
crypto/libecc/src/examples/hash/tdes.c
22
| ( (u32) (b)[(i) + 2] << 8 ) \
crypto/libecc/src/examples/hash/tdes.c
220
static inline void des_fp(u32 L[1], u32 R[1])
crypto/libecc/src/examples/hash/tdes.c
222
u32 T;
crypto/libecc/src/examples/hash/tdes.c
23
| ( (u32) (b)[(i) + 3] ); \
crypto/libecc/src/examples/hash/tdes.c
236
static inline void des_round(u32 L[1], u32 R[1], u64 K)
crypto/libecc/src/examples/hash/tdes.c
238
u32 T;
crypto/libecc/src/examples/hash/tdes.c
239
u32 k1, k2;
crypto/libecc/src/examples/hash/tdes.c
241
k1 = (u32)K;
crypto/libecc/src/examples/hash/tdes.c
242
k2 = (u32)(K >> 32);
crypto/libecc/src/examples/hash/tdes.c
255
u32 i;
crypto/libecc/src/examples/hash/tdes.c
256
u32 C, D, T;
crypto/libecc/src/examples/hash/tdes.c
288
u32 k1, k2;
crypto/libecc/src/examples/hash/tdes.c
343
u32 L, R;
crypto/libecc/src/examples/hash/tdes.c
344
u32 i;
crypto/libecc/src/examples/hash/tdes.c
38
static const u32 SB[8][64] = {
crypto/libecc/src/examples/sig/dsa/dsa.c
194
int dsa_sign(const dsa_priv_key *priv, const u8 *msg, u32 msglen,
crypto/libecc/src/examples/sig/dsa/dsa.c
352
int dsa_verify(const dsa_pub_key *pub, const u8 *msg, u32 msglen,
crypto/libecc/src/examples/sig/dsa/dsa.h
68
ATTRIBUTE_WARN_UNUSED_RET int dsa_sign(const dsa_priv_key *priv, const u8 *msg, u32 msglen,
crypto/libecc/src/examples/sig/dsa/dsa.h
72
ATTRIBUTE_WARN_UNUSED_RET int dsa_verify(const dsa_pub_key *pub, const u8 *msg, u32 msglen,
crypto/libecc/src/examples/sig/gostr34_10_94/gostr34_10_94.c
250
int gostr34_10_94_verify(const gostr34_10_94_pub_key *pub, const u8 *msg, u32 msglen,
crypto/libecc/src/examples/sig/gostr34_10_94/gostr34_10_94.c
86
int gostr34_10_94_sign(const gostr34_10_94_priv_key *priv, const u8 *msg, u32 msglen,
crypto/libecc/src/examples/sig/gostr34_10_94/gostr34_10_94.h
65
ATTRIBUTE_WARN_UNUSED_RET int gostr34_10_94_sign(const gostr34_10_94_priv_key *priv, const u8 *msg, u32 msglen,
crypto/libecc/src/examples/sig/gostr34_10_94/gostr34_10_94.h
69
ATTRIBUTE_WARN_UNUSED_RET int gostr34_10_94_verify(const gostr34_10_94_pub_key *pub, const u8 *msg, u32 msglen,
crypto/libecc/src/examples/sig/kcdsa/kcdsa.c
129
int kcdsa_sign(const kcdsa_priv_key *priv, const u8 *msg, u32 msglen,
crypto/libecc/src/examples/sig/kcdsa/kcdsa.c
345
int kcdsa_verify(const kcdsa_pub_key *pub, const u8 *msg, u32 msglen,
crypto/libecc/src/examples/sig/kcdsa/kcdsa.h
65
ATTRIBUTE_WARN_UNUSED_RET int kcdsa_sign(const kcdsa_priv_key *priv, const u8 *msg, u32 msglen,
crypto/libecc/src/examples/sig/kcdsa/kcdsa.h
69
ATTRIBUTE_WARN_UNUSED_RET int kcdsa_verify(const kcdsa_pub_key *pub, const u8 *msg, u32 msglen,
crypto/libecc/src/examples/sig/rsa/rsa.c
1002
MUST_HAVE((((embits / 8) + 1) < (u32)((u32)0x1 << 16)), ret, err);
crypto/libecc/src/examples/sig/rsa/rsa.c
1007
MUST_HAVE((emlen >= ((u32)hlen + (u32)saltlen + 2)), ret, err);
crypto/libecc/src/examples/sig/rsa/rsa.c
1023
dblen = (u32)(emlen - hlen - 1);
crypto/libecc/src/examples/sig/rsa/rsa.c
1077
int emsa_pkcs1_v1_5_encode(const u8 *m, u32 mlen, u8 *em, u16 emlen,
crypto/libecc/src/examples/sig/rsa/rsa.c
1082
u32 ilens[2] = { mlen, 0 };
crypto/libecc/src/examples/sig/rsa/rsa.c
1085
u32 digestinfo_len = 0;
crypto/libecc/src/examples/sig/rsa/rsa.c
1086
u32 tlen = 0;
crypto/libecc/src/examples/sig/rsa/rsa.c
1135
int rsaes_pkcs1_v1_5_encrypt(const rsa_pub_key *pub, const u8 *m, u32 mlen,
crypto/libecc/src/examples/sig/rsa/rsa.c
1136
u8 *c, u32 *clen, u32 modbits,
crypto/libecc/src/examples/sig/rsa/rsa.c
1137
const u8 *forced_seed, u32 seedlen)
crypto/libecc/src/examples/sig/rsa/rsa.c
1140
u32 k;
crypto/libecc/src/examples/sig/rsa/rsa.c
1180
MUST_HAVE((k < (u32)((u32)0x1 << 16)), ret, err);
crypto/libecc/src/examples/sig/rsa/rsa.c
1202
ATTRIBUTE_WARN_UNUSED_RET static int _rsaes_pkcs1_v1_5_decrypt(const rsa_priv_key *priv, const rsa_pub_key *pub, const u8 *c, u32 clen,
crypto/libecc/src/examples/sig/rsa/rsa.c
1203
u8 *m, u32 *mlen, u32 modbits)
crypto/libecc/src/examples/sig/rsa/rsa.c
1207
u32 k;
crypto/libecc/src/examples/sig/rsa/rsa.c
1232
MUST_HAVE((k < (u32)((u32)0x1 << 16)), ret, err);
crypto/libecc/src/examples/sig/rsa/rsa.c
1281
int rsaes_pkcs1_v1_5_decrypt(const rsa_priv_key *priv, const u8 *c, u32 clen,
crypto/libecc/src/examples/sig/rsa/rsa.c
1282
u8 *m, u32 *mlen, u32 modbits)
crypto/libecc/src/examples/sig/rsa/rsa.c
1290
int rsaes_pkcs1_v1_5_decrypt_hardened(const rsa_priv_key *priv, const rsa_pub_key *pub, const u8 *c, u32 clen,
crypto/libecc/src/examples/sig/rsa/rsa.c
1291
u8 *m, u32 *mlen, u32 modbits)
crypto/libecc/src/examples/sig/rsa/rsa.c
1299
int rsaes_oaep_encrypt(const rsa_pub_key *pub, const u8 *m, u32 mlen,
crypto/libecc/src/examples/sig/rsa/rsa.c
1300
u8 *c, u32 *clen, u32 modbits, const u8 *label, u32 label_len,
crypto/libecc/src/examples/sig/rsa/rsa.c
1302
const u8 *forced_seed, u32 seedlen)
crypto/libecc/src/examples/sig/rsa/rsa.c
1305
u32 k, pslen, khlen;
crypto/libecc/src/examples/sig/rsa/rsa.c
1318
u32 ilens[2] = { 0, 0 };
crypto/libecc/src/examples/sig/rsa/rsa.c
1335
MUST_HAVE(((u32)k >= ((2 * (u32)hlen) + 2)), ret, err);
crypto/libecc/src/examples/sig/rsa/rsa.c
1336
MUST_HAVE(((mlen ) <= ((u32)k - (2 * (u32)hlen) - 2)), ret, err);
crypto/libecc/src/examples/sig/rsa/rsa.c
1358
pslen = (k - mlen - (u32)(2 * hlen) - 2);
crypto/libecc/src/examples/sig/rsa/rsa.c
1385
MUST_HAVE((khlen < (u32)((u32)0x1 << 16)), ret, err);
crypto/libecc/src/examples/sig/rsa/rsa.c
1396
MUST_HAVE((k < (u32)((u32)0x1 << 16)), ret, err);
crypto/libecc/src/examples/sig/rsa/rsa.c
1418
ATTRIBUTE_WARN_UNUSED_RET static int _rsaes_oaep_decrypt(const rsa_priv_key *priv, const rsa_pub_key *pub, const u8 *c, u32 clen,
crypto/libecc/src/examples/sig/rsa/rsa.c
1419
u8 *m, u32 *mlen, u32 modbits,
crypto/libecc/src/examples/sig/rsa/rsa.c
1420
const u8 *label, u32 label_len, gen_hash_alg_type gen_hash_type,
crypto/libecc/src/examples/sig/rsa/rsa.c
1424
u32 k, khlen;
crypto/libecc/src/examples/sig/rsa/rsa.c
1438
u32 ilens[2] = { 0, 0 };
crypto/libecc/src/examples/sig/rsa/rsa.c
1456
MUST_HAVE(((u32)k >= ((2 * (u32)hlen) + 2)), ret, err);
crypto/libecc/src/examples/sig/rsa/rsa.c
1469
MUST_HAVE((k < (u32)((u32)0x1 << 16)), ret, err);
crypto/libecc/src/examples/sig/rsa/rsa.c
1487
MUST_HAVE((khlen < (u32)((u32)0x1 << 16)), ret, err);
crypto/libecc/src/examples/sig/rsa/rsa.c
1553
int rsaes_oaep_decrypt(const rsa_priv_key *priv, const u8 *c, u32 clen,
crypto/libecc/src/examples/sig/rsa/rsa.c
1554
u8 *m, u32 *mlen, u32 modbits,
crypto/libecc/src/examples/sig/rsa/rsa.c
1555
const u8 *label, u32 label_len, gen_hash_alg_type gen_hash_type,
crypto/libecc/src/examples/sig/rsa/rsa.c
1564
int rsaes_oaep_decrypt_hardened(const rsa_priv_key *priv, const rsa_pub_key *pub, const u8 *c, u32 clen,
crypto/libecc/src/examples/sig/rsa/rsa.c
1565
u8 *m, u32 *mlen, u32 modbits,
crypto/libecc/src/examples/sig/rsa/rsa.c
1566
const u8 *label, u32 label_len, gen_hash_alg_type gen_hash_type,
crypto/libecc/src/examples/sig/rsa/rsa.c
1577
ATTRIBUTE_WARN_UNUSED_RET static int _rsassa_pkcs1_v1_5_sign(const rsa_priv_key *priv, const rsa_pub_key *pub, const u8 *m, u32 mlen,
crypto/libecc/src/examples/sig/rsa/rsa.c
1578
u8 *s, u16 *slen, u32 modbits, gen_hash_alg_type gen_hash_type)
crypto/libecc/src/examples/sig/rsa/rsa.c
1582
u32 k;
crypto/libecc/src/examples/sig/rsa/rsa.c
1592
MUST_HAVE((k < (u32)((u32)0x1 << 16)), ret, err);
crypto/libecc/src/examples/sig/rsa/rsa.c
1626
int rsassa_pkcs1_v1_5_sign(const rsa_priv_key *priv, const u8 *m, u32 mlen,
crypto/libecc/src/examples/sig/rsa/rsa.c
1627
u8 *s, u16 *slen, u32 modbits, gen_hash_alg_type gen_hash_type)
crypto/libecc/src/examples/sig/rsa/rsa.c
1635
int rsassa_pkcs1_v1_5_sign_hardened(const rsa_priv_key *priv, const rsa_pub_key *pub, const u8 *m, u32 mlen,
crypto/libecc/src/examples/sig/rsa/rsa.c
1636
u8 *s, u16 *slen, u32 modbits, gen_hash_alg_type gen_hash_type)
crypto/libecc/src/examples/sig/rsa/rsa.c
1644
int rsassa_pkcs1_v1_5_verify(const rsa_pub_key *pub, const u8 *m, u32 mlen,
crypto/libecc/src/examples/sig/rsa/rsa.c
1645
const u8 *s, u16 slen, u32 modbits, gen_hash_alg_type gen_hash_type)
crypto/libecc/src/examples/sig/rsa/rsa.c
1654
u32 k;
crypto/libecc/src/examples/sig/rsa/rsa.c
1664
MUST_HAVE((k < (u32)((u32)0x1 << 16)), ret, err);
crypto/libecc/src/examples/sig/rsa/rsa.c
1697
ATTRIBUTE_WARN_UNUSED_RET static int _rsassa_pss_sign(const rsa_priv_key *priv, const rsa_pub_key *pub, const u8 *m, u32 mlen,
crypto/libecc/src/examples/sig/rsa/rsa.c
1698
u8 *s, u16 *slen, u32 modbits,
crypto/libecc/src/examples/sig/rsa/rsa.c
1700
u32 saltlen, const u8 *forced_salt)
crypto/libecc/src/examples/sig/rsa/rsa.c
1705
u32 k;
crypto/libecc/src/examples/sig/rsa/rsa.c
1714
MUST_HAVE((k < (u32)((u32)0x1 << 16)), ret, err);
crypto/libecc/src/examples/sig/rsa/rsa.c
1736
MUST_HAVE((k < ((u32)0x1 << 16)), ret, err);
crypto/libecc/src/examples/sig/rsa/rsa.c
1754
int rsassa_pss_sign(const rsa_priv_key *priv, const u8 *m, u32 mlen,
crypto/libecc/src/examples/sig/rsa/rsa.c
1755
u8 *s, u16 *slen, u32 modbits,
crypto/libecc/src/examples/sig/rsa/rsa.c
1757
u32 saltlen, const u8 *forced_salt)
crypto/libecc/src/examples/sig/rsa/rsa.c
1765
int rsassa_pss_sign_hardened(const rsa_priv_key *priv, const rsa_pub_key *pub, const u8 *m, u32 mlen,
crypto/libecc/src/examples/sig/rsa/rsa.c
1766
u8 *s, u16 *slen, u32 modbits,
crypto/libecc/src/examples/sig/rsa/rsa.c
1768
u32 saltlen, const u8 *forced_salt)
crypto/libecc/src/examples/sig/rsa/rsa.c
1777
int rsassa_pss_verify(const rsa_pub_key *pub, const u8 *m, u32 mlen,
crypto/libecc/src/examples/sig/rsa/rsa.c
1778
const u8 *s, u16 slen, u32 modbits,
crypto/libecc/src/examples/sig/rsa/rsa.c
1780
u32 saltlen)
crypto/libecc/src/examples/sig/rsa/rsa.c
1789
u32 k;
crypto/libecc/src/examples/sig/rsa/rsa.c
1798
MUST_HAVE((k < (u32)((u32)0x1 << 16)), ret, err);
crypto/libecc/src/examples/sig/rsa/rsa.c
1805
MUST_HAVE((((modbits - 1) / 8) + 1) < (u32)((u32)0x1 << 16), ret, err);
crypto/libecc/src/examples/sig/rsa/rsa.c
182
int rsa_i2osp(nn_src_t x, u8 *buf, u32 buflen)
crypto/libecc/src/examples/sig/rsa/rsa.c
1836
const u8 *m, u32 mlen, u32 *m1len, u32 *m2len, u8 *s, u16 *slen,
crypto/libecc/src/examples/sig/rsa/rsa.c
1837
u32 modbits, gen_hash_alg_type gen_hash_type)
crypto/libecc/src/examples/sig/rsa/rsa.c
1840
u32 k, m1len_, m2len_;
crypto/libecc/src/examples/sig/rsa/rsa.c
1853
MUST_HAVE((k < (u32)((u32)0x1 << 16)), ret, err);
crypto/libecc/src/examples/sig/rsa/rsa.c
1861
MUST_HAVE(k >= (u32)(2 + hlen), ret, err);
crypto/libecc/src/examples/sig/rsa/rsa.c
1895
MUST_HAVE((k < ((u32)0x1 << 16)), ret, err);
crypto/libecc/src/examples/sig/rsa/rsa.c
1916
int rsa_iso9796_2_sign_recover(const rsa_priv_key *priv, const u8 *m, u32 mlen, u32 *m1len,
crypto/libecc/src/examples/sig/rsa/rsa.c
1917
u32 *m2len, u8 *s, u16 *slen,
crypto/libecc/src/examples/sig/rsa/rsa.c
1918
u32 modbits, gen_hash_alg_type gen_hash_type)
crypto/libecc/src/examples/sig/rsa/rsa.c
1927
const u8 *m, u32 mlen, u32 *m1len, u32 *m2len, u8 *s, u16 *slen,
crypto/libecc/src/examples/sig/rsa/rsa.c
1928
u32 modbits, gen_hash_alg_type gen_hash_type)
crypto/libecc/src/examples/sig/rsa/rsa.c
1944
int rsa_iso9796_2_verify_recover(const rsa_pub_key *pub, const u8 *m2, u32 m2len, u8 *m1, u32 *m1len,
crypto/libecc/src/examples/sig/rsa/rsa.c
1945
const u8 *s, u16 slen, u32 modbits, gen_hash_alg_type gen_hash_type)
crypto/libecc/src/examples/sig/rsa/rsa.c
1954
u32 k, m1len_;
crypto/libecc/src/examples/sig/rsa/rsa.c
1968
MUST_HAVE((k < (u32)((u32)0x1 << 16)), ret, err);
crypto/libecc/src/examples/sig/rsa/rsa.c
197
int rsa_os2ip(nn_t x, const u8 *buf, u32 buflen)
crypto/libecc/src/examples/sig/rsa/rsa.c
1978
m1len_ = (u32)(slen - (hlen + 2));
crypto/libecc/src/examples/sig/rsa/rsa.c
603
ATTRIBUTE_WARN_UNUSED_RET static int rsa_digestinfo_from_hash(gen_hash_alg_type gen_hash_type, u8 *digestinfo, u32 *digestinfo_len)
crypto/libecc/src/examples/sig/rsa/rsa.c
792
u32 c, ceil;
crypto/libecc/src/examples/sig/rsa/rsa.c
795
u32 ilens[3] = { zlen, 4, 0 };
crypto/libecc/src/examples/sig/rsa/rsa.c
810
ceil = (u32)(masklen / hlen) + !!(masklen % hlen);
crypto/libecc/src/examples/sig/rsa/rsa.c
822
ret = local_memcpy(&mask[c * hlen], digest, (u32)(masklen % hlen)); EG(ret, err);
crypto/libecc/src/examples/sig/rsa/rsa.c
834
int emsa_pss_encode(const u8 *m, u32 mlen, u8 *em, u32 embits,
crypto/libecc/src/examples/sig/rsa/rsa.c
836
u32 saltlen, const u8 *forced_salt)
crypto/libecc/src/examples/sig/rsa/rsa.c
851
u32 ilens[2] = { mlen, 0 };
crypto/libecc/src/examples/sig/rsa/rsa.c
852
u32 emlen, dblen, pslen;
crypto/libecc/src/examples/sig/rsa/rsa.c
856
u32 ilens_[4];
crypto/libecc/src/examples/sig/rsa/rsa.c
871
MUST_HAVE((emlen < (u32)((u32)0x1 << 16)), ret, err);
crypto/libecc/src/examples/sig/rsa/rsa.c
881
MUST_HAVE((embits >= ((8*(u32)hlen) + (8*(u32)saltlen) + 9)), ret, err);
crypto/libecc/src/examples/sig/rsa/rsa.c
884
MUST_HAVE((emlen >= ((u32)hlen + (u32)saltlen + 2)), ret, err);
crypto/libecc/src/examples/sig/rsa/rsa.c
955
int emsa_pss_verify(const u8 *m, u32 mlen, const u8 *em,
crypto/libecc/src/examples/sig/rsa/rsa.c
956
u32 embits, u16 emlen,
crypto/libecc/src/examples/sig/rsa/rsa.c
958
u32 saltlen)
crypto/libecc/src/examples/sig/rsa/rsa.c
966
u32 ilens[2] = { mlen, 0 };
crypto/libecc/src/examples/sig/rsa/rsa.c
976
u32 dblen;
crypto/libecc/src/examples/sig/rsa/rsa.c
978
u32 ilens_[4];
crypto/libecc/src/examples/sig/rsa/rsa.c
999
MUST_HAVE((embits >= ((8*(u32)hlen) + (8*(u32)saltlen) + 9)), ret, err);
crypto/libecc/src/examples/sig/rsa/rsa.h
104
ATTRIBUTE_WARN_UNUSED_RET int rsa_i2osp(nn_src_t x, u8 *buf, u32 buflen);
crypto/libecc/src/examples/sig/rsa/rsa.h
105
ATTRIBUTE_WARN_UNUSED_RET int rsa_os2ip(nn_t x, const u8 *buf, u32 buflen);
crypto/libecc/src/examples/sig/rsa/rsa.h
128
ATTRIBUTE_WARN_UNUSED_RET int emsa_pkcs1_v1_5_encode(const u8 *m, u32 mlen, u8 *em, u16 emlen,
crypto/libecc/src/examples/sig/rsa/rsa.h
130
ATTRIBUTE_WARN_UNUSED_RET int emsa_pss_encode(const u8 *m, u32 mlen, u8 *em, u32 embits,
crypto/libecc/src/examples/sig/rsa/rsa.h
133
u32 saltlen, const u8 *forced_salt);
crypto/libecc/src/examples/sig/rsa/rsa.h
134
ATTRIBUTE_WARN_UNUSED_RET int emsa_pss_verify(const u8 *m, u32 mlen, const u8 *em,
crypto/libecc/src/examples/sig/rsa/rsa.h
135
u32 embits, u16 emlen,
crypto/libecc/src/examples/sig/rsa/rsa.h
137
u32 slen);
crypto/libecc/src/examples/sig/rsa/rsa.h
139
ATTRIBUTE_WARN_UNUSED_RET int rsaes_pkcs1_v1_5_encrypt(const rsa_pub_key *pub, const u8 *m, u32 mlen,
crypto/libecc/src/examples/sig/rsa/rsa.h
140
u8 *c, u32 *clen, u32 modbits,
crypto/libecc/src/examples/sig/rsa/rsa.h
141
const u8 *forced_seed, u32 seedlen);
crypto/libecc/src/examples/sig/rsa/rsa.h
142
ATTRIBUTE_WARN_UNUSED_RET int rsaes_pkcs1_v1_5_decrypt(const rsa_priv_key *priv, const u8 *c, u32 clen,
crypto/libecc/src/examples/sig/rsa/rsa.h
143
u8 *m, u32 *mlen, u32 modbits);
crypto/libecc/src/examples/sig/rsa/rsa.h
144
ATTRIBUTE_WARN_UNUSED_RET int rsaes_pkcs1_v1_5_decrypt_hardened(const rsa_priv_key *priv, const rsa_pub_key *pub, const u8 *c, u32 clen,
crypto/libecc/src/examples/sig/rsa/rsa.h
145
u8 *m, u32 *mlen, u32 modbits);
crypto/libecc/src/examples/sig/rsa/rsa.h
147
ATTRIBUTE_WARN_UNUSED_RET int rsaes_oaep_encrypt(const rsa_pub_key *pub, const u8 *m, u32 mlen,
crypto/libecc/src/examples/sig/rsa/rsa.h
148
u8 *c, u32 *clen, u32 modbits, const u8 *label, u32 label_len,
crypto/libecc/src/examples/sig/rsa/rsa.h
150
const u8 *forced_seed, u32 seedlen);
crypto/libecc/src/examples/sig/rsa/rsa.h
151
ATTRIBUTE_WARN_UNUSED_RET int rsaes_oaep_decrypt(const rsa_priv_key *priv, const u8 *c, u32 clen,
crypto/libecc/src/examples/sig/rsa/rsa.h
152
u8 *m, u32 *mlen, u32 modbits, const u8 *label, u32 label_len,
crypto/libecc/src/examples/sig/rsa/rsa.h
154
ATTRIBUTE_WARN_UNUSED_RET int rsaes_oaep_decrypt_hardened(const rsa_priv_key *priv, const rsa_pub_key *pub, const u8 *c, u32 clen,
crypto/libecc/src/examples/sig/rsa/rsa.h
155
u8 *m, u32 *mlen, u32 modbits, const u8 *label, u32 label_len,
crypto/libecc/src/examples/sig/rsa/rsa.h
158
ATTRIBUTE_WARN_UNUSED_RET int rsassa_pkcs1_v1_5_sign(const rsa_priv_key *priv, const u8 *m, u32 mlen,
crypto/libecc/src/examples/sig/rsa/rsa.h
159
u8 *s, u16 *slen, u32 modbits, gen_hash_alg_type rsa_hash_type);
crypto/libecc/src/examples/sig/rsa/rsa.h
160
ATTRIBUTE_WARN_UNUSED_RET int rsassa_pkcs1_v1_5_sign_hardened(const rsa_priv_key *priv, const rsa_pub_key *pub, const u8 *m, u32 mlen,
crypto/libecc/src/examples/sig/rsa/rsa.h
161
u8 *s, u16 *slen, u32 modbits, gen_hash_alg_type rsa_hash_type);
crypto/libecc/src/examples/sig/rsa/rsa.h
162
ATTRIBUTE_WARN_UNUSED_RET int rsassa_pkcs1_v1_5_verify(const rsa_pub_key *pub, const u8 *m, u32 mlen,
crypto/libecc/src/examples/sig/rsa/rsa.h
163
const u8 *s, u16 slen, u32 modbits, gen_hash_alg_type rsa_hash_type);
crypto/libecc/src/examples/sig/rsa/rsa.h
165
ATTRIBUTE_WARN_UNUSED_RET int rsassa_pss_sign(const rsa_priv_key *priv, const u8 *m, u32 mlen,
crypto/libecc/src/examples/sig/rsa/rsa.h
166
u8 *s, u16 *slen, u32 modbits,
crypto/libecc/src/examples/sig/rsa/rsa.h
168
u32 saltlen, const u8 *forced_salt);
crypto/libecc/src/examples/sig/rsa/rsa.h
169
ATTRIBUTE_WARN_UNUSED_RET int rsassa_pss_sign_hardened(const rsa_priv_key *priv, const rsa_pub_key *pub, const u8 *m, u32 mlen,
crypto/libecc/src/examples/sig/rsa/rsa.h
170
u8 *s, u16 *slen, u32 modbits,
crypto/libecc/src/examples/sig/rsa/rsa.h
172
u32 saltlen, const u8 *forced_salt);
crypto/libecc/src/examples/sig/rsa/rsa.h
173
ATTRIBUTE_WARN_UNUSED_RET int rsassa_pss_verify(const rsa_pub_key *pub, const u8 *m, u32 mlen,
crypto/libecc/src/examples/sig/rsa/rsa.h
174
const u8 *s, u16 slen, u32 modbits,
crypto/libecc/src/examples/sig/rsa/rsa.h
176
u32 saltlen);
crypto/libecc/src/examples/sig/rsa/rsa.h
178
ATTRIBUTE_WARN_UNUSED_RET int rsa_iso9796_2_sign_recover(const rsa_priv_key *priv, const u8 *m, u32 mlen, u32 *m1len,
crypto/libecc/src/examples/sig/rsa/rsa.h
179
u32 *m2len, u8 *s, u16 *slen,
crypto/libecc/src/examples/sig/rsa/rsa.h
180
u32 modbits, gen_hash_alg_type gen_hash_type);
crypto/libecc/src/examples/sig/rsa/rsa.h
183
const u8 *m, u32 mlen, u32 *m1len, u32 *m2len, u8 *s, u16 *slen,
crypto/libecc/src/examples/sig/rsa/rsa.h
184
u32 modbits, gen_hash_alg_type gen_hash_type);
crypto/libecc/src/examples/sig/rsa/rsa.h
185
ATTRIBUTE_WARN_UNUSED_RET int rsa_iso9796_2_verify_recover(const rsa_pub_key *pub, const u8 *m2, u32 m2len, u8 *m1, u32 *m1len,
crypto/libecc/src/examples/sig/rsa/rsa.h
186
const u8 *s, u16 slen, u32 modbits, gen_hash_alg_type gen_hash_type);
crypto/libecc/src/examples/sig/rsa/rsa_tests.h
118
u32 clen;
crypto/libecc/src/examples/sig/rsa/rsa_tests.h
27
u32 modbits;
crypto/libecc/src/examples/sig/rsa/rsa_tests.h
46
u32 mlen;
crypto/libecc/src/examples/sig/rsa/rsa_tests.h
48
u32 reslen;
crypto/libecc/src/examples/sig/rsa/rsa_tests.h
50
u32 saltlen;
crypto/libecc/src/examples/sig/rsa/rsa_tests.h
54
ATTRIBUTE_WARN_UNUSED_RET static inline int perform_rsa_tests(const rsa_test **tests, u32 num_tests)
crypto/libecc/src/examples/sig/rsa/rsa_tests.h
61
u32 modbits = t->modbits;
crypto/libecc/src/examples/sig/rsa/rsa_tests.h
91
u32 clen;
crypto/libecc/src/examples/sig/sdsa/sdsa.c
252
int sdsa_verify(const sdsa_pub_key *pub, const u8 *msg, u32 msglen,
crypto/libecc/src/examples/sig/sdsa/sdsa.c
88
int sdsa_sign(const sdsa_priv_key *priv, const u8 *msg, u32 msglen,
crypto/libecc/src/examples/sig/sdsa/sdsa.h
65
ATTRIBUTE_WARN_UNUSED_RET int sdsa_sign(const sdsa_priv_key *priv, const u8 *msg, u32 msglen,
crypto/libecc/src/examples/sig/sdsa/sdsa.h
69
ATTRIBUTE_WARN_UNUSED_RET int sdsa_verify(const sdsa_pub_key *pub, const u8 *msg, u32 msglen,
crypto/libecc/src/examples/sss/sss.c
454
const u32 ilens[3] = { sizeof(*cur_share), SSS_SESSION_ID_SIZE, 0 };
crypto/libecc/src/examples/sss/sss.c
498
const u32 ilens[3] = { sizeof(*cur_share), SSS_SESSION_ID_SIZE, 0 };
crypto/libecc/src/examples/sss/sss.c
566
const u32 ilens[3] = { sizeof(*cur_share), SSS_SESSION_ID_SIZE, 0 };
crypto/libecc/src/examples/sss/sss.c
618
const u32 ilens[3] = { sizeof(*cur_share), SSS_SESSION_ID_SIZE, 0 };
crypto/libecc/src/hash/bash.c
57
int _bash_update(bash_context *ctx, const u8 *input, u32 ilen)
crypto/libecc/src/hash/bash.c
60
u32 remain_ilen = ilen;
crypto/libecc/src/hash/bash224.c
31
int bash224_update(bash224_context *ctx, const u8 *input, u32 ilen)
crypto/libecc/src/hash/bash224.c
66
int bash224_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/src/hash/bash224.c
91
int bash224(const u8 *input, u32 ilen, u8 output[BASH224_DIGEST_SIZE])
crypto/libecc/src/hash/bash256.c
31
int bash256_update(bash256_context *ctx, const u8 *input, u32 ilen)
crypto/libecc/src/hash/bash256.c
66
int bash256_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/src/hash/bash256.c
91
int bash256(const u8 *input, u32 ilen, u8 output[BASH256_DIGEST_SIZE])
crypto/libecc/src/hash/bash384.c
31
int bash384_update(bash384_context *ctx, const u8 *input, u32 ilen)
crypto/libecc/src/hash/bash384.c
66
int bash384_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/src/hash/bash384.c
78
u32 buflen = ilens[pos];
crypto/libecc/src/hash/bash384.c
95
int bash384(const u8 *input, u32 ilen, u8 output[BASH384_DIGEST_SIZE])
crypto/libecc/src/hash/bash512.c
31
int bash512_update(bash512_context *ctx, const u8 *input, u32 ilen)
crypto/libecc/src/hash/bash512.c
66
int bash512_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/src/hash/bash512.c
91
int bash512(const u8 *input, u32 ilen, u8 output[BASH512_DIGEST_SIZE])
crypto/libecc/src/hash/belt-hash.c
119
u32 a, b, c, d, e;
crypto/libecc/src/hash/belt-hash.c
120
u32 i;
crypto/libecc/src/hash/belt-hash.c
128
u32 key;
crypto/libecc/src/hash/belt-hash.c
134
a = (u32)(a - G(b + key, 13));
crypto/libecc/src/hash/belt-hash.c
138
c = (u32)(c - e);
crypto/libecc/src/hash/belt-hash.c
160
u32 a, b, c, d, e;
crypto/libecc/src/hash/belt-hash.c
161
u32 i;
crypto/libecc/src/hash/belt-hash.c
169
u32 key;
crypto/libecc/src/hash/belt-hash.c
170
u32 j = (7 - i);
crypto/libecc/src/hash/belt-hash.c
176
a = (u32)(a - G(b + key, 13));
crypto/libecc/src/hash/belt-hash.c
180
c = (u32)(c - e);
crypto/libecc/src/hash/belt-hash.c
27
#define ROTL_BELT(x, n) ((((u32)(x)) << (n)) | (((u32)(x)) >> (32-(n))))
crypto/libecc/src/hash/belt-hash.c
30
u32 z; \
crypto/libecc/src/hash/belt-hash.c
332
int belt_hash_update(belt_hash_context *ctx, const u8 *input, u32 ilen)
crypto/libecc/src/hash/belt-hash.c
335
u32 remain_ilen = ilen;
crypto/libecc/src/hash/belt-hash.c
426
int belt_hash_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/src/hash/belt-hash.c
451
int belt_hash(const u8 *input, u32 ilen, u8 output[BELT_HASH_DIGEST_SIZE])
crypto/libecc/src/hash/belt-hash.c
59
#define PUT_BYTE(x, a) ( (u32)(x) << (a) )
crypto/libecc/src/hash/belt-hash.c
64
static u32 KIdx[8][7] =
crypto/libecc/src/hash/belt-hash.c
76
int belt_init(const u8 *k, u32 k_len, u8 ks[BELT_KEY_SCHED_LEN])
crypto/libecc/src/hash/hash_algs.c
155
ATTRIBUTE_WARN_UNUSED_RET int _sha224_update(hash_context * hctx, const unsigned char *chunk, u32 chunklen)
crypto/libecc/src/hash/hash_algs.c
169
ATTRIBUTE_WARN_UNUSED_RET int _sha256_update(hash_context * hctx, const unsigned char *chunk, u32 chunklen)
crypto/libecc/src/hash/hash_algs.c
183
ATTRIBUTE_WARN_UNUSED_RET int _sha384_update(hash_context * hctx, const unsigned char *chunk, u32 chunklen)
crypto/libecc/src/hash/hash_algs.c
197
ATTRIBUTE_WARN_UNUSED_RET int _sha512_update(hash_context * hctx, const unsigned char *chunk, u32 chunklen)
crypto/libecc/src/hash/hash_algs.c
211
ATTRIBUTE_WARN_UNUSED_RET int _sha512_224_update(hash_context * hctx, const unsigned char *chunk, u32 chunklen)
crypto/libecc/src/hash/hash_algs.c
225
ATTRIBUTE_WARN_UNUSED_RET int _sha512_256_update(hash_context * hctx, const unsigned char *chunk, u32 chunklen)
crypto/libecc/src/hash/hash_algs.c
239
ATTRIBUTE_WARN_UNUSED_RET int _sha3_224_update(hash_context * hctx, const unsigned char *chunk, u32 chunklen)
crypto/libecc/src/hash/hash_algs.c
253
ATTRIBUTE_WARN_UNUSED_RET int _sha3_256_update(hash_context * hctx, const unsigned char *chunk, u32 chunklen)
crypto/libecc/src/hash/hash_algs.c
267
ATTRIBUTE_WARN_UNUSED_RET int _sha3_384_update(hash_context * hctx, const unsigned char *chunk, u32 chunklen)
crypto/libecc/src/hash/hash_algs.c
281
ATTRIBUTE_WARN_UNUSED_RET int _sha3_512_update(hash_context * hctx, const unsigned char *chunk, u32 chunklen)
crypto/libecc/src/hash/hash_algs.c
295
ATTRIBUTE_WARN_UNUSED_RET int _sm3_update(hash_context * hctx, const unsigned char *chunk, u32 chunklen)
crypto/libecc/src/hash/hash_algs.c
309
ATTRIBUTE_WARN_UNUSED_RET int _shake256_update(hash_context * hctx, const unsigned char *chunk, u32 chunklen)
crypto/libecc/src/hash/hash_algs.c
323
ATTRIBUTE_WARN_UNUSED_RET int _streebog256_update(hash_context * hctx, const unsigned char *chunk, u32 chunklen)
crypto/libecc/src/hash/hash_algs.c
337
ATTRIBUTE_WARN_UNUSED_RET int _streebog512_update(hash_context * hctx, const unsigned char *chunk, u32 chunklen)
crypto/libecc/src/hash/hash_algs.c
351
ATTRIBUTE_WARN_UNUSED_RET int _ripemd160_update(hash_context * hctx, const unsigned char *chunk, u32 chunklen)
crypto/libecc/src/hash/hash_algs.c
365
ATTRIBUTE_WARN_UNUSED_RET int _belt_hash_update(hash_context * hctx, const unsigned char *chunk, u32 chunklen)
crypto/libecc/src/hash/hash_algs.c
379
ATTRIBUTE_WARN_UNUSED_RET int _bash224_update(hash_context * hctx, const unsigned char *chunk, u32 chunklen)
crypto/libecc/src/hash/hash_algs.c
393
ATTRIBUTE_WARN_UNUSED_RET int _bash256_update(hash_context * hctx, const unsigned char *chunk, u32 chunklen)
crypto/libecc/src/hash/hash_algs.c
407
ATTRIBUTE_WARN_UNUSED_RET int _bash384_update(hash_context * hctx, const unsigned char *chunk, u32 chunklen)
crypto/libecc/src/hash/hash_algs.c
421
ATTRIBUTE_WARN_UNUSED_RET int _bash512_update(hash_context * hctx, const unsigned char *chunk, u32 chunklen)
crypto/libecc/src/hash/hmac.c
136
int hmac(const u8 *hmackey, u32 hmackey_len, hash_alg_type hash_type,
crypto/libecc/src/hash/hmac.c
137
const u8 *input, u32 ilen, u8 *output, u8 *outlen)
crypto/libecc/src/hash/hmac.c
154
int hmac_scattered(const u8 *hmackey, u32 hmackey_len, hash_alg_type hash_type,
crypto/libecc/src/hash/hmac.c
155
const u8 **inputs, const u32 *ilens, u8 *output, u8 *outlen)
crypto/libecc/src/hash/hmac.c
16
int hmac_init(hmac_context *ctx, const u8 *hmackey, u32 hmackey_len,
crypto/libecc/src/hash/hmac.c
84
int hmac_update(hmac_context *ctx, const u8 *input, u32 ilen)
crypto/libecc/src/hash/ripemd160.c
108
u32 t = ROTL_RIPEMD160(a + F(b, c, d) + w[R[round][idx]] + K[round], S[round][idx]) + e;\
crypto/libecc/src/hash/ripemd160.c
117
u32 al, bl, cl, dl, el;
crypto/libecc/src/hash/ripemd160.c
119
u32 ar, br, cr, dr, er;
crypto/libecc/src/hash/ripemd160.c
121
u32 tt;
crypto/libecc/src/hash/ripemd160.c
123
u32 W[16];
crypto/libecc/src/hash/ripemd160.c
206
int ripemd160_update(ripemd160_context *ctx, const u8 *input, u32 ilen)
crypto/libecc/src/hash/ripemd160.c
209
u32 remain_ilen = ilen;
crypto/libecc/src/hash/ripemd160.c
23
(n) = ( ((u32) (b)[(i) + 3]) << 24 ) \
crypto/libecc/src/hash/ripemd160.c
24
| ( ((u32) (b)[(i) + 2]) << 16 ) \
crypto/libecc/src/hash/ripemd160.c
25
| ( ((u32) (b)[(i) + 1]) << 8 ) \
crypto/libecc/src/hash/ripemd160.c
26
| ( ((u32) (b)[(i) ]) ); \
crypto/libecc/src/hash/ripemd160.c
308
int ripemd160_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/src/hash/ripemd160.c
329
int ripemd160(const u8 *input, u32 ilen, u8 output[RIPEMD160_DIGEST_SIZE])
crypto/libecc/src/hash/ripemd160.c
58
#define ROTL_RIPEMD160(x, n) ((((u32)(x)) << (n)) | (((u32)(x)) >> (32-(n))))
crypto/libecc/src/hash/ripemd160.c
67
static const u32 KL_RIPEMD160[5] = {
crypto/libecc/src/hash/ripemd160.c
71
static const u32 KR_RIPEMD160[5] = {
crypto/libecc/src/hash/sha224.c
206
int sha224_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/src/hash/sha224.c
231
int sha224(const u8 *input, u32 ilen, u8 output[SHA224_DIGEST_SIZE])
crypto/libecc/src/hash/sha224.c
25
u32 a, b, c, d, e, f, g, h;
crypto/libecc/src/hash/sha224.c
26
u32 W[64];
crypto/libecc/src/hash/sha224.c
96
int sha224_update(sha224_context *ctx, const u8 *input, u32 ilen)
crypto/libecc/src/hash/sha224.c
99
u32 remain_ilen = ilen;
crypto/libecc/src/hash/sha256.c
201
int sha256_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/src/hash/sha256.c
222
int sha256(const u8 *input, u32 ilen, u8 output[SHA256_DIGEST_SIZE])
crypto/libecc/src/hash/sha256.c
25
u32 a, b, c, d, e, f, g, h;
crypto/libecc/src/hash/sha256.c
26
u32 W[64];
crypto/libecc/src/hash/sha256.c
96
int sha256_update(sha256_context *ctx, const u8 *input, u32 ilen)
crypto/libecc/src/hash/sha256.c
99
u32 remain_ilen = ilen;
crypto/libecc/src/hash/sha3-224.c
36
int sha3_224_update(sha3_224_context *ctx, const u8 *input, u32 ilen)
crypto/libecc/src/hash/sha3-224.c
71
int sha3_224_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/src/hash/sha3-224.c
96
int sha3_224(const u8 *input, u32 ilen, u8 output[SHA3_224_DIGEST_SIZE])
crypto/libecc/src/hash/sha3-256.c
36
int sha3_256_update(sha3_256_context *ctx, const u8 *input, u32 ilen)
crypto/libecc/src/hash/sha3-256.c
71
int sha3_256_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/src/hash/sha3-256.c
96
int sha3_256(const u8 *input, u32 ilen, u8 output[SHA3_256_DIGEST_SIZE])
crypto/libecc/src/hash/sha3-384.c
100
int sha3_384(const u8 *input, u32 ilen, u8 output[SHA3_384_DIGEST_SIZE])
crypto/libecc/src/hash/sha3-384.c
36
int sha3_384_update(sha3_384_context *ctx, const u8 *input, u32 ilen)
crypto/libecc/src/hash/sha3-384.c
71
int sha3_384_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/src/hash/sha3-384.c
83
u32 buflen = ilens[pos];
crypto/libecc/src/hash/sha3-512.c
36
int sha3_512_update(sha3_512_context *ctx, const u8 *input, u32 ilen)
crypto/libecc/src/hash/sha3-512.c
71
int sha3_512_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/src/hash/sha3-512.c
96
int sha3_512(const u8 *input, u32 ilen, u8 output[SHA3_512_DIGEST_SIZE])
crypto/libecc/src/hash/sha3.c
50
int _sha3_update(sha3_context *ctx, const u8 *input, u32 ilen)
crypto/libecc/src/hash/sha3.c
52
u32 i;
crypto/libecc/src/hash/sha384.c
100
u32 remain_ilen = ilen;
crypto/libecc/src/hash/sha384.c
210
int sha384_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/src/hash/sha384.c
223
u32 buflen = ilens[pos];
crypto/libecc/src/hash/sha384.c
236
int sha384(const u8 *input, u32 ilen, u8 output[SHA384_DIGEST_SIZE])
crypto/libecc/src/hash/sha384.c
95
int sha384_update(sha384_context *ctx, const u8 *input, u32 ilen)
crypto/libecc/src/hash/sha384.c
97
u32 left;
crypto/libecc/src/hash/sha384.c
98
u32 fill;
crypto/libecc/src/hash/sha512-224.c
105
int sha512_224(const u8 *input, u32 ilen, u8 output[SHA512_224_DIGEST_SIZE])
crypto/libecc/src/hash/sha512-224.c
47
int sha512_224_update(sha512_224_context *ctx, const u8 *input, u32 ilen)
crypto/libecc/src/hash/sha512-224.c
82
int sha512_224_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/src/hash/sha512-256.c
105
int sha512_256(const u8 *input, u32 ilen, u8 output[SHA512_256_DIGEST_SIZE])
crypto/libecc/src/hash/sha512-256.c
47
int sha512_256_update(sha512_256_context *ctx, const u8 *input, u32 ilen)
crypto/libecc/src/hash/sha512-256.c
82
int sha512_256_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/src/hash/sha512.c
106
int sha512(const u8 *input, u32 ilen, u8 output[SHA512_DIGEST_SIZE])
crypto/libecc/src/hash/sha512.c
47
int sha512_update(sha512_context *ctx, const u8 *input, u32 ilen)
crypto/libecc/src/hash/sha512.c
83
int sha512_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/src/hash/sha512_core.c
116
int sha512_core_final(sha512_core_context *ctx, u8 *output, u32 output_size)
crypto/libecc/src/hash/sha512_core.c
68
int sha512_core_update(sha512_core_context *ctx, const u8 *input, u32 ilen)
crypto/libecc/src/hash/sha512_core.c
71
u32 remain_ilen = ilen;
crypto/libecc/src/hash/shake.c
36
int _shake_update(shake_context *ctx, const u8 *input, u32 ilen)
crypto/libecc/src/hash/shake.c
38
u32 i;
crypto/libecc/src/hash/shake256.c
29
int shake256_update(shake256_context *ctx, const u8 *input, u32 ilen)
crypto/libecc/src/hash/shake256.c
56
int shake256_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/src/hash/shake256.c
77
int shake256(const u8 *input, u32 ilen, u8 output[SHAKE256_DIGEST_SIZE])
crypto/libecc/src/hash/sm3.c
215
int sm3_update(sm3_context *ctx, const u8 *input, u32 ilen)
crypto/libecc/src/hash/sm3.c
218
u32 remain_ilen = ilen;
crypto/libecc/src/hash/sm3.c
22
(n) = ( ((u32) (b)[(i) ]) << 24 ) \
crypto/libecc/src/hash/sm3.c
23
| ( ((u32) (b)[(i) + 1]) << 16 ) \
crypto/libecc/src/hash/sm3.c
24
| ( ((u32) (b)[(i) + 2]) << 8 ) \
crypto/libecc/src/hash/sm3.c
25
| ( ((u32) (b)[(i) + 3]) ); \
crypto/libecc/src/hash/sm3.c
320
int sm3_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/src/hash/sm3.c
341
int sm3(const u8 *input, u32 ilen, u8 output[SM3_DIGEST_SIZE])
crypto/libecc/src/hash/sm3.c
58
static const u32 SM3_Tj_low = 0x79cc4519;
crypto/libecc/src/hash/sm3.c
59
static const u32 SM3_Tj_high = 0x7a879d8a;
crypto/libecc/src/hash/sm3.c
62
#define FF_j_low(X, Y, Z) (((u32)(X)) ^ ((u32)(Y)) ^ ((u32)(Z)))
crypto/libecc/src/hash/sm3.c
63
#define GG_j_low(X, Y, Z) (((u32)(X)) ^ ((u32)(Y)) ^ ((u32)(Z)))
crypto/libecc/src/hash/sm3.c
66
#define FF_j_high(X, Y, Z) ((((u32)(X)) & ((u32)(Y))) | \
crypto/libecc/src/hash/sm3.c
67
(((u32)(X)) & ((u32)(Z))) | \
crypto/libecc/src/hash/sm3.c
68
(((u32)(Y)) & ((u32)(Z))))
crypto/libecc/src/hash/sm3.c
69
#define GG_j_high(X, Y, Z) ((((u32)(X)) & ((u32)(Y))) | \
crypto/libecc/src/hash/sm3.c
70
((~((u32)(X))) & ((u32)(Z))))
crypto/libecc/src/hash/sm3.c
73
#define _SM3_ROTL_(x, y) ((((u32)(x)) << (y)) | \
crypto/libecc/src/hash/sm3.c
74
(((u32)(x)) >> ((sizeof(u32) * 8) - (y))))
crypto/libecc/src/hash/sm3.c
76
#define SM3_ROTL(x, y) ((((y) < (sizeof(u32) * 8)) && ((y) > 0)) ? (_SM3_ROTL_(x, y)) : (x))
crypto/libecc/src/hash/sm3.c
79
#define SM3_P_0(X) (((u32)X) ^ SM3_ROTL((X), 9) ^ SM3_ROTL((X), 17))
crypto/libecc/src/hash/sm3.c
80
#define SM3_P_1(X) (((u32)X) ^ SM3_ROTL((X), 15) ^ SM3_ROTL((X), 23))
crypto/libecc/src/hash/sm3.c
87
u32 A, B, C, D, E, F, G, H;
crypto/libecc/src/hash/sm3.c
88
u32 SS1, SS2, TT1, TT2;
crypto/libecc/src/hash/sm3.c
89
u32 W[68 + 64];
crypto/libecc/src/hash/streebog.c
182
int streebog256_update(streebog256_context *ctx, const u8 *input, u32 ilen)
crypto/libecc/src/hash/streebog.c
213
int streebog256_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/src/hash/streebog.c
235
int streebog256(const u8 *input, u32 ilen, u8 output[STREEBOG256_DIGEST_SIZE])
crypto/libecc/src/hash/streebog.c
269
int streebog512_update(streebog512_context *ctx, const u8 *input, u32 ilen)
crypto/libecc/src/hash/streebog.c
300
int streebog512_scattered(const u8 **inputs, const u32 *ilens,
crypto/libecc/src/hash/streebog.c
322
int streebog512(const u8 *input, u32 ilen, u8 output[STREEBOG512_DIGEST_SIZE])
crypto/libecc/src/hash/streebog.c
56
ATTRIBUTE_WARN_UNUSED_RET static int streebog_update(streebog_context *ctx, const u8 *input, u32 ilen)
crypto/libecc/src/hash/streebog.c
59
u32 remain_ilen = ilen;
crypto/libecc/src/nn/nn.c
499
ret = local_memset(tmp, 0, (u32)(NN_MAX_BYTE_LEN - buflen)); EG(ret, err);
crypto/libecc/src/sig/bign.c
47
const u8 *chunk, u32 chunklen)
crypto/libecc/src/sig/bign.c
63
const u8 *chunk, u32 chunklen)
crypto/libecc/src/sig/bign_common.c
211
u32 i;
crypto/libecc/src/sig/bign_common.c
244
ret = belt_hash_update(&belt_hash_ctx, &FE2OS_D[0], (u32)(2*l)); EG(ret, err);
crypto/libecc/src/sig/bign_common.c
271
i = (u32)1;
crypto/libecc/src/sig/bign_common.c
330
i += (u32)1;
crypto/libecc/src/sig/bign_common.c
443
const u8 *chunk, u32 chunklen, ec_alg_type key_type)
crypto/libecc/src/sig/bign_common.c
637
ret = belt_hash_update(&belt_hash_ctx, &FE2OS_W[0], (u32)(2*l)); EG(ret, err);
crypto/libecc/src/sig/bign_common.c
790
ret = local_memcpy(&TMP[0], &sig[l], (u32)BIGN_S1_LEN(q_bit_len)); EG(ret, err);
crypto/libecc/src/sig/bign_common.c
818
const u8 *chunk, u32 chunklen, ec_alg_type key_type)
crypto/libecc/src/sig/bign_common.c
950
ret = belt_hash_update(&belt_hash_ctx, &FE2OS_W[0], (u32)(2*l)); EG(ret, err);
crypto/libecc/src/sig/bip0340.c
1028
const u8 **m, const u32 *m_len, u32 num, ec_alg_type sig_type,
crypto/libecc/src/sig/bip0340.c
1030
verify_batch_scratch_pad *scratch_pad_area, u32 *scratch_pad_area_len)
crypto/libecc/src/sig/bip0340.c
1050
u32 i;
crypto/libecc/src/sig/bip0340.c
1056
u32 chacha20_scalar_counter = 1;
crypto/libecc/src/sig/bip0340.c
1102
(*scratch_pad_area_len) = (u32)expected_len;
crypto/libecc/src/sig/bip0340.c
1297
const u8 **m, const u32 *m_len, u32 num, ec_alg_type sig_type,
crypto/libecc/src/sig/bip0340.c
1299
verify_batch_scratch_pad *scratch_pad_area, u32 *scratch_pad_area_len)
crypto/libecc/src/sig/bip0340.c
162
const u8 *m, u32 mlen, int (*rand) (nn_t out, nn_src_t q),
crypto/libecc/src/sig/bip0340.c
45
ATTRIBUTE_WARN_UNUSED_RET static int _bip0340_hash(const u8 *tag, u32 tag_len,
crypto/libecc/src/sig/bip0340.c
46
const u8 *m, u32 m_len,
crypto/libecc/src/sig/bip0340.c
471
const u8 *chunk, u32 chunklen)
crypto/libecc/src/sig/bip0340.c
600
(n) = ( ((u32) (b)[(i) + 3]) << 24 ) \
crypto/libecc/src/sig/bip0340.c
601
| ( ((u32) (b)[(i) + 2]) << 16 ) \
crypto/libecc/src/sig/bip0340.c
602
| ( ((u32) (b)[(i) + 1]) << 8 ) \
crypto/libecc/src/sig/bip0340.c
603
| ( ((u32) (b)[(i) ]) ); \
crypto/libecc/src/sig/bip0340.c
627
#define _CHACHA20_ROTL_(x, y) (((x) << (y)) | ((x) >> ((sizeof(u32) * 8) - (y))))
crypto/libecc/src/sig/bip0340.c
628
#define CHACA20_ROTL(x, y) ((((y) < (sizeof(u32) * 8)) && ((y) > 0)) ? (_CHACHA20_ROTL_(x, y)) : (x))
crypto/libecc/src/sig/bip0340.c
658
ATTRIBUTE_WARN_UNUSED_RET static int _bip0340_chacha20_block(const u8 key[32], const u8 nonce[12], u32 block_counter, u8 *stream, u32 stream_len){
crypto/libecc/src/sig/bip0340.c
660
u32 state[16];
crypto/libecc/src/sig/bip0340.c
661
u32 initial_state[16];
crypto/libecc/src/sig/bip0340.c
688
u32 tmp = (u32)(state[i] + initial_state[i]);
crypto/libecc/src/sig/bip0340.c
697
ATTRIBUTE_WARN_UNUSED_RET static int _bip0340_compute_batch_csprng_one_scalar(const u8 *seed, u32 seedlen,
crypto/libecc/src/sig/bip0340.c
698
u8 *scalar, u32 scalar_len, u32 num)
crypto/libecc/src/sig/bip0340.c
717
ATTRIBUTE_WARN_UNUSED_RET static int _bip0340_compute_batch_csprng_scalars(const u8 *seed, u32 seedlen,
crypto/libecc/src/sig/bip0340.c
718
u8 *scalar, u32 scalar_len,
crypto/libecc/src/sig/bip0340.c
719
u32 *num, nn_src_t q,
crypto/libecc/src/sig/bip0340.c
724
u32 size, remain;
crypto/libecc/src/sig/bip0340.c
760
const u8 **m, const u32 *m_len, u32 num,
crypto/libecc/src/sig/bip0340.c
761
u8 p_len, u8 *seed, u32 seedlen)
crypto/libecc/src/sig/bip0340.c
764
u32 i;
crypto/libecc/src/sig/bip0340.c
809
const u8 **m, const u32 *m_len, u32 num, ec_alg_type sig_type,
crypto/libecc/src/sig/bip0340.c
830
u32 i;
crypto/libecc/src/sig/bip0340.c
833
u32 chacha20_scalar_counter = 1;
crypto/libecc/src/sig/dbign.c
63
const u8 *chunk, u32 chunklen)
crypto/libecc/src/sig/dbign.c
99
const u8 *chunk, u32 chunklen)
crypto/libecc/src/sig/decdsa.c
63
const u8 *chunk, u32 chunklen)
crypto/libecc/src/sig/decdsa.c
99
const u8 *chunk, u32 chunklen)
crypto/libecc/src/sig/ec_key.c
320
u32 len;
crypto/libecc/src/sig/ec_key.c
365
u32 len;
crypto/libecc/src/sig/ec_key.c
417
u32 len;
crypto/libecc/src/sig/ec_key.c
463
u32 len;
crypto/libecc/src/sig/ec_key.c
516
u32 len;
crypto/libecc/src/sig/ec_key.c
93
MUST_HAVE(((8 * (u32)priv_key_buf_len) >= (u32)blen), ret, err);
crypto/libecc/src/sig/ecdsa.c
47
const u8 *chunk, u32 chunklen)
crypto/libecc/src/sig/ecdsa.c
63
const u8 *chunk, u32 chunklen)
crypto/libecc/src/sig/ecdsa_common.c
293
const u8 *chunk, u32 chunklen, ec_alg_type key_type)
crypto/libecc/src/sig/ecdsa_common.c
678
const u8 *chunk, u32 chunklen, ec_alg_type key_type)
crypto/libecc/src/sig/ecfsdsa.c
1058
const u8 **m, const u32 *m_len, u32 num, ec_alg_type sig_type,
crypto/libecc/src/sig/ecfsdsa.c
1060
verify_batch_scratch_pad *scratch_pad_area, u32 *scratch_pad_area_len)
crypto/libecc/src/sig/ecfsdsa.c
151
MUST_HAVE(((u32)BYTECEIL(p_bit_len) <= NN_MAX_BYTE_LEN), ret, err);
crypto/libecc/src/sig/ecfsdsa.c
232
const u8 *chunk, u32 chunklen)
crypto/libecc/src/sig/ecfsdsa.c
513
const u8 *chunk, u32 chunklen)
crypto/libecc/src/sig/ecfsdsa.c
658
const u8 **m, const u32 *m_len, u32 num, ec_alg_type sig_type,
crypto/libecc/src/sig/ecfsdsa.c
677
u32 i;
crypto/libecc/src/sig/ecfsdsa.c
774
ret = hm->hfunc_update(&h_ctx, &sig[0], (u32)(2 * p_len)); EG(ret, err);
crypto/libecc/src/sig/ecfsdsa.c
840
const u8 **m, const u32 *m_len, u32 num, ec_alg_type sig_type,
crypto/libecc/src/sig/ecfsdsa.c
842
verify_batch_scratch_pad *scratch_pad_area, u32 *scratch_pad_area_len)
crypto/libecc/src/sig/ecfsdsa.c
860
u32 i;
crypto/libecc/src/sig/ecfsdsa.c
905
(*scratch_pad_area_len) = (u32)expected_len;
crypto/libecc/src/sig/ecfsdsa.c
991
ret = hm->hfunc_update(&h_ctx, &sig[0], (u32)(2 * p_len)); EG(ret, err);
crypto/libecc/src/sig/ecgdsa.c
159
const u8 *chunk, u32 chunklen)
crypto/libecc/src/sig/ecgdsa.c
221
MUST_HAVE(((u32)BYTECEIL(p_bit_len) <= NN_MAX_BYTE_LEN), ret, err);
crypto/libecc/src/sig/ecgdsa.c
477
const u8 *chunk, u32 chunklen)
crypto/libecc/src/sig/eckcdsa.c
269
const u8 *chunk, u32 chunklen)
crypto/libecc/src/sig/eckcdsa.c
666
const u8 *chunk, u32 chunklen)
crypto/libecc/src/sig/ecosdsa.c
60
const u8 *chunk, u32 chunklen)
crypto/libecc/src/sig/ecosdsa.c
82
const u8 *chunk, u32 chunklen)
crypto/libecc/src/sig/ecrdsa.c
176
const u8 *chunk, u32 chunklen)
crypto/libecc/src/sig/ecrdsa.c
475
const u8 *chunk, u32 chunklen)
crypto/libecc/src/sig/ecsdsa.c
60
const u8 *chunk, u32 chunklen)
crypto/libecc/src/sig/ecsdsa.c
80
const u8 *chunk, u32 chunklen)
crypto/libecc/src/sig/ecsdsa_common.c
244
const u8 *chunk, u32 chunklen)
crypto/libecc/src/sig/ecsdsa_common.c
557
const u8 *chunk, u32 chunklen)
crypto/libecc/src/sig/ecsdsa_common.c
587
u32 r_len;
crypto/libecc/src/sig/eddsa.c
1052
ATTRIBUTE_WARN_UNUSED_RET static int eddsa_compute_pre_hash(const u8 *message, u32 message_size,
crypto/libecc/src/sig/eddsa.c
1177
const u8 *chunk, u32 chunklen)
crypto/libecc/src/sig/eddsa.c
1558
const u8 *m, u32 mlen, int (*rand) (nn_t out, nn_src_t q),
crypto/libecc/src/sig/eddsa.c
2074
const u8 *chunk, u32 chunklen)
crypto/libecc/src/sig/eddsa.c
2282
const u8 **m, const u32 *m_len, u32 num, ec_alg_type sig_type,
crypto/libecc/src/sig/eddsa.c
2307
u32 i;
crypto/libecc/src/sig/eddsa.c
2584
const u8 **m, const u32 *m_len, u32 num, ec_alg_type sig_type,
crypto/libecc/src/sig/eddsa.c
2586
verify_batch_scratch_pad *scratch_pad_area, u32 *scratch_pad_area_len)
crypto/libecc/src/sig/eddsa.c
2611
u32 i;
crypto/libecc/src/sig/eddsa.c
2648
(*scratch_pad_area_len) = (u32)expected_len;
crypto/libecc/src/sig/eddsa.c
273
MUST_HAVE((((u32)blen) <= (8 * (u32)buf_size)), ret, err);
crypto/libecc/src/sig/eddsa.c
2908
const u8 **m, const u32 *m_len, u32 num, ec_alg_type sig_type,
crypto/libecc/src/sig/eddsa.c
2910
verify_batch_scratch_pad *scratch_pad_area, u32 *scratch_pad_area_len)
crypto/libecc/src/sig/eddsa.c
581
u32 in_len[2];
crypto/libecc/src/sig/fuzzing_ecdsa.c
327
MUST_HAVE(((u32)inputlen <= sizeof(hash)), ret, err);
crypto/libecc/src/sig/fuzzing_ecdsa.c
99
MUST_HAVE(((u32)inputlen <= sizeof(hash)), ret, err);
crypto/libecc/src/sig/fuzzing_ecgdsa.c
101
MUST_HAVE(((u32)inputlen <= sizeof(e_buf)), ret, err);
crypto/libecc/src/sig/fuzzing_ecgdsa.c
304
MUST_HAVE(((u32)inputlen <= sizeof(e_buf)), ret, err);
crypto/libecc/src/sig/fuzzing_ecgdsa.c
81
MUST_HAVE(((u32)BYTECEIL(p_bit_len) <= NN_MAX_BYTE_LEN), ret, err);
crypto/libecc/src/sig/fuzzing_ecrdsa.c
193
MUST_HAVE(((u32)inputlen <= sizeof(h_buf)), ret, err);
crypto/libecc/src/sig/fuzzing_ecrdsa.c
337
MUST_HAVE(((u32)inputlen <= sizeof(h_buf)), ret, err);
crypto/libecc/src/sig/sig_algs.c
1011
ATTRIBUTE_WARN_UNUSED_RET static int _bubble_sort(verify_batch_scratch_pad *elements, u32 num)
crypto/libecc/src/sig/sig_algs.c
1013
u32 i, j;
crypto/libecc/src/sig/sig_algs.c
1022
u32 indexj, indexj_next;
crypto/libecc/src/sig/sig_algs.c
1052
int ec_verify_bos_coster(verify_batch_scratch_pad *elements, u32 num, bitcnt_t bits)
crypto/libecc/src/sig/sig_algs.c
1055
u32 i, index0, index1, max_bos_coster_iterations;
crypto/libecc/src/sig/sig_algs.c
400
int ec_sign_update(struct ec_sign_context *ctx, const u8 *chunk, u32 chunklen)
crypto/libecc/src/sig/sig_algs.c
455
const u8 *m, u32 mlen,
crypto/libecc/src/sig/sig_algs.c
474
const u8 *m, u32 mlen,
crypto/libecc/src/sig/sig_algs.c
498
const u8 *m, u32 mlen,
crypto/libecc/src/sig/sig_algs.c
589
const u8 *chunk, u32 chunklen)
crypto/libecc/src/sig/sig_algs.c
639
const u8 *m, u32 mlen,
crypto/libecc/src/sig/sig_algs.c
656
const u8 *m, u32 mlen,
crypto/libecc/src/sig/sig_algs.c
676
const u8 **m, const u32 *m_len, u32 num, ec_alg_type sig_type,
crypto/libecc/src/sig/sig_algs.c
678
verify_batch_scratch_pad *scratch_pad_area, u32 *scratch_pad_area_len)
crypto/libecc/src/sig/sig_algs.c
702
int ec_structured_sig_import_from_buf(u8 *sig, u32 siglen,
crypto/libecc/src/sig/sig_algs.c
703
const u8 *out_buf, u32 outlen,
crypto/libecc/src/sig/sig_algs.c
708
u32 metadata_len = (3 * sizeof(u8));
crypto/libecc/src/sig/sig_algs.c
740
int ec_structured_sig_export_to_buf(const u8 *sig, u32 siglen,
crypto/libecc/src/sig/sig_algs.c
741
u8 *out_buf, u32 outlen,
crypto/libecc/src/sig/sig_algs.c
747
u32 metadata_len = (3 * sizeof(u8));
crypto/libecc/src/sig/sig_algs.c
748
u32 len;
crypto/libecc/src/sig/sig_algs.c
794
const u8 *chunk, u32 chunklen)
crypto/libecc/src/sig/sig_algs.c
829
const u8 *chunk, u32 chunklen)
crypto/libecc/src/sig/sig_algs.c
851
const u8 **m, const u32 *m_len, u32 num, ec_alg_type sig_type,
crypto/libecc/src/sig/sig_algs.c
853
verify_batch_scratch_pad *scratch_pad_area, u32 *scratch_pad_area_len)
crypto/libecc/src/sig/sm2.c
191
ret = prj_pt_export_to_aff_buf(G, buf, (u32)(2 * p_len)); EG(ret, err);
crypto/libecc/src/sig/sm2.c
192
ret = hm->hfunc_update(&hctx, buf, (u32)(2 * p_len)); EG(ret, err);
crypto/libecc/src/sig/sm2.c
195
ret = prj_pt_export_to_aff_buf(Y, buf, (u32)(2 * p_len)); EG(ret, err);
crypto/libecc/src/sig/sm2.c
196
ret = hm->hfunc_update(&hctx, buf, (u32)(2 * p_len)); EG(ret, err);
crypto/libecc/src/sig/sm2.c
289
const u8 *chunk, u32 chunklen)
crypto/libecc/src/sig/sm2.c
589
const u8 *chunk, u32 chunklen)
crypto/libecc/src/tests/ec_self_tests.c
184
u32 len;
crypto/libecc/src/tests/ec_self_tests_core.c
1006
u32 ret_;
crypto/libecc/src/tests/ec_self_tests_core.c
1197
u32 ret_;
crypto/libecc/src/tests/ec_self_tests_core.c
124
const u8 *m, u32 mlen,
crypto/libecc/src/tests/ec_self_tests_core.c
130
u32 consumed;
crypto/libecc/src/tests/ec_self_tests_core.c
1352
u32 len;
crypto/libecc/src/tests/ec_self_tests_core.c
146
u32 toconsume = 0;
crypto/libecc/src/tests/ec_self_tests_core.c
1708
u32 messages_len[PERF_BATCH_VERIFICATION];
crypto/libecc/src/tests/ec_self_tests_core.c
1714
u32 scratch_pad_area_len = sizeof(scratch_pad_area);
crypto/libecc/src/tests/ec_self_tests_core.c
174
const u8 *m, u32 mlen,
crypto/libecc/src/tests/ec_self_tests_core.c
1785
u32 len;
crypto/libecc/src/tests/ec_self_tests_core.c
179
u32 consumed;
crypto/libecc/src/tests/ec_self_tests_core.c
191
u32 toconsume = 0;
crypto/libecc/src/tests/ec_self_tests_core.c
378
const u32 messages_len[] = { msglen };
crypto/libecc/src/tests/ec_self_tests_core.c
412
u32 ilens[2] = { msglen , 0 };
crypto/libecc/src/tests/ec_self_tests_core.c
471
u32 ilens[2] = { msglen , 0 };
crypto/libecc/src/tests/ec_self_tests_core.c
525
u32 messages_len[MAX_BATCH_SIG_SIZE];
crypto/libecc/src/tests/ec_self_tests_core.c
532
u32 num_batch, i, current;
crypto/libecc/src/tests/ec_self_tests_core.c
598
u32 scratch_pad_area_len = 0;
crypto/libecc/src/tests/ec_self_tests_core.c
708
const u32 messages_len[] = { c->msglen };
crypto/libecc/src/tests/ec_self_tests_core.c
828
u32 ilens[2] = { c->msglen , 0 };
crypto/libecc/src/tests/ec_self_tests_core.c
888
u32 ilens[2] = { c->msglen , 0 };
crypto/libecc/src/tests/ec_self_tests_core.c
929
MUST_HAVE((u32)noncelen <= sizeof(nonce), ret, err);
crypto/libecc/src/tests/ec_self_tests_core.h
41
u32 msglen;
crypto/libecc/src/tests/ec_self_tests_core.h
5708
static int encode_error_value(const ec_test_case *c, test_err_kind failed_test, u32 *err_val)
crypto/libecc/src/tests/ec_self_tests_core.h
5721
*err_val = (((u32)ctype << 24) |
crypto/libecc/src/tests/ec_self_tests_core.h
5722
((u32)stype << 16) |
crypto/libecc/src/tests/ec_self_tests_core.h
5723
((u32)htype << 8) |
crypto/libecc/src/tests/ec_self_tests_core.h
5724
((u32)etype));
crypto/libecc/src/tests/ec_self_tests_core.h
5731
static inline int ecdh_encode_error_value(const ecdh_test_case *c, test_err_kind failed_test, u32 *err_val)
crypto/libecc/src/tests/ec_self_tests_core.h
5743
*err_val = (((u32)ctype << 24) |
crypto/libecc/src/tests/ec_self_tests_core.h
5744
((u32)stype << 16) |
crypto/libecc/src/tests/ec_self_tests_core.h
5745
((u32)0 << 8) |
crypto/libecc/src/tests/ec_self_tests_core.h
5746
((u32)etype));
crypto/libecc/src/tests/ec_utils.c
117
u32 i;
crypto/libecc/src/tests/ec_utils.c
1284
ret = ec_verify_update(&verif_ctx, buf, (u32)read);
crypto/libecc/src/tests/ec_utils.c
1346
ret = ec_verify(sig, siglen, &pub_key, allocated_buff, (u32)offset, sig_type, hash_type, (const u8*)adata, adata_len);
crypto/libecc/src/tests/ec_utils.c
1595
u32 len;
crypto/libecc/src/tests/ec_utils.c
176
u32 curve_name_len;
crypto/libecc/src/tests/ec_utils.c
238
u32 len;
crypto/libecc/src/tests/ec_utils.c
278
ret = local_strncat(fname, "_private_key.bin", (u32)(fname_len - prefix_len)); EG(ret, err);
crypto/libecc/src/tests/ec_utils.c
298
ret = local_strncat(fname, "_private_key.h", (u32)(fname_len - prefix_len)); EG(ret, err);
crypto/libecc/src/tests/ec_utils.c
321
ret = local_strncat(fname, "_public_key.bin", (u32)(fname_len - prefix_len)); EG(ret, err);
crypto/libecc/src/tests/ec_utils.c
340
ret = local_strncat(fname, "_public_key.h", (u32)(fname_len - prefix_len)); EG(ret, err);
crypto/libecc/src/tests/ec_utils.c
371
const u8 *sig, u32 siglen,
crypto/libecc/src/tests/ec_utils.c
39
u32 magic; /* header header */
crypto/libecc/src/tests/ec_utils.c
40
u32 type; /* Type of the signed image */
crypto/libecc/src/tests/ec_utils.c
41
u32 version; /* Version */
crypto/libecc/src/tests/ec_utils.c
42
u32 len; /* length of data after header */
crypto/libecc/src/tests/ec_utils.c
43
u32 siglen; /* length of sig (on header + data) */
crypto/libecc/src/tests/ec_utils.c
509
*outsz = (u32)size;
crypto/libecc/src/tests/ec_utils.c
558
hdr->version = (u32)ver;
crypto/libecc/src/tests/ec_utils.c
590
hdr->len = (u32)len;
crypto/libecc/src/tests/ec_utils.c
61
u32 i;
crypto/libecc/src/tests/ec_utils.c
809
ret = ec_sign_update(&sig_ctx, buf, (u32)read);
crypto/libecc/src/tests/ec_utils.c
898
ret = ec_sign(sig, siglen, &key_pair, allocated_buff, (u32)offset, sig_type, hash_type, (const u8*)adata, adata_len);
crypto/libecc/src/utils/print_buf.c
17
u32 i;
crypto/libecc/src/utils/print_buf.c
24
for (i = 0; i < (u32)buflen; i++) {
crypto/libecc/src/utils/utils.c
123
int are_str_equal_nlen(const char *s1, const char *s2, u32 maxlen, int *check)
crypto/libecc/src/utils/utils.c
126
u32 i = 0;
crypto/libecc/src/utils/utils.c
151
int local_strlen(const char *s, u32 *len)
crypto/libecc/src/utils/utils.c
153
u32 i = 0;
crypto/libecc/src/utils/utils.c
174
int local_strnlen(const char *s, u32 maxlen, u32 *len)
crypto/libecc/src/utils/utils.c
176
u32 i = 0;
crypto/libecc/src/utils/utils.c
195
int local_strncpy(char *dst, const char *src, u32 n)
crypto/libecc/src/utils/utils.c
197
u32 i;
crypto/libecc/src/utils/utils.c
217
int local_strncat(char *dst, const char *src, u32 n)
crypto/libecc/src/utils/utils.c
219
u32 dst_len, i;
crypto/libecc/src/utils/utils.c
24
int are_equal(const void *a, const void *b, u32 len, int *check)
crypto/libecc/src/utils/utils.c
28
u32 i;
crypto/libecc/src/utils/utils.c
49
int local_memcpy(void *dst, const void *src, u32 n)
crypto/libecc/src/utils/utils.c
53
u32 i;
crypto/libecc/src/utils/utils.c
74
int local_memset(void *v, u8 c, u32 n)
crypto/libecc/src/utils/utils.c
77
u32 i;
crypto/openssh/chacha.c
21
#define U32V(v) ((u32)(v) & U32C(0xFFFFFFFF))
crypto/openssh/chacha.c
27
(((u32)((p)[0]) ) | \
crypto/openssh/chacha.c
28
((u32)((p)[1]) << 8) | \
crypto/openssh/chacha.c
29
((u32)((p)[2]) << 16) | \
crypto/openssh/chacha.c
30
((u32)((p)[3]) << 24))
crypto/openssh/chacha.c
55
chacha_keysetup(chacha_ctx *x,const u8 *k,u32 kbits)
crypto/openssh/chacha.c
89
chacha_encrypt_bytes(chacha_ctx *x,const u8 *m,u8 *c,u32 bytes)
crypto/openssh/chacha.c
91
u32 x0, x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15;
crypto/openssh/chacha.c
92
u32 j0, j1, j2, j3, j4, j5, j6, j7, j8, j9, j10, j11, j12, j13, j14, j15;
crypto/openssh/cipher-aesctr.c
33
aesctr_inc(u8 *ctr, u32 len)
crypto/openssh/cipher-aesctr.c
57
aesctr_keysetup(aesctr_ctx *x,const u8 *k,u32 kbits,u32 ivbits)
crypto/openssh/cipher-aesctr.c
69
aesctr_encrypt_bytes(aesctr_ctx *x,const u8 *m,u8 *c,u32 bytes)
crypto/openssh/cipher-aesctr.c
71
u32 n = 0;
crypto/openssh/cipher-aesctr.h
27
u32 ek[4*(AES_MAXROUNDS + 1)]; /* encrypt key schedule */
crypto/openssh/cipher-aesctr.h
31
void aesctr_keysetup(aesctr_ctx *x,const u8 *k,u32 kbits,u32 ivbits);
crypto/openssh/cipher-aesctr.h
33
void aesctr_encrypt_bytes(aesctr_ctx *x,const u8 *m,u8 *c,u32 bytes);
crypto/openssh/openbsd-compat/chacha_private.h
16
u32 input[16]; /* could be compressed */
crypto/openssh/openbsd-compat/chacha_private.h
23
#define U32V(v) ((u32)(v) & U32C(0xFFFFFFFF))
crypto/openssh/openbsd-compat/chacha_private.h
29
(((u32)((p)[0]) ) | \
crypto/openssh/openbsd-compat/chacha_private.h
30
((u32)((p)[1]) << 8) | \
crypto/openssh/openbsd-compat/chacha_private.h
31
((u32)((p)[2]) << 16) | \
crypto/openssh/openbsd-compat/chacha_private.h
32
((u32)((p)[3]) << 24))
crypto/openssh/openbsd-compat/chacha_private.h
57
chacha_keysetup(chacha_ctx *x,const u8 *k,u32 kbits)
crypto/openssh/openbsd-compat/chacha_private.h
91
chacha_encrypt_bytes(chacha_ctx *x,const u8 *m,u8 *c,u32 bytes)
crypto/openssh/openbsd-compat/chacha_private.h
93
u32 x0, x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15;
crypto/openssh/openbsd-compat/chacha_private.h
94
u32 j0, j1, j2, j3, j4, j5, j6, j7, j8, j9, j10, j11, j12, j13, j14, j15;
crypto/openssh/regress/unittests/sshbuf/test_sshbuf_getput_fuzz.c
46
u_int32_t u32;
crypto/openssh/regress/unittests/sshbuf/test_sshbuf_getput_fuzz.c
54
sshbuf_get_u32(p1, &u32);
crypto/openssh/rijndael.c
117
static const u32 Te1[256] = {
crypto/openssh/rijndael.c
183
static const u32 Te2[256] = {
crypto/openssh/rijndael.c
249
static const u32 Te3[256] = {
crypto/openssh/rijndael.c
316
static const u32 Td0[256] = {
crypto/openssh/rijndael.c
382
static const u32 Td1[256] = {
crypto/openssh/rijndael.c
448
static const u32 Td2[256] = {
crypto/openssh/rijndael.c
51
static const u32 Te0[256] = {
crypto/openssh/rijndael.c
514
static const u32 Td3[256] = {
crypto/openssh/rijndael.c
615
static const u32 rcon[] = {
crypto/openssh/rijndael.c
621
#define GETU32(pt) (((u32)(pt)[0] << 24) ^ ((u32)(pt)[1] << 16) ^ ((u32)(pt)[2] << 8) ^ ((u32)(pt)[3]))
crypto/openssh/rijndael.c
630
rijndaelKeySetupEnc(u32 rk[/*4*(Nr + 1)*/], const u8 cipherKey[], int keyBits)
crypto/openssh/rijndael.c
633
u32 temp;
crypto/openssh/rijndael.c
718
rijndaelKeySetupDec(u32 rk[/*4*(Nr + 1)*/], const u8 cipherKey[], int keyBits)
crypto/openssh/rijndael.c
721
u32 temp;
crypto/openssh/rijndael.c
762
rijndaelEncrypt(const u32 rk[/*4*(Nr + 1)*/], int Nr, const u8 pt[16],
crypto/openssh/rijndael.c
765
u32 s0, s1, s2, s3, t0, t1, t2, t3;
crypto/openssh/rijndael.c
947
rijndaelDecrypt(const u32 rk[/*4*(Nr + 1)*/], int Nr, const u8 ct[16],
crypto/openssh/rijndael.c
950
u32 s0, s1, s2, s3, t0, t1, t2, t3;
crypto/openssh/rijndael.h
47
u32 ek[4*(AES_MAXROUNDS + 1)]; /* encrypt key schedule */
crypto/openssh/rijndael.h
48
u32 dk[4*(AES_MAXROUNDS + 1)]; /* decrypt key schedule */
crypto/openssh/umac.c
173
rijndaelEncrypt((u32 *)(int_key), AES_ROUNDS, (u8 *)(in), (u8 *)(out))
crypto/openssh/umac.c
175
rijndaelKeySetupEnc((u32 *)(int_key), (const unsigned char *)(key), \
crypto/openssl/crypto/aes/aes_core.c
1222
static const u32 Te2[256] = {
crypto/openssl/crypto/aes/aes_core.c
145
static void SubWord(u32 *w)
crypto/openssl/crypto/aes/aes_core.c
147
u32 x, y, a1, a2, a3, a4, a5, a6;
crypto/openssl/crypto/aes/aes_core.c
1480
static const u32 Te3[256] = {
crypto/openssl/crypto/aes/aes_core.c
1739
static const u32 Td0[256] = {
crypto/openssl/crypto/aes/aes_core.c
1997
static const u32 Td1[256] = {
crypto/openssl/crypto/aes/aes_core.c
2255
static const u32 Td2[256] = {
crypto/openssl/crypto/aes/aes_core.c
2513
static const u32 Td3[256] = {
crypto/openssl/crypto/aes/aes_core.c
3029
static const u32 rcon[] = {
crypto/openssl/crypto/aes/aes_core.c
3049
u32 *rk;
crypto/openssl/crypto/aes/aes_core.c
3051
u32 temp;
crypto/openssl/crypto/aes/aes_core.c
3132
u32 *rk;
crypto/openssl/crypto/aes/aes_core.c
3134
u32 temp;
crypto/openssl/crypto/aes/aes_core.c
3177
const u32 *rk;
crypto/openssl/crypto/aes/aes_core.c
3178
u32 s0, s1, s2, s3, t0, t1, t2, t3;
crypto/openssl/crypto/aes/aes_core.c
3309
const u32 *rk;
crypto/openssl/crypto/aes/aes_core.c
3310
u32 s0, s1, s2, s3, t0, t1, t2, t3;
crypto/openssl/crypto/aes/aes_core.c
3423
s0 = ((u32)Td4[(t0 >> 24)] << 24) ^ ((u32)Td4[(t3 >> 16) & 0xff] << 16) ^ ((u32)Td4[(t2 >> 8) & 0xff] << 8) ^ ((u32)Td4[(t1) & 0xff]) ^ rk[0];
crypto/openssl/crypto/aes/aes_core.c
3425
s1 = ((u32)Td4[(t1 >> 24)] << 24) ^ ((u32)Td4[(t0 >> 16) & 0xff] << 16) ^ ((u32)Td4[(t3 >> 8) & 0xff] << 8) ^ ((u32)Td4[(t2) & 0xff]) ^ rk[1];
crypto/openssl/crypto/aes/aes_core.c
3427
s2 = ((u32)Td4[(t2 >> 24)] << 24) ^ ((u32)Td4[(t1 >> 16) & 0xff] << 16) ^ ((u32)Td4[(t0 >> 8) & 0xff] << 8) ^ ((u32)Td4[(t3) & 0xff]) ^ rk[2];
crypto/openssl/crypto/aes/aes_core.c
3429
s3 = ((u32)Td4[(t3 >> 24)] << 24) ^ ((u32)Td4[(t2 >> 16) & 0xff] << 16) ^ ((u32)Td4[(t1 >> 8) & 0xff] << 8) ^ ((u32)Td4[(t0) & 0xff]) ^ rk[3];
crypto/openssl/crypto/aes/aes_core.c
3469
static const u32 rcon[] = {
crypto/openssl/crypto/aes/aes_core.c
3488
u32 *rk;
crypto/openssl/crypto/aes/aes_core.c
3490
u32 temp;
crypto/openssl/crypto/aes/aes_core.c
3513
rk[4] = rk[0] ^ ((u32)Te4[(temp >> 16) & 0xff] << 24) ^ ((u32)Te4[(temp >> 8) & 0xff] << 16) ^ ((u32)Te4[(temp) & 0xff] << 8) ^ ((u32)Te4[(temp >> 24)]) ^ rcon[i];
crypto/openssl/crypto/aes/aes_core.c
3528
rk[6] = rk[0] ^ ((u32)Te4[(temp >> 16) & 0xff] << 24) ^ ((u32)Te4[(temp >> 8) & 0xff] << 16) ^ ((u32)Te4[(temp) & 0xff] << 8) ^ ((u32)Te4[(temp >> 24)]) ^ rcon[i];
crypto/openssl/crypto/aes/aes_core.c
3545
rk[8] = rk[0] ^ ((u32)Te4[(temp >> 16) & 0xff] << 24) ^ ((u32)Te4[(temp >> 8) & 0xff] << 16) ^ ((u32)Te4[(temp) & 0xff] << 8) ^ ((u32)Te4[(temp >> 24)]) ^ rcon[i];
crypto/openssl/crypto/aes/aes_core.c
3553
rk[12] = rk[4] ^ ((u32)Te4[(temp >> 24)] << 24) ^ ((u32)Te4[(temp >> 16) & 0xff] << 16) ^ ((u32)Te4[(temp >> 8) & 0xff] << 8) ^ ((u32)Te4[(temp) & 0xff]);
crypto/openssl/crypto/aes/aes_core.c
3571
u32 *rk;
crypto/openssl/crypto/aes/aes_core.c
3573
u32 temp;
crypto/openssl/crypto/aes/aes_core.c
3601
u32 tp1, tp2, tp4, tp8, tp9, tpb, tpd, tpe, m;
crypto/openssl/crypto/aes/aes_core.c
586
static void RotWord(u32 *x)
crypto/openssl/crypto/aes/aes_core.c
602
u32 rcon;
crypto/openssl/crypto/aes/aes_core.c
604
u32 temp;
crypto/openssl/crypto/aes/aes_core.c
65
u32 w[2];
crypto/openssl/crypto/aes/aes_core.c
706
static const u32 Te0[256] = {
crypto/openssl/crypto/aes/aes_core.c
73
static void XtimeWord(u32 *w)
crypto/openssl/crypto/aes/aes_core.c
75
u32 a, b;
crypto/openssl/crypto/aes/aes_core.c
964
static const u32 Te1[256] = {
crypto/openssl/crypto/aes/aes_local.h
20
#define GETU32(p) SWAP(*((u32 *)(p)))
crypto/openssl/crypto/aes/aes_local.h
23
*((u32 *)(ct)) = SWAP((st)); \
crypto/openssl/crypto/aes/aes_local.h
26
#define GETU32(pt) (((u32)(pt)[0] << 24) ^ ((u32)(pt)[1] << 16) ^ ((u32)(pt)[2] << 8) ^ ((u32)(pt)[3]))
crypto/openssl/crypto/aes/aes_x86core.c
115
#define Te0 (u32)((u64 *)((u8 *)Te + 0))
crypto/openssl/crypto/aes/aes_x86core.c
116
#define Te1 (u32)((u64 *)((u8 *)Te + 3))
crypto/openssl/crypto/aes/aes_x86core.c
117
#define Te2 (u32)((u64 *)((u8 *)Te + 2))
crypto/openssl/crypto/aes/aes_x86core.c
118
#define Te3 (u32)((u64 *)((u8 *)Te + 1))
crypto/openssl/crypto/aes/aes_x86core.c
127
#define Td0 (u32)((u64 *)((u8 *)Td + 0))
crypto/openssl/crypto/aes/aes_x86core.c
128
#define Td1 (u32)((u64 *)((u8 *)Td + 3))
crypto/openssl/crypto/aes/aes_x86core.c
129
#define Td2 (u32)((u64 *)((u8 *)Td + 2))
crypto/openssl/crypto/aes/aes_x86core.c
130
#define Td3 (u32)((u64 *)((u8 *)Td + 1))
crypto/openssl/crypto/aes/aes_x86core.c
463
static const u32 rcon[] = {
crypto/openssl/crypto/aes/aes_x86core.c
483
u32 *rk;
crypto/openssl/crypto/aes/aes_x86core.c
485
u32 temp;
crypto/openssl/crypto/aes/aes_x86core.c
508
rk[4] = rk[0] ^ ((u32)Te4[(temp >> 8) & 0xff]) ^ ((u32)Te4[(temp >> 16) & 0xff] << 8) ^ ((u32)Te4[(temp >> 24)] << 16) ^ ((u32)Te4[(temp) & 0xff] << 24) ^ rcon[i];
crypto/openssl/crypto/aes/aes_x86core.c
523
rk[6] = rk[0] ^ ((u32)Te4[(temp >> 8) & 0xff]) ^ ((u32)Te4[(temp >> 16) & 0xff] << 8) ^ ((u32)Te4[(temp >> 24)] << 16) ^ ((u32)Te4[(temp) & 0xff] << 24) ^ rcon[i];
crypto/openssl/crypto/aes/aes_x86core.c
540
rk[8] = rk[0] ^ ((u32)Te4[(temp >> 8) & 0xff]) ^ ((u32)Te4[(temp >> 16) & 0xff] << 8) ^ ((u32)Te4[(temp >> 24)] << 16) ^ ((u32)Te4[(temp) & 0xff] << 24) ^ rcon[i];
crypto/openssl/crypto/aes/aes_x86core.c
548
rk[12] = rk[4] ^ ((u32)Te4[(temp) & 0xff]) ^ ((u32)Te4[(temp >> 8) & 0xff] << 8) ^ ((u32)Te4[(temp >> 16) & 0xff] << 16) ^ ((u32)Te4[(temp >> 24)] << 24);
crypto/openssl/crypto/aes/aes_x86core.c
566
u32 *rk;
crypto/openssl/crypto/aes/aes_x86core.c
568
u32 temp;
crypto/openssl/crypto/aes/aes_x86core.c
597
u32 tp1, tp2, tp4, tp8, tp9, tpb, tpd, tpe, m;
crypto/openssl/crypto/aes/aes_x86core.c
634
const u32 *rk;
crypto/openssl/crypto/aes/aes_x86core.c
635
u32 s0, s1, s2, s3, t[4];
crypto/openssl/crypto/aes/aes_x86core.c
653
t[0] = (u32)Te4[(s0) & 0xff] ^ (u32)Te4[(s1 >> 8) & 0xff] << 8 ^ (u32)Te4[(s2 >> 16) & 0xff] << 16 ^ (u32)Te4[(s3 >> 24)] << 24;
crypto/openssl/crypto/aes/aes_x86core.c
654
t[1] = (u32)Te4[(s1) & 0xff] ^ (u32)Te4[(s2 >> 8) & 0xff] << 8 ^ (u32)Te4[(s3 >> 16) & 0xff] << 16 ^ (u32)Te4[(s0 >> 24)] << 24;
crypto/openssl/crypto/aes/aes_x86core.c
655
t[2] = (u32)Te4[(s2) & 0xff] ^ (u32)Te4[(s3 >> 8) & 0xff] << 8 ^ (u32)Te4[(s0 >> 16) & 0xff] << 16 ^ (u32)Te4[(s1 >> 24)] << 24;
crypto/openssl/crypto/aes/aes_x86core.c
656
t[3] = (u32)Te4[(s3) & 0xff] ^ (u32)Te4[(s0 >> 8) & 0xff] << 8 ^ (u32)Te4[(s1 >> 16) & 0xff] << 16 ^ (u32)Te4[(s2 >> 24)] << 24;
crypto/openssl/crypto/aes/aes_x86core.c
661
u32 r0, r1, r2;
crypto/openssl/crypto/aes/aes_x86core.c
691
t[0] = (u32)Te4[(s0) & 0xff] ^ (u32)Te4[(s1 >> 8) & 0xff] << 8 ^ (u32)Te4[(s2 >> 16) & 0xff] << 16 ^ (u32)Te4[(s3 >> 24)] << 24;
crypto/openssl/crypto/aes/aes_x86core.c
692
t[1] = (u32)Te4[(s1) & 0xff] ^ (u32)Te4[(s2 >> 8) & 0xff] << 8 ^ (u32)Te4[(s3 >> 16) & 0xff] << 16 ^ (u32)Te4[(s0 >> 24)] << 24;
crypto/openssl/crypto/aes/aes_x86core.c
693
t[2] = (u32)Te4[(s2) & 0xff] ^ (u32)Te4[(s3 >> 8) & 0xff] << 8 ^ (u32)Te4[(s0 >> 16) & 0xff] << 16 ^ (u32)Te4[(s1 >> 24)] << 24;
crypto/openssl/crypto/aes/aes_x86core.c
694
t[3] = (u32)Te4[(s3) & 0xff] ^ (u32)Te4[(s0 >> 8) & 0xff] << 8 ^ (u32)Te4[(s1 >> 16) & 0xff] << 16 ^ (u32)Te4[(s2 >> 24)] << 24;
crypto/openssl/crypto/aes/aes_x86core.c
699
u32 r0, r1, r2;
crypto/openssl/crypto/aes/aes_x86core.c
731
*(u32 *)(out + 0) = (u32)Te4[(s0) & 0xff] ^ (u32)Te4[(s1 >> 8) & 0xff] << 8 ^ (u32)Te4[(s2 >> 16) & 0xff] << 16 ^ (u32)Te4[(s3 >> 24)] << 24 ^ rk[0];
crypto/openssl/crypto/aes/aes_x86core.c
732
*(u32 *)(out + 4) = (u32)Te4[(s1) & 0xff] ^ (u32)Te4[(s2 >> 8) & 0xff] << 8 ^ (u32)Te4[(s3 >> 16) & 0xff] << 16 ^ (u32)Te4[(s0 >> 24)] << 24 ^ rk[1];
crypto/openssl/crypto/aes/aes_x86core.c
733
*(u32 *)(out + 8) = (u32)Te4[(s2) & 0xff] ^ (u32)Te4[(s3 >> 8) & 0xff] << 8 ^ (u32)Te4[(s0 >> 16) & 0xff] << 16 ^ (u32)Te4[(s1 >> 24)] << 24 ^ rk[2];
crypto/openssl/crypto/aes/aes_x86core.c
734
*(u32 *)(out + 12) = (u32)Te4[(s3) & 0xff] ^ (u32)Te4[(s0 >> 8) & 0xff] << 8 ^ (u32)Te4[(s1 >> 16) & 0xff] << 16 ^ (u32)Te4[(s2 >> 24)] << 24 ^ rk[3];
crypto/openssl/crypto/aes/aes_x86core.c
736
*(u32 *)(out + 0) = (Te2[(s0) & 0xff] & 0x000000ffU) ^ (Te3[(s1 >> 8) & 0xff] & 0x0000ff00U) ^ (Te0[(s2 >> 16) & 0xff] & 0x00ff0000U) ^ (Te1[(s3 >> 24)] & 0xff000000U) ^ rk[0];
crypto/openssl/crypto/aes/aes_x86core.c
737
*(u32 *)(out + 4) = (Te2[(s1) & 0xff] & 0x000000ffU) ^ (Te3[(s2 >> 8) & 0xff] & 0x0000ff00U) ^ (Te0[(s3 >> 16) & 0xff] & 0x00ff0000U) ^ (Te1[(s0 >> 24)] & 0xff000000U) ^ rk[1];
crypto/openssl/crypto/aes/aes_x86core.c
738
*(u32 *)(out + 8) = (Te2[(s2) & 0xff] & 0x000000ffU) ^ (Te3[(s3 >> 8) & 0xff] & 0x0000ff00U) ^ (Te0[(s0 >> 16) & 0xff] & 0x00ff0000U) ^ (Te1[(s1 >> 24)] & 0xff000000U) ^ rk[2];
crypto/openssl/crypto/aes/aes_x86core.c
739
*(u32 *)(out + 12) = (Te2[(s3) & 0xff] & 0x000000ffU) ^ (Te3[(s0 >> 8) & 0xff] & 0x0000ff00U) ^ (Te0[(s1 >> 16) & 0xff] & 0x00ff0000U) ^ (Te1[(s2 >> 24)] & 0xff000000U) ^ rk[3];
crypto/openssl/crypto/aes/aes_x86core.c
751
const u32 *rk;
crypto/openssl/crypto/aes/aes_x86core.c
752
u32 s0, s1, s2, s3, t[4];
crypto/openssl/crypto/aes/aes_x86core.c
770
t[0] = (u32)Td4[(s0) & 0xff] ^ (u32)Td4[(s3 >> 8) & 0xff] << 8 ^ (u32)Td4[(s2 >> 16) & 0xff] << 16 ^ (u32)Td4[(s1 >> 24)] << 24;
crypto/openssl/crypto/aes/aes_x86core.c
771
t[1] = (u32)Td4[(s1) & 0xff] ^ (u32)Td4[(s0 >> 8) & 0xff] << 8 ^ (u32)Td4[(s3 >> 16) & 0xff] << 16 ^ (u32)Td4[(s2 >> 24)] << 24;
crypto/openssl/crypto/aes/aes_x86core.c
772
t[2] = (u32)Td4[(s2) & 0xff] ^ (u32)Td4[(s1 >> 8) & 0xff] << 8 ^ (u32)Td4[(s0 >> 16) & 0xff] << 16 ^ (u32)Td4[(s3 >> 24)] << 24;
crypto/openssl/crypto/aes/aes_x86core.c
773
t[3] = (u32)Td4[(s3) & 0xff] ^ (u32)Td4[(s2 >> 8) & 0xff] << 8 ^ (u32)Td4[(s1 >> 16) & 0xff] << 16 ^ (u32)Td4[(s0 >> 24)] << 24;
crypto/openssl/crypto/aes/aes_x86core.c
778
u32 tp1, tp2, tp4, tp8, tp9, tpb, tpd, tpe, m;
crypto/openssl/crypto/aes/aes_x86core.c
80
#define GETU32(p) (*((u32 *)(p)))
crypto/openssl/crypto/aes/aes_x86core.c
816
t[0] = (u32)Td4[(s0) & 0xff] ^ (u32)Td4[(s3 >> 8) & 0xff] << 8 ^ (u32)Td4[(s2 >> 16) & 0xff] << 16 ^ (u32)Td4[(s1 >> 24)] << 24;
crypto/openssl/crypto/aes/aes_x86core.c
817
t[1] = (u32)Td4[(s1) & 0xff] ^ (u32)Td4[(s0 >> 8) & 0xff] << 8 ^ (u32)Td4[(s3 >> 16) & 0xff] << 16 ^ (u32)Td4[(s2 >> 24)] << 24;
crypto/openssl/crypto/aes/aes_x86core.c
818
t[2] = (u32)Td4[(s2) & 0xff] ^ (u32)Td4[(s1 >> 8) & 0xff] << 8 ^ (u32)Td4[(s0 >> 16) & 0xff] << 16 ^ (u32)Td4[(s3 >> 24)] << 24;
crypto/openssl/crypto/aes/aes_x86core.c
819
t[3] = (u32)Td4[(s3) & 0xff] ^ (u32)Td4[(s2 >> 8) & 0xff] << 8 ^ (u32)Td4[(s1 >> 16) & 0xff] << 16 ^ (u32)Td4[(s0 >> 24)] << 24;
crypto/openssl/crypto/aes/aes_x86core.c
824
u32 tp1, tp2, tp4, tp8, tp9, tpb, tpd, tpe, m;
crypto/openssl/crypto/aes/aes_x86core.c
863
*(u32 *)(out + 0) = ((u32)Td4[(s0) & 0xff]) ^ ((u32)Td4[(s3 >> 8) & 0xff] << 8) ^ ((u32)Td4[(s2 >> 16) & 0xff] << 16) ^ ((u32)Td4[(s1 >> 24)] << 24) ^ rk[0];
crypto/openssl/crypto/aes/aes_x86core.c
864
*(u32 *)(out + 4) = ((u32)Td4[(s1) & 0xff]) ^ ((u32)Td4[(s0 >> 8) & 0xff] << 8) ^ ((u32)Td4[(s3 >> 16) & 0xff] << 16) ^ ((u32)Td4[(s2 >> 24)] << 24) ^ rk[1];
crypto/openssl/crypto/aes/aes_x86core.c
865
*(u32 *)(out + 8) = ((u32)Td4[(s2) & 0xff]) ^ ((u32)Td4[(s1 >> 8) & 0xff] << 8) ^ ((u32)Td4[(s0 >> 16) & 0xff] << 16) ^ ((u32)Td4[(s3 >> 24)] << 24) ^ rk[2];
crypto/openssl/crypto/aes/aes_x86core.c
866
*(u32 *)(out + 12) = ((u32)Td4[(s3) & 0xff]) ^ ((u32)Td4[(s2 >> 8) & 0xff] << 8) ^ ((u32)Td4[(s1 >> 16) & 0xff] << 16) ^ ((u32)Td4[(s0 >> 24)] << 24) ^ rk[3];
crypto/openssl/crypto/camellia/camellia.c
240
static const u32 SIGMA[] = {
crypto/openssl/crypto/camellia/camellia.c
255
register u32 _t0, _t1, _t2, _t3; \
crypto/openssl/crypto/camellia/camellia.c
281
u32 _t0 = _s0 >> (32 - _n); \
crypto/openssl/crypto/camellia/camellia.c
290
register u32 s0, s1, s2, s3;
crypto/openssl/crypto/camellia/camellia.c
409
register u32 s0, s1, s2, s3;
crypto/openssl/crypto/camellia/camellia.c
410
const u32 *k = keyTable, *kend = keyTable + grandRounds * 16;
crypto/openssl/crypto/camellia/camellia.c
462
u32 s0, s1, s2, s3;
crypto/openssl/crypto/camellia/camellia.c
463
const u32 *k = keyTable + grandRounds * 16, *kend = keyTable + 4;
crypto/openssl/crypto/camellia/camellia.c
56
#define GETU32(p) (((u32)(p)[0] << 24) ^ ((u32)(p)[1] << 16) ^ ((u32)(p)[2] << 8) ^ ((u32)(p)[3]))
crypto/openssl/crypto/camellia/camellia.c
64
static const u32 Camellia_SBOX[][256] = {
crypto/openssl/crypto/chacha/chacha_enc.c
101
u32 input[16];
crypto/openssl/crypto/chacha/chacha_enc.c
106
input[0] = ((u32)ossl_toascii('e')) | ((u32)ossl_toascii('x') << 8)
crypto/openssl/crypto/chacha/chacha_enc.c
107
| ((u32)ossl_toascii('p') << 16)
crypto/openssl/crypto/chacha/chacha_enc.c
108
| ((u32)ossl_toascii('a') << 24);
crypto/openssl/crypto/chacha/chacha_enc.c
109
input[1] = ((u32)ossl_toascii('n')) | ((u32)ossl_toascii('d') << 8)
crypto/openssl/crypto/chacha/chacha_enc.c
110
| ((u32)ossl_toascii(' ') << 16)
crypto/openssl/crypto/chacha/chacha_enc.c
111
| ((u32)ossl_toascii('3') << 24);
crypto/openssl/crypto/chacha/chacha_enc.c
112
input[2] = ((u32)ossl_toascii('2')) | ((u32)ossl_toascii('-') << 8)
crypto/openssl/crypto/chacha/chacha_enc.c
113
| ((u32)ossl_toascii('b') << 16)
crypto/openssl/crypto/chacha/chacha_enc.c
114
| ((u32)ossl_toascii('y') << 24);
crypto/openssl/crypto/chacha/chacha_enc.c
115
input[3] = ((u32)ossl_toascii('t')) | ((u32)ossl_toascii('e') << 8)
crypto/openssl/crypto/chacha/chacha_enc.c
116
| ((u32)ossl_toascii(' ') << 16)
crypto/openssl/crypto/chacha/chacha_enc.c
117
| ((u32)ossl_toascii('k') << 24);
crypto/openssl/crypto/chacha/chacha_enc.c
21
u32 u[16];
crypto/openssl/crypto/chacha/chacha_enc.c
32
#define ROTATE(x, n) ({ u32 ret; \
crypto/openssl/crypto/chacha/chacha_enc.c
39
#define ROTATE(x, n) ({ u32 ret; \
crypto/openssl/crypto/chacha/chacha_enc.c
65
static void chacha20_core(chacha_buf *output, const u32 input[16])
crypto/openssl/crypto/chacha/chacha_enc.c
67
u32 x[16];
crypto/openssl/crypto/evp/e_aes_cbc_hmac_sha1.c
169
u32 d[32];
crypto/openssl/crypto/evp/e_aes_cbc_hmac_sha256.c
163
u32 d[32];
crypto/openssl/crypto/modes/ctr128.c
140
u32 n = 12, c = 1;
crypto/openssl/crypto/modes/ctr128.c
182
ctr32 += (u32)blocks;
crypto/openssl/crypto/modes/ctr128.c
29
u32 n = 16, c = 1;
crypto/openssl/crypto/modes/gcm128.c
219
u32 v;
crypto/openssl/crypto/modes/gcm128.c
220
v = (u32)(Z.hi >> 32);
crypto/openssl/crypto/modes/gcm128.c
222
v = (u32)(Z.hi);
crypto/openssl/crypto/modes/gcm128.c
224
v = (u32)(Z.lo >> 32);
crypto/openssl/crypto/modes/gcm128.c
226
v = (u32)(Z.lo);
crypto/openssl/crypto/modes/gcm128.c
25
#define GETU32(p) BSWAP4(*(const u32 *)(p))
crypto/openssl/crypto/modes/gcm128.c
27
#define PUTU32(p, v) *(u32 *)(p) = BSWAP4(v)
crypto/openssl/crypto/modes/gcm128.c
302
u32 v;
crypto/openssl/crypto/modes/gcm128.c
303
v = (u32)(Z.hi >> 32);
crypto/openssl/crypto/modes/gcm128.c
305
v = (u32)(Z.hi);
crypto/openssl/crypto/modes/gcm128.c
307
v = (u32)(Z.lo >> 32);
crypto/openssl/crypto/modes/gcm128.c
309
v = (u32)(Z.lo);
crypto/openssl/crypto/modes/gcm128.c
44
u32 T = 0xe1000000U & (0 - (u32)(V.lo & 1)); \
crypto/openssl/crypto/modes/ocb128.c
20
static u32 ocb_ntz(u64 n)
crypto/openssl/crypto/modes/ocb128.c
22
u32 cnt = 0;
crypto/openssl/crypto/modes/xts128.c
31
u32 d[4];
crypto/openssl/crypto/modes/xts128gb.c
31
u32 d[4];
crypto/openssl/crypto/params.c
426
uint32_t u32;
crypto/openssl/crypto/params.c
431
u32 = *(const uint32_t *)p->data;
crypto/openssl/crypto/params.c
432
if (u32 <= INT32_MAX) {
crypto/openssl/crypto/params.c
433
*val = (int32_t)u32;
crypto/openssl/crypto/params.c
513
uint32_t u32;
crypto/openssl/crypto/params.c
523
u32 = val < 0 ? -val : val;
crypto/openssl/crypto/params.c
524
if ((u32 >> shift) != 0) {
crypto/openssl/crypto/poly1305/poly1305.c
137
poly1305_blocks(void *ctx, const unsigned char *inp, size_t len, u32 padbit)
crypto/openssl/crypto/poly1305/poly1305.c
200
const u32 nonce[4])
crypto/openssl/crypto/poly1305/poly1305.c
244
u32 h[5];
crypto/openssl/crypto/poly1305/poly1305.c
245
u32 r[4];
crypto/openssl/crypto/poly1305/poly1305.c
276
poly1305_blocks(void *ctx, const unsigned char *inp, size_t len, u32 padbit)
crypto/openssl/crypto/poly1305/poly1305.c
279
u32 r0, r1, r2, r3;
crypto/openssl/crypto/poly1305/poly1305.c
280
u32 s1, s2, s3;
crypto/openssl/crypto/poly1305/poly1305.c
281
u32 h0, h1, h2, h3, h4, c;
crypto/openssl/crypto/poly1305/poly1305.c
301
h0 = (u32)(d0 = (u64)h0 + U8TOU32(inp + 0));
crypto/openssl/crypto/poly1305/poly1305.c
302
h1 = (u32)(d1 = (u64)h1 + (d0 >> 32) + U8TOU32(inp + 4));
crypto/openssl/crypto/poly1305/poly1305.c
303
h2 = (u32)(d2 = (u64)h2 + (d1 >> 32) + U8TOU32(inp + 8));
crypto/openssl/crypto/poly1305/poly1305.c
304
h3 = (u32)(d3 = (u64)h3 + (d2 >> 32) + U8TOU32(inp + 12));
crypto/openssl/crypto/poly1305/poly1305.c
305
h4 += (u32)(d3 >> 32) + padbit;
crypto/openssl/crypto/poly1305/poly1305.c
316
h0 = (u32)d0;
crypto/openssl/crypto/poly1305/poly1305.c
317
h1 = (u32)(d1 += d0 >> 32);
crypto/openssl/crypto/poly1305/poly1305.c
318
h2 = (u32)(d2 += d1 >> 32);
crypto/openssl/crypto/poly1305/poly1305.c
319
h3 = (u32)(d3 += d2 >> 32);
crypto/openssl/crypto/poly1305/poly1305.c
320
h4 += (u32)(d3 >> 32);
crypto/openssl/crypto/poly1305/poly1305.c
351
const u32 nonce[4])
crypto/openssl/crypto/poly1305/poly1305.c
354
u32 h0, h1, h2, h3, h4;
crypto/openssl/crypto/poly1305/poly1305.c
355
u32 g0, g1, g2, g3, g4;
crypto/openssl/crypto/poly1305/poly1305.c
357
u32 mask;
crypto/openssl/crypto/poly1305/poly1305.c
366
g0 = (u32)(t = (u64)h0 + 5);
crypto/openssl/crypto/poly1305/poly1305.c
367
g1 = (u32)(t = (u64)h1 + (t >> 32));
crypto/openssl/crypto/poly1305/poly1305.c
368
g2 = (u32)(t = (u64)h2 + (t >> 32));
crypto/openssl/crypto/poly1305/poly1305.c
369
g3 = (u32)(t = (u64)h3 + (t >> 32));
crypto/openssl/crypto/poly1305/poly1305.c
370
g4 = h4 + (u32)(t >> 32);
crypto/openssl/crypto/poly1305/poly1305.c
385
h0 = (u32)(t = (u64)h0 + nonce[0]);
crypto/openssl/crypto/poly1305/poly1305.c
386
h1 = (u32)(t = (u64)h1 + (t >> 32) + nonce[1]);
crypto/openssl/crypto/poly1305/poly1305.c
387
h2 = (u32)(t = (u64)h2 + (t >> 32) + nonce[2]);
crypto/openssl/crypto/poly1305/poly1305.c
388
h3 = (u32)(t = (u64)h3 + (t >> 32) + nonce[3]);
crypto/openssl/crypto/poly1305/poly1305.c
85
poly1305_blocks(void *ctx, const unsigned char *inp, size_t len, u32 padbit);
crypto/openssl/crypto/poly1305/poly1305_base2_44.c
128
void poly1305_emit(void *ctx, unsigned char mac[16], const u32 nonce[4])
crypto/openssl/crypto/poly1305/poly1305_base2_44.c
75
u32 padbit)
crypto/openssl/crypto/poly1305/poly1305_ieee754.c
103
static const u32 fpc = 1;
crypto/openssl/crypto/poly1305/poly1305_ieee754.c
107
static const u32 fcsr = 1;
crypto/openssl/crypto/poly1305/poly1305_ieee754.c
135
u32 mxcsr_orig;
crypto/openssl/crypto/poly1305/poly1305_ieee754.c
145
u32 fpc_orig;
crypto/openssl/crypto/poly1305/poly1305_ieee754.c
155
u32 fcsr_orig;
crypto/openssl/crypto/poly1305/poly1305_ieee754.c
250
u32 mxcsr_orig;
crypto/openssl/crypto/poly1305/poly1305_ieee754.c
260
u32 fpc_orig;
crypto/openssl/crypto/poly1305/poly1305_ieee754.c
270
u32 fcsr_orig;
crypto/openssl/crypto/poly1305/poly1305_ieee754.c
425
void poly1305_emit(void *ctx, unsigned char mac[16], const u32 nonce[4])
crypto/openssl/crypto/poly1305/poly1305_ieee754.c
429
u32 g0, g1, g2, g3, g4;
crypto/openssl/crypto/poly1305/poly1305_ieee754.c
431
u32 mask;
crypto/openssl/crypto/poly1305/poly1305_ieee754.c
459
g0 = (u32)(t = h0 + 5);
crypto/openssl/crypto/poly1305/poly1305_ieee754.c
460
g1 = (u32)(t = h1 + (t >> 32));
crypto/openssl/crypto/poly1305/poly1305_ieee754.c
461
g2 = (u32)(t = h2 + (t >> 32));
crypto/openssl/crypto/poly1305/poly1305_ieee754.c
462
g3 = (u32)(t = h3 + (t >> 32));
crypto/openssl/crypto/poly1305/poly1305_ieee754.c
463
g4 = h4 + (u32)(t >> 32);
crypto/openssl/crypto/poly1305/poly1305_ieee754.c
478
g0 = (u32)(t = (u64)g0 + nonce[0]);
crypto/openssl/crypto/poly1305/poly1305_ieee754.c
479
g1 = (u32)(t = (u64)g1 + (t >> 32) + nonce[1]);
crypto/openssl/crypto/poly1305/poly1305_ieee754.c
480
g2 = (u32)(t = (u64)g2 + (t >> 32) + nonce[2]);
crypto/openssl/crypto/poly1305/poly1305_ieee754.c
481
g3 = (u32)(t = (u64)g3 + (t >> 32) + nonce[3]);
crypto/openssl/crypto/poly1305/poly1305_ieee754.c
73
#define U8TOU32(p) (*(const u32 *)(p))
crypto/openssl/crypto/poly1305/poly1305_ieee754.c
74
#define U32TO8(p, v) (*(u32 *)(p) = (v))
crypto/openssl/crypto/poly1305/poly1305_ieee754.c
76
#define U8TOU32(p) ({u32 ret; asm ("lwbrx %0,0,%1":"=r"(ret):"b"(p)); ret; })
crypto/openssl/crypto/poly1305/poly1305_ieee754.c
79
#define U8TOU32(p) ({u32 ret; asm ("lrv %0,%1":"=d"(ret):"m"(*(u32 *)(p))); ret; })
crypto/openssl/crypto/poly1305/poly1305_ieee754.c
80
#define U32TO8(p, v) asm("strv %1,%0" : "=m"(*(u32 *)(p)) : "d"(v))
crypto/openssl/crypto/poly1305/poly1305_ieee754.c
84
#define U8TOU32(p) ((u32)(p)[0] | (u32)(p)[1] << 8 | (u32)(p)[2] << 16 | (u32)(p)[3] << 24)
crypto/openssl/crypto/poly1305/poly1305_ieee754.c
99
static const u32 mxcsr = 0x7f80;
crypto/openssl/include/crypto/modes.h
118
u32 d[4];
crypto/openssl/include/crypto/modes.h
43
#define BSWAP4(x) ({ u32 ret_=(x); \
crypto/openssl/include/crypto/modes.h
47
#define BSWAP8(x) ({ u32 lo_=(u64)(x)>>32,hi_=(x); \
crypto/openssl/include/crypto/modes.h
51
#define BSWAP4(x) ({ u32 ret_=(x); \
crypto/openssl/include/crypto/modes.h
59
#define BSWAP4(x) ({ u32 ret_; \
crypto/openssl/include/crypto/modes.h
64
#define BSWAP8(x) ({ u32 lo_=(u64)(x)>>32,hi_=(x); \
crypto/openssl/include/crypto/modes.h
68
#define BSWAP4(x) ({ u32 ret_; \
crypto/openssl/include/crypto/modes.h
70
: "=r"(ret_) : "r"((u32)(x))); \
crypto/openssl/include/crypto/modes.h
76
#define BSWAP4(x) ({ u32 ret_=(x); \
crypto/openssl/include/crypto/modes.h
85
#define BSWAP4(x) _byteswap_ulong((u32)(x))
crypto/openssl/include/crypto/modes.h
87
__inline u32 _bswap4(u32 val) {
crypto/openssl/include/crypto/modes.h
95
#define GETU32(p) BSWAP4(*(const u32 *)(p))
crypto/openssl/include/crypto/modes.h
96
#define PUTU32(p, v) *(u32 *)(p) = BSWAP4(v)
crypto/openssl/include/crypto/modes.h
98
#define GETU32(p) ((u32)(p)[0] << 24 | (u32)(p)[1] << 16 | (u32)(p)[2] << 8 | (u32)(p)[3])
crypto/openssl/providers/implementations/ciphers/cipher_aes_cbc_hmac_sha1_hw.c
133
u32 d[32];
crypto/openssl/providers/implementations/ciphers/cipher_aes_cbc_hmac_sha256_hw.c
137
u32 d[32];
crypto/openssl/providers/implementations/rands/drbg_ctr.c
383
u32 n = 12, c = 1;
crypto/openssl/providers/implementations/rands/drbg_ctr.c
67
u32 n = 16, c = 1;
crypto/openssl/test/byteorder_test.c
14
uint32_t u32;
crypto/openssl/test/byteorder_test.c
40
restin = OPENSSL_load_u32_le(&u32, in);
crypto/openssl/test/byteorder_test.c
41
restout = OPENSSL_store_u32_le(out, u32);
crypto/openssl/test/byteorder_test.c
42
if (!TEST_true(u32 == 0x03020100UL
crypto/openssl/test/byteorder_test.c
51
restin = OPENSSL_load_u32_be(&u32, in);
crypto/openssl/test/byteorder_test.c
52
restout = OPENSSL_store_u32_be(out, u32);
crypto/openssl/test/byteorder_test.c
53
if (!TEST_true(u32 == 0x00010203UL
crypto/openssl/test/params_api_test.c
616
uint32_t u32;
crypto/openssl/test/params_api_test.c
629
params[n++] = OSSL_PARAM_construct_uint32("uint32", &u32);
crypto/openssl/test/params_conversion_test.c
155
datum_u32 = ref_u32 = pc->u32;
crypto/openssl/test/params_conversion_test.c
188
uint32_t u32;
crypto/openssl/test/params_conversion_test.c
235
if (!TEST_false(OSSL_PARAM_get_uint32(pc->param, &u32))
crypto/openssl/test/params_conversion_test.c
241
if (!TEST_true(OSSL_PARAM_get_uint32(pc->param, &u32))
crypto/openssl/test/params_conversion_test.c
242
|| !TEST_true(u32 == pc->u32)) {
crypto/openssl/test/params_conversion_test.c
247
if (!TEST_true(OSSL_PARAM_set_uint32(pc->param, u32))
crypto/openssl/test/params_conversion_test.c
27
uint32_t u32;
crypto/openssl/test/params_conversion_test.c
96
pc->u32 = (uint32_t)strtoumax(pp->value, &p, 10);
lib/libiconv_modules/UTF7/citrus_utf7.c
246
uint32_t u32;
lib/libiconv_modules/UTF7/citrus_utf7.c
266
u32 = (uint32_t)hi;
lib/libiconv_modules/UTF7/citrus_utf7.c
283
u32 = (hi << 10 | lo) + SRG_BASE;
lib/libiconv_modules/UTF7/citrus_utf7.c
287
*pwc = (wchar_t)u32;
lib/libiconv_modules/UTF7/citrus_utf7.c
288
if (u32 == (uint32_t)0) {
lib/libiconv_modules/UTF7/citrus_utf7.c
351
uint32_t u32;
lib/libiconv_modules/UTF7/citrus_utf7.c
356
u32 = (uint32_t)wchar;
lib/libiconv_modules/UTF7/citrus_utf7.c
357
if (u32 <= UTF16_MAX) {
lib/libiconv_modules/UTF7/citrus_utf7.c
358
u16[0] = (uint16_t)u32;
lib/libiconv_modules/UTF7/citrus_utf7.c
360
} else if (u32 <= UTF32_MAX) {
lib/libiconv_modules/UTF7/citrus_utf7.c
361
u32 -= SRG_BASE;
lib/libiconv_modules/UTF7/citrus_utf7.c
362
u16[0] = (u32 >> 10) + HISRG_MIN;
lib/libiconv_modules/UTF7/citrus_utf7.c
363
u16[1] = ((uint16_t)(u32 & UINT32_C(0x3ff))) + LOSRG_MIN;
lib/libnvmf/nvmf_host.c
379
*value = le32toh(rsp->value.u32.low);
lib/libnvmf/nvmf_host.c
394
cmd.value.u32.low = htole32(value);
sbin/ipfw/ipfw2.c
1339
cmd->u32);
sbin/ipfw/ipfw2.c
1351
const uint32_t *a = insntoc(cmd, u32)->d;
sbin/ipfw/ipfw2.c
1400
l->u32, t);
sbin/ipfw/ipfw2.c
1688
d = 1.0 * insntoc(cmd, u32)->d[0] / 0x7fffffff;
sbin/ipfw/ipfw2.c
1743
print_flow6id(bp, insntoc(cmd, u32));
sbin/ipfw/ipfw2.c
1873
print_dscp(bp, insntoc(cmd, u32));
sbin/ipfw/ipfw2.c
1882
print_icmptypes(bp, insntoc(cmd, u32));
sbin/ipfw/ipfw2.c
1895
ntohl(insntoc(cmd, u32)->d[0]));
sbin/ipfw/ipfw2.c
1899
ntohl(insntoc(cmd, u32)->d[0]));
sbin/ipfw/ipfw2.c
1902
pwd = getpwuid(insntoc(cmd, u32)->d[0]);
sbin/ipfw/ipfw2.c
1907
insntoc(cmd, u32)->d[0]);
sbin/ipfw/ipfw2.c
1910
grp = getgrgid(insntoc(cmd, u32)->d[0]);
sbin/ipfw/ipfw2.c
1915
insntoc(cmd, u32)->d[0]);
sbin/ipfw/ipfw2.c
1918
bprintf(bp, " jail %d", insntoc(cmd, u32)->d[0]);
sbin/ipfw/ipfw2.c
1967
print_icmp6types(bp, insntoc(cmd, u32));
sbin/ipfw/ipfw2.c
1987
bprintf(bp, " %#x", insntoc(cmd, u32)->d[0]);
sbin/ipfw/ipfw2.c
1989
if (insntoc(cmd, u32)->d[1] != 0xFFFFFFFF)
sbin/ipfw/ipfw2.c
1990
bprintf(bp, ":%#x", insntoc(cmd, u32)->d[1]);
sbin/ipfw/ipfw2.c
2133
bprint_uint_arg(bp, "skipto ", insntoc(cmd, u32)->d[0]);
sbin/ipfw/ipfw2.c
2259
bprint_uint_arg(bp, "call ", insntoc(cmd, u32)->d[0]);
sbin/ipfw/ipfw2.c
2266
bprintf(bp, "setmark %#x", insntoc(cmd, u32)->d[0]);
sbin/ipfw/ipfw2.c
3396
cmd->u32 = ntohl(cmd->u32);
sbin/ipfw/ipfw2.c
3398
cmd->u32 = strtoul(p, NULL, 0);
sbin/ipfw/ipfw2.c
4229
cmd->u32 = ntohl(cmd->u32);
sbin/ipfw/ipfw2.c
4232
cmd->u32 = strtoul(src, NULL, 0);
sbin/ipfw/ipfw2.c
4446
insntod(action, u32)->d[0] =
sbin/ipfw/ipfw2.c
4474
insntod(action, u32)->d[0] =
sbin/ipfw/ipfw2.c
4667
insntod(action, u32)->d[0] = strtoul(*av, NULL, 0);
sys/compat/linuxkpi/common/include/asm/atomic.h
178
u32 u32[0]; \
sys/compat/linuxkpi/common/include/asm/atomic.h
204
while (!atomic_fcmpset_32((volatile u32 *)(ptr), \
sys/compat/linuxkpi/common/include/asm/atomic.h
205
__ret.u32, __new.u32[0]) && __ret.val == (old)) \
sys/compat/linuxkpi/common/include/asm/atomic.h
227
u32 u32[0]; \
sys/compat/linuxkpi/common/include/asm/atomic.h
255
__ret.u32[0] = atomic_swap_32((volatile u32 *)(ptr), \
sys/compat/linuxkpi/common/include/asm/atomic.h
256
__new.u32[0]); \
sys/compat/linuxkpi/common/include/linux/compiler.h
69
#define lower_32_bits(n) ((u32)(n))
sys/compat/linuxkpi/common/include/linux/compiler.h
70
#define upper_32_bits(n) ((u32)(((n) >> 16) >> 16))
sys/compat/linuxkpi/common/include/linux/etherdevice.h
46
u32 offset;
sys/compat/linuxkpi/common/include/linux/etherdevice.h
47
u32 len;
sys/compat/linuxkpi/common/include/linux/etherdevice.h
51
u32 type;
sys/compat/linuxkpi/common/include/linux/etherdevice.h
52
u32 eeprom_len;
sys/compat/linuxkpi/common/include/linux/hash.h
55
static inline u32
sys/compat/linuxkpi/common/include/linux/hash.h
56
hash_32(u32 val, u8 bits)
sys/compat/linuxkpi/common/include/linux/hash.h
58
u32 ret;
sys/compat/linuxkpi/common/include/linux/hash.h
64
u32 chunk = (val >> (8 * x)) & 0xFF;
sys/compat/linuxkpi/common/include/linux/jhash.h
123
static inline u32 jhash_3words(u32 a, u32 b, u32 c, u32 initval)
sys/compat/linuxkpi/common/include/linux/jhash.h
134
static inline u32 jhash_2words(u32 a, u32 b, u32 initval)
sys/compat/linuxkpi/common/include/linux/jhash.h
139
static inline u32 jhash_1word(u32 a, u32 initval)
sys/compat/linuxkpi/common/include/linux/jhash.h
46
static inline u32 jhash(const void *key, u32 length, u32 initval)
sys/compat/linuxkpi/common/include/linux/jhash.h
48
u32 a, b, c, len;
sys/compat/linuxkpi/common/include/linux/jhash.h
56
a += (k[0] +((u32)k[1]<<8) +((u32)k[2]<<16) +((u32)k[3]<<24));
sys/compat/linuxkpi/common/include/linux/jhash.h
57
b += (k[4] +((u32)k[5]<<8) +((u32)k[6]<<16) +((u32)k[7]<<24));
sys/compat/linuxkpi/common/include/linux/jhash.h
58
c += (k[8] +((u32)k[9]<<8) +((u32)k[10]<<16)+((u32)k[11]<<24));
sys/compat/linuxkpi/common/include/linux/jhash.h
68
case 11: c += ((u32)k[10]<<24);
sys/compat/linuxkpi/common/include/linux/jhash.h
69
case 10: c += ((u32)k[9]<<16);
sys/compat/linuxkpi/common/include/linux/jhash.h
70
case 9 : c += ((u32)k[8]<<8);
sys/compat/linuxkpi/common/include/linux/jhash.h
71
case 8 : b += ((u32)k[7]<<24);
sys/compat/linuxkpi/common/include/linux/jhash.h
72
case 7 : b += ((u32)k[6]<<16);
sys/compat/linuxkpi/common/include/linux/jhash.h
73
case 6 : b += ((u32)k[5]<<8);
sys/compat/linuxkpi/common/include/linux/jhash.h
75
case 4 : a += ((u32)k[3]<<24);
sys/compat/linuxkpi/common/include/linux/jhash.h
76
case 3 : a += ((u32)k[2]<<16);
sys/compat/linuxkpi/common/include/linux/jhash.h
77
case 2 : a += ((u32)k[1]<<8);
sys/compat/linuxkpi/common/include/linux/jhash.h
89
static inline u32 jhash2(const u32 *k, u32 length, u32 initval)
sys/compat/linuxkpi/common/include/linux/jhash.h
91
u32 a, b, c, len;
sys/compat/linuxkpi/common/include/linux/net_dim.h
357
u32 delta_us = ktime_us_delta(end->time, start->time);
sys/compat/linuxkpi/common/include/linux/net_dim.h
358
u32 npkts = BIT_GAP(BITS_PER_TYPE(u32), end->pkt_ctr, start->pkt_ctr);
sys/compat/linuxkpi/common/include/linux/net_dim.h
359
u32 nbytes = BIT_GAP(BITS_PER_TYPE(u32), end->byte_ctr,
sys/compat/linuxkpi/common/include/linux/net_dim.h
54
u32 pkt_ctr;
sys/compat/linuxkpi/common/include/linux/net_dim.h
55
u32 byte_ctr;
sys/compat/linuxkpi/common/include/linux/pci.h
1043
pcie_capability_read_dword(struct pci_dev *dev, int pos, u32 *dst)
sys/compat/linuxkpi/common/include/linux/pci.h
712
pci_read_config_dword(const struct pci_dev *pdev, int where, u32 *val)
sys/compat/linuxkpi/common/include/linux/pci.h
715
*val = (u32)pci_read_config(pdev->dev.bsddev, where, 4);
sys/compat/linuxkpi/common/include/linux/pci.h
736
pci_write_config_dword(const struct pci_dev *pdev, int where, u32 val)
sys/compat/linuxkpi/common/include/linux/random.h
123
static inline u32
sys/compat/linuxkpi/common/include/linux/random.h
124
prandom_u32_max(u32 max)
sys/compat/linuxkpi/common/include/linux/siphash.h
100
u32 hsiphash_1u32(const u32 a, const hsiphash_key_t *key);
sys/compat/linuxkpi/common/include/linux/siphash.h
101
u32 hsiphash_2u32(const u32 a, const u32 b, const hsiphash_key_t *key);
sys/compat/linuxkpi/common/include/linux/siphash.h
102
u32 hsiphash_3u32(const u32 a, const u32 b, const u32 c,
sys/compat/linuxkpi/common/include/linux/siphash.h
104
u32 hsiphash_4u32(const u32 a, const u32 b, const u32 c, const u32 d,
sys/compat/linuxkpi/common/include/linux/siphash.h
107
static inline u32 ___hsiphash_aligned(const __le32 *data, size_t len,
sys/compat/linuxkpi/common/include/linux/siphash.h
131
static inline u32 hsiphash(const void *data, size_t len,
sys/compat/linuxkpi/common/include/linux/siphash.h
39
u64 siphash_1u32(const u32 a, const siphash_key_t *key);
sys/compat/linuxkpi/common/include/linux/siphash.h
40
u64 siphash_3u32(const u32 a, const u32 b, const u32 c,
sys/compat/linuxkpi/common/include/linux/siphash.h
43
static inline u64 siphash_2u32(const u32 a, const u32 b,
sys/compat/linuxkpi/common/include/linux/siphash.h
48
static inline u64 siphash_4u32(const u32 a, const u32 b, const u32 c,
sys/compat/linuxkpi/common/include/linux/siphash.h
49
const u32 d, const siphash_key_t *key)
sys/compat/linuxkpi/common/include/linux/siphash.h
95
u32 __hsiphash_aligned(const void *data, size_t len,
sys/compat/linuxkpi/common/include/linux/siphash.h
97
u32 __hsiphash_unaligned(const void *data, size_t len,
sys/compat/linuxkpi/common/include/net/ieee80211_radiotap.h
42
u32 present;
sys/compat/linuxkpi/common/include/net/mac80211.h
1010
void (*sta_rc_update)(struct ieee80211_hw *, struct ieee80211_vif *, struct ieee80211_sta *, u32);
sys/compat/linuxkpi/common/include/net/mac80211.h
1011
void (*link_sta_rc_update)(struct ieee80211_hw *, struct ieee80211_vif *, struct ieee80211_link_sta *, u32);
sys/compat/linuxkpi/common/include/net/mac80211.h
1028
int (*tdls_channel_switch)(struct ieee80211_hw *, struct ieee80211_vif *, struct ieee80211_sta *, u8, struct cfg80211_chan_def *, struct sk_buff *, u32);
sys/compat/linuxkpi/common/include/net/mac80211.h
1034
void (*change_chanctx)(struct ieee80211_hw *, struct ieee80211_chanctx_conf *, u32);
sys/compat/linuxkpi/common/include/net/mac80211.h
1039
int (*get_antenna)(struct ieee80211_hw *, int, u32 *, u32 *);
sys/compat/linuxkpi/common/include/net/mac80211.h
1040
int (*set_antenna)(struct ieee80211_hw *, int, u32, u32);
sys/compat/linuxkpi/common/include/net/mac80211.h
1051
int (*set_rts_threshold)(struct ieee80211_hw *, int, u32);
sys/compat/linuxkpi/common/include/net/mac80211.h
1065
void (*update_tkip_key)(struct ieee80211_hw *, struct ieee80211_vif *, struct ieee80211_key_conf *, struct ieee80211_sta *, u32, u16 *);
sys/compat/linuxkpi/common/include/net/mac80211.h
1082
void (*get_et_strings)(struct ieee80211_hw *, struct ieee80211_vif *, u32, u8 *);
sys/compat/linuxkpi/common/include/net/mac80211.h
969
int (*config)(struct ieee80211_hw *, int, u32);
sys/compat/linuxkpi/common/include/net/mac80211.h
984
int (*conf_tx)(struct ieee80211_hw *, struct ieee80211_vif *, u32, u16, const struct ieee80211_tx_queue_params *);
sys/compat/linuxkpi/common/include/net/mac80211.h
993
void (*flush)(struct ieee80211_hw *, struct ieee80211_vif *, u32, bool);
sys/compat/linuxkpi/common/include/net/mac80211.h
996
int (*set_frag_threshold)(struct ieee80211_hw *, int, u32);
sys/compat/linuxkpi/common/src/linux_80211.h
445
int lkpi_80211_mo_get_antenna(struct ieee80211_hw *, u32 *, u32 *);
sys/compat/linuxkpi/common/src/linux_80211_macops.c
93
lkpi_80211_mo_get_antenna(struct ieee80211_hw *hw, u32 *txs, u32 *rxs)
sys/compat/linuxkpi/common/src/linux_siphash.c
211
u64 siphash_1u32(const u32 first, const siphash_key_t *key)
sys/compat/linuxkpi/common/src/linux_siphash.c
219
u64 siphash_3u32(const u32 first, const u32 second, const u32 third,
sys/compat/linuxkpi/common/src/linux_siphash.c
251
u32 __hsiphash_aligned(const void *_data, size_t len, const hsiphash_key_t *key)
sys/compat/linuxkpi/common/src/linux_siphash.c
284
u32 __hsiphash_unaligned(const void *_data, size_t len,
sys/compat/linuxkpi/common/src/linux_siphash.c
322
u32 hsiphash_1u32(const u32 first, const hsiphash_key_t *key)
sys/compat/linuxkpi/common/src/linux_siphash.c
336
u32 hsiphash_2u32(const u32 first, const u32 second, const hsiphash_key_t *key)
sys/compat/linuxkpi/common/src/linux_siphash.c
354
u32 hsiphash_3u32(const u32 first, const u32 second, const u32 third,
sys/compat/linuxkpi/common/src/linux_siphash.c
375
u32 hsiphash_4u32(const u32 first, const u32 second, const u32 third,
sys/compat/linuxkpi/common/src/linux_siphash.c
376
const u32 forth, const hsiphash_key_t *key)
sys/compat/linuxkpi/common/src/linux_siphash.c
394
u32 v0 = HSIPHASH_CONST_0; \
sys/compat/linuxkpi/common/src/linux_siphash.c
395
u32 v1 = HSIPHASH_CONST_1; \
sys/compat/linuxkpi/common/src/linux_siphash.c
396
u32 v2 = HSIPHASH_CONST_2; \
sys/compat/linuxkpi/common/src/linux_siphash.c
397
u32 v3 = HSIPHASH_CONST_3; \
sys/compat/linuxkpi/common/src/linux_siphash.c
398
u32 b = ((u32)(len)) << 24; \
sys/compat/linuxkpi/common/src/linux_siphash.c
415
u32 __hsiphash_aligned(const void *_data, size_t len, const hsiphash_key_t *key)
sys/compat/linuxkpi/common/src/linux_siphash.c
418
const u8 *end = data + len - (len % sizeof(u32));
sys/compat/linuxkpi/common/src/linux_siphash.c
419
const u8 left = len & (sizeof(u32) - 1);
sys/compat/linuxkpi/common/src/linux_siphash.c
420
u32 m;
sys/compat/linuxkpi/common/src/linux_siphash.c
422
for (; data != end; data += sizeof(u32)) {
sys/compat/linuxkpi/common/src/linux_siphash.c
429
case 3: b |= ((u32)end[2]) << 16; fallthrough;
sys/compat/linuxkpi/common/src/linux_siphash.c
438
u32 __hsiphash_unaligned(const void *_data, size_t len,
sys/compat/linuxkpi/common/src/linux_siphash.c
442
const u8 *end = data + len - (len % sizeof(u32));
sys/compat/linuxkpi/common/src/linux_siphash.c
443
const u8 left = len & (sizeof(u32) - 1);
sys/compat/linuxkpi/common/src/linux_siphash.c
444
u32 m;
sys/compat/linuxkpi/common/src/linux_siphash.c
446
for (; data != end; data += sizeof(u32)) {
sys/compat/linuxkpi/common/src/linux_siphash.c
453
case 3: b |= ((u32)end[2]) << 16; fallthrough;
sys/compat/linuxkpi/common/src/linux_siphash.c
466
u32 hsiphash_1u32(const u32 first, const hsiphash_key_t *key)
sys/compat/linuxkpi/common/src/linux_siphash.c
482
u32 hsiphash_2u32(const u32 first, const u32 second, const hsiphash_key_t *key)
sys/compat/linuxkpi/common/src/linux_siphash.c
502
u32 hsiphash_3u32(const u32 first, const u32 second, const u32 third,
sys/compat/linuxkpi/common/src/linux_siphash.c
527
u32 hsiphash_4u32(const u32 first, const u32 second, const u32 third,
sys/compat/linuxkpi/common/src/linux_siphash.c
528
const u32 forth, const hsiphash_key_t *key)
sys/crypto/chacha20/chacha.c
111
chacha_encrypt_bytes(chacha_ctx *x,const u8 *m,u8 *c,u32 bytes)
sys/crypto/chacha20/chacha.c
113
u32 x0, x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15;
sys/crypto/chacha20/chacha.c
114
u32 j0, j1, j2, j3, j4, j5, j6, j7, j8, j9, j10, j11, j12, j13, j14, j15;
sys/crypto/chacha20/chacha.c
23
#define U32V(v) ((u32)(v) & U32C(0xFFFFFFFF))
sys/crypto/chacha20/chacha.c
29
(((u32)((p)[0]) ) | \
sys/crypto/chacha20/chacha.c
30
((u32)((p)[1]) << 8) | \
sys/crypto/chacha20/chacha.c
31
((u32)((p)[2]) << 16) | \
sys/crypto/chacha20/chacha.c
32
((u32)((p)[3]) << 24))
sys/crypto/chacha20/chacha.c
57
chacha_keysetup(chacha_ctx *x,const u8 *k,u32 kbits)
sys/crypto/rijndael/rijndael-alg-fst.c
1042
void rijndaelDecrypt(const u32 rk[/*4*(Nr + 1)*/], int Nr, const u8 ct[16], u8 pt[16]) {
sys/crypto/rijndael/rijndael-alg-fst.c
1043
u32 s0, s1, s2, s3, t0, t1, t2, t3;
sys/crypto/rijndael/rijndael-alg-fst.c
121
static const u32 Te1[256] = {
sys/crypto/rijndael/rijndael-alg-fst.c
187
static const u32 Te2[256] = {
sys/crypto/rijndael/rijndael-alg-fst.c
253
static const u32 Te3[256] = {
sys/crypto/rijndael/rijndael-alg-fst.c
320
static const u32 Te4[256] = {
sys/crypto/rijndael/rijndael-alg-fst.c
386
static const u32 Td0[256] = {
sys/crypto/rijndael/rijndael-alg-fst.c
452
static const u32 Td1[256] = {
sys/crypto/rijndael/rijndael-alg-fst.c
518
static const u32 Td2[256] = {
sys/crypto/rijndael/rijndael-alg-fst.c
55
static const u32 Te0[256] = {
sys/crypto/rijndael/rijndael-alg-fst.c
585
static const u32 Td3[256] = {
sys/crypto/rijndael/rijndael-alg-fst.c
651
static const u32 Td4[256] = {
sys/crypto/rijndael/rijndael-alg-fst.c
717
static const u32 rcon[] = {
sys/crypto/rijndael/rijndael-alg-fst.c
725
#define GETU32(pt) (((u32)(pt)[0] << 24) ^ ((u32)(pt)[1] << 16) ^ ((u32)(pt)[2] << 8) ^ ((u32)(pt)[3]))
sys/crypto/rijndael/rijndael-alg-fst.c
733
int rijndaelKeySetupEnc(u32 rk[/*4*(Nr + 1)*/], const u8 cipherKey[], int keyBits) {
sys/crypto/rijndael/rijndael-alg-fst.c
735
u32 temp;
sys/crypto/rijndael/rijndael-alg-fst.c
821
int rijndaelKeySetupDec(u32 rk[/*4*(Nr + 1)*/], const u8 cipherKey[], int keyBits) {
sys/crypto/rijndael/rijndael-alg-fst.c
823
u32 temp;
sys/crypto/rijndael/rijndael-alg-fst.c
861
void rijndaelEncrypt(const u32 rk[/*4*(Nr + 1)*/], int Nr, const u8 pt[16], u8 ct[16]) {
sys/crypto/rijndael/rijndael-alg-fst.c
862
u32 s0, s1, s2, s3, t0, t1, t2, t3;
sys/dev/ath/ath_hal/ar5210/ar5210_misc.c
334
uint32_t low1, low2, u32;
sys/dev/ath/ath_hal/ar5210/ar5210_misc.c
338
u32 = OS_REG_READ(ah, AR_TSF_U32);
sys/dev/ath/ath_hal/ar5210/ar5210_misc.c
351
u32++;
sys/dev/ath/ath_hal/ar5210/ar5210_misc.c
353
return (((uint64_t) u32) << 32) | ((uint64_t) low2);
sys/dev/ath/ath_hal/ar5211/ar5211_misc.c
330
uint32_t low1, low2, u32;
sys/dev/ath/ath_hal/ar5211/ar5211_misc.c
334
u32 = OS_REG_READ(ah, AR_TSF_U32);
sys/dev/ath/ath_hal/ar5211/ar5211_misc.c
347
u32++;
sys/dev/ath/ath_hal/ar5211/ar5211_misc.c
349
return (((uint64_t) u32) << 32) | ((uint64_t) low2);
sys/dev/ath/ath_hal/ar5212/ar5212_misc.c
235
uint32_t low1, low2, u32;
sys/dev/ath/ath_hal/ar5212/ar5212_misc.c
239
u32 = OS_REG_READ(ah, AR_TSF_U32);
sys/dev/ath/ath_hal/ar5212/ar5212_misc.c
252
u32++;
sys/dev/ath/ath_hal/ar5212/ar5212_misc.c
254
return (((uint64_t) u32) << 32) | ((uint64_t) low2);
sys/dev/ath/ath_hal/ar5416/ar5416_misc.c
109
uint32_t low1, low2, u32;
sys/dev/ath/ath_hal/ar5416/ar5416_misc.c
113
u32 = OS_REG_READ(ah, AR_TSF_U32);
sys/dev/ath/ath_hal/ar5416/ar5416_misc.c
126
u32++;
sys/dev/ath/ath_hal/ar5416/ar5416_misc.c
128
return (((uint64_t) u32) << 32) | ((uint64_t) low2);
sys/dev/axgbe/xgbe-ptp.c
138
u32 addend, diff;
sys/dev/bce/if_bce.c
10086
u32 cmd, ctl, cur_depth, max_depth, valid_cnt, val;
sys/dev/bce/if_bce.c
10340
(u32) BCM_PAGE_SIZE, (u32) sc->tx_pages);
sys/dev/bce/if_bce.c
10342
(u32) TOTAL_TX_BD_PER_PAGE, (u32) USABLE_TX_BD_PER_PAGE);
sys/dev/bce/if_bce.c
10343
BCE_PRINTF("total tx_bd = 0x%08X\n", (u32) TOTAL_TX_BD_ALLOC);
sys/dev/bce/if_bce.c
10381
(u32) BCM_PAGE_SIZE, (u32) sc->rx_pages);
sys/dev/bce/if_bce.c
10384
(u32) TOTAL_RX_BD_PER_PAGE, (u32) USABLE_RX_BD_PER_PAGE);
sys/dev/bce/if_bce.c
10386
BCE_PRINTF("total rx_bd = 0x%08X\n", (u32) TOTAL_RX_BD_ALLOC);
sys/dev/bce/if_bce.c
10424
(u32) BCM_PAGE_SIZE, (u32) sc->pg_pages);
sys/dev/bce/if_bce.c
10427
(u32) TOTAL_PG_BD_PER_PAGE, (u32) USABLE_PG_BD_PER_PAGE);
sys/dev/bce/if_bce.c
10429
BCE_PRINTF("total pg_bd = 0x%08X\n", (u32) TOTAL_PG_BD_ALLOC);
sys/dev/bce/if_bce.c
1044
u32 val;
sys/dev/bce/if_bce.c
10617
u32 val_hi, val_lo;
sys/dev/bce/if_bce.c
107
u32 bce_debug = BCE_WARN;
sys/dev/bce/if_bce.c
10775
u32 val;
sys/dev/bce/if_bce.c
10953
u32 val;
sys/dev/bce/if_bce.c
10993
u32 val;
sys/dev/bce/if_bce.c
10994
u32 fw_version[3];
sys/dev/bce/if_bce.c
11051
u32 val;
sys/dev/bce/if_bce.c
11052
u32 fw_version[3];
sys/dev/bce/if_bce.c
11110
u32 val;
sys/dev/bce/if_bce.c
11111
u32 fw_version[3];
sys/dev/bce/if_bce.c
11169
u32 val;
sys/dev/bce/if_bce.c
11170
u32 fw_version[3];
sys/dev/bce/if_bce.c
11228
u32 val;
sys/dev/bce/if_bce.c
11229
u32 fw_version[4];
sys/dev/bce/if_bce.c
11285
u32 val, pc1, pc2, fw_ver_high, fw_ver_low;
sys/dev/bce/if_bce.c
1242
u32 addr = bce_shmem_rd(sc, BCE_MFW_VER_PTR);
sys/dev/bce/if_bce.c
1265
u32 clkreg;
sys/dev/bce/if_bce.c
1519
u32 msg;
sys/dev/bce/if_bce.c
1569
u32 msg;
sys/dev/bce/if_bce.c
1594
static u32
sys/dev/bce/if_bce.c
1595
bce_reg_rd(struct bce_softc *sc, u32 offset)
sys/dev/bce/if_bce.c
1597
u32 val = bus_space_read_4(sc->bce_btag, sc->bce_bhandle, offset);
sys/dev/bce/if_bce.c
1610
bce_reg_wr16(struct bce_softc *sc, u32 offset, u16 val)
sys/dev/bce/if_bce.c
1624
bce_reg_wr(struct bce_softc *sc, u32 offset, u32 val)
sys/dev/bce/if_bce.c
1642
static u32
sys/dev/bce/if_bce.c
1643
bce_reg_rd_ind(struct bce_softc *sc, u32 offset)
sys/dev/bce/if_bce.c
1651
u32 val;
sys/dev/bce/if_bce.c
1673
bce_reg_wr_ind(struct bce_softc *sc, u32 offset, u32 val)
sys/dev/bce/if_bce.c
1694
bce_shmem_wr(struct bce_softc *sc, u32 offset, u32 val)
sys/dev/bce/if_bce.c
1710
static u32
sys/dev/bce/if_bce.c
1711
bce_shmem_rd(struct bce_softc *sc, u32 offset)
sys/dev/bce/if_bce.c
1713
u32 val = bce_reg_rd_ind(sc, sc->bce_shmem_base + offset);
sys/dev/bce/if_bce.c
1731
static u32
sys/dev/bce/if_bce.c
1732
bce_ctx_rd(struct bce_softc *sc, u32 cid_addr, u32 ctx_offset)
sys/dev/bce/if_bce.c
1734
u32 idx, offset, retry_cnt = 5, val;
sys/dev/bce/if_bce.c
1780
bce_ctx_wr(struct bce_softc *sc, u32 cid_addr, u32 ctx_offset, u32 ctx_val)
sys/dev/bce/if_bce.c
1782
u32 idx, offset = ctx_offset + cid_addr;
sys/dev/bce/if_bce.c
1783
u32 val, retry_cnt = 5;
sys/dev/bce/if_bce.c
1826
u32 val;
sys/dev/bce/if_bce.c
1904
u32 val1;
sys/dev/bce/if_bce.c
2088
u32 val;
sys/dev/bce/if_bce.c
2125
u32 val;
sys/dev/bce/if_bce.c
2164
u32 val;
sys/dev/bce/if_bce.c
2208
u32 val;
sys/dev/bce/if_bce.c
2232
u32 val;
sys/dev/bce/if_bce.c
2255
u32 val;
sys/dev/bce/if_bce.c
2279
bce_nvram_erase_page(struct bce_softc *sc, u32 offset)
sys/dev/bce/if_bce.c
2281
u32 cmd;
sys/dev/bce/if_bce.c
2304
u32 val;
sys/dev/bce/if_bce.c
2335
u32 offset, u8 *ret_val, u32 cmd_flags)
sys/dev/bce/if_bce.c
2337
u32 cmd;
sys/dev/bce/if_bce.c
2362
u32 val;
sys/dev/bce/if_bce.c
2399
bce_nvram_write_dword(struct bce_softc *sc, u32 offset, u8 *val,
sys/dev/bce/if_bce.c
2400
u32 cmd_flags)
sys/dev/bce/if_bce.c
2402
u32 cmd, val32;
sys/dev/bce/if_bce.c
2458
u32 val;
sys/dev/bce/if_bce.c
2497
u32 mask;
sys/dev/bce/if_bce.c
2568
bce_nvram_read(struct bce_softc *sc, u32 offset, u8 *ret_buf,
sys/dev/bce/if_bce.c
2572
u32 cmd_flags, offset32, len32, extra;
sys/dev/bce/if_bce.c
2594
u32 pre_len;
sys/dev/bce/if_bce.c
2693
bce_nvram_write(struct bce_softc *sc, u32 offset, u8 *data_buf,
sys/dev/bce/if_bce.c
2696
u32 written, offset32, len32;
sys/dev/bce/if_bce.c
2745
u32 page_start, page_end, data_start, data_end;
sys/dev/bce/if_bce.c
2746
u32 addr, cmd_flags;
sys/dev/bce/if_bce.c
2891
u32 buf[BCE_NVRAM_SIZE / 4];
sys/dev/bce/if_bce.c
2894
u32 magic, csum;
sys/dev/bce/if_bce.c
3014
u32 val;
sys/dev/bce/if_bce.c
3022
u32 val = REG_RD(sc, BCE_MISC_DUAL_MEDIA_CTRL);
sys/dev/bce/if_bce.c
3023
u32 bond_id = val & BCE_MISC_DUAL_MEDIA_CTRL_BOND_ID;
sys/dev/bce/if_bce.c
3024
u32 strap;
sys/dev/bce/if_bce.c
324
static u32 bce_reg_rd (struct bce_softc *, u32);
sys/dev/bce/if_bce.c
325
static void bce_reg_wr (struct bce_softc *, u32, u32);
sys/dev/bce/if_bce.c
326
static void bce_reg_wr16 (struct bce_softc *, u32, u16);
sys/dev/bce/if_bce.c
327
static u32 bce_ctx_rd (struct bce_softc *, u32, u32);
sys/dev/bce/if_bce.c
365
static u32 bce_reg_rd_ind (struct bce_softc *, u32);
sys/dev/bce/if_bce.c
366
static void bce_reg_wr_ind (struct bce_softc *, u32, u32);
sys/dev/bce/if_bce.c
367
static void bce_shmem_wr (struct bce_softc *, u32, u32);
sys/dev/bce/if_bce.c
368
static u32 bce_shmem_rd (struct bce_softc *, u32);
sys/dev/bce/if_bce.c
369
static void bce_ctx_wr (struct bce_softc *, u32, u32, u32);
sys/dev/bce/if_bce.c
3860
bce_fw_sync(struct bce_softc *sc, u32 msg_data)
sys/dev/bce/if_bce.c
3863
u32 val;
sys/dev/bce/if_bce.c
388
static int bce_nvram_read_dword (struct bce_softc *, u32, u8 *, u32);
sys/dev/bce/if_bce.c
390
static int bce_nvram_read (struct bce_softc *, u32, u8 *, int);
sys/dev/bce/if_bce.c
3919
bce_load_rv2p_fw(struct bce_softc *sc, const u32 *rv2p_code,
sys/dev/bce/if_bce.c
3920
u32 rv2p_code_len, u32 rv2p_proc)
sys/dev/bce/if_bce.c
3923
u32 val;
sys/dev/bce/if_bce.c
395
static int bce_nvram_erase_page (struct bce_softc *, u32);
sys/dev/bce/if_bce.c
396
static int bce_nvram_write_dword (struct bce_softc *, u32, u8 *, u32);
sys/dev/bce/if_bce.c
397
static int bce_nvram_write (struct bce_softc *, u32, u8 *, int);
sys/dev/bce/if_bce.c
3972
u32 offset;
sys/dev/bce/if_bce.c
4047
u32 val;
sys/dev/bce/if_bce.c
406
static u32 bce_get_rphy_link (struct bce_softc *);
sys/dev/bce/if_bce.c
4069
u32 val;
sys/dev/bce/if_bce.c
416
static int bce_fw_sync (struct bce_softc *, u32);
sys/dev/bce/if_bce.c
417
static void bce_load_rv2p_fw (struct bce_softc *, const u32 *, u32,
sys/dev/bce/if_bce.c
418
u32);
sys/dev/bce/if_bce.c
434
static int bce_reset (struct bce_softc *, u32);
sys/dev/bce/if_bce.c
441
static int bce_get_rx_buf (struct bce_softc *, u16, u16, u32 *);
sys/dev/bce/if_bce.c
4648
u32 offset, val, vcid_addr;
sys/dev/bce/if_bce.c
4746
u32 mac_lo = 0, mac_hi = 0;
sys/dev/bce/if_bce.c
4788
u32 val;
sys/dev/bce/if_bce.c
4854
bce_reset(struct bce_softc *sc, u32 reset_code)
sys/dev/bce/if_bce.c
4856
u32 emac_mode_save, val;
sys/dev/bce/if_bce.c
4858
static const u32 emac_mode_mask = BCE_EMAC_MODE_PORT |
sys/dev/bce/if_bce.c
4978
u32 val;
sys/dev/bce/if_bce.c
5084
u32 reg, val;
sys/dev/bce/if_bce.c
5146
u32 base = ((BCE_TX_VEC - 1) * BCE_HC_SB_CONFIG_SIZE) +
sys/dev/bce/if_bce.c
5251
bce_get_rx_buf(struct bce_softc *sc, u16 prod, u16 chain_prod, u32 *prod_bseq)
sys/dev/bce/if_bce.c
5470
u32 val;
sys/dev/bce/if_bce.c
5619
u32 val;
sys/dev/bce/if_bce.c
5636
u32 lo_water, hi_water;
sys/dev/bce/if_bce.c
5757
u32 prod_bseq;
sys/dev/bce/if_bce.c
5847
u32 val;
sys/dev/bce/if_bce.c
6000
static u32
sys/dev/bce/if_bce.c
6003
u32 advertise, link;
sys/dev/bce/if_bce.c
6083
u32 link;
sys/dev/bce/if_bce.c
6196
u32 link;
sys/dev/bce/if_bce.c
6314
u32 new_link_state, old_link_state;
sys/dev/bce/if_bce.c
6403
u32 status;
sys/dev/bce/if_bce.c
6928
u32 ether_mtu = 0;
sys/dev/bce/if_bce.c
7220
u32 prod_bseq;
sys/dev/bce/if_bce.c
7617
"Received SIOCSIFCAP = 0x%08X\n", (u32) mask);
sys/dev/bce/if_bce.c
7765
u32 status_attn_bits;
sys/dev/bce/if_bce.c
7902
u32 *hashes = arg;
sys/dev/bce/if_bce.c
7915
u32 hashes[NUM_MC_HASH_REGISTERS] = { 0, 0, 0, 0, 0, 0, 0, 0 };
sys/dev/bce/if_bce.c
7916
u32 rx_mode, sort_mode;
sys/dev/bce/if_bce.c
810
u32 reg;
sys/dev/bce/if_bce.c
8240
u32 msg;
sys/dev/bce/if_bce.c
8247
msg = (u32) ++sc->bce_fw_drv_pulse_wr_seq;
sys/dev/bce/if_bce.c
8364
u32 ack, cap, link;
sys/dev/bce/if_bce.c
8737
u32 result;
sys/dev/bce/if_bce.c
8738
u32 val[1];
sys/dev/bce/if_bce.c
8765
u32 val, result;
sys/dev/bce/if_bce.c
9503
u32 val;
sys/dev/bce/if_bce.c
9519
u32 val;
sys/dev/bce/if_bcefw.h
11720
const u32 bce_RXP_b09FwData[(0x0/4) + 1] = { 0x0 };
sys/dev/bce/if_bcefw.h
11721
const u32 bce_RXP_b09FwRodata[(0x33c/4) + 1] = {
sys/dev/bce/if_bcefw.h
11775
const u32 bce_RXP_b09FwBss[(0x1bc/4) + 1] = { 0x0 };
sys/dev/bce/if_bcefw.h
11776
const u32 bce_RXP_b09FwSbss[(0x78/4) + 1] = { 0x0 };
sys/dev/bce/if_bcefw.h
11777
const u32 bce_RXP_b09FwSdata[(0x0/4) + 1] = { 0x0 };
sys/dev/bce/if_bcefw.h
11782
u32 bce_CP_b09FwStartAddr = 0x080000a0;
sys/dev/bce/if_bcefw.h
11783
u32 bce_CP_b09FwTextAddr = 0x08000000;
sys/dev/bce/if_bcefw.h
11785
u32 bce_CP_b09FwDataAddr = 0x08005920;
sys/dev/bce/if_bcefw.h
11787
u32 bce_CP_b09FwRodataAddr = 0x08005744;
sys/dev/bce/if_bcefw.h
11789
u32 bce_CP_b09FwBssAddr = 0x08005a58;
sys/dev/bce/if_bcefw.h
11791
u32 bce_CP_b09FwSbssAddr = 0x080059b0;
sys/dev/bce/if_bcefw.h
11793
u32 bce_CP_b09FwSDataAddr = 0x00000000;
sys/dev/bce/if_bcefw.h
11795
const u32 bce_CP_b09FwText[(0x5744/4) + 1] = {
sys/dev/bce/if_bcefw.h
1248
const u32 bce_COM_b06FwData[(0x0/4) + 1] = { 0x0 };
sys/dev/bce/if_bcefw.h
1249
const u32 bce_COM_b06FwRodata[(0x14/4) + 1] = {
sys/dev/bce/if_bcefw.h
1253
const u32 bce_COM_b06FwBss[(0xc4/4) + 1] = { 0x0 };
sys/dev/bce/if_bcefw.h
1254
const u32 bce_COM_b06FwSbss[(0x38/4) + 1] = { 0x0 };
sys/dev/bce/if_bcefw.h
1255
const u32 bce_COM_b06FwSdata[(0x0/4) + 1] = { 0x0 };
sys/dev/bce/if_bcefw.h
1260
u32 bce_RXP_b06FwStartAddr = 0x08003210;
sys/dev/bce/if_bcefw.h
1261
u32 bce_RXP_b06FwTextAddr = 0x08000000;
sys/dev/bce/if_bcefw.h
1263
u32 bce_RXP_b06FwDataAddr = 0x00000000;
sys/dev/bce/if_bcefw.h
1265
u32 bce_RXP_b06FwRodataAddr = 0x080072d0;
sys/dev/bce/if_bcefw.h
1267
u32 bce_RXP_b06FwBssAddr = 0x0800736c;
sys/dev/bce/if_bcefw.h
1269
u32 bce_RXP_b06FwSbssAddr = 0x08007320;
sys/dev/bce/if_bcefw.h
1271
u32 bce_RXP_b06FwSDataAddr = 0x00000000;
sys/dev/bce/if_bcefw.h
1273
const u32 bce_RXP_b06FwText[(0x72d0/4) + 1] = {
sys/dev/bce/if_bcefw.h
13193
const u32 bce_CP_b09FwData[(0x84/4) + 1] = {
sys/dev/bce/if_bcefw.h
13203
const u32 bce_CP_b09FwRodata[(0x1c0/4) + 1] = {
sys/dev/bce/if_bcefw.h
13233
const u32 bce_CP_b09FwBss[(0x19c/4) + 1] = { 0x0 };
sys/dev/bce/if_bcefw.h
13234
const u32 bce_CP_b09FwSbss[(0xa8/4) + 1] = { 0x0 };
sys/dev/bce/if_bcefw.h
13235
const u32 bce_CP_b09FwSdata[(0x0/4) + 1] = { 0x0 };
sys/dev/bce/if_bcefw.h
13237
const u32 bce_xi_rv2p_proc1[] = {
sys/dev/bce/if_bcefw.h
13527
const u32 bce_xi_rv2p_proc2[] = {
sys/dev/bce/if_bcefw.h
13995
const u32 bce_xi90_rv2p_proc1[] = {
sys/dev/bce/if_bcefw.h
14300
const u32 bce_xi90_rv2p_proc2[] = {
sys/dev/bce/if_bcefw.h
3112
const u32 bce_RXP_b06FwData[(0x0/4) + 1] = { 0x0 };
sys/dev/bce/if_bcefw.h
3113
const u32 bce_RXP_b06FwRodata[(0x24/4) + 1] = {
sys/dev/bce/if_bcefw.h
3118
const u32 bce_RXP_b06FwBss[(0x440/4) + 1] = { 0x0 };
sys/dev/bce/if_bcefw.h
3119
const u32 bce_RXP_b06FwSbss[(0x4c/4) + 1] = { 0x0 };
sys/dev/bce/if_bcefw.h
3120
const u32 bce_RXP_b06FwSdata[(0x0/4) + 1] = { 0x0 };
sys/dev/bce/if_bcefw.h
3125
u32 bce_TPAT_b06FwStartAddr = 0x08000490;
sys/dev/bce/if_bcefw.h
3126
u32 bce_TPAT_b06FwTextAddr = 0x08000400;
sys/dev/bce/if_bcefw.h
3128
u32 bce_TPAT_b06FwDataAddr = 0x00000000;
sys/dev/bce/if_bcefw.h
3130
u32 bce_TPAT_b06FwRodataAddr = 0x00000000;
sys/dev/bce/if_bcefw.h
3132
u32 bce_TPAT_b06FwBssAddr = 0x08001c44;
sys/dev/bce/if_bcefw.h
3134
u32 bce_TPAT_b06FwSbssAddr = 0x08001c00;
sys/dev/bce/if_bcefw.h
3136
u32 bce_TPAT_b06FwSDataAddr = 0x00000000;
sys/dev/bce/if_bcefw.h
3138
const u32 bce_TPAT_b06FwText[(0x17d4/4) + 1] = {
sys/dev/bce/if_bcefw.h
3521
const u32 bce_TPAT_b06FwData[(0x0/4) + 1] = { 0x0 };
sys/dev/bce/if_bcefw.h
3522
const u32 bce_TPAT_b06FwRodata[(0x0/4) + 1] = { 0x0 };
sys/dev/bce/if_bcefw.h
3523
const u32 bce_TPAT_b06FwBss[(0x450/4) + 1] = { 0x0 };
sys/dev/bce/if_bcefw.h
3524
const u32 bce_TPAT_b06FwSbss[(0x44/4) + 1] = { 0x0 };
sys/dev/bce/if_bcefw.h
3525
const u32 bce_TPAT_b06FwSdata[(0x0/4) + 1] = { 0x0 };
sys/dev/bce/if_bcefw.h
3530
u32 bce_TXP_b06FwStartAddr = 0x080000a8;
sys/dev/bce/if_bcefw.h
3531
u32 bce_TXP_b06FwTextAddr = 0x08000000;
sys/dev/bce/if_bcefw.h
3533
u32 bce_TXP_b06FwDataAddr = 0x00000000;
sys/dev/bce/if_bcefw.h
3535
u32 bce_TXP_b06FwRodataAddr = 0x00000000;
sys/dev/bce/if_bcefw.h
3537
u32 bce_TXP_b06FwBssAddr = 0x08003c88;
sys/dev/bce/if_bcefw.h
3539
u32 bce_TXP_b06FwSbssAddr = 0x08003c20;
sys/dev/bce/if_bcefw.h
3541
u32 bce_TXP_b06FwSDataAddr = 0x00000000;
sys/dev/bce/if_bcefw.h
3543
const u32 bce_TXP_b06FwText[(0x3bfc/4) + 1] = {
sys/dev/bce/if_bcefw.h
43
u32 bce_COM_b06FwStartAddr = 0x08000118;
sys/dev/bce/if_bcefw.h
44
u32 bce_COM_b06FwTextAddr = 0x08000000;
sys/dev/bce/if_bcefw.h
4505
const u32 bce_TXP_b06FwData[(0x0/4) + 1] = { 0x0 };
sys/dev/bce/if_bcefw.h
4506
const u32 bce_TXP_b06FwRodata[(0x0/4) + 1] = { 0x0 };
sys/dev/bce/if_bcefw.h
4507
const u32 bce_TXP_b06FwBss[(0x14c/4) + 1] = { 0x0 };
sys/dev/bce/if_bcefw.h
4508
const u32 bce_TXP_b06FwSbss[(0x68/4) + 1] = { 0x0 };
sys/dev/bce/if_bcefw.h
4509
const u32 bce_TXP_b06FwSdata[(0x0/4) + 1] = { 0x0 };
sys/dev/bce/if_bcefw.h
4514
u32 bce_CP_b06FwStartAddr = 0x080000a0;
sys/dev/bce/if_bcefw.h
4515
u32 bce_CP_b06FwTextAddr = 0x08000000;
sys/dev/bce/if_bcefw.h
4517
u32 bce_CP_b06FwDataAddr = 0x08005800;
sys/dev/bce/if_bcefw.h
4519
u32 bce_CP_b06FwRodataAddr = 0x08005688;
sys/dev/bce/if_bcefw.h
4521
u32 bce_CP_b06FwBssAddr = 0x08005978;
sys/dev/bce/if_bcefw.h
4523
u32 bce_CP_b06FwSbssAddr = 0x08005884;
sys/dev/bce/if_bcefw.h
4525
u32 bce_CP_b06FwSDataAddr = 0x00000000;
sys/dev/bce/if_bcefw.h
4527
const u32 bce_CP_b06FwText[(0x5688/4) + 1] = {
sys/dev/bce/if_bcefw.h
46
u32 bce_COM_b06FwDataAddr = 0x00000000;
sys/dev/bce/if_bcefw.h
48
u32 bce_COM_b06FwRodataAddr = 0x08004a68;
sys/dev/bce/if_bcefw.h
50
u32 bce_COM_b06FwBssAddr = 0x08004ad8;
sys/dev/bce/if_bcefw.h
52
u32 bce_COM_b06FwSbssAddr = 0x08004aa0;
sys/dev/bce/if_bcefw.h
54
u32 bce_COM_b06FwSDataAddr = 0x00000000;
sys/dev/bce/if_bcefw.h
56
const u32 bce_COM_b06FwText[(0x4a68/4) + 1] = {
sys/dev/bce/if_bcefw.h
5913
const u32 bce_CP_b06FwData[(0x84/4) + 1] = {
sys/dev/bce/if_bcefw.h
5923
const u32 bce_CP_b06FwRodata[(0x158/4) + 1] = {
sys/dev/bce/if_bcefw.h
5946
const u32 bce_CP_b06FwBss[(0x5d8/4) + 1] = { 0x0 };
sys/dev/bce/if_bcefw.h
5947
const u32 bce_CP_b06FwSbss[(0xf1/4) + 1] = { 0x0 };
sys/dev/bce/if_bcefw.h
5948
const u32 bce_CP_b06FwSdata[(0x0/4) + 1] = { 0x0 };
sys/dev/bce/if_bcefw.h
5950
const u32 bce_rv2p_proc1[] = {
sys/dev/bce/if_bcefw.h
6240
u32 bce_rv2p_proc2[] = {
sys/dev/bce/if_bcefw.h
6660
u32 bce_TXP_b09FwStartAddr = 0x080000a8;
sys/dev/bce/if_bcefw.h
6661
u32 bce_TXP_b09FwTextAddr = 0x08000000;
sys/dev/bce/if_bcefw.h
6663
u32 bce_TXP_b09FwDataAddr = 0x00000000;
sys/dev/bce/if_bcefw.h
6665
u32 bce_TXP_b09FwRodataAddr = 0x08003d28;
sys/dev/bce/if_bcefw.h
6667
u32 bce_TXP_b09FwBssAddr = 0x08003df0;
sys/dev/bce/if_bcefw.h
6669
u32 bce_TXP_b09FwSbssAddr = 0x08003d88;
sys/dev/bce/if_bcefw.h
6671
u32 bce_TXP_b09FwSDataAddr = 0x00000000;
sys/dev/bce/if_bcefw.h
6673
const u32 bce_TXP_b09FwText[(0x3d28/4) + 1] = {
sys/dev/bce/if_bcefw.h
7653
const u32 bce_TXP_b09FwData[(0x0/4) + 1] = { 0x0 };
sys/dev/bce/if_bcefw.h
7654
const u32 bce_TXP_b09FwRodata[(0x30/4) + 1] = {
sys/dev/bce/if_bcefw.h
7659
const u32 bce_TXP_b09FwBss[(0x24c/4) + 1] = { 0x0 };
sys/dev/bce/if_bcefw.h
7660
const u32 bce_TXP_b09FwSbss[(0x64/4) + 1] = { 0x0 };
sys/dev/bce/if_bcefw.h
7661
const u32 bce_TXP_b09FwSdata[(0x0/4) + 1] = { 0x0 };
sys/dev/bce/if_bcefw.h
7666
u32 bce_TPAT_b09FwStartAddr = 0x08000490;
sys/dev/bce/if_bcefw.h
7667
u32 bce_TPAT_b09FwTextAddr = 0x08000400;
sys/dev/bce/if_bcefw.h
7669
u32 bce_TPAT_b09FwDataAddr = 0x00000000;
sys/dev/bce/if_bcefw.h
7671
u32 bce_TPAT_b09FwRodataAddr = 0x080016fc;
sys/dev/bce/if_bcefw.h
7673
u32 bce_TPAT_b09FwBssAddr = 0x0800175c;
sys/dev/bce/if_bcefw.h
7675
u32 bce_TPAT_b09FwSbssAddr = 0x08001720;
sys/dev/bce/if_bcefw.h
7677
u32 bce_TPAT_b09FwSDataAddr = 0x00000000;
sys/dev/bce/if_bcefw.h
7679
const u32 bce_TPAT_b09FwText[(0x12fc/4) + 1] = {
sys/dev/bce/if_bcefw.h
7985
const u32 bce_TPAT_b09FwData[(0x0/4) + 1] = { 0x0 };
sys/dev/bce/if_bcefw.h
7986
const u32 bce_TPAT_b09FwRodata[(0x4/4) + 1] = {
sys/dev/bce/if_bcefw.h
7988
const u32 bce_TPAT_b09FwBss[(0x12b4/4) + 1] = { 0x0 };
sys/dev/bce/if_bcefw.h
7989
const u32 bce_TPAT_b09FwSbss[(0x3c/4) + 1] = { 0x0 };
sys/dev/bce/if_bcefw.h
7990
const u32 bce_TPAT_b09FwSdata[(0x0/4) + 1] = { 0x0 };
sys/dev/bce/if_bcefw.h
7995
u32 bce_COM_b09FwStartAddr = 0x08000118;
sys/dev/bce/if_bcefw.h
7996
u32 bce_COM_b09FwTextAddr = 0x08000000;
sys/dev/bce/if_bcefw.h
7998
u32 bce_COM_b09FwDataAddr = 0x00000000;
sys/dev/bce/if_bcefw.h
8000
u32 bce_COM_b09FwRodataAddr = 0x08005594;
sys/dev/bce/if_bcefw.h
8002
u32 bce_COM_b09FwBssAddr = 0x08005638;
sys/dev/bce/if_bcefw.h
8004
u32 bce_COM_b09FwSbssAddr = 0x08005608;
sys/dev/bce/if_bcefw.h
8006
u32 bce_COM_b09FwSDataAddr = 0x00000000;
sys/dev/bce/if_bcefw.h
8008
const u32 bce_COM_b09FwText[(0x5594/4) + 1] = {
sys/dev/bce/if_bcefw.h
9379
const u32 bce_COM_b09FwData[(0x0/4) + 1] = { 0x0 };
sys/dev/bce/if_bcefw.h
9380
const u32 bce_COM_b09FwRodata[(0x38/4) + 1] = {
sys/dev/bce/if_bcefw.h
9385
const u32 bce_COM_b09FwBss[(0x11c/4) + 1] = { 0x0 };
sys/dev/bce/if_bcefw.h
9386
const u32 bce_COM_b09FwSbss[(0x30/4) + 1] = { 0x0 };
sys/dev/bce/if_bcefw.h
9387
const u32 bce_COM_b09FwSdata[(0x0/4) + 1] = { 0x0 };
sys/dev/bce/if_bcefw.h
9392
u32 bce_RXP_b09FwStartAddr = 0x08003210;
sys/dev/bce/if_bcefw.h
9393
u32 bce_RXP_b09FwTextAddr = 0x08000000;
sys/dev/bce/if_bcefw.h
9395
u32 bce_RXP_b09FwDataAddr = 0x00000000;
sys/dev/bce/if_bcefw.h
9397
u32 bce_RXP_b09FwRodataAddr = 0x08009090;
sys/dev/bce/if_bcefw.h
9399
u32 bce_RXP_b09FwBssAddr = 0x08009478;
sys/dev/bce/if_bcefw.h
9401
u32 bce_RXP_b09FwSbssAddr = 0x08009400;
sys/dev/bce/if_bcefw.h
9403
u32 bce_RXP_b09FwSDataAddr = 0x00000000;
sys/dev/bce/if_bcefw.h
9405
const u32 bce_RXP_b09FwText[(0x9090/4) + 1] = {
sys/dev/bce/if_bcereg.h
1085
#define BCE_ADDR_LO(y) ((u32)y)
sys/dev/bce/if_bcereg.h
1100
u32 tx_bd_haddr_hi;
sys/dev/bce/if_bcereg.h
1101
u32 tx_bd_haddr_lo;
sys/dev/bce/if_bcereg.h
1102
u32 tx_bd_mss_nbytes;
sys/dev/bce/if_bcereg.h
1123
u32 rx_bd_haddr_hi;
sys/dev/bce/if_bcereg.h
1124
u32 rx_bd_haddr_lo;
sys/dev/bce/if_bcereg.h
1125
u32 rx_bd_len;
sys/dev/bce/if_bcereg.h
1126
u32 rx_bd_flags;
sys/dev/bce/if_bcereg.h
1137
u32 status_attn_bits;
sys/dev/bce/if_bcereg.h
1168
u32 status_attn_bits_ack;
sys/dev/bce/if_bcereg.h
1226
u32 stat_IfHCInOctets_hi;
sys/dev/bce/if_bcereg.h
1227
u32 stat_IfHCInOctets_lo;
sys/dev/bce/if_bcereg.h
1228
u32 stat_IfHCInBadOctets_hi;
sys/dev/bce/if_bcereg.h
1229
u32 stat_IfHCInBadOctets_lo;
sys/dev/bce/if_bcereg.h
1230
u32 stat_IfHCOutOctets_hi;
sys/dev/bce/if_bcereg.h
1231
u32 stat_IfHCOutOctets_lo;
sys/dev/bce/if_bcereg.h
1232
u32 stat_IfHCOutBadOctets_hi;
sys/dev/bce/if_bcereg.h
1233
u32 stat_IfHCOutBadOctets_lo;
sys/dev/bce/if_bcereg.h
1234
u32 stat_IfHCInUcastPkts_hi;
sys/dev/bce/if_bcereg.h
1235
u32 stat_IfHCInUcastPkts_lo;
sys/dev/bce/if_bcereg.h
1236
u32 stat_IfHCInMulticastPkts_hi;
sys/dev/bce/if_bcereg.h
1237
u32 stat_IfHCInMulticastPkts_lo;
sys/dev/bce/if_bcereg.h
1238
u32 stat_IfHCInBroadcastPkts_hi;
sys/dev/bce/if_bcereg.h
1239
u32 stat_IfHCInBroadcastPkts_lo;
sys/dev/bce/if_bcereg.h
1240
u32 stat_IfHCOutUcastPkts_hi;
sys/dev/bce/if_bcereg.h
1241
u32 stat_IfHCOutUcastPkts_lo;
sys/dev/bce/if_bcereg.h
1242
u32 stat_IfHCOutMulticastPkts_hi;
sys/dev/bce/if_bcereg.h
1243
u32 stat_IfHCOutMulticastPkts_lo;
sys/dev/bce/if_bcereg.h
1244
u32 stat_IfHCOutBroadcastPkts_hi;
sys/dev/bce/if_bcereg.h
1245
u32 stat_IfHCOutBroadcastPkts_lo;
sys/dev/bce/if_bcereg.h
1246
u32 stat_emac_tx_stat_dot3statsinternalmactransmiterrors;
sys/dev/bce/if_bcereg.h
1247
u32 stat_Dot3StatsCarrierSenseErrors;
sys/dev/bce/if_bcereg.h
1248
u32 stat_Dot3StatsFCSErrors;
sys/dev/bce/if_bcereg.h
1249
u32 stat_Dot3StatsAlignmentErrors;
sys/dev/bce/if_bcereg.h
1250
u32 stat_Dot3StatsSingleCollisionFrames;
sys/dev/bce/if_bcereg.h
1251
u32 stat_Dot3StatsMultipleCollisionFrames;
sys/dev/bce/if_bcereg.h
1252
u32 stat_Dot3StatsDeferredTransmissions;
sys/dev/bce/if_bcereg.h
1253
u32 stat_Dot3StatsExcessiveCollisions;
sys/dev/bce/if_bcereg.h
1254
u32 stat_Dot3StatsLateCollisions;
sys/dev/bce/if_bcereg.h
1255
u32 stat_EtherStatsCollisions;
sys/dev/bce/if_bcereg.h
1256
u32 stat_EtherStatsFragments;
sys/dev/bce/if_bcereg.h
1257
u32 stat_EtherStatsJabbers;
sys/dev/bce/if_bcereg.h
1258
u32 stat_EtherStatsUndersizePkts;
sys/dev/bce/if_bcereg.h
1259
u32 stat_EtherStatsOversizePkts;
sys/dev/bce/if_bcereg.h
1260
u32 stat_EtherStatsPktsRx64Octets;
sys/dev/bce/if_bcereg.h
1261
u32 stat_EtherStatsPktsRx65Octetsto127Octets;
sys/dev/bce/if_bcereg.h
1262
u32 stat_EtherStatsPktsRx128Octetsto255Octets;
sys/dev/bce/if_bcereg.h
1263
u32 stat_EtherStatsPktsRx256Octetsto511Octets;
sys/dev/bce/if_bcereg.h
1264
u32 stat_EtherStatsPktsRx512Octetsto1023Octets;
sys/dev/bce/if_bcereg.h
1265
u32 stat_EtherStatsPktsRx1024Octetsto1522Octets;
sys/dev/bce/if_bcereg.h
1266
u32 stat_EtherStatsPktsRx1523Octetsto9022Octets;
sys/dev/bce/if_bcereg.h
1267
u32 stat_EtherStatsPktsTx64Octets;
sys/dev/bce/if_bcereg.h
1268
u32 stat_EtherStatsPktsTx65Octetsto127Octets;
sys/dev/bce/if_bcereg.h
1269
u32 stat_EtherStatsPktsTx128Octetsto255Octets;
sys/dev/bce/if_bcereg.h
1270
u32 stat_EtherStatsPktsTx256Octetsto511Octets;
sys/dev/bce/if_bcereg.h
1271
u32 stat_EtherStatsPktsTx512Octetsto1023Octets;
sys/dev/bce/if_bcereg.h
1272
u32 stat_EtherStatsPktsTx1024Octetsto1522Octets;
sys/dev/bce/if_bcereg.h
1273
u32 stat_EtherStatsPktsTx1523Octetsto9022Octets;
sys/dev/bce/if_bcereg.h
1274
u32 stat_XonPauseFramesReceived;
sys/dev/bce/if_bcereg.h
1275
u32 stat_XoffPauseFramesReceived;
sys/dev/bce/if_bcereg.h
1276
u32 stat_OutXonSent;
sys/dev/bce/if_bcereg.h
1277
u32 stat_OutXoffSent;
sys/dev/bce/if_bcereg.h
1278
u32 stat_FlowControlDone;
sys/dev/bce/if_bcereg.h
1279
u32 stat_MacControlFramesReceived;
sys/dev/bce/if_bcereg.h
1280
u32 stat_XoffStateEntered;
sys/dev/bce/if_bcereg.h
1281
u32 stat_IfInFramesL2FilterDiscards;
sys/dev/bce/if_bcereg.h
1282
u32 stat_IfInRuleCheckerDiscards;
sys/dev/bce/if_bcereg.h
1283
u32 stat_IfInFTQDiscards;
sys/dev/bce/if_bcereg.h
1284
u32 stat_IfInMBUFDiscards;
sys/dev/bce/if_bcereg.h
1285
u32 stat_IfInRuleCheckerP4Hit;
sys/dev/bce/if_bcereg.h
1286
u32 stat_CatchupInRuleCheckerDiscards;
sys/dev/bce/if_bcereg.h
1287
u32 stat_CatchupInFTQDiscards;
sys/dev/bce/if_bcereg.h
1288
u32 stat_CatchupInMBUFDiscards;
sys/dev/bce/if_bcereg.h
1289
u32 stat_CatchupInRuleCheckerP4Hit;
sys/dev/bce/if_bcereg.h
1290
u32 stat_GenStat00;
sys/dev/bce/if_bcereg.h
1291
u32 stat_GenStat01;
sys/dev/bce/if_bcereg.h
1292
u32 stat_GenStat02;
sys/dev/bce/if_bcereg.h
1293
u32 stat_GenStat03;
sys/dev/bce/if_bcereg.h
1294
u32 stat_GenStat04;
sys/dev/bce/if_bcereg.h
1295
u32 stat_GenStat05;
sys/dev/bce/if_bcereg.h
1296
u32 stat_GenStat06;
sys/dev/bce/if_bcereg.h
1297
u32 stat_GenStat07;
sys/dev/bce/if_bcereg.h
1298
u32 stat_GenStat08;
sys/dev/bce/if_bcereg.h
1299
u32 stat_GenStat09;
sys/dev/bce/if_bcereg.h
1300
u32 stat_GenStat10;
sys/dev/bce/if_bcereg.h
1301
u32 stat_GenStat11;
sys/dev/bce/if_bcereg.h
1302
u32 stat_GenStat12;
sys/dev/bce/if_bcereg.h
1303
u32 stat_GenStat13;
sys/dev/bce/if_bcereg.h
1304
u32 stat_GenStat14;
sys/dev/bce/if_bcereg.h
1305
u32 stat_GenStat15;
sys/dev/bce/if_bcereg.h
1312
u32 l2_fhdr_status;
sys/dev/bce/if_bcereg.h
1334
u32 l2_fhdr_hash;
sys/dev/bce/if_bcereg.h
409
u32 bce_debug_temp = bce_debug; \
sys/dev/bce/if_bcereg.h
6169
u32 mode;
sys/dev/bce/if_bcereg.h
6170
u32 mode_value_halt;
sys/dev/bce/if_bcereg.h
6171
u32 mode_value_sstep;
sys/dev/bce/if_bcereg.h
6173
u32 state;
sys/dev/bce/if_bcereg.h
6174
u32 state_value_clear;
sys/dev/bce/if_bcereg.h
6176
u32 gpr0;
sys/dev/bce/if_bcereg.h
6177
u32 evmask;
sys/dev/bce/if_bcereg.h
6178
u32 pc;
sys/dev/bce/if_bcereg.h
6179
u32 inst;
sys/dev/bce/if_bcereg.h
6180
u32 bp;
sys/dev/bce/if_bcereg.h
6182
u32 spad_base;
sys/dev/bce/if_bcereg.h
6184
u32 mips_view_base;
sys/dev/bce/if_bcereg.h
6188
u32 ver_major;
sys/dev/bce/if_bcereg.h
6189
u32 ver_minor;
sys/dev/bce/if_bcereg.h
6190
u32 ver_fix;
sys/dev/bce/if_bcereg.h
6192
u32 start_addr;
sys/dev/bce/if_bcereg.h
6195
u32 text_addr;
sys/dev/bce/if_bcereg.h
6196
u32 text_len;
sys/dev/bce/if_bcereg.h
6197
u32 text_index;
sys/dev/bce/if_bcereg.h
6198
const u32 *text;
sys/dev/bce/if_bcereg.h
6201
u32 data_addr;
sys/dev/bce/if_bcereg.h
6202
u32 data_len;
sys/dev/bce/if_bcereg.h
6203
u32 data_index;
sys/dev/bce/if_bcereg.h
6204
const u32 *data;
sys/dev/bce/if_bcereg.h
6207
u32 sbss_addr;
sys/dev/bce/if_bcereg.h
6208
u32 sbss_len;
sys/dev/bce/if_bcereg.h
6209
u32 sbss_index;
sys/dev/bce/if_bcereg.h
6210
const u32 *sbss;
sys/dev/bce/if_bcereg.h
6213
u32 bss_addr;
sys/dev/bce/if_bcereg.h
6214
u32 bss_len;
sys/dev/bce/if_bcereg.h
6215
u32 bss_index;
sys/dev/bce/if_bcereg.h
6216
const u32 *bss;
sys/dev/bce/if_bcereg.h
6219
u32 rodata_addr;
sys/dev/bce/if_bcereg.h
622
u32 strapping;
sys/dev/bce/if_bcereg.h
6220
u32 rodata_len;
sys/dev/bce/if_bcereg.h
6221
u32 rodata_index;
sys/dev/bce/if_bcereg.h
6222
const u32 *rodata;
sys/dev/bce/if_bcereg.h
623
u32 config1;
sys/dev/bce/if_bcereg.h
624
u32 config2;
sys/dev/bce/if_bcereg.h
625
u32 config3;
sys/dev/bce/if_bcereg.h
626
u32 write1;
sys/dev/bce/if_bcereg.h
630
u32 flags;
sys/dev/bce/if_bcereg.h
631
u32 page_bits;
sys/dev/bce/if_bcereg.h
632
u32 page_size;
sys/dev/bce/if_bcereg.h
6329
u32 bce_chipid;
sys/dev/bce/if_bcereg.h
633
u32 addr_mask;
sys/dev/bce/if_bcereg.h
6332
u32 bce_flags;
sys/dev/bce/if_bcereg.h
634
u32 total_size;
sys/dev/bce/if_bcereg.h
6347
u32 bce_cap_flags;
sys/dev/bce/if_bcereg.h
6354
u32 bce_phy_flags;
sys/dev/bce/if_bcereg.h
6367
u32 bce_shared_hw_cfg;
sys/dev/bce/if_bcereg.h
6368
u32 bce_port_hw_cfg;
sys/dev/bce/if_bcereg.h
6385
u32 bce_flash_size;
sys/dev/bce/if_bcereg.h
6388
u32 bce_shmem_base;
sys/dev/bce/if_bcereg.h
6437
u32 bce_stats_ticks;
sys/dev/bce/if_bcereg.h
6450
u32 rx_prod_bseq;
sys/dev/bce/if_bcereg.h
6457
u32 tx_prod_bseq;
sys/dev/bce/if_bcereg.h
6476
u32 rx_mode;
sys/dev/bce/if_bcereg.h
6565
u32 stat_emac_tx_stat_dot3statsinternalmactransmiterrors;
sys/dev/bce/if_bcereg.h
6566
u32 stat_Dot3StatsCarrierSenseErrors;
sys/dev/bce/if_bcereg.h
6567
u32 stat_Dot3StatsFCSErrors;
sys/dev/bce/if_bcereg.h
6568
u32 stat_Dot3StatsAlignmentErrors;
sys/dev/bce/if_bcereg.h
6569
u32 stat_Dot3StatsSingleCollisionFrames;
sys/dev/bce/if_bcereg.h
6570
u32 stat_Dot3StatsMultipleCollisionFrames;
sys/dev/bce/if_bcereg.h
6571
u32 stat_Dot3StatsDeferredTransmissions;
sys/dev/bce/if_bcereg.h
6572
u32 stat_Dot3StatsExcessiveCollisions;
sys/dev/bce/if_bcereg.h
6573
u32 stat_Dot3StatsLateCollisions;
sys/dev/bce/if_bcereg.h
6574
u32 stat_EtherStatsCollisions;
sys/dev/bce/if_bcereg.h
6575
u32 stat_EtherStatsFragments;
sys/dev/bce/if_bcereg.h
6576
u32 stat_EtherStatsJabbers;
sys/dev/bce/if_bcereg.h
6577
u32 stat_EtherStatsUndersizePkts;
sys/dev/bce/if_bcereg.h
6578
u32 stat_EtherStatsOversizePkts;
sys/dev/bce/if_bcereg.h
6579
u32 stat_EtherStatsPktsRx64Octets;
sys/dev/bce/if_bcereg.h
6580
u32 stat_EtherStatsPktsRx65Octetsto127Octets;
sys/dev/bce/if_bcereg.h
6581
u32 stat_EtherStatsPktsRx128Octetsto255Octets;
sys/dev/bce/if_bcereg.h
6582
u32 stat_EtherStatsPktsRx256Octetsto511Octets;
sys/dev/bce/if_bcereg.h
6583
u32 stat_EtherStatsPktsRx512Octetsto1023Octets;
sys/dev/bce/if_bcereg.h
6584
u32 stat_EtherStatsPktsRx1024Octetsto1522Octets;
sys/dev/bce/if_bcereg.h
6585
u32 stat_EtherStatsPktsRx1523Octetsto9022Octets;
sys/dev/bce/if_bcereg.h
6586
u32 stat_EtherStatsPktsTx64Octets;
sys/dev/bce/if_bcereg.h
6587
u32 stat_EtherStatsPktsTx65Octetsto127Octets;
sys/dev/bce/if_bcereg.h
6588
u32 stat_EtherStatsPktsTx128Octetsto255Octets;
sys/dev/bce/if_bcereg.h
6589
u32 stat_EtherStatsPktsTx256Octetsto511Octets;
sys/dev/bce/if_bcereg.h
6590
u32 stat_EtherStatsPktsTx512Octetsto1023Octets;
sys/dev/bce/if_bcereg.h
6591
u32 stat_EtherStatsPktsTx1024Octetsto1522Octets;
sys/dev/bce/if_bcereg.h
6592
u32 stat_EtherStatsPktsTx1523Octetsto9022Octets;
sys/dev/bce/if_bcereg.h
6593
u32 stat_XonPauseFramesReceived;
sys/dev/bce/if_bcereg.h
6594
u32 stat_XoffPauseFramesReceived;
sys/dev/bce/if_bcereg.h
6595
u32 stat_OutXonSent;
sys/dev/bce/if_bcereg.h
6596
u32 stat_OutXoffSent;
sys/dev/bce/if_bcereg.h
6597
u32 stat_FlowControlDone;
sys/dev/bce/if_bcereg.h
6598
u32 stat_MacControlFramesReceived;
sys/dev/bce/if_bcereg.h
6599
u32 stat_XoffStateEntered;
sys/dev/bce/if_bcereg.h
6600
u32 stat_IfInFramesL2FilterDiscards;
sys/dev/bce/if_bcereg.h
6601
u32 stat_IfInRuleCheckerDiscards;
sys/dev/bce/if_bcereg.h
6602
u32 stat_IfInFTQDiscards;
sys/dev/bce/if_bcereg.h
6603
u32 stat_IfInMBUFDiscards;
sys/dev/bce/if_bcereg.h
6604
u32 stat_IfInRuleCheckerP4Hit;
sys/dev/bce/if_bcereg.h
6605
u32 stat_CatchupInRuleCheckerDiscards;
sys/dev/bce/if_bcereg.h
6606
u32 stat_CatchupInFTQDiscards;
sys/dev/bce/if_bcereg.h
6607
u32 stat_CatchupInMBUFDiscards;
sys/dev/bce/if_bcereg.h
6608
u32 stat_CatchupInRuleCheckerP4Hit;
sys/dev/bce/if_bcereg.h
6611
u32 com_no_buffers;
sys/dev/bce/if_bcereg.h
6614
u32 mbuf_alloc_failed_count;
sys/dev/bce/if_bcereg.h
6615
u32 mbuf_frag_count;
sys/dev/bce/if_bcereg.h
6616
u32 unexpected_attention_count;
sys/dev/bce/if_bcereg.h
6617
u32 l2fhdr_error_count;
sys/dev/bce/if_bcereg.h
6618
u32 dma_map_addr_tx_failed_count;
sys/dev/bce/if_bcereg.h
6619
u32 dma_map_addr_rx_failed_count;
sys/dev/bce/if_bcereg.h
6620
u32 watchdog_timeouts;
sys/dev/bce/if_bcereg.h
6623
u32 hc_command;
sys/dev/bce/if_bcereg.h
6626
u32 bc_state;
sys/dev/bce/if_bcereg.h
6630
u32 mbuf_alloc_failed_sim_count;
sys/dev/bce/if_bcereg.h
6631
u32 unexpected_attention_sim_count;
sys/dev/bce/if_bcereg.h
6632
u32 l2fhdr_error_sim_count;
sys/dev/bce/if_bcereg.h
6633
u32 dma_map_addr_failed_sim_count;
sys/dev/bhnd/nvram/bhnd_nvram_data_bcm.c
631
BCM_READ_HDR_VAR(BCM_NVRAM_SDRAM_NCDL, u32, le32toh);
sys/dev/bhnd/nvram/bhnd_nvram_data_bcmvar.h
40
uint32_t u32;
sys/dev/bhnd/nvram/bhnd_nvram_data_sprom.c
1023
NV_PARSE_INT(uint32_t, u32, le32toh);
sys/dev/bhnd/nvram/bhnd_nvram_data_sprom.c
405
uint32_t u32[BHND_SPROM_ARRAY_MAXLEN];
sys/dev/bhnd/nvram/bhnd_nvram_data_sprom.c
439
if (ilen > sizeof(u32)) {
sys/dev/bhnd/nvram/bhnd_nvram_data_sprom.c
456
memset(u32, 0xFF, ilen);
sys/dev/bhnd/nvram/bhnd_nvram_data_sprom.c
490
u32, &ilen, itype);
sys/dev/bhnd/nvram/bhnd_nvram_data_sprom.c
504
error = bhnd_nvram_value_nelem(u32, ilen, itype, &enc_nelem);
sys/dev/bhnd/nvram/bhnd_nvram_data_sprom.c
569
u32[ipos]);
sys/dev/bhnd/nvram/bhnd_nvram_data_sprom.c
943
NV_WRITE_INT(uint32_t, u32, htole32);
sys/dev/bhnd/nvram/bhnd_nvram_data_spromvar.h
162
uint32_t u32[BHND_SPROM_ARRAY_MAXLEN];
sys/dev/bhnd/nvram/bhnd_nvram_value.c
1823
NV_STORE_INLINE(uint32_t, u32);
sys/dev/bhnd/nvram/bhnd_nvram_value.c
1828
NV_STORE_INLINE(uint32_t, u32);
sys/dev/bhnd/nvram/bhnd_nvram_value.c
1848
NV_COPY_ARRRAY_INLINE(uint32_t, u32);
sys/dev/bhnd/nvram/bhnd_nvram_value.h
228
uint32_t u32[2]; /**< 32-bit unsigned data */
sys/dev/bhnd/nvram/bhnd_nvram_value_fmts.c
395
uint32_t u32;
sys/dev/bhnd/nvram/bhnd_nvram_value_fmts.c
461
strval.u32 = ival;
sys/dev/bhnd/nvram/bhnd_nvram_value_prf.c
622
uint32_t u32;
sys/dev/bnxt/bnxt_en/bnxt.h
604
u32 db_key32;
sys/dev/bnxt/bnxt_en/bnxt.h
779
u32 flags;
sys/dev/bnxt/bnxt_en/bnxt.h
781
u32 instance_bmap;
sys/dev/bnxt/bnxt_en/bnxt.h
786
u32 max_entries;
sys/dev/bnxt/bnxt_en/bnxt.h
787
u32 min_entries;
sys/dev/bnxt/bnxt_en/bnxt.h
794
u32 qp_l2_entries;
sys/dev/bnxt/bnxt_en/bnxt.h
795
u32 qp_qp1_entries;
sys/dev/bnxt/bnxt_en/bnxt.h
797
u32 srq_l2_entries;
sys/dev/bnxt/bnxt_en/bnxt.h
798
u32 cq_l2_entries;
sys/dev/bnxt/bnxt_en/bnxt.h
799
u32 vnic_entries;
sys/dev/bnxt/bnxt_en/bnxt.h
801
u32 mrav_av_entries;
sys/dev/bnxt/bnxt_en/bnxt.h
802
u32 mrav_num_entries_units;
sys/dev/bnxt/bnxt_en/bnxt.h
804
u32 split[BNXT_MAX_SPLIT_ENTRY];
sys/dev/bnxt/bnxt_en/bnxt.h
838
u32 flags;
sys/dev/bnxt/bnxt_en/bnxt.h
929
u32 flags;
sys/dev/bnxt/bnxt_en/bnxt.h
930
u32 polling_dsecs;
sys/dev/bnxt/bnxt_en/bnxt.h
931
u32 master_func_wait_dsecs;
sys/dev/bnxt/bnxt_en/bnxt.h
932
u32 normal_func_wait_dsecs;
sys/dev/bnxt/bnxt_en/bnxt.h
933
u32 post_reset_wait_dsecs;
sys/dev/bnxt/bnxt_en/bnxt.h
934
u32 post_reset_max_wait_dsecs;
sys/dev/bnxt/bnxt_en/bnxt.h
935
u32 regs[4];
sys/dev/bnxt/bnxt_en/bnxt.h
936
u32 mapped_regs[4];
sys/dev/bnxt/bnxt_en/bnxt.h
941
u32 fw_reset_inprog_reg_mask;
sys/dev/bnxt/bnxt_en/bnxt.h
942
u32 last_fw_heartbeat;
sys/dev/bnxt/bnxt_en/bnxt.h
943
u32 last_fw_reset_cnt;
sys/dev/bnxt/bnxt_en/bnxt.h
951
u32 fw_reset_seq_regs[16];
sys/dev/bnxt/bnxt_en/bnxt.h
952
u32 fw_reset_seq_vals[16];
sys/dev/bnxt/bnxt_en/bnxt.h
953
u32 fw_reset_seq_delay_msec[16];
sys/dev/bnxt/bnxt_en/bnxt.h
954
u32 echo_req_data1;
sys/dev/bnxt/bnxt_en/bnxt.h
955
u32 echo_req_data2;
sys/dev/bnxt/bnxt_en/bnxt.h
960
u32 arrests;
sys/dev/bnxt/bnxt_en/bnxt.h
961
u32 discoveries;
sys/dev/bnxt/bnxt_en/bnxt.h
962
u32 survivals;
sys/dev/bnxt/bnxt_en/bnxt.h
963
u32 fatalities;
sys/dev/bnxt/bnxt_en/bnxt.h
964
u32 diagnoses;
sys/dev/bnxt/bnxt_en/bnxt_hwrm.c
1028
u32 *events = (u32 *)async_events_bmap;
sys/dev/bnxt/bnxt_en/bnxt_hwrm.c
1032
u32 flags = 0;
sys/dev/bnxt/bnxt_en/bnxt_hwrm.c
413
u32 flags;
sys/dev/bnxt/bnxt_en/bnxt_hwrm.c
605
u32 req_len = sizeof(req);
sys/dev/bnxt/bnxt_en/bnxt_hwrm.c
607
u32 ena, flags = 0;
sys/dev/bnxt/bnxt_en/bnxt_hwrm.c
774
u32 instance_bmap = ctxm->instance_bmap;
sys/dev/bnxt/bnxt_en/bnxt_ulp.h
110
u32 ulp_version; /* bnxt_re checks the
sys/dev/bnxt/bnxt_en/bnxt_ulp.h
128
u32 espeed;
sys/dev/bnxt/bnxt_en/bnxt_ulp.h
145
int (*bnxt_dbr_complete)(struct bnxt_en_dev *, int, u32);
sys/dev/bnxt/bnxt_en/bnxt_ulp.h
84
u32 flags;
sys/dev/bnxt/bnxt_en/if_bnxt.c
1059
struct bnxt_ctx_mem_type *ctxm, u32 entries,
sys/dev/bnxt/bnxt_en/if_bnxt.c
1064
u32 mem_size;
sys/dev/bnxt/bnxt_en/if_bnxt.c
1072
entries = clamp_t(u32, entries, ctxm->min_entries, ctxm->max_entries);
sys/dev/bnxt/bnxt_en/if_bnxt.c
1114
bnxt_backing_store_cfg_v2(struct bnxt_softc *softc, u32 ena)
sys/dev/bnxt/bnxt_en/if_bnxt.c
1166
u32 l2_qps, qp1_qps, max_qps;
sys/dev/bnxt/bnxt_en/if_bnxt.c
1167
u32 ena, entries_sp, entries;
sys/dev/bnxt/bnxt_en/if_bnxt.c
1168
u32 srqs, max_srqs, min;
sys/dev/bnxt/bnxt_en/if_bnxt.c
1169
u32 num_mr, num_ah;
sys/dev/bnxt/bnxt_en/if_bnxt.c
1170
u32 extra_srqs = 0;
sys/dev/bnxt/bnxt_en/if_bnxt.c
1171
u32 extra_qps = 0;
sys/dev/bnxt/bnxt_en/if_bnxt.c
1245
num_mr = min_t(u32, ctxm->max_entries / 2, 1024 * 256);
sys/dev/bnxt/bnxt_en/if_bnxt.c
1246
num_ah = min_t(u32, num_mr, 1024 * 128);
sys/dev/bnxt/bnxt_en/if_bnxt.c
1665
static u32 bnxt_fw_health_readl(struct bnxt_softc *bp, int reg_idx)
sys/dev/bnxt/bnxt_en/if_bnxt.c
1668
u32 reg = fw_health->regs[reg_idx];
sys/dev/bnxt/bnxt_en/if_bnxt.c
1669
u32 reg_type, reg_off, val = 0;
sys/dev/bnxt/bnxt_en/if_bnxt.c
1731
u32 val;
sys/dev/bnxt/bnxt_en/if_bnxt.c
1790
u32 reg = fw_health->fw_reset_seq_regs[reg_idx];
sys/dev/bnxt/bnxt_en/if_bnxt.c
1791
u32 val = fw_health->fw_reset_seq_vals[reg_idx];
sys/dev/bnxt/bnxt_en/if_bnxt.c
1792
u32 reg_type, reg_off, delay_msecs;
sys/dev/bnxt/bnxt_en/if_bnxt.c
1878
static inline void __bnxt_map_fw_health_reg(struct bnxt_softc *bp, u32 reg)
sys/dev/bnxt/bnxt_en/if_bnxt.c
1886
u32 reg_base = 0xffffffff;
sys/dev/bnxt/bnxt_en/if_bnxt.c
1893
u32 reg = fw_health->regs[i];
sys/dev/bnxt/bnxt_en/if_bnxt.c
1915
u32 reg_type;
sys/dev/bnxt/bnxt_en/if_bnxt.c
2110
u32 val;
sys/dev/bnxt/bnxt_en/if_bnxt.c
2120
u32 wait_dsecs = bp->fw_health->normal_func_wait_dsecs;
sys/dev/bnxt/bnxt_en/if_bnxt.c
2204
u32 sts = bnxt_fw_health_readl(bp, BNXT_FW_HEALTH_REG);
sys/dev/bnxt/bnxt_en/if_bnxt.c
2217
u32 wait_dsecs;
sys/dev/bnxt/bnxt_en/if_bnxt.c
287
void writel_fbsd(struct bnxt_softc *bp, u32, u8, u32);
sys/dev/bnxt/bnxt_en/if_bnxt.c
288
u32 readl_fbsd(struct bnxt_softc *bp, u32, u8);
sys/dev/bnxt/bnxt_en/if_bnxt.c
290
u32 readl_fbsd(struct bnxt_softc *bp, u32 reg_off, u8 bar_idx)
sys/dev/bnxt/bnxt_en/if_bnxt.c
299
void writel_fbsd(struct bnxt_softc *bp, u32 reg_off, u8 bar_idx, u32 val)
sys/dev/bnxt/bnxt_en/if_bnxt.c
434
u32 ring_type)
sys/dev/bnxt/bnxt_en/if_bnxt.c
4772
static u32
sys/dev/bnxt/bnxt_en/if_bnxt.c
4945
static void bnxt_event_error_report(struct bnxt_softc *softc, u32 data1, u32 data2)
sys/dev/bnxt/bnxt_en/if_bnxt.c
4947
u32 err_type = BNXT_EVENT_ERROR_REPORT_TYPE(data1);
sys/dev/bnxt/bnxt_en/if_bnxt.c
4976
(u32)EVENT_DATA2_NVM_ERR_ADDR(data2));
sys/dev/bnxt/bnxt_en/if_bnxt.c
5036
u32 data1 = le32toh(ae->event_data1);
sys/dev/bnxt/bnxt_en/if_bnxt.c
5037
u32 data2 = le32toh(ae->event_data2);
sys/dev/bnxt/bnxt_en/if_bnxt.c
5091
u32 status;
sys/dev/bnxt/bnxt_en/if_bnxt.c
970
struct bnxt_ctx_pg_info *ctx_pg, u32 mem_size,
sys/dev/bnxt/bnxt_re/bnxt_re.h
1041
u32 event;
sys/dev/bnxt/bnxt_re/bnxt_re.h
1048
u16 nq_id, u32 throttle);
sys/dev/bnxt/bnxt_re/bnxt_re.h
1052
void writel_fbsd(struct bnxt_softc *bp, u32, u8, u32);
sys/dev/bnxt/bnxt_re/bnxt_re.h
1053
u32 readl_fbsd(struct bnxt_softc *bp, u32, u8);
sys/dev/bnxt/bnxt_re/bnxt_re.h
112
u32 flags;
sys/dev/bnxt/bnxt_re/bnxt_re.h
176
u32 depth;
sys/dev/bnxt/bnxt_re/bnxt_re.h
177
u32 lrid; /* Logical ring id */
sys/dev/bnxt/bnxt_re/bnxt_re.h
314
u32 type;
sys/dev/bnxt/bnxt_re/bnxt_re.h
347
u32 num_msix_requested;
sys/dev/bnxt/bnxt_re/bnxt_re.h
440
u32 curr_epoch;
sys/dev/bnxt/bnxt_re/bnxt_re.h
536
u32 num_vfs;
sys/dev/bnxt/bnxt_re/bnxt_re.h
537
u32 espeed;
sys/dev/bnxt/bnxt_re/bnxt_re.h
543
u32 sl_espeed;
sys/dev/bnxt/bnxt_re/bnxt_re.h
545
u32 min_tx_depth;
sys/dev/bnxt/bnxt_re/bnxt_re.h
547
u32 en_qp_dbg;
sys/dev/bnxt/bnxt_re/bnxt_re.h
565
u32 event_bitmap[3];
sys/dev/bnxt/bnxt_re/bnxt_re.h
572
u32 pacing_algo_th;
sys/dev/bnxt/bnxt_re/bnxt_re.h
573
u32 pacing_en_int_th;
sys/dev/bnxt/bnxt_re/bnxt_re.h
574
u32 do_pacing_save;
sys/dev/bnxt/bnxt_re/bnxt_re.h
588
u32 user_dbr_drop_recov_timeout;
sys/dev/bnxt/bnxt_re/bnxt_re.h
593
u32 dbr_do_pacing;
sys/dev/bnxt/bnxt_re/bnxt_re.h
594
u32 dbq_watermark; /* Current watermark set in HW registers */
sys/dev/bnxt/bnxt_re/bnxt_re.h
595
u32 dbq_nq_id; /* Current NQ ID for DBQ events */
sys/dev/bnxt/bnxt_re/bnxt_re.h
596
u32 dbq_pacing_time; /* ms */
sys/dev/bnxt/bnxt_re/bnxt_re.h
597
u32 dbr_def_do_pacing; /* do_pacing when no congestion */
sys/dev/bnxt/bnxt_re/bnxt_re.h
598
u32 dbr_evt_curr_epoch;
sys/dev/bnxt/bnxt_re/bnxt_re.h
607
u32 num_msix_requested;
sys/dev/bnxt/bnxt_re/bnxt_re.h
720
u8 qp_mode, u8 op_type, u32 num_msix_requested,
sys/dev/bnxt/bnxt_re/bnxt_re.h
924
u32 *pf_mask, u32 *first_pf);
sys/dev/bnxt/bnxt_re/ib_verbs.c
1011
u32 retry_count = BNXT_RE_RESOLVE_RETRY_COUNT_US;
sys/dev/bnxt/bnxt_re/ib_verbs.c
1046
u32 flags, struct ib_udata *udata)
sys/dev/bnxt/bnxt_re/ib_verbs.c
1055
u32 max_ah_count;
sys/dev/bnxt/bnxt_re/ib_verbs.c
1104
u32 *wrptr;
sys/dev/bnxt/bnxt_re/ib_verbs.c
1108
wrptr = (u32 *)((u8 *)uctx->shpg + BNXT_RE_AVID_OFFT);
sys/dev/bnxt/bnxt_re/ib_verbs.c
1271
u32 max_srq_count;
sys/dev/bnxt/bnxt_re/ib_verbs.c
1526
static void bnxt_re_dump_debug_stats(struct bnxt_re_dev *rdev, u32 active_qps)
sys/dev/bnxt/bnxt_re/ib_verbs.c
1528
u32 total_qp = 0;
sys/dev/bnxt/bnxt_re/ib_verbs.c
1574
u32 active_qps;
sys/dev/bnxt/bnxt_re/ib_verbs.c
2006
rq->max_wqe = min_t(u32, entries, dev_attr->max_qp_wqes + 1);
sys/dev/bnxt/bnxt_re/ib_verbs.c
2089
sq->max_wqe = min_t(u32, entries, dev_attr->max_qp_wqes + diff + 1);
sys/dev/bnxt/bnxt_re/ib_verbs.c
2123
qplqp->sq.max_wqe = min_t(u32, entries,
sys/dev/bnxt/bnxt_re/ib_verbs.c
2317
u32 sstep, rstep;
sys/dev/bnxt/bnxt_re/ib_verbs.c
2391
u32 active_qps, tmp_qps;
sys/dev/bnxt/bnxt_re/ib_verbs.c
244
static void __to_ib_speed_width(u32 espeed, u8 lanes, u8 *speed, u8 *width)
sys/dev/bnxt/bnxt_re/ib_verbs.c
2529
static u32 ipv4_from_gid(u8 *gid)
sys/dev/bnxt/bnxt_re/ib_verbs.c
2540
u32 qpn;
sys/dev/bnxt/bnxt_re/ib_verbs.c
2820
qp->qplib_qp.max_rd_atomic = min_t(u32, qp_attr->max_rd_atomic,
sys/dev/bnxt/bnxt_re/ib_verbs.c
2860
entries = min_t(u32, entries, dev_attr->max_qp_wqes);
sys/dev/bnxt/bnxt_re/ib_verbs.c
3170
sge.size = (u32)size;
sys/dev/bnxt/bnxt_re/ib_verbs.c
3199
sge.size = (u32)size;
sys/dev/bnxt/bnxt_re/ib_verbs.c
3224
sge.size = (u32)size;
sys/dev/bnxt/bnxt_re/ib_verbs.c
3241
u32 rq_prod_index;
sys/dev/bnxt/bnxt_re/ib_verbs.c
362
port_attr->max_msg_sz = (u32)BNXT_RE_MAX_MR_SIZE_LOW;
sys/dev/bnxt/bnxt_re/ib_verbs.c
3692
u32 count = 0;
sys/dev/bnxt/bnxt_re/ib_verbs.c
3808
u32 max_active_cqs;
sys/dev/bnxt/bnxt_re/ib_verbs.c
3891
u32 *epoch;
sys/dev/bnxt/bnxt_re/ib_verbs.c
39
struct scatterlist *get_ib_umem_sgl(struct ib_umem *umem, u32 *nmap)
sys/dev/bnxt/bnxt_re/ib_verbs.c
4104
entries = min_t(u32, (u32)entries, dev_attr->max_cq_wqes + 1);
sys/dev/bnxt/bnxt_re/ib_verbs.c
4411
u32 skip_bytes = 0;
sys/dev/bnxt/bnxt_re/ib_verbs.c
4414
u32 offset = 0;
sys/dev/bnxt/bnxt_re/ib_verbs.c
4415
u32 tbl_idx;
sys/dev/bnxt/bnxt_re/ib_verbs.c
4540
u32 metadata;
sys/dev/bnxt/bnxt_re/ib_verbs.c
4566
u32 tbl_idx;
sys/dev/bnxt/bnxt_re/ib_verbs.c
4674
u32 tbl_idx;
sys/dev/bnxt/bnxt_re/ib_verbs.c
4699
budget = min_t(u32, num_entries, cq->max_cql);
sys/dev/bnxt/bnxt_re/ib_verbs.c
4859
u32 max_mr_count;
sys/dev/bnxt/bnxt_re/ib_verbs.c
4967
u32 max_num_sg, struct ib_udata *udata)
sys/dev/bnxt/bnxt_re/ib_verbs.c
4972
u32 max_mr_count;
sys/dev/bnxt/bnxt_re/ib_verbs.c
5039
u32 max_mw_count;
sys/dev/bnxt/bnxt_re/ib_verbs.c
5142
u32 max_mr_count;
sys/dev/bnxt/bnxt_re/ib_verbs.c
5251
u32 npages;
sys/dev/bnxt/bnxt_re/ib_verbs.c
5317
u32 uverbs_abi_ver;
sys/dev/bnxt/bnxt_re/ib_verbs.c
534
u32 tbl_idx = 0;
sys/dev/bnxt/bnxt_re/ib_verbs.c
5343
u32 chip_met_rev_num;
sys/dev/bnxt/bnxt_re/ib_verbs.c
5362
chip_met_rev_num |= ((u32)cctx->chip_rev & 0xFF) <<
sys/dev/bnxt/bnxt_re/ib_verbs.c
5364
chip_met_rev_num |= ((u32)cctx->chip_metal & 0xFF) <<
sys/dev/bnxt/bnxt_re/ib_verbs.c
656
u32 max_mr_count;
sys/dev/bnxt/bnxt_re/ib_verbs.c
844
u32 max_pd_count;
sys/dev/bnxt/bnxt_re/ib_verbs.c
906
void bnxt_re_destroy_ah(struct ib_ah *ib_ah, u32 flags)
sys/dev/bnxt/bnxt_re/ib_verbs.h
140
struct scatterlist *get_ib_umem_sgl(struct ib_umem *umem, u32 *nmap);
sys/dev/bnxt/bnxt_re/ib_verbs.h
143
u32 idx;
sys/dev/bnxt/bnxt_re/ib_verbs.h
144
u32 refcnt;
sys/dev/bnxt/bnxt_re/ib_verbs.h
148
u32 size;
sys/dev/bnxt/bnxt_re/ib_verbs.h
154
u32 bind_rkey;
sys/dev/bnxt/bnxt_re/ib_verbs.h
173
u32 srq_limit;
sys/dev/bnxt/bnxt_re/ib_verbs.h
180
u32 ipv4_addr;
sys/dev/bnxt/bnxt_re/ib_verbs.h
204
u32 send_psn;
sys/dev/bnxt/bnxt_re/ib_verbs.h
224
u32 max_cql;
sys/dev/bnxt/bnxt_re/ib_verbs.h
240
u32 npages;
sys/dev/bnxt/bnxt_re/ib_verbs.h
311
u32 flags, struct ib_udata *udata);
sys/dev/bnxt/bnxt_re/ib_verbs.h
316
void bnxt_re_destroy_ah(struct ib_ah *ib_ah, u32 flags);
sys/dev/bnxt/bnxt_re/ib_verbs.h
352
u32 max_num_sg, struct ib_udata *udata);
sys/dev/bnxt/bnxt_re/ib_verbs.h
441
static inline u32 __from_ib_mtu(enum ib_mtu mtu)
sys/dev/bnxt/bnxt_re/ib_verbs.h
459
static inline enum ib_mtu __to_ib_mtu(u32 mtu)
sys/dev/bnxt/bnxt_re/ib_verbs.h
516
static inline u32 bnxt_re_init_depth(u32 ent, struct bnxt_re_ucontext *uctx)
sys/dev/bnxt/bnxt_re/ib_verbs.h
536
static inline u32 bnxt_re_get_diff(struct bnxt_re_ucontext *uctx,
sys/dev/bnxt/bnxt_re/ib_verbs.h
581
u32 *a32 = (u32 *)((u8 *)a + 2);
sys/dev/bnxt/bnxt_re/ib_verbs.h
582
u32 *b32 = (u32 *)((u8 *)b + 2);
sys/dev/bnxt/bnxt_re/main.c
1004
num_msix_want = min_t(u32, num_msix_want, num_online_cpus() + 1);
sys/dev/bnxt/bnxt_re/main.c
1005
num_msix_want = min_t(u32, num_msix_want, BNXT_RE_MAX_MSIX);
sys/dev/bnxt/bnxt_re/main.c
1006
num_msix_want = max_t(u32, num_msix_want, BNXT_RE_MIN_MSIX);
sys/dev/bnxt/bnxt_re/main.c
1033
u32 cur_prod = 0, cur_cons = 0;
sys/dev/bnxt/bnxt_re/main.c
104
static u32 gmod_exit;
sys/dev/bnxt/bnxt_re/main.c
105
static u32 gadd_dev_inprogress;
sys/dev/bnxt/bnxt_re/main.c
110
static int bnxt_re_hwrm_qcfg(struct bnxt_re_dev *rdev, u32 *db_len,
sys/dev/bnxt/bnxt_re/main.c
111
u32 *offset);
sys/dev/bnxt/bnxt_re/main.c
115
void writel_fbsd(struct bnxt_softc *bp, u32, u8, u32);
sys/dev/bnxt/bnxt_re/main.c
116
u32 readl_fbsd(struct bnxt_softc *bp, u32, u8);
sys/dev/bnxt/bnxt_re/main.c
1398
u32 l2db_len = 0;
sys/dev/bnxt/bnxt_re/main.c
1399
u32 offset = 0;
sys/dev/bnxt/bnxt_re/main.c
1400
u32 barlen;
sys/dev/bnxt/bnxt_re/main.c
158
u32 readl_fbsd(struct bnxt_softc *bp, u32 reg_off, u8 bar_idx)
sys/dev/bnxt/bnxt_re/main.c
1649
u32 fw_stats_ctx_id, u16 tid)
sys/dev/bnxt/bnxt_re/main.c
167
void writel_fbsd(struct bnxt_softc *bp, u32 reg_off, u8 bar_idx, u32 val)
sys/dev/bnxt/bnxt_re/main.c
176
u32 fifo_occup)
sys/dev/bnxt/bnxt_re/main.c
1804
static int bnxt_re_hwrm_qcfg(struct bnxt_re_dev *rdev, u32 *db_len,
sys/dev/bnxt/bnxt_re/main.c
1805
u32 *offset)
sys/dev/bnxt/bnxt_re/main.c
1896
u32 primary_nq_id;
sys/dev/bnxt/bnxt_re/main.c
2213
u32 count;
sys/dev/bnxt/bnxt_re/main.c
2477
u32 *cq_ptr;
sys/dev/bnxt/bnxt_re/main.c
249
hctx->qp_ctx.max = min_t(u32, dev_res.max_qp, attr->max_qp);
sys/dev/bnxt/bnxt_re/main.c
2494
cq_ptr = (u32 *)cq->uctx_cq_page;
sys/dev/bnxt/bnxt_re/main.c
250
hctx->mrw_ctx.max = min_t(u32, dev_res.max_mr, attr->max_mr);
sys/dev/bnxt/bnxt_re/main.c
255
hctx->srq_ctx.max = min_t(u32, dev_res.max_srq, attr->max_srq);
sys/dev/bnxt/bnxt_re/main.c
256
hctx->cq_ctx.max = min_t(u32, dev_res.max_cq, attr->max_cq);
sys/dev/bnxt/bnxt_re/main.c
269
u32 num_vf)
sys/dev/bnxt/bnxt_re/main.c
2997
u32 *pf_mask, u32 *first_pf)
sys/dev/bnxt/bnxt_re/main.c
3147
u32 offt;
sys/dev/bnxt/bnxt_re/main.c
3882
u32 num_msix_requested,
sys/dev/bnxt/bnxt_re/main.c
542
u32 read_val, fifo_occup;
sys/dev/bnxt/bnxt_re/main.c
583
u32 read_val;
sys/dev/bnxt/bnxt_re/main.c
596
int bnxt_re_set_dbq_throttling_reg(struct bnxt_re_dev *rdev, u16 nq_id, u32 throttle)
sys/dev/bnxt/bnxt_re/main.c
598
u32 cag_ring_water_mark = 0, read_val;
sys/dev/bnxt/bnxt_re/main.c
599
u32 throttle_val;
sys/dev/bnxt/bnxt_re/main.c
723
u32 data1;
sys/dev/bnxt/bnxt_re/main.c
724
u32 data2 = 0;
sys/dev/bnxt/bnxt_re/main.c
817
u32 pacing_save;
sys/dev/bnxt/bnxt_re/main.c
861
u32 read_val, fifo_occup;
sys/dev/bnxt/bnxt_re/main.c
881
pacing_data->do_pacing = max_t(u32, rdev->dbr_def_do_pacing, pacing_data->do_pacing);
sys/dev/bnxt/bnxt_re/qplib_fp.c
1080
u32 qp_flags = 0;
sys/dev/bnxt/bnxt_re/qplib_fp.c
1081
u32 qp_idx;
sys/dev/bnxt/bnxt_re/qplib_fp.c
1083
u32 sqsz;
sys/dev/bnxt/bnxt_re/qplib_fp.c
1384
u32 temp32[4];
sys/dev/bnxt/bnxt_re/qplib_fp.c
1385
u32 bmask;
sys/dev/bnxt/bnxt_re/qplib_fp.c
1517
u32 temp32[4];
sys/dev/bnxt/bnxt_re/qplib_fp.c
1604
u32 peek_flags, peek_cons;
sys/dev/bnxt/bnxt_re/qplib_fp.c
1649
u32 qp_idx;
sys/dev/bnxt/bnxt_re/qplib_fp.c
1693
u32 sw_prod;
sys/dev/bnxt/bnxt_re/qplib_fp.c
1708
u32 bnxt_qplib_get_rq_prod_index(struct bnxt_qplib_qp *qp)
sys/dev/bnxt/bnxt_re/qplib_fp.c
1720
u32 sw_prod;
sys/dev/bnxt/bnxt_re/qplib_fp.c
174
static void *bnxt_qplib_get_hdr_buf(struct pci_dev *pdev, u32 step, u32 cnt)
sys/dev/bnxt/bnxt_re/qplib_fp.c
1741
u32 start_psn, next_psn;
sys/dev/bnxt/bnxt_re/qplib_fp.c
1756
(u32)
sys/dev/bnxt/bnxt_re/qplib_fp.c
1758
(u32)
sys/dev/bnxt/bnxt_re/qplib_fp.c
177
u32 len;
sys/dev/bnxt/bnxt_re/qplib_fp.c
1770
u32 flg_npsn;
sys/dev/bnxt/bnxt_re/qplib_fp.c
1771
u32 op_spsn;
sys/dev/bnxt/bnxt_re/qplib_fp.c
1813
u32 *sw_prod)
sys/dev/bnxt/bnxt_re/qplib_fp.c
1861
u32 nsge, u32 *sw_prod)
sys/dev/bnxt/bnxt_re/qplib_fp.c
1880
u32 ilsize;
sys/dev/bnxt/bnxt_re/qplib_fp.c
1913
u32 pg_num, pg_indx;
sys/dev/bnxt/bnxt_re/qplib_fp.c
1915
u32 tail;
sys/dev/bnxt/bnxt_re/qplib_fp.c
1958
u32 sw_prod;
sys/dev/bnxt/bnxt_re/qplib_fp.c
1959
u32 wqe_idx;
sys/dev/bnxt/bnxt_re/qplib_fp.c
212
struct bnxt_qplib_qp *qp, u32 sstep, u32 rstep)
sys/dev/bnxt/bnxt_re/qplib_fp.c
2121
sqe->length = cpu_to_le32((u32)data_len);
sys/dev/bnxt/bnxt_re/qplib_fp.c
2227
*(u32 *)sqe->length, sqe->numlevels_pbl_page_size_log,
sys/dev/bnxt/bnxt_re/qplib_fp.c
2330
u32 wqe_idx;
sys/dev/bnxt/bnxt_re/qplib_fp.c
2331
u32 sw_prod;
sys/dev/bnxt/bnxt_re/qplib_fp.c
2413
u32 pg_sz_lvl = 0;
sys/dev/bnxt/bnxt_re/qplib_fp.c
2515
u32 pgsz = 0, lvl = 0, nsz = 0;
sys/dev/bnxt/bnxt_re/qplib_fp.c
259
u32 peek_flags, peek_cons;
sys/dev/bnxt/bnxt_re/qplib_fp.c
261
u32 type;
sys/dev/bnxt/bnxt_re/qplib_fp.c
2645
u32 start, last;
sys/dev/bnxt/bnxt_re/qplib_fp.c
2696
u32 start, last;
sys/dev/bnxt/bnxt_re/qplib_fp.c
2767
u32 cq_cons, u32 swq_last,
sys/dev/bnxt/bnxt_re/qplib_fp.c
2768
u32 cqe_sq_cons)
sys/dev/bnxt/bnxt_re/qplib_fp.c
2772
u32 peek_sw_cq_cons, peek_sq_cons_idx, peek_flags;
sys/dev/bnxt/bnxt_re/qplib_fp.c
2885
static int bnxt_qplib_get_cqe_sq_cons(struct bnxt_qplib_q *sq, u32 cqe_slot)
sys/dev/bnxt/bnxt_re/qplib_fp.c
2890
u32 start, last;
sys/dev/bnxt/bnxt_re/qplib_fp.c
2914
u32 cq_cons, struct bnxt_qplib_qp **lib_qp)
sys/dev/bnxt/bnxt_re/qplib_fp.c
2919
u32 cqe_sq_cons, slot_num;
sys/dev/bnxt/bnxt_re/qplib_fp.c
3035
static void bnxt_qplib_release_srqe(struct bnxt_qplib_srq *srq, u32 tag)
sys/dev/bnxt/bnxt_re/qplib_fp.c
3055
u32 wr_id_idx;
sys/dev/bnxt/bnxt_re/qplib_fp.c
309
u32 retry_cnt = 100;
sys/dev/bnxt/bnxt_re/qplib_fp.c
3143
u32 wr_id_idx;
sys/dev/bnxt/bnxt_re/qplib_fp.c
3261
u32 wr_id_idx;
sys/dev/bnxt/bnxt_re/qplib_fp.c
3366
u32 swq_last;
sys/dev/bnxt/bnxt_re/qplib_fp.c
3367
u32 cqe_cons;
sys/dev/bnxt/bnxt_re/qplib_fp.c
342
u32 hw_polled = 0;
sys/dev/bnxt/bnxt_re/qplib_fp.c
344
u32 type;
sys/dev/bnxt/bnxt_re/qplib_fp.c
3487
u32 budget = num_cqes;
sys/dev/bnxt/bnxt_re/qplib_fp.c
3513
u32 hw_polled = 0;
sys/dev/bnxt/bnxt_re/qplib_fp.c
3593
void bnxt_qplib_req_notify_cq(struct bnxt_qplib_cq *cq, u32 arm_type)
sys/dev/bnxt/bnxt_re/qplib_fp.c
445
u32 sw_cons;
sys/dev/bnxt/bnxt_re/qplib_fp.c
519
static void bnxt_qplib_map_nq_db(struct bnxt_qplib_nq *nq, u32 reg_offt)
sys/dev/bnxt/bnxt_re/qplib_fp.c
533
sizeof(u32);
sys/dev/bnxt/bnxt_re/qplib_fp.c
668
srq_size = min_t(u32, srq->hwq.depth, U16_MAX);
sys/dev/bnxt/bnxt_re/qplib_fp.c
726
u32 avail = 0;
sys/dev/bnxt/bnxt_re/qplib_fp.c
776
u32 avail;
sys/dev/bnxt/bnxt_re/qplib_fp.c
805
srqe->wr_id |= cpu_to_le32((u32)next);
sys/dev/bnxt/bnxt_re/qplib_fp.c
862
u32 *swq_idx)
sys/dev/bnxt/bnxt_re/qplib_fp.c
864
u32 idx;
sys/dev/bnxt/bnxt_re/qplib_fp.c
872
static void bnxt_qplib_swq_mod_start(struct bnxt_qplib_q *que, u32 idx)
sys/dev/bnxt/bnxt_re/qplib_fp.c
877
static u32 bnxt_qplib_get_stride(void)
sys/dev/bnxt/bnxt_re/qplib_fp.c
882
u32 bnxt_qplib_get_depth(struct bnxt_qplib_q *que, u8 wqe_mode, bool is_sq)
sys/dev/bnxt/bnxt_re/qplib_fp.c
884
u32 slots;
sys/dev/bnxt/bnxt_re/qplib_fp.c
894
static u32 _set_sq_size(struct bnxt_qplib_q *que, u8 wqe_mode)
sys/dev/bnxt/bnxt_re/qplib_fp.c
901
static u32 _set_sq_max_slot(u8 wqe_mode)
sys/dev/bnxt/bnxt_re/qplib_fp.c
908
static u32 _set_rq_max_slot(struct bnxt_qplib_q *que)
sys/dev/bnxt/bnxt_re/qplib_fp.c
925
u32 qp_flags = 0;
sys/dev/bnxt/bnxt_re/qplib_fp.h
101
u32 size;
sys/dev/bnxt/bnxt_re/qplib_fp.h
102
u32 lkey;
sys/dev/bnxt/bnxt_re/qplib_fp.h
164
u32 len;
sys/dev/bnxt/bnxt_re/qplib_fp.h
165
u32 step;
sys/dev/bnxt/bnxt_re/qplib_fp.h
173
u32 start_psn;
sys/dev/bnxt/bnxt_re/qplib_fp.h
174
u32 next_psn;
sys/dev/bnxt/bnxt_re/qplib_fp.h
175
u32 slot_idx;
sys/dev/bnxt/bnxt_re/qplib_fp.h
217
u32 inv_key;
sys/dev/bnxt/bnxt_re/qplib_fp.h
219
u32 q_key;
sys/dev/bnxt/bnxt_re/qplib_fp.h
220
u32 dst_qp;
sys/dev/bnxt/bnxt_re/qplib_fp.h
228
u32 cfa_meta;
sys/dev/bnxt/bnxt_re/qplib_fp.h
235
u32 inv_key;
sys/dev/bnxt/bnxt_re/qplib_fp.h
238
u32 r_key;
sys/dev/bnxt/bnxt_re/qplib_fp.h
244
u32 r_key;
sys/dev/bnxt/bnxt_re/qplib_fp.h
251
u32 inv_l_key;
sys/dev/bnxt/bnxt_re/qplib_fp.h
259
u32 l_key;
sys/dev/bnxt/bnxt_re/qplib_fp.h
260
u32 length;
sys/dev/bnxt/bnxt_re/qplib_fp.h
289
u32 parent_l_key;
sys/dev/bnxt/bnxt_re/qplib_fp.h
290
u32 r_key;
sys/dev/bnxt/bnxt_re/qplib_fp.h
292
u32 length;
sys/dev/bnxt/bnxt_re/qplib_fp.h
302
u32 max_wqe;
sys/dev/bnxt/bnxt_re/qplib_fp.h
303
u32 max_sw_wqe;
sys/dev/bnxt/bnxt_re/qplib_fp.h
307
u32 psn;
sys/dev/bnxt/bnxt_re/qplib_fp.h
311
u32 phantom_wqe_cnt;
sys/dev/bnxt/bnxt_re/qplib_fp.h
312
u32 phantom_cqe_cnt;
sys/dev/bnxt/bnxt_re/qplib_fp.h
313
u32 next_cq_cons;
sys/dev/bnxt/bnxt_re/qplib_fp.h
315
u32 swq_start;
sys/dev/bnxt/bnxt_re/qplib_fp.h
316
u32 swq_last;
sys/dev/bnxt/bnxt_re/qplib_fp.h
323
u32 dpi;
sys/dev/bnxt/bnxt_re/qplib_fp.h
334
u32 id;
sys/dev/bnxt/bnxt_re/qplib_fp.h
342
u32 max_inline_data;
sys/dev/bnxt/bnxt_re/qplib_fp.h
343
u32 mtu;
sys/dev/bnxt/bnxt_re/qplib_fp.h
344
u32 path_mtu;
sys/dev/bnxt/bnxt_re/qplib_fp.h
347
u32 qkey;
sys/dev/bnxt/bnxt_re/qplib_fp.h
348
u32 dest_qp_id;
sys/dev/bnxt/bnxt_re/qplib_fp.h
354
u32 min_rnr_timer;
sys/dev/bnxt/bnxt_re/qplib_fp.h
355
u32 max_rd_atomic;
sys/dev/bnxt/bnxt_re/qplib_fp.h
356
u32 max_dest_rd_atomic;
sys/dev/bnxt/bnxt_re/qplib_fp.h
357
u32 dest_qpn;
sys/dev/bnxt/bnxt_re/qplib_fp.h
389
u32 lag_src_mac;
sys/dev/bnxt/bnxt_re/qplib_fp.h
390
u32 msn;
sys/dev/bnxt/bnxt_re/qplib_fp.h
391
u32 msn_tbl_sz;
sys/dev/bnxt/bnxt_re/qplib_fp.h
402
static inline u32 __bnxt_qplib_get_avail(struct bnxt_qplib_hwq *hwq)
sys/dev/bnxt/bnxt_re/qplib_fp.h
424
u32 length;
sys/dev/bnxt/bnxt_re/qplib_fp.h
426
u32 cfa_meta;
sys/dev/bnxt/bnxt_re/qplib_fp.h
432
u32 invrkey;
sys/dev/bnxt/bnxt_re/qplib_fp.h
438
u32 src_qp;
sys/dev/bnxt/bnxt_re/qplib_fp.h
442
u32 raweth_qp1_flags2;
sys/dev/bnxt/bnxt_re/qplib_fp.h
443
u32 raweth_qp1_metadata;
sys/dev/bnxt/bnxt_re/qplib_fp.h
459
u32 max_wqe;
sys/dev/bnxt/bnxt_re/qplib_fp.h
460
u32 id;
sys/dev/bnxt/bnxt_re/qplib_fp.h
463
u32 cnq_hw_ring_id;
sys/dev/bnxt/bnxt_re/qplib_fp.h
529
u32 load;
sys/dev/bnxt/bnxt_re/qplib_fp.h
545
bnxt_qplib_get_qp_buf_from_index(struct bnxt_qplib_qp *qp, u32 index)
sys/dev/bnxt/bnxt_re/qplib_fp.h
582
u32 bnxt_qplib_get_rq_prod_index(struct bnxt_qplib_qp *qp);
sys/dev/bnxt/bnxt_re/qplib_fp.h
600
void bnxt_qplib_req_notify_cq(struct bnxt_qplib_cq *cq, u32 arm_type);
sys/dev/bnxt/bnxt_re/qplib_fp.h
613
struct bnxt_qplib_qp *qp, u32 slen, u32 rlen);
sys/dev/bnxt/bnxt_re/qplib_fp.h
650
u32 bnxt_qplib_get_depth(struct bnxt_qplib_q *que, u8 wqe_mode, bool is_sq);
sys/dev/bnxt/bnxt_re/qplib_fp.h
86
u32 id;
sys/dev/bnxt/bnxt_re/qplib_fp.h
88
u32 max_wqe;
sys/dev/bnxt/bnxt_re/qplib_fp.h
89
u32 max_sge;
sys/dev/bnxt/bnxt_re/qplib_fp.h
90
u32 threshold;
sys/dev/bnxt/bnxt_re/qplib_rcfw.c
1084
rcfw->rcfw_lat_slab_msec = vzalloc(sizeof(u32) *
sys/dev/bnxt/bnxt_re/qplib_rcfw.c
1243
static int bnxt_qplib_map_creq_db(struct bnxt_qplib_rcfw *rcfw, u32 reg_offt)
sys/dev/bnxt/bnxt_re/qplib_rcfw.c
1257
sizeof(u32);
sys/dev/bnxt/bnxt_re/qplib_rcfw.c
245
u32 sw_prod, cmdq_prod, bsize;
sys/dev/bnxt/bnxt_re/qplib_rcfw.c
271
memcpy(cmdqe, preq, min_t(u32, bsize, sizeof(*cmdqe)));
sys/dev/bnxt/bnxt_re/qplib_rcfw.c
272
preq += min_t(u32, bsize, sizeof(*cmdqe));
sys/dev/bnxt/bnxt_re/qplib_rcfw.c
273
bsize -= min_t(u32, bsize, sizeof(*cmdqe));
sys/dev/bnxt/bnxt_re/qplib_rcfw.c
289
u32 bsize, free_slots, required_slots;
sys/dev/bnxt/bnxt_re/qplib_rcfw.c
294
u32 sw_prod, cmdq_prod;
sys/dev/bnxt/bnxt_re/qplib_rcfw.c
364
memcpy(cmdqe, preq, min_t(u32, bsize, sizeof(*cmdqe)));
sys/dev/bnxt/bnxt_re/qplib_rcfw.c
365
preq += min_t(u32, bsize, sizeof(*cmdqe));
sys/dev/bnxt/bnxt_re/qplib_rcfw.c
366
bsize -= min_t(u32, bsize, sizeof(*cmdqe));
sys/dev/bnxt/bnxt_re/qplib_rcfw.c
50
u32 *cur_prod, u32 *cur_cons)
sys/dev/bnxt/bnxt_re/qplib_rcfw.c
623
u32 latency_msec, dest_stats_id;
sys/dev/bnxt/bnxt_re/qplib_rcfw.c
678
u32 *num_wait)
sys/dev/bnxt/bnxt_re/qplib_rcfw.c
691
u32 wait_cmds = 0;
sys/dev/bnxt/bnxt_re/qplib_rcfw.c
692
u32 xid, qp_idx;
sys/dev/bnxt/bnxt_re/qplib_rcfw.c
693
u32 req_size;
sys/dev/bnxt/bnxt_re/qplib_rcfw.c
820
u32 type, budget = CREQ_ENTRY_POLL_BUDGET;
sys/dev/bnxt/bnxt_re/qplib_rcfw.c
825
u32 num_wakeup = 0;
sys/dev/bnxt/bnxt_re/qplib_rcfw.h
161
static inline u32 bnxt_qplib_get_cmd_slots(struct cmdq_base *req)
sys/dev/bnxt/bnxt_re/qplib_rcfw.h
163
u32 cmd_units = 0;
sys/dev/bnxt/bnxt_re/qplib_rcfw.h
176
static inline u32 bnxt_qplib_set_cmd_slots(struct cmdq_base *req)
sys/dev/bnxt/bnxt_re/qplib_rcfw.h
178
u32 cmd_byte = 0;
sys/dev/bnxt/bnxt_re/qplib_rcfw.h
207
u32 req_size;
sys/dev/bnxt/bnxt_re/qplib_rcfw.h
213
u32 free_slots;
sys/dev/bnxt/bnxt_re/qplib_rcfw.h
222
u32 size;
sys/dev/bnxt/bnxt_re/qplib_rcfw.h
243
u32 seq_num;
sys/dev/bnxt/bnxt_re/qplib_rcfw.h
278
u32 rcfw_lat_slab_sec[RCFW_MAX_LATENCY_SEC_SLAB_INDEX];
sys/dev/bnxt/bnxt_re/qplib_rcfw.h
282
u32 *rcfw_lat_slab_msec;
sys/dev/bnxt/bnxt_re/qplib_rcfw.h
288
u32 qp_create_stats_id;
sys/dev/bnxt/bnxt_re/qplib_rcfw.h
289
u32 qp_destroy_stats_id;
sys/dev/bnxt/bnxt_re/qplib_rcfw.h
290
u32 qp_modify_stats_id;
sys/dev/bnxt/bnxt_re/qplib_rcfw.h
291
u32 mr_create_stats_id;
sys/dev/bnxt/bnxt_re/qplib_rcfw.h
292
u32 mr_destroy_stats_id;
sys/dev/bnxt/bnxt_re/qplib_rcfw.h
295
u32 num_irq_stopped;
sys/dev/bnxt/bnxt_re/qplib_rcfw.h
296
u32 num_irq_started;
sys/dev/bnxt/bnxt_re/qplib_rcfw.h
297
u32 poll_in_intr_en;
sys/dev/bnxt/bnxt_re/qplib_rcfw.h
298
u32 poll_in_intr_dis;
sys/dev/bnxt/bnxt_re/qplib_rcfw.h
300
u32 cmdq_full_dbg;
sys/dev/bnxt/bnxt_re/qplib_rcfw.h
312
u32 req_sz;
sys/dev/bnxt/bnxt_re/qplib_rcfw.h
313
u32 res_sz;
sys/dev/bnxt/bnxt_re/qplib_rcfw.h
320
u32 req_sz, u32 res_sz, u8 block)
sys/dev/bnxt/bnxt_re/qplib_rcfw.h
343
u32 size);
sys/dev/bnxt/bnxt_re/qplib_rcfw.h
353
u32 *cur_prod, u32 *cur_cons);
sys/dev/bnxt/bnxt_re/qplib_res.c
1174
int pci_enable_atomic_ops_to_root(struct pci_dev *dev, u32 cap_mask)
sys/dev/bnxt/bnxt_re/qplib_res.c
1178
u32 cap;
sys/dev/bnxt/bnxt_re/qplib_res.c
224
u32 npages = 0, depth, stride, aux_pages = 0;
sys/dev/bnxt/bnxt_re/qplib_res.c
227
u32 aux_size = 0, npbl, npde;
sys/dev/bnxt/bnxt_re/qplib_res.c
230
u32 aux_slots, pg_size;
sys/dev/bnxt/bnxt_re/qplib_res.c
278
u32 flag = (hwq_attr->type == HWQ_TYPE_L2_CMPL) ?
sys/dev/bnxt/bnxt_re/qplib_res.c
342
u32 flag = (hwq_attr->type == HWQ_TYPE_L2_CMPL) ?
sys/dev/bnxt/bnxt_re/qplib_res.c
660
static int bnxt_qplib_alloc_reftbl(struct bnxt_qplib_reftbl *tbl, u32 max)
sys/dev/bnxt/bnxt_re/qplib_res.c
673
u32 max_cq = BNXT_QPLIB_MAX_CQ_COUNT;
sys/dev/bnxt/bnxt_re/qplib_res.c
675
u32 res_cnt;
sys/dev/bnxt/bnxt_re/qplib_res.c
685
res_cnt = max_t(u32, BNXT_QPLIB_MAX_QPC_COUNT + 1, dattr->max_qp);
sys/dev/bnxt/bnxt_re/qplib_res.c
694
res_cnt = max_t(u32, max_cq, dattr->max_cq);
sys/dev/bnxt/bnxt_re/qplib_res.c
700
res_cnt = max_t(u32, BNXT_QPLIB_MAX_SRQC_COUNT, dattr->max_cq);
sys/dev/bnxt/bnxt_re/qplib_res.c
721
sgid_tbl->hw_id = kcalloc(max, sizeof(u32), GFP_KERNEL);
sys/dev/bnxt/bnxt_re/qplib_res.c
764
u32 i;
sys/dev/bnxt/bnxt_re/qplib_res.c
774
u32 bit_num;
sys/dev/bnxt/bnxt_re/qplib_res.c
820
static int bnxt_qplib_alloc_pd_tbl(struct bnxt_qplib_res *res, u32 max)
sys/dev/bnxt/bnxt_re/qplib_res.c
823
u32 bytes;
sys/dev/bnxt/bnxt_re/qplib_res.c
852
u32 bit_num;
sys/dev/bnxt/bnxt_re/qplib_res.c
956
u32 dbr_offset;
sys/dev/bnxt/bnxt_re/qplib_res.c
957
u32 bytes;
sys/dev/bnxt/bnxt_re/qplib_res.c
972
dpit->max = min_t(u32, dpit->max, dev_attr->max_dpi);
sys/dev/bnxt/bnxt_re/qplib_res.c
99
u32 size;
sys/dev/bnxt/bnxt_re/qplib_res.h
102
u32 dbr_stat_db_fifo;
sys/dev/bnxt/bnxt_re/qplib_res.h
103
u32 dbr_aeq_arm_reg;
sys/dev/bnxt/bnxt_re/qplib_res.h
104
u32 dbr_throttling_reg;
sys/dev/bnxt/bnxt_re/qplib_res.h
139
u32 do_pacing;
sys/dev/bnxt/bnxt_re/qplib_res.h
140
u32 pacing_th;
sys/dev/bnxt/bnxt_re/qplib_res.h
141
u32 dev_err_state;
sys/dev/bnxt/bnxt_re/qplib_res.h
142
u32 alarm_th;
sys/dev/bnxt/bnxt_re/qplib_res.h
143
u32 grc_reg_offset;
sys/dev/bnxt/bnxt_re/qplib_res.h
144
u32 fifo_max_depth;
sys/dev/bnxt/bnxt_re/qplib_res.h
145
u32 fifo_room_mask;
sys/dev/bnxt/bnxt_re/qplib_res.h
227
u32 pg_count;
sys/dev/bnxt/bnxt_re/qplib_res.h
228
u32 pg_size;
sys/dev/bnxt/bnxt_re/qplib_res.h
235
u32 nmap;
sys/dev/bnxt/bnxt_re/qplib_res.h
236
u32 npages;
sys/dev/bnxt/bnxt_re/qplib_res.h
237
u32 pgshft;
sys/dev/bnxt/bnxt_re/qplib_res.h
238
u32 pgsize;
sys/dev/bnxt/bnxt_re/qplib_res.h
246
u32 depth;
sys/dev/bnxt/bnxt_re/qplib_res.h
247
u32 stride;
sys/dev/bnxt/bnxt_re/qplib_res.h
248
u32 aux_stride;
sys/dev/bnxt/bnxt_re/qplib_res.h
249
u32 aux_depth;
sys/dev/bnxt/bnxt_re/qplib_res.h
261
u32 max_elements;
sys/dev/bnxt/bnxt_re/qplib_res.h
262
u32 depth; /* original requested depth */
sys/dev/bnxt/bnxt_re/qplib_res.h
266
u32 prod; /* raw */
sys/dev/bnxt/bnxt_re/qplib_res.h
267
u32 cons; /* raw */
sys/dev/bnxt/bnxt_re/qplib_res.h
271
u32 pad_stride;
sys/dev/bnxt/bnxt_re/qplib_res.h
272
u32 pad_pgofft;
sys/dev/bnxt/bnxt_re/qplib_res.h
280
u32 xid;
sys/dev/bnxt/bnxt_re/qplib_res.h
281
u32 max_slot;
sys/dev/bnxt/bnxt_re/qplib_res.h
282
u32 flags;
sys/dev/bnxt/bnxt_re/qplib_res.h
287
u32 seed; /* For DB pacing */
sys/dev/bnxt/bnxt_re/qplib_res.h
305
u32 max;
sys/dev/bnxt/bnxt_re/qplib_res.h
324
u32 dpi;
sys/dev/bnxt/bnxt_re/qplib_res.h
325
u32 bit;
sys/dev/bnxt/bnxt_re/qplib_res.h
345
u32 size;
sys/dev/bnxt/bnxt_re/qplib_res.h
346
u32 fw_id;
sys/dev/bnxt/bnxt_re/qplib_res.h
350
u32 max_qp;
sys/dev/bnxt/bnxt_re/qplib_res.h
351
u32 max_mrw;
sys/dev/bnxt/bnxt_re/qplib_res.h
352
u32 max_srq;
sys/dev/bnxt/bnxt_re/qplib_res.h
353
u32 max_cq;
sys/dev/bnxt/bnxt_re/qplib_res.h
354
u32 max_gid;
sys/dev/bnxt/bnxt_re/qplib_res.h
373
u32 max;
sys/dev/bnxt/bnxt_re/qplib_res.h
378
u32 xid;
sys/dev/bnxt/bnxt_re/qplib_res.h
383
u32 max;
sys/dev/bnxt/bnxt_re/qplib_res.h
394
static inline u32 map_qp_id_to_tbl_indx(u32 qid, struct bnxt_qplib_reftbl *tbl)
sys/dev/bnxt/bnxt_re/qplib_res.h
439
u32 function_id;
sys/dev/bnxt/bnxt_re/qplib_res.h
445
u32 function_id;
sys/dev/bnxt/bnxt_re/qplib_res.h
446
u32 num_qps;
sys/dev/bnxt/bnxt_re/qplib_res.h
447
u32 start_index;
sys/dev/bnxt/bnxt_re/qplib_res.h
453
u32 host;
sys/dev/bnxt/bnxt_re/qplib_res.h
454
u32 filter;
sys/dev/bnxt/bnxt_re/qplib_res.h
503
u32 indx, u64 *pg)
sys/dev/bnxt/bnxt_re/qplib_res.h
505
u32 pg_num, pg_idx;
sys/dev/bnxt/bnxt_re/qplib_res.h
515
struct bnxt_qplib_hwq *hwq, u32 cnt)
sys/dev/bnxt/bnxt_re/qplib_res.h
525
static inline void bnxt_qplib_hwq_incr_cons(u32 max_elements, u32 *cons,
sys/dev/bnxt/bnxt_re/qplib_res.h
526
u32 cnt, u32 *dbinfo_flags)
sys/dev/bnxt/bnxt_re/qplib_res.h
645
u32 key = 0;
sys/dev/bnxt/bnxt_re/qplib_res.h
659
(((u32)(toggle)) << (BNXT_QPLIB_DBR_TOGGLE_SHIFT)))
sys/dev/bnxt/bnxt_re/qplib_res.h
696
u32 type)
sys/dev/bnxt/bnxt_re/qplib_res.h
699
u32 indx;
sys/dev/bnxt/bnxt_re/qplib_res.h
715
u32 type)
sys/dev/bnxt/bnxt_re/qplib_res.h
718
u32 indx;
sys/dev/bnxt/bnxt_re/qplib_res.h
728
u32 type)
sys/dev/bnxt/bnxt_re/qplib_res.h
763
u32 type;
sys/dev/bnxt/bnxt_re/qplib_res.h
773
u32 max_qp;
sys/dev/bnxt/bnxt_re/qplib_res.h
774
u32 max_mr;
sys/dev/bnxt/bnxt_re/qplib_res.h
775
u32 max_cq;
sys/dev/bnxt/bnxt_re/qplib_res.h
776
u32 max_srq;
sys/dev/bnxt/bnxt_re/qplib_res.h
777
u32 max_ah;
sys/dev/bnxt/bnxt_re/qplib_res.h
778
u32 max_pd;
sys/dev/bnxt/bnxt_re/qplib_res.h
80
int pci_enable_atomic_ops_to_root(struct pci_dev *dev, u32 cap_mask);
sys/dev/bnxt/bnxt_re/qplib_res.h
847
static inline u32 bnxt_re_cap_fw_res(u32 fw_val, u32 drv_cap, bool sw_max_en)
sys/dev/bnxt/bnxt_re/qplib_res.h
851
return min_t(u32, fw_val, drv_cap);
sys/dev/bnxt/bnxt_re/qplib_sp.c
1008
u32 fn_id = 0;
sys/dev/bnxt/bnxt_re/qplib_sp.c
1122
u32 stats_fw_id)
sys/dev/bnxt/bnxt_re/qplib_sp.c
1158
int bnxt_qplib_qext_stat(struct bnxt_qplib_rcfw *rcfw, u32 fid,
sys/dev/bnxt/bnxt_re/qplib_sp.c
145
min_t(u32, sb->max_sge_var_wqe, BNXT_VAR_MAX_SGE) : sb->max_sge;
sys/dev/bnxt/bnxt_re/qplib_sp.c
150
attr->max_cq_wqes = min_t(u32, BNXT_QPLIB_MAX_CQ_WQES, attr->max_cq_wqes);
sys/dev/bnxt/bnxt_re/qplib_sp.c
263
req.gid[0] = cpu_to_be32(((u32 *)gid->data)[3]);
sys/dev/bnxt/bnxt_re/qplib_sp.c
264
req.gid[1] = cpu_to_be32(((u32 *)gid->data)[2]);
sys/dev/bnxt/bnxt_re/qplib_sp.c
265
req.gid[2] = cpu_to_be32(((u32 *)gid->data)[1]);
sys/dev/bnxt/bnxt_re/qplib_sp.c
266
req.gid[3] = cpu_to_be32(((u32 *)gid->data)[0]);
sys/dev/bnxt/bnxt_re/qplib_sp.c
369
bool update, u32 *index)
sys/dev/bnxt/bnxt_re/qplib_sp.c
415
req.gid[0] = cpu_to_be32(((u32 *)gid->raw)[3]);
sys/dev/bnxt/bnxt_re/qplib_sp.c
416
req.gid[1] = cpu_to_be32(((u32 *)gid->raw)[2]);
sys/dev/bnxt/bnxt_re/qplib_sp.c
417
req.gid[2] = cpu_to_be32(((u32 *)gid->raw)[1]);
sys/dev/bnxt/bnxt_re/qplib_sp.c
418
req.gid[3] = cpu_to_be32(((u32 *)gid->raw)[0]);
sys/dev/bnxt/bnxt_re/qplib_sp.c
468
u32 temp32[4];
sys/dev/bnxt/bnxt_re/qplib_sp.c
642
u32 buf_pg_size;
sys/dev/bnxt/bnxt_re/qplib_sp.c
643
u32 pg_size;
sys/dev/bnxt/bnxt_re/qplib_sp.c
856
u32 payload;
sys/dev/bnxt/bnxt_re/qplib_sp.c
857
u32 chunks;
sys/dev/bnxt/bnxt_re/qplib_sp.c
94
u32 temp;
sys/dev/bnxt/bnxt_re/qplib_sp.h
101
u32 flow_label;
sys/dev/bnxt/bnxt_re/qplib_sp.h
113
u32 flags;
sys/dev/bnxt/bnxt_re/qplib_sp.h
115
u32 lkey;
sys/dev/bnxt/bnxt_re/qplib_sp.h
116
u32 rkey;
sys/dev/bnxt/bnxt_re/qplib_sp.h
120
u32 npages;
sys/dev/bnxt/bnxt_re/qplib_sp.h
177
u32 l64B_per_rtt;
sys/dev/bnxt/bnxt_re/qplib_sp.h
205
u32 mask;
sys/dev/bnxt/bnxt_re/qplib_sp.h
207
u32 cur_mask;
sys/dev/bnxt/bnxt_re/qplib_sp.h
355
bool update, u32 *index);
sys/dev/bnxt/bnxt_re/qplib_sp.h
384
u32 stats_fw_id);
sys/dev/bnxt/bnxt_re/qplib_sp.h
388
int bnxt_qplib_qext_stat(struct bnxt_qplib_rcfw *rcfw, u32 fid,
sys/dev/bnxt/bnxt_re/qplib_sp.h
437
*max_sgid = max_t(u32, 256, *max_sgid);
sys/dev/bnxt/bnxt_re/qplib_sp.h
438
*max_sgid = min_t(u32, 256, *max_sgid);
sys/dev/bnxt/bnxt_re/qplib_sp.h
45
u32 max_qp;
sys/dev/bnxt/bnxt_re/qplib_sp.h
47
u32 max_qp_rd_atom;
sys/dev/bnxt/bnxt_re/qplib_sp.h
48
u32 max_qp_init_rd_atom;
sys/dev/bnxt/bnxt_re/qplib_sp.h
49
u32 max_qp_wqes;
sys/dev/bnxt/bnxt_re/qplib_sp.h
50
u32 max_qp_sges;
sys/dev/bnxt/bnxt_re/qplib_sp.h
51
u32 max_cq;
sys/dev/bnxt/bnxt_re/qplib_sp.h
56
u32 max_cq_wqes;
sys/dev/bnxt/bnxt_re/qplib_sp.h
57
u32 max_cq_sges;
sys/dev/bnxt/bnxt_re/qplib_sp.h
58
u32 max_mr;
sys/dev/bnxt/bnxt_re/qplib_sp.h
61
u32 max_pd;
sys/dev/bnxt/bnxt_re/qplib_sp.h
62
u32 max_mw;
sys/dev/bnxt/bnxt_re/qplib_sp.h
63
u32 max_raw_ethy_qp;
sys/dev/bnxt/bnxt_re/qplib_sp.h
64
u32 max_ah;
sys/dev/bnxt/bnxt_re/qplib_sp.h
65
u32 max_fmr;
sys/dev/bnxt/bnxt_re/qplib_sp.h
66
u32 max_map_per_fmr;
sys/dev/bnxt/bnxt_re/qplib_sp.h
67
u32 max_srq;
sys/dev/bnxt/bnxt_re/qplib_sp.h
68
u32 max_srq_wqes;
sys/dev/bnxt/bnxt_re/qplib_sp.h
69
u32 max_srq_sges;
sys/dev/bnxt/bnxt_re/qplib_sp.h
70
u32 max_pkey;
sys/dev/bnxt/bnxt_re/qplib_sp.h
71
u32 max_inline_data;
sys/dev/bnxt/bnxt_re/qplib_sp.h
72
u32 l2_db_size;
sys/dev/bnxt/bnxt_re/qplib_sp.h
78
u32 max_dpi;
sys/dev/bnxt/bnxt_re/qplib_sp.h
82
u32 id;
sys/dev/bnxt/bnxt_re/qplib_sp.h
97
u32 id;
sys/dev/bnxt/bnxt_re/qplib_tlv.h
107
static inline __le64 __get_cmdq_base_resp_addr(struct cmdq_base *req, u32 size)
sys/dev/bnxt/bnxt_re/qplib_tlv.h
116
u32 size, __le64 val)
sys/dev/bnxt/bnxt_re/qplib_tlv.h
124
static inline u8 __get_cmdq_base_resp_size(struct cmdq_base *req, u32 size)
sys/dev/bnxt/bnxt_re/qplib_tlv.h
133
u32 size, u8 val)
sys/dev/bnxt/bnxt_re/qplib_tlv.h
141
static inline u8 __get_cmdq_base_cmd_size(struct cmdq_base *req, u32 size)
sys/dev/bnxt/bnxt_re/qplib_tlv.h
150
u32 size, u8 val)
sys/dev/bnxt/bnxt_re/qplib_tlv.h
158
static inline __le16 __get_cmdq_base_flags(struct cmdq_base *req, u32 size)
sys/dev/bnxt/bnxt_re/qplib_tlv.h
167
u32 size, __le16 val)
sys/dev/bnxt/bnxt_re/qplib_tlv.h
73
static inline u8 __get_cmdq_base_opcode(struct cmdq_base *req, u32 size)
sys/dev/bnxt/bnxt_re/qplib_tlv.h
82
u32 size, u8 val)
sys/dev/bnxt/bnxt_re/qplib_tlv.h
90
static inline __le16 __get_cmdq_base_cookie(struct cmdq_base *req, u32 size)
sys/dev/bnxt/bnxt_re/qplib_tlv.h
99
u32 size, __le16 val)
sys/dev/bnxt/bnxt_re/stats.c
304
u32 fid;
sys/dev/bnxt/bnxt_re/stats.h
161
u32 stats_query_sec;
sys/dev/bnxt/bnxt_re/stats.h
165
u32 stats_query_counter;
sys/dev/cxgb/common/cxgb_common.h
249
u32 ipInReceive_hi;
sys/dev/cxgb/common/cxgb_common.h
250
u32 ipInReceive_lo;
sys/dev/cxgb/common/cxgb_common.h
251
u32 ipInHdrErrors_hi;
sys/dev/cxgb/common/cxgb_common.h
252
u32 ipInHdrErrors_lo;
sys/dev/cxgb/common/cxgb_common.h
253
u32 ipInAddrErrors_hi;
sys/dev/cxgb/common/cxgb_common.h
254
u32 ipInAddrErrors_lo;
sys/dev/cxgb/common/cxgb_common.h
255
u32 ipInUnknownProtos_hi;
sys/dev/cxgb/common/cxgb_common.h
256
u32 ipInUnknownProtos_lo;
sys/dev/cxgb/common/cxgb_common.h
257
u32 ipInDiscards_hi;
sys/dev/cxgb/common/cxgb_common.h
258
u32 ipInDiscards_lo;
sys/dev/cxgb/common/cxgb_common.h
259
u32 ipInDelivers_hi;
sys/dev/cxgb/common/cxgb_common.h
260
u32 ipInDelivers_lo;
sys/dev/cxgb/common/cxgb_common.h
261
u32 ipOutRequests_hi;
sys/dev/cxgb/common/cxgb_common.h
262
u32 ipOutRequests_lo;
sys/dev/cxgb/common/cxgb_common.h
263
u32 ipOutDiscards_hi;
sys/dev/cxgb/common/cxgb_common.h
264
u32 ipOutDiscards_lo;
sys/dev/cxgb/common/cxgb_common.h
265
u32 ipOutNoRoutes_hi;
sys/dev/cxgb/common/cxgb_common.h
266
u32 ipOutNoRoutes_lo;
sys/dev/cxgb/common/cxgb_common.h
267
u32 ipReasmTimeout;
sys/dev/cxgb/common/cxgb_common.h
268
u32 ipReasmReqds;
sys/dev/cxgb/common/cxgb_common.h
269
u32 ipReasmOKs;
sys/dev/cxgb/common/cxgb_common.h
270
u32 ipReasmFails;
sys/dev/cxgb/common/cxgb_common.h
272
u32 reserved[8];
sys/dev/cxgb/common/cxgb_common.h
274
u32 tcpActiveOpens;
sys/dev/cxgb/common/cxgb_common.h
275
u32 tcpPassiveOpens;
sys/dev/cxgb/common/cxgb_common.h
276
u32 tcpAttemptFails;
sys/dev/cxgb/common/cxgb_common.h
277
u32 tcpEstabResets;
sys/dev/cxgb/common/cxgb_common.h
278
u32 tcpOutRsts;
sys/dev/cxgb/common/cxgb_common.h
279
u32 tcpCurrEstab;
sys/dev/cxgb/common/cxgb_common.h
280
u32 tcpInSegs_hi;
sys/dev/cxgb/common/cxgb_common.h
281
u32 tcpInSegs_lo;
sys/dev/cxgb/common/cxgb_common.h
282
u32 tcpOutSegs_hi;
sys/dev/cxgb/common/cxgb_common.h
283
u32 tcpOutSegs_lo;
sys/dev/cxgb/common/cxgb_common.h
284
u32 tcpRetransSeg_hi;
sys/dev/cxgb/common/cxgb_common.h
285
u32 tcpRetransSeg_lo;
sys/dev/cxgb/common/cxgb_common.h
286
u32 tcpInErrs_hi;
sys/dev/cxgb/common/cxgb_common.h
287
u32 tcpInErrs_lo;
sys/dev/cxgb/common/cxgb_common.h
288
u32 tcpRtoMin;
sys/dev/cxgb/common/cxgb_common.h
289
u32 tcpRtoMax;
sys/dev/cxgb/common/cxgb_common.h
362
u32 offset;
sys/dev/cxgb/common/cxgb_common.h
363
u32 len;
sys/dev/cxgb/common/cxgb_common.h
413
u32 sip;
sys/dev/cxgb/common/cxgb_common.h
414
u32 sip_mask;
sys/dev/cxgb/common/cxgb_common.h
415
u32 dip;
sys/dev/cxgb/common/cxgb_common.h
416
u32 dip_mask;
sys/dev/cxgb/common/cxgb_common.h
421
u32 vlan:12;
sys/dev/cxgb/common/cxgb_common.h
422
u32 vlan_mask:12;
sys/dev/cxgb/common/cxgb_common.h
423
u32 intf:4;
sys/dev/cxgb/common/cxgb_common.h
424
u32 intf_mask:4;
sys/dev/cxgb/common/cxgb_common.h
676
void t3_set_reg_field(adapter_t *adap, unsigned int addr, u32 mask, u32 val);
sys/dev/cxgb/common/cxgb_common.h
679
int t3_wait_op_done_val(adapter_t *adapter, int reg, u32 mask, int polarity,
sys/dev/cxgb/common/cxgb_common.h
680
int attempts, int delay, u32 *valp);
sys/dev/cxgb/common/cxgb_common.h
682
static inline int t3_wait_op_done(adapter_t *adapter, int reg, u32 mask,
sys/dev/cxgb/common/cxgb_common.h
713
int t3_seeprom_read(adapter_t *adapter, u32 addr, u32 *data);
sys/dev/cxgb/common/cxgb_common.h
714
int t3_seeprom_write(adapter_t *adapter, u32 addr, u32 data);
sys/dev/cxgb/common/cxgb_common.h
719
u32 *data, int byte_oriented);
sys/dev/cxgb/common/cxgb_common.h
720
int t3_get_tp_version(adapter_t *adapter, u32 *vers);
sys/dev/cxgb/common/cxgb_common.h
724
int t3_get_fw_version(adapter_t *adapter, u32 *vers);
sys/dev/cxgb/common/cxgb_common.h
727
int t3_init_hw(adapter_t *adapter, u32 fw_params);
sys/dev/cxgb/common/cxgb_common.h
773
u32 *buf);
sys/dev/cxgb/common/cxgb_common.h
796
int t3_get_up_la(adapter_t *adapter, u32 *stopped, u32 *index,
sys/dev/cxgb/common/cxgb_common.h
797
u32 *size, void *data);
sys/dev/cxgb/common/cxgb_common.h
798
int t3_get_up_ioqs(adapter_t *adapter, u32 *size, void *data);
sys/dev/cxgb/common/cxgb_common.h
819
int t3_sge_read_ecntxt(adapter_t *adapter, unsigned int id, u32 data[4]);
sys/dev/cxgb/common/cxgb_common.h
820
int t3_sge_read_fl(adapter_t *adapter, unsigned int id, u32 data[4]);
sys/dev/cxgb/common/cxgb_common.h
821
int t3_sge_read_cq(adapter_t *adapter, unsigned int id, u32 data[4]);
sys/dev/cxgb/common/cxgb_common.h
822
int t3_sge_read_rspq(adapter_t *adapter, unsigned int id, u32 data[4]);
sys/dev/cxgb/common/cxgb_common.h
826
int t3_elmr_blk_write(adapter_t *adap, int start, const u32 *vals, int n);
sys/dev/cxgb/common/cxgb_common.h
827
int t3_elmr_blk_read(adapter_t *adap, int start, u32 *vals, int n);
sys/dev/cxgb/common/cxgb_mc5.c
100
static inline void dbgi_wr_data3(adapter_t *adapter, u32 v1, u32 v2, u32 v3)
sys/dev/cxgb/common/cxgb_mc5.c
107
static inline void dbgi_rd_rsp3(adapter_t *adapter, u32 *v1, u32 *v2, u32 *v3)
sys/dev/cxgb/common/cxgb_mc5.c
119
static int mc5_write(adapter_t *adapter, u32 addr_lo, u32 cmd)
sys/dev/cxgb/common/cxgb_mc5.c
128
static int init_mask_data_array(struct mc5 *mc5, u32 mask_array_base,
sys/dev/cxgb/common/cxgb_mc5.c
129
u32 data_array_base, u32 write_cmd,
sys/dev/cxgb/common/cxgb_mc5.c
391
unsigned int n, u32 *buf)
sys/dev/cxgb/common/cxgb_mc5.c
393
u32 read_cmd;
sys/dev/cxgb/common/cxgb_mc5.c
431
u32 cause = t3_read_reg(adap, A_MC5_DB_INT_CAUSE);
sys/dev/cxgb/common/cxgb_mc5.c
481
u32 cfg = t3_read_reg(adapter, A_MC5_DB_CONFIG);
sys/dev/cxgb/common/cxgb_mc5.c
93
static int mc5_cmd_write(adapter_t *adapter, u32 cmd)
sys/dev/cxgb/common/cxgb_mv88e1xxx.c
153
u32 val;
sys/dev/cxgb/common/cxgb_mv88e1xxx.c
190
u32 status;
sys/dev/cxgb/common/cxgb_mv88e1xxx.c
249
const u32 link_change_intrs = MV_INTR_LINK_CHNG |
sys/dev/cxgb/common/cxgb_mv88e1xxx.c
253
u32 cause;
sys/dev/cxgb/common/cxgb_t3_hw.c
100
void t3_set_reg_field(adapter_t *adapter, unsigned int addr, u32 mask, u32 val)
sys/dev/cxgb/common/cxgb_t3_hw.c
1006
u32 status;
sys/dev/cxgb/common/cxgb_t3_hw.c
102
u32 v = t3_read_reg(adapter, addr) & ~mask;
sys/dev/cxgb/common/cxgb_t3_hw.c
1035
u32 *data, int byte_oriented)
sys/dev/cxgb/common/cxgb_t3_hw.c
1039
if (addr + nwords * sizeof(u32) > SF_SIZE || (addr & 3))
sys/dev/cxgb/common/cxgb_t3_hw.c
1077
u32 buf[64];
sys/dev/cxgb/common/cxgb_t3_hw.c
1091
val = *(const u32*)data;
sys/dev/cxgb/common/cxgb_t3_hw.c
1121
int t3_get_tp_version(adapter_t *adapter, u32 *vers)
sys/dev/cxgb/common/cxgb_t3_hw.c
1145
u32 vers;
sys/dev/cxgb/common/cxgb_t3_hw.c
1183
u32 csum;
sys/dev/cxgb/common/cxgb_t3_hw.c
1185
const u32 *p = (const u32 *)tp_sram;
sys/dev/cxgb/common/cxgb_t3_hw.c
121
unsigned int data_reg, u32 *vals, unsigned int nregs,
sys/dev/cxgb/common/cxgb_t3_hw.c
1213
int t3_get_fw_version(adapter_t *adapter, u32 *vers)
sys/dev/cxgb/common/cxgb_t3_hw.c
1232
u32 vers;
sys/dev/cxgb/common/cxgb_t3_hw.c
1296
u32 version, csum, fw_version_addr;
sys/dev/cxgb/common/cxgb_t3_hw.c
1298
const u32 *p = (const u32 *)fw_data;
sys/dev/cxgb/common/cxgb_t3_hw.c
1306
version = ntohl(*(const u32 *)(fw_data + size - 8));
sys/dev/cxgb/common/cxgb_t3_hw.c
1435
static void t3_gate_rx_traffic(struct cmac *mac, u32 *rx_cfg,
sys/dev/cxgb/common/cxgb_t3_hw.c
1436
u32 *rx_hash_high, u32 *rx_hash_low)
sys/dev/cxgb/common/cxgb_t3_hw.c
1459
static void t3_open_rx_traffic(struct cmac *mac, u32 rx_cfg,
sys/dev/cxgb/common/cxgb_t3_hw.c
1460
u32 rx_hash_high, u32 rx_hash_low)
sys/dev/cxgb/common/cxgb_t3_hw.c
160
u32 val;
sys/dev/cxgb/common/cxgb_t3_hw.c
208
u32 opval;
sys/dev/cxgb/common/cxgb_t3_hw.c
2101
u32 cause = t3_read_reg(adapter, mc7->offset + A_MC7_INT_CAUSE);
sys/dev/cxgb/common/cxgb_t3_hw.c
2130
u32 addr = 0;
sys/dev/cxgb/common/cxgb_t3_hw.c
2153
u32 cause;
sys/dev/cxgb/common/cxgb_t3_hw.c
2210
u32 i, cause = t3_read_reg(adapter, A_T3DBG_INT_CAUSE);
sys/dev/cxgb/common/cxgb_t3_hw.c
2248
u32 cause = t3_read_reg(adapter, A_PL_INT_CAUSE0);
sys/dev/cxgb/common/cxgb_t3_hw.c
232
u32 opval;
sys/dev/cxgb/common/cxgb_t3_hw.c
250
u32 clkdiv = adap->params.vpd.cclk / (2 * adap->params.vpd.mdc) - 1;
sys/dev/cxgb/common/cxgb_t3_hw.c
251
u32 val = F_PREEN | V_CLKDIV(clkdiv);
sys/dev/cxgb/common/cxgb_t3_hw.c
2577
V_EC_BASE_LO((u32)base_addr & 0xffff));
sys/dev/cxgb/common/cxgb_t3_hw.c
2579
t3_write_reg(adapter, A_SG_CONTEXT_DATA2, (u32)base_addr);
sys/dev/cxgb/common/cxgb_t3_hw.c
2582
V_EC_BASE_HI((u32)base_addr & 0xf) | V_EC_RESPQ(respq) |
sys/dev/cxgb/common/cxgb_t3_hw.c
2614
t3_write_reg(adapter, A_SG_CONTEXT_DATA0, (u32)base_addr);
sys/dev/cxgb/common/cxgb_t3_hw.c
2617
V_FL_BASE_HI((u32)base_addr) |
sys/dev/cxgb/common/cxgb_t3_hw.c
265
u32 addr = V_REGADDR(reg_addr) | V_PHYADDR(phy_addr);
sys/dev/cxgb/common/cxgb_t3_hw.c
2657
t3_write_reg(adapter, A_SG_CONTEXT_DATA1, (u32)base_addr);
sys/dev/cxgb/common/cxgb_t3_hw.c
2666
V_CQ_BASE_HI((u32)base_addr) | intr | V_RQ_GEN(gen));
sys/dev/cxgb/common/cxgb_t3_hw.c
2697
t3_write_reg(adapter, A_SG_CONTEXT_DATA1, (u32)base_addr);
sys/dev/cxgb/common/cxgb_t3_hw.c
2700
V_CQ_BASE_HI((u32)base_addr) | V_CQ_RSPQ(rspq) |
sys/dev/cxgb/common/cxgb_t3_hw.c
2822
u32 val;
sys/dev/cxgb/common/cxgb_t3_hw.c
285
u32 addr = V_REGADDR(reg_addr) | V_PHYADDR(phy_addr);
sys/dev/cxgb/common/cxgb_t3_hw.c
2860
unsigned int id, u32 data[4])
sys/dev/cxgb/common/cxgb_t3_hw.c
2886
int t3_sge_read_ecntxt(adapter_t *adapter, unsigned int id, u32 data[4])
sys/dev/cxgb/common/cxgb_t3_hw.c
2902
int t3_sge_read_cq(adapter_t *adapter, unsigned int id, u32 data[4])
sys/dev/cxgb/common/cxgb_t3_hw.c
2918
int t3_sge_read_fl(adapter_t *adapter, unsigned int id, u32 data[4])
sys/dev/cxgb/common/cxgb_t3_hw.c
2934
int t3_sge_read_rspq(adapter_t *adapter, unsigned int id, u32 data[4])
sys/dev/cxgb/common/cxgb_t3_hw.c
2960
u32 val = i << 16;
sys/dev/cxgb/common/cxgb_t3_hw.c
2992
u32 val;
sys/dev/cxgb/common/cxgb_t3_hw.c
312
u32 addr = V_REGADDR(mmd_addr) | V_PHYADDR(phy_addr);
sys/dev/cxgb/common/cxgb_t3_hw.c
3164
static inline void tp_wr_indirect(adapter_t *adap, unsigned int addr, u32 val)
sys/dev/cxgb/common/cxgb_t3_hw.c
3170
static inline u32 tp_rd_indirect(adapter_t *adap, unsigned int addr)
sys/dev/cxgb/common/cxgb_t3_hw.c
3301
u32 val;
sys/dev/cxgb/common/cxgb_t3_hw.c
335
u32 addr = V_REGADDR(mmd_addr) | V_PHYADDR(phy_addr);
sys/dev/cxgb/common/cxgb_t3_hw.c
3502
t3_read_indirect(adap, A_TP_MIB_INDEX, A_TP_MIB_RDATA, (u32 *)tps,
sys/dev/cxgb/common/cxgb_t3_hw.c
3503
sizeof(*tps) / sizeof(u32), 0);
sys/dev/cxgb/common/cxgb_t3_hw.c
3578
const u32 *buf = (const u32 *)data;
sys/dev/cxgb/common/cxgb_t3_hw.c
3607
u32 addr, key[4], mask[4];
sys/dev/cxgb/common/cxgb_t3_hw.c
3649
u32 addr, key[4], mask[4];
sys/dev/cxgb/common/cxgb_t3_hw.c
3940
static int wrreg_wait(adapter_t *adapter, unsigned int addr, u32 val)
sys/dev/cxgb/common/cxgb_t3_hw.c
3963
u32 val;
sys/dev/cxgb/common/cxgb_t3_hw.c
4144
int t3_init_hw(adapter_t *adapter, u32 fw_params)
sys/dev/cxgb/common/cxgb_t3_hw.c
4231
u32 pci_mode, pcie_cap;
sys/dev/cxgb/common/cxgb_t3_hw.c
4292
static unsigned int __devinit mc7_calc_size(u32 cfg)
sys/dev/cxgb/common/cxgb_t3_hw.c
4306
u32 cfg;
sys/dev/cxgb/common/cxgb_t3_hw.c
4358
u32 val = V_PORTSPEED(is_10G(adapter) || adapter->params.nports > 2 ?
sys/dev/cxgb/common/cxgb_t3_hw.c
4360
u32 gpio_out = ai->gpio_out;
sys/dev/cxgb/common/cxgb_t3_hw.c
4652
u32 val;
sys/dev/cxgb/common/cxgb_t3_hw.c
4671
static int t3_cim_hac_read(adapter_t *adapter, u32 addr, u32 *val)
sys/dev/cxgb/common/cxgb_t3_hw.c
4673
u32 v;
sys/dev/cxgb/common/cxgb_t3_hw.c
4685
static int t3_cim_hac_write(adapter_t *adapter, u32 addr, u32 val)
sys/dev/cxgb/common/cxgb_t3_hw.c
4687
u32 v;
sys/dev/cxgb/common/cxgb_t3_hw.c
4700
int t3_get_up_la(adapter_t *adapter, u32 *stopped, u32 *index,
sys/dev/cxgb/common/cxgb_t3_hw.c
4701
u32 *size, void *data)
sys/dev/cxgb/common/cxgb_t3_hw.c
4703
u32 v, *buf = data;
sys/dev/cxgb/common/cxgb_t3_hw.c
4763
int t3_get_up_ioqs(adapter_t *adapter, u32 *size, void *data)
sys/dev/cxgb/common/cxgb_t3_hw.c
4765
u32 v, *buf = data;
sys/dev/cxgb/common/cxgb_t3_hw.c
4780
u32 base_addr = 0x10 * (i + 1);
sys/dev/cxgb/common/cxgb_t3_hw.c
52
int t3_wait_op_done_val(adapter_t *adapter, int reg, u32 mask, int polarity,
sys/dev/cxgb/common/cxgb_t3_hw.c
527
u32 val;
sys/dev/cxgb/common/cxgb_t3_hw.c
53
int attempts, int delay, u32 *valp)
sys/dev/cxgb/common/cxgb_t3_hw.c
56
u32 val = t3_read_reg(adapter, reg);
sys/dev/cxgb/common/cxgb_t3_hw.c
637
u32 pad; /* for multiple-of-4 sizing and alignment */
sys/dev/cxgb/common/cxgb_t3_hw.c
655
int t3_seeprom_read(adapter_t *adapter, u32 addr, u32 *data)
sys/dev/cxgb/common/cxgb_t3_hw.c
688
int t3_seeprom_write(adapter_t *adapter, u32 addr, u32 data)
sys/dev/cxgb/common/cxgb_t3_hw.c
741
static int get_desc_len(adapter_t *adapter, u32 offset)
sys/dev/cxgb/common/cxgb_t3_hw.c
743
u32 read_offset, tmp, shift, len = 0;
sys/dev/cxgb/common/cxgb_t3_hw.c
754
*((u32 *)buf) = cpu_to_le32(tmp);
sys/dev/cxgb/common/cxgb_t3_hw.c
762
*((u32 *)(&buf[4])) = cpu_to_le32(tmp);
sys/dev/cxgb/common/cxgb_t3_hw.c
778
static int is_end_tag(adapter_t * adapter, u32 offset)
sys/dev/cxgb/common/cxgb_t3_hw.c
780
u32 read_offset, shift, ret, tmp;
sys/dev/cxgb/common/cxgb_t3_hw.c
789
*((u32 *)buf) = cpu_to_le32(tmp);
sys/dev/cxgb/common/cxgb_t3_hw.c
807
u32 len=0, offset;
sys/dev/cxgb/common/cxgb_t3_hw.c
839
u32 i, ret;
sys/dev/cxgb/common/cxgb_t3_hw.c
843
(u32 *) &(vpd->data[i]));
sys/dev/cxgb/common/cxgb_t3_hw.c
868
ret = t3_seeprom_read(adapter, VPD_BASE, (u32 *)&vpd);
sys/dev/cxgb/common/cxgb_t3_hw.c
875
(u32 *)((u8 *)&vpd + i));
sys/dev/cxgb/common/cxgb_t3_hw.c
956
u32 *valp)
sys/dev/cxgb/common/cxgb_t3_hw.c
983
u32 val)
sys/dev/cxgb/common/cxgb_vsc7323.c
288
u32 stats0[NSTATS0], stats1[NSTATS1];
sys/dev/cxgb/common/cxgb_vsc7323.c
305
rx_ucast += (u64)(stats0[6 - STATS0_START] - (u32)rx_ucast);
sys/dev/cxgb/common/cxgb_vsc7323.c
308
tx_ucast += (u64)(stats0[27 - STATS0_START] - (u32)tx_ucast);
sys/dev/cxgb/common/cxgb_vsc7323.c
311
mac->stats.name += (u64)((hw_stat) - (u32)(mac->stats.name))
sys/dev/cxgb/common/cxgb_vsc7323.c
51
int t3_elmr_blk_write(adapter_t *adap, int start, const u32 *vals, int n)
sys/dev/cxgb/common/cxgb_vsc7323.c
69
static int elmr_write(adapter_t *adap, int addr, u32 val)
sys/dev/cxgb/common/cxgb_vsc7323.c
74
int t3_elmr_blk_read(adapter_t *adap, int start, u32 *vals, int n)
sys/dev/cxgb/common/cxgb_vsc8211.c
113
u32 val;
sys/dev/cxgb/common/cxgb_xgmac.c
158
u32 val;
sys/dev/cxgb/common/cxgb_xgmac.c
221
u32 val, store_mps;
sys/dev/cxgb/common/cxgb_xgmac.c
263
u32 intr = t3_read_reg(adap, A_XGM_INT_ENABLE + oft);
sys/dev/cxgb/common/cxgb_xgmac.c
315
u32 addr_lo, addr_hi;
sys/dev/cxgb/common/cxgb_xgmac.c
370
u32 v = t3_read_reg(mac->adapter, reg);
sys/dev/cxgb/common/cxgb_xgmac.c
381
u32 v = t3_read_reg(mac->adapter, reg);
sys/dev/cxgb/common/cxgb_xgmac.c
411
u32 hash_lo, hash_hi;
sys/dev/cxgb/common/cxgb_xgmac.c
570
u32 val;
sys/dev/cxgb/common/cxgb_xgmac.c
585
u32 rx_max_pkt_size =
sys/dev/cxgb/common/cxgb_xgmac.c
613
u32 old = t3_read_reg(adap, A_XGM_PORT_CFG + oft);
sys/dev/cxgb/common/cxgb_xgmac.c
625
u32 rx_max_pkt_size =
sys/dev/cxgb/common/cxgb_xgmac.c
736
u32 cfg, active, enforcepkt;
sys/dev/cxgb/common/cxgb_xgmac.c
74
u32 ctrl = A_XGM_SERDES_CTRL0 + mac->offset;
sys/dev/cxgb/common/cxgb_xgmac.c
807
u32 v, lo;
sys/dev/cxgb/common/cxgb_xgmac.c
856
lo = (u32)mac->stats.rx_cong_drops;
sys/dev/cxgb/common/jhash.h
117
static inline u32 jhash_3words(u32 a, u32 b, u32 c, u32 initval)
sys/dev/cxgb/common/jhash.h
128
static inline u32 jhash_2words(u32 a, u32 b, u32 initval)
sys/dev/cxgb/common/jhash.h
133
static inline u32 jhash_1word(u32 a, u32 initval)
sys/dev/cxgb/common/jhash.h
39
static inline u32 jhash(const void *key, u32 length, u32 initval)
sys/dev/cxgb/common/jhash.h
41
u32 a, b, c, len;
sys/dev/cxgb/common/jhash.h
49
a += (k[0] +((u32)k[1]<<8) +((u32)k[2]<<16) +((u32)k[3]<<24));
sys/dev/cxgb/common/jhash.h
50
b += (k[4] +((u32)k[5]<<8) +((u32)k[6]<<16) +((u32)k[7]<<24));
sys/dev/cxgb/common/jhash.h
51
c += (k[8] +((u32)k[9]<<8) +((u32)k[10]<<16)+((u32)k[11]<<24));
sys/dev/cxgb/common/jhash.h
61
case 11: c += ((u32)k[10]<<24);
sys/dev/cxgb/common/jhash.h
62
case 10: c += ((u32)k[9]<<16);
sys/dev/cxgb/common/jhash.h
63
case 9 : c += ((u32)k[8]<<8);
sys/dev/cxgb/common/jhash.h
64
case 8 : b += ((u32)k[7]<<24);
sys/dev/cxgb/common/jhash.h
65
case 7 : b += ((u32)k[6]<<16);
sys/dev/cxgb/common/jhash.h
66
case 6 : b += ((u32)k[5]<<8);
sys/dev/cxgb/common/jhash.h
68
case 4 : a += ((u32)k[3]<<24);
sys/dev/cxgb/common/jhash.h
69
case 3 : a += ((u32)k[2]<<16);
sys/dev/cxgb/common/jhash.h
70
case 2 : a += ((u32)k[1]<<8);
sys/dev/cxgb/common/jhash.h
82
static inline u32 jhash2(u32 *k, u32 length, u32 initval)
sys/dev/cxgb/common/jhash.h
84
u32 a, b, c, len;
sys/dev/cxgb/cxgb_main.c
2406
u32 v;
sys/dev/cxgb/cxgb_main.c
2422
u32 aligned_offset, aligned_len, *p;
sys/dev/cxgb/cxgb_main.c
2431
err = t3_seeprom_read(adapter, aligned_offset, (u32 *)buf);
sys/dev/cxgb/cxgb_main.c
2435
(u32 *)&buf[aligned_len - 4]);
sys/dev/cxgb/cxgb_main.c
2446
for (p = (u32 *)buf; !err && aligned_len; aligned_len -= 4, p++) {
sys/dev/cxgb/cxgb_main.c
279
u32 sip;
sys/dev/cxgb/cxgb_main.c
280
u32 sip_mask;
sys/dev/cxgb/cxgb_main.c
281
u32 dip;
sys/dev/cxgb/cxgb_main.c
284
u32 vlan:12;
sys/dev/cxgb/cxgb_main.c
285
u32 vlan_prio:3;
sys/dev/cxgb/cxgb_main.c
286
u32 mac_hit:1;
sys/dev/cxgb/cxgb_main.c
287
u32 mac_idx:4;
sys/dev/cxgb/cxgb_main.c
288
u32 mac_vld:1;
sys/dev/cxgb/cxgb_main.c
289
u32 pkt_type:2;
sys/dev/cxgb/cxgb_main.c
290
u32 report_filter_id:1;
sys/dev/cxgb/cxgb_main.c
291
u32 pass:1;
sys/dev/cxgb/cxgb_main.c
292
u32 rss:1;
sys/dev/cxgb/cxgb_main.c
293
u32 qset:3;
sys/dev/cxgb/cxgb_main.c
294
u32 locked:1;
sys/dev/cxgb/cxgb_main.c
295
u32 valid:1;
sys/dev/cxgb/cxgb_main.c
387
u32 vers;
sys/dev/cxgbe/common/common.h
1020
void t4_tp_pio_read(struct adapter *adap, u32 *buff, u32 nregs,
sys/dev/cxgbe/common/common.h
1021
u32 start_index, bool sleep_ok);
sys/dev/cxgbe/common/common.h
1022
void t4_tp_pio_write(struct adapter *adap, const u32 *buff, u32 nregs,
sys/dev/cxgbe/common/common.h
1023
u32 start_index, bool sleep_ok);
sys/dev/cxgbe/common/common.h
1024
void t4_tp_tm_pio_read(struct adapter *adap, u32 *buff, u32 nregs,
sys/dev/cxgbe/common/common.h
1025
u32 start_index, bool sleep_ok);
sys/dev/cxgbe/common/common.h
1026
void t4_tp_mib_read(struct adapter *adap, u32 *buff, u32 nregs,
sys/dev/cxgbe/common/common.h
1027
u32 start_index, bool sleep_ok);
sys/dev/cxgbe/common/common.h
1036
unsigned int nparams, const u32 *params,
sys/dev/cxgbe/common/common.h
1037
u32 *vals)
sys/dev/cxgbe/common/common.h
1043
unsigned int nparams, const u32 *params,
sys/dev/cxgbe/common/common.h
1044
const u32 *vals)
sys/dev/cxgbe/common/common.h
198
u32 tcp_out_rsts;
sys/dev/cxgbe/common/common.h
205
u32 frames;
sys/dev/cxgbe/common/common.h
206
u32 drops;
sys/dev/cxgbe/common/common.h
211
u32 del;
sys/dev/cxgbe/common/common.h
212
u32 inv;
sys/dev/cxgbe/common/common.h
213
u32 act;
sys/dev/cxgbe/common/common.h
214
u32 pas;
sys/dev/cxgbe/common/common.h
218
u32 frames_ddp;
sys/dev/cxgbe/common/common.h
219
u32 frames_drop;
sys/dev/cxgbe/common/common.h
224
u32 mac_in_errs[MAX_NCHAN];
sys/dev/cxgbe/common/common.h
225
u32 hdr_in_errs[MAX_NCHAN];
sys/dev/cxgbe/common/common.h
226
u32 tcp_in_errs[MAX_NCHAN];
sys/dev/cxgbe/common/common.h
227
u32 tnl_cong_drops[MAX_NCHAN];
sys/dev/cxgbe/common/common.h
228
u32 ofld_chan_drops[MAX_NCHAN];
sys/dev/cxgbe/common/common.h
229
u32 tnl_tx_drops[MAX_NCHAN];
sys/dev/cxgbe/common/common.h
230
u32 ofld_vlan_drops[MAX_NCHAN];
sys/dev/cxgbe/common/common.h
231
u32 tcp6_in_errs[MAX_NCHAN];
sys/dev/cxgbe/common/common.h
232
u32 ofld_no_neigh;
sys/dev/cxgbe/common/common.h
233
u32 ofld_cong_defer;
sys/dev/cxgbe/common/common.h
237
u32 out_pkt[MAX_NCHAN];
sys/dev/cxgbe/common/common.h
238
u32 in_pkt[MAX_NCHAN];
sys/dev/cxgbe/common/common.h
242
u32 proxy[MAX_NCHAN];
sys/dev/cxgbe/common/common.h
246
u32 req[MAX_NCHAN];
sys/dev/cxgbe/common/common.h
247
u32 rsp[MAX_NCHAN];
sys/dev/cxgbe/common/common.h
251
u32 rqe_dfr_pkt;
sys/dev/cxgbe/common/common.h
252
u32 rqe_dfr_mod;
sys/dev/cxgbe/common/common.h
253
u32 pkts_in[MAX_NCHAN];
sys/dev/cxgbe/common/common.h
259
u32 padding[4];
sys/dev/cxgbe/common/common.h
260
u32 pkts_out[MAX_NCHAN];
sys/dev/cxgbe/common/common.h
276
u32 sge_control;
sys/dev/cxgbe/common/common.h
277
u32 sge_fl_buffer_size[SGE_FLBUF_SIZES];
sys/dev/cxgbe/common/common.h
350
u32 memtype; /* which memory (FW_MEMTYPE_* ) */
sys/dev/cxgbe/common/common.h
351
u32 start; /* start of log in firmware memory */
sys/dev/cxgbe/common/common.h
352
u32 size; /* size of log */
sys/dev/cxgbe/common/common.h
353
u32 addr; /* start address in flat addr space */
sys/dev/cxgbe/common/common.h
369
u32 sge_fl_db;
sys/dev/cxgbe/common/common.h
494
u32 data[TRACE_LEN / 4];
sys/dev/cxgbe/common/common.h
495
u32 mask[TRACE_LEN / 4];
sys/dev/cxgbe/common/common.h
648
void t4_set_reg_field(struct adapter *adap, unsigned int addr, u32 mask, u32 val);
sys/dev/cxgbe/common/common.h
677
unsigned int data_reg, u32 *vals, unsigned int nregs,
sys/dev/cxgbe/common/common.h
680
unsigned int data_reg, const u32 *vals,
sys/dev/cxgbe/common/common.h
683
u32 t4_hw_pci_read_cfg4(adapter_t *adapter, int reg);
sys/dev/cxgbe/common/common.h
696
int t4_seeprom_read(struct adapter *adapter, u32 addr, u32 *data);
sys/dev/cxgbe/common/common.h
697
int t4_seeprom_write(struct adapter *adapter, u32 addr, u32 data);
sys/dev/cxgbe/common/common.h
701
u32 *data, int byte_oriented);
sys/dev/cxgbe/common/common.h
713
int t4_get_fw_version(struct adapter *adapter, u32 *vers);
sys/dev/cxgbe/common/common.h
715
int t4_get_bs_version(struct adapter *adapter, u32 *vers);
sys/dev/cxgbe/common/common.h
716
int t4_get_tp_version(struct adapter *adapter, u32 *vers);
sys/dev/cxgbe/common/common.h
717
int t4_get_exprom_version(struct adapter *adapter, u32 *vers);
sys/dev/cxgbe/common/common.h
718
int t4_get_scfg_version(struct adapter *adapter, u32 *vers);
sys/dev/cxgbe/common/common.h
719
int t4_get_vpd_version(struct adapter *adapter, u32 *vers);
sys/dev/cxgbe/common/common.h
721
int t4_init_hw(struct adapter *adapter, u32 fw_params);
sys/dev/cxgbe/common/common.h
723
int t4_prep_adapter(struct adapter *adapter, u32 *buf);
sys/dev/cxgbe/common/common.h
745
void t4_read_rss_key(struct adapter *adapter, u32 *key, bool sleep_ok);
sys/dev/cxgbe/common/common.h
746
void t4_write_rss_key(struct adapter *adap, const u32 *key, int idx,
sys/dev/cxgbe/common/common.h
749
u32 *valp, bool sleep_ok);
sys/dev/cxgbe/common/common.h
751
u32 val, bool sleep_ok);
sys/dev/cxgbe/common/common.h
753
u32 *vfl, u32 *vfh, bool sleep_ok);
sys/dev/cxgbe/common/common.h
755
u32 vfl, u32 vfh, bool sleep_ok);
sys/dev/cxgbe/common/common.h
756
u32 t4_read_rss_pf_map(struct adapter *adapter, bool sleep_ok);
sys/dev/cxgbe/common/common.h
757
void t4_write_rss_pf_map(struct adapter *adapter, u32 pfmap, bool sleep_ok);
sys/dev/cxgbe/common/common.h
758
u32 t4_read_rss_pf_mask(struct adapter *adapter, bool sleep_ok);
sys/dev/cxgbe/common/common.h
759
void t4_write_rss_pf_mask(struct adapter *adapter, u32 pfmask, bool sleep_ok);
sys/dev/cxgbe/common/common.h
761
void t4_pmtx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[]);
sys/dev/cxgbe/common/common.h
762
void t4_pmrx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[]);
sys/dev/cxgbe/common/common.h
763
void t4_pmrx_cache_get_stats(struct adapter *adap, u32 stats[]);
sys/dev/cxgbe/common/common.h
766
int t4_read_cim_ibq_core(struct adapter *adap, u8 coreid, u32 qid, u32 *data,
sys/dev/cxgbe/common/common.h
768
int t4_read_cim_obq_core(struct adapter *adap, u8 coreid, u32 qid, u32 *data,
sys/dev/cxgbe/common/common.h
776
int t4_cim_read_la_core(struct adapter *adap, u8 coreid, u32 *la_buf,
sys/dev/cxgbe/common/common.h
777
u32 *wrptr);
sys/dev/cxgbe/common/common.h
778
void t4_cim_read_pif_la(struct adapter *adap, u32 *pif_req, u32 *pif_rsp,
sys/dev/cxgbe/common/common.h
780
void t4_cim_read_ma_la(struct adapter *adap, u32 *ma_req, u32 *ma_rsp);
sys/dev/cxgbe/common/common.h
788
static inline int t4_read_cim_ibq(struct adapter *adap, u32 qid, u32 *data,
sys/dev/cxgbe/common/common.h
794
static inline int t4_read_cim_obq(struct adapter *adap, u32 qid, u32 *data,
sys/dev/cxgbe/common/common.h
812
static inline int t4_cim_read_la(struct adapter *adap, u32 *la_buf, u32 *wrptr)
sys/dev/cxgbe/common/common.h
819
u32 t4_read_pcie_cfg4(struct adapter *adap, int reg, int drv_fw_attach);
sys/dev/cxgbe/common/common.h
820
int t4_mc_read(struct adapter *adap, int idx, u32 addr,
sys/dev/cxgbe/common/common.h
822
int t4_edc_read(struct adapter *adap, int idx, u32 addr, __be32 *data, u64 *parity);
sys/dev/cxgbe/common/common.h
823
int t4_mem_read(struct adapter *adap, int mtype, u32 addr, u32 size,
sys/dev/cxgbe/common/common.h
836
u32 t4_port_reg(struct adapter *adap, u8 port, u32 reg);
sys/dev/cxgbe/common/common.h
874
void t4_ulprx_read_la(struct adapter *adap, u32 *la_buf);
sys/dev/cxgbe/common/common.h
898
unsigned int vf, unsigned int nparams, const u32 *params,
sys/dev/cxgbe/common/common.h
899
u32 *val);
sys/dev/cxgbe/common/common.h
901
unsigned int vf, unsigned int nparams, const u32 *params,
sys/dev/cxgbe/common/common.h
902
u32 *val, int rw);
sys/dev/cxgbe/common/common.h
905
unsigned int nparams, const u32 *params,
sys/dev/cxgbe/common/common.h
906
const u32 *val, int timeout);
sys/dev/cxgbe/common/common.h
908
unsigned int vf, unsigned int nparams, const u32 *params,
sys/dev/cxgbe/common/common.h
909
const u32 *val);
sys/dev/cxgbe/common/common.h
992
enum ctxt_type ctype, u32 *data);
sys/dev/cxgbe/common/common.h
994
u32 *data);
sys/dev/cxgbe/common/common.h
999
int t4_fwaddrspace_write(struct adapter *adap, unsigned int mbox, u32 addr, u32 val);
sys/dev/cxgbe/common/t4_hw.c
10128
u32 exact;
sys/dev/cxgbe/common/t4_hw.c
10170
u32 raw;
sys/dev/cxgbe/common/t4_hw.c
102
int attempts, int delay, u32 *valp)
sys/dev/cxgbe/common/t4_hw.c
10350
u32 val;
sys/dev/cxgbe/common/t4_hw.c
105
u32 val = t4_read_reg(adap, reg);
sys/dev/cxgbe/common/t4_hw.c
10706
static uint32_t lstatus_to_fwcap(u32 lstatus)
sys/dev/cxgbe/common/t4_hw.c
10745
u32 stat, linkattr;
sys/dev/cxgbe/common/t4_hw.c
10899
u32 pcie_cap;
sys/dev/cxgbe/common/t4_hw.c
10910
u32 vendor_and_model_id;
sys/dev/cxgbe/common/t4_hw.c
10911
u32 size_mb;
sys/dev/cxgbe/common/t4_hw.c
10925
u32 flashid = 0;
sys/dev/cxgbe/common/t4_hw.c
11057
u32 pcie_cap;
sys/dev/cxgbe/common/t4_hw.c
11161
int t4_prep_adapter(struct adapter *adapter, u32 *buf)
sys/dev/cxgbe/common/t4_hw.c
11243
u32 a_port_cfg = is_t4(adapter) ?
sys/dev/cxgbe/common/t4_hw.c
11251
u32 hss_cfg0 = is_t4(adapter) ?
sys/dev/cxgbe/common/t4_hw.c
11365
u32 pf_dparams;
sys/dev/cxgbe/common/t4_hw.c
11433
u32 r;
sys/dev/cxgbe/common/t4_hw.c
11645
u32 tx_len, rx_len, r, v;
sys/dev/cxgbe/common/t4_hw.c
11845
u32 param, val;
sys/dev/cxgbe/common/t4_hw.c
11887
static void t4_read_cimq_cfg_ibq_core(struct adapter *adap, u8 coreid, u32 qid,
sys/dev/cxgbe/common/t4_hw.c
11913
static void t4_read_cimq_cfg_obq_core(struct adapter *adap, u8 coreid, u32 qid,
sys/dev/cxgbe/common/t4_hw.c
11962
static int t4_read_cim_ibq_data_core(struct adapter *adap, u8 coreid, u32 addr,
sys/dev/cxgbe/common/t4_hw.c
11963
u32 *data)
sys/dev/cxgbe/common/t4_hw.c
12002
int t4_read_cim_ibq_core(struct adapter *adap, u8 coreid, u32 qid, u32 *data,
sys/dev/cxgbe/common/t4_hw.c
12028
static int t4_read_cim_obq_data_core(struct adapter *adap, u8 coreid, u32 addr,
sys/dev/cxgbe/common/t4_hw.c
12029
u32 *data)
sys/dev/cxgbe/common/t4_hw.c
12062
int t4_read_cim_obq_core(struct adapter *adap, u8 coreid, u32 qid, u32 *data,
sys/dev/cxgbe/common/t4_hw.c
12183
int t4_cim_read_la_core(struct adapter *adap, u8 coreid, u32 *la_buf,
sys/dev/cxgbe/common/t4_hw.c
12184
u32 *wrptr)
sys/dev/cxgbe/common/t4_hw.c
12361
u32 debug0, debug11;
sys/dev/cxgbe/common/t4_hw.c
12584
u32 params[1], val[1];
sys/dev/cxgbe/common/t4_hw.c
12681
u32 cur_header = 0;
sys/dev/cxgbe/common/t4_hw.c
12825
if (le32_to_cpu(*(u32*)pcir_header->signature) != PCIR_SIGNATURE) {
sys/dev/cxgbe/common/t4_hw.c
13062
u32 bgmap, port_base_addr;
sys/dev/cxgbe/common/t4_hw.c
13178
enum ctxt_type ctype, u32 *data)
sys/dev/cxgbe/common/t4_hw.c
132
void t4_set_reg_field(struct adapter *adapter, unsigned int addr, u32 mask,
sys/dev/cxgbe/common/t4_hw.c
13224
u32 *data)
sys/dev/cxgbe/common/t4_hw.c
133
u32 val)
sys/dev/cxgbe/common/t4_hw.c
135
u32 v = t4_read_reg(adapter, addr) & ~mask;
sys/dev/cxgbe/common/t4_hw.c
154
unsigned int data_reg, u32 *vals,
sys/dev/cxgbe/common/t4_hw.c
177
unsigned int data_reg, const u32 *vals,
sys/dev/cxgbe/common/t4_hw.c
196
u32 t4_hw_pci_read_cfg4(adapter_t *adap, int reg)
sys/dev/cxgbe/common/t4_hw.c
198
u32 req = V_FUNCTION(adap->pf) | V_REGISTER(reg);
sys/dev/cxgbe/common/t4_hw.c
199
u32 val;
sys/dev/cxgbe/common/t4_hw.c
243
u32 pcie_fw;
sys/dev/cxgbe/common/t4_hw.c
256
u32 mbox_addr)
sys/dev/cxgbe/common/t4_hw.c
280
u32
sys/dev/cxgbe/common/t4_hw.c
281
t4_port_reg(struct adapter *adap, u8 port, u32 reg)
sys/dev/cxgbe/common/t4_hw.c
3317
u32 *buf_end = (u32 *)(buf + buf_size);
sys/dev/cxgbe/common/t4_hw.c
3381
u32 *bufp = (u32 *)(buf + reg);
sys/dev/cxgbe/common/t4_hw.c
3389
reg += sizeof(u32);
sys/dev/cxgbe/common/t4_hw.c
3483
int t4_seeprom_read(struct adapter *adapter, u32 addr, u32 *data)
sys/dev/cxgbe/common/t4_hw.c
3538
int t4_seeprom_write(struct adapter *adapter, u32 addr, u32 data)
sys/dev/cxgbe/common/t4_hw.c
3542
u32 stats_reg;
sys/dev/cxgbe/common/t4_hw.c
3691
uint16_t device_id, u32 *buf)
sys/dev/cxgbe/common/t4_hw.c
377
u32 v;
sys/dev/cxgbe/common/t4_hw.c
380
u32 data_reg = PF_REG(mbox, A_CIM_PF_MAILBOX_DATA);
sys/dev/cxgbe/common/t4_hw.c
381
u32 ctl_reg = PF_REG(mbox, A_CIM_PF_MAILBOX_CTRL);
sys/dev/cxgbe/common/t4_hw.c
382
u32 ctl;
sys/dev/cxgbe/common/t4_hw.c
384
u32 pcie_fw;
sys/dev/cxgbe/common/t4_hw.c
3851
int lock, u32 *valp)
sys/dev/cxgbe/common/t4_hw.c
3883
int lock, u32 val)
sys/dev/cxgbe/common/t4_hw.c
3906
u32 status;
sys/dev/cxgbe/common/t4_hw.c
3935
unsigned int nwords, u32 *data, int byte_oriented)
sys/dev/cxgbe/common/t4_hw.c
3939
if (addr + nwords * sizeof(u32) > adapter->params.sf_size || (addr & 3))
sys/dev/cxgbe/common/t4_hw.c
3977
u32 buf[SF_PAGE_SIZE / 4];
sys/dev/cxgbe/common/t4_hw.c
4033
int t4_get_fw_version(struct adapter *adapter, u32 *vers)
sys/dev/cxgbe/common/t4_hw.c
4063
int t4_get_bs_version(struct adapter *adapter, u32 *vers)
sys/dev/cxgbe/common/t4_hw.c
4079
int t4_get_tp_version(struct adapter *adapter, u32 *vers)
sys/dev/cxgbe/common/t4_hw.c
4097
int t4_get_exprom_version(struct adapter *adapter, u32 *vers)
sys/dev/cxgbe/common/t4_hw.c
4103
u32 exprom_header_buf[DIV_ROUND_UP(sizeof(struct exprom_header),
sys/dev/cxgbe/common/t4_hw.c
4104
sizeof(u32))];
sys/dev/cxgbe/common/t4_hw.c
4147
int t4_get_scfg_version(struct adapter *adapter, u32 *vers)
sys/dev/cxgbe/common/t4_hw.c
4149
u32 scfgrev_param;
sys/dev/cxgbe/common/t4_hw.c
4182
int t4_get_vpd_version(struct adapter *adapter, u32 *vers)
sys/dev/cxgbe/common/t4_hw.c
4184
u32 vpdrev_param;
sys/dev/cxgbe/common/t4_hw.c
4318
u32 csum;
sys/dev/cxgbe/common/t4_hw.c
4322
const u32 *p = (const u32 *)fw_data;
sys/dev/cxgbe/common/t4_hw.c
4424
void t4_cim_read_pif_la(struct adapter *adap, u32 *pif_req, u32 *pif_rsp,
sys/dev/cxgbe/common/t4_hw.c
4429
u32 cfg, val, req, rsp;
sys/dev/cxgbe/common/t4_hw.c
4458
void t4_cim_read_ma_la(struct adapter *adap, u32 *ma_req, u32 *ma_rsp)
sys/dev/cxgbe/common/t4_hw.c
4460
u32 cfg;
sys/dev/cxgbe/common/t4_hw.c
4479
void t4_ulprx_read_la(struct adapter *adap, u32 *la_buf)
sys/dev/cxgbe/common/t4_hw.c
4484
u32 *p = la_buf + i;
sys/dev/cxgbe/common/t4_hw.c
4777
u32 mask;
sys/dev/cxgbe/common/t4_hw.c
4782
u32 mask;
sys/dev/cxgbe/common/t4_hw.c
4791
u32 fatal; /* bits that are fatal */
sys/dev/cxgbe/common/t4_hw.c
4798
intr_alert_char(u32 cause, u32 enable, u32 fatal)
sys/dev/cxgbe/common/t4_hw.c
5280
u32 v;
sys/dev/cxgbe/common/t4_hw.c
5435
u32 val, fw_err;
sys/dev/cxgbe/common/t4_hw.c
557
u32 edc_ecc_err_addr_reg;
sys/dev/cxgbe/common/t4_hw.c
558
u32 edc_bist_status_rdata_reg;
sys/dev/cxgbe/common/t4_hw.c
5654
u32 data[17];
sys/dev/cxgbe/common/t4_hw.c
604
int t4_mc_read(struct adapter *adap, int idx, u32 addr, __be32 *data, u64 *ecc)
sys/dev/cxgbe/common/t4_hw.c
607
u32 mc_bist_cmd_reg, mc_bist_cmd_addr_reg, mc_bist_cmd_len_reg;
sys/dev/cxgbe/common/t4_hw.c
608
u32 mc_bist_status_rdata_reg, mc_bist_data_pattern_reg;
sys/dev/cxgbe/common/t4_hw.c
62
static int t4_wait_op_done_val(struct adapter *adapter, int reg, u32 mask,
sys/dev/cxgbe/common/t4_hw.c
6221
u32 v;
sys/dev/cxgbe/common/t4_hw.c
63
int polarity, int attempts, int delay, u32 *valp)
sys/dev/cxgbe/common/t4_hw.c
6535
static inline u32
sys/dev/cxgbe/common/t4_hw.c
6536
t7_tlstx_reg(u8 instance, u8 channel, u32 reg)
sys/dev/cxgbe/common/t4_hw.c
66
u32 val = t4_read_reg(adapter, reg);
sys/dev/cxgbe/common/t4_hw.c
660
int t4_edc_read(struct adapter *adap, int idx, u32 addr, __be32 *data, u64 *ecc)
sys/dev/cxgbe/common/t4_hw.c
663
u32 edc_bist_cmd_reg, edc_bist_cmd_addr_reg, edc_bist_cmd_len_reg;
sys/dev/cxgbe/common/t4_hw.c
664
u32 edc_bist_cmd_data_pattern, edc_bist_status_rdata_reg;
sys/dev/cxgbe/common/t4_hw.c
7174
u32 mask, val;
sys/dev/cxgbe/common/t4_hw.c
720
int t4_mem_read(struct adapter *adap, int mtype, u32 addr, u32 len,
sys/dev/cxgbe/common/t4_hw.c
7225
u32 a = ((u32)addr[0] << 16) | ((u32)addr[1] << 8) | addr[2];
sys/dev/cxgbe/common/t4_hw.c
7226
u32 b = ((u32)addr[3] << 16) | ((u32)addr[4] << 8) | addr[5];
sys/dev/cxgbe/common/t4_hw.c
723
u32 pos, start, end, offset;
sys/dev/cxgbe/common/t4_hw.c
7392
static int rd_rss_row(struct adapter *adap, int row, u32 *val)
sys/dev/cxgbe/common/t4_hw.c
7414
u32 val;
sys/dev/cxgbe/common/t4_hw.c
7440
static int t4_tp_fw_ldst_rw(struct adapter *adap, int cmd, u32 *vals,
sys/dev/cxgbe/common/t4_hw.c
7484
static void t4_tp_indirect_rw(struct adapter *adap, u32 reg_addr, u32 reg_data,
sys/dev/cxgbe/common/t4_hw.c
7485
u32 *buff, u32 nregs, u32 start_index, int rw,
sys/dev/cxgbe/common/t4_hw.c
7531
void t4_tp_pio_read(struct adapter *adap, u32 *buff, u32 nregs,
sys/dev/cxgbe/common/t4_hw.c
7532
u32 start_index, bool sleep_ok)
sys/dev/cxgbe/common/t4_hw.c
7548
void t4_tp_pio_write(struct adapter *adap, const u32 *buff, u32 nregs,
sys/dev/cxgbe/common/t4_hw.c
7549
u32 start_index, bool sleep_ok)
sys/dev/cxgbe/common/t4_hw.c
7552
__DECONST(u32 *, buff), nregs, start_index, 0, sleep_ok);
sys/dev/cxgbe/common/t4_hw.c
7565
void t4_tp_tm_pio_read(struct adapter *adap, u32 *buff, u32 nregs,
sys/dev/cxgbe/common/t4_hw.c
7566
u32 start_index, bool sleep_ok)
sys/dev/cxgbe/common/t4_hw.c
7582
void t4_tp_mib_read(struct adapter *adap, u32 *buff, u32 nregs, u32 start_index,
sys/dev/cxgbe/common/t4_hw.c
7597
void t4_read_rss_key(struct adapter *adap, u32 *key, bool sleep_ok)
sys/dev/cxgbe/common/t4_hw.c
7613
void t4_write_rss_key(struct adapter *adap, const u32 *key, int idx,
sys/dev/cxgbe/common/t4_hw.c
7617
u32 vrt = t4_read_reg(adap, A_TP_RSS_CONFIG_VRT);
sys/dev/cxgbe/common/t4_hw.c
7652
u32 *valp, bool sleep_ok)
sys/dev/cxgbe/common/t4_hw.c
7668
u32 val, bool sleep_ok)
sys/dev/cxgbe/common/t4_hw.c
7686
u32 *vfl, u32 *vfh, bool sleep_ok)
sys/dev/cxgbe/common/t4_hw.c
7688
u32 vrt, mask, data;
sys/dev/cxgbe/common/t4_hw.c
772
u32 t4_read_pcie_cfg4(struct adapter *adap, int reg, int drv_fw_attach)
sys/dev/cxgbe/common/t4_hw.c
7724
u32 vfl, u32 vfh, bool sleep_ok)
sys/dev/cxgbe/common/t4_hw.c
7726
u32 vrt, mask, data;
sys/dev/cxgbe/common/t4_hw.c
7758
u32 t4_read_rss_pf_map(struct adapter *adapter, bool sleep_ok)
sys/dev/cxgbe/common/t4_hw.c
7760
u32 pfmap;
sys/dev/cxgbe/common/t4_hw.c
7774
void t4_write_rss_pf_map(struct adapter *adapter, u32 pfmap, bool sleep_ok)
sys/dev/cxgbe/common/t4_hw.c
7786
u32 t4_read_rss_pf_mask(struct adapter *adapter, bool sleep_ok)
sys/dev/cxgbe/common/t4_hw.c
7788
u32 pfmask;
sys/dev/cxgbe/common/t4_hw.c
7802
void t4_write_rss_pf_mask(struct adapter *adapter, u32 pfmask, bool sleep_ok)
sys/dev/cxgbe/common/t4_hw.c
7820
u32 val[A_TP_MIB_TCP_RXT_SEG_LO - A_TP_MIB_TCP_OUT_RST + 1];
sys/dev/cxgbe/common/t4_hw.c
7971
u32 val[2];
sys/dev/cxgbe/common/t4_hw.c
7996
u32 val[4];
sys/dev/cxgbe/common/t4_hw.c
80
static inline int t4_wait_op_done(struct adapter *adapter, int reg, u32 mask,
sys/dev/cxgbe/common/t4_hw.c
8030
u32 v;
sys/dev/cxgbe/common/t4_hw.c
8304
u32 v;
sys/dev/cxgbe/common/t4_hw.c
8338
u32 match_ctl_a, match_ctl_b;
sys/dev/cxgbe/common/t4_hw.c
8339
u32 data_reg, mask_reg, cfg;
sys/dev/cxgbe/common/t4_hw.c
8340
u32 en = is_t4(adap) ? F_TFEN : F_T5_TFEN;
sys/dev/cxgbe/common/t4_hw.c
8423
u32 ctla, ctlb;
sys/dev/cxgbe/common/t4_hw.c
8425
u32 data_reg, mask_reg;
sys/dev/cxgbe/common/t4_hw.c
8470
u32 mps_trc_rss_control;
sys/dev/cxgbe/common/t4_hw.c
8498
void t4_pmtx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[])
sys/dev/cxgbe/common/t4_hw.c
8501
u32 data[2];
sys/dev/cxgbe/common/t4_hw.c
8527
void t4_pmrx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[])
sys/dev/cxgbe/common/t4_hw.c
8530
u32 data[2];
sys/dev/cxgbe/common/t4_hw.c
8553
void t4_pmrx_cache_get_stats(struct adapter *adap, u32 stats[])
sys/dev/cxgbe/common/t4_hw.c
8576
u32 n;
sys/dev/cxgbe/common/t4_hw.c
8595
const u32 n = adap->params.nports;
sys/dev/cxgbe/common/t4_hw.c
8596
const u32 all_chan = (1 << adap->chip_params->nchan) - 1;
sys/dev/cxgbe/common/t4_hw.c
8709
u32 bgmap, stat_ctl;
sys/dev/cxgbe/common/t4_hw.c
8844
u32 bg = adap2pinfo(adap, idx)->mps_bg_map;
sys/dev/cxgbe/common/t4_hw.c
8871
u32 mag_id_reg_l, mag_id_reg_h, port_cfg_reg;
sys/dev/cxgbe/common/t4_hw.c
8917
u32 port_cfg_reg;
sys/dev/cxgbe/common/t4_hw.c
8994
u32 addr, u32 val)
sys/dev/cxgbe/common/t4_hw.c
8996
u32 ldst_addrspace;
sys/dev/cxgbe/common/t4_hw.c
9027
u32 ldst_addrspace;
sys/dev/cxgbe/common/t4_hw.c
9060
u32 ldst_addrspace;
sys/dev/cxgbe/common/t4_hw.c
9190
static const u32 sge_regs[] = {
sys/dev/cxgbe/common/t4_hw.c
9246
u32 ldst_addrspace;
sys/dev/cxgbe/common/t4_hw.c
9279
u32 v;
sys/dev/cxgbe/common/t4_hw.c
9343
u32 pcie_fw;
sys/dev/cxgbe/common/t4_hw.c
9585
unsigned int vf, unsigned int nparams, const u32 *params,
sys/dev/cxgbe/common/t4_hw.c
9586
u32 *val, int rw)
sys/dev/cxgbe/common/t4_hw.c
9626
unsigned int vf, unsigned int nparams, const u32 *params,
sys/dev/cxgbe/common/t4_hw.c
9627
u32 *val)
sys/dev/cxgbe/common/t4_hw.c
9648
unsigned int nparams, const u32 *params,
sys/dev/cxgbe/common/t4_hw.c
9649
const u32 *val, int timeout)
sys/dev/cxgbe/common/t4_hw.c
9686
unsigned int vf, unsigned int nparams, const u32 *params,
sys/dev/cxgbe/common/t4_hw.c
9687
const u32 *val)
sys/dev/cxgbe/common/t4_hw.c
9936
u32 val;
sys/dev/cxgbe/common/t4_hw.c
9983
u32 val;
sys/dev/cxgbe/common/t4vf_hw.c
263
u32 word = be32_to_cpu(
sys/dev/cxgbe/common/t4vf_hw.c
314
u32 word;
sys/dev/cxgbe/common/t4vf_hw.c
47
const u32 whoami = VF_PL_REG(A_PL_VF_WHOAMI);
sys/dev/cxgbe/common/t4vf_hw.c
48
const u32 notready1 = 0xffffffff;
sys/dev/cxgbe/common/t4vf_hw.c
49
const u32 notready2 = 0xeeeeeeee;
sys/dev/cxgbe/common/t4vf_hw.c
50
u32 val;
sys/dev/cxgbe/common/t4vf_hw.c
94
u32 params[7], vals[7];
sys/dev/cxgbe/common/t4vf_hw.c
95
u32 whoami;
sys/dev/cxgbe/crypto/t4_keyctx.c
313
uint32_t *u32;
sys/dev/cxgbe/crypto/t4_keyctx.c
317
u32 = (uint32_t *)dst;
sys/dev/cxgbe/crypto/t4_keyctx.c
323
u32[i] = htobe32(auth_ctx->sha1ctx.h.b32[i]);
sys/dev/cxgbe/crypto/t4_keyctx.c
328
u32[i] = htobe32(auth_ctx->sha224ctx.state[i]);
sys/dev/cxgbe/crypto/t4_keyctx.c
333
u32[i] = htobe32(auth_ctx->sha256ctx.state[i]);
sys/dev/cxgbe/cudbg/cudbg.h
224
struct el {char *name; char *file_name; int bit; u32 flag; };
sys/dev/cxgbe/cudbg/cudbg.h
319
u32 signature;
sys/dev/cxgbe/cudbg/cudbg.h
326
u32 hdr_len;
sys/dev/cxgbe/cudbg/cudbg.h
327
u32 data_len;
sys/dev/cxgbe/cudbg/cudbg.h
328
u32 hdr_flags;
sys/dev/cxgbe/cudbg/cudbg.h
329
u32 sec_seq_no;
sys/dev/cxgbe/cudbg/cudbg.h
330
u32 reserved[22];
sys/dev/cxgbe/cudbg/cudbg.h
338
u32 memtype; /* which memory (EDC0, EDC1, MC) */
sys/dev/cxgbe/cudbg/cudbg.h
339
u32 start; /* start of log in firmware memory */
sys/dev/cxgbe/cudbg/cudbg.h
340
u32 size; /* size of log */
sys/dev/cxgbe/cudbg/cudbg.h
375
u32 verbose:1; /* Turn on verbose print */
sys/dev/cxgbe/cudbg/cudbg.h
376
u32 use_flash:1; /* Use flash to collect or view
sys/dev/cxgbe/cudbg/cudbg.h
378
u32 full_mode:1; /* If set, cudbg will pull in
sys/dev/cxgbe/cudbg/cudbg.h
380
u32 no_compress:1; /* Dont compress will storing
sys/dev/cxgbe/cudbg/cudbg.h
382
u32 info:1; /* Show just the info, Dont
sys/dev/cxgbe/cudbg/cudbg.h
384
u32 reserved:27;
sys/dev/cxgbe/cudbg/cudbg.h
441
int cudbg_collect(void *handle, void *outbuf, u32 *outbuf_size);
sys/dev/cxgbe/cudbg/cudbg.h
470
int cudbg_read_flash_data(void *handle, void *data_buf, u32 data_buf_size);
sys/dev/cxgbe/cudbg/cudbg_common.c
34
int get_scratch_buff(struct cudbg_buffer *pdbg_buff, u32 size,
sys/dev/cxgbe/cudbg/cudbg_common.c
37
u32 scratch_offset;
sys/dev/cxgbe/cudbg/cudbg_entity.h
108
u32 pbt_dynamic[CUDBG_PBT_DYNAMIC_ENTRIES];
sys/dev/cxgbe/cudbg/cudbg_entity.h
109
u32 pbt_static[CUDBG_PBT_STATIC_ENTRIES];
sys/dev/cxgbe/cudbg/cudbg_entity.h
110
u32 lrf_table[CUDBG_LRF_ENTRIES];
sys/dev/cxgbe/cudbg/cudbg_entity.h
111
u32 pbt_data[CUDBG_PBT_DATA_ENTRIES];
sys/dev/cxgbe/cudbg/cudbg_entity.h
124
u32 rss_pf_map;
sys/dev/cxgbe/cudbg/cudbg_entity.h
125
u32 rss_pf_mask;
sys/dev/cxgbe/cudbg/cudbg_entity.h
126
u32 rss_pf_config;
sys/dev/cxgbe/cudbg/cudbg_entity.h
136
u32 filter_start;
sys/dev/cxgbe/cudbg/cudbg_entity.h
137
u32 server_start;
sys/dev/cxgbe/cudbg/cudbg_entity.h
138
u32 clip_start;
sys/dev/cxgbe/cudbg/cudbg_entity.h
139
u32 routing_start;
sys/dev/cxgbe/cudbg/cudbg_entity.h
140
u32 tid_hash_base;
sys/dev/cxgbe/cudbg/cudbg_entity.h
141
u32 max_tid;
sys/dev/cxgbe/cudbg/cudbg_entity.h
147
u32 hi[MBOX_LEN / 8];
sys/dev/cxgbe/cudbg/cudbg_entity.h
148
u32 lo[MBOX_LEN / 8];
sys/dev/cxgbe/cudbg/cudbg_entity.h
153
u32 tid;
sys/dev/cxgbe/cudbg/cudbg_entity.h
154
u32 dbig_cmd;
sys/dev/cxgbe/cudbg/cudbg_entity.h
155
u32 dbig_conf;
sys/dev/cxgbe/cudbg/cudbg_entity.h
156
u32 dbig_rsp_stat;
sys/dev/cxgbe/cudbg/cudbg_entity.h
157
u32 data[CUDBG_NUM_REQ_REGS];
sys/dev/cxgbe/cudbg/cudbg_entity.h
162
u32 start_bit;
sys/dev/cxgbe/cudbg/cudbg_entity.h
163
u32 end_bit;
sys/dev/cxgbe/cudbg/cudbg_entity.h
164
u32 shift;
sys/dev/cxgbe/cudbg/cudbg_entity.h
165
u32 islog2;
sys/dev/cxgbe/cudbg/cudbg_entity.h
170
u32 rplc[8];
sys/dev/cxgbe/cudbg/cudbg_entity.h
171
u32 idx;
sys/dev/cxgbe/cudbg/cudbg_entity.h
172
u32 cls_lo;
sys/dev/cxgbe/cudbg/cudbg_entity.h
173
u32 cls_hi;
sys/dev/cxgbe/cudbg/cudbg_entity.h
174
u32 rplc_size;
sys/dev/cxgbe/cudbg/cudbg_entity.h
175
u32 vniy;
sys/dev/cxgbe/cudbg/cudbg_entity.h
176
u32 vnix;
sys/dev/cxgbe/cudbg/cudbg_entity.h
177
u32 dip_hit;
sys/dev/cxgbe/cudbg/cudbg_entity.h
178
u32 vlan_vld;
sys/dev/cxgbe/cudbg/cudbg_entity.h
179
u32 repli;
sys/dev/cxgbe/cudbg/cudbg_entity.h
188
u32 rss_vf_vfl;
sys/dev/cxgbe/cudbg/cudbg_entity.h
189
u32 rss_vf_vfh;
sys/dev/cxgbe/cudbg/cudbg_entity.h
193
u32 tp_rssconf; /* A_TP_RSS_CONFIG */
sys/dev/cxgbe/cudbg/cudbg_entity.h
194
u32 tp_rssconf_tnl; /* A_TP_RSS_CONFIG_TNL */
sys/dev/cxgbe/cudbg/cudbg_entity.h
195
u32 tp_rssconf_ofd; /* A_TP_RSS_CONFIG_OFD */
sys/dev/cxgbe/cudbg/cudbg_entity.h
196
u32 tp_rssconf_syn; /* A_TP_RSS_CONFIG_SYN */
sys/dev/cxgbe/cudbg/cudbg_entity.h
197
u32 tp_rssconf_vrt; /* A_TP_RSS_CONFIG_VRT */
sys/dev/cxgbe/cudbg/cudbg_entity.h
198
u32 tp_rssconf_cng; /* A_TP_RSS_CONFIG_CNG */
sys/dev/cxgbe/cudbg/cudbg_entity.h
199
u32 chip;
sys/dev/cxgbe/cudbg/cudbg_entity.h
203
u32 tx_cnt[T6_PM_NSTATS];
sys/dev/cxgbe/cudbg/cudbg_entity.h
204
u32 rx_cnt[T6_PM_NSTATS];
sys/dev/cxgbe/cudbg/cudbg_entity.h
210
u32 kbps[NTX_SCHED];
sys/dev/cxgbe/cudbg/cudbg_entity.h
211
u32 ipg[NTX_SCHED];
sys/dev/cxgbe/cudbg/cudbg_entity.h
212
u32 pace_tab[NTX_SCHED];
sys/dev/cxgbe/cudbg/cudbg_entity.h
213
u32 mode;
sys/dev/cxgbe/cudbg/cudbg_entity.h
214
u32 map;
sys/dev/cxgbe/cudbg/cudbg_entity.h
223
u32 nchan;
sys/dev/cxgbe/cudbg/cudbg_entity.h
228
u32 nchan;
sys/dev/cxgbe/cudbg/cudbg_entity.h
232
u32 port_count;
sys/dev/cxgbe/cudbg/cudbg_entity.h
238
u32 port_count;
sys/dev/cxgbe/cudbg/cudbg_entity.h
239
u32 reserved;
sys/dev/cxgbe/cudbg/cudbg_entity.h
245
u32 nchan;
sys/dev/cxgbe/cudbg/cudbg_entity.h
249
u32 wr_cl_success;
sys/dev/cxgbe/cudbg/cudbg_entity.h
250
u32 wr_cl_fail;
sys/dev/cxgbe/cudbg/cudbg_entity.h
254
u32 rdptr[CUDBG_NUM_ULPTX];
sys/dev/cxgbe/cudbg/cudbg_entity.h
255
u32 wrptr[CUDBG_NUM_ULPTX];
sys/dev/cxgbe/cudbg/cudbg_entity.h
256
u32 rddata[CUDBG_NUM_ULPTX];
sys/dev/cxgbe/cudbg/cudbg_entity.h
257
u32 rd_data[CUDBG_NUM_ULPTX][CUDBG_NUM_ULPTX_READ];
sys/dev/cxgbe/cudbg/cudbg_entity.h
261
u32 data[ULPRX_LA_SIZE * 8];
sys/dev/cxgbe/cudbg/cudbg_entity.h
262
u32 size;
sys/dev/cxgbe/cudbg/cudbg_entity.h
270
u32 obq_wr[2 * CIM_NUM_OBQ_T5];
sys/dev/cxgbe/cudbg/cudbg_entity.h
271
u32 stat[4 * (CIM_NUM_IBQ + CIM_NUM_OBQ_T5)];
sys/dev/cxgbe/cudbg/cudbg_entity.h
318
u32 start; /* Start wrt 0 */
sys/dev/cxgbe/cudbg/cudbg_entity.h
319
u32 end; /* End wrt 0 */
sys/dev/cxgbe/cudbg/cudbg_entity.h
323
u32 id;
sys/dev/cxgbe/cudbg/cudbg_entity.h
324
u32 used;
sys/dev/cxgbe/cudbg/cudbg_entity.h
325
u32 alloc;
sys/dev/cxgbe/cudbg/cudbg_entity.h
329
u32 id;
sys/dev/cxgbe/cudbg/cudbg_entity.h
330
u32 used;
sys/dev/cxgbe/cudbg/cudbg_entity.h
331
u32 alloc;
sys/dev/cxgbe/cudbg/cudbg_entity.h
335
u32 base;
sys/dev/cxgbe/cudbg/cudbg_entity.h
336
u32 limit;
sys/dev/cxgbe/cudbg/cudbg_entity.h
337
u32 idx;
sys/dev/cxgbe/cudbg/cudbg_entity.h
348
u32 avail_c;
sys/dev/cxgbe/cudbg/cudbg_entity.h
349
u32 mem_c;
sys/dev/cxgbe/cudbg/cudbg_entity.h
350
u32 up_ram_lo;
sys/dev/cxgbe/cudbg/cudbg_entity.h
351
u32 up_ram_hi;
sys/dev/cxgbe/cudbg/cudbg_entity.h
352
u32 up_extmem2_lo;
sys/dev/cxgbe/cudbg/cudbg_entity.h
353
u32 up_extmem2_hi;
sys/dev/cxgbe/cudbg/cudbg_entity.h
354
u32 rx_pages_data[3];
sys/dev/cxgbe/cudbg/cudbg_entity.h
355
u32 tx_pages_data[4];
sys/dev/cxgbe/cudbg/cudbg_entity.h
356
u32 p_structs;
sys/dev/cxgbe/cudbg/cudbg_entity.h
358
u32 port_used[4];
sys/dev/cxgbe/cudbg/cudbg_entity.h
359
u32 port_alloc[4];
sys/dev/cxgbe/cudbg/cudbg_entity.h
360
u32 loopback_used[NCHAN];
sys/dev/cxgbe/cudbg/cudbg_entity.h
361
u32 loopback_alloc[NCHAN];
sys/dev/cxgbe/cudbg/cudbg_entity.h
382
u32 dack_timer;
sys/dev/cxgbe/cudbg/cudbg_entity.h
383
u32 res;
sys/dev/cxgbe/cudbg/cudbg_entity.h
384
u32 cclk_ps;
sys/dev/cxgbe/cudbg/cudbg_entity.h
385
u32 tre;
sys/dev/cxgbe/cudbg/cudbg_entity.h
386
u32 dack_re;
sys/dev/cxgbe/cudbg/cudbg_entity.h
399
u32 size;
sys/dev/cxgbe/cudbg/cudbg_entity.h
400
u32 mode;
sys/dev/cxgbe/cudbg/cudbg_entity.h
406
u32 start;
sys/dev/cxgbe/cudbg/cudbg_entity.h
407
u32 width;
sys/dev/cxgbe/cudbg/cudbg_entity.h
412
u32 addr;
sys/dev/cxgbe/cudbg/cudbg_entity.h
413
u32 value;
sys/dev/cxgbe/cudbg/cudbg_entity.h
417
u32 sop;
sys/dev/cxgbe/cudbg/cudbg_entity.h
418
u32 eop;
sys/dev/cxgbe/cudbg/cudbg_entity.h
422
u32 sop[2];
sys/dev/cxgbe/cudbg/cudbg_entity.h
423
u32 eop[2];
sys/dev/cxgbe/cudbg/cudbg_entity.h
427
u32 sop[4];
sys/dev/cxgbe/cudbg/cudbg_entity.h
428
u32 eop[4];
sys/dev/cxgbe/cudbg/cudbg_entity.h
432
u32 sop[4];
sys/dev/cxgbe/cudbg/cudbg_entity.h
433
u32 eop[4];
sys/dev/cxgbe/cudbg/cudbg_entity.h
434
u32 drops;
sys/dev/cxgbe/cudbg/cudbg_entity.h
546
u32 sop[8]; /* => undef,*/
sys/dev/cxgbe/cudbg/cudbg_entity.h
547
u32 eop[8]; /* => undef,*/
sys/dev/cxgbe/cudbg/cudbg_entity.h
548
u32 drop; /* => undef,*/
sys/dev/cxgbe/cudbg/cudbg_entity.h
549
u32 cls_drop; /* => undef,*/
sys/dev/cxgbe/cudbg/cudbg_entity.h
550
u32 err; /* => undef,*/
sys/dev/cxgbe/cudbg/cudbg_entity.h
551
u32 bp; /* => undef,*/
sys/dev/cxgbe/cudbg/cudbg_entity.h
684
u32 ireg_addr;
sys/dev/cxgbe/cudbg/cudbg_entity.h
685
u32 ireg_data;
sys/dev/cxgbe/cudbg/cudbg_entity.h
686
u32 ireg_local_offset;
sys/dev/cxgbe/cudbg/cudbg_entity.h
687
u32 ireg_offset_range;
sys/dev/cxgbe/cudbg/cudbg_entity.h
692
u32 outbuf[32];
sys/dev/cxgbe/cudbg/cudbg_entity.h
698
u32 nchan;
sys/dev/cxgbe/cudbg/cudbg_entity.h
702
u32 ntids;
sys/dev/cxgbe/cudbg/cudbg_entity.h
703
u32 nstids;
sys/dev/cxgbe/cudbg/cudbg_entity.h
704
u32 stid_base;
sys/dev/cxgbe/cudbg/cudbg_entity.h
705
u32 hash_base;
sys/dev/cxgbe/cudbg/cudbg_entity.h
707
u32 natids;
sys/dev/cxgbe/cudbg/cudbg_entity.h
708
u32 nftids;
sys/dev/cxgbe/cudbg/cudbg_entity.h
709
u32 ftid_base;
sys/dev/cxgbe/cudbg/cudbg_entity.h
710
u32 aftid_base;
sys/dev/cxgbe/cudbg/cudbg_entity.h
711
u32 aftid_end;
sys/dev/cxgbe/cudbg/cudbg_entity.h
714
u32 sftid_base;
sys/dev/cxgbe/cudbg/cudbg_entity.h
715
u32 nsftids;
sys/dev/cxgbe/cudbg/cudbg_entity.h
718
u32 uotid_base;
sys/dev/cxgbe/cudbg/cudbg_entity.h
719
u32 nuotids;
sys/dev/cxgbe/cudbg/cudbg_entity.h
721
u32 sb;
sys/dev/cxgbe/cudbg/cudbg_entity.h
722
u32 flags;
sys/dev/cxgbe/cudbg/cudbg_entity.h
723
u32 le_db_conf;
sys/dev/cxgbe/cudbg/cudbg_entity.h
724
u32 IP_users;
sys/dev/cxgbe/cudbg/cudbg_entity.h
725
u32 IPv6_users;
sys/dev/cxgbe/cudbg/cudbg_entity.h
727
u32 hpftid_base;
sys/dev/cxgbe/cudbg/cudbg_entity.h
728
u32 nhpftids;
sys/dev/cxgbe/cudbg/cudbg_entity.h
734
u32 tid_start;
sys/dev/cxgbe/cudbg/cudbg_entity.h
735
u32 reserved[16];
sys/dev/cxgbe/cudbg/cudbg_entity.h
747
u32 scfg_vers;
sys/dev/cxgbe/cudbg/cudbg_entity.h
748
u32 vpd_vers;
sys/dev/cxgbe/cudbg/cudbg_entity.h
752
u32 fw_state;
sys/dev/cxgbe/cudbg/cudbg_entity.h
756
u32 reserved1[16];
sys/dev/cxgbe/cudbg/cudbg_entity.h
759
static u32 ATTRIBUTE_UNUSED t6_tp_pio_array[][4] = {
sys/dev/cxgbe/cudbg/cudbg_entity.h
774
static u32 ATTRIBUTE_UNUSED t5_tp_pio_array[][4] = {
sys/dev/cxgbe/cudbg/cudbg_entity.h
788
static u32 ATTRIBUTE_UNUSED t6_ma_ireg_array[][4] = {
sys/dev/cxgbe/cudbg/cudbg_entity.h
794
static u32 ATTRIBUTE_UNUSED t6_ma_ireg_array2[][4] = {
sys/dev/cxgbe/cudbg/cudbg_entity.h
799
static u32 ATTRIBUTE_UNUSED t6_hma_ireg_array[][4] = {
sys/dev/cxgbe/cudbg/cudbg_entity.h
802
static u32 ATTRIBUTE_UNUSED t5_pcie_pdbg_array[][4] = {
sys/dev/cxgbe/cudbg/cudbg_entity.h
808
static u32 ATTRIBUTE_UNUSED t5_pcie_config_array[][2] = {
sys/dev/cxgbe/cudbg/cudbg_entity.h
825
static u32 ATTRIBUTE_UNUSED t5_pcie_cdbg_array[][4] = {
sys/dev/cxgbe/cudbg/cudbg_entity.h
830
static u32 ATTRIBUTE_UNUSED t6_tp_tm_pio_array[1][4] = {
sys/dev/cxgbe/cudbg/cudbg_entity.h
834
static u32 ATTRIBUTE_UNUSED t5_tp_tm_pio_array[1][4] = {
sys/dev/cxgbe/cudbg/cudbg_entity.h
838
static u32 ATTRIBUTE_UNUSED t5_pm_rx_array[][4] = {
sys/dev/cxgbe/cudbg/cudbg_entity.h
843
static u32 ATTRIBUTE_UNUSED t5_pm_tx_array[][4] = {
sys/dev/cxgbe/cudbg/cudbg_entity.h
848
static u32 ATTRIBUTE_UNUSED t6_tp_mib_index_array[6][4] = {
sys/dev/cxgbe/cudbg/cudbg_entity.h
857
static u32 ATTRIBUTE_UNUSED t5_tp_mib_index_array[9][4] = {
sys/dev/cxgbe/cudbg/cudbg_entity.h
869
static u32 ATTRIBUTE_UNUSED t5_sge_dbg_index_array[9][4] = {
sys/dev/cxgbe/cudbg/cudbg_entity.h
874
static u32 ATTRIBUTE_UNUSED t6_up_cim_reg_array[][4] = {
sys/dev/cxgbe/cudbg/cudbg_entity.h
891
static u32 ATTRIBUTE_UNUSED t5_up_cim_reg_array[][4] = {
sys/dev/cxgbe/cudbg/cudbg_flash_utils.c
143
u32 start_offset, u32 cur_entity_hdr_offset,
sys/dev/cxgbe/cudbg/cudbg_flash_utils.c
144
u32 cur_entity_size,
sys/dev/cxgbe/cudbg/cudbg_flash_utils.c
145
u32 ext_size)
sys/dev/cxgbe/cudbg/cudbg_flash_utils.c
153
u32 data_hdr_size;
sys/dev/cxgbe/cudbg/cudbg_flash_utils.c
154
u32 total_hdr_size;
sys/dev/cxgbe/cudbg/cudbg_flash_utils.c
155
u32 tmp_size;
sys/dev/cxgbe/cudbg/cudbg_flash_utils.c
156
u32 sec_data_offset;
sys/dev/cxgbe/cudbg/cudbg_flash_utils.c
157
u32 sec_hdr_start_addr;
sys/dev/cxgbe/cudbg/cudbg_flash_utils.c
158
u32 sec_data_size;
sys/dev/cxgbe/cudbg/cudbg_flash_utils.c
159
u32 space_left;
sys/dev/cxgbe/cudbg/cudbg_flash_utils.c
241
int write_flash(struct adapter *adap, u32 start_sec, void *data, u32 size)
sys/dev/cxgbe/cudbg/cudbg_flash_utils.c
289
int cudbg_read_flash_data(void *handle, void *buf, u32 buf_size)
sys/dev/cxgbe/cudbg/cudbg_flash_utils.c
292
u32 total_hdr_size, data_header_size;
sys/dev/cxgbe/cudbg/cudbg_flash_utils.c
294
u32 payload_size = 0;
sys/dev/cxgbe/cudbg/cudbg_flash_utils.c
316
int cudbg_read_flash(void *handle, void *data, u32 size, int data_flag)
sys/dev/cxgbe/cudbg/cudbg_flash_utils.c
323
u32 total_hdr_size;
sys/dev/cxgbe/cudbg/cudbg_flash_utils.c
324
u32 data_hdr_size;
sys/dev/cxgbe/cudbg/cudbg_flash_utils.c
325
u32 sec_hdr_start_addr;
sys/dev/cxgbe/cudbg/cudbg_flash_utils.c
326
u32 tmp_size;
sys/dev/cxgbe/cudbg/cudbg_flash_utils.c
327
u32 data_offset = 0;
sys/dev/cxgbe/cudbg/cudbg_flash_utils.c
328
u32 i, j;
sys/dev/cxgbe/cudbg/cudbg_flash_utils.c
35
int write_flash(struct adapter *adap, u32 start_sec, void *data, u32 size);
sys/dev/cxgbe/cudbg/cudbg_flash_utils.c
36
int read_flash(struct adapter *adap, u32 start_sec , void *data, u32 size,
sys/dev/cxgbe/cudbg/cudbg_flash_utils.c
37
u32 start_address);
sys/dev/cxgbe/cudbg/cudbg_flash_utils.c
40
update_skip_size(struct cudbg_flash_sec_info *sec_info, u32 size)
sys/dev/cxgbe/cudbg/cudbg_flash_utils.c
457
int read_flash(struct adapter *adap, u32 start_sec , void *data, u32 size,
sys/dev/cxgbe/cudbg/cudbg_flash_utils.c
458
u32 start_address)
sys/dev/cxgbe/cudbg/cudbg_flash_utils.c
462
u32 *ptr = (u32 *)data;
sys/dev/cxgbe/cudbg/cudbg_flash_utils.c
81
u64 timestamp, u32 cur_entity_hdr_offset,
sys/dev/cxgbe/cudbg/cudbg_flash_utils.c
82
u32 start_offset, u32 ext_size)
sys/dev/cxgbe/cudbg/cudbg_flash_utils.c
90
u32 hdr_offset;
sys/dev/cxgbe/cudbg/cudbg_flash_utils.c
91
u32 data_hdr_size;
sys/dev/cxgbe/cudbg/cudbg_flash_utils.c
92
u32 total_hdr_size;
sys/dev/cxgbe/cudbg/cudbg_flash_utils.c
93
u32 sec_hdr_start_addr;
sys/dev/cxgbe/cudbg/cudbg_lib.c
1098
u32 size;
sys/dev/cxgbe/cudbg/cudbg_lib.c
1131
u32 i, n, size;
sys/dev/cxgbe/cudbg/cudbg_lib.c
1174
u32 size;
sys/dev/cxgbe/cudbg/cudbg_lib.c
1274
u32 i, n, size;
sys/dev/cxgbe/cudbg/cudbg_lib.c
1318
u32 size;
sys/dev/cxgbe/cudbg/cudbg_lib.c
1322
2 * CIM_PIFLA_SIZE * 6 * sizeof(u32);
sys/dev/cxgbe/cudbg/cudbg_lib.c
1331
t4_cim_read_pif_la(padap, (u32 *)cim_pif_la_buff->data,
sys/dev/cxgbe/cudbg/cudbg_lib.c
1332
(u32 *)cim_pif_la_buff->data + 6 * CIM_PIFLA_SIZE,
sys/dev/cxgbe/cudbg/cudbg_lib.c
1353
u32 size;
sys/dev/cxgbe/cudbg/cudbg_lib.c
1385
u32 size;
sys/dev/cxgbe/cudbg/cudbg_lib.c
1423
u32 size;
sys/dev/cxgbe/cudbg/cudbg_lib.c
145
u32 cur_entity_data_offset,
sys/dev/cxgbe/cudbg/cudbg_lib.c
1457
u32 size;
sys/dev/cxgbe/cudbg/cudbg_lib.c
146
u32 cur_entity_size,
sys/dev/cxgbe/cudbg/cudbg_lib.c
147
int entity_nu, u32 ext_size)
sys/dev/cxgbe/cudbg/cudbg_lib.c
1490
u32 size;
sys/dev/cxgbe/cudbg/cudbg_lib.c
153
u32 cur_entity_hdr_offset = sizeof(struct cudbg_hdr);
sys/dev/cxgbe/cudbg/cudbg_lib.c
1532
u32 size;
sys/dev/cxgbe/cudbg/cudbg_lib.c
154
u32 remain_flash_size;
sys/dev/cxgbe/cudbg/cudbg_lib.c
155
u32 flash_data_offset;
sys/dev/cxgbe/cudbg/cudbg_lib.c
156
u32 data_hdr_size;
sys/dev/cxgbe/cudbg/cudbg_lib.c
1563
u32 size;
sys/dev/cxgbe/cudbg/cudbg_lib.c
1591
u32 size;
sys/dev/cxgbe/cudbg/cudbg_lib.c
1595
size = 10 * sizeof(u32);
sys/dev/cxgbe/cudbg/cudbg_lib.c
1600
t4_read_rss_key(padap, (u32 *)scratch_buff.data, 1);
sys/dev/cxgbe/cudbg/cudbg_lib.c
1621
u32 size;
sys/dev/cxgbe/cudbg/cudbg_lib.c
1659
u32 size;
sys/dev/cxgbe/cudbg/cudbg_lib.c
1694
u32 rss_pf_map, rss_pf_mask, size;
sys/dev/cxgbe/cudbg/cudbg_lib.c
1726
static int check_valid(u32 *buf, int type)
sys/dev/cxgbe/cudbg/cudbg_lib.c
1766
u32 *max_ctx_qid, u8 nelem)
sys/dev/cxgbe/cudbg/cudbg_lib.c
1768
u32 i, idx, found = 0;
sys/dev/cxgbe/cudbg/cudbg_lib.c
1793
u32 value, edram_ptr_count;
sys/dev/cxgbe/cudbg/cudbg_lib.c
1837
max_ctx_qid[CTXT_EGRESS] = min_t(u32, max_ctx_qid[CTXT_EGRESS],
sys/dev/cxgbe/cudbg/cudbg_lib.c
1839
max_ctx_qid[CTXT_INGRESS] = min_t(u32, max_ctx_qid[CTXT_INGRESS],
sys/dev/cxgbe/cudbg/cudbg_lib.c
1841
max_ctx_qid[CTXT_FLM] = min_t(u32, max_ctx_qid[CTXT_FLM],
sys/dev/cxgbe/cudbg/cudbg_lib.c
1843
max_ctx_qid[CTXT_CNM] = min_t(u32, max_ctx_qid[CTXT_CNM],
sys/dev/cxgbe/cudbg/cudbg_lib.c
1855
u32 size = 0, next_offset = 0, total_size = 0;
sys/dev/cxgbe/cudbg/cudbg_lib.c
1860
u32 i, j;
sys/dev/cxgbe/cudbg/cudbg_lib.c
1861
u32 max_ctx_qid[CTXT_CNM + 1];
sys/dev/cxgbe/cudbg/cudbg_lib.c
1863
u32 qid_count = 0;
sys/dev/cxgbe/cudbg/cudbg_lib.c
1970
u32 offset;
sys/dev/cxgbe/cudbg/cudbg_lib.c
202
int cudbg_collect(void *handle, void *outbuf, u32 *outbuf_size)
sys/dev/cxgbe/cudbg/cudbg_lib.c
2128
u32 qsize;
sys/dev/cxgbe/cudbg/cudbg_lib.c
2133
qsize = 6 * CIM_OBQ_SIZE * 4 * sizeof(u32);
sys/dev/cxgbe/cudbg/cudbg_lib.c
2140
(u32 *)((u32 *)scratch_buff.data +
sys/dev/cxgbe/cudbg/cudbg_lib.c
215
u32 total_size, remaining_buf_size;
sys/dev/cxgbe/cudbg/cudbg_lib.c
216
u32 ext_size = 0;
sys/dev/cxgbe/cudbg/cudbg_lib.c
2242
u32 qsize;
sys/dev/cxgbe/cudbg/cudbg_lib.c
2247
qsize = CIM_IBQ_SIZE * 4 * sizeof(u32);
sys/dev/cxgbe/cudbg/cudbg_lib.c
2255
(u32 *)((u32 *)scratch_buff.data +
sys/dev/cxgbe/cudbg/cudbg_lib.c
2291
u32 rc = 0;
sys/dev/cxgbe/cudbg/cudbg_lib.c
2294
scratch_buff.size = 2 * CIM_MALA_SIZE * 5 * sizeof(u32);
sys/dev/cxgbe/cudbg/cudbg_lib.c
2301
(u32 *) ((char *)scratch_buff.data +
sys/dev/cxgbe/cudbg/cudbg_lib.c
2303
(u32 *) ((char *)scratch_buff.data +
sys/dev/cxgbe/cudbg/cudbg_lib.c
2326
u32 cfg = 0;
sys/dev/cxgbe/cudbg/cudbg_lib.c
2332
size *= 11 * sizeof(u32);
sys/dev/cxgbe/cudbg/cudbg_lib.c
2335
size *= 8 * sizeof(u32);
sys/dev/cxgbe/cudbg/cudbg_lib.c
2358
(u32 *) ((char *)scratch_buff.data +
sys/dev/cxgbe/cudbg/cudbg_lib.c
2388
u32 offset;
sys/dev/cxgbe/cudbg/cudbg_lib.c
2472
u32 i, idx, found = 0;
sys/dev/cxgbe/cudbg/cudbg_lib.c
2672
u32 value;
sys/dev/cxgbe/cudbg/cudbg_lib.c
2875
u32 buf_size = 0, bytes = 0;
sys/dev/cxgbe/cudbg/cudbg_lib.c
2921
u32 size;
sys/dev/cxgbe/cudbg/cudbg_lib.c
2947
u32 val;
sys/dev/cxgbe/cudbg/cudbg_lib.c
2948
u32 busy = 1;
sys/dev/cxgbe/cudbg/cudbg_lib.c
2965
static int cim_ha_rreg(struct adapter *padap, u32 addr, u32 *val)
sys/dev/cxgbe/cudbg/cudbg_lib.c
2985
struct ireg_field *up_cim_reg, u32 *buff)
sys/dev/cxgbe/cudbg/cudbg_lib.c
2987
u32 i;
sys/dev/cxgbe/cudbg/cudbg_lib.c
3015
u32 size;
sys/dev/cxgbe/cudbg/cudbg_lib.c
3018
n = sizeof(t5_up_cim_reg_array) / (4 * sizeof(u32));
sys/dev/cxgbe/cudbg/cudbg_lib.c
3030
u32 *buff = up_cim->outbuf;
sys/dev/cxgbe/cudbg/cudbg_lib.c
3075
u32 size;
sys/dev/cxgbe/cudbg/cudbg_lib.c
3113
mboxlog->hi[i] = (u32)(flit >> 32);
sys/dev/cxgbe/cudbg/cudbg_lib.c
3114
mboxlog->lo[i] = (u32)flit;
sys/dev/cxgbe/cudbg/cudbg_lib.c
3141
u32 size;
sys/dev/cxgbe/cudbg/cudbg_lib.c
3142
u32 addr;
sys/dev/cxgbe/cudbg/cudbg_lib.c
3223
u32 size;
sys/dev/cxgbe/cudbg/cudbg_lib.c
3226
n = sizeof(t5_pm_rx_array) / (4 * sizeof(u32));
sys/dev/cxgbe/cudbg/cudbg_lib.c
3239
u32 *buff = ch_pm->outbuf;
sys/dev/cxgbe/cudbg/cudbg_lib.c
3257
n = sizeof(t5_pm_tx_array) / (4 * sizeof(u32));
sys/dev/cxgbe/cudbg/cudbg_lib.c
3260
u32 *buff = ch_pm->outbuf;
sys/dev/cxgbe/cudbg/cudbg_lib.c
3299
u32 para[7], val[7];
sys/dev/cxgbe/cudbg/cudbg_lib.c
3300
u32 mbox, pf;
sys/dev/cxgbe/cudbg/cudbg_lib.c
3383
tid->natids = min_t(u32, tid->ntids / 2, MAX_ATIDS_A);
sys/dev/cxgbe/cudbg/cudbg_lib.c
3446
u32 size;
sys/dev/cxgbe/cudbg/cudbg_lib.c
3513
u32 size = 0, i, n, total_size = 0;
sys/dev/cxgbe/cudbg/cudbg_lib.c
3514
u32 ctl, data2;
sys/dev/cxgbe/cudbg/cudbg_lib.c
3679
u32 size, *value, j;
sys/dev/cxgbe/cudbg/cudbg_lib.c
3682
size = sizeof(u32) * NUM_PCIE_CONFIG_REGS;
sys/dev/cxgbe/cudbg/cudbg_lib.c
3683
n = sizeof(t5_pcie_config_array) / (2 * sizeof(u32));
sys/dev/cxgbe/cudbg/cudbg_lib.c
3690
value = (u32 *)scratch_buff.data;
sys/dev/cxgbe/cudbg/cudbg_lib.c
3710
static int cudbg_read_tid(struct cudbg_init *pdbg_init, u32 tid,
sys/dev/cxgbe/cudbg/cudbg_lib.c
3715
u32 val;
sys/dev/cxgbe/cudbg/cudbg_lib.c
3775
u32 value, bytes = 0, bytes_left = 0;
sys/dev/cxgbe/cudbg/cudbg_lib.c
3776
u32 i;
sys/dev/cxgbe/cudbg/cudbg_lib.c
3887
u32 size, j;
sys/dev/cxgbe/cudbg/cudbg_lib.c
3897
n = sizeof(t6_ma_ireg_array) / (4 * sizeof(u32));
sys/dev/cxgbe/cudbg/cudbg_lib.c
3909
u32 *buff = ma_indr->outbuf;
sys/dev/cxgbe/cudbg/cudbg_lib.c
3924
n = sizeof(t6_ma_ireg_array2) / (4 * sizeof(u32));
sys/dev/cxgbe/cudbg/cudbg_lib.c
3928
u32 *buff = ma_indr->outbuf;
sys/dev/cxgbe/cudbg/cudbg_lib.c
3963
u32 size;
sys/dev/cxgbe/cudbg/cudbg_lib.c
3973
n = sizeof(t6_hma_ireg_array) / (4 * sizeof(u32));
sys/dev/cxgbe/cudbg/cudbg_lib.c
3985
u32 *buff = hma_indr->outbuf;
sys/dev/cxgbe/cudbg/cudbg_lib.c
4019
u32 size;
sys/dev/cxgbe/cudbg/cudbg_lib.c
4022
n = sizeof(t5_pcie_pdbg_array) / (4 * sizeof(u32));
sys/dev/cxgbe/cudbg/cudbg_lib.c
4035
u32 *buff = ch_pcie->outbuf;
sys/dev/cxgbe/cudbg/cudbg_lib.c
4053
n = sizeof(t5_pcie_cdbg_array) / (4 * sizeof(u32));
sys/dev/cxgbe/cudbg/cudbg_lib.c
4056
u32 *buff = ch_pcie->outbuf;
sys/dev/cxgbe/cudbg/cudbg_lib.c
4093
u32 size;
sys/dev/cxgbe/cudbg/cudbg_lib.c
4097
n = sizeof(t5_tp_pio_array) / (4 * sizeof(u32));
sys/dev/cxgbe/cudbg/cudbg_lib.c
4099
n = sizeof(t6_tp_pio_array) / (4 * sizeof(u32));
sys/dev/cxgbe/cudbg/cudbg_lib.c
4113
u32 *buff = ch_tp_pio->outbuf;
sys/dev/cxgbe/cudbg/cudbg_lib.c
4135
n = sizeof(t5_tp_tm_pio_array) / (4 * sizeof(u32));
sys/dev/cxgbe/cudbg/cudbg_lib.c
4137
n = sizeof(t6_tp_tm_pio_array) / (4 * sizeof(u32));
sys/dev/cxgbe/cudbg/cudbg_lib.c
4141
u32 *buff = ch_tp_pio->outbuf;
sys/dev/cxgbe/cudbg/cudbg_lib.c
4163
n = sizeof(t5_tp_mib_index_array) / (4 * sizeof(u32));
sys/dev/cxgbe/cudbg/cudbg_lib.c
4165
n = sizeof(t6_tp_mib_index_array) / (4 * sizeof(u32));
sys/dev/cxgbe/cudbg/cudbg_lib.c
4169
u32 *buff = ch_tp_pio->outbuf;
sys/dev/cxgbe/cudbg/cudbg_lib.c
4212
u32 size;
sys/dev/cxgbe/cudbg/cudbg_lib.c
4226
u32 *buff = ch_sge_dbg->outbuf;
sys/dev/cxgbe/cudbg/cudbg_lib.c
4261
u32 reg_addr, reg_data, reg_local_offset, reg_offset_range;
sys/dev/cxgbe/cudbg/cudbg_lib.c
4262
u32 *sp;
sys/dev/cxgbe/cudbg/cudbg_lib.c
4281
scratch_buff.size = nreg * sizeof(u32);
sys/dev/cxgbe/cudbg/cudbg_lib.c
4287
sp = (u32 *)scratch_buff.data;
sys/dev/cxgbe/cudbg/cudbg_lib.c
4369
u32 fw_vers;
sys/dev/cxgbe/cudbg/cudbg_lib.c
4370
u32 size;
sys/dev/cxgbe/cudbg/cudbg_lib.c
554
int get_entity_hdr(void *outbuf, int i, u32 size,
sys/dev/cxgbe/cudbg/cudbg_lib.c
575
u32 size;
sys/dev/cxgbe/cudbg/cudbg_lib.c
611
u32 size;
sys/dev/cxgbe/cudbg/cudbg_lib.c
646
u32 size;
sys/dev/cxgbe/cudbg/cudbg_lib.c
680
u32 size, i, j;
sys/dev/cxgbe/cudbg/cudbg_lib.c
71
static void read_sge_ctxt(struct cudbg_init *pdbg_init, u32 cid,
sys/dev/cxgbe/cudbg/cudbg_lib.c
72
enum ctxt_type ctype, u32 *data)
sys/dev/cxgbe/cudbg/cudbg_lib.c
728
u32 size;
sys/dev/cxgbe/cudbg/cudbg_lib.c
738
t4_ulprx_read_la(padap, (u32 *)ulprx_la_buff->data);
sys/dev/cxgbe/cudbg/cudbg_lib.c
760
u32 size;
sys/dev/cxgbe/cudbg/cudbg_lib.c
795
u32 val1;
sys/dev/cxgbe/cudbg/cudbg_lib.c
796
u32 val2;
sys/dev/cxgbe/cudbg/cudbg_lib.c
797
u32 size;
sys/dev/cxgbe/cudbg/cudbg_lib.c
840
u32 size, lo, hi;
sys/dev/cxgbe/cudbg/cudbg_lib.c
841
u32 used, alloc;
sys/dev/cxgbe/cudbg/cudbg_lib.c
92
static int get_next_ext_entity_hdr(void *outbuf, u32 *ext_size,
sys/dev/cxgbe/cudbg/cudbg_lib.c
98
u32 ext_offset = cudbg_hdr->data_len;
sys/dev/cxgbe/cudbg/cudbg_lib.c
981
u32 sge_ctrl = t4_read_reg(padap, A_SGE_CONTROL2);
sys/dev/cxgbe/cudbg/cudbg_lib.c
982
u32 fifo_size = t4_read_reg(padap, A_SGE_DBVFIFO_SIZE);
sys/dev/cxgbe/cudbg/cudbg_lib.h
249
int get_entity_hdr(void *outbuf, int i, u32 size, struct cudbg_entity_hdr **);
sys/dev/cxgbe/cudbg/cudbg_lib_common.h
100
u32 offset;
sys/dev/cxgbe/cudbg/cudbg_lib_common.h
114
u32 max_seq_no;
sys/dev/cxgbe/cudbg/cudbg_lib_common.h
115
u32 max_seq_sec;
sys/dev/cxgbe/cudbg/cudbg_lib_common.h
116
u32 hdr_data_len; /* Total data */
sys/dev/cxgbe/cudbg/cudbg_lib_common.h
117
u32 skip_size; /* Total size of large entities. */
sys/dev/cxgbe/cudbg/cudbg_lib_common.h
149
void update_skip_size(struct cudbg_flash_sec_info *, u32);
sys/dev/cxgbe/cudbg/cudbg_lib_common.h
152
int get_scratch_buff(struct cudbg_buffer *, u32, struct cudbg_buffer *);
sys/dev/cxgbe/cudbg/cudbg_lib_common.h
162
int cudbg_read_flash(void *handle, void *data, u32 size, int data_flag);
sys/dev/cxgbe/cudbg/cudbg_lib_common.h
164
u32 start_offset, u32 start_hdr_offset,
sys/dev/cxgbe/cudbg/cudbg_lib_common.h
165
u32 cur_entity_size,
sys/dev/cxgbe/cudbg/cudbg_lib_common.h
166
u32 ext_size);
sys/dev/cxgbe/cudbg/cudbg_lib_common.h
66
u32 signature;
sys/dev/cxgbe/cudbg/cudbg_lib_common.h
67
u32 hdr_len;
sys/dev/cxgbe/cudbg/cudbg_lib_common.h
70
u32 data_len;
sys/dev/cxgbe/cudbg/cudbg_lib_common.h
71
u32 hdr_flags;
sys/dev/cxgbe/cudbg/cudbg_lib_common.h
75
u32 reserved[8];
sys/dev/cxgbe/cudbg/cudbg_lib_common.h
79
u32 entity_type;
sys/dev/cxgbe/cudbg/cudbg_lib_common.h
80
u32 start_offset;
sys/dev/cxgbe/cudbg/cudbg_lib_common.h
81
u32 size;
sys/dev/cxgbe/cudbg/cudbg_lib_common.h
83
u32 sys_warn;
sys/dev/cxgbe/cudbg/cudbg_lib_common.h
84
u32 sys_err;
sys/dev/cxgbe/cudbg/cudbg_lib_common.h
88
u32 next_ext_offset; /* pointer to next extended entity meta data */
sys/dev/cxgbe/cudbg/cudbg_lib_common.h
89
u32 reserved[5];
sys/dev/cxgbe/cudbg/cudbg_lib_common.h
93
u32 signature;
sys/dev/cxgbe/cudbg/cudbg_lib_common.h
99
u32 size;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
100
u32 debug_PC_Req_SOP1_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
101
u32 debug_PC_Req_EOP1_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
102
u32 debug_PC_Req_SOP0_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
1020
t4_tp_pio_read(padap, &value, 1, (u32)(A_TP_DBG_CSIDE_RX0 + i),
sys/dev/cxgbe/cudbg/cudbg_wtp.c
103
u32 debug_PC_Req_EOP0_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
1030
t4_tp_pio_read(padap, &value, 1, (u32)(A_TP_DBG_ESIDE_PKT0 + i),
sys/dev/cxgbe/cudbg/cudbg_wtp.c
106
u32 reserved7:32;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
109
u32 debug_PD_Req_SOP3_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
110
u32 debug_PD_Req_EOP3_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
1104
t4_tp_pio_read(padap, &value, 1, (u32)(A_TP_DBG_CSIDE_TX0 + i),
sys/dev/cxgbe/cudbg/cudbg_wtp.c
111
u32 debug_PD_Req_SOP2_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
112
u32 debug_PD_Req_EOP2_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
1129
t4_tp_pio_read(padap, &value, 1, (u32)(A_TP_DBG_ESIDE_PKT0 + i),
sys/dev/cxgbe/cudbg/cudbg_wtp.c
113
u32 debug_PD_Req_SOP1_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
114
u32 debug_PD_Req_EOP1_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
115
u32 debug_PD_Req_SOP0_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
116
u32 debug_PD_Req_EOP0_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
119
u32 reserved8:32;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
122
u32 debug_PD_Rsp_SOP3_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
123
u32 debug_PD_Rsp_EOP3_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
124
u32 debug_PD_Rsp_SOP2_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
125
u32 debug_PD_Rsp_EOP2_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
126
u32 debug_PD_Rsp_SOP1_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
127
u32 debug_PD_Rsp_EOP1_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
128
u32 debug_PD_Rsp_SOP0_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
129
u32 debug_PD_Rsp_EOP0_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
132
u32 reserved9:32;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
135
u32 debug_CPLSW_TP_Rx_SOP1_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
136
u32 debug_CPLSW_TP_Rx_EOP1_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
137
u32 debug_CPLSW_TP_Rx_SOP0_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
138
u32 debug_CPLSW_TP_Rx_EOP0_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
139
u32 debug_CPLSW_CIM_SOP1_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
140
u32 debug_CPLSW_CIM_EOP1_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
141
u32 debug_CPLSW_CIM_SOP0_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
142
u32 debug_CPLSW_CIM_EOP0_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
145
u32 reserved10:32;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
148
u32 debug_PD_Req_Rd3_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
149
u32 debug_PD_Req_Rd2_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
150
u32 debug_PD_Req_Rd1_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
151
u32 debug_PD_Req_Rd0_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
152
u32 debug_PD_Req_Int3_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
153
u32 debug_PD_Req_Int2_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
154
u32 debug_PD_Req_Int1_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
155
u32 debug_PD_Req_Int0_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
256
static u32 read_sge_debug_data(struct cudbg_init *pdbg_init, u32 *sge_dbg_reg)
sys/dev/cxgbe/cudbg/cudbg_wtp.c
259
u32 value;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
263
t4_write_reg(padap, A_SGE_DEBUG_INDEX, (u32)i);
sys/dev/cxgbe/cudbg/cudbg_wtp.c
274
static u32 read_tp_mib_data(struct cudbg_init *pdbg_init,
sys/dev/cxgbe/cudbg/cudbg_wtp.c
278
u32 i = 0;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
282
(u32)tp_mib[i].addr, true);
sys/dev/cxgbe/cudbg/cudbg_wtp.c
298
u32 Sge_Dbg[32] = {0};
sys/dev/cxgbe/cudbg/cudbg_wtp.c
299
u32 value = 0;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
300
u32 i = 0;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
301
u32 drop = 0;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
302
u32 err = 0;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
303
u32 offset;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
44
u32 reserved1:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
45
u32 reserved2:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
46
u32 debug_uP_SOP_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
47
u32 debug_uP_EOP_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
48
u32 debug_CIM_SOP1_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
49
u32 debug_CIM_EOP1_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
497
t4_tp_pio_read(padap, &value, 1, (u32)(A_TP_DBG_CSIDE_RX0 + i),
sys/dev/cxgbe/cudbg/cudbg_wtp.c
50
u32 debug_CIM_SOP0_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
51
u32 debug_CIM_EOP0_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
512
t4_tp_pio_read(padap, &value, 1, (u32)(A_TP_DBG_ESIDE_PKT0 + i),
sys/dev/cxgbe/cudbg/cudbg_wtp.c
54
u32 reserved3:32;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
57
u32 debug_T_Rx_SOP1_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
58
u32 debug_T_Rx_EOP1_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
59
u32 debug_T_Rx_SOP0_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
60
u32 debug_T_Rx_EOP0_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
61
u32 debug_U_Rx_SOP1_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
62
u32 debug_U_Rx_EOP1_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
63
u32 debug_U_Rx_SOP0_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
64
u32 debug_U_Rx_EOP0_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
67
u32 reserved4:32;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
70
u32 debug_UD_Rx_SOP3_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
71
u32 debug_UD_Rx_EOP3_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
72
u32 debug_UD_Rx_SOP2_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
73
u32 debug_UD_Rx_EOP2_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
74
u32 debug_UD_Rx_SOP1_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
75
u32 debug_UD_Rx_EOP1_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
76
u32 debug_UD_Rx_SOP0_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
77
u32 debug_UD_Rx_EOP0_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
777
t4_tp_pio_read(padap, &value, 1, (u32)(A_TP_DBG_CSIDE_RX0 + i),
sys/dev/cxgbe/cudbg/cudbg_wtp.c
80
u32 reserved5:32;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
83
u32 debug_U_Tx_SOP3_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
84
u32 debug_U_Tx_EOP3_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
85
u32 debug_U_Tx_SOP2_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
86
u32 debug_U_Tx_EOP2_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
860
t4_tp_pio_read(padap, &value, 1, (u32)(A_TP_DBG_CSIDE_TX0 + i),
sys/dev/cxgbe/cudbg/cudbg_wtp.c
87
u32 debug_U_Tx_SOP1_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
88
u32 debug_U_Tx_EOP1_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
884
t4_tp_pio_read(padap, &value, 1, (u32)(A_TP_DBG_ESIDE_PKT0 + i),
sys/dev/cxgbe/cudbg/cudbg_wtp.c
89
u32 debug_U_Tx_SOP0_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
90
u32 debug_U_Tx_EOP0_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
93
u32 reserved6:32;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
940
u32 Sge_Dbg[32] = {0};
sys/dev/cxgbe/cudbg/cudbg_wtp.c
941
u32 value = 0;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
942
u32 i = 0;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
943
u32 drop = 0;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
944
u32 err = 0;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
945
u32 offset;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
96
u32 debug_PC_Rsp_SOP1_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
97
u32 debug_PC_Rsp_EOP1_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
98
u32 debug_PC_Rsp_SOP0_cnt:4;
sys/dev/cxgbe/cudbg/cudbg_wtp.c
99
u32 debug_PC_Rsp_EOP0_cnt:4;
sys/dev/cxgbe/cudbg/fastlz.h
49
int write_to_buf(void *, u32, u32 *, void *, u32);
sys/dev/cxgbe/cudbg/fastlz.h
50
int read_from_buf(void *, u32, u32 *, void *, u32);
sys/dev/cxgbe/cudbg/fastlz_api.c
101
int read_from_buf(void *in_buf, u32 in_buf_size, u32 *offset, void *out_buf,
sys/dev/cxgbe/cudbg/fastlz_api.c
102
u32 out_buf_size)
sys/dev/cxgbe/cudbg/fastlz_api.c
196
(u32)strlen(shown_name)+1);
sys/dev/cxgbe/cudbg/fastlz_api.c
237
if ((chunk_size > 62000) && (cudbg_hdr->reserved[7] < (u32)
sys/dev/cxgbe/cudbg/fastlz_api.c
239
cudbg_hdr->reserved[7] = (u32) chunk_size;
sys/dev/cxgbe/cudbg/fastlz_api.c
353
u32 decompressed_size = 0;
sys/dev/cxgbe/cudbg/fastlz_api.c
400
decompressed_size = (u32)readU32(buffer);
sys/dev/cxgbe/cudbg/fastlz_api.c
84
int write_to_buf(void *out_buf, u32 out_buf_size, u32 *offset, void *in_buf,
sys/dev/cxgbe/cudbg/fastlz_api.c
85
u32 in_buf_size)
sys/dev/cxgbe/iw_cxgbe/cm.c
2305
ep->ird = min_t(u32, ep->ird,
sys/dev/cxgbe/iw_cxgbe/cm.c
2309
ep->ord = min_t(u32, ep->ord,
sys/dev/cxgbe/iw_cxgbe/cq.c
341
u32 rptr = wq->sq.oldest_read - wq->sq.sw_sq + 1;
sys/dev/cxgbe/iw_cxgbe/cq.c
459
u32 ptr;
sys/dev/cxgbe/iw_cxgbe/cq.c
492
u8 *cqe_flushed, u64 *cookie, u32 *credit)
sys/dev/cxgbe/iw_cxgbe/cq.c
720
u32 credit = 0;
sys/dev/cxgbe/iw_cxgbe/ev.c
161
u32 cqid;
sys/dev/cxgbe/iw_cxgbe/ev.c
265
u32 qid = be32_to_cpu(rc->pldbuflen_qid);
sys/dev/cxgbe/iw_cxgbe/ev.c
42
static void print_tpte(struct adapter *sc, const u32 stag,
sys/dev/cxgbe/iw_cxgbe/ev.c
64
void t4_dump_stag(struct adapter *sc, const u32 stag)
sys/dev/cxgbe/iw_cxgbe/ev.c
67
const u32 offset = sc->vres.stag.start + ((stag >> 8) * 32);
sys/dev/cxgbe/iw_cxgbe/ev.c
74
read_via_memwin(sc, 0, offset, (u32 *)&tpte, 32);
sys/dev/cxgbe/iw_cxgbe/ev.c
81
const u32 first = sc->vres.stag.start;
sys/dev/cxgbe/iw_cxgbe/ev.c
82
const u32 last = first + sc->vres.stag.size - 32;
sys/dev/cxgbe/iw_cxgbe/ev.c
83
u32 offset, i;
sys/dev/cxgbe/iw_cxgbe/ev.c
87
read_via_memwin(sc, 0, offset, (u32 *)&tpte, 4);
sys/dev/cxgbe/iw_cxgbe/ev.c
89
read_via_memwin(sc, 0, offset, (u32 *)&tpte, 32);
sys/dev/cxgbe/iw_cxgbe/id_table.c
49
u32 c4iw_id_alloc(struct c4iw_id_table *alloc)
sys/dev/cxgbe/iw_cxgbe/id_table.c
52
u32 obj;
sys/dev/cxgbe/iw_cxgbe/id_table.c
76
void c4iw_id_free(struct c4iw_id_table *alloc, u32 obj)
sys/dev/cxgbe/iw_cxgbe/id_table.c
88
int c4iw_id_table_alloc(struct c4iw_id_table *alloc, u32 start, u32 num,
sys/dev/cxgbe/iw_cxgbe/id_table.c
89
u32 reserved, u32 flags)
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
108
u32 qid;
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
153
u32 qpmask;
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
155
u32 cqmask;
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
159
u32 flags;
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
208
u32 hwtid, u32 qpid, struct socket *so, const char *func)
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
269
u32 device_cap_flags;
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
275
u32 avail_ird;
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
288
static inline struct c4iw_cq *get_chp(struct c4iw_dev *rhp, u32 cqid)
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
293
static inline struct c4iw_qp *get_qhp(struct c4iw_dev *rhp, u32 qpid)
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
298
static inline struct c4iw_mr *get_mhp(struct c4iw_dev *rhp, u32 mmid)
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
304
void *handle, u32 id, int lock)
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
324
void *handle, u32 id)
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
330
void *handle, u32 id)
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
336
u32 id, int lock)
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
345
static inline void remove_handle(struct c4iw_dev *rhp, struct idr *idr, u32 id)
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
351
struct idr *idr, u32 id)
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
365
u32 pdid;
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
378
u32 stag;
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
379
u32 pdid;
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
380
u32 qpid;
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
381
u32 pbl_addr;
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
382
u32 pbl_size;
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
383
u32 state:1;
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
384
u32 type:2;
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
385
u32 rsvd:1;
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
386
u32 remote_invaliate_disable:1;
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
387
u32 zbva:1;
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
388
u32 mw_bind_enable:1;
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
389
u32 page_size:5;
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
400
u32 max_mpl_len;
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
401
u32 mpl_len;
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
447
u32 scq;
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
448
u32 rcq;
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
449
u32 sq_num_entries;
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
450
u32 rq_num_entries;
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
451
u32 sq_max_sges;
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
452
u32 sq_max_sges_rdma_write;
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
453
u32 rq_max_sges;
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
454
u32 state;
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
459
u32 max_ord;
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
460
u32 max_ird;
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
461
u32 pd;
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
462
u32 next_state;
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
464
u32 terminate_msg_len;
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
507
u32 key;
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
520
u32 key;
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
525
u32 key, unsigned len)
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
641
static inline u32 c4iw_ib_to_tpt_access(int a)
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
649
static inline u32 c4iw_ib_to_tpt_bind_access(int acc)
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
853
u32 hwtid;
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
854
u32 snd_seq;
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
855
u32 rcv_seq;
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
861
u32 ird;
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
862
u32 ord;
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
863
u32 tx_chan;
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
864
u32 mtu;
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
894
u32 c4iw_id_alloc(struct c4iw_id_table *alloc);
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
895
void c4iw_id_free(struct c4iw_id_table *alloc, u32 obj);
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
896
int c4iw_id_table_alloc(struct c4iw_id_table *alloc, u32 start, u32 num,
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
897
u32 reserved, u32 flags);
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
904
u32 c4iw_get_resource(struct c4iw_id_table *id_table);
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
905
void c4iw_put_resource(struct c4iw_id_table *id_table, u32 entry);
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
906
int c4iw_init_resource(struct c4iw_rdev *rdev, u32 nr_pdid);
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
93
u32 flags;
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
933
u32 max_num_sg, struct ib_udata *udata);
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
94
u32 start; /* logical minimal id */
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
943
void c4iw_invalidate_mr(struct c4iw_dev *rhp, u32 rkey);
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
95
u32 last; /* hint for find */
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
959
u32 c4iw_rqtpool_alloc(struct c4iw_rdev *rdev, int size);
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
96
u32 max;
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
960
void c4iw_rqtpool_free(struct c4iw_rdev *rdev, u32 addr, int size);
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
961
u32 c4iw_pblpool_alloc(struct c4iw_rdev *rdev, int size);
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
962
void c4iw_pblpool_free(struct c4iw_rdev *rdev, u32 addr, int size);
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
973
u32 c4iw_get_cqid(struct c4iw_rdev *rdev, struct c4iw_dev_ucontext *uctx);
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
974
void c4iw_put_cqid(struct c4iw_rdev *rdev, u32 qid,
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
976
u32 c4iw_get_qpid(struct c4iw_rdev *rdev, struct c4iw_dev_ucontext *uctx);
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
977
void c4iw_put_qpid(struct c4iw_rdev *rdev, u32 qid,
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
980
void t4_dump_stag(struct adapter *sc, const u32 stag);
sys/dev/cxgbe/iw_cxgbe/mem.c
119
_c4iw_write_mem_dma(struct c4iw_rdev *rdev, u32 addr, u32 len, void *data)
sys/dev/cxgbe/iw_cxgbe/mem.c
122
u32 remain = len;
sys/dev/cxgbe/iw_cxgbe/mem.c
123
u32 dmalen;
sys/dev/cxgbe/iw_cxgbe/mem.c
162
write_adapter_mem(struct c4iw_rdev *rdev, u32 addr, u32 len,
sys/dev/cxgbe/iw_cxgbe/mem.c
187
static int write_tpt_entry(struct c4iw_rdev *rdev, u32 reset_tpt_entry,
sys/dev/cxgbe/iw_cxgbe/mem.c
188
u32 *stag, u8 stag_state, u32 pdid,
sys/dev/cxgbe/iw_cxgbe/mem.c
190
int bind_enabled, u32 zbva, u64 to,
sys/dev/cxgbe/iw_cxgbe/mem.c
191
u64 len, u8 page_size, u32 pbl_size, u32 pbl_addr)
sys/dev/cxgbe/iw_cxgbe/mem.c
195
u32 stag_idx;
sys/dev/cxgbe/iw_cxgbe/mem.c
240
tpt.len_lo = cpu_to_be32((u32)(len & 0xffffffffUL));
sys/dev/cxgbe/iw_cxgbe/mem.c
241
tpt.va_hi = cpu_to_be32((u32)(to >> 32));
sys/dev/cxgbe/iw_cxgbe/mem.c
242
tpt.va_lo_fbo = cpu_to_be32((u32)(to & 0xffffffffUL));
sys/dev/cxgbe/iw_cxgbe/mem.c
244
tpt.len_hi = cpu_to_be32((u32)(len >> 32));
sys/dev/cxgbe/iw_cxgbe/mem.c
260
u32 pbl_addr, u32 pbl_size)
sys/dev/cxgbe/iw_cxgbe/mem.c
271
static int dereg_mem(struct c4iw_rdev *rdev, u32 stag, u32 pbl_size,
sys/dev/cxgbe/iw_cxgbe/mem.c
272
u32 pbl_addr)
sys/dev/cxgbe/iw_cxgbe/mem.c
278
static int allocate_window(struct c4iw_rdev *rdev, u32 * stag, u32 pdid)
sys/dev/cxgbe/iw_cxgbe/mem.c
285
static int deallocate_window(struct c4iw_rdev *rdev, u32 stag)
sys/dev/cxgbe/iw_cxgbe/mem.c
291
static int allocate_stag(struct c4iw_rdev *rdev, u32 *stag, u32 pdid,
sys/dev/cxgbe/iw_cxgbe/mem.c
292
u32 pbl_size, u32 pbl_addr)
sys/dev/cxgbe/iw_cxgbe/mem.c
299
static int finish_mem_reg(struct c4iw_mr *mhp, u32 stag)
sys/dev/cxgbe/iw_cxgbe/mem.c
301
u32 mmid;
sys/dev/cxgbe/iw_cxgbe/mem.c
314
u32 stag = T4_STAG_UNSET;
sys/dev/cxgbe/iw_cxgbe/mem.c
351
u32 stag = T4_STAG_UNSET;
sys/dev/cxgbe/iw_cxgbe/mem.c
498
u32 mmid;
sys/dev/cxgbe/iw_cxgbe/mem.c
499
u32 stag = 0;
sys/dev/cxgbe/iw_cxgbe/mem.c
535
u32 mmid;
sys/dev/cxgbe/iw_cxgbe/mem.c
550
u32 max_num_sg, struct ib_udata *udata)
sys/dev/cxgbe/iw_cxgbe/mem.c
555
u32 mmid;
sys/dev/cxgbe/iw_cxgbe/mem.c
556
u32 stag = 0;
sys/dev/cxgbe/iw_cxgbe/mem.c
58
_c4iw_write_mem_dma_aligned(struct c4iw_rdev *rdev, u32 addr, u32 len,
sys/dev/cxgbe/iw_cxgbe/mem.c
647
u32 mmid;
sys/dev/cxgbe/iw_cxgbe/mem.c
669
void c4iw_invalidate_mr(struct c4iw_dev *rhp, u32 rkey)
sys/dev/cxgbe/iw_cxgbe/mem.c
85
_c4iw_write_mem_inline(struct c4iw_rdev *rdev, u32 addr, u32 len, void *data)
sys/dev/cxgbe/iw_cxgbe/provider.c
164
u32 key = vma->vm_pgoff << PAGE_SHIFT;
sys/dev/cxgbe/iw_cxgbe/provider.c
228
u32 pdid;
sys/dev/cxgbe/iw_cxgbe/provider.c
243
if (ib_copy_to_udata(udata, &php->pdid, sizeof(u32))) {
sys/dev/cxgbe/iw_cxgbe/provider.c
60
struct ib_ah_attr *ah_attr, u32 flags,
sys/dev/cxgbe/iw_cxgbe/provider.c
66
static void c4iw_ah_destroy(struct ib_ah *ah, u32 flags)
sys/dev/cxgbe/iw_cxgbe/qp.c
339
const struct ib_send_wr *wr, int max, u32 *plenp)
sys/dev/cxgbe/iw_cxgbe/qp.c
342
u32 plen = 0;
sys/dev/cxgbe/iw_cxgbe/qp.c
379
int num_sge, u32 *plenp)
sys/dev/cxgbe/iw_cxgbe/qp.c
383
u32 plen = 0;
sys/dev/cxgbe/iw_cxgbe/qp.c
411
u32 plen;
sys/dev/cxgbe/iw_cxgbe/qp.c
478
u32 plen;
sys/dev/cxgbe/iw_cxgbe/qp.c
524
wqe->read.to_src_hi = cpu_to_be32((u32)(rdma_wr(wr)->remote_addr
sys/dev/cxgbe/iw_cxgbe/qp.c
527
cpu_to_be32((u32)rdma_wr(wr)->remote_addr);
sys/dev/cxgbe/iw_cxgbe/qp.c
530
wqe->read.to_sink_hi = cpu_to_be32((u32)(wr->sg_list[0].addr
sys/dev/cxgbe/iw_cxgbe/qp.c
532
wqe->read.to_sink_lo = cpu_to_be32((u32)(wr->sg_list[0].addr));
sys/dev/cxgbe/iw_cxgbe/qp.c
70
static int alloc_ird(struct c4iw_dev *dev, u32 ird)
sys/dev/cxgbe/iw_cxgbe/qp.c
783
u32 num_wrs;
sys/dev/cxgbe/iw_cxgbe/qp.c
922
u32 num_wrs;
sys/dev/cxgbe/iw_cxgbe/resource.c
101
u32 qid;
sys/dev/cxgbe/iw_cxgbe/resource.c
153
void c4iw_put_cqid(struct c4iw_rdev *rdev, u32 qid,
sys/dev/cxgbe/iw_cxgbe/resource.c
168
u32 c4iw_get_qpid(struct c4iw_rdev *rdev, struct c4iw_dev_ucontext *uctx)
sys/dev/cxgbe/iw_cxgbe/resource.c
171
u32 qid;
sys/dev/cxgbe/iw_cxgbe/resource.c
223
void c4iw_put_qpid(struct c4iw_rdev *rdev, u32 qid,
sys/dev/cxgbe/iw_cxgbe/resource.c
248
u32 c4iw_pblpool_alloc(struct c4iw_rdev *rdev, int size)
sys/dev/cxgbe/iw_cxgbe/resource.c
250
u32 addr;
sys/dev/cxgbe/iw_cxgbe/resource.c
264
void c4iw_pblpool_free(struct c4iw_rdev *rdev, u32 addr, int size)
sys/dev/cxgbe/iw_cxgbe/resource.c
276
u32 c4iw_rqtpool_alloc(struct c4iw_rdev *rdev, int size)
sys/dev/cxgbe/iw_cxgbe/resource.c
284
CTR3(KTR_IW_CXGBE, "%s addr 0x%x size %d", __func__, (u32)addr,
sys/dev/cxgbe/iw_cxgbe/resource.c
297
return (u32)addr;
sys/dev/cxgbe/iw_cxgbe/resource.c
300
void c4iw_rqtpool_free(struct c4iw_rdev *rdev, u32 addr, int size)
sys/dev/cxgbe/iw_cxgbe/resource.c
44
u32 i;
sys/dev/cxgbe/iw_cxgbe/resource.c
62
int c4iw_init_resource(struct c4iw_rdev *rdev, u32 nr_pdid)
sys/dev/cxgbe/iw_cxgbe/resource.c
82
u32 c4iw_get_resource(struct c4iw_id_table *id_table)
sys/dev/cxgbe/iw_cxgbe/resource.c
84
u32 entry;
sys/dev/cxgbe/iw_cxgbe/resource.c
86
if (entry == (u32)(-1)) {
sys/dev/cxgbe/iw_cxgbe/resource.c
92
void c4iw_put_resource(struct c4iw_id_table *id_table, u32 entry)
sys/dev/cxgbe/iw_cxgbe/resource.c
98
u32 c4iw_get_cqid(struct c4iw_rdev *rdev, struct c4iw_dev_ucontext *uctx)
sys/dev/cxgbe/iw_cxgbe/t4.h
194
u32 stag;
sys/dev/cxgbe/iw_cxgbe/t4.h
321
u32 bar2_qid;
sys/dev/cxgbe/iw_cxgbe/t4.h
322
u32 qid;
sys/dev/cxgbe/iw_cxgbe/t4.h
346
u32 bar2_qid;
sys/dev/cxgbe/iw_cxgbe/t4.h
347
u32 qid;
sys/dev/cxgbe/iw_cxgbe/t4.h
348
u32 msn;
sys/dev/cxgbe/iw_cxgbe/t4.h
349
u32 rqt_hwaddr;
sys/dev/cxgbe/iw_cxgbe/t4.h
381
static inline u32 t4_rq_avail(struct t4_wq *wq)
sys/dev/cxgbe/iw_cxgbe/t4.h
429
static inline u32 t4_sq_avail(struct t4_wq *wq)
sys/dev/cxgbe/iw_cxgbe/t4.h
550
u32 bar2_qid;
sys/dev/cxgbe/iw_cxgbe/t4.h
554
u32 cqid;
sys/dev/cxgbe/iw_cxgbe/t4.h
555
u32 qid_mask;
sys/dev/cxgbe/iw_cxgbe/t4.h
568
static inline void write_gts(struct t4_cq *cq, u32 val)
sys/dev/cxgbe/iw_cxgbe/t4.h
581
u32 val;
sys/dev/cxgbe/iw_cxgbe/t4.h
622
u32 val;
sys/dev/cxgbe/iw_cxgbe/t4.h
710
u32 pad3;
sys/dev/cxgbe/t4_main.c
7561
u32 stats[2];
sys/dev/cxgbe/t4_netmap.c
1451
V_INGRESSQID((u32)nm_rxq->iq_cntxt_id) |
sys/dev/cxgbe/t4_sge.c
1542
V_INGRESSQID((u32)iq->cntxt_id) | V_SEINTARM(iq->intr_params));
sys/dev/cxgbe/t4_sge.c
1637
V_INGRESSQID((u32)iq->cntxt_id) |
sys/dev/cxgbe/t4_sge.c
1752
V_INGRESSQID((u32)iq->cntxt_id) | V_SEINTARM(iq->intr_params));
sys/dev/drm2/drmP.h
1047
u32 *last_vblank; /* protected by dev->vbl_lock, used */
sys/dev/drm2/drmP.h
1052
u32 *last_vblank_wait; /* Last vblank seqno waited per CRTC */
sys/dev/drm2/drmP.h
1055
u32 max_vblank_count; /**< size of vblank counter register */
sys/dev/drm2/drmP.h
1320
extern u32 drm_vblank_count(struct drm_device *dev, int crtc);
sys/dev/drm2/drmP.h
1321
extern u32 drm_vblank_count_and_time(struct drm_device *dev, int crtc,
sys/dev/drm2/drmP.h
1330
extern u32 drm_get_last_vbltimestamp(struct drm_device *dev, int crtc,
sys/dev/drm2/drmP.h
1474
u32 *handlep);
sys/dev/drm2/drmP.h
1475
int drm_gem_handle_delete(struct drm_file *filp, u32 handle);
sys/dev/drm2/drmP.h
1527
u32 handle);
sys/dev/drm2/drmP.h
1574
extern int drm_pcie_get_speed_cap_mask(struct drm_device *dev, u32 *speed_mask);
sys/dev/drm2/drmP.h
1688
u32 last; /* protected by dev->vbl_lock, used */
sys/dev/drm2/drmP.h
1699
#define upper_32_bits(n) ((u32)(((n) >> 16) >> 16))
sys/dev/drm2/drmP.h
732
u32 (*get_vblank_counter) (struct drm_device *dev, int crtc);
sys/dev/drm2/drmP.h
909
u32 driver_features;
sys/dev/drm2/drm_agpsupport.c
204
u32 type;
sys/dev/drm2/drm_agpsupport.c
215
type = (u32) request->type;
sys/dev/drm2/drm_agpsupport.c
434
u32 type)
sys/dev/drm2/drm_crtc.c
1977
u32 out_id;
sys/dev/drm2/drm_crtc.h
211
u32 color_formats;
sys/dev/drm2/drm_edid.c
1033
static u32
sys/dev/drm2/drm_edid.c
1052
u32 max_clock;
sys/dev/drm2/drm_edid.c
1479
u32 quirks)
sys/dev/drm2/drm_edid.c
2009
u32 quirks;
sys/dev/drm2/drm_edid.c
315
u32 *raw_edid = (u32 *)in_edid;
sys/dev/drm2/drm_edid.c
469
static u32 edid_get_quirks(struct edid *edid)
sys/dev/drm2/drm_edid.c
497
u32 quirks)
sys/dev/drm2/drm_edid.c
77
u32 quirks;
sys/dev/drm2/drm_edid.c
89
u32 quirks;
sys/dev/drm2/drm_edid.c
902
u32 quirks)
sys/dev/drm2/drm_edid.h
208
u32 serial; /* FIXME: byte order */
sys/dev/drm2/drm_fb_helper.c
1451
u32 max_width, max_height, bpp_sel;
sys/dev/drm2/drm_fb_helper.c
579
u32 *palette;
sys/dev/drm2/drm_fb_helper.c
580
u32 value;
sys/dev/drm2/drm_fb_helper.c
584
palette = (u32 *)info->pseudo_palette;
sys/dev/drm2/drm_fb_helper.c
592
u32 mask = (1 << info->var.transp.length) - 1;
sys/dev/drm2/drm_fb_helper.h
41
u32 fb_width;
sys/dev/drm2/drm_fb_helper.h
42
u32 fb_height;
sys/dev/drm2/drm_fb_helper.h
43
u32 surface_width;
sys/dev/drm2/drm_fb_helper.h
44
u32 surface_height;
sys/dev/drm2/drm_fb_helper.h
45
u32 surface_bpp;
sys/dev/drm2/drm_fb_helper.h
46
u32 surface_depth;
sys/dev/drm2/drm_fb_helper.h
75
u32 pseudo_palette[17];
sys/dev/drm2/drm_fixed.h
30
u32 full;
sys/dev/drm2/drm_fixed.h
34
#define dfixed_const(A) (u32)(((A) << 12))/* + ((B + 0.000122)*4096)) */
sys/dev/drm2/drm_fixed.h
35
#define dfixed_const_half(A) (u32)(((A) << 12) + 2048)
sys/dev/drm2/drm_fixed.h
36
#define dfixed_const_666(A) (u32)(((A) << 12) + 2731)
sys/dev/drm2/drm_fixed.h
37
#define dfixed_const_8(A) (u32)(((A) << 12) + 3277)
sys/dev/drm2/drm_fixed.h
44
static inline u32 dfixed_floor(fixed20_12 A)
sys/dev/drm2/drm_fixed.h
46
u32 non_frac = dfixed_trunc(A);
sys/dev/drm2/drm_fixed.h
51
static inline u32 dfixed_ceil(fixed20_12 A)
sys/dev/drm2/drm_fixed.h
53
u32 non_frac = dfixed_trunc(A);
sys/dev/drm2/drm_fixed.h
61
static inline u32 dfixed_div(fixed20_12 A, fixed20_12 B)
sys/dev/drm2/drm_gem.c
188
drm_gem_handle_delete(struct drm_file *filp, u32 handle)
sys/dev/drm2/drm_gem.c
219
u32 *handlep)
sys/dev/drm2/drm_gem.c
285
u32 handle)
sys/dev/drm2/drm_gem.c
344
u32 handle;
sys/dev/drm2/drm_ioc32.c
108
u32 unique_len; /**< Length of unique */
sys/dev/drm2/drm_ioc32.c
109
u32 unique; /**< Unique name for driver instantiation */
sys/dev/drm2/drm_ioc32.c
144
u32 offset; /**< Requested physical address (0 for SAREA)*/
sys/dev/drm2/drm_ioc32.c
145
u32 size; /**< Requested physical size (bytes) */
sys/dev/drm2/drm_ioc32.c
148
u32 handle; /**< User-space: "Handle" to pass to mmap() */
sys/dev/drm2/drm_ioc32.c
223
u32 pid; /**< Process ID */
sys/dev/drm2/drm_ioc32.c
224
u32 uid; /**< User ID */
sys/dev/drm2/drm_ioc32.c
225
u32 magic; /**< Magic */
sys/dev/drm2/drm_ioc32.c
226
u32 iocs; /**< Ioctl count */
sys/dev/drm2/drm_ioc32.c
253
u32 count;
sys/dev/drm2/drm_ioc32.c
255
u32 value;
sys/dev/drm2/drm_ioc32.c
286
u32 agp_start; /**< Start address in the AGP aperture */
sys/dev/drm2/drm_ioc32.c
332
u32 list;
sys/dev/drm2/drm_ioc32.c
383
u32 address; /**< Address of buffer */
sys/dev/drm2/drm_ioc32.c
388
u32 virtual; /**< Mmap'd area in user-virtual */
sys/dev/drm2/drm_ioc32.c
389
u32 list; /**< Buffer information */
sys/dev/drm2/drm_ioc32.c
438
u32 list;
sys/dev/drm2/drm_ioc32.c
455
u32 handle; /**< Handle of map */
sys/dev/drm2/drm_ioc32.c
490
u32 contexts;
sys/dev/drm2/drm_ioc32.c
515
u32 send_indices; /**< List of handles to buffers */
sys/dev/drm2/drm_ioc32.c
516
u32 send_sizes; /**< Lengths of data to send */
sys/dev/drm2/drm_ioc32.c
520
u32 request_indices; /**< Buffer information */
sys/dev/drm2/drm_ioc32.c
521
u32 request_sizes;
sys/dev/drm2/drm_ioc32.c
558
u32 mode; /**< AGP mode */
sys/dev/drm2/drm_ioc32.c
575
u32 mode;
sys/dev/drm2/drm_ioc32.c
576
u32 aperture_base; /* physical address */
sys/dev/drm2/drm_ioc32.c
577
u32 aperture_size; /* bytes */
sys/dev/drm2/drm_ioc32.c
578
u32 memory_allowed; /* bytes */
sys/dev/drm2/drm_ioc32.c
579
u32 memory_used;
sys/dev/drm2/drm_ioc32.c
611
u32 size; /**< In bytes -- will round to page boundary */
sys/dev/drm2/drm_ioc32.c
612
u32 handle; /**< Used for binding / unbinding */
sys/dev/drm2/drm_ioc32.c
613
u32 type; /**< Type of memory to allocate */
sys/dev/drm2/drm_ioc32.c
614
u32 physical; /**< Physical used by i810 */
sys/dev/drm2/drm_ioc32.c
649
u32 handle; /**< From drm_agp_buffer */
sys/dev/drm2/drm_ioc32.c
650
u32 offset; /**< In bytes -- will round to page boundary */
sys/dev/drm2/drm_ioc32.c
678
u32 size; /**< In bytes -- will round to page boundary */
sys/dev/drm2/drm_ioc32.c
679
u32 handle; /**< Used for mapping / unmapping */
sys/dev/drm2/drm_ioc32.c
71
u32 name_len; /**< Length of name buffer */
sys/dev/drm2/drm_ioc32.c
72
u32 name; /**< Name of driver */
sys/dev/drm2/drm_ioc32.c
725
u32 signal;
sys/dev/drm2/drm_ioc32.c
73
u32 date_len; /**< Length of date buffer */
sys/dev/drm2/drm_ioc32.c
74
u32 date; /**< User-space buffer to hold date */
sys/dev/drm2/drm_ioc32.c
75
u32 desc_len; /**< Length of desc buffer */
sys/dev/drm2/drm_ioc32.c
76
u32 desc; /**< User-space buffer to hold desc */
sys/dev/drm2/drm_irq.c
1341
u32 vblcount;
sys/dev/drm2/drm_irq.c
232
dev->last_vblank = malloc(num_crtcs * sizeof(u32),
sys/dev/drm2/drm_irq.c
237
dev->last_vblank_wait = malloc(num_crtcs * sizeof(u32),
sys/dev/drm2/drm_irq.c
724
u32 drm_get_last_vbltimestamp(struct drm_device *dev, int crtc,
sys/dev/drm2/drm_irq.c
737
return (u32) ret;
sys/dev/drm2/drm_irq.c
758
u32 drm_vblank_count(struct drm_device *dev, int crtc)
sys/dev/drm2/drm_irq.c
778
u32 drm_vblank_count_and_time(struct drm_device *dev, int crtc,
sys/dev/drm2/drm_irq.c
781
u32 cur_vblank;
sys/dev/drm2/drm_irq.c
857
u32 cur_vblank, diff, tslot, rc;
sys/dev/drm2/drm_irq.c
98
u32 vblcount;
sys/dev/drm2/drm_os_freebsd.h
179
#define lower_32_bits(n) ((u32)(n))
sys/dev/drm2/drm_os_freebsd.h
180
#define upper_32_bits(n) ((u32)(((n) >> 16) >> 16))
sys/dev/drm2/drm_os_freebsd.h
253
struct __una_u32 { u32 x; } __packed;
sys/dev/drm2/drm_os_freebsd.h
255
static inline u32
sys/dev/drm2/drm_os_freebsd.h
263
static inline u32
sys/dev/drm2/drm_os_freebsd.h
271
static inline u32
sys/dev/drm2/drm_os_freebsd.h
278
static inline u32
sys/dev/drm2/drm_pci.c
438
int drm_pcie_get_speed_cap_mask(struct drm_device *dev, u32 *mask)
sys/dev/drm2/drm_pci.c
442
u32 lnkcap = 0, lnkcap2 = 0;
sys/dev/e1000/e1000_80003es2lan.c
1118
u32 ctrl;
sys/dev/e1000/e1000_80003es2lan.c
1208
u32 tipg;
sys/dev/e1000/e1000_80003es2lan.c
1209
u32 i = 0;
sys/dev/e1000/e1000_80003es2lan.c
1260
u32 tipg;
sys/dev/e1000/e1000_80003es2lan.c
1261
u32 i = 0;
sys/dev/e1000/e1000_80003es2lan.c
1307
static s32 e1000_read_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset,
sys/dev/e1000/e1000_80003es2lan.c
1310
u32 kmrnctrlsta;
sys/dev/e1000/e1000_80003es2lan.c
1344
static s32 e1000_write_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset,
sys/dev/e1000/e1000_80003es2lan.c
1347
u32 kmrnctrlsta;
sys/dev/e1000/e1000_80003es2lan.c
141
u32 eecd = E1000_READ_REG(hw, E1000_EECD);
sys/dev/e1000/e1000_80003es2lan.c
401
u32 offset, u16 *data)
sys/dev/e1000/e1000_80003es2lan.c
404
u32 page_select;
sys/dev/e1000/e1000_80003es2lan.c
46
u32 offset,
sys/dev/e1000/e1000_80003es2lan.c
472
u32 offset, u16 data)
sys/dev/e1000/e1000_80003es2lan.c
475
u32 page_select;
sys/dev/e1000/e1000_80003es2lan.c
49
u32 offset,
sys/dev/e1000/e1000_80003es2lan.c
561
u32 mask = E1000_NVM_CFG_DONE_PORT_0;
sys/dev/e1000/e1000_80003es2lan.c
65
static s32 e1000_read_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset,
sys/dev/e1000/e1000_80003es2lan.c
67
static s32 e1000_write_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset,
sys/dev/e1000/e1000_80003es2lan.c
748
u32 ctrl;
sys/dev/e1000/e1000_80003es2lan.c
814
u32 reg_data;
sys/dev/e1000/e1000_80003es2lan.c
923
u32 reg;
sys/dev/e1000/e1000_80003es2lan.c
972
u32 reg;
sys/dev/e1000/e1000_82540.c
120
u32 eecd = E1000_READ_REG(hw, E1000_EECD);
sys/dev/e1000/e1000_82540.c
272
u32 ctrl, manc;
sys/dev/e1000/e1000_82540.c
331
u32 txdctl, ctrl_ext;
sys/dev/e1000/e1000_82540.c
413
u32 ctrl;
sys/dev/e1000/e1000_82541.c
1094
u32 ret_val;
sys/dev/e1000/e1000_82541.c
132
u32 eecd = E1000_READ_REG(hw, E1000_EECD);
sys/dev/e1000/e1000_82541.c
298
u32 ledctl, ctrl, manc;
sys/dev/e1000/e1000_82541.c
378
u32 i, txdctl;
sys/dev/e1000/e1000_82541.c
502
u32 ledctl;
sys/dev/e1000/e1000_82541.c
538
u32 ctrl, ledctl;
sys/dev/e1000/e1000_82541.c
674
u32 idle_errs = 0;
sys/dev/e1000/e1000_82542.c
196
u32 ctrl;
sys/dev/e1000/e1000_82542.c
248
u32 ctrl;
sys/dev/e1000/e1000_82542.c
375
u32 ctrl = E1000_READ_REG(hw, E1000_CTRL);
sys/dev/e1000/e1000_82542.c
394
u32 ctrl = E1000_READ_REG(hw, E1000_CTRL);
sys/dev/e1000/e1000_82542.c
414
static int e1000_rar_set_82542(struct e1000_hw *hw, u8 *addr, u32 index)
sys/dev/e1000/e1000_82542.c
416
u32 rar_low, rar_high;
sys/dev/e1000/e1000_82542.c
424
rar_low = ((u32) addr[0] | ((u32) addr[1] << 8) |
sys/dev/e1000/e1000_82542.c
425
((u32) addr[2] << 16) | ((u32) addr[3] << 24));
sys/dev/e1000/e1000_82542.c
427
rar_high = ((u32) addr[4] | ((u32) addr[5] << 8));
sys/dev/e1000/e1000_82542.c
448
u32 e1000_translate_register_82542(u32 reg)
sys/dev/e1000/e1000_82542.c
50
static int e1000_rar_set_82542(struct e1000_hw *hw, u8 *addr, u32 index);
sys/dev/e1000/e1000_82543.c
1021
u32 ctrl_ext;
sys/dev/e1000/e1000_82543.c
1062
u32 ctrl;
sys/dev/e1000/e1000_82543.c
1150
u32 ctrl;
sys/dev/e1000/e1000_82543.c
1200
u32 icr, rctl;
sys/dev/e1000/e1000_82543.c
1336
u32 rxcw, ctrl, status;
sys/dev/e1000/e1000_82543.c
1405
u32 ctrl;
sys/dev/e1000/e1000_82543.c
1457
static void e1000_write_vfta_82543(struct e1000_hw *hw, u32 offset, u32 value)
sys/dev/e1000/e1000_82543.c
1459
u32 temp;
sys/dev/e1000/e1000_82543.c
1482
u32 ctrl = E1000_READ_REG(hw, E1000_CTRL);
sys/dev/e1000/e1000_82543.c
1509
u32 ctrl = E1000_READ_REG(hw, E1000_CTRL);
sys/dev/e1000/e1000_82543.c
412
struct e1000_hw_stats *stats, u32 frame_len,
sys/dev/e1000/e1000_82543.c
413
u8 *mac_addr, u32 max_frame_size)
sys/dev/e1000/e1000_82543.c
487
static s32 e1000_read_phy_reg_82543(struct e1000_hw *hw, u32 offset, u16 *data)
sys/dev/e1000/e1000_82543.c
489
u32 mdic;
sys/dev/e1000/e1000_82543.c
49
static s32 e1000_read_phy_reg_82543(struct e1000_hw *hw, u32 offset,
sys/dev/e1000/e1000_82543.c
51
static s32 e1000_write_phy_reg_82543(struct e1000_hw *hw, u32 offset,
sys/dev/e1000/e1000_82543.c
543
static s32 e1000_write_phy_reg_82543(struct e1000_hw *hw, u32 offset, u16 data)
sys/dev/e1000/e1000_82543.c
545
u32 mdic;
sys/dev/e1000/e1000_82543.c
574
mdic |= (u32)data;
sys/dev/e1000/e1000_82543.c
590
static void e1000_raise_mdi_clk_82543(struct e1000_hw *hw, u32 *ctrl)
sys/dev/e1000/e1000_82543.c
609
static void e1000_lower_mdi_clk_82543(struct e1000_hw *hw, u32 *ctrl)
sys/dev/e1000/e1000_82543.c
630
static void e1000_shift_out_mdi_bits_82543(struct e1000_hw *hw, u32 data,
sys/dev/e1000/e1000_82543.c
633
u32 ctrl, mask;
sys/dev/e1000/e1000_82543.c
64
static void e1000_write_vfta_82543(struct e1000_hw *hw, u32 offset,
sys/dev/e1000/e1000_82543.c
65
u32 value);
sys/dev/e1000/e1000_82543.c
684
u32 ctrl;
sys/dev/e1000/e1000_82543.c
69
static void e1000_lower_mdi_clk_82543(struct e1000_hw *hw, u32 *ctrl);
sys/dev/e1000/e1000_82543.c
71
static void e1000_raise_mdi_clk_82543(struct e1000_hw *hw, u32 *ctrl);
sys/dev/e1000/e1000_82543.c
73
static void e1000_shift_out_mdi_bits_82543(struct e1000_hw *hw, u32 data,
sys/dev/e1000/e1000_82543.c
863
u32 ctrl_ext;
sys/dev/e1000/e1000_82543.c
903
u32 ctrl;
sys/dev/e1000/e1000_82543.c
960
u32 ctrl;
sys/dev/e1000/e1000_82543.h
51
u32 frame_len, u8 *mac_addr,
sys/dev/e1000/e1000_82543.h
52
u32 max_frame_size);
sys/dev/e1000/e1000_82571.c
1072
u32 reg_data;
sys/dev/e1000/e1000_82571.c
1152
u32 reg;
sys/dev/e1000/e1000_82571.c
1286
u32 offset;
sys/dev/e1000/e1000_82571.c
1287
u32 vfta_value = 0;
sys/dev/e1000/e1000_82571.c
1288
u32 vfta_offset = 0;
sys/dev/e1000/e1000_82571.c
1289
u32 vfta_bit_in_reg = 0;
sys/dev/e1000/e1000_82571.c
1355
u32 ctrl;
sys/dev/e1000/e1000_82571.c
1356
u32 i;
sys/dev/e1000/e1000_82571.c
1452
u32 ctrl;
sys/dev/e1000/e1000_82571.c
1533
u32 rxcw;
sys/dev/e1000/e1000_82571.c
1534
u32 ctrl;
sys/dev/e1000/e1000_82571.c
1535
u32 status;
sys/dev/e1000/e1000_82571.c
1536
u32 txcw;
sys/dev/e1000/e1000_82571.c
1537
u32 i;
sys/dev/e1000/e1000_82571.c
204
u32 eecd = E1000_READ_REG(hw, E1000_EECD);
sys/dev/e1000/e1000_82571.c
285
u32 swsm = 0;
sys/dev/e1000/e1000_82571.c
286
u32 swsm2 = 0;
sys/dev/e1000/e1000_82571.c
487
phy->id = (u32)(phy_id << 16);
sys/dev/e1000/e1000_82571.c
493
phy->id |= (u32)(phy_id);
sys/dev/e1000/e1000_82571.c
494
phy->revision = (u32)(phy_id & ~PHY_REVISION_MASK);
sys/dev/e1000/e1000_82571.c
514
u32 extcnf_ctrl;
sys/dev/e1000/e1000_82571.c
553
u32 extcnf_ctrl;
sys/dev/e1000/e1000_82571.c
576
u32 data = E1000_READ_REG(hw, E1000_POEMB);
sys/dev/e1000/e1000_82571.c
602
u32 data = E1000_READ_REG(hw, E1000_POEMB);
sys/dev/e1000/e1000_82571.c
712
u32 eecd;
sys/dev/e1000/e1000_82571.c
799
u32 i, eewr = 0;
sys/dev/e1000/e1000_82571.c
951
u32 ctrl, ctrl_ext, eecd, tctl;
sys/dev/e1000/e1000_82575.c
1005
u32 mask = E1000_NVM_CFG_DONE_PORT_0;
sys/dev/e1000/e1000_82575.c
108
static void e1000_raise_i2c_clk(struct e1000_hw *hw, u32 *i2cctl);
sys/dev/e1000/e1000_82575.c
109
static void e1000_lower_i2c_clk(struct e1000_hw *hw, u32 *i2cctl);
sys/dev/e1000/e1000_82575.c
110
static s32 e1000_set_i2c_data(struct e1000_hw *hw, u32 *i2cctl, bool data);
sys/dev/e1000/e1000_82575.c
111
static bool e1000_get_i2c_data(u32 *i2cctl);
sys/dev/e1000/e1000_82575.c
1167
u32 reg;
sys/dev/e1000/e1000_82575.c
1203
u32 pcs;
sys/dev/e1000/e1000_82575.c
1204
u32 status;
sys/dev/e1000/e1000_82575.c
1265
u32 reg;
sys/dev/e1000/e1000_82575.c
129
u32 reg = 0;
sys/dev/e1000/e1000_82575.c
1300
u32 ctrl;
sys/dev/e1000/e1000_82575.c
1404
u32 phpm_reg;
sys/dev/e1000/e1000_82575.c
1405
u32 ctrl;
sys/dev/e1000/e1000_82575.c
1496
u32 ctrl_ext, ctrl_reg, reg, anadv_reg;
sys/dev/e1000/e1000_82575.c
162
u32 ctrl_ext;
sys/dev/e1000/e1000_82575.c
1641
u32 ctrl_ext = 0;
sys/dev/e1000/e1000_82575.c
1642
u32 link_mode = 0;
sys/dev/e1000/e1000_82575.c
1718
u32 ctrl_ext = 0;
sys/dev/e1000/e1000_82575.c
1901
u32 tctl_ext;
sys/dev/e1000/e1000_82575.c
1991
u32 gcr = E1000_READ_REG(hw, E1000_GCR);
sys/dev/e1000/e1000_82575.c
2040
u32 reg_val, reg_offset;
sys/dev/e1000/e1000_82575.c
2078
u32 dtxswc;
sys/dev/e1000/e1000_82575.c
2115
u32 vt_ctl = E1000_READ_REG(hw, E1000_VT_CTL);
sys/dev/e1000/e1000_82575.c
2134
static s32 e1000_read_phy_reg_82580(struct e1000_hw *hw, u32 offset, u16 *data)
sys/dev/e1000/e1000_82575.c
2160
static s32 e1000_write_phy_reg_82580(struct e1000_hw *hw, u32 offset, u16 data)
sys/dev/e1000/e1000_82575.c
2189
u32 mdicnfg;
sys/dev/e1000/e1000_82575.c
2229
u32 ctrl;
sys/dev/e1000/e1000_82575.c
2324
u16 e1000_rxpbs_adjust_82580(u32 data)
sys/dev/e1000/e1000_82575.c
2784
u32 ipcnfg, eeer;
sys/dev/e1000/e1000_82575.c
2796
u32 eee_su = E1000_READ_REG(hw, E1000_EEE_SU);
sys/dev/e1000/e1000_82575.c
2960
u32 offset;
sys/dev/e1000/e1000_82575.c
2982
void e1000_write_vfta_i350(struct e1000_hw *hw, u32 offset, u32 value)
sys/dev/e1000/e1000_82575.c
3005
u32 ctrl_ext, i2cparams;
sys/dev/e1000/e1000_82575.c
3038
u32 max_retry = 10;
sys/dev/e1000/e1000_82575.c
3039
u32 retry = 1;
sys/dev/e1000/e1000_82575.c
3127
u32 max_retry = 1;
sys/dev/e1000/e1000_82575.c
3128
u32 retry = 0;
sys/dev/e1000/e1000_82575.c
3194
u32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
sys/dev/e1000/e1000_82575.c
3225
u32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
sys/dev/e1000/e1000_82575.c
3274
u32 i2cctl;
sys/dev/e1000/e1000_82575.c
3306
u32 i = 0;
sys/dev/e1000/e1000_82575.c
3307
u32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
sys/dev/e1000/e1000_82575.c
3308
u32 timeout = 10;
sys/dev/e1000/e1000_82575.c
3351
u32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
sys/dev/e1000/e1000_82575.c
3379
u32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
sys/dev/e1000/e1000_82575.c
3410
static void e1000_raise_i2c_clk(struct e1000_hw *hw, u32 *i2cctl)
sys/dev/e1000/e1000_82575.c
3430
static void e1000_lower_i2c_clk(struct e1000_hw *hw, u32 *i2cctl)
sys/dev/e1000/e1000_82575.c
3452
static s32 e1000_set_i2c_data(struct e1000_hw *hw, u32 *i2cctl, bool data)
sys/dev/e1000/e1000_82575.c
3486
static bool e1000_get_i2c_data(u32 *i2cctl)
sys/dev/e1000/e1000_82575.c
3509
u32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
sys/dev/e1000/e1000_82575.c
3510
u32 i;
sys/dev/e1000/e1000_82575.c
443
u32 eecd = E1000_READ_REG(hw, E1000_EECD);
sys/dev/e1000/e1000_82575.c
544
static s32 e1000_read_phy_reg_sgmii_82575(struct e1000_hw *hw, u32 offset,
sys/dev/e1000/e1000_82575.c
577
static s32 e1000_write_phy_reg_sgmii_82575(struct e1000_hw *hw, u32 offset,
sys/dev/e1000/e1000_82575.c
58
static s32 e1000_read_phy_reg_sgmii_82575(struct e1000_hw *hw, u32 offset,
sys/dev/e1000/e1000_82575.c
613
u32 ctrl_ext;
sys/dev/e1000/e1000_82575.c
614
u32 mdic;
sys/dev/e1000/e1000_82575.c
64
u32 offset, u16 *data);
sys/dev/e1000/e1000_82575.c
66
u32 offset, u16 data);
sys/dev/e1000/e1000_82575.c
79
u32 offset, u16 data);
sys/dev/e1000/e1000_82575.c
847
u32 data;
sys/dev/e1000/e1000_82575.c
894
u32 data;
sys/dev/e1000/e1000_82575.c
948
u32 eecd = E1000_READ_REG(hw, E1000_EECD);
sys/dev/e1000/e1000_82575.c
959
u32 eecd = E1000_READ_REG(hw, E1000_EECD);
sys/dev/e1000/e1000_82575.h
101
u32 iplen:9;
sys/dev/e1000/e1000_82575.h
102
u32 maclen:7;
sys/dev/e1000/e1000_82575.h
103
u32 vlan_tag:16;
sys/dev/e1000/e1000_82575.h
106
u32 seq_num;
sys/dev/e1000/e1000_82575.h
110
u32 mkrloc:9;
sys/dev/e1000/e1000_82575.h
111
u32 tucmd:11;
sys/dev/e1000/e1000_82575.h
112
u32 dtyp:4;
sys/dev/e1000/e1000_82575.h
113
u32 adv:8;
sys/dev/e1000/e1000_82575.h
114
u32 rsvd:4;
sys/dev/e1000/e1000_82575.h
115
u32 idx:4;
sys/dev/e1000/e1000_82575.h
116
u32 l4len:8;
sys/dev/e1000/e1000_82575.h
117
u32 mss:16;
sys/dev/e1000/e1000_82575.h
408
void e1000_write_vfta_i350(struct e1000_hw *hw, u32 offset, u32 value);
sys/dev/e1000/e1000_82575.h
409
u16 e1000_rxpbs_adjust_82580(u32 data);
sys/dev/e1000/e1000_82575.h
62
u32 data;
sys/dev/e1000/e1000_82575.h
64
u32 datalen:16; /* Data buffer length */
sys/dev/e1000/e1000_82575.h
65
u32 rsvd:4;
sys/dev/e1000/e1000_82575.h
66
u32 dtyp:4; /* Descriptor type */
sys/dev/e1000/e1000_82575.h
67
u32 dcmd:8; /* Descriptor command */
sys/dev/e1000/e1000_82575.h
71
u32 data;
sys/dev/e1000/e1000_82575.h
73
u32 status:4; /* Descriptor status */
sys/dev/e1000/e1000_82575.h
74
u32 idx:4;
sys/dev/e1000/e1000_82575.h
75
u32 popts:6; /* Packet Options */
sys/dev/e1000/e1000_82575.h
76
u32 paylen:18; /* Payload length */
sys/dev/e1000/e1000_82575.h
99
u32 ip_config;
sys/dev/e1000/e1000_api.c
1010
s32 e1000_set_obff_timer(struct e1000_hw *hw, u32 itr)
sys/dev/e1000/e1000_api.c
1042
s32 e1000_read_phy_reg(struct e1000_hw *hw, u32 offset, u16 *data)
sys/dev/e1000/e1000_api.c
1059
s32 e1000_write_phy_reg(struct e1000_hw *hw, u32 offset, u16 data)
sys/dev/e1000/e1000_api.c
1117
s32 e1000_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data)
sys/dev/e1000/e1000_api.c
1132
s32 e1000_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data)
sys/dev/e1000/e1000_api.c
1270
s32 e1000_read_pba_string(struct e1000_hw *hw, u8 *pba_num, u32 pba_num_size)
sys/dev/e1000/e1000_api.c
1285
s32 e1000_read_pba_length(struct e1000_hw *hw, u32 *pba_num_size)
sys/dev/e1000/e1000_api.c
1300
s32 e1000_read_pba_num(struct e1000_hw *hw, u32 *pba_num)
sys/dev/e1000/e1000_api.c
1394
s32 e1000_write_8bit_ctrl_reg(struct e1000_hw *hw, u32 reg, u32 offset,
sys/dev/e1000/e1000_api.c
613
void e1000_write_vfta(struct e1000_hw *hw, u32 offset, u32 value)
sys/dev/e1000/e1000_api.c
629
u32 mc_addr_count)
sys/dev/e1000/e1000_api.c
907
int e1000_rar_set(struct e1000_hw *hw, u8 *addr, u32 index)
sys/dev/e1000/e1000_api.c
938
u32 e1000_hash_mc_addr(struct e1000_hw *hw, u8 *mc_addr)
sys/dev/e1000/e1000_api.h
100
s32 e1000_read_pba_string(struct e1000_hw *hw, u8 *pba_num, u32 pba_num_size);
sys/dev/e1000/e1000_api.h
101
s32 e1000_read_pba_length(struct e1000_hw *hw, u32 *pba_num_size);
sys/dev/e1000/e1000_api.h
106
s32 e1000_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data);
sys/dev/e1000/e1000_api.h
107
s32 e1000_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data);
sys/dev/e1000/e1000_api.h
119
u32 e1000_translate_register_82542(u32 reg);
sys/dev/e1000/e1000_api.h
53
s32 e1000_set_obff_timer(struct e1000_hw *hw, u32 itr);
sys/dev/e1000/e1000_api.h
62
void e1000_write_vfta(struct e1000_hw *hw, u32 offset, u32 value);
sys/dev/e1000/e1000_api.h
71
int e1000_rar_set(struct e1000_hw *hw, u8 *addr, u32 index);
sys/dev/e1000/e1000_api.h
72
u32 e1000_hash_mc_addr(struct e1000_hw *hw, u8 *mc_addr);
sys/dev/e1000/e1000_api.h
74
u32 mc_addr_count);
sys/dev/e1000/e1000_api.h
86
s32 e1000_read_phy_reg(struct e1000_hw *hw, u32 offset, u16 *data);
sys/dev/e1000/e1000_api.h
87
s32 e1000_write_phy_reg(struct e1000_hw *hw, u32 offset, u16 data);
sys/dev/e1000/e1000_api.h
88
s32 e1000_write_8bit_ctrl_reg(struct e1000_hw *hw, u32 reg, u32 offset,
sys/dev/e1000/e1000_api.h
99
s32 e1000_read_pba_num(struct e1000_hw *hw, u32 *part_num);
sys/dev/e1000/e1000_base.c
155
u32 rctl, rlpml, rxdctl[4], rfctl, temp_rctl, rx_enabled;
sys/dev/e1000/e1000_hw.h
1026
u32 mtu;
sys/dev/e1000/e1000_hw.h
1033
u32 vf_number;
sys/dev/e1000/e1000_hw.h
1034
u32 v2p_mailbox;
sys/dev/e1000/e1000_hw.h
1083
s32 e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value);
sys/dev/e1000/e1000_hw.h
1084
s32 e1000_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value);
sys/dev/e1000/e1000_hw.h
1085
void e1000_read_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value);
sys/dev/e1000/e1000_hw.h
1086
void e1000_write_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value);
sys/dev/e1000/e1000_hw.h
427
#define __le32 u32
sys/dev/e1000/e1000_hw.h
666
u32 last_gprc;
sys/dev/e1000/e1000_hw.h
667
u32 last_gptc;
sys/dev/e1000/e1000_hw.h
668
u32 last_gorc;
sys/dev/e1000/e1000_hw.h
669
u32 last_gotc;
sys/dev/e1000/e1000_hw.h
670
u32 last_mprc;
sys/dev/e1000/e1000_hw.h
671
u32 last_gotlbc;
sys/dev/e1000/e1000_hw.h
672
u32 last_gptlbc;
sys/dev/e1000/e1000_hw.h
673
u32 last_gorlbc;
sys/dev/e1000/e1000_hw.h
674
u32 last_gprlbc;
sys/dev/e1000/e1000_hw.h
688
u32 idle_errors;
sys/dev/e1000/e1000_hw.h
689
u32 receive_errors;
sys/dev/e1000/e1000_hw.h
693
u32 signature;
sys/dev/e1000/e1000_hw.h
697
u32 reserved1;
sys/dev/e1000/e1000_hw.h
753
void (*update_mc_addr_list)(struct e1000_hw *, u8 *, u32);
sys/dev/e1000/e1000_hw.h
761
void (*write_vfta)(struct e1000_hw *, u32, u32);
sys/dev/e1000/e1000_hw.h
763
int (*rar_set)(struct e1000_hw *, u8*, u32);
sys/dev/e1000/e1000_hw.h
766
s32 (*set_obff_timer)(struct e1000_hw *, u32);
sys/dev/e1000/e1000_hw.h
797
s32 (*read_reg)(struct e1000_hw *, u32, u16 *);
sys/dev/e1000/e1000_hw.h
798
s32 (*read_reg_locked)(struct e1000_hw *, u32, u16 *);
sys/dev/e1000/e1000_hw.h
799
s32 (*read_reg_page)(struct e1000_hw *, u32, u16 *);
sys/dev/e1000/e1000_hw.h
804
s32 (*write_reg)(struct e1000_hw *, u32, u16);
sys/dev/e1000/e1000_hw.h
805
s32 (*write_reg_locked)(struct e1000_hw *, u32, u16);
sys/dev/e1000/e1000_hw.h
806
s32 (*write_reg_page)(struct e1000_hw *, u32, u16);
sys/dev/e1000/e1000_hw.h
833
u32 collision_delta;
sys/dev/e1000/e1000_hw.h
834
u32 ledctl_default;
sys/dev/e1000/e1000_hw.h
835
u32 ledctl_mode1;
sys/dev/e1000/e1000_hw.h
836
u32 ledctl_mode2;
sys/dev/e1000/e1000_hw.h
837
u32 mc_filter_type;
sys/dev/e1000/e1000_hw.h
838
u32 tx_packet_delta;
sys/dev/e1000/e1000_hw.h
839
u32 txcw;
sys/dev/e1000/e1000_hw.h
851
u32 mta_shadow[MAX_MTA_REG];
sys/dev/e1000/e1000_hw.h
868
u32 max_frame_size;
sys/dev/e1000/e1000_hw.h
882
u32 addr;
sys/dev/e1000/e1000_hw.h
883
u32 id;
sys/dev/e1000/e1000_hw.h
884
u32 reset_delay_us; /* in usec */
sys/dev/e1000/e1000_hw.h
885
u32 revision;
sys/dev/e1000/e1000_hw.h
909
u32 flash_bank_size;
sys/dev/e1000/e1000_hw.h
910
u32 flash_base_addr;
sys/dev/e1000/e1000_hw.h
929
u32 high_water; /* Flow control high-water mark */
sys/dev/e1000/e1000_hw.h
930
u32 low_water; /* Flow control low-water mark */
sys/dev/e1000/e1000_hw.h
941
s32 (*read)(struct e1000_hw *, u32 *, u16, u16);
sys/dev/e1000/e1000_hw.h
942
s32 (*write)(struct e1000_hw *, u32 *, u16, u16);
sys/dev/e1000/e1000_hw.h
943
s32 (*read_posted)(struct e1000_hw *, u32 *, u16, u16);
sys/dev/e1000/e1000_hw.h
944
s32 (*write_posted)(struct e1000_hw *, u32 *, u16, u16);
sys/dev/e1000/e1000_hw.h
951
u32 msgs_tx;
sys/dev/e1000/e1000_hw.h
952
u32 msgs_rx;
sys/dev/e1000/e1000_hw.h
954
u32 acks;
sys/dev/e1000/e1000_hw.h
955
u32 reqs;
sys/dev/e1000/e1000_hw.h
956
u32 rsts;
sys/dev/e1000/e1000_hw.h
962
u32 timeout;
sys/dev/e1000/e1000_hw.h
963
u32 usec_delay;
sys/dev/e1000/e1000_hw.h
979
u32 tbi_compatibility;
sys/dev/e1000/e1000_hw.h
986
u32 smb_counter;
sys/dev/e1000/e1000_i210.c
179
u32 i, k, eewr = 0;
sys/dev/e1000/e1000_i210.c
180
u32 attempts = 100000;
sys/dev/e1000/e1000_i210.c
235
u32 invm_dword;
sys/dev/e1000/e1000_i210.c
357
u32 *record = NULL;
sys/dev/e1000/e1000_i210.c
358
u32 *next_record = NULL;
sys/dev/e1000/e1000_i210.c
359
u32 i = 0;
sys/dev/e1000/e1000_i210.c
360
u32 invm_dword = 0;
sys/dev/e1000/e1000_i210.c
361
u32 invm_blocks = E1000_INVM_SIZE - (E1000_INVM_ULT_BYTES_SIZE /
sys/dev/e1000/e1000_i210.c
363
u32 buffer[E1000_INVM_SIZE];
sys/dev/e1000/e1000_i210.c
553
u32 eec = 0;
sys/dev/e1000/e1000_i210.c
574
u32 flup;
sys/dev/e1000/e1000_i210.c
605
u32 i, reg;
sys/dev/e1000/e1000_i210.c
711
u32 wuc, mdicnfg, ctrl, ctrl_ext, reg_val;
sys/dev/e1000/e1000_i210.c
788
u32 mask = E1000_NVM_CFG_DONE_PORT_0;
sys/dev/e1000/e1000_ich8lan.c
1023
u32 fextnvm6 = E1000_READ_REG(hw, E1000_FEXTNVM6);
sys/dev/e1000/e1000_ich8lan.c
1024
u32 status = E1000_READ_REG(hw, E1000_STATUS);
sys/dev/e1000/e1000_ich8lan.c
1102
u32 value, scale;
sys/dev/e1000/e1000_ich8lan.c
1132
u32 reg = link << (E1000_LTRV_REQ_SHIFT + E1000_LTRV_NOSNOOP_SHIFT) |
sys/dev/e1000/e1000_ich8lan.c
1145
u32 rxa;
sys/dev/e1000/e1000_ich8lan.c
123
static s32 e1000_erase_flash_bank_ich8lan(struct e1000_hw *hw, u32 bank);
sys/dev/e1000/e1000_ich8lan.c
1238
static s32 e1000_set_obff_timer_pch_lpt(struct e1000_hw *hw, u32 itr)
sys/dev/e1000/e1000_ich8lan.c
1240
u32 svcr;
sys/dev/e1000/e1000_ich8lan.c
127
u32 offset, u8 *data);
sys/dev/e1000/e1000_ich8lan.c
1274
u32 mac_reg;
sys/dev/e1000/e1000_ich8lan.c
128
static s32 e1000_read_flash_data_ich8lan(struct e1000_hw *hw, u32 offset,
sys/dev/e1000/e1000_ich8lan.c
130
static s32 e1000_read_flash_data32_ich8lan(struct e1000_hw *hw, u32 offset,
sys/dev/e1000/e1000_ich8lan.c
131
u32 *data);
sys/dev/e1000/e1000_ich8lan.c
133
u32 offset, u32 *data);
sys/dev/e1000/e1000_ich8lan.c
135
u32 offset, u32 data);
sys/dev/e1000/e1000_ich8lan.c
137
u32 offset, u32 dword);
sys/dev/e1000/e1000_ich8lan.c
139
u32 offset, u16 *data);
sys/dev/e1000/e1000_ich8lan.c
141
u32 offset, u8 byte);
sys/dev/e1000/e1000_ich8lan.c
1423
u32 mac_reg;
sys/dev/e1000/e1000_ich8lan.c
148
static s32 e1000_set_obff_timer_pch_lpt(struct e1000_hw *hw, u32 itr);
sys/dev/e1000/e1000_ich8lan.c
1707
u32 mac_reg;
sys/dev/e1000/e1000_ich8lan.c
1737
u32 fextnvm6 = E1000_READ_REG(hw, E1000_FEXTNVM6);
sys/dev/e1000/e1000_ich8lan.c
1741
u32 pcieanacfg = E1000_READ_REG(hw, E1000_PCIEANACFG);
sys/dev/e1000/e1000_ich8lan.c
183
u32 grra:8; /* 0:7 GbE region Read Access */
sys/dev/e1000/e1000_ich8lan.c
184
u32 grwa:8; /* 8:15 GbE region Write Access */
sys/dev/e1000/e1000_ich8lan.c
185
u32 gmrag:8; /* 23:16 GbE Master Read Access Grant */
sys/dev/e1000/e1000_ich8lan.c
186
u32 gmwag:8; /* 31:24 GbE Master Write Access Grant */
sys/dev/e1000/e1000_ich8lan.c
1901
u32 extcnf_ctrl, timeout = PHY_CFG_TIMEOUT;
sys/dev/e1000/e1000_ich8lan.c
1959
u32 extcnf_ctrl;
sys/dev/e1000/e1000_ich8lan.c
1983
u32 fwsm;
sys/dev/e1000/e1000_ich8lan.c
2004
u32 fwsm;
sys/dev/e1000/e1000_ich8lan.c
2025
static int e1000_rar_set_pch2lan(struct e1000_hw *hw, u8 *addr, u32 index)
sys/dev/e1000/e1000_ich8lan.c
2027
u32 rar_low, rar_high;
sys/dev/e1000/e1000_ich8lan.c
2034
rar_low = ((u32) addr[0] |
sys/dev/e1000/e1000_ich8lan.c
2035
((u32) addr[1] << 8) |
sys/dev/e1000/e1000_ich8lan.c
2036
((u32) addr[2] << 16) | ((u32) addr[3] << 24));
sys/dev/e1000/e1000_ich8lan.c
2038
rar_high = ((u32) addr[4] | ((u32) addr[5] << 8));
sys/dev/e1000/e1000_ich8lan.c
204
u32 phy_id = 0;
sys/dev/e1000/e1000_ich8lan.c
2055
if (index < (u32) (hw->mac.rar_entry_count)) {
sys/dev/e1000/e1000_ich8lan.c
207
u32 mac_reg = 0;
sys/dev/e1000/e1000_ich8lan.c
2094
static int e1000_rar_set_pch_lpt(struct e1000_hw *hw, u8 *addr, u32 index)
sys/dev/e1000/e1000_ich8lan.c
2096
u32 rar_low, rar_high;
sys/dev/e1000/e1000_ich8lan.c
2097
u32 wlock_mac;
sys/dev/e1000/e1000_ich8lan.c
2104
rar_low = ((u32) addr[0] | ((u32) addr[1] << 8) |
sys/dev/e1000/e1000_ich8lan.c
2105
((u32) addr[2] << 16) | ((u32) addr[3] << 24));
sys/dev/e1000/e1000_ich8lan.c
2107
rar_high = ((u32) addr[4] | ((u32) addr[5] << 8));
sys/dev/e1000/e1000_ich8lan.c
213
phy_id = (u32)(phy_reg << 16);
sys/dev/e1000/e1000_ich8lan.c
2173
u32 mc_addr_count)
sys/dev/e1000/e1000_ich8lan.c
220
phy_id |= (u32)(phy_reg & PHY_REVISION_MASK);
sys/dev/e1000/e1000_ich8lan.c
2216
u32 fwsm;
sys/dev/e1000/e1000_ich8lan.c
2244
u32 strap = E1000_READ_REG(hw, E1000_STRAP);
sys/dev/e1000/e1000_ich8lan.c
2245
u32 freq = (strap & E1000_STRAP_SMT_FREQ_MASK) >>
sys/dev/e1000/e1000_ich8lan.c
2285
u32 i, data, cnf_size, cnf_base_addr, sw_cfg_mask;
sys/dev/e1000/e1000_ich8lan.c
229
hw->phy.revision = (u32)(phy_reg & ~PHY_REVISION_MASK);
sys/dev/e1000/e1000_ich8lan.c
2392
ret_val = phy->ops.write_reg_locked(hw, (u32)reg_addr,
sys/dev/e1000/e1000_ich8lan.c
2498
u32 ctrl_reg = 0;
sys/dev/e1000/e1000_ich8lan.c
2499
u32 ctrl_ext = 0;
sys/dev/e1000/e1000_ich8lan.c
2500
u32 reg = 0;
sys/dev/e1000/e1000_ich8lan.c
2551
u32 mac_reg;
sys/dev/e1000/e1000_ich8lan.c
2727
u32 mac_reg;
sys/dev/e1000/e1000_ich8lan.c
275
u32 mac_reg;
sys/dev/e1000/e1000_ich8lan.c
2762
static u32 e1000_calc_rx_da_crc(u8 mac[])
sys/dev/e1000/e1000_ich8lan.c
2764
u32 poly = 0xEDB88320; /* Polynomial for 802.3 CRC calculation */
sys/dev/e1000/e1000_ich8lan.c
2765
u32 i, j, mask, crc;
sys/dev/e1000/e1000_ich8lan.c
2790
u32 mac_reg;
sys/dev/e1000/e1000_ich8lan.c
2811
u32 addr_high, addr_low;
sys/dev/e1000/e1000_ich8lan.c
3028
u32 mac_reg;
sys/dev/e1000/e1000_ich8lan.c
3049
u32 extcnf_ctrl;
sys/dev/e1000/e1000_ich8lan.c
3075
u32 data, loop = E1000_ICH8_LAN_INIT_TIMEOUT;
sys/dev/e1000/e1000_ich8lan.c
319
u32 mac_reg, fwsm = E1000_READ_REG(hw, E1000_FWSM);
sys/dev/e1000/e1000_ich8lan.c
3242
u32 phy_ctrl;
sys/dev/e1000/e1000_ich8lan.c
3338
u32 phy_ctrl;
sys/dev/e1000/e1000_ich8lan.c
3424
static s32 e1000_valid_nvm_bank_detect_ich8lan(struct e1000_hw *hw, u32 *bank)
sys/dev/e1000/e1000_ich8lan.c
3426
u32 eecd;
sys/dev/e1000/e1000_ich8lan.c
3428
u32 bank1_offset = nvm->flash_bank_size * sizeof(u16);
sys/dev/e1000/e1000_ich8lan.c
3429
u32 act_offset = E1000_ICH_NVM_SIG_WORD * 2 + 1;
sys/dev/e1000/e1000_ich8lan.c
3430
u32 nvm_dword = 0;
sys/dev/e1000/e1000_ich8lan.c
3536
u32 act_offset;
sys/dev/e1000/e1000_ich8lan.c
3538
u32 bank = 0;
sys/dev/e1000/e1000_ich8lan.c
3539
u32 dword = 0;
sys/dev/e1000/e1000_ich8lan.c
3631
u32 act_offset;
sys/dev/e1000/e1000_ich8lan.c
3633
u32 bank = 0;
sys/dev/e1000/e1000_ich8lan.c
3772
static s32 e1000_flash_cycle_ich8lan(struct e1000_hw *hw, u32 timeout)
sys/dev/e1000/e1000_ich8lan.c
3776
u32 i = 0;
sys/dev/e1000/e1000_ich8lan.c
3816
static s32 e1000_read_flash_dword_ich8lan(struct e1000_hw *hw, u32 offset,
sys/dev/e1000/e1000_ich8lan.c
3817
u32 *data)
sys/dev/e1000/e1000_ich8lan.c
3839
static s32 e1000_read_flash_word_ich8lan(struct e1000_hw *hw, u32 offset,
sys/dev/e1000/e1000_ich8lan.c
3861
static s32 e1000_read_flash_byte_ich8lan(struct e1000_hw *hw, u32 offset,
sys/dev/e1000/e1000_ich8lan.c
3892
static s32 e1000_read_flash_data_ich8lan(struct e1000_hw *hw, u32 offset,
sys/dev/e1000/e1000_ich8lan.c
3897
u32 flash_linear_addr;
sys/dev/e1000/e1000_ich8lan.c
3898
u32 flash_data = 0;
sys/dev/e1000/e1000_ich8lan.c
3967
static s32 e1000_read_flash_data32_ich8lan(struct e1000_hw *hw, u32 offset,
sys/dev/e1000/e1000_ich8lan.c
3968
u32 *data)
sys/dev/e1000/e1000_ich8lan.c
3972
u32 flash_linear_addr;
sys/dev/e1000/e1000_ich8lan.c
3996
hsflctl.hsf_ctrl.fldbcount = sizeof(u32) - 1;
sys/dev/e1000/e1000_ich8lan.c
4002
(u32)hsflctl.regval << 16);
sys/dev/e1000/e1000_ich8lan.c
4088
u32 i, act_offset, new_bank_offset, old_bank_offset, bank;
sys/dev/e1000/e1000_ich8lan.c
4090
u32 dword = 0;
sys/dev/e1000/e1000_ich8lan.c
4250
u32 i, act_offset, new_bank_offset, old_bank_offset, bank;
sys/dev/e1000/e1000_ich8lan.c
4453
static s32 e1000_write_flash_data_ich8lan(struct e1000_hw *hw, u32 offset,
sys/dev/e1000/e1000_ich8lan.c
4458
u32 flash_linear_addr;
sys/dev/e1000/e1000_ich8lan.c
4459
u32 flash_data = 0;
sys/dev/e1000/e1000_ich8lan.c
4509
flash_data = (u32)data & 0x00FF;
sys/dev/e1000/e1000_ich8lan.c
4511
flash_data = (u32)data;
sys/dev/e1000/e1000_ich8lan.c
4550
static s32 e1000_write_flash_data32_ich8lan(struct e1000_hw *hw, u32 offset,
sys/dev/e1000/e1000_ich8lan.c
4551
u32 data)
sys/dev/e1000/e1000_ich8lan.c
4555
u32 flash_linear_addr;
sys/dev/e1000/e1000_ich8lan.c
4585
hsflctl.hsf_ctrl.fldbcount = sizeof(u32) - 1;
sys/dev/e1000/e1000_ich8lan.c
4639
static s32 e1000_write_flash_byte_ich8lan(struct e1000_hw *hw, u32 offset,
sys/dev/e1000/e1000_ich8lan.c
4659
u32 offset, u32 dword)
sys/dev/e1000/e1000_ich8lan.c
4696
u32 offset, u8 byte)
sys/dev/e1000/e1000_ich8lan.c
4728
static s32 e1000_erase_flash_bank_ich8lan(struct e1000_hw *hw, u32 bank)
sys/dev/e1000/e1000_ich8lan.c
4733
u32 flash_linear_addr;
sys/dev/e1000/e1000_ich8lan.c
4735
u32 flash_bank_size = nvm->flash_bank_size * 2;
sys/dev/e1000/e1000_ich8lan.c
4784
u32 timeout = ICH_FLASH_ERASE_COMMAND_TIMEOUT;
sys/dev/e1000/e1000_ich8lan.c
4884
const u32 ledctl_on = E1000_LEDCTL_MODE_LINK_UP;
sys/dev/e1000/e1000_ich8lan.c
4885
const u32 ledctl_off = E1000_LEDCTL_MODE_LINK_UP | E1000_PHY_LED0_IVRT;
sys/dev/e1000/e1000_ich8lan.c
4979
u32 ctrl, reg;
sys/dev/e1000/e1000_ich8lan.c
5115
u32 ctrl_ext, txdctl, snoop;
sys/dev/e1000/e1000_ich8lan.c
5173
snoop = (u32) ~(PCIE_NO_SNOOP_ALL);
sys/dev/e1000/e1000_ich8lan.c
5206
u32 reg;
sys/dev/e1000/e1000_ich8lan.c
5343
u32 ctrl;
sys/dev/e1000/e1000_ich8lan.c
5434
u32 ctrl;
sys/dev/e1000/e1000_ich8lan.c
5499
u32 phy_ctrl;
sys/dev/e1000/e1000_ich8lan.c
5587
u32 reg;
sys/dev/e1000/e1000_ich8lan.c
5682
u32 phy_ctrl;
sys/dev/e1000/e1000_ich8lan.c
5698
u32 fextnvm6 = E1000_READ_REG(hw, E1000_FEXTNVM6);
sys/dev/e1000/e1000_ich8lan.c
5813
u32 e1000_resume_workarounds_pchlan(struct e1000_hw *hw)
sys/dev/e1000/e1000_ich8lan.c
5968
u32 i, led;
sys/dev/e1000/e1000_ich8lan.c
6000
u32 i, led;
sys/dev/e1000/e1000_ich8lan.c
6038
u32 bank = 0;
sys/dev/e1000/e1000_ich8lan.c
6039
u32 status;
sys/dev/e1000/e1000_ich8lan.c
648
u32 gfpreg, sector_base_addr, sector_end_addr;
sys/dev/e1000/e1000_ich8lan.c
650
u32 nvm_size;
sys/dev/e1000/e1000_ich8lan.c
81
static int e1000_rar_set_pch2lan(struct e1000_hw *hw, u8 *addr, u32 index);
sys/dev/e1000/e1000_ich8lan.c
82
static int e1000_rar_set_pch_lpt(struct e1000_hw *hw, u8 *addr, u32 index);
sys/dev/e1000/e1000_ich8lan.c
86
u32 mc_addr_count);
sys/dev/e1000/e1000_ich8lan.h
337
u32 e1000_resume_workarounds_pchlan(struct e1000_hw *hw);
sys/dev/e1000/e1000_mac.c
1068
u32 txcw;
sys/dev/e1000/e1000_mac.c
1137
u32 i, status;
sys/dev/e1000/e1000_mac.c
1185
u32 ctrl;
sys/dev/e1000/e1000_mac.c
1236
u32 tctl;
sys/dev/e1000/e1000_mac.c
1259
u32 fcrtl = 0, fcrth = 0;
sys/dev/e1000/e1000_mac.c
1298
u32 ctrl;
sys/dev/e1000/e1000_mac.c
133
u8 E1000_UNUSEDARG *h, u32 E1000_UNUSEDARG a)
sys/dev/e1000/e1000_mac.c
1362
u32 pcs_status_reg, pcs_adv_reg, pcs_lp_ability_reg, pcs_ctrl_reg;
sys/dev/e1000/e1000_mac.c
146
u32 E1000_UNUSEDARG a, u32 E1000_UNUSEDARG b)
sys/dev/e1000/e1000_mac.c
159
u8 E1000_UNUSEDARG *h, u32 E1000_UNUSEDARG a)
sys/dev/e1000/e1000_mac.c
1669
u32 status;
sys/dev/e1000/e1000_mac.c
170
u32 E1000_UNUSEDARG a)
sys/dev/e1000/e1000_mac.c
1778
const u32 ledctl_mask = 0x000000FF;
sys/dev/e1000/e1000_mac.c
1779
const u32 ledctl_on = E1000_LEDCTL_MODE_LED_ON;
sys/dev/e1000/e1000_mac.c
1780
const u32 ledctl_off = E1000_LEDCTL_MODE_LED_OFF;
sys/dev/e1000/e1000_mac.c
1844
u32 ledctl;
sys/dev/e1000/e1000_mac.c
188
u32 status = E1000_READ_REG(hw, E1000_STATUS);
sys/dev/e1000/e1000_mac.c
1890
u32 ledctl_blink = 0;
sys/dev/e1000/e1000_mac.c
1891
u32 i;
sys/dev/e1000/e1000_mac.c
1908
u32 mode = (hw->mac.ledctl_mode2 >> i) &
sys/dev/e1000/e1000_mac.c
1910
u32 led_default = hw->mac.ledctl_default >> i;
sys/dev/e1000/e1000_mac.c
1937
u32 ctrl;
sys/dev/e1000/e1000_mac.c
1966
u32 ctrl;
sys/dev/e1000/e1000_mac.c
1994
void e1000_set_pcie_no_snoop_generic(struct e1000_hw *hw, u32 no_snoop)
sys/dev/e1000/e1000_mac.c
1996
u32 gcr;
sys/dev/e1000/e1000_mac.c
2024
u32 ctrl;
sys/dev/e1000/e1000_mac.c
2166
s32 e1000_write_8bit_ctrl_reg_generic(struct e1000_hw *hw, u32 reg,
sys/dev/e1000/e1000_mac.c
2167
u32 offset, u8 data)
sys/dev/e1000/e1000_mac.c
2169
u32 i, regvalue = 0;
sys/dev/e1000/e1000_mac.c
2174
regvalue = ((u32)data) | (offset << E1000_GEN_CTL_ADDRESS_SHIFT);
sys/dev/e1000/e1000_mac.c
2200
u32 swsm;
sys/dev/e1000/e1000_mac.c
2279
u32 swsm;
sys/dev/e1000/e1000_mac.c
2302
u32 swfw_sync;
sys/dev/e1000/e1000_mac.c
2303
u32 swmask = mask;
sys/dev/e1000/e1000_mac.c
2304
u32 fwmask = mask << 16;
sys/dev/e1000/e1000_mac.c
2355
u32 swfw_sync;
sys/dev/e1000/e1000_mac.c
2363
swfw_sync &= (u32)~mask;
sys/dev/e1000/e1000_mac.c
288
u32 reg;
sys/dev/e1000/e1000_mac.c
307
u32 status;
sys/dev/e1000/e1000_mac.c
341
u32 offset;
sys/dev/e1000/e1000_mac.c
360
void e1000_write_vfta_generic(struct e1000_hw *hw, u32 offset, u32 value)
sys/dev/e1000/e1000_mac.c
379
u32 i;
sys/dev/e1000/e1000_mac.c
409
u32 i;
sys/dev/e1000/e1000_mac.c
485
int e1000_rar_set_generic(struct e1000_hw *hw, u8 *addr, u32 index)
sys/dev/e1000/e1000_mac.c
487
u32 rar_low, rar_high;
sys/dev/e1000/e1000_mac.c
494
rar_low = ((u32) addr[0] | ((u32) addr[1] << 8) |
sys/dev/e1000/e1000_mac.c
495
((u32) addr[2] << 16) | ((u32) addr[3] << 24));
sys/dev/e1000/e1000_mac.c
497
rar_high = ((u32) addr[4] | ((u32) addr[5] << 8));
sys/dev/e1000/e1000_mac.c
523
u32 e1000_hash_mc_addr_generic(struct e1000_hw *hw, u8 *mc_addr)
sys/dev/e1000/e1000_mac.c
525
u32 hash_value, hash_mask;
sys/dev/e1000/e1000_mac.c
595
u8 *mc_addr_list, u32 mc_addr_count)
sys/dev/e1000/e1000_mac.c
597
u32 hash_value, hash_bit, hash_reg;
sys/dev/e1000/e1000_mac.c
606
for (i = 0; (u32) i < mc_addr_count; i++) {
sys/dev/e1000/e1000_mac.c
784
u32 rxcw;
sys/dev/e1000/e1000_mac.c
785
u32 ctrl;
sys/dev/e1000/e1000_mac.c
786
u32 status;
sys/dev/e1000/e1000_mac.c
851
u32 rxcw;
sys/dev/e1000/e1000_mac.c
852
u32 ctrl;
sys/dev/e1000/e1000_mac.c
853
u32 status;
sys/dev/e1000/e1000_mac.h
44
void e1000_null_update_mc(struct e1000_hw *hw, u8 *h, u32 a);
sys/dev/e1000/e1000_mac.h
45
void e1000_null_write_vfta(struct e1000_hw *hw, u32 a, u32 b);
sys/dev/e1000/e1000_mac.h
46
int e1000_null_rar_set(struct e1000_hw *hw, u8 *h, u32 a);
sys/dev/e1000/e1000_mac.h
47
s32 e1000_null_set_obff_timer(struct e1000_hw *hw, u32 a);
sys/dev/e1000/e1000_mac.h
71
u8 *mc_addr_list, u32 mc_addr_count);
sys/dev/e1000/e1000_mac.h
72
int e1000_rar_set_generic(struct e1000_hw *hw, u8 *addr, u32 index);
sys/dev/e1000/e1000_mac.h
79
s32 e1000_write_8bit_ctrl_reg_generic(struct e1000_hw *hw, u32 reg,
sys/dev/e1000/e1000_mac.h
80
u32 offset, u8 data);
sys/dev/e1000/e1000_mac.h
82
u32 e1000_hash_mc_addr_generic(struct e1000_hw *hw, u8 *mc_addr);
sys/dev/e1000/e1000_mac.h
90
void e1000_set_pcie_no_snoop_generic(struct e1000_hw *hw, u32 no_snoop);
sys/dev/e1000/e1000_mac.h
92
void e1000_write_vfta_generic(struct e1000_hw *hw, u32 offset, u32 value);
sys/dev/e1000/e1000_manage.c
115
u32 fwsm = E1000_READ_REG(hw, E1000_FWSM);
sys/dev/e1000/e1000_manage.c
134
u32 *buffer = (u32 *)&hw->mng_cookie;
sys/dev/e1000/e1000_manage.c
135
u32 offset;
sys/dev/e1000/e1000_manage.c
206
*((u32 *) hdr + i));
sys/dev/e1000/e1000_manage.c
230
u32 data = 0;
sys/dev/e1000/e1000_manage.c
246
for (j = prev_bytes; j < sizeof(u32); j++) {
sys/dev/e1000/e1000_manage.c
265
for (j = 0; j < sizeof(u32); j++) {
sys/dev/e1000/e1000_manage.c
274
for (j = 0; j < sizeof(u32); j++) {
sys/dev/e1000/e1000_manage.c
302
u32 hicr;
sys/dev/e1000/e1000_manage.c
344
u32 manc;
sys/dev/e1000/e1000_manage.c
345
u32 fwsm, factps;
sys/dev/e1000/e1000_manage.c
396
s32 e1000_host_interface_command(struct e1000_hw *hw, u8 *buffer, u32 length)
sys/dev/e1000/e1000_manage.c
398
u32 hicr, i;
sys/dev/e1000/e1000_manage.c
433
*((u32 *)buffer + i));
sys/dev/e1000/e1000_manage.c
453
*((u32 *)buffer + i) = E1000_READ_REG_ARRAY_DWORD(hw,
sys/dev/e1000/e1000_manage.c
46
u8 e1000_calculate_checksum(u8 *buffer, u32 length)
sys/dev/e1000/e1000_manage.c
470
s32 e1000_load_firmware(struct e1000_hw *hw, u8 *buffer, u32 length)
sys/dev/e1000/e1000_manage.c
472
u32 hicr, hibba, fwsm, icr, i;
sys/dev/e1000/e1000_manage.c
48
u32 i;
sys/dev/e1000/e1000_manage.c
556
*((u32 *)buffer + i));
sys/dev/e1000/e1000_manage.c
74
u32 hicr;
sys/dev/e1000/e1000_manage.h
48
u8 e1000_calculate_checksum(u8 *buffer, u32 length);
sys/dev/e1000/e1000_manage.h
49
s32 e1000_host_interface_command(struct e1000_hw *hw, u8 *buffer, u32 length);
sys/dev/e1000/e1000_manage.h
50
s32 e1000_load_firmware(struct e1000_hw *hw, u8 *buffer, u32 length);
sys/dev/e1000/e1000_mbx.c
102
s32 e1000_write_mbx(struct e1000_hw *hw, u32 *msg, u16 size, u16 mbx_id)
sys/dev/e1000/e1000_mbx.c
250
s32 e1000_read_posted_mbx(struct e1000_hw *hw, u32 *msg, u16 size, u16 mbx_id)
sys/dev/e1000/e1000_mbx.c
279
s32 e1000_write_posted_mbx(struct e1000_hw *hw, u32 *msg, u16 size, u16 mbx_id)
sys/dev/e1000/e1000_mbx.c
326
static u32 e1000_read_v2p_mailbox(struct e1000_hw *hw)
sys/dev/e1000/e1000_mbx.c
328
u32 v2p_mailbox = E1000_READ_REG(hw, E1000_V2PMAILBOX(0));
sys/dev/e1000/e1000_mbx.c
344
static s32 e1000_check_for_bit_vf(struct e1000_hw *hw, u32 mask)
sys/dev/e1000/e1000_mbx.c
346
u32 v2p_mailbox = e1000_read_v2p_mailbox(hw);
sys/dev/e1000/e1000_mbx.c
461
static s32 e1000_write_mbx_vf(struct e1000_hw *hw, u32 *msg, u16 size,
sys/dev/e1000/e1000_mbx.c
502
static s32 e1000_read_mbx_vf(struct e1000_hw *hw, u32 *msg, u16 size,
sys/dev/e1000/e1000_mbx.c
563
static s32 e1000_check_for_bit_pf(struct e1000_hw *hw, u32 mask)
sys/dev/e1000/e1000_mbx.c
565
u32 mbvficr = E1000_READ_REG(hw, E1000_MBVFICR);
sys/dev/e1000/e1000_mbx.c
58
u32 E1000_UNUSEDARG *msg,
sys/dev/e1000/e1000_mbx.c
627
u32 vflre = E1000_READ_REG(hw, E1000_VFLRE);
sys/dev/e1000/e1000_mbx.c
651
u32 p2v_mailbox;
sys/dev/e1000/e1000_mbx.c
683
static s32 e1000_write_mbx_pf(struct e1000_hw *hw, u32 *msg, u16 size,
sys/dev/e1000/e1000_mbx.c
726
static s32 e1000_read_mbx_pf(struct e1000_hw *hw, u32 *msg, u16 size,
sys/dev/e1000/e1000_mbx.c
76
s32 e1000_read_mbx(struct e1000_hw *hw, u32 *msg, u16 size, u16 mbx_id)
sys/dev/e1000/e1000_mbx.h
95
s32 e1000_read_mbx(struct e1000_hw *, u32 *, u16, u16);
sys/dev/e1000/e1000_mbx.h
96
s32 e1000_write_mbx(struct e1000_hw *, u32 *, u16, u16);
sys/dev/e1000/e1000_mbx.h
97
s32 e1000_read_posted_mbx(struct e1000_hw *, u32 *, u16, u16);
sys/dev/e1000/e1000_mbx.h
98
s32 e1000_write_posted_mbx(struct e1000_hw *, u32 *, u16, u16);
sys/dev/e1000/e1000_nvm.c
1033
if (eeprom_buf_size > (u32)(pba->word[1] +
sys/dev/e1000/e1000_nvm.c
1059
u32 eeprom_buf_size, struct e1000_pba *pba)
sys/dev/e1000/e1000_nvm.c
1091
if (eeprom_buf_size > (u32)(pba->word[1] +
sys/dev/e1000/e1000_nvm.c
1118
u32 eeprom_buf_size, u16 *pba_block_size)
sys/dev/e1000/e1000_nvm.c
1175
u32 rar_high;
sys/dev/e1000/e1000_nvm.c
1176
u32 rar_low;
sys/dev/e1000/e1000_nvm.c
121
static void e1000_raise_eec_clk(struct e1000_hw *hw, u32 *eecd)
sys/dev/e1000/e1000_nvm.c
1267
u32 ctrl_ext;
sys/dev/e1000/e1000_nvm.c
136
static void e1000_lower_eec_clk(struct e1000_hw *hw, u32 *eecd)
sys/dev/e1000/e1000_nvm.c
157
u32 eecd = E1000_READ_REG(hw, E1000_EECD);
sys/dev/e1000/e1000_nvm.c
158
u32 mask;
sys/dev/e1000/e1000_nvm.c
203
u32 eecd;
sys/dev/e1000/e1000_nvm.c
204
u32 i;
sys/dev/e1000/e1000_nvm.c
240
u32 attempts = 100000;
sys/dev/e1000/e1000_nvm.c
241
u32 i, reg = 0;
sys/dev/e1000/e1000_nvm.c
270
u32 eecd = E1000_READ_REG(hw, E1000_EECD);
sys/dev/e1000/e1000_nvm.c
305
u32 eecd = E1000_READ_REG(hw, E1000_EECD);
sys/dev/e1000/e1000_nvm.c
345
u32 eecd;
sys/dev/e1000/e1000_nvm.c
371
u32 eecd;
sys/dev/e1000/e1000_nvm.c
391
u32 eecd = E1000_READ_REG(hw, E1000_EECD);
sys/dev/e1000/e1000_nvm.c
450
u32 i = 0;
sys/dev/e1000/e1000_nvm.c
511
u32 i = 0;
sys/dev/e1000/e1000_nvm.c
565
u32 i, eerd = 0;
sys/dev/e1000/e1000_nvm.c
695
u32 eecd;
sys/dev/e1000/e1000_nvm.c
775
u32 pba_num_size)
sys/dev/e1000/e1000_nvm.c
859
if (pba_num_size < (((u32)length * 2) - 1)) {
sys/dev/e1000/e1000_nvm.c
890
s32 e1000_read_pba_length_generic(struct e1000_hw *hw, u32 *pba_num_size)
sys/dev/e1000/e1000_nvm.c
936
*pba_num_size = ((u32)length * 2) - 1;
sys/dev/e1000/e1000_nvm.c
949
s32 e1000_read_pba_num_generic(struct e1000_hw *hw, u32 *pba_num)
sys/dev/e1000/e1000_nvm.c
964
*pba_num = (u32)(nvm_data << 16);
sys/dev/e1000/e1000_nvm.c
990
u32 eeprom_buf_size, u16 max_pba_block_size,
sys/dev/e1000/e1000_nvm.h
44
u32 etrack_id;
sys/dev/e1000/e1000_nvm.h
69
s32 e1000_read_pba_num_generic(struct e1000_hw *hw, u32 *pba_num);
sys/dev/e1000/e1000_nvm.h
71
u32 pba_num_size);
sys/dev/e1000/e1000_nvm.h
72
s32 e1000_read_pba_length_generic(struct e1000_hw *hw, u32 *pba_num_size);
sys/dev/e1000/e1000_nvm.h
74
u32 eeprom_buf_size, u16 max_pba_block_size,
sys/dev/e1000/e1000_nvm.h
77
u32 eeprom_buf_size, struct e1000_pba *pba);
sys/dev/e1000/e1000_nvm.h
79
u32 eeprom_buf_size, u16 *pba_block_size);
sys/dev/e1000/e1000_osdep.c
100
u32 offset;
sys/dev/e1000/e1000_osdep.c
54
e1000_write_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
sys/dev/e1000/e1000_osdep.c
60
e1000_read_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
sys/dev/e1000/e1000_osdep.c
83
e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
sys/dev/e1000/e1000_osdep.c
86
u32 offset;
sys/dev/e1000/e1000_osdep.c
97
e1000_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
sys/dev/e1000/e1000_osdep.h
132
#define __le32 u32
sys/dev/e1000/e1000_phy.c
1003
s32 e1000_write_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 data)
sys/dev/e1000/e1000_phy.c
122
u32 E1000_UNUSEDARG offset, u16 E1000_UNUSEDARG *data)
sys/dev/e1000/e1000_phy.c
157
u32 E1000_UNUSEDARG offset, u16 E1000_UNUSEDARG data)
sys/dev/e1000/e1000_phy.c
2027
u32 ctrl;
sys/dev/e1000/e1000_phy.c
207
u32 manc;
sys/dev/e1000/e1000_phy.c
2359
s32 e1000_phy_has_link_generic(struct e1000_hw *hw, u32 iterations,
sys/dev/e1000/e1000_phy.c
2360
u32 usec_interval, bool *success)
sys/dev/e1000/e1000_phy.c
241
phy->id = (u32)(phy_id << 16);
sys/dev/e1000/e1000_phy.c
247
phy->id |= (u32)(phy_id & PHY_REVISION_MASK);
sys/dev/e1000/e1000_phy.c
248
phy->revision = (u32)(phy_id & ~PHY_REVISION_MASK);
sys/dev/e1000/e1000_phy.c
2865
u32 ctrl;
sys/dev/e1000/e1000_phy.c
290
s32 e1000_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data)
sys/dev/e1000/e1000_phy.c
293
u32 i, mdic = 0;
sys/dev/e1000/e1000_phy.c
3000
enum e1000_phy_type e1000_get_phy_type_from_id(u32 phy_id)
sys/dev/e1000/e1000_phy.c
3069
u32 phy_addr = 0;
sys/dev/e1000/e1000_phy.c
3070
u32 i;
sys/dev/e1000/e1000_phy.c
3104
static u32 e1000_get_phy_addr_for_bm_page(u32 page, u32 reg)
sys/dev/e1000/e1000_phy.c
3106
u32 phy_addr = 2;
sys/dev/e1000/e1000_phy.c
3123
s32 e1000_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data)
sys/dev/e1000/e1000_phy.c
3126
u32 page = offset >> IGP_PAGE_SHIFT;
sys/dev/e1000/e1000_phy.c
3144
u32 page_shift, page_select;
sys/dev/e1000/e1000_phy.c
3183
s32 e1000_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data)
sys/dev/e1000/e1000_phy.c
3186
u32 page = offset >> IGP_PAGE_SHIFT;
sys/dev/e1000/e1000_phy.c
3204
u32 page_shift, page_select;
sys/dev/e1000/e1000_phy.c
3242
s32 e1000_read_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 *data)
sys/dev/e1000/e1000_phy.c
3287
s32 e1000_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data)
sys/dev/e1000/e1000_phy.c
3440
static s32 e1000_access_phy_wakeup_reg_bm(struct e1000_hw *hw, u32 offset,
sys/dev/e1000/e1000_phy.c
3544
static s32 __e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data,
sys/dev/e1000/e1000_phy.c
355
s32 e1000_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data)
sys/dev/e1000/e1000_phy.c
3550
u32 phy_addr = hw->phy.addr = e1000_get_phy_addr_for_hv_page(page);
sys/dev/e1000/e1000_phy.c
358
u32 i, mdic = 0;
sys/dev/e1000/e1000_phy.c
3610
s32 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data)
sys/dev/e1000/e1000_phy.c
3624
s32 e1000_read_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, u16 *data)
sys/dev/e1000/e1000_phy.c
3638
s32 e1000_read_phy_reg_page_hv(struct e1000_hw *hw, u32 offset, u16 *data)
sys/dev/e1000/e1000_phy.c
3654
static s32 __e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data,
sys/dev/e1000/e1000_phy.c
3660
u32 phy_addr = hw->phy.addr = e1000_get_phy_addr_for_hv_page(page);
sys/dev/e1000/e1000_phy.c
371
mdic = (((u32)data) |
sys/dev/e1000/e1000_phy.c
3736
s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data)
sys/dev/e1000/e1000_phy.c
3750
s32 e1000_write_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, u16 data)
sys/dev/e1000/e1000_phy.c
3764
s32 e1000_write_phy_reg_page_hv(struct e1000_hw *hw, u32 offset, u16 data)
sys/dev/e1000/e1000_phy.c
3773
static u32 e1000_get_phy_addr_for_hv_page(u32 page)
sys/dev/e1000/e1000_phy.c
3775
u32 phy_addr = 2;
sys/dev/e1000/e1000_phy.c
3795
static s32 e1000_access_phy_debug_regs_hv(struct e1000_hw *hw, u32 offset,
sys/dev/e1000/e1000_phy.c
3799
u32 addr_reg;
sys/dev/e1000/e1000_phy.c
38
static s32 e1000_access_phy_wakeup_reg_bm(struct e1000_hw *hw, u32 offset,
sys/dev/e1000/e1000_phy.c
3800
u32 data_reg;
sys/dev/e1000/e1000_phy.c
40
static u32 e1000_get_phy_addr_for_hv_page(u32 page);
sys/dev/e1000/e1000_phy.c
4058
s32 e1000_write_phy_reg_gs40g(struct e1000_hw *hw, u32 offset, u16 data)
sys/dev/e1000/e1000_phy.c
4090
s32 e1000_read_phy_reg_gs40g(struct e1000_hw *hw, u32 offset, u16 *data)
sys/dev/e1000/e1000_phy.c
41
static s32 e1000_access_phy_debug_regs_hv(struct e1000_hw *hw, u32 offset,
sys/dev/e1000/e1000_phy.c
4121
s32 e1000_read_phy_reg_mphy(struct e1000_hw *hw, u32 address, u32 *data)
sys/dev/e1000/e1000_phy.c
4123
u32 mphy_ctrl = 0;
sys/dev/e1000/e1000_phy.c
4182
s32 e1000_write_phy_reg_mphy(struct e1000_hw *hw, u32 address, u32 data,
sys/dev/e1000/e1000_phy.c
4185
u32 mphy_ctrl = 0;
sys/dev/e1000/e1000_phy.c
421
s32 e1000_read_phy_reg_i2c(struct e1000_hw *hw, u32 offset, u16 *data)
sys/dev/e1000/e1000_phy.c
424
u32 i, i2ccmd = 0;
sys/dev/e1000/e1000_phy.c
4247
u32 mphy_ctrl = 0;
sys/dev/e1000/e1000_phy.c
468
s32 e1000_write_phy_reg_i2c(struct e1000_hw *hw, u32 offset, u16 data)
sys/dev/e1000/e1000_phy.c
471
u32 i, i2ccmd = 0;
sys/dev/e1000/e1000_phy.c
531
u32 i = 0;
sys/dev/e1000/e1000_phy.c
532
u32 i2ccmd = 0;
sys/dev/e1000/e1000_phy.c
533
u32 data_local = 0;
sys/dev/e1000/e1000_phy.c
586
u32 i = 0;
sys/dev/e1000/e1000_phy.c
587
u32 i2ccmd = 0;
sys/dev/e1000/e1000_phy.c
588
u32 data_local = 0;
sys/dev/e1000/e1000_phy.c
623
data_local |= (u32)data;
sys/dev/e1000/e1000_phy.c
654
s32 e1000_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data)
sys/dev/e1000/e1000_phy.c
684
s32 e1000_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data)
sys/dev/e1000/e1000_phy.c
736
static s32 __e1000_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data,
sys/dev/e1000/e1000_phy.c
776
s32 e1000_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data)
sys/dev/e1000/e1000_phy.c
790
s32 e1000_read_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 *data)
sys/dev/e1000/e1000_phy.c
805
static s32 __e1000_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data,
sys/dev/e1000/e1000_phy.c
844
s32 e1000_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data)
sys/dev/e1000/e1000_phy.c
858
s32 e1000_write_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 data)
sys/dev/e1000/e1000_phy.c
874
static s32 __e1000_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data,
sys/dev/e1000/e1000_phy.c
877
u32 kmrnctrlsta;
sys/dev/e1000/e1000_phy.c
918
s32 e1000_read_kmrn_reg_generic(struct e1000_hw *hw, u32 offset, u16 *data)
sys/dev/e1000/e1000_phy.c
933
s32 e1000_read_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 *data)
sys/dev/e1000/e1000_phy.c
949
static s32 __e1000_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data,
sys/dev/e1000/e1000_phy.c
952
u32 kmrnctrlsta;
sys/dev/e1000/e1000_phy.c
989
s32 e1000_write_kmrn_reg_generic(struct e1000_hw *hw, u32 offset, u16 data)
sys/dev/e1000/e1000_phy.h
100
s32 e1000_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data);
sys/dev/e1000/e1000_phy.h
101
s32 e1000_read_phy_reg_i2c(struct e1000_hw *hw, u32 offset, u16 *data);
sys/dev/e1000/e1000_phy.h
102
s32 e1000_write_phy_reg_i2c(struct e1000_hw *hw, u32 offset, u16 data);
sys/dev/e1000/e1000_phy.h
105
s32 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data);
sys/dev/e1000/e1000_phy.h
106
s32 e1000_read_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, u16 *data);
sys/dev/e1000/e1000_phy.h
107
s32 e1000_read_phy_reg_page_hv(struct e1000_hw *hw, u32 offset, u16 *data);
sys/dev/e1000/e1000_phy.h
108
s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data);
sys/dev/e1000/e1000_phy.h
109
s32 e1000_write_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, u16 data);
sys/dev/e1000/e1000_phy.h
110
s32 e1000_write_phy_reg_page_hv(struct e1000_hw *hw, u32 offset, u16 data);
sys/dev/e1000/e1000_phy.h
117
s32 e1000_write_phy_reg_gs40g(struct e1000_hw *hw, u32 offset, u16 data);
sys/dev/e1000/e1000_phy.h
118
s32 e1000_read_phy_reg_gs40g(struct e1000_hw *hw, u32 offset, u16 *data);
sys/dev/e1000/e1000_phy.h
119
s32 e1000_read_phy_reg_mphy(struct e1000_hw *hw, u32 address, u32 *data);
sys/dev/e1000/e1000_phy.h
120
s32 e1000_write_phy_reg_mphy(struct e1000_hw *hw, u32 address, u32 data,
sys/dev/e1000/e1000_phy.h
39
s32 e1000_null_read_reg(struct e1000_hw *hw, u32 offset, u16 *data);
sys/dev/e1000/e1000_phy.h
42
s32 e1000_null_write_reg(struct e1000_hw *hw, u32 offset, u16 data);
sys/dev/e1000/e1000_phy.h
73
s32 e1000_read_kmrn_reg_generic(struct e1000_hw *hw, u32 offset, u16 *data);
sys/dev/e1000/e1000_phy.h
74
s32 e1000_read_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 *data);
sys/dev/e1000/e1000_phy.h
76
s32 e1000_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data);
sys/dev/e1000/e1000_phy.h
77
s32 e1000_read_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 *data);
sys/dev/e1000/e1000_phy.h
78
s32 e1000_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data);
sys/dev/e1000/e1000_phy.h
81
s32 e1000_write_kmrn_reg_generic(struct e1000_hw *hw, u32 offset, u16 data);
sys/dev/e1000/e1000_phy.h
82
s32 e1000_write_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 data);
sys/dev/e1000/e1000_phy.h
83
s32 e1000_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data);
sys/dev/e1000/e1000_phy.h
84
s32 e1000_write_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 data);
sys/dev/e1000/e1000_phy.h
85
s32 e1000_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data);
sys/dev/e1000/e1000_phy.h
86
s32 e1000_phy_has_link_generic(struct e1000_hw *hw, u32 iterations,
sys/dev/e1000/e1000_phy.h
87
u32 usec_interval, bool *success);
sys/dev/e1000/e1000_phy.h
89
enum e1000_phy_type e1000_get_phy_type_from_id(u32 phy_id);
sys/dev/e1000/e1000_phy.h
91
s32 e1000_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data);
sys/dev/e1000/e1000_phy.h
92
s32 e1000_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data);
sys/dev/e1000/e1000_phy.h
95
s32 e1000_read_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 *data);
sys/dev/e1000/e1000_phy.h
96
s32 e1000_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data);
sys/dev/e1000/e1000_phy.h
99
s32 e1000_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data);
sys/dev/e1000/e1000_vf.c
261
u32 timeout = E1000_VF_INIT_TIMEOUT;
sys/dev/e1000/e1000_vf.c
263
u32 ctrl, msgbuf[3];
sys/dev/e1000/e1000_vf.c
324
u32 E1000_UNUSEDARG index)
sys/dev/e1000/e1000_vf.c
327
u32 msgbuf[3];
sys/dev/e1000/e1000_vf.c
357
static u32 e1000_hash_mc_addr_vf(struct e1000_hw *hw, u8 *mc_addr)
sys/dev/e1000/e1000_vf.c
359
u32 hash_value, hash_mask;
sys/dev/e1000/e1000_vf.c
381
u32 *msg, u16 size)
sys/dev/e1000/e1000_vf.c
384
u32 retmsg[E1000_VFMAILBOX_SIZE];
sys/dev/e1000/e1000_vf.c
401
u8 *mc_addr_list, u32 mc_addr_count)
sys/dev/e1000/e1000_vf.c
403
u32 msgbuf[E1000_VFMAILBOX_SIZE];
sys/dev/e1000/e1000_vf.c
405
u32 hash_value;
sys/dev/e1000/e1000_vf.c
406
u32 i;
sys/dev/e1000/e1000_vf.c
448
u32 msgbuf[2];
sys/dev/e1000/e1000_vf.c
465
u32 msgbuf[2];
sys/dev/e1000/e1000_vf.c
482
u32 msgbuf = E1000_VF_SET_PROMISC;
sys/dev/e1000/e1000_vf.c
51
static void e1000_update_mc_addr_list_vf(struct e1000_hw *hw, u8 *, u32);
sys/dev/e1000/e1000_vf.c
52
static int e1000_rar_set_vf(struct e1000_hw *, u8 *, u32);
sys/dev/e1000/e1000_vf.c
539
u32 in_msg = 0;
sys/dev/e1000/e1000_vf.h
101
u32 rss; /* RSS Hash */
sys/dev/e1000/e1000_vf.h
109
u32 status_error; /* ext status/error */
sys/dev/e1000/e1000_vf.h
123
u32 cmd_type_len;
sys/dev/e1000/e1000_vf.h
124
u32 olinfo_status;
sys/dev/e1000/e1000_vf.h
128
u32 nxtseq_seed;
sys/dev/e1000/e1000_vf.h
129
u32 status;
sys/dev/e1000/e1000_vf.h
146
u32 vlan_macip_lens;
sys/dev/e1000/e1000_vf.h
147
u32 seqnum_seed;
sys/dev/e1000/e1000_vf.h
148
u32 type_tucmd_mlhl;
sys/dev/e1000/e1000_vf.h
149
u32 mss_l4len_idx;
sys/dev/e1000/e1000_vf.h
176
u32 last_gprc;
sys/dev/e1000/e1000_vf.h
177
u32 last_gptc;
sys/dev/e1000/e1000_vf.h
178
u32 last_gorc;
sys/dev/e1000/e1000_vf.h
179
u32 last_gotc;
sys/dev/e1000/e1000_vf.h
180
u32 last_mprc;
sys/dev/e1000/e1000_vf.h
181
u32 last_gotlbc;
sys/dev/e1000/e1000_vf.h
182
u32 last_gptlbc;
sys/dev/e1000/e1000_vf.h
183
u32 last_gorlbc;
sys/dev/e1000/e1000_vf.h
184
u32 last_gprlbc;
sys/dev/e1000/e1000_vf.h
206
void (*update_mc_addr_list)(struct e1000_hw *, u8 *, u32);
sys/dev/e1000/e1000_vf.h
210
void (*write_vfta)(struct e1000_hw *, u32, u32);
sys/dev/e1000/e1000_vf.h
211
int (*rar_set)(struct e1000_hw *, u8*, u32);
sys/dev/e1000/e1000_vf.h
230
s32 (*read)(struct e1000_hw *, u32 *, u16, u16);
sys/dev/e1000/e1000_vf.h
231
s32 (*write)(struct e1000_hw *, u32 *, u16, u16);
sys/dev/e1000/e1000_vf.h
232
s32 (*read_posted)(struct e1000_hw *, u32 *, u16, u16);
sys/dev/e1000/e1000_vf.h
233
s32 (*write_posted)(struct e1000_hw *, u32 *, u16, u16);
sys/dev/e1000/e1000_vf.h
240
u32 msgs_tx;
sys/dev/e1000/e1000_vf.h
241
u32 msgs_rx;
sys/dev/e1000/e1000_vf.h
243
u32 acks;
sys/dev/e1000/e1000_vf.h
244
u32 reqs;
sys/dev/e1000/e1000_vf.h
245
u32 rsts;
sys/dev/e1000/e1000_vf.h
251
u32 timeout;
sys/dev/e1000/e1000_vf.h
252
u32 usec_delay;
sys/dev/e1000/e1000_vf.h
257
u32 vf_number;
sys/dev/e1000/e1000_vf.h
258
u32 v2p_mailbox;
sys/dev/e1000/e1000_vf.h
292
s32 e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value);
sys/dev/e1000/e1000_vf.h
92
u32 data;
sys/dev/e1000/if_em.c
1658
u32 newitr;
sys/dev/e1000/if_em.c
1817
u32 reg_icr;
sys/dev/e1000/if_em.c
1939
u32 reg_icr;
sys/dev/e1000/if_em.c
2092
u32 reg_rctl;
sys/dev/e1000/if_em.c
2151
u32 reg_rctl = 0;
sys/dev/e1000/if_em.c
2221
u32 link_check, thstat, ctrl;
sys/dev/e1000/if_em.c
2561
u32 tmp, ivar = 0, newitr = 0;
sys/dev/e1000/if_em.c
2580
u32 index = i >> 1;
sys/dev/e1000/if_em.c
2595
u32 index = i >> 1;
sys/dev/e1000/if_em.c
2619
u32 index = i & 0x7; /* Each IVAR has two entries */
sys/dev/e1000/if_em.c
2635
u32 index = i & 0x7; /* Each IVAR has two entries */
sys/dev/e1000/if_em.c
2817
igb_init_dmac(struct e1000_softc *sc, u32 pba)
sys/dev/e1000/if_em.c
2821
u32 dmac, reg = ~E1000_DMACR_DMAC_EN;
sys/dev/e1000/if_em.c
2913
u32 reg = E1000_READ_REG(hw, E1000_PCIEMISC);
sys/dev/e1000/if_em.c
2936
u32 tctl, txd_lower = E1000_TXD_CMD_IFCS;
sys/dev/e1000/if_em.c
2966
u32 rctl, rxdctl;
sys/dev/e1000/if_em.c
3007
u32 fext_nvm11, tdlen;
sys/dev/e1000/if_em.c
3041
u32 rx_buffer_size;
sys/dev/e1000/if_em.c
3042
u32 pba;
sys/dev/e1000/if_em.c
3142
u32 tx_space, min_tx, min_rx;
sys/dev/e1000/if_em.c
3353
u32 reta;
sys/dev/e1000/if_em.c
3354
u32 rss_key[10], mrqc, shift = 0;
sys/dev/e1000/if_em.c
3628
u32 tctl, txdctl = 0, tarc, tipg = 0;
sys/dev/e1000/if_em.c
3648
E1000_WRITE_REG(hw, E1000_TDBAH(i), (u32)(bus_addr >> 32));
sys/dev/e1000/if_em.c
3649
E1000_WRITE_REG(hw, E1000_TDBAL(i), (u32)bus_addr);
sys/dev/e1000/if_em.c
3739
u32 reg;
sys/dev/e1000/if_em.c
3881
u32 rdt = sc->rx_num_queues -1; /* default */
sys/dev/e1000/if_em.c
3887
E1000_WRITE_REG(hw, E1000_RDBAH(i), (u32)(bus_addr >> 32));
sys/dev/e1000/if_em.c
3888
E1000_WRITE_REG(hw, E1000_RDBAL(i), (u32)bus_addr);
sys/dev/e1000/if_em.c
3903
u32 rxdctl = E1000_READ_REG(hw, E1000_RXDCTL(0));
sys/dev/e1000/if_em.c
3907
u32 rxdctl = E1000_READ_REG(hw, E1000_RXDCTL(i));
sys/dev/e1000/if_em.c
3915
u32 psize, srrctl = 0;
sys/dev/e1000/if_em.c
3950
u32 rxdctl;
sys/dev/e1000/if_em.c
4020
u32 index, bit;
sys/dev/e1000/if_em.c
4041
u32 index, bit;
sys/dev/e1000/if_em.c
4084
u32 reg;
sys/dev/e1000/if_em.c
4096
u32 reg;
sys/dev/e1000/if_em.c
4129
u32 reg;
sys/dev/e1000/if_em.c
4173
u32 ims_mask = IMS_ENABLE_MASK;
sys/dev/e1000/if_em.c
4201
u32 mask;
sys/dev/e1000/if_em.c
4283
u32 ctrl_ext, swsm;
sys/dev/e1000/if_em.c
4309
u32 ctrl_ext, swsm;
sys/dev/e1000/if_em.c
4503
u32 ctrl, ctrl_ext, rctl;
sys/dev/e1000/if_em.c
4576
u32 mreg, ret = 0;
sys/dev/e1000/if_em.c
4908
u32 reg, usec, rate;
sys/dev/e1000/if_em.c
5464
u32 regval;
sys/dev/e1000/if_em.c
5502
u32 reg, val, shift;
sys/dev/e1000/if_em.c
775
u32 *regs_buff;
sys/dev/e1000/if_em.c
778
regs_buff = malloc(sizeof(u32) * IGB_REGS_LEN, M_DEVBUF, M_WAITOK);
sys/dev/e1000/if_em.c
779
memset(regs_buff, 0, IGB_REGS_LEN * sizeof(u32));
sys/dev/e1000/if_em.c
861
u32 staterr = le32toh(rxr->rx_base[j].wb.upper.status_error);
sys/dev/e1000/if_em.c
862
u32 length = le32toh(rxr->rx_base[j].wb.upper.length);
sys/dev/e1000/if_em.h
376
u32 new = E1000_READ_REG(&sc->hw, reg); \
sys/dev/e1000/if_em.h
433
u32 me;
sys/dev/e1000/if_em.h
434
u32 payload;
sys/dev/e1000/if_em.h
455
u32 msix;
sys/dev/e1000/if_em.h
456
u32 eims; /* This queue's EIMS bit */
sys/dev/e1000/if_em.h
457
u32 me;
sys/dev/e1000/if_em.h
463
u32 me;
sys/dev/e1000/if_em.h
464
u32 msix;
sys/dev/e1000/if_em.h
465
u32 eims;
sys/dev/e1000/if_em.h
466
u32 itr_setting;
sys/dev/e1000/if_em.h
496
u32 linkvec;
sys/dev/e1000/if_em.h
497
u32 ivars;
sys/dev/e1000/if_em.h
503
u32 ims;
sys/dev/e1000/if_em.h
506
u32 flags;
sys/dev/e1000/if_em.h
511
u32 txd_cmd;
sys/dev/e1000/if_em.h
513
u32 rx_mbuf_sz;
sys/dev/e1000/if_em.h
517
u32 wol;
sys/dev/e1000/if_em.h
530
u32 shadow_vfta[EM_VFTA_SIZE];
sys/dev/e1000/if_em.h
537
u32 smartspeed;
sys/dev/e1000/if_em.h
538
u32 dmac;
sys/dev/e1000/if_em.h
539
u32 pba;
sys/dev/ena/ena.c
3469
u32 supported_metrics_count;
sys/dev/ena/ena_datapath.c
710
u32 mss;
sys/dev/enic/cq_enet_desc.h
113
u32 rss_hash, u16 bytes_written, u8 packet_error, u8 vlan_stripped,
sys/dev/enic/cq_enet_desc.h
166
u8 *csum_not_calc, u32 *rss_hash, u16 *bytes_written, u8 *packet_error,
sys/dev/enic/enic.h
128
u32 mul;
sys/dev/enic/enic.h
129
u32 div;
sys/dev/enic/enic.h
130
u32 max_usec;
sys/dev/enic/enic.h
144
u32 notify_sz;
sys/dev/enic/enic.h
151
u32 proxy_index;
sys/dev/enic/enic.h
191
u32 small_pkt_range_start;
sys/dev/enic/enic.h
192
u32 large_pkt_range_start;
sys/dev/enic/enic.h
193
u32 range_end;
sys/dev/enic/enic.h
194
u32 use_adaptive_rx_coalesce;
sys/dev/enic/enic.h
199
u32 small_pkt_range_start;
sys/dev/enic/enic.h
200
u32 large_pkt_range_start;
sys/dev/enic/enic.h
229
u32 flow_filter_mode;
sys/dev/enic/enic.h
296
u32 rx_coalesce_usecs;
sys/dev/enic/enic.h
297
u32 tx_coalesce_usecs;
sys/dev/enic/enic_res.c
173
u32 nic_cfg;
sys/dev/enic/enic_res.c
82
min_t(u32, ENIC_MAX_WQ_DESCS,
sys/dev/enic/enic_res.c
83
max_t(u32, ENIC_MIN_WQ_DESCS,
sys/dev/enic/enic_res.c
88
min_t(u32, ENIC_MAX_RQ_DESCS,
sys/dev/enic/enic_res.c
89
max_t(u32, ENIC_MIN_RQ_DESCS,
sys/dev/enic/enic_res.c
93
c->intr_timer_usec = min_t(u32, c->intr_timer_usec,
sys/dev/enic/enic_txrx.c
399
u32 rss_hash;
sys/dev/enic/vnic_cq.h
130
u32 to_clean, last_color;
sys/dev/enic/vnic_cq.h
16
u32 ring_size; /* 0x08 */
sys/dev/enic/vnic_cq.h
18
u32 pad0;
sys/dev/enic/vnic_cq.h
19
u32 flow_control_enable; /* 0x10 */
sys/dev/enic/vnic_cq.h
21
u32 pad1;
sys/dev/enic/vnic_cq.h
22
u32 color_enable; /* 0x18 */
sys/dev/enic/vnic_cq.h
24
u32 pad2;
sys/dev/enic/vnic_cq.h
25
u32 cq_head; /* 0x20 */
sys/dev/enic/vnic_cq.h
27
u32 pad3;
sys/dev/enic/vnic_cq.h
28
u32 cq_tail; /* 0x28 */
sys/dev/enic/vnic_cq.h
30
u32 pad4;
sys/dev/enic/vnic_cq.h
31
u32 cq_tail_color; /* 0x30 */
sys/dev/enic/vnic_cq.h
33
u32 pad5;
sys/dev/enic/vnic_cq.h
34
u32 interrupt_enable; /* 0x38 */
sys/dev/enic/vnic_cq.h
36
u32 pad6;
sys/dev/enic/vnic_cq.h
37
u32 cq_entry_enable; /* 0x40 */
sys/dev/enic/vnic_cq.h
39
u32 pad7;
sys/dev/enic/vnic_cq.h
40
u32 cq_message_enable; /* 0x48 */
sys/dev/enic/vnic_cq.h
42
u32 pad8;
sys/dev/enic/vnic_cq.h
43
u32 interrupt_offset; /* 0x50 */
sys/dev/enic/vnic_cq.h
45
u32 pad9;
sys/dev/enic/vnic_cq.h
48
u32 pad10;
sys/dev/enic/vnic_dev.c
182
u32 status;
sys/dev/enic/vnic_dev.c
246
u32 fetch_index, new_posted;
sys/dev/enic/vnic_dev.c
248
u32 posted = dc2c->posted;
sys/dev/enic/vnic_dev.c
318
u32 status;
sys/dev/enic/vnic_dev.c
339
status = (u32)vdev->args[0];
sys/dev/enic/vnic_dev.c
439
return (a1 >= (u32)FILTER_DPDK_1);
sys/dev/enic/vnic_dev.c
452
int vnic_dev_capable_filter_mode(struct vnic_dev *vdev, u32 *mode,
sys/dev/enic/vnic_dev.c
457
u32 max_level = 0;
sys/dev/enic/vnic_dev.c
489
if (max_level >= (u32)FILTER_USNIC_IP)
sys/dev/enic/vnic_dev.c
514
u64 a0 = (u32)cmd, a1 = 0;
sys/dev/enic/vnic_dev.c
543
*(u32 *)value = (u32)a0;
sys/dev/enic/vnic_dev.c
590
int vnic_dev_counter_dma_cfg(struct vnic_dev *vdev, u32 period,
sys/dev/enic/vnic_dev.c
591
u32 num_counters)
sys/dev/enic/vnic_dev.c
651
u64 a0 = (u32)arg, a1 = 0;
sys/dev/enic/vnic_dev.c
799
vdev->notify_sz = (r == 0) ? (u32)a1 : 0;
sys/dev/enic/vnic_dev.c
809
static u32 instance;
sys/dev/enic/vnic_dev.c
85
u32 bar_offset =r->bar_offset;
sys/dev/enic/vnic_dev.c
859
u32 *words;
sys/dev/enic/vnic_dev.c
86
u32 count = r->count;
sys/dev/enic/vnic_dev.c
862
u32 csum;
sys/dev/enic/vnic_dev.c
876
words = (u32 *)&vdev->notify_copy;
sys/dev/enic/vnic_dev.c
887
u64 a0 = (u32)arg, a1 = 0;
sys/dev/enic/vnic_dev.c
923
u32 vnic_dev_port_speed(struct vnic_dev *vdev)
sys/dev/enic/vnic_dev.c
931
u32 vnic_dev_intr_coal_timer_usec_to_hw(struct vnic_dev *vdev, u32 usec)
sys/dev/enic/vnic_dev.c
937
u32 vnic_dev_intr_coal_timer_hw_to_usec(struct vnic_dev *vdev, u32 hw_cycles)
sys/dev/enic/vnic_dev.c
943
u32 vnic_dev_get_intr_coal_timer_max(struct vnic_dev *vdev)
sys/dev/enic/vnic_dev.c
948
u32 vnic_dev_mtu(struct vnic_dev *vdev)
sys/dev/enic/vnic_dev.c
972
static u32 instance;
sys/dev/enic/vnic_dev.c
989
static u32 instance;
sys/dev/enic/vnic_dev.h
114
u32 vnic_dev_port_speed(struct vnic_dev *vdev);
sys/dev/enic/vnic_dev.h
115
u32 vnic_dev_msg_lvl(struct vnic_dev *vdev);
sys/dev/enic/vnic_dev.h
116
u32 vnic_dev_mtu(struct vnic_dev *vdev);
sys/dev/enic/vnic_dev.h
117
u32 vnic_dev_link_down_cnt(struct vnic_dev *vdev);
sys/dev/enic/vnic_dev.h
118
u32 vnic_dev_notify_status(struct vnic_dev *vdev);
sys/dev/enic/vnic_dev.h
119
u32 vnic_dev_uif(struct vnic_dev *vdev);
sys/dev/enic/vnic_dev.h
128
int vnic_dev_init_prov(struct vnic_dev *vdev, u8 *buf, u32 len);
sys/dev/enic/vnic_dev.h
139
u32 vnic_dev_intr_coal_timer_usec_to_hw(struct vnic_dev *vdev, u32 usec);
sys/dev/enic/vnic_dev.h
140
u32 vnic_dev_intr_coal_timer_hw_to_usec(struct vnic_dev *vdev, u32 hw_cycles);
sys/dev/enic/vnic_dev.h
141
u32 vnic_dev_get_intr_coal_timer_max(struct vnic_dev *vdev);
sys/dev/enic/vnic_dev.h
152
int vnic_dev_int13(struct vnic_dev *vdev, u64 arg, u32 op);
sys/dev/enic/vnic_dev.h
153
int vnic_dev_perbi(struct vnic_dev *vdev, u64 arg, u32 op);
sys/dev/enic/vnic_dev.h
154
u32 vnic_dev_perbi_rebuild_cnt(struct vnic_dev *vdev);
sys/dev/enic/vnic_dev.h
155
int vnic_dev_init_prov2(struct vnic_dev *vdev, u8 *buf, u32 len);
sys/dev/enic/vnic_dev.h
87
int vnic_dev_capable_filter_mode(struct vnic_dev *vdev, u32 *mode,
sys/dev/enic/vnic_dev.h
96
int vnic_dev_counter_dma_cfg(struct vnic_dev *vdev, u32 period,
sys/dev/enic/vnic_dev.h
97
u32 num_counters);
sys/dev/enic/vnic_devcmd.h
1081
u32 status; /* RO */
sys/dev/enic/vnic_devcmd.h
1082
u32 cmd; /* RW */
sys/dev/enic/vnic_devcmd.h
1106
u32 cmd; /* same command #defines as original */
sys/dev/enic/vnic_devcmd.h
1113
u32 pad;
sys/dev/enic/vnic_devcmd.h
736
u32 csum; /* checksum over following words */
sys/dev/enic/vnic_devcmd.h
738
u32 link_state; /* link up == 1 */
sys/dev/enic/vnic_devcmd.h
739
u32 port_speed; /* effective port speed (rate limit) */
sys/dev/enic/vnic_devcmd.h
740
u32 mtu; /* MTU */
sys/dev/enic/vnic_devcmd.h
741
u32 msglvl; /* requested driver msg lvl */
sys/dev/enic/vnic_devcmd.h
742
u32 uif; /* uplink interface */
sys/dev/enic/vnic_devcmd.h
743
u32 status; /* status bits (see VNIC_STF_*) */
sys/dev/enic/vnic_devcmd.h
744
u32 error; /* error code (see ERR_*) for first ERR */
sys/dev/enic/vnic_devcmd.h
745
u32 link_down_cnt; /* running count of link down transitions */
sys/dev/enic/vnic_devcmd.h
746
u32 perbi_rebuild_cnt; /* running count of perbi rebuilds */
sys/dev/enic/vnic_devcmd.h
780
u32 flags;
sys/dev/enic/vnic_devcmd.h
784
u32 usnic_id;
sys/dev/enic/vnic_devcmd.h
808
u32 flags;
sys/dev/enic/vnic_devcmd.h
809
u32 protocol;
sys/dev/enic/vnic_devcmd.h
810
u32 src_addr;
sys/dev/enic/vnic_devcmd.h
811
u32 dst_addr;
sys/dev/enic/vnic_devcmd.h
825
u32 flags;
sys/dev/enic/vnic_devcmd.h
843
u32 flags;
sys/dev/enic/vnic_devcmd.h
847
u32 dst_addr_v4;
sys/dev/enic/vnic_devcmd.h
850
u32 l4_protocol;
sys/dev/enic/vnic_devcmd.h
881
u32 mask_flags;
sys/dev/enic/vnic_devcmd.h
882
u32 val_flags;
sys/dev/enic/vnic_devcmd.h
899
u32 type;
sys/dev/enic/vnic_devcmd.h
901
u32 rq_idx;
sys/dev/enic/vnic_devcmd.h
918
u32 type;
sys/dev/enic/vnic_devcmd.h
919
u32 rq_idx;
sys/dev/enic/vnic_devcmd.h
920
u32 flags; /* use FILTER_ACTION_XXX_FLAG defines */
sys/dev/enic/vnic_devcmd.h
922
u32 counter_index;
sys/dev/enic/vnic_devcmd.h
954
u32 type;
sys/dev/enic/vnic_devcmd.h
973
u32 type;
sys/dev/enic/vnic_enet.h
15
u32 flags;
sys/dev/enic/vnic_enet.h
16
u32 wq_desc_count;
sys/dev/enic/vnic_enet.h
17
u32 rq_desc_count;
sys/dev/enic/vnic_enet.h
23
u32 intr_timer_usec;
sys/dev/enic/vnic_enet.h
31
u32 rdma_mr_id;
sys/dev/enic/vnic_enet.h
32
u32 rdma_mr_count;
sys/dev/enic/vnic_enet.h
33
u32 max_pkt_size;
sys/dev/enic/vnic_intr.c
30
void vnic_intr_init(struct vnic_intr *intr, u32 coalescing_timer,
sys/dev/enic/vnic_intr.c
40
u32 coalescing_timer)
sys/dev/enic/vnic_intr.h
17
u32 coalescing_timer; /* 0x00 */
sys/dev/enic/vnic_intr.h
19
u32 pad0;
sys/dev/enic/vnic_intr.h
20
u32 coalescing_value; /* 0x08 */
sys/dev/enic/vnic_intr.h
22
u32 pad1;
sys/dev/enic/vnic_intr.h
23
u32 coalescing_type; /* 0x10 */
sys/dev/enic/vnic_intr.h
25
u32 pad2;
sys/dev/enic/vnic_intr.h
26
u32 mask_on_assertion; /* 0x18 */
sys/dev/enic/vnic_intr.h
28
u32 pad3;
sys/dev/enic/vnic_intr.h
29
u32 mask; /* 0x20 */
sys/dev/enic/vnic_intr.h
31
u32 pad4;
sys/dev/enic/vnic_intr.h
32
u32 int_credits; /* 0x28 */
sys/dev/enic/vnic_intr.h
34
u32 pad5;
sys/dev/enic/vnic_intr.h
35
u32 int_credit_return; /* 0x30 */
sys/dev/enic/vnic_intr.h
37
u32 pad6;
sys/dev/enic/vnic_intr.h
70
u32 int_credit_return = (credits & 0xffff) |
sys/dev/enic/vnic_intr.h
94
void vnic_intr_init(struct vnic_intr *intr, u32 coalescing_timer,
sys/dev/enic/vnic_intr.h
97
u32 coalescing_timer);
sys/dev/enic/vnic_nic.h
39
static inline void vnic_set_nic_cfg(u32 *nic_cfg,
sys/dev/enic/vnic_resource.h
48
u32 magic;
sys/dev/enic/vnic_resource.h
49
u32 version;
sys/dev/enic/vnic_resource.h
53
u32 magic; /* magic number */
sys/dev/enic/vnic_resource.h
54
u32 version; /* header format version */
sys/dev/enic/vnic_resource.h
64
u32 bar_offset;
sys/dev/enic/vnic_resource.h
65
u32 count;
sys/dev/enic/vnic_rq.c
33
u32 fetch_index = 0;
sys/dev/enic/vnic_rq.c
82
u32 fetch_index;
sys/dev/enic/vnic_rq.h
16
u32 ring_size; /* 0x08 */
sys/dev/enic/vnic_rq.h
18
u32 pad0;
sys/dev/enic/vnic_rq.h
19
u32 posted_index; /* 0x10 */
sys/dev/enic/vnic_rq.h
21
u32 pad1;
sys/dev/enic/vnic_rq.h
22
u32 cq_index; /* 0x18 */
sys/dev/enic/vnic_rq.h
24
u32 pad2;
sys/dev/enic/vnic_rq.h
25
u32 enable; /* 0x20 */
sys/dev/enic/vnic_rq.h
27
u32 pad3;
sys/dev/enic/vnic_rq.h
28
u32 running; /* 0x28 */
sys/dev/enic/vnic_rq.h
30
u32 pad4;
sys/dev/enic/vnic_rq.h
31
u32 fetch_index; /* 0x30 */
sys/dev/enic/vnic_rq.h
33
u32 pad5;
sys/dev/enic/vnic_rq.h
34
u32 error_interrupt_enable; /* 0x38 */
sys/dev/enic/vnic_rq.h
36
u32 pad6;
sys/dev/enic/vnic_rq.h
37
u32 error_interrupt_offset; /* 0x40 */
sys/dev/enic/vnic_rq.h
39
u32 pad7;
sys/dev/enic/vnic_rq.h
40
u32 error_status; /* 0x48 */
sys/dev/enic/vnic_rq.h
42
u32 pad8;
sys/dev/enic/vnic_rq.h
43
u32 tcp_sn; /* 0x50 */
sys/dev/enic/vnic_rq.h
45
u32 pad9;
sys/dev/enic/vnic_rq.h
46
u32 unused; /* 0x58 */
sys/dev/enic/vnic_rq.h
47
u32 pad10;
sys/dev/enic/vnic_rq.h
48
u32 dca_select; /* 0x60 */
sys/dev/enic/vnic_rq.h
50
u32 pad11;
sys/dev/enic/vnic_rq.h
51
u32 dca_value; /* 0x68 */
sys/dev/enic/vnic_rq.h
53
u32 pad12;
sys/dev/enic/vnic_rq.h
54
u32 data_ring; /* 0x70 */
sys/dev/enic/vnic_wq.h
16
u32 ring_size; /* 0x08 */
sys/dev/enic/vnic_wq.h
18
u32 pad0;
sys/dev/enic/vnic_wq.h
19
u32 posted_index; /* 0x10 */
sys/dev/enic/vnic_wq.h
21
u32 pad1;
sys/dev/enic/vnic_wq.h
22
u32 cq_index; /* 0x18 */
sys/dev/enic/vnic_wq.h
24
u32 pad2;
sys/dev/enic/vnic_wq.h
25
u32 enable; /* 0x20 */
sys/dev/enic/vnic_wq.h
27
u32 pad3;
sys/dev/enic/vnic_wq.h
28
u32 running; /* 0x28 */
sys/dev/enic/vnic_wq.h
30
u32 pad4;
sys/dev/enic/vnic_wq.h
31
u32 fetch_index; /* 0x30 */
sys/dev/enic/vnic_wq.h
33
u32 pad5;
sys/dev/enic/vnic_wq.h
34
u32 dca_value; /* 0x38 */
sys/dev/enic/vnic_wq.h
36
u32 pad6;
sys/dev/enic/vnic_wq.h
37
u32 error_interrupt_enable; /* 0x40 */
sys/dev/enic/vnic_wq.h
39
u32 pad7;
sys/dev/enic/vnic_wq.h
40
u32 error_interrupt_offset; /* 0x48 */
sys/dev/enic/vnic_wq.h
42
u32 pad8;
sys/dev/enic/vnic_wq.h
43
u32 error_status; /* 0x50 */
sys/dev/enic/vnic_wq.h
45
u32 pad9;
sys/dev/enic/vnic_wq.h
74
u32 posted;
sys/dev/hyperv/vmbus/aarch64/hyperv_machdep.c
43
#define HV_VP_INDEX_SELF ((u32)-2)
sys/dev/hyperv/vmbus/aarch64/hyperv_machdep.c
51
arm_hv_set_vreg(u32 msr, u64 value)
sys/dev/hyperv/vmbus/aarch64/hyperv_machdep.c
60
hv_get_vpreg_128(u32 msr, struct hv_get_vp_registers_output *result)
sys/dev/hyperv/vmbus/aarch64/hyperv_machdep.c
83
arm_hv_get_vreg(u32 msr)
sys/dev/hyperv/vmbus/aarch64/hyperv_machdep.h
37
u32 a;
sys/dev/hyperv/vmbus/aarch64/hyperv_machdep.h
38
u32 b;
sys/dev/hyperv/vmbus/aarch64/hyperv_machdep.h
39
u32 c;
sys/dev/hyperv/vmbus/aarch64/hyperv_machdep.h
40
u32 d;
sys/dev/hyperv/vmbus/aarch64/hyperv_machdep.h
51
void hv_get_vpreg_128(u32, struct hv_get_vp_registers_output *);
sys/dev/hyperv/vmbus/aarch64/hyperv_machdep.h
52
void arm_hv_set_vreg(u32 msr, u64 val);
sys/dev/hyperv/vmbus/aarch64/hyperv_machdep.h
54
u64 arm_hv_get_vreg(u32 msr);
sys/dev/iavf/iavf_adminq.c
286
u32 reg = 0;
sys/dev/iavf/iavf_adminq.c
315
u32 reg = 0;
sys/dev/iavf/iavf_adminq.c
682
u32 val = 0;
sys/dev/iavf/iavf_adminq.c
800
u32 total_delay = 0;
sys/dev/iavf/iavf_adminq.h
102
u32 fw_build; /* firmware build number */
sys/dev/iavf/iavf_adminq.h
62
u32 head;
sys/dev/iavf/iavf_adminq.h
63
u32 tail;
sys/dev/iavf/iavf_adminq.h
64
u32 len;
sys/dev/iavf/iavf_adminq.h
65
u32 bah;
sys/dev/iavf/iavf_adminq.h
66
u32 bal;
sys/dev/iavf/iavf_adminq.h
95
u32 asq_cmd_timeout; /* send queue cmd write back timeout*/
sys/dev/iavf/iavf_alloc.h
54
u64 size, u32 alignment);
sys/dev/iavf/iavf_alloc.h
59
u32 size);
sys/dev/iavf/iavf_iflib.h
139
u32 tail;
sys/dev/iavf/iavf_iflib.h
142
u32 packets;
sys/dev/iavf/iavf_iflib.h
143
u32 me;
sys/dev/iavf/iavf_iflib.h
155
u32 bytes;
sys/dev/iavf/iavf_iflib.h
156
u32 itr;
sys/dev/iavf/iavf_iflib.h
157
u32 latency;
sys/dev/iavf/iavf_iflib.h
176
u32 itr;
sys/dev/iavf/iavf_iflib.h
177
u32 latency;
sys/dev/iavf/iavf_iflib.h
178
u32 mbuf_sz;
sys/dev/iavf/iavf_iflib.h
179
u32 tail;
sys/dev/iavf/iavf_iflib.h
180
u32 me;
sys/dev/iavf/iavf_iflib.h
183
u32 packets;
sys/dev/iavf/iavf_iflib.h
184
u32 bytes;
sys/dev/iavf/iavf_iflib.h
203
u32 msix;
sys/dev/iavf/iavf_iflib.h
208
u32 pkt_too_small;
sys/dev/iavf/iavf_iflib.h
222
u32 msix;
sys/dev/iavf/iavf_iflib.h
245
u32 rx_itr_setting;
sys/dev/iavf/iavf_iflib.h
246
u32 tx_itr_setting;
sys/dev/iavf/iavf_iflib.h
341
u32 state;
sys/dev/iavf/iavf_iflib.h
351
u32 link_speed_adv;
sys/dev/iavf/iavf_iflib.h
375
u32 queues_enabled;
sys/dev/iavf/iavf_iflib.h
388
void iavf_get_default_rss_key(u32 *);
sys/dev/iavf/iavf_lib.c
1078
u32 lut = 0;
sys/dev/iavf/iavf_lib.c
1081
u32 rss_seed[IAVF_RSS_KEY_SIZE_REG];
sys/dev/iavf/iavf_lib.c
1082
u32 rss_hash_config;
sys/dev/iavf/iavf_lib.c
1118
wr32(hw, IAVF_VFQF_HENA(0), (u32)hena);
sys/dev/iavf/iavf_lib.c
1119
wr32(hw, IAVF_VFQF_HENA(1), (u32)(hena >> 32));
sys/dev/iavf/iavf_lib.c
201
u32 reg;
sys/dev/iavf/iavf_lib.c
70
iavf_get_default_rss_key(u32 *key)
sys/dev/iavf/iavf_lib.c
74
u32 rss_seed[IAVF_RSS_KEY_SIZE_REG] = {0x41b01687,
sys/dev/iavf/iavf_lib.h
208
#define IAVF_FLAG_AQ_ENABLE_QUEUES (u32)(1 << 0)
sys/dev/iavf/iavf_lib.h
209
#define IAVF_FLAG_AQ_DISABLE_QUEUES (u32)(1 << 1)
sys/dev/iavf/iavf_lib.h
210
#define IAVF_FLAG_AQ_ADD_MAC_FILTER (u32)(1 << 2)
sys/dev/iavf/iavf_lib.h
211
#define IAVF_FLAG_AQ_ADD_VLAN_FILTER (u32)(1 << 3)
sys/dev/iavf/iavf_lib.h
212
#define IAVF_FLAG_AQ_DEL_MAC_FILTER (u32)(1 << 4)
sys/dev/iavf/iavf_lib.h
213
#define IAVF_FLAG_AQ_DEL_VLAN_FILTER (u32)(1 << 5)
sys/dev/iavf/iavf_lib.h
214
#define IAVF_FLAG_AQ_CONFIGURE_QUEUES (u32)(1 << 6)
sys/dev/iavf/iavf_lib.h
215
#define IAVF_FLAG_AQ_MAP_VECTORS (u32)(1 << 7)
sys/dev/iavf/iavf_lib.h
216
#define IAVF_FLAG_AQ_HANDLE_RESET (u32)(1 << 8)
sys/dev/iavf/iavf_lib.h
217
#define IAVF_FLAG_AQ_CONFIGURE_PROMISC (u32)(1 << 9)
sys/dev/iavf/iavf_lib.h
218
#define IAVF_FLAG_AQ_GET_STATS (u32)(1 << 10)
sys/dev/iavf/iavf_lib.h
219
#define IAVF_FLAG_AQ_CONFIG_RSS_KEY (u32)(1 << 11)
sys/dev/iavf/iavf_lib.h
220
#define IAVF_FLAG_AQ_SET_RSS_HENA (u32)(1 << 12)
sys/dev/iavf/iavf_lib.h
221
#define IAVF_FLAG_AQ_GET_RSS_HENA_CAPS (u32)(1 << 13)
sys/dev/iavf/iavf_lib.h
222
#define IAVF_FLAG_AQ_CONFIG_RSS_LUT (u32)(1 << 14)
sys/dev/iavf/iavf_lib.h
336
iavf_set_state(volatile u32 *s, enum iavf_state bit)
sys/dev/iavf/iavf_lib.h
350
iavf_clear_state(volatile u32 *s, enum iavf_state bit)
sys/dev/iavf/iavf_lib.h
365
static inline u32
sys/dev/iavf/iavf_lib.h
366
iavf_testandset_state(volatile u32 *s, enum iavf_state bit)
sys/dev/iavf/iavf_lib.h
381
static inline u32
sys/dev/iavf/iavf_lib.h
382
iavf_testandclear_state(volatile u32 *s, enum iavf_state bit)
sys/dev/iavf/iavf_lib.h
399
static inline u32
sys/dev/iavf/iavf_lib.h
400
iavf_test_state(volatile u32 *s, enum iavf_state bit)
sys/dev/iavf/iavf_lib.h
427
int iavf_send_vc_msg(struct iavf_sc *sc, u32 op);
sys/dev/iavf/iavf_lib.h
428
int iavf_send_vc_msg_sleep(struct iavf_sc *sc, u32 op);
sys/dev/iavf/iavf_lib.h
432
void iavf_get_default_rss_key(u32 *key);
sys/dev/iavf/iavf_lib.h
90
#define IAVF_AQ_BUF_SZ ((u32) 4096)
sys/dev/iavf/iavf_osdep.c
118
enum iavf_memory_type type __unused, u64 size, u32 alignment)
sys/dev/iavf/iavf_osdep.c
293
iavf_read_pci_cfg(struct iavf_hw *hw, u32 reg)
sys/dev/iavf/iavf_osdep.c
313
iavf_write_pci_cfg(struct iavf_hw *hw, u32 reg, u16 value)
sys/dev/iavf/iavf_osdep.c
392
iavf_debug_core(device_t dev, u32 enabled_mask, u32 mask, char *fmt, ...)
sys/dev/iavf/iavf_osdep.c
79
u32 size)
sys/dev/iavf/iavf_osdep.h
167
#define __le32 u32
sys/dev/iavf/iavf_osdep.h
170
#define __be32 u32
sys/dev/iavf/iavf_osdep.h
223
u32 size;
sys/dev/iavf/iavf_osdep.h
227
u16 iavf_read_pci_cfg(struct iavf_hw *, u32);
sys/dev/iavf/iavf_osdep.h
228
void iavf_write_pci_cfg(struct iavf_hw *, u32, u16);
sys/dev/iavf/iavf_prototype.h
115
u8 table_id, u32 start_index, u16 buff_size,
sys/dev/iavf/iavf_prototype.h
117
u8 *ret_next_table, u32 *ret_next_index,
sys/dev/iavf/iavf_txrx_iflib.c
196
if_pkt_info_t pi, u32 *cmd, u32 *off)
sys/dev/iavf/iavf_txrx_iflib.c
263
u32 cmd, mss, type, tsolen;
sys/dev/iavf/iavf_txrx_iflib.c
330
u32 cmd, off, tx_intr;
sys/dev/iavf/iavf_txrx_iflib.c
448
static inline u32
sys/dev/iavf/iavf_txrx_iflib.c
47
static void iavf_rx_checksum(if_rxd_info_t ri, u32 status, u32 error, u8 ptype);
sys/dev/iavf/iavf_txrx_iflib.c
671
u32 status, error;
sys/dev/iavf/iavf_txrx_iflib.c
749
iavf_rx_checksum(if_rxd_info_t ri, u32 status, u32 error, u8 ptype)
sys/dev/iavf/iavf_type.h
245
u32 num_vsis;
sys/dev/iavf/iavf_type.h
246
u32 num_rx_qp;
sys/dev/iavf/iavf_type.h
247
u32 num_tx_qp;
sys/dev/iavf/iavf_type.h
248
u32 base_queue;
sys/dev/iavf/iavf_type.h
249
u32 num_msix_vectors_vf;
sys/dev/iavf/iavf_type.h
380
u32 debug_mask;
sys/dev/iavf/iavf_type.h
583
u32 ptype:8;
sys/dev/iavf/iavf_type.h
584
u32 known:1;
sys/dev/iavf/iavf_type.h
585
u32 outer_ip:1;
sys/dev/iavf/iavf_type.h
586
u32 outer_ip_ver:1;
sys/dev/iavf/iavf_type.h
587
u32 outer_frag:1;
sys/dev/iavf/iavf_type.h
588
u32 tunnel_type:3;
sys/dev/iavf/iavf_type.h
589
u32 tunnel_end_prot:2;
sys/dev/iavf/iavf_type.h
590
u32 tunnel_end_frag:1;
sys/dev/iavf/iavf_type.h
591
u32 inner_prot:4;
sys/dev/iavf/iavf_type.h
592
u32 payload_layer:3;
sys/dev/iavf/iavf_type.h
75
#define IAVF_HI_DWORD(x) ((u32)((((x) >> 16) >> 16) & 0xFFFFFFFF))
sys/dev/iavf/iavf_type.h
76
#define IAVF_LO_DWORD(x) ((u32)((x) & 0xFFFFFFFF))
sys/dev/iavf/iavf_vc_common.c
206
u32 caps;
sys/dev/iavf/iavf_vc_common.c
244
u32 retries = 0;
sys/dev/iavf/iavf_vc_common.c
363
u32 len;
sys/dev/iavf/iavf_vc_common.c
427
u32 len;
sys/dev/iavf/iavf_vc_common.c
700
iavf_get_default_rss_key((u32 *)rss_seed);
sys/dev/iavf/iavf_vc_common.c
771
u32 lut;
sys/dev/iavf/iavf_vc_common.c
953
iavf_adv_speed_to_ext_speed(u32 adv_link_speed)
sys/dev/iavf/iavf_vc_common.c
992
u32
sys/dev/iavf/iavf_vc_common.h
74
enum iavf_ext_link_speed iavf_adv_speed_to_ext_speed(u32 adv_link_speed);
sys/dev/iavf/iavf_vc_common.h
75
u32 iavf_ext_speed_to_ifmedia(enum iavf_ext_link_speed link_speed);
sys/dev/iavf/if_iavf_iflib.c
101
static int iavf_vc_sleep_wait(struct iavf_sc *sc, u32 op);
sys/dev/iavf/if_iavf_iflib.c
1130
u32 reg, oldreg;
sys/dev/iavf/if_iavf_iflib.c
1200
u32 reg;
sys/dev/iavf/if_iavf_iflib.c
1376
u32 val;
sys/dev/iavf/if_iavf_iflib.c
1589
u32 reg, mask;
sys/dev/iavf/if_iavf_iflib.c
1662
u32 reg;
sys/dev/iavf/if_iavf_iflib.c
364
* sizeof(struct iavf_tx_desc) + sizeof(u32), DBA_ALIGN);
sys/dev/iavf/if_iavf_iflib.c
603
iavf_vc_sleep_wait(struct iavf_sc *sc, u32 op)
sys/dev/iavf/if_iavf_iflib.c
631
iavf_send_vc_msg_sleep(struct iavf_sc *sc, u32 op)
sys/dev/iavf/if_iavf_iflib.c
666
iavf_send_vc_msg(struct iavf_sc *sc, u32 op)
sys/dev/iavf/virtchnl.h
184
u32 vfid; /* used by PF when sending to VF */
sys/dev/iavf/virtchnl.h
208
u32 major;
sys/dev/iavf/virtchnl.h
209
u32 minor;
sys/dev/iavf/virtchnl.h
294
u32 vf_cap_flags;
sys/dev/iavf/virtchnl.h
295
u32 rss_key_size;
sys/dev/iavf/virtchnl.h
296
u32 rss_lut_size;
sys/dev/iavf/virtchnl.h
337
u32 ring_len; /* number of descriptors, multiple of 32 */
sys/dev/iavf/virtchnl.h
340
u32 databuffer_size;
sys/dev/iavf/virtchnl.h
341
u32 max_pkt_size;
sys/dev/iavf/virtchnl.h
346
u32 pad2;
sys/dev/iavf/virtchnl.h
372
u32 pad;
sys/dev/iavf/virtchnl.h
437
u32 rx_queues;
sys/dev/iavf/virtchnl.h
438
u32 tx_queues;
sys/dev/iavf/virtchnl.h
585
u32 pad;
sys/dev/iavf/virtchnl.h
592
u32 num_tc;
sys/dev/iavf/virtchnl.h
593
u32 pad;
sys/dev/iavf/virtchnl.h
656
u32 action_meta;
sys/dev/iavf/virtchnl.h
696
u32 link_speed;
sys/dev/iavf/virtchnl.h
718
u32 v_idx; /* msix_vector */
sys/dev/iavf/virtchnl.h
727
u32 num_vectors;
sys/dev/iavf/virtchnl.h
790
virtchnl_vc_validate_vf_msg(struct virtchnl_version_info *ver, u32 v_opcode,
sys/dev/iavf/virtchnl.h
794
u32 valid_len = 0;
sys/dev/iavf/virtchnl.h
805
valid_len = sizeof(u32);
sys/dev/ice/ice_adminq_cmd.h
1809
u32 i2c_clk_cntr;
sys/dev/ice/ice_adminq_cmd.h
1810
u32 mdio_clk_cntr;
sys/dev/ice/ice_adminq_cmd.h
1811
u32 sb_iosf_clk_cntr;
sys/dev/ice/ice_adminq_cmd.h
2400
u32 reserved;
sys/dev/ice/ice_bitops.h
39
typedef u32 ice_bitmap_t;
sys/dev/ice/ice_bitops.h
499
ice_bitmap_from_array32(ice_bitmap_t *dst, u32 *src, u16 size)
sys/dev/ice/ice_bitops.h
501
u32 remaining_bits, i;
sys/dev/ice/ice_bitops.h
503
#define BITS_PER_U32 (sizeof(u32) * BITS_PER_BYTE)
sys/dev/ice/ice_bitops.h
507
for (i = 0; i < (u32)(size / BITS_PER_U32); i++) {
sys/dev/ice/ice_bitops.h
508
u32 bit_offset = i * BITS_PER_U32;
sys/dev/ice/ice_bitops.h
509
u32 entry = src[i];
sys/dev/ice/ice_bitops.h
510
u32 j;
sys/dev/ice/ice_bitops.h
523
u32 bit_offset = i * BITS_PER_U32;
sys/dev/ice/ice_bitops.h
524
u32 entry = src[i];
sys/dev/ice/ice_bitops.h
525
u32 j;
sys/dev/ice/ice_common.c
1225
u32 cnt, reg = 0, grst_timeout, uld_mask, reset_wait_cnt;
sys/dev/ice/ice_common.c
1287
u32 cnt, reg, reset_wait_cnt, cfg_lock_timeout;
sys/dev/ice/ice_common.c
1345
u32 val = 0;
sys/dev/ice/ice_common.c
136
u32 i;
sys/dev/ice/ice_common.c
1379
ice_copy_rxq_ctx_to_hw(struct ice_hw *hw, u8 *ice_rxq_ctx, u32 rxq_index)
sys/dev/ice/ice_common.c
1392
*((u32 *)(ice_rxq_ctx + (i * sizeof(u32)))));
sys/dev/ice/ice_common.c
1395
*((u32 *)(ice_rxq_ctx + (i * sizeof(u32)))));
sys/dev/ice/ice_common.c
1410
ice_copy_rxq_ctx_from_hw(struct ice_hw *hw, u8 *ice_rxq_ctx, u32 rxq_index)
sys/dev/ice/ice_common.c
1422
u32 *ctx = (u32 *)(ice_rxq_ctx + (i * sizeof(u32)));
sys/dev/ice/ice_common.c
1470
u32 rxq_index)
sys/dev/ice/ice_common.c
1494
u32 rxq_index)
sys/dev/ice/ice_common.c
1516
int ice_clear_rxq_ctx(struct ice_hw *hw, u32 rxq_index)
sys/dev/ice/ice_common.c
1576
u32 tx_cmpltnq_index)
sys/dev/ice/ice_common.c
1589
*((u32 *)(ice_tx_cmpltnq_ctx + (i * sizeof(u32)))));
sys/dev/ice/ice_common.c
1592
*((u32 *)(ice_tx_cmpltnq_ctx + (i * sizeof(u32)))));
sys/dev/ice/ice_common.c
1626
u32 tx_cmpltnq_index)
sys/dev/ice/ice_common.c
1628
u8 ctx_buf[ICE_TX_CMPLTNQ_CTX_SIZE_DWORDS * sizeof(u32)] = { 0 };
sys/dev/ice/ice_common.c
1642
ice_clear_tx_cmpltnq_ctx(struct ice_hw *hw, u32 tx_cmpltnq_index)
sys/dev/ice/ice_common.c
1666
u32 tx_drbell_q_index)
sys/dev/ice/ice_common.c
1679
*((u32 *)(ice_tx_drbell_q_ctx + (i * sizeof(u32)))));
sys/dev/ice/ice_common.c
1682
*((u32 *)(ice_tx_drbell_q_ctx + (i * sizeof(u32)))));
sys/dev/ice/ice_common.c
1717
u32 tx_drbell_q_index)
sys/dev/ice/ice_common.c
1719
u8 ctx_buf[ICE_TX_DRBELL_Q_CTX_SIZE_DWORDS * sizeof(u32)] = { 0 };
sys/dev/ice/ice_common.c
1734
ice_clear_tx_drbell_q_ctx(struct ice_hw *hw, u32 tx_drbell_q_index)
sys/dev/ice/ice_common.c
2103
enum ice_aq_res_access_type access, u8 sdp_number, u32 *timeout,
sys/dev/ice/ice_common.c
2202
enum ice_aq_res_access_type access, u32 timeout)
sys/dev/ice/ice_common.c
2205
u32 delay = ICE_RES_POLLING_DELAY_MS;
sys/dev/ice/ice_common.c
2206
u32 time_left = timeout;
sys/dev/ice/ice_common.c
2261
u32 total_delay = 0;
sys/dev/ice/ice_common.c
2399
static u32 ice_get_num_per_func(struct ice_hw *hw, u32 max)
sys/dev/ice/ice_common.c
2496
u32 logical_id = LE32_TO_CPU(elem->logical_id);
sys/dev/ice/ice_common.c
2497
u32 phys_id = LE32_TO_CPU(elem->phys_id);
sys/dev/ice/ice_common.c
2498
u32 number = LE32_TO_CPU(elem->number);
sys/dev/ice/ice_common.c
2789
u32 number = LE32_TO_CPU(cap->number);
sys/dev/ice/ice_common.c
2790
u32 logical_id = LE32_TO_CPU(cap->logical_id);
sys/dev/ice/ice_common.c
2835
void *buf, u32 cap_count)
sys/dev/ice/ice_common.c
2838
u32 i;
sys/dev/ice/ice_common.c
2885
u32 number = LE32_TO_CPU(cap->number);
sys/dev/ice/ice_common.c
2905
u32 number = LE32_TO_CPU(cap->number);
sys/dev/ice/ice_common.c
2924
u32 number = LE32_TO_CPU(cap->number);
sys/dev/ice/ice_common.c
2994
void *buf, u32 cap_count)
sys/dev/ice/ice_common.c
2997
u32 i;
sys/dev/ice/ice_common.c
3136
ice_aq_list_caps(struct ice_hw *hw, void *buf, u16 buf_size, u32 *cap_count,
sys/dev/ice/ice_common.c
3169
u32 cap_count = 0;
sys/dev/ice/ice_common.c
3203
u32 cap_count = 0;
sys/dev/ice/ice_common.c
3235
u32 num_funcs;
sys/dev/ice/ice_common.c
4333
u32 start_address, u8 *data, u8 data_size,
sys/dev/ice/ice_common.c
4749
u8 timeout, u32 *blocked_cgds,
sys/dev/ice/ice_common.c
4943
u32 src_dword, mask;
sys/dev/ice/ice_common.c
4961
mask = (u32)~0;
sys/dev/ice/ice_common.c
4966
src_dword = *(u32 *)from;
sys/dev/ice/ice_common.c
5066
case sizeof(u32):
sys/dev/ice/ice_common.c
5098
u32 start, void *buf, u16 buf_size, u16 *ret_buf_size,
sys/dev/ice/ice_common.c
5100
u32 *ret_next_index, struct ice_sq_cd *cd)
sys/dev/ice/ice_common.c
5221
u32 dest_dword, mask;
sys/dev/ice/ice_common.c
5236
mask = (u32)~0;
sys/dev/ice/ice_common.c
5492
u16 *q_handles, u16 *q_ids, u32 *q_teids,
sys/dev/ice/ice_common.c
5645
u16 *rdma_qset, u16 num_qsets, u32 *qset_teid)
sys/dev/ice/ice_common.c
5720
ice_dis_vsi_rdma_qset(struct ice_port_info *pi, u16 count, u32 *qset_teid,
sys/dev/ice/ice_common.c
5903
ice_stat_update40(struct ice_hw *hw, u32 reg, bool prev_stat_loaded,
sys/dev/ice/ice_common.c
5940
ice_stat_update32(struct ice_hw *hw, u32 reg, bool prev_stat_loaded,
sys/dev/ice/ice_common.c
5943
u32 new_data;
sys/dev/ice/ice_common.c
5997
u32 repc;
sys/dev/ice/ice_common.c
6033
ice_aq_alternate_write(struct ice_hw *hw, u32 reg_addr0, u32 reg_val0,
sys/dev/ice/ice_common.c
6034
u32 reg_addr1, u32 reg_val1)
sys/dev/ice/ice_common.c
6066
ice_aq_alternate_read(struct ice_hw *hw, u32 reg_addr0, u32 *reg_val0,
sys/dev/ice/ice_common.c
6067
u32 reg_addr1, u32 *reg_val1)
sys/dev/ice/ice_common.c
6153
ice_sched_query_elem(struct ice_hw *hw, u32 node_teid,
sys/dev/ice/ice_common.c
6178
u32 fw_mode;
sys/dev/ice/ice_common.c
6200
ice_get_cur_lldp_persist_status(struct ice_hw *hw, u32 *lldp_status)
sys/dev/ice/ice_common.c
6204
u32 data, mask;
sys/dev/ice/ice_common.c
6240
ice_get_dflt_lldp_persist_status(struct ice_hw *hw, u32 *lldp_status)
sys/dev/ice/ice_common.c
6243
u32 data, mask, loc_data, loc_data_tmp;
sys/dev/ice/ice_common.c
6872
static const u32 ice_aq_to_link_speed[] = {
sys/dev/ice/ice_common.c
6893
u32 ice_get_link_speed(u16 index)
sys/dev/ice/ice_common.c
783
u32 val;
sys/dev/ice/ice_common.h
101
u32 start, void *buf, u16 buf_size, u16 *ret_buf_size,
sys/dev/ice/ice_common.h
103
u32 *ret_next_index, struct ice_sq_cd *cd);
sys/dev/ice/ice_common.h
122
u32 rxq_index);
sys/dev/ice/ice_common.h
125
u32 rxq_index);
sys/dev/ice/ice_common.h
126
int ice_clear_rxq_ctx(struct ice_hw *hw, u32 rxq_index);
sys/dev/ice/ice_common.h
128
ice_clear_tx_cmpltnq_ctx(struct ice_hw *hw, u32 tx_cmpltnq_index);
sys/dev/ice/ice_common.h
132
u32 tx_cmpltnq_index);
sys/dev/ice/ice_common.h
134
ice_clear_tx_drbell_q_ctx(struct ice_hw *hw, u32 tx_drbell_q_index);
sys/dev/ice/ice_common.h
138
u32 tx_drbell_q_index);
sys/dev/ice/ice_common.h
158
u8 timeout, u32 *blocked_cgds,
sys/dev/ice/ice_common.h
258
u32 ice_get_link_speed(u16 index);
sys/dev/ice/ice_common.h
267
u32 start_address, u8 *buf, u8 buf_size,
sys/dev/ice/ice_common.h
280
__ice_write_sr_word(struct ice_hw *hw, u32 offset, const u16 *data);
sys/dev/ice/ice_common.h
282
__ice_write_sr_buf(struct ice_hw *hw, u32 offset, u16 words, const u16 *data);
sys/dev/ice/ice_common.h
288
u16 *rdma_qset, u16 num_qsets, u32 *qset_teid);
sys/dev/ice/ice_common.h
290
ice_dis_vsi_rdma_qset(struct ice_port_info *pi, u16 count, u32 *qset_teid,
sys/dev/ice/ice_common.h
294
u16 *q_handle, u16 *q_ids, u32 *q_teids,
sys/dev/ice/ice_common.h
320
ice_stat_update40(struct ice_hw *hw, u32 reg, bool prev_stat_loaded,
sys/dev/ice/ice_common.h
323
ice_stat_update32(struct ice_hw *hw, u32 reg, bool prev_stat_loaded,
sys/dev/ice/ice_common.h
337
ice_aq_alternate_write(struct ice_hw *hw, u32 reg_addr0, u32 reg_val0,
sys/dev/ice/ice_common.h
338
u32 reg_addr1, u32 reg_val1);
sys/dev/ice/ice_common.h
340
ice_aq_alternate_read(struct ice_hw *hw, u32 reg_addr0, u32 *reg_val0,
sys/dev/ice/ice_common.h
341
u32 reg_addr1, u32 *reg_val1);
sys/dev/ice/ice_common.h
347
ice_sched_query_elem(struct ice_hw *hw, u32 node_teid,
sys/dev/ice/ice_common.h
350
ice_get_cur_lldp_persist_status(struct ice_hw *hw, u32 *lldp_status);
sys/dev/ice/ice_common.h
352
ice_get_dflt_lldp_persist_status(struct ice_hw *hw, u32 *lldp_status);
sys/dev/ice/ice_common.h
76
enum ice_aq_res_access_type access, u32 timeout);
sys/dev/ice/ice_common_txrx.h
148
u32 cmd, mss, type, tsolen;
sys/dev/ice/ice_common_txrx.h
192
ice_tx_setup_offload(struct ice_tx_queue *txq, if_pkt_info_t pi, u32 *cmd, u32 *off)
sys/dev/ice/ice_common_txrx.h
194
u32 remaining_csum_flags = pi->ipi_csum_flags;
sys/dev/ice/ice_controlq.c
1029
u32 total_delay = 0;
sys/dev/ice/ice_controlq.c
1032
u32 val = 0;
sys/dev/ice/ice_controlq.c
316
wr32(hw, cq->rq.tail, (u32)(cq->num_rq_entries - 1));
sys/dev/ice/ice_controlq.c
765
u32 retry = 0;
sys/dev/ice/ice_controlq.c
882
u32 head;
sys/dev/ice/ice_controlq.h
101
u32 head;
sys/dev/ice/ice_controlq.h
102
u32 tail;
sys/dev/ice/ice_controlq.h
103
u32 len;
sys/dev/ice/ice_controlq.h
104
u32 bah;
sys/dev/ice/ice_controlq.h
105
u32 bal;
sys/dev/ice/ice_controlq.h
106
u32 len_mask;
sys/dev/ice/ice_controlq.h
107
u32 len_ena_mask;
sys/dev/ice/ice_controlq.h
108
u32 len_crit_mask;
sys/dev/ice/ice_controlq.h
109
u32 head_mask;
sys/dev/ice/ice_controlq.h
130
u32 sq_cmd_timeout; /* send queue cmd write back timeout */
sys/dev/ice/ice_dcb.c
1012
u32 status, tlv_status = LE32_TO_CPU(cee_cfg->tlv_status);
sys/dev/ice/ice_dcb.c
1013
u32 ice_aqc_cee_status_mask, ice_aqc_cee_status_shift;
sys/dev/ice/ice_dcb.c
1361
u32 ouisubtype;
sys/dev/ice/ice_dcb.c
1402
u32 ouisubtype;
sys/dev/ice/ice_dcb.c
1431
u32 ouisubtype;
sys/dev/ice/ice_dcb.c
1472
u32 ouisubtype;
sys/dev/ice/ice_dcb.c
1518
u32 ouisubtype;
sys/dev/ice/ice_dcb.c
1526
ouisubtype = (u32)((ICE_DSCP_OUI << ICE_LLDP_TLV_OUI_S) |
sys/dev/ice/ice_dcb.c
1554
u32 ouisubtype;
sys/dev/ice/ice_dcb.c
1561
ouisubtype = (u32)((ICE_DSCP_OUI << ICE_LLDP_TLV_OUI_S) |
sys/dev/ice/ice_dcb.c
1580
u32 ouisubtype;
sys/dev/ice/ice_dcb.c
1589
ouisubtype = (u32)((ICE_DSCP_OUI << ICE_LLDP_TLV_OUI_S) |
sys/dev/ice/ice_dcb.c
1627
u32 ouisubtype;
sys/dev/ice/ice_dcb.c
1634
ouisubtype = (u32)((ICE_DSCP_OUI << ICE_LLDP_TLV_OUI_S) |
sys/dev/ice/ice_dcb.c
1805
u32 teid1, teid2;
sys/dev/ice/ice_dcb.c
278
u32 reg;
sys/dev/ice/ice_dcb.c
477
u32 ouisubtype;
sys/dev/ice/ice_dcb.c
652
u32 ouisubtype;
sys/dev/ice/ice_dcb.c
709
u32 ouisubtype;
sys/dev/ice/ice_dcb.c
710
u32 oui;
sys/dev/ice/ice_dcb.h
212
u32 defmaxtrafficclasses;
sys/dev/ice/ice_dcb.h
213
u32 defprioritytcmapping;
sys/dev/ice/ice_dcb.h
214
u32 deftcbandwidth;
sys/dev/ice/ice_dcb.h
215
u32 deftsaassignment;
sys/dev/ice/ice_ddp_common.c
1030
enum ice_ddp_state ice_verify_pkg(struct ice_pkg_hdr *pkg, u32 len)
sys/dev/ice/ice_ddp_common.c
1032
u32 seg_count;
sys/dev/ice/ice_ddp_common.c
1033
u32 i;
sys/dev/ice/ice_ddp_common.c
1055
u32 off = LE32_TO_CPU(pkg->seg_offset[i]);
sys/dev/ice/ice_ddp_common.c
1126
u32 i;
sys/dev/ice/ice_ddp_common.c
1185
ice_sw_fv_handler(u32 sect_type, void *section, u32 index, u32 *offset)
sys/dev/ice/ice_ddp_common.c
120
bool last_buf, u32 *error_offset, u32 *error_info,
sys/dev/ice/ice_ddp_common.c
1219
u32 offset;
sys/dev/ice/ice_ddp_common.c
1321
enum ice_ddp_state ice_init_pkg(struct ice_hw *hw, u8 *buf, u32 len)
sys/dev/ice/ice_ddp_common.c
1410
ice_copy_and_init_pkg(struct ice_hw *hw, const u8 *buf, u32 len)
sys/dev/ice/ice_ddp_common.c
1471
static bool ice_is_gtp_u_profile(u32 prof_idx)
sys/dev/ice/ice_ddp_common.c
1478
static bool ice_is_gtp_c_profile(u32 prof_idx)
sys/dev/ice/ice_ddp_common.c
1498
ice_get_sw_prof_type(struct ice_hw *hw, struct ice_fv *fv, u32 prof_idx)
sys/dev/ice/ice_ddp_common.c
1545
u32 offset;
sys/dev/ice/ice_ddp_common.c
1586
u32 offset;
sys/dev/ice/ice_ddp_common.c
165
ice_find_seg_in_pkg(struct ice_hw *hw, u32 seg_type,
sys/dev/ice/ice_ddp_common.c
1665
u32 off;
sys/dev/ice/ice_ddp_common.c
168
u32 i;
sys/dev/ice/ice_ddp_common.c
1756
ice_pkg_buf_alloc_section(struct ice_buf_build *bld, u32 type, u16 size)
sys/dev/ice/ice_ddp_common.c
1807
ice_pkg_buf_alloc_single_section(struct ice_hw *hw, u32 type, u16 size,
sys/dev/ice/ice_ddp_common.c
195
ice_get_pkg_seg_by_idx(struct ice_pkg_hdr *pkg_hdr, u32 idx)
sys/dev/ice/ice_ddp_common.c
2043
u32 sect_type)
sys/dev/ice/ice_ddp_common.c
2109
u32 sect_type, u32 *offset,
sys/dev/ice/ice_ddp_common.c
2110
void *(*handler)(u32 sect_type, void *section,
sys/dev/ice/ice_ddp_common.c
2111
u32 index, u32 *offset))
sys/dev/ice/ice_ddp_common.c
212
static bool ice_is_signing_seg_at_idx(struct ice_pkg_hdr *pkg_hdr, u32 idx)
sys/dev/ice/ice_ddp_common.c
2158
ice_boost_tcam_handler(u32 sect_type, void *section, u32 index, u32 *offset)
sys/dev/ice/ice_ddp_common.c
234
ice_is_signing_seg_type_at_idx(struct ice_pkg_hdr *pkg_hdr, u32 idx,
sys/dev/ice/ice_ddp_common.c
235
u32 seg_id, u32 sign_type)
sys/dev/ice/ice_ddp_common.c
2403
int ice_cfg_tx_topo(struct ice_hw *hw, u8 *buf, u32 len)
sys/dev/ice/ice_ddp_common.c
2411
u32 reg = 0;
sys/dev/ice/ice_ddp_common.c
259
ice_update_pkg_no_lock(struct ice_hw *hw, struct ice_buf *bufs, u32 count)
sys/dev/ice/ice_ddp_common.c
262
u32 i;
sys/dev/ice/ice_ddp_common.c
267
u32 offset, info;
sys/dev/ice/ice_ddp_common.c
291
ice_update_pkg(struct ice_hw *hw, struct ice_buf *bufs, u32 count)
sys/dev/ice/ice_ddp_common.c
348
ice_is_last_download_buffer(struct ice_buf_hdr *buf, u32 idx, u32 count)
sys/dev/ice/ice_ddp_common.c
377
ice_dwnld_cfg_bufs_no_lock(struct ice_hw *hw, struct ice_buf *bufs, u32 start,
sys/dev/ice/ice_ddp_common.c
378
u32 count, bool indicate_last)
sys/dev/ice/ice_ddp_common.c
383
u32 offset, info, i;
sys/dev/ice/ice_ddp_common.c
449
static u32 ice_get_pkg_segment_id(enum ice_mac_type mac_type)
sys/dev/ice/ice_ddp_common.c
451
u32 seg_id;
sys/dev/ice/ice_ddp_common.c
472
static u32 ice_get_pkg_sign_type(enum ice_mac_type mac_type)
sys/dev/ice/ice_ddp_common.c
474
u32 sign_type;
sys/dev/ice/ice_ddp_common.c
51
u16 buf_size, bool last_buf, u32 *error_offset,
sys/dev/ice/ice_ddp_common.c
52
u32 *error_info, struct ice_sq_cd *cd)
sys/dev/ice/ice_ddp_common.c
535
u32 idx, u32 start, u32 count, bool last_seg)
sys/dev/ice/ice_ddp_common.c
540
u32 buf_count;
sys/dev/ice/ice_ddp_common.c
568
u32 idx)
sys/dev/ice/ice_ddp_common.c
573
u32 conf_idx;
sys/dev/ice/ice_ddp_common.c
574
u32 start;
sys/dev/ice/ice_ddp_common.c
575
u32 count;
sys/dev/ice/ice_ddp_common.c
576
u32 flags;
sys/dev/ice/ice_ddp_common.c
618
ice_match_signing_seg(struct ice_pkg_hdr *pkg_hdr, u32 seg_id, u32 sign_type)
sys/dev/ice/ice_ddp_common.c
621
u32 i;
sys/dev/ice/ice_ddp_common.c
665
u32 i;
sys/dev/ice/ice_ddp_common.c
707
ice_dwnld_cfg_bufs(struct ice_hw *hw, struct ice_buf *bufs, u32 count)
sys/dev/ice/ice_ddp_common.c
872
u32 i;
sys/dev/ice/ice_ddp_common.c
932
ice_label_enum_handler(u32 __ALWAYS_UNUSED sect_type, void *section, u32 index,
sys/dev/ice/ice_ddp_common.c
933
u32 *offset)
sys/dev/ice/ice_ddp_common.c
966
ice_enum_labels(struct ice_seg *ice_seg, u32 type, struct ice_pkg_enum *state,
sys/dev/ice/ice_ddp_common.c
997
ice_find_label_value(struct ice_seg *ice_seg, char const *name, u32 type,
sys/dev/ice/ice_ddp_common.h
406
u32 buf_idx;
sys/dev/ice/ice_ddp_common.h
408
u32 type;
sys/dev/ice/ice_ddp_common.h
410
u32 sect_idx;
sys/dev/ice/ice_ddp_common.h
412
u32 sect_type;
sys/dev/ice/ice_ddp_common.h
414
u32 entry_idx;
sys/dev/ice/ice_ddp_common.h
415
void *(*handler)(u32 sect_type, void *section, u32 index, u32 *offset);
sys/dev/ice/ice_ddp_common.h
426
ice_pkg_buf_alloc_section(struct ice_buf_build *bld, u32 type, u16 size);
sys/dev/ice/ice_ddp_common.h
438
ice_update_pkg(struct ice_hw *hw, struct ice_buf *bufs, u32 count);
sys/dev/ice/ice_ddp_common.h
440
ice_update_pkg_no_lock(struct ice_hw *hw, struct ice_buf *bufs, u32 count);
sys/dev/ice/ice_ddp_common.h
443
ice_find_seg_in_pkg(struct ice_hw *hw, u32 seg_type,
sys/dev/ice/ice_ddp_common.h
446
ice_verify_pkg(struct ice_pkg_hdr *pkg, u32 len);
sys/dev/ice/ice_ddp_common.h
462
u32 sect_type, u32 *offset,
sys/dev/ice/ice_ddp_common.h
463
void *(*handler)(u32 sect_type, void *section,
sys/dev/ice/ice_ddp_common.h
464
u32 index, u32 *offset));
sys/dev/ice/ice_ddp_common.h
467
u32 sect_type);
sys/dev/ice/ice_ddp_common.h
468
enum ice_ddp_state ice_init_pkg(struct ice_hw *hw, u8 *buff, u32 len);
sys/dev/ice/ice_ddp_common.h
470
ice_copy_and_init_pkg(struct ice_hw *hw, const u8 *buf, u32 len);
sys/dev/ice/ice_ddp_common.h
475
ice_pkg_buf_alloc_single_section(struct ice_hw *hw, u32 type, u16 size,
sys/dev/ice/ice_ddp_common.h
480
int ice_cfg_tx_topo(struct ice_hw *hw, u8 *buf, u32 len);
sys/dev/ice/ice_flex_pipe.c
119
static u32 ice_sect_id(enum ice_block blk, enum ice_sect sect)
sys/dev/ice/ice_flex_pipe.c
1568
static const u32 ice_blk_sids[ICE_BLK_COUNT][ICE_SID_OFF_COUNT] = {
sys/dev/ice/ice_flex_pipe.c
1680
static void ice_fill_tbl(struct ice_hw *hw, enum ice_block block_id, u32 sid)
sys/dev/ice/ice_flex_pipe.c
1682
u32 dst_len, sect_len, offset = 0;
sys/dev/ice/ice_flex_pipe.c
1766
sect_len = (u32)(LE16_TO_CPU(es->count) *
sys/dev/ice/ice_flex_pipe.c
1770
dst_len = (u32)(hw->blk[block_id].es.count *
sys/dev/ice/ice_flex_pipe.c
1901
ice_calloc(hw, (u32)(es->count * es->fvw),
sys/dev/ice/ice_flex_pipe.c
2290
u32 id;
sys/dev/ice/ice_flex_pipe.c
2329
u32 id;
sys/dev/ice/ice_flex_pipe.c
2369
u32 id;
sys/dev/ice/ice_flex_pipe.c
2403
u32 id;
sys/dev/ice/ice_flex_pipe.c
44
static const u32 ice_sect_lkup[ICE_BLK_COUNT][ICE_SECT_COUNT] = {
sys/dev/ice/ice_flex_pipe.h
41
ice_find_label_value(struct ice_seg *ice_seg, char const *name, u32 type,
sys/dev/ice/ice_flex_type.h
116
u32 offset;
sys/dev/ice/ice_flex_type.h
117
u32 length;
sys/dev/ice/ice_flex_type.h
149
u32 profile_id;
sys/dev/ice/ice_flex_type.h
266
u32 sid;
sys/dev/ice/ice_flex_type.h
334
u32 prop_mask;
sys/dev/ice/ice_flex_type.h
347
u32 sid;
sys/dev/ice/ice_flex_type.h
371
u32 sid;
sys/dev/ice/ice_flex_type.h
385
u32 val;
sys/dev/ice/ice_flex_type.h
421
u32 sid;
sys/dev/ice/ice_flex_type.h
430
u32 sid;
sys/dev/ice/ice_flow.c
138
static const u32 ice_ptypes_mac_ofos[] = {
sys/dev/ice/ice_flow.c
150
static const u32 ice_ptypes_macvlan_il[] = {
sys/dev/ice/ice_flow.c
164
static const u32 ice_ptypes_ipv4_ofos[] = {
sys/dev/ice/ice_flow.c
178
static const u32 ice_ptypes_ipv4_ofos_all[] = {
sys/dev/ice/ice_flow.c
190
static const u32 ice_ptypes_ipv4_il[] = {
sys/dev/ice/ice_flow.c
1952
u64 ice_get_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u32 hdrs)
sys/dev/ice/ice_flow.c
204
static const u32 ice_ptypes_ipv6_ofos[] = {
sys/dev/ice/ice_flow.c
218
static const u32 ice_ptypes_ipv6_ofos_all[] = {
sys/dev/ice/ice_flow.c
230
static const u32 ice_ptypes_ipv6_il[] = {
sys/dev/ice/ice_flow.c
244
static const u32 ice_ptypes_ipv4_ofos_no_l4[] = {
sys/dev/ice/ice_flow.c
256
static const u32 ice_ptypes_ipv4_il_no_l4[] = {
sys/dev/ice/ice_flow.c
270
static const u32 ice_ptypes_ipv6_ofos_no_l4[] = {
sys/dev/ice/ice_flow.c
282
static const u32 ice_ptypes_ipv6_il_no_l4[] = {
sys/dev/ice/ice_flow.c
294
static const u32 ice_ptypes_arp_of[] = {
sys/dev/ice/ice_flow.c
308
static const u32 ice_ptypes_udp_il[] = {
sys/dev/ice/ice_flow.c
320
static const u32 ice_ptypes_tcp_il[] = {
sys/dev/ice/ice_flow.c
332
static const u32 ice_ptypes_sctp_il[] = {
sys/dev/ice/ice_flow.c
344
static const u32 ice_ptypes_icmp_of[] = {
sys/dev/ice/ice_flow.c
356
static const u32 ice_ptypes_icmp_il[] = {
sys/dev/ice/ice_flow.c
368
static const u32 ice_ptypes_gre_of[] = {
sys/dev/ice/ice_flow.c
380
static const u32 ice_ptypes_mac_il[] = {
sys/dev/ice/ice_flow.c
459
u32 hdrs;
sys/dev/ice/ice_flow.c
787
u8 segs_cnt, u16 vsi_handle, u32 conds)
sys/dev/ice/ice_flow.h
204
u32 addl_hdrs; /* protocol header fields */
sys/dev/ice/ice_flow.h
229
#define ICE_FLOW_SET_HDRS(seg, val) ((seg)->hdrs |= (u32)(val))
sys/dev/ice/ice_flow.h
264
u32 hdrs; /* Bitmask indicating protocol headers present */
sys/dev/ice/ice_flow.h
326
u32 dummy;
sys/dev/ice/ice_flow.h
353
u64 ice_get_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u32 hdrs);
sys/dev/ice/ice_flow.h
37
#define ICE_IPV4_MAKE_PREFIX_MASK(prefix) ((u32)(~0) << (32 - (prefix)))
sys/dev/ice/ice_iflib.h
122
u32 me;
sys/dev/ice/ice_iflib.h
153
u32 tail;
sys/dev/ice/ice_iflib.h
155
u32 q_teid;
sys/dev/ice/ice_iflib.h
156
u32 me;
sys/dev/ice/ice_iflib.h
195
u32 tail;
sys/dev/ice/ice_iflib.h
197
u32 me;
sys/dev/ice/ice_iflib.h
224
u32 state;
sys/dev/ice/ice_iflib.h
334
u32 state;
sys/dev/ice/ice_iflib.h
339
u32 fw_debug_dump_cluster_mask;
sys/dev/ice/ice_iflib_txrx.c
141
u32 cmd, off;
sys/dev/ice/ice_iov.c
1647
(u32)ice_conv_link_speed_to_virtchnl(true,
sys/dev/ice/ice_iov.c
1671
u32 v_opcode = event->desc.cookie_high;
sys/dev/ice/ice_iov.c
484
u32 reg, reg_idx, bit_idx;
sys/dev/ice/ice_iov.c
510
u32 reg;
sys/dev/ice/ice_iov.c
546
u32 reg;
sys/dev/ice/ice_iov.c
622
u32 vf_caps;
sys/dev/ice/ice_iov.c
639
vf_caps = *((u32 *)(msg_buf));
sys/dev/ice/ice_iov.h
82
u32 vf_flags;
sys/dev/ice/ice_lan_tx_rx.h
1058
u32 qlen; /* bigger than needed, see above for reason */
sys/dev/ice/ice_lan_tx_rx.h
1096
u32 q_len;
sys/dev/ice/ice_lan_tx_rx.h
1099
u32 wrt_ptr;
sys/dev/ice/ice_lan_tx_rx.h
1108
u32 cmpltn_cache[16];
sys/dev/ice/ice_lan_tx_rx.h
1117
u32 db;
sys/dev/ice/ice_lan_tx_rx.h
281
u32 known:1;
sys/dev/ice/ice_lan_tx_rx.h
282
u32 outer_ip:1;
sys/dev/ice/ice_lan_tx_rx.h
283
u32 outer_ip_ver:2;
sys/dev/ice/ice_lan_tx_rx.h
284
u32 outer_frag:1;
sys/dev/ice/ice_lan_tx_rx.h
285
u32 tunnel_type:3;
sys/dev/ice/ice_lan_tx_rx.h
286
u32 tunnel_end_prot:2;
sys/dev/ice/ice_lan_tx_rx.h
287
u32 tunnel_end_frag:1;
sys/dev/ice/ice_lan_tx_rx.h
288
u32 inner_prot:4;
sys/dev/ice/ice_lan_tx_rx.h
289
u32 payload_layer:3;
sys/dev/ice/ice_lan_tx_rx.h
804
#define ICE_RXQ_CTX_SZ (ICE_RXQ_CTX_SIZE_DWORDS * sizeof(u32))
sys/dev/ice/ice_lan_tx_rx.h
806
#define ICE_TXQ_CTX_SZ (ICE_TXQ_CTX_SIZE_DWORDS * sizeof(u32))
sys/dev/ice/ice_lan_tx_rx.h
835
u32 rxmax; /* bigger than needed, see above for reason */
sys/dev/ice/ice_lib.c
10388
for (u32 i = 0; i < hw->func_caps.common_cap.num_msix_vectors; i++) {
sys/dev/ice/ice_lib.c
11047
ice_fec_counter_read(struct ice_hw *hw, u32 receiver_id, u32 reg_offset,
sys/dev/ice/ice_lib.c
11081
u32 uncorr_low_reg = 0, uncorr_high_reg = 0;
sys/dev/ice/ice_lib.c
11083
u32 corr_low_reg = 0, corr_high_reg = 0;
sys/dev/ice/ice_lib.c
11085
u32 receiver_id = 0;
sys/dev/ice/ice_lib.c
11461
((u32)ice_prv_regs_buf.stats.fec_corr_cnt_high << 16) |
sys/dev/ice/ice_lib.c
11464
((u32)ice_prv_regs_buf.stats.fec_uncorr_cnt_high << 16) |
sys/dev/ice/ice_lib.c
11721
u32 ret_next_index = 0;
sys/dev/ice/ice_lib.c
1386
u32 val;
sys/dev/ice/ice_lib.c
1434
u32 val;
sys/dev/ice/ice_lib.c
1485
u32 reg, val;
sys/dev/ice/ice_lib.c
1522
u32 reg, val;
sys/dev/ice/ice_lib.c
1731
u32 rxdid = ICE_RXDID_FLEX_NIC;
sys/dev/ice/ice_lib.c
1732
u32 regval;
sys/dev/ice/ice_lib.c
1836
ice_is_rxq_ready(struct ice_hw *hw, int pf_q, u32 *reg)
sys/dev/ice/ice_lib.c
1838
u32 qrx_ctrl, qena_req, qena_stat;
sys/dev/ice/ice_lib.c
1876
u32 qrx_ctrl = 0;
sys/dev/ice/ice_lib.c
192
static int ice_fec_counter_read(struct ice_hw *hw, u32 receiver_id,
sys/dev/ice/ice_lib.c
193
u32 reg_offset, u16 *output);
sys/dev/ice/ice_lib.c
2153
u32 val;
sys/dev/ice/ice_lib.c
3889
u32 lldp_state;
sys/dev/ice/ice_lib.c
3930
u32 lldp_state;
sys/dev/ice/ice_lib.c
3995
u32 old_state;
sys/dev/ice/ice_lib.c
4737
u32 info, data;
sys/dev/ice/ice_lib.c
514
u32 table = 0;
sys/dev/ice/ice_lib.c
5269
u32 val;
sys/dev/ice/ice_lib.c
6216
u32 copied_state;
sys/dev/ice/ice_lib.c
6507
u32 clusters;
sys/dev/ice/ice_lib.c
6525
u32 valid_cluster_mask;
sys/dev/ice/ice_lib.c
6572
u32 offset = 0;
sys/dev/ice/ice_lib.c
6578
u32 ret_next_index = 0;
sys/dev/ice/ice_lib.c
6618
u32 print_cluster_id = (u32)cluster_id;
sys/dev/ice/ice_lib.c
6621
u32 print_table_id = (u32)table_id;
sys/dev/ice/ice_lib.c
6624
u32 print_table_length = (u32)ret_buf_size;
sys/dev/ice/ice_lib.c
6627
u32 print_curr_offset = offset;
sys/dev/ice/ice_lib.c
6695
u32 cluster_mask = sc->fw_debug_dump_cluster_mask;
sys/dev/ice/ice_lib.c
7045
u32 *q_teids;
sys/dev/ice/ice_lib.c
7054
q_teids = (u32 *)malloc(q_teids_size, M_ICE, M_NOWAIT|M_ZERO);
sys/dev/ice/ice_lib.c
75
static int ice_is_rxq_ready(struct ice_hw *hw, int pf_q, u32 *reg);
sys/dev/ice/ice_lib.c
8337
u32 reg;
sys/dev/ice/ice_lib.h
524
u32 corer_count;
sys/dev/ice/ice_lib.h
525
u32 globr_count;
sys/dev/ice/ice_lib.h
526
u32 empr_count;
sys/dev/ice/ice_lib.h
527
u32 pfr_count;
sys/dev/ice/ice_lib.h
530
u32 tx_mdd_count;
sys/dev/ice/ice_lib.h
531
u32 rx_mdd_count;
sys/dev/ice/ice_lib.h
625
u32 offset; /* offset to read/write from table, in bytes */
sys/dev/ice/ice_lib.h
630
u32 reserved2;
sys/dev/ice/ice_lib.h
738
ice_set_state(volatile u32 *s, enum ice_state bit)
sys/dev/ice/ice_lib.h
752
ice_clear_state(volatile u32 *s, enum ice_state bit)
sys/dev/ice/ice_lib.h
766
static inline u32
sys/dev/ice/ice_lib.h
767
ice_testandset_state(volatile u32 *s, enum ice_state bit)
sys/dev/ice/ice_lib.h
781
static inline u32
sys/dev/ice/ice_lib.h
782
ice_testandclear_state(volatile u32 *s, enum ice_state bit)
sys/dev/ice/ice_lib.h
797
static inline u32
sys/dev/ice/ice_lib.h
798
ice_test_state(volatile u32 *s, enum ice_state bit)
sys/dev/ice/ice_lib.h
827
struct ice_str_buf _ice_fw_lldp_status(u32 lldp_status);
sys/dev/ice/ice_lib.h
851
u32 dyn_ctl;
sys/dev/ice/ice_lib.h
869
u32 dyn_ctl;
sys/dev/ice/ice_nvm.c
100
u32 bytes_read = 0;
sys/dev/ice/ice_nvm.c
1000
u32 tmp;
sys/dev/ice/ice_nvm.c
1075
u32 combo_ver;
sys/dev/ice/ice_nvm.c
115
u32 read_size, sector_offset;
sys/dev/ice/ice_nvm.c
1226
u32 min_size = 0, max_size = ICE_AQC_NVM_MAX_OFFSET + 1;
sys/dev/ice/ice_nvm.c
123
read_size = MIN_T(u32, ICE_AQ_MAX_BUF_LEN - sector_offset,
sys/dev/ice/ice_nvm.c
1236
u32 offset = (max_size + min_size) / 2;
sys/dev/ice/ice_nvm.c
1237
u32 len = 1;
sys/dev/ice/ice_nvm.c
1281
static int ice_read_sr_pointer(struct ice_hw *hw, u16 offset, u32 *pointer)
sys/dev/ice/ice_nvm.c
1312
static int ice_read_sr_area_size(struct ice_hw *hw, u16 offset, u32 *size)
sys/dev/ice/ice_nvm.c
1419
u32 fla, gens_stat;
sys/dev/ice/ice_nvm.c
1512
__ice_write_sr_word(struct ice_hw *hw, u32 offset, const u16 *data)
sys/dev/ice/ice_nvm.c
1535
__ice_write_sr_buf(struct ice_hw *hw, u32 offset, u16 words, const u16 *data)
sys/dev/ice/ice_nvm.c
1540
u32 i;
sys/dev/ice/ice_nvm.c
161
ice_aq_update_nvm(struct ice_hw *hw, u16 module_typeid, u32 offset,
sys/dev/ice/ice_nvm.c
1617
if (i >= (u32)vpd_module &&
sys/dev/ice/ice_nvm.c
1618
i < ((u32)vpd_module + ICE_SR_VPD_SIZE_WORDS))
sys/dev/ice/ice_nvm.c
1621
if (i >= (u32)pcie_alt_module &&
sys/dev/ice/ice_nvm.c
1622
i < ((u32)pcie_alt_module + ICE_SR_PCIE_ALT_SIZE_WORDS))
sys/dev/ice/ice_nvm.c
1953
u32 ice_nvm_access_get_module(struct ice_nvm_access_cmd *cmd)
sys/dev/ice/ice_nvm.c
1964
u32 ice_nvm_access_get_flags(struct ice_nvm_access_cmd *cmd)
sys/dev/ice/ice_nvm.c
1975
u32 ice_nvm_access_get_adapter(struct ice_nvm_access_cmd *cmd)
sys/dev/ice/ice_nvm.c
1992
u32 module, flags, offset;
sys/dev/ice/ice_nvm.c
2023
if (offset == (u32)GL_HIDA(i))
sys/dev/ice/ice_nvm.c
2027
if (offset == (u32)GL_HIBA(i))
sys/dev/ice/ice_nvm.c
2126
u32 module, flags, adapter_info;
sys/dev/ice/ice_nvm.c
304
ice_check_sr_access_params(struct ice_hw *hw, u32 offset, u16 words)
sys/dev/ice/ice_nvm.c
338
u32 bytes = sizeof(u16);
sys/dev/ice/ice_nvm.c
368
ice_write_sr_aq(struct ice_hw *hw, u32 offset, u16 words, __le16 *data,
sys/dev/ice/ice_nvm.c
396
u32 bytes = *words * 2, i;
sys/dev/ice/ice_nvm.c
460
static u32 ice_get_flash_bank_offset(struct ice_hw *hw, enum ice_bank_select bank, u16 module)
sys/dev/ice/ice_nvm.c
465
u32 offset, size;
sys/dev/ice/ice_nvm.c
50
ice_aq_read_nvm(struct ice_hw *hw, u16 module_typeid, u32 offset, u16 length,
sys/dev/ice/ice_nvm.c
535
u32 offset, u8 *data, u32 length)
sys/dev/ice/ice_nvm.c
538
u32 start;
sys/dev/ice/ice_nvm.c
571
ice_read_nvm_module(struct ice_hw *hw, enum ice_bank_select bank, u32 offset, u16 *data)
sys/dev/ice/ice_nvm.c
595
u32 *hdr_len)
sys/dev/ice/ice_nvm.c
598
u32 hdr_len_dword;
sys/dev/ice/ice_nvm.c
631
ice_read_nvm_sr_copy(struct ice_hw *hw, enum ice_bank_select bank, u32 offset, u16 *data)
sys/dev/ice/ice_nvm.c
633
u32 hdr_len;
sys/dev/ice/ice_nvm.c
657
ice_read_orom_module(struct ice_hw *hw, enum ice_bank_select bank, u32 offset, u16 *data)
sys/dev/ice/ice_nvm.c
680
ice_read_netlist_module(struct ice_hw *hw, enum ice_bank_select bank, u32 offset, u16 *data)
sys/dev/ice/ice_nvm.c
805
int ice_read_pba_string(struct ice_hw *hw, u8 *pba_num, u32 pba_num_size)
sys/dev/ice/ice_nvm.c
835
if (pba_num_size < (((u32)pba_size * 2) + 1)) {
sys/dev/ice/ice_nvm.c
864
static int ice_get_nvm_srev(struct ice_hw *hw, enum ice_bank_select bank, u32 *srev)
sys/dev/ice/ice_nvm.c
949
static int ice_get_orom_srev(struct ice_hw *hw, enum ice_bank_select bank, u32 *srev)
sys/dev/ice/ice_nvm.c
951
u32 orom_size_word = hw->flash.banks.orom_size / 2;
sys/dev/ice/ice_nvm.c
953
u32 css_start;
sys/dev/ice/ice_nvm.c
954
u32 hdr_len;
sys/dev/ice/ice_nvm.c
96
ice_read_flat_nvm(struct ice_hw *hw, u32 offset, u32 *length, u8 *data,
sys/dev/ice/ice_nvm.c
99
u32 inlen = *length;
sys/dev/ice/ice_nvm.c
999
u32 offset;
sys/dev/ice/ice_nvm.h
116
ice_aq_read_nvm(struct ice_hw *hw, u16 module_typeid, u32 offset, u16 length,
sys/dev/ice/ice_nvm.h
120
ice_read_flat_nvm(struct ice_hw *hw, u32 offset, u32 *length, u8 *data,
sys/dev/ice/ice_nvm.h
136
ice_read_pba_string(struct ice_hw *hw, u8 *pba_num, u32 pba_num_size);
sys/dev/ice/ice_nvm.h
145
ice_aq_update_nvm(struct ice_hw *hw, u16 module_typeid, u32 offset,
sys/dev/ice/ice_nvm.h
84
u32 command; /* NVM command: READ or WRITE */
sys/dev/ice/ice_nvm.h
85
u32 config; /* NVM command configuration */
sys/dev/ice/ice_nvm.h
86
u32 offset; /* offset to read/write, in bytes */
sys/dev/ice/ice_nvm.h
87
u32 data_size; /* size of data field, in bytes */
sys/dev/ice/ice_nvm.h
92
u32 regval; /* Storage for register value */
sys/dev/ice/ice_nvm.h
96
u32 ice_nvm_access_get_module(struct ice_nvm_access_cmd *cmd);
sys/dev/ice/ice_nvm.h
97
u32 ice_nvm_access_get_flags(struct ice_nvm_access_cmd *cmd);
sys/dev/ice/ice_nvm.h
98
u32 ice_nvm_access_get_adapter(struct ice_nvm_access_cmd *cmd);
sys/dev/ice/ice_osdep.h
373
#define __le32 u32
sys/dev/ice/ice_osdep.h
376
#define __be32 u32
sys/dev/ice/ice_protocol_type.h
236
u32 flow_label : 20;
sys/dev/ice/ice_protocol_type.h
237
u32 tc : 8;
sys/dev/ice/ice_protocol_type.h
238
u32 version : 4;
sys/dev/ice/ice_protocol_type.h
240
u32 val;
sys/dev/ice/ice_rdma.c
363
u32 up2tc;
sys/dev/ice/ice_sbq_cmd.h
117
u32 msg_addr_high;
sys/dev/ice/ice_sbq_cmd.h
118
u32 data;
sys/dev/ice/ice_sched.c
1093
u16 num_nodes, u32 *first_node_teid,
sys/dev/ice/ice_sched.c
1137
u16 num_nodes, u32 *first_node_teid,
sys/dev/ice/ice_sched.c
1140
u32 *first_teid_ptr = first_node_teid;
sys/dev/ice/ice_sched.c
1143
u32 temp;
sys/dev/ice/ice_sched.c
1260
u32 teid = LE32_TO_CPU(node->info.node_teid);
sys/dev/ice/ice_sched.c
1412
struct ice_sched_node *ice_sched_get_node(struct ice_port_info *pi, u32 teid)
sys/dev/ice/ice_sched.c
1497
u32 val, clk_src;
sys/dev/ice/ice_sched.c
1696
u32 agg_id)
sys/dev/ice/ice_sched.c
1727
u32 node_teid;
sys/dev/ice/ice_sched.c
1790
u32 first_node_teid;
sys/dev/ice/ice_sched.c
1893
u32 first_node_teid;
sys/dev/ice/ice_sched.c
2062
u32 teid = LE32_TO_CPU(vsi_node->info.node_teid);
sys/dev/ice/ice_sched.c
2100
u32 teid = LE32_TO_CPU(vsi_node->info.node_teid);
sys/dev/ice/ice_sched.c
2292
ice_aq_query_node_to_root(struct ice_hw *hw, u32 node_teid,
sys/dev/ice/ice_sched.c
2314
ice_get_agg_info(struct ice_hw *hw, u32 agg_id)
sys/dev/ice/ice_sched.c
2413
u16 num_items, u32 *list)
sys/dev/ice/ice_sched.c
2475
ice_sched_move_vsi_to_agg(struct ice_port_info *pi, u16 vsi_handle, u32 agg_id,
sys/dev/ice/ice_sched.c
2480
u32 first_node_teid, vsi_teid;
sys/dev/ice/ice_sched.c
2621
ice_sched_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc)
sys/dev/ice/ice_sched.c
267
u16 num_nodes, u32 *node_teids)
sys/dev/ice/ice_sched.c
2702
ice_save_agg_tc_bitmap(struct ice_port_info *pi, u32 agg_id,
sys/dev/ice/ice_sched.c
2725
ice_sched_add_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc)
sys/dev/ice/ice_sched.c
2730
u32 first_node_teid;
sys/dev/ice/ice_sched.c
2815
ice_sched_cfg_agg(struct ice_port_info *pi, u32 agg_id,
sys/dev/ice/ice_sched.c
2877
ice_cfg_agg(struct ice_port_info *pi, u32 agg_id, enum ice_agg_type agg_type,
sys/dev/ice/ice_sched.c
2950
ice_save_agg_vsi_tc_bitmap(struct ice_port_info *pi, u32 agg_id, u16 vsi_handle,
sys/dev/ice/ice_sched.c
2980
ice_sched_assoc_vsi_to_agg(struct ice_port_info *pi, u32 agg_id,
sys/dev/ice/ice_sched.c
3157
ice_move_vsi_to_agg(struct ice_port_info *pi, u32 agg_id, u16 vsi_handle,
sys/dev/ice/ice_sched.c
3181
int ice_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id)
sys/dev/ice/ice_sched.c
3296
static void ice_set_clear_cir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
sys/dev/ice/ice_sched.c
3315
static void ice_set_clear_eir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
sys/dev/ice/ice_sched.c
3334
static void ice_set_clear_shared_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
sys/dev/ice/ice_sched.c
3358
enum ice_rl_type rl_type, u32 bw)
sys/dev/ice/ice_sched.c
3436
ice_sched_save_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 tc,
sys/dev/ice/ice_sched.c
3470
ice_sched_save_agg_bw(struct ice_port_info *pi, u32 agg_id, u8 tc,
sys/dev/ice/ice_sched.c
3471
enum ice_rl_type rl_type, u32 bw)
sys/dev/ice/ice_sched.c
3509
enum ice_rl_type rl_type, u32 bw)
sys/dev/ice/ice_sched.c
355
u32 teid = LE32_TO_CPU(node->info.node_teid);
sys/dev/ice/ice_sched.c
3565
ice_cfg_agg_bw_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
sys/dev/ice/ice_sched.c
3566
enum ice_rl_type rl_type, u32 bw)
sys/dev/ice/ice_sched.c
3591
ice_cfg_agg_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
sys/dev/ice/ice_sched.c
3620
ice_cfg_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle, u32 min_bw,
sys/dev/ice/ice_sched.c
3621
u32 max_bw, u32 shared_bw)
sys/dev/ice/ice_sched.c
3656
ice_cfg_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 min_bw,
sys/dev/ice/ice_sched.c
3657
u32 max_bw, u32 shared_bw)
sys/dev/ice/ice_sched.c
3672
ice_cfg_agg_bw_no_shared_lmt(struct ice_port_info *pi, u32 agg_id)
sys/dev/ice/ice_sched.c
3692
ice_cfg_agg_bw_shared_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
sys/dev/ice/ice_sched.c
3693
u32 min_bw, u32 max_bw, u32 shared_bw)
sys/dev/ice/ice_sched.c
3709
ice_cfg_agg_bw_no_shared_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc)
sys/dev/ice/ice_sched.c
3728
ice_cfg_vsi_q_priority(struct ice_port_info *pi, u16 num_qs, u32 *q_ids,
sys/dev/ice/ice_sched.c
3768
ice_cfg_agg_vsi_priority_per_tc(struct ice_port_info *pi, u32 agg_id,
sys/dev/ice/ice_sched.c
3907
ice_cfg_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 ena_tcmap,
sys/dev/ice/ice_sched.c
4009
ice_sched_bw_to_rl_profile(struct ice_hw *hw, u32 bw,
sys/dev/ice/ice_sched.c
4081
u32 bw, u8 layer_num)
sys/dev/ice/ice_sched.c
4398
enum ice_rl_type rl_type, u32 bw, u8 layer_num)
sys/dev/ice/ice_sched.c
4499
enum ice_rl_type rl_type, u32 bw)
sys/dev/ice/ice_sched.c
4575
ice_sched_save_q_bw(struct ice_q_ctx *q_ctx, enum ice_rl_type rl_type, u32 bw)
sys/dev/ice/ice_sched.c
4606
u16 q_handle, enum ice_rl_type rl_type, u32 bw)
sys/dev/ice/ice_sched.c
4669
u16 q_handle, enum ice_rl_type rl_type, u32 bw)
sys/dev/ice/ice_sched.c
4705
enum ice_rl_type rl_type, u32 bw)
sys/dev/ice/ice_sched.c
4739
enum ice_rl_type rl_type, u32 bw)
sys/dev/ice/ice_sched.c
4787
enum ice_rl_type rl_type, u32 bw)
sys/dev/ice/ice_sched.c
4950
ice_sched_get_node_by_id_type(struct ice_port_info *pi, u32 id,
sys/dev/ice/ice_sched.c
5015
ice_sched_set_node_bw_lmt_per_tc(struct ice_port_info *pi, u32 id,
sys/dev/ice/ice_sched.c
5017
enum ice_rl_type rl_type, u32 bw)
sys/dev/ice/ice_sched.c
5111
enum ice_rl_type rl_type, u32 bw)
sys/dev/ice/ice_sched.c
5142
u8 tc, u32 min_bw, u32 max_bw, u32 shared_bw)
sys/dev/ice/ice_sched.c
5196
u32 min_bw, u32 max_bw, u32 shared_bw)
sys/dev/ice/ice_sched.c
5245
ice_sched_validate_agg_srl_node(struct ice_port_info *pi, u32 agg_id)
sys/dev/ice/ice_sched.c
5300
ice_sched_validate_agg_id(struct ice_port_info *pi, u32 agg_id)
sys/dev/ice/ice_sched.c
5338
ice_sched_set_save_agg_srl_node_bw(struct ice_port_info *pi, u32 agg_id, u8 tc,
sys/dev/ice/ice_sched.c
5340
enum ice_rl_type rl_type, u32 bw)
sys/dev/ice/ice_sched.c
5370
ice_sched_set_agg_node_srl_per_tc(struct ice_port_info *pi, u32 agg_id,
sys/dev/ice/ice_sched.c
5371
u8 tc, u32 min_bw, u32 max_bw, u32 shared_bw)
sys/dev/ice/ice_sched.c
5425
ice_sched_set_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id,
sys/dev/ice/ice_sched.c
5426
u32 min_bw, u32 max_bw, u32 shared_bw)
sys/dev/ice/ice_sched.c
5477
ice_sched_set_agg_bw_shared_lmt_per_tc(struct ice_port_info *pi, u32 agg_id,
sys/dev/ice/ice_sched.c
5478
u8 tc, u32 min_bw, u32 max_bw,
sys/dev/ice/ice_sched.c
5479
u32 shared_bw)
sys/dev/ice/ice_sched.c
5540
int ice_cfg_rl_burst_size(struct ice_hw *hw, u32 bytes)
sys/dev/ice/ice_sched.c
558
ice_sched_suspend_resume_elems(struct ice_hw *hw, u8 num_nodes, u32 *node_teids,
sys/dev/ice/ice_sched.c
82
ice_sched_find_node_by_teid(struct ice_sched_node *start_node, u32 teid)
sys/dev/ice/ice_sched.c
988
u16 *num_nodes_added, u32 *first_node_teid,
sys/dev/ice/ice_sched.c
997
u32 teid;
sys/dev/ice/ice_sched.h
104
u32 agg_id;
sys/dev/ice/ice_sched.h
136
enum ice_rl_type rl_type, u32 bw);
sys/dev/ice/ice_sched.h
140
enum ice_rl_type rl_type, u32 bw, u8 layer_num);
sys/dev/ice/ice_sched.h
145
u16 *num_nodes_added, u32 *first_node_teid,
sys/dev/ice/ice_sched.h
150
u16 num_items, u32 *list);
sys/dev/ice/ice_sched.h
169
struct ice_sched_node *ice_sched_get_node(struct ice_port_info *pi, u32 teid);
sys/dev/ice/ice_sched.h
171
ice_sched_find_node_by_teid(struct ice_sched_node *start_node, u32 teid);
sys/dev/ice/ice_sched.h
195
ice_aq_query_node_to_root(struct ice_hw *hw, u32 node_teid,
sys/dev/ice/ice_sched.h
201
ice_cfg_agg(struct ice_port_info *pi, u32 agg_id,
sys/dev/ice/ice_sched.h
204
ice_move_vsi_to_agg(struct ice_port_info *pi, u32 agg_id, u16 vsi_handle,
sys/dev/ice/ice_sched.h
206
int ice_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id);
sys/dev/ice/ice_sched.h
209
u16 q_handle, enum ice_rl_type rl_type, u32 bw);
sys/dev/ice/ice_sched.h
215
enum ice_rl_type rl_type, u32 bw);
sys/dev/ice/ice_sched.h
221
enum ice_rl_type rl_type, u32 bw);
sys/dev/ice/ice_sched.h
226
ice_cfg_agg_bw_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
sys/dev/ice/ice_sched.h
227
enum ice_rl_type rl_type, u32 bw);
sys/dev/ice/ice_sched.h
229
ice_cfg_agg_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
sys/dev/ice/ice_sched.h
232
ice_cfg_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle, u32 min_bw,
sys/dev/ice/ice_sched.h
233
u32 max_bw, u32 shared_bw);
sys/dev/ice/ice_sched.h
237
ice_cfg_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 min_bw,
sys/dev/ice/ice_sched.h
238
u32 max_bw, u32 shared_bw);
sys/dev/ice/ice_sched.h
240
ice_cfg_agg_bw_no_shared_lmt(struct ice_port_info *pi, u32 agg_id);
sys/dev/ice/ice_sched.h
242
ice_cfg_agg_bw_shared_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
sys/dev/ice/ice_sched.h
243
u32 min_bw, u32 max_bw, u32 shared_bw);
sys/dev/ice/ice_sched.h
245
ice_cfg_agg_bw_no_shared_lmt_per_tc(struct ice_port_info *pi, u32 agg_id,
sys/dev/ice/ice_sched.h
248
ice_cfg_vsi_q_priority(struct ice_port_info *pi, u16 num_qs, u32 *q_ids,
sys/dev/ice/ice_sched.h
254
ice_cfg_agg_vsi_priority_per_tc(struct ice_port_info *pi, u32 agg_id,
sys/dev/ice/ice_sched.h
258
ice_cfg_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 ena_tcmap,
sys/dev/ice/ice_sched.h
266
ice_sched_set_node_bw_lmt_per_tc(struct ice_port_info *pi, u32 id,
sys/dev/ice/ice_sched.h
268
enum ice_rl_type rl_type, u32 bw);
sys/dev/ice/ice_sched.h
271
u32 min_bw, u32 max_bw, u32 shared_bw);
sys/dev/ice/ice_sched.h
273
ice_sched_set_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 min_bw,
sys/dev/ice/ice_sched.h
274
u32 max_bw, u32 shared_bw);
sys/dev/ice/ice_sched.h
276
ice_sched_set_agg_bw_shared_lmt_per_tc(struct ice_port_info *pi, u32 agg_id,
sys/dev/ice/ice_sched.h
277
u8 tc, u32 min_bw, u32 max_bw,
sys/dev/ice/ice_sched.h
278
u32 shared_bw);
sys/dev/ice/ice_sched.h
285
int ice_cfg_rl_burst_size(struct ice_hw *hw, u32 bytes);
sys/dev/ice/ice_sched.h
76
u32 bw; /* in Kbps */
sys/dev/ice/ice_sched.h
88
u32 bw; /* requested */
sys/dev/ice/ice_strings.c
1156
_ice_fw_lldp_status(u32 lldp_status)
sys/dev/ice/ice_switch.c
1234
u32 act = 0;
sys/dev/ice/ice_switch.c
1381
u32 act;
sys/dev/ice/ice_switch.c
1478
u32 act;
sys/dev/ice/ice_switch.c
949
ice_aq_set_storm_ctrl(struct ice_hw *hw, u32 bcast_thresh, u32 mcast_thresh,
sys/dev/ice/ice_switch.c
950
u32 ctl_bitmask)
sys/dev/ice/ice_switch.c
976
ice_aq_get_storm_ctrl(struct ice_hw *hw, u32 *bcast_thresh, u32 *mcast_thresh,
sys/dev/ice/ice_switch.c
977
u32 *ctl_bitmask)
sys/dev/ice/ice_switch.h
259
u32 act;
sys/dev/ice/ice_switch.h
266
u32 priority;
sys/dev/ice/ice_switch.h
494
ice_aq_get_storm_ctrl(struct ice_hw *hw, u32 *bcast_thresh, u32 *mcast_thresh,
sys/dev/ice/ice_switch.h
495
u32 *ctl_bitmask);
sys/dev/ice/ice_switch.h
497
ice_aq_set_storm_ctrl(struct ice_hw *hw, u32 bcast_thresh, u32 mcast_thresh,
sys/dev/ice/ice_switch.h
498
u32 ctl_bitmask);
sys/dev/ice/ice_type.h
101
#define ICE_HI_DWORD(x) ((u32)((((x) >> 16) >> 16) & 0xFFFFFFFF))
sys/dev/ice/ice_type.h
1016
u32 head;
sys/dev/ice/ice_type.h
1017
u32 tail;
sys/dev/ice/ice_type.h
1018
u32 num_iterations;
sys/dev/ice/ice_type.h
102
#define ICE_LO_DWORD(x) ((u32)((x) & 0xFFFFFFFF))
sys/dev/ice/ice_type.h
1031
u32 msg_count;
sys/dev/ice/ice_type.h
1079
u32 psm_clk_freq;
sys/dev/ice/ice_type.h
1130
u32 fw_build; /* firmware build number */
sys/dev/ice/ice_type.h
1167
u32 pkg_seg_id;
sys/dev/ice/ice_type.h
1168
u32 pkg_sign_type;
sys/dev/ice/ice_type.h
1169
u32 active_track_id;
sys/dev/ice/ice_type.h
1186
u32 pkg_size;
sys/dev/ice/ice_type.h
1275
u32 tx_lpi_status;
sys/dev/ice/ice_type.h
1276
u32 rx_lpi_status;
sys/dev/ice/ice_type.h
415
u32 switching_mode;
sys/dev/ice/ice_type.h
420
u32 mgmt_mode;
sys/dev/ice/ice_type.h
425
u32 mgmt_protocols_mctp;
sys/dev/ice/ice_type.h
431
u32 os2bmc;
sys/dev/ice/ice_type.h
432
u32 valid_functions;
sys/dev/ice/ice_type.h
434
u32 active_tc_bitmap;
sys/dev/ice/ice_type.h
435
u32 maxtc;
sys/dev/ice/ice_type.h
438
u32 rss_table_size; /* 512 for PFs and 64 for VFs */
sys/dev/ice/ice_type.h
439
u32 rss_table_entry_width; /* RSS Entry width in bits */
sys/dev/ice/ice_type.h
442
u32 num_rxq; /* Number/Total Rx queues */
sys/dev/ice/ice_type.h
443
u32 rxq_first_id; /* First queue ID for Rx queues */
sys/dev/ice/ice_type.h
444
u32 num_txq; /* Number/Total Tx queues */
sys/dev/ice/ice_type.h
445
u32 txq_first_id; /* First queue ID for Tx queues */
sys/dev/ice/ice_type.h
448
u32 num_msix_vectors;
sys/dev/ice/ice_type.h
449
u32 msix_vector_first_id;
sys/dev/ice/ice_type.h
452
u32 max_mtu;
sys/dev/ice/ice_type.h
455
u32 num_wol_proxy_fltr;
sys/dev/ice/ice_type.h
456
u32 wol_proxy_vsi_seid;
sys/dev/ice/ice_type.h
459
u32 led_pin_num;
sys/dev/ice/ice_type.h
460
u32 sdp_pin_num;
sys/dev/ice/ice_type.h
506
u32 ext_topo_dev_img_ver_high[ICE_EXT_TOPO_DEV_IMG_COUNT];
sys/dev/ice/ice_type.h
507
u32 ext_topo_dev_img_ver_low[ICE_EXT_TOPO_DEV_IMG_COUNT];
sys/dev/ice/ice_type.h
530
u32 mode;
sys/dev/ice/ice_type.h
537
u32 num_allocd_vfs; /* Number of allocated VFs */
sys/dev/ice/ice_type.h
538
u32 vf_base_id; /* Logical ID of the first VF */
sys/dev/ice/ice_type.h
539
u32 guar_num_vsi;
sys/dev/ice/ice_type.h
545
u32 num_vfs_exposed; /* Total number of VFs exposed */
sys/dev/ice/ice_type.h
546
u32 num_vsi_allocd_to_host; /* Excluding EMP VSI */
sys/dev/ice/ice_type.h
547
u32 num_funcs;
sys/dev/ice/ice_type.h
550
u32 supported_sensors;
sys/dev/ice/ice_type.h
629
u32 srev; /* Security revision */
sys/dev/ice/ice_type.h
634
u32 eetrack;
sys/dev/ice/ice_type.h
635
u32 srev;
sys/dev/ice/ice_type.h
642
u32 nvm;
sys/dev/ice/ice_type.h
643
u32 orom;
sys/dev/ice/ice_type.h
650
u32 major; /* major high/low */
sys/dev/ice/ice_type.h
651
u32 minor; /* minor high/low */
sys/dev/ice/ice_type.h
652
u32 type; /* type high/low */
sys/dev/ice/ice_type.h
653
u32 rev; /* revision high/low */
sys/dev/ice/ice_type.h
654
u32 hash; /* SHA-1 hash word */
sys/dev/ice/ice_type.h
678
u32 nvm_ptr; /* Pointer to 1st NVM bank */
sys/dev/ice/ice_type.h
679
u32 nvm_size; /* Size of NVM bank */
sys/dev/ice/ice_type.h
680
u32 orom_ptr; /* Pointer to 1st OROM bank */
sys/dev/ice/ice_type.h
681
u32 orom_size; /* Size of OROM bank */
sys/dev/ice/ice_type.h
682
u32 netlist_ptr; /* Pointer to 1st Netlist bank */
sys/dev/ice/ice_type.h
683
u32 netlist_size; /* Size of Netlist bank */
sys/dev/ice/ice_type.h
696
u32 flash_size; /* Size of available flash in bytes */
sys/dev/ice/ice_type.h
741
u32 agg_id; /* aggregator group ID */
sys/dev/ice/ice_type.h
767
u32 rate; /* In Kbps */
sys/dev/ice/ice_type.h
83
static inline u64 round_up_64bit(u64 a, u32 b)
sys/dev/ice/ice_type.h
851
u32 bw;
sys/dev/ice/ice_type.h
860
u32 shared_bw;
sys/dev/ice/ice_type.h
866
u32 q_teid;
sys/dev/ice/ice_type.h
88
static inline u32 ice_round_to_num(u32 N, u32 R)
sys/dev/ice/ice_type.h
923
u32 numapps;
sys/dev/ice/ice_type.h
924
u32 tlv_status; /* CEE mode TLV status */
sys/dev/ice/ice_type.h
954
u32 last_node_teid; /* scheduler last node info */
sys/dev/ice/ice_vf_mbx.c
101
static const u32 ice_legacy_aq_to_vc_speed[] = {
sys/dev/ice/ice_vf_mbx.c
127
u32 ice_conv_link_speed_to_virtchnl(bool adv_link_support, u16 link_speed)
sys/dev/ice/ice_vf_mbx.c
219
u32 num_iterations;
sys/dev/ice/ice_vf_mbx.c
299
u32 reg = rd32(hw, E830_MBX_VF_IN_FLIGHT_MSGS_AT_PF_CNT(vf_id));
sys/dev/ice/ice_vf_mbx.c
51
ice_aq_send_msg_to_vf(struct ice_hw *hw, u16 vfid, u32 v_opcode, u32 v_retval,
sys/dev/ice/ice_vf_mbx.h
53
ice_aq_send_msg_to_vf(struct ice_hw *hw, u16 vfid, u32 v_opcode, u32 v_retval,
sys/dev/ice/ice_vf_mbx.h
56
u32 ice_conv_link_speed_to_virtchnl(bool adv_link_support, u16 link_speed);
sys/dev/ice/ice_vlan_mode.c
66
u32 arr[ICE_META_INIT_DW_CNT];
sys/dev/ice/if_ice_iflib.c
1300
u32 oicr;
sys/dev/ice/if_ice_iflib.c
1336
u32 reset;
sys/dev/ice/if_ice_iflib.c
1500
u32 extra_vectors = iflib_get_extra_msix_vectors_sysctl(ctx);
sys/dev/ice/virtchnl.h
1144
u32 outer_ethertype_setting;
sys/dev/ice/virtchnl.h
1145
u32 inner_ethertype_setting;
sys/dev/ice/virtchnl.h
1294
u32 pad;
sys/dev/ice/virtchnl.h
1301
u32 num_tc;
sys/dev/ice/virtchnl.h
1302
u32 pad;
sys/dev/ice/virtchnl.h
1369
u32 action_meta;
sys/dev/ice/virtchnl.h
1377
u32 committed;
sys/dev/ice/virtchnl.h
1378
u32 peak;
sys/dev/ice/virtchnl.h
1419
u32 link_speed;
sys/dev/ice/virtchnl.h
1630
u32 field_selector; /* a bit mask to select field for header type */
sys/dev/ice/virtchnl.h
1644
u32 pad;
sys/dev/ice/virtchnl.h
1715
u32 id; /* counter ID */
sys/dev/ice/virtchnl.h
1718
u32 mark_id;
sys/dev/ice/virtchnl.h
1795
u32 flow_id; /* OUTPUT */
sys/dev/ice/virtchnl.h
1811
u32 flow_id; /* INPUT */
sys/dev/ice/virtchnl.h
1856
u32 flow_id; /* OUTPUT */
sys/dev/ice/virtchnl.h
1872
u32 flow_id; /* INPUT */
sys/dev/ice/virtchnl.h
2057
u32 teid;
sys/dev/ice/virtchnl.h
2058
u32 parent_teid;
sys/dev/ice/virtchnl.h
2061
u32 tx_priority;
sys/dev/ice/virtchnl.h
2062
u32 tx_weight;
sys/dev/ice/virtchnl.h
2121
virtchnl_vc_validate_vf_msg(struct virtchnl_version_info *ver, u32 v_opcode,
sys/dev/ice/virtchnl.h
2125
u32 valid_len = 0;
sys/dev/ice/virtchnl.h
2136
valid_len = sizeof(u32);
sys/dev/ice/virtchnl.h
352
u32 vfid; /* used by PF when sending to VF */
sys/dev/ice/virtchnl.h
378
u32 major;
sys/dev/ice/virtchnl.h
379
u32 minor;
sys/dev/ice/virtchnl.h
474
u32 vf_cap_flags;
sys/dev/ice/virtchnl.h
475
u32 rss_key_size;
sys/dev/ice/virtchnl.h
476
u32 rss_lut_size;
sys/dev/ice/virtchnl.h
557
u32 ring_len; /* number of descriptors, multiple of 32 */
sys/dev/ice/virtchnl.h
560
u32 databuffer_size;
sys/dev/ice/virtchnl.h
561
u32 max_pkt_size;
sys/dev/ice/virtchnl.h
568
u32 pad2;
sys/dev/ice/virtchnl.h
594
u32 pad;
sys/dev/ice/virtchnl.h
659
u32 rx_queues;
sys/dev/ice/virtchnl.h
660
u32 tx_queues;
sys/dev/ice/virtchnl.h
859
u32 outer;
sys/dev/ice/virtchnl.h
860
u32 inner;
sys/dev/ice/virtchnl.h
887
u32 ethertype_init;
sys/dev/ice/virtchnl.h
931
u32 ethertype_init;
sys/dev/igc/if_igc.c
1053
u32 reg_icr;
sys/dev/igc/if_igc.c
1149
u32 reg_icr;
sys/dev/igc/if_igc.c
1282
u32 reg_rctl;
sys/dev/igc/if_igc.c
1337
u32 reg_rctl = 0;
sys/dev/igc/if_igc.c
1391
u32 link_check, thstat, ctrl;
sys/dev/igc/if_igc.c
1602
u32 ivar = 0, newitr = 0;
sys/dev/igc/if_igc.c
1612
u32 index = i >> 1;
sys/dev/igc/if_igc.c
1626
u32 index = i >> 1;
sys/dev/igc/if_igc.c
1706
igc_init_dmac(struct igc_softc *sc, u32 pba)
sys/dev/igc/if_igc.c
1710
u32 dmac, reg = ~IGC_DMACR_DMAC_EN;
sys/dev/igc/if_igc.c
1802
u32 rx_buffer_size;
sys/dev/igc/if_igc.c
1803
u32 pba;
sys/dev/igc/if_igc.c
1881
u32 reta;
sys/dev/igc/if_igc.c
1882
u32 rss_key[RSSKEYLEN], mrqc, shift = 0;
sys/dev/igc/if_igc.c
2139
u32 tctl, txdctl = 0;
sys/dev/igc/if_igc.c
2160
(u32)(bus_addr >> 32));
sys/dev/igc/if_igc.c
2162
(u32)bus_addr);
sys/dev/igc/if_igc.c
2208
u32 psize, rctl, rxcsum, srrctl = 0;
sys/dev/igc/if_igc.c
2286
u32 rxdctl;
sys/dev/igc/if_igc.c
2328
u32 reg;
sys/dev/igc/if_igc.c
2349
u32 mask;
sys/dev/igc/if_igc.c
2385
u32 ctrl_ext;
sys/dev/igc/if_igc.c
2404
u32 ctrl_ext;
sys/dev/igc/if_igc.c
2453
u32 ctrl, rctl;
sys/dev/igc/if_igc.c
2642
u32 reg, usec, rate;
sys/dev/igc/if_igc.c
3081
u32 reg, val, shift;
sys/dev/igc/if_igc.c
321
u32 *regs_buff;
sys/dev/igc/if_igc.c
324
regs_buff = malloc(sizeof(u32) * IGC_REGS_LEN, M_DEVBUF, M_WAITOK);
sys/dev/igc/if_igc.c
325
memset(regs_buff, 0, IGC_REGS_LEN * sizeof(u32));
sys/dev/igc/if_igc.c
403
u32 staterr = le32toh(rxr->rx_base[j].wb.upper.status_error);
sys/dev/igc/if_igc.c
404
u32 length = le32toh(rxr->rx_base[j].wb.upper.length);
sys/dev/igc/if_igc.c
913
u32 neweitr;
sys/dev/igc/if_igc.h
258
u32 me;
sys/dev/igc/if_igc.h
259
u32 payload;
sys/dev/igc/if_igc.h
279
u32 msix;
sys/dev/igc/if_igc.h
280
u32 eims; /* This queue's EIMS bit */
sys/dev/igc/if_igc.h
281
u32 me;
sys/dev/igc/if_igc.h
287
u32 me;
sys/dev/igc/if_igc.h
288
u32 msix;
sys/dev/igc/if_igc.h
289
u32 eims;
sys/dev/igc/if_igc.h
290
u32 eitr_setting;
sys/dev/igc/if_igc.h
321
u32 linkvec;
sys/dev/igc/if_igc.h
322
u32 ivars;
sys/dev/igc/if_igc.h
328
u32 ims;
sys/dev/igc/if_igc.h
330
u32 flags;
sys/dev/igc/if_igc.h
334
u32 txd_cmd;
sys/dev/igc/if_igc.h
336
u32 rx_mbuf_sz;
sys/dev/igc/if_igc.h
341
u32 wol;
sys/dev/igc/if_igc.h
351
u32 smartspeed;
sys/dev/igc/if_igc.h
352
u32 dmac;
sys/dev/igc/if_igc.h
353
u32 pba;
sys/dev/igc/igc_api.c
244
void igc_write_vfta(struct igc_hw *hw, u32 offset, u32 value)
sys/dev/igc/igc_api.c
260
u32 mc_addr_count)
sys/dev/igc/igc_api.c
394
int igc_rar_set(struct igc_hw *hw, u8 *addr, u32 index)
sys/dev/igc/igc_api.c
425
u32 igc_hash_mc_addr(struct igc_hw *hw, u8 *mc_addr)
sys/dev/igc/igc_api.c
454
s32 igc_read_phy_reg(struct igc_hw *hw, u32 offset, u16 *data)
sys/dev/igc/igc_api.c
471
s32 igc_write_phy_reg(struct igc_hw *hw, u32 offset, u16 data)
sys/dev/igc/igc_api.c
609
s32 igc_read_pba_string(struct igc_hw *hw, u8 *pba_num, u32 pba_num_size)
sys/dev/igc/igc_api.h
21
void igc_write_vfta(struct igc_hw *hw, u32 offset, u32 value);
sys/dev/igc/igc_api.h
30
int igc_rar_set(struct igc_hw *hw, u8 *addr, u32 index);
sys/dev/igc/igc_api.h
31
u32 igc_hash_mc_addr(struct igc_hw *hw, u8 *mc_addr);
sys/dev/igc/igc_api.h
33
u32 mc_addr_count);
sys/dev/igc/igc_api.h
37
s32 igc_read_phy_reg(struct igc_hw *hw, u32 offset, u16 *data);
sys/dev/igc/igc_api.h
38
s32 igc_write_phy_reg(struct igc_hw *hw, u32 offset, u16 data);
sys/dev/igc/igc_api.h
46
s32 igc_read_pba_string(struct igc_hw *hw, u8 *pba_num, u32 pba_num_size);
sys/dev/igc/igc_base.c
121
u32 rctl, rlpml, rxdctl[4], rfctl, temp_rctl, rx_enabled;
sys/dev/igc/igc_hw.h
122
#define __le32 u32
sys/dev/igc/igc_hw.h
352
void (*update_mc_addr_list)(struct igc_hw *, u8 *, u32);
sys/dev/igc/igc_hw.h
357
void (*write_vfta)(struct igc_hw *, u32, u32);
sys/dev/igc/igc_hw.h
359
int (*rar_set)(struct igc_hw *, u8*, u32);
sys/dev/igc/igc_hw.h
387
s32 (*read_reg)(struct igc_hw *, u32, u16 *);
sys/dev/igc/igc_hw.h
388
s32 (*read_reg_locked)(struct igc_hw *, u32, u16 *);
sys/dev/igc/igc_hw.h
389
s32 (*read_reg_page)(struct igc_hw *, u32, u16 *);
sys/dev/igc/igc_hw.h
394
s32 (*write_reg)(struct igc_hw *, u32, u16);
sys/dev/igc/igc_hw.h
395
s32 (*write_reg_locked)(struct igc_hw *, u32, u16);
sys/dev/igc/igc_hw.h
396
s32 (*write_reg_page)(struct igc_hw *, u32, u16);
sys/dev/igc/igc_hw.h
429
u32 mc_filter_type;
sys/dev/igc/igc_hw.h
441
u32 mta_shadow[MAX_MTA_REG];
sys/dev/igc/igc_hw.h
449
u32 max_frame_size;
sys/dev/igc/igc_hw.h
458
u32 addr;
sys/dev/igc/igc_hw.h
459
u32 id;
sys/dev/igc/igc_hw.h
460
u32 reset_delay_us; /* in usec */
sys/dev/igc/igc_hw.h
461
u32 revision;
sys/dev/igc/igc_hw.h
496
u32 high_water; /* Flow control high-water mark */
sys/dev/igc/igc_hw.h
497
u32 low_water; /* Flow control low-water mark */
sys/dev/igc/igc_hw.h
509
u32 mtu;
sys/dev/igc/igc_hw.h
541
s32 igc_read_pcie_cap_reg(struct igc_hw *hw, u32 reg, u16 *value);
sys/dev/igc/igc_hw.h
542
s32 igc_write_pcie_cap_reg(struct igc_hw *hw, u32 reg, u16 *value);
sys/dev/igc/igc_hw.h
543
void igc_read_pci_cfg(struct igc_hw *hw, u32 reg, u16 *value);
sys/dev/igc/igc_hw.h
544
void igc_write_pci_cfg(struct igc_hw *hw, u32 reg, u16 *value);
sys/dev/igc/igc_i225.c
1104
u32 data;
sys/dev/igc/igc_i225.c
1132
u32 data;
sys/dev/igc/igc_i225.c
1165
u32 ipcnfg, eeer;
sys/dev/igc/igc_i225.c
1177
u32 eee_su = IGC_READ_REG(hw, IGC_EEE_SU);
sys/dev/igc/igc_i225.c
184
u32 ctrl;
sys/dev/igc/igc_i225.c
272
u32 swfw_sync;
sys/dev/igc/igc_i225.c
273
u32 swmask = mask;
sys/dev/igc/igc_i225.c
274
u32 fwmask = mask << 16;
sys/dev/igc/igc_i225.c
28
u32 eecd = IGC_READ_REG(hw, IGC_EECD);
sys/dev/igc/igc_i225.c
322
u32 swfw_sync;
sys/dev/igc/igc_i225.c
346
u32 phpm_reg;
sys/dev/igc/igc_i225.c
348
u32 ctrl;
sys/dev/igc/igc_i225.c
373
u32 swsm;
sys/dev/igc/igc_i225.c
534
u32 i, k, eewr = 0;
sys/dev/igc/igc_i225.c
535
u32 attempts = 100000;
sys/dev/igc/igc_i225.c
675
u32 eec = 0;
sys/dev/igc/igc_i225.c
695
u32 burst_counter)
sys/dev/igc/igc_i225.c
719
s32 igc_write_erase_flash_command_i225(struct igc_hw *hw, u32 opcode,
sys/dev/igc/igc_i225.c
720
u32 address)
sys/dev/igc/igc_i225.c
722
u32 flswctl = 0;
sys/dev/igc/igc_i225.c
768
u32 block_sw_protect = 1;
sys/dev/igc/igc_i225.c
770
u32 i, fw_valid_bit;
sys/dev/igc/igc_i225.c
773
u32 flup;
sys/dev/igc/igc_i225.c
863
u32 i, reg;
sys/dev/igc/igc_i225.c
889
u32 tw_system, ltrc, ltrv, ltr_min, ltr_max, scale_min, scale_max;
sys/dev/igc/igc_i225.h
19
u32 burst_counter);
sys/dev/igc/igc_i225.h
20
s32 igc_write_erase_flash_command_i225(struct igc_hw *hw, u32 opcode,
sys/dev/igc/igc_i225.h
21
u32 address);
sys/dev/igc/igc_mac.c
1025
u32 ctrl;
sys/dev/igc/igc_mac.c
105
u8 IGC_UNUSEDARG *h, u32 IGC_UNUSEDARG a)
sys/dev/igc/igc_mac.c
133
u32 offset;
sys/dev/igc/igc_mac.c
152
void igc_write_vfta_generic(struct igc_hw *hw, u32 offset, u32 value)
sys/dev/igc/igc_mac.c
171
u32 i;
sys/dev/igc/igc_mac.c
201
u32 i;
sys/dev/igc/igc_mac.c
263
int igc_rar_set_generic(struct igc_hw *hw, u8 *addr, u32 index)
sys/dev/igc/igc_mac.c
265
u32 rar_low, rar_high;
sys/dev/igc/igc_mac.c
272
rar_low = ((u32) addr[0] | ((u32) addr[1] << 8) |
sys/dev/igc/igc_mac.c
273
((u32) addr[2] << 16) | ((u32) addr[3] << 24));
sys/dev/igc/igc_mac.c
275
rar_high = ((u32) addr[4] | ((u32) addr[5] << 8));
sys/dev/igc/igc_mac.c
301
u32 igc_hash_mc_addr_generic(struct igc_hw *hw, u8 *mc_addr)
sys/dev/igc/igc_mac.c
303
u32 hash_value, hash_mask;
sys/dev/igc/igc_mac.c
373
u8 *mc_addr_list, u32 mc_addr_count)
sys/dev/igc/igc_mac.c
375
u32 hash_value, hash_bit, hash_reg;
sys/dev/igc/igc_mac.c
384
for (i = 0; (u32) i < mc_addr_count; i++) {
sys/dev/igc/igc_mac.c
583
u32 tctl;
sys/dev/igc/igc_mac.c
606
u32 fcrtl = 0, fcrth = 0;
sys/dev/igc/igc_mac.c
645
u32 ctrl;
sys/dev/igc/igc_mac.c
79
u8 IGC_UNUSEDARG *h, u32 IGC_UNUSEDARG a)
sys/dev/igc/igc_mac.c
878
u32 status;
sys/dev/igc/igc_mac.c
92
u32 IGC_UNUSEDARG a, u32 IGC_UNUSEDARG b)
sys/dev/igc/igc_mac.c
923
u32 swsm;
sys/dev/igc/igc_mac.c
974
u32 swsm;
sys/dev/igc/igc_mac.h
15
void igc_null_update_mc(struct igc_hw *hw, u8 *h, u32 a);
sys/dev/igc/igc_mac.h
16
void igc_null_write_vfta(struct igc_hw *hw, u32 a, u32 b);
sys/dev/igc/igc_mac.h
17
int igc_null_rar_set(struct igc_hw *hw, u8 *h, u32 a);
sys/dev/igc/igc_mac.h
29
u8 *mc_addr_list, u32 mc_addr_count);
sys/dev/igc/igc_mac.h
30
int igc_rar_set_generic(struct igc_hw *hw, u8 *addr, u32 index);
sys/dev/igc/igc_mac.h
35
u32 igc_hash_mc_addr_generic(struct igc_hw *hw, u8 *mc_addr);
sys/dev/igc/igc_mac.h
43
void igc_set_pcie_no_snoop_generic(struct igc_hw *hw, u32 no_snoop);
sys/dev/igc/igc_mac.h
44
void igc_write_vfta_generic(struct igc_hw *hw, u32 offset, u32 value);
sys/dev/igc/igc_nvm.c
117
u32 eecd = IGC_READ_REG(hw, IGC_EECD);
sys/dev/igc/igc_nvm.c
118
u32 mask;
sys/dev/igc/igc_nvm.c
160
u32 eecd;
sys/dev/igc/igc_nvm.c
161
u32 i;
sys/dev/igc/igc_nvm.c
197
u32 attempts = 100000;
sys/dev/igc/igc_nvm.c
198
u32 i, reg = 0;
sys/dev/igc/igc_nvm.c
227
u32 eecd = IGC_READ_REG(hw, IGC_EECD);
sys/dev/igc/igc_nvm.c
262
u32 eecd = IGC_READ_REG(hw, IGC_EECD);
sys/dev/igc/igc_nvm.c
287
u32 eecd;
sys/dev/igc/igc_nvm.c
307
u32 eecd;
sys/dev/igc/igc_nvm.c
327
u32 eecd = IGC_READ_REG(hw, IGC_EECD);
sys/dev/igc/igc_nvm.c
379
u32 i, eerd = 0;
sys/dev/igc/igc_nvm.c
502
u32 pba_num_size)
sys/dev/igc/igc_nvm.c
579
if (pba_num_size < (((u32)length * 2) - 1)) {
sys/dev/igc/igc_nvm.c
616
u32 rar_high;
sys/dev/igc/igc_nvm.c
617
u32 rar_low;
sys/dev/igc/igc_nvm.c
708
u32 ctrl_ext;
sys/dev/igc/igc_nvm.c
81
static void igc_raise_eec_clk(struct igc_hw *hw, u32 *eecd)
sys/dev/igc/igc_nvm.c
96
static void igc_lower_eec_clk(struct igc_hw *hw, u32 *eecd)
sys/dev/igc/igc_nvm.h
11
u32 etrack_id;
sys/dev/igc/igc_nvm.h
36
u32 pba_num_size);
sys/dev/igc/igc_osdep.h
62
#define __le32 u32
sys/dev/igc/igc_phy.c
114
u32 manc;
sys/dev/igc/igc_phy.c
146
phy->id = (u32)(phy_id << 16);
sys/dev/igc/igc_phy.c
152
phy->id |= (u32)(phy_id & PHY_REVISION_MASK);
sys/dev/igc/igc_phy.c
153
phy->revision = (u32)(phy_id & ~PHY_REVISION_MASK);
sys/dev/igc/igc_phy.c
167
s32 igc_read_phy_reg_mdic(struct igc_hw *hw, u32 offset, u16 *data)
sys/dev/igc/igc_phy.c
170
u32 i, mdic = 0;
sys/dev/igc/igc_phy.c
226
s32 igc_write_phy_reg_mdic(struct igc_hw *hw, u32 offset, u16 data)
sys/dev/igc/igc_phy.c
229
u32 i, mdic = 0;
sys/dev/igc/igc_phy.c
242
mdic = (((u32)data) |
sys/dev/igc/igc_phy.c
594
u32 ctrl;
sys/dev/igc/igc_phy.c
63
u32 IGC_UNUSEDARG offset, u16 IGC_UNUSEDARG *data)
sys/dev/igc/igc_phy.c
801
s32 igc_phy_has_link_generic(struct igc_hw *hw, u32 iterations,
sys/dev/igc/igc_phy.c
802
u32 usec_interval, bool *success)
sys/dev/igc/igc_phy.c
857
u32 ctrl, timeout = 10000, phpm = 0;
sys/dev/igc/igc_phy.c
944
s32 igc_write_phy_reg_gpy(struct igc_hw *hw, u32 offset, u16 data)
sys/dev/igc/igc_phy.c
978
s32 igc_read_phy_reg_gpy(struct igc_hw *hw, u32 offset, u16 *data)
sys/dev/igc/igc_phy.c
98
u32 IGC_UNUSEDARG offset, u16 IGC_UNUSEDARG data)
sys/dev/igc/igc_phy.h
11
s32 igc_null_read_reg(struct igc_hw *hw, u32 offset, u16 *data);
sys/dev/igc/igc_phy.h
14
s32 igc_null_write_reg(struct igc_hw *hw, u32 offset, u16 data);
sys/dev/igc/igc_phy.h
24
s32 igc_phy_has_link_generic(struct igc_hw *hw, u32 iterations,
sys/dev/igc/igc_phy.h
25
u32 usec_interval, bool *success);
sys/dev/igc/igc_phy.h
26
enum igc_phy_type igc_get_phy_type_from_id(u32 phy_id);
sys/dev/igc/igc_phy.h
32
s32 igc_read_phy_reg_mdic(struct igc_hw *hw, u32 offset, u16 *data);
sys/dev/igc/igc_phy.h
33
s32 igc_write_phy_reg_mdic(struct igc_hw *hw, u32 offset, u16 data);
sys/dev/igc/igc_phy.h
39
s32 igc_write_phy_reg_gpy(struct igc_hw *hw, u32 offset, u16 data);
sys/dev/igc/igc_phy.h
40
s32 igc_read_phy_reg_gpy(struct igc_hw *hw, u32 offset, u16 *data);
sys/dev/irdma/fbsd_kcompat.c
1034
u32 *l_ptr;
sys/dev/irdma/fbsd_kcompat.c
1072
l_ptr = (u32 *)((uintptr_t)ilq + irdma_ilqs32_list[i].value);
sys/dev/irdma/fbsd_kcompat.c
1084
l_ptr = (u32 *)((uintptr_t)ieq + irdma_ieqs32_list[i].value);
sys/dev/irdma/fbsd_kcompat.c
1112
u64 size, u32 alignment)
sys/dev/irdma/fbsd_kcompat.c
178
void *addr, u32 len, u32 val)
sys/dev/irdma/fbsd_kcompat.c
180
u32 crc = calculate_crc32c(0xffffffff, addr, len) ^ 0xffffffff;
sys/dev/irdma/fbsd_kcompat.c
196
u32 local_ipaddr6[4] = {};
sys/dev/irdma/fbsd_kcompat.c
202
irdma_copy_ip_ntohl(local_ipaddr6, (u32 *)&sin6->sin6_addr);
sys/dev/irdma/fbsd_kcompat.c
235
u32 ip_addr[4] = {};
sys/dev/irdma/fbsd_kcompat.c
306
u32 ip[4] = {};
sys/dev/irdma/fbsd_kcompat.c
334
irdma_copy_ip_ntohl(ip, (u32 *)&((struct sockaddr_in6 *)sin)->sin6_addr);
sys/dev/irdma/fbsd_kcompat.c
446
u32 dst_ip, int arpindex)
sys/dev/irdma/fbsd_kcompat.c
451
u32 ip[4] = {};
sys/dev/irdma/fbsd_kcompat.c
476
u32 *dest, int arpindex)
sys/dev/irdma/fbsd_kcompat.c
54
inline u32
sys/dev/irdma/fbsd_kcompat.c
55
irdma_rd32(struct irdma_dev_ctx *dev_ctx, u32 reg){
sys/dev/irdma/fbsd_kcompat.c
608
u32 val;
sys/dev/irdma/fbsd_kcompat.c
66
irdma_wr32(struct irdma_dev_ctx *dev_ctx, u32 reg, u32 value)
sys/dev/irdma/fbsd_kcompat.c
78
irdma_rd64(struct irdma_dev_ctx *dev_ctx, u32 reg){
sys/dev/irdma/fbsd_kcompat.c
89
irdma_wr64(struct irdma_dev_ctx *dev_ctx, u32 reg, u64 value)
sys/dev/irdma/fbsd_kcompat.h
100
static inline int cq_validate_flags(u32 flags, u8 hw_rev)
sys/dev/irdma/fbsd_kcompat.h
109
u32 *idx)
sys/dev/irdma/fbsd_kcompat.h
140
struct ib_ah_attr *attr, u32 flags,
sys/dev/irdma/fbsd_kcompat.h
143
struct ib_ah_attr *attr, u32 flags,
sys/dev/irdma/fbsd_kcompat.h
146
void irdma_destroy_ah(struct ib_ah *ibah, u32 flags);
sys/dev/irdma/fbsd_kcompat.h
147
void irdma_destroy_ah_stub(struct ib_ah *ibah, u32 flags);
sys/dev/irdma/fbsd_kcompat.h
150
int ib_get_eth_speed(struct ib_device *dev, u32 port_num, u16 *speed, u8 *width);
sys/dev/irdma/fbsd_kcompat.h
182
u16 kc_rdma_get_udp_sport(u32 fl, u32 lqpn, u32 rqpn);
sys/dev/irdma/fbsd_kcompat.h
192
int irdma_addr_resolve_neigh(struct irdma_cm_node *cm_node, u32 dst_ip,
sys/dev/irdma/fbsd_kcompat.h
194
int irdma_addr_resolve_neigh_ipv6(struct irdma_cm_node *cm_node, u32 *dest,
sys/dev/irdma/fbsd_kcompat.h
200
u32 irdma_create_stag(struct irdma_device *iwdev);
sys/dev/irdma/fbsd_kcompat.h
201
void irdma_free_stag(struct irdma_device *iwdev, u32 stag);
sys/dev/irdma/fbsd_kcompat.h
220
u32 max_num_sg, struct ib_udata *udata);
sys/dev/irdma/icrdma.c
358
u32 pe_criterr;
sys/dev/irdma/icrdma_hw.c
101
u32 val;
sys/dev/irdma/icrdma_hw.c
102
u32 interval = 0;
sys/dev/irdma/icrdma_hw.c
119
icrdma_disable_irq(struct irdma_sc_dev *dev, u32 idx)
sys/dev/irdma/icrdma_hw.c
132
icrdma_cfg_ceq(struct irdma_sc_dev *dev, u32 ceq_id, u32 idx,
sys/dev/irdma/icrdma_hw.c
135
u32 reg_val;
sys/dev/irdma/icrdma_hw.c
212
dev->hw_regs[i] = (u32 IOMEM *) (hw_addr + icrdma_regs[i]);
sys/dev/irdma/icrdma_hw.c
261
u32 temp;
sys/dev/irdma/icrdma_hw.c
262
u32 lfc = 1;
sys/dev/irdma/icrdma_hw.c
263
u32 rx_pause_enable, tx_pause_enable;
sys/dev/irdma/icrdma_hw.c
290
u32 value, pfc = 0;
sys/dev/irdma/icrdma_hw.c
291
u32 i;
sys/dev/irdma/icrdma_hw.c
305
u32 pause;
sys/dev/irdma/icrdma_hw.c
306
u32 rx_pause_enable, tx_pause_enable;
sys/dev/irdma/icrdma_hw.c
409
u32 wqm_data;
sys/dev/irdma/icrdma_hw.c
422
u32 wqm_data;
sys/dev/irdma/icrdma_hw.c
436
u32 val;
sys/dev/irdma/icrdma_hw.c
46
static u32 icrdma_regs[IRDMA_MAX_REGS] = {
sys/dev/irdma/icrdma_hw.c
99
icrdma_ena_irq(struct irdma_sc_dev *dev, u32 idx)
sys/dev/irdma/irdma.h
163
u32 qp_id;
sys/dev/irdma/irdma.h
166
u32 use_cnt;
sys/dev/irdma/irdma.h
176
u32 no_of_mgs;
sys/dev/irdma/irdma.h
177
u32 dest_ip_addr[4];
sys/dev/irdma/irdma.h
192
u32 max_hw_wq_frags;
sys/dev/irdma/irdma.h
193
u32 max_hw_read_sges;
sys/dev/irdma/irdma.h
194
u32 max_hw_inline;
sys/dev/irdma/irdma.h
195
u32 max_hw_rq_quanta;
sys/dev/irdma/irdma.h
196
u32 max_hw_wq_quanta;
sys/dev/irdma/irdma.h
197
u32 min_hw_cq_size;
sys/dev/irdma/irdma.h
198
u32 max_hw_cq_size;
sys/dev/irdma/irdma.h
211
u32 min_hw_qp_id;
sys/dev/irdma/irdma.h
212
u32 min_hw_aeq_size;
sys/dev/irdma/irdma.h
213
u32 max_hw_aeq_size;
sys/dev/irdma/irdma.h
214
u32 min_hw_ceq_size;
sys/dev/irdma/irdma.h
215
u32 max_hw_ceq_size;
sys/dev/irdma/irdma.h
216
u32 max_hw_device_pages;
sys/dev/irdma/irdma.h
217
u32 max_hw_vf_fpm_id;
sys/dev/irdma/irdma.h
218
u32 first_hw_vf_fpm_id;
sys/dev/irdma/irdma.h
219
u32 max_hw_ird;
sys/dev/irdma/irdma.h
220
u32 max_hw_ord;
sys/dev/irdma/irdma.h
221
u32 max_hw_wqes;
sys/dev/irdma/irdma.h
222
u32 max_hw_pds;
sys/dev/irdma/irdma.h
223
u32 max_hw_ena_vf_count;
sys/dev/irdma/irdma.h
224
u32 max_qp_wr;
sys/dev/irdma/irdma.h
225
u32 max_pe_ready_count;
sys/dev/irdma/irdma.h
226
u32 max_done_count;
sys/dev/irdma/irdma.h
227
u32 max_sleep_count;
sys/dev/irdma/irdma.h
228
u32 max_cqp_compl_wait_time_ms;
sys/dev/irdma/irdma_cm.c
1167
irdma_parse_mpa(struct irdma_cm_node *cm_node, u8 *buf, u32 *type,
sys/dev/irdma/irdma_cm.c
1168
u32 len)
sys/dev/irdma/irdma_cm.c
1279
u32 was_timer_set;
sys/dev/irdma/irdma_cm.c
1384
u32 rem_node)
sys/dev/irdma/irdma_cm.c
1428
u32 settimer = 0;
sys/dev/irdma/irdma_cm.c
1507
send_entry->retranscount, (u32)4);
sys/dev/irdma/irdma_cm.c
154
irdma_record_ird_ord(struct irdma_cm_node *cm_node, u32 conn_ird,
sys/dev/irdma/irdma_cm.c
1543
irdma_send_syn(struct irdma_cm_node *cm_node, u32 sendack)
sys/dev/irdma/irdma_cm.c
155
u32 conn_ord)
sys/dev/irdma/irdma_cm.c
1640
irdma_find_listener(struct irdma_cm_core *cm_core, u32 *dst_addr, bool ipv4, u16 dst_port,
sys/dev/irdma/irdma_cm.c
1644
static const u32 ip_zero[4] = {0, 0, 0, 0};
sys/dev/irdma/irdma_cm.c
1645
u32 listen_addr[4];
sys/dev/irdma/irdma_cm.c
1729
static u8 irdma_iw_get_vlan_prio(u32 *loc_addr, u8 prio, bool ipv4)
sys/dev/irdma/irdma_cm.c
174
irdma_copy_ip_ntohl(u32 *dst, __be32 *src)
sys/dev/irdma/irdma_cm.c
1745
irdma_get_vlan_mac_ipv6(struct iw_cm_id *cm_id, u32 *addr, u16 *vlan_id, u8 *mac)
sys/dev/irdma/irdma_cm.c
1781
irdma_get_vlan_ipv4(struct iw_cm_id *cm_id, u32 *addr)
sys/dev/irdma/irdma_cm.c
188
irdma_copy_ip_htonl(__be32 *dst, u32 *src)
sys/dev/irdma/irdma_cm.c
2074
u16 rem_port, u32 *rem_addr, u16 loc_port,
sys/dev/irdma/irdma_cm.c
2075
u32 *loc_addr, u16 vlan_id)
sys/dev/irdma/irdma_cm.c
2078
u32 key = (rem_port << 16) | loc_port;
sys/dev/irdma/irdma_cm.c
2110
u32 key = (cm_node->rem_port << 16) | cm_node->loc_port;
sys/dev/irdma/irdma_cm.c
2123
irdma_ipv4_is_lpb(u32 loc_addr, u32 rem_addr)
sys/dev/irdma/irdma_cm.c
2134
irdma_ipv6_is_lpb(u32 *loc_addr, u32 *rem_addr)
sys/dev/irdma/irdma_cm.c
2558
u32 res_type;
sys/dev/irdma/irdma_cm.c
2623
u32 seq;
sys/dev/irdma/irdma_cm.c
2624
u32 ack_seq;
sys/dev/irdma/irdma_cm.c
2625
u32 loc_seq_num = cm_node->tcp_cntxt.loc_seq_num;
sys/dev/irdma/irdma_cm.c
2626
u32 rcv_nxt = cm_node->tcp_cntxt.rcv_nxt;
sys/dev/irdma/irdma_cm.c
2627
u32 rcv_wnd;
sys/dev/irdma/irdma_cm.c
2668
u32 inc_sequence;
sys/dev/irdma/irdma_cm.c
2736
u32 inc_sequence;
sys/dev/irdma/irdma_cm.c
2809
u32 inc_sequence;
sys/dev/irdma/irdma_cm.c
2812
u32 datasize = rbuf->datalen;
sys/dev/irdma/irdma_cm.c
2895
u32 fin_set = 0;
sys/dev/irdma/irdma_cm.c
3354
tcp_info->snd_mss = (u32)cm_node->tcp_cntxt.mss;
sys/dev/irdma/irdma_cm.c
3491
u32 retry_cnt;
sys/dev/irdma/irdma_cm.c
4172
u32 *ipaddr,
sys/dev/irdma/irdma_cm.c
4189
irdma_ip_vlan_match(u32 *ip1, u16 vlan_id1,
sys/dev/irdma/irdma_cm.c
4190
bool check_vlan, u32 *ip2,
sys/dev/irdma/irdma_cm.c
4209
u32 *ipaddr,
sys/dev/irdma/irdma_cm.c
4223
u32 qp_ip[4];
sys/dev/irdma/irdma_cm.c
4422
u32 *ipaddr,
sys/dev/irdma/irdma_cm.c
445
u32 opts_len = 0;
sys/dev/irdma/irdma_cm.c
446
u32 pd_len = 0;
sys/dev/irdma/irdma_cm.c
447
u32 hdr_len = 0;
sys/dev/irdma/irdma_cm.c
464
opts_len = (u32)options->size;
sys/dev/irdma/irdma_cm.c
561
u32 opts_len = 0;
sys/dev/irdma/irdma_cm.c
562
u32 pd_len = 0;
sys/dev/irdma/irdma_cm.c
563
u32 hdr_len = 0;
sys/dev/irdma/irdma_cm.c
574
opts_len = (u32)options->size;
sys/dev/irdma/irdma_cm.c
825
u32 optionsize, u32 syn_pkt)
sys/dev/irdma/irdma_cm.c
827
u32 tmp;
sys/dev/irdma/irdma_cm.c
828
u32 offset = 0;
sys/dev/irdma/irdma_cm.c
892
(u32)tcp_get_flags(tcph) & TH_SYN);
sys/dev/irdma/irdma_cm.h
244
u32 type;
sys/dev/irdma/irdma_cm.h
245
u32 retrycount;
sys/dev/irdma/irdma_cm.h
246
u32 retranscount;
sys/dev/irdma/irdma_cm.h
247
u32 context;
sys/dev/irdma/irdma_cm.h
248
u32 send_retrans;
sys/dev/irdma/irdma_cm.h
255
u32 loc_seq_num;
sys/dev/irdma/irdma_cm.h
256
u32 loc_ack_num;
sys/dev/irdma/irdma_cm.h
257
u32 rem_ack_num;
sys/dev/irdma/irdma_cm.h
258
u32 rcv_nxt;
sys/dev/irdma/irdma_cm.h
259
u32 loc_id;
sys/dev/irdma/irdma_cm.h
260
u32 rem_id;
sys/dev/irdma/irdma_cm.h
261
u32 snd_wnd;
sys/dev/irdma/irdma_cm.h
262
u32 max_snd_wnd;
sys/dev/irdma/irdma_cm.h
263
u32 rcv_wnd;
sys/dev/irdma/irdma_cm.h
264
u32 mss;
sys/dev/irdma/irdma_cm.h
271
u32 use_cnt;
sys/dev/irdma/irdma_cm.h
285
u32 loc_addr[4];
sys/dev/irdma/irdma_cm.h
286
u32 reused_node;
sys/dev/irdma/irdma_cm.h
299
u32 size;
sys/dev/irdma/irdma_cm.h
304
u32 size;
sys/dev/irdma/irdma_cm.h
333
u32 loc_addr[4], rem_addr[4];
sys/dev/irdma/irdma_cm.h
363
u32 loc_addr[4];
sys/dev/irdma/irdma_cm.h
364
u32 rem_addr[4];
sys/dev/irdma/irdma_cm.h
365
u32 qh_qpid;
sys/dev/irdma/irdma_cm.h
436
int irdma_add_arp(struct irdma_pci_f *rf, u32 *ip, const u8 *mac);
sys/dev/irdma/irdma_cm.h
439
bool irdma_ipv4_is_lpb(u32 loc_addr, u32 rem_addr);
sys/dev/irdma/irdma_cm.h
440
bool irdma_ipv6_is_lpb(u32 *loc_addr, u32 *rem_addr);
sys/dev/irdma/irdma_cm.h
441
int irdma_arp_table(struct irdma_pci_f *rf, u32 *ip_addr,
sys/dev/irdma/irdma_cm.h
442
const u8 *mac_addr, u32 action);
sys/dev/irdma/irdma_ctrl.c
1232
u32 pble_obj_cnt;
sys/dev/irdma/irdma_ctrl.c
1403
u32 wqe_idx;
sys/dev/irdma/irdma_ctrl.c
1519
irdma_sc_send_lsmm(struct irdma_sc_qp *qp, void *lsmm_buf, u32 size,
sys/dev/irdma/irdma_ctrl.c
1614
static u32 irdma_iwarp_opcode(struct irdma_aeqe_info *info, u8 *pkt){
sys/dev/irdma/irdma_ctrl.c
1616
u32 opcode = 0xffffffff;
sys/dev/irdma/irdma_ctrl.c
1709
u32 opcode;
sys/dev/irdma/irdma_ctrl.c
2074
irdma_get_encoded_wqe_size(u32 wqsize, enum irdma_queue_type queue_type)
sys/dev/irdma/irdma_ctrl.c
2499
u32 pble_obj_cnt;
sys/dev/irdma/irdma_ctrl.c
250
irdma_sc_pd_init(struct irdma_sc_dev *dev, struct irdma_sc_pd *pd, u32 pd_id,
sys/dev/irdma/irdma_ctrl.c
2688
u32 pble_obj_cnt;
sys/dev/irdma/irdma_ctrl.c
2761
irdma_get_cqp_reg_info(struct irdma_sc_cqp *cqp, u32 *val,
sys/dev/irdma/irdma_ctrl.c
2762
u32 *tail, u32 *error)
sys/dev/irdma/irdma_ctrl.c
2776
irdma_cqp_poll_registers(struct irdma_sc_cqp *cqp, u32 tail,
sys/dev/irdma/irdma_ctrl.c
2777
u32 count)
sys/dev/irdma/irdma_ctrl.c
2779
u32 i = 0;
sys/dev/irdma/irdma_ctrl.c
2780
u32 newtail, error, val;
sys/dev/irdma/irdma_ctrl.c
2811
u32 buf_idx, struct irdma_hmc_obj_info *obj_info,
sys/dev/irdma/irdma_ctrl.c
2812
u32 rsrc_idx){
sys/dev/irdma/irdma_ctrl.c
2819
obj_info[rsrc_idx].cnt = (u32)FIELD_GET(IRDMA_COMMIT_FPM_QPCNT, temp);
sys/dev/irdma/irdma_ctrl.c
2822
obj_info[rsrc_idx].cnt = (u32)FLD_RS_64(dev, temp, IRDMA_COMMIT_FPM_CQCNT);
sys/dev/irdma/irdma_ctrl.c
2831
obj_info[rsrc_idx].cnt = (u32)temp;
sys/dev/irdma/irdma_ctrl.c
2853
u32 *sd)
sys/dev/irdma/irdma_ctrl.c
2856
u32 i;
sys/dev/irdma/irdma_ctrl.c
2858
u32 last_hmc_obj = 0;
sys/dev/irdma/irdma_ctrl.c
2919
*sd = (u32)((size >> 21) + 1); /* add 1 for remainder */
sys/dev/irdma/irdma_ctrl.c
2921
*sd = (u32)(size >> 21);
sys/dev/irdma/irdma_ctrl.c
2934
static u64 irdma_sc_decode_fpm_query(__le64 * buf, u32 buf_idx,
sys/dev/irdma/irdma_ctrl.c
2936
u32 rsrc_idx){
sys/dev/irdma/irdma_ctrl.c
2938
u32 size;
sys/dev/irdma/irdma_ctrl.c
2941
obj_info[rsrc_idx].max_cnt = (u32)temp;
sys/dev/irdma/irdma_ctrl.c
2942
size = (u32)RS_64_1(temp, 32);
sys/dev/irdma/irdma_ctrl.c
2965
u32 size;
sys/dev/irdma/irdma_ctrl.c
2977
obj_info[IRDMA_HMC_IW_QP].max_cnt = (u32)FIELD_GET(IRDMA_QUERY_FPM_MAX_QPS, temp);
sys/dev/irdma/irdma_ctrl.c
2978
size = (u32)RS_64_1(temp, 32);
sys/dev/irdma/irdma_ctrl.c
2982
obj_info[IRDMA_HMC_IW_CQ].max_cnt = (u32)FIELD_GET(IRDMA_QUERY_FPM_MAX_CQS, temp);
sys/dev/irdma/irdma_ctrl.c
2983
size = (u32)RS_64_1(temp, 32);
sys/dev/irdma/irdma_ctrl.c
2996
obj_info[IRDMA_HMC_IW_XFFL].max_cnt = (u32)temp;
sys/dev/irdma/irdma_ctrl.c
3004
obj_info[IRDMA_HMC_IW_Q1FL].max_cnt = (u32)temp;
sys/dev/irdma/irdma_ctrl.c
3014
obj_info[IRDMA_HMC_IW_PBLE].max_cnt = (u32)temp;
sys/dev/irdma/irdma_ctrl.c
3028
obj_info[IRDMA_HMC_IW_RRFFL].max_cnt = (u32)temp;
sys/dev/irdma/irdma_ctrl.c
3042
obj_info[IRDMA_HMC_IW_OOISCFFL].max_cnt = (u32)temp;
sys/dev/irdma/irdma_ctrl.c
3058
static u32 irdma_sc_find_reg_cq(struct irdma_sc_ceq *ceq,
sys/dev/irdma/irdma_ctrl.c
3060
u32 i;
sys/dev/irdma/irdma_ctrl.c
3103
u32 cq_ctx_idx;
sys/dev/irdma/irdma_ctrl.c
3192
u32 cnt = 0, p1, p2, val = 0, err_code;
sys/dev/irdma/irdma_ctrl.c
3255
p2 = (u32)cqp->host_ctx_pa;
sys/dev/irdma/irdma_ctrl.c
3309
u32 *wqe_idx)
sys/dev/irdma/irdma_ctrl.c
3345
u32 cnt = 0, val;
sys/dev/irdma/irdma_ctrl.c
3408
u32 wqe_idx;
sys/dev/irdma/irdma_ctrl.c
3409
u32 error;
sys/dev/irdma/irdma_ctrl.c
3439
wqe_idx = (u32)FIELD_GET(IRDMA_CQ_WQEIDX, temp);
sys/dev/irdma/irdma_ctrl.c
3443
info->op_ret_val = (u32)FIELD_GET(IRDMA_CCQ_OPRETVAL, temp1);
sys/dev/irdma/irdma_ctrl.c
3482
u32 cnt = 0;
sys/dev/irdma/irdma_ctrl.c
3577
u32 tail, val, error;
sys/dev/irdma/irdma_ctrl.c
3640
u32 tail, val, error;
sys/dev/irdma/irdma_ctrl.c
3681
u32 pble_obj_cnt;
sys/dev/irdma/irdma_ctrl.c
3873
u32 cq_idx;
sys/dev/irdma/irdma_ctrl.c
3928
u32 i;
sys/dev/irdma/irdma_ctrl.c
3959
u32 pble_obj_cnt;
sys/dev/irdma/irdma_ctrl.c
4097
info->qp_cq_id = (u32)FIELD_GET(IRDMA_AEQE_QPCQID_LOW, temp) |
sys/dev/irdma/irdma_ctrl.c
4098
((u32)FIELD_GET(IRDMA_AEQE_QPCQID_HI, temp) << 18);
sys/dev/irdma/irdma_ctrl.c
4238
irdma_sc_repost_aeq_entries(struct irdma_sc_dev *dev, u32 count)
sys/dev/irdma/irdma_ctrl.c
4252
u32 pble_obj_cnt;
sys/dev/irdma/irdma_ctrl.c
4351
u32 tail, val, error;
sys/dev/irdma/irdma_ctrl.c
4511
u32 wqe_idx;
sys/dev/irdma/irdma_ctrl.c
4602
u32 error, val, tail;
sys/dev/irdma/irdma_ctrl.c
4632
u32 tail, val, error;
sys/dev/irdma/irdma_ctrl.c
467
u32 pble_obj_cnt;
sys/dev/irdma/irdma_ctrl.c
4682
static u32 irdma_est_sd(struct irdma_sc_dev *dev,
sys/dev/irdma/irdma_ctrl.c
4706
return (u32)sd;
sys/dev/irdma/irdma_ctrl.c
4721
u32 tail, val, error;
sys/dev/irdma/irdma_ctrl.c
4823
static u32 irdma_q1_cnt(struct irdma_sc_dev *dev,
sys/dev/irdma/irdma_ctrl.c
4824
struct irdma_hmc_info *hmc_info, u32 qpwanted){
sys/dev/irdma/irdma_ctrl.c
4825
u32 q1_cnt;
sys/dev/irdma/irdma_ctrl.c
4841
struct irdma_hmc_info *hmc_info, u32 qpwanted)
sys/dev/irdma/irdma_ctrl.c
4848
struct irdma_hmc_info *hmc_info, u32 qpwanted)
sys/dev/irdma/irdma_ctrl.c
4883
u32 mem_size;
sys/dev/irdma/irdma_ctrl.c
4901
irdma_cfg_fpm_val(struct irdma_sc_dev *dev, u32 qp_count)
sys/dev/irdma/irdma_ctrl.c
4903
u32 qpwanted, mrwanted, pblewanted;
sys/dev/irdma/irdma_ctrl.c
4904
u32 hte, i;
sys/dev/irdma/irdma_ctrl.c
4905
u32 sd_needed;
sys/dev/irdma/irdma_ctrl.c
4906
u32 sd_diff;
sys/dev/irdma/irdma_ctrl.c
4907
u32 loop_count = 0;
sys/dev/irdma/irdma_ctrl.c
4911
u32 max_sds;
sys/dev/irdma/irdma_ctrl.c
5389
irdma_cfg_aeq(struct irdma_sc_dev *dev, u32 idx, bool enable)
sys/dev/irdma/irdma_ctrl.c
5391
u32 reg_val;
sys/dev/irdma/irdma_ctrl.c
5426
u32 statuscpu0;
sys/dev/irdma/irdma_ctrl.c
5427
u32 statuscpu1;
sys/dev/irdma/irdma_ctrl.c
5428
u32 statuscpu2;
sys/dev/irdma/irdma_ctrl.c
5429
u32 retrycount = 0;
sys/dev/irdma/irdma_ctrl.c
5461
u32 val;
sys/dev/irdma/irdma_ctrl.c
739
u32 push_idx;
sys/dev/irdma/irdma_ctrl.c
977
u32 push_idx;
sys/dev/irdma/irdma_defs.h
1455
u32 size; \
sys/dev/irdma/irdma_defs.h
1466
u32 size; \
sys/dev/irdma/irdma_defs.h
1586
static inline void set_64bit_val(__le64 *wqe_words, u32 byte_index, u64 val)
sys/dev/irdma/irdma_defs.h
1597
static inline void set_32bit_val(__le32 *wqe_words, u32 byte_index, u32 val)
sys/dev/irdma/irdma_defs.h
1608
static inline void get_64bit_val(__le64 *wqe_words, u32 byte_index, u64 *val)
sys/dev/irdma/irdma_defs.h
1619
static inline void get_32bit_val(__le32 *wqe_words, u32 byte_index, u32 *val)
sys/dev/irdma/irdma_defs.h
352
#define LS_32_1(val, bits) ((u32)((val) << (bits)))
sys/dev/irdma/irdma_defs.h
353
#define RS_32_1(val, bits) ((u32)((val) >> (bits)))
sys/dev/irdma/irdma_hmc.c
105
irdma_set_sd_entry(u64 pa, u32 idx, enum irdma_sd_entry_type type,
sys/dev/irdma/irdma_hmc.c
125
irdma_clr_sd_entry(u32 idx, enum irdma_sd_entry_type type,
sys/dev/irdma/irdma_hmc.c
143
irdma_invalidate_pf_hmc_pd(struct irdma_sc_dev *dev, u32 sd_idx,
sys/dev/irdma/irdma_hmc.c
144
u32 pd_idx)
sys/dev/irdma/irdma_hmc.c
146
u32 val = FIELD_PREP(IRDMA_PFHMC_PDINV_PMSDIDX, sd_idx) |
sys/dev/irdma/irdma_hmc.c
163
irdma_hmc_sd_one(struct irdma_sc_dev *dev, u16 hmc_fn_id, u64 pa, u32 sd_idx,
sys/dev/irdma/irdma_hmc.c
187
struct irdma_hmc_info *hmc_info, u32 sd_index,
sys/dev/irdma/irdma_hmc.c
188
u32 sd_cnt, bool setsd)
sys/dev/irdma/irdma_hmc.c
193
u32 i;
sys/dev/irdma/irdma_hmc.c
267
u32 sd_idx, sd_lmt;
sys/dev/irdma/irdma_hmc.c
268
u32 pd_idx = 0, pd_lmt = 0;
sys/dev/irdma/irdma_hmc.c
269
u32 pd_idx1 = 0, pd_lmt1 = 0;
sys/dev/irdma/irdma_hmc.c
270
u32 i, j;
sys/dev/irdma/irdma_hmc.c
381
u32 i, sd_idx;
sys/dev/irdma/irdma_hmc.c
423
u32 sd_idx, sd_lmt;
sys/dev/irdma/irdma_hmc.c
424
u32 pd_idx, pd_lmt, rel_pd_idx;
sys/dev/irdma/irdma_hmc.c
425
u32 i, j;
sys/dev/irdma/irdma_hmc.c
524
struct irdma_hmc_info *hmc_info, u32 sd_index,
sys/dev/irdma/irdma_hmc.c
55
irdma_find_sd_index_limit(struct irdma_hmc_info *hmc_info, u32 type,
sys/dev/irdma/irdma_hmc.c
56
u32 idx, u32 cnt, u32 *sd_idx,
sys/dev/irdma/irdma_hmc.c
57
u32 *sd_limit)
sys/dev/irdma/irdma_hmc.c
593
struct irdma_hmc_info *hmc_info, u32 pd_index,
sys/dev/irdma/irdma_hmc.c
600
u32 sd_idx, rel_pd_idx;
sys/dev/irdma/irdma_hmc.c
64
*sd_idx = (u32)(fpm_addr / IRDMA_HMC_DIRECT_BP_SIZE);
sys/dev/irdma/irdma_hmc.c
65
*sd_limit = (u32)((fpm_limit - 1) / IRDMA_HMC_DIRECT_BP_SIZE);
sys/dev/irdma/irdma_hmc.c
664
struct irdma_hmc_info *hmc_info, u32 idx)
sys/dev/irdma/irdma_hmc.c
669
u32 sd_idx, rel_pd_idx;
sys/dev/irdma/irdma_hmc.c
713
irdma_prep_remove_sd_bp(struct irdma_hmc_info *hmc_info, u32 idx)
sys/dev/irdma/irdma_hmc.c
733
irdma_prep_remove_pd_page(struct irdma_hmc_info *hmc_info, u32 idx)
sys/dev/irdma/irdma_hmc.c
83
irdma_find_pd_index_limit(struct irdma_hmc_info *hmc_info, u32 type,
sys/dev/irdma/irdma_hmc.c
84
u32 idx, u32 cnt, u32 *pd_idx,
sys/dev/irdma/irdma_hmc.c
85
u32 *pd_limit)
sys/dev/irdma/irdma_hmc.c
92
*pd_idx = (u32)(fpm_adr / IRDMA_HMC_PAGED_BP_SIZE);
sys/dev/irdma/irdma_hmc.c
93
*pd_limit = (u32)((fpm_limit - 1) / IRDMA_HMC_PAGED_BP_SIZE);
sys/dev/irdma/irdma_hmc.h
108
u32 use_cnt;
sys/dev/irdma/irdma_hmc.h
109
u32 sd_index;
sys/dev/irdma/irdma_hmc.h
123
u32 sd_cnt;
sys/dev/irdma/irdma_hmc.h
124
u32 use_cnt;
sys/dev/irdma/irdma_hmc.h
129
u32 signature;
sys/dev/irdma/irdma_hmc.h
144
u32 cnt;
sys/dev/irdma/irdma_hmc.h
151
u32 vf_id;
sys/dev/irdma/irdma_hmc.h
158
u32 rsrc_type;
sys/dev/irdma/irdma_hmc.h
159
u32 start_idx;
sys/dev/irdma/irdma_hmc.h
160
u32 count;
sys/dev/irdma/irdma_hmc.h
161
u32 add_sd_cnt;
sys/dev/irdma/irdma_hmc.h
169
u32 rsrc_type;
sys/dev/irdma/irdma_hmc.h
170
u32 start_idx;
sys/dev/irdma/irdma_hmc.h
171
u32 count;
sys/dev/irdma/irdma_hmc.h
172
u32 del_sd_cnt;
sys/dev/irdma/irdma_hmc.h
182
int irdma_hmc_sd_one(struct irdma_sc_dev *dev, u16 hmc_fn_id, u64 pa, u32 sd_idx,
sys/dev/irdma/irdma_hmc.h
188
struct irdma_hmc_info *hmc_info, u32 sd_index,
sys/dev/irdma/irdma_hmc.h
191
struct irdma_hmc_info *hmc_info, u32 pd_index,
sys/dev/irdma/irdma_hmc.h
194
struct irdma_hmc_info *hmc_info, u32 idx);
sys/dev/irdma/irdma_hmc.h
195
int irdma_prep_remove_sd_bp(struct irdma_hmc_info *hmc_info, u32 idx);
sys/dev/irdma/irdma_hmc.h
196
int irdma_prep_remove_pd_page(struct irdma_hmc_info *hmc_info, u32 idx);
sys/dev/irdma/irdma_hmc.h
85
u32 max_cnt;
sys/dev/irdma/irdma_hmc.h
86
u32 cnt;
sys/dev/irdma/irdma_hmc.h
93
u32 sd_pd_index;
sys/dev/irdma/irdma_hmc.h
94
u32 use_cnt;
sys/dev/irdma/irdma_hmc.h
99
u32 sd_index;
sys/dev/irdma/irdma_hw.c
113
u32 compl_error;
sys/dev/irdma/irdma_hw.c
1295
u32 ceq_size;
sys/dev/irdma/irdma_hw.c
1347
u32 i;
sys/dev/irdma/irdma_hw.c
1349
u32 num_ceqs;
sys/dev/irdma/irdma_hw.c
1404
u32 i;
sys/dev/irdma/irdma_hw.c
1409
u32 num_ceqs;
sys/dev/irdma/irdma_hw.c
1443
irdma_create_virt_aeq(struct irdma_pci_f *rf, u32 size)
sys/dev/irdma/irdma_hw.c
1447
u32 pg_cnt;
sys/dev/irdma/irdma_hw.c
1491
u32 aeq_size;
sys/dev/irdma/irdma_hw.c
1587
info.sq_size = min(iwdev->rf->max_qp / 2, (u32)32768);
sys/dev/irdma/irdma_hw.c
1618
info.sq_size = min(iwdev->rf->max_qp / 2, (u32)32768);
sys/dev/irdma/irdma_hw.c
1659
u32 qpcnt;
sys/dev/irdma/irdma_hw.c
1714
u32 size;
sys/dev/irdma/irdma_hw.c
2134
static u32 irdma_calc_mem_rsrc_size(struct irdma_pci_f *rf){
sys/dev/irdma/irdma_hw.c
2135
u32 rsrc_size;
sys/dev/irdma/irdma_hw.c
2155
u32
sys/dev/irdma/irdma_hw.c
2158
u32 rsrc_size;
sys/dev/irdma/irdma_hw.c
2159
u32 mrdrvbits;
sys/dev/irdma/irdma_hw.c
2160
u32 ret;
sys/dev/irdma/irdma_hw.c
2231
u32 cqe_count = 0;
sys/dev/irdma/irdma_hw.c
225
u32 aeqcnt = 0;
sys/dev/irdma/irdma_hw.c
2549
const unsigned char *mac_addr, u32 action)
sys/dev/irdma/irdma_hw.c
2591
u32 *ip_addr, u32 action)
sys/dev/irdma/irdma_hw.c
2898
irdma_flush_wqes(struct irdma_qp *iwqp, u32 flush_mask)
sys/dev/irdma/irdma_hw.c
459
irdma_ena_intr(struct irdma_sc_dev *dev, u32 msix_id)
sys/dev/irdma/irdma_hw.c
508
u32 i;
sys/dev/irdma/irdma_hw.c
509
u32 size;
sys/dev/irdma/irdma_hw.c
657
u32 pg_cnt = DIV_ROUND_UP(aeq->mem.size, PAGE_SIZE);
sys/dev/irdma/irdma_hw.c
773
u32 i = 0;
sys/dev/irdma/irdma_hw.c
947
struct irdma_dma_mem *memptr, u32 size,
sys/dev/irdma/irdma_hw.c
948
u32 mask)
sys/dev/irdma/irdma_hw.c
980
u32 sqsize = IRDMA_CQP_SW_SQSIZE_MAX;
sys/dev/irdma/irdma_kcompat.c
108
u32 max_num_sg, struct ib_udata *udata)
sys/dev/irdma/irdma_kcompat.c
1108
(u32)IRDMA_MAX_CQ_READ_THRESH);
sys/dev/irdma/irdma_kcompat.c
115
u32 stag;
sys/dev/irdma/irdma_kcompat.c
1181
u32 idx = 0;
sys/dev/irdma/irdma_kcompat.c
1182
u32 pbl_cnt = 0;
sys/dev/irdma/irdma_kcompat.c
1211
irdma_destroy_ah(struct ib_ah *ibah, u32 ah_flags)
sys/dev/irdma/irdma_kcompat.c
1833
ib_get_width_and_speed(u32 netdev_speed, u32 lanes,
sys/dev/irdma/irdma_kcompat.c
1917
ib_get_eth_speed(struct ib_device *ibdev, u32 port_num, u16 *speed, u8 *width)
sys/dev/irdma/irdma_kcompat.c
1920
u32 netdev_speed, lanes;
sys/dev/irdma/irdma_kcompat.c
1925
netdev_speed = (u32)if_getbaudrate(netdev);
sys/dev/irdma/irdma_kcompat.c
292
u32 pd_id = 0;
sys/dev/irdma/irdma_kcompat.c
39
static u16 kc_rdma_flow_label_to_udp_sport(u32 fl) {
sys/dev/irdma/irdma_kcompat.c
40
u32 fl_low = fl & 0x03FFF;
sys/dev/irdma/irdma_kcompat.c
41
u32 fl_high = fl & 0xFC000;
sys/dev/irdma/irdma_kcompat.c
50
static u32 kc_rdma_calc_flow_label(u32 lqpn, u32 rqpn) {
sys/dev/irdma/irdma_kcompat.c
530
struct ib_ah_attr *attr, u32 flags,
sys/dev/irdma/irdma_kcompat.c
540
u32 ah_id = 0;
sys/dev/irdma/irdma_kcompat.c
56
return (u32)(fl & IRDMA_GRH_FLOWLABEL_MASK);
sys/dev/irdma/irdma_kcompat.c
60
kc_rdma_get_udp_sport(u32 fl, u32 lqpn, u32 rqpn)
sys/dev/irdma/irdma_kcompat.c
642
struct ib_ah_attr *attr, u32 flags,
sys/dev/irdma/irdma_kcompat.c
656
struct ib_ah_attr *attr, u32 flags,
sys/dev/irdma/irdma_kcompat.c
663
irdma_destroy_ah_stub(struct ib_ah *ibah, u32 flags)
sys/dev/irdma/irdma_kcompat.c
678
u32 qp_num = iwqp->ibqp.qp_num;
sys/dev/irdma/irdma_kcompat.c
718
u32 qp_num = 0;
sys/dev/irdma/irdma_kcompat.c
726
u32 next_qp = 0;
sys/dev/irdma/irdma_kcompat.c
975
u32 cq_num = 0;
sys/dev/irdma/irdma_main.h
160
u32 qplimit;
sys/dev/irdma/irdma_main.h
161
u32 mrlimit;
sys/dev/irdma/irdma_main.h
162
u32 cqlimit;
sys/dev/irdma/irdma_main.h
172
u32 op_ret_val;
sys/dev/irdma/irdma_main.h
215
u32 irq;
sys/dev/irdma/irdma_main.h
216
u32 msix_idx;
sys/dev/irdma/irdma_main.h
230
u32 ip_addr[4];
sys/dev/irdma/irdma_main.h
237
u32 idx;
sys/dev/irdma/irdma_main.h
238
u32 irq;
sys/dev/irdma/irdma_main.h
239
u32 cpu_affinity;
sys/dev/irdma/irdma_main.h
247
u32 mgn;
sys/dev/irdma/irdma_main.h
248
u32 dest_ip[4];
sys/dev/irdma/irdma_main.h
260
u32 v_idx; /* msix_vector */
sys/dev/irdma/irdma_main.h
267
u32 num_vectors;
sys/dev/irdma/irdma_main.h
294
u32 sd_type;
sys/dev/irdma/irdma_main.h
295
u32 msix_count;
sys/dev/irdma/irdma_main.h
296
u32 max_mr;
sys/dev/irdma/irdma_main.h
297
u32 max_qp;
sys/dev/irdma/irdma_main.h
298
u32 max_cq;
sys/dev/irdma/irdma_main.h
299
u32 max_ah;
sys/dev/irdma/irdma_main.h
300
u32 next_ah;
sys/dev/irdma/irdma_main.h
301
u32 max_mcg;
sys/dev/irdma/irdma_main.h
302
u32 next_mcg;
sys/dev/irdma/irdma_main.h
303
u32 max_pd;
sys/dev/irdma/irdma_main.h
304
u32 next_qp;
sys/dev/irdma/irdma_main.h
305
u32 next_cq;
sys/dev/irdma/irdma_main.h
306
u32 next_pd;
sys/dev/irdma/irdma_main.h
307
u32 max_mr_size;
sys/dev/irdma/irdma_main.h
308
u32 max_cqe;
sys/dev/irdma/irdma_main.h
309
u32 mr_stagmask;
sys/dev/irdma/irdma_main.h
310
u32 used_pds;
sys/dev/irdma/irdma_main.h
311
u32 used_cqs;
sys/dev/irdma/irdma_main.h
312
u32 used_mrs;
sys/dev/irdma/irdma_main.h
313
u32 used_qps;
sys/dev/irdma/irdma_main.h
314
u32 arp_table_size;
sys/dev/irdma/irdma_main.h
315
u32 next_arp_index;
sys/dev/irdma/irdma_main.h
316
u32 ceqs_count;
sys/dev/irdma/irdma_main.h
317
u32 next_ws_node_id;
sys/dev/irdma/irdma_main.h
318
u32 max_ws_node_id;
sys/dev/irdma/irdma_main.h
319
u32 limits_sel;
sys/dev/irdma/irdma_main.h
367
u32 chk_stag;
sys/dev/irdma/irdma_main.h
373
u32 retry_cnt;
sys/dev/irdma/irdma_main.h
387
u32 roce_cwnd;
sys/dev/irdma/irdma_main.h
388
u32 roce_ackcreds;
sys/dev/irdma/irdma_main.h
389
u32 vendor_id;
sys/dev/irdma/irdma_main.h
390
u32 vendor_part_id;
sys/dev/irdma/irdma_main.h
391
u32 rcv_wnd;
sys/dev/irdma/irdma_main.h
482
unsigned long *rsrc_array, u32 max_rsrc,
sys/dev/irdma/irdma_main.h
483
u32 *req_rsrc_num, u32 *next)
sys/dev/irdma/irdma_main.h
485
u32 rsrc_num;
sys/dev/irdma/irdma_main.h
517
unsigned long *rsrc_array, u32 rsrc_num)
sys/dev/irdma/irdma_main.h
535
void irdma_flush_wqes(struct irdma_qp *iwqp, u32 flush_mask);
sys/dev/irdma/irdma_main.h
537
const unsigned char *mac_addr, u32 action);
sys/dev/irdma/irdma_main.h
539
u32 *ip_addr, u32 action);
sys/dev/irdma/irdma_main.h
554
u32 irdma_initialize_hw_rsrc(struct irdma_pci_f *rf);
sys/dev/irdma/irdma_main.h
589
int irdma_send_syn(struct irdma_cm_node *cm_node, u32 sendack);
sys/dev/irdma/irdma_main.h
592
u16 rem_port, u32 *rem_addr, u16 loc_port,
sys/dev/irdma/irdma_main.h
593
u32 *loc_addr, u16 vlan_id);
sys/dev/irdma/irdma_main.h
598
void irdma_copy_ip_ntohl(u32 *dst, __be32 *src);
sys/dev/irdma/irdma_main.h
599
void irdma_copy_ip_htonl(__be32 *dst, u32 *src);
sys/dev/irdma/irdma_main.h
600
u16 irdma_get_vlan_ipv4(struct iw_cm_id *cm_id, u32 *addr);
sys/dev/irdma/irdma_main.h
601
void irdma_get_vlan_mac_ipv6(struct iw_cm_id *cm_id, u32 *addr, u16 *vlan_id,
sys/dev/irdma/irdma_main.h
605
int irdma_upload_qp_context(struct irdma_pci_f *rf, u32 qpn,
sys/dev/irdma/irdma_pble.c
111
idx->sd_idx = (u32)(pble_rsrc->next_fpm_addr / IRDMA_HMC_DIRECT_BP_SIZE);
sys/dev/irdma/irdma_pble.c
112
idx->pd_idx = (u32)(pble_rsrc->next_fpm_addr / IRDMA_HMC_PAGED_BP_SIZE);
sys/dev/irdma/irdma_pble.c
131
u32 offset = 0;
sys/dev/irdma/irdma_pble.c
160
static u32 fpm_to_idx(struct irdma_hmc_pble_rsrc *pble_rsrc, u64 addr){
sys/dev/irdma/irdma_pble.c
165
return (u32)idx;
sys/dev/irdma/irdma_pble.c
185
u32 rel_pd_idx = info->idx.rel_pd_idx;
sys/dev/irdma/irdma_pble.c
186
u32 pd_idx = info->idx.pd_idx;
sys/dev/irdma/irdma_pble.c
187
u32 i;
sys/dev/irdma/irdma_pble.c
231
struct sd_pd_idx *idx, u32 pages)
sys/dev/irdma/irdma_pble.c
257
u32 pages;
sys/dev/irdma/irdma_pble.c
319
pble_rsrc->unallocated_pble -= (u32)(chunk->size >> 3);
sys/dev/irdma/irdma_pble.c
351
u32 i;
sys/dev/irdma/irdma_pble.c
380
u32 lf4k, lflast, total, i;
sys/dev/irdma/irdma_pble.c
381
u32 pblcnt = PBLE_PER_PAGE;
sys/dev/irdma/irdma_pble.c
496
struct irdma_pble_alloc *palloc, u32 pble_cnt,
sys/dev/irdma/irdma_pble.c
76
u32 fpm_idx = 0;
sys/dev/irdma/irdma_pble.h
106
u32 sizeofbitmap;
sys/dev/irdma/irdma_pble.h
110
u32 pg_cnt;
sys/dev/irdma/irdma_pble.h
125
u32 unallocated_pble;
sys/dev/irdma/irdma_pble.h
133
u32 stats_direct_sds;
sys/dev/irdma/irdma_pble.h
134
u32 stats_paged_sds;
sys/dev/irdma/irdma_pble.h
148
struct irdma_pble_alloc *palloc, u32 pble_cnt,
sys/dev/irdma/irdma_pble.h
162
int irdma_pble_get_paged_mem(struct irdma_chunk *chunk, u32 pg_cnt);
sys/dev/irdma/irdma_pble.h
66
u32 idx;
sys/dev/irdma/irdma_pble.h
67
u32 cnt;
sys/dev/irdma/irdma_pble.h
75
u32 leaf_cnt;
sys/dev/irdma/irdma_pble.h
79
u32 total_cnt;
sys/dev/irdma/irdma_pble.h
88
u32 sd_idx;
sys/dev/irdma/irdma_pble.h
89
u32 pd_idx;
sys/dev/irdma/irdma_pble.h
90
u32 rel_pd_idx;
sys/dev/irdma/irdma_pble.h
98
u32 pages;
sys/dev/irdma/irdma_protos.h
103
u64 size, u32 alignment);
sys/dev/irdma/irdma_protos.h
104
void *irdma_allocate_virt_mem(struct irdma_hw *hw, struct irdma_virt_mem *mem, u32 size);
sys/dev/irdma/irdma_protos.h
107
u8 irdma_get_encoded_wqe_size(u32 wqsize, enum irdma_queue_type queue_type);
sys/dev/irdma/irdma_protos.h
112
int irdma_cfg_fpm_val(struct irdma_sc_dev *dev, u32 qp_count);
sys/dev/irdma/irdma_protos.h
118
extern void dump_ctx(struct irdma_sc_dev *dev, u32 pf_num, u32 qp_num);
sys/dev/irdma/irdma_puda.c
1020
irdma_puda_allocbufs(struct irdma_puda_rsrc *rsrc, u32 count)
sys/dev/irdma/irdma_puda.c
1022
u32 i;
sys/dev/irdma/irdma_puda.c
1120
u32 pudasize;
sys/dev/irdma/irdma_puda.c
1121
u32 sqwridsize, rqwridsize;
sys/dev/irdma/irdma_puda.c
118
irdma_puda_post_recvbuf(struct irdma_puda_rsrc *rsrc, u32 wqe_idx,
sys/dev/irdma/irdma_puda.c
1236
struct irdma_puda_buf *buf, u32 wqe_idx)
sys/dev/irdma/irdma_puda.c
1269
u32 rcv_seq){
sys/dev/irdma/irdma_puda.c
1270
u32 marker_seq, end_seq, blk_start;
sys/dev/irdma/irdma_puda.c
1279
if (marker_len && *(u32 *)datap)
sys/dev/irdma/irdma_puda.c
1315
u16 buf_offset, u32 txbuf_offset, u32 len)
sys/dev/irdma/irdma_puda.c
1352
irdma_ieq_check_first_buf(struct irdma_puda_buf *buf, u32 fps)
sys/dev/irdma/irdma_puda.c
1354
u32 offset;
sys/dev/irdma/irdma_puda.c
1381
u32 nextseqnum;
sys/dev/irdma/irdma_puda.c
1447
u32 nextseqnum;
sys/dev/irdma/irdma_puda.c
1490
u32 mpacrc;
sys/dev/irdma/irdma_puda.c
1491
u32 seqnum = buf->seqnum;
sys/dev/irdma/irdma_puda.c
1516
mpacrc = *(u32 *)crcptr;
sys/dev/irdma/irdma_puda.c
1564
u32 mpacrc;
sys/dev/irdma/irdma_puda.c
1565
u32 seqnum = buf->seqnum;
sys/dev/irdma/irdma_puda.c
157
u32 i;
sys/dev/irdma/irdma_puda.c
158
u32 invalid_cnt = rsrc->rxq_invalid_cnt;
sys/dev/irdma/irdma_puda.c
1589
mpacrc = *(u32 *)crcptr;
sys/dev/irdma/irdma_puda.c
1723
u32 *hw_host_ctx = (u32 *)qp->hw_host_ctx;
sys/dev/irdma/irdma_puda.c
1724
u32 rcv_wnd = hw_host_ctx[23];
sys/dev/irdma/irdma_puda.c
1727
u32 fps = *(u32 *)(qp->q2_buf + Q2_FPSN_OFFSET);
sys/dev/irdma/irdma_puda.c
180
u32 len)
sys/dev/irdma/irdma_puda.c
1821
u32 wqe_idx = ieq->compl_rxwqe_idx;
sys/dev/irdma/irdma_puda.c
232
u32 *wqe_idx){
sys/dev/irdma/irdma_puda.c
262
u32 major_err, minor_err;
sys/dev/irdma/irdma_puda.c
263
u32 peek_head;
sys/dev/irdma/irdma_puda.c
307
major_err = (u32)(FIELD_GET(IRDMA_CQ_MAJERR, qword3));
sys/dev/irdma/irdma_puda.c
308
minor_err = (u32)(FIELD_GET(IRDMA_CQ_MINERR, qword3));
sys/dev/irdma/irdma_puda.c
317
info->qp_id = (u32)FIELD_GET(IRDMACQ_QPID, qword2);
sys/dev/irdma/irdma_puda.c
323
info->wqe_idx = (u32)FIELD_GET(IRDMA_CQ_WQEIDX, qword3);
sys/dev/irdma/irdma_puda.c
350
info->payload_len = (u32)FIELD_GET(IRDMACQ_PAYLDLEN, qword0);
sys/dev/irdma/irdma_puda.c
364
u32 *compl_err)
sys/dev/irdma/irdma_puda.c
468
u32 iplen, l4len;
sys/dev/irdma/irdma_puda.c
470
u32 wqe_idx;
sys/dev/irdma/irdma_puda.c
49
struct irdma_puda_buf *buf, u32 wqe_idx);
sys/dev/irdma/irdma_puda.c
702
u32 sq_size, rq_size;
sys/dev/irdma/irdma_puda.c
833
u32 cqsize;
sys/dev/irdma/irdma_puda.h
121
u32 count;
sys/dev/irdma/irdma_puda.h
122
u32 pd_id;
sys/dev/irdma/irdma_puda.h
123
u32 cq_id;
sys/dev/irdma/irdma_puda.h
124
u32 qp_id;
sys/dev/irdma/irdma_puda.h
125
u32 sq_size;
sys/dev/irdma/irdma_puda.h
126
u32 rq_size;
sys/dev/irdma/irdma_puda.h
127
u32 tx_buf_cnt; /* total bufs allocated will be rq_size + tx_buf_cnt */
sys/dev/irdma/irdma_puda.h
147
u32 cq_id;
sys/dev/irdma/irdma_puda.h
148
u32 qp_id;
sys/dev/irdma/irdma_puda.h
149
u32 sq_size;
sys/dev/irdma/irdma_puda.h
150
u32 rq_size;
sys/dev/irdma/irdma_puda.h
151
u32 cq_size;
sys/dev/irdma/irdma_puda.h
154
u32 compl_rxwqe_idx;
sys/dev/irdma/irdma_puda.h
155
u32 rx_wqe_idx;
sys/dev/irdma/irdma_puda.h
156
u32 rxq_invalid_cnt;
sys/dev/irdma/irdma_puda.h
157
u32 tx_wqe_avail_cnt;
sys/dev/irdma/irdma_puda.h
161
u32 alloc_buf_count;
sys/dev/irdma/irdma_puda.h
162
u32 avail_buf_count; /* snapshot of currently available buffers */
sys/dev/irdma/irdma_puda.h
197
u32 *compl_err);
sys/dev/irdma/irdma_puda.h
203
int irdma_ieq_check_mpacrc(void *desc, void *addr, u32 len, u32 val);
sys/dev/irdma/irdma_puda.h
207
void irdma_ieq_update_tcpip_info(struct irdma_puda_buf *buf, u16 len, u32 seqnum);
sys/dev/irdma/irdma_puda.h
67
u32 payload_len;
sys/dev/irdma/irdma_puda.h
68
u32 compl_error; /* No_err=0, else major and minor err code */
sys/dev/irdma/irdma_puda.h
69
u32 qp_id;
sys/dev/irdma/irdma_puda.h
70
u32 wqe_idx;
sys/dev/irdma/irdma_puda.h
79
u32 len;
sys/dev/irdma/irdma_puda.h
80
u32 ah_id;
sys/dev/irdma/irdma_puda.h
97
u32 seqnum;
sys/dev/irdma/irdma_puda.h
98
u32 ah_id;
sys/dev/irdma/irdma_puda.h
99
u32 totallen; /* machlen+iphlen+tcphlen+datalen */
sys/dev/irdma/irdma_type.h
1003
u32 chunk_size;
sys/dev/irdma/irdma_type.h
1004
u32 stag_idx;
sys/dev/irdma/irdma_type.h
1005
u32 page_size;
sys/dev/irdma/irdma_type.h
1006
u32 pd_id;
sys/dev/irdma/irdma_type.h
1015
u32 mw_stag_index;
sys/dev/irdma/irdma_type.h
1016
u32 page_size;
sys/dev/irdma/irdma_type.h
1017
u32 pd_id;
sys/dev/irdma/irdma_type.h
1027
u32 page_size;
sys/dev/irdma/irdma_type.h
1028
u32 chunk_size;
sys/dev/irdma/irdma_type.h
1029
u32 first_pm_pbl_index;
sys/dev/irdma/irdma_type.h
1033
u32 pd_id;
sys/dev/irdma/irdma_type.h
1046
u32 page_size;
sys/dev/irdma/irdma_type.h
1047
u32 chunk_size;
sys/dev/irdma/irdma_type.h
1048
u32 first_pm_pbl_index;
sys/dev/irdma/irdma_type.h
1052
u32 pd_id;
sys/dev/irdma/irdma_type.h
1064
u32 stag_idx;
sys/dev/irdma/irdma_type.h
1065
u32 pd_id;
sys/dev/irdma/irdma_type.h
1076
u32 access_rights;
sys/dev/irdma/irdma_type.h
1077
u32 pd_id;
sys/dev/irdma/irdma_type.h
1078
u32 page_size;
sys/dev/irdma/irdma_type.h
1106
u32 shadow_read_threshold;
sys/dev/irdma/irdma_type.h
1109
u32 first_pm_pbl_idx;
sys/dev/irdma/irdma_type.h
1122
u32 qp_id;
sys/dev/irdma/irdma_type.h
1135
u32 reach_max;
sys/dev/irdma/irdma_type.h
1154
u32 qp_num;
sys/dev/irdma/irdma_type.h
1155
u32 dest_ip[4];
sys/dev/irdma/irdma_type.h
1156
u32 src_ip[4];
sys/dev/irdma/irdma_type.h
1162
u32 push_idx;
sys/dev/irdma/irdma_type.h
1188
u32 count;
sys/dev/irdma/irdma_type.h
1192
void (*irdma_cfg_aeq)(struct irdma_sc_dev *dev, u32 idx, bool enable);
sys/dev/irdma/irdma_type.h
1193
void (*irdma_cfg_ceq)(struct irdma_sc_dev *dev, u32 ceq_id, u32 idx,
sys/dev/irdma/irdma_type.h
1195
void (*irdma_dis_irq)(struct irdma_sc_dev *dev, u32 idx);
sys/dev/irdma/irdma_type.h
1196
void (*irdma_en_irq)(struct irdma_sc_dev *dev, u32 idx);
sys/dev/irdma/irdma_type.h
1221
void irdma_sc_repost_aeq_entries(struct irdma_sc_dev *dev, u32 count);
sys/dev/irdma/irdma_type.h
1223
void irdma_sc_pd_init(struct irdma_sc_dev *dev, struct irdma_sc_pd *pd, u32 pd_id,
sys/dev/irdma/irdma_type.h
1225
void irdma_cfg_aeq(struct irdma_sc_dev *dev, u32 idx, bool enable);
sys/dev/irdma/irdma_type.h
1247
void irdma_sc_send_lsmm(struct irdma_sc_qp *qp, void *lsmm_buf, u32 size,
sys/dev/irdma/irdma_type.h
1517
u32 *wqe_idx);
sys/dev/irdma/irdma_type.h
1526
u32 wqe_idx;
sys/dev/irdma/irdma_type.h
262
u32 dcqcn_b;
sys/dev/irdma/irdma_type.h
263
u32 rreduce_mperiod;
sys/dev/irdma/irdma_type.h
275
u32 sq_size;
sys/dev/irdma/irdma_type.h
359
u32 rcv_nxt;
sys/dev/irdma/irdma_type.h
360
u32 fps;
sys/dev/irdma/irdma_type.h
361
u32 max_fpdu_data;
sys/dev/irdma/irdma_type.h
362
u32 nextseqnum;
sys/dev/irdma/irdma_type.h
363
u32 rcv_start_seq;
sys/dev/irdma/irdma_type.h
383
u32 pd_id;
sys/dev/irdma/irdma_type.h
392
u32 size;
sys/dev/irdma/irdma_type.h
407
u32 cqp_id;
sys/dev/irdma/irdma_type.h
408
u32 sq_size;
sys/dev/irdma/irdma_type.h
409
u32 hw_sq_size;
sys/dev/irdma/irdma_type.h
427
u32 size;
sys/dev/irdma/irdma_type.h
432
u32 elem_cnt;
sys/dev/irdma/irdma_type.h
435
u32 first_pm_pbl_idx;
sys/dev/irdma/irdma_type.h
436
u32 msix_idx;
sys/dev/irdma/irdma_type.h
442
u32 size;
sys/dev/irdma/irdma_type.h
447
u32 elem_cnt;
sys/dev/irdma/irdma_type.h
452
u32 first_pm_pbl_idx;
sys/dev/irdma/irdma_type.h
456
u32 reg_cq_size;
sys/dev/irdma/irdma_type.h
471
u32 shadow_read_threshold;
sys/dev/irdma/irdma_type.h
476
u32 first_pm_pbl_idx;
sys/dev/irdma/irdma_type.h
497
u32 ieq_qp;
sys/dev/irdma/irdma_type.h
500
u32 push_idx;
sys/dev/irdma/irdma_type.h
560
u32 max_ceqs;
sys/dev/irdma/irdma_type.h
561
u32 max_sds;
sys/dev/irdma/irdma_type.h
562
u32 xf_block_size;
sys/dev/irdma/irdma_type.h
563
u32 q1_block_size;
sys/dev/irdma/irdma_type.h
564
u32 ht_multiplier;
sys/dev/irdma/irdma_type.h
565
u32 timer_bucket;
sys/dev/irdma/irdma_type.h
566
u32 rrf_block_size;
sys/dev/irdma/irdma_type.h
567
u32 ooiscf_block_size;
sys/dev/irdma/irdma_type.h
576
u32 l2_sched_node_id;
sys/dev/irdma/irdma_type.h
598
u32 ilq_count;
sys/dev/irdma/irdma_type.h
601
u32 ieq_count;
sys/dev/irdma/irdma_type.h
604
u32 exception_lan_q;
sys/dev/irdma/irdma_type.h
634
u32 IOMEM *wqe_alloc_db;
sys/dev/irdma/irdma_type.h
635
u32 IOMEM *cq_arm_db;
sys/dev/irdma/irdma_type.h
636
u32 IOMEM *aeq_alloc_db;
sys/dev/irdma/irdma_type.h
637
u32 IOMEM *cqp_db;
sys/dev/irdma/irdma_type.h
638
u32 IOMEM *cq_ack_db;
sys/dev/irdma/irdma_type.h
639
u32 IOMEM *hw_regs[IRDMA_MAX_REGS];
sys/dev/irdma/irdma_type.h
640
u32 ceq_itr; /* Interrupt throttle, usecs between interrupts: 0 disabled. 2 - 8160 */
sys/dev/irdma/irdma_type.h
656
u32 debug_mask;
sys/dev/irdma/irdma_type.h
668
u32 cq_size;
sys/dev/irdma/irdma_type.h
669
u32 shadow_read_threshold;
sys/dev/irdma/irdma_type.h
671
u32 first_pm_pbl_idx;
sys/dev/irdma/irdma_type.h
712
u32 op_ret_val;
sys/dev/irdma/irdma_type.h
729
u32 num_apps;
sys/dev/irdma/irdma_type.h
770
u32 debug_mask;
sys/dev/irdma/irdma_type.h
778
u32 elem_cnt;
sys/dev/irdma/irdma_type.h
785
u32 first_pm_pbl_idx;
sys/dev/irdma/irdma_type.h
793
u32 *aeqe_base;
sys/dev/irdma/irdma_type.h
795
u32 elem_cnt;
sys/dev/irdma/irdma_type.h
798
u32 first_pm_pbl_idx;
sys/dev/irdma/irdma_type.h
799
u32 msix_idx;
sys/dev/irdma/irdma_type.h
809
u32 num_elem;
sys/dev/irdma/irdma_type.h
810
u32 shadow_read_threshold;
sys/dev/irdma/irdma_type.h
819
u32 first_pm_pbl_idx;
sys/dev/irdma/irdma_type.h
830
u32 dest_ip_addr[4];
sys/dev/irdma/irdma_type.h
831
u32 snd_mss;
sys/dev/irdma/irdma_type.h
834
u32 flow_label;
sys/dev/irdma/irdma_type.h
836
u32 psn_nxt;
sys/dev/irdma/irdma_type.h
837
u32 lsn;
sys/dev/irdma/irdma_type.h
838
u32 epsn;
sys/dev/irdma/irdma_type.h
839
u32 psn_max;
sys/dev/irdma/irdma_type.h
840
u32 psn_una;
sys/dev/irdma/irdma_type.h
841
u32 local_ipaddr[4];
sys/dev/irdma/irdma_type.h
842
u32 cwnd;
sys/dev/irdma/irdma_type.h
849
u32 err_rq_idx;
sys/dev/irdma/irdma_type.h
850
u32 qkey;
sys/dev/irdma/irdma_type.h
851
u32 dest_qp;
sys/dev/irdma/irdma_type.h
855
u32 pd_id;
sys/dev/irdma/irdma_type.h
883
u32 err_rq_idx;
sys/dev/irdma/irdma_type.h
884
u32 pd_id;
sys/dev/irdma/irdma_type.h
925
u32 dest_ip_addr[4];
sys/dev/irdma/irdma_type.h
930
u32 snd_mss;
sys/dev/irdma/irdma_type.h
934
u32 flow_label;
sys/dev/irdma/irdma_type.h
938
u32 time_stamp_recent;
sys/dev/irdma/irdma_type.h
939
u32 time_stamp_age;
sys/dev/irdma/irdma_type.h
940
u32 snd_nxt;
sys/dev/irdma/irdma_type.h
941
u32 snd_wnd;
sys/dev/irdma/irdma_type.h
942
u32 rcv_nxt;
sys/dev/irdma/irdma_type.h
943
u32 rcv_wnd;
sys/dev/irdma/irdma_type.h
944
u32 snd_max;
sys/dev/irdma/irdma_type.h
945
u32 snd_una;
sys/dev/irdma/irdma_type.h
946
u32 srtt;
sys/dev/irdma/irdma_type.h
947
u32 rtt_var;
sys/dev/irdma/irdma_type.h
948
u32 ss_thresh;
sys/dev/irdma/irdma_type.h
949
u32 cwnd;
sys/dev/irdma/irdma_type.h
950
u32 snd_wl1;
sys/dev/irdma/irdma_type.h
951
u32 snd_wl2;
sys/dev/irdma/irdma_type.h
952
u32 max_snd_window;
sys/dev/irdma/irdma_type.h
954
u32 local_ipaddr[4];
sys/dev/irdma/irdma_type.h
967
u32 send_cq_num;
sys/dev/irdma/irdma_type.h
968
u32 rcv_cq_num;
sys/dev/irdma/irdma_type.h
969
u32 rem_endpoint_idx;
sys/dev/irdma/irdma_type.h
979
u32 qp_cq_id;
sys/dev/irdma/irdma_type.h
980
u32 wqe_idx;
sys/dev/irdma/irdma_uda.c
151
struct irdma_mcast_grp_info *info, u32 op,
sys/dev/irdma/irdma_uda.c
232
u32 idx;
sys/dev/irdma/irdma_uda.c
234
u32 free_entry_idx = 0;
sys/dev/irdma/irdma_uda.c
274
u32 idx;
sys/dev/irdma/irdma_uda.c
52
u32 op, u64 scratch)
sys/dev/irdma/irdma_uda.h
48
u32 pd_idx;
sys/dev/irdma/irdma_uda.h
49
u32 dst_arpindex;
sys/dev/irdma/irdma_uda.h
50
u32 dest_ip_addr[4];
sys/dev/irdma/irdma_uda.h
51
u32 src_ip_addr[4];
sys/dev/irdma/irdma_uda.h
52
u32 flow_label;
sys/dev/irdma/irdma_uda.h
53
u32 ah_idx;
sys/dev/irdma/irdma_uda.h
75
u32 op, u64 scratch);
sys/dev/irdma/irdma_uda.h
77
struct irdma_mcast_grp_info *info, u32 op,
sys/dev/irdma/irdma_uk.c
106
u32 wqe_idx;
sys/dev/irdma/irdma_uk.c
1100
irdma_check_rq_cqe(struct irdma_qp_uk *qp, u32 *array_idx)
sys/dev/irdma/irdma_uk.c
1102
u32 exp_idx = (qp->last_rx_cmpl_idx + 1) % qp->rq_size;
sys/dev/irdma/irdma_uk.c
1128
u32 wqe_idx)
sys/dev/irdma/irdma_uk.c
1133
u32 widx;
sys/dev/irdma/irdma_uk.c
1144
widx = (u32)FIELD_GET(IRDMA_CQ_WQEIDX, qword3);
sys/dev/irdma/irdma_uk.c
1204
u32 wqe_idx;
sys/dev/irdma/irdma_uk.c
1228
u32 peek_head;
sys/dev/irdma/irdma_uk.c
1253
info->imm_data = (u32)FIELD_GET(IRDMA_CQ_IMMDATALOW32, qword4);
sys/dev/irdma/irdma_uk.c
1310
info->qp_id = (u32)FIELD_GET(IRDMACQ_QPID, qword2);
sys/dev/irdma/irdma_uk.c
1311
info->ud_src_qpn = (u32)FIELD_GET(IRDMACQ_UDSRCQPN, qword2);
sys/dev/irdma/irdma_uk.c
1314
wqe_idx = (u32)FIELD_GET(IRDMA_CQ_WQEIDX, qword3);
sys/dev/irdma/irdma_uk.c
1319
u32 array_idx;
sys/dev/irdma/irdma_uk.c
1322
info->bytes_xfered = (u32)FIELD_GET(IRDMACQ_PAYLDLEN, qword0);
sys/dev/irdma/irdma_uk.c
1327
info->inv_stag = (u32)FIELD_GET(IRDMACQ_INVSTAG, qword2);
sys/dev/irdma/irdma_uk.c
134
irdma_clr_wqes(struct irdma_qp_uk *qp, u32 qp_wqe_idx)
sys/dev/irdma/irdma_uk.c
137
u32 wqe_idx;
sys/dev/irdma/irdma_uk.c
1400
u32 tail;
sys/dev/irdma/irdma_uk.c
1467
irdma_round_up_wq(u32 wqdepth)
sys/dev/irdma/irdma_uk.c
1492
irdma_get_wqe_shift(struct irdma_uk_attrs *uk_attrs, u32 sge,
sys/dev/irdma/irdma_uk.c
1493
u32 inline_data, u8 *shift)
sys/dev/irdma/irdma_uk.c
1515
irdma_get_sqdepth(struct irdma_uk_attrs *uk_attrs, u32 sq_size, u8 shift, u32 *sqdepth)
sys/dev/irdma/irdma_uk.c
1517
u32 min_hw_quanta = (u32)uk_attrs->min_hw_wq_size << shift;
sys/dev/irdma/irdma_uk.c
1535
irdma_get_rqdepth(struct irdma_uk_attrs *uk_attrs, u32 rq_size, u8 shift, u32 *rqdepth)
sys/dev/irdma/irdma_uk.c
1537
u32 min_hw_quanta = (u32)uk_attrs->min_hw_wq_size << shift;
sys/dev/irdma/irdma_uk.c
159
u32 hw_sq_tail;
sys/dev/irdma/irdma_uk.c
160
u32 sw_sq_head;
sys/dev/irdma/irdma_uk.c
1618
u32 *sq_depth, u8 *sq_shift)
sys/dev/irdma/irdma_uk.c
1641
u32 *rq_depth, u8 *rq_shift)
sys/dev/irdma/irdma_uk.c
1673
u32 sq_ring_size;
sys/dev/irdma/irdma_uk.c
168
hw_sq_tail = (u32)FIELD_GET(IRDMA_QP_DBSA_HW_SQ_TAIL, temp);
sys/dev/irdma/irdma_uk.c
1753
u32 cq_head;
sys/dev/irdma/irdma_uk.c
1789
irdma_fragcnt_to_quanta_sq(u32 frag_cnt, u16 *quanta)
sys/dev/irdma/irdma_uk.c
1837
irdma_fragcnt_to_wqesize_rq(u32 frag_cnt, u16 *wqe_size)
sys/dev/irdma/irdma_uk.c
196
irdma_qp_ring_push_db(struct irdma_qp_uk *qp, u32 wqe_idx)
sys/dev/irdma/irdma_uk.c
215
u32 wqe_idx, bool push_wqe)
sys/dev/irdma/irdma_uk.c
240
u32 head, tail;
sys/dev/irdma/irdma_uk.c
257
irdma_enable_push_wqe(struct irdma_qp_uk *qp, u32 total_size)
sys/dev/irdma/irdma_uk.c
275
irdma_qp_get_next_send_wqe(struct irdma_qp_uk *qp, u32 *wqe_idx,
sys/dev/irdma/irdma_uk.c
276
u16 *quanta, u32 total_size,
sys/dev/irdma/irdma_uk.c
281
u32 nop_wqe_idx;
sys/dev/irdma/irdma_uk.c
339
irdma_qp_get_next_recv_wqe(struct irdma_qp_uk *qp, u32 *wqe_idx)
sys/dev/irdma/irdma_uk.c
372
u32 i, wqe_idx;
sys/dev/irdma/irdma_uk.c
373
u32 total_size = 0, byte_off;
sys/dev/irdma/irdma_uk.c
375
u32 frag_cnt, addl_frag_cnt;
sys/dev/irdma/irdma_uk.c
471
u32 i, byte_off, total_size = 0;
sys/dev/irdma/irdma_uk.c
474
u32 addl_frag_cnt;
sys/dev/irdma/irdma_uk.c
476
u32 wqe_idx;
sys/dev/irdma/irdma_uk.c
48
irdma_set_fragment(__le64 * wqe, u32 offset, struct ib_sge *sge,
sys/dev/irdma/irdma_uk.c
561
u32 i, wqe_idx, total_size = 0, byte_off;
sys/dev/irdma/irdma_uk.c
563
u32 frag_cnt, addl_frag_cnt;
sys/dev/irdma/irdma_uk.c
657
u32 num_sges, u8 polarity)
sys/dev/irdma/irdma_uk.c
659
u32 quanta_bytes_remaining = 16;
sys/dev/irdma/irdma_uk.c
660
u32 i;
sys/dev/irdma/irdma_uk.c
664
u32 sge_len = sge_list[i].length;
sys/dev/irdma/irdma_uk.c
667
u32 bytes_copied;
sys/dev/irdma/irdma_uk.c
691
static inline u16 irdma_inline_data_size_to_quanta_gen_1(u32 data_size) {
sys/dev/irdma/irdma_uk.c
704
u32 num_sges, u8 polarity)
sys/dev/irdma/irdma_uk.c
707
u32 quanta_bytes_remaining = 8;
sys/dev/irdma/irdma_uk.c
708
u32 i;
sys/dev/irdma/irdma_uk.c
715
u32 sge_len = sge_list[i].length;
sys/dev/irdma/irdma_uk.c
718
u32 bytes_copied;
sys/dev/irdma/irdma_uk.c
73
irdma_set_fragment_gen_1(__le64 * wqe, u32 offset,
sys/dev/irdma/irdma_uk.c
751
static u16 irdma_inline_data_size_to_quanta(u32 data_size) {
sys/dev/irdma/irdma_uk.c
783
u32 wqe_idx;
sys/dev/irdma/irdma_uk.c
786
u32 i, total_size = 0;
sys/dev/irdma/irdma_uk.c
854
u32 wqe_idx;
sys/dev/irdma/irdma_uk.c
857
u32 i, total_size = 0;
sys/dev/irdma/irdma_uk.c
929
u32 wqe_idx;
sys/dev/irdma/irdma_uk.c
975
u32 wqe_idx, i, byte_off;
sys/dev/irdma/irdma_uk.c
976
u32 addl_frag_cnt;
sys/dev/irdma/irdma_user.h
284
volatile u32 head;
sys/dev/irdma/irdma_user.h
285
volatile u32 tail;
sys/dev/irdma/irdma_user.h
286
u32 size;
sys/dev/irdma/irdma_user.h
299
u32 num_sges;
sys/dev/irdma/irdma_user.h
300
u32 qkey;
sys/dev/irdma/irdma_user.h
301
u32 dest_qp;
sys/dev/irdma/irdma_user.h
302
u32 ah_id;
sys/dev/irdma/irdma_user.h
308
u32 num_sges;
sys/dev/irdma/irdma_user.h
313
u32 num_lo_sges;
sys/dev/irdma/irdma_user.h
319
u32 num_lo_sges;
sys/dev/irdma/irdma_user.h
351
u32 imm_data;
sys/dev/irdma/irdma_user.h
352
u32 stag_to_inv;
sys/dev/irdma/irdma_user.h
365
u32 bytes_xfered;
sys/dev/irdma/irdma_user.h
366
u32 qp_id;
sys/dev/irdma/irdma_user.h
367
u32 ud_src_qpn;
sys/dev/irdma/irdma_user.h
368
u32 imm_data;
sys/dev/irdma/irdma_user.h
413
void (*iw_copy_inline_data)(u8 *dest, struct ib_sge *sge_list, u32 num_sges, u8 polarity);
sys/dev/irdma/irdma_user.h
414
u16 (*iw_inline_data_size_to_quanta)(u32 data_size);
sys/dev/irdma/irdma_user.h
415
void (*iw_set_fragment)(__le64 *wqe, u32 offset, struct ib_sge *sge,
sys/dev/irdma/irdma_user.h
435
u32 *sq_depth, u8 *sq_shift);
sys/dev/irdma/irdma_user.h
437
u32 *rq_depth, u8 *rq_shift);
sys/dev/irdma/irdma_user.h
440
u32 wr_len;
sys/dev/irdma/irdma_user.h
454
u32 IOMEM *wqe_alloc_db;
sys/dev/irdma/irdma_user.h
46
#define irdma_stag_index u32
sys/dev/irdma/irdma_user.h
467
u32 qp_id;
sys/dev/irdma/irdma_user.h
468
u32 qp_caps;
sys/dev/irdma/irdma_user.h
469
u32 sq_size;
sys/dev/irdma/irdma_user.h
47
#define irdma_stag u32
sys/dev/irdma/irdma_user.h
470
u32 rq_size;
sys/dev/irdma/irdma_user.h
471
u32 max_sq_frag_cnt;
sys/dev/irdma/irdma_user.h
472
u32 max_rq_frag_cnt;
sys/dev/irdma/irdma_user.h
473
u32 max_inline_data;
sys/dev/irdma/irdma_user.h
474
u32 last_rx_cmpl_idx;
sys/dev/irdma/irdma_user.h
475
u32 last_tx_cmpl_idx;
sys/dev/irdma/irdma_user.h
50
#define irdma_access_privileges u32
sys/dev/irdma/irdma_user.h
502
u32 IOMEM *cqe_alloc_db;
sys/dev/irdma/irdma_user.h
503
u32 IOMEM *cq_ack_db;
sys/dev/irdma/irdma_user.h
505
u32 cq_id;
sys/dev/irdma/irdma_user.h
506
u32 cq_size;
sys/dev/irdma/irdma_user.h
516
u32 IOMEM *wqe_alloc_db;
sys/dev/irdma/irdma_user.h
521
u32 qp_id;
sys/dev/irdma/irdma_user.h
522
u32 qp_caps;
sys/dev/irdma/irdma_user.h
523
u32 sq_size;
sys/dev/irdma/irdma_user.h
524
u32 rq_size;
sys/dev/irdma/irdma_user.h
525
u32 max_sq_frag_cnt;
sys/dev/irdma/irdma_user.h
526
u32 max_rq_frag_cnt;
sys/dev/irdma/irdma_user.h
527
u32 max_inline_data;
sys/dev/irdma/irdma_user.h
528
u32 sq_depth;
sys/dev/irdma/irdma_user.h
529
u32 rq_depth;
sys/dev/irdma/irdma_user.h
541
u32 IOMEM *cqe_alloc_db;
sys/dev/irdma/irdma_user.h
542
u32 IOMEM *cq_ack_db;
sys/dev/irdma/irdma_user.h
545
u32 cq_size;
sys/dev/irdma/irdma_user.h
546
u32 cq_id;
sys/dev/irdma/irdma_user.h
550
__le64 *irdma_qp_get_next_send_wqe(struct irdma_qp_uk *qp, u32 *wqe_idx,
sys/dev/irdma/irdma_user.h
551
u16 *quanta, u32 total_size,
sys/dev/irdma/irdma_user.h
553
__le64 *irdma_qp_get_next_recv_wqe(struct irdma_qp_uk *qp, u32 *wqe_idx);
sys/dev/irdma/irdma_user.h
556
int irdma_fragcnt_to_quanta_sq(u32 frag_cnt, u16 *quanta);
sys/dev/irdma/irdma_user.h
557
int irdma_fragcnt_to_wqesize_rq(u32 frag_cnt, u16 *wqe_size);
sys/dev/irdma/irdma_user.h
558
void irdma_get_wqe_shift(struct irdma_uk_attrs *uk_attrs, u32 sge,
sys/dev/irdma/irdma_user.h
559
u32 inline_data, u8 *shift);
sys/dev/irdma/irdma_user.h
560
int irdma_get_sqdepth(struct irdma_uk_attrs *uk_attrs, u32 sq_size,
sys/dev/irdma/irdma_user.h
561
u8 shift, u32 *sqdepth);
sys/dev/irdma/irdma_user.h
562
int irdma_get_rqdepth(struct irdma_uk_attrs *uk_attrs, u32 rq_size,
sys/dev/irdma/irdma_user.h
563
u8 shift, u32 *rqdepth);
sys/dev/irdma/irdma_user.h
565
u32 wqe_idx, bool push_wqe);
sys/dev/irdma/irdma_user.h
566
void irdma_clr_wqes(struct irdma_qp_uk *qp, u32 qp_wqe_idx);
sys/dev/irdma/irdma_utils.c
1360
u32 loc_addr[4] = {0};
sys/dev/irdma/irdma_utils.c
1361
u32 rem_addr[4] = {0};
sys/dev/irdma/irdma_utils.c
1458
u16 len, u32 seqnum)
sys/dev/irdma/irdma_utils.c
1482
u32 seqnum)
sys/dev/irdma/irdma_utils.c
1562
u32 pkt_len;
sys/dev/irdma/irdma_utils.c
2062
u32 offset;
sys/dev/irdma/irdma_utils.c
2123
u32 pg_cnt)
sys/dev/irdma/irdma_utils.c
213
irdma_arp_table(struct irdma_pci_f *rf, u32 *ip_addr, const u8 *mac_addr,
sys/dev/irdma/irdma_utils.c
214
u32 action)
sys/dev/irdma/irdma_utils.c
2150
irdma_unmap_vm_page_list(struct irdma_hw *hw, dma_addr_t * pg_dma, u32 pg_cnt)
sys/dev/irdma/irdma_utils.c
218
u32 ip[4] = {};
sys/dev/irdma/irdma_utils.c
2185
irdma_pble_get_paged_mem(struct irdma_chunk *chunk, u32 pg_cnt)
sys/dev/irdma/irdma_utils.c
2187
u32 size;
sys/dev/irdma/irdma_utils.c
2225
u32 next = 1;
sys/dev/irdma/irdma_utils.c
2226
u32 node_id;
sys/dev/irdma/irdma_utils.c
223
for (arp_index = 0; (u32)arp_index < rf->arp_table_size; arp_index++) {
sys/dev/irdma/irdma_utils.c
2245
irdma_free_rsrc(rf, rf->allocated_ws_nodes, (u32)node_id);
sys/dev/irdma/irdma_utils.c
2321
irdma_upload_qp_context(struct irdma_pci_f *rf, u32 qpn,
sys/dev/irdma/irdma_utils.c
2331
u32 *ctx;
sys/dev/irdma/irdma_utils.c
234
(u32 *)&arp_index,
sys/dev/irdma/irdma_utils.c
2367
u32 i, j;
sys/dev/irdma/irdma_utils.c
2388
u32 cq_head = IRDMA_RING_CURRENT_HEAD(cq->cq_ring);
sys/dev/irdma/irdma_utils.c
2461
struct irdma_qp_uk *qp, u32 qp_num)
sys/dev/irdma/irdma_utils.c
2501
u32 wqe_idx;
sys/dev/irdma/irdma_utils.c
280
u32 ip_zero[4] = {};
sys/dev/irdma/irdma_utils.c
313
u32 ip_addr[4];
sys/dev/irdma/irdma_utils.c
336
irdma_add_arp(struct irdma_pci_f *rf, u32 *ip, const u8 *mac)
sys/dev/irdma/irdma_utils.c
514
u32 i, pending_work, wqe_idx;
sys/dev/irdma/irdma_verbs.c
1642
irdma_free_stag(struct irdma_device *iwdev, u32 stag)
sys/dev/irdma/irdma_verbs.c
1644
u32 stag_idx;
sys/dev/irdma/irdma_verbs.c
1654
u32
sys/dev/irdma/irdma_verbs.c
1657
u32 stag;
sys/dev/irdma/irdma_verbs.c
1658
u32 stag_index = 0;
sys/dev/irdma/irdma_verbs.c
1659
u32 next_stag_index;
sys/dev/irdma/irdma_verbs.c
1660
u32 driver_key;
sys/dev/irdma/irdma_verbs.c
1661
u32 random;
sys/dev/irdma/irdma_verbs.c
1679
stag += (u32)consumer_key;
sys/dev/irdma/irdma_verbs.c
1692
irdma_check_mem_contiguous(u64 *arr, u32 npages, u32 pg_size)
sys/dev/irdma/irdma_verbs.c
1694
u32 pg_idx;
sys/dev/irdma/irdma_verbs.c
1711
u32 pg_size)
sys/dev/irdma/irdma_verbs.c
1799
u32 pg_size, total;
sys/dev/irdma/irdma_verbs.c
2108
u32 stag = 0;
sys/dev/irdma/irdma_verbs.c
2168
u32 total;
sys/dev/irdma/irdma_verbs.c
2208
u32 total;
sys/dev/irdma/irdma_verbs.c
2340
u32 stag;
sys/dev/irdma/irdma_verbs.c
293
static u64 irdma_compute_push_wqe_offset(struct irdma_device *iwdev, u32 page_idx){
sys/dev/irdma/irdma_verbs.c
2969
u32 *ip_mcast)
sys/dev/irdma/irdma_verbs.c
3037
u32 ip_addr[4] = {0};
sys/dev/irdma/irdma_verbs.c
3038
u32 mgn;
sys/dev/irdma/irdma_verbs.c
3039
u32 no_mgs;
sys/dev/irdma/irdma_verbs.c
3171
u32 ip_addr[4] = {0};
sys/dev/irdma/irdma_verbs.c
474
u32 size;
sys/dev/irdma/irdma_verbs.c
501
iwqp->kqp.sig_trk_mem = kcalloc(ukinfo->sq_depth, sizeof(u32), GFP_KERNEL);
sys/dev/irdma/irdma_verbs.c
502
memset(iwqp->kqp.sig_trk_mem, 0, ukinfo->sq_depth * sizeof(u32));
sys/dev/irdma/irdma_verbs.c
884
u32 local_ip[4] = {};
sys/dev/irdma/irdma_verbs.h
146
u32 page_cnt;
sys/dev/irdma/irdma_verbs.h
149
u32 npages;
sys/dev/irdma/irdma_verbs.h
150
u32 stag;
sys/dev/irdma/irdma_verbs.h
159
u32 cq_num;
sys/dev/irdma/irdma_verbs.h
186
u32 ipaddr[4];
sys/dev/irdma/irdma_verbs.h
196
u32 *sig_trk_mem;
sys/dev/irdma/irdma_verbs.h
231
u32 qp_mem_size;
sys/dev/irdma/irdma_verbs.h
232
u32 last_aeq;
sys/dev/irdma/irdma_verbs.h
359
static inline void irdma_mcast_mac_v4(u32 *ip_addr, u8 *mac)
sys/dev/irdma/irdma_verbs.h
374
static inline void irdma_mcast_mac_v6(u32 *ip_addr, u8 *mac)
sys/dev/irdma/irdma_verbs.h
96
u32 idx;
sys/dev/irdma/irdma_ws.h
54
u32 l2_sched_node_id;
sys/dev/irdma/osdep.h
115
u32 i; \
sys/dev/irdma/osdep.h
142
((u32*)ip6)[0], ((u32*)ip6)[1], ((u32*)ip6)[2], ((u32*)ip6)[3]
sys/dev/irdma/osdep.h
210
u32 size;
sys/dev/irdma/osdep.h
218
u32 irdma_rd32(struct irdma_dev_ctx *dev_ctx, u32 reg);
sys/dev/irdma/osdep.h
219
void irdma_wr32(struct irdma_dev_ctx *dev_ctx, u32 reg, u32 value);
sys/dev/irdma/osdep.h
220
u64 irdma_rd64(struct irdma_dev_ctx *dev_ctx, u32 reg);
sys/dev/irdma/osdep.h
221
void irdma_wr64(struct irdma_dev_ctx *dev_ctx, u32 reg, u64 value);
sys/dev/irdma/osdep.h
234
void irdma_unmap_vm_page_list(struct irdma_hw *hw, u64 *pg_arr, u32 pg_cnt);
sys/dev/irdma/osdep.h
236
u64 *pg_arr, u32 pg_cnt);
sys/dev/iser/icl_iser.h
219
u32 rkey;
sys/dev/iser/icl_iser.h
446
u32 num_rx_descs;
sys/dev/iser/iser_memory.c
128
static inline u32
sys/dev/iser/iser_memory.c
129
iser_ib_inc_rkey(u32 rkey)
sys/dev/iser/iser_memory.c
131
const u32 mask = 0x000000ff;
sys/dev/iser/iser_memory.c
139
u32 rkey;
sys/dev/ixgbe/if_bypass.c
121
u32 cmd;
sys/dev/ixgbe/if_bypass.c
438
u32 mask, arg;
sys/dev/ixgbe/if_bypass.c
507
u32 sec, year;
sys/dev/ixgbe/if_bypass.c
553
u32 cmd, base, head;
sys/dev/ixgbe/if_bypass.c
554
u32 log_off, count = 0;
sys/dev/ixgbe/if_bypass.c
635
u32 mon, days, hours, min, sec;
sys/dev/ixgbe/if_bypass.c
636
u32 time = eeprom[count].logs & BYPASS_LOG_TIME_M;
sys/dev/ixgbe/if_bypass.c
637
u32 event = (eeprom[count].logs & BYPASS_LOG_EVENT_M) >>
sys/dev/ixgbe/if_bypass.c
720
u32 mask, value, sec, year;
sys/dev/ixgbe/if_bypass.c
95
ixgbe_get_bypass_time(u32 *year, u32 *sec)
sys/dev/ixgbe/if_fdir.c
41
u32 hdrm = 32 << fdir_pballoc;
sys/dev/ixgbe/if_ix.c
1062
u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
sys/dev/ixgbe/if_ix.c
1154
sizeof(u32), DBA_ALIGN),
sys/dev/ixgbe/if_ix.c
1582
u32 ret_next_index = 0;
sys/dev/ixgbe/if_ix.c
1799
u32 autoneg, err = 0;
sys/dev/ixgbe/if_ix.c
187
static const char *ixgbe_link_speed_to_str(u32 link_speed);
sys/dev/ixgbe/if_ix.c
1872
u32 missed_rx = 0, bprc, lxon, lxoff, total;
sys/dev/ixgbe/if_ix.c
1873
u32 lxoffrxc;
sys/dev/ixgbe/if_ix.c
202
static void ixgbe_enable_queue(struct ixgbe_softc *, u32);
sys/dev/ixgbe/if_ix.c
203
static void ixgbe_disable_queue(struct ixgbe_softc *, u32);
sys/dev/ixgbe/if_ix.c
211
static u8 *ixgbe_mc_array_itr(struct ixgbe_hw *, u8 **, u32 *);
sys/dev/ixgbe/if_ix.c
224
static void ixgbe_check_fan_failure(struct ixgbe_softc *, u32, bool);
sys/dev/ixgbe/if_ix.c
2350
u32 ctrl;
sys/dev/ixgbe/if_ix.c
2434
u32 offset;
sys/dev/ixgbe/if_ix.c
2949
u32 rctl;
sys/dev/ixgbe/if_ix.c
2983
u32 eicr, eicr_mask;
sys/dev/ixgbe/if_ix.c
3166
u32 offset = 0;
sys/dev/ixgbe/if_ix.c
3172
u32 ret_next_index = 0;
sys/dev/ixgbe/if_ix.c
3201
u32 print_cluster_id = (u32)cluster_id;
sys/dev/ixgbe/if_ix.c
3204
u32 print_table_id = (u32)table_id;
sys/dev/ixgbe/if_ix.c
3207
u32 print_table_length = (u32)ret_buf_size;
sys/dev/ixgbe/if_ix.c
3211
u32 print_curr_offset = offset;
sys/dev/ixgbe/if_ix.c
3258
u32 clusters = sc->debug_dump_cluster_mask;
sys/dev/ixgbe/if_ix.c
3568
u32 ctrl_ext;
sys/dev/ixgbe/if_ix.c
3619
IXGBE_READ_REG(hw, IXGBE_GRC_BY_MAC(hw)) & ~(u32)2);
sys/dev/ixgbe/if_ix.c
3698
u32 wus;
sys/dev/ixgbe/if_ix.c
3808
u32 txdctl, mhadd;
sys/dev/ixgbe/if_ix.c
3809
u32 rxdctl, rxctrl;
sys/dev/ixgbe/if_ix.c
3810
u32 ctrl_ext;
sys/dev/ixgbe/if_ix.c
3990
u32 ivar, index;
sys/dev/ixgbe/if_ix.c
4038
u32 newitr;
sys/dev/ixgbe/if_ix.c
4077
u32 gpie;
sys/dev/ixgbe/if_ix.c
4123
u32 rxpb, frame, size, tmp;
sys/dev/ixgbe/if_ix.c
4187
u32 fctrl;
sys/dev/ixgbe/if_ix.c
4226
ixgbe_mc_array_itr(struct ixgbe_hw *hw, u8 **update_ptr, u32 *vmdq)
sys/dev/ixgbe/if_ix.c
4339
u32 err, cage_full = 0;
sys/dev/ixgbe/if_ix.c
4394
u32 autoneg;
sys/dev/ixgbe/if_ix.c
4566
ixgbe_link_speed_to_str(u32 link_speed)
sys/dev/ixgbe/if_ix.c
4694
u32 mask, fwsm;
sys/dev/ixgbe/if_ix.c
4826
ixgbe_enable_queue(struct ixgbe_softc *sc, u32 vector)
sys/dev/ixgbe/if_ix.c
4830
u32 mask;
sys/dev/ixgbe/if_ix.c
4849
ixgbe_disable_queue(struct ixgbe_softc *sc, u32 vector)
sys/dev/ixgbe/if_ix.c
4853
u32 mask;
sys/dev/ixgbe/if_ix.c
4878
u32 eicr, eicr_mask;
sys/dev/ixgbe/if_ix.c
5032
u32 srrctl;
sys/dev/ixgbe/if_ix.c
5058
u32 srrctl;
sys/dev/ixgbe/if_ix.c
5424
u32 new_wufc;
sys/dev/ixgbe/if_ix.c
5456
u32 reg;
sys/dev/ixgbe/if_ix.c
5648
u32 reg, val, shift;
sys/dev/ixgbe/if_ix.c
5810
ixgbe_check_fan_failure(struct ixgbe_softc *sc, u32 reg, bool in_interrupt)
sys/dev/ixgbe/if_ix.c
5812
u32 mask;
sys/dev/ixgbe/if_ix.c
629
u32 reta = 0, mrqc, rss_key[10];
sys/dev/ixgbe/if_ix.c
632
u32 rss_hash_config;
sys/dev/ixgbe/if_ix.c
749
u32 bufsz, fctrl, srrctl, rxcsum;
sys/dev/ixgbe/if_ix.c
750
u32 hlreg;
sys/dev/ixgbe/if_ix.c
823
u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
sys/dev/ixgbe/if_ix.c
867
u32 txctrl = 0;
sys/dev/ixgbe/if_ix.c
917
u32 dmatxctl, rttdcs;
sys/dev/ixgbe/if_ix.c
986
u32 ctrl_ext;
sys/dev/ixgbe/if_ixv.c
1252
u32 txctrl, txdctl;
sys/dev/ixgbe/if_ixv.c
1303
u32 reta = 0, mrqc, rss_key[10];
sys/dev/ixgbe/if_ixv.c
1306
u32 rss_hash_config;
sys/dev/ixgbe/if_ixv.c
131
static u8 *ixv_mc_array_itr(struct ixgbe_hw *, u8 **, u32 *);
sys/dev/ixgbe/if_ixv.c
1405
u32 bufsz, psrtype;
sys/dev/ixgbe/if_ixv.c
1433
u32 reg, rxdctl;
sys/dev/ixgbe/if_ixv.c
1528
u32 ctrl, vid, vfta, retry;
sys/dev/ixgbe/if_ixv.c
1634
u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
sys/dev/ixgbe/if_ixv.c
1686
u32 ivar, index;
sys/dev/ixgbe/if_ixv.c
1782
u32 current = IXGBE_READ_REG(hw, reg); \
sys/dev/ixgbe/if_ixv.c
497
sizeof(u32), DBA_ALIGN);
sys/dev/ixgbe/if_ixv.c
680
ixv_enable_queue(struct ixgbe_softc *sc, u32 vector)
sys/dev/ixgbe/if_ixv.c
683
u32 queue = 1 << vector;
sys/dev/ixgbe/if_ixv.c
684
u32 mask;
sys/dev/ixgbe/if_ixv.c
694
ixv_disable_queue(struct ixgbe_softc *sc, u32 vector)
sys/dev/ixgbe/if_ixv.c
698
u32 mask;
sys/dev/ixgbe/if_ixv.c
728
u32 reg;
sys/dev/ixgbe/if_ixv.c
884
ixv_mc_array_itr(struct ixgbe_hw *hw, u8 **update_ptr, u32 *vmdq)
sys/dev/ixgbe/if_sriov.c
107
ixgbe_send_vf_success(struct ixgbe_softc *sc, struct ixgbe_vf *vf, u32 msg)
sys/dev/ixgbe/if_sriov.c
114
ixgbe_send_vf_failure(struct ixgbe_softc *sc, struct ixgbe_vf *vf, u32 msg)
sys/dev/ixgbe/if_sriov.c
160
inline u32
sys/dev/ixgbe/if_sriov.c
163
u32 mrqc;
sys/dev/ixgbe/if_sriov.c
183
inline u32
sys/dev/ixgbe/if_sriov.c
425
ixgbe_vf_set_mc_addr(struct ixgbe_softc *sc, struct ixgbe_vf *vf, u32 *msg)
sys/dev/ixgbe/if_sriov.c
429
u32 vmolr, vec_bit, vec_reg, mta_reg;
sys/dev/ixgbe/if_sriov.c
98
ixgbe_send_vf_msg(struct ixgbe_hw *hw, struct ixgbe_vf *vf, u32 msg)
sys/dev/ixgbe/ixgbe.h
246
u32 low;
sys/dev/ixgbe/ixgbe.h
247
u32 high;
sys/dev/ixgbe/ixgbe.h
248
u32 log;
sys/dev/ixgbe/ixgbe.h
266
u32 vmdq;
sys/dev/ixgbe/ixgbe.h
276
u32 tail;
sys/dev/ixgbe/ixgbe.h
287
u32 bytes; /* used for AIM */
sys/dev/ixgbe/ixgbe.h
288
u32 packets;
sys/dev/ixgbe/ixgbe.h
301
u32 me;
sys/dev/ixgbe/ixgbe.h
302
u32 tail;
sys/dev/ixgbe/ixgbe.h
309
u32 bytes; /* Used for AIM calc */
sys/dev/ixgbe/ixgbe.h
310
u32 packets;
sys/dev/ixgbe/ixgbe.h
330
u32 msix; /* This queue's MSIX vector */
sys/dev/ixgbe/ixgbe.h
331
u32 eitr_setting;
sys/dev/ixgbe/ixgbe.h
342
u32 msix; /* This queue's MSIX vector */
sys/dev/ixgbe/ixgbe.h
398
u32 shadow_vfta[IXGBE_VFTA_SIZE];
sys/dev/ixgbe/ixgbe.h
405
u32 link_speed;
sys/dev/ixgbe/ixgbe.h
408
u32 vector;
sys/dev/ixgbe/ixgbe.h
410
u32 phy_layer;
sys/dev/ixgbe/ixgbe.h
414
u32 wufc;
sys/dev/ixgbe/ixgbe.h
417
u32 rx_mbuf_sz;
sys/dev/ixgbe/ixgbe.h
425
u32 task_requests;
sys/dev/ixgbe/ixgbe.h
476
u32 feat_cap;
sys/dev/ixgbe/ixgbe.h
477
u32 feat_en;
sys/dev/ixgbe/ixgbe.h
481
u32 debug_dump_cluster_mask;
sys/dev/ixgbe/ixgbe.h
486
u32 offset; /* offset to read/write from table, in bytes */
sys/dev/ixgbe/ixgbe.h
491
u32 reserved2;
sys/dev/ixgbe/ixgbe_82598.c
1004
s32 ixgbe_set_vfta_82598(struct ixgbe_hw *hw, u32 vlan, u32 vind,
sys/dev/ixgbe/ixgbe_82598.c
1007
u32 regindex;
sys/dev/ixgbe/ixgbe_82598.c
1008
u32 bitindex;
sys/dev/ixgbe/ixgbe_82598.c
1009
u32 bits;
sys/dev/ixgbe/ixgbe_82598.c
1010
u32 vftabyte;
sys/dev/ixgbe/ixgbe_82598.c
1055
u32 offset;
sys/dev/ixgbe/ixgbe_82598.c
1056
u32 vlanbyte;
sys/dev/ixgbe/ixgbe_82598.c
1079
s32 ixgbe_read_analog_reg8_82598(struct ixgbe_hw *hw, u32 reg, u8 *val)
sys/dev/ixgbe/ixgbe_82598.c
1081
u32 atlas_ctl;
sys/dev/ixgbe/ixgbe_82598.c
1103
s32 ixgbe_write_analog_reg8_82598(struct ixgbe_hw *hw, u32 reg, u8 val)
sys/dev/ixgbe/ixgbe_82598.c
1105
u32 atlas_ctl;
sys/dev/ixgbe/ixgbe_82598.c
1134
u32 i;
sys/dev/ixgbe/ixgbe_82598.c
1230
u32 autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC);
sys/dev/ixgbe/ixgbe_82598.c
1231
u32 pma_pmd_10g = autoc & IXGBE_AUTOC_10G_PMA_PMD_MASK;
sys/dev/ixgbe/ixgbe_82598.c
1232
u32 pma_pmd_1g = autoc & IXGBE_AUTOC_1G_PMA_PMD_MASK;
sys/dev/ixgbe/ixgbe_82598.c
1364
u32 regval;
sys/dev/ixgbe/ixgbe_82598.c
1365
u32 i;
sys/dev/ixgbe/ixgbe_82598.c
1395
u32 headroom, int strategy)
sys/dev/ixgbe/ixgbe_82598.c
1397
u32 rxpktsize = IXGBE_RXPBSIZE_64KB;
sys/dev/ixgbe/ixgbe_82598.c
1434
s32 ixgbe_enable_rx_dma_82598(struct ixgbe_hw *hw, u32 regval)
sys/dev/ixgbe/ixgbe_82598.c
256
u32 regval;
sys/dev/ixgbe/ixgbe_82598.c
257
u32 i;
sys/dev/ixgbe/ixgbe_82598.c
301
u32 autoc = 0;
sys/dev/ixgbe/ixgbe_82598.c
411
u32 fctrl_reg;
sys/dev/ixgbe/ixgbe_82598.c
412
u32 rmcs_reg;
sys/dev/ixgbe/ixgbe_82598.c
413
u32 reg;
sys/dev/ixgbe/ixgbe_82598.c
414
u32 fcrtl, fcrth;
sys/dev/ixgbe/ixgbe_82598.c
415
u32 link_speed = 0;
sys/dev/ixgbe/ixgbe_82598.c
560
u32 autoc_reg;
sys/dev/ixgbe/ixgbe_82598.c
561
u32 links_reg;
sys/dev/ixgbe/ixgbe_82598.c
562
u32 i;
sys/dev/ixgbe/ixgbe_82598.c
607
u32 timeout;
sys/dev/ixgbe/ixgbe_82598.c
64
static s32 ixgbe_clear_vmdq_82598(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
sys/dev/ixgbe/ixgbe_82598.c
646
u32 links_reg;
sys/dev/ixgbe/ixgbe_82598.c
647
u32 i;
sys/dev/ixgbe/ixgbe_82598.c
67
u32 headroom, int strategy);
sys/dev/ixgbe/ixgbe_82598.c
738
u32 curr_autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC);
sys/dev/ixgbe/ixgbe_82598.c
739
u32 autoc = curr_autoc;
sys/dev/ixgbe/ixgbe_82598.c
740
u32 link_mode = autoc & IXGBE_AUTOC_LMS_MASK;
sys/dev/ixgbe/ixgbe_82598.c
814
u32 ctrl;
sys/dev/ixgbe/ixgbe_82598.c
815
u32 gheccr;
sys/dev/ixgbe/ixgbe_82598.c
816
u32 i;
sys/dev/ixgbe/ixgbe_82598.c
817
u32 autoc;
sys/dev/ixgbe/ixgbe_82598.c
82
u32 gcr = IXGBE_READ_REG(hw, IXGBE_GCR);
sys/dev/ixgbe/ixgbe_82598.c
946
s32 ixgbe_set_vmdq_82598(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
sys/dev/ixgbe/ixgbe_82598.c
948
u32 rar_high;
sys/dev/ixgbe/ixgbe_82598.c
949
u32 rar_entries = hw->mac.num_rar_entries;
sys/dev/ixgbe/ixgbe_82598.c
972
static s32 ixgbe_clear_vmdq_82598(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
sys/dev/ixgbe/ixgbe_82598.c
974
u32 rar_high;
sys/dev/ixgbe/ixgbe_82598.c
975
u32 rar_entries = hw->mac.num_rar_entries;
sys/dev/ixgbe/ixgbe_82598.h
38
u32 ixgbe_get_pcie_msix_count_82598(struct ixgbe_hw *hw);
sys/dev/ixgbe/ixgbe_82598.h
42
s32 ixgbe_set_vmdq_82598(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
sys/dev/ixgbe/ixgbe_82598.h
43
s32 ixgbe_set_vfta_82598(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on,
sys/dev/ixgbe/ixgbe_82598.h
45
s32 ixgbe_read_analog_reg8_82598(struct ixgbe_hw *hw, u32 reg, u8 *val);
sys/dev/ixgbe/ixgbe_82598.h
46
s32 ixgbe_write_analog_reg8_82598(struct ixgbe_hw *hw, u32 reg, u8 val);
sys/dev/ixgbe/ixgbe_82598.h
53
s32 ixgbe_enable_rx_dma_82598(struct ixgbe_hw *hw, u32 regval);
sys/dev/ixgbe/ixgbe_82599.c
1059
u32 ctrl = 0;
sys/dev/ixgbe/ixgbe_82599.c
1060
u32 i, autoc, autoc2;
sys/dev/ixgbe/ixgbe_82599.c
1061
u32 curr_lms;
sys/dev/ixgbe/ixgbe_82599.c
120
u32 esdp;
sys/dev/ixgbe/ixgbe_82599.c
1234
static s32 ixgbe_fdir_check_cmd_complete(struct ixgbe_hw *hw, u32 *fdircmd)
sys/dev/ixgbe/ixgbe_82599.c
1256
u32 fdirctrl = IXGBE_READ_REG(hw, IXGBE_FDIRCTRL);
sys/dev/ixgbe/ixgbe_82599.c
1257
u32 fdircmd;
sys/dev/ixgbe/ixgbe_82599.c
1326
static void ixgbe_fdir_enable_82599(struct ixgbe_hw *hw, u32 fdirctrl)
sys/dev/ixgbe/ixgbe_82599.c
1368
s32 ixgbe_init_fdir_signature_82599(struct ixgbe_hw *hw, u32 fdirctrl)
sys/dev/ixgbe/ixgbe_82599.c
1395
s32 ixgbe_init_fdir_perfect_82599(struct ixgbe_hw *hw, u32 fdirctrl,
sys/dev/ixgbe/ixgbe_82599.c
1434
u32 fdirctrl;
sys/dev/ixgbe/ixgbe_82599.c
1470
u32 n = (_n); \
sys/dev/ixgbe/ixgbe_82599.c
1496
u32 ixgbe_atr_compute_sig_hash_82599(union ixgbe_atr_hash_dword input,
sys/dev/ixgbe/ixgbe_82599.c
1499
u32 hi_hash_dword, lo_hash_dword, flow_vm_vlan;
sys/dev/ixgbe/ixgbe_82599.c
1500
u32 sig_hash = 0, bucket_hash = 0, common_hash = 0;
sys/dev/ixgbe/ixgbe_82599.c
1570
u32 fdircmd;
sys/dev/ixgbe/ixgbe_82599.c
1598
fdircmd |= (u32)flow_type << IXGBE_FDIRCMD_FLOW_TYPE_SHIFT;
sys/dev/ixgbe/ixgbe_82599.c
1599
fdircmd |= (u32)queue << IXGBE_FDIRCMD_RX_QUEUE_SHIFT;
sys/dev/ixgbe/ixgbe_82599.c
1611
DEBUGOUT2("Tx Queue=%x hash=%x\n", queue, (u32)fdirhashcmd);
sys/dev/ixgbe/ixgbe_82599.c
1618
u32 n = (_n); \
sys/dev/ixgbe/ixgbe_82599.c
1640
u32 hi_hash_dword, lo_hash_dword, flow_vm_vlan;
sys/dev/ixgbe/ixgbe_82599.c
1641
u32 bucket_hash = 0;
sys/dev/ixgbe/ixgbe_82599.c
1642
u32 hi_dword = 0;
sys/dev/ixgbe/ixgbe_82599.c
1643
u32 i = 0;
sys/dev/ixgbe/ixgbe_82599.c
1693
static u32 ixgbe_get_fdirtcpm_82599(union ixgbe_atr_input *input_mask)
sys/dev/ixgbe/ixgbe_82599.c
1695
u32 mask = IXGBE_NTOHS(input_mask->formatted.dst_port);
sys/dev/ixgbe/ixgbe_82599.c
1697
mask |= (u32)IXGBE_NTOHS(input_mask->formatted.src_port);
sys/dev/ixgbe/ixgbe_82599.c
1712
(((u32)(_value) >> 24) | (((u32)(_value) & 0x00FF0000) >> 8) | \
sys/dev/ixgbe/ixgbe_82599.c
1713
(((u32)(_value) & 0x0000FF00) << 8) | ((u32)(_value) << 24))
sys/dev/ixgbe/ixgbe_82599.c
1725
u32 fdirm = IXGBE_FDIRM_DIPv6;
sys/dev/ixgbe/ixgbe_82599.c
1726
u32 fdirtcpm;
sys/dev/ixgbe/ixgbe_82599.c
1727
u32 fdirip6m;
sys/dev/ixgbe/ixgbe_82599.c
1808
fdirip6m = ((u32) 0xFFFFU << IXGBE_FDIRIP6M_DIPM_SHIFT);
sys/dev/ixgbe/ixgbe_82599.c
1904
u32 fdirport, fdirvlan, fdirhash, fdircmd;
sys/dev/ixgbe/ixgbe_82599.c
1905
u32 addr_low, addr_high;
sys/dev/ixgbe/ixgbe_82599.c
1906
u32 cloud_type = 0;
sys/dev/ixgbe/ixgbe_82599.c
1932
fdirport |= (u32)IXGBE_NTOHS(input->formatted.src_port);
sys/dev/ixgbe/ixgbe_82599.c
1939
fdirvlan |= (u32)IXGBE_NTOHS(input->formatted.vlan_id);
sys/dev/ixgbe/ixgbe_82599.c
1946
addr_low = ((u32)input->formatted.inner_mac[0] |
sys/dev/ixgbe/ixgbe_82599.c
1947
((u32)input->formatted.inner_mac[1] << 8) |
sys/dev/ixgbe/ixgbe_82599.c
1948
((u32)input->formatted.inner_mac[2] << 16) |
sys/dev/ixgbe/ixgbe_82599.c
1949
((u32)input->formatted.inner_mac[3] << 24));
sys/dev/ixgbe/ixgbe_82599.c
1950
addr_high = ((u32)input->formatted.inner_mac[4] |
sys/dev/ixgbe/ixgbe_82599.c
1951
((u32)input->formatted.inner_mac[5] << 8));
sys/dev/ixgbe/ixgbe_82599.c
1977
fdircmd |= (u32)queue << IXGBE_FDIRCMD_RX_QUEUE_SHIFT;
sys/dev/ixgbe/ixgbe_82599.c
1978
fdircmd |= (u32)input->formatted.vm_pool << IXGBE_FDIRCMD_VT_POOL_SHIFT;
sys/dev/ixgbe/ixgbe_82599.c
1994
u32 fdirhash;
sys/dev/ixgbe/ixgbe_82599.c
1995
u32 fdircmd;
sys/dev/ixgbe/ixgbe_82599.c
2103
s32 ixgbe_read_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 *val)
sys/dev/ixgbe/ixgbe_82599.c
2105
u32 core_ctl;
sys/dev/ixgbe/ixgbe_82599.c
2127
s32 ixgbe_write_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 val)
sys/dev/ixgbe/ixgbe_82599.c
2129
u32 core_ctl;
sys/dev/ixgbe/ixgbe_82599.c
2216
u32 autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC);
sys/dev/ixgbe/ixgbe_82599.c
2217
u32 autoc2 = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
sys/dev/ixgbe/ixgbe_82599.c
2218
u32 pma_pmd_10g_serial = autoc2 & IXGBE_AUTOC2_10G_SERIAL_PMA_PMD_MASK;
sys/dev/ixgbe/ixgbe_82599.c
2219
u32 pma_pmd_10g_parallel = autoc & IXGBE_AUTOC_10G_PMA_PMD_MASK;
sys/dev/ixgbe/ixgbe_82599.c
2220
u32 pma_pmd_1g = autoc & IXGBE_AUTOC_1G_PMA_PMD_MASK;
sys/dev/ixgbe/ixgbe_82599.c
2301
s32 ixgbe_enable_rx_dma_82599(struct ixgbe_hw *hw, u32 regval)
sys/dev/ixgbe/ixgbe_82599.c
250
s32 prot_autoc_read_82599(struct ixgbe_hw *hw, bool *locked, u32 *reg_val)
sys/dev/ixgbe/ixgbe_82599.c
2510
u32 anlp1_reg = 0;
sys/dev/ixgbe/ixgbe_82599.c
2511
u32 i, autoc_reg, autoc2_reg;
sys/dev/ixgbe/ixgbe_82599.c
2563
u32 esdp;
sys/dev/ixgbe/ixgbe_82599.c
2621
u32 esdp;
sys/dev/ixgbe/ixgbe_82599.c
279
s32 prot_autoc_write_82599(struct ixgbe_hw *hw, u32 autoc, bool locked)
sys/dev/ixgbe/ixgbe_82599.c
427
u32 autoc = 0;
sys/dev/ixgbe/ixgbe_82599.c
612
u32 autoc2_reg;
sys/dev/ixgbe/ixgbe_82599.c
637
u32 autoc_reg;
sys/dev/ixgbe/ixgbe_82599.c
638
u32 links_reg;
sys/dev/ixgbe/ixgbe_82599.c
639
u32 i;
sys/dev/ixgbe/ixgbe_82599.c
704
u32 esdp_reg = IXGBE_READ_REG(hw, IXGBE_ESDP);
sys/dev/ixgbe/ixgbe_82599.c
727
u32 esdp_reg = IXGBE_READ_REG(hw, IXGBE_ESDP);
sys/dev/ixgbe/ixgbe_82599.c
773
u32 esdp_reg = IXGBE_READ_REG(hw, IXGBE_ESDP);
sys/dev/ixgbe/ixgbe_82599.c
808
u32 autoc_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC);
sys/dev/ixgbe/ixgbe_82599.c
918
u32 pma_pmd_1g, link_mode;
sys/dev/ixgbe/ixgbe_82599.c
919
u32 current_autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC); /* holds the value of AUTOC register at this current point in time */
sys/dev/ixgbe/ixgbe_82599.c
920
u32 orig_autoc = 0; /* holds the cached value of AUTOC register */
sys/dev/ixgbe/ixgbe_82599.c
921
u32 autoc = current_autoc; /* Temporary variable used for comparison purposes */
sys/dev/ixgbe/ixgbe_82599.c
922
u32 autoc2 = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
sys/dev/ixgbe/ixgbe_82599.c
923
u32 pma_pmd_10g_serial = autoc2 & IXGBE_AUTOC2_10G_SERIAL_PMA_PMD_MASK;
sys/dev/ixgbe/ixgbe_82599.c
924
u32 links_reg;
sys/dev/ixgbe/ixgbe_82599.c
925
u32 i;
sys/dev/ixgbe/ixgbe_82599.h
56
s32 ixgbe_read_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 *val);
sys/dev/ixgbe/ixgbe_82599.h
57
s32 ixgbe_write_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 val);
sys/dev/ixgbe/ixgbe_82599.h
62
s32 ixgbe_enable_rx_dma_82599(struct ixgbe_hw *hw, u32 regval);
sys/dev/ixgbe/ixgbe_82599.h
63
s32 prot_autoc_read_82599(struct ixgbe_hw *hw, bool *locked, u32 *reg_val);
sys/dev/ixgbe/ixgbe_82599.h
64
s32 prot_autoc_write_82599(struct ixgbe_hw *hw, u32 reg_val, bool locked);
sys/dev/ixgbe/ixgbe_api.c
1008
s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
sys/dev/ixgbe/ixgbe_api.c
1032
u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw)
sys/dev/ixgbe/ixgbe_api.c
1049
u32 addr_count, ixgbe_mc_addr_itr func)
sys/dev/ixgbe/ixgbe_api.c
1070
u32 mc_addr_count, ixgbe_mc_addr_itr func,
sys/dev/ixgbe/ixgbe_api.c
1124
s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on,
sys/dev/ixgbe/ixgbe_api.c
1144
s32 ixgbe_set_vlvf(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on,
sys/dev/ixgbe/ixgbe_api.c
1145
u32 *vfta_delta, u32 vfta, bool vlvf_bypass)
sys/dev/ixgbe/ixgbe_api.c
1159
s32 ixgbe_toggle_txdctl(struct ixgbe_hw *hw, u32 vind)
sys/dev/ixgbe/ixgbe_api.c
1321
s32 ixgbe_read_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
sys/dev/ixgbe/ixgbe_api.c
1322
u32 device_type, u32 *phy_data)
sys/dev/ixgbe/ixgbe_api.c
1337
s32 ixgbe_write_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
sys/dev/ixgbe/ixgbe_api.c
1338
u32 device_type, u32 phy_data)
sys/dev/ixgbe/ixgbe_api.c
1372
void ixgbe_mdd_event(struct ixgbe_hw *hw, u32 *vf_bitmap)
sys/dev/ixgbe/ixgbe_api.c
1385
void ixgbe_restore_mdd_vf(struct ixgbe_hw *hw, u32 vf)
sys/dev/ixgbe/ixgbe_api.c
1441
s32 ixgbe_bypass_rw(struct ixgbe_hw *hw, u32 cmd, u32 *status)
sys/dev/ixgbe/ixgbe_api.c
1459
bool ixgbe_bypass_valid_rd(struct ixgbe_hw *hw, u32 in_reg, u32 out_reg)
sys/dev/ixgbe/ixgbe_api.c
1477
s32 ixgbe_bypass_set(struct ixgbe_hw *hw, u32 cmd, u32 event, u32 action)
sys/dev/ixgbe/ixgbe_api.c
1490
s32 ixgbe_bypass_rd_eep(struct ixgbe_hw *hw, u32 addr, u8 *value)
sys/dev/ixgbe/ixgbe_api.c
1504
s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val)
sys/dev/ixgbe/ixgbe_api.c
1518
s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val)
sys/dev/ixgbe/ixgbe_api.c
1715
s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval)
sys/dev/ixgbe/ixgbe_api.c
1753
s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u32 mask)
sys/dev/ixgbe/ixgbe_api.c
1767
void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u32 mask)
sys/dev/ixgbe/ixgbe_api.c
40
static const u32 ixgbe_mvals_base[IXGBE_MVALS_IDX_LIMIT] = {
sys/dev/ixgbe/ixgbe_api.c
44
static const u32 ixgbe_mvals_X540[IXGBE_MVALS_IDX_LIMIT] = {
sys/dev/ixgbe/ixgbe_api.c
457
u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw)
sys/dev/ixgbe/ixgbe_api.c
468
u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw)
sys/dev/ixgbe/ixgbe_api.c
48
static const u32 ixgbe_mvals_X550[IXGBE_MVALS_IDX_LIMIT] = {
sys/dev/ixgbe/ixgbe_api.c
496
s32 ixgbe_read_pba_string(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size)
sys/dev/ixgbe/ixgbe_api.c
508
s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num)
sys/dev/ixgbe/ixgbe_api.c
52
static const u32 ixgbe_mvals_X550EM_x[IXGBE_MVALS_IDX_LIMIT] = {
sys/dev/ixgbe/ixgbe_api.c
56
static const u32 ixgbe_mvals_X550EM_a[IXGBE_MVALS_IDX_LIMIT] = {
sys/dev/ixgbe/ixgbe_api.c
575
s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
sys/dev/ixgbe/ixgbe_api.c
594
s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
sys/dev/ixgbe/ixgbe_api.c
784
s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index)
sys/dev/ixgbe/ixgbe_api.c
797
s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index)
sys/dev/ixgbe/ixgbe_api.c
810
s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index)
sys/dev/ixgbe/ixgbe_api.c
823
s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index)
sys/dev/ixgbe/ixgbe_api.c
941
s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq)
sys/dev/ixgbe/ixgbe_api.c
958
s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
sys/dev/ixgbe/ixgbe_api.c
959
u32 enable_addr)
sys/dev/ixgbe/ixgbe_api.c
972
s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index)
sys/dev/ixgbe/ixgbe_api.c
984
s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
sys/dev/ixgbe/ixgbe_api.c
996
s32 ixgbe_set_vmdq_san_mac(struct ixgbe_hw *hw, u32 vmdq)
sys/dev/ixgbe/ixgbe_api.h
112
s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq);
sys/dev/ixgbe/ixgbe_api.h
113
s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
sys/dev/ixgbe/ixgbe_api.h
114
u32 enable_addr);
sys/dev/ixgbe/ixgbe_api.h
115
s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index);
sys/dev/ixgbe/ixgbe_api.h
116
s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
sys/dev/ixgbe/ixgbe_api.h
117
s32 ixgbe_set_vmdq_san_mac(struct ixgbe_hw *hw, u32 vmdq);
sys/dev/ixgbe/ixgbe_api.h
118
s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
sys/dev/ixgbe/ixgbe_api.h
120
u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw);
sys/dev/ixgbe/ixgbe_api.h
122
u32 addr_count, ixgbe_mc_addr_itr func);
sys/dev/ixgbe/ixgbe_api.h
124
u32 mc_addr_count, ixgbe_mc_addr_itr func,
sys/dev/ixgbe/ixgbe_api.h
126
void ixgbe_add_uc_addr(struct ixgbe_hw *hw, u8 *addr_list, u32 vmdq);
sys/dev/ixgbe/ixgbe_api.h
130
s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan,
sys/dev/ixgbe/ixgbe_api.h
131
u32 vind, bool vlan_on, bool vlvf_bypass);
sys/dev/ixgbe/ixgbe_api.h
132
s32 ixgbe_set_vlvf(struct ixgbe_hw *hw, u32 vlan, u32 vind,
sys/dev/ixgbe/ixgbe_api.h
133
bool vlan_on, u32 *vfta_delta, u32 vfta,
sys/dev/ixgbe/ixgbe_api.h
135
s32 ixgbe_toggle_txdctl(struct ixgbe_hw *hw, u32 vind);
sys/dev/ixgbe/ixgbe_api.h
145
s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val);
sys/dev/ixgbe/ixgbe_api.h
146
s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val);
sys/dev/ixgbe/ixgbe_api.h
150
s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval);
sys/dev/ixgbe/ixgbe_api.h
154
s32 ixgbe_init_fdir_signature_82599(struct ixgbe_hw *hw, u32 fdirctrl);
sys/dev/ixgbe/ixgbe_api.h
155
s32 ixgbe_init_fdir_perfect_82599(struct ixgbe_hw *hw, u32 fdirctrl,
sys/dev/ixgbe/ixgbe_api.h
177
u32 ixgbe_atr_compute_sig_hash_82599(union ixgbe_atr_hash_dword input,
sys/dev/ixgbe/ixgbe_api.h
197
s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u32 mask);
sys/dev/ixgbe/ixgbe_api.h
198
void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u32 mask);
sys/dev/ixgbe/ixgbe_api.h
203
s32 ixgbe_bypass_rw(struct ixgbe_hw *hw, u32 cmd, u32 *status);
sys/dev/ixgbe/ixgbe_api.h
204
s32 ixgbe_bypass_set(struct ixgbe_hw *hw, u32 cmd, u32 event, u32 action);
sys/dev/ixgbe/ixgbe_api.h
205
s32 ixgbe_bypass_rd_eep(struct ixgbe_hw *hw, u32 addr, u8 *value);
sys/dev/ixgbe/ixgbe_api.h
206
bool ixgbe_bypass_valid_rd(struct ixgbe_hw *hw, u32 in_reg, u32 out_reg);
sys/dev/ixgbe/ixgbe_api.h
215
s32 ixgbe_read_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
sys/dev/ixgbe/ixgbe_api.h
216
u32 device_type, u32 *phy_data);
sys/dev/ixgbe/ixgbe_api.h
217
s32 ixgbe_write_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
sys/dev/ixgbe/ixgbe_api.h
218
u32 device_type, u32 phy_data);
sys/dev/ixgbe/ixgbe_api.h
221
void ixgbe_mdd_event(struct ixgbe_hw *hw, u32 *vf_bitmap);
sys/dev/ixgbe/ixgbe_api.h
222
void ixgbe_restore_mdd_vf(struct ixgbe_hw *hw, u32 vf);
sys/dev/ixgbe/ixgbe_api.h
229
s32 ixgbe_negotiate_fc(struct ixgbe_hw *hw, u32 adv_reg, u32 lp_reg,
sys/dev/ixgbe/ixgbe_api.h
230
u32 adv_sym, u32 adv_asm, u32 lp_sym, u32 lp_asm);
sys/dev/ixgbe/ixgbe_api.h
63
u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw);
sys/dev/ixgbe/ixgbe_api.h
64
u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw);
sys/dev/ixgbe/ixgbe_api.h
66
s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num);
sys/dev/ixgbe/ixgbe_api.h
67
s32 ixgbe_read_pba_string(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size);
sys/dev/ixgbe/ixgbe_api.h
71
s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
sys/dev/ixgbe/ixgbe_api.h
73
s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
sys/dev/ixgbe/ixgbe_api.h
96
s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index);
sys/dev/ixgbe/ixgbe_api.h
97
s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index);
sys/dev/ixgbe/ixgbe_api.h
98
s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index);
sys/dev/ixgbe/ixgbe_api.h
99
s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index);
sys/dev/ixgbe/ixgbe_common.c
1089
u32 reg;
sys/dev/ixgbe/ixgbe_common.c
1122
u32 reg_val;
sys/dev/ixgbe/ixgbe_common.c
1175
u32 led_reg, led_mode;
sys/dev/ixgbe/ixgbe_common.c
1211
s32 ixgbe_led_on_generic(struct ixgbe_hw *hw, u32 index)
sys/dev/ixgbe/ixgbe_common.c
1213
u32 led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
sys/dev/ixgbe/ixgbe_common.c
1234
s32 ixgbe_led_off_generic(struct ixgbe_hw *hw, u32 index)
sys/dev/ixgbe/ixgbe_common.c
1236
u32 led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
sys/dev/ixgbe/ixgbe_common.c
1262
u32 eec;
sys/dev/ixgbe/ixgbe_common.c
1619
u32 eerd;
sys/dev/ixgbe/ixgbe_common.c
1621
u32 i;
sys/dev/ixgbe/ixgbe_common.c
1727
u32 eewr;
sys/dev/ixgbe/ixgbe_common.c
1792
s32 ixgbe_poll_eerd_eewr_done(struct ixgbe_hw *hw, u32 ee_reg)
sys/dev/ixgbe/ixgbe_common.c
1794
u32 i;
sys/dev/ixgbe/ixgbe_common.c
1795
u32 reg;
sys/dev/ixgbe/ixgbe_common.c
1830
u32 eec;
sys/dev/ixgbe/ixgbe_common.c
1831
u32 i;
sys/dev/ixgbe/ixgbe_common.c
1884
u32 timeout = 2000;
sys/dev/ixgbe/ixgbe_common.c
1885
u32 i;
sys/dev/ixgbe/ixgbe_common.c
1886
u32 swsm;
sys/dev/ixgbe/ixgbe_common.c
1973
u32 swsm;
sys/dev/ixgbe/ixgbe_common.c
2032
u32 eec;
sys/dev/ixgbe/ixgbe_common.c
2058
u32 eec;
sys/dev/ixgbe/ixgbe_common.c
2059
u32 mask;
sys/dev/ixgbe/ixgbe_common.c
2060
u32 i;
sys/dev/ixgbe/ixgbe_common.c
2113
u32 eec;
sys/dev/ixgbe/ixgbe_common.c
2114
u32 i;
sys/dev/ixgbe/ixgbe_common.c
2151
static void ixgbe_raise_eeprom_clk(struct ixgbe_hw *hw, u32 *eec)
sys/dev/ixgbe/ixgbe_common.c
2170
static void ixgbe_lower_eeprom_clk(struct ixgbe_hw *hw, u32 *eec)
sys/dev/ixgbe/ixgbe_common.c
2190
u32 eec;
sys/dev/ixgbe/ixgbe_common.c
2393
s32 ixgbe_set_rar_generic(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
sys/dev/ixgbe/ixgbe_common.c
2394
u32 enable_addr)
sys/dev/ixgbe/ixgbe_common.c
2396
u32 rar_low, rar_high;
sys/dev/ixgbe/ixgbe_common.c
2397
u32 rar_entries = hw->mac.num_rar_entries;
sys/dev/ixgbe/ixgbe_common.c
2415
rar_low = ((u32)addr[0] |
sys/dev/ixgbe/ixgbe_common.c
2416
((u32)addr[1] << 8) |
sys/dev/ixgbe/ixgbe_common.c
2417
((u32)addr[2] << 16) |
sys/dev/ixgbe/ixgbe_common.c
2418
((u32)addr[3] << 24));
sys/dev/ixgbe/ixgbe_common.c
242
u32 reg = 0, reg_bp = 0;
sys/dev/ixgbe/ixgbe_common.c
2426
rar_high |= ((u32)addr[4] | ((u32)addr[5] << 8));
sys/dev/ixgbe/ixgbe_common.c
2444
s32 ixgbe_clear_rar_generic(struct ixgbe_hw *hw, u32 index)
sys/dev/ixgbe/ixgbe_common.c
2446
u32 rar_high;
sys/dev/ixgbe/ixgbe_common.c
2447
u32 rar_entries = hw->mac.num_rar_entries;
sys/dev/ixgbe/ixgbe_common.c
2485
u32 i;
sys/dev/ixgbe/ixgbe_common.c
2486
u32 rar_entries = hw->mac.num_rar_entries;
sys/dev/ixgbe/ixgbe_common.c
2552
void ixgbe_add_uc_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq)
sys/dev/ixgbe/ixgbe_common.c
2554
u32 rar_entries = hw->mac.num_rar_entries;
sys/dev/ixgbe/ixgbe_common.c
2555
u32 rar;
sys/dev/ixgbe/ixgbe_common.c
2593
u32 addr_count, ixgbe_mc_addr_itr next)
sys/dev/ixgbe/ixgbe_common.c
2596
u32 i;
sys/dev/ixgbe/ixgbe_common.c
2597
u32 old_promisc_setting = hw->addr_ctrl.overflow_promisc;
sys/dev/ixgbe/ixgbe_common.c
2598
u32 uc_addr_in_use;
sys/dev/ixgbe/ixgbe_common.c
2599
u32 fctrl;
sys/dev/ixgbe/ixgbe_common.c
2600
u32 vmdq;
sys/dev/ixgbe/ixgbe_common.c
2662
u32 vector = 0;
sys/dev/ixgbe/ixgbe_common.c
2699
u32 vector;
sys/dev/ixgbe/ixgbe_common.c
2700
u32 vector_bit;
sys/dev/ixgbe/ixgbe_common.c
2701
u32 vector_reg;
sys/dev/ixgbe/ixgbe_common.c
2736
u32 mc_addr_count, ixgbe_mc_addr_itr next,
sys/dev/ixgbe/ixgbe_common.c
2739
u32 i;
sys/dev/ixgbe/ixgbe_common.c
2740
u32 vmdq;
sys/dev/ixgbe/ixgbe_common.c
2822
u32 mflcn_reg, fccfg_reg;
sys/dev/ixgbe/ixgbe_common.c
2823
u32 reg;
sys/dev/ixgbe/ixgbe_common.c
2824
u32 fcrtl, fcrth;
sys/dev/ixgbe/ixgbe_common.c
2959
s32 ixgbe_negotiate_fc(struct ixgbe_hw *hw, u32 adv_reg, u32 lp_reg,
sys/dev/ixgbe/ixgbe_common.c
2960
u32 adv_sym, u32 adv_asm, u32 lp_sym, u32 lp_asm)
sys/dev/ixgbe/ixgbe_common.c
3008
u32 pcs_anadv_reg, pcs_lpab_reg, linkstat;
sys/dev/ixgbe/ixgbe_common.c
3045
u32 links2, anlp1_reg, autoc_reg, links;
sys/dev/ixgbe/ixgbe_common.c
3099
return ixgbe_negotiate_fc(hw, (u32)technology_ability_reg,
sys/dev/ixgbe/ixgbe_common.c
3100
(u32)lp_technology_ability_reg,
sys/dev/ixgbe/ixgbe_common.c
3182
static u32 ixgbe_pcie_timeout_poll(struct ixgbe_hw *hw)
sys/dev/ixgbe/ixgbe_common.c
3185
u32 pollcnt;
sys/dev/ixgbe/ixgbe_common.c
3231
u32 i, poll;
sys/dev/ixgbe/ixgbe_common.c
3295
s32 ixgbe_acquire_swfw_sync(struct ixgbe_hw *hw, u32 mask)
sys/dev/ixgbe/ixgbe_common.c
3297
u32 gssr = 0;
sys/dev/ixgbe/ixgbe_common.c
3298
u32 swmask = mask;
sys/dev/ixgbe/ixgbe_common.c
3299
u32 fwmask = mask << 5;
sys/dev/ixgbe/ixgbe_common.c
3300
u32 timeout = 200;
sys/dev/ixgbe/ixgbe_common.c
3301
u32 i;
sys/dev/ixgbe/ixgbe_common.c
3342
void ixgbe_release_swfw_sync(struct ixgbe_hw *hw, u32 mask)
sys/dev/ixgbe/ixgbe_common.c
3344
u32 gssr;
sys/dev/ixgbe/ixgbe_common.c
3345
u32 swmask = mask;
sys/dev/ixgbe/ixgbe_common.c
3402
s32 prot_autoc_read_generic(struct ixgbe_hw *hw, bool *locked, u32 *reg_val)
sys/dev/ixgbe/ixgbe_common.c
3418
s32 prot_autoc_write_generic(struct ixgbe_hw *hw, u32 reg_val, bool locked)
sys/dev/ixgbe/ixgbe_common.c
3434
u32 secrxreg;
sys/dev/ixgbe/ixgbe_common.c
3453
s32 ixgbe_enable_rx_dma_generic(struct ixgbe_hw *hw, u32 regval)
sys/dev/ixgbe/ixgbe_common.c
3470
s32 ixgbe_blink_led_start_generic(struct ixgbe_hw *hw, u32 index)
sys/dev/ixgbe/ixgbe_common.c
3474
u32 autoc_reg = 0;
sys/dev/ixgbe/ixgbe_common.c
3475
u32 led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
sys/dev/ixgbe/ixgbe_common.c
3520
s32 ixgbe_blink_led_stop_generic(struct ixgbe_hw *hw, u32 index)
sys/dev/ixgbe/ixgbe_common.c
3522
u32 autoc_reg = 0;
sys/dev/ixgbe/ixgbe_common.c
3523
u32 led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
sys/dev/ixgbe/ixgbe_common.c
3734
s32 ixgbe_insert_mac_addr_generic(struct ixgbe_hw *hw, u8 *addr, u32 vmdq)
sys/dev/ixgbe/ixgbe_common.c
3736
static const u32 NO_EMPTY_RAR_FOUND = 0xFFFFFFFF;
sys/dev/ixgbe/ixgbe_common.c
3737
u32 first_empty_rar = NO_EMPTY_RAR_FOUND;
sys/dev/ixgbe/ixgbe_common.c
3738
u32 rar;
sys/dev/ixgbe/ixgbe_common.c
3739
u32 rar_low, rar_high;
sys/dev/ixgbe/ixgbe_common.c
3740
u32 addr_low, addr_high;
sys/dev/ixgbe/ixgbe_common.c
3800
s32 ixgbe_clear_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
sys/dev/ixgbe/ixgbe_common.c
3802
u32 mpsar_lo, mpsar_hi;
sys/dev/ixgbe/ixgbe_common.c
3803
u32 rar_entries = hw->mac.num_rar_entries;
sys/dev/ixgbe/ixgbe_common.c
3854
s32 ixgbe_set_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
sys/dev/ixgbe/ixgbe_common.c
3856
u32 mpsar;
sys/dev/ixgbe/ixgbe_common.c
3857
u32 rar_entries = hw->mac.num_rar_entries;
sys/dev/ixgbe/ixgbe_common.c
3891
s32 ixgbe_set_vmdq_san_mac_generic(struct ixgbe_hw *hw, u32 vmdq)
sys/dev/ixgbe/ixgbe_common.c
3893
u32 rar = hw->mac.san_mac_rar_index;
sys/dev/ixgbe/ixgbe_common.c
3936
s32 ixgbe_find_vlvf_slot(struct ixgbe_hw *hw, u32 vlan, bool vlvf_bypass)
sys/dev/ixgbe/ixgbe_common.c
3939
u32 bits;
sys/dev/ixgbe/ixgbe_common.c
3986
s32 ixgbe_set_vfta_generic(struct ixgbe_hw *hw, u32 vlan, u32 vind,
sys/dev/ixgbe/ixgbe_common.c
3989
u32 regidx, vfta_delta, vfta;
sys/dev/ixgbe/ixgbe_common.c
402
u32 ctrl_ext;
sys/dev/ixgbe/ixgbe_common.c
4053
s32 ixgbe_set_vlvf_generic(struct ixgbe_hw *hw, u32 vlan, u32 vind,
sys/dev/ixgbe/ixgbe_common.c
4054
bool vlan_on, u32 *vfta_delta, u32 vfta,
sys/dev/ixgbe/ixgbe_common.c
4057
u32 bits;
sys/dev/ixgbe/ixgbe_common.c
4137
u32 offset;
sys/dev/ixgbe/ixgbe_common.c
4160
s32 ixgbe_toggle_txdctl_generic(struct ixgbe_hw *hw, u32 vf_number)
sys/dev/ixgbe/ixgbe_common.c
4163
u32 offset, reg;
sys/dev/ixgbe/ixgbe_common.c
4246
u32 links_reg, links_orig;
sys/dev/ixgbe/ixgbe_common.c
4247
u32 i;
sys/dev/ixgbe/ixgbe_common.c
4255
u32 sfp_cage_full;
sys/dev/ixgbe/ixgbe_common.c
4473
u32 pfvfspoof;
sys/dev/ixgbe/ixgbe_common.c
4497
u32 pfvfspoof;
sys/dev/ixgbe/ixgbe_common.c
4534
u32 regval;
sys/dev/ixgbe/ixgbe_common.c
4535
u32 i;
sys/dev/ixgbe/ixgbe_common.c
4562
u8 ixgbe_calculate_checksum(u8 *buffer, u32 length)
sys/dev/ixgbe/ixgbe_common.c
4564
u32 i;
sys/dev/ixgbe/ixgbe_common.c
4592
s32 ixgbe_hic_unlocked(struct ixgbe_hw *hw, u32 *buffer, u32 length,
sys/dev/ixgbe/ixgbe_common.c
4593
u32 timeout)
sys/dev/ixgbe/ixgbe_common.c
4595
u32 hicr, i, fwsts;
sys/dev/ixgbe/ixgbe_common.c
4617
if (length % sizeof(u32)) {
sys/dev/ixgbe/ixgbe_common.c
465
u32 i;
sys/dev/ixgbe/ixgbe_common.c
466
u32 regval;
sys/dev/ixgbe/ixgbe_common.c
4677
s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer,
sys/dev/ixgbe/ixgbe_common.c
4678
u32 length, u32 timeout, bool return_data)
sys/dev/ixgbe/ixgbe_common.c
4680
u32 hdr_size = sizeof(struct ixgbe_hic_hdr);
sys/dev/ixgbe/ixgbe_common.c
4684
u32 bi;
sys/dev/ixgbe/ixgbe_common.c
4685
u32 dword_len;
sys/dev/ixgbe/ixgbe_common.c
4798
ret_val = ixgbe_host_interface_command(hw, (u32 *)&fw_cmd,
sys/dev/ixgbe/ixgbe_common.c
4824
void ixgbe_set_rxpba_generic(struct ixgbe_hw *hw, int num_pb, u32 headroom,
sys/dev/ixgbe/ixgbe_common.c
4827
u32 pbsize = hw->mac.rx_pb_size;
sys/dev/ixgbe/ixgbe_common.c
4829
u32 rxpktsize, txpktsize, txpbthresh;
sys/dev/ixgbe/ixgbe_common.c
4889
u32 gcr_ext, hlreg0, i, poll;
sys/dev/ixgbe/ixgbe_common.c
49
static void ixgbe_raise_eeprom_clk(struct ixgbe_hw *hw, u32 *eec);
sys/dev/ixgbe/ixgbe_common.c
50
static void ixgbe_lower_eeprom_clk(struct ixgbe_hw *hw, u32 *eec);
sys/dev/ixgbe/ixgbe_common.c
5118
s32 ixgbe_bypass_rw_generic(struct ixgbe_hw *hw, u32 cmd, u32 *status)
sys/dev/ixgbe/ixgbe_common.c
5121
u32 sck, sdi, sdo, dir_sck, dir_sdi, dir_sdo;
sys/dev/ixgbe/ixgbe_common.c
5122
u32 esdp;
sys/dev/ixgbe/ixgbe_common.c
5231
bool ixgbe_bypass_valid_rd_generic(u32 in_reg, u32 out_reg)
sys/dev/ixgbe/ixgbe_common.c
5233
u32 mask;
sys/dev/ixgbe/ixgbe_common.c
5287
s32 ixgbe_bypass_set_generic(struct ixgbe_hw *hw, u32 ctrl, u32 event,
sys/dev/ixgbe/ixgbe_common.c
5288
u32 action)
sys/dev/ixgbe/ixgbe_common.c
5290
u32 by_ctl = 0;
sys/dev/ixgbe/ixgbe_common.c
5291
u32 cmd, verify;
sys/dev/ixgbe/ixgbe_common.c
5292
u32 count = 0;
sys/dev/ixgbe/ixgbe_common.c
5329
s32 ixgbe_bypass_rd_eep_generic(struct ixgbe_hw *hw, u32 addr, u8 *value)
sys/dev/ixgbe/ixgbe_common.c
5331
u32 cmd;
sys/dev/ixgbe/ixgbe_common.c
5332
u32 status;
sys/dev/ixgbe/ixgbe_common.c
5574
u32 reg, i;
sys/dev/ixgbe/ixgbe_common.c
5585
u32 pfdtxgswc;
sys/dev/ixgbe/ixgbe_common.c
5586
u32 rxctrl;
sys/dev/ixgbe/ixgbe_common.c
5607
u32 pfdtxgswc;
sys/dev/ixgbe/ixgbe_common.c
5608
u32 rxctrl;
sys/dev/ixgbe/ixgbe_common.c
5629
u32 fwsm;
sys/dev/ixgbe/ixgbe_common.c
5647
u32 fwsm, manc, factps;
sys/dev/ixgbe/ixgbe_common.c
5681
u32 speedcnt = 0;
sys/dev/ixgbe/ixgbe_common.c
5682
u32 i = 0;
sys/dev/ixgbe/ixgbe_common.c
648
u32 pba_num_size)
sys/dev/ixgbe/ixgbe_common.c
727
if (pba_num_size < (((u32)length * 2) - 1)) {
sys/dev/ixgbe/ixgbe_common.c
73
u32 eec = IXGBE_READ_REG(hw, IXGBE_EEC_BY_MAC(hw));
sys/dev/ixgbe/ixgbe_common.c
757
s32 ixgbe_read_pba_num_generic(struct ixgbe_hw *hw, u32 *pba_num)
sys/dev/ixgbe/ixgbe_common.c
772
*pba_num = (u32)(data << 16);
sys/dev/ixgbe/ixgbe_common.c
779
*pba_num |= (u32)data;
sys/dev/ixgbe/ixgbe_common.c
797
u32 eeprom_buf_size, u16 max_pba_block_size,
sys/dev/ixgbe/ixgbe_common.c
840
if (eeprom_buf_size > (u32)(pba->word[1] +
sys/dev/ixgbe/ixgbe_common.c
866
u32 eeprom_buf_size, struct ixgbe_pba *pba)
sys/dev/ixgbe/ixgbe_common.c
898
if (eeprom_buf_size > (u32)(pba->word[1] +
sys/dev/ixgbe/ixgbe_common.c
925
u32 eeprom_buf_size, u16 *pba_block_size)
sys/dev/ixgbe/ixgbe_common.c
984
u32 rar_high;
sys/dev/ixgbe/ixgbe_common.c
985
u32 rar_low;
sys/dev/ixgbe/ixgbe_common.h
100
s32 ixgbe_clear_rar_generic(struct ixgbe_hw *hw, u32 index);
sys/dev/ixgbe/ixgbe_common.h
103
u32 mc_addr_count,
sys/dev/ixgbe/ixgbe_common.h
106
u32 addr_count, ixgbe_mc_addr_itr func);
sys/dev/ixgbe/ixgbe_common.h
109
s32 ixgbe_enable_rx_dma_generic(struct ixgbe_hw *hw, u32 regval);
sys/dev/ixgbe/ixgbe_common.h
119
s32 ixgbe_acquire_swfw_sync(struct ixgbe_hw *hw, u32 mask);
sys/dev/ixgbe/ixgbe_common.h
120
void ixgbe_release_swfw_sync(struct ixgbe_hw *hw, u32 mask);
sys/dev/ixgbe/ixgbe_common.h
123
s32 prot_autoc_read_generic(struct ixgbe_hw *hw, bool *, u32 *reg_val);
sys/dev/ixgbe/ixgbe_common.h
124
s32 prot_autoc_write_generic(struct ixgbe_hw *hw, u32 reg_val, bool locked);
sys/dev/ixgbe/ixgbe_common.h
126
s32 ixgbe_blink_led_start_generic(struct ixgbe_hw *hw, u32 index);
sys/dev/ixgbe/ixgbe_common.h
127
s32 ixgbe_blink_led_stop_generic(struct ixgbe_hw *hw, u32 index);
sys/dev/ixgbe/ixgbe_common.h
132
s32 ixgbe_set_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
sys/dev/ixgbe/ixgbe_common.h
133
s32 ixgbe_set_vmdq_san_mac_generic(struct ixgbe_hw *hw, u32 vmdq);
sys/dev/ixgbe/ixgbe_common.h
134
s32 ixgbe_clear_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
sys/dev/ixgbe/ixgbe_common.h
135
s32 ixgbe_insert_mac_addr_generic(struct ixgbe_hw *hw, u8 *addr, u32 vmdq);
sys/dev/ixgbe/ixgbe_common.h
137
s32 ixgbe_set_vfta_generic(struct ixgbe_hw *hw, u32 vlan,
sys/dev/ixgbe/ixgbe_common.h
138
u32 vind, bool vlan_on, bool vlvf_bypass);
sys/dev/ixgbe/ixgbe_common.h
139
s32 ixgbe_set_vlvf_generic(struct ixgbe_hw *hw, u32 vlan, u32 vind,
sys/dev/ixgbe/ixgbe_common.h
140
bool vlan_on, u32 *vfta_delta, u32 vfta,
sys/dev/ixgbe/ixgbe_common.h
143
s32 ixgbe_find_vlvf_slot(struct ixgbe_hw *hw, u32 vlan, bool vlvf_bypass);
sys/dev/ixgbe/ixgbe_common.h
144
s32 ixgbe_toggle_txdctl_generic(struct ixgbe_hw *hw, u32 vind);
sys/dev/ixgbe/ixgbe_common.h
157
void ixgbe_set_rxpba_generic(struct ixgbe_hw *hw, int num_pb, u32 headroom,
sys/dev/ixgbe/ixgbe_common.h
162
u8 ixgbe_calculate_checksum(u8 *buffer, u32 length);
sys/dev/ixgbe/ixgbe_common.h
163
s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer,
sys/dev/ixgbe/ixgbe_common.h
164
u32 length, u32 timeout, bool return_data);
sys/dev/ixgbe/ixgbe_common.h
165
s32 ixgbe_hic_unlocked(struct ixgbe_hw *, u32 *buffer, u32 length, u32 timeout);
sys/dev/ixgbe/ixgbe_common.h
168
u32 (*data)[FW_PHY_ACT_DATA_COUNT]);
sys/dev/ixgbe/ixgbe_common.h
170
s32 ixgbe_bypass_rw_generic(struct ixgbe_hw *hw, u32 cmd, u32 *status);
sys/dev/ixgbe/ixgbe_common.h
171
bool ixgbe_bypass_valid_rd_generic(u32 in_reg, u32 out_reg);
sys/dev/ixgbe/ixgbe_common.h
172
s32 ixgbe_bypass_set_generic(struct ixgbe_hw *hw, u32 ctrl, u32 event,
sys/dev/ixgbe/ixgbe_common.h
173
u32 action);
sys/dev/ixgbe/ixgbe_common.h
174
s32 ixgbe_bypass_rd_eep_generic(struct ixgbe_hw *hw, u32 addr, u8 *value);
sys/dev/ixgbe/ixgbe_common.h
41
IXGBE_WRITE_REG(hw, reg, (u32) value); \
sys/dev/ixgbe/ixgbe_common.h
42
IXGBE_WRITE_REG(hw, reg + 4, (u32) (value >> 32)); \
sys/dev/ixgbe/ixgbe_common.h
58
s32 ixgbe_read_pba_num_generic(struct ixgbe_hw *hw, u32 *pba_num);
sys/dev/ixgbe/ixgbe_common.h
60
u32 pba_num_size);
sys/dev/ixgbe/ixgbe_common.h
62
u32 eeprom_buf_size, u16 max_pba_block_size,
sys/dev/ixgbe/ixgbe_common.h
65
u32 eeprom_buf_size, struct ixgbe_pba *pba);
sys/dev/ixgbe/ixgbe_common.h
67
u32 eeprom_buf_size, u16 *pba_block_size);
sys/dev/ixgbe/ixgbe_common.h
74
s32 ixgbe_led_on_generic(struct ixgbe_hw *hw, u32 index);
sys/dev/ixgbe/ixgbe_common.h
75
s32 ixgbe_led_off_generic(struct ixgbe_hw *hw, u32 index);
sys/dev/ixgbe/ixgbe_common.h
96
s32 ixgbe_poll_eerd_eewr_done(struct ixgbe_hw *hw, u32 ee_reg);
sys/dev/ixgbe/ixgbe_common.h
98
s32 ixgbe_set_rar_generic(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
sys/dev/ixgbe/ixgbe_common.h
99
u32 enable_addr);
sys/dev/ixgbe/ixgbe_dcb.c
103
u32 min_credit = 0;
sys/dev/ixgbe/ixgbe_dcb.c
104
u32 credit_refill = 0;
sys/dev/ixgbe/ixgbe_dcb.c
105
u32 credit_max = 0;
sys/dev/ixgbe/ixgbe_dcb.c
156
(u32)IXGBE_DCB_MAX_CREDIT_REFILL);
sys/dev/ixgbe/ixgbe_dcb.c
96
u32 max_frame_size, u8 direction)
sys/dev/ixgbe/ixgbe_dcb.c
99
u32 min_multiplier = 0;
sys/dev/ixgbe/ixgbe_dcb.h
131
u32 dcb_cfg_version; /* Not used...OS-specific? */
sys/dev/ixgbe/ixgbe_dcb.h
132
u32 link_speed; /* For bandwidth allocation validation purpose */
sys/dev/ixgbe/ixgbe_dcb.h
144
struct ixgbe_dcb_config *, u32, u8);
sys/dev/ixgbe/ixgbe_dcb.h
67
u32 capabilities; /* DCB capabilities */
sys/dev/ixgbe/ixgbe_dcb_82598.c
115
u32 reg = 0;
sys/dev/ixgbe/ixgbe_dcb_82598.c
116
u32 credit_refill = 0;
sys/dev/ixgbe/ixgbe_dcb_82598.c
117
u32 credit_max = 0;
sys/dev/ixgbe/ixgbe_dcb_82598.c
174
u32 reg, max_credits;
sys/dev/ixgbe/ixgbe_dcb_82598.c
192
reg |= (u32)(refill[i]);
sys/dev/ixgbe/ixgbe_dcb_82598.c
193
reg |= (u32)(bwg_id[i]) << IXGBE_TDTQ2TCCR_BWG_SHIFT;
sys/dev/ixgbe/ixgbe_dcb_82598.c
221
u32 reg;
sys/dev/ixgbe/ixgbe_dcb_82598.c
235
reg |= (u32)(max[i]) << IXGBE_TDPT2TCCR_MCL_SHIFT;
sys/dev/ixgbe/ixgbe_dcb_82598.c
236
reg |= (u32)(bwg_id[i]) << IXGBE_TDPT2TCCR_BWG_SHIFT;
sys/dev/ixgbe/ixgbe_dcb_82598.c
264
u32 fcrtl, reg;
sys/dev/ixgbe/ixgbe_dcb_82598.c
316
u32 reg = 0;
sys/dev/ixgbe/ixgbe_dcb_82599.c
125
u32 reg = 0;
sys/dev/ixgbe/ixgbe_dcb_82599.c
126
u32 credit_refill = 0;
sys/dev/ixgbe/ixgbe_dcb_82599.c
127
u32 credit_max = 0;
sys/dev/ixgbe/ixgbe_dcb_82599.c
155
reg |= (u32)(bwg_id[i]) << IXGBE_RTRPT4C_BWG_SHIFT;
sys/dev/ixgbe/ixgbe_dcb_82599.c
186
u32 reg, max_credits;
sys/dev/ixgbe/ixgbe_dcb_82599.c
199
reg |= (u32)(refill[i]);
sys/dev/ixgbe/ixgbe_dcb_82599.c
200
reg |= (u32)(bwg_id[i]) << IXGBE_RTTDT2C_BWG_SHIFT;
sys/dev/ixgbe/ixgbe_dcb_82599.c
236
u32 reg;
sys/dev/ixgbe/ixgbe_dcb_82599.c
263
reg |= (u32)(max[i]) << IXGBE_RTTPT2C_MCL_SHIFT;
sys/dev/ixgbe/ixgbe_dcb_82599.c
264
reg |= (u32)(bwg_id[i]) << IXGBE_RTTPT2C_BWG_SHIFT;
sys/dev/ixgbe/ixgbe_dcb_82599.c
296
u32 i, j, fcrtl, reg;
sys/dev/ixgbe/ixgbe_dcb_82599.c
384
u32 reg = 0;
sys/dev/ixgbe/ixgbe_dcb_82599.c
510
u32 reg;
sys/dev/ixgbe/ixgbe_dcb_82599.c
511
u32 q;
sys/dev/ixgbe/ixgbe_e610.c
1040
void *buf, u32 cap_count)
sys/dev/ixgbe/ixgbe_e610.c
1043
u32 i;
sys/dev/ixgbe/ixgbe_e610.c
1091
u32 *cap_count, enum ixgbe_aci_opc opc)
sys/dev/ixgbe/ixgbe_e610.c
1125
u32 status, cap_count = 0;
sys/dev/ixgbe/ixgbe_e610.c
113
u32 hicr = 0, tmp_buf_size = 0, i = 0;
sys/dev/ixgbe/ixgbe_e610.c
114
u32 *raw_desc = (u32 *)desc;
sys/dev/ixgbe/ixgbe_e610.c
1163
u32 cap_count = 0;
sys/dev/ixgbe/ixgbe_e610.c
117
u32 *tmp_buf = NULL;
sys/dev/ixgbe/ixgbe_e610.c
161
tmp_buf = (u32*)ixgbe_malloc(hw, tmp_buf_size);
sys/dev/ixgbe/ixgbe_e610.c
2046
u32 start_address, u8 *data, u8 data_size)
sys/dev/ixgbe/ixgbe_e610.c
2085
u32 fla;
sys/dev/ixgbe/ixgbe_e610.c
2104
u32 fla;
sys/dev/ixgbe/ixgbe_e610.c
2129
s32 ixgbe_aci_read_nvm(struct ixgbe_hw *hw, u16 module_typeid, u32 offset,
sys/dev/ixgbe/ixgbe_e610.c
2208
u32 offset, u16 length, void *data,
sys/dev/ixgbe/ixgbe_e610.c
2429
static u32 ixgbe_get_flash_bank_offset(struct ixgbe_hw *hw,
sys/dev/ixgbe/ixgbe_e610.c
2436
u32 offset, size;
sys/dev/ixgbe/ixgbe_e610.c
2504
u16 module, u32 offset, u8 *data, u32 length)
sys/dev/ixgbe/ixgbe_e610.c
2507
u32 start;
sys/dev/ixgbe/ixgbe_e610.c
2538
u32 offset, u16 *data)
sys/dev/ixgbe/ixgbe_e610.c
2567
u32 offset, u16 *data)
sys/dev/ixgbe/ixgbe_e610.c
2596
u32 *hdr_len)
sys/dev/ixgbe/ixgbe_e610.c
2599
u32 hdr_len_dword;
sys/dev/ixgbe/ixgbe_e610.c
2635
u32 offset, u16 *data)
sys/dev/ixgbe/ixgbe_e610.c
2637
u32 hdr_len;
sys/dev/ixgbe/ixgbe_e610.c
2777
enum ixgbe_bank_select bank, u32 *srev)
sys/dev/ixgbe/ixgbe_e610.c
2986
static s32 ixgbe_read_sr_pointer(struct ixgbe_hw *hw, u16 offset, u32 *pointer)
sys/dev/ixgbe/ixgbe_e610.c
3019
static s32 ixgbe_read_sr_area_size(struct ixgbe_hw *hw, u16 offset, u32 *size)
sys/dev/ixgbe/ixgbe_e610.c
3046
u32 min_size = 0, max_size = IXGBE_ACI_NVM_MAX_OFFSET + 1;
sys/dev/ixgbe/ixgbe_e610.c
3054
u32 offset = (max_size + min_size) / 2;
sys/dev/ixgbe/ixgbe_e610.c
3055
u32 len = 1;
sys/dev/ixgbe/ixgbe_e610.c
3174
u32 fla, gens_stat, status;
sys/dev/ixgbe/ixgbe_e610.c
3288
u32 bytes = sizeof(u16);
sys/dev/ixgbe/ixgbe_e610.c
3316
u32 bytes = *words * 2, i;
sys/dev/ixgbe/ixgbe_e610.c
3347
s32 ixgbe_read_flat_nvm(struct ixgbe_hw *hw, u32 offset, u32 *length,
sys/dev/ixgbe/ixgbe_e610.c
3350
u32 inlen = *length;
sys/dev/ixgbe/ixgbe_e610.c
3351
u32 bytes_read = 0;
sys/dev/ixgbe/ixgbe_e610.c
3364
u32 read_size, sector_offset;
sys/dev/ixgbe/ixgbe_e610.c
3371
read_size = MIN_T(u32,
sys/dev/ixgbe/ixgbe_e610.c
3411
static s32 ixgbe_check_sr_access_params(struct ixgbe_hw *hw, u32 offset,
sys/dev/ixgbe/ixgbe_e610.c
3446
s32 ixgbe_write_sr_word_aci(struct ixgbe_hw *hw, u32 offset, const u16 *data)
sys/dev/ixgbe/ixgbe_e610.c
3473
s32 ixgbe_write_sr_buf_aci(struct ixgbe_hw *hw, u32 offset, u16 words,
sys/dev/ixgbe/ixgbe_e610.c
3479
u32 i;
sys/dev/ixgbe/ixgbe_e610.c
3516
s32 ixgbe_aci_alternate_write(struct ixgbe_hw *hw, u32 reg_addr0,
sys/dev/ixgbe/ixgbe_e610.c
3517
u32 reg_val0, u32 reg_addr1, u32 reg_val1)
sys/dev/ixgbe/ixgbe_e610.c
352
u32 ep_bit_mask;
sys/dev/ixgbe/ixgbe_e610.c
353
u32 fwsts;
sys/dev/ixgbe/ixgbe_e610.c
3551
s32 ixgbe_aci_alternate_read(struct ixgbe_hw *hw, u32 reg_addr0,
sys/dev/ixgbe/ixgbe_e610.c
3552
u32 *reg_val0, u32 reg_addr1, u32 *reg_val1)
sys/dev/ixgbe/ixgbe_e610.c
3653
u16 table_id, u32 start, void *buf,
sys/dev/ixgbe/ixgbe_e610.c
3656
u32 *ret_next_index)
sys/dev/ixgbe/ixgbe_e610.c
3719
if (cmd->offset == (u32)GL_HIDA(i))
sys/dev/ixgbe/ixgbe_e610.c
3723
if (cmd->offset == (u32)GL_HIBA(i))
sys/dev/ixgbe/ixgbe_e610.c
4428
u32 swfw_mask = hw->phy.phy_semaphore_mask;
sys/dev/ixgbe/ixgbe_e610.c
4429
u32 ctrl, i;
sys/dev/ixgbe/ixgbe_e610.c
4684
u32 i;
sys/dev/ixgbe/ixgbe_e610.c
4968
u32 rxctrl;
sys/dev/ixgbe/ixgbe_e610.c
4974
u32 pfdtxgswc;
sys/dev/ixgbe/ixgbe_e610.c
5058
u32 fwsm = IXGBE_READ_REG(hw, GL_MNG_FWSM);
sys/dev/ixgbe/ixgbe_e610.c
5074
u32 fwsm = IXGBE_READ_REG(hw, GL_MNG_FWSM);
sys/dev/ixgbe/ixgbe_e610.c
5090
u32 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM_X550EM_a);
sys/dev/ixgbe/ixgbe_e610.c
5229
memcpy(&hw->phy.id, pcaps.phy_id_oui, sizeof(u32));
sys/dev/ixgbe/ixgbe_e610.c
528
u32 *timeout)
sys/dev/ixgbe/ixgbe_e610.c
5591
u32 gens_stat;
sys/dev/ixgbe/ixgbe_e610.c
5706
status = ixgbe_write_sr_word_aci(hw, (u32)offset, &data);
sys/dev/ixgbe/ixgbe_e610.c
5741
status = ixgbe_write_sr_buf_aci(hw, (u32)offset, words, data);
sys/dev/ixgbe/ixgbe_e610.c
5816
if (i >= (u32)vpd_module &&
sys/dev/ixgbe/ixgbe_e610.c
5817
i < ((u32)vpd_module + E610_SR_VPD_SIZE_WORDS))
sys/dev/ixgbe/ixgbe_e610.c
5820
if (i >= (u32)pcie_alt_module &&
sys/dev/ixgbe/ixgbe_e610.c
5821
i < ((u32)pcie_alt_module + E610_SR_PCIE_ALT_SIZE_WORDS))
sys/dev/ixgbe/ixgbe_e610.c
5892
u32 status;
sys/dev/ixgbe/ixgbe_e610.c
5997
u32 pba_num_size)
sys/dev/ixgbe/ixgbe_e610.c
602
enum ixgbe_aci_res_access_type access, u32 timeout)
sys/dev/ixgbe/ixgbe_e610.c
6024
if (pba_num_size < (((u32)pba_size * 2) + 1)) {
sys/dev/ixgbe/ixgbe_e610.c
605
u32 delay = IXGBE_RES_POLLING_DELAY_MS;
sys/dev/ixgbe/ixgbe_e610.c
606
u32 res_timeout = timeout;
sys/dev/ixgbe/ixgbe_e610.c
607
u32 retry_timeout = 0;
sys/dev/ixgbe/ixgbe_e610.c
655
u32 total_delay = 0;
sys/dev/ixgbe/ixgbe_e610.c
689
u32 logical_id = IXGBE_LE32_TO_CPU(elem->logical_id);
sys/dev/ixgbe/ixgbe_e610.c
690
u32 phys_id = IXGBE_LE32_TO_CPU(elem->phys_id);
sys/dev/ixgbe/ixgbe_e610.c
691
u32 number = IXGBE_LE32_TO_CPU(elem->number);
sys/dev/ixgbe/ixgbe_e610.c
797
static u8 ixgbe_hweight8(u32 w)
sys/dev/ixgbe/ixgbe_e610.c
815
static u8 ixgbe_hweight32(u32 w)
sys/dev/ixgbe/ixgbe_e610.c
817
u32 bitMask = 0x1, i;
sys/dev/ixgbe/ixgbe_e610.c
844
u32 number = IXGBE_LE32_TO_CPU(cap->number);
sys/dev/ixgbe/ixgbe_e610.c
863
u32 number = IXGBE_LE32_TO_CPU(cap->number);
sys/dev/ixgbe/ixgbe_e610.c
882
u32 number = IXGBE_LE32_TO_CPU(cap->number);
sys/dev/ixgbe/ixgbe_e610.c
901
u32 number = IXGBE_LE32_TO_CPU(cap->number);
sys/dev/ixgbe/ixgbe_e610.c
924
void *buf, u32 cap_count)
sys/dev/ixgbe/ixgbe_e610.c
927
u32 i;
sys/dev/ixgbe/ixgbe_e610.c
975
u32 logical_id = IXGBE_LE32_TO_CPU(cap->logical_id);
sys/dev/ixgbe/ixgbe_e610.c
976
u32 number = IXGBE_LE32_TO_CPU(cap->number);
sys/dev/ixgbe/ixgbe_e610.c
995
static u32 ixgbe_get_num_per_func(struct ixgbe_hw *hw, u32 max)
sys/dev/ixgbe/ixgbe_e610.h
105
u32 start_address, u8 *data, u8 data_size);
sys/dev/ixgbe/ixgbe_e610.h
111
s32 ixgbe_aci_read_nvm(struct ixgbe_hw *hw, u16 module_typeid, u32 offset,
sys/dev/ixgbe/ixgbe_e610.h
117
u32 offset, u16 length, void *data,
sys/dev/ixgbe/ixgbe_e610.h
146
s32 ixgbe_read_flat_nvm(struct ixgbe_hw *hw, u32 offset, u32 *length,
sys/dev/ixgbe/ixgbe_e610.h
149
s32 ixgbe_write_sr_word_aci(struct ixgbe_hw *hw, u32 offset, const u16 *data);
sys/dev/ixgbe/ixgbe_e610.h
150
s32 ixgbe_write_sr_buf_aci(struct ixgbe_hw *hw, u32 offset, u16 words, const u16 *data);
sys/dev/ixgbe/ixgbe_e610.h
152
s32 ixgbe_aci_alternate_write(struct ixgbe_hw *hw, u32 reg_addr0,
sys/dev/ixgbe/ixgbe_e610.h
153
u32 reg_val0, u32 reg_addr1, u32 reg_val1);
sys/dev/ixgbe/ixgbe_e610.h
154
s32 ixgbe_aci_alternate_read(struct ixgbe_hw *hw, u32 reg_addr0,
sys/dev/ixgbe/ixgbe_e610.h
155
u32 *reg_val0, u32 reg_addr1, u32 *reg_val1);
sys/dev/ixgbe/ixgbe_e610.h
161
u16 table_id, u32 start, void *buf,
sys/dev/ixgbe/ixgbe_e610.h
164
u32 *ret_next_index);
sys/dev/ixgbe/ixgbe_e610.h
235
s32 ixgbe_read_pba_string_E610(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size);
sys/dev/ixgbe/ixgbe_e610.h
55
enum ixgbe_aci_res_access_type access, u32 timeout);
sys/dev/ixgbe/ixgbe_e610.h
58
u32 *cap_count, enum ixgbe_aci_opc opc);
sys/dev/ixgbe/ixgbe_features.h
45
#define IXGBE_FEATURE_VF (u32)(1 << 0)
sys/dev/ixgbe/ixgbe_features.h
46
#define IXGBE_FEATURE_SRIOV (u32)(1 << 1)
sys/dev/ixgbe/ixgbe_features.h
47
#define IXGBE_FEATURE_RSS (u32)(1 << 2)
sys/dev/ixgbe/ixgbe_features.h
48
#define IXGBE_FEATURE_NETMAP (u32)(1 << 3)
sys/dev/ixgbe/ixgbe_features.h
49
#define IXGBE_FEATURE_FAN_FAIL (u32)(1 << 4)
sys/dev/ixgbe/ixgbe_features.h
50
#define IXGBE_FEATURE_TEMP_SENSOR (u32)(1 << 5)
sys/dev/ixgbe/ixgbe_features.h
51
#define IXGBE_FEATURE_BYPASS (u32)(1 << 6)
sys/dev/ixgbe/ixgbe_features.h
52
#define IXGBE_FEATURE_LEGACY_TX (u32)(1 << 7)
sys/dev/ixgbe/ixgbe_features.h
53
#define IXGBE_FEATURE_FDIR (u32)(1 << 8)
sys/dev/ixgbe/ixgbe_features.h
54
#define IXGBE_FEATURE_MSI (u32)(1 << 9)
sys/dev/ixgbe/ixgbe_features.h
55
#define IXGBE_FEATURE_MSIX (u32)(1 << 10)
sys/dev/ixgbe/ixgbe_features.h
56
#define IXGBE_FEATURE_EEE (u32)(1 << 11)
sys/dev/ixgbe/ixgbe_features.h
57
#define IXGBE_FEATURE_LEGACY_IRQ (u32)(1 << 12)
sys/dev/ixgbe/ixgbe_features.h
58
#define IXGBE_FEATURE_NEEDS_CTXD (u32)(1 << 13)
sys/dev/ixgbe/ixgbe_features.h
59
#define IXGBE_FEATURE_RECOVERY_MODE (u32)(1 << 15)
sys/dev/ixgbe/ixgbe_features.h
60
#define IXGBE_FEATURE_DBG_DUMP (u32)(1 << 16)
sys/dev/ixgbe/ixgbe_features.h
61
#define IXGBE_FEATURE_FW_LOGGING (u32)(1 << 17)
sys/dev/ixgbe/ixgbe_mbx.c
1020
static s32 ixgbe_read_mbx_pf_legacy(struct ixgbe_hw *hw, u32 *msg, u16 size,
sys/dev/ixgbe/ixgbe_mbx.c
1057
static s32 ixgbe_read_mbx_pf(struct ixgbe_hw *hw, u32 *msg, u16 size,
sys/dev/ixgbe/ixgbe_mbx.c
1060
u32 pf_mailbox;
sys/dev/ixgbe/ixgbe_mbx.c
119
s32 ixgbe_write_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id)
sys/dev/ixgbe/ixgbe_mbx.c
298
static u32 ixgbe_read_mailbox_vf(struct ixgbe_hw *hw)
sys/dev/ixgbe/ixgbe_mbx.c
300
u32 vf_mailbox = IXGBE_READ_REG(hw, IXGBE_VFMAILBOX);
sys/dev/ixgbe/ixgbe_mbx.c
310
u32 vf_mailbox = ixgbe_read_mailbox_vf(hw);
sys/dev/ixgbe/ixgbe_mbx.c
320
u32 vf_mailbox = ixgbe_read_mailbox_vf(hw);
sys/dev/ixgbe/ixgbe_mbx.c
330
u32 vf_mailbox = ixgbe_read_mailbox_vf(hw);
sys/dev/ixgbe/ixgbe_mbx.c
347
static s32 ixgbe_check_for_bit_vf(struct ixgbe_hw *hw, u32 mask)
sys/dev/ixgbe/ixgbe_mbx.c
349
u32 vf_mailbox = ixgbe_read_mailbox_vf(hw);
sys/dev/ixgbe/ixgbe_mbx.c
429
u32 vf_mailbox;
sys/dev/ixgbe/ixgbe_mbx.c
480
u32 vf_mailbox;
sys/dev/ixgbe/ixgbe_mbx.c
50
s32 ixgbe_read_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id)
sys/dev/ixgbe/ixgbe_mbx.c
501
static s32 ixgbe_write_mbx_vf_legacy(struct ixgbe_hw *hw, u32 *msg, u16 size,
sys/dev/ixgbe/ixgbe_mbx.c
543
static s32 ixgbe_write_mbx_vf(struct ixgbe_hw *hw, u32 *msg, u16 size,
sys/dev/ixgbe/ixgbe_mbx.c
546
u32 vf_mailbox;
sys/dev/ixgbe/ixgbe_mbx.c
593
static s32 ixgbe_read_mbx_vf_legacy(struct ixgbe_hw *hw, u32 *msg, u16 size,
sys/dev/ixgbe/ixgbe_mbx.c
629
static s32 ixgbe_read_mbx_vf(struct ixgbe_hw *hw, u32 *msg, u16 size,
sys/dev/ixgbe/ixgbe_mbx.c
632
u32 vf_mailbox;
sys/dev/ixgbe/ixgbe_mbx.c
726
u32 vf_shift = IXGBE_PFMBICR_SHIFT(vf_id);
sys/dev/ixgbe/ixgbe_mbx.c
728
u32 pfmbicr;
sys/dev/ixgbe/ixgbe_mbx.c
741
u32 vf_shift = IXGBE_PFMBICR_SHIFT(vf_id);
sys/dev/ixgbe/ixgbe_mbx.c
743
u32 pfmbicr;
sys/dev/ixgbe/ixgbe_mbx.c
754
static s32 ixgbe_check_for_bit_pf(struct ixgbe_hw *hw, u32 mask, s32 index)
sys/dev/ixgbe/ixgbe_mbx.c
756
u32 pfmbicr = IXGBE_READ_REG(hw, IXGBE_PFMBICR(index));
sys/dev/ixgbe/ixgbe_mbx.c
774
u32 vf_shift = IXGBE_PFMBICR_SHIFT(vf_id);
sys/dev/ixgbe/ixgbe_mbx.c
79
s32 ixgbe_poll_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id)
sys/dev/ixgbe/ixgbe_mbx.c
795
u32 vf_shift = IXGBE_PFMBICR_SHIFT(vf_id);
sys/dev/ixgbe/ixgbe_mbx.c
820
u32 vf_shift = IXGBE_PFVFLRE_SHIFT(vf_id);
sys/dev/ixgbe/ixgbe_mbx.c
821
u32 index = IXGBE_PFVFLRE_INDEX(vf_id);
sys/dev/ixgbe/ixgbe_mbx.c
823
u32 vflre = 0;
sys/dev/ixgbe/ixgbe_mbx.c
862
u32 pf_mailbox;
sys/dev/ixgbe/ixgbe_mbx.c
908
u32 pf_mailbox;
sys/dev/ixgbe/ixgbe_mbx.c
927
static s32 ixgbe_write_mbx_pf_legacy(struct ixgbe_hw *hw, u32 *msg, u16 size,
sys/dev/ixgbe/ixgbe_mbx.c
968
static s32 ixgbe_write_mbx_pf(struct ixgbe_hw *hw, u32 *msg, u16 size,
sys/dev/ixgbe/ixgbe_mbx.c
971
u32 pf_mailbox;
sys/dev/ixgbe/ixgbe_mbx.h
192
s32 ixgbe_read_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id);
sys/dev/ixgbe/ixgbe_mbx.h
193
s32 ixgbe_poll_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id);
sys/dev/ixgbe/ixgbe_mbx.h
194
s32 ixgbe_write_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id);
sys/dev/ixgbe/ixgbe_mbx.h
43
s32 (*read)(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id);
sys/dev/ixgbe/ixgbe_mbx.h
44
s32 (*write)(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id);
sys/dev/ixgbe/ixgbe_mbx.h
52
u32 msgs_tx;
sys/dev/ixgbe/ixgbe_mbx.h
53
u32 msgs_rx;
sys/dev/ixgbe/ixgbe_mbx.h
55
u32 acks;
sys/dev/ixgbe/ixgbe_mbx.h
56
u32 reqs;
sys/dev/ixgbe/ixgbe_mbx.h
57
u32 rsts;
sys/dev/ixgbe/ixgbe_mbx.h
68
u32 timeout;
sys/dev/ixgbe/ixgbe_mbx.h
69
u32 usec_delay;
sys/dev/ixgbe/ixgbe_mbx.h
70
u32 vf_mailbox;
sys/dev/ixgbe/ixgbe_osdep.c
43
ixgbe_read_pci_cfg(struct ixgbe_hw *hw, u32 reg)
sys/dev/ixgbe/ixgbe_osdep.c
49
ixgbe_write_pci_cfg(struct ixgbe_hw *hw, u32 reg, u16 value)
sys/dev/ixgbe/ixgbe_osdep.c
54
inline u32
sys/dev/ixgbe/ixgbe_osdep.c
55
ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)
sys/dev/ixgbe/ixgbe_osdep.c
62
ixgbe_write_reg(struct ixgbe_hw *hw, u32 reg, u32 val)
sys/dev/ixgbe/ixgbe_osdep.c
69
inline u32
sys/dev/ixgbe/ixgbe_osdep.c
70
ixgbe_read_reg_array(struct ixgbe_hw *hw, u32 reg, u32 offset)
sys/dev/ixgbe/ixgbe_osdep.c
78
ixgbe_write_reg_array(struct ixgbe_hw *hw, u32 reg, u32 offset, u32 val)
sys/dev/ixgbe/ixgbe_osdep.h
158
#define __le32 u32
sys/dev/ixgbe/ixgbe_osdep.h
161
#define __be32 u32
sys/dev/ixgbe/ixgbe_osdep.h
211
extern u16 ixgbe_read_pci_cfg(struct ixgbe_hw *, u32);
sys/dev/ixgbe/ixgbe_osdep.h
214
extern void ixgbe_write_pci_cfg(struct ixgbe_hw *, u32, u16);
sys/dev/ixgbe/ixgbe_osdep.h
219
extern u32 ixgbe_read_reg(struct ixgbe_hw *, u32);
sys/dev/ixgbe/ixgbe_osdep.h
222
extern void ixgbe_write_reg(struct ixgbe_hw *, u32, u32);
sys/dev/ixgbe/ixgbe_osdep.h
225
extern u32 ixgbe_read_reg_array(struct ixgbe_hw *, u32, u32);
sys/dev/ixgbe/ixgbe_osdep.h
229
extern void ixgbe_write_reg_array(struct ixgbe_hw *, u32, u32, u32);
sys/dev/ixgbe/ixgbe_phy.c
112
u32 swfw_mask = hw->phy.phy_semaphore_mask;
sys/dev/ixgbe/ixgbe_phy.c
1150
u32 i;
sys/dev/ixgbe/ixgbe_phy.c
1294
u32 vendor_oui = 0;
sys/dev/ixgbe/ixgbe_phy.c
1657
u32 vendor_oui = 0;
sys/dev/ixgbe/ixgbe_phy.c
189
u32 swfw_mask = hw->phy.phy_semaphore_mask;
sys/dev/ixgbe/ixgbe_phy.c
2023
u32 max_retry = 10;
sys/dev/ixgbe/ixgbe_phy.c
2024
u32 retry = 0;
sys/dev/ixgbe/ixgbe_phy.c
2025
u32 swfw_mask = hw->phy.phy_semaphore_mask;
sys/dev/ixgbe/ixgbe_phy.c
2146
u32 max_retry = 1;
sys/dev/ixgbe/ixgbe_phy.c
2147
u32 retry = 0;
sys/dev/ixgbe/ixgbe_phy.c
2148
u32 swfw_mask = hw->phy.phy_semaphore_mask;
sys/dev/ixgbe/ixgbe_phy.c
2246
u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));
sys/dev/ixgbe/ixgbe_phy.c
2281
u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));
sys/dev/ixgbe/ixgbe_phy.c
2282
u32 data_oe_bit = IXGBE_I2C_DATA_OE_N_EN_BY_MAC(hw);
sys/dev/ixgbe/ixgbe_phy.c
2283
u32 clk_oe_bit = IXGBE_I2C_CLK_OE_N_EN_BY_MAC(hw);
sys/dev/ixgbe/ixgbe_phy.c
2284
u32 bb_en_bit = IXGBE_I2C_BB_EN_BY_MAC(hw);
sys/dev/ixgbe/ixgbe_phy.c
2340
u32 i2cctl;
sys/dev/ixgbe/ixgbe_phy.c
2371
u32 data_oe_bit = IXGBE_I2C_DATA_OE_N_EN_BY_MAC(hw);
sys/dev/ixgbe/ixgbe_phy.c
2373
u32 i = 0;
sys/dev/ixgbe/ixgbe_phy.c
2374
u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));
sys/dev/ixgbe/ixgbe_phy.c
2375
u32 timeout = 10;
sys/dev/ixgbe/ixgbe_phy.c
2424
u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));
sys/dev/ixgbe/ixgbe_phy.c
2425
u32 data_oe_bit = IXGBE_I2C_DATA_OE_N_EN_BY_MAC(hw);
sys/dev/ixgbe/ixgbe_phy.c
2459
u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));
sys/dev/ixgbe/ixgbe_phy.c
2493
static void ixgbe_raise_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl)
sys/dev/ixgbe/ixgbe_phy.c
2495
u32 clk_oe_bit = IXGBE_I2C_CLK_OE_N_EN_BY_MAC(hw);
sys/dev/ixgbe/ixgbe_phy.c
2496
u32 i = 0;
sys/dev/ixgbe/ixgbe_phy.c
2497
u32 timeout = IXGBE_I2C_CLOCK_STRETCHING_TIMEOUT;
sys/dev/ixgbe/ixgbe_phy.c
2498
u32 i2cctl_r = 0;
sys/dev/ixgbe/ixgbe_phy.c
2529
static void ixgbe_lower_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl)
sys/dev/ixgbe/ixgbe_phy.c
2552
static s32 ixgbe_set_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl, bool data)
sys/dev/ixgbe/ixgbe_phy.c
2554
u32 data_oe_bit = IXGBE_I2C_DATA_OE_N_EN_BY_MAC(hw);
sys/dev/ixgbe/ixgbe_phy.c
2599
static bool ixgbe_get_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl)
sys/dev/ixgbe/ixgbe_phy.c
2601
u32 data_oe_bit = IXGBE_I2C_DATA_OE_N_EN_BY_MAC(hw);
sys/dev/ixgbe/ixgbe_phy.c
2630
u32 i2cctl;
sys/dev/ixgbe/ixgbe_phy.c
2631
u32 i;
sys/dev/ixgbe/ixgbe_phy.c
2694
u32 status;
sys/dev/ixgbe/ixgbe_phy.c
376
u32 mmngc;
sys/dev/ixgbe/ixgbe_phy.c
400
bool ixgbe_validate_phy_addr(struct ixgbe_hw *hw, u32 phy_addr)
sys/dev/ixgbe/ixgbe_phy.c
426
u32 status;
sys/dev/ixgbe/ixgbe_phy.c
437
hw->phy.id = (u32)(phy_id_high << 16);
sys/dev/ixgbe/ixgbe_phy.c
441
hw->phy.id |= (u32)(phy_id_low & IXGBE_PHY_REVISION_MASK);
sys/dev/ixgbe/ixgbe_phy.c
442
hw->phy.revision = (u32)(phy_id_low & ~IXGBE_PHY_REVISION_MASK);
sys/dev/ixgbe/ixgbe_phy.c
455
enum ixgbe_phy_type ixgbe_get_phy_type_from_id(u32 phy_id)
sys/dev/ixgbe/ixgbe_phy.c
46
static void ixgbe_raise_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl);
sys/dev/ixgbe/ixgbe_phy.c
47
static void ixgbe_lower_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl);
sys/dev/ixgbe/ixgbe_phy.c
48
static s32 ixgbe_set_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl, bool data);
sys/dev/ixgbe/ixgbe_phy.c
49
static bool ixgbe_get_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl);
sys/dev/ixgbe/ixgbe_phy.c
496
u32 i;
sys/dev/ixgbe/ixgbe_phy.c
597
s32 ixgbe_read_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
sys/dev/ixgbe/ixgbe_phy.c
600
u32 i, data, command;
sys/dev/ixgbe/ixgbe_phy.c
679
s32 ixgbe_read_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr,
sys/dev/ixgbe/ixgbe_phy.c
680
u32 device_type, u16 *phy_data)
sys/dev/ixgbe/ixgbe_phy.c
683
u32 gssr = hw->phy.phy_semaphore_mask;
sys/dev/ixgbe/ixgbe_phy.c
705
s32 ixgbe_write_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr,
sys/dev/ixgbe/ixgbe_phy.c
706
u32 device_type, u16 phy_data)
sys/dev/ixgbe/ixgbe_phy.c
708
u32 i, command;
sys/dev/ixgbe/ixgbe_phy.c
711
IXGBE_WRITE_REG(hw, IXGBE_MSRWD, (u32)phy_data);
sys/dev/ixgbe/ixgbe_phy.c
779
s32 ixgbe_write_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr,
sys/dev/ixgbe/ixgbe_phy.c
780
u32 device_type, u16 phy_data)
sys/dev/ixgbe/ixgbe_phy.c
783
u32 gssr = hw->phy.phy_semaphore_mask;
sys/dev/ixgbe/ixgbe_phy.c
997
u32 time_out;
sys/dev/ixgbe/ixgbe_phy.c
998
u32 max_time_out = 10;
sys/dev/ixgbe/ixgbe_phy.h
160
bool ixgbe_validate_phy_addr(struct ixgbe_hw *hw, u32 phy_addr);
sys/dev/ixgbe/ixgbe_phy.h
161
enum ixgbe_phy_type ixgbe_get_phy_type_from_id(u32 phy_id);
sys/dev/ixgbe/ixgbe_phy.h
166
s32 ixgbe_read_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
sys/dev/ixgbe/ixgbe_phy.h
168
s32 ixgbe_write_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
sys/dev/ixgbe/ixgbe_phy.h
170
s32 ixgbe_read_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr,
sys/dev/ixgbe/ixgbe_phy.h
171
u32 device_type, u16 *phy_data);
sys/dev/ixgbe/ixgbe_phy.h
172
s32 ixgbe_write_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr,
sys/dev/ixgbe/ixgbe_phy.h
173
u32 device_type, u16 phy_data);
sys/dev/ixgbe/ixgbe_sriov.h
79
u32 ixgbe_get_mtqc(int);
sys/dev/ixgbe/ixgbe_sriov.h
80
u32 ixgbe_get_mrqc(int);
sys/dev/ixgbe/ixgbe_type.h
3041
#define __le32 u32
sys/dev/ixgbe/ixgbe_type.h
3050
#define __be32 u32
sys/dev/ixgbe/ixgbe_type.h
3304
u32 address;
sys/dev/ixgbe/ixgbe_type.h
3313
u32 address;
sys/dev/ixgbe/ixgbe_type.h
3515
typedef u32 ixgbe_autoneg_advertised;
sys/dev/ixgbe/ixgbe_type.h
3517
typedef u32 ixgbe_link_speed;
sys/dev/ixgbe/ixgbe_type.h
379
u32 etk_id;
sys/dev/ixgbe/ixgbe_type.h
3903
u32 num_mc_addrs;
sys/dev/ixgbe/ixgbe_type.h
3904
u32 rar_used_count;
sys/dev/ixgbe/ixgbe_type.h
3905
u32 mta_in_use;
sys/dev/ixgbe/ixgbe_type.h
3906
u32 overflow_promisc;
sys/dev/ixgbe/ixgbe_type.h
3923
u32 high_water[IXGBE_DCB_MAX_TRAFFIC_CLASS]; /* Flow Ctrl High-water */
sys/dev/ixgbe/ixgbe_type.h
3924
u32 low_water[IXGBE_DCB_MAX_TRAFFIC_CLASS]; /* Flow Ctrl Low-water */
sys/dev/ixgbe/ixgbe_type.h
4019
u32 *vmdq);
sys/dev/ixgbe/ixgbe_type.h
4031
s32 (*read_pba_string)(struct ixgbe_hw *, u8 *, u32);
sys/dev/ixgbe/ixgbe_type.h
4051
s32 (*read_analog_reg8)(struct ixgbe_hw*, u32, u8*);
sys/dev/ixgbe/ixgbe_type.h
4052
s32 (*write_analog_reg8)(struct ixgbe_hw*, u32, u8);
sys/dev/ixgbe/ixgbe_type.h
4054
s32 (*enable_rx_dma)(struct ixgbe_hw *, u32);
sys/dev/ixgbe/ixgbe_type.h
4057
s32 (*acquire_swfw_sync)(struct ixgbe_hw *, u32);
sys/dev/ixgbe/ixgbe_type.h
4058
void (*release_swfw_sync)(struct ixgbe_hw *, u32);
sys/dev/ixgbe/ixgbe_type.h
4060
s32 (*prot_autoc_read)(struct ixgbe_hw *, bool *, u32 *);
sys/dev/ixgbe/ixgbe_type.h
4061
s32 (*prot_autoc_write)(struct ixgbe_hw *, u32, bool);
sys/dev/ixgbe/ixgbe_type.h
4076
void (*setup_rxpba)(struct ixgbe_hw *, int, u32, int);
sys/dev/ixgbe/ixgbe_type.h
4079
s32 (*led_on)(struct ixgbe_hw *, u32);
sys/dev/ixgbe/ixgbe_type.h
4080
s32 (*led_off)(struct ixgbe_hw *, u32);
sys/dev/ixgbe/ixgbe_type.h
4081
s32 (*blink_led_start)(struct ixgbe_hw *, u32);
sys/dev/ixgbe/ixgbe_type.h
4082
s32 (*blink_led_stop)(struct ixgbe_hw *, u32);
sys/dev/ixgbe/ixgbe_type.h
4086
s32 (*set_rar)(struct ixgbe_hw *, u32, u8 *, u32, u32);
sys/dev/ixgbe/ixgbe_type.h
4087
s32 (*set_uc_addr)(struct ixgbe_hw *, u32, u8 *);
sys/dev/ixgbe/ixgbe_type.h
4088
s32 (*clear_rar)(struct ixgbe_hw *, u32);
sys/dev/ixgbe/ixgbe_type.h
4089
s32 (*insert_mac_addr)(struct ixgbe_hw *, u8 *, u32);
sys/dev/ixgbe/ixgbe_type.h
4090
s32 (*set_vmdq)(struct ixgbe_hw *, u32, u32);
sys/dev/ixgbe/ixgbe_type.h
4091
s32 (*set_vmdq_san_mac)(struct ixgbe_hw *, u32);
sys/dev/ixgbe/ixgbe_type.h
4092
s32 (*clear_vmdq)(struct ixgbe_hw *, u32, u32);
sys/dev/ixgbe/ixgbe_type.h
4094
s32 (*update_uc_addr_list)(struct ixgbe_hw *, u8 *, u32,
sys/dev/ixgbe/ixgbe_type.h
4096
s32 (*update_mc_addr_list)(struct ixgbe_hw *, u8 *, u32,
sys/dev/ixgbe/ixgbe_type.h
4102
s32 (*set_vfta)(struct ixgbe_hw *, u32, u32, bool, bool);
sys/dev/ixgbe/ixgbe_type.h
4103
s32 (*set_vlvf)(struct ixgbe_hw *, u32, u32, bool, u32 *, u32,
sys/dev/ixgbe/ixgbe_type.h
4108
s32 (*toggle_txdctl)(struct ixgbe_hw *hw, u32 vf_index);
sys/dev/ixgbe/ixgbe_type.h
4122
s32 (*bypass_rw) (struct ixgbe_hw *hw, u32 cmd, u32 *status);
sys/dev/ixgbe/ixgbe_type.h
4123
bool (*bypass_valid_rd) (u32 in_reg, u32 out_reg);
sys/dev/ixgbe/ixgbe_type.h
4124
s32 (*bypass_set) (struct ixgbe_hw *hw, u32 cmd, u32 event, u32 action);
sys/dev/ixgbe/ixgbe_type.h
4125
s32 (*bypass_rd_eep) (struct ixgbe_hw *hw, u32 addr, u8 *value);
sys/dev/ixgbe/ixgbe_type.h
4136
s32 (*read_iosf_sb_reg)(struct ixgbe_hw *, u32, u32, u32 *);
sys/dev/ixgbe/ixgbe_type.h
4137
s32 (*write_iosf_sb_reg)(struct ixgbe_hw *, u32, u32, u32);
sys/dev/ixgbe/ixgbe_type.h
4140
void (*mdd_event)(struct ixgbe_hw *hw, u32 *vf_bitmap);
sys/dev/ixgbe/ixgbe_type.h
4141
void (*restore_mdd_vf)(struct ixgbe_hw *hw, u32 vf);
sys/dev/ixgbe/ixgbe_type.h
4154
s32 (*read_reg)(struct ixgbe_hw *, u32, u32, u16 *);
sys/dev/ixgbe/ixgbe_type.h
4155
s32 (*write_reg)(struct ixgbe_hw *, u32, u32, u16);
sys/dev/ixgbe/ixgbe_type.h
4156
s32 (*read_reg_mdi)(struct ixgbe_hw *, u32, u32, u16 *);
sys/dev/ixgbe/ixgbe_type.h
4157
s32 (*write_reg_mdi)(struct ixgbe_hw *, u32, u32, u16);
sys/dev/ixgbe/ixgbe_type.h
4199
u32 semaphore_delay;
sys/dev/ixgbe/ixgbe_type.h
4218
u32 mta_shadow[IXGBE_MAX_MTA];
sys/dev/ixgbe/ixgbe_type.h
4220
u32 mcft_size;
sys/dev/ixgbe/ixgbe_type.h
4221
u32 vft_size;
sys/dev/ixgbe/ixgbe_type.h
4222
u32 num_rar_entries;
sys/dev/ixgbe/ixgbe_type.h
4223
u32 rar_highwater;
sys/dev/ixgbe/ixgbe_type.h
4224
u32 rx_pb_size;
sys/dev/ixgbe/ixgbe_type.h
4225
u32 max_tx_queues;
sys/dev/ixgbe/ixgbe_type.h
4226
u32 max_rx_queues;
sys/dev/ixgbe/ixgbe_type.h
4227
u32 orig_autoc;
sys/dev/ixgbe/ixgbe_type.h
4230
u32 orig_autoc2;
sys/dev/ixgbe/ixgbe_type.h
4240
u32 max_link_up_time;
sys/dev/ixgbe/ixgbe_type.h
4247
u32 addr;
sys/dev/ixgbe/ixgbe_type.h
4248
u32 id;
sys/dev/ixgbe/ixgbe_type.h
4251
u32 revision;
sys/dev/ixgbe/ixgbe_type.h
4253
u32 phy_semaphore_mask;
sys/dev/ixgbe/ixgbe_type.h
4264
u32 nw_mng_if_sel;
sys/dev/ixgbe/ixgbe_type.h
4283
const u32 *mvals;
sys/dev/ixgbe/ixgbe_type.h
4295
u32 fw_rst_cnt;
sys/dev/ixgbe/ixgbe_type.h
4304
u32 fw_build;
sys/dev/ixgbe/ixgbe_type.h
4453
u32 logs;
sys/dev/ixgbe/ixgbe_type.h
4454
u32 clear_off;
sys/dev/ixgbe/ixgbe_type.h
789
u32 link_speed;
sys/dev/ixgbe/ixgbe_type_e610.h
2066
u32 switching_mode;
sys/dev/ixgbe/ixgbe_type_e610.h
2071
u32 mgmt_mode;
sys/dev/ixgbe/ixgbe_type_e610.h
2076
u32 mgmt_protocols_mctp;
sys/dev/ixgbe/ixgbe_type_e610.h
2082
u32 os2bmc;
sys/dev/ixgbe/ixgbe_type_e610.h
2083
u32 valid_functions;
sys/dev/ixgbe/ixgbe_type_e610.h
2085
u32 active_tc_bitmap;
sys/dev/ixgbe/ixgbe_type_e610.h
2086
u32 maxtc;
sys/dev/ixgbe/ixgbe_type_e610.h
2089
u32 rss_table_size; /* 512 for PFs and 64 for VFs */
sys/dev/ixgbe/ixgbe_type_e610.h
2090
u32 rss_table_entry_width; /* RSS Entry width in bits */
sys/dev/ixgbe/ixgbe_type_e610.h
2093
u32 num_rxq; /* Number/Total Rx queues */
sys/dev/ixgbe/ixgbe_type_e610.h
2094
u32 rxq_first_id; /* First queue ID for Rx queues */
sys/dev/ixgbe/ixgbe_type_e610.h
2095
u32 num_txq; /* Number/Total Tx queues */
sys/dev/ixgbe/ixgbe_type_e610.h
2096
u32 txq_first_id; /* First queue ID for Tx queues */
sys/dev/ixgbe/ixgbe_type_e610.h
2099
u32 num_msix_vectors;
sys/dev/ixgbe/ixgbe_type_e610.h
2100
u32 msix_vector_first_id;
sys/dev/ixgbe/ixgbe_type_e610.h
2103
u32 max_mtu;
sys/dev/ixgbe/ixgbe_type_e610.h
2106
u32 num_wol_proxy_fltr;
sys/dev/ixgbe/ixgbe_type_e610.h
2107
u32 wol_proxy_vsi_seid;
sys/dev/ixgbe/ixgbe_type_e610.h
2110
u32 led_pin_num;
sys/dev/ixgbe/ixgbe_type_e610.h
2111
u32 sdp_pin_num;
sys/dev/ixgbe/ixgbe_type_e610.h
2160
u32 ext_topo_dev_img_ver_high[IXGBE_EXT_TOPO_DEV_IMG_COUNT];
sys/dev/ixgbe/ixgbe_type_e610.h
2161
u32 ext_topo_dev_img_ver_low[IXGBE_EXT_TOPO_DEV_IMG_COUNT];
sys/dev/ixgbe/ixgbe_type_e610.h
2188
u32 num_allocd_vfs; /* Number of allocated VFs */
sys/dev/ixgbe/ixgbe_type_e610.h
2189
u32 vf_base_id; /* Logical ID of the first VF */
sys/dev/ixgbe/ixgbe_type_e610.h
2190
u32 guar_num_vsi;
sys/dev/ixgbe/ixgbe_type_e610.h
2197
u32 num_vfs_exposed; /* Total number of VFs exposed */
sys/dev/ixgbe/ixgbe_type_e610.h
2198
u32 num_vsi_allocd_to_host; /* Excluding EMP VSI */
sys/dev/ixgbe/ixgbe_type_e610.h
2199
u32 num_flow_director_fltr; /* Number of FD filters available */
sys/dev/ixgbe/ixgbe_type_e610.h
2200
u32 num_funcs;
sys/dev/ixgbe/ixgbe_type_e610.h
2218
u32 nvm;
sys/dev/ixgbe/ixgbe_type_e610.h
2219
u32 orom;
sys/dev/ixgbe/ixgbe_type_e610.h
2238
u32 srev; /* Security revision */
sys/dev/ixgbe/ixgbe_type_e610.h
2243
u32 eetrack;
sys/dev/ixgbe/ixgbe_type_e610.h
2244
u32 srev;
sys/dev/ixgbe/ixgbe_type_e610.h
2251
u32 major; /* major high/low */
sys/dev/ixgbe/ixgbe_type_e610.h
2252
u32 minor; /* minor high/low */
sys/dev/ixgbe/ixgbe_type_e610.h
2253
u32 type; /* type high/low */
sys/dev/ixgbe/ixgbe_type_e610.h
2254
u32 rev; /* revision high/low */
sys/dev/ixgbe/ixgbe_type_e610.h
2255
u32 hash; /* SHA-1 hash word */
sys/dev/ixgbe/ixgbe_type_e610.h
2270
u32 nvm_ptr; /* Pointer to 1st NVM bank */
sys/dev/ixgbe/ixgbe_type_e610.h
2271
u32 nvm_size; /* Size of NVM bank */
sys/dev/ixgbe/ixgbe_type_e610.h
2272
u32 orom_ptr; /* Pointer to 1st OROM bank */
sys/dev/ixgbe/ixgbe_type_e610.h
2273
u32 orom_size; /* Size of OROM bank */
sys/dev/ixgbe/ixgbe_type_e610.h
2274
u32 netlist_ptr; /* Pointer to 1st Netlist bank */
sys/dev/ixgbe/ixgbe_type_e610.h
2275
u32 netlist_size; /* Size of Netlist bank */
sys/dev/ixgbe/ixgbe_type_e610.h
2288
u32 flash_size; /* Size of available flash in bytes */
sys/dev/ixgbe/ixgbe_type_e610.h
2297
u32 command; /* NVM command: READ or WRITE */
sys/dev/ixgbe/ixgbe_type_e610.h
2298
u32 offset; /* Offset to read/write, in bytes */
sys/dev/ixgbe/ixgbe_type_e610.h
2299
u32 data_size; /* Size of data field, in bytes */
sys/dev/ixgbe/ixgbe_type_e610.h
2304
u32 regval; /* Storage for register value */
sys/dev/ixgbe/ixgbe_type_e610.h
83
#define HI_DWORD(x) ((u32)((((x) >> 16) >> 16) & 0xFFFFFFFF))
sys/dev/ixgbe/ixgbe_type_e610.h
84
#define LO_DWORD(x) ((u32)((x) & 0xFFFFFFFF))
sys/dev/ixgbe/ixgbe_vf.c
100
u32 vfdca_rxctrl;
sys/dev/ixgbe/ixgbe_vf.c
101
u32 vfdca_txctrl;
sys/dev/ixgbe/ixgbe_vf.c
179
u32 timeout = IXGBE_VF_INIT_TIMEOUT;
sys/dev/ixgbe/ixgbe_vf.c
181
u32 msgbuf[IXGBE_VF_PERMADDR_MSG_LEN];
sys/dev/ixgbe/ixgbe_vf.c
253
u32 reg_val;
sys/dev/ixgbe/ixgbe_vf.c
302
u32 vector = 0;
sys/dev/ixgbe/ixgbe_vf.c
328
static s32 ixgbevf_write_msg_read_ack(struct ixgbe_hw *hw, u32 *msg,
sys/dev/ixgbe/ixgbe_vf.c
329
u32 *retmsg, u16 size)
sys/dev/ixgbe/ixgbe_vf.c
347
s32 ixgbe_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
sys/dev/ixgbe/ixgbe_vf.c
348
u32 enable_addr)
sys/dev/ixgbe/ixgbe_vf.c
350
u32 msgbuf[3];
sys/dev/ixgbe/ixgbe_vf.c
383
u32 mc_addr_count, ixgbe_mc_addr_itr next,
sys/dev/ixgbe/ixgbe_vf.c
386
u32 msgbuf[IXGBE_VFMAILBOX_SIZE];
sys/dev/ixgbe/ixgbe_vf.c
388
u32 vector;
sys/dev/ixgbe/ixgbe_vf.c
389
u32 cnt, i;
sys/dev/ixgbe/ixgbe_vf.c
390
u32 vmdq;
sys/dev/ixgbe/ixgbe_vf.c
429
u32 msgbuf[2];
sys/dev/ixgbe/ixgbe_vf.c
467
u32 msgbuf[2];
sys/dev/ixgbe/ixgbe_vf.c
496
s32 ixgbe_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind,
sys/dev/ixgbe/ixgbe_vf.c
499
u32 msgbuf[2];
sys/dev/ixgbe/ixgbe_vf.c
521
u32 ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw *hw)
sys/dev/ixgbe/ixgbe_vf.c
533
u32 ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw *hw)
sys/dev/ixgbe/ixgbe_vf.c
554
s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr)
sys/dev/ixgbe/ixgbe_vf.c
556
u32 msgbuf[3], msgbuf_chk;
sys/dev/ixgbe/ixgbe_vf.c
614
u32 in_msg = 0;
sys/dev/ixgbe/ixgbe_vf.c
615
u32 links_reg;
sys/dev/ixgbe/ixgbe_vf.c
714
u32 msgbuf[2];
sys/dev/ixgbe/ixgbe_vf.c
738
u32 msg[3];
sys/dev/ixgbe/ixgbe_vf.c
765
u32 msg[5];
sys/dev/ixgbe/ixgbe_vf.c
99
u32 vfsrrctl;
sys/dev/ixgbe/ixgbe_vf.h
123
u32 ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw *hw);
sys/dev/ixgbe/ixgbe_vf.h
124
u32 ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw *hw);
sys/dev/ixgbe/ixgbe_vf.h
130
s32 ixgbe_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
sys/dev/ixgbe/ixgbe_vf.h
131
u32 enable_addr);
sys/dev/ixgbe/ixgbe_vf.h
132
s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr);
sys/dev/ixgbe/ixgbe_vf.h
134
u32 mc_addr_count, ixgbe_mc_addr_itr,
sys/dev/ixgbe/ixgbe_vf.h
138
s32 ixgbe_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind,
sys/dev/ixgbe/ixgbe_x540.c
1005
s32 ixgbe_blink_led_start_X540(struct ixgbe_hw *hw, u32 index)
sys/dev/ixgbe/ixgbe_x540.c
1007
u32 macc_reg;
sys/dev/ixgbe/ixgbe_x540.c
1008
u32 ledctl_reg;
sys/dev/ixgbe/ixgbe_x540.c
1046
s32 ixgbe_blink_led_stop_X540(struct ixgbe_hw *hw, u32 index)
sys/dev/ixgbe/ixgbe_x540.c
1048
u32 macc_reg;
sys/dev/ixgbe/ixgbe_x540.c
1049
u32 ledctl_reg;
sys/dev/ixgbe/ixgbe_x540.c
217
u32 ctrl, i;
sys/dev/ixgbe/ixgbe_x540.c
218
u32 swfw_mask = hw->phy.phy_semaphore_mask;
sys/dev/ixgbe/ixgbe_x540.c
368
u32 eec;
sys/dev/ixgbe/ixgbe_x540.c
691
u32 flup;
sys/dev/ixgbe/ixgbe_x540.c
738
u32 i;
sys/dev/ixgbe/ixgbe_x540.c
739
u32 reg;
sys/dev/ixgbe/ixgbe_x540.c
768
s32 ixgbe_acquire_swfw_sync_X540(struct ixgbe_hw *hw, u32 mask)
sys/dev/ixgbe/ixgbe_x540.c
770
u32 swmask = mask & IXGBE_GSSR_NVM_PHY_MASK;
sys/dev/ixgbe/ixgbe_x540.c
771
u32 fwmask = swmask << 5;
sys/dev/ixgbe/ixgbe_x540.c
772
u32 swi2c_mask = mask & IXGBE_GSSR_I2C_MASK;
sys/dev/ixgbe/ixgbe_x540.c
773
u32 timeout = 200;
sys/dev/ixgbe/ixgbe_x540.c
774
u32 hwmask = 0;
sys/dev/ixgbe/ixgbe_x540.c
775
u32 swfw_sync;
sys/dev/ixgbe/ixgbe_x540.c
776
u32 i;
sys/dev/ixgbe/ixgbe_x540.c
840
u32 rmask = IXGBE_GSSR_EEP_SM | IXGBE_GSSR_PHY0_SM |
sys/dev/ixgbe/ixgbe_x540.c
865
void ixgbe_release_swfw_sync_X540(struct ixgbe_hw *hw, u32 mask)
sys/dev/ixgbe/ixgbe_x540.c
867
u32 swmask = mask & (IXGBE_GSSR_NVM_PHY_MASK | IXGBE_GSSR_SW_MNG_SM);
sys/dev/ixgbe/ixgbe_x540.c
868
u32 swfw_sync;
sys/dev/ixgbe/ixgbe_x540.c
893
u32 timeout = 2000;
sys/dev/ixgbe/ixgbe_x540.c
894
u32 i;
sys/dev/ixgbe/ixgbe_x540.c
895
u32 swsm;
sys/dev/ixgbe/ixgbe_x540.c
950
u32 swsm;
sys/dev/ixgbe/ixgbe_x540.c
976
u32 rmask;
sys/dev/ixgbe/ixgbe_x540.h
61
s32 ixgbe_acquire_swfw_sync_X540(struct ixgbe_hw *hw, u32 mask);
sys/dev/ixgbe/ixgbe_x540.h
62
void ixgbe_release_swfw_sync_X540(struct ixgbe_hw *hw, u32 mask);
sys/dev/ixgbe/ixgbe_x540.h
65
s32 ixgbe_blink_led_start_X540(struct ixgbe_hw *hw, u32 index);
sys/dev/ixgbe/ixgbe_x540.h
66
s32 ixgbe_blink_led_stop_X540(struct ixgbe_hw *hw, u32 index);
sys/dev/ixgbe/ixgbe_x550.c
1015
u32 eec;
sys/dev/ixgbe/ixgbe_x550.c
1060
IXGBE_WRITE_REG(hw, IXGBE_PFFLPL, (u32)pfflp);
sys/dev/ixgbe/ixgbe_x550.c
1061
IXGBE_WRITE_REG(hw, IXGBE_PFFLPH, (u32)(pfflp >> 32));
sys/dev/ixgbe/ixgbe_x550.c
1076
u32 pfvfspoof;
sys/dev/ixgbe/ixgbe_x550.c
1098
static s32 ixgbe_iosf_wait(struct ixgbe_hw *hw, u32 *ctrl)
sys/dev/ixgbe/ixgbe_x550.c
1100
u32 i, command = 0;
sys/dev/ixgbe/ixgbe_x550.c
1130
s32 ixgbe_write_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr,
sys/dev/ixgbe/ixgbe_x550.c
1131
u32 device_type, u32 data)
sys/dev/ixgbe/ixgbe_x550.c
1133
u32 gssr = IXGBE_GSSR_PHY1_SM | IXGBE_GSSR_PHY0_SM;
sys/dev/ixgbe/ixgbe_x550.c
1134
u32 command, error __unused;
sys/dev/ixgbe/ixgbe_x550.c
1176
s32 ixgbe_read_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr,
sys/dev/ixgbe/ixgbe_x550.c
1177
u32 device_type, u32 *data)
sys/dev/ixgbe/ixgbe_x550.c
1179
u32 gssr = IXGBE_GSSR_PHY1_SM | IXGBE_GSSR_PHY0_SM;
sys/dev/ixgbe/ixgbe_x550.c
1180
u32 command, error __unused;
sys/dev/ixgbe/ixgbe_x550.c
1232
status = ixgbe_host_interface_command(hw, (u32 *)&token_cmd,
sys/dev/ixgbe/ixgbe_x550.c
1270
status = ixgbe_host_interface_command(hw, (u32 *)&token_cmd,
sys/dev/ixgbe/ixgbe_x550.c
1291
u32 reg;
sys/dev/ixgbe/ixgbe_x550.c
1314
u32 reg;
sys/dev/ixgbe/ixgbe_x550.c
1336
void ixgbe_restore_mdd_vf_X550(struct ixgbe_hw *hw, u32 vf)
sys/dev/ixgbe/ixgbe_x550.c
1338
u32 idx, reg, num_qs, start_q, bitmask;
sys/dev/ixgbe/ixgbe_x550.c
1376
void ixgbe_mdd_event_X550(struct ixgbe_hw *hw, u32 *vf_bitmap)
sys/dev/ixgbe/ixgbe_x550.c
1378
u32 wqbr;
sys/dev/ixgbe/ixgbe_x550.c
1379
u32 i, j, reg, q, shift, vf, idx;
sys/dev/ixgbe/ixgbe_x550.c
1568
u32 link_ctrl;
sys/dev/ixgbe/ixgbe_x550.c
1586
u32 flx_mask_st20;
sys/dev/ixgbe/ixgbe_x550.c
1617
u32 lval, sval, flx_val;
sys/dev/ixgbe/ixgbe_x550.c
1686
u32 lval, sval, flx_val;
sys/dev/ixgbe/ixgbe_x550.c
179
u32 retry;
sys/dev/ixgbe/ixgbe_x550.c
1902
u32 status;
sys/dev/ixgbe/ixgbe_x550.c
1989
u32 status;
sys/dev/ixgbe/ixgbe_x550.c
2088
u32 reg_val;
sys/dev/ixgbe/ixgbe_x550.c
2141
u32 store[FW_PHY_ACT_DATA_COUNT] = { 0 };
sys/dev/ixgbe/ixgbe_x550.c
2165
u32 store[FW_PHY_ACT_DATA_COUNT] = { 0 };
sys/dev/ixgbe/ixgbe_x550.c
2333
u32 hlreg0;
sys/dev/ixgbe/ixgbe_x550.c
2371
u32 ctrl = 0;
sys/dev/ixgbe/ixgbe_x550.c
2372
u32 i;
sys/dev/ixgbe/ixgbe_x550.c
2374
u32 swfw_mask = hw->phy.phy_semaphore_mask;
sys/dev/ixgbe/ixgbe_x550.c
2502
u32 status;
sys/dev/ixgbe/ixgbe_x550.c
252
u32 swfw_mask = hw->phy.phy_semaphore_mask;
sys/dev/ixgbe/ixgbe_x550.c
2612
u32 reg_val;
sys/dev/ixgbe/ixgbe_x550.c
2664
u32 reg_slice, reg_phy_int, slice_offset;
sys/dev/ixgbe/ixgbe_x550.c
2764
u32 reg_val;
sys/dev/ixgbe/ixgbe_x550.c
2835
u32 reg_val;
sys/dev/ixgbe/ixgbe_x550.c
2892
u32 ret;
sys/dev/ixgbe/ixgbe_x550.c
2931
u32 status;
sys/dev/ixgbe/ixgbe_x550.c
2993
u32 reg_val;
sys/dev/ixgbe/ixgbe_x550.c
3062
const u32 mask = IXGBE_GSSR_SW_MNG_SM | IXGBE_GSSR_EEP_SM;
sys/dev/ixgbe/ixgbe_x550.c
3084
status = ixgbe_hic_unlocked(hw, (u32 *)&buffer, sizeof(buffer),
sys/dev/ixgbe/ixgbe_x550.c
3107
const u32 mask = IXGBE_GSSR_SW_MNG_SM | IXGBE_GSSR_EEP_SM;
sys/dev/ixgbe/ixgbe_x550.c
3109
u32 current_word = 0;
sys/dev/ixgbe/ixgbe_x550.c
3112
u32 i;
sys/dev/ixgbe/ixgbe_x550.c
3141
status = ixgbe_hic_unlocked(hw, (u32 *)&buffer, sizeof(buffer),
sys/dev/ixgbe/ixgbe_x550.c
3150
u32 reg = IXGBE_FLEX_MNG + (FW_NVM_DATA_OFFSET << 2) +
sys/dev/ixgbe/ixgbe_x550.c
3152
u32 value = IXGBE_READ_REG(hw, reg);
sys/dev/ixgbe/ixgbe_x550.c
3197
status = ixgbe_host_interface_command(hw, (u32 *)&buffer,
sys/dev/ixgbe/ixgbe_x550.c
3255
u32 i = 0;
sys/dev/ixgbe/ixgbe_x550.c
328
u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
sys/dev/ixgbe/ixgbe_x550.c
3295
u32 buffer_size)
sys/dev/ixgbe/ixgbe_x550.c
3331
if (buffer && ((u32)start + (u32)length > buffer_size))
sys/dev/ixgbe/ixgbe_x550.c
3362
s32 ixgbe_calc_checksum_X550(struct ixgbe_hw *hw, u16 *buffer, u32 buffer_size)
sys/dev/ixgbe/ixgbe_x550.c
3560
status = ixgbe_host_interface_command(hw, (u32 *)&buffer,
sys/dev/ixgbe/ixgbe_x550.c
3669
u32 rxctrl, pfdtxgswc;
sys/dev/ixgbe/ixgbe_x550.c
3691
status = ixgbe_host_interface_command(hw, (u32 *)&fw_cmd,
sys/dev/ixgbe/ixgbe_x550.c
3719
u32 save_autoneg;
sys/dev/ixgbe/ixgbe_x550.c
3861
u32 pause, asm_dir, reg_val;
sys/dev/ixgbe/ixgbe_x550.c
3950
u32 link_s1, lp_an_page_low, an_cntl_1;
sys/dev/ixgbe/ixgbe_x550.c
400
u32 (*data)[FW_PHY_ACT_DATA_COUNT])
sys/dev/ixgbe/ixgbe_x550.c
4040
u32 info[FW_PHY_ACT_DATA_COUNT] = { 0 };
sys/dev/ixgbe/ixgbe_x550.c
4095
u32 an_cntl = 0;
sys/dev/ixgbe/ixgbe_x550.c
4181
u32 esdp;
sys/dev/ixgbe/ixgbe_x550.c
42
static s32 ixgbe_acquire_swfw_sync_X550a(struct ixgbe_hw *, u32 mask);
sys/dev/ixgbe/ixgbe_x550.c
420
rc = ixgbe_host_interface_command(hw, (u32 *)&hic.cmd,
sys/dev/ixgbe/ixgbe_x550.c
4201
s32 ixgbe_acquire_swfw_sync_X550em(struct ixgbe_hw *hw, u32 mask)
sys/dev/ixgbe/ixgbe_x550.c
4224
void ixgbe_release_swfw_sync_X550em(struct ixgbe_hw *hw, u32 mask)
sys/dev/ixgbe/ixgbe_x550.c
4241
static s32 ixgbe_acquire_swfw_sync_X550a(struct ixgbe_hw *hw, u32 mask)
sys/dev/ixgbe/ixgbe_x550.c
4243
u32 hmask = mask & ~IXGBE_GSSR_TOKEN_SM;
sys/dev/ixgbe/ixgbe_x550.c
4294
static void ixgbe_release_swfw_sync_X550a(struct ixgbe_hw *hw, u32 mask)
sys/dev/ixgbe/ixgbe_x550.c
4296
u32 hmask = mask & ~IXGBE_GSSR_TOKEN_SM;
sys/dev/ixgbe/ixgbe_x550.c
43
static void ixgbe_release_swfw_sync_X550a(struct ixgbe_hw *, u32 mask);
sys/dev/ixgbe/ixgbe_x550.c
4318
s32 ixgbe_read_phy_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,
sys/dev/ixgbe/ixgbe_x550.c
4319
u32 device_type, u16 *phy_data)
sys/dev/ixgbe/ixgbe_x550.c
4322
u32 mask = hw->phy.phy_semaphore_mask | IXGBE_GSSR_TOKEN_SM;
sys/dev/ixgbe/ixgbe_x550.c
4346
s32 ixgbe_write_phy_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,
sys/dev/ixgbe/ixgbe_x550.c
4347
u32 device_type, u16 phy_data)
sys/dev/ixgbe/ixgbe_x550.c
4350
u32 mask = hw->phy.phy_semaphore_mask | IXGBE_GSSR_TOKEN_SM;
sys/dev/ixgbe/ixgbe_x550.c
4379
u32 status;
sys/dev/ixgbe/ixgbe_x550.c
4409
u32 i;
sys/dev/ixgbe/ixgbe_x550.c
4460
u32 status;
sys/dev/ixgbe/ixgbe_x550.c
4516
s32 ixgbe_led_on_t_X550em(struct ixgbe_hw *hw, u32 led_idx)
sys/dev/ixgbe/ixgbe_x550.c
4541
s32 ixgbe_led_off_t_X550em(struct ixgbe_hw *hw, u32 led_idx)
sys/dev/ixgbe/ixgbe_x550.c
459
u32 info[FW_PHY_ACT_DATA_COUNT] = { 0 };
sys/dev/ixgbe/ixgbe_x550.c
4603
ret_val = ixgbe_host_interface_command(hw, (u32 *)&fw_cmd,
sys/dev/ixgbe/ixgbe_x550.c
4630
u32 fwsm;
sys/dev/ixgbe/ixgbe_x550.c
514
u32 setup[FW_PHY_ACT_DATA_COUNT] = { 0 };
sys/dev/ixgbe/ixgbe_x550.c
520
static s32 ixgbe_read_phy_reg_x550em(struct ixgbe_hw *hw, u32 reg_addr,
sys/dev/ixgbe/ixgbe_x550.c
521
u32 device_type, u16 *phy_data)
sys/dev/ixgbe/ixgbe_x550.c
527
static s32 ixgbe_write_phy_reg_x550em(struct ixgbe_hw *hw, u32 reg_addr,
sys/dev/ixgbe/ixgbe_x550.c
528
u32 device_type, u16 phy_data)
sys/dev/ixgbe/ixgbe_x550.c
704
u32 setup[FW_PHY_ACT_DATA_COUNT] = { 0 };
sys/dev/ixgbe/ixgbe_x550.c
736
setup[0] |= (u32)(ixgbe_fw_map[i].fw_speed);
sys/dev/ixgbe/ixgbe_x550.c
883
u32 reg, high_pri_tc;
sys/dev/ixgbe/ixgbe_x550.c
931
u32 tc, reg, pb_headroom, rx_pb_size, maxframe_size_kb;
sys/dev/ixgbe/ixgbe_x550.c
986
u32 reg;
sys/dev/ixgbe/ixgbe_x550.h
100
s32 ixgbe_read_phy_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,
sys/dev/ixgbe/ixgbe_x550.h
101
u32 device_type, u16 *phy_data);
sys/dev/ixgbe/ixgbe_x550.h
102
s32 ixgbe_write_phy_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,
sys/dev/ixgbe/ixgbe_x550.h
103
u32 device_type, u16 phy_data);
sys/dev/ixgbe/ixgbe_x550.h
117
s32 ixgbe_led_on_t_X550em(struct ixgbe_hw *hw, u32 led_idx);
sys/dev/ixgbe/ixgbe_x550.h
118
s32 ixgbe_led_off_t_X550em(struct ixgbe_hw *hw, u32 led_idx);
sys/dev/ixgbe/ixgbe_x550.h
47
s32 ixgbe_calc_checksum_X550(struct ixgbe_hw *hw, u16 *buffer, u32 buffer_size);
sys/dev/ixgbe/ixgbe_x550.h
64
s32 ixgbe_write_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr,
sys/dev/ixgbe/ixgbe_x550.h
65
u32 device_type, u32 data);
sys/dev/ixgbe/ixgbe_x550.h
66
s32 ixgbe_read_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr,
sys/dev/ixgbe/ixgbe_x550.h
67
u32 device_type, u32 *data);
sys/dev/ixgbe/ixgbe_x550.h
74
void ixgbe_mdd_event_X550(struct ixgbe_hw *hw, u32 *vf_bitmap);
sys/dev/ixgbe/ixgbe_x550.h
75
void ixgbe_restore_mdd_vf_X550(struct ixgbe_hw *hw, u32 vf);
sys/dev/ixgbe/ixgbe_x550.h
91
s32 ixgbe_acquire_swfw_sync_X550em(struct ixgbe_hw *hw, u32 mask);
sys/dev/ixgbe/ixgbe_x550.h
92
void ixgbe_release_swfw_sync_X550em(struct ixgbe_hw *hw, u32 mask);
sys/dev/ixl/i40e_adminq.c
301
u32 reg = 0;
sys/dev/ixl/i40e_adminq.c
334
u32 reg = 0;
sys/dev/ixl/i40e_adminq.c
722
hw->nvm.oem_ver = ((u32)oem_hi << 16) | oem_lo;
sys/dev/ixl/i40e_adminq.c
853
u32 val = 0;
sys/dev/ixl/i40e_adminq.c
971
u32 total_delay = 0;
sys/dev/ixl/i40e_adminq.h
104
u32 fw_build; /* firmware build number */
sys/dev/ixl/i40e_adminq.h
153
if (!((u32)aq_rc < (sizeof(aq_to_posix) / sizeof((aq_to_posix)[0]))))
sys/dev/ixl/i40e_adminq.h
64
u32 head;
sys/dev/ixl/i40e_adminq.h
65
u32 tail;
sys/dev/ixl/i40e_adminq.h
66
u32 len;
sys/dev/ixl/i40e_adminq.h
67
u32 bah;
sys/dev/ixl/i40e_adminq.h
68
u32 bal;
sys/dev/ixl/i40e_adminq.h
97
u32 asq_cmd_timeout; /* send queue cmd write back timeout*/
sys/dev/ixl/i40e_adminq_cmd.h
2471
u32 min_rrev;
sys/dev/ixl/i40e_alloc.h
56
u64 size, u32 alignment);
sys/dev/ixl/i40e_alloc.h
61
u32 size);
sys/dev/ixl/i40e_common.c
1088
cmd_data->mac_sal = CPU_TO_LE32(((u32)mac_addr[2] << 24) |
sys/dev/ixl/i40e_common.c
1089
((u32)mac_addr[3] << 16) |
sys/dev/ixl/i40e_common.c
1090
((u32)mac_addr[4] << 8) |
sys/dev/ixl/i40e_common.c
1155
void i40e_pre_tx_queue_cfg(struct i40e_hw *hw, u32 queue, bool enable)
sys/dev/ixl/i40e_common.c
1157
u32 abs_queue_idx = hw->func_caps.base_queue + queue;
sys/dev/ixl/i40e_common.c
1158
u32 reg_block = 0;
sys/dev/ixl/i40e_common.c
1159
u32 reg_val;
sys/dev/ixl/i40e_common.c
1187
u32 pba_num_size)
sys/dev/ixl/i40e_common.c
1217
if (pba_num_size < (((u32)pba_size * 2) + 1)) {
sys/dev/ixl/i40e_common.c
1302
u32 retry_limit)
sys/dev/ixl/i40e_common.c
1304
u32 cnt, reg = 0;
sys/dev/ixl/i40e_common.c
1329
u32 cnt = 0;
sys/dev/ixl/i40e_common.c
1330
u32 cnt1 = 0;
sys/dev/ixl/i40e_common.c
1331
u32 reg = 0;
sys/dev/ixl/i40e_common.c
1332
u32 grst_del;
sys/dev/ixl/i40e_common.c
1378
u32 reg2 = 0;
sys/dev/ixl/i40e_common.c
1417
u32 num_queues, base_queue;
sys/dev/ixl/i40e_common.c
1418
u32 num_pf_int;
sys/dev/ixl/i40e_common.c
1419
u32 num_vf_int;
sys/dev/ixl/i40e_common.c
1420
u32 num_vfs;
sys/dev/ixl/i40e_common.c
1421
u32 i, j;
sys/dev/ixl/i40e_common.c
1422
u32 val;
sys/dev/ixl/i40e_common.c
1423
u32 eol = 0x7ff;
sys/dev/ixl/i40e_common.c
1471
u32 abs_queue_idx = base_queue + i;
sys/dev/ixl/i40e_common.c
1472
u32 reg_block = 0;
sys/dev/ixl/i40e_common.c
1520
static u32 i40e_led_is_mine(struct i40e_hw *hw, int idx)
sys/dev/ixl/i40e_common.c
1522
u32 gpio_val = 0;
sys/dev/ixl/i40e_common.c
1523
u32 port;
sys/dev/ixl/i40e_common.c
1564
u32 i40e_led_get(struct i40e_hw *hw)
sys/dev/ixl/i40e_common.c
1566
u32 mode = 0;
sys/dev/ixl/i40e_common.c
1573
u32 gpio_val = i40e_led_is_mine(hw, i);
sys/dev/ixl/i40e_common.c
1596
void i40e_led_set(struct i40e_hw *hw, u32 mode, bool blink)
sys/dev/ixl/i40e_common.c
1609
u32 gpio_val = i40e_led_is_mine(hw, i);
sys/dev/ixl/i40e_common.c
1616
u32 pin_func = 0;
sys/dev/ixl/i40e_common.c
2784
u32 *fw_build,
sys/dev/ixl/i40e_common.c
328
u32 effective_mask = hw->debug_mask & mask;
sys/dev/ixl/i40e_common.c
3382
u32 v_opcode, u32 v_retval, u8 *msg, u16 msglen,
sys/dev/ixl/i40e_common.c
3417
u32 reg_addr, u64 *reg_val,
sys/dev/ixl/i40e_common.c
3452
u32 reg_addr, u64 reg_val,
sys/dev/ixl/i40e_common.c
3463
cmd->value_high = CPU_TO_LE32((u32)(reg_val >> 32));
sys/dev/ixl/i40e_common.c
3464
cmd->value_low = CPU_TO_LE32((u32)(reg_val & 0xFFFFFFFF));
sys/dev/ixl/i40e_common.c
3558
u32 offset, u16 length, void *data,
sys/dev/ixl/i40e_common.c
3605
u8 cmd_flags, u32 field_id, void *data,
sys/dev/ixl/i40e_common.c
3705
u32 min_rrev,
sys/dev/ixl/i40e_common.c
3758
u32 offset, u16 length, bool last_command,
sys/dev/ixl/i40e_common.c
3799
u32 cap_count,
sys/dev/ixl/i40e_common.c
3803
u32 valid_functions, num_functions;
sys/dev/ixl/i40e_common.c
3804
u32 number, logical_id, phys_id;
sys/dev/ixl/i40e_common.c
3809
u32 i = 0;
sys/dev/ixl/i40e_common.c
4096
u32 port_cfg_reg = I40E_PRTGEN_CNF + (4 * i);
sys/dev/ixl/i40e_common.c
4210
u32 offset, u16 length, void *data,
sys/dev/ixl/i40e_common.c
5428
u32 fcoe_cntx_size, fcoe_filt_size;
sys/dev/ixl/i40e_common.c
5429
u32 fcoe_fmax;
sys/dev/ixl/i40e_common.c
5431
u32 val;
sys/dev/ixl/i40e_common.c
5442
fcoe_filt_size <<= (u32)settings->fcoe_filt_num;
sys/dev/ixl/i40e_common.c
5454
fcoe_cntx_size <<= (u32)settings->fcoe_cntx_num;
sys/dev/ixl/i40e_common.c
5517
u32 hash_lut_size = 0;
sys/dev/ixl/i40e_common.c
5518
u32 val;
sys/dev/ixl/i40e_common.c
5533
val |= ((u32)settings->pe_filt_num << I40E_PFQF_CTL_0_PEHSIZE_SHIFT) &
sys/dev/ixl/i40e_common.c
5537
val |= ((u32)settings->pe_cntx_num << I40E_PFQF_CTL_0_PEDSIZE_SHIFT) &
sys/dev/ixl/i40e_common.c
5542
val |= ((u32)settings->fcoe_filt_num <<
sys/dev/ixl/i40e_common.c
5547
val |= ((u32)settings->fcoe_cntx_num <<
sys/dev/ixl/i40e_common.c
5673
u32 ti;
sys/dev/ixl/i40e_common.c
5760
u32 ti;
sys/dev/ixl/i40e_common.c
5856
u32 ti;
sys/dev/ixl/i40e_common.c
5942
u32 reg_addr0, u32 reg_val0,
sys/dev/ixl/i40e_common.c
5943
u32 reg_addr1, u32 reg_val1)
sys/dev/ixl/i40e_common.c
5973
u32 addr, u32 dw_count, void *buffer)
sys/dev/ixl/i40e_common.c
6015
u32 reg_addr0, u32 *reg_val0,
sys/dev/ixl/i40e_common.c
6016
u32 reg_addr1, u32 *reg_val1)
sys/dev/ixl/i40e_common.c
6054
u32 addr, u32 dw_count, void *buffer)
sys/dev/ixl/i40e_common.c
6245
u8 table_id, u32 start_index, u16 buff_size,
sys/dev/ixl/i40e_common.c
6247
u8 *ret_next_table, u32 *ret_next_index,
sys/dev/ixl/i40e_common.c
6362
u32 *max_bw, u32 *min_bw,
sys/dev/ixl/i40e_common.c
6366
u32 max_bw_addr, min_bw_addr;
sys/dev/ixl/i40e_common.c
6437
u32 command = 0;
sys/dev/ixl/i40e_common.c
6482
u32 command = 0;
sys/dev/ixl/i40e_common.c
6522
u32 command = 0;
sys/dev/ixl/i40e_common.c
6596
u32 command = 0;
sys/dev/ixl/i40e_common.c
6737
u32 reg_val = rd32(hw, I40E_GLGEN_MDIO_I2C_SEL(port_num));
sys/dev/ixl/i40e_common.c
6751
u32 time, u32 interval)
sys/dev/ixl/i40e_common.c
6754
u32 i;
sys/dev/ixl/i40e_common.c
6823
u32 *reg_val)
sys/dev/ixl/i40e_common.c
6852
u32 reg_val)
sys/dev/ixl/i40e_common.c
6886
u32 reg_val_aq;
sys/dev/ixl/i40e_common.c
6931
u16 led_addr, u32 mode)
sys/dev/ixl/i40e_common.c
6934
u32 led_ctl = 0;
sys/dev/ixl/i40e_common.c
6935
u32 led_reg = 0;
sys/dev/ixl/i40e_common.c
6982
u32 val;
sys/dev/ixl/i40e_common.c
7033
u32 *tx_counter, u32 *rx_counter,
sys/dev/ixl/i40e_common.c
7043
u32 cmd_status;
sys/dev/ixl/i40e_common.c
7078
u32 tx_time_dur, rx_time_dur;
sys/dev/ixl/i40e_common.c
7080
u32 cmd_status;
sys/dev/ixl/i40e_common.c
7139
u32 tx_counter, rx_counter;
sys/dev/ixl/i40e_common.c
7156
(u32)(tx_counter - *tx_offset) :
sys/dev/ixl/i40e_common.c
7157
(u32)((tx_counter + BIT_ULL(32)) - *tx_offset);
sys/dev/ixl/i40e_common.c
7159
(u32)(rx_counter - *rx_offset) :
sys/dev/ixl/i40e_common.c
7160
(u32)((rx_counter + BIT_ULL(32)) - *rx_offset);
sys/dev/ixl/i40e_common.c
7177
u32 reg_addr, u32 *reg_val,
sys/dev/ixl/i40e_common.c
7205
u32 i40e_read_rx_ctl(struct i40e_hw *hw, u32 reg_addr)
sys/dev/ixl/i40e_common.c
7210
u32 val = 0;
sys/dev/ixl/i40e_common.c
7243
u32 reg_addr, u32 reg_val,
sys/dev/ixl/i40e_common.c
7267
void i40e_write_rx_ctl(struct i40e_hw *hw, u32 reg_addr, u32 reg_val)
sys/dev/ixl/i40e_common.c
7336
u32 reg_addr, u32 reg_val,
sys/dev/ixl/i40e_common.c
7382
u32 reg_addr, u32 *reg_val,
sys/dev/ixl/i40e_common.c
7422
i40e_aq_run_phy_activity(struct i40e_hw *hw, u16 activity_id, u32 dnl_opcode,
sys/dev/ixl/i40e_common.c
7423
u32 *cmd_status, u32 *data0, u32 *data1,
sys/dev/ixl/i40e_common.c
997
u32 port, ari, func_rid;
sys/dev/ixl/i40e_dcb.c
1028
u32 ouisubtype;
sys/dev/ixl/i40e_dcb.c
1034
ouisubtype = (u32)((I40E_IEEE_8021QAZ_OUI << I40E_LLDP_TLV_OUI_SHIFT) |
sys/dev/ixl/i40e_dcb.c
1103
u32 ouisubtype;
sys/dev/ixl/i40e_dcb.c
1109
ouisubtype = (u32)((I40E_IEEE_8021QAZ_OUI << I40E_LLDP_TLV_OUI_SHIFT) |
sys/dev/ixl/i40e_dcb.c
1164
u32 ouisubtype;
sys/dev/ixl/i40e_dcb.c
1171
ouisubtype = (u32)((I40E_IEEE_8021QAZ_OUI << I40E_LLDP_TLV_OUI_SHIFT) |
sys/dev/ixl/i40e_dcb.c
1204
u32 ouisubtype;
sys/dev/ixl/i40e_dcb.c
1209
ouisubtype = (u32)((I40E_IEEE_8021QAZ_OUI << I40E_LLDP_TLV_OUI_SHIFT) |
sys/dev/ixl/i40e_dcb.c
1353
u8 module, u32 word_offset)
sys/dev/ixl/i40e_dcb.c
1355
u32 address, offset = (2 * word_offset);
sys/dev/ixl/i40e_dcb.c
1417
u32 mem;
sys/dev/ixl/i40e_dcb.c
277
u32 ouisubtype;
sys/dev/ixl/i40e_dcb.c
452
u32 ouisubtype;
sys/dev/ixl/i40e_dcb.c
47
u32 reg;
sys/dev/ixl/i40e_dcb.c
510
u32 ouisubtype;
sys/dev/ixl/i40e_dcb.c
511
u32 oui;
sys/dev/ixl/i40e_dcb.c
514
oui = (u32)((ouisubtype & I40E_LLDP_TLV_OUI_MASK) >>
sys/dev/ixl/i40e_dcb.c
709
u32 status, tlv_status = LE32_TO_CPU(cee_cfg->tlv_status);
sys/dev/ixl/i40e_dcb.h
209
u32 defmaxtrafficclasses;
sys/dev/ixl/i40e_dcb.h
210
u32 defprioritytcmapping;
sys/dev/ixl/i40e_dcb.h
211
u32 deftcbandwidth;
sys/dev/ixl/i40e_dcb.h
212
u32 deftsaassignment;
sys/dev/ixl/i40e_hmc.c
144
u32 pd_index,
sys/dev/ixl/i40e_hmc.c
152
u32 sd_idx, rel_pd_idx;
sys/dev/ixl/i40e_hmc.c
225
u32 idx)
sys/dev/ixl/i40e_hmc.c
231
u32 sd_idx, rel_pd_idx;
sys/dev/ixl/i40e_hmc.c
280
u32 idx)
sys/dev/ixl/i40e_hmc.c
309
u32 idx, bool is_pf)
sys/dev/ixl/i40e_hmc.c
329
u32 idx)
sys/dev/ixl/i40e_hmc.c
358
u32 idx, bool is_pf)
sys/dev/ixl/i40e_hmc.c
51
u32 sd_index,
sys/dev/ixl/i40e_hmc.h
103
u32 signature;
sys/dev/ixl/i40e_hmc.h
131
u32 val1, val2, val3; \
sys/dev/ixl/i40e_hmc.h
132
val1 = (u32)(I40E_HI_DWORD(pa)); \
sys/dev/ixl/i40e_hmc.h
133
val2 = (u32)(pa) | (I40E_HMC_MAX_BP_COUNT << \
sys/dev/ixl/i40e_hmc.h
152
u32 val2, val3; \
sys/dev/ixl/i40e_hmc.h
192
*(sd_idx) = (u32)(fpm_addr / I40E_HMC_DIRECT_BP_SIZE); \
sys/dev/ixl/i40e_hmc.h
193
*(sd_limit) = (u32)((fpm_limit - 1) / I40E_HMC_DIRECT_BP_SIZE); \
sys/dev/ixl/i40e_hmc.h
216
*(pd_index) = (u32)(fpm_adr / I40E_HMC_PAGED_BP_SIZE); \
sys/dev/ixl/i40e_hmc.h
217
*(pd_limit) = (u32)((fpm_limit - 1) / I40E_HMC_PAGED_BP_SIZE); \
sys/dev/ixl/i40e_hmc.h
223
u32 sd_index,
sys/dev/ixl/i40e_hmc.h
229
u32 pd_index,
sys/dev/ixl/i40e_hmc.h
233
u32 idx);
sys/dev/ixl/i40e_hmc.h
235
u32 idx);
sys/dev/ixl/i40e_hmc.h
238
u32 idx, bool is_pf);
sys/dev/ixl/i40e_hmc.h
240
u32 idx);
sys/dev/ixl/i40e_hmc.h
243
u32 idx, bool is_pf);
sys/dev/ixl/i40e_hmc.h
51
u32 max_cnt; /* max count available for this hmc func */
sys/dev/ixl/i40e_hmc.h
52
u32 cnt; /* count of objects driver actually wants to create */
sys/dev/ixl/i40e_hmc.h
65
u32 sd_pd_index;
sys/dev/ixl/i40e_hmc.h
66
u32 ref_cnt;
sys/dev/ixl/i40e_hmc.h
71
u32 sd_index;
sys/dev/ixl/i40e_hmc.h
81
u32 ref_cnt;
sys/dev/ixl/i40e_hmc.h
82
u32 sd_index;
sys/dev/ixl/i40e_hmc.h
97
u32 sd_cnt;
sys/dev/ixl/i40e_hmc.h
98
u32 ref_cnt;
sys/dev/ixl/i40e_lan_hmc.c
1037
u32 dest_dword, mask;
sys/dev/ixl/i40e_lan_hmc.c
1052
mask = ~(u32)0;
sys/dev/ixl/i40e_lan_hmc.c
106
enum i40e_status_code i40e_init_lan_hmc(struct i40e_hw *hw, u32 txq_num,
sys/dev/ixl/i40e_lan_hmc.c
107
u32 rxq_num, u32 fcoe_cntx_num,
sys/dev/ixl/i40e_lan_hmc.c
108
u32 fcoe_filt_num)
sys/dev/ixl/i40e_lan_hmc.c
113
u32 size_exp;
sys/dev/ixl/i40e_lan_hmc.c
1179
i40e_memset(context_bytes, 0, (u32)hw->hmc.hmc_obj[hmc_type].size,
sys/dev/ixl/i40e_lan_hmc.c
1236
u32 obj_idx)
sys/dev/ixl/i40e_lan_hmc.c
1238
u32 obj_offset_in_sd, obj_offset_in_pd;
sys/dev/ixl/i40e_lan_hmc.c
1242
u32 pd_idx, pd_lmt, rel_pd_idx;
sys/dev/ixl/i40e_lan_hmc.c
1245
u32 sd_idx, sd_lmt;
sys/dev/ixl/i40e_lan_hmc.c
1281
obj_offset_in_pd = (u32)(obj_offset_in_fpm %
sys/dev/ixl/i40e_lan_hmc.c
1285
obj_offset_in_sd = (u32)(obj_offset_in_fpm %
sys/dev/ixl/i40e_lan_hmc.c
227
hw->hmc.sd_table.sd_cnt = (u32)
sys/dev/ixl/i40e_lan_hmc.c
268
u32 idx)
sys/dev/ixl/i40e_lan_hmc.c
295
u32 idx)
sys/dev/ixl/i40e_lan_hmc.c
318
u32 pd_idx1 = 0, pd_lmt1 = 0;
sys/dev/ixl/i40e_lan_hmc.c
319
u32 pd_idx = 0, pd_lmt = 0;
sys/dev/ixl/i40e_lan_hmc.c
321
u32 sd_idx, sd_lmt;
sys/dev/ixl/i40e_lan_hmc.c
323
u32 i, j;
sys/dev/ixl/i40e_lan_hmc.c
522
(u32)((obj->base & I40E_GLHMC_LANTXBASE_FPMLANTXBASE_MASK) / 512));
sys/dev/ixl/i40e_lan_hmc.c
528
(u32)((obj->base & I40E_GLHMC_LANRXBASE_FPMLANRXBASE_MASK) / 512));
sys/dev/ixl/i40e_lan_hmc.c
534
(u32)((obj->base & I40E_GLHMC_FCOEDDPBASE_FPMFCOEDDPBASE_MASK) / 512));
sys/dev/ixl/i40e_lan_hmc.c
540
(u32)((obj->base & I40E_GLHMC_FCOEFBASE_FPMFCOEFBASE_MASK) / 512));
sys/dev/ixl/i40e_lan_hmc.c
562
u32 pd_idx, pd_lmt, rel_pd_idx;
sys/dev/ixl/i40e_lan_hmc.c
563
u32 sd_idx, sd_lmt;
sys/dev/ixl/i40e_lan_hmc.c
564
u32 i, j;
sys/dev/ixl/i40e_lan_hmc.c
70
u64 i40e_calculate_l2fpm_size(u32 txq_num, u32 rxq_num,
sys/dev/ixl/i40e_lan_hmc.c
71
u32 fcoe_cntx_num, u32 fcoe_filt_num)
sys/dev/ixl/i40e_lan_hmc.c
852
u32 src_dword, mask;
sys/dev/ixl/i40e_lan_hmc.c
870
mask = ~(u32)0;
sys/dev/ixl/i40e_lan_hmc.c
875
src_dword = *(u32 *)from;
sys/dev/ixl/i40e_lan_hmc.h
114
u32 rsv[32];
sys/dev/ixl/i40e_lan_hmc.h
118
u32 rsv[8];
sys/dev/ixl/i40e_lan_hmc.h
156
u32 rsrc_type;
sys/dev/ixl/i40e_lan_hmc.h
157
u32 start_idx;
sys/dev/ixl/i40e_lan_hmc.h
158
u32 count;
sys/dev/ixl/i40e_lan_hmc.h
165
u32 rsrc_type;
sys/dev/ixl/i40e_lan_hmc.h
166
u32 start_idx;
sys/dev/ixl/i40e_lan_hmc.h
167
u32 count;
sys/dev/ixl/i40e_lan_hmc.h
170
enum i40e_status_code i40e_init_lan_hmc(struct i40e_hw *hw, u32 txq_num,
sys/dev/ixl/i40e_lan_hmc.h
171
u32 rxq_num, u32 fcoe_cntx_num,
sys/dev/ixl/i40e_lan_hmc.h
172
u32 fcoe_filt_num);
sys/dev/ixl/i40e_lan_hmc.h
177
u64 i40e_calculate_l2fpm_size(u32 txq_num, u32 rxq_num,
sys/dev/ixl/i40e_lan_hmc.h
178
u32 fcoe_cntx_num, u32 fcoe_filt_num);
sys/dev/ixl/i40e_lan_hmc.h
66
u32 rxmax; /* bigger than needed, see above for reason */
sys/dev/ixl/i40e_lan_hmc.h
98
u32 crc;
sys/dev/ixl/i40e_nvm.c
1328
u32 old_asq_status = hw->aq.asq_last_status;
sys/dev/ixl/i40e_nvm.c
1329
u32 gtime;
sys/dev/ixl/i40e_nvm.c
1398
u32 aq_desc_len = sizeof(struct i40e_aq_desc);
sys/dev/ixl/i40e_nvm.c
151
u32 total_delay = 0;
sys/dev/ixl/i40e_nvm.c
1530
u32 buff_size = 0;
sys/dev/ixl/i40e_nvm.c
1532
u32 aq_desc_len;
sys/dev/ixl/i40e_nvm.c
1533
u32 aq_data_len;
sys/dev/ixl/i40e_nvm.c
1557
buff_size = max(aq_data_len, (u32)LE16_TO_CPU(aq_desc->datalen));
sys/dev/ixl/i40e_nvm.c
1612
u32 aq_total_len;
sys/dev/ixl/i40e_nvm.c
1613
u32 aq_desc_len;
sys/dev/ixl/i40e_nvm.c
1641
u32 len = aq_desc_len - cmd->offset;
sys/dev/ixl/i40e_nvm.c
1681
u32 aq_total_len;
sys/dev/ixl/i40e_nvm.c
1682
u32 aq_desc_len;
sys/dev/ixl/i40e_nvm.c
181
u32 srctl, wait_cnt;
sys/dev/ixl/i40e_nvm.c
211
u32 sr_reg;
sys/dev/ixl/i40e_nvm.c
227
sr_reg = ((u32)offset << I40E_GLNVM_SRCTL_ADDR_SHIFT) |
sys/dev/ixl/i40e_nvm.c
261
u8 module_pointer, u32 offset,
sys/dev/ixl/i40e_nvm.c
50
u32 fla, gens;
sys/dev/ixl/i40e_nvm.c
595
u32 offset, u16 words, void *data,
sys/dev/ixl/i40e_nvm.c
641
enum i40e_status_code __i40e_write_nvm_word(struct i40e_hw *hw, u32 offset,
sys/dev/ixl/i40e_nvm.c
666
u8 module_pointer, u32 offset,
sys/dev/ixl/i40e_nvm.c
671
u32 i = 0;
sys/dev/ixl/i40e_nvm.c
747
if ((i >= (u32)vpd_module) &&
sys/dev/ixl/i40e_nvm.c
748
(i < ((u32)vpd_module +
sys/dev/ixl/i40e_nvm.c
753
if ((i >= (u32)pcie_alt_module) &&
sys/dev/ixl/i40e_nvm.c
754
(i < ((u32)pcie_alt_module +
sys/dev/ixl/i40e_nvm.c
869
static INLINE u8 i40e_nvmupd_get_module(u32 val)
sys/dev/ixl/i40e_nvm.c
873
static INLINE u8 i40e_nvmupd_get_transaction(u32 val)
sys/dev/ixl/i40e_nvm.c
878
static INLINE u8 i40e_nvmupd_get_preservation_flags(u32 val)
sys/dev/ixl/i40e_osdep.c
246
i40e_read_pci_cfg(struct i40e_hw *hw, u32 reg)
sys/dev/ixl/i40e_osdep.c
257
i40e_write_pci_cfg(struct i40e_hw *hw, u32 reg, u16 value)
sys/dev/ixl/i40e_osdep.c
51
i40e_allocate_virt_mem(struct i40e_hw *hw, struct i40e_virt_mem *mem, u32 size)
sys/dev/ixl/i40e_osdep.c
68
enum i40e_memory_type type __unused, u64 size, u32 alignment)
sys/dev/ixl/i40e_osdep.h
125
#define __le32 u32
sys/dev/ixl/i40e_osdep.h
128
#define __be32 u32
sys/dev/ixl/i40e_osdep.h
167
u32 size;
sys/dev/ixl/i40e_osdep.h
171
u16 i40e_read_pci_cfg(struct i40e_hw *, u32);
sys/dev/ixl/i40e_osdep.h
172
void i40e_write_pci_cfg(struct i40e_hw *, u32, u16);
sys/dev/ixl/i40e_prototype.h
101
u32 time, u32 interval);
sys/dev/ixl/i40e_prototype.h
103
u32 *reg_val);
sys/dev/ixl/i40e_prototype.h
105
u32 reg_val);
sys/dev/ixl/i40e_prototype.h
108
enum i40e_status_code i40e_get_lpi_counters(struct i40e_hw *hw, u32 *tx_counter,
sys/dev/ixl/i40e_prototype.h
109
u32 *rx_counter, bool *is_clear);
sys/dev/ixl/i40e_prototype.h
121
u32 *fw_build,
sys/dev/ixl/i40e_prototype.h
125
u32 reg_addr, u64 reg_val,
sys/dev/ixl/i40e_prototype.h
128
u32 reg_addr, u64 *reg_val,
sys/dev/ixl/i40e_prototype.h
237
u32 v_opcode, u32 v_retval, u8 *msg, u16 msglen,
sys/dev/ixl/i40e_prototype.h
256
u32 offset, u16 length, void *data,
sys/dev/ixl/i40e_prototype.h
260
u32 offset, u16 length, bool last_command,
sys/dev/ixl/i40e_prototype.h
263
u8 cmd_flags, u32 field_id, void *data,
sys/dev/ixl/i40e_prototype.h
272
u32 min_rrev,
sys/dev/ixl/i40e_prototype.h
282
u32 offset, u16 length, void *data,
sys/dev/ixl/i40e_prototype.h
433
u32 reg_addr0, u32 *reg_val0,
sys/dev/ixl/i40e_prototype.h
434
u32 reg_addr1, u32 *reg_val1);
sys/dev/ixl/i40e_prototype.h
436
u32 addr, u32 dw_count, void *buffer);
sys/dev/ixl/i40e_prototype.h
438
u32 reg_addr0, u32 reg_val0,
sys/dev/ixl/i40e_prototype.h
439
u32 reg_addr1, u32 reg_val1);
sys/dev/ixl/i40e_prototype.h
441
u32 addr, u32 dw_count, void *buffer);
sys/dev/ixl/i40e_prototype.h
457
u32 *max_bw, u32 *min_bw, bool *min_valid, bool *max_valid);
sys/dev/ixl/i40e_prototype.h
463
u32 pba_num_size);
sys/dev/ixl/i40e_prototype.h
464
void i40e_pre_tx_queue_cfg(struct i40e_hw *hw, u32 queue, bool enable);
sys/dev/ixl/i40e_prototype.h
479
u32 offset, u16 words, void *data,
sys/dev/ixl/i40e_prototype.h
485
enum i40e_status_code __i40e_write_nvm_word(struct i40e_hw *hw, u32 offset,
sys/dev/ixl/i40e_prototype.h
488
u32 offset, u16 words, void *data);
sys/dev/ixl/i40e_prototype.h
569
u8 table_id, u32 start_index, u16 buff_size,
sys/dev/ixl/i40e_prototype.h
571
u8 *ret_next_table, u32 *ret_next_index,
sys/dev/ixl/i40e_prototype.h
576
u32 reg_addr, u32 *reg_val,
sys/dev/ixl/i40e_prototype.h
578
u32 i40e_read_rx_ctl(struct i40e_hw *hw, u32 reg_addr);
sys/dev/ixl/i40e_prototype.h
580
u32 reg_addr, u32 reg_val,
sys/dev/ixl/i40e_prototype.h
582
void i40e_write_rx_ctl(struct i40e_hw *hw, u32 reg_addr, u32 reg_val);
sys/dev/ixl/i40e_prototype.h
587
u32 reg_addr, u32 reg_val,
sys/dev/ixl/i40e_prototype.h
593
u32 reg_addr, u32 *reg_val,
sys/dev/ixl/i40e_prototype.h
603
i40e_aq_run_phy_activity(struct i40e_hw *hw, u16 activity_id, u32 opcode,
sys/dev/ixl/i40e_prototype.h
604
u32 *cmd_status, u32 *data0, u32 *data1,
sys/dev/ixl/i40e_prototype.h
94
u32 i40e_led_get(struct i40e_hw *hw);
sys/dev/ixl/i40e_prototype.h
95
void i40e_led_set(struct i40e_hw *hw, u32 mode, bool blink);
sys/dev/ixl/i40e_prototype.h
97
u16 led_addr, u32 mode);
sys/dev/ixl/i40e_type.h
1490
u32 fd_atr_status;
sys/dev/ixl/i40e_type.h
1491
u32 fd_sb_status;
sys/dev/ixl/i40e_type.h
1493
u32 tx_lpi_status;
sys/dev/ixl/i40e_type.h
1494
u32 rx_lpi_status;
sys/dev/ixl/i40e_type.h
366
u32 switch_mode;
sys/dev/ixl/i40e_type.h
381
u32 management_mode;
sys/dev/ixl/i40e_type.h
382
u32 mng_protocols_over_mctp;
sys/dev/ixl/i40e_type.h
386
u32 npar_enable;
sys/dev/ixl/i40e_type.h
387
u32 os2bmc;
sys/dev/ixl/i40e_type.h
388
u32 valid_functions;
sys/dev/ixl/i40e_type.h
398
u32 flex10_mode;
sys/dev/ixl/i40e_type.h
403
u32 flex10_status;
sys/dev/ixl/i40e_type.h
416
u32 fd_filters_guaranteed;
sys/dev/ixl/i40e_type.h
417
u32 fd_filters_best_effort;
sys/dev/ixl/i40e_type.h
419
u32 rss_table_size;
sys/dev/ixl/i40e_type.h
420
u32 rss_table_entry_width;
sys/dev/ixl/i40e_type.h
423
u32 nvm_image_type;
sys/dev/ixl/i40e_type.h
424
u32 num_flow_director_filters;
sys/dev/ixl/i40e_type.h
425
u32 num_vfs;
sys/dev/ixl/i40e_type.h
426
u32 vf_base_id;
sys/dev/ixl/i40e_type.h
427
u32 num_vsis;
sys/dev/ixl/i40e_type.h
428
u32 num_rx_qp;
sys/dev/ixl/i40e_type.h
429
u32 num_tx_qp;
sys/dev/ixl/i40e_type.h
430
u32 base_queue;
sys/dev/ixl/i40e_type.h
431
u32 num_msix_vectors;
sys/dev/ixl/i40e_type.h
432
u32 num_msix_vectors_vf;
sys/dev/ixl/i40e_type.h
433
u32 led_pin_num;
sys/dev/ixl/i40e_type.h
434
u32 sdp_pin_num;
sys/dev/ixl/i40e_type.h
435
u32 mdio_port_num;
sys/dev/ixl/i40e_type.h
436
u32 mdio_port_mode;
sys/dev/ixl/i40e_type.h
438
u32 enabled_tcmap;
sys/dev/ixl/i40e_type.h
439
u32 maxtc;
sys/dev/ixl/i40e_type.h
467
u32 timeout; /* [ms] */
sys/dev/ixl/i40e_type.h
471
u32 eetrack; /* NVM data version */
sys/dev/ixl/i40e_type.h
472
u32 oem_ver; /* OEM version info */
sys/dev/ixl/i40e_type.h
542
u32 command;
sys/dev/ixl/i40e_type.h
543
u32 config;
sys/dev/ixl/i40e_type.h
544
u32 offset; /* in bytes */
sys/dev/ixl/i40e_type.h
545
u32 data_size; /* in bytes */
sys/dev/ixl/i40e_type.h
676
u32 numapps;
sys/dev/ixl/i40e_type.h
677
u32 tlv_status; /* CEE mode TLV status */
sys/dev/ixl/i40e_type.h
770
u32 debug_mask;
sys/dev/ixl/i40e_type.h
88
#define I40E_HI_DWORD(x) ((u32)((((x) >> 16) >> 16) & 0xFFFFFFFF))
sys/dev/ixl/i40e_type.h
89
#define I40E_LO_DWORD(x) ((u32)((x) & 0xFFFFFFFF))
sys/dev/ixl/i40e_type.h
979
u32 ptype:8;
sys/dev/ixl/i40e_type.h
980
u32 known:1;
sys/dev/ixl/i40e_type.h
981
u32 outer_ip:1;
sys/dev/ixl/i40e_type.h
982
u32 outer_ip_ver:1;
sys/dev/ixl/i40e_type.h
983
u32 outer_frag:1;
sys/dev/ixl/i40e_type.h
984
u32 tunnel_type:3;
sys/dev/ixl/i40e_type.h
985
u32 tunnel_end_prot:2;
sys/dev/ixl/i40e_type.h
986
u32 tunnel_end_frag:1;
sys/dev/ixl/i40e_type.h
987
u32 inner_prot:4;
sys/dev/ixl/i40e_type.h
988
u32 payload_layer:3;
sys/dev/ixl/if_ixl.c
1376
u32 rxq_idx, qtx_ctl;
sys/dev/ixl/if_ixl.c
1394
u32 loop = 0, reg;
sys/dev/ixl/if_ixl.c
420
* sizeof(struct i40e_tx_desc) + sizeof(u32), DBA_ALIGN);
sys/dev/ixl/ixl.h
138
#define IXL_TX_BUF_SZ ((u32) 1514)
sys/dev/ixl/ixl.h
139
#define IXL_AQ_BUF_SZ ((u32) 4096)
sys/dev/ixl/ixl.h
327
u32 tail;
sys/dev/ixl/ixl.h
330
u32 latency;
sys/dev/ixl/ixl.h
331
u32 packets;
sys/dev/ixl/ixl.h
332
u32 me;
sys/dev/ixl/ixl.h
343
u32 itr;
sys/dev/ixl/ixl.h
344
u32 bytes;
sys/dev/ixl/ixl.h
361
u32 itr;
sys/dev/ixl/ixl.h
362
u32 latency;
sys/dev/ixl/ixl.h
363
u32 mbuf_sz;
sys/dev/ixl/ixl.h
364
u32 tail;
sys/dev/ixl/ixl.h
365
u32 me;
sys/dev/ixl/ixl.h
368
u32 packets;
sys/dev/ixl/ixl.h
369
u32 bytes;
sys/dev/ixl/ixl.h
385
u32 msix;
sys/dev/ixl/ixl.h
395
u32 msix; /* This queue's MSIX vector */
sys/dev/ixl/ixl.h
418
u32 rx_itr_setting;
sys/dev/ixl/ixl.h
419
u32 tx_itr_setting;
sys/dev/ixl/ixl.h
431
u32 link_speed;
sys/dev/ixl/ixl.h
488
static inline u32
sys/dev/ixl/ixl.h
489
next_power_of_two(u32 n)
sys/dev/ixl/ixl.h
517
void ixl_debug_core(device_t dev, u32 enabled_mask, u32 mask, char *fmt, ...);
sys/dev/ixl/ixl.h
519
void ixl_get_default_rss_key(u32 *);
sys/dev/ixl/ixl_iw.c
328
u32 reg;
sys/dev/ixl/ixl_iw.c
54
u32 reg;
sys/dev/ixl/ixl_pf.h
102
u32 vf_flags;
sys/dev/ixl/ixl_pf.h
103
u32 num_mdd_events;
sys/dev/ixl/ixl_pf.h
126
u32 state;
sys/dev/ixl/ixl_pf.h
290
void ixl_set_state(volatile u32 *s, enum ixl_state bit);
sys/dev/ixl/ixl_pf.h
291
void ixl_clear_state(volatile u32 *s, enum ixl_state bit);
sys/dev/ixl/ixl_pf.h
292
bool ixl_test_state(volatile u32 *s, enum ixl_state bit);
sys/dev/ixl/ixl_pf.h
293
u32 ixl_testandset_state(volatile u32 *s, enum ixl_state bit);
sys/dev/ixl/ixl_pf.h
321
void ixl_stat_update64(struct i40e_hw *, u32, bool,
sys/dev/ixl/ixl_pf.h
323
void ixl_stat_update48(struct i40e_hw *, u32, bool,
sys/dev/ixl/ixl_pf.h
325
void ixl_stat_update32(struct i40e_hw *, u32, bool,
sys/dev/ixl/ixl_pf_i2c.c
114
u32 i2cctl = rd32(hw, IXL_I2C_REG(hw));
sys/dev/ixl/ixl_pf_i2c.c
165
u32 i2cctl = rd32(hw, IXL_I2C_REG(hw));
sys/dev/ixl/ixl_pf_i2c.c
201
u32 i = 0;
sys/dev/ixl/ixl_pf_i2c.c
202
u32 i2cctl = rd32(hw, IXL_I2C_REG(hw));
sys/dev/ixl/ixl_pf_i2c.c
203
u32 timeout = 10;
sys/dev/ixl/ixl_pf_i2c.c
252
u32 i2cctl = rd32(hw, IXL_I2C_REG(hw));
sys/dev/ixl/ixl_pf_i2c.c
288
u32 i2cctl;
sys/dev/ixl/ixl_pf_i2c.c
319
ixl_lower_i2c_clk(struct ixl_pf *pf, u32 *i2cctl)
sys/dev/ixl/ixl_pf_i2c.c
341
ixl_raise_i2c_clk(struct ixl_pf *pf, u32 *i2cctl)
sys/dev/ixl/ixl_pf_i2c.c
344
u32 i = 0;
sys/dev/ixl/ixl_pf_i2c.c
345
u32 timeout = IXL_I2C_CLOCK_STRETCHING_TIMEOUT;
sys/dev/ixl/ixl_pf_i2c.c
346
u32 i2cctl_r = 0;
sys/dev/ixl/ixl_pf_i2c.c
371
ixl_get_i2c_data(struct ixl_pf *pf, u32 *i2cctl)
sys/dev/ixl/ixl_pf_i2c.c
392
ixl_set_i2c_data(struct ixl_pf *pf, u32 *i2cctl, bool data)
sys/dev/ixl/ixl_pf_i2c.c
429
u32 i2cctl = rd32(hw, IXL_I2C_REG(hw));
sys/dev/ixl/ixl_pf_i2c.c
460
u32 max_retry = 10;
sys/dev/ixl/ixl_pf_i2c.c
461
u32 retry = 0;
sys/dev/ixl/ixl_pf_i2c.c
466
u32 i2cctl = rd32(hw, IXL_I2C_REG(hw));
sys/dev/ixl/ixl_pf_i2c.c
51
static s32 ixl_set_i2c_data(struct ixl_pf *pf, u32 *i2cctl, bool data);
sys/dev/ixl/ixl_pf_i2c.c
52
static bool ixl_get_i2c_data(struct ixl_pf *pf, u32 *i2cctl);
sys/dev/ixl/ixl_pf_i2c.c
53
static void ixl_raise_i2c_clk(struct ixl_pf *pf, u32 *i2cctl);
sys/dev/ixl/ixl_pf_i2c.c
54
static void ixl_lower_i2c_clk(struct ixl_pf *pf, u32 *i2cctl);
sys/dev/ixl/ixl_pf_i2c.c
550
u32 max_retry = 1;
sys/dev/ixl/ixl_pf_i2c.c
551
u32 retry = 0;
sys/dev/ixl/ixl_pf_i2c.c
553
u32 i2cctl = rd32(hw, IXL_I2C_REG(hw));
sys/dev/ixl/ixl_pf_i2c.c
615
u32 reg = 0;
sys/dev/ixl/ixl_pf_i2c.c
646
u32 reg = 0;
sys/dev/ixl/ixl_pf_i2c.c
680
u32 timeout = 100;
sys/dev/ixl/ixl_pf_i2c.c
681
u32 reg;
sys/dev/ixl/ixl_pf_i2c.c
704
u32 reg;
sys/dev/ixl/ixl_pf_i2c.c
77
u32 i2cctl = rd32(hw, IXL_I2C_REG(hw));
sys/dev/ixl/ixl_pf_i2c.c
78
u32 i;
sys/dev/ixl/ixl_pf_iflib.c
138
u32 reg, mask, rstat_reg;
sys/dev/ixl/ixl_pf_iflib.c
246
u32 reg;
sys/dev/ixl/ixl_pf_iflib.c
284
u32 reg;
sys/dev/ixl/ixl_pf_iflib.c
519
u32 txctl;
sys/dev/ixl/ixl_pf_iflib.c
773
u32 val;
sys/dev/ixl/ixl_pf_iflib.c
795
u32 val;
sys/dev/ixl/ixl_pf_iflib.c
81
u32 icr0;
sys/dev/ixl/ixl_pf_iflib.c
838
u32 lut = 0;
sys/dev/ixl/ixl_pf_iflib.c
868
wr32(hw, I40E_PFQF_HLUT(i), ((u32 *)hlut_buf)[i]);
sys/dev/ixl/ixl_pf_iov.c
1307
i40e_write_rx_ctl(hw, I40E_VFQF_HKEY1(i, vf->vf_num), ((u32 *)key->key)[i]);
sys/dev/ixl/ixl_pf_iov.c
1356
i40e_write_rx_ctl(hw, I40E_VFQF_HLUT1(i, vf->vf_num), ((u32 *)lut->lut)[i]);
sys/dev/ixl/ixl_pf_iov.c
1376
i40e_write_rx_ctl(hw, I40E_VFQF_HENA1(0, vf->vf_num), (u32)hena->hena);
sys/dev/ixl/ixl_pf_iov.c
1377
i40e_write_rx_ctl(hw, I40E_VFQF_HENA1(1, vf->vf_num), (u32)(hena->hena >> 32));
sys/dev/ixl/ixl_pf_iov.c
536
reply.vf_cap_flags = *(u32 *)msg & (
sys/dev/ixl/ixl_pf_main.c
1101
u32 rss_seed[IXL_RSS_KEY_SIZE_REG];
sys/dev/ixl/ixl_pf_main.c
1131
u32 rss_hash_config;
sys/dev/ixl/ixl_pf_main.c
1151
i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena);
sys/dev/ixl/ixl_pf_main.c
1152
i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
sys/dev/ixl/ixl_pf_main.c
134
ixl_set_state(volatile u32 *s, enum ixl_state bit)
sys/dev/ixl/ixl_pf_main.c
148
ixl_clear_state(volatile u32 *s, enum ixl_state bit)
sys/dev/ixl/ixl_pf_main.c
164
ixl_test_state(volatile u32 *s, enum ixl_state bit)
sys/dev/ixl/ixl_pf_main.c
1673
u32 reg;
sys/dev/ixl/ixl_pf_main.c
1709
u32 reg;
sys/dev/ixl/ixl_pf_main.c
1759
u32 reg;
sys/dev/ixl/ixl_pf_main.c
177
inline u32
sys/dev/ixl/ixl_pf_main.c
178
ixl_testandset_state(volatile u32 *s, enum ixl_state bit)
sys/dev/ixl/ixl_pf_main.c
1798
u32 reg;
sys/dev/ixl/ixl_pf_main.c
1851
u32 reg;
sys/dev/ixl/ixl_pf_main.c
1924
u32 reg;
sys/dev/ixl/ixl_pf_main.c
1996
u32 reg;
sys/dev/ixl/ixl_pf_main.c
2017
u32 reg;
sys/dev/ixl/ixl_pf_main.c
2029
u32 reg;
sys/dev/ixl/ixl_pf_main.c
2039
u32 reg;
sys/dev/ixl/ixl_pf_main.c
2050
u32 reg;
sys/dev/ixl/ixl_pf_main.c
238
u32 fwsts;
sys/dev/ixl/ixl_pf_main.c
2401
_ixl_stat_update_helper(struct i40e_hw *hw, u32 reg,
sys/dev/ixl/ixl_pf_main.c
2419
ixl_stat_update48(struct i40e_hw *hw, u32 reg,
sys/dev/ixl/ixl_pf_main.c
2434
ixl_stat_update64(struct i40e_hw *hw, u32 reg,
sys/dev/ixl/ixl_pf_main.c
2449
ixl_stat_update32(struct i40e_hw *hw, u32 reg,
sys/dev/ixl/ixl_pf_main.c
2452
u32 new_data;
sys/dev/ixl/ixl_pf_main.c
2458
*stat = (u32)(new_data - *offset);
sys/dev/ixl/ixl_pf_main.c
2460
*stat = (u32)((new_data + ((u64)1 << 32)) - *offset);
sys/dev/ixl/ixl_pf_main.c
3067
u32 offset, num_ports;
sys/dev/ixl/ixl_pf_main.c
3273
u32 reg;
sys/dev/ixl/ixl_pf_main.c
3296
u32 phy_type, phy_type_ext;
sys/dev/ixl/ixl_pf_main.c
3379
ixl_phy_type_string(u32 bit_pos, bool ext)
sys/dev/ixl/ixl_pf_main.c
4065
u32 reg;
sys/dev/ixl/ixl_pf_main.c
4156
u32 reg;
sys/dev/ixl/ixl_pf_main.c
4585
u32 curr_next_index = 0;
sys/dev/ixl/ixl_pf_main.c
4589
u32 ret_next_index;
sys/dev/ixl/ixl_pf_main.c
783
u32 reg;
sys/dev/ixl/ixl_txrx.c
134
ixl_debug_core(device_t dev, u32 enabled_mask, u32 mask, char *fmt, ...)
sys/dev/ixl/ixl_txrx.c
222
if_pkt_info_t pi, u32 *cmd, u32 *off)
sys/dev/ixl/ixl_txrx.c
284
u32 cmd, mss, type, tsolen;
sys/dev/ixl/ixl_txrx.c
348
u32 cmd, off, tx_intr;
sys/dev/ixl/ixl_txrx.c
451
static inline u32
sys/dev/ixl/ixl_txrx.c
53
static u8 ixl_rx_checksum(if_rxd_info_t ri, u32 status, u32 error, u8 ptype);
sys/dev/ixl/ixl_txrx.c
664
u32 status, error, fltstat;
sys/dev/ixl/ixl_txrx.c
742
ixl_rx_checksum(if_rxd_info_t ri, u32 status, u32 error, u8 ptype)
sys/dev/ixl/ixl_txrx.c
93
ixl_get_default_rss_key(u32 *key)
sys/dev/ixl/ixl_txrx.c
97
u32 rss_seed[IXL_RSS_KEY_SIZE_REG] = {0x41b01687,
sys/dev/ixl/virtchnl.h
170
u32 vfid; /* used by PF when sending to VF */
sys/dev/ixl/virtchnl.h
194
u32 major;
sys/dev/ixl/virtchnl.h
195
u32 minor;
sys/dev/ixl/virtchnl.h
271
u32 vf_cap_flags;
sys/dev/ixl/virtchnl.h
272
u32 rss_key_size;
sys/dev/ixl/virtchnl.h
273
u32 rss_lut_size;
sys/dev/ixl/virtchnl.h
308
u32 ring_len; /* number of descriptors, multiple of 32 */
sys/dev/ixl/virtchnl.h
311
u32 databuffer_size;
sys/dev/ixl/virtchnl.h
312
u32 max_pkt_size;
sys/dev/ixl/virtchnl.h
313
u32 pad1;
sys/dev/ixl/virtchnl.h
316
u32 pad2;
sys/dev/ixl/virtchnl.h
339
u32 pad;
sys/dev/ixl/virtchnl.h
396
u32 rx_queues;
sys/dev/ixl/virtchnl.h
397
u32 tx_queues;
sys/dev/ixl/virtchnl.h
564
u32 v_idx; /* msix_vector */
sys/dev/ixl/virtchnl.h
573
u32 num_vectors;
sys/dev/ixl/virtchnl.h
607
virtchnl_vc_validate_vf_msg(struct virtchnl_version_info *ver, u32 v_opcode,
sys/dev/ixl/virtchnl.h
622
valid_len = sizeof(u32);
sys/dev/mlx4/cmd.h
269
int out_is_imm, u32 in_modifier, u8 op_modifier,
sys/dev/mlx4/cmd.h
273
static inline int mlx4_cmd(struct mlx4_dev *dev, u64 in_param, u32 in_modifier,
sys/dev/mlx4/cmd.h
283
u32 in_modifier, u8 op_modifier, u16 op,
sys/dev/mlx4/cmd.h
296
u32 in_modifier, u8 op_modifier, u16 op,
sys/dev/mlx4/cmd.h
308
u32 mlx4_comm_get_version(void);
sys/dev/mlx4/cq.h
138
static inline void mlx4_cq_arm(struct mlx4_cq *cq, u32 cmd,
sys/dev/mlx4/cq.h
143
u32 sn;
sys/dev/mlx4/cq.h
144
u32 ci;
sys/dev/mlx4/cq.h
64
u32 reserved1[5];
sys/dev/mlx4/device.h
1039
static inline int mlx4_is_qp_reserved(struct mlx4_dev *dev, u32 qpn)
sys/dev/mlx4/device.h
1047
static inline int mlx4_is_guest_proxy(struct mlx4_dev *dev, int slave, u32 qpn)
sys/dev/mlx4/device.h
1084
int mlx4_pd_alloc(struct mlx4_dev *dev, u32 *pdn);
sys/dev/mlx4/device.h
1085
void mlx4_pd_free(struct mlx4_dev *dev, u32 pdn);
sys/dev/mlx4/device.h
1086
int mlx4_xrcd_alloc(struct mlx4_dev *dev, u32 *xrcdn);
sys/dev/mlx4/device.h
1087
void mlx4_xrcd_free(struct mlx4_dev *dev, u32 xrcdn);
sys/dev/mlx4/device.h
1099
int mlx4_mr_alloc(struct mlx4_dev *dev, u32 pd, u64 iova, u64 size, u32 access,
sys/dev/mlx4/device.h
1103
int mlx4_mw_alloc(struct mlx4_dev *dev, u32 pd, enum mlx4_mw_type type,
sys/dev/mlx4/device.h
1133
int mlx4_srq_alloc(struct mlx4_dev *dev, u32 pdn, u32 cqn, u16 xrcdn,
sys/dev/mlx4/device.h
1259
u32 qpn;
sys/dev/mlx4/device.h
1278
u32 rsvd2;
sys/dev/mlx4/device.h
1365
int mlx4_flow_steer_promisc_add(struct mlx4_dev *dev, u8 port, u32 qpn,
sys/dev/mlx4/device.h
1369
int mlx4_multicast_promisc_add(struct mlx4_dev *dev, u32 qpn, u8 port);
sys/dev/mlx4/device.h
1370
int mlx4_multicast_promisc_remove(struct mlx4_dev *dev, u32 qpn, u8 port);
sys/dev/mlx4/device.h
1371
int mlx4_unicast_promisc_add(struct mlx4_dev *dev, u32 qpn, u8 port);
sys/dev/mlx4/device.h
1372
int mlx4_unicast_promisc_remove(struct mlx4_dev *dev, u32 qpn, u8 port);
sys/dev/mlx4/device.h
1381
int mlx4_SET_PORT_qpn_calc(struct mlx4_dev *dev, u8 port, u32 base_qpn,
sys/dev/mlx4/device.h
1397
int npages, u64 iova, u32 *lkey, u32 *rkey);
sys/dev/mlx4/device.h
1398
int mlx4_fmr_alloc(struct mlx4_dev *dev, u32 pd, u32 access, int max_pages,
sys/dev/mlx4/device.h
1402
u32 *lkey, u32 *rkey);
sys/dev/mlx4/device.h
1408
const u32 offset[], u32 value[],
sys/dev/mlx4/device.h
1410
u32 mlx4_get_eqs_per_port(struct mlx4_dev *dev, u8 port);
sys/dev/mlx4/device.h
1422
int mlx4_counter_alloc(struct mlx4_dev *dev, u32 *idx);
sys/dev/mlx4/device.h
1423
void mlx4_counter_free(struct mlx4_dev *dev, u32 idx);
sys/dev/mlx4/device.h
1445
int mlx4_get_parav_qkey(struct mlx4_dev *dev, u32 qpn, u32 *qkey);
sys/dev/mlx4/device.h
1463
int mlx4_FLOW_STEERING_IB_UC_QP_RANGE(struct mlx4_dev *dev, u32 min_range_qpn,
sys/dev/mlx4/device.h
1464
u32 max_range_qpn);
sys/dev/mlx4/device.h
1500
int mlx4_virt2phy_port_map(struct mlx4_dev *dev, u32 port1, u32 port2);
sys/dev/mlx4/device.h
1510
u32 pdn);
sys/dev/mlx4/device.h
1513
u32 access);
sys/dev/mlx4/device.h
516
u32 gid_phys_table_len[MLX4_MAX_PORTS + 1];
sys/dev/mlx4/device.h
517
u32 pkey_phys_table_len[MLX4_MAX_PORTS + 1];
sys/dev/mlx4/device.h
518
u32 num_phys_eqs;
sys/dev/mlx4/device.h
519
u32 base_sqpn;
sys/dev/mlx4/device.h
520
u32 base_proxy_sqpn;
sys/dev/mlx4/device.h
521
u32 base_tunnel_sqpn;
sys/dev/mlx4/device.h
526
u32 function;
sys/dev/mlx4/device.h
541
u32 uar_page_size;
sys/dev/mlx4/device.h
553
u32 *qp0_qkey;
sys/dev/mlx4/device.h
554
u32 *qp0_proxy;
sys/dev/mlx4/device.h
555
u32 *qp1_proxy;
sys/dev/mlx4/device.h
556
u32 *qp0_tunnel;
sys/dev/mlx4/device.h
557
u32 *qp1_tunnel;
sys/dev/mlx4/device.h
588
u32 max_msg_sz;
sys/dev/mlx4/device.h
589
u32 page_size_cap;
sys/dev/mlx4/device.h
592
u32 bmme_flags;
sys/dev/mlx4/device.h
593
u32 reserved_lkey;
sys/dev/mlx4/device.h
607
u32 port_mask[MLX4_MAX_PORTS + 1];
sys/dev/mlx4/device.h
609
u32 max_counters;
sys/dev/mlx4/device.h
612
u32 eqe_size;
sys/dev/mlx4/device.h
613
u32 cqe_size;
sys/dev/mlx4/device.h
615
u32 userspace_caps; /* userspace must be aware of these */
sys/dev/mlx4/device.h
616
u32 function_caps; /* VFs must be aware of these */
sys/dev/mlx4/device.h
623
u32 dmfs_high_rate_qpn_base;
sys/dev/mlx4/device.h
624
u32 dmfs_high_rate_qpn_range;
sys/dev/mlx4/device.h
625
u32 vf_caps;
sys/dev/mlx4/device.h
644
u32 offset;
sys/dev/mlx4/device.h
685
u32 key;
sys/dev/mlx4/device.h
686
u32 pd;
sys/dev/mlx4/device.h
687
u32 access;
sys/dev/mlx4/device.h
697
u32 key;
sys/dev/mlx4/device.h
698
u32 pd;
sys/dev/mlx4/device.h
736
u32 cons_index;
sys/dev/mlx4/device.h
820
u32 reserved2[2];
sys/dev/mlx4/device.h
897
u32 raw[6];
sys/dev/mlx4/device.h
904
u32 reserved2;
sys/dev/mlx4/device.h
917
u32 reserved1;
sys/dev/mlx4/device.h
922
u32 reserved1[2];
sys/dev/mlx4/device.h
927
u32 reserved;
sys/dev/mlx4/device.h
928
u32 bit_vec[COMM_CHANNEL_BIT_ARRAY_SIZE];
sys/dev/mlx4/device.h
966
u32 reserved1[5];
sys/dev/mlx4/doorbell.h
79
__raw_writel((__force u32) val[0], dest);
sys/dev/mlx4/doorbell.h
80
__raw_writel((__force u32) val[1], (u8 *)dest + 4);
sys/dev/mlx4/mlx4_core/fw.h
122
u32 bmme_flags;
sys/dev/mlx4/mlx4_core/fw.h
123
u32 reserved_lkey;
sys/dev/mlx4/mlx4_core/fw.h
127
u32 max_counters;
sys/dev/mlx4/mlx4_core/fw.h
128
u32 dmfs_high_rate_qpn_base;
sys/dev/mlx4/mlx4_core/fw.h
129
u32 dmfs_high_rate_qpn_range;
sys/dev/mlx4/mlx4_core/fw.h
138
u32 pf_context_behaviour;
sys/dev/mlx4/mlx4_core/fw.h
147
u32 qp0_qkey;
sys/dev/mlx4/mlx4_core/fw.h
148
u32 qp0_tunnel_qpn;
sys/dev/mlx4/mlx4_core/fw.h
149
u32 qp0_proxy_qpn;
sys/dev/mlx4/mlx4_core/fw.h
150
u32 qp1_tunnel_qpn;
sys/dev/mlx4/mlx4_core/fw.h
151
u32 qp1_proxy_qpn;
sys/dev/mlx4/mlx4_core/fw.h
152
u32 reserved_lkey;
sys/dev/mlx4/mlx4_core/fw.h
157
u32 extra_flags;
sys/dev/mlx4/mlx4_core/fw.h
229
u32 cap_mask;
sys/dev/mlx4/mlx4_core/fw.h
89
u32 max_msg_sz;
sys/dev/mlx4/mlx4_core/fw_qos.h
51
u32 bw_share;
sys/dev/mlx4/mlx4_core/fw_qos.h
52
u32 max_avg_bw;
sys/dev/mlx4/mlx4_core/icm.h
73
int mlx4_table_get(struct mlx4_dev *dev, struct mlx4_icm_table *table, u32 obj,
sys/dev/mlx4/mlx4_core/icm.h
75
void mlx4_table_put(struct mlx4_dev *dev, struct mlx4_icm_table *table, u32 obj);
sys/dev/mlx4/mlx4_core/icm.h
77
u32 start, u32 end);
sys/dev/mlx4/mlx4_core/icm.h
79
u32 start, u32 end);
sys/dev/mlx4/mlx4_core/icm.h
81
u64 virt, int obj_size, u32 nobj, int reserved,
sys/dev/mlx4/mlx4_core/icm.h
84
void *mlx4_table_find(struct mlx4_icm_table *table, u32 obj, dma_addr_t *dma_handle);
sys/dev/mlx4/mlx4_core/mlx4.h
1017
int __mlx4_counter_alloc(struct mlx4_dev *dev, u32 *idx);
sys/dev/mlx4/mlx4_core/mlx4.h
1018
void __mlx4_counter_free(struct mlx4_dev *dev, u32 idx);
sys/dev/mlx4/mlx4_core/mlx4.h
1021
int __mlx4_xrcd_alloc(struct mlx4_dev *dev, u32 *xrcdn);
sys/dev/mlx4/mlx4_core/mlx4.h
1022
void __mlx4_xrcd_free(struct mlx4_dev *dev, u32 xrcdn);
sys/dev/mlx4/mlx4_core/mlx4.h
1203
void mlx4_cq_completion(struct mlx4_dev *dev, u32 cqn);
sys/dev/mlx4/mlx4_core/mlx4.h
1204
void mlx4_cq_event(struct mlx4_dev *dev, u32 cqn, int event_type);
sys/dev/mlx4/mlx4_core/mlx4.h
1206
void mlx4_qp_event(struct mlx4_dev *dev, u32 qpn, int event_type);
sys/dev/mlx4/mlx4_core/mlx4.h
1208
void mlx4_srq_event(struct mlx4_dev *dev, u32 srqn, int event_type);
sys/dev/mlx4/mlx4_core/mlx4.h
1355
static inline void set_param_l(u64 *arg, u32 val)
sys/dev/mlx4/mlx4_core/mlx4.h
1360
static inline void set_param_h(u64 *arg, u32 val)
sys/dev/mlx4/mlx4_core/mlx4.h
1365
static inline u32 get_param_l(u64 *arg)
sys/dev/mlx4/mlx4_core/mlx4.h
1367
return (u32) (*arg & 0xffffffff);
sys/dev/mlx4/mlx4_core/mlx4.h
1370
static inline u32 get_param_h(u64 *arg)
sys/dev/mlx4/mlx4_core/mlx4.h
1372
return (u32)(*arg >> 32);
sys/dev/mlx4/mlx4_core/mlx4.h
1428
u32 flags,
sys/dev/mlx4/mlx4_core/mlx4.h
1431
u32 *puid);
sys/dev/mlx4/mlx4_core/mlx4.h
1434
int mlx4_zone_remove_one(struct mlx4_zone_allocator *zone_alloc, u32 uid);
sys/dev/mlx4/mlx4_core/mlx4.h
1446
u32 mlx4_zone_alloc_entries(struct mlx4_zone_allocator *zones, u32 uid, int count,
sys/dev/mlx4/mlx4_core/mlx4.h
1447
int align, u32 skip_mask, u32 *puid);
sys/dev/mlx4/mlx4_core/mlx4.h
1452
u32 mlx4_zone_free_entries(struct mlx4_zone_allocator *zones,
sys/dev/mlx4/mlx4_core/mlx4.h
1453
u32 uid, u32 obj, u32 count);
sys/dev/mlx4/mlx4_core/mlx4.h
1459
u32 mlx4_zone_free_entries_unique(struct mlx4_zone_allocator *zones, u32 obj, u32 count);
sys/dev/mlx4/mlx4_core/mlx4.h
1462
struct mlx4_bitmap *mlx4_zone_get_bitmap(struct mlx4_zone_allocator *zones, u32 uid);
sys/dev/mlx4/mlx4_core/mlx4.h
178
u32 in_modifier;
sys/dev/mlx4/mlx4_core/mlx4.h
179
u32 errno;
sys/dev/mlx4/mlx4_core/mlx4.h
189
u32 reserved1;
sys/dev/mlx4/mlx4_core/mlx4.h
242
u32 last;
sys/dev/mlx4/mlx4_core/mlx4.h
243
u32 top;
sys/dev/mlx4/mlx4_core/mlx4.h
244
u32 max;
sys/dev/mlx4/mlx4_core/mlx4.h
245
u32 reserved_top;
sys/dev/mlx4/mlx4_core/mlx4.h
246
u32 mask;
sys/dev/mlx4/mlx4_core/mlx4.h
247
u32 avail;
sys/dev/mlx4/mlx4_core/mlx4.h
248
u32 effective_len;
sys/dev/mlx4/mlx4_core/mlx4.h
256
u32 max_order;
sys/dev/mlx4/mlx4_core/mlx4.h
265
u32 num_obj;
sys/dev/mlx4/mlx4_core/mlx4.h
338
u32 reserved6[2];
sys/dev/mlx4/mlx4_core/mlx4.h
341
u32 reserved7[4];
sys/dev/mlx4/mlx4_core/mlx4.h
361
u32 reserved4[2];
sys/dev/mlx4/mlx4_core/mlx4.h
371
u32 reserved2;
sys/dev/mlx4/mlx4_core/mlx4.h
381
u32 reserved5;
sys/dev/mlx4/mlx4_core/mlx4.h
389
u32 cons_index;
sys/dev/mlx4/mlx4_core/mlx4.h
395
u32 ncqs;
sys/dev/mlx4/mlx4_core/mlx4.h
397
u32 ref_count;
sys/dev/mlx4/mlx4_core/mlx4.h
404
u32 param;
sys/dev/mlx4/mlx4_core/mlx4.h
429
u32 catas_size;
sys/dev/mlx4/mlx4_core/mlx4.h
438
u32 slave_write;
sys/dev/mlx4/mlx4_core/mlx4.h
439
u32 slave_read;
sys/dev/mlx4/mlx4_core/mlx4.h
461
u32 qpn;
sys/dev/mlx4/mlx4_core/mlx4.h
493
u32 cookie;
sys/dev/mlx4/mlx4_core/mlx4.h
505
u32 tx_rate;
sys/dev/mlx4/mlx4_core/mlx4.h
558
u32 eqn;
sys/dev/mlx4/mlx4_core/mlx4.h
559
u32 cons;
sys/dev/mlx4/mlx4_core/mlx4.h
560
u32 prod;
sys/dev/mlx4/mlx4_core/mlx4.h
613
u32 reserved[2];
sys/dev/mlx4/mlx4_core/mlx4.h
683
u32 clr_mask;
sys/dev/mlx4/mlx4_core/mlx4.h
709
u32 zones_uids[MLX4_QP_TABLE_ZONE_NUM];
sys/dev/mlx4/mlx4_core/mlx4.h
710
u32 rdmarc_base;
sys/dev/mlx4/mlx4_core/mlx4.h
727
u32 __iomem *map;
sys/dev/mlx4/mlx4_core/mlx4.h
793
u32 reserved5;
sys/dev/mlx4/mlx4_core/mlx4.h
922
u32 mlx4_bitmap_alloc(struct mlx4_bitmap *bitmap);
sys/dev/mlx4/mlx4_core/mlx4.h
923
void mlx4_bitmap_free(struct mlx4_bitmap *bitmap, u32 obj, int use_rr);
sys/dev/mlx4/mlx4_core/mlx4.h
924
u32 mlx4_bitmap_alloc_range(struct mlx4_bitmap *bitmap, int cnt,
sys/dev/mlx4/mlx4_core/mlx4.h
925
int align, u32 skip_mask);
sys/dev/mlx4/mlx4_core/mlx4.h
926
void mlx4_bitmap_free_range(struct mlx4_bitmap *bitmap, u32 obj, int cnt,
sys/dev/mlx4/mlx4_core/mlx4.h
928
u32 mlx4_bitmap_avail(struct mlx4_bitmap *bitmap);
sys/dev/mlx4/mlx4_core/mlx4.h
929
int mlx4_bitmap_init(struct mlx4_bitmap *bitmap, u32 num, u32 mask,
sys/dev/mlx4/mlx4_core/mlx4.h
930
u32 reserved_bot, u32 resetrved_top);
sys/dev/mlx4/mlx4_core/mlx4.h
964
void __mlx4_mpt_release(struct mlx4_dev *dev, u32 index);
sys/dev/mlx4/mlx4_core/mlx4.h
965
int __mlx4_mpt_alloc_icm(struct mlx4_dev *dev, u32 index, gfp_t gfp);
sys/dev/mlx4/mlx4_core/mlx4.h
966
void __mlx4_mpt_free_icm(struct mlx4_dev *dev, u32 index);
sys/dev/mlx4/mlx4_core/mlx4.h
967
u32 __mlx4_alloc_mtt_range(struct mlx4_dev *dev, int order);
sys/dev/mlx4/mlx4_core/mlx4.h
968
void __mlx4_free_mtt_range(struct mlx4_dev *dev, u32 first_seg, int order);
sys/dev/mlx4/mlx4_core/mlx4_alloc.c
108
u32 mlx4_bitmap_alloc_range(struct mlx4_bitmap *bitmap, int cnt,
sys/dev/mlx4/mlx4_core/mlx4_alloc.c
109
int align, u32 skip_mask)
sys/dev/mlx4/mlx4_core/mlx4_alloc.c
111
u32 obj;
sys/dev/mlx4/mlx4_core/mlx4_alloc.c
146
u32 mlx4_bitmap_avail(struct mlx4_bitmap *bitmap)
sys/dev/mlx4/mlx4_core/mlx4_alloc.c
151
static u32 mlx4_bitmap_masked_value(struct mlx4_bitmap *bitmap, u32 obj)
sys/dev/mlx4/mlx4_core/mlx4_alloc.c
156
void mlx4_bitmap_free_range(struct mlx4_bitmap *bitmap, u32 obj, int cnt,
sys/dev/mlx4/mlx4_core/mlx4_alloc.c
172
int mlx4_bitmap_init(struct mlx4_bitmap *bitmap, u32 num, u32 mask,
sys/dev/mlx4/mlx4_core/mlx4_alloc.c
173
u32 reserved_bot, u32 reserved_top)
sys/dev/mlx4/mlx4_core/mlx4_alloc.c
205
u32 last_uid;
sys/dev/mlx4/mlx4_core/mlx4_alloc.c
206
u32 mask;
sys/dev/mlx4/mlx4_core/mlx4_alloc.c
215
u32 uid;
sys/dev/mlx4/mlx4_core/mlx4_alloc.c
243
u32 flags,
sys/dev/mlx4/mlx4_core/mlx4_alloc.c
246
u32 *puid)
sys/dev/mlx4/mlx4_core/mlx4_alloc.c
248
u32 mask = mlx4_bitmap_masked_value(bitmap, (u32)-1);
sys/dev/mlx4/mlx4_core/mlx4_alloc.c
306
u32 mask = 0;
sys/dev/mlx4/mlx4_core/mlx4_alloc.c
310
u32 cur_mask = mlx4_bitmap_masked_value(it->bitmap, (u32)-1);
sys/dev/mlx4/mlx4_core/mlx4_alloc.c
338
static u32 __mlx4_alloc_from_zone(struct mlx4_zone_entry *zone, int count,
sys/dev/mlx4/mlx4_core/mlx4_alloc.c
339
int align, u32 skip_mask, u32 *puid)
sys/dev/mlx4/mlx4_core/mlx4_alloc.c
341
u32 uid = 0;
sys/dev/mlx4/mlx4_core/mlx4_alloc.c
342
u32 res;
sys/dev/mlx4/mlx4_core/mlx4_alloc.c
349
if (res != (u32)-1) {
sys/dev/mlx4/mlx4_core/mlx4_alloc.c
366
if (res != (u32)-1) {
sys/dev/mlx4/mlx4_core/mlx4_alloc.c
386
if (res != (u32)-1) {
sys/dev/mlx4/mlx4_core/mlx4_alloc.c
405
if (res != (u32)-1) {
sys/dev/mlx4/mlx4_core/mlx4_alloc.c
414
if (NULL != puid && res != (u32)-1)
sys/dev/mlx4/mlx4_core/mlx4_alloc.c
420
static void __mlx4_free_from_zone(struct mlx4_zone_entry *zone, u32 obj,
sys/dev/mlx4/mlx4_core/mlx4_alloc.c
421
u32 count)
sys/dev/mlx4/mlx4_core/mlx4_alloc.c
428
struct mlx4_zone_allocator *zones, u32 uid)
sys/dev/mlx4/mlx4_core/mlx4_alloc.c
43
u32 mlx4_bitmap_alloc(struct mlx4_bitmap *bitmap)
sys/dev/mlx4/mlx4_core/mlx4_alloc.c
440
struct mlx4_bitmap *mlx4_zone_get_bitmap(struct mlx4_zone_allocator *zones, u32 uid)
sys/dev/mlx4/mlx4_core/mlx4_alloc.c
45
u32 obj;
sys/dev/mlx4/mlx4_core/mlx4_alloc.c
456
int mlx4_zone_remove_one(struct mlx4_zone_allocator *zones, u32 uid)
sys/dev/mlx4/mlx4_core/mlx4_alloc.c
481
struct mlx4_zone_allocator *zones, u32 obj)
sys/dev/mlx4/mlx4_core/mlx4_alloc.c
484
u32 dist = (u32)-1;
sys/dev/mlx4/mlx4_core/mlx4_alloc.c
494
u32 mobj = (obj - zone->offset) & zones->mask;
sys/dev/mlx4/mlx4_core/mlx4_alloc.c
497
u32 curr_dist = zone->bitmap->effective_len;
sys/dev/mlx4/mlx4_core/mlx4_alloc.c
510
u32 mlx4_zone_alloc_entries(struct mlx4_zone_allocator *zones, u32 uid, int count,
sys/dev/mlx4/mlx4_core/mlx4_alloc.c
511
int align, u32 skip_mask, u32 *puid)
sys/dev/mlx4/mlx4_core/mlx4_alloc.c
531
u32 mlx4_zone_free_entries(struct mlx4_zone_allocator *zones, u32 uid, u32 obj, u32 count)
sys/dev/mlx4/mlx4_core/mlx4_alloc.c
553
u32 mlx4_zone_free_entries_unique(struct mlx4_zone_allocator *zones, u32 obj, u32 count)
sys/dev/mlx4/mlx4_core/mlx4_alloc.c
73
void mlx4_bitmap_free(struct mlx4_bitmap *bitmap, u32 obj, int use_rr)
sys/dev/mlx4/mlx4_core/mlx4_alloc.c
79
u32 start, u32 nbits,
sys/dev/mlx4/mlx4_core/mlx4_alloc.c
80
int len, int align, u32 skip_mask)
sys/dev/mlx4/mlx4_core/mlx4_alloc.c
99
if (test_bit(i, bitmap) || ((u32)i & skip_mask)) {
sys/dev/mlx4/mlx4_core/mlx4_catas.c
100
u32 rst_req;
sys/dev/mlx4/mlx4_core/mlx4_catas.c
101
u32 rst_ack;
sys/dev/mlx4/mlx4_core/mlx4_catas.c
120
rst_req = (comm_flags & (u32)(1 << COM_CHAN_RST_REQ_OFFSET)) >>
sys/dev/mlx4/mlx4_core/mlx4_catas.c
122
rst_ack = (comm_flags & (u32)(1 << COM_CHAN_RST_ACK_OFFSET)) >>
sys/dev/mlx4/mlx4_core/mlx4_catas.c
132
__raw_writel((__force u32)cpu_to_be32(comm_flags),
sys/dev/mlx4/mlx4_core/mlx4_catas.c
143
rst_ack = (comm_flags & (u32)(1 << COM_CHAN_RST_ACK_OFFSET)) >>
sys/dev/mlx4/mlx4_core/mlx4_catas.c
150
rst_req = (comm_flags & (u32)(1 << COM_CHAN_RST_REQ_OFFSET)) >>
sys/dev/mlx4/mlx4_core/mlx4_catas.c
163
static int mlx4_comm_internal_err(u32 slave_read)
sys/dev/mlx4/mlx4_core/mlx4_catas.c
165
return (u32)COMM_CHAN_EVENT_INTERNAL_ERR ==
sys/dev/mlx4/mlx4_core/mlx4_catas.c
166
(slave_read & (u32)COMM_CHAN_EVENT_INTERNAL_ERR) ? 1 : 0;
sys/dev/mlx4/mlx4_core/mlx4_catas.c
233
u32 slave_read;
sys/dev/mlx4/mlx4_core/mlx4_catas.c
99
u32 comm_flags;
sys/dev/mlx4/mlx4_core/mlx4_cmd.c
2101
u32 reply;
sys/dev/mlx4/mlx4_core/mlx4_cmd.c
2107
reply = (u32) slave_state[slave].comm_toggle << 31;
sys/dev/mlx4/mlx4_core/mlx4_cmd.c
2201
__raw_writel((__force u32) cpu_to_be32(reply),
sys/dev/mlx4/mlx4_core/mlx4_cmd.c
2218
reply |= ((u32)COMM_CHAN_EVENT_INTERNAL_ERR);
sys/dev/mlx4/mlx4_core/mlx4_cmd.c
2229
__raw_writel((__force u32) cpu_to_be32(reply),
sys/dev/mlx4/mlx4_core/mlx4_cmd.c
2247
u32 comm_cmd;
sys/dev/mlx4/mlx4_core/mlx4_cmd.c
2248
u32 vec;
sys/dev/mlx4/mlx4_core/mlx4_cmd.c
2253
u32 slt;
sys/dev/mlx4/mlx4_core/mlx4_cmd.c
2296
u32 wr_toggle;
sys/dev/mlx4/mlx4_core/mlx4_cmd.c
2297
u32 rd_toggle;
sys/dev/mlx4/mlx4_core/mlx4_cmd.c
2331
__raw_writel((__force u32) 0, &priv->mfunc.comm->slave_read);
sys/dev/mlx4/mlx4_core/mlx4_cmd.c
2332
__raw_writel((__force u32) 0, &priv->mfunc.comm->slave_write);
sys/dev/mlx4/mlx4_core/mlx4_cmd.c
2389
__raw_writel((__force u32) 0,
sys/dev/mlx4/mlx4_core/mlx4_cmd.c
2391
__raw_writel((__force u32) 0,
sys/dev/mlx4/mlx4_core/mlx4_cmd.c
2543
u32 slave_read;
sys/dev/mlx4/mlx4_core/mlx4_cmd.c
2557
slave_read |= (u32)COMM_CHAN_EVENT_INTERNAL_ERR;
sys/dev/mlx4/mlx4_core/mlx4_cmd.c
2558
__raw_writel((__force u32)cpu_to_be32(slave_read),
sys/dev/mlx4/mlx4_core/mlx4_cmd.c
257
u32 status = readl(&priv->mfunc.comm->slave_read);
sys/dev/mlx4/mlx4_core/mlx4_cmd.c
265
u32 val;
sys/dev/mlx4/mlx4_core/mlx4_cmd.c
2717
u32 mlx4_comm_get_version(void)
sys/dev/mlx4/mlx4_core/mlx4_cmd.c
2719
return ((u32) CMD_CHAN_IF_REV << 8) | (u32) CMD_CHAN_VER;
sys/dev/mlx4/mlx4_core/mlx4_cmd.c
281
__raw_writel((__force u32) cpu_to_be32(val),
sys/dev/mlx4/mlx4_core/mlx4_cmd.c
3182
u32 if_stat_in_mod;
sys/dev/mlx4/mlx4_core/mlx4_cmd.c
420
u32 status;
sys/dev/mlx4/mlx4_core/mlx4_cmd.c
433
u32 in_modifier, u8 op_modifier, u16 op, u16 token,
sys/dev/mlx4/mlx4_core/mlx4_cmd.c
437
u32 __iomem *hcr = cmd->hcr;
sys/dev/mlx4/mlx4_core/mlx4_cmd.c
482
__raw_writel((__force u32) cpu_to_be32(in_param >> 32), hcr + 0);
sys/dev/mlx4/mlx4_core/mlx4_cmd.c
483
__raw_writel((__force u32) cpu_to_be32(in_param & 0xfffffffful), hcr + 1);
sys/dev/mlx4/mlx4_core/mlx4_cmd.c
484
__raw_writel((__force u32) cpu_to_be32(in_modifier), hcr + 2);
sys/dev/mlx4/mlx4_core/mlx4_cmd.c
485
__raw_writel((__force u32) cpu_to_be32(out_param >> 32), hcr + 3);
sys/dev/mlx4/mlx4_core/mlx4_cmd.c
486
__raw_writel((__force u32) cpu_to_be32(out_param & 0xfffffffful), hcr + 4);
sys/dev/mlx4/mlx4_core/mlx4_cmd.c
487
__raw_writel((__force u32) cpu_to_be32(token << 16), hcr + 5);
sys/dev/mlx4/mlx4_core/mlx4_cmd.c
492
__raw_writel((__force u32) cpu_to_be32((1 << HCR_GO_BIT) |
sys/dev/mlx4/mlx4_core/mlx4_cmd.c
518
int out_is_imm, u32 in_modifier, u8 op_modifier,
sys/dev/mlx4/mlx4_core/mlx4_cmd.c
583
int out_is_imm, u32 in_modifier, u8 op_modifier,
sys/dev/mlx4/mlx4_core/mlx4_cmd.c
590
u32 stat;
sys/dev/mlx4/mlx4_core/mlx4_cmd.c
684
int out_is_imm, u32 in_modifier, u8 op_modifier,
sys/dev/mlx4/mlx4_core/mlx4_cmd.c
781
int out_is_imm, u32 in_modifier, u8 op_modifier,
sys/dev/mlx4/mlx4_core/mlx4_cmd.c
906
u32 index;
sys/dev/mlx4/mlx4_core/mlx4_cq.c
103
int cq_num, u32 opmod)
sys/dev/mlx4/mlx4_core/mlx4_cq.c
54
void mlx4_cq_completion(struct mlx4_dev *dev, u32 cqn)
sys/dev/mlx4/mlx4_core/mlx4_cq.c
70
void mlx4_cq_event(struct mlx4_dev *dev, u32 cqn, int event_type)
sys/dev/mlx4/mlx4_core/mlx4_eq.c
106
static struct mlx4_eqe *get_eqe(struct mlx4_eq *eq, u32 entry, u8 eqe_factor,
sys/dev/mlx4/mlx4_core/mlx4_eq.c
1395
u32 mlx4_get_eqs_per_port(struct mlx4_dev *dev, u8 port)
sys/dev/mlx4/mlx4_core/mlx4_eq.c
1426
u32 min_ref_count_val = (u32)-1;
sys/dev/mlx4/mlx4_core/mlx4_eq.c
437
cpu_to_be32((u32) attr);
sys/dev/mlx4/mlx4_core/mlx4_eq.c
499
u32 flr_slave;
sys/dev/mlx4/mlx4_core/mlx4_eq.c
869
u32 in_modifier = vhcr->in_modifier;
sys/dev/mlx4/mlx4_core/mlx4_eq.c
870
u32 eqn = in_modifier & 0x3FF;
sys/dev/mlx4/mlx4_core/mlx4_eq.c
99
__raw_writel((__force u32) cpu_to_be32((eq->cons_index & 0xffffff) |
sys/dev/mlx4/mlx4_core/mlx4_fw.c
1173
u32 *outbox;
sys/dev/mlx4/mlx4_core/mlx4_fw.c
1175
u32 field32;
sys/dev/mlx4/mlx4_core/mlx4_fw.c
1266
u32 bmme_flags, field32;
sys/dev/mlx4/mlx4_core/mlx4_fw.c
1377
u32 flags;
sys/dev/mlx4/mlx4_core/mlx4_fw.c
1473
u32 *outbox;
sys/dev/mlx4/mlx4_core/mlx4_fw.c
1605
u32 *outbox;
sys/dev/mlx4/mlx4_core/mlx4_fw.c
1773
u32 *bid_u32 = (u32 *)board_id;
sys/dev/mlx4/mlx4_core/mlx4_fw.c
1776
typedef struct { u32 value; } __packed u64_p_t;
sys/dev/mlx4/mlx4_core/mlx4_fw.c
1778
u32 *addr;
sys/dev/mlx4/mlx4_core/mlx4_fw.c
1779
u32 val;
sys/dev/mlx4/mlx4_core/mlx4_fw.c
1781
addr = (u32 *) (vsd + VSD_OFFSET_MLX_BOARD_ID + i * 4);
sys/dev/mlx4/mlx4_core/mlx4_fw.c
1792
u32 *outbox;
sys/dev/mlx4/mlx4_core/mlx4_fw.c
180
u32 *inbox;
sys/dev/mlx4/mlx4_core/mlx4_fw.c
2053
u32 dword_field;
sys/dev/mlx4/mlx4_core/mlx4_fw.c
206
u32 *outbox;
sys/dev/mlx4/mlx4_core/mlx4_fw.c
2262
u32 *inbox;
sys/dev/mlx4/mlx4_core/mlx4_fw.c
2264
u32 flags;
sys/dev/mlx4/mlx4_core/mlx4_fw.c
2516
int mlx4_virt2phy_port_map(struct mlx4_dev *dev, u32 port1, u32 port2)
sys/dev/mlx4/mlx4_core/mlx4_fw.c
2570
const u32 offset[],
sys/dev/mlx4/mlx4_core/mlx4_fw.c
2571
u32 value[], size_t array_len, u8 port)
sys/dev/mlx4/mlx4_core/mlx4_fw.c
2574
u32 *outbox;
sys/dev/mlx4/mlx4_core/mlx4_fw.c
2608
u32 *outbox;
sys/dev/mlx4/mlx4_core/mlx4_fw.c
2610
u32 in_mod;
sys/dev/mlx4/mlx4_core/mlx4_fw.c
2611
u32 guid_hi, guid_lo;
sys/dev/mlx4/mlx4_core/mlx4_fw.c
2645
u32 in_mod = MLX4_WOL_SETUP_MODE | port << 8;
sys/dev/mlx4/mlx4_core/mlx4_fw.c
2655
u32 in_mod = MLX4_WOL_SETUP_MODE | port << 8;
sys/dev/mlx4/mlx4_core/mlx4_fw.c
2675
u32 *outbox;
sys/dev/mlx4/mlx4_core/mlx4_fw.c
2676
u32 modifier;
sys/dev/mlx4/mlx4_core/mlx4_fw.c
2680
u32 num_qps;
sys/dev/mlx4/mlx4_core/mlx4_fw.c
2748
err = mlx4_cmd(dev, 0, ((u32) err |
sys/dev/mlx4/mlx4_core/mlx4_fw.c
2749
(__force u32)cpu_to_be32(token) << 16),
sys/dev/mlx4/mlx4_core/mlx4_fw.c
2773
u32 set_attr_mask, getresp_attr_mask;
sys/dev/mlx4/mlx4_core/mlx4_fw.c
2774
u32 trap_attr_mask, traprepress_attr_mask;
sys/dev/mlx4/mlx4_core/mlx4_fw.c
2993
u32 in_mod;
sys/dev/mlx4/mlx4_core/mlx4_fw.c
332
u32 size, proxy_qp, qkey;
sys/dev/mlx4/mlx4_core/mlx4_fw.c
542
u32 *outbox;
sys/dev/mlx4/mlx4_core/mlx4_fw.c
544
u32 size, qkey;
sys/dev/mlx4/mlx4_core/mlx4_fw.c
546
u32 in_modifier;
sys/dev/mlx4/mlx4_core/mlx4_fw.c
547
u32 slave_caps;
sys/dev/mlx4/mlx4_core/mlx4_fw.c
727
u32 *outbox;
sys/dev/mlx4/mlx4_core/mlx4_fw.c
729
u32 field32, flags, ext_flags;
sys/dev/mlx4/mlx4_core/mlx4_fw_qos.c
117
u32 in_mod;
sys/dev/mlx4/mlx4_core/mlx4_fw_qos.c
90
u32 in_mod;
sys/dev/mlx4/mlx4_core/mlx4_icm.c
233
static int mlx4_UNMAP_ICM(struct mlx4_dev *dev, u64 virt, u32 page_count)
sys/dev/mlx4/mlx4_core/mlx4_icm.c
250
int mlx4_table_get(struct mlx4_dev *dev, struct mlx4_icm_table *table, u32 obj,
sys/dev/mlx4/mlx4_core/mlx4_icm.c
253
u32 i = (obj & (table->num_obj - 1)) /
sys/dev/mlx4/mlx4_core/mlx4_icm.c
287
void mlx4_table_put(struct mlx4_dev *dev, struct mlx4_icm_table *table, u32 obj)
sys/dev/mlx4/mlx4_core/mlx4_icm.c
289
u32 i;
sys/dev/mlx4/mlx4_core/mlx4_icm.c
307
void *mlx4_table_find(struct mlx4_icm_table *table, u32 obj,
sys/dev/mlx4/mlx4_core/mlx4_icm.c
355
u32 start, u32 end)
sys/dev/mlx4/mlx4_core/mlx4_icm.c
359
u32 i;
sys/dev/mlx4/mlx4_core/mlx4_icm.c
379
u32 start, u32 end)
sys/dev/mlx4/mlx4_core/mlx4_icm.c
381
u32 i;
sys/dev/mlx4/mlx4_core/mlx4_icm.c
388
u64 virt, int obj_size, u32 nobj, int reserved,
sys/dev/mlx4/mlx4_core/mlx4_main.c
1830
u32 clockhi, clocklo, clockhi1;
sys/dev/mlx4/mlx4_core/mlx4_main.c
1925
u32 comm_flags;
sys/dev/mlx4/mlx4_core/mlx4_main.c
1926
u32 offline_bit;
sys/dev/mlx4/mlx4_core/mlx4_main.c
1935
(u32)(1 << COMM_CHAN_OFFLINE_OFFSET));
sys/dev/mlx4/mlx4_core/mlx4_main.c
1954
u32 comm_rst;
sys/dev/mlx4/mlx4_core/mlx4_main.c
1955
u32 comm_caps;
sys/dev/mlx4/mlx4_core/mlx4_main.c
1959
comm_rst = (comm_caps & (u32)(1 << COMM_CHAN_RST_OFFSET));
sys/dev/mlx4/mlx4_core/mlx4_main.c
1970
u32 slave_read;
sys/dev/mlx4/mlx4_core/mlx4_main.c
1971
u32 cmd_channel_ver;
sys/dev/mlx4/mlx4_core/mlx4_main.c
2459
u32 idx;
sys/dev/mlx4/mlx4_core/mlx4_main.c
2491
int __mlx4_counter_alloc(struct mlx4_dev *dev, u32 *idx)
sys/dev/mlx4/mlx4_core/mlx4_main.c
2507
int mlx4_counter_alloc(struct mlx4_dev *dev, u32 *idx)
sys/dev/mlx4/mlx4_core/mlx4_main.c
2530
u32 if_stat_in_mod = (counter_index & 0xff) | MLX4_QUERY_IF_STAT_RESET;
sys/dev/mlx4/mlx4_core/mlx4_main.c
2544
void __mlx4_counter_free(struct mlx4_dev *dev, u32 idx)
sys/dev/mlx4/mlx4_core/mlx4_main.c
2558
void mlx4_counter_free(struct mlx4_dev *dev, u32 idx)
sys/dev/mlx4/mlx4_core/mlx4_main.c
3065
u32 ret;
sys/dev/mlx4/mlx4_core/mlx4_main.c
423
dev->caps.page_size_cap = ~(u32) (dev_cap->min_page_sz - 1);
sys/dev/mlx4/mlx4_core/mlx4_main.c
631
u32 lnkcap1, lnkcap2;
sys/dev/mlx4/mlx4_core/mlx4_main.c
726
int mlx4_get_parav_qkey(struct mlx4_dev *dev, u32 qpn, u32 *qkey)
sys/dev/mlx4/mlx4_core/mlx4_main.c
728
u32 qk = MLX4_RESERVED_QKEY_BASE;
sys/dev/mlx4/mlx4_core/mlx4_main.c
810
u32 page_size;
sys/dev/mlx4/mlx4_core/mlx4_main.c
914
dev->caps.qp0_qkey = kcalloc(dev->caps.num_ports, sizeof(u32), GFP_KERNEL);
sys/dev/mlx4/mlx4_core/mlx4_main.c
915
dev->caps.qp0_tunnel = kcalloc(dev->caps.num_ports, sizeof (u32), GFP_KERNEL);
sys/dev/mlx4/mlx4_core/mlx4_main.c
916
dev->caps.qp0_proxy = kcalloc(dev->caps.num_ports, sizeof (u32), GFP_KERNEL);
sys/dev/mlx4/mlx4_core/mlx4_main.c
917
dev->caps.qp1_tunnel = kcalloc(dev->caps.num_ports, sizeof (u32), GFP_KERNEL);
sys/dev/mlx4/mlx4_core/mlx4_main.c
918
dev->caps.qp1_proxy = kcalloc(dev->caps.num_ports, sizeof (u32), GFP_KERNEL);
sys/dev/mlx4/mlx4_core/mlx4_mcg.c
101
in_mod = (u32) port << 16 | steer << 1;
sys/dev/mlx4/mlx4_core/mlx4_mcg.c
1087
int mlx4_FLOW_STEERING_IB_UC_QP_RANGE(struct mlx4_dev *dev, u32 min_range_qpn,
sys/dev/mlx4/mlx4_core/mlx4_mcg.c
1088
u32 max_range_qpn)
sys/dev/mlx4/mlx4_core/mlx4_mcg.c
1111
u32 members_count;
sys/dev/mlx4/mlx4_core/mlx4_mcg.c
1171
mgm->members_count = cpu_to_be32(members_count | (u32) prot << 30);
sys/dev/mlx4/mlx4_core/mlx4_mcg.c
1220
u32 members_count;
sys/dev/mlx4/mlx4_core/mlx4_mcg.c
125
u32 qpn)
sys/dev/mlx4/mlx4_core/mlx4_mcg.c
1270
mgm->members_count = cpu_to_be32(--members_count | (u32) prot << 30);
sys/dev/mlx4/mlx4_core/mlx4_mcg.c
1281
mgm->members_count = cpu_to_be32((u32) prot << 30);
sys/dev/mlx4/mlx4_core/mlx4_mcg.c
1466
u32 qpn, enum mlx4_net_trans_promisc_mode mode)
sys/dev/mlx4/mlx4_core/mlx4_mcg.c
149
unsigned int index, u32 qpn)
sys/dev/mlx4/mlx4_core/mlx4_mcg.c
154
u32 members_count;
sys/dev/mlx4/mlx4_core/mlx4_mcg.c
1563
u32 qpn = (u32) vhcr->in_param & 0xffffffff;
sys/dev/mlx4/mlx4_core/mlx4_mcg.c
158
u32 prot;
sys/dev/mlx4/mlx4_core/mlx4_mcg.c
1580
static int mlx4_PROMISC(struct mlx4_dev *dev, u32 qpn,
sys/dev/mlx4/mlx4_core/mlx4_mcg.c
1583
return mlx4_cmd(dev, (u64) qpn | (u64) port << 62, (u32) steer, add,
sys/dev/mlx4/mlx4_core/mlx4_mcg.c
1588
int mlx4_multicast_promisc_add(struct mlx4_dev *dev, u32 qpn, u8 port)
sys/dev/mlx4/mlx4_core/mlx4_mcg.c
1597
int mlx4_multicast_promisc_remove(struct mlx4_dev *dev, u32 qpn, u8 port)
sys/dev/mlx4/mlx4_core/mlx4_mcg.c
1606
int mlx4_unicast_promisc_add(struct mlx4_dev *dev, u32 qpn, u8 port)
sys/dev/mlx4/mlx4_core/mlx4_mcg.c
1615
int mlx4_unicast_promisc_remove(struct mlx4_dev *dev, u32 qpn, u8 port)
sys/dev/mlx4/mlx4_core/mlx4_mcg.c
241
unsigned int index, u32 qpn)
sys/dev/mlx4/mlx4_core/mlx4_mcg.c
290
unsigned int index, u32 qpn)
sys/dev/mlx4/mlx4_core/mlx4_mcg.c
331
unsigned int index, u32 tqpn,
sys/dev/mlx4/mlx4_core/mlx4_mcg.c
332
u32 *members_count)
sys/dev/mlx4/mlx4_core/mlx4_mcg.c
336
u32 m_count;
sys/dev/mlx4/mlx4_core/mlx4_mcg.c
355
u32 qpn = be32_to_cpu(mgm->qp[i]) & MGM_QPN_MASK;
sys/dev/mlx4/mlx4_core/mlx4_mcg.c
370
unsigned int index, u32 tqpn)
sys/dev/mlx4/mlx4_core/mlx4_mcg.c
374
u32 members_count;
sys/dev/mlx4/mlx4_core/mlx4_mcg.c
419
enum mlx4_steer_type steer, u32 qpn)
sys/dev/mlx4/mlx4_core/mlx4_mcg.c
427
u32 members_count;
sys/dev/mlx4/mlx4_core/mlx4_mcg.c
428
u32 prot;
sys/dev/mlx4/mlx4_core/mlx4_mcg.c
549
enum mlx4_steer_type steer, u32 qpn)
sys/dev/mlx4/mlx4_core/mlx4_mcg.c
55
u32 size,
sys/dev/mlx4/mlx4_core/mlx4_mcg.c
558
u32 members_count;
sys/dev/mlx4/mlx4_core/mlx4_mcg.c
988
u32 size = 0;
sys/dev/mlx4/mlx4_core/mlx4_mcg.c
99
u32 in_mod;
sys/dev/mlx4/mlx4_core/mlx4_mr.c
1003
int npages, u64 iova, u32 *lkey, u32 *rkey)
sys/dev/mlx4/mlx4_core/mlx4_mr.c
1005
u32 key;
sys/dev/mlx4/mlx4_core/mlx4_mr.c
1049
int mlx4_fmr_alloc(struct mlx4_dev *dev, u32 pd, u32 access, int max_pages,
sys/dev/mlx4/mlx4_core/mlx4_mr.c
1111
u32 *lkey, u32 *rkey)
sys/dev/mlx4/mlx4_core/mlx4_mr.c
156
u32 __mlx4_alloc_mtt_range(struct mlx4_dev *dev, int order)
sys/dev/mlx4/mlx4_core/mlx4_mr.c
159
u32 seg;
sys/dev/mlx4/mlx4_core/mlx4_mr.c
161
u32 offset;
sys/dev/mlx4/mlx4_core/mlx4_mr.c
180
static u32 mlx4_alloc_mtt_range(struct mlx4_dev *dev, int order)
sys/dev/mlx4/mlx4_core/mlx4_mr.c
223
void __mlx4_free_mtt_range(struct mlx4_dev *dev, u32 offset, int order)
sys/dev/mlx4/mlx4_core/mlx4_mr.c
225
u32 first_seg;
sys/dev/mlx4/mlx4_core/mlx4_mr.c
237
static void mlx4_free_mtt_range(struct mlx4_dev *dev, u32 offset, int order)
sys/dev/mlx4/mlx4_core/mlx4_mr.c
272
static u32 hw_index_to_key(u32 ind)
sys/dev/mlx4/mlx4_core/mlx4_mr.c
277
static u32 key_to_hw_index(u32 key)
sys/dev/mlx4/mlx4_core/mlx4_mr.c
396
u32 pdn)
sys/dev/mlx4/mlx4_core/mlx4_mr.c
398
u32 pd_flags = be32_to_cpu(mpt_entry->pd_flags) & ~MLX4_MPT_PD_MASK;
sys/dev/mlx4/mlx4_core/mlx4_mr.c
412
u32 access)
sys/dev/mlx4/mlx4_core/mlx4_mr.c
414
u32 flags = (be32_to_cpu(mpt_entry->flags) & ~MLX4_PERM_MASK) |
sys/dev/mlx4/mlx4_core/mlx4_mr.c
422
static int mlx4_mr_alloc_reserved(struct mlx4_dev *dev, u32 mridx, u32 pd,
sys/dev/mlx4/mlx4_core/mlx4_mr.c
423
u64 iova, u64 size, u32 access, int npages,
sys/dev/mlx4/mlx4_core/mlx4_mr.c
465
void __mlx4_mpt_release(struct mlx4_dev *dev, u32 index)
sys/dev/mlx4/mlx4_core/mlx4_mr.c
472
static void mlx4_mpt_release(struct mlx4_dev *dev, u32 index)
sys/dev/mlx4/mlx4_core/mlx4_mr.c
488
int __mlx4_mpt_alloc_icm(struct mlx4_dev *dev, u32 index, gfp_t gfp)
sys/dev/mlx4/mlx4_core/mlx4_mr.c
49
static u32 mlx4_buddy_alloc(struct mlx4_buddy *buddy, int order)
sys/dev/mlx4/mlx4_core/mlx4_mr.c
495
static int mlx4_mpt_alloc_icm(struct mlx4_dev *dev, u32 index, gfp_t gfp)
sys/dev/mlx4/mlx4_core/mlx4_mr.c
509
void __mlx4_mpt_free_icm(struct mlx4_dev *dev, u32 index)
sys/dev/mlx4/mlx4_core/mlx4_mr.c
516
static void mlx4_mpt_free_icm(struct mlx4_dev *dev, u32 index)
sys/dev/mlx4/mlx4_core/mlx4_mr.c
53
u32 seg;
sys/dev/mlx4/mlx4_core/mlx4_mr.c
532
int mlx4_mr_alloc(struct mlx4_dev *dev, u32 pd, u64 iova, u64 size, u32 access,
sys/dev/mlx4/mlx4_core/mlx4_mr.c
535
u32 index;
sys/dev/mlx4/mlx4_core/mlx4_mr.c
820
int mlx4_mw_alloc(struct mlx4_dev *dev, u32 pd, enum mlx4_mw_type type,
sys/dev/mlx4/mlx4_core/mlx4_mr.c
823
u32 index;
sys/dev/mlx4/mlx4_core/mlx4_mr.c
86
static void mlx4_buddy_free(struct mlx4_buddy *buddy, u32 seg, int order)
sys/dev/mlx4/mlx4_core/mlx4_mr.c
933
ilog2((u32)dev->caps.num_mtts /
sys/dev/mlx4/mlx4_core/mlx4_pd.c
101
void mlx4_xrcd_free(struct mlx4_dev *dev, u32 xrcdn)
sys/dev/mlx4/mlx4_core/mlx4_pd.c
47
int mlx4_pd_alloc(struct mlx4_dev *dev, u32 *pdn)
sys/dev/mlx4/mlx4_core/mlx4_pd.c
59
void mlx4_pd_free(struct mlx4_dev *dev, u32 pdn)
sys/dev/mlx4/mlx4_core/mlx4_pd.c
65
int __mlx4_xrcd_alloc(struct mlx4_dev *dev, u32 *xrcdn)
sys/dev/mlx4/mlx4_core/mlx4_pd.c
76
int mlx4_xrcd_alloc(struct mlx4_dev *dev, u32 *xrcdn)
sys/dev/mlx4/mlx4_core/mlx4_pd.c
96
void __mlx4_xrcd_free(struct mlx4_dev *dev, u32 xrcdn)
sys/dev/mlx4/mlx4_core/mlx4_port.c
1196
((u32)port) | (MLX4_SET_PORT_GID_TABLE << 8),
sys/dev/mlx4/mlx4_core/mlx4_port.c
1247
static int mlx4_common_set_port(struct mlx4_dev *dev, int slave, u32 in_mod,
sys/dev/mlx4/mlx4_core/mlx4_port.c
1262
u32 in_modifier;
sys/dev/mlx4/mlx4_core/mlx4_port.c
1263
u32 promisc;
sys/dev/mlx4/mlx4_core/mlx4_port.c
131
u32 in_mod;
sys/dev/mlx4/mlx4_core/mlx4_port.c
1550
u32 in_mod;
sys/dev/mlx4/mlx4_core/mlx4_port.c
1578
int mlx4_SET_PORT_qpn_calc(struct mlx4_dev *dev, u8 port, u32 base_qpn,
sys/dev/mlx4/mlx4_core/mlx4_port.c
1584
u32 in_mod;
sys/dev/mlx4/mlx4_core/mlx4_port.c
1585
u32 m_promisc = (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER) ?
sys/dev/mlx4/mlx4_core/mlx4_port.c
1620
u32 in_mod;
sys/dev/mlx4/mlx4_core/mlx4_port.c
1650
u32 reserved1;
sys/dev/mlx4/mlx4_core/mlx4_port.c
1660
u32 in_mod;
sys/dev/mlx4/mlx4_core/mlx4_port.c
350
((u32) port) << 8 | (u32) RES_MAC,
sys/dev/mlx4/mlx4_core/mlx4_port.c
457
((u32) port) << 8 | (u32) RES_MAC,
sys/dev/mlx4/mlx4_core/mlx4_port.c
540
u32 in_mod;
sys/dev/mlx4/mlx4_core/mlx4_port.c
750
((u32) port) << 8 | (u32) RES_VLAN,
sys/dev/mlx4/mlx4_core/mlx4_port.c
832
((u32) port) << 8 | (u32) RES_VLAN,
sys/dev/mlx4/mlx4_core/mlx4_profile.c
174
priv->qp_table.rdmarc_base = (u32) profile[i].start;
sys/dev/mlx4/mlx4_core/mlx4_profile.c
79
u32 num;
sys/dev/mlx4/mlx4_core/mlx4_qp.c
223
u32 uid;
sys/dev/mlx4/mlx4_core/mlx4_qp.c
259
set_param_l(&in_param, (((u32)flags) << 24) | (u32)cnt);
sys/dev/mlx4/mlx4_core/mlx4_qp.c
280
if (mlx4_is_qp_reserved(dev, (u32) base_qpn))
sys/dev/mlx4/mlx4_core/mlx4_qp.c
422
int mlx4_update_qp(struct mlx4_dev *dev, u32 qpn,
sys/dev/mlx4/mlx4_core/mlx4_qp.c
50
void mlx4_qp_event(struct mlx4_dev *dev, u32 qpn, int event_type)
sys/dev/mlx4/mlx4_core/mlx4_qp.c
512
static int mlx4_CONF_SPECIAL_QP(struct mlx4_dev *dev, u32 base_qpn)
sys/dev/mlx4/mlx4_core/mlx4_qp.c
523
u32 reserved_bottom_general,
sys/dev/mlx4/mlx4_core/mlx4_qp.c
524
u32 reserved_top_general,
sys/dev/mlx4/mlx4_core/mlx4_qp.c
525
u32 reserved_bottom_rss,
sys/dev/mlx4/mlx4_core/mlx4_qp.c
526
u32 start_offset_rss,
sys/dev/mlx4/mlx4_core/mlx4_qp.c
527
u32 max_table_offset)
sys/dev/mlx4/mlx4_core/mlx4_qp.c
532
u32 last_offset;
sys/dev/mlx4/mlx4_core/mlx4_qp.c
597
u32 offset = start_offset_rss;
sys/dev/mlx4/mlx4_core/mlx4_qp.c
598
u32 bf_mask;
sys/dev/mlx4/mlx4_core/mlx4_qp.c
599
u32 requested_size;
sys/dev/mlx4/mlx4_core/mlx4_qp.c
607
requested_size = min((u32)MLX4_QP_TABLE_RAW_ETH_SIZE, bf_mask + 1);
sys/dev/mlx4/mlx4_core/mlx4_qp.c
617
u32 candidate_offset =
sys/dev/mlx4/mlx4_core/mlx4_qp.c
661
if (offset == (u32)-1) {
sys/dev/mlx4/mlx4_core/mlx4_qp.c
748
u32 max_table_offset = dev->caps.dmfs_high_rate_qpn_base +
sys/dev/mlx4/mlx4_core/mlx4_qp.c
79
u32 pf_proxy_offset = dev->phys_caps.base_proxy_sqpn + 8 * mlx4_master_func_num(dev);
sys/dev/mlx4/mlx4_core/mlx4_qp.c
829
dev->caps.qp0_tunnel = kcalloc(dev->caps.num_ports, sizeof (u32), GFP_KERNEL);
sys/dev/mlx4/mlx4_core/mlx4_qp.c
830
dev->caps.qp0_proxy = kcalloc(dev->caps.num_ports, sizeof (u32), GFP_KERNEL);
sys/dev/mlx4/mlx4_core/mlx4_qp.c
831
dev->caps.qp1_tunnel = kcalloc(dev->caps.num_ports, sizeof (u32), GFP_KERNEL);
sys/dev/mlx4/mlx4_core/mlx4_qp.c
832
dev->caps.qp1_proxy = kcalloc(dev->caps.num_ports, sizeof (u32), GFP_KERNEL);
sys/dev/mlx4/mlx4_core/mlx4_qp.c
932
u16 mlx4_qp_roce_entropy(struct mlx4_dev *dev, u32 qpn)
sys/dev/mlx4/mlx4_core/mlx4_qp.c
941
u32 dest_qpn = be32_to_cpu(context.remote_qpn) & 0xffffff;
sys/dev/mlx4/mlx4_core/mlx4_reset.c
45
u32 *hca_header = NULL;
sys/dev/mlx4/mlx4_core/mlx4_reset.c
51
u32 sem;
sys/dev/mlx4/mlx4_core/mlx4_resource_tracker.c
116
u32 qpc_flags;
sys/dev/mlx4/mlx4_core/mlx4_resource_tracker.c
2181
set_param_l(out_param, (u32) vlan_index);
sys/dev/mlx4/mlx4_core/mlx4_resource_tracker.c
2192
u32 index;
sys/dev/mlx4/mlx4_core/mlx4_resource_tracker.c
2222
u32 xrcdn;
sys/dev/mlx4/mlx4_core/mlx4_resource_tracker.c
228
u32 mirr_mbox_size;
sys/dev/mlx4/mlx4_core/mlx4_resource_tracker.c
2633
static u32 mr_get_pd(struct mlx4_mpt_entry *mpt)
sys/dev/mlx4/mlx4_core/mlx4_resource_tracker.c
2672
u32 ts = (be32_to_cpu(qpc->flags) >> 16) & 0xff;
sys/dev/mlx4/mlx4_core/mlx4_resource_tracker.c
2714
u32 pd;
sys/dev/mlx4/mlx4_core/mlx4_resource_tracker.c
2876
static u32 qp_get_srqn(struct mlx4_qp_context *qpc)
sys/dev/mlx4/mlx4_core/mlx4_resource_tracker.c
2884
u32 qpn = vhcr->in_modifier & 0xffffff;
sys/dev/mlx4/mlx4_core/mlx4_resource_tracker.c
2885
u32 qkey = 0;
sys/dev/mlx4/mlx4_core/mlx4_resource_tracker.c
2915
u32 srqn = qp_get_srqn(qpc) & 0xffffff;
sys/dev/mlx4/mlx4_core/mlx4_resource_tracker.c
3131
u32 qp_type;
sys/dev/mlx4/mlx4_core/mlx4_resource_tracker.c
3132
u32 qpn;
sys/dev/mlx4/mlx4_core/mlx4_resource_tracker.c
3287
u32 in_modifier = 0;
sys/dev/mlx4/mlx4_core/mlx4_resource_tracker.c
3750
u32 ts = (be32_to_cpu(qpc->flags) >> 16) & 0xff;
sys/dev/mlx4/mlx4_core/mlx4_resource_tracker.c
4251
u32 qpn = vhcr->in_modifier & 0xffffff;
sys/dev/mlx4/mlx4_core/mlx4_resource_tracker.c
4310
static u32 qp_attach_mbox_size(void *mbox)
sys/dev/mlx4/mlx4_core/mlx4_resource_tracker.c
4312
u32 size = sizeof(struct mlx4_net_trans_rule_hw_ctrl);
sys/dev/mlx4/mlx4_core/mlx4_resource_tracker.c
4318
size += rule_header->size * sizeof(u32);
sys/dev/mlx4/mlx4_core/mlx4_resource_tracker.c
4343
u32 mbox_size;
sys/dev/mlx4/mlx4_core/mlx4_resource_tracker.c
698
u32 ts = (be32_to_cpu(qp_ctx->flags) >> 16) & 0xff;
sys/dev/mlx4/mlx4_core/mlx4_resource_tracker.c
738
u8 slave, u32 qpn)
sys/dev/mlx4/mlx4_core/mlx4_resource_tracker.c
743
u32 qp_type;
sys/dev/mlx4/mlx4_core/mlx4_srq.c
162
int mlx4_srq_alloc(struct mlx4_dev *dev, u32 pdn, u32 cqn, u16 xrcd,
sys/dev/mlx4/mlx4_core/mlx4_srq.c
297
struct mlx4_srq *mlx4_srq_lookup(struct mlx4_dev *dev, u32 srqn)
sys/dev/mlx4/mlx4_core/mlx4_srq.c
43
void mlx4_srq_event(struct mlx4_dev *dev, u32 srqn, int event_type)
sys/dev/mlx4/mlx4_en/en.h
242
u32 nr_txbb;
sys/dev/mlx4/mlx4_en/en.h
243
u32 nr_bytes;
sys/dev/mlx4/mlx4_en/en.h
281
u32 size ; /* number of TXBBs */
sys/dev/mlx4/mlx4_en/en.h
282
u32 size_mask;
sys/dev/mlx4/mlx4_en/en.h
285
u32 prod;
sys/dev/mlx4/mlx4_en/en.h
286
u32 cons;
sys/dev/mlx4/mlx4_en/en.h
287
u32 buf_size;
sys/dev/mlx4/mlx4_en/en.h
288
u32 doorbell_qpn;
sys/dev/mlx4/mlx4_en/en.h
293
u32 last_nr_txbb;
sys/dev/mlx4/mlx4_en/en.h
337
u32 size ; /* number of Rx descs*/
sys/dev/mlx4/mlx4_en/en.h
338
u32 actual_size;
sys/dev/mlx4/mlx4_en/en.h
339
u32 size_mask;
sys/dev/mlx4/mlx4_en/en.h
342
u32 prod;
sys/dev/mlx4/mlx4_en/en.h
343
u32 cons;
sys/dev/mlx4/mlx4_en/en.h
344
u32 buf_size;
sys/dev/mlx4/mlx4_en/en.h
346
u32 rx_mb_size;
sys/dev/mlx4/mlx4_en/en.h
347
u32 rx_mr_key_be;
sys/dev/mlx4/mlx4_en/en.h
408
u32 tot_rx;
sys/dev/mlx4/mlx4_en/en.h
409
u32 tot_tx;
sys/dev/mlx4/mlx4_en/en.h
410
u32 curr_poll_rx_cpu_id;
sys/dev/mlx4/mlx4_en/en.h
427
u32 flags;
sys/dev/mlx4/mlx4_en/en.h
428
u32 tx_ring_num;
sys/dev/mlx4/mlx4_en/en.h
429
u32 rx_ring_num;
sys/dev/mlx4/mlx4_en/en.h
430
u32 tx_ring_size;
sys/dev/mlx4/mlx4_en/en.h
431
u32 rx_ring_size;
sys/dev/mlx4/mlx4_en/en.h
444
u32 active_ports;
sys/dev/mlx4/mlx4_en/en.h
445
u32 small_pkt_int;
sys/dev/mlx4/mlx4_en/en.h
456
u32 port_cnt;
sys/dev/mlx4/mlx4_en/en.h
459
u32 LSO_support;
sys/dev/mlx4/mlx4_en/en.h
465
u32 priv_pdn;
sys/dev/mlx4/mlx4_en/en.h
490
u32 flags;
sys/dev/mlx4/mlx4_en/en.h
562
u32 pkt_rate_low;
sys/dev/mlx4/mlx4_en/en.h
563
u32 rx_usecs_low;
sys/dev/mlx4/mlx4_en/en.h
564
u32 pkt_rate_high;
sys/dev/mlx4/mlx4_en/en.h
565
u32 rx_usecs_high;
sys/dev/mlx4/mlx4_en/en.h
566
u32 sample_interval;
sys/dev/mlx4/mlx4_en/en.h
567
u32 adaptive_rx_coal;
sys/dev/mlx4/mlx4_en/en.h
568
u32 msg_enable;
sys/dev/mlx4/mlx4_en/en.h
569
u32 loopback_ok;
sys/dev/mlx4/mlx4_en/en.h
570
u32 validate_loopback;
sys/dev/mlx4/mlx4_en/en.h
588
u32 flags;
sys/dev/mlx4/mlx4_en/en.h
590
u32 tx_ring_num;
sys/dev/mlx4/mlx4_en/en.h
591
u32 rx_ring_num;
sys/dev/mlx4/mlx4_en/en.h
592
u32 rx_mb_size;
sys/dev/mlx4/mlx4_en/en.h
624
u32 counter_index;
sys/dev/mlx4/mlx4_en/en.h
815
u32 size, u16 stride, int node, int queue_idx);
sys/dev/mlx4/mlx4_en/en.h
828
u32 size, int node);
sys/dev/mlx4/mlx4_en/en.h
831
u32 size);
sys/dev/mlx4/mlx4_en/en.h
848
const u32 *mlx4_en_get_rss_key(struct mlx4_en_priv *priv, u16 *keylen);
sys/dev/mlx4/mlx4_en/en.h
880
void mlx4_en_ex_selftest(if_t dev, u32 *flags, u64 *buf);
sys/dev/mlx4/mlx4_en/mlx4_en_netdev.c
106
u32 flow_id; /* RFS infrastructure id */
sys/dev/mlx4/mlx4_en/mlx4_en_netdev.c
1375
*((u32 *) (tx_ring->buf + j)) = INIT_OWNER_BIT;
sys/dev/mlx4/mlx4_en/mlx4_en_netdev.c
1956
const u32 *key;
sys/dev/mlx4/mlx4_en/mlx4_en_netdev.c
222
__be16 dst_port, u32 flow_id)
sys/dev/mlx4/mlx4_en/mlx4_en_netdev.c
2354
rx_size = max_t(u32, rx_size, MLX4_EN_MIN_RX_SIZE);
sys/dev/mlx4/mlx4_en/mlx4_en_netdev.c
2355
rx_size = min_t(u32, rx_size, MLX4_EN_MAX_RX_SIZE);
sys/dev/mlx4/mlx4_en/mlx4_en_netdev.c
2357
tx_size = max_t(u32, tx_size, MLX4_EN_MIN_TX_SIZE);
sys/dev/mlx4/mlx4_en/mlx4_en_netdev.c
2358
tx_size = min_t(u32, tx_size, MLX4_EN_MAX_TX_SIZE);
sys/dev/mlx4/mlx4_en/mlx4_en_netdev.c
292
u16 rxq_index, u32 flow_id)
sys/dev/mlx4/mlx4_en/mlx4_en_port.c
51
u32 entry;
sys/dev/mlx4/mlx4_en/mlx4_en_rx.c
1000
static const u32 rsskey[10] = {
sys/dev/mlx4/mlx4_en/mlx4_en_rx.c
1035
const u32 *key;
sys/dev/mlx4/mlx4_en/mlx4_en_rx.c
312
BUG_ON((u32) (ring->prod - ring->cons) > ring->actual_size);
sys/dev/mlx4/mlx4_en/mlx4_en_rx.c
367
u32 size, int node)
sys/dev/mlx4/mlx4_en/mlx4_en_rx.c
547
u32 size)
sys/dev/mlx4/mlx4_en/mlx4_en_rx.c
751
u32 cons_index = mcq->cons_index;
sys/dev/mlx4/mlx4_en/mlx4_en_rx.c
752
u32 size_mask = ring->size_mask;
sys/dev/mlx4/mlx4_en/mlx4_en_rx.c
969
u32 qpn;
sys/dev/mlx4/mlx4_en/mlx4_en_rx.c
988
u32 qpn;
sys/dev/mlx4/mlx4_en/mlx4_en_rx.c
996
const u32 *
sys/dev/mlx4/mlx4_en/mlx4_en_tx.c
272
struct mlx4_en_tx_ring *ring, u32 index, u8 owner)
sys/dev/mlx4/mlx4_en/mlx4_en_tx.c
279
((u32)owner << STAMP_SHIFT));
sys/dev/mlx4/mlx4_en/mlx4_en_tx.c
280
u32 i;
sys/dev/mlx4/mlx4_en/mlx4_en_tx.c
289
static u32
sys/dev/mlx4/mlx4_en/mlx4_en_tx.c
291
struct mlx4_en_tx_ring *ring, u32 index)
sys/dev/mlx4/mlx4_en/mlx4_en_tx.c
321
if ((u32) (ring->prod - ring->cons) > ring->size) {
sys/dev/mlx4/mlx4_en/mlx4_en_tx.c
356
u32 txbbs_skipped = 0;
sys/dev/mlx4/mlx4_en/mlx4_en_tx.c
357
u32 txbbs_stamp = 0;
sys/dev/mlx4/mlx4_en/mlx4_en_tx.c
358
u32 cons_index = mcq->cons_index;
sys/dev/mlx4/mlx4_en/mlx4_en_tx.c
360
u32 size_mask = ring->size_mask;
sys/dev/mlx4/mlx4_en/mlx4_en_tx.c
441
u32 inflight;
sys/dev/mlx4/mlx4_en/mlx4_en_tx.c
452
inflight = (u32) (ring->prod - ring->cons - ring->last_nr_txbb);
sys/dev/mlx4/mlx4_en/mlx4_en_tx.c
56
struct mlx4_en_tx_ring **pring, u32 size,
sys/dev/mlx4/mlx4_en/mlx4_en_tx.c
610
u32 rings_p_up = priv->num_tx_rings_p_up;
sys/dev/mlx4/mlx4_en/mlx4_en_tx.c
611
u32 up = 0;
sys/dev/mlx4/mlx4_en/mlx4_en_tx.c
612
u32 queue_index;
sys/dev/mlx4/mlx4_en/mlx4_en_tx.c
617
u32 vlan_tag = mb->m_pkthdr.ether_vtag;
sys/dev/mlx4/mlx4_en/mlx4_en_tx.c
651
u32 bf_size;
sys/dev/mlx4/mlx4_en/mlx4_en_tx.c
652
u32 bf_prod;
sys/dev/mlx4/mlx4_en/mlx4_en_tx.c
653
u32 opcode;
sys/dev/mlx4/mlx4_en/mlx4_en_tx.c
676
(u32) (ring->prod - ring->cons - 1));
sys/dev/mlx4/mlx4_en/mlx4_en_tx.c
734
u32 payload_len;
sys/dev/mlx4/mlx4_en/mlx4_en_tx.c
735
u32 mss = mb->m_pkthdr.tso_segsz;
sys/dev/mlx4/mlx4_en/mlx4_en_tx.c
736
u32 num_pkts;
sys/dev/mlx4/mlx4_ib/mlx4_ib.h
100
u32 xrcdn;
sys/dev/mlx4/mlx4_ib/mlx4_ib.h
138
u32 npages;
sys/dev/mlx4/mlx4_ib/mlx4_ib.h
139
u32 max_pages;
sys/dev/mlx4/mlx4_ib/mlx4_ib.h
301
u32 doorbell_qpn;
sys/dev/mlx4/mlx4_ib/mlx4_ib.h
314
u32 flags;
sys/dev/mlx4/mlx4_ib/mlx4_ib.h
390
u32 state_flags;
sys/dev/mlx4/mlx4_ib/mlx4_ib.h
515
u32 entry_num;
sys/dev/mlx4/mlx4_ib/mlx4_ib.h
542
u32 index;
sys/dev/mlx4/mlx4_ib/mlx4_ib.h
549
u32 default_counter;
sys/dev/mlx4/mlx4_ib/mlx4_ib.h
556
u32 *offset;
sys/dev/mlx4/mlx4_ib/mlx4_ib.h
557
u32 num_counters;
sys/dev/mlx4/mlx4_ib/mlx4_ib.h
567
u32 priv_pdn;
sys/dev/mlx4/mlx4_ib/mlx4_ib.h
729
u32 max_num_sg, struct ib_udata *udata);
sys/dev/mlx4/mlx4_ib/mlx4_ib.h
739
void __mlx4_ib_cq_clean(struct mlx4_ib_cq *cq, u32 qpn, struct mlx4_ib_srq *srq);
sys/dev/mlx4/mlx4_ib/mlx4_ib.h
740
void mlx4_ib_cq_clean(struct mlx4_ib_cq *cq, u32 qpn, struct mlx4_ib_srq *srq);
sys/dev/mlx4/mlx4_ib/mlx4_ib.h
742
int mlx4_ib_create_ah(struct ib_ah *ah, struct ib_ah_attr *ah_attr, u32 flags,
sys/dev/mlx4/mlx4_ib/mlx4_ib.h
747
void mlx4_ib_destroy_ah(struct ib_ah *ah, u32 flags);
sys/dev/mlx4/mlx4_ib/mlx4_ib.h
833
enum ib_qp_type dest_qpt, u16 pkey_index, u32 remote_qpn,
sys/dev/mlx4/mlx4_ib/mlx4_ib.h
834
u32 qkey, struct ib_ah_attr *attr, u8 *s_mac,
sys/dev/mlx4/mlx4_ib/mlx4_ib.h
877
void mlx4_ib_steer_qp_free(struct mlx4_ib_dev *dev, u32 qpn, int count);
sys/dev/mlx4/mlx4_ib/mlx4_ib.h
95
u32 pdn;
sys/dev/mlx4/mlx4_ib/mlx4_ib_ah.c
133
u32 flags, struct ib_udata *udata)
sys/dev/mlx4/mlx4_ib/mlx4_ib_ah.c
211
void mlx4_ib_destroy_ah(struct ib_ah *ah, u32 flags)
sys/dev/mlx4/mlx4_ib/mlx4_ib_cm.c
105
static void set_remote_comm_id(struct ib_mad *mad, u32 cm_id)
sys/dev/mlx4/mlx4_ib/mlx4_ib_cm.c
120
static u32 get_remote_comm_id(struct ib_mad *mad)
sys/dev/mlx4/mlx4_ib/mlx4_ib_cm.c
144
id_map_find_by_sl_id(struct ib_device *ibdev, u32 slave_id, u32 sl_cm_id)
sys/dev/mlx4/mlx4_ib/mlx4_ib_cm.c
243
id_map_alloc(struct ib_device *ibdev, int slave_id, u32 sl_cm_id)
sys/dev/mlx4/mlx4_ib/mlx4_ib_cm.c
266
ent->pv_cm_id = (u32)ret;
sys/dev/mlx4/mlx4_ib/mlx4_ib_cm.c
321
u32 sl_cm_id;
sys/dev/mlx4/mlx4_ib/mlx4_ib_cm.c
361
u32 pv_cm_id;
sys/dev/mlx4/mlx4_ib/mlx4_ib_cm.c
47
u32 sl_cm_id;
sys/dev/mlx4/mlx4_ib/mlx4_ib_cm.c
48
u32 pv_cm_id;
sys/dev/mlx4/mlx4_ib/mlx4_ib_cm.c
75
static void set_local_comm_id(struct ib_mad *mad, u32 cm_id)
sys/dev/mlx4/mlx4_ib/mlx4_ib_cm.c
90
static u32 get_local_comm_id(struct ib_mad *mad)
sys/dev/mlx4/mlx4_ib/mlx4_ib_cq.c
334
u32 i;
sys/dev/mlx4/mlx4_ib/mlx4_ib_cq.c
661
u32 g_mlpath_rqpn;
sys/dev/mlx4/mlx4_ib/mlx4_ib_cq.c
716
u32 srq_num;
sys/dev/mlx4/mlx4_ib/mlx4_ib_cq.c
913
void __mlx4_ib_cq_clean(struct mlx4_ib_cq *cq, u32 qpn, struct mlx4_ib_srq *srq)
sys/dev/mlx4/mlx4_ib/mlx4_ib_cq.c
915
u32 prod_index;
sys/dev/mlx4/mlx4_ib/mlx4_ib_cq.c
966
void mlx4_ib_cq_clean(struct mlx4_ib_cq *cq, u32 qpn, struct mlx4_ib_srq *srq)
sys/dev/mlx4/mlx4_ib/mlx4_ib_mad.c
1097
u32 guid_tbl_blk_num, u32 change_bitmap)
sys/dev/mlx4/mlx4_ib/mlx4_ib_mad.c
114
u32 in_modifier = port;
sys/dev/mlx4/mlx4_ib/mlx4_ib_mad.c
1155
u32 changed_attr;
sys/dev/mlx4/mlx4_ib/mlx4_ib_mad.c
1156
u32 tbl_block;
sys/dev/mlx4/mlx4_ib/mlx4_ib_mad.c
1157
u32 change_bitmap;
sys/dev/mlx4/mlx4_ib/mlx4_ib_mad.c
1325
u32 remote_qpn, u32 qkey, struct ib_ah_attr *attr,
sys/dev/mlx4/mlx4_ib/mlx4_ib_mad.c
145
u32 reserved1;
sys/dev/mlx4/mlx4_ib/mlx4_ib_mad.c
151
u32 reserved3[11];
sys/dev/mlx4/mlx4_ib/mlx4_ib_mad.c
223
u32 bn, pkey_change_bitmap;
sys/dev/mlx4/mlx4_ib/mlx4_ib_mad.c
330
int block, u32 change_bitmap)
sys/dev/mlx4/mlx4_ib/mlx4_ib_mad.c
92
int block, u32 change_bitmap);
sys/dev/mlx4/mlx4_ib/mlx4_ib_main.c
1014
u32 cap_mask;
sys/dev/mlx4/mlx4_ib/mlx4_ib_main.c
1295
u32 qp_num,
sys/dev/mlx4/mlx4_ib/mlx4_ib_main.c
2003
u32 offset;
sys/dev/mlx4/mlx4_ib/mlx4_ib_main.c
2063
u32 hw_value[ARRAY_SIZE(diag_device_only) +
sys/dev/mlx4/mlx4_ib/mlx4_ib_main.c
2084
u32 **offset,
sys/dev/mlx4/mlx4_ib/mlx4_ib_main.c
2085
u32 *num,
sys/dev/mlx4/mlx4_ib/mlx4_ib_main.c
2088
u32 num_counters;
sys/dev/mlx4/mlx4_ib/mlx4_ib_main.c
2117
u32 *offset,
sys/dev/mlx4/mlx4_ib/mlx4_ib_main.c
2426
u32 counter_index;
sys/dev/mlx4/mlx4_ib/mlx4_ib_main.c
2806
void mlx4_ib_steer_qp_free(struct mlx4_ib_dev *dev, u32 qpn, int count)
sys/dev/mlx4/mlx4_ib/mlx4_ib_main.c
983
u32 cap_mask)
sys/dev/mlx4/mlx4_ib/mlx4_ib_mr.c
387
u32 max_num_sg, struct ib_udata *udata)
sys/dev/mlx4/mlx4_ib/mlx4_ib_mr.c
42
static u32 convert_access(int acc)
sys/dev/mlx4/mlx4_ib/mlx4_ib_qp.c
1116
static u32 get_sqp_num(struct mlx4_ib_dev *dev, struct ib_qp_init_attr *attr)
sys/dev/mlx4/mlx4_ib/mlx4_ib_qp.c
1352
u32 access_flags;
sys/dev/mlx4/mlx4_ib/mlx4_ib_qp.c
1353
u32 hw_access_flags = 0;
sys/dev/mlx4/mlx4_ib/mlx4_ib_qp.c
1576
u32 tmp_idx;
sys/dev/mlx4/mlx4_ib/mlx4_ib_qp.c
1706
context->xrcd = cpu_to_be32((u32) qp->xrcdn);
sys/dev/mlx4/mlx4_ib/mlx4_ib_qp.c
2284
static int vf_get_qp0_qkey(struct mlx4_dev *dev, int qpn, u32 *qkey)
sys/dev/mlx4/mlx4_ib/mlx4_ib_qp.c
2307
u32 qkey;
sys/dev/mlx4/mlx4_ib/mlx4_ib_qp.c
2733
static void set_local_inv_seg(struct mlx4_wqe_local_inval_seg *iseg, u32 rkey)
sys/dev/mlx4/mlx4_ib/mlx4_ib_qp.c
2740
u64 remote_addr, u32 rkey)
sys/dev/mlx4/mlx4_ib/mlx4_ib_qp.c
2826
inl->byte_count = cpu_to_be32((1U << 31) | (u32)sizeof(hdr));
sys/dev/mlx4/mlx4_ib/mlx4_ib_qp.c
2836
inl->byte_count = cpu_to_be32((1U << 31) | (u32)(sizeof (hdr) - spc));
sys/dev/mlx4/mlx4_ib/mlx4_ib_qp.c
2846
u32 *t = dseg;
sys/dev/mlx4/mlx4_ib/mlx4_ib_qp.c
340
static int send_wqe_overhead(enum mlx4_ib_qp_type type, u32 flags)
sys/dev/mlx4/mlx4_ib/mlx4_ib_qp.c
89
u32 qkey;
sys/dev/mlx4/mlx4_ib/mlx4_ib_qp.c
90
u32 send_psn;
sys/dev/mlx4/mlx4_ib/mlx4_ib_srq.c
82
u32 cqn;
sys/dev/mlx4/qp.h
209
u32 reserved1;
sys/dev/mlx4/qp.h
226
u32 reserved3;
sys/dev/mlx4/qp.h
236
u32 reserved6[10];
sys/dev/mlx4/qp.h
402
u32 reserved[2];
sys/dev/mlx4/qp.h
418
u32 reserved2;
sys/dev/mlx4/qp.h
425
u32 reserved;
sys/dev/mlx4/qp.h
472
u32 flags;
sys/dev/mlx4/qp.h
477
int mlx4_update_qp(struct mlx4_dev *dev, u32 qpn,
sys/dev/mlx4/qp.h
492
static inline struct mlx4_qp *__mlx4_qp_lookup(struct mlx4_dev *dev, u32 qpn)
sys/dev/mlx4/qp.h
499
static inline u16 folded_qp(u32 q)
sys/dev/mlx4/qp.h
507
u16 mlx4_qp_roce_entropy(struct mlx4_dev *dev, u32 qpn);
sys/dev/mlx4/srq.h
39
u32 reserved2[3];
sys/dev/mlx4/srq.h
42
struct mlx4_srq *mlx4_srq_lookup(struct mlx4_dev *dev, u32 srqn);
sys/dev/mlx4/stats.h
108
u32 tx_poll;
sys/dev/mlx4/stats.h
110
u32 inflight_avg;
sys/dev/mlx4/stats.h
113
u32 napi_quota;
sys/dev/mlx5/cmd.h
33
u32 reserved;
sys/dev/mlx5/cmd.h
40
u32 rsvd[3];
sys/dev/mlx5/cmd.h
41
u32 uarn;
sys/dev/mlx5/cq.h
102
u32 page_offset;
sys/dev/mlx5/cq.h
135
static inline void mlx5_cq_arm(struct mlx5_core_cq *cq, u32 cmd,
sys/dev/mlx5/cq.h
138
u32 cons_index)
sys/dev/mlx5/cq.h
141
u32 sn;
sys/dev/mlx5/cq.h
142
u32 ci;
sys/dev/mlx5/cq.h
163
u32 *in, int inlen, u32 *out, int outlen);
sys/dev/mlx5/cq.h
166
u32 *out, int outlen);
sys/dev/mlx5/cq.h
168
u32 *in, int inlen);
sys/dev/mlx5/cq.h
178
struct mlx5_core_cq *, u32 mask,
sys/dev/mlx5/cq.h
35
u32 cqn;
sys/dev/mlx5/cq.h
44
u32 cons_index;
sys/dev/mlx5/crypto.h
32
int mlx5_encryption_key_create(struct mlx5_core_dev *, u32 pdn, u32 key_type,
sys/dev/mlx5/crypto.h
33
const void *p_key, u32 key_len, u32 *p_obj_id);
sys/dev/mlx5/crypto.h
34
int mlx5_encryption_key_destroy(struct mlx5_core_dev *mdev, u32 oid);
sys/dev/mlx5/device.h
141
case sizeof(u32): \
sys/dev/mlx5/device.h
175
u32 ___t = MLX5_VSC_GET(typ, p, fld); \
sys/dev/mlx5/device.h
55
#define __mlx5_mask(typ, fld) ((u32)((1ull << __mlx5_bit_sz(typ, fld)) - 1))
sys/dev/mlx5/device.h
619
u32 rq_user_index_delay_drop;
sys/dev/mlx5/device.h
620
u32 rsvd0[6];
sys/dev/mlx5/device.h
94
u32 ___t = MLX5_GET(typ, p, fld); \
sys/dev/mlx5/diagnostics.h
139
u32 *data;
sys/dev/mlx5/doorbell.h
66
__raw_writel((__force u32) val[0], dest);
sys/dev/mlx5/doorbell.h
67
__raw_writel((__force u32) val[1], dest + 4);
sys/dev/mlx5/driver.h
1017
u32 _out[MLX5_ST_SZ_DW(ifc_cmd##_out)] = {}; \
sys/dev/mlx5/driver.h
1022
int mlx5_cmd_alloc_uar(struct mlx5_core_dev *dev, u32 *uarn);
sys/dev/mlx5/driver.h
1023
int mlx5_cmd_free_uar(struct mlx5_core_dev *dev, u32 uarn);
sys/dev/mlx5/driver.h
1046
int mlx5_core_query_vendor_id(struct mlx5_core_dev *mdev, u32 *vendor_id);
sys/dev/mlx5/driver.h
1053
struct mlx5_async_ctx *async_ctx, u32 *in,
sys/dev/mlx5/driver.h
1054
int inlen, u32 *out, int outlen,
sys/dev/mlx5/driver.h
1059
u32 *in, int inlen);
sys/dev/mlx5/driver.h
1062
u32 *out, int outlen);
sys/dev/mlx5/driver.h
1064
u32 *mkey);
sys/dev/mlx5/driver.h
1065
int mlx5_core_alloc_pd(struct mlx5_core_dev *dev, u32 *pdn, u16 uid);
sys/dev/mlx5/driver.h
1066
int mlx5_core_dealloc_pd(struct mlx5_core_dev *dev, u32 pdn, u16 uid);
sys/dev/mlx5/driver.h
1090
void mlx5_rsc_event(struct mlx5_core_dev *dev, u32 rsn, int event_type);
sys/dev/mlx5/driver.h
1091
void mlx5_srq_event(struct mlx5_core_dev *dev, u32 srqn, int event_type);
sys/dev/mlx5/driver.h
1092
struct mlx5_core_srq *mlx5_core_get_srq(struct mlx5_core_dev *dev, u32 srqn);
sys/dev/mlx5/driver.h
1094
void mlx5_cq_event(struct mlx5_core_dev *dev, u32 cqn, int event_type);
sys/dev/mlx5/driver.h
1101
int mlx5_core_attach_mcg(struct mlx5_core_dev *dev, union ib_gid *mgid, u32 qpn);
sys/dev/mlx5/driver.h
1102
int mlx5_core_detach_mcg(struct mlx5_core_dev *dev, union ib_gid *mgid, u32 qpn);
sys/dev/mlx5/driver.h
1117
u32 *out, int outlen);
sys/dev/mlx5/driver.h
1134
int mlx5_core_create_psv(struct mlx5_core_dev *dev, u32 pdn,
sys/dev/mlx5/driver.h
1135
int npsvs, u32 *sig_index);
sys/dev/mlx5/driver.h
1170
int mlx5_vsc_wait_on_flag(struct mlx5_core_dev *mdev, u32 expected);
sys/dev/mlx5/driver.h
1171
int mlx5_vsc_write(struct mlx5_core_dev *mdev, u32 addr, const u32 *data);
sys/dev/mlx5/driver.h
1172
int mlx5_vsc_read(struct mlx5_core_dev *mdev, u32 addr, u32 *data);
sys/dev/mlx5/driver.h
1173
int mlx5_vsc_lock_addr_space(struct mlx5_core_dev *mdev, u32 addr);
sys/dev/mlx5/driver.h
1174
int mlx5_vsc_unlock_addr_space(struct mlx5_core_dev *mdev, u32 addr);
sys/dev/mlx5/driver.h
1178
static inline u32 mlx5_mkey_to_idx(u32 mkey)
sys/dev/mlx5/driver.h
1183
static inline u32 mlx5_idx_to_mkey(u32 mkey_idx)
sys/dev/mlx5/driver.h
1188
static inline u8 mlx5_mkey_variant(u32 mkey)
sys/dev/mlx5/driver.h
1245
int mlx5_rl_add_rate(struct mlx5_core_dev *dev, u32 rate, u32 burst, u16 *index);
sys/dev/mlx5/driver.h
1246
void mlx5_rl_remove_rate(struct mlx5_core_dev *dev, u32 rate, u32 burst);
sys/dev/mlx5/driver.h
1247
bool mlx5_rl_is_in_range(const struct mlx5_core_dev *dev, u32 rate, u32 burst);
sys/dev/mlx5/driver.h
1248
int mlx5e_query_rate_limit_cmd(struct mlx5_core_dev *dev, u16 index, u32 *scq_handle);
sys/dev/mlx5/driver.h
1250
static inline u32 mlx5_rl_get_scq_handle(struct mlx5_core_dev *dev, uint16_t index)
sys/dev/mlx5/driver.h
238
u32 numpages;
sys/dev/mlx5/driver.h
295
u32 *bulk_query_out;
sys/dev/mlx5/driver.h
333
u32 __iomem *vector;
sys/dev/mlx5/driver.h
385
u32 cons_index;
sys/dev/mlx5/driver.h
398
u32 psv_idx;
sys/dev/mlx5/driver.h
400
u32 pd;
sys/dev/mlx5/driver.h
405
u32 ref_tag;
sys/dev/mlx5/driver.h
415
u32 sigerr_count;
sys/dev/mlx5/driver.h
427
u32 key;
sys/dev/mlx5/driver.h
428
u32 pd;
sys/dev/mlx5/driver.h
429
u32 type;
sys/dev/mlx5/driver.h
451
u32 index;
sys/dev/mlx5/driver.h
477
u32 index;
sys/dev/mlx5/driver.h
483
u32 srqn;
sys/dev/mlx5/driver.h
512
u32 prev;
sys/dev/mlx5/driver.h
514
u32 fatal_error;
sys/dev/mlx5/driver.h
566
u32 rate;
sys/dev/mlx5/driver.h
569
u32 qos_handle; /* schedule queue handle */
sys/dev/mlx5/driver.h
570
u32 refcount;
sys/dev/mlx5/driver.h
576
u32 max_rate;
sys/dev/mlx5/driver.h
577
u32 min_rate;
sys/dev/mlx5/driver.h
702
u32 hca_caps_cur[MLX5_CAP_NUM][MLX5_UN_SZ_DW(hca_cap_union)];
sys/dev/mlx5/driver.h
703
u32 hca_caps_max[MLX5_CAP_NUM][MLX5_UN_SZ_DW(hca_cap_union)];
sys/dev/mlx5/driver.h
705
u32 pcam[MLX5_ST_SZ_DW(pcam_reg)];
sys/dev/mlx5/driver.h
706
u32 mcam[MLX5_ST_SZ_DW(mcam_reg)];
sys/dev/mlx5/driver.h
707
u32 qcam[MLX5_ST_SZ_DW(qcam_reg)];
sys/dev/mlx5/driver.h
708
u32 fpga[MLX5_ST_SZ_DW(fpga_cap)];
sys/dev/mlx5/driver.h
723
u32 vsc_addr;
sys/dev/mlx5/driver.h
724
u32 issi;
sys/dev/mlx5/driver.h
738
u32 num_q_counter_allocated[MLX5_INTERFACE_NUMBER];
sys/dev/mlx5/driver.h
800
u32 eth_proto_cap;
sys/dev/mlx5/driver.h
803
u32 eth_proto_admin;
sys/dev/mlx5/driver.h
806
u32 eth_proto_oper;
sys/dev/mlx5/driver.h
809
u32 eth_proto_lp_advertise;
sys/dev/mlx5/driver.h
974
static inline u32 mlx5_base_mkey(const u32 key)
sys/dev/mlx5/driver.h
983
void mlx5_cmd_mbox_status(void *out, u8 *status, u32 *syndrome);
sys/dev/mlx5/fs.h
130
u32 flags;
sys/dev/mlx5/fs.h
131
u32 flow_tag;
sys/dev/mlx5/fs.h
132
u32 flow_source;
sys/dev/mlx5/fs.h
137
u32 match_criteria[MLX5_ST_SZ_DW(fte_match_param)];
sys/dev/mlx5/fs.h
138
u32 match_value[MLX5_ST_SZ_DW(fte_match_param)];
sys/dev/mlx5/fs.h
154
u32 tir_num;
sys/dev/mlx5/fs.h
155
u32 ft_num;
sys/dev/mlx5/fs.h
157
u32 counter_id;
sys/dev/mlx5/fs.h
168
u32 min;
sys/dev/mlx5/fs.h
169
u32 max;
sys/dev/mlx5/fs.h
171
u32 sampler_id;
sys/dev/mlx5/fs.h
176
u32 object_id;
sys/dev/mlx5/fs.h
180
u32 ctrl_data;
sys/dev/mlx5/fs.h
211
u32 obj_id;
sys/dev/mlx5/fs.h
217
u32 action;
sys/dev/mlx5/fs.h
221
u32 flags;
sys/dev/mlx5/fs.h
241
static inline bool outer_header_zero(u32 *match_criteria)
sys/dev/mlx5/fs.h
260
u32 level;
sys/dev/mlx5/fs.h
261
u32 flags;
sys/dev/mlx5/fs.h
292
int prio, u32 level);
sys/dev/mlx5/fs.h
306
mlx5_create_flow_group(struct mlx5_flow_table *ft, u32 *in);
sys/dev/mlx5/fs.h
351
void mlx5_get_match_criteria(u32 *match_criteria,
sys/dev/mlx5/fs.h
354
void mlx5_get_match_value(u32 *match_value,
sys/dev/mlx5/fs.h
369
u32 match_criteria[MLX5_ST_SZ_DW(fte_match_param)];
sys/dev/mlx5/fs.h
370
u32 match_value[MLX5_ST_SZ_DW(fte_match_param)];
sys/dev/mlx5/fs.h
376
u32 match_criteria[MLX5_ST_SZ_DW(fte_match_param)];
sys/dev/mlx5/fs.h
423
u32 mlx5_fc_id(struct mlx5_fc *counter);
sys/dev/mlx5/fs.h
426
u32 mlx5_flow_table_id(struct mlx5_flow_table *ft);
sys/dev/mlx5/fs.h
427
int mlx5_fs_add_rx_underlay_qpn(struct mlx5_core_dev *dev, u32 underlay_qpn);
sys/dev/mlx5/fs.h
428
int mlx5_fs_remove_rx_underlay_qpn(struct mlx5_core_dev *dev, u32 underlay_qpn);
sys/dev/mlx5/mlx5_accel/ipsec.h
110
u32 authsize;
sys/dev/mlx5/mlx5_accel/ipsec.h
111
u32 reqid;
sys/dev/mlx5/mlx5_accel/ipsec.h
134
u32 pdn;
sys/dev/mlx5/mlx5_accel/ipsec.h
135
u32 mkey;
sys/dev/mlx5/mlx5_accel/ipsec.h
149
u32 esn;
sys/dev/mlx5/mlx5_accel/ipsec.h
150
u32 esn_msb;
sys/dev/mlx5/mlx5_accel/ipsec.h
163
u32 ipsec_obj_id;
sys/dev/mlx5/mlx5_accel/ipsec.h
164
u32 enc_key_id;
sys/dev/mlx5/mlx5_accel/ipsec.h
192
u32 reqid;
sys/dev/mlx5/mlx5_accel/ipsec.h
193
u32 prio;
sys/dev/mlx5/mlx5_accel/ipsec.h
217
u32 mlx5_ipsec_device_caps(struct mlx5_core_dev *mdev);
sys/dev/mlx5/mlx5_accel/ipsec.h
276
u32 ipsec_meta_data = be32_to_cpu(cqe->ft_metadata);
sys/dev/mlx5/mlx5_accel/ipsec.h
51
u32 salt;
sys/dev/mlx5/mlx5_accel/ipsec.h
52
u32 icv_len;
sys/dev/mlx5/mlx5_accel/ipsec.h
54
u32 key_len;
sys/dev/mlx5/mlx5_accel/ipsec.h
55
u32 aes_key[256 / 32];
sys/dev/mlx5/mlx5_accel/ipsec.h
84
u32 replay_window;
sys/dev/mlx5/mlx5_accel/ipsec.h
85
u32 esn;
sys/dev/mlx5/mlx5_accel/ipsec.h
86
u32 esn_msb;
sys/dev/mlx5/mlx5_accel/ipsec.h
92
u32 spi;
sys/dev/mlx5/mlx5_accel/mlx5_ipsec.c
223
attrs->replay_esn.esn = max_t(u32, sa_entry->esn_state.esn, 1);
sys/dev/mlx5/mlx5_accel/mlx5_ipsec_fs.c
1018
static void tx_ft_put_policy(struct mlx5e_ipsec *ipsec, u32 prio)
sys/dev/mlx5/mlx5_accel/mlx5_ipsec_fs.c
104
u32 refcnt;
sys/dev/mlx5/mlx5_accel/mlx5_ipsec_fs.c
1065
static void setup_fte_reg_c0(struct mlx5_flow_spec *spec, u32 reqid)
sys/dev/mlx5/mlx5_accel/mlx5_ipsec_fs.c
1726
u32 *in;
sys/dev/mlx5/mlx5_accel/mlx5_ipsec_fs.c
182
static void setup_fte_spi(struct mlx5_flow_spec *spec, u32 spi, bool encap)
sys/dev/mlx5/mlx5_accel/mlx5_ipsec_fs.c
277
ipsec_chains_get_table(struct mlx5_fs_chains *chains, u32 prio)
sys/dev/mlx5/mlx5_accel/mlx5_ipsec_fs.c
282
static void ipsec_chains_put_table(struct mlx5_fs_chains *chains, u32 prio)
sys/dev/mlx5/mlx5_accel/mlx5_ipsec_fs.c
310
u32 *flow_group_in;
sys/dev/mlx5/mlx5_accel/mlx5_ipsec_fs.c
350
static int setup_modify_header(struct mlx5_core_dev *mdev, u32 val, u8 dir,
sys/dev/mlx5/mlx5_accel/mlx5_ipsec_fs.c
737
u32 *in;
sys/dev/mlx5/mlx5_accel/mlx5_ipsec_fs.c
991
u32 prio)
sys/dev/mlx5/mlx5_accel/mlx5_ipsec_offload.c
138
u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)];
sys/dev/mlx5/mlx5_accel/mlx5_ipsec_offload.c
139
u32 in[MLX5_ST_SZ_DW(create_ipsec_obj_in)] = {};
sys/dev/mlx5/mlx5_accel/mlx5_ipsec_offload.c
182
u32 in[MLX5_ST_SZ_DW(general_obj_in_cmd_hdr)] = {};
sys/dev/mlx5/mlx5_accel/mlx5_ipsec_offload.c
183
u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)];
sys/dev/mlx5/mlx5_accel/mlx5_ipsec_offload.c
293
u32 in[MLX5_ST_SZ_DW(modify_ipsec_obj_in)] = {};
sys/dev/mlx5/mlx5_accel/mlx5_ipsec_offload.c
294
u32 out[MLX5_ST_SZ_DW(query_ipsec_obj_out)];
sys/dev/mlx5/mlx5_accel/mlx5_ipsec_offload.c
360
u32 mode_param)
sys/dev/mlx5/mlx5_accel/mlx5_ipsec_offload.c
38
u32 mlx5_ipsec_device_caps(struct mlx5_core_dev *mdev)
sys/dev/mlx5/mlx5_accel/mlx5_ipsec_offload.c
40
u32 caps = 0;
sys/dev/mlx5/mlx5_accel/mlx5_ipsec_offload.c
404
u32 mode_param = MLX5_GET(ipsec_aso, aso->ctx, mode_parameter);
sys/dev/mlx5/mlx5_accel/mlx5_ipsec_offload.c
87
static void mlx5e_ipsec_packet_setup(void *obj, u32 pdn,
sys/dev/mlx5/mlx5_accel/mlx5_ipsec_rxtx.c
67
u32 drv_spi;
sys/dev/mlx5/mlx5_core/eswitch.h
123
u32 size;
sys/dev/mlx5/mlx5_core/flow_table.h
37
u32 match_criteria[MLX5_ST_SZ_DW(fte_match_param)];
sys/dev/mlx5/mlx5_core/flow_table.h
47
u32 *flow_index);
sys/dev/mlx5/mlx5_core/flow_table.h
48
int mlx5_del_flow_table_entry(void *flow_table, u32 flow_index);
sys/dev/mlx5/mlx5_core/flow_table.h
49
u32 mlx5_get_flow_table_id(void *flow_table);
sys/dev/mlx5/mlx5_core/flow_table.h
51
u8 vport_num, u8 table_type, u32 table_id,
sys/dev/mlx5/mlx5_core/flow_table.h
52
u32 underlay_qpn);
sys/dev/mlx5/mlx5_core/flow_table.h
54
u32 mlx5_set_flow_table_miss_id(void *flow_table, u32 miss_ft_id);
sys/dev/mlx5/mlx5_core/flow_table.h
59
u32 num_counters, u16 *cnt_ids,
sys/dev/mlx5/mlx5_core/fs_chains.h
21
u32 flags;
sys/dev/mlx5/mlx5_core/fs_chains.h
22
u32 max_grp_num;
sys/dev/mlx5/mlx5_core/fs_chains.h
31
u32
sys/dev/mlx5/mlx5_core/fs_chains.h
33
u32
sys/dev/mlx5/mlx5_core/fs_chains.h
35
u32
sys/dev/mlx5/mlx5_core/fs_chains.h
39
mlx5_chains_get_table(struct mlx5_fs_chains *chains, u32 chain, u32 prio,
sys/dev/mlx5/mlx5_core/fs_chains.h
40
u32 level);
sys/dev/mlx5/mlx5_core/fs_chains.h
42
mlx5_chains_put_table(struct mlx5_fs_chains *chains, u32 chain, u32 prio,
sys/dev/mlx5/mlx5_core/fs_chains.h
43
u32 level);
sys/dev/mlx5/mlx5_core/fs_chains.h
55
mlx5_chains_get_chain_mapping(struct mlx5_fs_chains *chains, u32 chain,
sys/dev/mlx5/mlx5_core/fs_chains.h
56
u32 *chain_mapping);
sys/dev/mlx5/mlx5_core/fs_chains.h
59
u32 chain_mapping);
sys/dev/mlx5/mlx5_core/fs_cmd.h
101
u32 (*get_capabilities)(struct mlx5_flow_root_namespace *ns,
sys/dev/mlx5/mlx5_core/fs_cmd.h
105
int mlx5_cmd_fc_alloc(struct mlx5_core_dev *dev, u32 *id);
sys/dev/mlx5/mlx5_core/fs_cmd.h
108
u32 *id);
sys/dev/mlx5/mlx5_core/fs_cmd.h
109
int mlx5_cmd_fc_free(struct mlx5_core_dev *dev, u32 id);
sys/dev/mlx5/mlx5_core/fs_cmd.h
110
int mlx5_cmd_fc_query(struct mlx5_core_dev *dev, u32 id,
sys/dev/mlx5/mlx5_core/fs_cmd.h
114
int mlx5_cmd_fc_bulk_query(struct mlx5_core_dev *dev, u32 base_id, int bulk_len,
sys/dev/mlx5/mlx5_core/fs_cmd.h
115
u32 *out);
sys/dev/mlx5/mlx5_core/fs_cmd.h
52
u32 *in,
sys/dev/mlx5/mlx5_core/fs_cmd.h
76
u32 underlay_qpn,
sys/dev/mlx5/mlx5_core/fs_core.h
161
u32 sw_action;
sys/dev/mlx5/mlx5_core/fs_core.h
172
u32 id;
sys/dev/mlx5/mlx5_core/fs_core.h
189
u32 flags;
sys/dev/mlx5/mlx5_core/fs_core.h
197
u32 qpn;
sys/dev/mlx5/mlx5_core/fs_core.h
205
((MLX5_BYTE_OFF(fte_match_param, MLX5_FTE_MATCH_PARAM_RESERVED) / sizeof(u32)) + \
sys/dev/mlx5/mlx5_core/fs_core.h
215
u32 val[MLX5_ST_SZ_DW_MATCH_PARAM];
sys/dev/mlx5/mlx5_core/fs_core.h
216
u32 dests_size;
sys/dev/mlx5/mlx5_core/fs_core.h
217
u32 fwd_dests;
sys/dev/mlx5/mlx5_core/fs_core.h
218
u32 index;
sys/dev/mlx5/mlx5_core/fs_core.h
244
u32 match_criteria[MLX5_ST_SZ_DW_MATCH_PARAM];
sys/dev/mlx5/mlx5_core/fs_core.h
251
u32 start_index;
sys/dev/mlx5/mlx5_core/fs_core.h
252
u32 max_ftes;
sys/dev/mlx5/mlx5_core/fs_core.h
254
u32 id;
sys/dev/mlx5/mlx5_core/fs_core.h
296
u32 mlx5_fs_get_capabilities(struct mlx5_core_dev *dev, enum mlx5_flow_namespace_type type);
sys/dev/mlx5/mlx5_core/fs_core.h
40
u32 id;
sys/dev/mlx5/mlx5_core/fs_core.h
46
u32 id;
sys/dev/mlx5/mlx5_core/fs_core.h
54
u32 id;
sys/dev/mlx5/mlx5_core/mlx5_cmd.c
1210
u32 vector = vector_flags; /* discard flags in the upper dword */
sys/dev/mlx5/mlx5_core/mlx5_cmd.c
1307
u32 drv_synd;
sys/dev/mlx5/mlx5_core/mlx5_cmd.c
1557
u32 cmd_h, cmd_l;
sys/dev/mlx5/mlx5_core/mlx5_cmd.c
1614
cmd_h = (u32)((u64)(cmd->dma) >> 32);
sys/dev/mlx5/mlx5_core/mlx5_cmd.c
1615
cmd_l = (u32)(cmd->dma);
sys/dev/mlx5/mlx5_core/mlx5_cmd.c
1661
u32 in[MLX5_ST_SZ_DW(query_cong_statistics_in)] = { };
sys/dev/mlx5/mlx5_core/mlx5_cmd.c
1673
u32 in[MLX5_ST_SZ_DW(query_cong_params_in)] = { };
sys/dev/mlx5/mlx5_core/mlx5_cmd.c
1686
u32 out[MLX5_ST_SZ_DW(modify_cong_params_out)] = { };
sys/dev/mlx5/mlx5_core/mlx5_cmd.c
1695
u32 in[MLX5_ST_SZ_DW(query_cong_status_in)] = { };
sys/dev/mlx5/mlx5_core/mlx5_cmd.c
1709
u32 out[MLX5_ST_SZ_DW(modify_cong_status_out)] = { };
sys/dev/mlx5/mlx5_core/mlx5_cmd.c
324
u32 *synd, u8 *status)
sys/dev/mlx5/mlx5_core/mlx5_cmd.c
688
void mlx5_cmd_mbox_status(void *out, u8 *status, u32 *syndrome)
sys/dev/mlx5/mlx5_core/mlx5_cmd.c
696
u32 syndrome;
sys/dev/mlx5/mlx5_core/mlx5_cmd.c
835
u32 drv_synd;
sys/dev/mlx5/mlx5_core/mlx5_core.h
111
int mlx5_query_qcam_reg(struct mlx5_core_dev *mdev, u32 *qcam,
sys/dev/mlx5/mlx5_core/mlx5_core.h
113
int mlx5_query_pcam_reg(struct mlx5_core_dev *dev, u32 *pcam,
sys/dev/mlx5/mlx5_core/mlx5_core.h
115
int mlx5_query_mcam_reg(struct mlx5_core_dev *dev, u32 *mcap,
sys/dev/mlx5/mlx5_core/mlx5_cq.c
126
u32 *in, int inlen, u32 *out, int outlen)
sys/dev/mlx5/mlx5_core/mlx5_cq.c
129
u32 din[MLX5_ST_SZ_DW(destroy_cq_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_cq.c
130
u32 dout[MLX5_ST_SZ_DW(destroy_cq_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_cq.c
168
u32 out[MLX5_ST_SZ_DW(destroy_cq_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_cq.c
169
u32 in[MLX5_ST_SZ_DW(destroy_cq_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_cq.c
193
u32 *out, int outlen)
sys/dev/mlx5/mlx5_core/mlx5_cq.c
195
u32 in[MLX5_ST_SZ_DW(query_cq_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_cq.c
206
u32 *in, int inlen)
sys/dev/mlx5/mlx5_core/mlx5_cq.c
208
u32 out[MLX5_ST_SZ_DW(modify_cq_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_cq.c
238
struct mlx5_core_cq *cq, u32 mask,
sys/dev/mlx5/mlx5_core/mlx5_cq.c
241
u32 in[MLX5_ST_SZ_DW(modify_cq_in)] = {};
sys/dev/mlx5/mlx5_core/mlx5_cq.c
64
u32 cqn;
sys/dev/mlx5/mlx5_core/mlx5_cq.c
94
void mlx5_cq_event(struct mlx5_core_dev *dev, u32 cqn, int event_type)
sys/dev/mlx5/mlx5_core/mlx5_crypto.c
36
int mlx5_encryption_key_create(struct mlx5_core_dev *mdev, u32 pdn, u32 key_type,
sys/dev/mlx5/mlx5_core/mlx5_crypto.c
37
const void *p_key, u32 key_len, u32 *p_obj_id)
sys/dev/mlx5/mlx5_core/mlx5_crypto.c
39
u32 in[MLX5_ST_SZ_DW(create_encryption_key_in)] = {};
sys/dev/mlx5/mlx5_core/mlx5_crypto.c
40
u32 out[MLX5_ST_SZ_DW(create_encryption_key_out)] = {};
sys/dev/mlx5/mlx5_core/mlx5_crypto.c
84
int mlx5_encryption_key_destroy(struct mlx5_core_dev *mdev, u32 oid)
sys/dev/mlx5/mlx5_core/mlx5_crypto.c
86
u32 in[MLX5_ST_SZ_DW(destroy_encryption_key_in)] = {};
sys/dev/mlx5/mlx5_core/mlx5_crypto.c
87
u32 out[MLX5_ST_SZ_DW(destroy_encryption_key_out)] = {};
sys/dev/mlx5/mlx5_core/mlx5_diag_cnt.c
152
decode_cnt_buffer(u32 num_of_samples, u8 *out, struct sbuf *sbuf)
sys/dev/mlx5/mlx5_core/mlx5_diag_cnt.c
156
u32 i;
sys/dev/mlx5/mlx5_core/mlx5_diag_cnt.c
253
u32 i;
sys/dev/mlx5/mlx5_core/mlx5_diag_cnt.c
297
u32 num_counters = MLX5_CAP_GEN(dev, num_of_diagnostic_counters);
sys/dev/mlx5/mlx5_core/mlx5_diag_cnt.c
299
u32 i;
sys/dev/mlx5/mlx5_core/mlx5_diag_cnt.c
317
u32 i;
sys/dev/mlx5/mlx5_core/mlx5_diag_cnt.c
328
u32 i;
sys/dev/mlx5/mlx5_core/mlx5_diag_cnt.c
366
u32 i;
sys/dev/mlx5/mlx5_core/mlx5_diag_cnt.c
367
u32 j;
sys/dev/mlx5/mlx5_core/mlx5_diag_cnt.c
430
u32 i;
sys/dev/mlx5/mlx5_core/mlx5_diagnostics.c
304
u32 data = 0;
sys/dev/mlx5/mlx5_core/mlx5_eq.c
100
static struct mlx5_eqe *get_eqe(struct mlx5_eq *eq, u32 entry)
sys/dev/mlx5/mlx5_core/mlx5_eq.c
215
u32 val = (eq->cons_index & 0xffffff) | (eq->eqn << 24);
sys/dev/mlx5/mlx5_core/mlx5_eq.c
216
__raw_writel((__force u32) cpu_to_be32(val), addr);
sys/dev/mlx5/mlx5_core/mlx5_eq.c
236
u32 cqn;
sys/dev/mlx5/mlx5_core/mlx5_eq.c
237
u32 rsn;
sys/dev/mlx5/mlx5_core/mlx5_eq.c
434
u32 out[MLX5_ST_SZ_DW(create_eq_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_eq.c
439
u32 *in;
sys/dev/mlx5/mlx5_core/mlx5_eq.c
641
u32 *out, int outlen)
sys/dev/mlx5/mlx5_core/mlx5_eq.c
643
u32 in[MLX5_ST_SZ_DW(query_eq_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_eq.c
74
u32 reserved;
sys/dev/mlx5/mlx5_core/mlx5_eq.c
75
u32 unmap_eqn;
sys/dev/mlx5/mlx5_core/mlx5_eq.c
91
u32 in[MLX5_ST_SZ_DW(destroy_eq_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_eq.c
92
u32 out[MLX5_ST_SZ_DW(destroy_eq_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_eswitch.c
117
static int query_esw_vport_context_cmd(struct mlx5_core_dev *mdev, u32 vport,
sys/dev/mlx5/mlx5_core/mlx5_eswitch.c
118
u32 *out, int outlen)
sys/dev/mlx5/mlx5_core/mlx5_eswitch.c
120
u32 in[MLX5_ST_SZ_DW(query_esw_vport_context_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_eswitch.c
132
static int query_esw_vport_cvlan(struct mlx5_core_dev *dev, u32 vport,
sys/dev/mlx5/mlx5_core/mlx5_eswitch.c
135
u32 out[MLX5_ST_SZ_DW(query_esw_vport_context_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_eswitch.c
173
u32 out[MLX5_ST_SZ_DW(modify_esw_vport_context_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_eswitch.c
185
static int modify_esw_vport_cvlan(struct mlx5_core_dev *dev, u32 vport,
sys/dev/mlx5/mlx5_core/mlx5_eswitch.c
188
u32 in[MLX5_ST_SZ_DW(modify_esw_vport_context_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_eswitch.c
219
esw_fdb_set_vport_rule(struct mlx5_eswitch *esw, u8 mac[ETH_ALEN], u32 vport)
sys/dev/mlx5/mlx5_core/mlx5_eswitch.c
272
u32 *flow_group_in;
sys/dev/mlx5/mlx5_core/mlx5_eswitch.c
347
u32 vport = vaddr->vport;
sys/dev/mlx5/mlx5_core/mlx5_eswitch.c
383
u32 vport = vaddr->vport;
sys/dev/mlx5/mlx5_core/mlx5_eswitch.c
408
u32 vport = vaddr->vport;
sys/dev/mlx5/mlx5_core/mlx5_eswitch.c
439
u32 vport = vaddr->vport;
sys/dev/mlx5/mlx5_core/mlx5_eswitch.c
469
u32 vport_num, int list_type)
sys/dev/mlx5/mlx5_core/mlx5_eswitch.c
504
u32 vport_num, int list_type)
sys/dev/mlx5/mlx5_core/mlx5_eswitch.c
60
u32 table_index;
sys/dev/mlx5/mlx5_core/mlx5_eswitch.c
609
u32 *flow_group_in;
sys/dev/mlx5/mlx5_core/mlx5_eswitch.c
61
u32 vport;
sys/dev/mlx5/mlx5_core/mlx5_eswitch.c
68
u32 refcnt;
sys/dev/mlx5/mlx5_core/mlx5_eswitch.c
711
u32 *flow_group_in;
sys/dev/mlx5/mlx5_core/mlx5_eswitch.c
75
u32 vport;
sys/dev/mlx5/mlx5_core/mlx5_eswitch.c
89
u32 events_mask)
sys/dev/mlx5/mlx5_core/mlx5_fs_chains.c
104
u32 mlx5_chains_get_chain_range(struct mlx5_fs_chains *chains)
sys/dev/mlx5/mlx5_core/mlx5_fs_chains.c
116
u32 mlx5_chains_get_nf_ft_chain(struct mlx5_fs_chains *chains)
sys/dev/mlx5/mlx5_core/mlx5_fs_chains.c
121
u32 mlx5_chains_get_prio_range(struct mlx5_fs_chains *chains)
sys/dev/mlx5/mlx5_core/mlx5_fs_chains.c
151
u32 chain, u32 prio, u32 level)
sys/dev/mlx5/mlx5_core/mlx5_fs_chains.c
210
mlx5_chains_create_chain(struct mlx5_fs_chains *chains, u32 chain)
sys/dev/mlx5/mlx5_core/mlx5_fs_chains.c
245
mlx5_chains_get_chain(struct mlx5_fs_chains *chains, u32 chain)
sys/dev/mlx5/mlx5_core/mlx5_fs_chains.c
32
u32 group_num;
sys/dev/mlx5/mlx5_core/mlx5_fs_chains.c
33
u32 flags;
sys/dev/mlx5/mlx5_core/mlx5_fs_chains.c
352
u32 chain, u32 prio, u32 level)
sys/dev/mlx5/mlx5_core/mlx5_fs_chains.c
362
u32 *flow_group_in;
sys/dev/mlx5/mlx5_core/mlx5_fs_chains.c
39
u32 chain;
sys/dev/mlx5/mlx5_core/mlx5_fs_chains.c
486
mlx5_chains_get_table(struct mlx5_fs_chains *chains, u32 chain, u32 prio,
sys/dev/mlx5/mlx5_core/mlx5_fs_chains.c
487
u32 level)
sys/dev/mlx5/mlx5_core/mlx5_fs_chains.c
52
u32 chain;
sys/dev/mlx5/mlx5_core/mlx5_fs_chains.c
53
u32 prio;
sys/dev/mlx5/mlx5_core/mlx5_fs_chains.c
539
mlx5_chains_put_table(struct mlx5_fs_chains *chains, u32 chain, u32 prio,
sys/dev/mlx5/mlx5_core/mlx5_fs_chains.c
54
u32 level;
sys/dev/mlx5/mlx5_core/mlx5_fs_chains.c
540
u32 level)
sys/dev/mlx5/mlx5_core/mlx5_fs_chains.c
581
u32 chain, prio, level;
sys/dev/mlx5/mlx5_core/mlx5_fs_cmd.c
157
static u32 mlx5_cmd_stub_get_capabilities(struct mlx5_flow_root_namespace *ns,
sys/dev/mlx5/mlx5_core/mlx5_fs_cmd.c
164
struct mlx5_flow_table *ft, u32 underlay_qpn,
sys/dev/mlx5/mlx5_core/mlx5_fs_cmd.c
167
u32 in[MLX5_ST_SZ_DW(set_flow_table_root_in)] = {};
sys/dev/mlx5/mlx5_core/mlx5_fs_cmd.c
199
u32 out[MLX5_ST_SZ_DW(create_flow_table_out)] = {};
sys/dev/mlx5/mlx5_core/mlx5_fs_cmd.c
200
u32 in[MLX5_ST_SZ_DW(create_flow_table_in)] = {};
sys/dev/mlx5/mlx5_core/mlx5_fs_cmd.c
266
u32 in[MLX5_ST_SZ_DW(destroy_flow_table_in)] = {};
sys/dev/mlx5/mlx5_core/mlx5_fs_cmd.c
289
u32 in[MLX5_ST_SZ_DW(modify_flow_table_in)] = {};
sys/dev/mlx5/mlx5_core/mlx5_fs_cmd.c
332
u32 *in,
sys/dev/mlx5/mlx5_core/mlx5_fs_cmd.c
335
u32 out[MLX5_ST_SZ_DW(create_flow_group_out)] = {};
sys/dev/mlx5/mlx5_core/mlx5_fs_cmd.c
357
u32 in[MLX5_ST_SZ_DW(destroy_flow_group_in)] = {};
sys/dev/mlx5/mlx5_core/mlx5_fs_cmd.c
439
u32 out[MLX5_ST_SZ_DW(set_fte_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_fs_cmd.c
447
u32 *in;
sys/dev/mlx5/mlx5_core/mlx5_fs_cmd.c
45
u32 underlay_qpn,
sys/dev/mlx5/mlx5_core/mlx5_fs_cmd.c
487
u32 action;
sys/dev/mlx5/mlx5_core/mlx5_fs_cmd.c
674
u32 in[MLX5_ST_SZ_DW(delete_fte_in)] = {};
sys/dev/mlx5/mlx5_core/mlx5_fs_cmd.c
690
u32 *id)
sys/dev/mlx5/mlx5_core/mlx5_fs_cmd.c
692
u32 out[MLX5_ST_SZ_DW(alloc_flow_counter_out)] = {};
sys/dev/mlx5/mlx5_core/mlx5_fs_cmd.c
693
u32 in[MLX5_ST_SZ_DW(alloc_flow_counter_in)] = {};
sys/dev/mlx5/mlx5_core/mlx5_fs_cmd.c
706
int mlx5_cmd_fc_alloc(struct mlx5_core_dev *dev, u32 *id)
sys/dev/mlx5/mlx5_core/mlx5_fs_cmd.c
711
int mlx5_cmd_fc_free(struct mlx5_core_dev *dev, u32 id)
sys/dev/mlx5/mlx5_core/mlx5_fs_cmd.c
713
u32 in[MLX5_ST_SZ_DW(dealloc_flow_counter_in)] = {};
sys/dev/mlx5/mlx5_core/mlx5_fs_cmd.c
721
int mlx5_cmd_fc_query(struct mlx5_core_dev *dev, u32 id,
sys/dev/mlx5/mlx5_core/mlx5_fs_cmd.c
724
u32 out[MLX5_ST_SZ_BYTES(query_flow_counter_out) +
sys/dev/mlx5/mlx5_core/mlx5_fs_cmd.c
726
u32 in[MLX5_ST_SZ_DW(query_flow_counter_in)] = {};
sys/dev/mlx5/mlx5_core/mlx5_fs_cmd.c
750
int mlx5_cmd_fc_bulk_query(struct mlx5_core_dev *dev, u32 base_id, int bulk_len,
sys/dev/mlx5/mlx5_core/mlx5_fs_cmd.c
751
u32 *out)
sys/dev/mlx5/mlx5_core/mlx5_fs_cmd.c
754
u32 in[MLX5_ST_SZ_DW(query_flow_counter_in)] = {};
sys/dev/mlx5/mlx5_core/mlx5_fs_cmd.c
768
u32 out[MLX5_ST_SZ_DW(alloc_packet_reformat_context_out)] = {};
sys/dev/mlx5/mlx5_core/mlx5_fs_cmd.c
775
u32 *in;
sys/dev/mlx5/mlx5_core/mlx5_fs_cmd.c
78
u32 *in,
sys/dev/mlx5/mlx5_core/mlx5_fs_cmd.c
825
u32 in[MLX5_ST_SZ_DW(dealloc_packet_reformat_context_in)] = {};
sys/dev/mlx5/mlx5_core/mlx5_fs_cmd.c
841
u32 out[MLX5_ST_SZ_DW(alloc_modify_header_context_out)] = {};
sys/dev/mlx5/mlx5_core/mlx5_fs_cmd.c
846
u32 *in;
sys/dev/mlx5/mlx5_core/mlx5_fs_cmd.c
909
u32 in[MLX5_ST_SZ_DW(dealloc_modify_header_context_in)] = {};
sys/dev/mlx5/mlx5_core/mlx5_fs_cmd.c
920
static u32 mlx5_cmd_get_capabilities(struct mlx5_flow_root_namespace *ns,
sys/dev/mlx5/mlx5_core/mlx5_fs_core.c
1206
u32 mlx5_flow_table_id(struct mlx5_flow_table *ft)
sys/dev/mlx5/mlx5_core/mlx5_fs_core.c
1221
int prio, u32 level)
sys/dev/mlx5/mlx5_core/mlx5_fs_core.c
1272
u32 *fg_in)
sys/dev/mlx5/mlx5_core/mlx5_fs_core.c
1465
u32 max_fte = ft->autogroup.max_fte;
sys/dev/mlx5/mlx5_core/mlx5_fs_core.c
1517
u32 *in;
sys/dev/mlx5/mlx5_core/mlx5_fs_core.c
1606
u32 action1 = act1->action;
sys/dev/mlx5/mlx5_core/mlx5_fs_core.c
1607
u32 action2 = act2->action;
sys/dev/mlx5/mlx5_core/mlx5_fs_core.c
1608
u32 xored_actions;
sys/dev/mlx5/mlx5_core/mlx5_fs_core.c
1701
static bool counter_is_valid(u32 action)
sys/dev/mlx5/mlx5_core/mlx5_fs_core.c
1713
u32 action = flow_act->action;
sys/dev/mlx5/mlx5_core/mlx5_fs_core.c
1809
const u32 *match_value,
sys/dev/mlx5/mlx5_core/mlx5_fs_core.c
2069
u32 sw_action = flow_act->action;
sys/dev/mlx5/mlx5_core/mlx5_fs_core.c
2185
u32 qpn;
sys/dev/mlx5/mlx5_core/mlx5_fs_core.c
3117
u32 mlx5_fs_get_capabilities(struct mlx5_core_dev *dev, enum mlx5_flow_namespace_type type)
sys/dev/mlx5/mlx5_core/mlx5_fs_core.c
3293
int mlx5_fs_add_rx_underlay_qpn(struct mlx5_core_dev *dev, u32 underlay_qpn)
sys/dev/mlx5/mlx5_core/mlx5_fs_core.c
3332
int mlx5_fs_remove_rx_underlay_qpn(struct mlx5_core_dev *dev, u32 underlay_qpn)
sys/dev/mlx5/mlx5_core/mlx5_fs_core.c
450
static bool is_fwd_next_action(u32 action)
sys/dev/mlx5/mlx5_core/mlx5_fs_core.c
814
u32 flags)
sys/dev/mlx5/mlx5_core/mlx5_fs_core.c
960
u32 qpn;
sys/dev/mlx5/mlx5_core/mlx5_fs_counters.c
106
u32 id)
sys/dev/mlx5/mlx5_core/mlx5_fs_counters.c
154
static void update_counter_cache(int index, u32 *bulk_raw_data,
sys/dev/mlx5/mlx5_core/mlx5_fs_counters.c
172
u32 last_id)
sys/dev/mlx5/mlx5_core/mlx5_fs_counters.c
177
u32 *data = fc_stats->bulk_query_out;
sys/dev/mlx5/mlx5_core/mlx5_fs_counters.c
179
u32 bulk_base_id;
sys/dev/mlx5/mlx5_core/mlx5_fs_counters.c
234
u32 *bulk_query_out_tmp;
sys/dev/mlx5/mlx5_core/mlx5_fs_counters.c
355
u32 id = counter->id;
sys/dev/mlx5/mlx5_core/mlx5_fs_counters.c
393
u32 mlx5_fc_id(struct mlx5_fc *counter)
sys/dev/mlx5/mlx5_core/mlx5_fs_counters.c
525
u32 base_id;
sys/dev/mlx5/mlx5_core/mlx5_fs_counters.c
532
u32 id)
sys/dev/mlx5/mlx5_core/mlx5_fs_counters.c
549
u32 base_id;
sys/dev/mlx5/mlx5_core/mlx5_fs_counters.c
62
u32 id;
sys/dev/mlx5/mlx5_core/mlx5_fs_ft_pool.c
49
u32 max_ft_size = 1 << MLX5_CAP_FLOWTABLE_TYPE(dev, log_max_ft_size, table_type);
sys/dev/mlx5/mlx5_core/mlx5_fs_tcp.c
218
u32 *in;
sys/dev/mlx5/mlx5_core/mlx5_fw.c
258
u32 in[MLX5_ST_SZ_DW(init_hca_in)];
sys/dev/mlx5/mlx5_core/mlx5_fw.c
259
u32 out[MLX5_ST_SZ_DW(init_hca_out)];
sys/dev/mlx5/mlx5_core/mlx5_fw.c
271
u32 in[MLX5_ST_SZ_DW(teardown_hca_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_fw.c
272
u32 out[MLX5_ST_SZ_DW(teardown_hca_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_fw.c
280
u32 out[MLX5_ST_SZ_DW(teardown_hca_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_fw.c
281
u32 in[MLX5_ST_SZ_DW(teardown_hca_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_fw.c
310
u32 out[MLX5_ST_SZ_DW(teardown_hca_out)] = {};
sys/dev/mlx5/mlx5_core/mlx5_fw.c
311
u32 in[MLX5_ST_SZ_DW(teardown_hca_in)] = {};
sys/dev/mlx5/mlx5_core/mlx5_fw.c
33
static int mlx5_cmd_query_adapter(struct mlx5_core_dev *dev, u32 *out,
sys/dev/mlx5/mlx5_core/mlx5_fw.c
356
u32 in[MLX5_ST_SZ_DW(set_dc_cnak_trace_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_fw.c
357
u32 out[MLX5_ST_SZ_DW(set_dc_cnak_trace_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_fw.c
36
u32 in[MLX5_ST_SZ_DW(query_adapter_in)];
sys/dev/mlx5/mlx5_core/mlx5_fw.c
381
u16 component_index, u32 update_handle,
sys/dev/mlx5/mlx5_core/mlx5_fw.c
382
u32 component_size)
sys/dev/mlx5/mlx5_core/mlx5_fw.c
384
u32 out[MLX5_ST_SZ_DW(mcc_reg)];
sys/dev/mlx5/mlx5_core/mlx5_fw.c
385
u32 in[MLX5_ST_SZ_DW(mcc_reg)];
sys/dev/mlx5/mlx5_core/mlx5_fw.c
399
u32 *update_handle, u8 *error_code,
sys/dev/mlx5/mlx5_core/mlx5_fw.c
402
u32 out[MLX5_ST_SZ_DW(mcc_reg)];
sys/dev/mlx5/mlx5_core/mlx5_fw.c
403
u32 in[MLX5_ST_SZ_DW(mcc_reg)];
sys/dev/mlx5/mlx5_core/mlx5_fw.c
424
u32 update_handle,
sys/dev/mlx5/mlx5_core/mlx5_fw.c
425
u32 offset, u16 size,
sys/dev/mlx5/mlx5_core/mlx5_fw.c
429
u32 out[MLX5_ST_SZ_DW(mcda_reg)];
sys/dev/mlx5/mlx5_core/mlx5_fw.c
432
u32 *in;
sys/dev/mlx5/mlx5_core/mlx5_fw.c
444
data_element = htonl(*(u32 *)&data[j]);
sys/dev/mlx5/mlx5_core/mlx5_fw.c
456
u32 *max_component_size,
sys/dev/mlx5/mlx5_core/mlx5_fw.c
460
u32 out[MLX5_ST_SZ_DW(mcqi_reg) + MLX5_ST_SZ_DW(mcqi_cap)];
sys/dev/mlx5/mlx5_core/mlx5_fw.c
462
u32 in[MLX5_ST_SZ_DW(mcqi_reg)];
sys/dev/mlx5/mlx5_core/mlx5_fw.c
49
u32 *out;
sys/dev/mlx5/mlx5_core/mlx5_fw.c
490
u16 component_index, u32 *p_max_size,
sys/dev/mlx5/mlx5_core/mlx5_fw.c
501
static int mlx5_fsm_lock(struct mlxfw_dev *mlxfw_dev, u32 *fwhandle)
sys/dev/mlx5/mlx5_core/mlx5_fw.c
521
static int mlx5_fsm_component_update(struct mlxfw_dev *mlxfw_dev, u32 fwhandle,
sys/dev/mlx5/mlx5_core/mlx5_fw.c
522
u16 component_index, u32 component_size)
sys/dev/mlx5/mlx5_core/mlx5_fw.c
532
static int mlx5_fsm_block_download(struct mlxfw_dev *mlxfw_dev, u32 fwhandle,
sys/dev/mlx5/mlx5_core/mlx5_fw.c
533
u8 *data, u16 size, u32 offset)
sys/dev/mlx5/mlx5_core/mlx5_fw.c
542
static int mlx5_fsm_component_verify(struct mlxfw_dev *mlxfw_dev, u32 fwhandle,
sys/dev/mlx5/mlx5_core/mlx5_fw.c
553
static int mlx5_fsm_activate(struct mlxfw_dev *mlxfw_dev, u32 fwhandle)
sys/dev/mlx5/mlx5_core/mlx5_fw.c
563
static int mlx5_fsm_query_state(struct mlxfw_dev *mlxfw_dev, u32 fwhandle,
sys/dev/mlx5/mlx5_core/mlx5_fw.c
583
static void mlx5_fsm_cancel(struct mlxfw_dev *mlxfw_dev, u32 fwhandle)
sys/dev/mlx5/mlx5_core/mlx5_fw.c
592
static void mlx5_fsm_release(struct mlxfw_dev *mlxfw_dev, u32 fwhandle)
sys/dev/mlx5/mlx5_core/mlx5_fw.c
71
int mlx5_core_query_vendor_id(struct mlx5_core_dev *mdev, u32 *vendor_id)
sys/dev/mlx5/mlx5_core/mlx5_fw.c
73
u32 *out;
sys/dev/mlx5/mlx5_core/mlx5_fw.c
95
u32 in[MLX5_ST_SZ_DW(query_special_contexts_in)];
sys/dev/mlx5/mlx5_core/mlx5_fw.c
96
u32 out[MLX5_ST_SZ_DW(query_special_contexts_out)];
sys/dev/mlx5/mlx5_core/mlx5_fwdump.c
73
u32 addr, in, out, next_addr;
sys/dev/mlx5/mlx5_core/mlx5_health.c
121
u32 cur_cmdq_addr_l_sz;
sys/dev/mlx5/mlx5_core/mlx5_health.c
133
u32 rfr = ioread32be(&h->rfr) >> MLX5_RFR_OFFSET;
sys/dev/mlx5/mlx5_core/mlx5_health.c
185
static u32 check_fatal_sensors(struct mlx5_core_dev *dev)
sys/dev/mlx5/mlx5_core/mlx5_health.c
204
u32 cmdq_addr, fatal_error;
sys/dev/mlx5/mlx5_core/mlx5_health.c
270
u32 fatal_error;
sys/dev/mlx5/mlx5_core/mlx5_health.c
511
u32 fw;
sys/dev/mlx5/mlx5_core/mlx5_health.c
615
u32 fatal_error;
sys/dev/mlx5/mlx5_core/mlx5_health.c
616
u32 count;
sys/dev/mlx5/mlx5_core/mlx5_mad.c
42
u32 *out;
sys/dev/mlx5/mlx5_core/mlx5_mad.c
43
u32 *in;
sys/dev/mlx5/mlx5_core/mlx5_main.c
1523
MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
sys/dev/mlx5/mlx5_core/mlx5_main.c
1528
MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
sys/dev/mlx5/mlx5_core/mlx5_main.c
1533
MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
sys/dev/mlx5/mlx5_core/mlx5_main.c
1538
MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
sys/dev/mlx5/mlx5_core/mlx5_main.c
1543
MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
sys/dev/mlx5/mlx5_core/mlx5_main.c
1548
MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
sys/dev/mlx5/mlx5_core/mlx5_main.c
1553
MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
sys/dev/mlx5/mlx5_core/mlx5_main.c
1558
MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
sys/dev/mlx5/mlx5_core/mlx5_main.c
1563
MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
sys/dev/mlx5/mlx5_core/mlx5_main.c
1568
MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
sys/dev/mlx5/mlx5_core/mlx5_main.c
1573
MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
sys/dev/mlx5/mlx5_core/mlx5_main.c
1578
MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
sys/dev/mlx5/mlx5_core/mlx5_main.c
1583
MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
sys/dev/mlx5/mlx5_core/mlx5_main.c
1588
MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
sys/dev/mlx5/mlx5_core/mlx5_main.c
1593
MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
sys/dev/mlx5/mlx5_core/mlx5_main.c
1598
MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
sys/dev/mlx5/mlx5_core/mlx5_main.c
1603
MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
sys/dev/mlx5/mlx5_core/mlx5_main.c
1608
MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
sys/dev/mlx5/mlx5_core/mlx5_main.c
1613
MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
sys/dev/mlx5/mlx5_core/mlx5_main.c
1618
MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
sys/dev/mlx5/mlx5_core/mlx5_main.c
1623
MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
sys/dev/mlx5/mlx5_core/mlx5_main.c
1628
MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
sys/dev/mlx5/mlx5_core/mlx5_main.c
1633
MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
sys/dev/mlx5/mlx5_core/mlx5_main.c
1638
MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
sys/dev/mlx5/mlx5_core/mlx5_main.c
1643
MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
sys/dev/mlx5/mlx5_core/mlx5_main.c
1648
MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
sys/dev/mlx5/mlx5_core/mlx5_main.c
1653
MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
sys/dev/mlx5/mlx5_core/mlx5_main.c
1658
MLX5_UN_SZ_DW(hca_cap_union) * sizeof(u32), "IU", "");
sys/dev/mlx5/mlx5_core/mlx5_main.c
1849
u32 count;
sys/dev/mlx5/mlx5_core/mlx5_main.c
273
u32 in[MLX5_ST_SZ_DW(mpein_reg)] = {};
sys/dev/mlx5/mlx5_core/mlx5_main.c
274
u32 out[MLX5_ST_SZ_DW(mpein_reg)] = {};
sys/dev/mlx5/mlx5_core/mlx5_main.c
392
static u16 to_fw_pkey_sz(struct mlx5_core_dev *dev, u32 size)
sys/dev/mlx5/mlx5_core/mlx5_main.c
472
u32 out[MLX5_ST_SZ_DW(set_hca_cap_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_main.c
615
u32 out[MLX5_ST_SZ_DW(enable_hca_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_main.c
616
u32 in[MLX5_ST_SZ_DW(enable_hca_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_main.c
625
u32 out[MLX5_ST_SZ_DW(disable_hca_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_main.c
626
u32 in[MLX5_ST_SZ_DW(disable_hca_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_main.c
634
u32 query_in[MLX5_ST_SZ_DW(query_issi_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_main.c
635
u32 query_out[MLX5_ST_SZ_DW(query_issi_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_main.c
636
u32 sup_issi;
sys/dev/mlx5/mlx5_core/mlx5_main.c
643
u32 syndrome;
sys/dev/mlx5/mlx5_core/mlx5_main.c
659
u32 set_in[MLX5_ST_SZ_DW(set_issi_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_main.c
660
u32 set_out[MLX5_ST_SZ_DW(set_issi_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_main.c
761
static int wait_fw_init(struct mlx5_core_dev *dev, u32 max_wait_mili,
sys/dev/mlx5/mlx5_core/mlx5_main.c
762
u32 warn_time_mili)
sys/dev/mlx5/mlx5_core/mlx5_mcg.c
35
int mlx5_core_attach_mcg(struct mlx5_core_dev *dev, union ib_gid *mgid, u32 qpn)
sys/dev/mlx5/mlx5_core/mlx5_mcg.c
37
u32 in[MLX5_ST_SZ_DW(attach_to_mcg_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_mcg.c
38
u32 out[MLX5_ST_SZ_DW(attach_to_mcg_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_mcg.c
49
int mlx5_core_detach_mcg(struct mlx5_core_dev *dev, union ib_gid *mgid, u32 qpn)
sys/dev/mlx5/mlx5_core/mlx5_mcg.c
51
u32 in[MLX5_ST_SZ_DW(detach_from_mcg_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_mcg.c
52
u32 out[MLX5_ST_SZ_DW(detach_from_mcg_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_mpfs.c
124
u32 num;
sys/dev/mlx5/mlx5_core/mlx5_mpfs.c
43
mlx5_mpfs_add_mac(struct mlx5_core_dev *dev, u32 *p_index, const u8 *mac,
sys/dev/mlx5/mlx5_core/mlx5_mpfs.c
46
const u32 l2table_size = MIN(1U << MLX5_CAP_GEN(dev, log_max_l2_table),
sys/dev/mlx5/mlx5_core/mlx5_mpfs.c
48
u32 in[MLX5_ST_SZ_DW(set_l2_table_entry_in)] = {};
sys/dev/mlx5/mlx5_core/mlx5_mpfs.c
49
u32 out[MLX5_ST_SZ_DW(set_l2_table_entry_out)] = {};
sys/dev/mlx5/mlx5_core/mlx5_mpfs.c
51
u32 index;
sys/dev/mlx5/mlx5_core/mlx5_mpfs.c
88
mlx5_mpfs_del_mac(struct mlx5_core_dev *dev, u32 index)
sys/dev/mlx5/mlx5_core/mlx5_mpfs.c
90
u32 in[MLX5_ST_SZ_DW(delete_l2_table_entry_in)] = {};
sys/dev/mlx5/mlx5_core/mlx5_mpfs.c
91
u32 out[MLX5_ST_SZ_DW(delete_l2_table_entry_out)] = {};
sys/dev/mlx5/mlx5_core/mlx5_mr.c
116
u32 *in, int inlen)
sys/dev/mlx5/mlx5_core/mlx5_mr.c
126
u32 out[MLX5_ST_SZ_DW(destroy_mkey_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_mr.c
127
u32 in[MLX5_ST_SZ_DW(destroy_mkey_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_mr.c
147
u32 *out, int outlen)
sys/dev/mlx5/mlx5_core/mlx5_mr.c
149
u32 in[MLX5_ST_SZ_DW(query_mkey_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_mr.c
160
u32 *mkey)
sys/dev/mlx5/mlx5_core/mlx5_mr.c
162
u32 out[MLX5_ST_SZ_DW(query_special_contexts_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_mr.c
163
u32 in[MLX5_ST_SZ_DW(query_special_contexts_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_mr.c
176
static inline u32 mlx5_get_psv(u32 *out, int psv_index)
sys/dev/mlx5/mlx5_core/mlx5_mr.c
186
int mlx5_core_create_psv(struct mlx5_core_dev *dev, u32 pdn,
sys/dev/mlx5/mlx5_core/mlx5_mr.c
187
int npsvs, u32 *sig_index)
sys/dev/mlx5/mlx5_core/mlx5_mr.c
189
u32 out[MLX5_ST_SZ_DW(create_psv_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_mr.c
190
u32 in[MLX5_ST_SZ_DW(create_psv_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_mr.c
214
u32 out[MLX5_ST_SZ_DW(destroy_psv_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_mr.c
215
u32 in[MLX5_ST_SZ_DW(destroy_psv_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_mr.c
54
struct mlx5_async_ctx *async_ctx, u32 *in,
sys/dev/mlx5/mlx5_core/mlx5_mr.c
55
int inlen, u32 *out, int outlen,
sys/dev/mlx5/mlx5_core/mlx5_mr.c
60
u32 lout[MLX5_ST_SZ_DW(create_mkey_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_mr.c
61
u32 mkey_index;
sys/dev/mlx5/mlx5_core/mlx5_pagealloc.c
300
u32 in[MLX5_ST_SZ_DW(query_pages_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_pagealloc.c
301
u32 out[MLX5_ST_SZ_DW(query_pages_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_pagealloc.c
322
u32 out[MLX5_ST_SZ_DW(manage_pages_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_pagealloc.c
326
u32 *in, *nin;
sys/dev/mlx5/mlx5_core/mlx5_pagealloc.c
386
u32 *in, int in_size, u32 *out, int out_size)
sys/dev/mlx5/mlx5_core/mlx5_pagealloc.c
390
u32 func_id;
sys/dev/mlx5/mlx5_core/mlx5_pagealloc.c
391
u32 npages;
sys/dev/mlx5/mlx5_core/mlx5_pagealloc.c
392
u32 i = 0;
sys/dev/mlx5/mlx5_core/mlx5_pagealloc.c
416
static int reclaim_pages(struct mlx5_core_dev *dev, u32 func_id, int npages,
sys/dev/mlx5/mlx5_core/mlx5_pagealloc.c
420
u32 in[MLX5_ST_SZ_DW(manage_pages_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_pagealloc.c
422
u32 *out;
sys/dev/mlx5/mlx5_core/mlx5_pd.c
34
int mlx5_core_alloc_pd(struct mlx5_core_dev *dev, u32 *pdn, u16 uid)
sys/dev/mlx5/mlx5_core/mlx5_pd.c
36
u32 in[MLX5_ST_SZ_DW(alloc_pd_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_pd.c
37
u32 out[MLX5_ST_SZ_DW(alloc_pd_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_pd.c
52
int mlx5_core_dealloc_pd(struct mlx5_core_dev *dev, u32 pdn, u16 uid)
sys/dev/mlx5/mlx5_core/mlx5_pd.c
54
u32 in[MLX5_ST_SZ_DW(dealloc_pd_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_pd.c
55
u32 out[MLX5_ST_SZ_DW(dealloc_pd_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_port.c
1001
u32 in[MLX5_ST_SZ_DW(qetc_reg)] = {};
sys/dev/mlx5/mlx5_core/mlx5_port.c
1015
u32 out[MLX5_ST_SZ_DW(qetc_reg)];
sys/dev/mlx5/mlx5_core/mlx5_port.c
1035
u32 out[MLX5_ST_SZ_DW(modify_cong_params_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_port.c
1046
u32 in[MLX5_ST_SZ_DW(query_cong_statistics_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_port.c
1058
u32 out[MLX5_ST_SZ_DW(set_diagnostic_params_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_port.c
1070
u32 in[MLX5_ST_SZ_DW(query_diagnostic_counters_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_port.c
1083
u32 out[MLX5_ST_SZ_DW(qpts_reg)] = {};
sys/dev/mlx5/mlx5_core/mlx5_port.c
1084
u32 in[MLX5_ST_SZ_DW(qpts_reg)] = {};
sys/dev/mlx5/mlx5_core/mlx5_port.c
1097
u32 out[MLX5_ST_SZ_DW(qpts_reg)] = {};
sys/dev/mlx5/mlx5_core/mlx5_port.c
1098
u32 in[MLX5_ST_SZ_DW(qpts_reg)] = {};
sys/dev/mlx5/mlx5_core/mlx5_port.c
1180
u8 local_port, int page_select, u32 *out, int outlen)
sys/dev/mlx5/mlx5_core/mlx5_port.c
1182
u32 in[MLX5_ST_SZ_DW(pddr_reg)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_port.c
1195
u32 pddr_reg[MLX5_ST_SZ_DW(pddr_reg)] = {};
sys/dev/mlx5/mlx5_core/mlx5_port.c
1227
u32 pddr_reg[MLX5_ST_SZ_DW(pddr_reg)] = {};
sys/dev/mlx5/mlx5_core/mlx5_port.c
1244
u32 out[MLX5_ST_SZ_DW(pddr_reg)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_port.c
1268
u32 mfrl[MLX5_ST_SZ_DW(mfrl_reg)] = {};
sys/dev/mlx5/mlx5_core/mlx5_port.c
1282
u32 mfrl[MLX5_ST_SZ_DW(mfrl_reg)] = {};
sys/dev/mlx5/mlx5_core/mlx5_port.c
129
int mlx5_set_port_caps(struct mlx5_core_dev *dev, u8 port_num, u32 caps)
sys/dev/mlx5/mlx5_core/mlx5_port.c
1292
static const u32 mlx5e_link_speed[/*MLX5E_LINK_MODES_NUMBER*/] = {
sys/dev/mlx5/mlx5_core/mlx5_port.c
1322
static const u32 mlx5e_ext_link_speed[/*MLX5E_EXT_LINK_MODES_NUMBER*/] = {
sys/dev/mlx5/mlx5_core/mlx5_port.c
1337
const u32 **arr, u32 *size)
sys/dev/mlx5/mlx5_core/mlx5_port.c
1346
u32 mlx5e_port_ptys2speed(struct mlx5_core_dev *mdev, u32 eth_proto_oper)
sys/dev/mlx5/mlx5_core/mlx5_port.c
1349
const u32 *table;
sys/dev/mlx5/mlx5_core/mlx5_port.c
1350
u32 speed = 0;
sys/dev/mlx5/mlx5_core/mlx5_port.c
1351
u32 max_size;
sys/dev/mlx5/mlx5_core/mlx5_port.c
1364
u32 out[MLX5_ST_SZ_DW(ptys_reg)];
sys/dev/mlx5/mlx5_core/mlx5_port.c
1381
int mlx5e_port_linkspeed(struct mlx5_core_dev *mdev, u32 *speed)
sys/dev/mlx5/mlx5_core/mlx5_port.c
1438
u32 prio_x_buff;
sys/dev/mlx5/mlx5_core/mlx5_port.c
146
int mlx5_query_port_ptys(struct mlx5_core_dev *dev, u32 *ptys,
sys/dev/mlx5/mlx5_core/mlx5_port.c
1470
u32 prio_x_buff;
sys/dev/mlx5/mlx5_core/mlx5_port.c
149
u32 in[MLX5_ST_SZ_DW(ptys_reg)];
sys/dev/mlx5/mlx5_core/mlx5_port.c
164
u32 *proto_cap, int proto_mask)
sys/dev/mlx5/mlx5_core/mlx5_port.c
166
u32 out[MLX5_ST_SZ_DW(ptys_reg)];
sys/dev/mlx5/mlx5_core/mlx5_port.c
185
u32 out[MLX5_ST_SZ_DW(ptys_reg)];
sys/dev/mlx5/mlx5_core/mlx5_port.c
200
u32 eth_proto_admin, int proto_mask)
sys/dev/mlx5/mlx5_core/mlx5_port.c
202
u32 in[MLX5_ST_SZ_DW(ptys_reg)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_port.c
203
u32 out[MLX5_ST_SZ_DW(ptys_reg)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_port.c
228
u32 *proto_admin, int proto_mask)
sys/dev/mlx5/mlx5_core/mlx5_port.c
230
u32 out[MLX5_ST_SZ_DW(ptys_reg)];
sys/dev/mlx5/mlx5_core/mlx5_port.c
247
u32 *proto_oper, u8 local_port)
sys/dev/mlx5/mlx5_core/mlx5_port.c
249
u32 out[MLX5_ST_SZ_DW(ptys_reg)];
sys/dev/mlx5/mlx5_core/mlx5_port.c
263
int mlx5_set_port_proto(struct mlx5_core_dev *dev, u32 proto_admin,
sys/dev/mlx5/mlx5_core/mlx5_port.c
266
u32 in[MLX5_ST_SZ_DW(ptys_reg)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_port.c
267
u32 out[MLX5_ST_SZ_DW(ptys_reg)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_port.c
290
u32 in[MLX5_ST_SZ_DW(paos_reg)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_port.c
291
u32 out[MLX5_ST_SZ_DW(paos_reg)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_port.c
306
u32 in[MLX5_ST_SZ_DW(paos_reg)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_port.c
307
u32 out[MLX5_ST_SZ_DW(paos_reg)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_port.c
324
u32 in[MLX5_ST_SZ_DW(paos_reg)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_port.c
325
u32 out[MLX5_ST_SZ_DW(paos_reg)];
sys/dev/mlx5/mlx5_core/mlx5_port.c
341
u32 in[MLX5_ST_SZ_DW(pmtu_reg)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_port.c
342
u32 out[MLX5_ST_SZ_DW(pmtu_reg)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_port.c
364
u32 in[MLX5_ST_SZ_DW(pmtu_reg)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_port.c
365
u32 out[MLX5_ST_SZ_DW(pmtu_reg)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_port.c
381
int mlx5_set_port_pause_and_pfc(struct mlx5_core_dev *dev, u32 port,
sys/dev/mlx5/mlx5_core/mlx5_port.c
385
u32 in[MLX5_ST_SZ_DW(pfcc_reg)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_port.c
386
u32 out[MLX5_ST_SZ_DW(pfcc_reg)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_port.c
40
u32 *out = NULL;
sys/dev/mlx5/mlx5_core/mlx5_port.c
406
int mlx5_query_port_pause(struct mlx5_core_dev *dev, u32 port,
sys/dev/mlx5/mlx5_core/mlx5_port.c
407
u32 *rx_pause, u32 *tx_pause)
sys/dev/mlx5/mlx5_core/mlx5_port.c
409
u32 in[MLX5_ST_SZ_DW(pfcc_reg)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_port.c
41
u32 *in = NULL;
sys/dev/mlx5/mlx5_core/mlx5_port.c
410
u32 out[MLX5_ST_SZ_DW(pfcc_reg)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_port.c
428
u32 in[MLX5_ST_SZ_DW(pfcc_reg)] = {};
sys/dev/mlx5/mlx5_core/mlx5_port.c
429
u32 out[MLX5_ST_SZ_DW(pfcc_reg)];
sys/dev/mlx5/mlx5_core/mlx5_port.c
477
u32 in[MLX5_ST_SZ_DW(set_wol_rol_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_port.c
478
u32 out[MLX5_ST_SZ_DW(set_wol_rol_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_port.c
490
u32 in[MLX5_ST_SZ_DW(query_delay_drop_params_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_port.c
491
u32 out[MLX5_ST_SZ_DW(query_delay_drop_params_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_port.c
510
u32 in[MLX5_ST_SZ_DW(set_delay_drop_params_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_port.c
511
u32 out[MLX5_ST_SZ_DW(set_delay_drop_params_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_port.c
682
u32 in[MLX5_ST_SZ_DW(pmlp_reg)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_port.c
683
u32 out[MLX5_ST_SZ_DW(pmlp_reg)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_port.c
70
int mlx5_query_qcam_reg(struct mlx5_core_dev *mdev, u32 *qcam,
sys/dev/mlx5/mlx5_core/mlx5_port.c
703
int size, int module_num, u32 *data, int *size_read)
sys/dev/mlx5/mlx5_core/mlx5_port.c
705
u32 in[MLX5_ST_SZ_DW(mcia_reg)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_port.c
706
u32 out[MLX5_ST_SZ_DW(mcia_reg)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_port.c
707
u32 *ptr = (u32 *)MLX5_ADDR_OF(mcia_reg, out, dword_0);
sys/dev/mlx5/mlx5_core/mlx5_port.c
73
u32 in[MLX5_ST_SZ_DW(qcam_reg)] = {};
sys/dev/mlx5/mlx5_core/mlx5_port.c
737
u32 in[MLX5_ST_SZ_DW(add_vxlan_udp_dport_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_port.c
738
u32 out[MLX5_ST_SZ_DW(add_vxlan_udp_dport_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_port.c
757
u32 in[MLX5_ST_SZ_DW(delete_vxlan_udp_dport_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_port.c
758
u32 out[MLX5_ST_SZ_DW(delete_vxlan_udp_dport_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_port.c
777
u32 in[MLX5_ST_SZ_DW(query_wol_rol_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_port.c
778
u32 out[MLX5_ST_SZ_DW(query_wol_rol_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_port.c
795
u32 in[MLX5_ST_SZ_DW(query_cong_status_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_port.c
796
u32 out[MLX5_ST_SZ_DW(query_cong_status_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_port.c
815
u32 in[MLX5_ST_SZ_DW(modify_cong_status_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_port.c
816
u32 out[MLX5_ST_SZ_DW(modify_cong_status_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_port.c
83
int mlx5_query_pcam_reg(struct mlx5_core_dev *dev, u32 *pcam, u8 feature_group,
sys/dev/mlx5/mlx5_core/mlx5_port.c
830
u32 in[MLX5_ST_SZ_DW(query_cong_params_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_port.c
839
static int mlx5_query_port_qetcr_reg(struct mlx5_core_dev *mdev, u32 *out,
sys/dev/mlx5/mlx5_core/mlx5_port.c
842
u32 in[MLX5_ST_SZ_DW(qetc_reg)];
sys/dev/mlx5/mlx5_core/mlx5_port.c
86
u32 in[MLX5_ST_SZ_DW(pcam_reg)] = {};
sys/dev/mlx5/mlx5_core/mlx5_port.c
860
static int mlx5_set_port_qetcr_reg(struct mlx5_core_dev *mdev, u32 *in,
sys/dev/mlx5/mlx5_core/mlx5_port.c
863
u32 out[MLX5_ST_SZ_DW(qetc_reg)];
sys/dev/mlx5/mlx5_core/mlx5_port.c
876
u32 out[MLX5_ST_SZ_DW(qetc_reg)];
sys/dev/mlx5/mlx5_core/mlx5_port.c
902
u32 in[MLX5_ST_SZ_DW(qetc_reg)] = {};
sys/dev/mlx5/mlx5_core/mlx5_port.c
925
u32 in[MLX5_ST_SZ_DW(qtct_reg)];
sys/dev/mlx5/mlx5_core/mlx5_port.c
926
u32 out[MLX5_ST_SZ_DW(qtct_reg)];
sys/dev/mlx5/mlx5_core/mlx5_port.c
947
u32 in[MLX5_ST_SZ_DW(qtct_reg)] = {};
sys/dev/mlx5/mlx5_core/mlx5_port.c
948
u32 out[MLX5_ST_SZ_DW(qtct_reg)];
sys/dev/mlx5/mlx5_core/mlx5_port.c
95
int mlx5_query_mcam_reg(struct mlx5_core_dev *dev, u32 *mcam, u8 feature_group,
sys/dev/mlx5/mlx5_core/mlx5_port.c
966
u32 in[MLX5_ST_SZ_DW(qetc_reg)] = {};
sys/dev/mlx5/mlx5_core/mlx5_port.c
98
u32 in[MLX5_ST_SZ_DW(mcam_reg)] = {};
sys/dev/mlx5/mlx5_core/mlx5_port.c
981
u32 out[MLX5_ST_SZ_DW(qetc_reg)];
sys/dev/mlx5/mlx5_core/mlx5_qp.c
121
u32 *in, int inlen)
sys/dev/mlx5/mlx5_core/mlx5_qp.c
123
u32 out[MLX5_ST_SZ_DW(create_qp_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_qp.c
124
u32 dout[MLX5_ST_SZ_DW(destroy_qp_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_qp.c
125
u32 din[MLX5_ST_SZ_DW(destroy_qp_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_qp.c
158
u32 out[MLX5_ST_SZ_DW(destroy_qp_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_qp.c
159
u32 in[MLX5_ST_SZ_DW(destroy_qp_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_qp.c
178
u32 *in;
sys/dev/mlx5/mlx5_core/mlx5_qp.c
179
u32 *out;
sys/dev/mlx5/mlx5_core/mlx5_qp.c
206
u32 opt_param_mask, void *qpc,
sys/dev/mlx5/mlx5_core/mlx5_qp.c
291
u32 opt_param_mask, void *qpc,
sys/dev/mlx5/mlx5_core/mlx5_qp.c
322
u32 *out, int outlen)
sys/dev/mlx5/mlx5_core/mlx5_qp.c
324
u32 in[MLX5_ST_SZ_DW(query_qp_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_qp.c
333
int mlx5_core_xrcd_alloc(struct mlx5_core_dev *dev, u32 *xrcdn)
sys/dev/mlx5/mlx5_core/mlx5_qp.c
335
u32 in[MLX5_ST_SZ_DW(alloc_xrcd_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_qp.c
336
u32 out[MLX5_ST_SZ_DW(alloc_xrcd_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_qp.c
347
int mlx5_core_xrcd_dealloc(struct mlx5_core_dev *dev, u32 xrcdn)
sys/dev/mlx5/mlx5_core/mlx5_qp.c
349
u32 in[MLX5_ST_SZ_DW(dealloc_xrcd_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_qp.c
350
u32 out[MLX5_ST_SZ_DW(dealloc_xrcd_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_qp.c
36
u32 rsn)
sys/dev/mlx5/mlx5_core/mlx5_qp.c
360
u32 *in, int inlen,
sys/dev/mlx5/mlx5_core/mlx5_qp.c
361
u32 *out, int outlen)
sys/dev/mlx5/mlx5_core/mlx5_qp.c
364
u32 dout[MLX5_ST_SZ_DW(destroy_dct_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_qp.c
365
u32 din[MLX5_ST_SZ_DW(destroy_dct_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_qp.c
408
u32 out[MLX5_ST_SZ_DW(drain_dct_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_qp.c
409
u32 in[MLX5_ST_SZ_DW(drain_dct_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_qp.c
422
u32 out[MLX5_ST_SZ_DW(destroy_dct_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_qp.c
423
u32 in[MLX5_ST_SZ_DW(destroy_dct_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_qp.c
459
u32 *out, int outlen)
sys/dev/mlx5/mlx5_core/mlx5_qp.c
461
u32 in[MLX5_ST_SZ_DW(query_dct_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_qp.c
473
u32 out[MLX5_ST_SZ_DW(arm_dct_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_qp.c
474
u32 in[MLX5_ST_SZ_DW(arm_dct_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_qp.c
484
static void destroy_rq_tracked(struct mlx5_core_dev *dev, u32 rqn, u16 uid)
sys/dev/mlx5/mlx5_core/mlx5_qp.c
486
u32 in[MLX5_ST_SZ_DW(destroy_rq_in)] = {};
sys/dev/mlx5/mlx5_core/mlx5_qp.c
487
u32 out[MLX5_ST_SZ_DW(destroy_rq_out)] = {};
sys/dev/mlx5/mlx5_core/mlx5_qp.c
495
int mlx5_core_create_rq_tracked(struct mlx5_core_dev *dev, u32 *in, int inlen,
sys/dev/mlx5/mlx5_core/mlx5_qp.c
522
static void destroy_sq_tracked(struct mlx5_core_dev *dev, u32 sqn, u16 uid)
sys/dev/mlx5/mlx5_core/mlx5_qp.c
524
u32 in[MLX5_ST_SZ_DW(destroy_sq_in)] = {};
sys/dev/mlx5/mlx5_core/mlx5_qp.c
525
u32 out[MLX5_ST_SZ_DW(destroy_sq_out)] = {};
sys/dev/mlx5/mlx5_core/mlx5_qp.c
533
int mlx5_core_create_sq_tracked(struct mlx5_core_dev *dev, u32 *in, int inlen,
sys/dev/mlx5/mlx5_core/mlx5_qp.c
63
void mlx5_rsc_event(struct mlx5_core_dev *dev, u32 rsn, int event_type)
sys/dev/mlx5/mlx5_core/mlx5_rl.c
102
int mlx5_rl_add_rate(struct mlx5_core_dev *dev, u32 rate, u32 burst, u16 *index)
sys/dev/mlx5/mlx5_core/mlx5_rl.c
161
void mlx5_rl_remove_rate(struct mlx5_core_dev *dev, u32 rate, u32 burst)
sys/dev/mlx5/mlx5_core/mlx5_rl.c
42
u32 rate, u16 burst)
sys/dev/mlx5/mlx5_core/mlx5_rl.c
60
u32 rate, u32 burst, u16 index)
sys/dev/mlx5/mlx5_core/mlx5_rl.c
62
u32 in[MLX5_ST_SZ_DW(set_rate_limit_in)] = {};
sys/dev/mlx5/mlx5_core/mlx5_rl.c
63
u32 out[MLX5_ST_SZ_DW(set_rate_limit_out)] = {};
sys/dev/mlx5/mlx5_core/mlx5_rl.c
75
u16 index, u32 *scq_handle)
sys/dev/mlx5/mlx5_core/mlx5_rl.c
78
u32 in[MLX5_ST_SZ_DW(query_pp_rate_limit_in)] = {};
sys/dev/mlx5/mlx5_core/mlx5_rl.c
79
u32 out[MLX5_ST_SZ_DW(query_pp_rate_limit_out)] = {};
sys/dev/mlx5/mlx5_core/mlx5_rl.c
93
bool mlx5_rl_is_in_range(const struct mlx5_core_dev *dev, u32 rate, u32 burst)
sys/dev/mlx5/mlx5_core/mlx5_srq.c
113
struct mlx5_core_srq *mlx5_core_get_srq(struct mlx5_core_dev *dev, u32 srqn)
sys/dev/mlx5/mlx5_core/mlx5_srq.c
132
u32 log_page_size = in->log_page_size + 12;
sys/dev/mlx5/mlx5_core/mlx5_srq.c
133
u32 log_srq_size = in->log_size;
sys/dev/mlx5/mlx5_core/mlx5_srq.c
134
u32 log_rq_stride = in->wqe_shift;
sys/dev/mlx5/mlx5_core/mlx5_srq.c
135
u32 page_offset = in->page_offset;
sys/dev/mlx5/mlx5_core/mlx5_srq.c
136
u32 po_quanta = 1 << (log_page_size - 6);
sys/dev/mlx5/mlx5_core/mlx5_srq.c
137
u32 rq_sz = 1 << (log_srq_size + 4 + log_rq_stride);
sys/dev/mlx5/mlx5_core/mlx5_srq.c
138
u32 page_size = 1 << log_page_size;
sys/dev/mlx5/mlx5_core/mlx5_srq.c
139
u32 rq_sz_po = rq_sz + (page_offset * po_quanta);
sys/dev/mlx5/mlx5_core/mlx5_srq.c
140
u32 rq_num_pas = (rq_sz_po + page_size - 1) / page_size;
sys/dev/mlx5/mlx5_core/mlx5_srq.c
184
u32 *rmp_out;
sys/dev/mlx5/mlx5_core/mlx5_srq.c
254
u32 *xrcsrq_out;
sys/dev/mlx5/mlx5_core/mlx5_srq.c
286
u32 create_out[MLX5_ST_SZ_DW(create_srq_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_srq.c
318
u32 srq_out[MLX5_ST_SZ_DW(destroy_srq_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_srq.c
319
u32 srq_in[MLX5_ST_SZ_DW(destroy_srq_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_srq.c
330
u32 srq_in[MLX5_ST_SZ_DW(query_srq_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_srq.c
331
u32 *srq_out;
sys/dev/mlx5/mlx5_core/mlx5_srq.c
359
u32 srq_in[MLX5_ST_SZ_DW(arm_xrc_srq_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_srq.c
360
u32 srq_out[MLX5_ST_SZ_DW(arm_xrc_srq_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_srq.c
37
void mlx5_srq_event(struct mlx5_core_dev *dev, u32 srqn, int event_type)
sys/dev/mlx5/mlx5_core/mlx5_tls.c
36
int mlx5_tls_open_tis(struct mlx5_core_dev *mdev, int tc, int tdn, int pdn, u32 *p_tisn)
sys/dev/mlx5/mlx5_core/mlx5_tls.c
38
u32 in[MLX5_ST_SZ_DW(create_tis_in)] = {};
sys/dev/mlx5/mlx5_core/mlx5_tls.c
56
void mlx5_tls_close_tis(struct mlx5_core_dev *mdev, u32 tisn)
sys/dev/mlx5/mlx5_core/mlx5_tls.c
62
int mlx5_tls_open_tir(struct mlx5_core_dev *mdev, int tdn, int rqtn, u32 *p_tirn)
sys/dev/mlx5/mlx5_core/mlx5_tls.c
64
u32 in[MLX5_ST_SZ_DW(create_tir_in)] = {};
sys/dev/mlx5/mlx5_core/mlx5_tls.c
86
void mlx5_tls_close_tir(struct mlx5_core_dev *mdev, u32 tirn)
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
100
u32 in[MLX5_ST_SZ_DW(query_rq_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
109
int mlx5_core_create_sq(struct mlx5_core_dev *dev, u32 *in, int inlen, u32 *sqn)
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
111
u32 out[MLX5_ST_SZ_DW(create_sq_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
123
int mlx5_core_modify_sq(struct mlx5_core_dev *dev, u32 *in, int inlen)
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
125
u32 out[MLX5_ST_SZ_DW(modify_sq_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
132
void mlx5_core_destroy_sq(struct mlx5_core_dev *dev, u32 sqn)
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
134
u32 in[MLX5_ST_SZ_DW(destroy_sq_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
135
u32 out[MLX5_ST_SZ_DW(destroy_sq_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
143
int mlx5_core_query_sq(struct mlx5_core_dev *dev, u32 sqn, u32 *out)
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
145
u32 in[MLX5_ST_SZ_DW(query_sq_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
154
int mlx5_core_create_tir(struct mlx5_core_dev *dev, u32 *in, int inlen,
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
155
u32 *tirn)
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
157
u32 out[MLX5_ST_SZ_DW(create_tir_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
171
mlx5_core_modify_tir(struct mlx5_core_dev *dev, u32 *in, int inlen)
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
173
u32 out[MLX5_ST_SZ_DW(create_tir_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
181
void mlx5_core_destroy_tir(struct mlx5_core_dev *dev, u32 tirn, u32 uid)
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
183
u32 in[MLX5_ST_SZ_DW(destroy_tir_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
184
u32 out[MLX5_ST_SZ_DW(destroy_tir_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
193
int mlx5_core_create_tis(struct mlx5_core_dev *dev, u32 *in, int inlen,
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
194
u32 *tisn)
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
196
u32 out[MLX5_ST_SZ_DW(create_tis_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
208
int mlx5_core_modify_tis(struct mlx5_core_dev *dev, u32 tisn, u32 *in,
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
211
u32 out[MLX5_ST_SZ_DW(modify_tis_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
219
void mlx5_core_destroy_tis(struct mlx5_core_dev *dev, u32 tisn, u32 uid)
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
221
u32 in[MLX5_ST_SZ_DW(destroy_tis_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
222
u32 out[MLX5_ST_SZ_DW(destroy_tis_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
231
int mlx5_core_create_rmp(struct mlx5_core_dev *dev, u32 *in, int inlen, u32 *rmpn)
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
233
u32 out[MLX5_ST_SZ_DW(create_rmp_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
245
int mlx5_core_modify_rmp(struct mlx5_core_dev *dev, u32 *in, int inlen)
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
247
u32 out[MLX5_ST_SZ_DW(modify_rmp_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
254
int mlx5_core_destroy_rmp(struct mlx5_core_dev *dev, u32 rmpn)
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
256
u32 in[MLX5_ST_SZ_DW(destroy_rmp_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
257
u32 out[MLX5_ST_SZ_DW(destroy_rmp_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
265
int mlx5_core_query_rmp(struct mlx5_core_dev *dev, u32 rmpn, u32 *out)
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
267
u32 in[MLX5_ST_SZ_DW(query_rmp_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
276
int mlx5_core_arm_rmp(struct mlx5_core_dev *dev, u32 rmpn, u16 lwm)
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
305
int mlx5_core_create_xsrq(struct mlx5_core_dev *dev, u32 *in, int inlen, u32 *xsrqn)
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
307
u32 out[MLX5_ST_SZ_DW(create_xrc_srq_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
319
int mlx5_core_destroy_xsrq(struct mlx5_core_dev *dev, u32 xsrqn)
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
321
u32 in[MLX5_ST_SZ_DW(destroy_xrc_srq_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
322
u32 out[MLX5_ST_SZ_DW(destroy_xrc_srq_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
33
int mlx5_alloc_transport_domain(struct mlx5_core_dev *dev, u32 *tdn, u32 uid)
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
330
int mlx5_core_query_xsrq(struct mlx5_core_dev *dev, u32 xsrqn, u32 *out)
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
333
u32 in[MLX5_ST_SZ_DW(query_xrc_srq_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
35
u32 in[MLX5_ST_SZ_DW(alloc_transport_domain_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
352
int mlx5_core_arm_xsrq(struct mlx5_core_dev *dev, u32 xsrqn, u16 lwm)
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
354
u32 in[MLX5_ST_SZ_DW(arm_xrc_srq_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
355
u32 out[MLX5_ST_SZ_DW(arm_xrc_srq_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
36
u32 out[MLX5_ST_SZ_DW(alloc_transport_domain_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
367
int mlx5_core_create_rqt(struct mlx5_core_dev *dev, u32 *in, int inlen,
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
368
u32 *rqtn)
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
370
u32 out[MLX5_ST_SZ_DW(create_rqt_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
382
int mlx5_core_modify_rqt(struct mlx5_core_dev *dev, u32 rqtn, u32 *in,
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
385
u32 out[MLX5_ST_SZ_DW(modify_rqt_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
393
void mlx5_core_destroy_rqt(struct mlx5_core_dev *dev, u32 rqtn, u32 uid)
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
395
u32 in[MLX5_ST_SZ_DW(destroy_rqt_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
396
u32 out[MLX5_ST_SZ_DW(destroy_rqt_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
51
void mlx5_dealloc_transport_domain(struct mlx5_core_dev *dev, u32 tdn, u32 uid)
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
53
u32 in[MLX5_ST_SZ_DW(dealloc_transport_domain_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
54
u32 out[MLX5_ST_SZ_DW(dealloc_transport_domain_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
64
int mlx5_core_create_rq(struct mlx5_core_dev *dev, u32 *in, int inlen, u32 *rqn)
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
66
u32 out[MLX5_ST_SZ_DW(create_rq_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
78
int mlx5_core_modify_rq(struct mlx5_core_dev *dev, u32 *in, int inlen)
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
80
u32 out[MLX5_ST_SZ_DW(modify_rq_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
87
void mlx5_core_destroy_rq(struct mlx5_core_dev *dev, u32 rqn)
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
89
u32 in[MLX5_ST_SZ_DW(destroy_rq_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
90
u32 out[MLX5_ST_SZ_DW(destroy_rq_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_transobj.c
98
int mlx5_core_query_rq(struct mlx5_core_dev *dev, u32 rqn, u32 *out)
sys/dev/mlx5/mlx5_core/mlx5_uar.c
35
int mlx5_cmd_alloc_uar(struct mlx5_core_dev *dev, u32 *uarn)
sys/dev/mlx5/mlx5_core/mlx5_uar.c
37
u32 out[MLX5_ST_SZ_DW(alloc_uar_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_uar.c
38
u32 in[MLX5_ST_SZ_DW(alloc_uar_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_uar.c
49
int mlx5_cmd_free_uar(struct mlx5_core_dev *dev, u32 uarn)
sys/dev/mlx5/mlx5_core/mlx5_uar.c
51
u32 out[MLX5_ST_SZ_DW(dealloc_uar_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_uar.c
52
u32 in[MLX5_ST_SZ_DW(dealloc_uar_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_uar.c
68
static u64 uar2pfn(struct mlx5_core_dev *mdev, u32 index)
sys/dev/mlx5/mlx5_core/mlx5_uar.c
70
u32 system_page_index;
sys/dev/mlx5/mlx5_core/mlx5_vport.c
103
u32 *out, int outlen)
sys/dev/mlx5/mlx5_core/mlx5_vport.c
1043
u8 port_num, u8 vport_num, u32 *out,
sys/dev/mlx5/mlx5_core/mlx5_vport.c
1046
u32 in[MLX5_ST_SZ_DW(query_hca_vport_context_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_vport.c
105
u32 in[MLX5_ST_SZ_DW(query_nic_vport_context_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_vport.c
1074
u32 *out;
sys/dev/mlx5/mlx5_core/mlx5_vport.c
1097
u32 *out;
sys/dev/mlx5/mlx5_core/mlx5_vport.c
1121
u32 *out;
sys/dev/mlx5/mlx5_core/mlx5_vport.c
117
static u32 mlx5_vport_max_q_counter_allocator(struct mlx5_core_dev *mdev,
sys/dev/mlx5/mlx5_core/mlx5_vport.c
1274
u32 *out;
sys/dev/mlx5/mlx5_core/mlx5_vport.c
1275
u32 outlen = MLX5_ST_SZ_BYTES(query_hca_vport_context_out);
sys/dev/mlx5/mlx5_core/mlx5_vport.c
1297
u32 out[MLX5_ST_SZ_DW(modify_esw_vport_context_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_vport.c
1318
u32 in[MLX5_ST_SZ_DW(modify_esw_vport_context_in)];
sys/dev/mlx5/mlx5_core/mlx5_vport.c
1347
u32 *out;
sys/dev/mlx5/mlx5_core/mlx5_vport.c
1348
u32 outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
sys/dev/mlx5/mlx5_core/mlx5_vport.c
135
u32 in[MLX5_ST_SZ_DW(alloc_q_counter_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_vport.c
136
u32 out[MLX5_ST_SZ_DW(alloc_q_counter_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_vport.c
1370
u32 *in;
sys/dev/mlx5/mlx5_core/mlx5_vport.c
1371
u32 inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
sys/dev/mlx5/mlx5_core/mlx5_vport.c
1391
u32 *out;
sys/dev/mlx5/mlx5_core/mlx5_vport.c
1392
u32 outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
sys/dev/mlx5/mlx5_core/mlx5_vport.c
1414
u32 *in;
sys/dev/mlx5/mlx5_core/mlx5_vport.c
1415
u32 inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
sys/dev/mlx5/mlx5_core/mlx5_vport.c
1457
u32 *out;
sys/dev/mlx5/mlx5_core/mlx5_vport.c
160
u32 in[MLX5_ST_SZ_DW(dealloc_q_counter_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_vport.c
161
u32 out[MLX5_ST_SZ_DW(dealloc_q_counter_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_vport.c
1796
u32 *out;
sys/dev/mlx5/mlx5_core/mlx5_vport.c
1820
u32 *in;
sys/dev/mlx5/mlx5_core/mlx5_vport.c
185
u32 in[MLX5_ST_SZ_DW(query_q_counter_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_vport.c
196
u32 *out_of_rx_buffer)
sys/dev/mlx5/mlx5_core/mlx5_vport.c
198
u32 out[MLX5_ST_SZ_DW(query_q_counter_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_vport.c
215
u32 out[MLX5_ST_SZ_DW(query_nic_vport_context_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_vport.c
254
u32 in[MLX5_ST_SZ_DW(modify_nic_vport_context_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_vport.c
275
u32 *out;
sys/dev/mlx5/mlx5_core/mlx5_vport.c
339
u32 *out;
sys/dev/mlx5/mlx5_core/mlx5_vport.c
361
u32 *out;
sys/dev/mlx5/mlx5_core/mlx5_vport.c
38
u16 vport, u32 *out, int outlen)
sys/dev/mlx5/mlx5_core/mlx5_vport.c
385
u32 *out;
sys/dev/mlx5/mlx5_core/mlx5_vport.c
408
u32 *out;
sys/dev/mlx5/mlx5_core/mlx5_vport.c
41
u32 in[MLX5_ST_SZ_DW(query_vport_state_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_vport.c
432
u32 out[MLX5_ST_SZ_DW(modify_nic_vport_context_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_vport.c
509
u32 vport, u64 node_guid)
sys/dev/mlx5/mlx5_core/mlx5_vport.c
548
u32 vport, u64 port_guid)
sys/dev/mlx5/mlx5_core/mlx5_vport.c
59
u32 out[MLX5_ST_SZ_DW(query_vport_state_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_vport.c
69
u32 out[MLX5_ST_SZ_DW(query_vport_state_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_vport.c
717
u32 in[MLX5_ST_SZ_DW(query_nic_vport_context_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_vport.c
780
u32 out[MLX5_ST_SZ_DW(modify_nic_vport_context_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_vport.c
80
u32 in[MLX5_ST_SZ_DW(modify_vport_state_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_vport.c
81
u32 out[MLX5_ST_SZ_DW(modify_vport_state_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_vport.c
833
u32 in[MLX5_ST_SZ_DW(query_nic_vport_context_in)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_vport.c
892
u32 out[MLX5_ST_SZ_DW(modify_nic_vport_context_out)] = {0};
sys/dev/mlx5/mlx5_core/mlx5_vport.c
940
u32 *out;
sys/dev/mlx5/mlx5_core/mlx5_vsc.c
113
u32 vsc_space = 0;
sys/dev/mlx5/mlx5_core/mlx5_vsc.c
132
int mlx5_vsc_write(struct mlx5_core_dev *mdev, u32 addr, const u32 *data)
sys/dev/mlx5/mlx5_core/mlx5_vsc.c
136
u32 in = 0;
sys/dev/mlx5/mlx5_core/mlx5_vsc.c
156
int mlx5_vsc_read(struct mlx5_core_dev *mdev, u32 addr, u32 *data)
sys/dev/mlx5/mlx5_core/mlx5_vsc.c
161
u32 in;
sys/dev/mlx5/mlx5_core/mlx5_vsc.c
182
int mlx5_vsc_lock_addr_space(struct mlx5_core_dev *mdev, u32 addr)
sys/dev/mlx5/mlx5_core/mlx5_vsc.c
186
u32 data;
sys/dev/mlx5/mlx5_core/mlx5_vsc.c
188
u32 id;
sys/dev/mlx5/mlx5_core/mlx5_vsc.c
212
int mlx5_vsc_unlock_addr_space(struct mlx5_core_dev *mdev, u32 addr)
sys/dev/mlx5/mlx5_core/mlx5_vsc.c
214
u32 data = 0;
sys/dev/mlx5/mlx5_core/mlx5_vsc.c
38
u32 lock_val;
sys/dev/mlx5/mlx5_core/mlx5_vsc.c
39
u32 counter;
sys/dev/mlx5/mlx5_core/mlx5_vsc.c
87
mlx5_vsc_wait_on_flag(struct mlx5_core_dev *mdev, u32 expected)
sys/dev/mlx5/mlx5_core/mlx5_vsc.c
92
u32 flag;
sys/dev/mlx5/mlx5_core/mlx5_wq.c
33
u32 mlx5_wq_cyc_get_size(struct mlx5_wq_cyc *wq)
sys/dev/mlx5/mlx5_core/mlx5_wq.c
35
return (u32)wq->sz_m1 + 1;
sys/dev/mlx5/mlx5_core/mlx5_wq.c
38
u32 mlx5_cqwq_get_size(struct mlx5_cqwq *wq)
sys/dev/mlx5/mlx5_core/mlx5_wq.c
43
u32 mlx5_wq_ll_get_size(struct mlx5_wq_ll *wq)
sys/dev/mlx5/mlx5_core/mlx5_wq.c
45
return (u32)wq->sz_m1 + 1;
sys/dev/mlx5/mlx5_core/mlx5_wq.c
48
static u32 mlx5_wq_cyc_get_byte_size(struct mlx5_wq_cyc *wq)
sys/dev/mlx5/mlx5_core/mlx5_wq.c
53
static u32 mlx5_cqwq_get_byte_size(struct mlx5_cqwq *wq)
sys/dev/mlx5/mlx5_core/mlx5_wq.c
58
static u32 mlx5_wq_ll_get_byte_size(struct mlx5_wq_ll *wq)
sys/dev/mlx5/mlx5_core/transobj.h
29
int mlx5_alloc_transport_domain(struct mlx5_core_dev *dev, u32 *tdn, u32 uid);
sys/dev/mlx5/mlx5_core/transobj.h
30
void mlx5_dealloc_transport_domain(struct mlx5_core_dev *dev, u32 tdn, u32 uid);
sys/dev/mlx5/mlx5_core/transobj.h
31
int mlx5_core_create_rq(struct mlx5_core_dev *dev, u32 *in, int inlen,
sys/dev/mlx5/mlx5_core/transobj.h
32
u32 *rqn);
sys/dev/mlx5/mlx5_core/transobj.h
33
int mlx5_core_modify_rq(struct mlx5_core_dev *dev, u32 *in, int inlen);
sys/dev/mlx5/mlx5_core/transobj.h
34
void mlx5_core_destroy_rq(struct mlx5_core_dev *dev, u32 rqn);
sys/dev/mlx5/mlx5_core/transobj.h
35
int mlx5_core_query_rq(struct mlx5_core_dev *dev, u32 rqn, u32 *out);
sys/dev/mlx5/mlx5_core/transobj.h
36
int mlx5_core_create_sq(struct mlx5_core_dev *dev, u32 *in, int inlen,
sys/dev/mlx5/mlx5_core/transobj.h
37
u32 *sqn);
sys/dev/mlx5/mlx5_core/transobj.h
38
int mlx5_core_modify_sq(struct mlx5_core_dev *dev, u32 *in, int inlen);
sys/dev/mlx5/mlx5_core/transobj.h
39
void mlx5_core_destroy_sq(struct mlx5_core_dev *dev, u32 sqn);
sys/dev/mlx5/mlx5_core/transobj.h
40
int mlx5_core_query_sq(struct mlx5_core_dev *dev, u32 sqn, u32 *out);
sys/dev/mlx5/mlx5_core/transobj.h
41
int mlx5_core_create_tir(struct mlx5_core_dev *dev, u32 *in, int inlen,
sys/dev/mlx5/mlx5_core/transobj.h
42
u32 *tirn);
sys/dev/mlx5/mlx5_core/transobj.h
43
int mlx5_core_modify_tir(struct mlx5_core_dev *dev, u32 *in, int inlen);
sys/dev/mlx5/mlx5_core/transobj.h
44
void mlx5_core_destroy_tir(struct mlx5_core_dev *dev, u32 tirn, u32 uid);
sys/dev/mlx5/mlx5_core/transobj.h
45
int mlx5_core_create_tis(struct mlx5_core_dev *dev, u32 *in, int inlen,
sys/dev/mlx5/mlx5_core/transobj.h
46
u32 *tisn);
sys/dev/mlx5/mlx5_core/transobj.h
47
int mlx5_core_modify_tis(struct mlx5_core_dev *dev, u32 tisn, u32 *in,
sys/dev/mlx5/mlx5_core/transobj.h
49
void mlx5_core_destroy_tis(struct mlx5_core_dev *dev, u32 tisn, u32 uid);
sys/dev/mlx5/mlx5_core/transobj.h
50
int mlx5_core_create_rmp(struct mlx5_core_dev *dev, u32 *in, int inlen, u32 *rmpn);
sys/dev/mlx5/mlx5_core/transobj.h
51
int mlx5_core_modify_rmp(struct mlx5_core_dev *dev, u32 *in, int inlen);
sys/dev/mlx5/mlx5_core/transobj.h
52
int mlx5_core_destroy_rmp(struct mlx5_core_dev *dev, u32 rmpn);
sys/dev/mlx5/mlx5_core/transobj.h
53
int mlx5_core_query_rmp(struct mlx5_core_dev *dev, u32 rmpn, u32 *out);
sys/dev/mlx5/mlx5_core/transobj.h
54
int mlx5_core_arm_rmp(struct mlx5_core_dev *dev, u32 rmpn, u16 lwm);
sys/dev/mlx5/mlx5_core/transobj.h
55
int mlx5_core_create_xsrq(struct mlx5_core_dev *dev, u32 *in, int inlen, u32 *rmpn);
sys/dev/mlx5/mlx5_core/transobj.h
56
int mlx5_core_destroy_xsrq(struct mlx5_core_dev *dev, u32 rmpn);
sys/dev/mlx5/mlx5_core/transobj.h
57
int mlx5_core_query_xsrq(struct mlx5_core_dev *dev, u32 rmpn, u32 *out);
sys/dev/mlx5/mlx5_core/transobj.h
58
int mlx5_core_arm_xsrq(struct mlx5_core_dev *dev, u32 rmpn, u16 lwm);
sys/dev/mlx5/mlx5_core/transobj.h
60
int mlx5_core_create_rqt(struct mlx5_core_dev *dev, u32 *in, int inlen,
sys/dev/mlx5/mlx5_core/transobj.h
61
u32 *rqtn);
sys/dev/mlx5/mlx5_core/transobj.h
62
int mlx5_core_modify_rqt(struct mlx5_core_dev *dev, u32 rqtn, u32 *in,
sys/dev/mlx5/mlx5_core/transobj.h
64
void mlx5_core_destroy_rqt(struct mlx5_core_dev *dev, u32 rqtn, u32 uid);
sys/dev/mlx5/mlx5_core/wq.h
115
static inline u32 mlx5_cqwq_get_ci(struct mlx5_cqwq *wq)
sys/dev/mlx5/mlx5_core/wq.h
120
static inline void *mlx5_cqwq_get_wqe(struct mlx5_cqwq *wq, u32 ix)
sys/dev/mlx5/mlx5_core/wq.h
125
static inline u32 mlx5_cqwq_get_wrap_cnt(struct mlx5_cqwq *wq)
sys/dev/mlx5/mlx5_core/wq.h
142
u32 ci = mlx5_cqwq_get_ci(wq);
sys/dev/mlx5/mlx5_core/wq.h
63
u32 sz_m1;
sys/dev/mlx5/mlx5_core/wq.h
64
u32 cc; /* consumer counter */
sys/dev/mlx5/mlx5_core/wq.h
83
u32 mlx5_wq_cyc_get_size(struct mlx5_wq_cyc *wq);
sys/dev/mlx5/mlx5_core/wq.h
88
u32 mlx5_cqwq_get_size(struct mlx5_cqwq *wq);
sys/dev/mlx5/mlx5_core/wq.h
93
u32 mlx5_wq_ll_get_size(struct mlx5_wq_ll *wq);
sys/dev/mlx5/mlx5_en/en.h
1049
u32 tisn;
sys/dev/mlx5/mlx5_en/en.h
1068
u32 cable_len;
sys/dev/mlx5/mlx5_en/en.h
1069
u32 xoff;
sys/dev/mlx5/mlx5_en/en.h
1091
u32 pdn;
sys/dev/mlx5/mlx5_en/en.h
1092
u32 tdn;
sys/dev/mlx5/mlx5_en/en.h
1095
u32 tisn[MLX5E_MAX_TX_NUM_TC];
sys/dev/mlx5/mlx5_en/en.h
1096
u32 rqtn;
sys/dev/mlx5/mlx5_en/en.h
1097
u32 tirn[MLX5E_NUM_TT];
sys/dev/mlx5/mlx5_en/en.h
1098
u32 tirn_inner_vxlan[MLX5E_NUM_TT];
sys/dev/mlx5/mlx5_en/en.h
1195
u32 *data;
sys/dev/mlx5/mlx5_en/en.h
1208
void mlx5e_dump_err_cqe(struct mlx5e_cq *, u32, const struct mlx5_err_cqe *);
sys/dev/mlx5/mlx5_en/en.h
1279
void mlx5e_send_nop(struct mlx5e_sq *, u32);
sys/dev/mlx5/mlx5_en/en.h
1305
void mlx5e_iq_send_nop(struct mlx5e_iq *, u32);
sys/dev/mlx5/mlx5_en/en.h
1312
void mlx5e_iq_load_memory_single(struct mlx5e_iq *, u16, void *, size_t, u64 *, u32);
sys/dev/mlx5/mlx5_en/en.h
647
u32 rqc [MLX5_ST_SZ_DW(rqc)];
sys/dev/mlx5/mlx5_en/en.h
652
u32 sqc [MLX5_ST_SZ_DW(sqc)];
sys/dev/mlx5/mlx5_en/en.h
657
u32 cqc [MLX5_ST_SZ_DW(cqc)];
sys/dev/mlx5/mlx5_en/en.h
675
u32 lro_wqe_sz;
sys/dev/mlx5/mlx5_en/en.h
677
u32 tx_pauseframe_control __aligned(4);
sys/dev/mlx5/mlx5_en/en.h
678
u32 rx_pauseframe_control __aligned(4);
sys/dev/mlx5/mlx5_en/en.h
729
u32 fec_mode_active;
sys/dev/mlx5/mlx5_en/en.h
730
u32 hw_mtu_msb;
sys/dev/mlx5/mlx5_en/en.h
732
u32 hw_num_temp;
sys/dev/mlx5/mlx5_en/en.h
766
u32 wqe_sz;
sys/dev/mlx5/mlx5_en/en.h
767
u32 nsegs;
sys/dev/mlx5/mlx5_en/en.h
781
u32 rqn;
sys/dev/mlx5/mlx5_en/en.h
792
u32 num_wqebbs;
sys/dev/mlx5/mlx5_en/en.h
793
u32 dma_sync;
sys/dev/mlx5/mlx5_en/en.h
811
u32 d32[2];
sys/dev/mlx5/mlx5_en/en.h
823
u32 sqn;
sys/dev/mlx5/mlx5_en/en.h
824
u32 mkey_be;
sys/dev/mlx5/mlx5_en/en.h
835
u32 num_bytes;
sys/dev/mlx5/mlx5_en/en.h
836
u32 num_wqebbs;
sys/dev/mlx5/mlx5_en/en.h
869
u32 d32[2];
sys/dev/mlx5/mlx5_en/en.h
882
u32 sqn;
sys/dev/mlx5/mlx5_en/en.h
883
u32 mkey_be;
sys/dev/mlx5/mlx5_en/en.h
887
u32 queue_handle; /* SQ remap support */
sys/dev/mlx5/mlx5_en/en.h
906
static inline u32
sys/dev/mlx5/mlx5_en/en.h
931
u32 rqtn;
sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c
373
u32 in[MLX5_ST_SZ_DW(pplm_reg)] = {};
sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c
443
u32 out[MLX5_ST_SZ_DW(pplm_reg)] = {};
sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c
444
u32 in[MLX5_ST_SZ_DW(pplm_reg)] = {};
sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c
548
u32 out[MLX5_ST_SZ_DW(pplm_reg)] = {};
sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c
549
u32 in[MLX5_ST_SZ_DW(pplm_reg)] = {};
sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c
748
u32 buf_size[MLX5E_MAX_BUFFER];
sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c
845
u32 x;
sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c
848
u32 out_cap[MLX5_ST_SZ_DW(mtcap)] = {};
sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c
850
u32 value;
sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c
866
u32 out_sensor[MLX5_ST_SZ_DW(mtmp_reg)] = {};
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
105
u32 mpfs_index;
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
122
u32 ix = mlx5e_hash_eth_addr(hn_new->ai.addr);
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
1261
mlx5e_create_main_groups_sub(struct mlx5e_flow_table *ft, u32 *in,
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
1404
u32 *in;
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
1422
mlx5e_create_main_vxlan_groups_sub(struct mlx5e_flow_table *ft, u32 *in,
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
1474
u32 *in;
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
1552
mlx5e_create_vlan_groups_sub(struct mlx5e_flow_table *ft, u32 *in,
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
1606
u32 *in;
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
179
static u32
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
183
u32 ret;
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
1952
mlx5e_create_vxlan_groups_sub(struct mlx5e_flow_table *ft, u32 *in,
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
1994
u32 *in;
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
2058
mlx5e_create_inner_rss_groups_sub(struct mlx5e_flow_table *ft, u32 *in,
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
2110
u32 *in;
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
262
u32 *tirn = priv->tirn;
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
263
u32 tt_vec;
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
475
u32 *tirn = priv->tirn_inner_vxlan;
sys/dev/mlx5/mlx5_en/mlx5_en_hw_tls.c
607
const u32 ds_cnt = DIV_ROUND_UP(sizeof(struct mlx5e_tx_umr_wqe) +
sys/dev/mlx5/mlx5_en/mlx5_en_hw_tls.c
652
const u32 ds_cnt = DIV_ROUND_UP(sizeof(struct mlx5e_tx_psv_wqe),
sys/dev/mlx5/mlx5_en/mlx5_en_hw_tls.c
687
const u32 ds_cnt = MLX5_SEND_WQEBB_NUM_DS;
sys/dev/mlx5/mlx5_en/mlx5_en_hw_tls.c
806
u32 header_size;
sys/dev/mlx5/mlx5_en/mlx5_en_hw_tls.c
807
u32 mb_seq;
sys/dev/mlx5/mlx5_en/mlx5_en_hw_tls_rx.c
157
const u32 ds_cnt = DIV_ROUND_UP(sizeof(struct mlx5e_tx_umr_wqe) +
sys/dev/mlx5/mlx5_en/mlx5_en_hw_tls_rx.c
229
const u32 ds_cnt = DIV_ROUND_UP(sizeof(struct mlx5e_tx_psv_wqe),
sys/dev/mlx5/mlx5_en/mlx5_en_hw_tls_rx.c
356
const u32 ds_cnt = DIV_ROUND_UP(sizeof(*wqe), MLX5_SEND_WQE_DS);
sys/dev/mlx5/mlx5_en/mlx5_en_hw_tls_rx.c
97
u32 ch;
sys/dev/mlx5/mlx5_en/mlx5_en_hw_tls_rx.c
99
u32 temp;
sys/dev/mlx5/mlx5_en/mlx5_en_iq.c
104
mlx5e_iq_send_nop(struct mlx5e_iq *iq, u32 ds_cnt)
sys/dev/mlx5/mlx5_en/mlx5_en_iq.c
514
u64 *pdma_address, u32 dma_sync)
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
1205
u32 nsegs, wqe_sz;
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
1992
u32 i;
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
2034
u32 out[MLX5_ST_SZ_DW(create_cq_out)];
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
2319
mlx5e_get_wqe_sz(struct mlx5e_priv *priv, u32 *wqe_sz, u32 *nsegs)
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
2321
u32 r, n, maxs;
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
2347
u32 wqe_sz, nsegs;
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
2681
u32 in[MLX5_ST_SZ_DW(create_tis_in)];
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
2731
mlx5e_open_default_rqt(struct mlx5e_priv *priv, u32 *prqtn, int sz)
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
2733
u32 *in;
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
2739
inlen = MLX5_ST_SZ_BYTES(create_rqt_in) + sizeof(u32) * sz;
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
2799
u32 *in;
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
2808
inlen = MLX5_ST_SZ_BYTES(modify_rqt_in) + sizeof(u32) * sz;
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
2838
inlen = MLX5_ST_SZ_BYTES(modify_rqt_in) + sizeof(u32);
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
2870
u32 *in;
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
2879
inlen = MLX5_ST_SZ_BYTES(modify_rqt_in) + sizeof(u32) * sz;
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
2896
inlen = MLX5_ST_SZ_BYTES(modify_rqt_in) + sizeof(u32);
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
2922
mlx5e_hw_lro_set_tir_ctx_lro_max_msg_sz(struct mlx5e_priv *priv, u32 *tirc)
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
2929
mlx5e_hw_lro_set_tir_ctx(struct mlx5e_priv *priv, u32 *tirc)
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
2944
u32 *in;
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
2987
mlx5e_build_tir_ctx(struct mlx5e_priv *priv, u32 * tirc, int tt, bool inner_vxlan)
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
3142
u32 *in;
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
371
u32 out[MLX5_ST_SZ_DW(ptys_reg)];
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
372
u32 eth_proto_oper;
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
3984
mlx5e_create_mkey(struct mlx5e_priv *priv, u32 pdn,
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
3991
u32 *in;
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
44
static int mlx5e_get_wqe_sz(struct mlx5e_priv *priv, u32 *wqe_sz, u32 *nsegs);
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
4421
u32 ch = priv->params.num_channels;
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
4423
u32 temp;
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
4569
u32 eth_proto_cap;
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
4570
u32 out[MLX5_ST_SZ_DW(ptys_reg)];
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
462
static u32
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
463
mlx5e_find_link_mode(u32 subtype, bool ext)
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
465
u32 link_mode = 0;
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
530
u32 eth_proto_cap;
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
531
u32 link_mode;
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
532
u32 out[MLX5_ST_SZ_DW(ptys_reg)];
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
56
u32 subtype;
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
682
u32 *in;
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
683
u32 *out;
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
777
u32 out[MLX5_ST_SZ_DW(query_vnic_env_out)] = {};
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
778
u32 in[MLX5_ST_SZ_DW(query_vnic_env_in)] = {};
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
808
u32 in[MLX5_ST_SZ_DW(query_vport_counter_in)];
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
809
u32 *out;
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
826
u32 rx_out_of_buffer = 0;
sys/dev/mlx5/mlx5_en/mlx5_en_port_buffer.c
125
static u32 calculate_xoff(struct mlx5e_priv *priv, unsigned int mtu)
sys/dev/mlx5/mlx5_en/mlx5_en_port_buffer.c
127
u32 speed;
sys/dev/mlx5/mlx5_en/mlx5_en_port_buffer.c
128
u32 xoff;
sys/dev/mlx5/mlx5_en/mlx5_en_port_buffer.c
136
speed = max_t(u32, speed, SPEED_40000);
sys/dev/mlx5/mlx5_en/mlx5_en_port_buffer.c
144
struct mlx5e_port_buffer *port_buffer, u32 xoff)
sys/dev/mlx5/mlx5_en/mlx5_en_port_buffer.c
193
u8 pfc_en, u8 *buffer, u32 xoff,
sys/dev/mlx5/mlx5_en/mlx5_en_port_buffer.c
240
u32 change, unsigned int mtu,
sys/dev/mlx5/mlx5_en/mlx5_en_port_buffer.c
242
u32 *buffer_size,
sys/dev/mlx5/mlx5_en/mlx5_en_port_buffer.c
246
u32 xoff = calculate_xoff(priv, mtu);
sys/dev/mlx5/mlx5_en/mlx5_en_port_buffer.c
250
u32 total_used = 0;
sys/dev/mlx5/mlx5_en/mlx5_en_port_buffer.c
38
u32 total_used = 0;
sys/dev/mlx5/mlx5_en/mlx5_en_rl.c
425
mlx5e_rl_post_sq_remap_wqe(struct mlx5e_iq *iq, u32 scq_handle, u32 sq_handle,
sys/dev/mlx5/mlx5_en/mlx5_en_rl.c
428
const u32 ds_cnt = DIV_ROUND_UP(sizeof(struct mlx5e_tx_qos_remap_wqe),
sys/dev/mlx5/mlx5_en/mlx5_en_rl.c
472
u32 scq_handle;
sys/dev/mlx5/mlx5_en/mlx5_en_rl.c
473
u32 sq_handle;
sys/dev/mlx5/mlx5_en/mlx5_en_rl.c
747
u32 in[MLX5_ST_SZ_DW(create_tis_in)];
sys/dev/mlx5/mlx5_en/mlx5_en_rx.c
326
struct mbuf *mb, struct mlx5e_rq_mbuf *mr, u32 cqe_bcnt)
sys/dev/mlx5/mlx5_en/mlx5_en_rx.c
470
mlx5e_read_cqe_slot(struct mlx5e_cq *cq, u32 cc, void *data)
sys/dev/mlx5/mlx5_en/mlx5_en_rx.c
477
mlx5e_write_cqe_slot(struct mlx5e_cq *cq, u32 cc, void *data)
sys/dev/mlx5/mlx5_en/mlx5_en_rx.c
514
u32 cqe_count;
sys/dev/mlx5/mlx5_en/mlx5_en_rx.c
515
u32 i = 0;
sys/dev/mlx5/mlx5_en/mlx5_en_rx.c
556
u32 byte_cnt, seglen;
sys/dev/mlx5/mlx5_en/mlx5_en_tx.c
141
u32 ch;
sys/dev/mlx5/mlx5_en/mlx5_en_tx.c
142
u32 tc;
sys/dev/mlx5/mlx5_en/mlx5_en_tx.c
158
u32 temp;
sys/dev/mlx5/mlx5_en/mlx5_en_tx.c
55
mlx5e_send_nop(struct mlx5e_sq *sq, u32 ds_cnt)
sys/dev/mlx5/mlx5_en/mlx5_en_tx.c
555
u32 off;
sys/dev/mlx5/mlx5_en/mlx5_en_tx.c
556
u32 msb;
sys/dev/mlx5/mlx5_en/mlx5_en_tx.c
560
const u32 ds_cnt = 2;
sys/dev/mlx5/mlx5_en/mlx5_en_tx.c
600
xsegs += howmany((u32)segs[x].ds_len, msb);
sys/dev/mlx5/mlx5_en/mlx5_en_tx.c
624
u32 len = segs[x].ds_len - off;
sys/dev/mlx5/mlx5_en/mlx5_en_tx.c
764
u32 payload_len;
sys/dev/mlx5/mlx5_en/mlx5_en_tx.c
765
u32 mss = mb->m_pkthdr.tso_segsz;
sys/dev/mlx5/mlx5_en/mlx5_en_tx.c
766
u32 num_pkts;
sys/dev/mlx5/mlx5_en/mlx5_en_tx.c
790
u32 payload_len;
sys/dev/mlx5/mlx5_en/mlx5_en_tx.c
791
u32 mss = mb->m_pkthdr.tso_segsz;
sys/dev/mlx5/mlx5_en/mlx5_en_tx.c
792
u32 num_pkts;
sys/dev/mlx5/mlx5_en/mlx5_en_txrx.c
59
mlx5e_dump_err_cqe(struct mlx5e_cq *cq, u32 qn, const struct mlx5_err_cqe *err_cqe)
sys/dev/mlx5/mlx5_en/mlx5_en_txrx.c
61
u32 ci;
sys/dev/mlx5/mlx5_en/port_buffer.h
50
u32 size;
sys/dev/mlx5/mlx5_en/port_buffer.h
51
u32 xoff;
sys/dev/mlx5/mlx5_en/port_buffer.h
52
u32 xon;
sys/dev/mlx5/mlx5_en/port_buffer.h
56
u32 port_buffer_size;
sys/dev/mlx5/mlx5_en/port_buffer.h
57
u32 spare_buffer_size;
sys/dev/mlx5/mlx5_en/port_buffer.h
73
u32 change, unsigned int mtu,
sys/dev/mlx5/mlx5_en/port_buffer.h
75
u32 *buffer_size,
sys/dev/mlx5/mlx5_fpga/cmd.h
76
u32 *fpga_qpn);
sys/dev/mlx5/mlx5_fpga/cmd.h
77
int mlx5_fpga_modify_qp(struct mlx5_core_dev *dev, u32 fpga_qpn,
sys/dev/mlx5/mlx5_fpga/cmd.h
79
int mlx5_fpga_query_qp(struct mlx5_core_dev *dev, u32 fpga_qpn, void *fpga_qpc);
sys/dev/mlx5/mlx5_fpga/cmd.h
80
int mlx5_fpga_query_qp_counters(struct mlx5_core_dev *dev, u32 fpga_qpn,
sys/dev/mlx5/mlx5_fpga/cmd.h
82
int mlx5_fpga_destroy_qp(struct mlx5_core_dev *dev, u32 fpga_qpn);
sys/dev/mlx5/mlx5_fpga/conn.h
50
u32 fpga_qpc[MLX5_ST_SZ_DW(fpga_qpc)];
sys/dev/mlx5/mlx5_fpga/conn.h
51
u32 fpga_qpn;
sys/dev/mlx5/mlx5_fpga/core.h
69
u32 pdn;
sys/dev/mlx5/mlx5_fpga/ipsec.h
44
u32 mlx5_fpga_ipsec_device_caps(struct mlx5_core_dev *mdev);
sys/dev/mlx5/mlx5_fpga/ipsec.h
65
static inline u32 mlx5_fpga_ipsec_device_caps(struct mlx5_core_dev *mdev)
sys/dev/mlx5/mlx5_fpga/mlx5fpga_cmd.c
128
u32 in[MLX5_ST_SZ_DW(fpga_ctrl)] = {0};
sys/dev/mlx5/mlx5_fpga/mlx5fpga_cmd.c
129
u32 out[MLX5_ST_SZ_DW(fpga_ctrl)];
sys/dev/mlx5/mlx5_fpga/mlx5fpga_cmd.c
151
u32 in[MLX5_ST_SZ_DW(fpga_ctrl)] = {0};
sys/dev/mlx5/mlx5_fpga/mlx5fpga_cmd.c
152
u32 out[MLX5_ST_SZ_DW(fpga_ctrl)];
sys/dev/mlx5/mlx5_fpga/mlx5fpga_cmd.c
169
u32 in[MLX5_ST_SZ_DW(fpga_ctrl)] = {0};
sys/dev/mlx5/mlx5_fpga/mlx5fpga_cmd.c
170
u32 out[MLX5_ST_SZ_DW(fpga_ctrl)];
sys/dev/mlx5/mlx5_fpga/mlx5fpga_cmd.c
196
u32 in[MLX5_ST_SZ_DW(mtmp_reg)] = {0};
sys/dev/mlx5/mlx5_fpga/mlx5fpga_cmd.c
197
u32 out[MLX5_ST_SZ_DW(mtmp_reg)] = {0};
sys/dev/mlx5/mlx5_fpga/mlx5fpga_cmd.c
226
u32 *fpga_qpn)
sys/dev/mlx5/mlx5_fpga/mlx5fpga_cmd.c
228
u32 in[MLX5_ST_SZ_DW(fpga_create_qp_in)] = {0};
sys/dev/mlx5/mlx5_fpga/mlx5fpga_cmd.c
229
u32 out[MLX5_ST_SZ_DW(fpga_create_qp_out)];
sys/dev/mlx5/mlx5_fpga/mlx5fpga_cmd.c
246
int mlx5_fpga_modify_qp(struct mlx5_core_dev *dev, u32 fpga_qpn,
sys/dev/mlx5/mlx5_fpga/mlx5fpga_cmd.c
250
u32 in[MLX5_ST_SZ_DW(fpga_modify_qp_in)] = {0};
sys/dev/mlx5/mlx5_fpga/mlx5fpga_cmd.c
251
u32 out[MLX5_ST_SZ_DW(fpga_modify_qp_out)];
sys/dev/mlx5/mlx5_fpga/mlx5fpga_cmd.c
263
u32 fpga_qpn, void *fpga_qpc)
sys/dev/mlx5/mlx5_fpga/mlx5fpga_cmd.c
265
u32 in[MLX5_ST_SZ_DW(fpga_query_qp_in)] = {0};
sys/dev/mlx5/mlx5_fpga/mlx5fpga_cmd.c
266
u32 out[MLX5_ST_SZ_DW(fpga_query_qp_out)];
sys/dev/mlx5/mlx5_fpga/mlx5fpga_cmd.c
281
int mlx5_fpga_destroy_qp(struct mlx5_core_dev *dev, u32 fpga_qpn)
sys/dev/mlx5/mlx5_fpga/mlx5fpga_cmd.c
283
u32 in[MLX5_ST_SZ_DW(fpga_destroy_qp_in)] = {0};
sys/dev/mlx5/mlx5_fpga/mlx5fpga_cmd.c
284
u32 out[MLX5_ST_SZ_DW(fpga_destroy_qp_out)];
sys/dev/mlx5/mlx5_fpga/mlx5fpga_cmd.c
292
int mlx5_fpga_query_qp_counters(struct mlx5_core_dev *dev, u32 fpga_qpn,
sys/dev/mlx5/mlx5_fpga/mlx5fpga_cmd.c
295
u32 in[MLX5_ST_SZ_DW(fpga_query_qp_counters_in)] = {0};
sys/dev/mlx5/mlx5_fpga/mlx5fpga_cmd.c
296
u32 out[MLX5_ST_SZ_DW(fpga_query_qp_counters_out)];
sys/dev/mlx5/mlx5_fpga/mlx5fpga_cmd.c
325
u32 in[MLX5_ST_SZ_DW(fpga_shell_counters)] = {0};
sys/dev/mlx5/mlx5_fpga/mlx5fpga_cmd.c
326
u32 out[MLX5_ST_SZ_DW(fpga_shell_counters)];
sys/dev/mlx5/mlx5_fpga/mlx5fpga_cmd.c
46
u32 in[MLX5_FPGA_ACCESS_REG_SZ] = {0};
sys/dev/mlx5/mlx5_fpga/mlx5fpga_cmd.c
47
u32 out[MLX5_FPGA_ACCESS_REG_SZ];
sys/dev/mlx5/mlx5_fpga/mlx5fpga_cmd.c
75
u32 in[MLX5_ST_SZ_DW(fpga_cap)] = {0};
sys/dev/mlx5/mlx5_fpga/mlx5fpga_cmd.c
84
u32 in[MLX5_ST_SZ_DW(fpga_ctrl)] = {0};
sys/dev/mlx5/mlx5_fpga/mlx5fpga_cmd.c
85
u32 out[MLX5_ST_SZ_DW(fpga_ctrl)];
sys/dev/mlx5/mlx5_fpga/mlx5fpga_conn.c
220
static int mlx5_fpga_conn_create_mkey(struct mlx5_core_dev *mdev, u32 pdn,
sys/dev/mlx5/mlx5_fpga/mlx5fpga_conn.c
225
u32 *in;
sys/dev/mlx5/mlx5_fpga/mlx5fpga_conn.c
429
u32 temp_cqc[MLX5_ST_SZ_DW(cqc)] = {0};
sys/dev/mlx5/mlx5_fpga/mlx5fpga_conn.c
436
u32 i;
sys/dev/mlx5/mlx5_fpga/mlx5fpga_conn.c
532
u32 temp_qpc[MLX5_ST_SZ_DW(qpc)] = {0};
sys/dev/mlx5/mlx5_fpga/mlx5fpga_conn.c
675
u32 *qpc = NULL;
sys/dev/mlx5/mlx5_fpga/mlx5fpga_conn.c
711
u32 *qpc = NULL;
sys/dev/mlx5/mlx5_fpga/mlx5fpga_conn.c
756
u32 *qpc = NULL;
sys/dev/mlx5/mlx5_fpga/mlx5fpga_conn.c
757
u32 opt_mask;
sys/dev/mlx5/mlx5_fpga/mlx5fpga_core.c
128
static const char *mlx5_fpga_name(u32 fpga_id)
sys/dev/mlx5/mlx5_fpga/mlx5fpga_core.c
151
u32 fpga_id;
sys/dev/mlx5/mlx5_fpga/mlx5fpga_core.c
212
u32 fpga_id;
sys/dev/mlx5/mlx5_fpga/mlx5fpga_core.c
213
u32 vid;
sys/dev/mlx5/mlx5_fpga/mlx5fpga_core.c
366
u32 fpga_id;
sys/dev/mlx5/mlx5_fpga/mlx5fpga_core.c
458
u32 fpga_qpn;
sys/dev/mlx5/mlx5_fpga/mlx5fpga_core.c
511
u32 vid;
sys/dev/mlx5/mlx5_fpga/mlx5fpga_ipsec.c
236
u32 mlx5_fpga_ipsec_device_caps(struct mlx5_core_dev *mdev)
sys/dev/mlx5/mlx5_fpga/mlx5fpga_ipsec.c
239
u32 ret = 0;
sys/dev/mlx5/mlx5_fpga/mlx5fpga_ipsec.c
278
u32 count;
sys/dev/mlx5/mlx5_fpga/mlx5fpga_ipsec.c
74
u32 caps[MLX5_ST_SZ_DW(ipsec_extended_cap)];
sys/dev/mlx5/mlx5_fpga/mlx5fpga_sdk.c
533
void mlx5_fpga_get_cap(struct mlx5_fpga_device *fdev, u32 *fpga_caps)
sys/dev/mlx5/mlx5_fpga/mlx5fpga_trans.c
173
if (size != sizeof(u32)) {
sys/dev/mlx5/mlx5_fpga/mlx5fpga_trans.c
186
u32 *header;
sys/dev/mlx5/mlx5_fpga/mlx5fpga_trans.c
48
u32 header[MLX5_ST_SZ_DW(fpga_shell_qp_packet)];
sys/dev/mlx5/mlx5_fpga/mlx5fpga_xfer.c
79
sizeof(u32) : (1 << MLX5_FPGA_TRANSACTION_SEND_PAGE_BITS);
sys/dev/mlx5/mlx5_fpga/sdk.h
384
void mlx5_fpga_get_cap(struct mlx5_fpga_device *fdev, u32 *fpga_caps);
sys/dev/mlx5/mlx5_fpga/sdk.h
73
int (*add)(struct mlx5_fpga_device *fdev, u32 vid, u16 pid);
sys/dev/mlx5/mlx5_fpga_tools/mlx5fpga_tools_char.c
203
u32 fpga_cap[MLX5_ST_SZ_DW(fpga_cap)] = {0};
sys/dev/mlx5/mlx5_fpga_tools/mlx5fpga_tools_main.c
102
static int mlx5_fpga_tools_add(struct mlx5_fpga_device *fdev, u32 vid, u16 pid)
sys/dev/mlx5/mlx5_fpga_tools/mlx5fpga_tools_main.c
43
static int mlx5_fpga_tools_add(struct mlx5_fpga_device *fdev, u32 vid, u16 pid);
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
1000
int mlx5_ib_check_mr_status(struct ib_mr *ibmr, u32 check_mask,
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
1007
u32 wq_attr_mask, struct ib_udata *udata);
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
1084
bool mlx5_ib_devx_is_flow_counter(void *obj, u32 offset, u32 *counter_id);
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
111
u32 *sys_pages;
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
1124
static inline u32 check_cq_create_flags(u32 flags)
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
1134
static inline int verify_assign_uidx(u8 cqe_version, u32 cmd_uidx,
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
1135
u32 *user_index)
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
1152
u32 *user_index)
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
1170
u32 *user_index)
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
119
u32 ver;
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
1201
struct mlx5_bfreg_info *bfregi, u32 bfregn,
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
122
u32 num_sys_pages;
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
123
u32 num_static_sys_pages;
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
124
u32 total_num_bfregs;
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
125
u32 num_dyn_bfregs;
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
138
u32 tdn;
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
151
u32 pdn;
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
225
u32 *wr_data;
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
248
u32 rq_num_pas;
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
249
u32 log_rq_stride;
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
250
u32 log_rq_size;
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
251
u32 rq_page_offset;
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
252
u32 log_page_size;
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
258
u32 user_index;
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
259
u32 wqe_count;
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
260
u32 wqe_shift;
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
277
u32 rqtn;
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
325
u32 tirn;
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
333
u32 tirn;
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
342
u32 tisn;
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
360
u32 *in;
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
383
u32 flags;
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
451
u32 length;
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
453
u32 mkey;
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
484
u32 create_flags;
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
516
u32 xrcdn;
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
528
u32 page_idx;
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
549
u32 out[MLX5_ST_SZ_DW(create_mkey_out)];
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
596
u32 order;
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
597
u32 size;
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
598
u32 cur;
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
599
u32 miss;
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
600
u32 limit;
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
792
u32 user_td;
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
898
void __mlx5_ib_cq_clean(struct mlx5_ib_cq *cq, u32 qpn, struct mlx5_ib_srq *srq);
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
899
void mlx5_ib_cq_clean(struct mlx5_ib_cq *cq, u32 qpn, struct mlx5_ib_srq *srq);
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
904
int mlx5_ib_create_ah(struct ib_ah *ah, struct ib_ah_attr *ah_attr, u32 flags,
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
907
void mlx5_ib_destroy_ah(struct ib_ah *ah, u32 flags);
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
930
void *buffer, u32 length,
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
953
u32 max_num_sg, struct ib_udata *udata);
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
964
int mlx5_ib_get_buf_offset(u64 addr, int page_shift, u32 *offset);
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
973
u32 *vendor_id);
sys/dev/mlx5/mlx5_ib/mlx5_ib_ah.c
102
u32 tmp;
sys/dev/mlx5/mlx5_ib/mlx5_ib_ah.c
122
void mlx5_ib_destroy_ah(struct ib_ah *ah, u32 flags)
sys/dev/mlx5/mlx5_ib/mlx5_ib_ah.c
62
u32 flags, struct ib_udata *udata)
sys/dev/mlx5/mlx5_ib/mlx5_ib_ah.c
77
u32 min_resp_len = offsetof(typeof(resp), dmac) +
sys/dev/mlx5/mlx5_ib/mlx5_ib_cong.c
160
mlx5_ib_set_cc_param_mask_val(void *field, u32 index,
sys/dev/mlx5/mlx5_ib/mlx5_ib_cong.c
161
u64 var, u32 *attr_mask)
sys/dev/mlx5/mlx5_ib/mlx5_ib_cong.c
265
u32 x;
sys/dev/mlx5/mlx5_ib/mlx5_ib_cong.c
289
mlx5_ib_set_cc_params(struct mlx5_ib_dev *dev, u32 index, u64 var)
sys/dev/mlx5/mlx5_ib/mlx5_ib_cong.c
293
u32 attr_mask = 0;
sys/dev/mlx5/mlx5_ib/mlx5_ib_cong.c
481
u32 x;
sys/dev/mlx5/mlx5_ib/mlx5_ib_cong.c
85
mlx5_ib_param_to_node(u32 index)
sys/dev/mlx5/mlx5_ib/mlx5_ib_cong.c
96
mlx5_get_cc_param_val(void *field, u32 index)
sys/dev/mlx5/mlx5_ib/mlx5_ib_cq.c
1029
static int is_equal_rsn(struct mlx5_cqe64 *cqe64, u32 rsn)
sys/dev/mlx5/mlx5_ib/mlx5_ib_cq.c
1034
void __mlx5_ib_cq_clean(struct mlx5_ib_cq *cq, u32 rsn, struct mlx5_ib_srq *srq)
sys/dev/mlx5/mlx5_ib/mlx5_ib_cq.c
1038
u32 prod_index;
sys/dev/mlx5/mlx5_ib/mlx5_ib_cq.c
1085
void mlx5_ib_cq_clean(struct mlx5_ib_cq *cq, u32 qpn, struct mlx5_ib_srq *srq)
sys/dev/mlx5/mlx5_ib/mlx5_ib_cq.c
1244
u32 *in;
sys/dev/mlx5/mlx5_ib/mlx5_ib_cq.c
746
struct mlx5_ib_cq *cq, int entries, u32 **cqb,
sys/dev/mlx5/mlx5_ib/mlx5_ib_cq.c
855
u32 **cqb, int *index, int *inlen)
sys/dev/mlx5/mlx5_ib/mlx5_ib_cq.c
923
u32 out[MLX5_ST_SZ_DW(create_cq_out)];
sys/dev/mlx5/mlx5_ib/mlx5_ib_cq.c
927
u32 *cqb = NULL;
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
100
u32 xa_key_level1;
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
101
u32 xa_key_level2;
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
1032
u32 user_idx;
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
1097
u32 *dinlen,
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
1098
u32 *obj_id)
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
125
u32 dinlen; /* destroy inbox length */
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
126
u32 dinbox[MLX5_MAX_DESTROY_INBOX_SIZE_DW];
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
127
u32 flags;
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
132
u32 flow_counter_bulk_size;
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
1337
u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)];
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
1372
u32 obj_id = mcq->cqn;
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
140
u32 page_offset;
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
1403
u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)];
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
1408
u32 obj_id;
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
143
u32 dinlen;
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
144
u32 dinbox[MLX5_ST_SZ_DW(general_obj_in_cmd_hdr)];
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
1470
WARN_ON(obj->dinlen > MLX5_MAX_DESTROY_INBOX_SIZE_DW * sizeof(u32));
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
149
u32 inlen;
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
150
u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)];
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
161
u32 in[MLX5_ST_SZ_DW(create_uctx_in)] = {0};
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
162
u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)] = {0};
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
1631
u32 flags;
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
166
u32 cap = 0;
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
1764
u32 key_level1,
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
1766
u32 key_level2)
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
1789
u32 key_level1,
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
1791
u32 key_level2)
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
1926
u32 obj_id = 0;
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
194
u32 in[MLX5_ST_SZ_DW(destroy_uctx_in)] = {0};
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
195
u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)] = {0};
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
1991
u32 key_level1;
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
2090
u32 access;
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
2093
u32 page_mask;
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
2167
u32 obj_id;
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
2219
u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)];
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
225
bool mlx5_ib_devx_is_flow_counter(void *obj, u32 offset, u32 *counter_id)
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
2254
static u32 devx_get_obj_id_from_event(unsigned long event_type, void *data)
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
2257
u32 obj_id = 0;
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
2358
u32 obj_id;
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
2715
UVERBS_ATTR_TYPE(u32),
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
2728
UVERBS_ATTR_TYPE(u32),
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
2731
UVERBS_ATTR_TYPE(u32),
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
2737
UVERBS_ATTR_TYPE(u32),
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
2740
UVERBS_ATTR_TYPE(u32),
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
2849
UVERBS_ATTR_TYPE(u32),
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
365
static u32 get_dec_obj_id(u64 obj_id)
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
375
static u64 get_enc_obj_id(u32 opcode, u32 obj_id)
sys/dev/mlx5/mlx5_ib/mlx5_ib_gsi.c
48
u32 outstanding_pi, outstanding_ci;
sys/dev/mlx5/mlx5_ib/mlx5_ib_gsi.c
73
u32 index;
sys/dev/mlx5/mlx5_ib/mlx5_ib_mad.c
353
u32 *vendor_id)
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1087
u32 tmp;
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1208
static int mlx5_ib_alloc_transport_domain(struct mlx5_ib_dev *dev, u32 *tdn,
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1238
static void mlx5_ib_dealloc_transport_domain(struct mlx5_ib_dev *dev, u32 tdn,
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1550
u32 bfreg_dyn_idx = 0;
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1551
u32 uar_index;
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
158
static int translate_eth_proto_oper(u32 eth_proto_oper, u8 *active_speed,
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1783
static u8 get_match_criteria_enable(u32 *match_criteria)
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1828
static int parse_flow_attr(u32 *match_c, u32 *match_v,
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
2188
u32 action;
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
219
static int translate_eth_ext_proto_oper(u32 eth_proto_oper, u8 *active_speed,
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
289
u32 out[MLX5_ST_SZ_DW(ptys_reg)] = {};
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
293
u32 eth_prot_oper;
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
3064
static u32 get_core_cap_flags(struct ib_device *ibdev)
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
3070
u32 ret = 0;
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
404
u32 in[MLX5_ST_SZ_DW(set_roce_address_in)] = {0};
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
405
u32 out[MLX5_ST_SZ_DW(set_roce_address_out)] = {0};
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
575
u32 *vendor_id)
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
677
((u32)fw_rev_min(dev->mdev) << 16) |
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
916
u32 *rep;
sys/dev/mlx5/mlx5_ib/mlx5_ib_mem.c
182
int mlx5_ib_get_buf_offset(u64 addr, int page_shift, u32 *offset)
sys/dev/mlx5/mlx5_ib/mlx5_ib_mr.c
1286
u32 key = mr->mmkey.key;
sys/dev/mlx5/mlx5_ib/mlx5_ib_mr.c
1348
u32 max_num_sg, struct ib_udata *udata)
sys/dev/mlx5/mlx5_ib/mlx5_ib_mr.c
1355
u32 *in;
sys/dev/mlx5/mlx5_ib/mlx5_ib_mr.c
1394
u32 psv_index[2];
sys/dev/mlx5/mlx5_ib/mlx5_ib_mr.c
1465
u32 *in = NULL;
sys/dev/mlx5/mlx5_ib/mlx5_ib_mr.c
1544
int mlx5_ib_check_mr_status(struct ib_mr *ibmr, u32 check_mask,
sys/dev/mlx5/mlx5_ib/mlx5_ib_mr.c
1594
u32 lkey = mr->ibmr.pd->local_dma_lkey;
sys/dev/mlx5/mlx5_ib/mlx5_ib_mr.c
161
u32 *in;
sys/dev/mlx5/mlx5_ib/mlx5_ib_mr.c
484
u32 *in;
sys/dev/mlx5/mlx5_ib/mlx5_ib_mr.c
578
struct ib_sge *sg, u64 dma, int n, u32 key,
sys/dev/mlx5/mlx5_ib/mlx5_ib_mr.c
602
struct ib_sge *sg, u64 dma, int n, u32 key,
sys/dev/mlx5/mlx5_ib/mlx5_ib_mr.c
617
struct mlx5_umr_wr *umrwr, u32 key)
sys/dev/mlx5/mlx5_ib/mlx5_ib_mr.c
880
u32 *in;
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
1042
static u32 get_rx_type(struct mlx5_ib_qp *qp, struct ib_qp_init_attr *attr)
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
1062
struct mlx5_ib_sq *sq, u32 tdn,
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
1065
u32 in[MLX5_ST_SZ_DW(create_tis_in)] = {0};
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
1094
u32 offset = 0;
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
1160
u32 log_page_size = MLX5_GET(qpc, qpc, log_page_size) + 12;
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
1161
u32 log_rq_stride = MLX5_GET(qpc, qpc, log_rq_stride);
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
1162
u32 log_rq_size = MLX5_GET(qpc, qpc, log_rq_size);
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
1163
u32 page_offset = MLX5_GET(qpc, qpc, page_offset);
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
1164
u32 po_quanta = 1 << (log_page_size - 6);
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
1165
u32 rq_sz = 1 << (log_rq_size + 4 + log_rq_stride);
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
1166
u32 page_size = 1 << log_page_size;
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
1167
u32 rq_sz_po = rq_sz + (page_offset * po_quanta);
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
1168
u32 rq_num_pas = (rq_sz_po + page_size - 1) / page_size;
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
1186
u32 rq_pas_size = get_rq_pas_size(qpc);
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
1238
struct mlx5_ib_rq *rq, u32 tdn,
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
1241
u32 *in;
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
1272
u32 *in,
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
1282
u32 tdn = mucontext->tdn;
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
133
void *buffer, u32 length,
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
1373
u32 *in;
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
1376
u32 selected_fields = 0;
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
1378
u32 tdn = mucontext->tdn;
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
142
u32 first_copy_length;
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
1597
u32 uidx = MLX5_IB_DEFAULT_UIDX;
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
1601
u32 *in;
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
162
first_copy_length = min_t(u32, offset + length, wq_end) - offset;
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
2210
u32 access_flags, hw_access_flags = 0;
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
2327
u32 path_flags, const struct ib_qp_attr *attr,
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
2867
cpu_to_be32((u32)(mibport->q_cnt_id) << 24);
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
3052
u64 remote_addr, u32 rkey)
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
3317
u32 key, int access)
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
3498
struct mlx5_bsf *bsf, u32 data_size)
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
3560
u32 data_len = wr->wr.sg_list->length;
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
3561
u32 data_key = wr->wr.sg_list->lkey;
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
3603
u32 prot_key = wr->prot->lkey;
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
3656
const struct ib_sig_handover_wr *wr, u32 nelements,
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
3657
u32 length, u32 pdn)
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
3660
u32 sig_key = sig_mr->rkey;
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
3676
u32 nelements)
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
3692
u32 pdn = get_pd(qp)->pdn;
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
3693
u32 klm_oct_size;
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
3738
u32 psv_idx, void **seg, int *size)
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
3876
u32 mlx5_opcode)
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
3880
ctrl->opmod_idx_opcode = cpu_to_be32(((u32)(qp->sq.cur_post) << 8) |
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
3881
mlx5_opcode | ((u32)opmod << 24));
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
4493
u32 *outb;
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
4657
u32 xrcdn = to_mxrcd(xrcd)->xrcdn;
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
4889
u32 *in;
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
4913
inlen = MLX5_ST_SZ_BYTES(create_rqt_in) + sizeof(u32) * sz;
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
4967
u32 wq_attr_mask, struct ib_udata *udata)
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
54
static const u32 mlx5_ib_opcode[] = {
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
618
struct mlx5_bfreg_info *bfregi, u32 bfregn,
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
622
u32 index_of_sys_page;
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
623
u32 offset;
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
654
u32 *offset)
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
705
u32 offset = 0;
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
763
u32 **in,
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
773
u32 offset = 0;
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
780
u32 uar_flags;
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
82
u32 set_mask; /* raw_qp_set_mask_map */
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
922
u32 **in, int *inlen,
sys/dev/mlx5/mlx5_ib/mlx5_ib_srq.c
82
u32 offset;
sys/dev/mlx5/mlx5_ib/mlx5_ib_srq.c
83
u32 uidx = MLX5_IB_DEFAULT_UIDX;
sys/dev/mlx5/mlx5_lib/aso.h
85
u32 obj_id, u32 opc_mode);
sys/dev/mlx5/mlx5_lib/aso.h
90
struct mlx5_aso *mlx5_aso_create(struct mlx5_core_dev *mdev, u32 pdn);
sys/dev/mlx5/mlx5_lib/mlx5_aso.c
216
static int mlx5_aso_set_sq_rdy(struct mlx5_core_dev *mdev, u32 sqn)
sys/dev/mlx5/mlx5_lib/mlx5_aso.c
238
static int mlx5_aso_create_sq_rdy(struct mlx5_core_dev *mdev, u32 pdn,
sys/dev/mlx5/mlx5_lib/mlx5_aso.c
266
u32 pdn, struct mlx5_aso *sq)
sys/dev/mlx5/mlx5_lib/mlx5_aso.c
304
struct mlx5_aso *mlx5_aso_create(struct mlx5_core_dev *mdev, u32 pdn)
sys/dev/mlx5/mlx5_lib/mlx5_aso.c
34
u32 sqn;
sys/dev/mlx5/mlx5_lib/mlx5_aso.c
340
u32 obj_id, u32 opc_mode)
sys/dev/mlx5/mlx5_lib/mlx5_aso.c
52
u32 i;
sys/dev/mlx5/mlx5_lib/mlx5_aso.c
76
u32 out[MLX5_ST_SZ_DW(create_cq_out)];
sys/dev/mlx5/mlx5_lib/mlx5_gid.c
126
u32 in[MLX5_ST_SZ_DW(set_roce_address_in)] = {0};
sys/dev/mlx5/mlx5_lib/mlx5_gid.c
127
u32 out[MLX5_ST_SZ_DW(set_roce_address_out)] = {0};
sys/dev/mlx5/mpfs.h
30
int mlx5_mpfs_add_mac(struct mlx5_core_dev *dev, u32 *p_index, const u8 *mac,
sys/dev/mlx5/mpfs.h
32
int mlx5_mpfs_del_mac(struct mlx5_core_dev *dev, u32 index);
sys/dev/mlx5/port.h
160
u32 cap;
sys/dev/mlx5/port.h
161
u32 admin;
sys/dev/mlx5/port.h
162
u32 oper;
sys/dev/mlx5/port.h
178
int mlx5_set_port_caps(struct mlx5_core_dev *dev, u8 port_num, u32 caps);
sys/dev/mlx5/port.h
179
int mlx5_query_port_ptys(struct mlx5_core_dev *dev, u32 *ptys,
sys/dev/mlx5/port.h
182
u32 *proto_cap, int proto_mask);
sys/dev/mlx5/port.h
186
u32 eth_proto_admin, int proto_mask);
sys/dev/mlx5/port.h
188
u32 *proto_admin, int proto_mask);
sys/dev/mlx5/port.h
190
u32 *proto_oper, u8 local_port);
sys/dev/mlx5/port.h
191
int mlx5_set_port_proto(struct mlx5_core_dev *dev, u32 proto_admin,
sys/dev/mlx5/port.h
198
int mlx5_set_port_pause_and_pfc(struct mlx5_core_dev *dev, u32 port,
sys/dev/mlx5/port.h
201
int mlx5_query_port_pause(struct mlx5_core_dev *dev, u32 port,
sys/dev/mlx5/port.h
202
u32 *rx_pause, u32 *tx_pause);
sys/dev/mlx5/port.h
212
int device_addr, int size, int module_num, u32 *data,
sys/dev/mlx5/port.h
242
u32 mlx5e_port_ptys2speed(struct mlx5_core_dev *mdev, u32 eth_proto_oper);
sys/dev/mlx5/port.h
243
int mlx5e_port_linkspeed(struct mlx5_core_dev *mdev, u32 *speed);
sys/dev/mlx5/qp.h
188
u32 reserved[2];
sys/dev/mlx5/qp.h
301
u32 reserved;
sys/dev/mlx5/qp.h
449
u32 bytes_committed;
sys/dev/mlx5/qp.h
456
u32 packet_size;
sys/dev/mlx5/qp.h
465
u32 r_key;
sys/dev/mlx5/qp.h
470
u32 packet_size;
sys/dev/mlx5/qp.h
471
u32 rdma_op_len;
sys/dev/mlx5/qp.h
575
static inline struct mlx5_core_qp *__mlx5_qp_lookup(struct mlx5_core_dev *dev, u32 qpn)
sys/dev/mlx5/qp.h
580
static inline struct mlx5_core_mkey *__mlx5_mr_lookup(struct mlx5_core_dev *dev, u32 key)
sys/dev/mlx5/qp.h
587
u32 *in,
sys/dev/mlx5/qp.h
590
u32 opt_param_mask, void *qpc,
sys/dev/mlx5/qp.h
595
u32 *out, int outlen);
sys/dev/mlx5/qp.h
597
u32 *out, int outlen);
sys/dev/mlx5/qp.h
600
int mlx5_core_xrcd_alloc(struct mlx5_core_dev *dev, u32 *xrcdn);
sys/dev/mlx5/qp.h
601
int mlx5_core_xrcd_dealloc(struct mlx5_core_dev *dev, u32 xrcdn);
sys/dev/mlx5/qp.h
604
u32 *in, int inlen,
sys/dev/mlx5/qp.h
605
u32 *out, int outlen);
sys/dev/mlx5/qp.h
608
int mlx5_core_create_rq_tracked(struct mlx5_core_dev *dev, u32 *in, int inlen,
sys/dev/mlx5/qp.h
612
int mlx5_core_create_sq_tracked(struct mlx5_core_dev *dev, u32 *in, int inlen,
sys/dev/mlx5/srq.h
37
u32 type;
sys/dev/mlx5/srq.h
38
u32 flags;
sys/dev/mlx5/srq.h
39
u32 log_size;
sys/dev/mlx5/srq.h
40
u32 wqe_shift;
sys/dev/mlx5/srq.h
41
u32 log_page_size;
sys/dev/mlx5/srq.h
42
u32 wqe_cnt;
sys/dev/mlx5/srq.h
43
u32 srqn;
sys/dev/mlx5/srq.h
44
u32 xrcd;
sys/dev/mlx5/srq.h
45
u32 page_offset;
sys/dev/mlx5/srq.h
46
u32 cqn;
sys/dev/mlx5/srq.h
47
u32 pd;
sys/dev/mlx5/srq.h
48
u32 lwm;
sys/dev/mlx5/srq.h
49
u32 user_index;
sys/dev/mlx5/tls.h
31
int mlx5_tls_open_tis(struct mlx5_core_dev *mdev, int tc, int tdn, int pdn, u32 *p_tisn);
sys/dev/mlx5/tls.h
32
void mlx5_tls_close_tis(struct mlx5_core_dev *mdev, u32 tisn);
sys/dev/mlx5/tls.h
33
int mlx5_tls_open_tir(struct mlx5_core_dev *mdev, int tdn, int rqtn, u32 *p_tirn);
sys/dev/mlx5/tls.h
34
void mlx5_tls_close_tir(struct mlx5_core_dev *mdev, u32 tirn);
sys/dev/mlx5/vport.h
142
u8 port_num, u8 vport_num, u32 *out,
sys/dev/mlx5/vport.h
48
u32 *out_of_rx_buffer);
sys/dev/mlx5/vport.h
94
u32 vport, u64 port_guid);
sys/dev/mlx5/vport.h
96
u32 vport, u64 node_guid);
sys/dev/mlxfw/mlxfw.h
69
u32 *p_max_size, u8 *p_align_bits,
sys/dev/mlxfw/mlxfw.h
72
int (*fsm_lock)(struct mlxfw_dev *mlxfw_dev, u32 *fwhandle);
sys/dev/mlxfw/mlxfw.h
74
int (*fsm_component_update)(struct mlxfw_dev *mlxfw_dev, u32 fwhandle,
sys/dev/mlxfw/mlxfw.h
75
u16 component_index, u32 component_size);
sys/dev/mlxfw/mlxfw.h
77
int (*fsm_block_download)(struct mlxfw_dev *mlxfw_dev, u32 fwhandle,
sys/dev/mlxfw/mlxfw.h
78
u8 *data, u16 size, u32 offset);
sys/dev/mlxfw/mlxfw.h
80
int (*fsm_component_verify)(struct mlxfw_dev *mlxfw_dev, u32 fwhandle,
sys/dev/mlxfw/mlxfw.h
83
int (*fsm_activate)(struct mlxfw_dev *mlxfw_dev, u32 fwhandle);
sys/dev/mlxfw/mlxfw.h
85
int (*fsm_query_state)(struct mlxfw_dev *mlxfw_dev, u32 fwhandle,
sys/dev/mlxfw/mlxfw.h
89
void (*fsm_cancel)(struct mlxfw_dev *mlxfw_dev, u32 fwhandle);
sys/dev/mlxfw/mlxfw.h
91
void (*fsm_release)(struct mlxfw_dev *mlxfw_dev, u32 fwhandle);
sys/dev/mlxfw/mlxfw_fsm.c
106
u32 fwhandle,
sys/dev/mlxfw/mlxfw_fsm.c
111
u32 comp_max_size;
sys/dev/mlxfw/mlxfw_fsm.c
114
u32 offset;
sys/dev/mlxfw/mlxfw_fsm.c
123
comp_max_size = min_t(u32, comp_max_size, MLXFW_FSM_MAX_COMPONENT_SIZE);
sys/dev/mlxfw/mlxfw_fsm.c
150
block_size = (u16) min_t(u32, comp->data_size - offset,
sys/dev/mlxfw/mlxfw_fsm.c
175
static int mlxfw_flash_components(struct mlxfw_dev *mlxfw_dev, u32 fwhandle,
sys/dev/mlxfw/mlxfw_fsm.c
178
u32 component_count;
sys/dev/mlxfw/mlxfw_fsm.c
211
u32 fwhandle;
sys/dev/mlxfw/mlxfw_fsm.c
70
static int mlxfw_fsm_state_wait(struct mlxfw_dev *mlxfw_dev, u32 fwhandle,
sys/dev/mlxfw/mlxfw_mfa2.c
365
u32 idx;
sys/dev/mlxfw/mlxfw_mfa2.c
397
const char *psid, u32 psid_size,
sys/dev/mlxfw/mlxfw_mfa2.c
398
u32 *p_count)
sys/dev/mlxfw/mlxfw_mfa2.c
462
xz_dec = xz_dec_init(XZ_DYNALLOC, (u32) -1);
sys/dev/mlxfw/mlxfw_mfa2.c
565
u32 comp_buf_size;
sys/dev/mlxfw/mlxfw_mfa2.c
567
u32 comp_size;
sys/dev/mlxfw/mlxfw_mfa2.h
39
u32 data_size;
sys/dev/mlxfw/mlxfw_mfa2.h
50
const char *psid, u32 psid_size,
sys/dev/mlxfw/mlxfw_mfa2.h
51
u32 *p_count);
sys/dev/mlxfw/mlxfw_mfa2_file.h
45
u32 cb_archive_size; /* size of compressed components block */
sys/dev/mpr/mpr.c
133
u32 low;
sys/dev/mpr/mpr.c
134
u32 high;
sys/dev/mpr/mpr.c
2425
mpr_sas_log_info(struct mpr_softc *sc , u32 log_info)
sys/dev/mpr/mpr.c
2428
u32 loginfo;
sys/dev/mpr/mpr.c
2430
u32 subcode:16;
sys/dev/mpr/mpr.c
2431
u32 code:8;
sys/dev/mpr/mpr.c
2432
u32 originator:4;
sys/dev/mpr/mpr.c
2433
u32 bus_type:4;
sys/dev/mpr/mpr.c
3474
u32 sge_flags;
sys/dev/mpr/mpr.c
934
u32 cntdn, count;
sys/dev/mpr/mpr.c
935
u32 int_status;
sys/dev/mpr/mpr.c
936
u32 doorbell;
sys/dev/mpr/mpr_config.c
1074
*mpi_reply, Mpi26PCIeDevicePage2_t *config_page, u32 form, u16 handle)
sys/dev/mpr/mpr_config.c
1341
*mpi_reply, Mpi2RaidVolPage0_t *config_page, u32 page_address)
sys/dev/mpr/mpr_config.c
1472
*mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form, u16 handle)
sys/dev/mpr/mpr_config.c
1631
Mpi2RaidPhysDiskPage0_t *config_page, u32 page_address)
sys/dev/mpr/mpr_config.c
800
*mpi_reply, Mpi2SasDevicePage0_t *config_page, u32 form, u16 handle)
sys/dev/mpr/mpr_config.c
937
*mpi_reply, Mpi26PCIeDevicePage0_t *config_page, u32 form, u16 handle)
sys/dev/mpr/mpr_mapping.c
1148
u32 map_idx, index, device_info;
sys/dev/mpr/mpr_mapping.c
1326
u32 map_idx, index;
sys/dev/mpr/mpr_mapping.c
1471
u32 start_idx = et_entry->start_index;
sys/dev/mpr/mpr_mapping.c
1493
u32 remove_idx;
sys/dev/mpr/mpr_mapping.c
1582
u32 search_idx, map_idx;
sys/dev/mpr/mpr_mapping.c
1583
u32 entry;
sys/dev/mpr/mpr_mapping.c
1839
u32 search_idx, map_idx;
sys/dev/mpr/mpr_mapping.c
1840
u32 entry;
sys/dev/mpr/mpr_mapping.c
2214
u32 map_idx, dev_idx, start_idx, end_idx;
sys/dev/mpr/mpr_mapping.c
2221
u32 phy_bits = 0;
sys/dev/mpr/mpr_mapping.c
2406
u32 i;
sys/dev/mpr/mpr_mapping.c
2411
u32 start_idx = 0, end_idx = 0;
sys/dev/mpr/mpr_mapping.c
243
_mapping_get_ir_maprange(struct mpr_softc *sc, u32 *start_idx, u32 *end_idx)
sys/dev/mpr/mpr_mapping.c
2670
u32 map_idx;
sys/dev/mpr/mpr_mapping.c
2709
u32 start_idx, end_idx, map_idx;
sys/dev/mpr/mpr_mapping.c
2755
u32 saved_phy_bits;
sys/dev/mpr/mpr_mapping.c
3034
u32 map_idx, flags;
sys/dev/mpr/mpr_mapping.c
342
static u32
sys/dev/mpr/mpr_mapping.c
345
u32 map_idx, high_idx = MPR_MAPTABLE_BAD_IDX;
sys/dev/mpr/mpr_mapping.c
347
u32 start_idx, end_idx, start_idx_ir, end_idx_ir;
sys/dev/mpr/mpr_mapping.c
381
static u32
sys/dev/mpr/mpr_mapping.c
384
u32 start_idx, end_idx, map_idx;
sys/dev/mpr/mpr_mapping.c
403
static u32
sys/dev/mpr/mpr_mapping.c
406
u32 map_idx;
sys/dev/mpr/mpr_mapping.c
424
static u32
sys/dev/mpr/mpr_mapping.c
427
u32 start_idx, end_idx, map_idx;
sys/dev/mpr/mpr_mapping.c
446
static u32
sys/dev/mpr/mpr_mapping.c
449
u32 map_idx;
sys/dev/mpr/mpr_mapping.c
469
static u32
sys/dev/mpr/mpr_mapping.c
473
u32 start_idx, end_idx, map_idx;
sys/dev/mpr/mpr_mapping.c
474
u32 high_idx = MPR_MAPTABLE_BAD_IDX;
sys/dev/mpr/mpr_mapping.c
512
static u32
sys/dev/mpr/mpr_mapping.c
513
_mapping_get_free_mt_idx(struct mpr_softc *sc, u32 start_idx)
sys/dev/mpr/mpr_mapping.c
515
u32 map_idx, max_idx = sc->max_devices;
sys/dev/mpr/mpr_mapping.c
541
_mapping_get_dpm_idx_from_id(struct mpr_softc *sc, u64 id, u32 phy_bits)
sys/dev/mpr/mpr_mapping.c
568
static u32
sys/dev/mpr/mpr_mapping.c
576
u32 map_idx;
sys/dev/mpr/mpr_mapping.c
646
_mapping_update_ir_missing_cnt(struct mpr_softc *sc, u32 map_idx,
sys/dev/mpr/mpr_mapping.c
760
u32 i;
sys/dev/mpr/mpr_mapping.c
802
_mapping_inc_missing_count(struct mpr_softc *sc, u32 map_idx)
sys/dev/mpr/mpr_mapping.c
861
u32 map_idx;
sys/dev/mpr/mpr_mapping.c
891
u32 map_idx;
sys/dev/mpr/mpr_mapping.c
915
static u32
sys/dev/mpr/mpr_mapping.c
920
u32 skip_count, end_of_table, map_idx, enc_idx;
sys/dev/mpr/mpr_mapping.c
922
u32 start_idx = MPR_MAPTABLE_BAD_IDX;
sys/dev/mpr/mpr_mapping.h
119
u64 *sas_address, u16 handle, u32 device_info, u8 *is_SATA_SSD);
sys/dev/mpr/mpr_sas.c
2168
u32 response_info;
sys/dev/mpr/mpr_sas.c
2176
u32 log_info = le32toh(mpi_reply->IOCLogInfo);
sys/dev/mpr/mpr_sas_lsi.c
1037
u64 *sas_address, u16 handle, u32 device_info, u8 *is_SATA_SSD)
sys/dev/mpr/mpr_sas_lsi.c
1041
u32 *bufferptr;
sys/dev/mpr/mpr_sas_lsi.c
1045
u32 ioc_status;
sys/dev/mpr/mpr_sas_lsi.c
1098
bufferptr = (u32 *)buffer;
sys/dev/mpr/mpr_sas_lsi.c
113
static u32 event_count;
sys/dev/mpr/mpr_sas_lsi.c
1132
Mpi2SataPassthroughReply_t *mpi_reply, char *id_buffer, int sz, u32 devinfo)
sys/dev/mpr/mpr_sas_lsi.c
123
u32 devinfo);
sys/dev/mpr/mpr_sas_lsi.c
1264
u32 device_info, parent_devinfo = 0;
sys/dev/mpr/mpr_sas_lsi.c
127
u64 *sas_address, u16 handle, u32 device_info, u8 *is_SATA_SSD);
sys/dev/mpr/mpr_sas_lsi.c
1593
u32 start_idx, end_idx;
sys/dev/mpr/mpr_sas_lsi.c
487
u32 state;
sys/dev/mpr/mpr_sas_lsi.c
824
u32 device_info, parent_devinfo = 0;
sys/dev/mpr/mpr_sas_lsi.c
96
u32 high;
sys/dev/mpr/mpr_sas_lsi.c
97
u32 low;
sys/dev/mpr/mprvar.h
149
u32 device_info;
sys/dev/mpr/mprvar.h
150
u32 phy_bits;
sys/dev/mpr/mprvar.h
177
u32 start_index;
sys/dev/mpr/mprvar.h
178
u32 phy_bits;
sys/dev/mpr/mprvar.h
853
*mpi_reply, Mpi2RaidVolPage0_t *config_page, u32 page_address);
sys/dev/mpr/mprvar.h
859
Mpi2SasDevicePage0_t *, u32 , u16 );
sys/dev/mpr/mprvar.h
861
*mpi_reply, Mpi26PCIeDevicePage0_t *config_page, u32 form, u16 handle);
sys/dev/mpr/mprvar.h
863
*mpi_reply, Mpi26PCIeDevicePage2_t *config_page, u32 form, u16 handle);
sys/dev/mpr/mprvar.h
867
Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form,
sys/dev/mpr/mprvar.h
873
u32 page_address);
sys/dev/mps/mps.c
129
u32 low;
sys/dev/mps/mps.c
130
u32 high;
sys/dev/mps/mps.c
2150
u32 events[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
sys/dev/mps/mps.c
2266
mps_sas_log_info(struct mps_softc *sc , u32 log_info)
sys/dev/mps/mps.c
2269
u32 loginfo;
sys/dev/mps/mps.c
2271
u32 subcode:16;
sys/dev/mps/mps.c
2272
u32 code:8;
sys/dev/mps/mps.c
2273
u32 originator:4;
sys/dev/mps/mps.c
2274
u32 bus_type:4;
sys/dev/mps/mps.c
2581
mps_register_events(struct mps_softc *sc, u32 *mask,
sys/dev/mps/mps.c
2600
u32 *mask)
sys/dev/mps/mps.c
2610
bcopy(mask, &handle->mask[0], sizeof(u32) *
sys/dev/mps/mps.c
2629
bcopy(fullmask, &evtreq->EventMasks[0], sizeof(u32) *
sys/dev/mps/mps.c
2687
bcopy(fullmask, &evtreq->EventMasks[0], sizeof(u32) *
sys/dev/mps/mps.c
907
u32 cntdn, count;
sys/dev/mps/mps.c
908
u32 int_status;
sys/dev/mps/mps.c
909
u32 doorbell;
sys/dev/mps/mps_config.c
1107
*mpi_reply, Mpi2RaidVolPage0_t *config_page, u32 page_address)
sys/dev/mps/mps_config.c
1238
*mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form, u16 handle)
sys/dev/mps/mps_config.c
1397
Mpi2RaidPhysDiskPage0_t *config_page, u32 page_address)
sys/dev/mps/mps_config.c
504
raid_vol_pg0, (u32)raid_vol_pg0->DevHandle)) {
sys/dev/mps/mps_config.c
840
*mpi_reply, Mpi2SasDevicePage0_t *config_page, u32 form, u16 handle)
sys/dev/mps/mps_mapping.c
1110
u32 map_idx, index, device_info;
sys/dev/mps/mps_mapping.c
1281
u32 start_idx = et_entry->start_index;
sys/dev/mps/mps_mapping.c
1303
u32 remove_idx;
sys/dev/mps/mps_mapping.c
1392
u32 search_idx, map_idx;
sys/dev/mps/mps_mapping.c
1393
u32 entry;
sys/dev/mps/mps_mapping.c
1765
u32 map_idx, dev_idx, start_idx, end_idx;
sys/dev/mps/mps_mapping.c
1772
u32 phy_bits = 0;
sys/dev/mps/mps_mapping.c
1937
u32 i;
sys/dev/mps/mps_mapping.c
1942
u32 start_idx = 0, end_idx = 0;
sys/dev/mps/mps_mapping.c
2200
u32 map_idx;
sys/dev/mps/mps_mapping.c
2239
u32 start_idx, end_idx, map_idx;
sys/dev/mps/mps_mapping.c
2285
u32 saved_phy_bits;
sys/dev/mps/mps_mapping.c
244
_mapping_get_ir_maprange(struct mps_softc *sc, u32 *start_idx, u32 *end_idx)
sys/dev/mps/mps_mapping.c
2496
u32 map_idx, flags;
sys/dev/mps/mps_mapping.c
343
static u32
sys/dev/mps/mps_mapping.c
346
u32 map_idx, high_idx = MPS_MAPTABLE_BAD_IDX;
sys/dev/mps/mps_mapping.c
348
u32 start_idx, end_idx, start_idx_ir, end_idx_ir;
sys/dev/mps/mps_mapping.c
382
static u32
sys/dev/mps/mps_mapping.c
385
u32 start_idx, end_idx, map_idx;
sys/dev/mps/mps_mapping.c
404
static u32
sys/dev/mps/mps_mapping.c
407
u32 map_idx;
sys/dev/mps/mps_mapping.c
425
static u32
sys/dev/mps/mps_mapping.c
428
u32 start_idx, end_idx, map_idx;
sys/dev/mps/mps_mapping.c
447
static u32
sys/dev/mps/mps_mapping.c
450
u32 map_idx;
sys/dev/mps/mps_mapping.c
470
static u32
sys/dev/mps/mps_mapping.c
474
u32 start_idx, end_idx, map_idx;
sys/dev/mps/mps_mapping.c
475
u32 high_idx = MPS_MAPTABLE_BAD_IDX;
sys/dev/mps/mps_mapping.c
514
static u32
sys/dev/mps/mps_mapping.c
515
_mapping_get_free_mt_idx(struct mps_softc *sc, u32 start_idx)
sys/dev/mps/mps_mapping.c
517
u32 map_idx, max_idx = sc->max_devices;
sys/dev/mps/mps_mapping.c
543
_mapping_get_dpm_idx_from_id(struct mps_softc *sc, u64 id, u32 phy_bits)
sys/dev/mps/mps_mapping.c
570
static u32
sys/dev/mps/mps_mapping.c
578
u32 map_idx;
sys/dev/mps/mps_mapping.c
648
_mapping_update_ir_missing_cnt(struct mps_softc *sc, u32 map_idx,
sys/dev/mps/mps_mapping.c
763
u32 i;
sys/dev/mps/mps_mapping.c
812
u32 map_idx;
sys/dev/mps/mps_mapping.c
877
static u32
sys/dev/mps/mps_mapping.c
882
u32 skip_count, end_of_table, map_idx, enc_idx;
sys/dev/mps/mps_mapping.c
884
u32 start_idx = MPS_MAPTABLE_BAD_IDX;
sys/dev/mps/mps_mapping.h
72
u64 *sas_address, u16 handle, u32 device_info, u8 *is_SATA_SSD);
sys/dev/mps/mps_sas.c
1911
u32 response_info;
sys/dev/mps/mps_sas.c
1917
u32 log_info = le32toh(mpi_reply->IOCLogInfo);
sys/dev/mps/mps_sas.c
678
u32 events[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
sys/dev/mps/mps_sas_lsi.c
113
static u32 event_count;
sys/dev/mps/mps_sas_lsi.c
121
u32 devinfo);
sys/dev/mps/mps_sas_lsi.c
1228
u32 start_idx, end_idx;
sys/dev/mps/mps_sas_lsi.c
125
u64 *sas_address, u16 handle, u32 device_info, u8 *is_SATA_SSD);
sys/dev/mps/mps_sas_lsi.c
411
u32 state;
sys/dev/mps/mps_sas_lsi.c
619
u32 device_info, parent_devinfo = 0;
sys/dev/mps/mps_sas_lsi.c
812
u64 *sas_address, u16 handle, u32 device_info, u8 *is_SATA_SSD)
sys/dev/mps/mps_sas_lsi.c
816
u32 *bufferptr;
sys/dev/mps/mps_sas_lsi.c
820
u32 ioc_status;
sys/dev/mps/mps_sas_lsi.c
873
bufferptr = (u32 *)buffer;
sys/dev/mps/mps_sas_lsi.c
907
Mpi2SataPassthroughReply_t *mpi_reply, char *id_buffer, int sz, u32 devinfo)
sys/dev/mps/mps_sas_lsi.c
96
u32 high;
sys/dev/mps/mps_sas_lsi.c
97
u32 low;
sys/dev/mps/mpsvar.h
121
u32 device_info;
sys/dev/mps/mpsvar.h
122
u32 phy_bits;
sys/dev/mps/mpsvar.h
149
u32 start_index;
sys/dev/mps/mpsvar.h
150
u32 phy_bits;
sys/dev/mps/mpsvar.h
267
u32 mask[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
sys/dev/mps/mpsvar.h
363
u32 event_mask[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
sys/dev/mps/mpsvar.h
744
int mps_register_events(struct mps_softc *, u32 *, mps_evt_callback_t *,
sys/dev/mps/mpsvar.h
747
int mps_update_events(struct mps_softc *, struct mps_event_handle *, u32 *);
sys/dev/mps/mpsvar.h
770
*mpi_reply, Mpi2RaidVolPage0_t *config_page, u32 page_address);
sys/dev/mps/mpsvar.h
775
Mpi2SasDevicePage0_t *, u32 , u16 );
sys/dev/mps/mpsvar.h
779
Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form,
sys/dev/mps/mpsvar.h
785
u32 page_address);
sys/dev/mthca/mthca_allocator.c
40
u32 mthca_alloc(struct mthca_alloc *alloc)
sys/dev/mthca/mthca_allocator.c
43
u32 obj;
sys/dev/mthca/mthca_allocator.c
64
void mthca_free(struct mthca_alloc *alloc, u32 obj)
sys/dev/mthca/mthca_allocator.c
79
int mthca_alloc_init(struct mthca_alloc *alloc, u32 num, u32 mask,
sys/dev/mthca/mthca_allocator.c
80
u32 reserved)
sys/dev/mthca/mthca_av.c
158
u32 index = -1;
sys/dev/mthca/mthca_cmd.c
1264
((u32 *) board_id)[i] =
sys/dev/mthca/mthca_cmd.c
1265
swab32(*(u32 *) (vsd + VSD_OFFSET_MLX_BOARD_ID + i * 4));
sys/dev/mthca/mthca_cmd.c
1273
u32 *outbox;
sys/dev/mthca/mthca_cmd.c
1442
u32 *inbox;
sys/dev/mthca/mthca_cmd.c
1444
u32 flags;
sys/dev/mthca/mthca_cmd.c
1503
u32 *inbox;
sys/dev/mthca/mthca_cmd.c
1505
u32 flags = 0;
sys/dev/mthca/mthca_cmd.c
1566
int mthca_UNMAP_ICM(struct mthca_dev *dev, u64 virt, u32 page_count)
sys/dev/mthca/mthca_cmd.c
1672
int mthca_RESIZE_CQ(struct mthca_dev *dev, int cq_num, u32 lkey, u8 log_size)
sys/dev/mthca/mthca_cmd.c
1717
int mthca_QUERY_SRQ(struct mthca_dev *dev, u32 num,
sys/dev/mthca/mthca_cmd.c
1731
enum ib_qp_state next, u32 num, int is_ee,
sys/dev/mthca/mthca_cmd.c
1732
struct mthca_mailbox *mailbox, u32 optmask)
sys/dev/mthca/mthca_cmd.c
1833
int mthca_QUERY_QP(struct mthca_dev *dev, u32 num, int is_ee,
sys/dev/mthca/mthca_cmd.c
1840
int mthca_CONF_SPECIAL_QP(struct mthca_dev *dev, int type, u32 qpn)
sys/dev/mthca/mthca_cmd.c
1872
u32 in_modifier = port;
sys/dev/mthca/mthca_cmd.c
200
u32 in_modifier,
sys/dev/mthca/mthca_cmd.c
208
__raw_writel((__force u32) cpu_to_be32(in_param >> 32), ptr + offs[0]);
sys/dev/mthca/mthca_cmd.c
210
__raw_writel((__force u32) cpu_to_be32(in_param & 0xfffffffful), ptr + offs[1]);
sys/dev/mthca/mthca_cmd.c
212
__raw_writel((__force u32) cpu_to_be32(in_modifier), ptr + offs[2]);
sys/dev/mthca/mthca_cmd.c
214
__raw_writel((__force u32) cpu_to_be32(out_param >> 32), ptr + offs[3]);
sys/dev/mthca/mthca_cmd.c
216
__raw_writel((__force u32) cpu_to_be32(out_param & 0xfffffffful), ptr + offs[4]);
sys/dev/mthca/mthca_cmd.c
218
__raw_writel((__force u32) cpu_to_be32(token << 16), ptr + offs[5]);
sys/dev/mthca/mthca_cmd.c
220
__raw_writel((__force u32) cpu_to_be32((1 << HCR_GO_BIT) |
sys/dev/mthca/mthca_cmd.c
225
__raw_writel((__force u32) 0, ptr + offs[7]);
sys/dev/mthca/mthca_cmd.c
232
u32 in_modifier,
sys/dev/mthca/mthca_cmd.c
256
__raw_writel((__force u32) cpu_to_be32(in_param >> 32), dev->hcr + 0 * 4);
sys/dev/mthca/mthca_cmd.c
257
__raw_writel((__force u32) cpu_to_be32(in_param & 0xfffffffful), dev->hcr + 1 * 4);
sys/dev/mthca/mthca_cmd.c
258
__raw_writel((__force u32) cpu_to_be32(in_modifier), dev->hcr + 2 * 4);
sys/dev/mthca/mthca_cmd.c
259
__raw_writel((__force u32) cpu_to_be32(out_param >> 32), dev->hcr + 3 * 4);
sys/dev/mthca/mthca_cmd.c
260
__raw_writel((__force u32) cpu_to_be32(out_param & 0xfffffffful), dev->hcr + 4 * 4);
sys/dev/mthca/mthca_cmd.c
261
__raw_writel((__force u32) cpu_to_be32(token << 16), dev->hcr + 5 * 4);
sys/dev/mthca/mthca_cmd.c
266
__raw_writel((__force u32) cpu_to_be32((1 << HCR_GO_BIT) |
sys/dev/mthca/mthca_cmd.c
277
u32 in_modifier,
sys/dev/mthca/mthca_cmd.c
338
u32 in_modifier,
sys/dev/mthca/mthca_cmd.c
409
u32 in_modifier,
sys/dev/mthca/mthca_cmd.c
467
u32 in_modifier,
sys/dev/mthca/mthca_cmd.c
485
u32 in_modifier,
sys/dev/mthca/mthca_cmd.c
502
u32 in_modifier,
sys/dev/mthca/mthca_cmd.c
768
dev->cmd.dbell_map = ioremap(addr, max_off + sizeof(u32));
sys/dev/mthca/mthca_cmd.c
779
u32 *outbox;
sys/dev/mthca/mthca_cmd.c
781
u32 tmp;
sys/dev/mthca/mthca_cmd.c
888
u32 *outbox;
sys/dev/mthca/mthca_cmd.c
943
u32 *outbox;
sys/dev/mthca/mthca_cmd.c
993
u32 *outbox;
sys/dev/mthca/mthca_cmd.h
150
u32 flags;
sys/dev/mthca/mthca_cmd.h
180
u32 reserved_lkey;
sys/dev/mthca/mthca_cmd.h
188
u32 vendor_id;
sys/dev/mthca/mthca_cmd.h
189
u32 device_id;
sys/dev/mthca/mthca_cmd.h
190
u32 revision_id;
sys/dev/mthca/mthca_cmd.h
241
u32 cap_mask;
sys/dev/mthca/mthca_cmd.h
279
int mthca_UNMAP_ICM(struct mthca_dev *dev, u64 virt, u32 page_count);
sys/dev/mthca/mthca_cmd.h
300
int mthca_RESIZE_CQ(struct mthca_dev *dev, int cq_num, u32 lkey, u8 log_size);
sys/dev/mthca/mthca_cmd.h
305
int mthca_QUERY_SRQ(struct mthca_dev *dev, u32 num,
sys/dev/mthca/mthca_cmd.h
309
enum ib_qp_state next, u32 num, int is_ee,
sys/dev/mthca/mthca_cmd.h
310
struct mthca_mailbox *mailbox, u32 optmask);
sys/dev/mthca/mthca_cmd.h
311
int mthca_QUERY_QP(struct mthca_dev *dev, u32 num, int is_ee,
sys/dev/mthca/mthca_cmd.h
313
int mthca_CONF_SPECIAL_QP(struct mthca_dev *dev, int type, u32 qpn);
sys/dev/mthca/mthca_cq.c
135
u32 reserved1[3];
sys/dev/mthca/mthca_cq.c
139
u32 reserved2;
sys/dev/mthca/mthca_cq.c
222
void mthca_cq_completion(struct mthca_dev *dev, u32 cqn)
sys/dev/mthca/mthca_cq.c
238
void mthca_cq_event(struct mthca_dev *dev, u32 cqn,
sys/dev/mthca/mthca_cq.c
278
void mthca_cq_clean(struct mthca_dev *dev, struct mthca_cq *cq, u32 qpn,
sys/dev/mthca/mthca_cq.c
282
u32 prod_index;
sys/dev/mthca/mthca_cq.c
546
u32 wqe = be32_to_cpu(cqe->wqe);
sys/dev/mthca/mthca_cq.c
730
u32 dbhi = ((flags & IB_CQ_SOLICITED_MASK) == IB_CQ_SOLICITED ?
sys/dev/mthca/mthca_cq.c
745
u32 dbhi;
sys/dev/mthca/mthca_cq.c
746
u32 sn = cq->arm_sn & 3;
sys/dev/mthca/mthca_cq.c
774
struct mthca_ucontext *ctx, u32 pdn,
sys/dev/mthca/mthca_cq.c
79
u32 reserved;
sys/dev/mthca/mthca_dev.h
132
u32 flags;
sys/dev/mthca/mthca_dev.h
174
u32 page_size_cap;
sys/dev/mthca/mthca_dev.h
175
u32 flags;
sys/dev/mthca/mthca_dev.h
181
u32 last;
sys/dev/mthca/mthca_dev.h
182
u32 top;
sys/dev/mthca/mthca_dev.h
183
u32 max;
sys/dev/mthca/mthca_dev.h
184
u32 mask;
sys/dev/mthca/mthca_dev.h
231
u32 clr_mask;
sys/dev/mthca/mthca_dev.h
232
u32 arm_mask;
sys/dev/mthca/mthca_dev.h
257
u32 rdb_base;
sys/dev/mthca/mthca_dev.h
283
u32 __iomem *map;
sys/dev/mthca/mthca_dev.h
284
u32 size;
sys/dev/mthca/mthca_dev.h
299
u32 rev_id;
sys/dev/mthca/mthca_dev.h
416
u32 mthca_alloc(struct mthca_alloc *alloc);
sys/dev/mthca/mthca_dev.h
417
void mthca_free(struct mthca_alloc *alloc, u32 obj);
sys/dev/mthca/mthca_dev.h
418
int mthca_alloc_init(struct mthca_alloc *alloc, u32 num, u32 mask,
sys/dev/mthca/mthca_dev.h
419
u32 reserved);
sys/dev/mthca/mthca_dev.h
473
int mthca_mr_alloc(struct mthca_dev *dev, u32 pd, int buffer_size_shift,
sys/dev/mthca/mthca_dev.h
474
u64 iova, u64 total_size, u32 access, struct mthca_mr *mr);
sys/dev/mthca/mthca_dev.h
475
int mthca_mr_alloc_notrans(struct mthca_dev *dev, u32 pd,
sys/dev/mthca/mthca_dev.h
476
u32 access, struct mthca_mr *mr);
sys/dev/mthca/mthca_dev.h
477
int mthca_mr_alloc_phys(struct mthca_dev *dev, u32 pd,
sys/dev/mthca/mthca_dev.h
480
u32 access, struct mthca_mr *mr);
sys/dev/mthca/mthca_dev.h
483
int mthca_fmr_alloc(struct mthca_dev *dev, u32 pd,
sys/dev/mthca/mthca_dev.h
484
u32 access, struct mthca_fmr *fmr);
sys/dev/mthca/mthca_dev.h
501
struct mthca_ucontext *ctx, u32 pdn,
sys/dev/mthca/mthca_dev.h
505
void mthca_cq_completion(struct mthca_dev *dev, u32 cqn);
sys/dev/mthca/mthca_dev.h
506
void mthca_cq_event(struct mthca_dev *dev, u32 cqn,
sys/dev/mthca/mthca_dev.h
508
void mthca_cq_clean(struct mthca_dev *dev, struct mthca_cq *cq, u32 qpn,
sys/dev/mthca/mthca_dev.h
522
void mthca_srq_event(struct mthca_dev *dev, u32 srqn,
sys/dev/mthca/mthca_dev.h
524
void mthca_free_srq_wqe(struct mthca_srq *srq, u32 wqe_addr);
sys/dev/mthca/mthca_dev.h
530
void mthca_qp_event(struct mthca_dev *dev, u32 qpn,
sys/dev/mthca/mthca_doorbell.h
59
static inline void mthca_write64(u32 hi, u32 lo, void __iomem *dest,
sys/dev/mthca/mthca_doorbell.h
84
__raw_writel(((__force u32 *) &val)[0], dest);
sys/dev/mthca/mthca_doorbell.h
85
__raw_writel(((__force u32 *) &val)[1], dest + 4);
sys/dev/mthca/mthca_doorbell.h
88
static inline void mthca_write64(u32 hi, u32 lo, void __iomem *dest,
sys/dev/mthca/mthca_doorbell.h
93
hi = (__force u32) cpu_to_be32(hi);
sys/dev/mthca/mthca_doorbell.h
94
lo = (__force u32) cpu_to_be32(lo);
sys/dev/mthca/mthca_eq.c
130
u32 raw[6];
sys/dev/mthca/mthca_eq.c
137
u32 reserved2;
sys/dev/mthca/mthca_eq.c
150
u32 reserved1;
sys/dev/mthca/mthca_eq.c
155
u32 reserved1[2];
sys/dev/mthca/mthca_eq.c
173
static inline void tavor_set_eq_ci(struct mthca_dev *dev, struct mthca_eq *eq, u32 ci)
sys/dev/mthca/mthca_eq.c
189
static inline void arbel_set_eq_ci(struct mthca_dev *dev, struct mthca_eq *eq, u32 ci)
sys/dev/mthca/mthca_eq.c
193
__raw_writel((__force u32) cpu_to_be32(ci),
sys/dev/mthca/mthca_eq.c
199
static inline void set_eq_ci(struct mthca_dev *dev, struct mthca_eq *eq, u32 ci)
sys/dev/mthca/mthca_eq.c
214
static inline void arbel_eq_req_not(struct mthca_dev *dev, u32 eqn_mask)
sys/dev/mthca/mthca_eq.c
228
static inline struct mthca_eqe *get_eqe(struct mthca_eq *eq, u32 entry)
sys/dev/mthca/mthca_eq.c
394
u32 ecr;
sys/dev/mthca/mthca_eq.c
62
u32 reserved2[2];
sys/dev/mthca/mthca_eq.c
65
u32 reserved3[4];
sys/dev/mthca/mthca_main.c
236
mdev->limits.page_size_cap = ~(u32) (dev_lim->min_page_sz - 1);
sys/dev/mthca/mthca_main.c
885
u32 flags;
sys/dev/mthca/mthca_mcg.c
41
u32 reserved[3];
sys/dev/mthca/mthca_memfree.c
565
u32 qn, __be32 **db)
sys/dev/mthca/mthca_memfree.h
174
u32 qn, __be32 **db);
sys/dev/mthca/mthca_mr.c
121
static void mthca_buddy_free(struct mthca_buddy *buddy, u32 seg, int order)
sys/dev/mthca/mthca_mr.c
190
static u32 mthca_alloc_mtt_range(struct mthca_dev *dev, int order,
sys/dev/mthca/mthca_mr.c
193
u32 seg = mthca_buddy_alloc(buddy, order);
sys/dev/mthca/mthca_mr.c
385
static inline u32 tavor_hw_index_to_key(u32 ind)
sys/dev/mthca/mthca_mr.c
390
static inline u32 tavor_key_to_hw_index(u32 key)
sys/dev/mthca/mthca_mr.c
395
static inline u32 arbel_hw_index_to_key(u32 ind)
sys/dev/mthca/mthca_mr.c
400
static inline u32 arbel_key_to_hw_index(u32 key)
sys/dev/mthca/mthca_mr.c
405
static inline u32 hw_index_to_key(struct mthca_dev *dev, u32 ind)
sys/dev/mthca/mthca_mr.c
413
static inline u32 key_to_hw_index(struct mthca_dev *dev, u32 key)
sys/dev/mthca/mthca_mr.c
421
static inline u32 adjust_key(struct mthca_dev *dev, u32 key)
sys/dev/mthca/mthca_mr.c
429
int mthca_mr_alloc(struct mthca_dev *dev, u32 pd, int buffer_size_shift,
sys/dev/mthca/mthca_mr.c
430
u64 iova, u64 total_size, u32 access, struct mthca_mr *mr)
sys/dev/mthca/mthca_mr.c
434
u32 key;
sys/dev/mthca/mthca_mr.c
44
u32 first_seg;
sys/dev/mthca/mthca_mr.c
512
int mthca_mr_alloc_notrans(struct mthca_dev *dev, u32 pd,
sys/dev/mthca/mthca_mr.c
513
u32 access, struct mthca_mr *mr)
sys/dev/mthca/mthca_mr.c
519
int mthca_mr_alloc_phys(struct mthca_dev *dev, u32 pd,
sys/dev/mthca/mthca_mr.c
522
u32 access, struct mthca_mr *mr)
sys/dev/mthca/mthca_mr.c
545
static void mthca_free_region(struct mthca_dev *dev, u32 lkey)
sys/dev/mthca/mthca_mr.c
567
int mthca_fmr_alloc(struct mthca_dev *dev, u32 pd,
sys/dev/mthca/mthca_mr.c
568
u32 access, struct mthca_fmr *mr)
sys/dev/mthca/mthca_mr.c
573
u32 key, idx;
sys/dev/mthca/mthca_mr.c
62
u32 reserved[2];
sys/dev/mthca/mthca_mr.c
722
u32 key;
sys/dev/mthca/mthca_mr.c
747
__raw_writel((__force u32) mpt_entry.lkey, &fmr->mem.tavor.mpt->key);
sys/dev/mthca/mthca_mr.c
762
u32 key;
sys/dev/mthca/mthca_mr.c
84
static u32 mthca_buddy_alloc(struct mthca_buddy *buddy, int order)
sys/dev/mthca/mthca_mr.c
88
u32 seg;
sys/dev/mthca/mthca_profile.c
210
dev->qp_table.rdb_base = (u32) profile[i].start;
sys/dev/mthca/mthca_provider.c
390
struct ib_ah_attr *init_attr, u32 flags,
sys/dev/mthca/mthca_provider.c
400
static void mthca_ah_destroy(struct ib_ah *ah, u32 flags)
sys/dev/mthca/mthca_provider.c
725
u32 lkey;
sys/dev/mthca/mthca_provider.c
817
static inline u32 convert_access(int acc)
sys/dev/mthca/mthca_provider.h
101
u32 pd_num;
sys/dev/mthca/mthca_provider.h
110
u32 eqn_mask;
sys/dev/mthca/mthca_provider.h
111
u32 cons_index;
sys/dev/mthca/mthca_provider.h
132
u32 key;
sys/dev/mthca/mthca_provider.h
208
u32 cons_index;
sys/dev/mthca/mthca_provider.h
266
u32 qpn;
sys/dev/mthca/mthca_provider.h
293
u32 qkey;
sys/dev/mthca/mthca_provider.h
294
u32 send_psn;
sys/dev/mthca/mthca_qp.c
130
u32 reserved1[2];
sys/dev/mthca/mthca_qp.c
1359
u32 mqpn = qpn * 2 + dev->qp_table.sqp_start + port - 1;
sys/dev/mthca/mthca_qp.c
156
u32 reserved3[18];
sys/dev/mthca/mthca_qp.c
1570
u64 remote_addr, u32 rkey)
sys/dev/mthca/mthca_qp.c
161
u32 reserved1;
sys/dev/mthca/mthca_qp.c
1628
u32 uninitialized_var(f0);
sys/dev/mthca/mthca_qp.c
163
u32 reserved2[62];
sys/dev/mthca/mthca_qp.c
1752
((u32 *) wqe)[1] = 0;
sys/dev/mthca/mthca_qp.c
1927
u32 dbhi;
sys/dev/mthca/mthca_qp.c
1943
u32 uninitialized_var(f0);
sys/dev/mthca/mthca_qp.c
2093
((u32 *) wqe)[1] = 0;
sys/dev/mthca/mthca_qp.c
238
void mthca_qp_event(struct mthca_dev *dev, u32 qpn,
sys/dev/mthca/mthca_qp.c
332
u32 access_flags;
sys/dev/mthca/mthca_qp.c
333
u32 hw_access_flags = 0;
sys/dev/mthca/mthca_qp.c
557
u32 sqd_event = 0;
sys/dev/mthca/mthca_reset.c
178
u32 v;
sys/dev/mthca/mthca_reset.c
45
u32 *hca_header = NULL;
sys/dev/mthca/mthca_reset.c
47
u32 *bridge_header = NULL;
sys/dev/mthca/mthca_srq.c
378
u32 max_wr = mthca_is_memfree(dev) ? srq->max - 1 : srq->max;
sys/dev/mthca/mthca_srq.c
424
void mthca_srq_event(struct mthca_dev *dev, u32 srqn,
sys/dev/mthca/mthca_srq.c
459
void mthca_free_srq_wqe(struct mthca_srq *srq, u32 wqe_addr)
sys/dev/mthca/mthca_srq.c
57
u32 reserved[2];
sys/dev/mthca/mthca_srq.c
71
u32 reserved2[3];
sys/dev/mthca/mthca_wqe.h
65
u32 reserved1;
sys/dev/mthca/mthca_wqe.h
68
u32 reserved2[4];
sys/dev/mthca/mthca_wqe.h
71
u32 reserved3[2];
sys/dev/mthca/mthca_wqe.h
78
u32 reserved[2];
sys/dev/mthca/mthca_wqe.h
83
u32 reserved;
sys/dev/mthca/mthca_wqe.h
93
u32 reserved;
sys/dev/nvmf/controller/nvmft_controller.c
884
rsp.value.u32.low = ctrlr->cdata.ver;
sys/dev/nvmf/controller/nvmft_controller.c
889
rsp.value.u32.low = htole32(ctrlr->cc);
sys/dev/nvmf/controller/nvmft_controller.c
894
rsp.value.u32.low = htole32(ctrlr->csts);
sys/dev/nvmf/controller/nvmft_controller.c
917
if (!update_cc(ctrlr, le32toh(pset->value.u32.low),
sys/dev/nvmf/host/nvmf.c
108
*value = le32toh(rsp->value.u32.low);
sys/dev/nvmf/host/nvmf_cmd.c
57
cmd.value.u32.low = htole32(value);
sys/dev/nvmf/nvmf_proto.h
319
} u32;
sys/dev/nvmf/nvmf_proto.h
347
} u32;
sys/dev/pms/freebsd/driver/common/lxencrypt.c
802
u32 reg_val = 0, new_cipher_mode = 0;
sys/dev/pms/freebsd/driver/ini/src/agtiapi.h
122
u32 reqType;
sys/dev/pms/freebsd/driver/ini/src/agtiapi.h
123
u32 queueId;
sys/dev/qat/include/adf_dev_err.h
75
u32 slice_hang_offset);
sys/dev/qat/include/adf_fw_counters.h
36
u32 *ras_event,
sys/dev/qat/include/adf_gen4vf_hw_csr_data.h
52
u32 _bank = bank; \
sys/dev/qat/include/adf_gen4vf_hw_csr_data.h
53
u32 _ring = ring; \
sys/dev/qat/include/adf_gen4vf_hw_csr_data.h
55
u32 l_base = 0, u_base = 0; \
sys/dev/qat/include/adf_gen4vf_hw_csr_data.h
56
l_base = (u32)((_value)&0xFFFFFFFF); \
sys/dev/qat/include/adf_gen4vf_hw_csr_data.h
57
u_base = (u32)(((_value)&0xFFFFFFFF00000000ULL) >> 32); \
sys/dev/qat/include/adf_gen4vf_hw_csr_data.h
71
read_base_gen4vf(struct resource *csr_base_addr, u32 bank, u32 ring)
sys/dev/qat/include/adf_gen4vf_hw_csr_data.h
73
u32 l_base, u_base;
sys/dev/qat/include/common/adf_accel_devices.h
124
u32 num_entries;
sys/dev/qat/include/common/adf_accel_devices.h
187
u32 num_asym_thd;
sys/dev/qat/include/common/adf_accel_devices.h
188
u32 num_sym_thd;
sys/dev/qat/include/common/adf_accel_devices.h
189
u32 num_dc_thd;
sys/dev/qat/include/common/adf_accel_devices.h
194
u32 accel_mask;
sys/dev/qat/include/common/adf_accel_devices.h
197
u32 num_ae;
sys/dev/qat/include/common/adf_accel_devices.h
202
u32 inline_ingress_msk;
sys/dev/qat/include/common/adf_accel_devices.h
203
u32 inline_egress_msk;
sys/dev/qat/include/common/adf_accel_devices.h
204
u32 sym_ae_msk;
sys/dev/qat/include/common/adf_accel_devices.h
205
u32 asym_ae_msk;
sys/dev/qat/include/common/adf_accel_devices.h
206
u32 dc_ae_msk;
sys/dev/qat/include/common/adf_accel_devices.h
217
u32 inline_direction_egress_mask;
sys/dev/qat/include/common/adf_accel_devices.h
219
u32 inline_congest_mngt_profile;
sys/dev/qat/include/common/adf_accel_devices.h
221
u32 cy_ae_mask;
sys/dev/qat/include/common/adf_accel_devices.h
223
u32 dc_ae_mask;
sys/dev/qat/include/common/adf_accel_devices.h
225
u32 num_aram_lw_entries;
sys/dev/qat/include/common/adf_accel_devices.h
227
u32 mmp_region_size;
sys/dev/qat/include/common/adf_accel_devices.h
228
u32 mmp_region_offset;
sys/dev/qat/include/common/adf_accel_devices.h
229
u32 skm_region_size;
sys/dev/qat/include/common/adf_accel_devices.h
230
u32 skm_region_offset;
sys/dev/qat/include/common/adf_accel_devices.h
235
u32 inter_buff_aram_region_size;
sys/dev/qat/include/common/adf_accel_devices.h
236
u32 inter_buff_aram_region_offset;
sys/dev/qat/include/common/adf_accel_devices.h
237
u32 sadb_region_size;
sys/dev/qat/include/common/adf_accel_devices.h
238
u32 sadb_region_offset;
sys/dev/qat/include/common/adf_accel_devices.h
248
u32 arbiter_offset;
sys/dev/qat/include/common/adf_accel_devices.h
249
u32 wrk_thd_2_srv_arb_map;
sys/dev/qat/include/common/adf_accel_devices.h
250
u32 wrk_cfg_offset;
sys/dev/qat/include/common/adf_accel_devices.h
254
u32 admin_msg_ur;
sys/dev/qat/include/common/adf_accel_devices.h
255
u32 admin_msg_lr;
sys/dev/qat/include/common/adf_accel_devices.h
256
u32 mailbox_offset;
sys/dev/qat/include/common/adf_accel_devices.h
260
u64 (*build_csr_ring_base_addr)(bus_addr_t addr, u32 size);
sys/dev/qat/include/common/adf_accel_devices.h
261
u32 (*read_csr_ring_head)(struct resource *csr_base_addr,
sys/dev/qat/include/common/adf_accel_devices.h
262
u32 bank,
sys/dev/qat/include/common/adf_accel_devices.h
263
u32 ring);
sys/dev/qat/include/common/adf_accel_devices.h
265
u32 bank,
sys/dev/qat/include/common/adf_accel_devices.h
266
u32 ring,
sys/dev/qat/include/common/adf_accel_devices.h
267
u32 value);
sys/dev/qat/include/common/adf_accel_devices.h
268
u32 (*read_csr_ring_tail)(struct resource *csr_base_addr,
sys/dev/qat/include/common/adf_accel_devices.h
269
u32 bank,
sys/dev/qat/include/common/adf_accel_devices.h
270
u32 ring);
sys/dev/qat/include/common/adf_accel_devices.h
272
u32 bank,
sys/dev/qat/include/common/adf_accel_devices.h
273
u32 ring,
sys/dev/qat/include/common/adf_accel_devices.h
274
u32 value);
sys/dev/qat/include/common/adf_accel_devices.h
275
u32 (*read_csr_e_stat)(struct resource *csr_base_addr, u32 bank);
sys/dev/qat/include/common/adf_accel_devices.h
277
u32 bank,
sys/dev/qat/include/common/adf_accel_devices.h
278
u32 ring,
sys/dev/qat/include/common/adf_accel_devices.h
279
u32 value);
sys/dev/qat/include/common/adf_accel_devices.h
281
u32 bank,
sys/dev/qat/include/common/adf_accel_devices.h
282
u32 ring);
sys/dev/qat/include/common/adf_accel_devices.h
284
u32 bank,
sys/dev/qat/include/common/adf_accel_devices.h
285
u32 ring,
sys/dev/qat/include/common/adf_accel_devices.h
288
u32 bank,
sys/dev/qat/include/common/adf_accel_devices.h
289
u32 value);
sys/dev/qat/include/common/adf_accel_devices.h
290
void (*write_csr_int_srcsel)(struct resource *csr_base_addr, u32 bank);
sys/dev/qat/include/common/adf_accel_devices.h
292
u32 bank,
sys/dev/qat/include/common/adf_accel_devices.h
293
u32 value);
sys/dev/qat/include/common/adf_accel_devices.h
295
u32 bank,
sys/dev/qat/include/common/adf_accel_devices.h
296
u32 value);
sys/dev/qat/include/common/adf_accel_devices.h
298
u32 bank,
sys/dev/qat/include/common/adf_accel_devices.h
299
u32 value);
sys/dev/qat/include/common/adf_accel_devices.h
300
u32 (*read_csr_ring_srv_arb_en)(struct resource *csr_base_addr,
sys/dev/qat/include/common/adf_accel_devices.h
301
u32 bank);
sys/dev/qat/include/common/adf_accel_devices.h
303
u32 bank,
sys/dev/qat/include/common/adf_accel_devices.h
304
u32 value);
sys/dev/qat/include/common/adf_accel_devices.h
305
u32 (*get_src_sel_mask)(void);
sys/dev/qat/include/common/adf_accel_devices.h
306
u32 (*get_int_col_ctl_enable_mask)(void);
sys/dev/qat/include/common/adf_accel_devices.h
307
u32 (*get_bank_irq_mask)(u32 irq_mask);
sys/dev/qat/include/common/adf_accel_devices.h
317
u32 (*get_pf2vf_offset)(u32 i);
sys/dev/qat/include/common/adf_accel_devices.h
318
u32 (*get_vf2pf_offset)(u32 i);
sys/dev/qat/include/common/adf_accel_devices.h
320
u32 vf_mask);
sys/dev/qat/include/common/adf_accel_devices.h
322
u32 (*disable_pending_vf2pf_interrupts)(struct resource *pmisc_addr);
sys/dev/qat/include/common/adf_accel_devices.h
325
u32 pfvf_offset,
sys/dev/qat/include/common/adf_accel_devices.h
328
u32 pfvf_offset,
sys/dev/qat/include/common/adf_accel_devices.h
335
u32 csr_addr_offset;
sys/dev/qat/include/common/adf_accel_devices.h
336
u32 ring_bundle_size;
sys/dev/qat/include/common/adf_accel_devices.h
337
u32 bank_int_flag_clear_mask;
sys/dev/qat/include/common/adf_accel_devices.h
338
u32 num_rings_per_int_srcsel;
sys/dev/qat/include/common/adf_accel_devices.h
339
u32 arb_enable_mask;
sys/dev/qat/include/common/adf_accel_devices.h
355
void (*get_errsou_offset)(u32 *errsou3, u32 *errsou5);
sys/dev/qat/include/common/adf_accel_devices.h
413
u32 *ras_event,
sys/dev/qat/include/common/adf_accel_devices.h
418
u32 bank_number);
sys/dev/qat/include/common/adf_accel_devices.h
420
u32 bank_number,
sys/dev/qat/include/common/adf_accel_devices.h
442
u32 aerucm_mask;
sys/dev/qat/include/common/adf_accel_devices.h
443
u32 ae_mask;
sys/dev/qat/include/common/adf_accel_devices.h
444
u32 admin_ae_mask;
sys/dev/qat/include/common/adf_accel_devices.h
445
u32 service_mask;
sys/dev/qat/include/common/adf_accel_devices.h
446
u32 service_to_load_mask;
sys/dev/qat/include/common/adf_accel_devices.h
447
u32 heartbeat_ctr_num;
sys/dev/qat/include/common/adf_accel_devices.h
459
u32 clock_frequency;
sys/dev/qat/include/common/adf_accel_devices.h
461
u32 extended_dc_capabilities;
sys/dev/qat/include/common/adf_accel_devices.h
463
u32 asym_ae_active_thd_mask;
sys/dev/qat/include/common/adf_accel_devices.h
63
u32 vf_nr_ = (vf_nr); \
sys/dev/qat/include/common/adf_accel_devices.h
633
u32 vf_nr;
sys/dev/qat/include/common/adf_accel_devices.h
652
u32 timeout_val;
sys/dev/qat/include/common/adf_accel_devices.h
653
u32 int_cnt;
sys/dev/qat/include/common/adf_accel_devices.h
727
u32 accel_id;
sys/dev/qat/include/common/adf_cfg.h
73
const u32 *thrd_to_arb_map,
sys/dev/qat/include/common/adf_cfg.h
74
u32 *thrd_to_arb_map_gen,
sys/dev/qat/include/common/adf_cfg.h
75
u32 total_engines);
sys/dev/qat/include/common/adf_cfg_common.h
118
u32 node_id;
sys/dev/qat/include/common/adf_cfg_common.h
119
u32 device_mem_available;
sys/dev/qat/include/common/adf_cfg_common.h
120
u32 pci_device_id;
sys/dev/qat/include/common/adf_cfg_user.h
36
u32 device_id;
sys/dev/qat/include/common/adf_cfg_user.h
40
u32 accel_id;
sys/dev/qat/include/common/adf_cfg_user.h
41
u32 bank_nr;
sys/dev/qat/include/common/adf_cfg_user.h
42
u32 ring_mask;
sys/dev/qat/include/common/adf_common_drv.h
140
u32 ae,
sys/dev/qat/include/common/adf_common_drv.h
148
u32 ae_mask);
sys/dev/qat/include/common/adf_common_drv.h
159
u32 *frequency,
sys/dev/qat/include/common/adf_common_drv.h
160
u32 min,
sys/dev/qat/include/common/adf_common_drv.h
161
u32 max);
sys/dev/qat/include/common/adf_common_drv.h
182
u32 adf_get_slices_for_svc(struct adf_accel_dev *accel_dev,
sys/dev/qat/include/common/adf_common_drv.h
295
u32 mem_size,
sys/dev/qat/include/common/adf_gen2_hw_data.h
50
read_base(struct resource *csr_base_addr, u32 bank, u32 ring)
sys/dev/qat/include/common/adf_gen2_hw_data.h
52
u32 l_base, u_base;
sys/dev/qat/include/common/adf_gen2_hw_data.h
73
u32 l_base = 0, u_base = 0; \
sys/dev/qat/include/common/adf_gen2_hw_data.h
74
l_base = (u32)((value)&0xFFFFFFFF); \
sys/dev/qat/include/common/adf_gen2_hw_data.h
75
u_base = (u32)(((value)&0xFFFFFFFF00000000ULL) >> 32); \
sys/dev/qat/include/common/adf_gen4_hw_data.h
171
int adf_gen4_ring_pair_reset(struct adf_accel_dev *accel_dev, u32 bank_number);
sys/dev/qat/include/common/adf_gen4_hw_data.h
63
u32 _bank = bank; \
sys/dev/qat/include/common/adf_gen4_hw_data.h
64
u32 _ring = ring; \
sys/dev/qat/include/common/adf_gen4_hw_data.h
66
u32 l_base = 0, u_base = 0; \
sys/dev/qat/include/common/adf_gen4_hw_data.h
82
read_base_gen4(struct resource *csr_base_addr, u32 bank, u32 ring)
sys/dev/qat/include/common/adf_gen4_hw_data.h
84
u32 l_base, u_base;
sys/dev/qat/include/common/adf_pfvf_msg.h
237
u32 ext_dc_caps;
sys/dev/qat/include/common/adf_pfvf_msg.h
242
u32 ext_dc_caps;
sys/dev/qat/include/common/adf_pfvf_msg.h
243
u32 capabilities;
sys/dev/qat/include/common/adf_pfvf_msg.h
248
u32 ext_dc_caps;
sys/dev/qat/include/common/adf_pfvf_msg.h
249
u32 capabilities;
sys/dev/qat/include/common/adf_pfvf_msg.h
250
u32 frequency;
sys/dev/qat/include/common/adf_pfvf_msg.h
92
u32 data;
sys/dev/qat/include/common/adf_pfvf_utils.h
17
u32 mask;
sys/dev/qat/include/common/adf_pfvf_utils.h
25
u32 adf_pfvf_csr_msg_of(struct adf_accel_dev *accel_dev,
sys/dev/qat/include/common/adf_pfvf_utils.h
29
u32 raw_msg,
sys/dev/qat/include/common/adf_transport.h
14
u32 bank_num,
sys/dev/qat/include/common/adf_transport.h
15
u32 num_mgs,
sys/dev/qat/include/common/adf_transport.h
16
u32 msg_size,
sys/dev/qat/include/common/adf_transport.h
22
int adf_send_message(struct adf_etr_ring_data *ring, u32 *msg);
sys/dev/qat/include/common/adf_transport.h
24
int adf_poll_bank(u32 accel_id, u32 bank_num, u32 quota);
sys/dev/qat/include/common/adf_transport.h
25
int adf_poll_all_banks(u32 accel_id, u32 quota);
sys/dev/qat/include/common/adf_transport_internal.h
28
u32 csr_tail_offset;
sys/dev/qat/include/common/adf_transport_internal.h
29
u32 max_inflights;
sys/dev/qat/include/common/adf_transport_internal.h
52
int adf_handle_response(struct adf_etr_ring_data *ring, u32 quota);
sys/dev/qat/include/common/adf_uio_control.h
20
u32 rings_enabled;
sys/dev/qat/include/common/icp_qat_hal.h
151
u32 dev_id = pci_get_device(GET_DEV((handle)->accel_dev)); \
sys/dev/qat/include/common/icp_qat_hal.h
158
u32 dev_id = pci_get_device(GET_DEV((handle)->accel_dev)); \
sys/dev/qat/include/common/icp_qat_uclo.h
572
u32 mof_size;
sys/dev/qat/include/icp_qat_fw_init_admin.h
101
u32 rl_period;
sys/dev/qat/include/icp_qat_fw_init_admin.h
110
u32 resrvd14;
sys/dev/qat/include/icp_qat_fw_init_admin.h
115
u32 resrvd15;
sys/dev/qat/include/icp_qat_fw_init_admin.h
116
u32 resrvd16;
sys/dev/qat/include/icp_qat_fw_init_admin.h
127
u32 resrvd2;
sys/dev/qat/include/icp_qat_fw_init_admin.h
128
u32 ras_event_count;
sys/dev/qat/include/icp_qat_fw_init_admin.h
135
u32 extended_features;
sys/dev/qat/include/icp_qat_fw_init_admin.h
144
u32 resrvd3[4];
sys/dev/qat/include/icp_qat_fw_init_admin.h
147
u32 version_patch_num;
sys/dev/qat/include/icp_qat_fw_init_admin.h
157
u32 deflate_capabilities;
sys/dev/qat/include/icp_qat_fw_init_admin.h
158
u32 resrvd6;
sys/dev/qat/include/icp_qat_fw_init_admin.h
159
u32 deprecated;
sys/dev/qat/include/icp_qat_fw_init_admin.h
163
u32 cipher_algos;
sys/dev/qat/include/icp_qat_fw_init_admin.h
164
u32 hash_algos;
sys/dev/qat/include/icp_qat_fw_init_admin.h
172
u32 resrvd7;
sys/dev/qat/include/icp_qat_fw_init_admin.h
176
u32 total_du_time;
sys/dev/qat/include/icp_qat_fw_init_admin.h
177
u32 resrvd10;
sys/dev/qat/include/icp_qat_fw_init_admin.h
191
u32 successful_count;
sys/dev/qat/include/icp_qat_fw_init_admin.h
192
u32 unsuccessful_count;
sys/dev/qat/include/icp_qat_fw_init_admin.h
66
u32 max_req_duration;
sys/dev/qat/include/icp_qat_fw_init_admin.h
76
u32 resrvd4;
sys/dev/qat/include/icp_qat_fw_init_admin.h
86
u32 heartbeat_ticks;
sys/dev/qat/include/icp_qat_fw_init_admin.h
87
u32 resrvd6;
sys/dev/qat/include/icp_qat_fw_init_admin.h
91
u32 credit_per_sla;
sys/dev/qat/include/icp_qat_fw_init_admin.h
96
u32 resrvd9;
sys/dev/qat/include/icp_qat_fw_init_admin.h
97
u32 resrvd10;
sys/dev/qat/qat_common/adf_accel_engine.c
47
u32 fw_size, mmp_size;
sys/dev/qat/qat_common/adf_accel_engine.c
49
u32 max_objs = 1;
sys/dev/qat/qat_common/adf_aer.c
124
u32 aer_offset, reg_val = 0;
sys/dev/qat/qat_common/adf_aer.c
150
u32 aer_offset;
sys/dev/qat/qat_common/adf_cfg_device.c
292
u32 i = 0;
sys/dev/qat/qat_common/adf_cfg_device.c
367
const u32 *thrd_to_arb_map,
sys/dev/qat/qat_common/adf_cfg_device.c
368
u32 *thrd_to_arb_map_gen,
sys/dev/qat/qat_common/adf_cfg_device.c
369
u32 total_engines)
sys/dev/qat/qat_common/adf_cfg_device.c
372
u32 thread_ability, ability_map, service_mask, service_type;
sys/dev/qat/qat_common/adf_cfg_device.c
434
u32 *enabled_svc_caps,
sys/dev/qat/qat_common/adf_cfg_device.c
435
u32 *enabled_fw_caps)
sys/dev/qat/qat_common/adf_cfg_device.c
508
u32 enabled_svc_caps)
sys/dev/qat/qat_common/adf_cfg_device.c
510
u32 hw_caps = GET_HW_DATA(accel_dev)->accel_capabilities_mask;
sys/dev/qat/qat_common/adf_cfg_device.c
524
u32 enabled_svc_caps = 0;
sys/dev/qat/qat_common/adf_cfg_device.c
525
u32 enabled_fw_caps = 0;
sys/dev/qat/qat_common/adf_cfg_device.c
557
u32 enabled_svc_caps = 0;
sys/dev/qat/qat_common/adf_cfg_device.c
558
u32 enabled_fw_caps = 0;
sys/dev/qat/qat_common/adf_cfg_device.c
69
u32 enabled_svc_cap;
sys/dev/qat/qat_common/adf_cfg_device.c
70
u32 enabled_fw_cap;
sys/dev/qat/qat_common/adf_cfg_section.c
1106
u32 num_msix = 0;
sys/dev/qat/qat_common/adf_clock.c
167
u32 *frequency,
sys/dev/qat/qat_common/adf_clock.c
168
u32 min,
sys/dev/qat/qat_common/adf_clock.c
169
u32 max)
sys/dev/qat/qat_common/adf_clock.c
172
u32 freq;
sys/dev/qat/qat_common/adf_clock.c
80
measure_clock(struct adf_accel_dev *accel_dev, u32 *frequency)
sys/dev/qat/qat_common/adf_dev_err.c
102
static u32
sys/dev/qat/qat_common/adf_dev_err.c
108
static u32
sys/dev/qat/qat_common/adf_dev_err.c
114
static u32
sys/dev/qat/qat_common/adf_dev_err.c
121
u32 (*read)(struct resource *pmisc_bar_addr, size_t dev);
sys/dev/qat/qat_common/adf_dev_err.c
159
u32 val)
sys/dev/qat/qat_common/adf_dev_err.c
181
u32 val;
sys/dev/qat/qat_common/adf_dev_err.c
225
u32 slice_hang_offset)
sys/dev/qat/qat_common/adf_dev_err.c
227
u32 slice_hang = ADF_CSR_RD(csr, slice_hang_offset);
sys/dev/qat/qat_common/adf_dev_err.c
281
u32 errsou3 = ADF_CSR_RD(csr, ADF_ERRSOU3);
sys/dev/qat/qat_common/adf_dev_err.c
282
u32 errsou5 = ADF_CSR_RD(csr, ADF_ERRSOU5);
sys/dev/qat/qat_common/adf_dev_err.c
283
u32 offset;
sys/dev/qat/qat_common/adf_dev_err.c
284
u32 accel_num;
sys/dev/qat/qat_common/adf_dev_err.c
286
u32 errsou[] = { errsou3, errsou3, errsou5, errsou5, errsou5 };
sys/dev/qat/qat_common/adf_dev_err.c
287
u32 mask[] = { ADF_EMSK3_CPM0_MASK,
sys/dev/qat/qat_common/adf_dev_err.c
30
static u32
sys/dev/qat/qat_common/adf_dev_err.c
36
static u32
sys/dev/qat/qat_common/adf_dev_err.c
42
static u32
sys/dev/qat/qat_common/adf_dev_err.c
48
static u32
sys/dev/qat/qat_common/adf_dev_err.c
54
static u32
sys/dev/qat/qat_common/adf_dev_err.c
60
static u32
sys/dev/qat/qat_common/adf_dev_err.c
66
static u32
sys/dev/qat/qat_common/adf_dev_err.c
72
static u32
sys/dev/qat/qat_common/adf_dev_err.c
78
static u32
sys/dev/qat/qat_common/adf_dev_err.c
84
static u32
sys/dev/qat/qat_common/adf_dev_err.c
90
static u32
sys/dev/qat/qat_common/adf_dev_err.c
96
static u32
sys/dev/qat/qat_common/adf_dev_mgr.c
27
u32 bdf;
sys/dev/qat/qat_common/adf_dev_mgr.c
28
u32 id;
sys/dev/qat/qat_common/adf_dev_mgr.c
29
u32 fake_id;
sys/dev/qat/qat_common/adf_dev_mgr.c
44
adf_get_vf_real_id(u32 fake)
sys/dev/qat/qat_common/adf_freebsd_admin.c
133
u32 ae,
sys/dev/qat/qat_common/adf_freebsd_admin.c
207
u32 ae_mask)
sys/dev/qat/qat_common/adf_freebsd_admin.c
229
u32 ae_mask = hw_device->ae_mask;
sys/dev/qat/qat_common/adf_freebsd_admin.c
253
u32 ae_mask = hw_device->ae_mask;
sys/dev/qat/qat_common/adf_freebsd_admin.c
254
u32 heartbeat_ticks;
sys/dev/qat/qat_common/adf_freebsd_admin.c
270
adf_get_dc_capabilities(struct adf_accel_dev *accel_dev, u32 *capabilities)
sys/dev/qat/qat_common/adf_freebsd_admin.c
274
u32 ae_mask = 1;
sys/dev/qat/qat_common/adf_freebsd_admin.c
293
u32 ae_mask = hw_device->admin_ae_mask;
sys/dev/qat/qat_common/adf_freebsd_admin.c
315
u32 ae_mask = 1;
sys/dev/qat/qat_common/adf_freebsd_admin.c
394
u32 dc_capabilities = 0;
sys/dev/qat/qat_common/adf_freebsd_uio_cleanup.c
220
u32 rx_tail = 0, tx_head = 0, rx_ring_msg_offset = 0,
sys/dev/qat/qat_common/adf_fw_counters.c
184
u32 *ras_event,
sys/dev/qat/qat_common/adf_gen2_hw_data.c
102
static u32
sys/dev/qat/qat_common/adf_gen2_hw_data.c
103
read_csr_ring_srv_arb_en(struct resource *csr_base_addr, u32 bank)
sys/dev/qat/qat_common/adf_gen2_hw_data.c
109
write_csr_ring_srv_arb_en(struct resource *csr_base_addr, u32 bank, u32 value)
sys/dev/qat/qat_common/adf_gen2_hw_data.c
114
static u32
sys/dev/qat/qat_common/adf_gen2_hw_data.c
12
static u32
sys/dev/qat/qat_common/adf_gen2_hw_data.c
13
read_csr_ring_head(struct resource *csr_base_addr, u32 bank, u32 ring)
sys/dev/qat/qat_common/adf_gen2_hw_data.c
20
u32 bank,
sys/dev/qat/qat_common/adf_gen2_hw_data.c
21
u32 ring,
sys/dev/qat/qat_common/adf_gen2_hw_data.c
22
u32 value)
sys/dev/qat/qat_common/adf_gen2_hw_data.c
27
static u32
sys/dev/qat/qat_common/adf_gen2_hw_data.c
28
read_csr_ring_tail(struct resource *csr_base_addr, u32 bank, u32 ring)
sys/dev/qat/qat_common/adf_gen2_hw_data.c
35
u32 bank,
sys/dev/qat/qat_common/adf_gen2_hw_data.c
36
u32 ring,
sys/dev/qat/qat_common/adf_gen2_hw_data.c
37
u32 value)
sys/dev/qat/qat_common/adf_gen2_hw_data.c
42
static u32
sys/dev/qat/qat_common/adf_gen2_hw_data.c
43
read_csr_e_stat(struct resource *csr_base_addr, u32 bank)
sys/dev/qat/qat_common/adf_gen2_hw_data.c
50
u32 bank,
sys/dev/qat/qat_common/adf_gen2_hw_data.c
51
u32 ring,
sys/dev/qat/qat_common/adf_gen2_hw_data.c
52
u32 value)
sys/dev/qat/qat_common/adf_gen2_hw_data.c
58
read_csr_ring_base(struct resource *csr_base_addr, u32 bank, u32 ring)
sys/dev/qat/qat_common/adf_gen2_hw_data.c
65
u32 bank,
sys/dev/qat/qat_common/adf_gen2_hw_data.c
66
u32 ring,
sys/dev/qat/qat_common/adf_gen2_hw_data.c
7
build_csr_ring_base_addr(bus_addr_t addr, u32 size)
sys/dev/qat/qat_common/adf_gen2_hw_data.c
73
write_csr_int_flag(struct resource *csr_base_addr, u32 bank, u32 value)
sys/dev/qat/qat_common/adf_gen2_hw_data.c
79
write_csr_int_srcsel(struct resource *csr_base_addr, u32 bank)
sys/dev/qat/qat_common/adf_gen2_hw_data.c
85
write_csr_int_col_en(struct resource *csr_base_addr, u32 bank, u32 value)
sys/dev/qat/qat_common/adf_gen2_hw_data.c
91
write_csr_int_col_ctl(struct resource *csr_base_addr, u32 bank, u32 value)
sys/dev/qat/qat_common/adf_gen2_hw_data.c
97
write_csr_int_flag_and_col(struct resource *csr_base_addr, u32 bank, u32 value)
sys/dev/qat/qat_common/adf_gen4_hw_data.c
101
write_csr_int_flag_and_col(struct resource *csr_base_addr, u32 bank, u32 value)
sys/dev/qat/qat_common/adf_gen4_hw_data.c
106
static u32
sys/dev/qat/qat_common/adf_gen4_hw_data.c
107
read_csr_ring_srv_arb_en(struct resource *csr_base_addr, u32 bank)
sys/dev/qat/qat_common/adf_gen4_hw_data.c
11
build_csr_ring_base_addr(bus_addr_t addr, u32 size)
sys/dev/qat/qat_common/adf_gen4_hw_data.c
113
write_csr_ring_srv_arb_en(struct resource *csr_base_addr, u32 bank, u32 value)
sys/dev/qat/qat_common/adf_gen4_hw_data.c
118
static u32
sys/dev/qat/qat_common/adf_gen4_hw_data.c
154
reset_ring_pair(struct resource *csr, u32 bank_number)
sys/dev/qat/qat_common/adf_gen4_hw_data.c
158
u32 val;
sys/dev/qat/qat_common/adf_gen4_hw_data.c
16
static u32
sys/dev/qat/qat_common/adf_gen4_hw_data.c
17
read_csr_ring_head(struct resource *csr_base_addr, u32 bank, u32 ring)
sys/dev/qat/qat_common/adf_gen4_hw_data.c
189
adf_gen4_ring_pair_reset(struct adf_accel_dev *accel_dev, u32 bank_number)
sys/dev/qat/qat_common/adf_gen4_hw_data.c
192
u32 etr_bar_id = hw_data->get_etr_bar_id(hw_data);
sys/dev/qat/qat_common/adf_gen4_hw_data.c
210
adf_gen4_unpack_ssm_wdtimer(u64 value, u32 *upper, u32 *lower)
sys/dev/qat/qat_common/adf_gen4_hw_data.c
222
u32 ssm_wdt_pke_high = 0;
sys/dev/qat/qat_common/adf_gen4_hw_data.c
223
u32 ssm_wdt_pke_low = 0;
sys/dev/qat/qat_common/adf_gen4_hw_data.c
224
u32 ssm_wdt_high = 0;
sys/dev/qat/qat_common/adf_gen4_hw_data.c
225
u32 ssm_wdt_low = 0;
sys/dev/qat/qat_common/adf_gen4_hw_data.c
24
u32 bank,
sys/dev/qat/qat_common/adf_gen4_hw_data.c
25
u32 ring,
sys/dev/qat/qat_common/adf_gen4_hw_data.c
26
u32 value)
sys/dev/qat/qat_common/adf_gen4_hw_data.c
31
static u32
sys/dev/qat/qat_common/adf_gen4_hw_data.c
32
read_csr_ring_tail(struct resource *csr_base_addr, u32 bank, u32 ring)
sys/dev/qat/qat_common/adf_gen4_hw_data.c
39
u32 bank,
sys/dev/qat/qat_common/adf_gen4_hw_data.c
40
u32 ring,
sys/dev/qat/qat_common/adf_gen4_hw_data.c
41
u32 value)
sys/dev/qat/qat_common/adf_gen4_hw_data.c
46
static u32
sys/dev/qat/qat_common/adf_gen4_hw_data.c
47
read_csr_e_stat(struct resource *csr_base_addr, u32 bank)
sys/dev/qat/qat_common/adf_gen4_hw_data.c
54
u32 bank,
sys/dev/qat/qat_common/adf_gen4_hw_data.c
55
u32 ring,
sys/dev/qat/qat_common/adf_gen4_hw_data.c
56
u32 value)
sys/dev/qat/qat_common/adf_gen4_hw_data.c
62
read_csr_ring_base(struct resource *csr_base_addr, u32 bank, u32 ring)
sys/dev/qat/qat_common/adf_gen4_hw_data.c
69
u32 bank,
sys/dev/qat/qat_common/adf_gen4_hw_data.c
70
u32 ring,
sys/dev/qat/qat_common/adf_gen4_hw_data.c
77
write_csr_int_flag(struct resource *csr_base_addr, u32 bank, u32 value)
sys/dev/qat/qat_common/adf_gen4_hw_data.c
83
write_csr_int_srcsel(struct resource *csr_base_addr, u32 bank)
sys/dev/qat/qat_common/adf_gen4_hw_data.c
89
write_csr_int_col_en(struct resource *csr_base_addr, u32 bank, u32 value)
sys/dev/qat/qat_common/adf_gen4_hw_data.c
95
write_csr_int_col_ctl(struct resource *csr_base_addr, u32 bank, u32 value)
sys/dev/qat/qat_common/adf_gen4_pfvf.c
115
u32 pfvf_offset,
sys/dev/qat/qat_common/adf_gen4_pfvf.c
31
static u32
sys/dev/qat/qat_common/adf_gen4_pfvf.c
32
adf_gen4_vf_get_pfvf_offset(u32 i)
sys/dev/qat/qat_common/adf_gen4_pfvf.c
37
static u32
sys/dev/qat/qat_common/adf_gen4_pfvf.c
38
adf_gen4_vf_get_vfpf_offset(u32 i)
sys/dev/qat/qat_common/adf_gen4_pfvf.c
46
u32 pfvf_offset,
sys/dev/qat/qat_common/adf_gen4_pfvf.c
50
u32 csr_val;
sys/dev/qat/qat_common/adf_gen4_pfvf.c
80
u32 pfvf_offset,
sys/dev/qat/qat_common/adf_gen4_pfvf.c
88
u32 pfvf_offset,
sys/dev/qat/qat_common/adf_gen4_pfvf.c
93
u32 csr_val;
sys/dev/qat/qat_common/adf_gen4_timer.c
18
adf_get_next_timeout(u32 timeout_val)
sys/dev/qat/qat_common/adf_gen4_timer.c
34
u32 ae_mask = hw_data->ae_mask;
sys/dev/qat/qat_common/adf_gen4vf_hw_csr_data.c
102
static u32
sys/dev/qat/qat_common/adf_gen4vf_hw_csr_data.c
103
read_csr_ring_srv_arb_en(struct resource *csr_base_addr, u32 bank)
sys/dev/qat/qat_common/adf_gen4vf_hw_csr_data.c
109
write_csr_ring_srv_arb_en(struct resource *csr_base_addr, u32 bank, u32 value)
sys/dev/qat/qat_common/adf_gen4vf_hw_csr_data.c
114
static u32
sys/dev/qat/qat_common/adf_gen4vf_hw_csr_data.c
12
static u32
sys/dev/qat/qat_common/adf_gen4vf_hw_csr_data.c
120
static u32
sys/dev/qat/qat_common/adf_gen4vf_hw_csr_data.c
126
static u32
sys/dev/qat/qat_common/adf_gen4vf_hw_csr_data.c
127
get_bank_irq_mask(u32 irq_mask)
sys/dev/qat/qat_common/adf_gen4vf_hw_csr_data.c
13
read_csr_ring_head(struct resource *csr_base_addr, u32 bank, u32 ring)
sys/dev/qat/qat_common/adf_gen4vf_hw_csr_data.c
20
u32 bank,
sys/dev/qat/qat_common/adf_gen4vf_hw_csr_data.c
21
u32 ring,
sys/dev/qat/qat_common/adf_gen4vf_hw_csr_data.c
22
u32 value)
sys/dev/qat/qat_common/adf_gen4vf_hw_csr_data.c
27
static u32
sys/dev/qat/qat_common/adf_gen4vf_hw_csr_data.c
28
read_csr_ring_tail(struct resource *csr_base_addr, u32 bank, u32 ring)
sys/dev/qat/qat_common/adf_gen4vf_hw_csr_data.c
35
u32 bank,
sys/dev/qat/qat_common/adf_gen4vf_hw_csr_data.c
36
u32 ring,
sys/dev/qat/qat_common/adf_gen4vf_hw_csr_data.c
37
u32 value)
sys/dev/qat/qat_common/adf_gen4vf_hw_csr_data.c
42
static u32
sys/dev/qat/qat_common/adf_gen4vf_hw_csr_data.c
43
read_csr_e_stat(struct resource *csr_base_addr, u32 bank)
sys/dev/qat/qat_common/adf_gen4vf_hw_csr_data.c
50
u32 bank,
sys/dev/qat/qat_common/adf_gen4vf_hw_csr_data.c
51
u32 ring,
sys/dev/qat/qat_common/adf_gen4vf_hw_csr_data.c
52
u32 value)
sys/dev/qat/qat_common/adf_gen4vf_hw_csr_data.c
58
read_csr_ring_base(struct resource *csr_base_addr, u32 bank, u32 ring)
sys/dev/qat/qat_common/adf_gen4vf_hw_csr_data.c
65
u32 bank,
sys/dev/qat/qat_common/adf_gen4vf_hw_csr_data.c
66
u32 ring,
sys/dev/qat/qat_common/adf_gen4vf_hw_csr_data.c
7
build_csr_ring_base_addr(bus_addr_t addr, u32 size)
sys/dev/qat/qat_common/adf_gen4vf_hw_csr_data.c
73
write_csr_int_flag(struct resource *csr_base_addr, u32 bank, u32 value)
sys/dev/qat/qat_common/adf_gen4vf_hw_csr_data.c
79
write_csr_int_srcsel(struct resource *csr_base_addr, u32 bank)
sys/dev/qat/qat_common/adf_gen4vf_hw_csr_data.c
85
write_csr_int_col_en(struct resource *csr_base_addr, u32 bank, u32 value)
sys/dev/qat/qat_common/adf_gen4vf_hw_csr_data.c
91
write_csr_int_col_ctl(struct resource *csr_base_addr, u32 bank, u32 value)
sys/dev/qat/qat_common/adf_gen4vf_hw_csr_data.c
97
write_csr_int_flag_and_col(struct resource *csr_base_addr, u32 bank, u32 value)
sys/dev/qat/qat_common/adf_heartbeat.c
68
u32 clk_per_sec = 0;
sys/dev/qat/qat_common/adf_heartbeat.c
72
clk_per_sec = (u32)hw_data->get_hb_clock(hw_data);
sys/dev/qat/qat_common/adf_heartbeat.c
74
clk_per_sec = (u32)hw_data->get_ae_clock(hw_data);
sys/dev/qat/qat_common/adf_hw_arbiter.c
100
u32 arben, arben_tx, arben_rx, arb_mask;
sys/dev/qat/qat_common/adf_hw_arbiter.c
120
u32 arben, arben_tx, arben_rx, arb_mask;
sys/dev/qat/qat_common/adf_hw_arbiter.c
142
u32 arbenable;
sys/dev/qat/qat_common/adf_hw_arbiter.c
163
u32 arbenable;
sys/dev/qat/qat_common/adf_hw_arbiter.c
54
u32 arb_cfg = 0x1 << 31 | 0x4 << 4 | 0x1;
sys/dev/qat/qat_common/adf_hw_arbiter.c
55
u32 arb;
sys/dev/qat/qat_common/adf_hw_arbiter.c
74
u32 i;
sys/dev/qat/qat_common/adf_hw_arbiter.c
75
const u32 *thd_2_arb_cfg;
sys/dev/qat/qat_common/adf_init.c
221
u32 i;
sys/dev/qat/qat_common/adf_init.c
223
u32 clk_per_sec = hw_data->get_clock_speed(hw_data);
sys/dev/qat/qat_common/adf_init.c
224
u32 timer_val = ADF_WDT_TIMER_SYM_COMP_MS * (clk_per_sec / 1000);
sys/dev/qat/qat_common/adf_init.c
225
u32 timer_val_pke = ADF_GEN2_SSM_WDT_PKE_DEFAULT_VALUE;
sys/dev/qat/qat_common/adf_isr.c
112
u32 errsou3;
sys/dev/qat/qat_common/adf_isr.c
113
u32 errsou5;
sys/dev/qat/qat_common/adf_isr.c
286
u32 msix_num_entries = 1;
sys/dev/qat/qat_common/adf_pfvf_utils.c
54
u32 *csr_msg,
sys/dev/qat/qat_common/adf_pfvf_utils.c
55
u32 value,
sys/dev/qat/qat_common/adf_pfvf_utils.c
72
u32
sys/dev/qat/qat_common/adf_pfvf_utils.c
77
u32 csr_msg = 0;
sys/dev/qat/qat_common/adf_pfvf_utils.c
88
u32 csr_msg,
sys/dev/qat/qat_common/adf_pfvf_vf_proto.c
34
u32 pfvf_offset = pfvf_ops->get_pf2vf_offset(0);
sys/dev/qat/qat_common/adf_pfvf_vf_proto.c
55
u32 pfvf_offset = pfvf_ops->get_vf2pf_offset(0); // 1008
sys/dev/qat/qat_common/adf_transport.c
107
adf_send_message(struct adf_etr_ring_data *ring, u32 *msg)
sys/dev/qat/qat_common/adf_transport.c
110
u32 msg_size = 0;
sys/dev/qat/qat_common/adf_transport.c
136
adf_handle_response(struct adf_etr_ring_data *ring, u32 quota)
sys/dev/qat/qat_common/adf_transport.c
139
u32 msg_counter = 0;
sys/dev/qat/qat_common/adf_transport.c
140
u32 *msg = (u32 *)((uintptr_t)ring->base_addr + ring->head);
sys/dev/qat/qat_common/adf_transport.c
146
ring->callback((u32 *)msg);
sys/dev/qat/qat_common/adf_transport.c
154
msg = (u32 *)((uintptr_t)ring->base_addr + ring->head);
sys/dev/qat/qat_common/adf_transport.c
165
adf_poll_bank(u32 accel_id, u32 bank_num, u32 quota)
sys/dev/qat/qat_common/adf_transport.c
173
u32 rings_not_empty;
sys/dev/qat/qat_common/adf_transport.c
174
u32 ring_num;
sys/dev/qat/qat_common/adf_transport.c
175
u32 resp_total = 0;
sys/dev/qat/qat_common/adf_transport.c
176
u32 num_rings_per_bank;
sys/dev/qat/qat_common/adf_transport.c
22
static inline u32
sys/dev/qat/qat_common/adf_transport.c
23
adf_modulo(u32 data, u32 shift)
sys/dev/qat/qat_common/adf_transport.c
238
adf_poll_all_banks(u32 accel_id, u32 quota)
sys/dev/qat/qat_common/adf_transport.c
244
u32 bank_num;
sys/dev/qat/qat_common/adf_transport.c
245
u32 stat_total = 0;
sys/dev/qat/qat_common/adf_transport.c
25
u32 div = data >> shift;
sys/dev/qat/qat_common/adf_transport.c
26
u32 mult = div << shift;
sys/dev/qat/qat_common/adf_transport.c
287
u32 ring_config = BUILD_RING_CONFIG(ring->ring_size);
sys/dev/qat/qat_common/adf_transport.c
299
u32 ring_config = BUILD_RESP_RING_CONFIG(ring->ring_size,
sys/dev/qat/qat_common/adf_transport.c
317
u32 ring_size_bytes = ADF_SIZE_TO_RING_SIZE_IN_BYTES(ring->ring_size);
sys/dev/qat/qat_common/adf_transport.c
360
u32 ring_size_bytes = ADF_SIZE_TO_RING_SIZE_IN_BYTES(ring->ring_size);
sys/dev/qat/qat_common/adf_transport.c
373
u32 bank_num,
sys/dev/qat/qat_common/adf_transport.c
374
u32 num_msgs,
sys/dev/qat/qat_common/adf_transport.c
375
u32 msg_size,
sys/dev/qat/qat_common/adf_transport.c
385
u32 ring_num;
sys/dev/qat/qat_common/adf_transport.c
40
adf_verify_ring_size(u32 msg_size, u32 msg_num)
sys/dev/qat/qat_common/adf_transport.c
496
u32 empty_rings, i;
sys/dev/qat/qat_common/adf_transport.c
52
adf_reserve_ring(struct adf_etr_bank_data *bank, u32 ring)
sys/dev/qat/qat_common/adf_transport.c
525
u32 key,
sys/dev/qat/qat_common/adf_transport.c
526
u32 *value)
sys/dev/qat/qat_common/adf_transport.c
544
u32 bank_num_in_accel)
sys/dev/qat/qat_common/adf_transport.c
548
u32 coalesc_timer = ADF_COALESCING_DEF_TIME;
sys/dev/qat/qat_common/adf_transport.c
573
u32 bank_num,
sys/dev/qat/qat_common/adf_transport.c
580
u32 i, coalesc_enabled = 0;
sys/dev/qat/qat_common/adf_transport.c
582
u32 irq_mask = BIT(num_rings_per_bank) - 1;
sys/dev/qat/qat_common/adf_transport.c
583
u32 size = 0;
sys/dev/qat/qat_common/adf_transport.c
65
adf_unreserve_ring(struct adf_etr_bank_data *bank, u32 ring)
sys/dev/qat/qat_common/adf_transport.c
667
u32 size;
sys/dev/qat/qat_common/adf_transport.c
668
u32 num_banks = 0;
sys/dev/qat/qat_common/adf_transport.c
720
u32 i;
sys/dev/qat/qat_common/adf_transport.c
73
adf_enable_ring_irq(struct adf_etr_bank_data *bank, u32 ring)
sys/dev/qat/qat_common/adf_transport.c
748
u32 i, num_banks = GET_MAX_BANKS(accel_dev);
sys/dev/qat/qat_common/adf_transport.c
76
u32 enable_int_col_mask = 0;
sys/dev/qat/qat_common/adf_transport.c
94
adf_disable_ring_irq(struct adf_etr_bank_data *bank, u32 ring)
sys/dev/qat/qat_common/qat_hal.c
1146
u32 ae_ctr = 0;
sys/dev/qat/qat_common/qat_hal.c
369
static u32
sys/dev/qat/qat_common/qat_hal.c
372
u32 tg = 0, ae;
sys/dev/qat/qat_common/qat_hal.c
373
u32 valid_ae_mask = 0;
sys/dev/qat/qat_common/qat_uclo.c
1880
u32 mof_size)
sys/dev/qat/qat_common/qat_uclo.c
2091
u32 mof_size,
sys/dev/qat/qat_common/qat_uclo.c
2143
u32 mem_size,
sys/dev/qat/qat_common/qat_uclo.c
2147
u32 obj_size;
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c
104
static u32
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c
110
static u32
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c
129
u32 const **arb_map_config)
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c
15
static const u32 thrd_to_arb_map[ADF_200XX_MAX_ACCELENGINES] =
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c
164
get_errsou_offset(u32 *errsou3, u32 *errsou5)
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c
170
static u32
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c
20
static u32 thrd_to_arb_map_gen[ADF_200XX_MAX_ACCELENGINES] = { 0 };
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c
223
u32 errsou0 = ADF_CSR_RD(csr, ADF_ERRSOU0) & ADF_200XX_ERRMSK0_UERR;
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c
224
u32 errsou1 = ADF_CSR_RD(csr, ADF_ERRSOU1) & ADF_200XX_ERRMSK1_UERR;
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c
225
u32 errsou3 = ADF_CSR_RD(csr, ADF_ERRSOU3) & ADF_200XX_ERRMSK3_UERR;
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c
226
u32 errsou5 = ADF_CSR_RD(csr, ADF_ERRSOU5) & ADF_200XX_ERRMSK5_UERR;
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c
27
static u32
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c
32
u32 fuse;
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c
33
u32 straps;
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c
350
static u32
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c
376
u32 frequency;
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c
390
static u32
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c
394
u32 legfuses;
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c
395
u32 capabilities;
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c
396
u32 straps;
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c
398
u32 fuses = hw_data->fuses;
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c
42
static u32
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c
46
u32 fuse;
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c
47
u32 me_straps;
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c
48
u32 me_disable;
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c
49
u32 ssms_disabled;
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c
68
static u32
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c
71
u32 i, ctr = 0;
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c
83
static u32
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c
86
u32 i, ctr = 0;
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c
98
static u32
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c
107
static u32
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c
113
static u32
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c
116
u32 fusectl4 = accel_dev->hw_device->fuses;
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c
132
u32 i = 0;
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c
155
static u32
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c
161
static u32
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c
170
static u32
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c
176
static u32
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c
182
static u32
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c
20
u32 ae_mask;
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c
210
static u32
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c
214
u32 fusectl1;
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c
215
u32 capabilities_sym, capabilities_sym_cipher, capabilities_sym_auth,
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c
288
static u32
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c
297
static u32
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c
309
u32 frequency;
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c
32
static u32 thrd_to_arb_map[ADF_4XXX_MAX_ACCELENGINES] = { 0x5555555, 0x5555555,
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c
347
static u32
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c
380
u32 num_au = hw_data->get_num_accel_units(hw_data);
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c
382
u32 alloc_au = 1;
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c
384
u32 service_mask = ADF_ACCEL_ADMIN;
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c
386
u32 disabled_caps = 0;
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c
45
static u32 thrd_to_arb_map_gen[ADF_4XXX_MAX_ACCELENGINES] = { 0 };
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c
469
u32 num_au = hw_data->get_num_accel_units(hw_data);
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c
470
u32 au_size = num_au * sizeof(struct adf_accel_unit);
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c
584
u32 ae_mask = 0;
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c
586
u32 num_au = hw_data->get_num_accel_units(hw_data);
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c
588
u32 i = 0;
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c
650
adf_get_dc_extcapabilities(struct adf_accel_dev *accel_dev, u32 *capabilities)
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c
657
u32 first_dc_ae = 0;
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c
692
u32 ae_mask = 1;
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c
715
u32 ae_mask = hw_data->ae_mask;
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c
716
u32 admin_ae_mask = hw_data->admin_ae_mask;
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c
719
u32 dc_capabilities = 0;
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c
833
u32 *thrd_to_arb_map_gen)
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c
841
u32 service_mask;
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c
886
u32 const **arb_map_config)
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c
944
u32 status;
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c
945
u32 csr;
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c
976
adf_init_hw_data_4xxx(struct adf_hw_device_data *hw_data, u32 id)
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.h
117
void adf_init_hw_data_4xxx(struct adf_hw_device_data *hw_data, u32 id);
sys/dev/qat/qat_hw/qat_4xxxvf/adf_4xxxvf_hw_data.c
101
static u32
sys/dev/qat/qat_hw/qat_4xxxvf/adf_4xxxvf_hw_data.c
107
static u32
sys/dev/qat/qat_hw/qat_4xxxvf/adf_4xxxvf_hw_data.c
131
u32
sys/dev/qat/qat_hw/qat_4xxxvf/adf_4xxxvf_hw_data.c
135
u32 vffusectl1;
sys/dev/qat/qat_hw/qat_4xxxvf/adf_4xxxvf_hw_data.c
136
u32 capabilities_sym, capabilities_sym_cipher, capabilities_sym_auth,
sys/dev/qat/qat_hw/qat_4xxxvf/adf_4xxxvf_hw_data.c
246
u32 v_sou, v_msk;
sys/dev/qat/qat_hw/qat_4xxxvf/adf_4xxxvf_hw_data.c
264
u32 v_sou, v_msk;
sys/dev/qat/qat_hw/qat_4xxxvf/adf_4xxxvf_hw_data.c
295
u32 i = 0;
sys/dev/qat/qat_hw/qat_4xxxvf/adf_4xxxvf_hw_data.c
327
adf_4xxxvf_ring_pair_reset(struct adf_accel_dev *accel_dev, u32 bank_number)
sys/dev/qat/qat_hw/qat_4xxxvf/adf_4xxxvf_hw_data.c
71
static u32
sys/dev/qat/qat_hw/qat_4xxxvf/adf_4xxxvf_hw_data.c
77
static u32
sys/dev/qat/qat_hw/qat_4xxxvf/adf_4xxxvf_hw_data.c
83
static u32
sys/dev/qat/qat_hw/qat_4xxxvf/adf_4xxxvf_hw_data.c
89
static u32
sys/dev/qat/qat_hw/qat_4xxxvf/adf_4xxxvf_hw_data.c
95
static u32
sys/dev/qat/qat_hw/qat_4xxxvf/adf_4xxxvf_hw_data.h
44
u32 adf_4xxxvf_get_hw_cap(struct adf_accel_dev *accel_dev);
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.c
103
static u32
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.c
109
static u32
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.c
128
u32 const **arb_map_config)
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.c
15
static const u32 thrd_to_arb_map[ADF_C3XXX_MAX_ACCELENGINES] =
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.c
163
get_errsou_offset(u32 *errsou3, u32 *errsou5)
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.c
169
static u32
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.c
20
static u32 thrd_to_arb_map_gen[ADF_C3XXX_MAX_ACCELENGINES] = { 0 };
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.c
224
static u32
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.c
250
u32 frequency;
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.c
26
static u32
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.c
264
static u32
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.c
268
u32 legfuses;
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.c
269
u32 capabilities;
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.c
270
u32 straps;
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.c
272
u32 fuses = hw_data->fuses;
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.c
31
u32 fuse;
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.c
32
u32 straps;
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.c
41
static u32
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.c
45
u32 fuse;
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.c
46
u32 me_straps;
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.c
47
u32 me_disable;
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.c
48
u32 ssms_disabled;
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.c
67
static u32
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.c
70
u32 i, ctr = 0;
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.c
82
static u32
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.c
85
u32 i, ctr = 0;
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.c
97
static u32
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ae_config.c
23
find_first_me_index(const u32 au_mask)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ae_config.c
26
u32 mask = au_mask;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ae_config.c
67
u32 num_au = hw_data->get_num_accel_units(hw_data);
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
1105
u32 sa_entry_reg_value = 0;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
1106
u32 sa_fn_lim = 0;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
1107
u32 supported_algo = 0;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
1109
u32 offset;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
1225
u32 aram_size = ADF_C4XXX_2MB_ARAM_SIZE;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
1226
u32 ibuff_mem_needed = 0;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
1227
u32 usable_aram_size = 0;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
1229
u32 sa_db_ctl_value;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
1232
u32 sadb_size = 0;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
1233
u32 sa_size = 0;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
1235
u32 i;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
129
static u32
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
133
u32 fusectl0;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
134
u32 softstrappull0;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
1375
static u32
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
1378
u32 i = 0, num_accel = 0;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
143
static u32
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
147
u32 fusectl1;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
148
u32 softstrappull1;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
1481
u32 hw_cap = hw_data->accel_capabilities_mask;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
1503
u32 num_au = hw_data->get_num_accel_units(hw_data);
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
1504
u32 service_mask = ADF_ACCEL_SERVICE_NULL;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
160
static u32
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
166
static u32
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
1679
adf_get_inline_config(struct adf_accel_dev *accel_dev, u32 *num_ingress_aes)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
1685
u32 num_au = hw_data->get_num_accel_units(hw_data);
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
1688
u32 num_inline_aes = 0, num_ingress_ae = 0;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
1689
u32 i = 0;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
172
static u32
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
1735
u32 num_au = hw_data->get_num_accel_units(hw_data);
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
1738
u32 num_ingress_ae = 0;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
1739
u32 ingress_msk = 0;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
1740
u32 i, j, ae_mask;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
1776
u32 num_au = hw_data->get_num_accel_units(hw_data);
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
178
static u32
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
1783
u32 i;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
1826
u32 num_au = hw_data->get_num_accel_units(hw_data);
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
184
static u32
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
1905
u32 num_au = hw_data->get_num_accel_units(hw_data);
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
191
c4xxx_unpack_ssm_wdtimer(u64 value, u32 *upper, u32 *lower)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
1928
u32 global_clk_enable = ADF_C4XXX_GLOBAL_CLK_ENABLE_GENERIC_ARAM |
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
1932
u32 ixp_reset_generic = ADF_C4XXX_IXP_RESET_GENERIC_ARAM |
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
2031
u32 capabilities = GET_HW_DATA(accel_dev)->accel_capabilities_mask;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
2061
u32 srv = 0;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
2062
u32 max_srv_id = 0;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
2078
u32 ae_mask = 0;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
2080
u32 num_au = hw_data->get_num_accel_units(hw_data);
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
2082
u32 i = 0;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
2099
u32 num_aes = hw_data->get_num_aes(hw_data);
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
2100
u32 reg = 0x0;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
2101
u32 i;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
211
u32 accel = 0;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
214
u32 ssm_wdt_low = 0, ssm_wdt_high = 0;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
215
u32 ssm_wdt_pke_low = 0, ssm_wdt_pke_high = 0;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
253
u32 slice_hang_offset;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
254
u32 ia_slice_hang_offset;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
255
u32 fw_irq_source;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
256
u32 ia_irq_source;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
257
u32 accel_num = 0;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
259
u32 errsou10 = ADF_CSR_RD(csr, ADF_C4XXX_ERRSOU10);
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
320
u32 errsou11 = ADF_CSR_RD(csr, ADF_C4XXX_ERRSOU11);
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
321
u32 doorbell_int = ADF_CSR_RD(csr, ADF_C4XXX_ETH_DOORBELL_INT);
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
322
u32 eth_doorbell_reg[ADF_C4XXX_NUM_ETH_DOORBELL_REGS];
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
324
u32 data_reg;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
364
u32 capabilities = self->accel_capabilities_mask;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
397
u32 fusectl0 = 0;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
411
u32 legfuse = 0;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
426
u32 accel = 0;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
446
u32 accel = 0;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
460
static u32
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
472
u32 accel = 0;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
627
get_errsou_offset(u32 *errsou3, u32 *errsou5)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
691
static u32
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
701
u32 frequency;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
726
static u32
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
730
u32 legfuses;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
731
u32 softstrappull0, softstrappull2;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
732
u32 fusectl0, fusectl2;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
733
u32 capabilities;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
857
u32 disabled_caps = 0;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
887
u32 sadb_reg_value = 0;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
914
u32 offset)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
220
#define ADF_C4XXX_SSM_CMD_PAR_ERR(value) (((u32)(value) >> 6) & 0xFFF)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.c
1080
u32 rf_par_addr,
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.c
1081
u32 rf_par_msk,
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.c
1082
u32 offset,
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.c
1085
u32 reg_val;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.c
1126
u32 offset,
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.c
1144
u32 offset,
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.c
1195
u32 offset,
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.c
1198
u32 reg_val;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.c
1239
u32 csr_offset,
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.c
1271
u32 errsou,
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.c
1314
u32 errsou = 0;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.c
1317
u32 num_accels = hw_data->get_num_accels(hw_data);
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.c
184
u32 iastatssm,
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.c
185
u32 accel_num)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.c
276
u32 statssm,
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.c
277
u32 accel_num)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.c
359
u32 mecorrerr = ADF_CSR_RD(pmisc, ADF_C4XXX_HI_ME_COR_ERRLOG);
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.c
382
u32 me_uncorr_err = ADF_CSR_RD(pmisc, ADF_C4XXX_HI_ME_UNCERR_LOG);
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.c
407
u32 ri_mem_par_err_sts = 0;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.c
408
u32 ri_mem_par_err_ferr = 0;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.c
441
u32 ti_mem_par_err_sts0 = 0;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.c
442
u32 ti_mem_par_err_sts1 = 0;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.c
443
u32 ti_mem_par_err_ferr = 0;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.c
479
u32 host_cpp_par_err = 0;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.c
514
u32 errsou,
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.c
545
u32 accel)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.c
547
u32 exprpssmcpr;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.c
585
u32 accel)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.c
587
u32 exprpssmxlt;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.c
625
u32 accel,
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.c
638
u32 accel,
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.c
641
u32 i;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.c
642
u32 statssm = ADF_CSR_RD(pmisc, ADF_INTSTATSSM(accel));
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.c
643
u32 iastatssm = ADF_CSR_RD(pmisc, ADF_C4XXX_IAINTSTATSSM(accel));
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.c
689
u32 errsou,
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.c
690
u32 num_accels,
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.c
708
u32 ti_misc_sts = 0;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.c
709
u32 err_type = 0;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.c
741
u32 ri_cpp_int_sts = 0;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.c
742
u32 err_clear_mask = 0;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.c
777
u32 ti_cpp_int_sts = 0;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.c
778
u32 err_clear_mask = 0;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.c
813
u32 aram_cerr = 0;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.c
833
u32 aram_uerr = 0;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.c
853
u32 ti_cpp_int_sts = 0;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.c
876
u32 ri_cpp_int_sts = 0;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.c
897
u32 offset,
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.c
929
u32 offset,
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.c
932
u32 reg_val = 0;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.c
956
u32 offset,
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_res_part.c
100
adf_enable_dc_threads(struct adf_accel_dev *accel_dev, u32 ae, u32 partition)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_res_part.c
104
u32 num_dc_thds = ae_info[ae].num_dc_thd;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_res_part.c
105
u32 i;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_res_part.c
106
u32 part_group = partition / ADF_C4XXX_PARTS_PER_GRP;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_res_part.c
107
u32 wkrthd2_partmap = part_group << ADF_C4XXX_PARTS_PER_GRP |
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_res_part.c
127
u32 i;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_res_part.c
129
u32 partitions_mask = 0;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_res_part.c
15
adf_get_partitions_mask(struct adf_accel_dev *accel_dev, u32 *partitions_mask)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_res_part.c
171
u32 i;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_res_part.c
18
u32 enabled_partitions_msk = 0;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_res_part.c
189
if (!test_bit((u32)(i / ADF_NUM_THREADS_PER_AE), &ae_mask))
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_res_part.c
62
adf_enable_sym_threads(struct adf_accel_dev *accel_dev, u32 ae, u32 partition)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_res_part.c
66
u32 num_sym_thds = ae_info[ae].num_sym_thd;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_res_part.c
67
u32 i;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_res_part.c
68
u32 part_group = partition / ADF_C4XXX_PARTS_PER_GRP;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_res_part.c
69
u32 wkrthd2_partmap = part_group << ADF_C4XXX_PARTS_PER_GRP |
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_res_part.c
80
adf_enable_asym_threads(struct adf_accel_dev *accel_dev, u32 ae, u32 partition)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_res_part.c
84
u32 num_asym_thds = ae_info[ae].num_asym_thd;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_res_part.c
85
u32 i;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_res_part.c
86
u32 part_group = partition / ADF_C4XXX_PARTS_PER_GRP;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_res_part.c
87
u32 wkrthd2_partmap = part_group << ADF_C4XXX_PARTS_PER_GRP |
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_res_part.c
90
u32 num_all_thds = ADF_NUM_THREADS_PER_AE - 2;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_reset.c
58
u32 pmisclbar1;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_reset.c
59
u32 pmisclbar2;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_reset.c
60
u32 pmiscubar1;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_reset.c
61
u32 pmiscubar2;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_reset.c
9
u32 uncorr_err;
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.c
105
static u32
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.c
111
static u32
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.c
132
u32 const **arb_map_config)
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.c
16
static const u32 thrd_to_arb_map[ADF_C62X_MAX_ACCELENGINES] =
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.c
167
get_errsou_offset(u32 *errsou3, u32 *errsou5)
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.c
173
static u32
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.c
22
static u32 thrd_to_arb_map_gen[ADF_C62X_MAX_ACCELENGINES] = { 0 };
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.c
228
static u32
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.c
254
u32 frequency;
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.c
268
static u32
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.c
272
u32 legfuses;
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.c
273
u32 capabilities;
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.c
274
u32 straps;
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.c
276
u32 fuses = hw_data->fuses;
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.c
28
static u32
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.c
33
u32 fuse;
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.c
34
u32 straps;
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.c
43
static u32
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.c
47
u32 fuse;
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.c
48
u32 me_straps;
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.c
49
u32 me_disable;
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.c
50
u32 ssms_disabled;
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.c
69
static u32
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.c
72
u32 i, ctr = 0;
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.c
84
static u32
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.c
87
u32 i, ctr = 0;
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.c
99
static u32
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.c
127
u32 const **arb_map_config)
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.c
16
static const u32 thrd_to_arb_map_sku4[] =
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.c
180
get_errsou_offset(u32 *errsou3, u32 *errsou5)
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.c
186
static u32
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.c
20
static const u32 thrd_to_arb_map_sku6[] =
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.c
24
static const u32 thrd_to_arb_map_sku3[] =
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.c
247
static u32
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.c
257
get_storage_enabled(struct adf_accel_dev *accel_dev, u32 *storage_enabled)
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.c
270
static u32
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.c
274
u32 legfuses;
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.c
275
u32 capabilities;
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.c
28
static u32 thrd_to_arb_map_gen[ADF_DH895XCC_MAX_ACCELENGINES] = { 0 };
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.c
310
static u32
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.c
316
static u32
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.c
33
static u32
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.c
37
u32 fuse;
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.c
45
static u32
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.c
49
u32 fuse;
sys/dev/qlnx/qlnxe/bcm_osal.h
224
static inline void OSAL_DCBX_AEN(void *p_hwfn, u32 mib_type)
sys/dev/qlnx/qlnxe/bcm_osal.h
466
static inline u32
sys/dev/qlnx/qlnxe/bcm_osal.h
467
OSAL_CRC32(u32 crc, u8 *ptr, u32 length)
sys/dev/qlnx/qlnxe/ecore.h
1007
int ecore_configure_vport_wfq(struct ecore_dev *p_dev, u16 vp_id, u32 rate);
sys/dev/qlnx/qlnxe/ecore.h
1010
u32 min_pf_rate);
sys/dev/qlnx/qlnxe/ecore.h
1031
u16 ecore_get_cm_pq_idx(struct ecore_hwfn *p_hwfn, u32 pq_flags);
sys/dev/qlnx/qlnxe/ecore.h
1068
struct ecore_ptt *p_ptt, u32 addr,
sys/dev/qlnx/qlnxe/ecore.h
1069
u32 val);
sys/dev/qlnx/qlnxe/ecore.h
129
static OSAL_INLINE u32 DB_ADDR(u32 cid, u32 DEMS)
sys/dev/qlnx/qlnxe/ecore.h
131
u32 db_addr = FIELD_VALUE(DB_LEGACY_ADDR_DEMS, DEMS) |
sys/dev/qlnx/qlnxe/ecore.h
137
static OSAL_INLINE u32 DB_ADDR_VF(u32 cid, u32 DEMS)
sys/dev/qlnx/qlnxe/ecore.h
139
u32 db_addr = FIELD_VALUE(DB_LEGACY_ADDR_DEMS, DEMS) |
sys/dev/qlnx/qlnxe/ecore.h
146
((sizeof(type_name) + (u32)(1<<(p_hwfn->p_dev->cache_shift))-1) & \
sys/dev/qlnx/qlnxe/ecore.h
151
#define U64_HI(val) ((u32)(((u64)(val)) >> 32))
sys/dev/qlnx/qlnxe/ecore.h
155
#define U64_LO(val) ((u32)(((u64)(val)) & 0xffffffff))
sys/dev/qlnx/qlnxe/ecore.h
271
u32 *init_val;
sys/dev/qlnx/qlnxe/ecore.h
333
u32 cids;
sys/dev/qlnx/qlnxe/ecore.h
334
u32 vf_cids;
sys/dev/qlnx/qlnxe/ecore.h
335
u32 tids;
sys/dev/qlnx/qlnxe/ecore.h
457
u32 resc_start[ECORE_MAX_RESC];
sys/dev/qlnx/qlnxe/ecore.h
458
u32 resc_num[ECORE_MAX_RESC];
sys/dev/qlnx/qlnxe/ecore.h
459
u32 feat_num[ECORE_MAX_FEATURES];
sys/dev/qlnx/qlnxe/ecore.h
476
u32 concrete_fid;
sys/dev/qlnx/qlnxe/ecore.h
479
u32 part_num[4];
sys/dev/qlnx/qlnxe/ecore.h
493
u32 port_mode;
sys/dev/qlnx/qlnxe/ecore.h
494
u32 hw_mode;
sys/dev/qlnx/qlnxe/ecore.h
523
u32 *p_completion_word;
sys/dev/qlnx/qlnxe/ecore.h
531
u32 *p_intermediate_buffer;
sys/dev/qlnx/qlnxe/ecore.h
538
u32 default_min_speed; /* When wfq feature is not configured */
sys/dev/qlnx/qlnxe/ecore.h
539
u32 min_speed; /* when feature is configured for any 1 vport */
sys/dev/qlnx/qlnxe/ecore.h
567
u32 pf_rl;
sys/dev/qlnx/qlnxe/ecore.h
575
u32 db_recovery_counter;
sys/dev/qlnx/qlnxe/ecore.h
579
u32 address;
sys/dev/qlnx/qlnxe/ecore.h
580
u32 len;
sys/dev/qlnx/qlnxe/ecore.h
589
const u32 *arr_data;
sys/dev/qlnx/qlnxe/ecore.h
590
u32 init_ops_size;
sys/dev/qlnx/qlnxe/ecore.h
658
u32 dp_module;
sys/dev/qlnx/qlnxe/ecore.h
722
u32 rdma_prs_search_reg;
sys/dev/qlnx/qlnxe/ecore.h
753
u32 dpi_size;
sys/dev/qlnx/qlnxe/ecore.h
754
u32 dpi_count;
sys/dev/qlnx/qlnxe/ecore.h
755
u32 dpi_start_offset; /* this is used to
sys/dev/qlnx/qlnxe/ecore.h
789
u32 dp_module;
sys/dev/qlnx/qlnxe/ecore.h
886
u32 int_mode;
sys/dev/qlnx/qlnxe/ecore.h
934
u32 drv_type;
sys/dev/qlnx/qlnxe/ecore.h
936
u32 rdma_max_sge;
sys/dev/qlnx/qlnxe/ecore.h
937
u32 rdma_max_inline;
sys/dev/qlnx/qlnxe/ecore.h
938
u32 rdma_max_srq_sge;
sys/dev/qlnx/qlnxe/ecore.h
944
u32 mcp_nvm_resp;
sys/dev/qlnx/qlnxe/ecore.h
989
static OSAL_INLINE u8 ecore_concrete_to_sw_fid(u32 concrete_fid)
sys/dev/qlnx/qlnxe/ecore_chain.h
125
u32 capacity;
sys/dev/qlnx/qlnxe/ecore_chain.h
126
u32 page_cnt;
sys/dev/qlnx/qlnxe/ecore_chain.h
161
u32 size;
sys/dev/qlnx/qlnxe/ecore_chain.h
181
((u32) (ELEMS_PER_PAGE(elem_size) - \
sys/dev/qlnx/qlnxe/ecore_chain.h
198
static OSAL_INLINE u32 ecore_chain_get_prod_idx_u32(struct ecore_chain *p_chain)
sys/dev/qlnx/qlnxe/ecore_chain.h
211
static OSAL_INLINE u32 ecore_chain_get_cons_idx_u32(struct ecore_chain *p_chain)
sys/dev/qlnx/qlnxe/ecore_chain.h
223
#define ECORE_U32_MAX ((u32)~0U)
sys/dev/qlnx/qlnxe/ecore_chain.h
231
used = (u16)(((u32)ECORE_U16_MAX + 1 +
sys/dev/qlnx/qlnxe/ecore_chain.h
232
(u32)(p_chain->u.chain16.prod_idx)) -
sys/dev/qlnx/qlnxe/ecore_chain.h
233
(u32)p_chain->u.chain16.cons_idx);
sys/dev/qlnx/qlnxe/ecore_chain.h
235
used -= (((u32)ECORE_U16_MAX + 1) / p_chain->elem_per_page +
sys/dev/qlnx/qlnxe/ecore_chain.h
243
static OSAL_INLINE u32
sys/dev/qlnx/qlnxe/ecore_chain.h
246
u32 used;
sys/dev/qlnx/qlnxe/ecore_chain.h
250
used = (u32)(((u64)ECORE_U32_MAX + 1 +
sys/dev/qlnx/qlnxe/ecore_chain.h
301
static OSAL_INLINE u32 ecore_chain_get_size(struct ecore_chain *p_chain)
sys/dev/qlnx/qlnxe/ecore_chain.h
307
static OSAL_INLINE u32 ecore_chain_get_page_cnt(struct ecore_chain *p_chain)
sys/dev/qlnx/qlnxe/ecore_chain.h
333
u32 page_index = 0;
sys/dev/qlnx/qlnxe/ecore_chain.h
342
*(u32 *)idx_to_inc += (u16)p_chain->elem_unusable;
sys/dev/qlnx/qlnxe/ecore_chain.h
353
if (++(*(u32 *)page_to_inc) == p_chain->page_cnt)
sys/dev/qlnx/qlnxe/ecore_chain.h
354
*(u32 *)page_to_inc = 0;
sys/dev/qlnx/qlnxe/ecore_chain.h
355
page_index = *(u32 *)page_to_inc;
sys/dev/qlnx/qlnxe/ecore_chain.h
395
void ecore_chain_return_multi_produced(struct ecore_chain *p_chain, u32 num)
sys/dev/qlnx/qlnxe/ecore_chain.h
476
static OSAL_INLINE u32 ecore_chain_get_capacity(struct ecore_chain *p_chain)
sys/dev/qlnx/qlnxe/ecore_chain.h
551
u32 i;
sys/dev/qlnx/qlnxe/ecore_chain.h
569
u32 reset_val = p_chain->page_cnt - 1;
sys/dev/qlnx/qlnxe/ecore_chain.h
609
ecore_chain_init_params(struct ecore_chain *p_chain, u32 page_cnt, u8 elem_size,
sys/dev/qlnx/qlnxe/ecore_chain.h
700
u32 size;
sys/dev/qlnx/qlnxe/ecore_chain.h
723
u32 size, last_page_idx;
sys/dev/qlnx/qlnxe/ecore_chain.h
74
u32 prod_page_idx;
sys/dev/qlnx/qlnxe/ecore_chain.h
75
u32 cons_page_idx;
sys/dev/qlnx/qlnxe/ecore_chain.h
761
u32 prod_idx, void *p_prod_elem)
sys/dev/qlnx/qlnxe/ecore_chain.h
768
u32 elem_idx =
sys/dev/qlnx/qlnxe/ecore_chain.h
770
u32 page_idx = elem_idx / p_chain->elem_per_page;
sys/dev/qlnx/qlnxe/ecore_chain.h
792
u32 cons_idx, void *p_cons_elem)
sys/dev/qlnx/qlnxe/ecore_chain.h
799
u32 elem_idx =
sys/dev/qlnx/qlnxe/ecore_chain.h
801
u32 page_idx = elem_idx / p_chain->elem_per_page;
sys/dev/qlnx/qlnxe/ecore_chain.h
824
u32 i, page_cnt;
sys/dev/qlnx/qlnxe/ecore_chain.h
837
u32 buffer_size, u32 *element_indx, u32 stop_indx,
sys/dev/qlnx/qlnxe/ecore_chain.h
92
u32 prod_idx;
sys/dev/qlnx/qlnxe/ecore_chain.h
93
u32 cons_idx;
sys/dev/qlnx/qlnxe/ecore_cxt.c
1002
u32 size = OSAL_MIN_T(u32, total_size, psz);
sys/dev/qlnx/qlnxe/ecore_cxt.c
1030
u32 ent_num = OSAL_MIN_T(u32, ent_per_page, conn_num);
sys/dev/qlnx/qlnxe/ecore_cxt.c
1033
u32 j;
sys/dev/qlnx/qlnxe/ecore_cxt.c
1064
static u32 ecore_cxt_ilt_shadow_size(struct ecore_ilt_client_cfg *ilt_clients)
sys/dev/qlnx/qlnxe/ecore_cxt.c
1066
u32 size = 0;
sys/dev/qlnx/qlnxe/ecore_cxt.c
1067
u32 i;
sys/dev/qlnx/qlnxe/ecore_cxt.c
1080
u32 ilt_size, i;
sys/dev/qlnx/qlnxe/ecore_cxt.c
1104
u32 start_line_offset)
sys/dev/qlnx/qlnxe/ecore_cxt.c
1107
u32 lines, line, sz_left, lines_to_skip = 0;
sys/dev/qlnx/qlnxe/ecore_cxt.c
1128
u32 size;
sys/dev/qlnx/qlnxe/ecore_cxt.c
1130
size = OSAL_MIN_T(u32, sz_left, p_blk->real_size_in_page);
sys/dev/qlnx/qlnxe/ecore_cxt.c
1157
u32 size, i, j, k;
sys/dev/qlnx/qlnxe/ecore_cxt.c
1172
(u32)(size * sizeof(struct ecore_dma_mem)));
sys/dev/qlnx/qlnxe/ecore_cxt.c
1183
u32 lines = clients[i].vf_total_lines * k;
sys/dev/qlnx/qlnxe/ecore_cxt.c
1204
u32 type, vf;
sys/dev/qlnx/qlnxe/ecore_cxt.c
1223
ecore_cid_map_alloc_single(struct ecore_hwfn *p_hwfn, u32 type,
sys/dev/qlnx/qlnxe/ecore_cxt.c
1224
u32 cid_start, u32 cid_count,
sys/dev/qlnx/qlnxe/ecore_cxt.c
1227
u32 size;
sys/dev/qlnx/qlnxe/ecore_cxt.c
1250
u32 start_cid = 0, vf_start_cid = 0;
sys/dev/qlnx/qlnxe/ecore_cxt.c
1251
u32 type, vf;
sys/dev/qlnx/qlnxe/ecore_cxt.c
1288
u32 i;
sys/dev/qlnx/qlnxe/ecore_cxt.c
129
u32 count;
sys/dev/qlnx/qlnxe/ecore_cxt.c
135
u32 cid_count;
sys/dev/qlnx/qlnxe/ecore_cxt.c
136
u32 cids_per_vf;
sys/dev/qlnx/qlnxe/ecore_cxt.c
1398
u32 len;
sys/dev/qlnx/qlnxe/ecore_cxt.c
1402
u32 vf;
sys/dev/qlnx/qlnxe/ecore_cxt.c
1491
u32 page_sz, elems_per_page, block_waste, cxt_size, cdu_params = 0;
sys/dev/qlnx/qlnxe/ecore_cxt.c
1501
SET_FIELD(cdu_params, (u32)CDUC_NCIB, elems_per_page);
sys/dev/qlnx/qlnxe/ecore_cxt.c
1512
SET_FIELD(cdu_params, (u32)CDUT_TYPE0_CXT_SIZE, (cxt_size >> 3));
sys/dev/qlnx/qlnxe/ecore_cxt.c
1524
SET_FIELD(cdu_params, (u32)CDUT_TYPE1_CXT_SIZE, (cxt_size >> 3));
sys/dev/qlnx/qlnxe/ecore_cxt.c
153
u32 reg;
sys/dev/qlnx/qlnxe/ecore_cxt.c
154
u32 val;
sys/dev/qlnx/qlnxe/ecore_cxt.c
1540
u32 cdu_seg_params, offset;
sys/dev/qlnx/qlnxe/ecore_cxt.c
1543
static const u32 rt_type_offset_arr[] = {
sys/dev/qlnx/qlnxe/ecore_cxt.c
1550
static const u32 rt_type_offset_fl_arr[] = {
sys/dev/qlnx/qlnxe/ecore_cxt.c
158
u32 total_size; /* 0 means not active */
sys/dev/qlnx/qlnxe/ecore_cxt.c
159
u32 real_size_in_page;
sys/dev/qlnx/qlnxe/ecore_cxt.c
160
u32 start_line;
sys/dev/qlnx/qlnxe/ecore_cxt.c
161
u32 dynamic_line_cnt;
sys/dev/qlnx/qlnxe/ecore_cxt.c
1629
u32 dq_pf_max_cid = 0, dq_vf_max_cid = 0;
sys/dev/qlnx/qlnxe/ecore_cxt.c
1702
u32 blk_factor;
sys/dev/qlnx/qlnxe/ecore_cxt.c
174
u32 pf_total_lines;
sys/dev/qlnx/qlnxe/ecore_cxt.c
1765
u32 line, rt_offst, i;
sys/dev/qlnx/qlnxe/ecore_cxt.c
178
u32 vf_total_lines;
sys/dev/qlnx/qlnxe/ecore_cxt.c
1810
u32 rounded_conn_num, conn_num, conn_max;
sys/dev/qlnx/qlnxe/ecore_cxt.c
1819
conn_max = OSAL_MAX_T(u32, conn_num, SRC_MIN_NUM_ELEMS);
sys/dev/qlnx/qlnxe/ecore_cxt.c
1854
u32 active_seg_mask = 0, tm_offset, rt_reg;
sys/dev/qlnx/qlnxe/ecore_cxt.c
1873
(sizeof(cfg_word) / sizeof(u32)) *
sys/dev/qlnx/qlnxe/ecore_cxt.c
1885
(sizeof(cfg_word) / sizeof(u32)) *
sys/dev/qlnx/qlnxe/ecore_cxt.c
1907
(sizeof(cfg_word) / sizeof(u32)) *
sys/dev/qlnx/qlnxe/ecore_cxt.c
1923
(sizeof(cfg_word) / sizeof(u32)) *
sys/dev/qlnx/qlnxe/ecore_cxt.c
196
u32 start_cid;
sys/dev/qlnx/qlnxe/ecore_cxt.c
197
u32 max_count;
sys/dev/qlnx/qlnxe/ecore_cxt.c
1993
u32 *p_cid, u8 vfid)
sys/dev/qlnx/qlnxe/ecore_cxt.c
1997
u32 rel_cid;
sys/dev/qlnx/qlnxe/ecore_cxt.c
2042
u32 *p_cid)
sys/dev/qlnx/qlnxe/ecore_cxt.c
2048
u32 cid, u8 vfid,
sys/dev/qlnx/qlnxe/ecore_cxt.c
2053
u32 rel_cid;
sys/dev/qlnx/qlnxe/ecore_cxt.c
2089
void _ecore_cxt_release_cid(struct ecore_hwfn *p_hwfn, u32 cid, u8 vfid)
sys/dev/qlnx/qlnxe/ecore_cxt.c
209
u32 task_type_size[NUM_TASK_TYPES];
sys/dev/qlnx/qlnxe/ecore_cxt.c
2094
u32 rel_cid;
sys/dev/qlnx/qlnxe/ecore_cxt.c
2118
void ecore_cxt_release_cid(struct ecore_hwfn *p_hwfn, u32 cid)
sys/dev/qlnx/qlnxe/ecore_cxt.c
2128
u32 conn_cxt_size, hw_p_size, cxts_per_p, line;
sys/dev/qlnx/qlnxe/ecore_cxt.c
214
u32 vf_count;
sys/dev/qlnx/qlnxe/ecore_cxt.c
2166
u32 num_tasks)
sys/dev/qlnx/qlnxe/ecore_cxt.c
2168
u32 num_cons, num_qps;
sys/dev/qlnx/qlnxe/ecore_cxt.c
2199
num_cons = OSAL_MIN_T(u32, IWARP_MAX_QPS, p_params->num_qps);
sys/dev/qlnx/qlnxe/ecore_cxt.c
2207
num_qps = OSAL_MIN_T(u32, ROCE_MAX_QPS, p_params->num_qps);
sys/dev/qlnx/qlnxe/ecore_cxt.c
2216
u32 num_srqs, num_xrc_srqs, max_xrc_srqs, page_size;
sys/dev/qlnx/qlnxe/ecore_cxt.c
223
u32 pf_start_line;
sys/dev/qlnx/qlnxe/ecore_cxt.c
2230
num_srqs = OSAL_MIN_T(u32, ECORE_RDMA_MAX_SRQS,
sys/dev/qlnx/qlnxe/ecore_cxt.c
2236
max_xrc_srqs = OSAL_MIN_T(u32, max_xrc_srqs, ECORE_RDMA_MAX_XRC_SRQS);
sys/dev/qlnx/qlnxe/ecore_cxt.c
2238
num_xrc_srqs = OSAL_MIN_T(u32, p_params->num_xrc_srqs,
sys/dev/qlnx/qlnxe/ecore_cxt.c
2249
u32 rdma_tasks)
sys/dev/qlnx/qlnxe/ecore_cxt.c
2252
u32 core_cids = 1; /* SPQ */
sys/dev/qlnx/qlnxe/ecore_cxt.c
2272
u32 count = 0;
sys/dev/qlnx/qlnxe/ecore_cxt.c
230
u32 t2_num_pages;
sys/dev/qlnx/qlnxe/ecore_cxt.c
2344
u32 proto, seg, total_lines, i, shadow_line;
sys/dev/qlnx/qlnxe/ecore_cxt.c
2396
u32 iid)
sys/dev/qlnx/qlnxe/ecore_cxt.c
2398
u32 reg_offset, shadow_line, elem_size, hw_p_size, elems_per_p, line;
sys/dev/qlnx/qlnxe/ecore_cxt.c
245
u32 srq_count;
sys/dev/qlnx/qlnxe/ecore_cxt.c
246
u32 xrc_srq_count;
sys/dev/qlnx/qlnxe/ecore_cxt.c
2479
u32 elem_i;
sys/dev/qlnx/qlnxe/ecore_cxt.c
249
u32 arfs_count;
sys/dev/qlnx/qlnxe/ecore_cxt.c
2508
reg_offset, sizeof(ilt_hw_entry) / sizeof(u32),
sys/dev/qlnx/qlnxe/ecore_cxt.c
2512
u32 last_cid_allocated = (1 + (iid / elems_per_p)) *
sys/dev/qlnx/qlnxe/ecore_cxt.c
2548
u32 start_iid, u32 count)
sys/dev/qlnx/qlnxe/ecore_cxt.c
2550
u32 start_line, end_line, shadow_start_line, shadow_end_line;
sys/dev/qlnx/qlnxe/ecore_cxt.c
2551
u32 reg_offset, elem_size, hw_p_size, elems_per_p;
sys/dev/qlnx/qlnxe/ecore_cxt.c
2554
u32 end_iid = start_iid + count;
sys/dev/qlnx/qlnxe/ecore_cxt.c
2557
u32 i;
sys/dev/qlnx/qlnxe/ecore_cxt.c
2622
sizeof(ilt_hw_entry) / sizeof(u32),
sys/dev/qlnx/qlnxe/ecore_cxt.c
2632
u32 tid,
sys/dev/qlnx/qlnxe/ecore_cxt.c
2640
u32 num_tids_per_block;
sys/dev/qlnx/qlnxe/ecore_cxt.c
2641
u32 tid_size, ilt_idx;
sys/dev/qlnx/qlnxe/ecore_cxt.c
2642
u32 total_lines;
sys/dev/qlnx/qlnxe/ecore_cxt.c
2643
u32 proto, seg;
sys/dev/qlnx/qlnxe/ecore_cxt.c
277
u32 pf_cids;
sys/dev/qlnx/qlnxe/ecore_cxt.c
278
u32 per_vf_cids;
sys/dev/qlnx/qlnxe/ecore_cxt.c
284
u32 type;
sys/dev/qlnx/qlnxe/ecore_cxt.c
294
u32 pf_cids;
sys/dev/qlnx/qlnxe/ecore_cxt.c
295
u32 per_vf_cids;
sys/dev/qlnx/qlnxe/ecore_cxt.c
301
u32 i;
sys/dev/qlnx/qlnxe/ecore_cxt.c
317
u32 pf_cids;
sys/dev/qlnx/qlnxe/ecore_cxt.c
318
u32 pf_tids[NUM_TASK_PF_SEGMENTS]; /* per segment */
sys/dev/qlnx/qlnxe/ecore_cxt.c
319
u32 pf_tids_total;
sys/dev/qlnx/qlnxe/ecore_cxt.c
320
u32 per_vf_cids;
sys/dev/qlnx/qlnxe/ecore_cxt.c
321
u32 per_vf_tids;
sys/dev/qlnx/qlnxe/ecore_cxt.c
386
u32 vf_cids = 0, type, j;
sys/dev/qlnx/qlnxe/ecore_cxt.c
387
u32 vf_tids = 0;
sys/dev/qlnx/qlnxe/ecore_cxt.c
416
u32 seg)
sys/dev/qlnx/qlnxe/ecore_cxt.c
419
u32 i;
sys/dev/qlnx/qlnxe/ecore_cxt.c
432
u32 num_srqs, u32 num_xrc_srqs)
sys/dev/qlnx/qlnxe/ecore_cxt.c
440
u32 ecore_cxt_get_srq_count(struct ecore_hwfn *p_hwfn)
sys/dev/qlnx/qlnxe/ecore_cxt.c
445
u32 ecore_cxt_get_xrc_srq_count(struct ecore_hwfn *p_hwfn)
sys/dev/qlnx/qlnxe/ecore_cxt.c
450
u32 ecore_cxt_get_ilt_page_size(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_cxt.c
459
static u32 ecore_cxt_srqs_per_page(struct ecore_hwfn *p_hwfn)
sys/dev/qlnx/qlnxe/ecore_cxt.c
461
u32 page_size;
sys/dev/qlnx/qlnxe/ecore_cxt.c
467
u32 ecore_cxt_get_total_srq_count(struct ecore_hwfn *p_hwfn)
sys/dev/qlnx/qlnxe/ecore_cxt.c
470
u32 total_srqs;
sys/dev/qlnx/qlnxe/ecore_cxt.c
488
u32 cid_count, u32 vf_cid_cnt)
sys/dev/qlnx/qlnxe/ecore_cxt.c
497
u32 page_sz = p_mgr->clients[ILT_CLI_CDUC].p_size.val;
sys/dev/qlnx/qlnxe/ecore_cxt.c
498
u32 cxt_size = CONN_CXT_SIZE(p_hwfn);
sys/dev/qlnx/qlnxe/ecore_cxt.c
499
u32 elems_per_page = ILT_PAGE_IN_BYTES(page_sz) / cxt_size;
sys/dev/qlnx/qlnxe/ecore_cxt.c
500
u32 align = elems_per_page * DQ_RANGE_ALIGN;
sys/dev/qlnx/qlnxe/ecore_cxt.c
506
u32 ecore_cxt_get_proto_cid_count(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_cxt.c
508
u32 *vf_cid)
sys/dev/qlnx/qlnxe/ecore_cxt.c
516
u32 ecore_cxt_get_proto_cid_start(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_cxt.c
522
u32 ecore_cxt_get_proto_tid_count(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_cxt.c
525
u32 cnt = 0;
sys/dev/qlnx/qlnxe/ecore_cxt.c
538
u32 count,
sys/dev/qlnx/qlnxe/ecore_cxt.c
554
u32 start_line,
sys/dev/qlnx/qlnxe/ecore_cxt.c
555
u32 total_size,
sys/dev/qlnx/qlnxe/ecore_cxt.c
556
u32 elem_size)
sys/dev/qlnx/qlnxe/ecore_cxt.c
558
u32 ilt_size = ILT_PAGE_IN_BYTES(p_cli->p_size.val);
sys/dev/qlnx/qlnxe/ecore_cxt.c
574
u32 *p_line,
sys/dev/qlnx/qlnxe/ecore_cxt.c
594
static u32 ecore_ilt_get_dynamic_line_cnt(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_cxt.c
597
u32 cid_count = p_hwfn->p_cxt_mngr->conn_cfg[PROTOCOLID_ROCE].cid_count;
sys/dev/qlnx/qlnxe/ecore_cxt.c
599
u32 lines_to_skip = 0;
sys/dev/qlnx/qlnxe/ecore_cxt.c
600
u32 cxts_per_p;
sys/dev/qlnx/qlnxe/ecore_cxt.c
608
(u32)CONN_CXT_SIZE(p_hwfn);
sys/dev/qlnx/qlnxe/ecore_cxt.c
633
u32 *line_count)
sys/dev/qlnx/qlnxe/ecore_cxt.c
636
u32 curr_line, total, i, task_size, line;
sys/dev/qlnx/qlnxe/ecore_cxt.c
836
u32 local_max = OSAL_MAX_T(u32, total,
sys/dev/qlnx/qlnxe/ecore_cxt.c
907
u32 ecore_cxt_cfg_ilt_compute_excess(struct ecore_hwfn *p_hwfn, u32 used_lines)
sys/dev/qlnx/qlnxe/ecore_cxt.c
910
u32 excess_lines, available_lines;
sys/dev/qlnx/qlnxe/ecore_cxt.c
912
u32 ilt_page_size, elem_size;
sys/dev/qlnx/qlnxe/ecore_cxt.c
948
u32 i;
sys/dev/qlnx/qlnxe/ecore_cxt.c
967
u32 conn_num, total_size, ent_per_page, psz, i;
sys/dev/qlnx/qlnxe/ecore_cxt.h
177
void ecore_cxt_release_cid(struct ecore_hwfn *p_hwfn, u32 cid);
sys/dev/qlnx/qlnxe/ecore_cxt.h
187
u32 cid, u8 vfid);
sys/dev/qlnx/qlnxe/ecore_cxt.h
200
u32 *p_cid);
sys/dev/qlnx/qlnxe/ecore_cxt.h
215
u32 *p_cid, u8 vfid);
sys/dev/qlnx/qlnxe/ecore_cxt.h
231
u32 iid);
sys/dev/qlnx/qlnxe/ecore_cxt.h
245
u32 start_iid, u32 count);
sys/dev/qlnx/qlnxe/ecore_cxt.h
250
u32 tid,
sys/dev/qlnx/qlnxe/ecore_cxt.h
254
u32 ecore_cxt_get_ilt_page_size(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_cxt.h
257
u32 ecore_cxt_get_total_srq_count(struct ecore_hwfn *p_hwfn);
sys/dev/qlnx/qlnxe/ecore_cxt.h
58
u32 ecore_cxt_get_proto_cid_count(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_cxt.h
60
u32 *vf_cid);
sys/dev/qlnx/qlnxe/ecore_cxt.h
62
u32 ecore_cxt_get_proto_tid_count(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_cxt.h
65
u32 ecore_cxt_get_proto_cid_start(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_cxt.h
68
u32 ecore_cxt_get_srq_count(struct ecore_hwfn *p_hwfn);
sys/dev/qlnx/qlnxe/ecore_cxt.h
70
u32 ecore_cxt_get_xrc_srq_count(struct ecore_hwfn *p_hwfn);
sys/dev/qlnx/qlnxe/ecore_cxt.h
80
u32 rdma_tasks);
sys/dev/qlnx/qlnxe/ecore_cxt.h
91
u32 *last_line);
sys/dev/qlnx/qlnxe/ecore_cxt.h
99
u32 ecore_cxt_cfg_ilt_compute_excess(struct ecore_hwfn *p_hwfn, u32 used_lines);
sys/dev/qlnx/qlnxe/ecore_cxt_api.h
36
u32 iid;
sys/dev/qlnx/qlnxe/ecore_cxt_api.h
42
u32 tid_size;
sys/dev/qlnx/qlnxe/ecore_cxt_api.h
43
u32 num_tids_per_block;
sys/dev/qlnx/qlnxe/ecore_cxt_api.h
44
u32 waste;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
119
static u32 cond5(const u32 *r, const u32 *imm) {
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
123
static u32 cond7(const u32 *r, const u32 *imm) {
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
127
static u32 cond6(const u32 *r, const u32 *imm) {
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
131
static u32 cond9(const u32 *r, const u32 *imm) {
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
135
static u32 cond10(const u32 *r, const u32 *imm) {
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
139
static u32 cond4(const u32 *r, const u32 *imm) {
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
143
static u32 cond0(const u32 *r, const u32 *imm) {
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
147
static u32 cond1(const u32 *r, const u32 *imm) {
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
151
static u32 cond11(const u32 *r, const u32 *imm) {
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
155
static u32 cond12(const u32 *r, const u32 *imm) {
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
159
static u32 cond3(const u32 *r, const u32 OSAL_UNUSED *imm) {
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
163
static u32 cond13(const u32 *r, const u32 *imm) {
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
167
static u32 cond8(const u32 *r, const u32 *imm) {
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
171
static u32 cond2(const u32 *r, const u32 *imm) {
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
176
static u32 (*cond_arr[])(const u32 *r, const u32 *imm) = {
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
1783
static u32 s_app_ver;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
1804
static u32 ecore_read_unaligned_dword(u8 *buf)
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
1806
u32 dword;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
1816
static u32 ecore_phys_addr_diff(struct dbg_bus_mem_addr *a,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
1825
u32 val)
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
1833
static u32 ecore_grc_get_param(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
1932
u32 index;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
1957
u32 addr, i, *dest;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
1971
dest = (u32 *)&fw_info_location;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
1979
dest = (u32 *)fw_info;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
1988
static u32 ecore_dump_str(char *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
1995
return (u32)OSAL_STRLEN(str) + 1;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2001
static u32 ecore_dump_align(char *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2003
u32 byte_offset)
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2019
static u32 ecore_dump_str_param(u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2025
u32 offset = 0;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2047
static u32 ecore_dump_num_param(u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2050
u32 param_val)
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2053
u32 offset = 0;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2078
static u32 ecore_dump_fw_ver_param(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2080
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2087
u32 offset = 0;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2129
static u32 ecore_dump_mfw_ver_param(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2131
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2138
u32 public_data_addr, global_section_offsize_addr, global_section_offsize, global_section_addr, mfw_ver;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2164
static u32 ecore_dump_section_hdr(u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2167
u32 num_params)
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2175
static u32 ecore_dump_common_global_params(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2177
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2182
u32 offset = 0;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
220
u32 delay_factor;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2203
static u32 ecore_dump_last_section(u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2204
u32 offset,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2207
u32 start_offset = offset;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
221
u32 dmae_thresh;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
222
u32 log_thresh;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2226
u32 reg_val[MAX_DBG_RESET_REGS] = { 0 };
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2227
u32 i;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2254
u32 dbg_reset_reg_addr, old_reset_reg_val, new_reset_reg_val;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2277
u32 client_mask)
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2288
u32 base_addr, sem_filter_params = 0;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
233
u32 sem_fast_mem_addr;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
234
u32 sem_frame_mode_addr;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
235
u32 sem_slow_enable_addr;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2356
u32 block_id;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
236
u32 sem_slow_mode_addr;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
237
u32 sem_slow_mode1_conf_addr;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
238
u32 sem_sync_dbg_empty_addr;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2389
u32 polling_ms = SEMI_SYNC_FIFO_POLLING_DELAY_MS * s_platform_defs[dev_data->platform_id].delay_factor;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
239
u32 sem_slow_dbg_empty_addr;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2390
u32 polling_count = 0;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
240
u32 cm_ctx_wr_addr;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2406
u32 base_addr = storm->sem_fast_mem_addr;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
241
u32 cm_conn_ag_ctx_lid_size;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
242
u32 cm_conn_ag_ctx_rd_addr;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
243
u32 cm_conn_st_ctx_lid_size;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
244
u32 cm_conn_st_ctx_rd_addr;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2444
u32 data_val,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2445
u32 data_mask,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
245
u32 cm_task_ag_ctx_lid_size;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2454
u32 reg_offset = constraint_id * BYTES_IN_DWORD;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
246
u32 cm_task_ag_ctx_rd_addr;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
247
u32 cm_task_st_ctx_lid_size;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2477
static u32 ecore_bus_dump_int_buf_range(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2479
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
248
u32 cm_task_st_ctx_rd_addr;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2481
u32 start_line,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2482
u32 end_line)
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2484
u32 line, reg_addr, i, offset = 0;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2501
static u32 ecore_bus_dump_int_buf(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2503
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2506
u32 last_written_line, offset = 0;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2534
static u32 ecore_bus_dump_pci_buf_range(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2535
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2537
u32 start_line,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2538
u32 end_line)
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2541
u32 offset = 0;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2545
u32 *pci_buf_start = (u32 *)(osal_uintptr_t)*((u64 *)virt_addr_lo);
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2546
u32 *pci_buf, line, i;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2563
static u32 ecore_bus_dump_pci_buf(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2565
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2569
u32 next_wr_byte_offset, next_wr_line_offset;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2571
u32 pci_buf_size_in_lines, offset = 0;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
258
u32 storm_id;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2599
static u32 ecore_bus_dump_data(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
260
u32 dbg_select_addr;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2601
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
261
u32 dbg_enable_addr;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
262
u32 dbg_shift_addr;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2624
u32 *pci_buf;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2628
pci_buf = (u32 *)(osal_uintptr_t)*((u64 *)virt_addr_lo);
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
263
u32 dbg_force_valid_addr;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
264
u32 dbg_force_frame_addr;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2643
static u32 ecore_bus_dump_inputs(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2644
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2649
u32 block_id, offset = 0;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2690
static u32 ecore_bus_dump_hdr(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2692
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2697
u32 offset = 0;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2713
u32 recorded_dwords = 0;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
277
u32 addr;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
279
u32 unreset_val[MAX_CHIP_IDS];
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2835
u32 reg_addr;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2854
u32 reg_val[MAX_DBG_RESET_REGS] = { 0 };
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2855
u32 block_id, i;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2905
u32 block_id;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2937
static u32 ecore_grc_dump_regs_hdr(u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2939
u32 num_reg_entries,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2946
u32 offset = 0;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
296
u32 default_val[MAX_CHIP_IDS];
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2964
u32 *buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2965
u32 addr,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2966
u32 len)
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2968
u32 i;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
297
u32 min;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2978
static u32 ecore_grc_dump_addr_range(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
298
u32 max;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2980
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2982
u32 addr,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2983
u32 len,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
300
u32 exclude_all_preset_val;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
301
u32 crash_preset_val;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3015
static u32 ecore_grc_dump_reg_entry_hdr(u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3017
u32 addr,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3018
u32 len)
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3029
static u32 ecore_grc_dump_reg_entry(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3031
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3033
u32 addr,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3034
u32 len,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3037
u32 offset = 0;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3052
static u32 ecore_grc_dump_reg_entry_skip(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3054
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3056
u32 addr,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3057
u32 total_len,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3058
u32 read_len,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3059
u32 skip_len)
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3061
u32 offset = 0, reg_offset = 0;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3069
u32 curr_len = OSAL_MIN_T(u32, read_len, total_len - reg_offset);
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3076
curr_len = OSAL_MIN_T(u32, skip_len, total_len - skip_len);
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
308
u32 addr;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3088
static u32 ecore_grc_dump_regs_entries(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
309
u32 entry_width;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3091
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3094
u32 *num_dumped_reg_entries)
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3096
u32 i, offset = 0, input_offset = 0;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
310
u32 num_entries[MAX_CHIP_IDS];
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3133
static u32 ecore_grc_dump_split_data(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3136
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3140
u32 split_id,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3144
u32 num_dumped_reg_entries, offset;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
316
u32 base_row;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3162
static u32 ecore_grc_dump_registers(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3164
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
317
u32 num_rows;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3172
u32 offset = 0, input_offset = 0;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3180
u32 split_data_size;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3191
offset += ecore_grc_dump_split_data(p_hwfn, p_ptt, curr_input_regs_arr, dump_buf + offset, dump, block_enable, "eng", (u32)(-1), param_name, param_val);
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3234
static u32 ecore_grc_dump_reset_regs(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3236
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3240
u32 i, offset = 0, num_regs = 0;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
325
u32 addr_reg_addr;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
326
u32 data_reg_addr;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3264
static u32 ecore_grc_dump_modified_regs(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3266
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
327
u32 is_256b_reg_addr;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3270
u32 block_id, offset = 0, num_reg_entries = 0;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
328
u32 is_256b_bit_offset[MAX_CHIP_IDS];
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
329
u32 ram_size[MAX_CHIP_IDS]; /* In dwords */
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3322
static u32 ecore_grc_dump_special_regs(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3324
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3327
u32 offset = 0;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3352
static u32 ecore_grc_dump_mem_hdr(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3353
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3356
u32 addr,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3357
u32 len,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3358
u32 bit_width,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
336
u32 base_addr;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3365
u32 offset = 0;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
339
u32 tbus_addr_lo_addr;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3394
u32 addr_in_bytes = DWORDS_TO_BYTES(addr);
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
342
u32 tbus_addr_hi_addr;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3429
static u32 ecore_grc_dump_mem(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3431
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3434
u32 addr,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3435
u32 len,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3437
u32 bit_width,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3443
u32 offset = 0;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
345
u32 tbus_data_lo_addr;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3452
static u32 ecore_grc_dump_mem_entries(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3455
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3458
u32 i, offset = 0, input_offset = 0;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3464
u32 num_entries;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
348
u32 tbus_data_hi_addr;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3487
u32 mem_addr, mem_len;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3541
static u32 ecore_grc_dump_memories(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3543
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3546
u32 offset = 0, input_offset = 0;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3551
u32 split_data_size;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3580
static u32 ecore_grc_dump_ctx_data(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3582
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3585
u32 num_lids,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3586
u32 lid_size,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3587
u32 rd_reg_addr,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3591
u32 i, lid, total_size, offset = 0;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
360
#define BYTES_IN_DWORD sizeof(u32)
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3616
static u32 ecore_grc_dump_ctx(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3618
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3621
u32 offset = 0;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3651
static u32 ecore_grc_dump_iors(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3653
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3657
u32 addr, offset = 0;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3677
static u32 ecore_grc_dump_vfc_cam(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3679
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3683
u32 total_size = VFC_CAM_NUM_ROWS * VFC_CAM_RESP_DWORDS;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3685
u32 cam_addr[VFC_CAM_ADDR_DWORDS] = { 0 };
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3686
u32 cam_cmd[VFC_CAM_CMD_DWORDS] = { 0 };
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3687
u32 row, i, offset = 0;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3713
static u32 ecore_grc_dump_vfc_ram(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3715
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3720
u32 total_size = ram_defs->num_rows * VFC_RAM_RESP_DWORDS;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3722
u32 ram_addr[VFC_RAM_ADDR_DWORDS] = { 0 };
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3723
u32 ram_cmd[VFC_RAM_CMD_DWORDS] = { 0 };
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3724
u32 row, i, offset = 0;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3750
static u32 ecore_grc_dump_vfc(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3752
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3757
u32 offset = 0;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3777
static u32 ecore_grc_dump_rss(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3779
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3783
u32 offset = 0;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3787
u32 rss_addr, num_entries, total_dwords;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3807
u32 num_dwords_to_read = OSAL_MIN_T(u32, RSS_REG_RSS_RAM_DATA_SIZE, total_dwords);
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3819
static u32 ecore_grc_dump_big_ram(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3821
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3826
u32 block_size, ram_size, offset = 0, reg_val, i;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3856
static u32 ecore_grc_dump_mcp(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3858
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3864
u32 offset = 0;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3897
static u32 ecore_grc_dump_phy(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3899
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3902
u32 offset = 0, tbus_lo_offset, tbus_hi_offset;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3907
u32 addr_lo_addr, addr_hi_addr, data_lo_addr, data_hi_addr;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3962
static u32 ecore_grc_dump_static_debug(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3964
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3968
u32 block_id, line_id, offset = 0;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
3994
u32 block_dwords;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4019
for (line_id = 0; line_id < (u32)NUM_DBG_LINES(block_desc); line_id++) {
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4045
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4047
u32 *num_dumped_dwords)
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4052
u32 offset = 0;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4180
static u32 ecore_idle_chk_dump_failure(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4182
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4187
u32 *cond_reg_values)
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4192
u32 i, next_reg_offset = 0, offset = 0;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4241
u32 block_id;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4259
u32 addr;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4292
static u32 ecore_idle_chk_dump_rule_entries(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4294
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4297
u32 num_input_rules,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4298
u32 *num_failing_rules)
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4301
u32 cond_reg_values[IDLE_CHK_MAX_ENTRIES_SIZE];
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4302
u32 i, offset = 0;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4314
const u32 *imm_values;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4326
u32 block_id = GET_FIELD(cond_regs[reg_id].data, DBG_IDLE_CHK_COND_REG_BLOCK_ID);
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4342
u32 entry_dump_size = ecore_idle_chk_dump_failure(p_hwfn, p_ptt, dump_buf + offset, false, rule->rule_id, rule, 0, OSAL_NULL);
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4353
u32 next_reg_offset = 0;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4358
u32 padded_entry_size, addr;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4394
static u32 ecore_idle_chk_dump(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4396
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4399
u32 num_failing_rules_offset, offset = 0, input_offset = 0, num_failing_rules = 0;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4413
u32 curr_failing_rules;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4444
u32 image_type,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4445
u32 *nvram_offset_bytes,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4446
u32 *nvram_size_bytes)
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4448
u32 ret_mcp_resp, ret_mcp_param, ret_txn_size;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4453
nvm_result = ecore_mcp_nvm_rd_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_NVM_GET_FILE_ATT, image_type, &ret_mcp_resp, &ret_mcp_param, &ret_txn_size, (u32 *)&file_att);
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4475
u32 nvram_offset_bytes,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4476
u32 nvram_size_bytes,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4477
u32 *ret_buf)
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4479
u32 ret_mcp_resp, ret_mcp_param, ret_read_size, bytes_to_copy;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4481
u32 read_offset = 0;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4489
if (ecore_mcp_nvm_rd_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_NVM_READ_NVRAM, (nvram_offset_bytes + read_offset) | (bytes_to_copy << DRV_MB_PARAM_NVM_LEN_OFFSET), &ret_mcp_resp, &ret_mcp_param, &ret_read_size, (u32 *)((u8 *)ret_buf + read_offset)))
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4510
u32 *trace_data_grc_addr,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4511
u32 *trace_data_size)
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4513
u32 spad_trace_offsize, signature;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4541
u32 trace_data_size_bytes,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4542
u32 *running_bundle_id,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4543
u32 *trace_meta_offset,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4544
u32 *trace_meta_size)
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4546
u32 spad_trace_offsize, nvram_image_type, running_mfw_addr;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4565
u32 nvram_offset_in_bytes,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4566
u32 size_in_bytes,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4567
u32 *buf)
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4571
u32 signature;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4605
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4607
u32 *num_dumped_dwords)
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4609
u32 trace_meta_offset_bytes = 0, trace_meta_size_bytes = 0, trace_meta_size_dwords = 0;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4610
u32 trace_data_grc_addr, trace_data_size_bytes, trace_data_size_dwords;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4612
u32 running_bundle_id, offset = 0;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4689
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4691
u32 *num_dumped_dwords)
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4693
u32 dwords_read, size_param_offset, offset = 0;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4743
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4745
u32 *num_dumped_dwords)
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4747
u32 dwords_read, size_param_offset, offset = 0;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4796
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4798
u32 *num_dumped_dwords)
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4800
u32 size_param_offset, override_window_dwords, offset = 0;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4836
static u32 ecore_fw_asserts_dump(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4838
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4845
u32 offset = 0;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4854
u32 fw_asserts_section_addr, next_list_idx_addr, next_list_idx, last_list_idx, addr;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4902
s_dbg_arrays[buf_id].ptr = (const u32 *)(bin_ptr + buf_array[buf_id].offset);
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4909
enum dbg_status ecore_dbg_set_app_ver(u32 ver)
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
4919
u32 ecore_dbg_get_fw_func_ver(void)
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
5012
dev_data->bus.pci_buf.virt_addr.lo = (u32)((u64)(osal_uintptr_t)pci_buf);
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
5013
dev_data->bus.pci_buf.virt_addr.hi = (u32)((u64)(osal_uintptr_t)pci_buf >> 32);
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
5031
u32 dest_addr_lo32,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
5066
ecore_wr(p_hwfn, p_ptt, DBG_REG_ETHERNET_HDR_6, (u32)SRC_MAC_ADDR_LO16 | ((u32)dest_addr_hi16 << 16));
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
5068
ecore_wr(p_hwfn, p_ptt, DBG_REG_ETHERNET_HDR_4, (u32)ETH_TYPE << 16);
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
5083
u32 block_id;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
5197
u32 tick_len)
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
5276
u32 cid)
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
5334
u32 post_cycles,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
543
const u32 *ptr;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
544
u32 size_in_dwords;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
5440
u32 data_val,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
5441
u32 data_mask,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
553
{ (const u32 *)dbg_modes_tree_buf, OSAL_ARRAY_SIZE(dbg_modes_tree_buf)},
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
5534
u32 block_id, client_mask = 0;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
5575
u32 block_id;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
5624
u32 storm_id_mask = 0;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
5674
u32 block_id;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
5772
u32 block_id;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
5883
u32 trigger_state = ecore_rd(p_hwfn, p_ptt, DBG_REG_TRIGGER_STATUS_CUR_STATE);
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
5896
u32 *buf_size)
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
5910
*buf_size = (u32)ecore_bus_dump_hdr(p_hwfn, p_ptt, OSAL_NULL, false);
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
5929
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
5930
u32 buf_size_in_dwords,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
5931
u32 *num_dumped_dwords)
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
5934
u32 min_buf_size_in_dwords, block_id, offset = 0;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
5967
u32 recorded_dwords = ecore_bus_dump_data(p_hwfn, p_ptt, dump_buf + offset, true);
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
6005
u32 val)
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
6033
u32 preset_val;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
6057
u32 i;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
6065
u32 *buf_size)
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
6083
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
6084
u32 buf_size_in_dwords,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
6085
u32 *num_dumped_dwords)
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
6087
u32 needed_buf_size_in_dwords;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
6113
u32 *buf_size)
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
6141
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
6142
u32 buf_size_in_dwords,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
6143
u32 *num_dumped_dwords)
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
6145
u32 needed_buf_size_in_dwords;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
6171
u32 *buf_size)
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
6185
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
6186
u32 buf_size_in_dwords,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
6187
u32 *num_dumped_dwords)
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
6189
u32 needed_buf_size_in_dwords;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
6213
u32 *buf_size)
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
6227
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
6228
u32 buf_size_in_dwords,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
6229
u32 *num_dumped_dwords)
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
6231
u32 needed_buf_size_in_dwords;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
6256
u32 *buf_size)
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
6270
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
6271
u32 buf_size_in_dwords,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
6272
u32 *num_dumped_dwords)
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
6274
u32 needed_buf_size_in_dwords;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
6299
u32 *buf_size)
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
6313
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
6314
u32 buf_size_in_dwords,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
6315
u32 *num_dumped_dwords)
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
6317
u32 needed_buf_size_in_dwords;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
6342
u32 *buf_size)
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
6361
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
6362
u32 buf_size_in_dwords,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
6363
u32 *num_dumped_dwords)
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
6365
u32 needed_buf_size_in_dwords;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
6407
u32 sts_addr, sts_val;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
6453
u32 sts_addr;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
6470
u32 reset_reg;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.h
180
u32 dest_addr_lo32,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.h
267
u32 tick_len);
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.h
320
u32 cid);
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.h
389
u32 post_cycles,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.h
473
u32 data,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.h
474
u32 data_mask,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.h
51
enum dbg_status ecore_dbg_set_app_ver(u32 ver);
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.h
525
u32 *buf_size);
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.h
547
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.h
548
u32 buf_size_in_dwords,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.h
549
u32 *num_dumped_dwords);
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.h
565
u32 val);
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.h
58
u32 ecore_dbg_get_fw_func_ver(void);
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.h
589
u32 *buf_size);
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.h
607
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.h
608
u32 buf_size_in_dwords,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.h
609
u32 *num_dumped_dwords);
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.h
625
u32 *buf_size);
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.h
644
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.h
645
u32 buf_size_in_dwords,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.h
646
u32 *num_dumped_dwords);
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.h
665
u32 *buf_size);
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.h
688
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.h
689
u32 buf_size_in_dwords,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.h
690
u32 *num_dumped_dwords);
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.h
706
u32 *buf_size);
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.h
726
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.h
727
u32 buf_size_in_dwords,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.h
728
u32 *num_dumped_dwords);
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.h
744
u32 *buf_size);
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.h
764
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.h
765
u32 buf_size_in_dwords,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.h
766
u32 *num_dumped_dwords);
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.h
783
u32 *buf_size);
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.h
80
u32 *buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.h
803
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.h
804
u32 buf_size_in_dwords,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.h
805
u32 *num_dumped_dwords);
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.h
81
u32 addr,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.h
82
u32 len);
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.h
821
u32 *buf_size);
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.h
840
u32 *dump_buf,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.h
841
u32 buf_size_in_dwords,
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.h
842
u32 *num_dumped_dwords);
sys/dev/qlnx/qlnxe/ecore_dbg_values.h
3835
static const u32 dump_mem[] = {
sys/dev/qlnx/qlnxe/ecore_dbg_values.h
4293
static const u32 idle_chk_regs[] = {
sys/dev/qlnx/qlnxe/ecore_dbg_values.h
59
static const u32 dump_reg[] = {
sys/dev/qlnx/qlnxe/ecore_dbg_values.h
6107
static const u32 idle_chk_imms[] = {
sys/dev/qlnx/qlnxe/ecore_dbg_values.h
6129
static const u32 idle_chk_rules[] = {
sys/dev/qlnx/qlnxe/ecore_dbg_values.h
7572
static const u32 attn_reg[] = {
sys/dev/qlnx/qlnxe/ecore_dbg_values.h
8019
static const u32 attn_block[] = {
sys/dev/qlnx/qlnxe/ecore_dbg_values.h
8112
static const u32 dbg_bus_lines[] = {
sys/dev/qlnx/qlnxe/ecore_dbg_values.h
8218
static const u32 dbg_bus_blocks[] = {
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1034
u32 addr = NIG_REG_DSCP_TO_TC_MAP_ENABLE;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
105
static bool ecore_dcbx_iscsi_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1172
u32 *pfc, struct ecore_dcbx_params *p_params)
sys/dev/qlnx/qlnxe/ecore_dcbx.c
118
static bool ecore_dcbx_fcoe_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1190
*pfc |= (u32)p_params->pfc.max_tc << DCBX_PFC_CAPS_OFFSET;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1207
u32 val;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1226
p_ets->flags |= (u32)p_params->max_ets_tc << DCBX_ETS_MAX_TCS_OFFSET;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1237
val = (((u32)p_params->ets_pri_tc_tbl[i]) << ((7 - i) * 4));
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1257
u32 *entry;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1271
p_app->flags |= (u32)p_params->num_app_entries <<
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1281
*entry |= ((u32)DCBX_APP_SF_IEEE_ETHTYPE <<
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1283
*entry |= ((u32)DCBX_APP_SF_ETHTYPE <<
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1287
*entry |= ((u32)DCBX_APP_SF_IEEE_TCP_PORT <<
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1289
*entry |= ((u32)DCBX_APP_SF_PORT <<
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1293
*entry |= ((u32)DCBX_APP_SF_IEEE_UDP_PORT <<
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1295
*entry |= ((u32)DCBX_APP_SF_PORT <<
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1299
*entry |= (u32)DCBX_APP_SF_IEEE_TCP_UDP_PORT <<
sys/dev/qlnx/qlnxe/ecore_dcbx.c
130
static bool ecore_dcbx_roce_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1301
*entry |= ((u32)DCBX_APP_SF_PORT <<
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1308
*entry |= ((u32)DCBX_APP_SF_ETHTYPE <<
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1311
*entry |= ((u32)DCBX_APP_SF_PORT <<
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1315
*entry |= ((u32)p_params->app_entry[i].proto_id <<
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1318
*entry |= ((u32)(1 << p_params->app_entry[i].prio) <<
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1365
u32 val;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1377
val |= (((u32)p_params->dscp.dscp_pri_map[entry]) <<
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1404
u32 resp = 0, param = 0;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
142
static bool ecore_dcbx_roce_v2_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1498
u32 mb_param = 0, mcp_resp = 0, mcp_param = 0, val = 0;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
155
static bool ecore_dcbx_iwarp_tlv(struct ecore_hwfn *p_hwfn, u32 app_info_bitmap,
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1566
u32 addr, val;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1619
u32 mb_param = 0, mcp_resp = 0, mcp_param = 0;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1622
u32 addr, val;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1681
u32 mb_param = 0, mcp_resp = 0, mcp_param = 0;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1684
u32 addr, *p_val;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1688
p_val = (u32 *)p_params->buf;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1780
u32 mcp_resp = 0, mcp_param = 0, addr, val;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
273
u32 pri_mask, pri = ECORE_MAX_PFC_PRIORITIES;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
274
u32 index = ECORE_MAX_PFC_PRIORITIES - 1;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
301
u32 app_prio_bitmap, u16 id,
sys/dev/qlnx/qlnxe/ecore_dcbx.c
333
struct dcbx_app_priority_entry *p_tbl, u32 pri_tc_tbl,
sys/dev/qlnx/qlnxe/ecore_dcbx.c
420
u32 pri_tc_tbl, flags;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
461
u32 prefix_seq_num, suffix_seq_num;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
563
u32 val;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
57
((u32)(prio_tc_tbl >> ((7 - prio) * 4)) & 0x7)
sys/dev/qlnx/qlnxe/ecore_dcbx.c
59
static bool ecore_dcbx_app_ethtype(u32 app_info_bitmap)
sys/dev/qlnx/qlnxe/ecore_dcbx.c
611
u32 pfc, struct ecore_dcbx_params *p_params)
sys/dev/qlnx/qlnxe/ecore_dcbx.c
639
u32 bw_map[2], tsa_map[2], pri_map;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
65
static bool ecore_dcbx_ieee_app_ethtype(u32 app_info_bitmap)
sys/dev/qlnx/qlnxe/ecore_dcbx.c
682
u32 pfc, struct ecore_dcbx_params *p_params,
sys/dev/qlnx/qlnxe/ecore_dcbx.c
723
u32 pri_map;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
737
p_dscp->dscp_pri_map[entry] = (u32)(pri_map >>
sys/dev/qlnx/qlnxe/ecore_dcbx.c
750
u32 flags;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
76
static bool ecore_dcbx_app_port(u32 app_info_bitmap)
sys/dev/qlnx/qlnxe/ecore_dcbx.c
82
static bool ecore_dcbx_ieee_app_port(u32 app_info_bitmap, u8 type)
sys/dev/qlnx/qlnxe/ecore_dcbx.c
93
static bool ecore_dcbx_default_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
sys/dev/qlnx/qlnxe/ecore_dcbx.h
65
u32 addr;
sys/dev/qlnx/qlnxe/ecore_dcbx_api.h
151
u32 err;
sys/dev/qlnx/qlnxe/ecore_dcbx_api.h
180
u32 override_flags;
sys/dev/qlnx/qlnxe/ecore_dcbx_api.h
183
u32 ver_num;
sys/dev/qlnx/qlnxe/ecore_dcbx_api.h
213
u32 chassis_id_tlv[ECORE_LLDP_CHASSIS_ID_STAT_LEN];
sys/dev/qlnx/qlnxe/ecore_dcbx_api.h
214
u32 port_id_tlv[ECORE_LLDP_PORT_ID_STAT_LEN];
sys/dev/qlnx/qlnxe/ecore_dcbx_api.h
226
u32 tx_frames;
sys/dev/qlnx/qlnxe/ecore_dcbx_api.h
227
u32 rx_frames;
sys/dev/qlnx/qlnxe/ecore_dcbx_api.h
228
u32 rx_discards;
sys/dev/qlnx/qlnxe/ecore_dcbx_api.h
229
u32 rx_age_outs;
sys/dev/qlnx/qlnxe/ecore_dcbx_api.h
73
u32 peer_chassis_id[ECORE_LLDP_CHASSIS_ID_STAT_LEN];
sys/dev/qlnx/qlnxe/ecore_dcbx_api.h
74
u32 peer_port_id[ECORE_LLDP_PORT_ID_STAT_LEN];
sys/dev/qlnx/qlnxe/ecore_dcbx_api.h
77
u32 tx_interval;
sys/dev/qlnx/qlnxe/ecore_dcbx_api.h
78
u32 max_credit;
sys/dev/qlnx/qlnxe/ecore_dcbx_api.h
82
u32 local_chassis_id[ECORE_LLDP_CHASSIS_ID_STAT_LEN];
sys/dev/qlnx/qlnxe/ecore_dcbx_api.h
83
u32 local_port_id[ECORE_LLDP_PORT_ID_STAT_LEN];
sys/dev/qlnx/qlnxe/ecore_dev.c
1079
u32 high, u32 low)
sys/dev/qlnx/qlnxe/ecore_dev.c
1116
u8 OSAL_UNUSED filter_prot_type, u32 OSAL_UNUSED high,
sys/dev/qlnx/qlnxe/ecore_dev.c
1117
u32 OSAL_UNUSED low)
sys/dev/qlnx/qlnxe/ecore_dev.c
1140
u8 abs_ppfid, u8 filter_idx, u8 filter_prot_type, u32 high,
sys/dev/qlnx/qlnxe/ecore_dev.c
1141
u32 low)
sys/dev/qlnx/qlnxe/ecore_dev.c
1172
u32 high, low, ref_cnt;
sys/dev/qlnx/qlnxe/ecore_dev.c
1269
u32 *p_high, u32 *p_low)
sys/dev/qlnx/qlnxe/ecore_dev.c
1308
u32 high, low, ref_cnt;
sys/dev/qlnx/qlnxe/ecore_dev.c
1376
u32 ref_cnt;
sys/dev/qlnx/qlnxe/ecore_dev.c
1430
u32 ref_cnt;
sys/dev/qlnx/qlnxe/ecore_dev.c
1529
struct ecore_ptt *p_ptt, u32 addr,
sys/dev/qlnx/qlnxe/ecore_dev.c
1530
u32 val)
sys/dev/qlnx/qlnxe/ecore_dev.c
1553
u32 addr;
sys/dev/qlnx/qlnxe/ecore_dev.c
1639
static u32 ecore_hw_bar_size(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_dev.c
1643
u32 bar_reg = (bar_id == BAR_ID_0 ?
sys/dev/qlnx/qlnxe/ecore_dev.c
1645
u32 val;
sys/dev/qlnx/qlnxe/ecore_dev.c
1670
u32 dp_module,
sys/dev/qlnx/qlnxe/ecore_dev.c
1674
u32 i;
sys/dev/qlnx/qlnxe/ecore_dev.c
1800
static u32 ecore_get_pq_flags(struct ecore_hwfn *p_hwfn)
sys/dev/qlnx/qlnxe/ecore_dev.c
1802
u32 flags;
sys/dev/qlnx/qlnxe/ecore_dev.c
1856
num_pf_rls = (u16)OSAL_MIN_T(u32, RESC_NUM(p_hwfn, ECORE_RL),
sys/dev/qlnx/qlnxe/ecore_dev.c
1857
(u16)OSAL_MIN_T(u32, RESC_NUM(p_hwfn, ECORE_VPORT),
sys/dev/qlnx/qlnxe/ecore_dev.c
1875
u32 pq_flags = ecore_get_pq_flags(p_hwfn);
sys/dev/qlnx/qlnxe/ecore_dev.c
1885
u32 pq_flags = ecore_get_pq_flags(p_hwfn);
sys/dev/qlnx/qlnxe/ecore_dev.c
2000
u8 tc, u32 pq_init_flags)
sys/dev/qlnx/qlnxe/ecore_dev.c
2031
u32 pq_flags)
sys/dev/qlnx/qlnxe/ecore_dev.c
2067
u32 pq_flags, u16 pq_val)
sys/dev/qlnx/qlnxe/ecore_dev.c
2075
u16 ecore_get_cm_pq_idx(struct ecore_hwfn *p_hwfn, u32 pq_flags)
sys/dev/qlnx/qlnxe/ecore_dev.c
2412
u32 rdma_tasks, excess_tasks;
sys/dev/qlnx/qlnxe/ecore_dev.c
2413
u32 line_count;
sys/dev/qlnx/qlnxe/ecore_dev.c
2433
u32 n_eqes, num_cons;
sys/dev/qlnx/qlnxe/ecore_dev.c
2512
u32 n_srq = ecore_cxt_get_total_srq_count(p_hwfn);
sys/dev/qlnx/qlnxe/ecore_dev.c
2697
u32 command = 0, addr, count = FINAL_CLEANUP_POLL_CNT;
sys/dev/qlnx/qlnxe/ecore_dev.c
2819
u32 pl_hv = 1;
sys/dev/qlnx/qlnxe/ecore_dev.c
2875
u32 offset = CAU_REG_SB_VAR_MEMORY_RT_OFFSET;
sys/dev/qlnx/qlnxe/ecore_dev.c
2906
u32 val, wr_mbs, cache_line_size;
sys/dev/qlnx/qlnxe/ecore_dev.c
2926
cache_line_size = OSAL_MIN_T(u32, OSAL_CACHE_LINE_SIZE, wr_mbs);
sys/dev/qlnx/qlnxe/ecore_dev.c
2966
u32 concrete_fid;
sys/dev/qlnx/qlnxe/ecore_dev.c
3054
u32 addr,
sys/dev/qlnx/qlnxe/ecore_dev.c
3064
(u32)((data >> 32) & 0xffffffff),
sys/dev/qlnx/qlnxe/ecore_dev.c
3065
(u32)(data & 0xffffffff));
sys/dev/qlnx/qlnxe/ecore_dev.c
3127
u32 mac_base = NWM_REG_MAC0_K2_E5 + (port << 2) * NWM_REG_MAC0_SIZE;
sys/dev/qlnx/qlnxe/ecore_dev.c
3174
u32 xmac_rxctrl = 0;
sys/dev/qlnx/qlnxe/ecore_dev.c
3178
ecore_wr(p_hwfn, p_ptt, MISC_REG_RESET_PL_PDA_VAUX + 2*sizeof(u32),
sys/dev/qlnx/qlnxe/ecore_dev.c
3181
ecore_wr(p_hwfn, p_ptt, MISC_REG_RESET_PL_PDA_VAUX + sizeof(u32),
sys/dev/qlnx/qlnxe/ecore_dev.c
3190
ecore_wr(p_hwfn, p_ptt, MISC_REG_RESET_PL_PDA_VAUX + 2 * sizeof(u32),
sys/dev/qlnx/qlnxe/ecore_dev.c
3193
ecore_wr(p_hwfn, p_ptt, MISC_REG_RESET_PL_PDA_VAUX + sizeof(u32),
sys/dev/qlnx/qlnxe/ecore_dev.c
3219
u32 pwm_region_size,
sys/dev/qlnx/qlnxe/ecore_dev.c
3220
u32 n_cpus)
sys/dev/qlnx/qlnxe/ecore_dev.c
3222
u32 dpi_bit_shift, dpi_count, dpi_page_size;
sys/dev/qlnx/qlnxe/ecore_dev.c
3223
u32 min_dpis;
sys/dev/qlnx/qlnxe/ecore_dev.c
3224
u32 n_wids;
sys/dev/qlnx/qlnxe/ecore_dev.c
3247
n_wids = OSAL_MAX_T(u32, ECORE_MIN_WIDS, n_cpus);
sys/dev/qlnx/qlnxe/ecore_dev.c
3254
min_dpis = OSAL_MAX_T(u32, ECORE_MIN_DPIS, min_dpis);
sys/dev/qlnx/qlnxe/ecore_dev.c
3280
u32 pwm_regsize, norm_regsize;
sys/dev/qlnx/qlnxe/ecore_dev.c
3281
u32 non_pwm_conn, min_addr_reg1;
sys/dev/qlnx/qlnxe/ecore_dev.c
3282
u32 db_bar_size, n_cpus = 1;
sys/dev/qlnx/qlnxe/ecore_dev.c
3283
u32 roce_edpm_mode;
sys/dev/qlnx/qlnxe/ecore_dev.c
3284
u32 pf_dems_shift;
sys/dev/qlnx/qlnxe/ecore_dev.c
336
*(u32 *)db_entry->db_data);
sys/dev/qlnx/qlnxe/ecore_dev.c
3451
u32 val;
sys/dev/qlnx/qlnxe/ecore_dev.c
3482
u32 prs_reg;
sys/dev/qlnx/qlnxe/ecore_dev.c
360
DIRECT_REG_WR(p_hwfn, db_entry->db_addr, *(u32 *)(db_entry->db_data));
sys/dev/qlnx/qlnxe/ecore_dev.c
3646
u32 delay_idx = 0, val, set_val = b_enable ? 1 : 0;
sys/dev/qlnx/qlnxe/ecore_dev.c
3766
u32 load_code, resp, param, drv_mb_param;
sys/dev/qlnx/qlnxe/ecore_dev.c
4073
u32 addr, u32 expected_val)
sys/dev/qlnx/qlnxe/ecore_dev.c
4075
u32 val = ecore_rd(p_hwfn, p_ptt, addr);
sys/dev/qlnx/qlnxe/ecore_dev.c
424
u32 ref_cnt;
sys/dev/qlnx/qlnxe/ecore_dev.c
4306
enum _ecore_status_t ecore_set_nwuf_reg(struct ecore_dev *p_dev, u32 reg_idx,
sys/dev/qlnx/qlnxe/ecore_dev.c
4307
u32 pattern_size, u32 crc)
sys/dev/qlnx/qlnxe/ecore_dev.c
4312
u32 reg_len = 0;
sys/dev/qlnx/qlnxe/ecore_dev.c
4313
u32 reg_crc = 0;
sys/dev/qlnx/qlnxe/ecore_dev.c
4412
const u32 wake_buffer_clear_offset =
sys/dev/qlnx/qlnxe/ecore_dev.c
4435
u32 *buf = OSAL_NULL;
sys/dev/qlnx/qlnxe/ecore_dev.c
4436
u32 i = 0;
sys/dev/qlnx/qlnxe/ecore_dev.c
4437
const u32 reg_wake_buffer_offest =
sys/dev/qlnx/qlnxe/ecore_dev.c
4459
buf = (u32 *)wake_info->wk_buffer;
sys/dev/qlnx/qlnxe/ecore_dev.c
446
u32 i;
sys/dev/qlnx/qlnxe/ecore_dev.c
4461
for (i = 0; i < (wake_info->wk_pkt_len / sizeof(u32)); i++)
sys/dev/qlnx/qlnxe/ecore_dev.c
4463
if ((i*sizeof(u32)) >= sizeof(wake_info->wk_buffer))
sys/dev/qlnx/qlnxe/ecore_dev.c
4471
reg_wake_buffer_offest + (i * sizeof(u32)));
sys/dev/qlnx/qlnxe/ecore_dev.c
4543
u32 *feat_num = p_hwfn->hw_info.feat_num;
sys/dev/qlnx/qlnxe/ecore_dev.c
4545
u32 non_l2_sbs = 0;
sys/dev/qlnx/qlnxe/ecore_dev.c
4557
u32 max_cnqs;
sys/dev/qlnx/qlnxe/ecore_dev.c
4561
OSAL_MIN_T(u32,
sys/dev/qlnx/qlnxe/ecore_dev.c
4567
max_cnqs = (u32)p_hwfn->pf_params.rdma_pf_params.max_cnqs;
sys/dev/qlnx/qlnxe/ecore_dev.c
4572
OSAL_MIN_T(u32,
sys/dev/qlnx/qlnxe/ecore_dev.c
4586
OSAL_MIN_T(u32,
sys/dev/qlnx/qlnxe/ecore_dev.c
4590
OSAL_MIN_T(u32,
sys/dev/qlnx/qlnxe/ecore_dev.c
4598
OSAL_MIN_T(u32, sb_cnt.cnt, RESC_NUM(p_hwfn,
sys/dev/qlnx/qlnxe/ecore_dev.c
4603
OSAL_MIN_T(u32, sb_cnt.cnt, RESC_NUM(p_hwfn,
sys/dev/qlnx/qlnxe/ecore_dev.c
464
u32 size; u8 i;
sys/dev/qlnx/qlnxe/ecore_dev.c
4656
u32 resc_max_val,
sys/dev/qlnx/qlnxe/ecore_dev.c
4657
u32 *p_mcp_resp)
sys/dev/qlnx/qlnxe/ecore_dev.c
4683
u32 resc_max_val, mcp_resp;
sys/dev/qlnx/qlnxe/ecore_dev.c
4730
u32 *p_resc_num, u32 *p_resc_start)
sys/dev/qlnx/qlnxe/ecore_dev.c
4818
u32 dflt_resc_num = 0, dflt_resc_start = 0;
sys/dev/qlnx/qlnxe/ecore_dev.c
4819
u32 mcp_resp, *p_resc_num, *p_resc_start;
sys/dev/qlnx/qlnxe/ecore_dev.c
4944
u32 *resc_start = p_hwfn->hw_info.resc_start;
sys/dev/qlnx/qlnxe/ecore_dev.c
4945
u32 *resc_num = p_hwfn->hw_info.resc_num;
sys/dev/qlnx/qlnxe/ecore_dev.c
4952
u32 roce_min_ilt_lines = PXP_NUM_ILT_RECORDS_BB / MAX_NUM_PFS_BB;
sys/dev/qlnx/qlnxe/ecore_dev.c
5037
resc_num[ECORE_ILT] = OSAL_MAX_T(u32,
sys/dev/qlnx/qlnxe/ecore_dev.c
5088
u32 port_cfg_addr, link_temp, nvm_cfg_addr, device_capabilities;
sys/dev/qlnx/qlnxe/ecore_dev.c
5089
u32 nvm_cfg1_offset, mf_mode, addr, generic_cont0, core_cfg;
sys/dev/qlnx/qlnxe/ecore_dev.c
5093
u32 dcbx_mode; /* __LINUX__THROW__ */
sys/dev/qlnx/qlnxe/ecore_dev.c
5379
u32 reg_function_hide, tmp, eng_mask, low_pfs_mask;
sys/dev/qlnx/qlnxe/ecore_dev.c
5447
u32 port_mode;
sys/dev/qlnx/qlnxe/ecore_dev.c
5477
u32 port;
sys/dev/qlnx/qlnxe/ecore_dev.c
5538
u32 addr, global_offsize, global_addr;
sys/dev/qlnx/qlnxe/ecore_dev.c
5553
u32 eee_status;
sys/dev/qlnx/qlnxe/ecore_dev.c
5707
u32 tmp;
sys/dev/qlnx/qlnxe/ecore_dev.c
580
union ecore_llh_filter *p_filter, u32 *p_ref_cnt)
sys/dev/qlnx/qlnxe/ecore_dev.c
6013
u32 offset;
sys/dev/qlnx/qlnxe/ecore_dev.c
607
u8 *p_filter_idx, u32 *p_ref_cnt)
sys/dev/qlnx/qlnxe/ecore_dev.c
6089
u32 size, i;
sys/dev/qlnx/qlnxe/ecore_dev.c
6127
u32 page_cnt = p_chain->page_cnt, i, pbl_size;
sys/dev/qlnx/qlnxe/ecore_dev.c
6176
osal_size_t elem_size, u32 page_cnt)
sys/dev/qlnx/qlnxe/ecore_dev.c
6187
chain_size > ((u32)ECORE_U16_MAX + 1)) ||
sys/dev/qlnx/qlnxe/ecore_dev.c
6204
u32 i;
sys/dev/qlnx/qlnxe/ecore_dev.c
6258
u32 page_cnt = p_chain->page_cnt, size, i;
sys/dev/qlnx/qlnxe/ecore_dev.c
6324
u32 num_elems, osal_size_t elem_size,
sys/dev/qlnx/qlnxe/ecore_dev.c
6328
u32 page_cnt;
sys/dev/qlnx/qlnxe/ecore_dev.c
638
u8 filter_idx, u32 *p_ref_cnt)
sys/dev/qlnx/qlnxe/ecore_dev.c
6446
u32 hw_addr, void *p_eth_qzone,
sys/dev/qlnx/qlnxe/ecore_dev.c
6516
u32 address;
sys/dev/qlnx/qlnxe/ecore_dev.c
6556
u32 address;
sys/dev/qlnx/qlnxe/ecore_dev.c
6592
u32 min_pf_rate)
sys/dev/qlnx/qlnxe/ecore_dev.c
6600
u32 wfq_speed = p_hwfn->qm_info.wfq_data[i].min_speed;
sys/dev/qlnx/qlnxe/ecore_dev.c
6643
u16 vport_id, u32 req_rate,
sys/dev/qlnx/qlnxe/ecore_dev.c
6644
u32 min_pf_rate)
sys/dev/qlnx/qlnxe/ecore_dev.c
6646
u32 total_req_min_rate = 0, total_left_rate = 0, left_rate_per_vp = 0;
sys/dev/qlnx/qlnxe/ecore_dev.c
6653
u32 tmp_speed;
sys/dev/qlnx/qlnxe/ecore_dev.c
666
u8 *p_filter_idx, u32 *p_ref_cnt)
sys/dev/qlnx/qlnxe/ecore_dev.c
6720
u16 vp_id, u32 rate)
sys/dev/qlnx/qlnxe/ecore_dev.c
6747
u32 min_pf_rate)
sys/dev/qlnx/qlnxe/ecore_dev.c
6755
u32 rate;
sys/dev/qlnx/qlnxe/ecore_dev.c
6783
int ecore_configure_vport_wfq(struct ecore_dev *p_dev, u16 vp_id, u32 rate)
sys/dev/qlnx/qlnxe/ecore_dev.c
6818
u32 min_pf_rate)
sys/dev/qlnx/qlnxe/ecore_dev.c
6957
u32 min_rate = p_link->min_pf_rate;
sys/dev/qlnx/qlnxe/ecore_dev.c
81
static u32 qm_lock_ref_cnt;
sys/dev/qlnx/qlnxe/ecore_dev.c
837
u32 addr;
sys/dev/qlnx/qlnxe/ecore_dev.c
886
u32 addr, val, eng_sel;
sys/dev/qlnx/qlnxe/ecore_dev.c
936
u32 addr, val, eng_sel;
sys/dev/qlnx/qlnxe/ecore_dev.c
983
u32 mode;
sys/dev/qlnx/qlnxe/ecore_dev.c
984
u32 protocol_type;
sys/dev/qlnx/qlnxe/ecore_dev.c
985
u32 hdr_sel;
sys/dev/qlnx/qlnxe/ecore_dev.c
986
u32 enable;
sys/dev/qlnx/qlnxe/ecore_dev.c
998
u32 addr;
sys/dev/qlnx/qlnxe/ecore_dev_api.h
258
u32 epoch;
sys/dev/qlnx/qlnxe/ecore_dev_api.h
300
u32 reg_idx, u32 pattern_size, u32 crc);
sys/dev/qlnx/qlnxe/ecore_dev_api.h
39
u32 wk_info;
sys/dev/qlnx/qlnxe/ecore_dev_api.h
40
u32 wk_details;
sys/dev/qlnx/qlnxe/ecore_dev_api.h
41
u32 wk_pkt_len;
sys/dev/qlnx/qlnxe/ecore_dev_api.h
478
u32 flags; /* consists of ECORE_DMAE_FLAG_* values */
sys/dev/qlnx/qlnxe/ecore_dev_api.h
503
u32 grc_addr,
sys/dev/qlnx/qlnxe/ecore_dev_api.h
504
u32 size_in_dwords,
sys/dev/qlnx/qlnxe/ecore_dev_api.h
522
u32 grc_addr,
sys/dev/qlnx/qlnxe/ecore_dev_api.h
524
u32 size_in_dwords,
sys/dev/qlnx/qlnxe/ecore_dev_api.h
54
u32 dp_module,
sys/dev/qlnx/qlnxe/ecore_dev_api.h
545
u32 size_in_dwords,
sys/dev/qlnx/qlnxe/ecore_dev_api.h
565
u32 num_elems,
sys/dev/qlnx/qlnxe/ecore_fcoe_api.h
105
u32 cid);
sys/dev/qlnx/qlnxe/ecore_fcoe_api.h
40
u32 icid;
sys/dev/qlnx/qlnxe/ecore_fcoe_api.h
41
u32 fw_cid;
sys/dev/qlnx/qlnxe/ecore_fcoe_api.h
86
u32 fcoe_silent_drop_pkt_cmdq_full_cnt;
sys/dev/qlnx/qlnxe/ecore_fcoe_api.h
87
u32 fcoe_silent_drop_pkt_rq_full_cnt;
sys/dev/qlnx/qlnxe/ecore_fcoe_api.h
88
u32 fcoe_silent_drop_pkt_crc_error_cnt;
sys/dev/qlnx/qlnxe/ecore_fcoe_api.h
89
u32 fcoe_silent_drop_pkt_task_invalid_cnt;
sys/dev/qlnx/qlnxe/ecore_fcoe_api.h
90
u32 fcoe_silent_drop_total_pkt_cnt;
sys/dev/qlnx/qlnxe/ecore_gtt_values.h
31
static u32 pxp_global_win[] = {
sys/dev/qlnx/qlnxe/ecore_hsi_debug_tools.h
1004
u32 num_regs_read /* Numbers of registers that were read since last log */;
sys/dev/qlnx/qlnxe/ecore_hsi_debug_tools.h
282
u32 data;
sys/dev/qlnx/qlnxe/ecore_hsi_debug_tools.h
289
u32 sts_val /* Value read from the STS attention register */;
sys/dev/qlnx/qlnxe/ecore_hsi_debug_tools.h
290
u32 mask_val /* Value read from the MASK attention register */;
sys/dev/qlnx/qlnxe/ecore_hsi_debug_tools.h
327
u32 data;
sys/dev/qlnx/qlnxe/ecore_hsi_debug_tools.h
332
u32 sts_clr_address /* STS_CLR attention register GRC address (in dwords) */;
sys/dev/qlnx/qlnxe/ecore_hsi_debug_tools.h
333
u32 mask_address /* MASK attention register GRC address (in dwords) */;
sys/dev/qlnx/qlnxe/ecore_hsi_debug_tools.h
396
u32 dword0;
sys/dev/qlnx/qlnxe/ecore_hsi_debug_tools.h
401
u32 dword1;
sys/dev/qlnx/qlnxe/ecore_hsi_debug_tools.h
415
u32 data;
sys/dev/qlnx/qlnxe/ecore_hsi_debug_tools.h
429
u32 hdr;
sys/dev/qlnx/qlnxe/ecore_hsi_debug_tools.h
450
u32 data;
sys/dev/qlnx/qlnxe/ecore_hsi_debug_tools.h
467
u32 data;
sys/dev/qlnx/qlnxe/ecore_hsi_debug_tools.h
535
u32 data;
sys/dev/qlnx/qlnxe/ecore_hsi_debug_tools.h
633
u32 lo;
sys/dev/qlnx/qlnxe/ecore_hsi_debug_tools.h
634
u32 hi;
sys/dev/qlnx/qlnxe/ecore_hsi_debug_tools.h
644
u32 size /* PCI buffer size in bytes */;
sys/dev/qlnx/qlnxe/ecore_hsi_debug_tools.h
686
u32 cid /* CID to filter on. Valid only if cid_filter_en is set. */;
sys/dev/qlnx/qlnxe/ecore_hsi_debug_tools.h
694
u32 app_version /* The tools version number of the application */;
sys/dev/qlnx/qlnxe/ecore_hsi_debug_tools.h
835
u32 param_val[48] /* Value of each GRC parameter. Array size must match the enum dbg_grc_params. */;
sys/dev/qlnx/qlnxe/ecore_hsi_debug_tools.h
984
u32 buf_size /* Idle check buffer size in dwords */;
sys/dev/qlnx/qlnxe/ecore_hsi_init_func.h
130
u32 vport_rl /* rate limit in Mb/sec units. a value of 0 means dont configure. ignored if VPORT RL is globally disabled. */;
sys/dev/qlnx/qlnxe/ecore_hsi_init_func.h
48
u32 guranteed_per_tc /* guaranteed size per TC, in bytes */;
sys/dev/qlnx/qlnxe/ecore_hsi_init_func.h
49
u32 headroom_per_tc /* headroom size per TC, in bytes */;
sys/dev/qlnx/qlnxe/ecore_hsi_init_func.h
50
u32 min_pkt_size /* min packet size, in bytes */;
sys/dev/qlnx/qlnxe/ecore_hsi_init_func.h
51
u32 max_ports_per_engine /* min packet size, in bytes */;
sys/dev/qlnx/qlnxe/ecore_hsi_init_func.h
70
u32 mtu /* Max packet size (in bytes) */;
sys/dev/qlnx/qlnxe/ecore_hsi_init_func.h
81
u32 mtu /* Max packet size (in bytes) */;
sys/dev/qlnx/qlnxe/ecore_hsi_init_tool.h
100
u32 length /* buffer length in bytes */;
sys/dev/qlnx/qlnxe/ecore_hsi_init_tool.h
121
u32 data;
sys/dev/qlnx/qlnxe/ecore_hsi_init_tool.h
133
u32 data;
sys/dev/qlnx/qlnxe/ecore_hsi_init_tool.h
145
u32 data;
sys/dev/qlnx/qlnxe/ecore_hsi_init_tool.h
157
u32 data;
sys/dev/qlnx/qlnxe/ecore_hsi_init_tool.h
193
u32 op_data;
sys/dev/qlnx/qlnxe/ecore_hsi_init_tool.h
207
u32 op_data;
sys/dev/qlnx/qlnxe/ecore_hsi_init_tool.h
212
u32 delay /* delay in us */;
sys/dev/qlnx/qlnxe/ecore_hsi_init_tool.h
220
u32 op_data;
sys/dev/qlnx/qlnxe/ecore_hsi_init_tool.h
236
u32 op_data;
sys/dev/qlnx/qlnxe/ecore_hsi_init_tool.h
245
u32 phase_data;
sys/dev/qlnx/qlnxe/ecore_hsi_init_tool.h
270
u32 op_data;
sys/dev/qlnx/qlnxe/ecore_hsi_init_tool.h
275
u32 param2 /* Init param 2 */;
sys/dev/qlnx/qlnxe/ecore_hsi_init_tool.h
292
u32 inline_val /* value to write, used when init source is INIT_SRC_INLINE */;
sys/dev/qlnx/qlnxe/ecore_hsi_init_tool.h
293
u32 zeros_count /* number of zeros to write, used when init source is INIT_SRC_ZEROS */;
sys/dev/qlnx/qlnxe/ecore_hsi_init_tool.h
294
u32 array_offset /* array offset to write, used when init source is INIT_SRC_ARRAY */;
sys/dev/qlnx/qlnxe/ecore_hsi_init_tool.h
303
u32 data;
sys/dev/qlnx/qlnxe/ecore_hsi_init_tool.h
322
u32 op_data;
sys/dev/qlnx/qlnxe/ecore_hsi_init_tool.h
331
u32 expected_val /* expected polling value, used only when polling is done */;
sys/dev/qlnx/qlnxe/ecore_hsi_init_tool.h
391
u32 base /* RAM field offset */;
sys/dev/qlnx/qlnxe/ecore_hsi_init_tool.h
99
u32 offset /* buffer offset in bytes from the beginning of the binary file */;
sys/dev/qlnx/qlnxe/ecore_hw.c
1010
u32 grc_addr,
sys/dev/qlnx/qlnxe/ecore_hw.c
1011
u32 size_in_dwords,
sys/dev/qlnx/qlnxe/ecore_hw.c
1014
u32 grc_addr_in_dw = grc_addr / sizeof(u32);
sys/dev/qlnx/qlnxe/ecore_hw.c
1032
u32 grc_addr,
sys/dev/qlnx/qlnxe/ecore_hw.c
1034
u32 size_in_dwords,
sys/dev/qlnx/qlnxe/ecore_hw.c
1037
u32 grc_addr_in_dw = grc_addr / sizeof(u32);
sys/dev/qlnx/qlnxe/ecore_hw.c
1056
u32 size_in_dwords,
sys/dev/qlnx/qlnxe/ecore_hw.c
1093
u32 size = OSAL_PAGE_SIZE / 2, val;
sys/dev/qlnx/qlnxe/ecore_hw.c
1097
u32 *p_tmp;
sys/dev/qlnx/qlnxe/ecore_hw.c
1108
for (p_tmp = (u32 *)p_virt;
sys/dev/qlnx/qlnxe/ecore_hw.c
1109
p_tmp < (u32 *)((u8 *)p_virt + size);
sys/dev/qlnx/qlnxe/ecore_hw.c
1112
val = (u32)(osal_uintptr_t)p_tmp;
sys/dev/qlnx/qlnxe/ecore_hw.c
1136
for (p_tmp = (u32 *)((u8 *)p_virt + size);
sys/dev/qlnx/qlnxe/ecore_hw.c
1137
p_tmp < (u32 *)((u8 *)p_virt + (2 * size));
sys/dev/qlnx/qlnxe/ecore_hw.c
1140
val = (u32)(osal_uintptr_t)p_tmp - size;
sys/dev/qlnx/qlnxe/ecore_hw.c
1146
(unsigned long long)(p_phys + (u32)((u8 *)p_tmp - (u8 *)p_virt)),
sys/dev/qlnx/qlnxe/ecore_hw.c
1159
u8 abs_ppfid, u32 hw_addr, u32 val)
sys/dev/qlnx/qlnxe/ecore_hw.c
1171
u32 ecore_ppfid_rd(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
sys/dev/qlnx/qlnxe/ecore_hw.c
1172
u8 abs_ppfid, u32 hw_addr)
sys/dev/qlnx/qlnxe/ecore_hw.c
1175
u32 val;
sys/dev/qlnx/qlnxe/ecore_hw.c
174
static u32 ecore_ptt_get_hw_addr(struct ecore_ptt *p_ptt)
sys/dev/qlnx/qlnxe/ecore_hw.c
180
static u32 ecore_ptt_config_addr(struct ecore_ptt *p_ptt)
sys/dev/qlnx/qlnxe/ecore_hw.c
186
u32 ecore_ptt_get_bar_addr(struct ecore_ptt *p_ptt)
sys/dev/qlnx/qlnxe/ecore_hw.c
194
u32 new_hw_addr)
sys/dev/qlnx/qlnxe/ecore_hw.c
196
u32 prev_hw_addr;
sys/dev/qlnx/qlnxe/ecore_hw.c
217
static u32 ecore_set_ptt(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_hw.c
219
u32 hw_addr)
sys/dev/qlnx/qlnxe/ecore_hw.c
221
u32 win_hw_addr = ecore_ptt_get_hw_addr(p_ptt);
sys/dev/qlnx/qlnxe/ecore_hw.c
222
u32 offset;
sys/dev/qlnx/qlnxe/ecore_hw.c
257
u32 bar_addr;
sys/dev/qlnx/qlnxe/ecore_hw.c
275
void ecore_wr(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt, u32 hw_addr,
sys/dev/qlnx/qlnxe/ecore_hw.c
276
u32 val)
sys/dev/qlnx/qlnxe/ecore_hw.c
279
u32 bar_addr;
sys/dev/qlnx/qlnxe/ecore_hw.c
299
u32 ecore_rd(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt, u32 hw_addr)
sys/dev/qlnx/qlnxe/ecore_hw.c
302
u32 bar_addr, val;
sys/dev/qlnx/qlnxe/ecore_hw.c
328
u32 hw_addr,
sys/dev/qlnx/qlnxe/ecore_hw.c
332
u32 dw_count, *host_addr, hw_offset;
sys/dev/qlnx/qlnxe/ecore_hw.c
334
u32 OSAL_IOMEM *reg_addr;
sys/dev/qlnx/qlnxe/ecore_hw.c
348
host_addr = (u32 *)((u8 *)addr + done);
sys/dev/qlnx/qlnxe/ecore_hw.c
349
reg_addr = (u32 OSAL_IOMEM *)OSAL_REG_ADDR(p_hwfn, hw_offset);
sys/dev/qlnx/qlnxe/ecore_hw.c
365
void *dest, u32 hw_addr, osal_size_t n)
sys/dev/qlnx/qlnxe/ecore_hw.c
376
u32 hw_addr, void *src, osal_size_t n)
sys/dev/qlnx/qlnxe/ecore_hw.c
409
*(u32 *)&p_ptt->pxp.pretend);
sys/dev/qlnx/qlnxe/ecore_hw.c
425
*(u32 *)&p_ptt->pxp.pretend);
sys/dev/qlnx/qlnxe/ecore_hw.c
442
*(u32 *)&p_ptt->pxp.pretend);
sys/dev/qlnx/qlnxe/ecore_hw.c
445
u32 ecore_vfid_to_concrete(struct ecore_hwfn *p_hwfn, u8 vfid)
sys/dev/qlnx/qlnxe/ecore_hw.c
447
u32 concrete_fid = 0;
sys/dev/qlnx/qlnxe/ecore_hw.c
469
u32 cnt, lock_status, hw_lock_cntr_reg;
sys/dev/qlnx/qlnxe/ecore_hw.c
478
MISCS_REG_DRIVER_CONTROL_0_SIZE * sizeof(u32);
sys/dev/qlnx/qlnxe/ecore_hw.c
492
ecore_wr(p_hwfn, p_ptt, hw_lock_cntr_reg + sizeof(u32), resource);
sys/dev/qlnx/qlnxe/ecore_hw.c
525
u32 lock_status, hw_lock_cntr_reg;
sys/dev/qlnx/qlnxe/ecore_hw.c
533
MISCS_REG_DRIVER_CONTROL_0_SIZE * sizeof(u32);
sys/dev/qlnx/qlnxe/ecore_hw.c
564
u32 opcode = 0;
sys/dev/qlnx/qlnxe/ecore_hw.c
638
static u32 ecore_dmae_idx_to_go_cmd(u8 idx)
sys/dev/qlnx/qlnxe/ecore_hw.c
691
u32 data = (i < DMAE_CMD_SIZE_TO_FILL) ?
sys/dev/qlnx/qlnxe/ecore_hw.c
692
*(((u32 *)p_command) + i) : 0;
sys/dev/qlnx/qlnxe/ecore_hw.c
696
(idx_cmd * DMAE_CMD_SIZE * sizeof(u32)) +
sys/dev/qlnx/qlnxe/ecore_hw.c
697
(i * sizeof(u32)), data);
sys/dev/qlnx/qlnxe/ecore_hw.c
711
u32 **p_buff = &p_hwfn->dmae_info.p_intermediate_buffer;
sys/dev/qlnx/qlnxe/ecore_hw.c
712
u32 **p_comp = &p_hwfn->dmae_info.p_completion_word;
sys/dev/qlnx/qlnxe/ecore_hw.c
714
*p_comp = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev, p_addr, sizeof(u32));
sys/dev/qlnx/qlnxe/ecore_hw.c
732
sizeof(u32) * DMAE_MAX_RW_SIZE);
sys/dev/qlnx/qlnxe/ecore_hw.c
760
p_phys, sizeof(u32));
sys/dev/qlnx/qlnxe/ecore_hw.c
776
p_phys, sizeof(u32) * DMAE_MAX_RW_SIZE);
sys/dev/qlnx/qlnxe/ecore_hw.c
784
u32 wait_cnt_limit = 10000, wait_cnt = 0;
sys/dev/qlnx/qlnxe/ecore_hw.c
788
u32 factor = (CHIP_REV_IS_EMUL(p_hwfn->p_dev) ?
sys/dev/qlnx/qlnxe/ecore_hw.c
830
u32 length_dw)
sys/dev/qlnx/qlnxe/ecore_hw.c
848
length_dw * sizeof(u32));
sys/dev/qlnx/qlnxe/ecore_hw.c
876
length_dw * sizeof(u32), false);
sys/dev/qlnx/qlnxe/ecore_hw.c
890
length_dw * sizeof(u32), true);
sys/dev/qlnx/qlnxe/ecore_hw.c
904
length_dw * sizeof(u32));
sys/dev/qlnx/qlnxe/ecore_hw.c
913
u32 size_in_dwords,
sys/dev/qlnx/qlnxe/ecore_hw.c
922
u32 offset = 0;
sys/dev/qlnx/qlnxe/ecore_hw.h
121
u32 ecore_ptt_get_bar_addr(struct ecore_ptt *p_ptt);
sys/dev/qlnx/qlnxe/ecore_hw.h
132
u32 new_hw_addr);
sys/dev/qlnx/qlnxe/ecore_hw.h
155
u32 hw_addr,
sys/dev/qlnx/qlnxe/ecore_hw.h
156
u32 val);
sys/dev/qlnx/qlnxe/ecore_hw.h
165
u32 ecore_rd(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_hw.h
167
u32 hw_addr);
sys/dev/qlnx/qlnxe/ecore_hw.h
182
u32 hw_addr,
sys/dev/qlnx/qlnxe/ecore_hw.h
197
u32 hw_addr,
sys/dev/qlnx/qlnxe/ecore_hw.h
245
u32 ecore_vfid_to_concrete(struct ecore_hwfn *p_hwfn, u8 vfid);
sys/dev/qlnx/qlnxe/ecore_hw.h
283
u8 abs_ppfid, u32 hw_addr, u32 val);
sys/dev/qlnx/qlnxe/ecore_hw.h
294
u32 ecore_ppfid_rd(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
sys/dev/qlnx/qlnxe/ecore_hw.h
295
u8 abs_ppfid, u32 hw_addr);
sys/dev/qlnx/qlnxe/ecore_hw_defs.h
60
u32 ctrl_data;
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
1004
u32 byte_weight;
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
1024
u32 ctrl, inc_val, reg_offset;
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
106
#define QM_RL_INC_VAL(rate) OSAL_MAX_T(u32, (u32)(((rate ? rate : 100000) * QM_RL_PERIOD * 101) / (8 * 100)), 1)
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
1088
u32 pri_tc_mask = 0;
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
1121
u32 tc_weight_addr_diff, tc_bound_addr_diff, min_weight = 0xffffffff;
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
115
#define QM_VP_RL_UPPER_BOUND(speed) ((u32)OSAL_MAX_T(u32, QM_RL_INC_VAL(speed), 9700 + 1000))
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
1154
u32 byte_weight;
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
1186
u32 tc_headroom_blocks, min_pkt_size_blocks, total_blocks;
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
1187
u32 active_port_blocks, reg_offset = 0;
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
1190
tc_headroom_blocks = (u32)DIV_ROUND_UP(req->headroom_per_tc, BRB_BLOCK_SIZE);
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
1191
min_pkt_size_blocks = (u32)DIV_ROUND_UP(req->min_pkt_size, BRB_BLOCK_SIZE);
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
1199
active_port_blocks = (u32)(total_blocks / active_ports);
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
1202
u32 port_blocks, port_shared_blocks, port_guaranteed_blocks;
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
1203
u32 full_xoff_th, full_xon_th, pause_xoff_th, pause_xon_th;
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
1204
u32 tc_guaranteed_blocks;
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
1208
tc_guaranteed_blocks = (u32)DIV_ROUND_UP(req->guranteed_per_tc, BRB_BLOCK_SIZE);
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
1260
void ecore_set_port_mf_ovlan_eth_type(struct ecore_hwfn *p_hwfn, u32 ethType)
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
1290
u32 reg_val;
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
1301
if (reg_val == (u32)PRS_ETH_OUTPUT_FORMAT)
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
1303
ecore_wr(p_hwfn, p_ptt, PRS_REG_OUTPUT_FORMAT_4_0_BB_K2, (u32)PRS_ETH_TUNN_OUTPUT_FORMAT);
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
1321
u32 reg_val;
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
1333
if (reg_val == (u32)PRS_ETH_OUTPUT_FORMAT)
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
1335
ecore_wr(p_hwfn, p_ptt, PRS_REG_OUTPUT_FORMAT_4_0_BB_K2, (u32)PRS_ETH_TUNN_OUTPUT_FORMAT);
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
1370
u32 reg_val;
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
1382
if (reg_val == (u32)PRS_ETH_OUTPUT_FORMAT)
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
1384
ecore_wr(p_hwfn, p_ptt, PRS_REG_OUTPUT_FORMAT_4_0_BB_K2, (u32)PRS_ETH_TUNN_OUTPUT_FORMAT);
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
1408
u32 reg_val, cfg_mask;
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
1422
ecore_wr(p_hwfn, p_ptt, PRS_REG_OUTPUT_FORMAT_4_0_BB_K2, (u32)PRS_ETH_VXLAN_NO_L2_OUTPUT_FORMAT);
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
1440
#define CAM_LINE_SIZE sizeof(u32)
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
1442
#define REG_SIZE sizeof(u32)
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
1464
u32 rfs_cm_hdr_event_id;
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
1482
u32 reg_val, cam_line, ram_line_lo, ram_line_hi;
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
1584
u32 msdm_vf_size_log = MSTORM_VF_ZONE_DEFAULT_SIZE_LOG;
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
1585
u32 msdm_vf_offset_mask;
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
1605
u32 ecore_get_mstorm_queue_stat_offset(struct ecore_hwfn *p_hwfn, u16 stat_cnt_id, u16 vf_zone_size_mode)
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
1607
u32 offset = MSTORM_QUEUE_STAT_OFFSET(stat_cnt_id);
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
1620
u32 ecore_get_mstorm_eth_vf_prods_offset(struct ecore_hwfn *p_hwfn, u8 vf_id, u8 vf_queue_id, u16 vf_zone_size_mode)
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
1622
u32 offset = MSTORM_ETH_VF_PRODS_OFFSET(vf_id, vf_queue_id);
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
1640
static u8 ecore_calc_cdu_validation_byte(u8 conn_type, u8 region, u32 cid)
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
1646
u32 validation_string = 0;
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
1647
u32 data_to_crc;
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
1694
void ecore_calc_session_ctx_validation(void *p_ctx_mem, u16 ctx_size, u8 ctx_type, u32 cid)
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
1711
void ecore_calc_task_ctx_validation(void *p_ctx_mem, u16 ctx_size, u8 ctx_type, u32 tid)
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
1724
void ecore_memset_session_ctx(void *p_ctx_mem, u32 ctx_size, u8 ctx_type)
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
173
#define QM_INIT_TX_PQ_MAP(p_hwfn, map, chip, pq_id, rl_valid, vp_pq_id, rl_id, ext_voq, wrr) OSAL_MEMSET(&map, 0, sizeof(map)); SET_FIELD(map.reg, QM_RF_PQ_MAP_##chip##_PQ_VALID, 1); SET_FIELD(map.reg, QM_RF_PQ_MAP_##chip##_RL_VALID, rl_valid); SET_FIELD(map.reg, QM_RF_PQ_MAP_##chip##_VP_PQ_ID, vp_pq_id); SET_FIELD(map.reg, QM_RF_PQ_MAP_##chip##_RL_ID, rl_id); SET_FIELD(map.reg, QM_RF_PQ_MAP_##chip##_VOQ, ext_voq); SET_FIELD(map.reg, QM_RF_PQ_MAP_##chip##_WRR_WEIGHT_GROUP, wrr); STORE_RT_REG(p_hwfn, QM_REG_TXPQMAP_RT_OFFSET + pq_id, *((u32 *)&map))
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
1746
void ecore_memset_task_ctx(void *p_ctx_mem, u32 ctx_size, u8 ctx_type)
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
1764
u32 ctx_validation;
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
1790
u32 cnt, rss_addr;
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
1791
u32 * reg_val;
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
1820
reg_val = (u32*)rss_ind_mask;
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
1826
reg_val = (u32*)rss_ind_entry;
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
203
STORE_RT_REG(p_hwfn, QM_REG_RLPFVOQENABLE_RT_OFFSET, (u32)voq_bit_mask);
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
206
STORE_RT_REG(p_hwfn, QM_REG_RLPFVOQENABLE_MSB_RT_OFFSET, (u32)(voq_bit_mask >> 32));
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
264
u32 qm_line_crd;
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
268
OVERWRITE_RT_REG(p_hwfn, PBF_CMDQ_LINES_RT_OFFSET(ext_voq), (u32)cmdq_lines);
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
345
u32 usable_blocks, pure_lb_blocks, phys_blocks;
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
364
pure_lb_blocks = OSAL_MAX_T(u32, BTB_JUMBO_PKT_BLOCKS, pure_lb_blocks / BTB_PURE_LB_FACTOR);
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
388
u32 num_pf_cids,
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
389
u32 num_vf_cids,
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
394
u32 base_mem_addr_4kb,
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
399
u32 tx_pq_vf_mask[MAX_QM_TX_QUEUES / QM_PF_QUEUE_GROUP_SIZE] = { 0 };
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
400
u32 num_tx_pq_vf_masks = MAX_QM_TX_QUEUES / QM_PF_QUEUE_GROUP_SIZE;
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
402
u32 pq_mem_4kb, vport_pq_mem_4kb, mem_addr_4kb;
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
415
STORE_RT_REG(p_hwfn, QM_REG_PQTX2PF_0_RT_OFFSET + pq_group, (u32)(pf_id));
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
423
u32 max_qm_global_rls = MAX_QM_GLOBAL_RLS;
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
436
u32 map_val = (ext_voq << QM_WFQ_VP_PQ_VOQ_SHIFT) | (pf_id << (ECORE_IS_E5(p_hwfn->p_dev) ? QM_WFQ_VP_PQ_PF_E5_SHIFT : QM_WFQ_VP_PQ_PF_E4_SHIFT));
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
471
u32 pq_info = 0;
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
496
u32 num_pf_cids,
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
497
u32 num_tids,
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
498
u32 base_mem_addr_4kb)
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
500
u32 pq_size, pq_mem_4kb, mem_addr_4kb;
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
512
STORE_RT_REG(p_hwfn, QM_REG_PQOTHER2PF_0_RT_OFFSET + pq_group, (u32)(pf_id));
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
541
u32 inc_val, crd_reg_offset;
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
556
OVERWRITE_RT_REG(p_hwfn, crd_reg_offset, (u32)QM_WFQ_CRD_REG_SIGN_BIT);
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
559
STORE_RT_REG(p_hwfn, QM_REG_WFQPFUPPERBOUND_RT_OFFSET + pf_id, QM_WFQ_UPPER_BOUND | (u32)QM_WFQ_CRD_REG_SIGN_BIT);
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
570
u32 pf_rl)
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
572
u32 inc_val;
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
580
STORE_RT_REG(p_hwfn, QM_REG_RLPFCRD_RT_OFFSET + pf_id, (u32)QM_RL_CRD_REG_SIGN_BIT);
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
581
STORE_RT_REG(p_hwfn, QM_REG_RLPFUPPERBOUND_RT_OFFSET + pf_id, QM_PF_RL_UPPER_BOUND | (u32)QM_RL_CRD_REG_SIGN_BIT);
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
595
u32 inc_val;
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
613
STORE_RT_REG(p_hwfn, QM_REG_WFQVPCRD_RT_OFFSET + vport_pq_id, (u32)QM_WFQ_CRD_REG_SIGN_BIT);
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
628
u32 link_speed,
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
632
u32 inc_val;
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
647
STORE_RT_REG(p_hwfn, QM_REG_RLGLBLCRD_RT_OFFSET + vport_id, (u32)QM_RL_CRD_REG_SIGN_BIT);
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
648
STORE_RT_REG(p_hwfn, QM_REG_RLGLBLUPPERBOUND_RT_OFFSET + vport_id, QM_VP_RL_UPPER_BOUND(link_speed) | (u32)QM_RL_CRD_REG_SIGN_BIT);
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
658
u32 reg_val, i;
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
676
u32 cmd_addr,
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
677
u32 cmd_data_lsb,
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
678
u32 cmd_data_msb)
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
694
u32 ecore_qm_pf_mem_size(u32 num_pf_cids,
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
695
u32 num_vf_cids,
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
696
u32 num_tids,
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
714
u32 mask;
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
754
u32 num_pf_cids,
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
755
u32 num_vf_cids,
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
756
u32 num_tids,
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
763
u32 pf_rl,
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
764
u32 link_speed,
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
768
u32 other_mem_size_4kb;
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
812
u32 inc_val;
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
828
u32 pf_rl)
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
830
u32 inc_val;
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
838
ecore_wr(p_hwfn, p_ptt, QM_REG_RLPFCRD + pf_id * 4, (u32)QM_RL_CRD_REG_SIGN_BIT);
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
850
u32 inc_val;
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
872
u32 vport_rl,
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
873
u32 link_speed)
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
875
u32 inc_val, max_qm_global_rls = MAX_QM_GLOBAL_RLS;
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
888
ecore_wr(p_hwfn, p_ptt, QM_REG_RLGLBLCRD + vport_id * 4, (u32)QM_RL_CRD_REG_SIGN_BIT);
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
901
u32 cmd_arr[QM_CMD_STRUCT_SIZE(QM_STOP_CMD)] = {0};
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
902
u32 pq_mask = 0, last_pq, pq_id;
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
917
QM_CMD_SET_FIELD(cmd_arr, (u32)QM_STOP_CMD, PAUSE_MASK, pq_mask);
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
962
u32 min_weight, tc_weight_base_addr, tc_weight_addr_diff;
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c
963
u32 tc_bound_base_addr, tc_bound_addr_diff;
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.h
120
u32 num_pf_cids,
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.h
121
u32 num_vf_cids,
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.h
122
u32 num_tids,
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.h
129
u32 pf_rl,
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.h
130
u32 link_speed,
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.h
162
u32 pf_rl);
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.h
196
u32 vport_rl,
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.h
197
u32 link_speed);
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.h
308
u32 ethType);
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.h
453
u32 ecore_get_mstorm_queue_stat_offset(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.h
466
u32 ecore_get_mstorm_eth_vf_prods_offset(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.h
49
u32 ecore_qm_pf_mem_size(u32 num_pf_cids,
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.h
493
u32 cid);
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.h
50
u32 num_vf_cids,
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.h
507
u32 tid);
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.h
51
u32 num_tids,
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.h
519
u32 ctx_size,
sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.h
531
u32 ctx_size,
sys/dev/qlnx/qlnxe/ecore_init_ops.c
100
for (i = 0; i < size / sizeof(u32); i++) {
sys/dev/qlnx/qlnxe/ecore_init_ops.c
108
u32 addr,
sys/dev/qlnx/qlnxe/ecore_init_ops.c
113
u32 *p_init_val = &p_hwfn->rt_data.init_val[rt_offset];
sys/dev/qlnx/qlnxe/ecore_init_ops.c
166
sizeof(u32) * RUNTIME_ARRAY_SIZE);
sys/dev/qlnx/qlnxe/ecore_init_ops.c
186
u32 addr, u32 dmae_data_offset,
sys/dev/qlnx/qlnxe/ecore_init_ops.c
187
u32 size, const u32 *p_buf,
sys/dev/qlnx/qlnxe/ecore_init_ops.c
199
const u32 *data = p_buf + dmae_data_offset;
sys/dev/qlnx/qlnxe/ecore_init_ops.c
200
u32 i;
sys/dev/qlnx/qlnxe/ecore_init_ops.c
217
u32 addr, u32 fill_count)
sys/dev/qlnx/qlnxe/ecore_init_ops.c
219
static u32 zero_buffer[DMAE_MAX_RW_SIZE];
sys/dev/qlnx/qlnxe/ecore_init_ops.c
222
OSAL_MEMSET(zero_buffer, 0, sizeof(u32) * DMAE_MAX_RW_SIZE);
sys/dev/qlnx/qlnxe/ecore_init_ops.c
233
u32 addr, u32 fill, u32 fill_count)
sys/dev/qlnx/qlnxe/ecore_init_ops.c
235
u32 i;
sys/dev/qlnx/qlnxe/ecore_init_ops.c
237
for (i = 0; i < fill_count; i++, addr += sizeof(u32))
sys/dev/qlnx/qlnxe/ecore_init_ops.c
247
u32 dmae_array_offset = OSAL_LE32_TO_CPU(cmd->args.array_offset);
sys/dev/qlnx/qlnxe/ecore_init_ops.c
248
u32 data = OSAL_LE32_TO_CPU(cmd->data);
sys/dev/qlnx/qlnxe/ecore_init_ops.c
249
u32 addr = GET_FIELD(data, INIT_WRITE_OP_ADDRESS) << 2;
sys/dev/qlnx/qlnxe/ecore_init_ops.c
251
u32 offset, output_len, input_len, max_size;
sys/dev/qlnx/qlnxe/ecore_init_ops.c
255
const u32 *array_data;
sys/dev/qlnx/qlnxe/ecore_init_ops.c
257
u32 size;
sys/dev/qlnx/qlnxe/ecore_init_ops.c
294
u32 repeats = GET_FIELD(data,
sys/dev/qlnx/qlnxe/ecore_init_ops.c
296
u32 i;
sys/dev/qlnx/qlnxe/ecore_init_ops.c
330
u32 data = OSAL_LE32_TO_CPU(p_cmd->data);
sys/dev/qlnx/qlnxe/ecore_init_ops.c
332
u32 addr = GET_FIELD(data, INIT_WRITE_OP_ADDRESS) << 2;
sys/dev/qlnx/qlnxe/ecore_init_ops.c
370
static OSAL_INLINE bool comp_eq(u32 val, u32 expected_val)
sys/dev/qlnx/qlnxe/ecore_init_ops.c
375
static OSAL_INLINE bool comp_and(u32 val, u32 expected_val)
sys/dev/qlnx/qlnxe/ecore_init_ops.c
380
static OSAL_INLINE bool comp_or(u32 val, u32 expected_val)
sys/dev/qlnx/qlnxe/ecore_init_ops.c
390
bool (*comp_check)(u32 val, u32 expected_val);
sys/dev/qlnx/qlnxe/ecore_init_ops.c
391
u32 delay = ECORE_INIT_POLL_PERIOD_US, val;
sys/dev/qlnx/qlnxe/ecore_init_ops.c
392
u32 data, addr, poll;
sys/dev/qlnx/qlnxe/ecore_init_ops.c
486
static u32 ecore_init_cmd_mode(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_init_ops.c
498
static u32 ecore_init_cmd_phase(const struct init_if_phase_op *p_cmd,
sys/dev/qlnx/qlnxe/ecore_init_ops.c
499
u32 phase, u32 phase_id)
sys/dev/qlnx/qlnxe/ecore_init_ops.c
501
u32 data = OSAL_LE32_TO_CPU(p_cmd->phase_data);
sys/dev/qlnx/qlnxe/ecore_init_ops.c
502
u32 op_data = OSAL_LE32_TO_CPU(p_cmd->op_data);
sys/dev/qlnx/qlnxe/ecore_init_ops.c
519
u32 cmd_num, num_init_ops;
sys/dev/qlnx/qlnxe/ecore_init_ops.c
538
u32 data = OSAL_LE32_TO_CPU(cmd->raw.op_data);
sys/dev/qlnx/qlnxe/ecore_init_ops.c
585
u32 gtt_base;
sys/dev/qlnx/qlnxe/ecore_init_ops.c
586
u32 i;
sys/dev/qlnx/qlnxe/ecore_init_ops.c
597
u32 val;
sys/dev/qlnx/qlnxe/ecore_init_ops.c
639
u32 offset, len;
sys/dev/qlnx/qlnxe/ecore_init_ops.c
655
fw->arr_data = (u32 *)(fw_data + offset);
sys/dev/qlnx/qlnxe/ecore_init_ops.c
663
fw->arr_data = (const u32 *)init_val;
sys/dev/qlnx/qlnxe/ecore_init_ops.c
73
u32 rt_offset, u32 val)
sys/dev/qlnx/qlnxe/ecore_init_ops.c
87
u32 rt_offset, u32 *p_val,
sys/dev/qlnx/qlnxe/ecore_init_ops.c
95
rt_offset, (u32)(rt_offset + size - 1),
sys/dev/qlnx/qlnxe/ecore_init_ops.h
114
u32 rt_offset,
sys/dev/qlnx/qlnxe/ecore_init_ops.h
115
u32 *val,
sys/dev/qlnx/qlnxe/ecore_init_ops.h
119
ecore_init_store_rt_agg(hwfn, offset, (u32*)&val, sizeof(val))
sys/dev/qlnx/qlnxe/ecore_init_ops.h
94
u32 rt_offset,
sys/dev/qlnx/qlnxe/ecore_init_ops.h
95
u32 val);
sys/dev/qlnx/qlnxe/ecore_init_values.h
33
ARRAY_DECL u32 init_ops[] = {
sys/dev/qlnx/qlnxe/ecore_init_values.h
3952
ARRAY_DECL u32 init_val[] = {
sys/dev/qlnx/qlnxe/ecore_int.c
1007
u32 aeu_inv_arr[NUM_ATTN_REGS], aeu_mask, aeu_en, en;
sys/dev/qlnx/qlnxe/ecore_int.c
1025
u32 parities;
sys/dev/qlnx/qlnxe/ecore_int.c
1027
aeu_en = MISC_REG_AEU_ENABLE1_IGU_OUT_0 + i * sizeof(u32);
sys/dev/qlnx/qlnxe/ecore_int.c
1056
u32 bits;
sys/dev/qlnx/qlnxe/ecore_int.c
1059
i * sizeof(u32) +
sys/dev/qlnx/qlnxe/ecore_int.c
1060
k * sizeof(u32) * NUM_ATTN_REGS;
sys/dev/qlnx/qlnxe/ecore_int.c
1096
u32 flags = p_aeu->flags;
sys/dev/qlnx/qlnxe/ecore_int.c
1143
~((u32)deasserted_bits));
sys/dev/qlnx/qlnxe/ecore_int.c
1162
u32 attn_bits = 0, attn_acks = 0;
sys/dev/qlnx/qlnxe/ecore_int.c
1210
void OSAL_IOMEM *igu_addr, u32 ack_cons)
sys/dev/qlnx/qlnxe/ecore_int.c
1272
u32 tmp_index = sb_info->sb_ack;
sys/dev/qlnx/qlnxe/ecore_int.c
134
u32 tmp = ecore_rd(p_hwfn, p_hwfn->p_dpc_ptt, MCP_REG_CPU_STATE);
sys/dev/qlnx/qlnxe/ecore_int.c
1380
OSAL_MEMSET(sb_info->parity_mask, 0, sizeof(u32) * NUM_ATTN_REGS);
sys/dev/qlnx/qlnxe/ecore_int.c
1444
u32 cau_state;
sys/dev/qlnx/qlnxe/ecore_int.c
1488
u16 igu_sb_id, u32 pi_index,
sys/dev/qlnx/qlnxe/ecore_int.c
1493
u32 sb_offset, pi_offset;
sys/dev/qlnx/qlnxe/ecore_int.c
1510
CAU_REG_PI_MEMORY + pi_offset * sizeof(u32),
sys/dev/qlnx/qlnxe/ecore_int.c
1511
*((u32 *)&(pi_entry)));
sys/dev/qlnx/qlnxe/ecore_int.c
1515
*((u32 *)&(pi_entry)));
sys/dev/qlnx/qlnxe/ecore_int.c
1521
struct ecore_sb_info *p_sb, u32 pi_index,
sys/dev/qlnx/qlnxe/ecore_int.c
170
u32 tmp = ecore_rd(p_hwfn, p_hwfn->p_dpc_ptt, PSWHST_REG_VF_DISABLED_ERROR_VALID);
sys/dev/qlnx/qlnxe/ecore_int.c
174
u32 addr, data;
sys/dev/qlnx/qlnxe/ecore_int.c
1878
u32 igu_pf_conf = IGU_PF_CONF_FUNC_EN | IGU_PF_CONF_ATTN_BIT_EN;
sys/dev/qlnx/qlnxe/ecore_int.c
197
u32 addr, data, length;
sys/dev/qlnx/qlnxe/ecore_int.c
1975
u32 cmd_ctrl = 0, val = 0, sb_bit = 0, sb_bit_addr = 0, data = 0;
sys/dev/qlnx/qlnxe/ecore_int.c
1976
u32 pxp_addr = IGU_CMD_INT_ACK_BASE + igu_sb_id;
sys/dev/qlnx/qlnxe/ecore_int.c
1977
u32 sleep_cnt = IGU_CLEANUP_SLEEP_LENGTH;
sys/dev/qlnx/qlnxe/ecore_int.c
2008
sb_bit_addr = igu_sb_id / 32 * sizeof(u32);
sys/dev/qlnx/qlnxe/ecore_int.c
2048
u32 val;
sys/dev/qlnx/qlnxe/ecore_int.c
2077
u32 val = 0;
sys/dev/qlnx/qlnxe/ecore_int.c
2115
u32 val, rval;
sys/dev/qlnx/qlnxe/ecore_int.c
2229
sizeof(u32) * igu_sb_id);
sys/dev/qlnx/qlnxe/ecore_int.c
2234
sizeof(u32) * igu_sb_id,
sys/dev/qlnx/qlnxe/ecore_int.c
2272
u32 val = ecore_rd(p_hwfn, p_ptt,
sys/dev/qlnx/qlnxe/ecore_int.c
2273
IGU_REG_MAPPING_MEMORY + sizeof(u32) * igu_sb_id);
sys/dev/qlnx/qlnxe/ecore_int.c
2292
u32 min_vf = 0, max_vf = 0;
sys/dev/qlnx/qlnxe/ecore_int.c
2386
u32 val = 0;
sys/dev/qlnx/qlnxe/ecore_int.c
2497
IGU_REG_MAPPING_MEMORY + sizeof(u32) * igu_sb_id,
sys/dev/qlnx/qlnxe/ecore_int.c
2519
u32 igu_pf_conf = IGU_PF_CONF_FUNC_EN;
sys/dev/qlnx/qlnxe/ecore_int.c
2530
u32 intr_status_hi = 0, intr_status_lo = 0;
sys/dev/qlnx/qlnxe/ecore_int.c
260
u32 tmp, tmp2;
sys/dev/qlnx/qlnxe/ecore_int.c
315
u32 tmp;
sys/dev/qlnx/qlnxe/ecore_int.c
319
u32 addr_lo, addr_hi, details;
sys/dev/qlnx/qlnxe/ecore_int.c
342
u32 addr_lo, addr_hi, details;
sys/dev/qlnx/qlnxe/ecore_int.c
369
u32 addr_hi, addr_lo;
sys/dev/qlnx/qlnxe/ecore_int.c
383
u32 addr_hi, addr_lo, details;
sys/dev/qlnx/qlnxe/ecore_int.c
439
u32 usage = 1;
sys/dev/qlnx/qlnxe/ecore_int.c
478
u32 int_sts, first_drop_reason, details, address, overflow,
sys/dev/qlnx/qlnxe/ecore_int.c
557
u32 val = ecore_rd(p_hwfn, p_hwfn->p_dpc_ptt,
sys/dev/qlnx/qlnxe/ecore_int.c
789
u32 parity_mask[NUM_ATTN_REGS];
sys/dev/qlnx/qlnxe/ecore_int.c
798
u32 mfw_attn_addr;
sys/dev/qlnx/qlnxe/ecore_int.c
830
u32 igu_mask;
sys/dev/qlnx/qlnxe/ecore_int.c
859
IGU_CMD_INT_ACK_BASE) << 3), (u32)asserted_bits);
sys/dev/qlnx/qlnxe/ecore_int.c
910
u32 aeu_en_reg,
sys/dev/qlnx/qlnxe/ecore_int.c
912
u32 bitmask)
sys/dev/qlnx/qlnxe/ecore_int.c
946
u32 val;
sys/dev/qlnx/qlnxe/ecore_int.c
947
u32 mask = ~bitmask;
sys/dev/qlnx/qlnxe/ecore_int.c
967
u32 aeu_en_reg, u8 bit_index)
sys/dev/qlnx/qlnxe/ecore_int.c
969
u32 block_id = p_aeu->block_index, mask, val;
sys/dev/qlnx/qlnxe/ecore_int_api.h
121
u32 val;
sys/dev/qlnx/qlnxe/ecore_int_api.h
153
int size, u32 *data)
sys/dev/qlnx/qlnxe/ecore_int_api.h
157
int size, u32 *data)
sys/dev/qlnx/qlnxe/ecore_int_api.h
164
DIRECT_REG_WR(p_hwfn, &((u32 OSAL_IOMEM *)addr)[i], data[i]);
sys/dev/qlnx/qlnxe/ecore_int_api.h
170
int size, u32 *data)
sys/dev/qlnx/qlnxe/ecore_int_api.h
176
int size, u32 *data)
sys/dev/qlnx/qlnxe/ecore_int_api.h
205
u32 pi_index,
sys/dev/qlnx/qlnxe/ecore_int_api.h
53
u32 sb_ack; /* Last given ack */
sys/dev/qlnx/qlnxe/ecore_int_api.h
67
u32 igu_prod;
sys/dev/qlnx/qlnxe/ecore_int_api.h
68
u32 igu_cons;
sys/dev/qlnx/qlnxe/ecore_int_api.h
86
u32 prod = 0;
sys/dev/qlnx/qlnxe/ecore_iov_api.h
137
u32 request_size;
sys/dev/qlnx/qlnxe/ecore_iov_api.h
138
u32 request_offset;
sys/dev/qlnx/qlnxe/ecore_iov_api.h
140
u32 response_size;
sys/dev/qlnx/qlnxe/ecore_iov_api.h
141
u32 response_offset;
sys/dev/qlnx/qlnxe/ecore_iov_api.h
164
u32 cap; /* SR-IOV Capabilities */
sys/dev/qlnx/qlnxe/ecore_iov_api.h
173
u32 pgsz; /* page size for BAR alignment */
sys/dev/qlnx/qlnxe/ecore_iov_api.h
176
u32 first_vf_in_pf;
sys/dev/qlnx/qlnxe/ecore_iov_api.h
546
bool ecore_iov_is_valid_vfpf_msg_length(u32 length);
sys/dev/qlnx/qlnxe/ecore_iov_api.h
553
u32 ecore_iov_pfvf_msg_length(void);
sys/dev/qlnx/qlnxe/ecore_iov_api.h
711
int vfid, u32 rate);
sys/dev/qlnx/qlnxe/ecore_iov_api.h
800
static OSAL_INLINE bool ecore_iov_is_valid_vfpf_msg_length(u32 OSAL_UNUSED length) {return false;}
sys/dev/qlnx/qlnxe/ecore_iov_api.h
801
static OSAL_INLINE u32 ecore_iov_pfvf_msg_length(void) {return 0;}
sys/dev/qlnx/qlnxe/ecore_iov_api.h
814
static OSAL_INLINE enum _ecore_status_t ecore_iov_configure_min_tx_rate(struct ecore_dev OSAL_UNUSED *p_dev, int OSAL_UNUSED vfid, OSAL_UNUSED u32 rate) { return ECORE_INVAL; }
sys/dev/qlnx/qlnxe/ecore_iov_api.h
90
u32 driver_version;
sys/dev/qlnx/qlnxe/ecore_iscsi_api.h
119
u32 remote_ip[4];
sys/dev/qlnx/qlnxe/ecore_iscsi_api.h
120
u32 local_ip[4];
sys/dev/qlnx/qlnxe/ecore_iscsi_api.h
123
u32 rcv_next;
sys/dev/qlnx/qlnxe/ecore_iscsi_api.h
124
u32 snd_una;
sys/dev/qlnx/qlnxe/ecore_iscsi_api.h
125
u32 snd_next;
sys/dev/qlnx/qlnxe/ecore_iscsi_api.h
126
u32 snd_max;
sys/dev/qlnx/qlnxe/ecore_iscsi_api.h
127
u32 snd_wnd;
sys/dev/qlnx/qlnxe/ecore_iscsi_api.h
128
u32 rcv_wnd;
sys/dev/qlnx/qlnxe/ecore_iscsi_api.h
129
u32 snd_wl1;
sys/dev/qlnx/qlnxe/ecore_iscsi_api.h
130
u32 cwnd;
sys/dev/qlnx/qlnxe/ecore_iscsi_api.h
131
u32 ss_thresh;
sys/dev/qlnx/qlnxe/ecore_iscsi_api.h
134
u32 ts_recent;
sys/dev/qlnx/qlnxe/ecore_iscsi_api.h
135
u32 ts_recent_age;
sys/dev/qlnx/qlnxe/ecore_iscsi_api.h
136
u32 total_rt;
sys/dev/qlnx/qlnxe/ecore_iscsi_api.h
137
u32 ka_timeout_delta;
sys/dev/qlnx/qlnxe/ecore_iscsi_api.h
138
u32 rt_timeout_delta;
sys/dev/qlnx/qlnxe/ecore_iscsi_api.h
143
u32 flow_label;
sys/dev/qlnx/qlnxe/ecore_iscsi_api.h
144
u32 ka_timeout;
sys/dev/qlnx/qlnxe/ecore_iscsi_api.h
145
u32 ka_interval;
sys/dev/qlnx/qlnxe/ecore_iscsi_api.h
146
u32 max_rt_time;
sys/dev/qlnx/qlnxe/ecore_iscsi_api.h
147
u32 initial_rcv_wnd;
sys/dev/qlnx/qlnxe/ecore_iscsi_api.h
165
u32 max_seq_size;
sys/dev/qlnx/qlnxe/ecore_iscsi_api.h
166
u32 max_recv_pdu_length;
sys/dev/qlnx/qlnxe/ecore_iscsi_api.h
167
u32 max_send_pdu_length;
sys/dev/qlnx/qlnxe/ecore_iscsi_api.h
168
u32 first_seq_length;
sys/dev/qlnx/qlnxe/ecore_iscsi_api.h
169
u32 exp_stat_sn;
sys/dev/qlnx/qlnxe/ecore_iscsi_api.h
170
u32 stat_sn;
sys/dev/qlnx/qlnxe/ecore_iscsi_api.h
180
u32 initial_ref_tag;
sys/dev/qlnx/qlnxe/ecore_iscsi_api.h
229
u32 cid);
sys/dev/qlnx/qlnxe/ecore_iscsi_api.h
42
u32 iscsi_cmdq_threshold_cnt;
sys/dev/qlnx/qlnxe/ecore_iscsi_api.h
43
u32 iscsi_rq_threshold_cnt;
sys/dev/qlnx/qlnxe/ecore_iscsi_api.h
44
u32 iscsi_immq_threshold_cnt;
sys/dev/qlnx/qlnxe/ecore_iscsi_api.h
83
u32 iscsi_tcp_rx_chksum_err_cnt;
sys/dev/qlnx/qlnxe/ecore_iscsi_api.h
93
u32 icid;
sys/dev/qlnx/qlnxe/ecore_iscsi_api.h
94
u32 fw_cid;
sys/dev/qlnx/qlnxe/ecore_iscsi_api.h
99
u32 initial_ack;
sys/dev/qlnx/qlnxe/ecore_iwarp.c
1002
*((u32 *)((u8 *)ep->ep_buffer_virt->in_pdata)));
sys/dev/qlnx/qlnxe/ecore_iwarp.c
1346
*((u32 *)mpa_v2_params),
sys/dev/qlnx/qlnxe/ecore_iwarp.c
1367
u32 cid;
sys/dev/qlnx/qlnxe/ecore_iwarp.c
147
ecore_iwarp_alloc_cid(struct ecore_hwfn *p_hwfn, u32 *cid)
sys/dev/qlnx/qlnxe/ecore_iwarp.c
1571
u32 cid;
sys/dev/qlnx/qlnxe/ecore_iwarp.c
1616
u32 cid;
sys/dev/qlnx/qlnxe/ecore_iwarp.c
183
ecore_iwarp_set_tcp_cid(struct ecore_hwfn *p_hwfn, u32 cid)
sys/dev/qlnx/qlnxe/ecore_iwarp.c
1963
static const u32 ip_zero[4] = {0, 0, 0, 0};
sys/dev/qlnx/qlnxe/ecore_iwarp.c
201
ecore_iwarp_alloc_tcp_cid(struct ecore_hwfn *p_hwfn, u32 *cid)
sys/dev/qlnx/qlnxe/ecore_iwarp.c
2029
eth_hlen = ETH_HLEN + (vlan_valid ? sizeof(u32) : 0);
sys/dev/qlnx/qlnxe/ecore_iwarp.c
2063
ip_hlen = (iph->ihl)*sizeof(u32);
sys/dev/qlnx/qlnxe/ecore_iwarp.c
2116
u32 idx = cid - ecore_cxt_get_proto_cid_start(p_hwfn, PROTOCOLID_IWARP);
sys/dev/qlnx/qlnxe/ecore_iwarp.c
230
static void ecore_iwarp_cid_cleaned(struct ecore_hwfn *p_hwfn, u32 cid)
sys/dev/qlnx/qlnxe/ecore_iwarp.c
2473
u32 opaque_data0, u32 opaque_data1)
sys/dev/qlnx/qlnxe/ecore_iwarp.c
2517
eth_hlen = ETH_HLEN + (vlan_valid ? sizeof(u32) : 0);
sys/dev/qlnx/qlnxe/ecore_iwarp.c
2522
ip_hlen = (iph->ihl)*sizeof(u32);
sys/dev/qlnx/qlnxe/ecore_iwarp.c
260
u32 cid;
sys/dev/qlnx/qlnxe/ecore_iwarp.c
2786
u32 hdr_size;
sys/dev/qlnx/qlnxe/ecore_iwarp.c
2999
u32 opaque_data_0,
sys/dev/qlnx/qlnxe/ecore_iwarp.c
3000
u32 opaque_data_1)
sys/dev/qlnx/qlnxe/ecore_iwarp.c
3115
u32 mpa_buff_size;
sys/dev/qlnx/qlnxe/ecore_iwarp.c
3258
(u32)(sizeof(*iwarp_info->mpa_bufs) *
sys/dev/qlnx/qlnxe/ecore_iwarp.c
3291
u32 rcv_wnd_size;
sys/dev/qlnx/qlnxe/ecore_iwarp.c
3292
u32 n_ooo_bufs;
sys/dev/qlnx/qlnxe/ecore_iwarp.c
3311
n_ooo_bufs = (u32)(((u64)ECORE_MAX_OOO *
sys/dev/qlnx/qlnxe/ecore_iwarp.c
3314
n_ooo_bufs = OSAL_MIN_T(u32, n_ooo_bufs, USHRT_MAX);
sys/dev/qlnx/qlnxe/ecore_iwarp.c
3325
u32 rcv_wnd_size;
sys/dev/qlnx/qlnxe/ecore_iwarp.c
3340
iwarp_info->rcv_wnd_scale = OSAL_MIN_T(u32, OSAL_LOG2(rcv_wnd_size) -
sys/dev/qlnx/qlnxe/ecore_iwarp.h
104
u32 rcv_wnd_scale;
sys/dev/qlnx/qlnxe/ecore_iwarp.h
169
u32 tcp_cid;
sys/dev/qlnx/qlnxe/ecore_iwarp.h
170
u32 cid;
sys/dev/qlnx/qlnxe/ecore_iwarp.h
200
u32 max_backlog;
sys/dev/qlnx/qlnxe/ecore_iwarp.h
202
u32 ip_addr[4];
sys/dev/qlnx/qlnxe/ecore_iwarp.h
67
u32 buff_size;
sys/dev/qlnx/qlnxe/ecore_l2.c
1000
__internal_ram_wr(p_hwfn, *pp_prod, sizeof(u32),
sys/dev/qlnx/qlnxe/ecore_l2.c
1001
(u32 *)(&init_prod_val));
sys/dev/qlnx/qlnxe/ecore_l2.c
127
u32 i;
sys/dev/qlnx/qlnxe/ecore_l2.c
1572
static u32 ecore_calc_crc32c(u8 *crc32_packet, u32 crc32_length, u32 crc32_seed)
sys/dev/qlnx/qlnxe/ecore_l2.c
1574
u32 byte = 0, bit = 0, crc32_result = crc32_seed;
sys/dev/qlnx/qlnxe/ecore_l2.c
1598
static u32 ecore_crc32c_le(u32 seed, u8 *mac)
sys/dev/qlnx/qlnxe/ecore_l2.c
1600
u32 packet_buf[2] = {0};
sys/dev/qlnx/qlnxe/ecore_l2.c
1608
u32 crc = ecore_crc32c_le(ETH_MULTICAST_BIN_FROM_MAC_SEED, mac);
sys/dev/qlnx/qlnxe/ecore_l2.c
1754
u32 *p_addr, u32 *p_len,
sys/dev/qlnx/qlnxe/ecore_l2.c
1776
u32 pstats_addr = 0, pstats_len = 0;
sys/dev/qlnx/qlnxe/ecore_l2.c
1806
u32 tstats_addr, tstats_len;
sys/dev/qlnx/qlnxe/ecore_l2.c
1831
u32 *p_addr, u32 *p_len,
sys/dev/qlnx/qlnxe/ecore_l2.c
1853
u32 ustats_addr = 0, ustats_len = 0;
sys/dev/qlnx/qlnxe/ecore_l2.c
1877
u32 *p_addr, u32 *p_len,
sys/dev/qlnx/qlnxe/ecore_l2.c
1899
u32 mstats_addr = 0, mstats_len = 0;
sys/dev/qlnx/qlnxe/ecore_l2.c
2076
u32 i;
sys/dev/qlnx/qlnxe/ecore_l2.c
2105
u32 addr = 0, len = 0;
sys/dev/qlnx/qlnxe/ecore_l2.c
2170
(u32)p_cfg_params->mode);
sys/dev/qlnx/qlnxe/ecore_l2.c
2250
u32 coalesce, address, is_valid;
sys/dev/qlnx/qlnxe/ecore_l2.c
2286
u32 coalesce, address, is_valid;
sys/dev/qlnx/qlnxe/ecore_l2.c
230
u16 opaque_fid, u32 cid,
sys/dev/qlnx/qlnxe/ecore_l2.c
331
u32 cid = 0;
sys/dev/qlnx/qlnxe/ecore_l2.c
63
u32 queues;
sys/dev/qlnx/qlnxe/ecore_l2.c
725
u32 *p_bins = p_params->bins;
sys/dev/qlnx/qlnxe/ecore_l2.c
74
u32 i;
sys/dev/qlnx/qlnxe/ecore_l2.c
92
p_l2_info->queues = (u32)OSAL_MAX_T(u8, rx, tx);
sys/dev/qlnx/qlnxe/ecore_l2.c
992
u32 init_prod_val = 0;
sys/dev/qlnx/qlnxe/ecore_l2.h
83
u32 cid;
sys/dev/qlnx/qlnxe/ecore_l2_api.h
109
u32 rss_key[ECORE_RSS_KEY_SIZE];
sys/dev/qlnx/qlnxe/ecore_l2_api.h
161
u32 vni;
sys/dev/qlnx/qlnxe/ecore_l2_api.h
169
u32 bins[ETH_MULTICAST_MAC_BINS_IN_REGS];
sys/dev/qlnx/qlnxe/ecore_l2_api.h
332
u32 concrete_fid;
sys/dev/qlnx/qlnxe/ecore_l2_api.h
386
u32 bins[ETH_MULTICAST_MAC_BINS_IN_REGS];
sys/dev/qlnx/qlnxe/ecore_ll2.c
1046
u32 capacity;
sys/dev/qlnx/qlnxe/ecore_ll2.c
1103
u32 capacity;
sys/dev/qlnx/qlnxe/ecore_ll2.c
1105
u32 desc_size;
sys/dev/qlnx/qlnxe/ecore_ll2.c
1151
u32 rx_buffer_size = 0;
sys/dev/qlnx/qlnxe/ecore_ll2.c
1412
u32 i, capacity;
sys/dev/qlnx/qlnxe/ecore_ll2.c
1413
u32 desc_size;
sys/dev/qlnx/qlnxe/ecore_ll2.c
1566
DIRECT_REG_WR(p_hwfn, p_rx->set_prod_addr, *((u32 *)&rx_prod));
sys/dev/qlnx/qlnxe/ecore_ll2.c
1785
DIRECT_REG_WR_DB(p_hwfn, p_tx->doorbell_addr, *((u32 *)&p_tx->db_msg));
sys/dev/qlnx/qlnxe/ecore_ll2.c
2094
u32 tstats_addr;
sys/dev/qlnx/qlnxe/ecore_ll2.c
2116
u32 ustats_addr;
sys/dev/qlnx/qlnxe/ecore_ll2.c
2140
u32 pstats_addr;
sys/dev/qlnx/qlnxe/ecore_ll2.c
520
u32 cid;
sys/dev/qlnx/qlnxe/ecore_ll2.c
543
u32 cid;
sys/dev/qlnx/qlnxe/ecore_ll2.h
115
u32 cid;
sys/dev/qlnx/qlnxe/ecore_ll2.h
59
u32 opaque_data[2];
sys/dev/qlnx/qlnxe/ecore_ll2_api.h
110
u32 opaque_data_0; /* src_mac_addr_hi */
sys/dev/qlnx/qlnxe/ecore_ll2_api.h
111
u32 opaque_data_1; /* src_mac_addr_lo */
sys/dev/qlnx/qlnxe/ecore_ll2_api.h
114
u32 src_qp;
sys/dev/qlnx/qlnxe/ecore_ll2_api.h
148
u32 opaque_data_0,
sys/dev/qlnx/qlnxe/ecore_ll2_api.h
149
u32 opaque_data_1);
sys/dev/qlnx/qlnxe/ecore_mcp.c
111
u32 length = MFW_DRV_MSG_MAX_DWORDS(p_hwfn->mcp_info->mfw_mb_length);
sys/dev/qlnx/qlnxe/ecore_mcp.c
113
u32 i;
sys/dev/qlnx/qlnxe/ecore_mcp.c
1173
u32 resp = 0, param = 0;
sys/dev/qlnx/qlnxe/ecore_mcp.c
1202
u32 wol_param;
sys/dev/qlnx/qlnxe/ecore_mcp.c
126
(i << 2) + sizeof(u32));
sys/dev/qlnx/qlnxe/ecore_mcp.c
1261
u32 addr = SECTION_OFFSIZE_ADDR(p_hwfn->mcp_info->public_base,
sys/dev/qlnx/qlnxe/ecore_mcp.c
1263
u32 mfw_path_offsize = ecore_rd(p_hwfn, p_ptt, addr);
sys/dev/qlnx/qlnxe/ecore_mcp.c
1264
u32 path_addr = SECTION_ADDR(mfw_path_offsize,
sys/dev/qlnx/qlnxe/ecore_mcp.c
1266
u32 disabled_vfs[VF_MAX_STATIC / 32];
sys/dev/qlnx/qlnxe/ecore_mcp.c
1278
sizeof(u32) * i);
sys/dev/qlnx/qlnxe/ecore_mcp.c
128
((u32 *)p_hwfn->mcp_info->mfw_mb_cur)[i] =
sys/dev/qlnx/qlnxe/ecore_mcp.c
1290
u32 *vfs_to_ack)
sys/dev/qlnx/qlnxe/ecore_mcp.c
1292
u32 addr = SECTION_OFFSIZE_ADDR(p_hwfn->mcp_info->public_base,
sys/dev/qlnx/qlnxe/ecore_mcp.c
1294
u32 mfw_func_offsize = ecore_rd(p_hwfn, p_ptt, addr);
sys/dev/qlnx/qlnxe/ecore_mcp.c
1295
u32 func_addr = SECTION_ADDR(mfw_func_offsize,
sys/dev/qlnx/qlnxe/ecore_mcp.c
1322
i * sizeof(u32), 0);
sys/dev/qlnx/qlnxe/ecore_mcp.c
1330
u32 transceiver_state;
sys/dev/qlnx/qlnxe/ecore_mcp.c
1339
transceiver_state, (u32)(p_hwfn->mcp_info->port_addr +
sys/dev/qlnx/qlnxe/ecore_mcp.c
1358
u32 eee_status, val;
sys/dev/qlnx/qlnxe/ecore_mcp.c
1377
static u32 ecore_mcp_get_shmem_func(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_mcp.c
1382
u32 addr = SECTION_OFFSIZE_ADDR(p_hwfn->mcp_info->public_base,
sys/dev/qlnx/qlnxe/ecore_mcp.c
1384
u32 mfw_path_offsize = ecore_rd(p_hwfn, p_ptt, addr);
sys/dev/qlnx/qlnxe/ecore_mcp.c
1385
u32 func_addr = SECTION_ADDR(mfw_path_offsize, pfid);
sys/dev/qlnx/qlnxe/ecore_mcp.c
1386
u32 i, size;
sys/dev/qlnx/qlnxe/ecore_mcp.c
1390
size = OSAL_MIN_T(u32, sizeof(*p_data),
sys/dev/qlnx/qlnxe/ecore_mcp.c
1392
for (i = 0; i < size / sizeof(u32); i++)
sys/dev/qlnx/qlnxe/ecore_mcp.c
1393
((u32 *)p_data)[i] = ecore_rd(p_hwfn, p_ptt,
sys/dev/qlnx/qlnxe/ecore_mcp.c
1439
u32 status = 0;
sys/dev/qlnx/qlnxe/ecore_mcp.c
1452
status, (u32)(p_hwfn->mcp_info->port_addr +
sys/dev/qlnx/qlnxe/ecore_mcp.c
1599
u32 cmd;
sys/dev/qlnx/qlnxe/ecore_mcp.c
1670
u32 ecore_get_process_kill_counter(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_mcp.c
1673
u32 path_offsize_addr, path_offsize, path_addr, proc_kill_cnt;
sys/dev/qlnx/qlnxe/ecore_mcp.c
1696
u32 proc_kill_cnt;
sys/dev/qlnx/qlnxe/ecore_mcp.c
1732
u32 hsi_param;
sys/dev/qlnx/qlnxe/ecore_mcp.c
1775
u32 resp = 0, param = 0;
sys/dev/qlnx/qlnxe/ecore_mcp.c
1801
u32 resp = 0, param = 0;
sys/dev/qlnx/qlnxe/ecore_mcp.c
1843
u32 cmd;
sys/dev/qlnx/qlnxe/ecore_mcp.c
1848
u32 mcp_resp;
sys/dev/qlnx/qlnxe/ecore_mcp.c
1898
u32 epoch)
sys/dev/qlnx/qlnxe/ecore_mcp.c
1951
u32 addr, global_offsize, global_addr;
sys/dev/qlnx/qlnxe/ecore_mcp.c
2083
u32 port_cfg, val;
sys/dev/qlnx/qlnxe/ecore_mcp.c
224
u32 drv_mb_offsize, mfw_mb_offsize;
sys/dev/qlnx/qlnxe/ecore_mcp.c
2241
OSAL_BE32 val = OSAL_CPU_TO_BE32(((u32 *)info->mfw_mb_cur)[i]);
sys/dev/qlnx/qlnxe/ecore_mcp.c
2245
info->mfw_mb_addr + sizeof(u32) +
sys/dev/qlnx/qlnxe/ecore_mcp.c
2247
sizeof(u32) + i * sizeof(u32), val);
sys/dev/qlnx/qlnxe/ecore_mcp.c
225
u32 mcp_pf_id = MCP_PF_ID(p_hwfn);
sys/dev/qlnx/qlnxe/ecore_mcp.c
2264
u32 *p_mfw_ver,
sys/dev/qlnx/qlnxe/ecore_mcp.c
2265
u32 *p_running_bundle_id)
sys/dev/qlnx/qlnxe/ecore_mcp.c
2267
u32 global_offsize;
sys/dev/qlnx/qlnxe/ecore_mcp.c
2309
u32 *p_mbi_ver)
sys/dev/qlnx/qlnxe/ecore_mcp.c
2311
u32 nvm_cfg_addr, nvm_cfg1_offset, mbi_ver_addr;
sys/dev/qlnx/qlnxe/ecore_mcp.c
2346
u32 *p_media_type)
sys/dev/qlnx/qlnxe/ecore_mcp.c
2372
u32 *p_tranceiver_type)
sys/dev/qlnx/qlnxe/ecore_mcp.c
2395
static int is_transceiver_ready(u32 transceiver_state, u32 transceiver_type)
sys/dev/qlnx/qlnxe/ecore_mcp.c
2409
u32 *p_speed_mask)
sys/dev/qlnx/qlnxe/ecore_mcp.c
2411
u32 transceiver_data, transceiver_type, transceiver_state;
sys/dev/qlnx/qlnxe/ecore_mcp.c
2530
u32 *p_board_config)
sys/dev/qlnx/qlnxe/ecore_mcp.c
2532
u32 nvm_cfg_addr, nvm_cfg1_offset, port_cfg_addr;
sys/dev/qlnx/qlnxe/ecore_mcp.c
2577
(u32) *p_proto);
sys/dev/qlnx/qlnxe/ecore_mcp.c
2585
u32 resp = 0, param = 0;
sys/dev/qlnx/qlnxe/ecore_mcp.c
2621
(u32) *p_proto, resp, param);
sys/dev/qlnx/qlnxe/ecore_mcp.c
2671
(u32)(shmem_info.config & FUNC_MF_CFG_PROTOCOL_MASK));
sys/dev/qlnx/qlnxe/ecore_mcp.c
2706
u32 resp = 0, param = 0;
sys/dev/qlnx/qlnxe/ecore_mcp.c
2764
u32 resp = 0, param = 0;
sys/dev/qlnx/qlnxe/ecore_mcp.c
2788
u32 personalities)
sys/dev/qlnx/qlnxe/ecore_mcp.c
2807
if ((1 << ((u32)protocol)) & personalities)
sys/dev/qlnx/qlnxe/ecore_mcp.c
2817
u32 *p_flash_size)
sys/dev/qlnx/qlnxe/ecore_mcp.c
2819
u32 flash_size;
sys/dev/qlnx/qlnxe/ecore_mcp.c
2884
u32 resp = 0, param = 0, rc_param = 0;
sys/dev/qlnx/qlnxe/ecore_mcp.c
2918
u32 resp = 0, param = num, rc_param = 0;
sys/dev/qlnx/qlnxe/ecore_mcp.c
2952
u32 num_words, i;
sys/dev/qlnx/qlnxe/ecore_mcp.c
2967
p_name = &p_ver->name[i * sizeof(u32)];
sys/dev/qlnx/qlnxe/ecore_mcp.c
2968
val = OSAL_CPU_TO_BE32(*(u32 *)p_name);
sys/dev/qlnx/qlnxe/ecore_mcp.c
2969
*(u32 *)&drv_version.name[i * sizeof(u32)] = val;
sys/dev/qlnx/qlnxe/ecore_mcp.c
298
u32 size;
sys/dev/qlnx/qlnxe/ecore_mcp.c
2990
u32 resp = 0, param = 0, cpu_state, cnt = 0;
sys/dev/qlnx/qlnxe/ecore_mcp.c
3024
u32 cpu_mode, cpu_state;
sys/dev/qlnx/qlnxe/ecore_mcp.c
3052
u32 resp = 0, param = 0;
sys/dev/qlnx/qlnxe/ecore_mcp.c
3053
u32 drv_mb_param;
sys/dev/qlnx/qlnxe/ecore_mcp.c
3085
u32 resp = 0, param = 0;
sys/dev/qlnx/qlnxe/ecore_mcp.c
3086
u32 drv_mb_param;
sys/dev/qlnx/qlnxe/ecore_mcp.c
3119
u32 addr, size, i;
sys/dev/qlnx/qlnxe/ecore_mcp.c
3169
u32 resp = 0, param = 0;
sys/dev/qlnx/qlnxe/ecore_mcp.c
3170
u32 drv_mb_param;
sys/dev/qlnx/qlnxe/ecore_mcp.c
3173
drv_mb_param = (u32)mtu << DRV_MB_PARAM_OV_MTU_SIZE_OFFSET;
sys/dev/qlnx/qlnxe/ecore_mcp.c
3187
u32 mfw_mac[2];
sys/dev/qlnx/qlnxe/ecore_mcp.c
3220
u32 resp = 0, param = 0;
sys/dev/qlnx/qlnxe/ecore_mcp.c
3221
u32 drv_mb_param;
sys/dev/qlnx/qlnxe/ecore_mcp.c
3260
u32 resp = 0, param = 0;
sys/dev/qlnx/qlnxe/ecore_mcp.c
3261
u32 drv_mb_param;
sys/dev/qlnx/qlnxe/ecore_mcp.c
3291
u32 resp = 0, param = 0, drv_mb_param;
sys/dev/qlnx/qlnxe/ecore_mcp.c
3319
u32 mask_parities)
sys/dev/qlnx/qlnxe/ecore_mcp.c
3321
u32 resp = 0, param = 0;
sys/dev/qlnx/qlnxe/ecore_mcp.c
3337
enum _ecore_status_t ecore_mcp_nvm_read(struct ecore_dev *p_dev, u32 addr,
sys/dev/qlnx/qlnxe/ecore_mcp.c
3338
u8 *p_buf, u32 len)
sys/dev/qlnx/qlnxe/ecore_mcp.c
334
size = MFW_DRV_MSG_MAX_DWORDS(p_info->mfw_mb_length) * sizeof(u32);
sys/dev/qlnx/qlnxe/ecore_mcp.c
3341
u32 bytes_left, offset, bytes_to_copy, buf_size;
sys/dev/qlnx/qlnxe/ecore_mcp.c
3342
u32 nvm_offset, resp = 0, param;
sys/dev/qlnx/qlnxe/ecore_mcp.c
3353
bytes_to_copy = OSAL_MIN_T(u32, bytes_left,
sys/dev/qlnx/qlnxe/ecore_mcp.c
3360
(u32 *)(p_buf + offset));
sys/dev/qlnx/qlnxe/ecore_mcp.c
3393
enum _ecore_status_t ecore_mcp_phy_read(struct ecore_dev *p_dev, u32 cmd,
sys/dev/qlnx/qlnxe/ecore_mcp.c
3394
u32 addr, u8 *p_buf, u32 len)
sys/dev/qlnx/qlnxe/ecore_mcp.c
3398
u32 resp, param;
sys/dev/qlnx/qlnxe/ecore_mcp.c
3409
addr, &resp, ¶m, &len, (u32 *)p_buf);
sys/dev/qlnx/qlnxe/ecore_mcp.c
3435
u32 addr)
sys/dev/qlnx/qlnxe/ecore_mcp.c
3439
u32 resp, param;
sys/dev/qlnx/qlnxe/ecore_mcp.c
3454
u32 addr)
sys/dev/qlnx/qlnxe/ecore_mcp.c
3458
u32 resp, param;
sys/dev/qlnx/qlnxe/ecore_mcp.c
3475
enum _ecore_status_t ecore_mcp_nvm_write(struct ecore_dev *p_dev, u32 cmd,
sys/dev/qlnx/qlnxe/ecore_mcp.c
3476
u32 addr, u8 *p_buf, u32 len)
sys/dev/qlnx/qlnxe/ecore_mcp.c
3478
u32 buf_idx, buf_size, nvm_cmd, nvm_offset, resp = 0, param;
sys/dev/qlnx/qlnxe/ecore_mcp.c
3509
buf_size = OSAL_MIN_T(u32, (len - buf_idx),
sys/dev/qlnx/qlnxe/ecore_mcp.c
351
u32 generic_por_0 = ecore_rd(p_hwfn, p_ptt, MISCS_REG_GENERIC_POR_0);
sys/dev/qlnx/qlnxe/ecore_mcp.c
3516
(u32 *)&p_buf[buf_idx]);
sys/dev/qlnx/qlnxe/ecore_mcp.c
3551
enum _ecore_status_t ecore_mcp_phy_write(struct ecore_dev *p_dev, u32 cmd,
sys/dev/qlnx/qlnxe/ecore_mcp.c
3552
u32 addr, u8 *p_buf, u32 len)
sys/dev/qlnx/qlnxe/ecore_mcp.c
3556
u32 resp, param, nvm_cmd;
sys/dev/qlnx/qlnxe/ecore_mcp.c
3566
&resp, ¶m, len, (u32 *)p_buf);
sys/dev/qlnx/qlnxe/ecore_mcp.c
3576
u32 addr)
sys/dev/qlnx/qlnxe/ecore_mcp.c
3580
u32 resp, param;
sys/dev/qlnx/qlnxe/ecore_mcp.c
3597
u32 port, u32 addr, u32 offset,
sys/dev/qlnx/qlnxe/ecore_mcp.c
3598
u32 len, u8 *p_buf)
sys/dev/qlnx/qlnxe/ecore_mcp.c
3600
u32 bytes_left, bytes_to_copy, buf_size, nvm_offset;
sys/dev/qlnx/qlnxe/ecore_mcp.c
3601
u32 resp, param;
sys/dev/qlnx/qlnxe/ecore_mcp.c
3610
bytes_to_copy = OSAL_MIN_T(u32, bytes_left,
sys/dev/qlnx/qlnxe/ecore_mcp.c
3621
(u32 *)(p_buf + offset));
sys/dev/qlnx/qlnxe/ecore_mcp.c
3643
u32 port, u32 addr, u32 offset,
sys/dev/qlnx/qlnxe/ecore_mcp.c
3644
u32 len, u8 *p_buf)
sys/dev/qlnx/qlnxe/ecore_mcp.c
3646
u32 buf_idx, buf_size, nvm_offset, resp, param;
sys/dev/qlnx/qlnxe/ecore_mcp.c
3653
buf_size = OSAL_MIN_T(u32, (len - buf_idx),
sys/dev/qlnx/qlnxe/ecore_mcp.c
3664
(u32 *)&p_buf[buf_idx]);
sys/dev/qlnx/qlnxe/ecore_mcp.c
3685
u16 gpio, u32 *gpio_val)
sys/dev/qlnx/qlnxe/ecore_mcp.c
3688
u32 drv_mb_param = 0, rsp;
sys/dev/qlnx/qlnxe/ecore_mcp.c
369
u32 org_mcp_reset_seq, seq, delay = CHIP_MCP_RESP_ITER_US, cnt = 0;
sys/dev/qlnx/qlnxe/ecore_mcp.c
3709
u32 drv_mb_param = 0, param, rsp;
sys/dev/qlnx/qlnxe/ecore_mcp.c
3728
u16 gpio, u32 *gpio_direction,
sys/dev/qlnx/qlnxe/ecore_mcp.c
3729
u32 *gpio_ctrl)
sys/dev/qlnx/qlnxe/ecore_mcp.c
3731
u32 drv_mb_param = 0, rsp, val = 0;
sys/dev/qlnx/qlnxe/ecore_mcp.c
3755
u32 drv_mb_param = 0, rsp, param;
sys/dev/qlnx/qlnxe/ecore_mcp.c
3777
u32 drv_mb_param, rsp, param;
sys/dev/qlnx/qlnxe/ecore_mcp.c
3797
struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt, u32 *num_images)
sys/dev/qlnx/qlnxe/ecore_mcp.c
3799
u32 drv_mb_param = 0, rsp;
sys/dev/qlnx/qlnxe/ecore_mcp.c
3819
struct bist_nvm_image_att *p_image_att, u32 image_index)
sys/dev/qlnx/qlnxe/ecore_mcp.c
3821
u32 buf_size, nvm_offset, resp, param;
sys/dev/qlnx/qlnxe/ecore_mcp.c
3830
(u32 *)p_image_att);
sys/dev/qlnx/qlnxe/ecore_mcp.c
3848
u32 num_images, i;
sys/dev/qlnx/qlnxe/ecore_mcp.c
3898
u8 *p_buffer, u32 buffer_len)
sys/dev/qlnx/qlnxe/ecore_mcp.c
3939
u32 val;
sys/dev/qlnx/qlnxe/ecore_mcp.c
3952
p_temp_info->num_sensors = OSAL_MIN_T(u32, mfw_temp_info.num_of_sensors,
sys/dev/qlnx/qlnxe/ecore_mcp.c
3975
u32 buf_size, resp, param;
sys/dev/qlnx/qlnxe/ecore_mcp.c
4069
u32 cmd;
sys/dev/qlnx/qlnxe/ecore_mcp.c
4071
u32 resc_max_val;
sys/dev/qlnx/qlnxe/ecore_mcp.c
4075
u32 mcp_resp;
sys/dev/qlnx/qlnxe/ecore_mcp.c
4076
u32 mcp_param;
sys/dev/qlnx/qlnxe/ecore_mcp.c
4077
u32 resc_num;
sys/dev/qlnx/qlnxe/ecore_mcp.c
4078
u32 resc_start;
sys/dev/qlnx/qlnxe/ecore_mcp.c
4079
u32 vf_resc_num;
sys/dev/qlnx/qlnxe/ecore_mcp.c
4080
u32 vf_resc_start;
sys/dev/qlnx/qlnxe/ecore_mcp.c
4081
u32 flags;
sys/dev/qlnx/qlnxe/ecore_mcp.c
4162
enum ecore_resources res_id, u32 resc_max_val,
sys/dev/qlnx/qlnxe/ecore_mcp.c
4163
u32 *p_mcp_resp)
sys/dev/qlnx/qlnxe/ecore_mcp.c
4186
enum ecore_resources res_id, u32 *p_mcp_resp,
sys/dev/qlnx/qlnxe/ecore_mcp.c
4187
u32 *p_resc_num, u32 *p_resc_start)
sys/dev/qlnx/qlnxe/ecore_mcp.c
4215
u32 mcp_resp, mcp_param;
sys/dev/qlnx/qlnxe/ecore_mcp.c
4245
*(u32 *)(lldp_mac_addr + 2) = OSAL_BE32_TO_CPU(lldp_mac.mac_lower);
sys/dev/qlnx/qlnxe/ecore_mcp.c
4270
lldp_mac.mac_lower = OSAL_CPU_TO_BE32(*(u32 *)(lldp_mac_addr + 2));
sys/dev/qlnx/qlnxe/ecore_mcp.c
4292
u32 param, u32 *p_mcp_resp,
sys/dev/qlnx/qlnxe/ecore_mcp.c
4293
u32 *p_mcp_param)
sys/dev/qlnx/qlnxe/ecore_mcp.c
4324
u32 param = 0, mcp_resp, mcp_param;
sys/dev/qlnx/qlnxe/ecore_mcp.c
4386
u32 retry_cnt = 0;
sys/dev/qlnx/qlnxe/ecore_mcp.c
439
u32 mcp_resp;
sys/dev/qlnx/qlnxe/ecore_mcp.c
4393
u32 retry_interval_in_ms =
sys/dev/qlnx/qlnxe/ecore_mcp.c
4418
u32 param = 0, mcp_resp, mcp_param;
sys/dev/qlnx/qlnxe/ecore_mcp.c
4500
u32 resp = 0, param = 0;
sys/dev/qlnx/qlnxe/ecore_mcp.c
4504
(u32)vlan << DRV_MB_PARAM_FCOE_CVID_OFFSET,
sys/dev/qlnx/qlnxe/ecore_mcp.c
4521
fabric_name.wwn_upper = *(u32 *)wwn;
sys/dev/qlnx/qlnxe/ecore_mcp.c
4522
fabric_name.wwn_lower = *(u32 *)(wwn + 4);
sys/dev/qlnx/qlnxe/ecore_mcp.c
4536
u32 offset, u32 val)
sys/dev/qlnx/qlnxe/ecore_mcp.c
4540
u32 dword = val;
sys/dev/qlnx/qlnxe/ecore_mcp.c
4576
u32 mcp_resp;
sys/dev/qlnx/qlnxe/ecore_mcp.c
4592
u32 mcp_resp, mcp_param, features;
sys/dev/qlnx/qlnxe/ecore_mcp.c
468
u32 union_data_addr = p_hwfn->mcp_info->drv_mb_addr +
sys/dev/qlnx/qlnxe/ecore_mcp.c
4748
u32 retry_interval)
sys/dev/qlnx/qlnxe/ecore_mcp.c
487
u32 union_data_addr;
sys/dev/qlnx/qlnxe/ecore_mcp.c
522
u32 cpu_mode, cpu_state, cpu_pc_0, cpu_pc_1, cpu_pc_2;
sys/dev/qlnx/qlnxe/ecore_mcp.c
540
u32 max_retries, u32 usecs)
sys/dev/qlnx/qlnxe/ecore_mcp.c
542
u32 cnt = 0, msecs = DIV_ROUND_UP(usecs, 1000);
sys/dev/qlnx/qlnxe/ecore_mcp.c
659
u32 max_retries = ECORE_DRV_MB_MAX_RETRIES;
sys/dev/qlnx/qlnxe/ecore_mcp.c
660
u32 usecs = CHIP_MCP_RESP_ITER_US;
sys/dev/qlnx/qlnxe/ecore_mcp.c
701
struct ecore_ptt *p_ptt, u32 cmd, u32 param,
sys/dev/qlnx/qlnxe/ecore_mcp.c
702
u32 *o_mcp_resp, u32 *o_mcp_param)
sys/dev/qlnx/qlnxe/ecore_mcp.c
734
u32 cmd,
sys/dev/qlnx/qlnxe/ecore_mcp.c
735
u32 param,
sys/dev/qlnx/qlnxe/ecore_mcp.c
736
u32 *o_mcp_resp,
sys/dev/qlnx/qlnxe/ecore_mcp.c
737
u32 *o_mcp_param,
sys/dev/qlnx/qlnxe/ecore_mcp.c
738
u32 i_txn_size,
sys/dev/qlnx/qlnxe/ecore_mcp.c
739
u32 *i_buf)
sys/dev/qlnx/qlnxe/ecore_mcp.c
761
u32 cmd,
sys/dev/qlnx/qlnxe/ecore_mcp.c
762
u32 param,
sys/dev/qlnx/qlnxe/ecore_mcp.c
763
u32 *o_mcp_resp,
sys/dev/qlnx/qlnxe/ecore_mcp.c
764
u32 *o_mcp_param,
sys/dev/qlnx/qlnxe/ecore_mcp.c
765
u32 *o_txn_size,
sys/dev/qlnx/qlnxe/ecore_mcp.c
766
u32 *o_buf)
sys/dev/qlnx/qlnxe/ecore_mcp.c
795
u32 *p_load_code)
sys/dev/qlnx/qlnxe/ecore_mcp.c
849
u32 resp = 0, param = 0;
sys/dev/qlnx/qlnxe/ecore_mcp.c
877
static u32 ecore_get_config_bitmap(void)
sys/dev/qlnx/qlnxe/ecore_mcp.c
879
u32 config_bitmap = 0x0;
sys/dev/qlnx/qlnxe/ecore_mcp.c
910
u32 drv_ver_0;
sys/dev/qlnx/qlnxe/ecore_mcp.c
911
u32 drv_ver_1;
sys/dev/qlnx/qlnxe/ecore_mcp.c
912
u32 fw_ver;
sys/dev/qlnx/qlnxe/ecore_mcp.c
920
u32 load_code;
sys/dev/qlnx/qlnxe/ecore_mcp.c
921
u32 exist_drv_ver_0;
sys/dev/qlnx/qlnxe/ecore_mcp.c
922
u32 exist_drv_ver_1;
sys/dev/qlnx/qlnxe/ecore_mcp.c
923
u32 exist_fw_ver;
sys/dev/qlnx/qlnxe/ecore_mcp.c
937
u32 hsi_ver;
sys/dev/qlnx/qlnxe/ecore_mcp.c
97
u32 addr = SECTION_OFFSIZE_ADDR(p_hwfn->mcp_info->public_base,
sys/dev/qlnx/qlnxe/ecore_mcp.c
99
u32 mfw_mb_offsize = ecore_rd(p_hwfn, p_ptt, addr);
sys/dev/qlnx/qlnxe/ecore_mcp.h
101
u32 mcp_resp;
sys/dev/qlnx/qlnxe/ecore_mcp.h
102
u32 mcp_param;
sys/dev/qlnx/qlnxe/ecore_mcp.h
105
u32 flags;
sys/dev/qlnx/qlnxe/ecore_mcp.h
202
u32 load_code;
sys/dev/qlnx/qlnxe/ecore_mcp.h
283
u32 *vfs_to_ack);
sys/dev/qlnx/qlnxe/ecore_mcp.h
360
u32 mask_parities);
sys/dev/qlnx/qlnxe/ecore_mcp.h
378
u32 epoch);
sys/dev/qlnx/qlnxe/ecore_mcp.h
392
u32 valid;
sys/dev/qlnx/qlnxe/ecore_mcp.h
393
u32 epoch;
sys/dev/qlnx/qlnxe/ecore_mcp.h
394
u32 pf;
sys/dev/qlnx/qlnxe/ecore_mcp.h
395
u32 status;
sys/dev/qlnx/qlnxe/ecore_mcp.h
424
enum ecore_resources res_id, u32 resc_max_val,
sys/dev/qlnx/qlnxe/ecore_mcp.h
425
u32 *p_mcp_resp);
sys/dev/qlnx/qlnxe/ecore_mcp.h
441
enum ecore_resources res_id, u32 *p_mcp_resp,
sys/dev/qlnx/qlnxe/ecore_mcp.h
442
u32 *p_resc_num, u32 *p_resc_start);
sys/dev/qlnx/qlnxe/ecore_mcp.h
503
u32 retry_interval;
sys/dev/qlnx/qlnxe/ecore_mcp.h
569
u32 offset, u32 val);
sys/dev/qlnx/qlnxe/ecore_mcp.h
608
u32 attr_num;
sys/dev/qlnx/qlnxe/ecore_mcp.h
614
u32 val;
sys/dev/qlnx/qlnxe/ecore_mcp.h
619
u32 mask;
sys/dev/qlnx/qlnxe/ecore_mcp.h
620
u32 offset;
sys/dev/qlnx/qlnxe/ecore_mcp.h
673
u32 retry_interval);
sys/dev/qlnx/qlnxe/ecore_mcp.h
68
u32 public_base;
sys/dev/qlnx/qlnxe/ecore_mcp.h
70
u32 drv_mb_addr;
sys/dev/qlnx/qlnxe/ecore_mcp.h
72
u32 mfw_mb_addr;
sys/dev/qlnx/qlnxe/ecore_mcp.h
74
u32 port_addr;
sys/dev/qlnx/qlnxe/ecore_mcp.h
90
u32 mcp_hist;
sys/dev/qlnx/qlnxe/ecore_mcp.h
93
u32 capabilities;
sys/dev/qlnx/qlnxe/ecore_mcp.h
97
u32 cmd;
sys/dev/qlnx/qlnxe/ecore_mcp.h
98
u32 param;
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
1000
u32 addr, u8 *p_buf, u32 len);
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
1012
enum _ecore_status_t ecore_mcp_nvm_read(struct ecore_dev *p_dev, u32 addr,
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
1013
u8 *p_buf, u32 len);
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
1016
u32 start_addr;
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
1017
u32 length;
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
1049
u8 *p_buffer, u32 buffer_len);
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
1069
u32 cmd,
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
1070
u32 param,
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
1071
u32 *o_mcp_resp,
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
1072
u32 *o_mcp_param,
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
1073
u32 i_txn_size,
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
1074
u32 *i_buf);
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
108
u32 partner_adv_speed;
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
1094
u32 cmd,
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
1095
u32 param,
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
1096
u32 *o_mcp_resp,
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
1097
u32 *o_mcp_param,
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
1098
u32 *o_txn_size,
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
1099
u32 *o_buf);
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
1116
u32 port, u32 addr, u32 offset,
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
1117
u32 len, u8 *p_buf);
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
1134
u32 port, u32 addr, u32 offset,
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
1135
u32 len, u8 *p_buf);
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
1149
u16 gpio, u32 *gpio_val);
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
1179
u16 gpio, u32 *gpio_direction,
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
1180
u32 *gpio_ctrl);
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
1216
u32 *num_images);
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
1231
u32 image_index);
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
1277
u32 reason;
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
1278
u32 version;
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
1279
u32 config;
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
1280
u32 epoch;
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
1281
u32 num_of_logs;
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
1282
u32 valid_logs;
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
153
u32 version;
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
160
u32 fcs_err;
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
168
u32 fcs_err;
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
169
u32 login_failure;
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
245
u32 num_sensors;
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
262
u32 mba_vers[ECORE_MAX_NUM_OF_ROMIMG];
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
309
u32 tcp4_offloads;
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
311
u32 tcp6_offloads;
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
346
u32 rt_tov;
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
348
u32 ra_tov;
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
350
u32 ed_tov;
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
352
u32 cr_tov;
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
358
u32 num_npiv_ids;
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
36
u32 advertised_speeds; /* bitmask of DRV_SPEED_CAPABILITY */
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
37
u32 forced_speed; /* In Mb/s */
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
408
u32 crc_err_src_fcid[5];
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
421
u32 flogi_param[4];
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
424
u32 flogi_acc_param[4];
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
427
u32 flogi_rjt;
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
430
u32 fdiscs;
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
442
u32 plogi_dst_fcid[5];
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
445
u32 plogi_acc_src_fcid[5];
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
454
u32 plogo_src_fcid[5];
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
471
u32 abts_dst_fcid[5];
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
476
u32 rx_rscn_nport[4];
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
520
u32 scsi_rx_chk[5];
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
54
u32 tx_lpi_timer;
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
630
u32 *p_mfw_ver,
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
631
u32 *p_running_bundle_id);
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
644
u32 *p_mbi_ver);
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
659
u32 *media_type);
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
674
u32 *p_tranceiver_type);
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
68
u32 loopback_mode; /* in PMM_LOOPBACK values */
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
690
u32 *p_speed_mask);
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
705
u32 *p_board_config);
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
722
struct ecore_ptt *p_ptt, u32 cmd, u32 param,
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
723
u32 *o_mcp_resp, u32 *o_mcp_param);
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
73
u32 speed_capabilities;
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
75
u32 default_speed; /* In Mb/s */ /* __LINUX__THROW__ */
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
760
u32 personalities);
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
77
u32 eee_lpi_timer;
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
774
u32 *p_flash_size);
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
798
u32 ecore_get_process_kill_counter(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
84
u32 min_pf_rate; /* In Mb/s */
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
87
u32 line_speed;
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
92
u32 speed;
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
926
u32 addr);
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
939
enum _ecore_status_t ecore_mcp_phy_write(struct ecore_dev *p_dev, u32 cmd,
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
940
u32 addr, u8 *p_buf, u32 len);
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
953
enum _ecore_status_t ecore_mcp_nvm_write(struct ecore_dev *p_dev, u32 cmd,
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
954
u32 addr, u8 *p_buf, u32 len);
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
965
u32 addr);
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
976
u32 addr);
sys/dev/qlnx/qlnxe/ecore_mcp_api.h
999
enum _ecore_status_t ecore_mcp_phy_read(struct ecore_dev *p_dev, u32 cmd,
sys/dev/qlnx/qlnxe/ecore_mng_tlv.c
1240
u32 size)
sys/dev/qlnx/qlnxe/ecore_mng_tlv.c
1245
u32 offset;
sys/dev/qlnx/qlnxe/ecore_mng_tlv.c
1260
offset += sizeof(tlv) + sizeof(u32) * tlv.tlv_length) {
sys/dev/qlnx/qlnxe/ecore_mng_tlv.c
1299
u32 addr, size, offset, resp, param, val;
sys/dev/qlnx/qlnxe/ecore_mng_tlv.c
1301
u32 global_offsize, global_addr;
sys/dev/qlnx/qlnxe/ecore_mng_tlv.c
1331
for (offset = 0; offset < size; offset += sizeof(u32)) {
sys/dev/qlnx/qlnxe/ecore_mng_tlv.c
1334
OSAL_MEMCPY(&p_mfw_buf[offset], &val, sizeof(u32));
sys/dev/qlnx/qlnxe/ecore_mng_tlv.c
1339
offset += sizeof(tlv) + sizeof(u32) * tlv.tlv_length) {
sys/dev/qlnx/qlnxe/ecore_mng_tlv.c
1382
for (offset = 0; offset < size; offset += sizeof(u32)) {
sys/dev/qlnx/qlnxe/ecore_mng_tlv.c
1383
OSAL_MEMCPY(&val, &p_mfw_buf[offset], sizeof(u32));
sys/dev/qlnx/qlnxe/ecore_ooo.c
105
u32 i;
sys/dev/qlnx/qlnxe/ecore_ooo.c
206
u32 cid)
sys/dev/qlnx/qlnxe/ecore_ooo.c
254
u32 i;
sys/dev/qlnx/qlnxe/ecore_ooo.c
403
u32 cid,
sys/dev/qlnx/qlnxe/ecore_ooo.c
442
u32 cid, u8 ooo_isle,
sys/dev/qlnx/qlnxe/ecore_ooo.c
45
ecore_ooo_seek_archipelago(struct ecore_ooo_info *p_ooo_info, u32 cid)
sys/dev/qlnx/qlnxe/ecore_ooo.c
47
u32 idx = (cid & 0xffff) - p_ooo_info->cid_base;
sys/dev/qlnx/qlnxe/ecore_ooo.c
483
u32 idx = (cid & 0xffff) - p_ooo_info->cid_base;
sys/dev/qlnx/qlnxe/ecore_ooo.c
503
u32 cid,
sys/dev/qlnx/qlnxe/ecore_ooo.c
527
u32 cid, u8 left_isle)
sys/dev/qlnx/qlnxe/ecore_ooo.c
569
u32 dp_module = ECORE_MSG_OOO;
sys/dev/qlnx/qlnxe/ecore_ooo.c
570
u32 ph_hi, ph_lo;
sys/dev/qlnx/qlnxe/ecore_ooo.c
63
u32 cid, u8 isle)
sys/dev/qlnx/qlnxe/ecore_ooo.h
104
u32 cid);
sys/dev/qlnx/qlnxe/ecore_ooo.h
122
u32 cid,
sys/dev/qlnx/qlnxe/ecore_ooo.h
128
u32 cid,
sys/dev/qlnx/qlnxe/ecore_ooo.h
134
u32 cid,
sys/dev/qlnx/qlnxe/ecore_ooo.h
141
u32 cid,
sys/dev/qlnx/qlnxe/ecore_ooo.h
44
u32 rx_buffer_size;
sys/dev/qlnx/qlnxe/ecore_ooo.h
62
u32 head_idx;
sys/dev/qlnx/qlnxe/ecore_ooo.h
63
u32 num_of_cqes;
sys/dev/qlnx/qlnxe/ecore_ooo.h
73
u32 cur_isles_number;
sys/dev/qlnx/qlnxe/ecore_ooo.h
74
u32 max_isles_number;
sys/dev/qlnx/qlnxe/ecore_ooo.h
75
u32 gen_isles_number;
sys/dev/qlnx/qlnxe/ecore_proto_if.h
142
u32 min_dpis; /* number of requested DPIs */
sys/dev/qlnx/qlnxe/ecore_proto_if.h
143
u32 num_qps; /* number of requested Queue Pairs */
sys/dev/qlnx/qlnxe/ecore_proto_if.h
144
u32 num_srqs; /* number of requested SRQs */
sys/dev/qlnx/qlnxe/ecore_proto_if.h
145
u32 num_xrc_srqs; /* number of requested XRC SRQs */
sys/dev/qlnx/qlnxe/ecore_proto_if.h
53
u32 num_arfs_filters;
sys/dev/qlnx/qlnxe/ecore_proto_if.h
95
u32 two_msl_timer;
sys/dev/qlnx/qlnxe/ecore_rdma.c
107
u32 id_num)
sys/dev/qlnx/qlnxe/ecore_rdma.c
1078
u32 dpi_start_offset;
sys/dev/qlnx/qlnxe/ecore_rdma.c
1079
u32 returned_id = 0;
sys/dev/qlnx/qlnxe/ecore_rdma.c
1146
u32 itid)
sys/dev/qlnx/qlnxe/ecore_rdma.c
1163
u32 addr;
sys/dev/qlnx/qlnxe/ecore_rdma.c
1188
u32 returned_id;
sys/dev/qlnx/qlnxe/ecore_rdma.c
1225
u32 returned_id;
sys/dev/qlnx/qlnxe/ecore_rdma.c
125
u32 id_num)
sys/dev/qlnx/qlnxe/ecore_rdma.c
1264
u32 bmap_id;
sys/dev/qlnx/qlnxe/ecore_rdma.c
1294
u32 returned_id;
sys/dev/qlnx/qlnxe/ecore_rdma.c
146
u32 id_num)
sys/dev/qlnx/qlnxe/ecore_rdma.c
168
u32 ecore_rdma_get_sb_id(struct ecore_hwfn *p_hwfn, u32 rel_sb_id)
sys/dev/qlnx/qlnxe/ecore_rdma.c
174
u32 ecore_rdma_query_cau_timer_res(void)
sys/dev/qlnx/qlnxe/ecore_rdma.c
1929
u32 itid,
sys/dev/qlnx/qlnxe/ecore_rdma.c
1966
u32 itid)
sys/dev/qlnx/qlnxe/ecore_rdma.c
2154
u32 returned_id;
sys/dev/qlnx/qlnxe/ecore_rdma.c
2388
u32 pstats_addr, tstats_addr, addr;
sys/dev/qlnx/qlnxe/ecore_rdma.c
2392
u32 xstats_addr;
sys/dev/qlnx/qlnxe/ecore_rdma.c
2602
u32 glob_cfg_bits)
sys/dev/qlnx/qlnxe/ecore_rdma.c
273
u32 num_cons, num_tasks;
sys/dev/qlnx/qlnxe/ecore_rdma.c
57
u32 max_count,
sys/dev/qlnx/qlnxe/ecore_rdma.c
60
u32 size_in_bytes;
sys/dev/qlnx/qlnxe/ecore_rdma.c
602
u32 pci_status_control;
sys/dev/qlnx/qlnxe/ecore_rdma.c
613
dev->max_sge = OSAL_MIN_T(u32, RDMA_MAX_SGE_PER_SQ_WQE,
sys/dev/qlnx/qlnxe/ecore_rdma.c
617
dev->max_sge = OSAL_MIN_T(u32,
sys/dev/qlnx/qlnxe/ecore_rdma.c
629
dev->max_srq_sge = OSAL_MIN_T(u32,
sys/dev/qlnx/qlnxe/ecore_rdma.c
636
OSAL_MIN_T(u32,
sys/dev/qlnx/qlnxe/ecore_rdma.c
741
u32 ll2_ethertype_en;
sys/dev/qlnx/qlnxe/ecore_rdma.c
807
u32 cnq_id;
sys/dev/qlnx/qlnxe/ecore_rdma.c
895
u32 *itid)
sys/dev/qlnx/qlnxe/ecore_rdma.c
91
u32 *id_num)
sys/dev/qlnx/qlnxe/ecore_rdma.c
978
u32 ll2_ethertype_en;
sys/dev/qlnx/qlnxe/ecore_rdma.h
120
u32 last_tid;
sys/dev/qlnx/qlnxe/ecore_rdma.h
124
u32 num_qps;
sys/dev/qlnx/qlnxe/ecore_rdma.h
125
u32 num_mrs;
sys/dev/qlnx/qlnxe/ecore_rdma.h
126
u32 num_srqs;
sys/dev/qlnx/qlnxe/ecore_rdma.h
143
u32 req;
sys/dev/qlnx/qlnxe/ecore_rdma.h
144
u32 resp;
sys/dev/qlnx/qlnxe/ecore_rdma.h
150
u32 qpid; /* iwarp: may differ from icid */
sys/dev/qlnx/qlnxe/ecore_rdma.h
169
u32 dest_qp;
sys/dev/qlnx/qlnxe/ecore_rdma.h
175
u32 flow_label; /* ignored in IPv4 */
sys/dev/qlnx/qlnxe/ecore_rdma.h
177
u32 ack_timeout;
sys/dev/qlnx/qlnxe/ecore_rdma.h
190
u32 sq_psn;
sys/dev/qlnx/qlnxe/ecore_rdma.h
202
u32 rq_psn;
sys/dev/qlnx/qlnxe/ecore_rdma.h
240
u32 max_count,
sys/dev/qlnx/qlnxe/ecore_rdma.h
251
u32 *id_num);
sys/dev/qlnx/qlnxe/ecore_rdma.h
256
u32 id_num);
sys/dev/qlnx/qlnxe/ecore_rdma.h
261
u32 id_num);
sys/dev/qlnx/qlnxe/ecore_rdma.h
266
u32 id_num);
sys/dev/qlnx/qlnxe/ecore_rdma.h
98
u32 max_count;
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
102
u32 vendor_id;
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
103
u32 vendor_part_id;
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
104
u32 hw_ver;
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
118
u32 max_wqe; /* The maximum number of outstanding work
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
121
u32 max_srq_wqe; /* The maximum number of outstanding work
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
134
u32 max_cq;
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
135
u32 max_qp;
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
136
u32 max_srq; /* Maximum number of SRQs */
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
137
u32 max_mr; /* Maximum number of MRs supported by this device */
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
141
u32 max_cqe;
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
142
u32 max_mw; /* The maximum number of memory windows supported */
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
143
u32 max_fmr;
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
144
u32 max_mr_mw_fmr_pbl;
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
146
u32 max_pd; /* The maximum number of protection domains supported */
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
147
u32 max_ah;
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
151
u32 dev_caps;
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
207
u32 reserved_lkey; /* Value of reserved L_key */
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
208
u32 bad_pkey_counter; /* Bad P_key counter support indicator */
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
230
u32 pkey_bad_counter;
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
255
u32 cnp_send_timeout;
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
260
u32 rl_bc_rate; /* Byte Counter Limit. */
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
261
u32 rl_max_rate; /* Maximum rate in Mbps resolution */
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
262
u32 rl_r_ai; /* Active increase rate */
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
263
u32 rl_r_hai; /* Hyper active increase rate */
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
264
u32 dcqcn_gd; /* Alpha denominator */
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
265
u32 dcqcn_k_us; /* Alpha update interval */
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
266
u32 dcqcn_timeout_us;
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
292
u32 glob_cfg_bits);
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
314
u32 rcv_wnd_size;
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
350
u32 dpi_size;
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
366
u32 dwords[4];
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
368
u32 ipv4_addr;
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
373
u32 itid; /* index only, 18 bit long, lkey = itid << 8 | key */
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
389
u32 fbo;
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
405
u32 cq_handle_lo; /* CQ handle to be written in CNQ */
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
406
u32 cq_handle_hi;
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
407
u32 cq_size;
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
429
u32 cq_cid;
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
452
u32 cq_size;
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
465
u32 qp_handle_lo; /* QP handle to be written in CQE */
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
466
u32 qp_handle_hi;
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
467
u32 qp_handle_async_lo; /* QP handle to be written in async event */
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
468
u32 qp_handle_async_hi;
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
489
u32 qp_id;
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
499
u32 modify_flags;
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
537
u32 dest_qp;
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
541
u32 flow_label; /* ignored in IPv4 */
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
548
u32 rq_psn;
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
549
u32 sq_psn;
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
552
u32 ack_timeout;
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
566
u32 rq_psn; /* responder */
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
567
u32 sq_psn; /* requester */
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
570
u32 dest_qp;
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
577
u32 flow_label; /* ignored in IPv4 */
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
580
u32 timeout;
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
591
u32 sq_cq_prod;
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
592
u32 rq_cq_prod;
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
605
u32 wqe_limit;
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
613
u32 prod; /* CQ producer value on old PBL */
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
614
u32 cons; /* CQ consumer value on old PBL */
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
619
u32 cnq_id;
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
620
u32 pbl_page_size_log; /* for the pages that contain the
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
680
u32 *tid);
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
701
u32 tid);
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
728
u32 tid);
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
781
u32 ecore_rdma_get_sb_id(struct ecore_hwfn *p_hwfn, u32 rel_sb_id);
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
784
u32 ecore_rdma_query_cau_timer_res(void);
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
843
u32 remote_ip[4];
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
844
u32 local_ip[4];
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
901
u32 max_backlog; /* Max num of pending incoming connection requests */
sys/dev/qlnx/qlnxe/ecore_rdma_api.h
903
u32 ip_addr[4];
sys/dev/qlnx/qlnxe/ecore_roce.c
1009
u32 *num_bound_mw,
sys/dev/qlnx/qlnxe/ecore_roce.c
1010
u32 *cq_prod)
sys/dev/qlnx/qlnxe/ecore_roce.c
1240
u32 cq_prod_resp = qp->cq_prod.resp, cq_prod_req = qp->cq_prod.req;
sys/dev/qlnx/qlnxe/ecore_roce.c
1241
u32 num_invalidated_mw = 0;
sys/dev/qlnx/qlnxe/ecore_roce.c
1242
u32 num_bound_mw = 0;
sys/dev/qlnx/qlnxe/ecore_roce.c
1389
u32 num_invalidated_mw = 0, num_bound_mw = 0;
sys/dev/qlnx/qlnxe/ecore_roce.c
144
u32 val = 0;
sys/dev/qlnx/qlnxe/ecore_roce.c
1514
u32 start_cid, cid;
sys/dev/qlnx/qlnxe/ecore_roce.c
1529
u32 val;
sys/dev/qlnx/qlnxe/ecore_roce.c
220
u32 i;
sys/dev/qlnx/qlnxe/ecore_roce.c
282
static enum _ecore_status_t ecore_roce_wait_free_cids(struct ecore_hwfn *p_hwfn, u32 qp_idx)
sys/dev/qlnx/qlnxe/ecore_roce.c
286
u32 icid, iter = 0;
sys/dev/qlnx/qlnxe/ecore_roce.c
329
u32 start_cid, icid, cid, qp_idx;
sys/dev/qlnx/qlnxe/ecore_roce.c
380
u32 cid)
sys/dev/qlnx/qlnxe/ecore_roce.c
399
u32 cid_start;
sys/dev/qlnx/qlnxe/ecore_roce.c
568
u32 cid_start;
sys/dev/qlnx/qlnxe/ecore_roce.c
713
u32 modify_flags)
sys/dev/qlnx/qlnxe/ecore_roce.c
819
u32 modify_flags)
sys/dev/qlnx/qlnxe/ecore_roce.c
924
u32 *num_invalidated_mw,
sys/dev/qlnx/qlnxe/ecore_roce.c
925
u32 *cq_prod)
sys/dev/qlnx/qlnxe/ecore_roce_api.h
107
u32 max_wqe; /* The maximum number of outstanding work
sys/dev/qlnx/qlnxe/ecore_roce_api.h
110
u32 max_srq_wqe; /* The maximum number of outstanding work
sys/dev/qlnx/qlnxe/ecore_roce_api.h
123
u32 max_cq;
sys/dev/qlnx/qlnxe/ecore_roce_api.h
124
u32 max_qp;
sys/dev/qlnx/qlnxe/ecore_roce_api.h
125
u32 max_srq; /* Maximum number of SRQs */
sys/dev/qlnx/qlnxe/ecore_roce_api.h
126
u32 max_mr; /* Maximum number of MRs supported by this device */
sys/dev/qlnx/qlnxe/ecore_roce_api.h
130
u32 max_cqe;
sys/dev/qlnx/qlnxe/ecore_roce_api.h
131
u32 max_mw; /* The maximum number of memory windows supported */
sys/dev/qlnx/qlnxe/ecore_roce_api.h
132
u32 max_fmr;
sys/dev/qlnx/qlnxe/ecore_roce_api.h
133
u32 max_mr_mw_fmr_pbl;
sys/dev/qlnx/qlnxe/ecore_roce_api.h
135
u32 max_pd; /* The maximum number of protection domains supported */
sys/dev/qlnx/qlnxe/ecore_roce_api.h
136
u32 max_ah;
sys/dev/qlnx/qlnxe/ecore_roce_api.h
140
u32 dev_caps;
sys/dev/qlnx/qlnxe/ecore_roce_api.h
196
u32 reserved_lkey; /* Value of reserved L_key */
sys/dev/qlnx/qlnxe/ecore_roce_api.h
197
u32 bad_pkey_counter; /* Bad P_key counter support indicator */
sys/dev/qlnx/qlnxe/ecore_roce_api.h
219
u32 pkey_bad_counter;
sys/dev/qlnx/qlnxe/ecore_roce_api.h
244
u32 cnp_send_timeout;
sys/dev/qlnx/qlnxe/ecore_roce_api.h
247
u32 rl_bc_rate; /* Byte Counter Limit. */
sys/dev/qlnx/qlnxe/ecore_roce_api.h
252
u32 dcqcn_k_us; /* Alpha update interval */
sys/dev/qlnx/qlnxe/ecore_roce_api.h
253
u32 dcqcn_timeout_us;
sys/dev/qlnx/qlnxe/ecore_roce_api.h
269
u32 rcv_wnd_size;
sys/dev/qlnx/qlnxe/ecore_roce_api.h
305
u32 dpi_size;
sys/dev/qlnx/qlnxe/ecore_roce_api.h
312
u32 cq_handle_lo; /* CQ handle to be written in CNQ */
sys/dev/qlnx/qlnxe/ecore_roce_api.h
313
u32 cq_handle_hi;
sys/dev/qlnx/qlnxe/ecore_roce_api.h
314
u32 cq_size;
sys/dev/qlnx/qlnxe/ecore_roce_api.h
330
u32 cq_size;
sys/dev/qlnx/qlnxe/ecore_roce_api.h
349
u32 qp_handle_lo; /* QP handle to be written in CQE */
sys/dev/qlnx/qlnxe/ecore_roce_api.h
350
u32 qp_handle_hi;
sys/dev/qlnx/qlnxe/ecore_roce_api.h
351
u32 qp_handle_async_lo; /* QP handle to be written in async event */
sys/dev/qlnx/qlnxe/ecore_roce_api.h
352
u32 qp_handle_async_hi;
sys/dev/qlnx/qlnxe/ecore_roce_api.h
371
u32 qp_id;
sys/dev/qlnx/qlnxe/ecore_roce_api.h
397
u32 dwords[4];
sys/dev/qlnx/qlnxe/ecore_roce_api.h
399
u32 ipv4_addr;
sys/dev/qlnx/qlnxe/ecore_roce_api.h
404
u32 modify_flags;
sys/dev/qlnx/qlnxe/ecore_roce_api.h
442
u32 dest_qp;
sys/dev/qlnx/qlnxe/ecore_roce_api.h
446
u32 flow_label; /* ignored in IPv4 */
sys/dev/qlnx/qlnxe/ecore_roce_api.h
453
u32 rq_psn;
sys/dev/qlnx/qlnxe/ecore_roce_api.h
454
u32 sq_psn;
sys/dev/qlnx/qlnxe/ecore_roce_api.h
457
u32 ack_timeout;
sys/dev/qlnx/qlnxe/ecore_roce_api.h
471
u32 rq_psn; /* responder */
sys/dev/qlnx/qlnxe/ecore_roce_api.h
472
u32 sq_psn; /* requester */
sys/dev/qlnx/qlnxe/ecore_roce_api.h
475
u32 dest_qp;
sys/dev/qlnx/qlnxe/ecore_roce_api.h
482
u32 flow_label; /* ignored in IPv4 */
sys/dev/qlnx/qlnxe/ecore_roce_api.h
485
u32 timeout;
sys/dev/qlnx/qlnxe/ecore_roce_api.h
497
u32 itid; /* index only, 18 bit long, lkey = itid << 8 | key */
sys/dev/qlnx/qlnxe/ecore_roce_api.h
513
u32 fbo;
sys/dev/qlnx/qlnxe/ecore_roce_api.h
543
u32 wqe_limit;
sys/dev/qlnx/qlnxe/ecore_roce_api.h
549
u32 prod; /* CQ producer value on old PBL */
sys/dev/qlnx/qlnxe/ecore_roce_api.h
550
u32 cons; /* CQ consumer value on old PBL */
sys/dev/qlnx/qlnxe/ecore_roce_api.h
555
u32 cnq_id;
sys/dev/qlnx/qlnxe/ecore_roce_api.h
556
u32 pbl_page_size_log; /* for the pages that contain the
sys/dev/qlnx/qlnxe/ecore_roce_api.h
603
u32 *tid);
sys/dev/qlnx/qlnxe/ecore_roce_api.h
624
u32 tid);
sys/dev/qlnx/qlnxe/ecore_roce_api.h
644
u32 tid);
sys/dev/qlnx/qlnxe/ecore_roce_api.h
697
u32 ecore_rdma_get_sb_id(void *p_hwfn, u32 rel_sb_id);
sys/dev/qlnx/qlnxe/ecore_roce_api.h
699
u32 ecore_rdma_query_cau_timer_res(void *p_hwfn);
sys/dev/qlnx/qlnxe/ecore_roce_api.h
737
u32 remote_ip[4];
sys/dev/qlnx/qlnxe/ecore_roce_api.h
738
u32 local_ip[4];
sys/dev/qlnx/qlnxe/ecore_roce_api.h
795
u32 max_backlog; /* Max num of pending incoming connection requests */
sys/dev/qlnx/qlnxe/ecore_roce_api.h
797
u32 ip_addr[4];
sys/dev/qlnx/qlnxe/ecore_roce_api.h
91
u32 vendor_id;
sys/dev/qlnx/qlnxe/ecore_roce_api.h
92
u32 vendor_part_id;
sys/dev/qlnx/qlnxe/ecore_roce_api.h
93
u32 hw_ver;
sys/dev/qlnx/qlnxe/ecore_sp_commands.c
519
static u16 ecore_sp_rl_mb_to_qm(u32 mb_val)
sys/dev/qlnx/qlnxe/ecore_sp_commands.c
521
return (u16)OSAL_MIN_T(u32, (u16)(~0U), QM_RL_RESOLUTION(mb_val));
sys/dev/qlnx/qlnxe/ecore_sp_commands.c
524
static u16 ecore_sp_rl_gd_denom(u32 gd)
sys/dev/qlnx/qlnxe/ecore_sp_commands.c
526
return gd ? (u16)OSAL_MIN_T(u32, (u16)(~0U), FW_GD_RESOLUTION(gd)) : 0;
sys/dev/qlnx/qlnxe/ecore_sp_commands.c
59
u32 opaque_cid = p_data->opaque_fid << 16 | p_data->cid;
sys/dev/qlnx/qlnxe/ecore_sp_commands.h
145
u32 rl_bc_rate; /* Byte Counter Limit */
sys/dev/qlnx/qlnxe/ecore_sp_commands.h
146
u32 rl_max_rate; /* Maximum rate in Mbps resolution */
sys/dev/qlnx/qlnxe/ecore_sp_commands.h
147
u32 rl_r_ai; /* Active increase rate */
sys/dev/qlnx/qlnxe/ecore_sp_commands.h
148
u32 rl_r_hai; /* Hyper active increase rate */
sys/dev/qlnx/qlnxe/ecore_sp_commands.h
149
u32 dcqcn_gd; /* DCQCN Alpha update gain */
sys/dev/qlnx/qlnxe/ecore_sp_commands.h
150
u32 dcqcn_k_us; /* DCQCN Alpha update interval */
sys/dev/qlnx/qlnxe/ecore_sp_commands.h
151
u32 dcqcn_timeuot_us;
sys/dev/qlnx/qlnxe/ecore_sp_commands.h
152
u32 qcn_timeuot_us;
sys/dev/qlnx/qlnxe/ecore_sp_commands.h
44
u32 cid;
sys/dev/qlnx/qlnxe/ecore_spq.c
143
u32 iter_cnt;
sys/dev/qlnx/qlnxe/ecore_spq.c
340
DOORBELL(p_hwfn, p_spq->db_addr_offset, *(u32 *)p_db_data);
sys/dev/qlnx/qlnxe/ecore_spq.c
409
u32 addr = GTT_BAR0_MAP_REG_USDM_RAM +
sys/dev/qlnx/qlnxe/ecore_spq.c
582
u32 i, capacity;
sys/dev/qlnx/qlnxe/ecore_spq.c
646
u32 capacity;
sys/dev/qlnx/qlnxe/ecore_spq.c
698
u32 capacity;
sys/dev/qlnx/qlnxe/ecore_spq.c
845
u32 ecore_spq_get_cid(struct ecore_hwfn *p_hwfn)
sys/dev/qlnx/qlnxe/ecore_spq.c
859
u32 keep_reserve)
sys/dev/qlnx/qlnxe/ecore_spq.h
205
u32 unlimited_pending_count;
sys/dev/qlnx/qlnxe/ecore_spq.h
206
u32 normal_count;
sys/dev/qlnx/qlnxe/ecore_spq.h
207
u32 high_count;
sys/dev/qlnx/qlnxe/ecore_spq.h
208
u32 comp_sent_count;
sys/dev/qlnx/qlnxe/ecore_spq.h
209
u32 comp_count;
sys/dev/qlnx/qlnxe/ecore_spq.h
211
u32 cid;
sys/dev/qlnx/qlnxe/ecore_spq.h
213
u32 db_addr_offset;
sys/dev/qlnx/qlnxe/ecore_spq.h
346
u32 ecore_spq_get_cid(struct ecore_hwfn *p_hwfn);
sys/dev/qlnx/qlnxe/ecore_sriov.c
1005
sizeof(u32) * p_block->igu_sb_id, val);
sys/dev/qlnx/qlnxe/ecore_sriov.c
1042
u32 addr, val;
sys/dev/qlnx/qlnxe/ecore_sriov.c
1048
sizeof(u32) * igu_id;
sys/dev/qlnx/qlnxe/ecore_sriov.c
1110
u32 cids;
sys/dev/qlnx/qlnxe/ecore_sriov.c
1567
u32 i, j;
sys/dev/qlnx/qlnxe/ecore_sriov.c
1598
static u32 ecore_iov_vf_db_bar_size(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_sriov.c
1601
u32 val = ecore_rd(p_hwfn, p_ptt, PGLUE_B_REG_VF_BAR1_SIZE);
sys/dev/qlnx/qlnxe/ecore_sriov.c
1618
u32 bar_size;
sys/dev/qlnx/qlnxe/ecore_sriov.c
166
u32 concrete_vfid,
sys/dev/qlnx/qlnxe/ecore_sriov.c
2577
u32 cid,
sys/dev/qlnx/qlnxe/ecore_sriov.c
2624
u32 cid = 0;
sys/dev/qlnx/qlnxe/ecore_sriov.c
3033
sizeof(u32) * ETH_MULTICAST_MAC_BINS_IN_REGS);
sys/dev/qlnx/qlnxe/ecore_sriov.c
3833
u32 val;
sys/dev/qlnx/qlnxe/ecore_sriov.c
3859
u32 cons[MAX_NUM_VOQS_E4], distance[MAX_NUM_VOQS_E4];
sys/dev/qlnx/qlnxe/ecore_sriov.c
3864
u32 prod;
sys/dev/qlnx/qlnxe/ecore_sriov.c
3879
u32 tmp;
sys/dev/qlnx/qlnxe/ecore_sriov.c
3926
u32 *ack_vfs)
sys/dev/qlnx/qlnxe/ecore_sriov.c
3999
u32 ack_vfs[VF_MAX_STATIC / 32];
sys/dev/qlnx/qlnxe/ecore_sriov.c
4003
OSAL_MEMSET(ack_vfs, 0, sizeof(u32) * (VF_MAX_STATIC / 32));
sys/dev/qlnx/qlnxe/ecore_sriov.c
4025
u32 ack_vfs[VF_MAX_STATIC / 32];
sys/dev/qlnx/qlnxe/ecore_sriov.c
4028
OSAL_MEMSET(ack_vfs, 0, sizeof(u32) * (VF_MAX_STATIC / 32));
sys/dev/qlnx/qlnxe/ecore_sriov.c
4041
u32 *p_disabled_vfs)
sys/dev/qlnx/qlnxe/ecore_sriov.c
4721
bool ecore_iov_is_valid_vfpf_msg_length(u32 length)
sys/dev/qlnx/qlnxe/ecore_sriov.c
4727
u32 ecore_iov_pfvf_msg_length(void)
sys/dev/qlnx/qlnxe/ecore_sriov.c
4783
return ecore_init_vport_rl(p_hwfn, p_ptt, abs_vp_id, (u32)val,
sys/dev/qlnx/qlnxe/ecore_sriov.c
4788
int vfid, u32 rate)
sys/dev/qlnx/qlnxe/ecore_sriov.c
499
u32 concrete;
sys/dev/qlnx/qlnxe/ecore_sriov.c
709
u32 first = p_hwfn->p_dev->p_iov_info->offset +
sys/dev/qlnx/qlnxe/ecore_sriov.c
717
u32 first = p_hwfn->p_dev->p_iov_info->offset +
sys/dev/qlnx/qlnxe/ecore_sriov.c
836
u32 igu_vf_conf;
sys/dev/qlnx/qlnxe/ecore_sriov.c
894
u32 igu_vf_conf = IGU_VF_CONF_FUNC_EN;
sys/dev/qlnx/qlnxe/ecore_sriov.c
951
u32 reg_addr, val;
sys/dev/qlnx/qlnxe/ecore_sriov.c
986
u32 val = 0;
sys/dev/qlnx/qlnxe/ecore_sriov.h
148
u32 concrete_fid;
sys/dev/qlnx/qlnxe/ecore_sriov.h
211
u32 mbx_msg_size;
sys/dev/qlnx/qlnxe/ecore_sriov.h
214
u32 mbx_reply_size;
sys/dev/qlnx/qlnxe/ecore_sriov.h
217
u32 bulletins_size;
sys/dev/qlnx/qlnxe/ecore_sriov.h
290
u32 *disabled_vfs);
sys/dev/qlnx/qlnxe/ecore_sriov.h
326
static OSAL_INLINE u32 ecore_crc32(u32 OSAL_UNUSED crc, u8 OSAL_UNUSED *ptr, u32 OSAL_UNUSED length) {return 0;}
sys/dev/qlnx/qlnxe/ecore_sriov.h
327
static OSAL_INLINE bool ecore_iov_mark_vf_flr(struct ecore_hwfn OSAL_UNUSED *p_hwfn, u32 OSAL_UNUSED *disabled_vfs) {return false;}
sys/dev/qlnx/qlnxe/ecore_sriov.h
78
u32 vf_addr_lo;
sys/dev/qlnx/qlnxe/ecore_sriov.h
79
u32 vf_addr_hi;
sys/dev/qlnx/qlnxe/ecore_tcp_ip.h
112
u32 seq;
sys/dev/qlnx/qlnxe/ecore_tcp_ip.h
113
u32 ack_seq;
sys/dev/qlnx/qlnxe/ecore_tcp_ip.h
75
u32 saddr;
sys/dev/qlnx/qlnxe/ecore_tcp_ip.h
76
u32 daddr;
sys/dev/qlnx/qlnxe/ecore_tcp_ip.h
92
u32 u6_addr32[4];
sys/dev/qlnx/qlnxe/ecore_utils.h
36
#define PTR_LO(x) ((u32)(((osal_uintptr_t)(x)) & 0xffffffff))
sys/dev/qlnx/qlnxe/ecore_utils.h
37
#define PTR_HI(x) ((u32)((((osal_uintptr_t)(x)) >> 16) >> 16))
sys/dev/qlnx/qlnxe/ecore_utils.h
39
#define DMA_LO(x) ((u32)(((dma_addr_t)(x)) & 0xffffffff))
sys/dev/qlnx/qlnxe/ecore_utils.h
40
#define DMA_HI(x) ((u32)(((dma_addr_t)(x)) >> 32))
sys/dev/qlnx/qlnxe/ecore_vf.c
107
u8 *done, u32 resp_size)
sys/dev/qlnx/qlnxe/ecore_vf.c
1261
u32 resp_size = 0;
sys/dev/qlnx/qlnxe/ecore_vf.c
1331
sizeof(u32) * ETH_MULTICAST_MAC_BINS_IN_REGS);
sys/dev/qlnx/qlnxe/ecore_vf.c
147
*((u32 *)&trigger),
sys/dev/qlnx/qlnxe/ecore_vf.c
163
REG_WR(p_hwfn, (osal_uintptr_t)&zone_data->trigger, *((u32 *)&trigger));
sys/dev/qlnx/qlnxe/ecore_vf.c
1715
u32 crc, crc_size;
sys/dev/qlnx/qlnxe/ecore_vf.c
215
u32 size;
sys/dev/qlnx/qlnxe/ecore_vf.c
502
u32 ecore_vf_hw_bar_size(struct ecore_hwfn *p_hwfn,
sys/dev/qlnx/qlnxe/ecore_vf.c
505
u32 bar_size;
sys/dev/qlnx/qlnxe/ecore_vf.c
522
u32 reg;
sys/dev/qlnx/qlnxe/ecore_vf.c
859
u32 init_prod_val = 0;
sys/dev/qlnx/qlnxe/ecore_vf.c
867
__internal_ram_wr(p_hwfn, *pp_prod, sizeof(u32),
sys/dev/qlnx/qlnxe/ecore_vf.c
868
(u32 *)(&init_prod_val));
sys/dev/qlnx/qlnxe/ecore_vf.c
890
u32 init_prod_val = 0;
sys/dev/qlnx/qlnxe/ecore_vf.c
902
__internal_ram_wr(p_hwfn, *pp_prod, sizeof(u32),
sys/dev/qlnx/qlnxe/ecore_vf.c
903
(u32 *)&init_prod_val);
sys/dev/qlnx/qlnxe/ecore_vf.h
340
u32 ecore_vf_hw_bar_size(struct ecore_hwfn *p_hwfn, enum BAR_ID bar_id);
sys/dev/qlnx/qlnxe/ecore_vf.h
366
static OSAL_INLINE u32
sys/dev/qlnx/qlnxe/ecore_vfpf_if.h
138
u32 driver_version;
sys/dev/qlnx/qlnxe/ecore_vfpf_if.h
149
u32 bulletin_size;
sys/dev/qlnx/qlnxe/ecore_vfpf_if.h
150
u32 padding;
sys/dev/qlnx/qlnxe/ecore_vfpf_if.h
167
u32 rss_key[T_ETH_RSS_KEY_SIZE];
sys/dev/qlnx/qlnxe/ecore_vfpf_if.h
171
u32 address;
sys/dev/qlnx/qlnxe/ecore_vfpf_if.h
172
u32 len;
sys/dev/qlnx/qlnxe/ecore_vfpf_if.h
187
u32 chip_num;
sys/dev/qlnx/qlnxe/ecore_vfpf_if.h
188
u32 mfw_ver;
sys/dev/qlnx/qlnxe/ecore_vfpf_if.h
259
u32 bulletin_size;
sys/dev/qlnx/qlnxe/ecore_vfpf_if.h
260
u32 padding;
sys/dev/qlnx/qlnxe/ecore_vfpf_if.h
265
u32 offset; /* offset to consumer/producer of queue */
sys/dev/qlnx/qlnxe/ecore_vfpf_if.h
310
u32 flags; /* VFPF_QUEUE_FLG_X flags */
sys/dev/qlnx/qlnxe/ecore_vfpf_if.h
367
u32 flags;
sys/dev/qlnx/qlnxe/ecore_vfpf_if.h
384
u32 tpa_mode;
sys/dev/qlnx/qlnxe/ecore_vfpf_if.h
609
u32 crc;
sys/dev/qlnx/qlnxe/ecore_vfpf_if.h
611
u32 version;
sys/dev/qlnx/qlnxe/ecore_vfpf_if.h
634
u32 req_adv_speed;
sys/dev/qlnx/qlnxe/ecore_vfpf_if.h
635
u32 req_forced_speed;
sys/dev/qlnx/qlnxe/ecore_vfpf_if.h
636
u32 req_loopback;
sys/dev/qlnx/qlnxe/ecore_vfpf_if.h
637
u32 padding3;
sys/dev/qlnx/qlnxe/ecore_vfpf_if.h
654
u32 speed;
sys/dev/qlnx/qlnxe/ecore_vfpf_if.h
655
u32 partner_adv_speed;
sys/dev/qlnx/qlnxe/ecore_vfpf_if.h
657
u32 capability_speed;
sys/dev/qlnx/qlnxe/ecore_vfpf_if.h
667
u32 size;
sys/dev/qlnx/qlnxe/ecore_vfpf_if.h
83
u32 padding;
sys/dev/qlnx/qlnxe/mcp_private.h
103
u32 exp_rom_nvm_addr;
sys/dev/qlnx/qlnxe/mcp_private.h
116
u32 lldp_counter;
sys/dev/qlnx/qlnxe/mcp_private.h
118
u32 avs_init_timestamp;
sys/dev/qlnx/qlnxe/mcp_private.h
120
u32 seconds_since_mcp_reset;
sys/dev/qlnx/qlnxe/mcp_private.h
122
u32 last_malloc_dir_used_timestamp;
sys/dev/qlnx/qlnxe/mcp_private.h
125
u32 drv_nvm_state;
sys/dev/qlnx/qlnxe/mcp_private.h
131
u32 storm_fw_ver;
sys/dev/qlnx/qlnxe/mcp_private.h
139
u32 resource_max_values[RESOURCE_MAX_NUM];
sys/dev/qlnx/qlnxe/mcp_private.h
140
u32 glb_counter_100ms;
sys/dev/qlnx/qlnxe/mcp_private.h
142
u32 flags_and_ctrl;
sys/dev/qlnx/qlnxe/mcp_private.h
149
u32 es_fir_engines : 8, es_fir_valid_bitmap : 8, es_l2_engines : 8, es_l2_valid_bitmap : 8;
sys/dev/qlnx/qlnxe/mcp_private.h
160
u32 recovery_countdown; /* Counting down 2 seconds, using TMR3 */
sys/dev/qlnx/qlnxe/mcp_private.h
163
u32 drv_load_vars; /* When the seconds_since_mcp_reset gets here */
sys/dev/qlnx/qlnxe/mcp_private.h
250
u32 lldp_time_to_send;
sys/dev/qlnx/qlnxe/mcp_private.h
251
u32 lldp_ttl_expired;
sys/dev/qlnx/qlnxe/mcp_private.h
252
u32 lldp_sent;
sys/dev/qlnx/qlnxe/mcp_private.h
266
u32 config; /* Uses same defines as local config plus some more below*/
sys/dev/qlnx/qlnxe/mcp_private.h
282
u32 seq_no;
sys/dev/qlnx/qlnxe/mcp_private.h
283
u32 ack_no;
sys/dev/qlnx/qlnxe/mcp_private.h
284
u32 received_seq_no;
sys/dev/qlnx/qlnxe/mcp_private.h
291
u32 config;
sys/dev/qlnx/qlnxe/mcp_private.h
305
u32 flags;
sys/dev/qlnx/qlnxe/mcp_private.h
310
u32 remote_mib;
sys/dev/qlnx/qlnxe/mcp_private.h
322
u32 num_of_chan;
sys/dev/qlnx/qlnxe/mcp_private.h
367
u32 tx_errors; /* txErrors */
sys/dev/qlnx/qlnxe/mcp_private.h
368
u32 ulp_pkt_len;
sys/dev/qlnx/qlnxe/mcp_private.h
371
typedef void (*ulp_rx_indication_t)(u8 port, u16 subtype, u32 pkt_len, u8 *pkt);
sys/dev/qlnx/qlnxe/mcp_private.h
390
u32 prev_link_change_count;
sys/dev/qlnx/qlnxe/mcp_private.h
398
u32 net_buffer[MAX_PACKET_SIZE / 4]; /* Buffer to send any packet to network */
sys/dev/qlnx/qlnxe/mcp_private.h
401
u32 nig_drain_end_ts;
sys/dev/qlnx/qlnxe/mcp_private.h
403
u32 nig_drain_tc_end_ts;
sys/dev/qlnx/qlnxe/mcp_private.h
404
u32 tc_drain_en_bitmap;
sys/dev/qlnx/qlnxe/mcp_private.h
415
u32 temperature;
sys/dev/qlnx/qlnxe/mcp_private.h
473
u32 init_hw_page;
sys/dev/qlnx/qlnxe/mcp_public.h
1012
u32 mac_upper; /* Upper 16 bits are always zeroes */
sys/dev/qlnx/qlnxe/mcp_public.h
1013
u32 mac_lower;
sys/dev/qlnx/qlnxe/mcp_public.h
1017
u32 nvm_start_addr;
sys/dev/qlnx/qlnxe/mcp_public.h
1018
u32 len;
sys/dev/qlnx/qlnxe/mcp_public.h
1022
u32 return_code;
sys/dev/qlnx/qlnxe/mcp_public.h
1023
u32 image_type; /* Image type */
sys/dev/qlnx/qlnxe/mcp_public.h
1024
u32 nvm_start_addr; /* NVM address of the image */
sys/dev/qlnx/qlnxe/mcp_public.h
1025
u32 len; /* Include CRC */
sys/dev/qlnx/qlnxe/mcp_public.h
1029
#define MCP_DRV_VER_STR_SIZE_DWORD (MCP_DRV_VER_STR_SIZE / sizeof(u32))
sys/dev/qlnx/qlnxe/mcp_public.h
1032
u32 version;
sys/dev/qlnx/qlnxe/mcp_public.h
104
u32 link_modes; /* Additional link modes */
sys/dev/qlnx/qlnxe/mcp_public.h
1040
u32 fcs_err;
sys/dev/qlnx/qlnxe/mcp_public.h
1041
u32 rserved;
sys/dev/qlnx/qlnxe/mcp_public.h
1047
u32 fcs_err;
sys/dev/qlnx/qlnxe/mcp_public.h
1048
u32 login_failure;
sys/dev/qlnx/qlnxe/mcp_public.h
1066
u32 ocbb_host_addr;
sys/dev/qlnx/qlnxe/mcp_public.h
1067
u32 ocsd_host_addr;
sys/dev/qlnx/qlnxe/mcp_public.h
1068
u32 ocsd_req_update_interval;
sys/dev/qlnx/qlnxe/mcp_public.h
1085
u32 num_of_sensors;
sys/dev/qlnx/qlnxe/mcp_public.h
1086
u32 sensor[MAX_NUM_OF_SENSORS];
sys/dev/qlnx/qlnxe/mcp_public.h
109
u32 dynamic_cfg; /* device control channel */
sys/dev/qlnx/qlnxe/mcp_public.h
1091
u32 version;
sys/dev/qlnx/qlnxe/mcp_public.h
1092
u32 config;
sys/dev/qlnx/qlnxe/mcp_public.h
1093
u32 epoc;
sys/dev/qlnx/qlnxe/mcp_public.h
1094
u32 num_of_logs;
sys/dev/qlnx/qlnxe/mcp_public.h
1095
u32 valid_logs;
sys/dev/qlnx/qlnxe/mcp_public.h
1126
u32 size; /* number of allocated resources */
sys/dev/qlnx/qlnxe/mcp_public.h
1127
u32 offset; /* Offset of the 1st resource */
sys/dev/qlnx/qlnxe/mcp_public.h
1128
u32 vf_size;
sys/dev/qlnx/qlnxe/mcp_public.h
1129
u32 vf_offset;
sys/dev/qlnx/qlnxe/mcp_public.h
1130
u32 flags;
sys/dev/qlnx/qlnxe/mcp_public.h
1135
u32 wwn_upper;
sys/dev/qlnx/qlnxe/mcp_public.h
1136
u32 wwn_lower;
sys/dev/qlnx/qlnxe/mcp_public.h
114
u32 reserved[1];
sys/dev/qlnx/qlnxe/mcp_public.h
1145
u32 drv_ver_0;
sys/dev/qlnx/qlnxe/mcp_public.h
1146
u32 drv_ver_1;
sys/dev/qlnx/qlnxe/mcp_public.h
1147
u32 fw_ver;
sys/dev/qlnx/qlnxe/mcp_public.h
1148
u32 misc0;
sys/dev/qlnx/qlnxe/mcp_public.h
1166
u32 drv_ver_0;
sys/dev/qlnx/qlnxe/mcp_public.h
1167
u32 drv_ver_1;
sys/dev/qlnx/qlnxe/mcp_public.h
1168
u32 fw_ver;
sys/dev/qlnx/qlnxe/mcp_public.h
1169
u32 misc0;
sys/dev/qlnx/qlnxe/mcp_public.h
1180
u32 valid;
sys/dev/qlnx/qlnxe/mcp_public.h
1181
u32 epoch;
sys/dev/qlnx/qlnxe/mcp_public.h
1182
u32 pf;
sys/dev/qlnx/qlnxe/mcp_public.h
1183
u32 status;
sys/dev/qlnx/qlnxe/mcp_public.h
1187
u32 val;
sys/dev/qlnx/qlnxe/mcp_public.h
1188
u32 mask;
sys/dev/qlnx/qlnxe/mcp_public.h
1189
u32 offset;
sys/dev/qlnx/qlnxe/mcp_public.h
1193
u32 tx_frames_total;
sys/dev/qlnx/qlnxe/mcp_public.h
1194
u32 rx_frames_total;
sys/dev/qlnx/qlnxe/mcp_public.h
1195
u32 rx_frames_discarded;
sys/dev/qlnx/qlnxe/mcp_public.h
1196
u32 rx_age_outs;
sys/dev/qlnx/qlnxe/mcp_public.h
1211
u32 ack_vf_disabled[VF_MAX_STATIC / 32];
sys/dev/qlnx/qlnxe/mcp_public.h
1226
u32 dword;
sys/dev/qlnx/qlnxe/mcp_public.h
1237
u32 drv_mb_header;
sys/dev/qlnx/qlnxe/mcp_public.h
1412
u32 drv_mb_param;
sys/dev/qlnx/qlnxe/mcp_public.h
1601
u32 fw_mb_header;
sys/dev/qlnx/qlnxe/mcp_public.h
1741
u32 fw_mb_param;
sys/dev/qlnx/qlnxe/mcp_public.h
1782
u32 drv_pulse_mb;
sys/dev/qlnx/qlnxe/mcp_public.h
1796
u32 mcp_pulse_mb;
sys/dev/qlnx/qlnxe/mcp_public.h
1864
u32 sup_msgs; /* Assigend with MFW_DRV_MSG_MAX */
sys/dev/qlnx/qlnxe/mcp_public.h
1865
u32 msg[MFW_DRV_MSG_MAX_DWORDS(MFW_DRV_MSG_MAX)]; /* Incremented by the MFW */
sys/dev/qlnx/qlnxe/mcp_public.h
1866
u32 ack[MFW_DRV_MSG_MAX_DWORDS(MFW_DRV_MSG_MAX)]; /* Incremented by the driver */
sys/dev/qlnx/qlnxe/mcp_public.h
1885
u32 ver;
sys/dev/qlnx/qlnxe/mcp_public.h
1894
u32 init_hw_bitmask[NUM_RUNTIME_DWORDS];
sys/dev/qlnx/qlnxe/mcp_public.h
1895
u32 init_hw_data[NUM_RUNTIME_DWORDS * 32];
sys/dev/qlnx/qlnxe/mcp_public.h
1900
u32 num_sections;
sys/dev/qlnx/qlnxe/mcp_public.h
2205
u32 address;
sys/dev/qlnx/qlnxe/mcp_public.h
2206
u32 val;
sys/dev/qlnx/qlnxe/mcp_public.h
2207
u32 resp_status;
sys/dev/qlnx/qlnxe/mcp_public.h
2213
u32 seconds; /* Seconds since last reset */
sys/dev/qlnx/qlnxe/mcp_public.h
2214
u32 ticks; /* Timestamp (NOW) */
sys/dev/qlnx/qlnxe/mcp_public.h
263
u32 config;
sys/dev/qlnx/qlnxe/mcp_public.h
276
u32 local_chassis_id[LLDP_CHASSIS_ID_STAT_LEN];
sys/dev/qlnx/qlnxe/mcp_public.h
279
u32 local_port_id[LLDP_PORT_ID_STAT_LEN];
sys/dev/qlnx/qlnxe/mcp_public.h
283
u32 prefix_seq_num;
sys/dev/qlnx/qlnxe/mcp_public.h
284
u32 status; /* TBD */
sys/dev/qlnx/qlnxe/mcp_public.h
286
u32 peer_chassis_id[LLDP_CHASSIS_ID_STAT_LEN];
sys/dev/qlnx/qlnxe/mcp_public.h
288
u32 peer_port_id[LLDP_PORT_ID_STAT_LEN];
sys/dev/qlnx/qlnxe/mcp_public.h
289
u32 suffix_seq_num;
sys/dev/qlnx/qlnxe/mcp_public.h
293
u32 flags;
sys/dev/qlnx/qlnxe/mcp_public.h
307
u32 pri_tc_tbl[1];
sys/dev/qlnx/qlnxe/mcp_public.h
315
u32 tc_bw_tbl[2];
sys/dev/qlnx/qlnxe/mcp_public.h
317
u32 tc_tsa_tbl[2];
sys/dev/qlnx/qlnxe/mcp_public.h
324
u32 entry;
sys/dev/qlnx/qlnxe/mcp_public.h
353
u32 flags;
sys/dev/qlnx/qlnxe/mcp_public.h
376
u32 pfc;
sys/dev/qlnx/qlnxe/mcp_public.h
406
u32 config;
sys/dev/qlnx/qlnxe/mcp_public.h
415
u32 flags;
sys/dev/qlnx/qlnxe/mcp_public.h
420
u32 prefix_seq_num;
sys/dev/qlnx/qlnxe/mcp_public.h
421
u32 flags;
sys/dev/qlnx/qlnxe/mcp_public.h
431
u32 suffix_seq_num;
sys/dev/qlnx/qlnxe/mcp_public.h
435
u32 flags;
sys/dev/qlnx/qlnxe/mcp_public.h
445
u32 data[MAX_SYSTEM_LLDP_TLV_DATA];
sys/dev/qlnx/qlnxe/mcp_public.h
452
u32 prefix_seq_num;
sys/dev/qlnx/qlnxe/mcp_public.h
453
u32 length;
sys/dev/qlnx/qlnxe/mcp_public.h
454
u32 tlvs_buffer[MAX_TLV_BUFFER];
sys/dev/qlnx/qlnxe/mcp_public.h
455
u32 suffix_seq_num;
sys/dev/qlnx/qlnxe/mcp_public.h
459
u32 flags;
sys/dev/qlnx/qlnxe/mcp_public.h
463
u32 dscp_pri_map[8];
sys/dev/qlnx/qlnxe/mcp_public.h
474
u32 lo;
sys/dev/qlnx/qlnxe/mcp_public.h
475
u32 hi;
sys/dev/qlnx/qlnxe/mcp_public.h
483
u32 source_pf;
sys/dev/qlnx/qlnxe/mcp_public.h
49
typedef u32 offsize_t; /* In DWORDS !!! */
sys/dev/qlnx/qlnxe/mcp_public.h
505
u32 max_path; /* 32bit is wasty, but this will be used often */
sys/dev/qlnx/qlnxe/mcp_public.h
506
u32 max_ports; /* (Global) 32bit is wasty, but this will be used often */
sys/dev/qlnx/qlnxe/mcp_public.h
511
u32 debug_mb_offset;
sys/dev/qlnx/qlnxe/mcp_public.h
512
u32 phymod_dbg_mb_offset;
sys/dev/qlnx/qlnxe/mcp_public.h
515
u32 mfw_ver;
sys/dev/qlnx/qlnxe/mcp_public.h
516
u32 running_bundle_id;
sys/dev/qlnx/qlnxe/mcp_public.h
518
u32 mdump_reason;
sys/dev/qlnx/qlnxe/mcp_public.h
522
u32 ext_phy_upgrade_fw;
sys/dev/qlnx/qlnxe/mcp_public.h
532
u32 data_ptr;
sys/dev/qlnx/qlnxe/mcp_public.h
533
u32 data_size;
sys/dev/qlnx/qlnxe/mcp_public.h
558
u32 aggint;
sys/dev/qlnx/qlnxe/mcp_public.h
559
u32 opgen_addr;
sys/dev/qlnx/qlnxe/mcp_public.h
560
u32 accum_ack; /* 0..15:PF, 16..207:VF, 256..271:IOV_DIS */
sys/dev/qlnx/qlnxe/mcp_public.h
578
u32 mcp_vf_disabled[VF_MAX_STATIC / 32]; /* 0x003c */
sys/dev/qlnx/qlnxe/mcp_public.h
580
u32 process_kill; /* Reset on mcp reset, and incremented for eveny process kill event. */
sys/dev/qlnx/qlnxe/mcp_public.h
602
u32 hdr;
sys/dev/qlnx/qlnxe/mcp_public.h
603
u32 num_of_npiv;
sys/dev/qlnx/qlnxe/mcp_public.h
617
u32 validity_map; /* 0x0 (4*2 = 0x8) */
sys/dev/qlnx/qlnxe/mcp_public.h
637
u32 link_status;
sys/dev/qlnx/qlnxe/mcp_public.h
678
u32 link_status1;
sys/dev/qlnx/qlnxe/mcp_public.h
686
u32 ext_phy_fw_version;
sys/dev/qlnx/qlnxe/mcp_public.h
687
u32 drv_phy_cfg_addr; /* Points to struct eth_phy_cfg (For READ-ONLY) */
sys/dev/qlnx/qlnxe/mcp_public.h
689
u32 port_stx;
sys/dev/qlnx/qlnxe/mcp_public.h
691
u32 stat_nig_timer;
sys/dev/qlnx/qlnxe/mcp_public.h
696
u32 media_type;
sys/dev/qlnx/qlnxe/mcp_public.h
70
u32 speed; /* 0 = autoneg, 1000/10000/20000/25000/40000/50000/100000 */
sys/dev/qlnx/qlnxe/mcp_public.h
707
u32 lfa_status;
sys/dev/qlnx/qlnxe/mcp_public.h
724
u32 link_change_count;
sys/dev/qlnx/qlnxe/mcp_public.h
737
u32 fc_npiv_nvram_tbl_addr;
sys/dev/qlnx/qlnxe/mcp_public.h
74
u32 pause; /* bitmask */
sys/dev/qlnx/qlnxe/mcp_public.h
740
u32 fc_npiv_nvram_tbl_size;
sys/dev/qlnx/qlnxe/mcp_public.h
741
u32 transceiver_data;
sys/dev/qlnx/qlnxe/mcp_public.h
793
u32 wol_info;
sys/dev/qlnx/qlnxe/mcp_public.h
794
u32 wol_pkt_len;
sys/dev/qlnx/qlnxe/mcp_public.h
795
u32 wol_pkt_details;
sys/dev/qlnx/qlnxe/mcp_public.h
798
u32 eee_status;
sys/dev/qlnx/qlnxe/mcp_public.h
80
u32 adv_speed; /* Default should be the speed_cap_mask */
sys/dev/qlnx/qlnxe/mcp_public.h
81
u32 loopback_mode;
sys/dev/qlnx/qlnxe/mcp_public.h
813
u32 eee_remote; /* Used for EEE in LLDP */
sys/dev/qlnx/qlnxe/mcp_public.h
819
u32 module_info;
sys/dev/qlnx/qlnxe/mcp_public.h
830
u32 oem_cfg_port;
sys/dev/qlnx/qlnxe/mcp_public.h
842
u32 system_lldp_tlvs_buf2[MAX_SYSTEM_LLDP_TLV_DATA];
sys/dev/qlnx/qlnxe/mcp_public.h
852
u32 iscsi_boot_signature;
sys/dev/qlnx/qlnxe/mcp_public.h
853
u32 iscsi_boot_block_offset;
sys/dev/qlnx/qlnxe/mcp_public.h
856
u32 mtu_size;
sys/dev/qlnx/qlnxe/mcp_public.h
862
u32 c2s_pcp_map_lower;
sys/dev/qlnx/qlnxe/mcp_public.h
867
u32 c2s_pcp_map_upper;
sys/dev/qlnx/qlnxe/mcp_public.h
870
u32 c2s_pcp_map_default;
sys/dev/qlnx/qlnxe/mcp_public.h
875
u32 num_of_msix;
sys/dev/qlnx/qlnxe/mcp_public.h
878
u32 config;
sys/dev/qlnx/qlnxe/mcp_public.h
917
u32 status;
sys/dev/qlnx/qlnxe/mcp_public.h
922
u32 mac_upper; /* MAC */
sys/dev/qlnx/qlnxe/mcp_public.h
926
u32 mac_lower;
sys/dev/qlnx/qlnxe/mcp_public.h
929
u32 fcoe_wwn_port_name_upper;
sys/dev/qlnx/qlnxe/mcp_public.h
93
u32 eee_cfg;
sys/dev/qlnx/qlnxe/mcp_public.h
930
u32 fcoe_wwn_port_name_lower;
sys/dev/qlnx/qlnxe/mcp_public.h
932
u32 fcoe_wwn_node_name_upper;
sys/dev/qlnx/qlnxe/mcp_public.h
933
u32 fcoe_wwn_node_name_lower;
sys/dev/qlnx/qlnxe/mcp_public.h
935
u32 ovlan_stag; /* tags */
sys/dev/qlnx/qlnxe/mcp_public.h
940
u32 pf_allocation; /* vf per pf */
sys/dev/qlnx/qlnxe/mcp_public.h
942
u32 preserve_data; /* Will be used bt CCM */
sys/dev/qlnx/qlnxe/mcp_public.h
944
u32 driver_last_activity_ts;
sys/dev/qlnx/qlnxe/mcp_public.h
950
u32 drv_ack_vf_disabled[VF_MAX_STATIC / 32]; /* 0x0044 */
sys/dev/qlnx/qlnxe/mcp_public.h
952
u32 drv_id;
sys/dev/qlnx/qlnxe/mcp_public.h
981
u32 oem_cfg_func;
sys/dev/qlnx/qlnxe/mfw_hsi.h
49
u32 signature; /* Help to identify that the trace is valid */
sys/dev/qlnx/qlnxe/mfw_hsi.h
50
u32 size; /* the size of the trace buffer in bytes*/
sys/dev/qlnx/qlnxe/mfw_hsi.h
51
u32 curr_level; /* 2 - all will be written to the buffer
sys/dev/qlnx/qlnxe/mfw_hsi.h
55
u32 modules_mask[2];/* a bit per module, 1 means write it, 0 means mask it */
sys/dev/qlnx/qlnxe/mfw_hsi.h
58
u32 trace_prod; /* The next trace will be written to this offset */
sys/dev/qlnx/qlnxe/mfw_hsi.h
59
u32 trace_oldest; /* The oldest valid trace starts at this offset (usually very close after the current producer) */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1008
u32 tx_rx_eq_1g; /* 0x130 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
101
u32 engineering_change[3]; /* 0x4 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1017
u32 tx_rx_eq_25g_bt; /* 0x134 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
102
u32 manufacturing_id; /* 0x10 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1026
u32 tx_rx_eq_10g_bt; /* 0x138 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
103
u32 serial_number[4]; /* 0x14 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1035
u32 generic_cont4; /* 0x13C */
sys/dev/qlnx/qlnxe/nvm_cfg.h
104
u32 pcie_cfg; /* 0x24 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1071
u32 preboot_debug_mode_std; /* 0x140 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1072
u32 preboot_debug_mode_ext; /* 0x144 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1073
u32 ext_phy_cfg1; /* 0x148 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1077
u32 clocks; /* 0x14C */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1101
u32 reserved[54]; /* 0x150 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1106
u32 reserved[1]; /* 0x0 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1111
u32 reserved__m_relocated_to_option_123; /* 0x0 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1112
u32 reserved__m_relocated_to_option_124; /* 0x4 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1113
u32 generic_cont0; /* 0x8 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1183
u32 pcie_cfg; /* 0xC */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1186
u32 features; /* 0x10 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1195
u32 speed_cap_mask; /* 0x14 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1214
u32 link_settings; /* 0x18 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1276
u32 phy_cfg; /* 0x1C */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1308
u32 mgmt_traffic; /* 0x20 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1311
u32 ext_phy; /* 0x24 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1326
u32 mba_cfg1; /* 0x28 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1361
u32 mba_cfg2; /* 0x2C */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1368
u32 vf_cfg; /* 0x30 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1374
u32 led_port_settings; /* 0x3C */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1397
u32 transceiver_00; /* 0x40 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
140
u32 mgmt_traffic; /* 0x28 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1439
u32 device_ids; /* 0x44 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1448
u32 board_cfg; /* 0x48 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1494
u32 mnm_10g_cap; /* 0x4C */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1513
u32 mnm_10g_ctrl; /* 0x50 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1560
u32 mnm_10g_misc; /* 0x54 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1567
u32 mnm_25g_cap; /* 0x58 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1586
u32 mnm_25g_ctrl; /* 0x5C */
sys/dev/qlnx/qlnxe/nvm_cfg.h
163
u32 core_cfg; /* 0x2C */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1633
u32 mnm_25g_misc; /* 0x60 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1640
u32 mnm_40g_cap; /* 0x64 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1659
u32 mnm_40g_ctrl; /* 0x68 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1706
u32 mnm_40g_misc; /* 0x6C */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1713
u32 mnm_50g_cap; /* 0x70 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1732
u32 mnm_50g_ctrl; /* 0x74 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1779
u32 mnm_50g_misc; /* 0x78 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1786
u32 mnm_100g_cap; /* 0x7C */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1805
u32 mnm_100g_ctrl; /* 0x80 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1852
u32 mnm_100g_misc; /* 0x84 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1859
u32 temperature; /* 0x88 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1864
u32 ext_phy_cfg1; /* 0x8C */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1868
u32 reserved[114]; /* 0x90 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1874
u32 rsrv1; /* 0x8 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1879
u32 rsrv2; /* 0xC */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1884
u32 device_id; /* 0x10 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1889
u32 cmn_cfg; /* 0x14 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1910
u32 pci_cfg; /* 0x18 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1974
u32 preboot_generic_cfg; /* 0x2C */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1985
u32 features; /* 0x30 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
1993
u32 reserved[7]; /* 0x34 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
2026
u32 num_sections;
sys/dev/qlnx/qlnxe/nvm_cfg.h
2027
u32 sections_offset[NVM_CFG_SECTION_MAX];
sys/dev/qlnx/qlnxe/nvm_cfg.h
203
u32 e_lane_cfg1; /* 0x30 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
220
u32 e_lane_cfg2; /* 0x34 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
287
u32 f_lane_cfg1; /* 0x38 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
304
u32 f_lane_cfg2; /* 0x3C */
sys/dev/qlnx/qlnxe/nvm_cfg.h
330
u32 mps10_preemphasis; /* 0x40 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
339
u32 mps10_driver_current; /* 0x44 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
348
u32 mps25_preemphasis; /* 0x48 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
357
u32 mps25_driver_current; /* 0x4C */
sys/dev/qlnx/qlnxe/nvm_cfg.h
366
u32 pci_id; /* 0x50 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
375
u32 pci_subsys_id; /* 0x54 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
380
u32 bar; /* 0x58 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
464
u32 mps10_txfir_main; /* 0x5C */
sys/dev/qlnx/qlnxe/nvm_cfg.h
473
u32 mps10_txfir_post; /* 0x60 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
482
u32 mps25_txfir_main; /* 0x64 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
491
u32 mps25_txfir_post; /* 0x68 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
500
u32 manufacture_ver; /* 0x6C */
sys/dev/qlnx/qlnxe/nvm_cfg.h
520
u32 manufacture_time; /* 0x70 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
53
u32 mac_addr_hi;
sys/dev/qlnx/qlnxe/nvm_cfg.h
544
u32 led_global_settings; /* 0x74 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
56
u32 mac_addr_lo;
sys/dev/qlnx/qlnxe/nvm_cfg.h
593
u32 generic_cont1; /* 0x78 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
622
u32 mbi_version; /* 0x7C */
sys/dev/qlnx/qlnxe/nvm_cfg.h
64
u32 generic_cont0; /* 0x0 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
666
u32 mbi_date; /* 0x80 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
667
u32 misc_sig; /* 0x84 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
782
u32 device_capabilities; /* 0x88 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
788
u32 power_dissipated; /* 0x8C */
sys/dev/qlnx/qlnxe/nvm_cfg.h
797
u32 power_consumed; /* 0x90 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
806
u32 efi_version; /* 0x94 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
807
u32 multi_network_modes_capability; /* 0x98 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
817
u32 nvm_cfg_version; /* 0x9C */
sys/dev/qlnx/qlnxe/nvm_cfg.h
818
u32 nvm_cfg_new_option_seq; /* 0xA0 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
819
u32 nvm_cfg_removed_option_seq; /* 0xA4 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
820
u32 nvm_cfg_updated_value_seq; /* 0xA8 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
821
u32 extended_serial_number[8]; /* 0xAC */
sys/dev/qlnx/qlnxe/nvm_cfg.h
822
u32 oem1_number[8]; /* 0xCC */
sys/dev/qlnx/qlnxe/nvm_cfg.h
823
u32 oem2_number[8]; /* 0xEC */
sys/dev/qlnx/qlnxe/nvm_cfg.h
824
u32 mps25_active_txfir_pre; /* 0x10C */
sys/dev/qlnx/qlnxe/nvm_cfg.h
833
u32 mps25_active_txfir_main; /* 0x110 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
842
u32 mps25_active_txfir_post; /* 0x114 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
851
u32 features; /* 0x118 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
963
u32 tx_rx_eq_25g_hlpc; /* 0x11C */
sys/dev/qlnx/qlnxe/nvm_cfg.h
972
u32 tx_rx_eq_25g_llpc; /* 0x120 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
981
u32 tx_rx_eq_25g_ac; /* 0x124 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
990
u32 tx_rx_eq_10g_pc; /* 0x128 */
sys/dev/qlnx/qlnxe/nvm_cfg.h
999
u32 tx_rx_eq_10g_ac; /* 0x12C */
sys/dev/qlnx/qlnxe/nvm_map.h
124
u32 image_type;
sys/dev/qlnx/qlnxe/nvm_map.h
178
u32 dir_id;
sys/dev/qlnx/qlnxe/nvm_map.h
179
u32 nvm_dir_addr;
sys/dev/qlnx/qlnxe/nvm_map.h
180
u32 num_images;
sys/dev/qlnx/qlnxe/nvm_map.h
181
u32 next_mfw_to_run;
sys/dev/qlnx/qlnxe/nvm_map.h
195
u32 num_images;
sys/dev/qlnx/qlnxe/nvm_map.h
196
u32 rsrv;
sys/dev/qlnx/qlnxe/nvm_map.h
202
u32 format_revision;
sys/dev/qlnx/qlnxe/nvm_map.h
294
u32 reg_type;
sys/dev/qlnx/qlnxe/nvm_map.h
299
u32 bank_num;
sys/dev/qlnx/qlnxe/nvm_map.h
300
u32 pf_num;
sys/dev/qlnx/qlnxe/nvm_map.h
301
u32 operation;
sys/dev/qlnx/qlnxe/nvm_map.h
307
u32 reg_addr;
sys/dev/qlnx/qlnxe/nvm_map.h
308
u32 reg_data;
sys/dev/qlnx/qlnxe/nvm_map.h
310
u32 reset_type;
sys/dev/qlnx/qlnxe/nvm_map.h
321
u32 format_version;
sys/dev/qlnx/qlnxe/nvm_map.h
323
u32 no_hw_sets;
sys/dev/qlnx/qlnxe/nvm_map.h
43
#define NVM_CRC_SIZE (sizeof(u32))
sys/dev/qlnx/qlnxe/nvm_map.h
55
u32 magic_value; /* a pattern not likely to occur randomly */
sys/dev/qlnx/qlnxe/nvm_map.h
57
u32 sram_start_addr; /* where to locate LIM code (byte addr) */
sys/dev/qlnx/qlnxe/nvm_map.h
58
u32 code_len; /* boot code length (in dwords) */
sys/dev/qlnx/qlnxe/nvm_map.h
59
u32 code_start_addr; /* location of code on media (media byte addr) */
sys/dev/qlnx/qlnxe/nvm_map.h
60
u32 crc; /* 32-bit CRC */
sys/dev/qlnx/qlnxe/nvm_map.h
67
u32 image_type; /* Image type */
sys/dev/qlnx/qlnxe/nvm_map.h
68
u32 nvm_start_addr; /* NVM address of the image */
sys/dev/qlnx/qlnxe/nvm_map.h
69
u32 len; /* Include CRC */
sys/dev/qlnx/qlnxe/nvm_map.h
70
u32 sram_start_addr; /* Where to load the image on the scratchpad */
sys/dev/qlnx/qlnxe/nvm_map.h
71
u32 sram_run_addr; /* Relevant in case of MIM only */
sys/dev/qlnx/qlnxe/spad_layout.h
132
u32 num_sections; /* 0xe20000 */
sys/dev/qlnx/qlnxe/spad_layout.h
137
u32 tim_sha256[8]; /* Used by E5 ROM. Do not relocate */
sys/dev/qlnx/qlnxe/spad_layout.h
138
u32 rom_status_code; /* Used by E5 ROM. Do not relocate */
sys/dev/qlnx/qlnxe/spad_layout.h
139
u32 secure_running_mfw; /* Instead of the one after the trace_buffer */ /* Used by E5 ROM. Do not relocate */
sys/dev/qlnx/qlnxe/spad_layout.h
140
#define SECURE_RUNNING_MFW *((u32*)(STRUCT_OFFSET(secure_running_mfw)))
sys/dev/qlnx/qlnxe/spad_layout.h
153
u32 running_mfw; /* 0xe20830 */
sys/dev/qlnx/qlnxe/spad_layout.h
154
#define RUNNING_MFW *((u32*)(STRUCT_OFFSET(running_mfw)))
sys/dev/qlnx/qlnxe/spad_layout.h
155
u32 build_time; /* 0xe20834 */
sys/dev/qlnx/qlnxe/spad_layout.h
156
#define MFW_BUILD_TIME *((u32*)(STRUCT_OFFSET(build_time)))
sys/dev/qlnx/qlnxe/spad_layout.h
157
u32 reset_type; /* 0xe20838 */
sys/dev/qlnx/qlnxe/spad_layout.h
158
#define RESET_TYPE *((u32*)(STRUCT_OFFSET(reset_type)))
sys/dev/qlnx/qlnxe/spad_layout.h
159
u32 mfw_secure_mode; /* 0xe2083c */
sys/dev/qlnx/qlnxe/spad_layout.h
160
#define MFW_SECURE_MODE *((u32*)(STRUCT_OFFSET(mfw_secure_mode)))
sys/dev/qlnx/qlnxe/spad_layout.h
165
u32 mim_nvm_addr; /* 0xe20844 */
sys/dev/qlnx/qlnxe/spad_layout.h
166
u32 mim_start_addr; /* 0xe20848 */
sys/dev/qlnx/qlnxe/spad_layout.h
167
u32 ah_pcie_link_params; /* 0xe20850 Stores PCIe link configuration at start, so they can be used later also for Hot-Reset, without the need to re-reading them from nvm cfg. */
sys/dev/qlnx/qlnxe/spad_layout.h
176
#define AH_PCIE_LINK_PARAMS *((u32*)(STRUCT_OFFSET(ah_pcie_link_params)))
sys/dev/qlnx/qlnxe/spad_layout.h
178
u32 flags; /* 0xe20850 */
sys/dev/qlnx/qlnxe/spad_layout.h
179
#define M_GLOB_FLAGS *((u32*)(STRUCT_OFFSET(flags)))
sys/dev/qlnx/qlnxe/spad_layout.h
200
u32 rsrv_persist[4]; /* Persist reserved for MFW upgrades */ /* 0xe20854 */
sys/dev/qlnx/qlnxe/spad_layout.h
94
#define SPAD_OFFSET(addr) (((u32)addr - (u32)CPU_SPAD_BASE))
sys/dev/qlnx/qlnxe/spad_layout.h
98
(u32)((((u32)(_offset) >> 2) << OFFSIZE_OFFSET_OFFSET) | \
sys/dev/qlnx/qlnxe/spad_layout.h
99
(((u32)(_size) >> 2) << OFFSIZE_SIZE_OFFSET))
sys/dev/qlnx/qlnxr/qlnxr_cm.c
131
*((u32 *)&qp->rqe_wr_id[qp->rq.gsi_cons].smac[0]) =
sys/dev/qlnx/qlnxr/qlnxr_cm.c
570
u32 ipv4_addr;
sys/dev/qlnx/qlnxr/qlnxr_cm.h
47
static inline u32 qlnxr_get_ipv4_from_gid(u8 *gid)
sys/dev/qlnx/qlnxr/qlnxr_cm.h
49
return *(u32 *)(void *)&gid[12];
sys/dev/qlnx/qlnxr/qlnxr_def.h
178
#define QLNXR_MAX_CQES ((u32)((QLNXR_MAX_CQE_PBL_ENTRIES) * (ECORE_CHAIN_PAGE_SIZE)\
sys/dev/qlnx/qlnxr/qlnxr_def.h
245
u32 vendor_id;
sys/dev/qlnx/qlnxr/qlnxr_def.h
246
u32 vendor_part_id;
sys/dev/qlnx/qlnxr/qlnxr_def.h
247
u32 hw_ver;
sys/dev/qlnx/qlnxr/qlnxr_def.h
258
u32 max_sqe; /* Maximum number of send outstanding send work
sys/dev/qlnx/qlnxr/qlnxr_def.h
261
u32 max_rqe; /* Maximum number of receive outstanding receive
sys/dev/qlnx/qlnxr/qlnxr_def.h
274
u32 max_cq;
sys/dev/qlnx/qlnxr/qlnxr_def.h
275
u32 max_qp;
sys/dev/qlnx/qlnxr/qlnxr_def.h
276
u32 max_mr; /* Maximum # of MRs supported */
sys/dev/qlnx/qlnxr/qlnxr_def.h
280
u32 max_cqe;
sys/dev/qlnx/qlnxr/qlnxr_def.h
281
u32 max_mw; /* Maximum # of memory windows supported */
sys/dev/qlnx/qlnxr/qlnxr_def.h
282
u32 max_fmr;
sys/dev/qlnx/qlnxr/qlnxr_def.h
283
u32 max_mr_mw_fmr_pbl;
sys/dev/qlnx/qlnxr/qlnxr_def.h
285
u32 max_pd; /* Maximum # of protection domains supported */
sys/dev/qlnx/qlnxr/qlnxr_def.h
286
u32 max_ah;
sys/dev/qlnx/qlnxr/qlnxr_def.h
288
u32 max_srq; /* Maximum number of SRQs */
sys/dev/qlnx/qlnxr/qlnxr_def.h
289
u32 max_srq_wr; /* Maximum number of WRs per SRQ */
sys/dev/qlnx/qlnxr/qlnxr_def.h
292
u32 dev_caps;
sys/dev/qlnx/qlnxr/qlnxr_def.h
349
u32 reserved_lkey; /* Value of reserved L_key */
sys/dev/qlnx/qlnxr/qlnxr_def.h
350
u32 bad_pkey_counter;/* Bad P_key counter support
sys/dev/qlnx/qlnxr/qlnxr_def.h
419
u32 pd_id;
sys/dev/qlnx/qlnxr/qlnxr_def.h
429
u32 dpi_size;
sys/dev/qlnx/qlnxr/qlnxr_def.h
443
u32 size;
sys/dev/qlnx/qlnxr/qlnxr_def.h
455
u32 size;
sys/dev/qlnx/qlnxr/qlnxr_def.h
465
u32 vector;
sys/dev/qlnx/qlnxr/qlnxr_def.h
496
u32 num_pbls;
sys/dev/qlnx/qlnxr/qlnxr_def.h
497
u32 num_pbes;
sys/dev/qlnx/qlnxr/qlnxr_def.h
498
u32 pbl_size;
sys/dev/qlnx/qlnxr/qlnxr_def.h
499
u32 pbe_size;
sys/dev/qlnx/qlnxr/qlnxr_def.h
548
u32 raw;
sys/dev/qlnx/qlnxr/qlnxr_def.h
555
u32 max_sges;
sys/dev/qlnx/qlnxr/qlnxr_def.h
580
u32 max_sges;
sys/dev/qlnx/qlnxr/qlnxr_def.h
581
u32 max_wr;
sys/dev/qlnx/qlnxr/qlnxr_def.h
584
u32 wqe_prod; /* WQE prod index in HW ring */
sys/dev/qlnx/qlnxr/qlnxr_def.h
585
u32 sge_prod; /* SGE prod index in HW ring */
sys/dev/qlnx/qlnxr/qlnxr_def.h
586
u32 wr_prod_cnt; /* wr producer count */
sys/dev/qlnx/qlnxr/qlnxr_def.h
587
u32 wr_cons_cnt; /* wr consumer count */
sys/dev/qlnx/qlnxr/qlnxr_def.h
588
u32 num_elems;
sys/dev/qlnx/qlnxr/qlnxr_def.h
590
u32 *virt_prod_pair_addr; /* producer pair virtual address */
sys/dev/qlnx/qlnxr/qlnxr_def.h
620
u32 completed;
sys/dev/qlnx/qlnxr/qlnxr_def.h
621
u32 completed_handled;
sys/dev/qlnx/qlnxr/qlnxr_def.h
631
u32 max_inline_data;
sys/dev/qlnx/qlnxr/qlnxr_def.h
639
u32 id;
sys/dev/qlnx/qlnxr/qlnxr_def.h
643
u32 qp_id;
sys/dev/qlnx/qlnxr/qlnxr_def.h
647
u32 rq_psn;
sys/dev/qlnx/qlnxr/qlnxr_def.h
648
u32 sq_psn;
sys/dev/qlnx/qlnxr/qlnxr_def.h
649
u32 qkey;
sys/dev/qlnx/qlnxr/qlnxr_def.h
650
u32 dest_qp_num;
sys/dev/qlnx/qlnxr/qlnxr_def.h
651
u32 sig; /* unique siganture to identify valid QP */
sys/dev/qlnx/qlnxr/qlnxr_def.h
656
u32 err_bitmap;
sys/dev/qlnx/qlnxr/qlnxr_def.h
662
u32 bytes_len;
sys/dev/qlnx/qlnxr/qlnxr_def.h
666
u32 *icrc;
sys/dev/qlnx/qlnxr/qlnxr_def.h
707
u32 npages;
sys/dev/qlnx/qlnxr/qlnxr_os.c
499
n_entries = min_t(u32, ECORE_RDMA_MAX_CNQ_SIZE, QLNXR_ROCE_MAX_CNQ_SIZE);
sys/dev/qlnx/qlnxr/qlnxr_os.c
683
u32 page_size;
sys/dev/qlnx/qlnxr/qlnxr_os.c
708
attr->max_sqe = min_t(u32, ecore_attr->max_wqe, QLNXR_MAX_SQE);
sys/dev/qlnx/qlnxr/qlnxr_os.c
709
attr->max_rqe = min_t(u32, ecore_attr->max_wqe, QLNXR_MAX_RQE);
sys/dev/qlnx/qlnxr/qlnxr_os.c
746
u32 page_cnt;
sys/dev/qlnx/qlnxr/qlnxr_user.h
39
u32 db_size;
sys/dev/qlnx/qlnxr/qlnxr_user.h
58
u32 pd_id;
sys/dev/qlnx/qlnxr/qlnxr_user.h
67
u32 db_offset;
sys/dev/qlnx/qlnxr/qlnxr_user.h
72
u32 qp_handle_hi;
sys/dev/qlnx/qlnxr/qlnxr_user.h
73
u32 qp_handle_lo;
sys/dev/qlnx/qlnxr/qlnxr_user.h
85
u32 qp_id;
sys/dev/qlnx/qlnxr/qlnxr_user.h
89
u32 sq_db_offset;
sys/dev/qlnx/qlnxr/qlnxr_user.h
93
u32 rq_db_offset;
sys/dev/qlnx/qlnxr/qlnxr_user.h
96
u32 rq_db2_offset;
sys/dev/qlnx/qlnxr/qlnxr_verbs.c
1234
u32 num_pbes,
sys/dev/qlnx/qlnxr/qlnxr_verbs.c
1237
u32 pbl_capacity;
sys/dev/qlnx/qlnxr/qlnxr_verbs.c
1238
u32 pbl_size;
sys/dev/qlnx/qlnxr/qlnxr_verbs.c
1239
u32 num_pbls;
sys/dev/qlnx/qlnxr/qlnxr_verbs.c
1270
pbl_size = max_t(u32, MIN_FW_PBL_PAGE_SIZE, \
sys/dev/qlnx/qlnxr/qlnxr_verbs.c
173
u32 page_cnt, page_size;
sys/dev/qlnx/qlnxr/qlnxr_verbs.c
2371
u32 num_elems, max_wr;
sys/dev/qlnx/qlnxr/qlnxr_verbs.c
2478
qlnxr_idr_add(struct qlnxr_dev *dev, void *ptr, u32 id)
sys/dev/qlnx/qlnxr/qlnxr_verbs.c
2480
u32 newid;
sys/dev/qlnx/qlnxr/qlnxr_verbs.c
2511
qlnxr_idr_remove(struct qlnxr_dev *dev, u32 id)
sys/dev/qlnx/qlnxr/qlnxr_verbs.c
2733
u32 n_sq_elems,
sys/dev/qlnx/qlnxr/qlnxr_verbs.c
2734
u32 n_rq_elems)
sys/dev/qlnx/qlnxr/qlnxr_verbs.c
2803
u32 n_sq_elems,
sys/dev/qlnx/qlnxr/qlnxr_verbs.c
2804
u32 n_rq_elems)
sys/dev/qlnx/qlnxr/qlnxr_verbs.c
2949
u32 n_rq_elems;
sys/dev/qlnx/qlnxr/qlnxr_verbs.c
2950
u32 n_sq_elems;
sys/dev/qlnx/qlnxr/qlnxr_verbs.c
2951
u32 n_sq_entries;
sys/dev/qlnx/qlnxr/qlnxr_verbs.c
2971
qp->sq.max_wr = min_t(u32, attrs->cap.max_send_wr * dev->wq_multiplier,
sys/dev/qlnx/qlnxr/qlnxr_verbs.c
2989
qp->rq.max_wr = (u16)max_t(u32, attrs->cap.max_recv_wr, 1);
sys/dev/qlnx/qlnxr/qlnxr_verbs.c
3028
n_sq_entries = min_t(u32, n_sq_entries, qattr->max_wqe);
sys/dev/qlnx/qlnxr/qlnxr_verbs.c
3029
n_sq_entries = max_t(u32, n_sq_entries, 1);
sys/dev/qlnx/qlnxr/qlnxr_verbs.c
3513
u32 temp;
sys/dev/qlnx/qlnxr/qlnxr_verbs.c
393
u32 num_sge, offset;
sys/dev/qlnx/qlnxr/qlnxr_verbs.c
3934
static u32
sys/dev/qlnx/qlnxr/qlnxr_verbs.c
3945
u32 data_size = sge_data_len(wr->sg_list, wr->num_sge);
sys/dev/qlnx/qlnxr/qlnxr_verbs.c
3971
u32 len = wr->sg_list[i].length;
sys/dev/qlnx/qlnxr/qlnxr_verbs.c
3975
u32 cur;
sys/dev/qlnx/qlnxr/qlnxr_verbs.c
4011
static u32
sys/dev/qlnx/qlnxr/qlnxr_verbs.c
4016
u32 data_size = 0;
sys/dev/qlnx/qlnxr/qlnxr_verbs.c
4039
static u32
sys/dev/qlnx/qlnxr/qlnxr_verbs.c
4048
u32 ret = 0;
sys/dev/qlnx/qlnxr/qlnxr_verbs.c
4071
static u32
sys/dev/qlnx/qlnxr/qlnxr_verbs.c
4080
u32 ret = 0;
sys/dev/qlnx/qlnxr/qlnxr_verbs.c
4602
static u32
sys/dev/qlnx/qlnxr/qlnxr_verbs.c
4605
u32 used;
sys/dev/qlnx/qlnxr/qlnxr_verbs.c
4669
u32 flags = 0;
sys/dev/qlnx/qlnxr/qlnxr_verbs.c
4685
u32 flags = 0;
sys/dev/qlnx/qlnxr/qlnxr_verbs.c
5171
doorbell_cq(struct qlnxr_dev *dev, struct qlnxr_cq *cq, u32 cons, u8 flags)
sys/dev/qlnx/qlnxr/qlnxr_verbs.c
5219
u32 old_cons, new_cons;
sys/dev/qlnx/qlnxr/qlnxr_verbs.c
5439
u32 max_num_sg, struct ib_udata *udata)
sys/dev/qlnx/qlnxr/qlnxr_verbs.c
5471
u32 pbes_in_page;
sys/dev/qlnx/qlnxr/qlnxr_verbs.c
5488
pbe->lo = cpu_to_le32((u32)addr);
sys/dev/qlnx/qlnxr/qlnxr_verbs.c
5489
pbe->hi = cpu_to_le32((u32)upper_32_bits(addr));
sys/dev/qlnx/qlnxr/qlnxr_verbs.c
5528
struct ib_ah_attr *attr, u32 flags,
sys/dev/qlnx/qlnxr/qlnxr_verbs.c
5546
qlnxr_destroy_ah(struct ib_ah *ibah, u32 flags)
sys/dev/qlnx/qlnxr/qlnxr_verbs.c
97
static u32
sys/dev/qlnx/qlnxr/qlnxr_verbs.h
118
struct ib_ah_attr *attr, u32 flags,
sys/dev/qlnx/qlnxr/qlnxr_verbs.h
120
extern void qlnxr_destroy_ah(struct ib_ah *ibah, u32 flags);
sys/dev/qlnx/qlnxr/qlnxr_verbs.h
163
enum ib_mr_type mr_type, u32 max_num_sg,
sys/dev/sym/sym_defs.h
151
u32 boot_crc;
sys/dev/sym/sym_defs.h
375
/*1c*/ u32 nc_temp; /* ### Temporary stack */
sys/dev/sym/sym_defs.h
388
/*24*/ u32 nc_dbc; /* ### Byte count and command */
sys/dev/sym/sym_defs.h
389
/*28*/ u32 nc_dnad; /* ### Next command register */
sys/dev/sym/sym_defs.h
390
/*2c*/ u32 nc_dsp; /* --> Script Pointer */
sys/dev/sym/sym_defs.h
391
/*30*/ u32 nc_dsps; /* --> Script pointer save/opcode#2 */
sys/dev/sym/sym_defs.h
419
/*3c*/ u32 nc_adder;
sys/dev/sym/sym_defs.h
496
/*a0*/ u32 nc_mmrs; /* Memory Move Read Selector */
sys/dev/sym/sym_defs.h
497
/*a4*/ u32 nc_mmws; /* Memory Move Write Selector */
sys/dev/sym/sym_defs.h
498
/*a8*/ u32 nc_sfs; /* Script Fetch Selector */
sys/dev/sym/sym_defs.h
499
/*ac*/ u32 nc_drs; /* DSA Relative Selector */
sys/dev/sym/sym_defs.h
500
/*b0*/ u32 nc_sbms; /* Static Block Move Selector */
sys/dev/sym/sym_defs.h
501
/*b4*/ u32 nc_dbms; /* Dynamic Block Move Selector */
sys/dev/sym/sym_defs.h
502
/*b8*/ u32 nc_dnad64; /* DMA Next Address 64 */
sys/dev/sym/sym_defs.h
514
/*c0*/ u32 nc_pmjad1; /* Phase Mismatch Jump Address 1 */
sys/dev/sym/sym_defs.h
515
/*c4*/ u32 nc_pmjad2; /* Phase Mismatch Jump Address 2 */
sys/dev/sym/sym_defs.h
525
/*d0*/ u32 nc_esa; /* Entry Storage Address */
sys/dev/sym/sym_defs.h
530
/*d8*/ u32 nc_sbc; /* SCSI Byte Count (3 bytes only) */
sys/dev/sym/sym_defs.h
531
/*dc*/ u32 nc_csbc; /* Cumulative SCSI Byte Count */
sys/dev/sym/sym_defs.h
537
/*e4*/ u32 nc_crcdata; /* CRC data register */
sys/dev/sym/sym_defs.h
538
/*e8*/ u32 nc_e8_;
sys/dev/sym/sym_defs.h
539
/*ec*/ u32 nc_ec_;
sys/dev/sym/sym_defs.h
553
typedef u32 symcmd;
sys/dev/sym/sym_defs.h
603
u32 size;
sys/dev/sym/sym_defs.h
604
u32 addr;
sys/dev/sym/sym_defs.h
635
#define SCR_ID(id) (((u32)(id)) << 16)
sys/dev/sym/sym_fw.h
119
SYM_GEN_FW_A(u32)
sys/dev/sym/sym_fw.h
122
SYM_GEN_FW_B(u32)
sys/dev/sym/sym_fw.h
123
SYM_GEN_B(u32, start64)
sys/dev/sym/sym_fw.h
124
SYM_GEN_B(u32, pm_handle)
sys/dev/sym/sym_fw.h
140
const u32 *a_base;/* Pointer to script A template */
sys/dev/sym/sym_fw.h
144
const u32 *b_base;/* Pointer to script B template */
sys/dev/sym/sym_fw.h
159
(const u32 *) &fw##a_scr, sizeof(fw##a_scr), &fw##a_ofs,\
sys/dev/sym/sym_fw.h
160
(const u32 *) &fw##b_scr, sizeof(fw##b_scr), &fw##b_ofs,\
sys/dev/sym/sym_fw1.h
100
u32 datao_phase [ 2];
sys/dev/sym/sym_fw1.h
101
u32 msg_in [ 2];
sys/dev/sym/sym_fw1.h
102
u32 msg_in2 [ 10];
sys/dev/sym/sym_fw1.h
104
u32 status [ 14];
sys/dev/sym/sym_fw1.h
106
u32 status [ 10];
sys/dev/sym/sym_fw1.h
108
u32 complete [ 9];
sys/dev/sym/sym_fw1.h
109
u32 complete2 [ 8];
sys/dev/sym/sym_fw1.h
110
u32 _sms_a40 [ 12];
sys/dev/sym/sym_fw1.h
111
u32 complete_error [ 5];
sys/dev/sym/sym_fw1.h
112
u32 done [ 5];
sys/dev/sym/sym_fw1.h
113
u32 _sms_a50 [ 5];
sys/dev/sym/sym_fw1.h
114
u32 _sms_a60 [ 2];
sys/dev/sym/sym_fw1.h
115
u32 done_end [ 4];
sys/dev/sym/sym_fw1.h
116
u32 save_dp [ 9];
sys/dev/sym/sym_fw1.h
117
u32 restore_dp [ 5];
sys/dev/sym/sym_fw1.h
118
u32 disconnect [ 20];
sys/dev/sym/sym_fw1.h
119
u32 disconnect2 [ 5];
sys/dev/sym/sym_fw1.h
120
u32 _sms_a65 [ 3];
sys/dev/sym/sym_fw1.h
122
u32 idle [ 4];
sys/dev/sym/sym_fw1.h
124
u32 idle [ 2];
sys/dev/sym/sym_fw1.h
127
u32 ungetjob [ 7];
sys/dev/sym/sym_fw1.h
129
u32 ungetjob [ 5];
sys/dev/sym/sym_fw1.h
131
u32 reselect [ 4];
sys/dev/sym/sym_fw1.h
132
u32 reselected [ 19];
sys/dev/sym/sym_fw1.h
133
u32 _sms_a70 [ 6];
sys/dev/sym/sym_fw1.h
134
u32 _sms_a80 [ 4];
sys/dev/sym/sym_fw1.h
135
u32 reselected1 [ 25];
sys/dev/sym/sym_fw1.h
136
u32 _sms_a90 [ 4];
sys/dev/sym/sym_fw1.h
137
u32 resel_lun0 [ 7];
sys/dev/sym/sym_fw1.h
138
u32 _sms_a100 [ 4];
sys/dev/sym/sym_fw1.h
139
u32 resel_tag [ 8];
sys/dev/sym/sym_fw1.h
141
u32 _sms_a110 [ 23];
sys/dev/sym/sym_fw1.h
143
u32 _sms_a110 [ 17];
sys/dev/sym/sym_fw1.h
145
u32 _sms_a110 [ 13];
sys/dev/sym/sym_fw1.h
147
u32 _sms_a120 [ 2];
sys/dev/sym/sym_fw1.h
148
u32 resel_go [ 4];
sys/dev/sym/sym_fw1.h
149
u32 _sms_a130 [ 7];
sys/dev/sym/sym_fw1.h
150
u32 resel_dsa [ 2];
sys/dev/sym/sym_fw1.h
151
u32 resel_dsa1 [ 4];
sys/dev/sym/sym_fw1.h
152
u32 _sms_a140 [ 10];
sys/dev/sym/sym_fw1.h
153
u32 resel_no_tag [ 4];
sys/dev/sym/sym_fw1.h
154
u32 _sms_a145 [ 7];
sys/dev/sym/sym_fw1.h
155
u32 data_in [SYM_CONF_MAX_SG * 2];
sys/dev/sym/sym_fw1.h
156
u32 data_in2 [ 4];
sys/dev/sym/sym_fw1.h
157
u32 data_out [SYM_CONF_MAX_SG * 2];
sys/dev/sym/sym_fw1.h
158
u32 data_out2 [ 4];
sys/dev/sym/sym_fw1.h
159
u32 pm0_data [ 12];
sys/dev/sym/sym_fw1.h
160
u32 pm0_data_out [ 6];
sys/dev/sym/sym_fw1.h
161
u32 pm0_data_end [ 7];
sys/dev/sym/sym_fw1.h
162
u32 pm_data_end [ 4];
sys/dev/sym/sym_fw1.h
163
u32 _sms_a150 [ 4];
sys/dev/sym/sym_fw1.h
164
u32 pm1_data [ 12];
sys/dev/sym/sym_fw1.h
165
u32 pm1_data_out [ 6];
sys/dev/sym/sym_fw1.h
166
u32 pm1_data_end [ 9];
sys/dev/sym/sym_fw1.h
174
u32 no_data [ 2];
sys/dev/sym/sym_fw1.h
175
u32 sel_for_abort [ 18];
sys/dev/sym/sym_fw1.h
176
u32 sel_for_abort_1 [ 2];
sys/dev/sym/sym_fw1.h
177
u32 msg_in_etc [ 12];
sys/dev/sym/sym_fw1.h
178
u32 msg_received [ 5];
sys/dev/sym/sym_fw1.h
179
u32 msg_weird_seen [ 5];
sys/dev/sym/sym_fw1.h
180
u32 msg_extended [ 17];
sys/dev/sym/sym_fw1.h
181
u32 _sms_b10 [ 4];
sys/dev/sym/sym_fw1.h
182
u32 msg_bad [ 6];
sys/dev/sym/sym_fw1.h
183
u32 msg_weird [ 4];
sys/dev/sym/sym_fw1.h
184
u32 msg_weird1 [ 8];
sys/dev/sym/sym_fw1.h
185
u32 wdtr_resp [ 6];
sys/dev/sym/sym_fw1.h
186
u32 send_wdtr [ 4];
sys/dev/sym/sym_fw1.h
187
u32 sdtr_resp [ 6];
sys/dev/sym/sym_fw1.h
188
u32 send_sdtr [ 4];
sys/dev/sym/sym_fw1.h
189
u32 ppr_resp [ 6];
sys/dev/sym/sym_fw1.h
190
u32 send_ppr [ 4];
sys/dev/sym/sym_fw1.h
191
u32 nego_bad_phase [ 4];
sys/dev/sym/sym_fw1.h
192
u32 msg_out [ 4];
sys/dev/sym/sym_fw1.h
193
u32 msg_out_done [ 4];
sys/dev/sym/sym_fw1.h
194
u32 data_ovrun [ 3];
sys/dev/sym/sym_fw1.h
195
u32 data_ovrun1 [ 22];
sys/dev/sym/sym_fw1.h
196
u32 data_ovrun2 [ 8];
sys/dev/sym/sym_fw1.h
197
u32 abort_resel [ 16];
sys/dev/sym/sym_fw1.h
198
u32 resend_ident [ 4];
sys/dev/sym/sym_fw1.h
199
u32 ident_break [ 4];
sys/dev/sym/sym_fw1.h
200
u32 ident_break_atn [ 4];
sys/dev/sym/sym_fw1.h
201
u32 sdata_in [ 6];
sys/dev/sym/sym_fw1.h
202
u32 resel_bad_lun [ 4];
sys/dev/sym/sym_fw1.h
203
u32 bad_i_t_l [ 4];
sys/dev/sym/sym_fw1.h
204
u32 bad_i_t_l_q [ 4];
sys/dev/sym/sym_fw1.h
205
u32 bad_status [ 7];
sys/dev/sym/sym_fw1.h
206
u32 wsr_ma_helper [ 4];
sys/dev/sym/sym_fw1.h
209
u32 zero [ 1];
sys/dev/sym/sym_fw1.h
210
u32 scratch [ 1];
sys/dev/sym/sym_fw1.h
211
u32 scratch1 [ 1];
sys/dev/sym/sym_fw1.h
212
u32 prev_done [ 1];
sys/dev/sym/sym_fw1.h
213
u32 done_pos [ 1];
sys/dev/sym/sym_fw1.h
214
u32 nextjob [ 1];
sys/dev/sym/sym_fw1.h
215
u32 startpos [ 1];
sys/dev/sym/sym_fw1.h
216
u32 targtbl [ 1];
sys/dev/sym/sym_fw1.h
219
u32 snooptest [ 9];
sys/dev/sym/sym_fw1.h
220
u32 snoopend [ 2];
sys/dev/sym/sym_fw1.h
77
u32 start [ 11];
sys/dev/sym/sym_fw1.h
78
u32 getjob_begin [ 4];
sys/dev/sym/sym_fw1.h
79
u32 _sms_a10 [ 5];
sys/dev/sym/sym_fw1.h
80
u32 getjob_end [ 4];
sys/dev/sym/sym_fw1.h
81
u32 _sms_a20 [ 4];
sys/dev/sym/sym_fw1.h
82
u32 select [ 8];
sys/dev/sym/sym_fw1.h
83
u32 _sms_a30 [ 8];
sys/dev/sym/sym_fw1.h
84
u32 wf_sel_done [ 2];
sys/dev/sym/sym_fw1.h
85
u32 send_ident [ 2];
sys/dev/sym/sym_fw1.h
87
u32 select2 [ 8];
sys/dev/sym/sym_fw1.h
89
u32 select2 [ 2];
sys/dev/sym/sym_fw1.h
91
u32 command [ 2];
sys/dev/sym/sym_fw1.h
92
u32 dispatch [ 28];
sys/dev/sym/sym_fw1.h
93
u32 sel_no_cmd [ 10];
sys/dev/sym/sym_fw1.h
94
u32 init [ 6];
sys/dev/sym/sym_fw1.h
95
u32 clrack [ 4];
sys/dev/sym/sym_fw1.h
96
u32 disp_status [ 4];
sys/dev/sym/sym_fw1.h
97
u32 datai_done [ 26];
sys/dev/sym/sym_fw1.h
98
u32 datao_done [ 12];
sys/dev/sym/sym_fw1.h
99
u32 datai_phase [ 2];
sys/dev/sym/sym_fw2.h
100
u32 msg_in2 [ 10];
sys/dev/sym/sym_fw2.h
102
u32 status [ 14];
sys/dev/sym/sym_fw2.h
104
u32 status [ 10];
sys/dev/sym/sym_fw2.h
106
u32 complete [ 8];
sys/dev/sym/sym_fw2.h
107
u32 complete2 [ 12];
sys/dev/sym/sym_fw2.h
108
u32 complete_error [ 4];
sys/dev/sym/sym_fw2.h
109
u32 done [ 14];
sys/dev/sym/sym_fw2.h
110
u32 done_end [ 2];
sys/dev/sym/sym_fw2.h
111
u32 save_dp [ 8];
sys/dev/sym/sym_fw2.h
112
u32 restore_dp [ 4];
sys/dev/sym/sym_fw2.h
113
u32 disconnect [ 20];
sys/dev/sym/sym_fw2.h
115
u32 idle [ 4];
sys/dev/sym/sym_fw2.h
117
u32 idle [ 2];
sys/dev/sym/sym_fw2.h
120
u32 ungetjob [ 6];
sys/dev/sym/sym_fw2.h
122
u32 ungetjob [ 4];
sys/dev/sym/sym_fw2.h
124
u32 reselect [ 4];
sys/dev/sym/sym_fw2.h
125
u32 reselected [ 22];
sys/dev/sym/sym_fw2.h
126
u32 resel_scntl4 [ 20];
sys/dev/sym/sym_fw2.h
127
u32 resel_lun0 [ 6];
sys/dev/sym/sym_fw2.h
129
u32 resel_tag [ 26];
sys/dev/sym/sym_fw2.h
131
u32 resel_tag [ 20];
sys/dev/sym/sym_fw2.h
133
u32 resel_tag [ 16];
sys/dev/sym/sym_fw2.h
135
u32 resel_dsa [ 2];
sys/dev/sym/sym_fw2.h
136
u32 resel_dsa1 [ 6];
sys/dev/sym/sym_fw2.h
137
u32 resel_no_tag [ 6];
sys/dev/sym/sym_fw2.h
138
u32 data_in [SYM_CONF_MAX_SG * 2];
sys/dev/sym/sym_fw2.h
139
u32 data_in2 [ 4];
sys/dev/sym/sym_fw2.h
140
u32 data_out [SYM_CONF_MAX_SG * 2];
sys/dev/sym/sym_fw2.h
141
u32 data_out2 [ 4];
sys/dev/sym/sym_fw2.h
142
u32 pm0_data [ 12];
sys/dev/sym/sym_fw2.h
143
u32 pm0_data_out [ 6];
sys/dev/sym/sym_fw2.h
144
u32 pm0_data_end [ 6];
sys/dev/sym/sym_fw2.h
145
u32 pm1_data [ 12];
sys/dev/sym/sym_fw2.h
146
u32 pm1_data_out [ 6];
sys/dev/sym/sym_fw2.h
147
u32 pm1_data_end [ 6];
sys/dev/sym/sym_fw2.h
155
u32 start64 [ 2];
sys/dev/sym/sym_fw2.h
156
u32 no_data [ 2];
sys/dev/sym/sym_fw2.h
157
u32 sel_for_abort [ 18];
sys/dev/sym/sym_fw2.h
158
u32 sel_for_abort_1 [ 2];
sys/dev/sym/sym_fw2.h
159
u32 msg_in_etc [ 12];
sys/dev/sym/sym_fw2.h
160
u32 msg_received [ 4];
sys/dev/sym/sym_fw2.h
161
u32 msg_weird_seen [ 4];
sys/dev/sym/sym_fw2.h
162
u32 msg_extended [ 20];
sys/dev/sym/sym_fw2.h
163
u32 msg_bad [ 6];
sys/dev/sym/sym_fw2.h
164
u32 msg_weird [ 4];
sys/dev/sym/sym_fw2.h
165
u32 msg_weird1 [ 8];
sys/dev/sym/sym_fw2.h
167
u32 wdtr_resp [ 6];
sys/dev/sym/sym_fw2.h
168
u32 send_wdtr [ 4];
sys/dev/sym/sym_fw2.h
169
u32 sdtr_resp [ 6];
sys/dev/sym/sym_fw2.h
170
u32 send_sdtr [ 4];
sys/dev/sym/sym_fw2.h
171
u32 ppr_resp [ 6];
sys/dev/sym/sym_fw2.h
172
u32 send_ppr [ 4];
sys/dev/sym/sym_fw2.h
173
u32 nego_bad_phase [ 4];
sys/dev/sym/sym_fw2.h
174
u32 msg_out [ 4];
sys/dev/sym/sym_fw2.h
175
u32 msg_out_done [ 4];
sys/dev/sym/sym_fw2.h
176
u32 data_ovrun [ 2];
sys/dev/sym/sym_fw2.h
177
u32 data_ovrun1 [ 22];
sys/dev/sym/sym_fw2.h
178
u32 data_ovrun2 [ 8];
sys/dev/sym/sym_fw2.h
179
u32 abort_resel [ 16];
sys/dev/sym/sym_fw2.h
180
u32 resend_ident [ 4];
sys/dev/sym/sym_fw2.h
181
u32 ident_break [ 4];
sys/dev/sym/sym_fw2.h
182
u32 ident_break_atn [ 4];
sys/dev/sym/sym_fw2.h
183
u32 sdata_in [ 6];
sys/dev/sym/sym_fw2.h
184
u32 resel_bad_lun [ 4];
sys/dev/sym/sym_fw2.h
185
u32 bad_i_t_l [ 4];
sys/dev/sym/sym_fw2.h
186
u32 bad_i_t_l_q [ 4];
sys/dev/sym/sym_fw2.h
187
u32 bad_status [ 6];
sys/dev/sym/sym_fw2.h
188
u32 pm_handle [ 20];
sys/dev/sym/sym_fw2.h
189
u32 pm_handle1 [ 4];
sys/dev/sym/sym_fw2.h
190
u32 pm_save [ 4];
sys/dev/sym/sym_fw2.h
191
u32 pm0_save [ 14];
sys/dev/sym/sym_fw2.h
192
u32 pm1_save [ 14];
sys/dev/sym/sym_fw2.h
195
u32 pm_wsr_handle [ 42];
sys/dev/sym/sym_fw2.h
196
u32 wsr_ma_helper [ 4];
sys/dev/sym/sym_fw2.h
199
u32 zero [ 1];
sys/dev/sym/sym_fw2.h
200
u32 scratch [ 1];
sys/dev/sym/sym_fw2.h
201
u32 pm0_data_addr [ 1];
sys/dev/sym/sym_fw2.h
202
u32 pm1_data_addr [ 1];
sys/dev/sym/sym_fw2.h
203
u32 saved_dsa [ 1];
sys/dev/sym/sym_fw2.h
204
u32 saved_drs [ 1];
sys/dev/sym/sym_fw2.h
205
u32 done_pos [ 1];
sys/dev/sym/sym_fw2.h
206
u32 startpos [ 1];
sys/dev/sym/sym_fw2.h
207
u32 targtbl [ 1];
sys/dev/sym/sym_fw2.h
210
u32 snooptest [ 6];
sys/dev/sym/sym_fw2.h
211
u32 snoopend [ 2];
sys/dev/sym/sym_fw2.h
77
u32 start [ 14];
sys/dev/sym/sym_fw2.h
78
u32 getjob_begin [ 4];
sys/dev/sym/sym_fw2.h
79
u32 getjob_end [ 4];
sys/dev/sym/sym_fw2.h
80
u32 select [ 8];
sys/dev/sym/sym_fw2.h
81
u32 wf_sel_done [ 2];
sys/dev/sym/sym_fw2.h
82
u32 sel_done [ 2];
sys/dev/sym/sym_fw2.h
83
u32 send_ident [ 2];
sys/dev/sym/sym_fw2.h
85
u32 select2 [ 8];
sys/dev/sym/sym_fw2.h
87
u32 select2 [ 2];
sys/dev/sym/sym_fw2.h
89
u32 command [ 2];
sys/dev/sym/sym_fw2.h
90
u32 dispatch [ 28];
sys/dev/sym/sym_fw2.h
91
u32 sel_no_cmd [ 10];
sys/dev/sym/sym_fw2.h
92
u32 init [ 6];
sys/dev/sym/sym_fw2.h
93
u32 clrack [ 4];
sys/dev/sym/sym_fw2.h
94
u32 disp_status [ 4];
sys/dev/sym/sym_fw2.h
95
u32 datai_done [ 26];
sys/dev/sym/sym_fw2.h
96
u32 datao_done [ 12];
sys/dev/sym/sym_fw2.h
97
u32 datai_phase [ 2];
sys/dev/sym/sym_fw2.h
98
u32 datao_phase [ 4];
sys/dev/sym/sym_fw2.h
99
u32 msg_in [ 2];
sys/dev/sym/sym_hipd.c
1065
u32 luntbl_sa; /* bus address of this table */
sys/dev/sym/sym_hipd.c
1066
u32 lun0_sa; /* bus address of LCB #0 */
sys/dev/sym/sym_hipd.c
1092
u32 *luntbl; /* LCBs bus address table */
sys/dev/sym/sym_hipd.c
1107
u32 lun_map[(SYM_CONF_MAX_LUN+31)/32];
sys/dev/sym/sym_hipd.c
1113
u32 busy0_map[(SYM_CONF_MAX_LUN+31)/32];
sys/dev/sym/sym_hipd.c
1163
/*0*/ u32 resel_sa;
sys/dev/sym/sym_hipd.c
1169
u32 itl_task_sa;
sys/dev/sym/sym_hipd.c
1174
u32 itlq_tbl_sa;
sys/dev/sym/sym_hipd.c
1192
u32 *itlq_tbl; /* Kernel virtual address */
sys/dev/sym/sym_hipd.c
1225
u32 start; /* Jumped by SCRIPTS after selection */
sys/dev/sym/sym_hipd.c
1226
u32 restart; /* Jumped by SCRIPTS on relection */
sys/dev/sym/sym_hipd.c
1238
u32 ret; /* SCRIPT return address */
sys/dev/sym/sym_hipd.c
1318
u32 savep; /* Jump address to saved data pointer */
sys/dev/sym/sym_hipd.c
1319
u32 lastp; /* SCRIPTS address at end of data */
sys/dev/sym/sym_hipd.c
1320
u32 goalp; /* Not accessed for now from SCRIPTS */
sys/dev/sym/sym_hipd.c
1390
u32 extra_bytes; /* Extraneous bytes transferred */
sys/dev/sym/sym_hipd.c
1424
u32 ccb_ba; /* BUS address of this CCB */
sys/dev/sym/sym_hipd.c
1432
u32 startp; /* Initial data pointer */
sys/dev/sym/sym_hipd.c
1468
u32 *badluntbl; /* Table physical address */
sys/dev/sym/sym_hipd.c
1469
u32 badlun_sa; /* SCRIPT handler BUS address */
sys/dev/sym/sym_hipd.c
1474
u32 hcb_ba;
sys/dev/sym/sym_hipd.c
1481
u32 scr_ram_seg;
sys/dev/sym/sym_hipd.c
1518
u32 *targtbl;
sys/dev/sym/sym_hipd.c
1519
u32 targtbl_ba;
sys/dev/sym/sym_hipd.c
1601
u32 clock_khz; /* SCSI clock frequency in KHz */
sys/dev/sym/sym_hipd.c
1602
u32 pciclk_khz; /* Estimated PCI clock in KHz */
sys/dev/sym/sym_hipd.c
1609
u32 *squeue; /* Start queue virtual address */
sys/dev/sym/sym_hipd.c
1610
u32 squeue_ba; /* Start queue BUS address */
sys/dev/sym/sym_hipd.c
1620
u32 *dqueue; /* Completion (done) queue */
sys/dev/sym/sym_hipd.c
1621
u32 dqueue_ba; /* Done queue BUS address */
sys/dev/sym/sym_hipd.c
1630
u32 lastmsg; /* Last SCSI message sent */
sys/dev/sym/sym_hipd.c
1639
u32 cache; /* Used for cache test at init. */
sys/dev/sym/sym_hipd.c
1878
sym_fw_fill_data (u32 *in, u32 *out)
sys/dev/sym/sym_hipd.c
1897
u32 *pa;
sys/dev/sym/sym_hipd.c
1906
pa = (u32 *) &np->fwa_bas;
sys/dev/sym/sym_hipd.c
1907
for (i = 0 ; i < sizeof(np->fwa_bas)/sizeof(u32) ; i++)
sys/dev/sym/sym_hipd.c
1914
pa = (u32 *) &np->fwb_bas;
sys/dev/sym/sym_hipd.c
1915
for (i = 0 ; i < sizeof(np->fwb_bas)/sizeof(u32) ; i++)
sys/dev/sym/sym_hipd.c
1990
static void sym_fw_bind_script (hcb_p np, u32 *start, int len)
sys/dev/sym/sym_hipd.c
1992
u32 opcode, new, old, tmp1, tmp2;
sys/dev/sym/sym_hipd.c
1993
u32 *end, *cur;
sys/dev/sym/sym_hipd.c
2205
static int sym_evaluate_dp (hcb_p np, ccb_p cp, u32 scr, int *ofs);
sys/dev/sym/sym_hipd.c
2219
static ccb_p sym_ccb_from_dsa (hcb_p np, u32 dsa);
sys/dev/sym/sym_hipd.c
224
#define sym_set_bit(p, n) (((u32 *)(p))[(n)>>5] |= (1<<((n)&0x1f)))
sys/dev/sym/sym_hipd.c
225
#define sym_clr_bit(p, n) (((u32 *)(p))[(n)>>5] &= ~(1<<((n)&0x1f)))
sys/dev/sym/sym_hipd.c
226
#define sym_is_bit(p, n) (((u32 *)(p))[(n)>>5] & (1<<((n)&0x1f)))
sys/dev/sym/sym_hipd.c
2364
static const u32 div_10M[] =
sys/dev/sym/sym_hipd.c
2470
u32 period;
sys/dev/sym/sym_hipd.c
2982
u32 term;
sys/dev/sym/sym_hipd.c
3042
u32 dsa;
sys/dev/sym/sym_hipd.c
3096
u32 phys;
sys/dev/sym/sym_hipd.c
3319
u32 clk = np->clock_khz; /* SCSI clock frequency in kHz */
sys/dev/sym/sym_hipd.c
3321
u32 fak; /* Sync factor in sxfer */
sys/dev/sym/sym_hipd.c
3322
u32 per; /* Period in tenths of ns */
sys/dev/sym/sym_hipd.c
3323
u32 kpc; /* (per * clk) */
sys/dev/sym/sym_hipd.c
3670
u32 dsp;
sys/dev/sym/sym_hipd.c
3709
scr_to_cpu((int) *(u32 *)(script_base + script_ofs)));
sys/dev/sym/sym_hipd.c
3982
u32 dsp = INL (nc_dsp);
sys/dev/sym/sym_hipd.c
3983
u32 dsa = INL (nc_dsa);
sys/dev/sym/sym_hipd.c
4033
u32 dsp = INL (nc_dsp);
sys/dev/sym/sym_hipd.c
4107
u32 dsp = INL (nc_dsp);
sys/dev/sym/sym_hipd.c
4108
u32 dbc = INL (nc_dbc);
sys/dev/sym/sym_hipd.c
4109
u32 dsa = INL (nc_dsa);
sys/dev/sym/sym_hipd.c
4188
u32 dbc;
sys/dev/sym/sym_hipd.c
4189
u32 rest;
sys/dev/sym/sym_hipd.c
4190
u32 dsp;
sys/dev/sym/sym_hipd.c
4191
u32 dsa;
sys/dev/sym/sym_hipd.c
4192
u32 nxtdsp;
sys/dev/sym/sym_hipd.c
4193
u32 *vdsp;
sys/dev/sym/sym_hipd.c
4194
u32 oadr, olen;
sys/dev/sym/sym_hipd.c
4195
u32 *tblp;
sys/dev/sym/sym_hipd.c
4196
u32 newcmd;
sys/dev/sym/sym_hipd.c
4228
u32 dfifo;
sys/dev/sym/sym_hipd.c
4286
vdsp = (u32 *)((char*)np->scripta0 + (dsp-np->scripta_ba-8));
sys/dev/sym/sym_hipd.c
4291
vdsp = (u32 *)((char*)np->scriptb0 + (dsp-np->scriptb_ba-8));
sys/dev/sym/sym_hipd.c
4321
tblp = (u32 *) ((char*) &cp->phys + oadr);
sys/dev/sym/sym_hipd.c
4325
tblp = (u32 *) 0;
sys/dev/sym/sym_hipd.c
4411
u32 tmp;
sys/dev/sym/sym_hipd.c
4642
u32 startp;
sys/dev/sym/sym_hipd.c
5243
static int sym_evaluate_dp(hcb_p np, ccb_p cp, u32 scr, int *ofs)
sys/dev/sym/sym_hipd.c
5245
u32 dp_scr;
sys/dev/sym/sym_hipd.c
5363
u32 dp_scr = INL (nc_temp);
sys/dev/sym/sym_hipd.c
5364
u32 dp_ret;
sys/dev/sym/sym_hipd.c
5365
u32 tmp;
sys/dev/sym/sym_hipd.c
5982
u32 dsa = INL (nc_dsa);
sys/dev/sym/sym_hipd.c
6538
static ccb_p sym_ccb_from_dsa(hcb_p np, u32 dsa)
sys/dev/sym/sym_hipd.c
6688
register volatile u32 data;
sys/dev/sym/sym_hipd.c
6712
u32 sym_rd, sym_wr, sym_bk, host_rd, host_wr, pc, dstat;
sys/dev/sym/sym_hipd.c
7614
u32 cmd_ba;
sys/dev/sym/sym_hipd.c
7639
cmd_ba = ((u32)csio->cdb_io.cdb_ptr) & 0xffffffff;
sys/dev/sym/sym_hipd.c
7663
u32 lastp, goalp;
sys/dev/sym/sym_hipd.c
8089
sym_async(void *cb_arg, u32 code, struct cam_path *path, void *args __unused)
sys/dev/sym/sym_hipd.c
8573
np->squeue = (u32 *) sym_calloc_dma(sizeof(u32)*(MAX_QUEUE*2),"SQUEUE");
sys/dev/sym/sym_hipd.c
8581
np->dqueue = (u32 *) sym_calloc_dma(sizeof(u32)*(MAX_QUEUE*2),"DQUEUE");
sys/dev/sym/sym_hipd.c
8589
np->targtbl = (u32 *) sym_calloc_dma(256, "TARGTBL");
sys/dev/sym/sym_hipd.c
8647
sym_fw_bind_script(np, (u32 *) np->scripta0, np->scripta_sz);
sys/dev/sym/sym_hipd.c
8648
sym_fw_bind_script(np, (u32 *) np->scriptb0, np->scriptb_sz);
sys/dev/sym/sym_hipd.c
8783
sym_mfree_dma(np->squeue, sizeof(u32)*(MAX_QUEUE*2), "SQUEUE");
sys/dev/sym/sym_hipd.c
8785
sym_mfree_dma(np->dqueue, sizeof(u32)*(MAX_QUEUE*2), "DQUEUE");
sys/kern/subr_stats.c
1971
sbuf_printf(buf, "%u", vsd->int32.u32);
sys/kern/subr_stats.c
2519
if (VSD(int32, vsd)->u32 < voival->int32.u32) {
sys/kern/subr_stats.c
2520
VSD(int32, vsd)->u32 = voival->int32.u32;
sys/kern/subr_stats.c
2603
if (VSD(int32, vsd)->u32 > voival->int32.u32) {
sys/kern/subr_stats.c
2604
VSD(int32, vsd)->u32 = voival->int32.u32;
sys/kern/subr_stats.c
2684
VSD(int32, vsd)->u32 += voival->int32.u32;
sys/kern/subr_stats.c
2817
if (voival->int32.u32 >= bkt_lb->int32.u32) {
sys/kern/subr_stats.c
2818
if ((eq_only && voival->int32.u32 ==
sys/kern/subr_stats.c
2819
bkt_lb->int32.u32) ||
sys/kern/subr_stats.c
2821
voival->int32.u32 < bkt_ub->int32.u32)))
sys/kern/subr_stats.c
300
[VSD_DTYPE_INT_U32] = {.int32 = {.u32 = 0}},
sys/kern/subr_stats.c
313
[VSD_DTYPE_INT_U32] = {.int32 = {.u32 = UINT32_MAX}},
sys/kern/subr_stats.c
3483
error = Q_QCPYVALI(&x, voival->int32.u32);
sys/kern/subr_stats.c
3554
voival->int32.u32 +=
sys/kern/subr_stats.c
3555
VSD(voistate, statevsd)->prev.int32.u32;
sys/kern/subr_stats.c
3644
VSD(voistate, statevsd)->prev.int32.u32 =
sys/kern/subr_stats.c
3645
voival->int32.u32;
sys/kern/subr_stats.c
489
curstepexp) <= bkt_lb->int32.u32)
sys/kern/subr_stats.c
553
bkt_ub->int32.u32 += (uint32_t)step;
sys/kern/subr_stats.c
619
done = (bkt_ub.int32.u32 > info->ub.int32.u32);
sys/kern/subr_stats.c
899
*((uint32_t *)vss->iv) = iv.int32.u32;
sys/kern/sysv_shm.c
1497
} u32;
sys/kern/sysv_shm.c
1501
if ((error = copyin(uap->buf, &u32.shmid_ds32,
sys/kern/sysv_shm.c
1502
sizeof(u32.shmid_ds32))))
sys/kern/sysv_shm.c
1504
freebsd32_ipcperm_old_in(&u32.shmid_ds32.shm_perm,
sys/kern/sysv_shm.c
1506
CP(u32.shmid_ds32, u.shmid_ds, shm_segsz);
sys/kern/sysv_shm.c
1507
CP(u32.shmid_ds32, u.shmid_ds, shm_lpid);
sys/kern/sysv_shm.c
1508
CP(u32.shmid_ds32, u.shmid_ds, shm_cpid);
sys/kern/sysv_shm.c
1509
CP(u32.shmid_ds32, u.shmid_ds, shm_nattch);
sys/kern/sysv_shm.c
1510
CP(u32.shmid_ds32, u.shmid_ds, shm_atime);
sys/kern/sysv_shm.c
1511
CP(u32.shmid_ds32, u.shmid_ds, shm_dtime);
sys/kern/sysv_shm.c
1512
CP(u32.shmid_ds32, u.shmid_ds, shm_ctime);
sys/kern/sysv_shm.c
1522
CP(u.shminfo, u32.shminfo32, shmmax);
sys/kern/sysv_shm.c
1523
CP(u.shminfo, u32.shminfo32, shmmin);
sys/kern/sysv_shm.c
1524
CP(u.shminfo, u32.shminfo32, shmmni);
sys/kern/sysv_shm.c
1525
CP(u.shminfo, u32.shminfo32, shmseg);
sys/kern/sysv_shm.c
1526
CP(u.shminfo, u32.shminfo32, shmall);
sys/kern/sysv_shm.c
1527
error = copyout(&u32.shminfo32, uap->buf,
sys/kern/sysv_shm.c
1528
sizeof(u32.shminfo32));
sys/kern/sysv_shm.c
1531
CP(u.shm_info, u32.shm_info32, used_ids);
sys/kern/sysv_shm.c
1532
CP(u.shm_info, u32.shm_info32, shm_rss);
sys/kern/sysv_shm.c
1533
CP(u.shm_info, u32.shm_info32, shm_tot);
sys/kern/sysv_shm.c
1534
CP(u.shm_info, u32.shm_info32, shm_swp);
sys/kern/sysv_shm.c
1535
CP(u.shm_info, u32.shm_info32, swap_attempts);
sys/kern/sysv_shm.c
1536
CP(u.shm_info, u32.shm_info32, swap_successes);
sys/kern/sysv_shm.c
1537
error = copyout(&u32.shm_info32, uap->buf,
sys/kern/sysv_shm.c
1538
sizeof(u32.shm_info32));
sys/kern/sysv_shm.c
1542
memset(&u32.shmid_ds32, 0, sizeof(u32.shmid_ds32));
sys/kern/sysv_shm.c
1544
&u32.shmid_ds32.shm_perm);
sys/kern/sysv_shm.c
1546
u32.shmid_ds32.shm_segsz = INT32_MAX;
sys/kern/sysv_shm.c
1548
CP(u.shmid_ds, u32.shmid_ds32, shm_segsz);
sys/kern/sysv_shm.c
1549
CP(u.shmid_ds, u32.shmid_ds32, shm_lpid);
sys/kern/sysv_shm.c
1550
CP(u.shmid_ds, u32.shmid_ds32, shm_cpid);
sys/kern/sysv_shm.c
1551
CP(u.shmid_ds, u32.shmid_ds32, shm_nattch);
sys/kern/sysv_shm.c
1552
CP(u.shmid_ds, u32.shmid_ds32, shm_atime);
sys/kern/sysv_shm.c
1553
CP(u.shmid_ds, u32.shmid_ds32, shm_dtime);
sys/kern/sysv_shm.c
1554
CP(u.shmid_ds, u32.shmid_ds32, shm_ctime);
sys/kern/sysv_shm.c
1555
u32.shmid_ds32.shm_internal = 0;
sys/kern/sysv_shm.c
1556
error = copyout(&u32.shmid_ds32, uap->buf,
sys/kern/sysv_shm.c
1557
sizeof(u32.shmid_ds32));
sys/kern/sysv_shm.c
1583
} u32;
sys/kern/sysv_shm.c
1587
if ((error = copyin(uap->buf, &u32.shmid_ds32,
sys/kern/sysv_shm.c
1588
sizeof(u32.shmid_ds32))))
sys/kern/sysv_shm.c
1590
freebsd32_ipcperm_in(&u32.shmid_ds32.shm_perm,
sys/kern/sysv_shm.c
1592
CP(u32.shmid_ds32, u.shmid_ds, shm_segsz);
sys/kern/sysv_shm.c
1593
CP(u32.shmid_ds32, u.shmid_ds, shm_lpid);
sys/kern/sysv_shm.c
1594
CP(u32.shmid_ds32, u.shmid_ds, shm_cpid);
sys/kern/sysv_shm.c
1595
CP(u32.shmid_ds32, u.shmid_ds, shm_nattch);
sys/kern/sysv_shm.c
1596
CP(u32.shmid_ds32, u.shmid_ds, shm_atime);
sys/kern/sysv_shm.c
1597
CP(u32.shmid_ds32, u.shmid_ds, shm_dtime);
sys/kern/sysv_shm.c
1598
CP(u32.shmid_ds32, u.shmid_ds, shm_ctime);
sys/kern/sysv_shm.c
1608
CP(u.shminfo, u32.shminfo32, shmmax);
sys/kern/sysv_shm.c
1609
CP(u.shminfo, u32.shminfo32, shmmin);
sys/kern/sysv_shm.c
1610
CP(u.shminfo, u32.shminfo32, shmmni);
sys/kern/sysv_shm.c
1611
CP(u.shminfo, u32.shminfo32, shmseg);
sys/kern/sysv_shm.c
1612
CP(u.shminfo, u32.shminfo32, shmall);
sys/kern/sysv_shm.c
1613
error = copyout(&u32.shminfo32, uap->buf,
sys/kern/sysv_shm.c
1614
sizeof(u32.shminfo32));
sys/kern/sysv_shm.c
1617
CP(u.shm_info, u32.shm_info32, used_ids);
sys/kern/sysv_shm.c
1618
CP(u.shm_info, u32.shm_info32, shm_rss);
sys/kern/sysv_shm.c
1619
CP(u.shm_info, u32.shm_info32, shm_tot);
sys/kern/sysv_shm.c
1620
CP(u.shm_info, u32.shm_info32, shm_swp);
sys/kern/sysv_shm.c
1621
CP(u.shm_info, u32.shm_info32, swap_attempts);
sys/kern/sysv_shm.c
1622
CP(u.shm_info, u32.shm_info32, swap_successes);
sys/kern/sysv_shm.c
1623
error = copyout(&u32.shm_info32, uap->buf,
sys/kern/sysv_shm.c
1624
sizeof(u32.shm_info32));
sys/kern/sysv_shm.c
1629
&u32.shmid_ds32.shm_perm);
sys/kern/sysv_shm.c
1631
u32.shmid_ds32.shm_segsz = INT32_MAX;
sys/kern/sysv_shm.c
1633
CP(u.shmid_ds, u32.shmid_ds32, shm_segsz);
sys/kern/sysv_shm.c
1634
CP(u.shmid_ds, u32.shmid_ds32, shm_lpid);
sys/kern/sysv_shm.c
1635
CP(u.shmid_ds, u32.shmid_ds32, shm_cpid);
sys/kern/sysv_shm.c
1636
CP(u.shmid_ds, u32.shmid_ds32, shm_nattch);
sys/kern/sysv_shm.c
1637
CP(u.shmid_ds, u32.shmid_ds32, shm_atime);
sys/kern/sysv_shm.c
1638
CP(u.shmid_ds, u32.shmid_ds32, shm_dtime);
sys/kern/sysv_shm.c
1639
CP(u.shmid_ds, u32.shmid_ds32, shm_ctime);
sys/kern/sysv_shm.c
1640
error = copyout(&u32.shmid_ds32, uap->buf,
sys/kern/sysv_shm.c
1641
sizeof(u32.shmid_ds32));
sys/net80211/ieee80211_crypto_tkip.c
1012
(u32)(key->wk_keytsc >> 16));
sys/net80211/ieee80211_crypto_tkip.c
1032
u32 iv32;
sys/net80211/ieee80211_crypto_tkip.c
1041
iv32 = (u32) (ctx->rx_rsc >> 16);
sys/net80211/ieee80211_crypto_tkip.c
1044
if (iv32 != (u32)(key->wk_keyrsc[tid] >> 16) || !ctx->rx_phase1_done) {
sys/net80211/ieee80211_crypto_tkip.c
1055
if (iv32 != (u32)(key->wk_keyrsc[tid] >> 16)) {
sys/net80211/ieee80211_crypto_tkip.c
532
static __inline u16 Lo16(u32 val)
sys/net80211/ieee80211_crypto_tkip.c
537
static __inline u16 Hi16(u32 val)
sys/net80211/ieee80211_crypto_tkip.c
595
static void tkip_mixing_phase1(u16 *TTAK, const u8 *TK, const u8 *TA, u32 IV32)
sys/net80211/ieee80211_crypto_tkip.c
670
u32 i, j, k, crc;
sys/net80211/ieee80211_crypto_tkip.c
730
u32 i, j, k, crc;
sys/net80211/ieee80211_crypto_tkip.c
791
static __inline u32 rotl(u32 val, int bits)
sys/net80211/ieee80211_crypto_tkip.c
796
static __inline u32 rotr(u32 val, int bits)
sys/net80211/ieee80211_crypto_tkip.c
801
static __inline u32 xswap(u32 val)
sys/net80211/ieee80211_crypto_tkip.c
818
static __inline u32 get_le32_split(u8 b0, u8 b1, u8 b2, u8 b3)
sys/net80211/ieee80211_crypto_tkip.c
823
static __inline u32 get_le32(const u8 *p)
sys/net80211/ieee80211_crypto_tkip.c
828
static __inline void put_le32(u8 *p, u32 v)
sys/net80211/ieee80211_crypto_tkip.c
880
u32 l, r;
sys/netinet/ip_fw.h
425
uint32_t u32;
sys/netpfil/ipfw/ip_fw2.c
1364
return (tvalue == cmd->u32);
sys/netpfil/ipfw/ip_fw2.c
2197
key.u32 = ip->ip_tos >> 2;
sys/netpfil/ipfw/ip_fw2.c
2199
key.u32 = IPV6_DSCP(
sys/netpfil/ipfw/ip_fw2.c
2204
keylen = sizeof(key.u32);
sys/netpfil/ipfw/ip_fw2.c
2205
key.u32 &= 0x3f;
sys/netpfil/ipfw/ip_fw2.c
2224
key.u32 = dst_port;
sys/netpfil/ipfw/ip_fw2.c
2226
key.u32 = src_port;
sys/netpfil/ipfw/ip_fw2.c
2227
keylen = sizeof(key.u32);
sys/netpfil/ipfw/ip_fw2.c
2248
check_uidgid(insntod(cmd, u32),
sys/netpfil/ipfw/ip_fw2.c
2253
key.u32 = ucred_cache->cr_uid;
sys/netpfil/ipfw/ip_fw2.c
2255
key.u32 = ucred_cache->cr_prison->pr_id;
sys/netpfil/ipfw/ip_fw2.c
2259
key.u32 = ucred_cache.uid;
sys/netpfil/ipfw/ip_fw2.c
2261
key.u32 = ucred_cache.xid;
sys/netpfil/ipfw/ip_fw2.c
2263
keylen = sizeof(key.u32);
sys/netpfil/ipfw/ip_fw2.c
2267
key.u32 = args->rule.pkt_mark;
sys/netpfil/ipfw/ip_fw2.c
2268
keylen = sizeof(key.u32);
sys/netpfil/ipfw/ip_fw2.c
2271
key.u32 = f->rulenum;
sys/netpfil/ipfw/ip_fw2.c
2272
keylen = sizeof(key.u32);
sys/netpfil/ipfw/ip_fw2.c
2287
key.u32 &= insntod(cmd, table)->value;
sys/netpfil/ipfw/ip_fw2.c
2923
mark = insntoc(cmd, u32)->d[0];
sys/netpfil/ipfw/ip_fw2.c
2926
insntoc(cmd, u32)->d[1]) ==
sys/netpfil/ipfw/ip_fw2.c
2927
(mark & insntoc(cmd, u32)->d[1]);
sys/netpfil/ipfw/ip_fw2.c
3079
insntod(cmd, u32)->d[0], tablearg, false);
sys/netpfil/ipfw/ip_fw2.c
3196
insntod(cmd, u32)->d[0],
sys/netpfil/ipfw/ip_fw2.c
3485
insntoc(cmd, u32)->d[0]);
sys/netpfil/ipfw/ip_fw_compat.c
405
insntoc(src, u32)->d[0];
sys/netpfil/ipfw/ip_fw_compat.c
411
insntod(dst, u32)->d[0] = src->arg1;
sys/netpfil/ipfw/ip_fw_dynamic.c
1360
insntoc(cmd, u32)->d[0] != insntoc(old_cmd, u32)->d[0])
sys/netpfil/ipfw/ip_fw_log.c
192
TARG(insntod(cmd, u32)->d[0], skipto));
sys/netpfil/ipfw/ip_fw_log.c
279
TARG(insntod(cmd, u32)->d[0], skipto));
sys/netpfil/ipfw/ip_fw_log.c
287
insntoc(cmd, u32)->d[0]);
sys/netpfil/ipfw/ip_fw_log.c
508
*targ_value = TARG(insntod(cmd, u32)->d[0], skipto);
sys/netpfil/ipfw/ip_fw_sockopt.c
1561
if (CHECK_TARG(insntoc(cmd, u32)->d[0], ci))
sys/netpfil/pf/inet_nat64.c
134
d->u32[3] = inet_nat64_mask(s->u32[0], p->u32[3],
sys/netpfil/pf/inet_nat64.c
185
d->u32[0] = inet_nat64_mask(s->u32[3], p->u32[0], pfxlen);
sys/netpfil/pf/inet_nat64.c
198
d->u32[0] = d->u32[1] = d->u32[2] = 0;
sys/netpfil/pf/inet_nat64.c
201
d->u32[3] = inet_nat64_mask(s->u32[0], p->u32[0], pfxlen);
sys/netpfil/pf/inet_nat64.c
27
u_int32_t u32[4];
sys/netpfil/pf/inet_nat64.c
34
u_int32_t u32;
sys/netpfil/pf/inet_nat64.c
39
u32 =
sys/netpfil/pf/inet_nat64.c
42
return (u32);
sys/netpfil/pf/inet_nat64.c
90
d->u32[0] = inet_nat64_mask(s->u32[3], p->u32[3],
sys/ofed/drivers/infiniband/core/cm_msgs.h
102
u32 private_data[IB_CM_REQ_PRIVATE_DATA_SIZE / sizeof(u32)];
sys/ofed/drivers/infiniband/core/cm_msgs.h
800
u32 private_data[IB_CM_SIDR_REQ_PRIVATE_DATA_SIZE / sizeof(u32)];
sys/ofed/drivers/infiniband/core/ib_cm.c
607
return (__force u32) a < (__force u32) b;
sys/ofed/drivers/infiniband/core/ib_cm.c
612
return (__force u32) a > (__force u32) b;
sys/ofed/drivers/infiniband/core/ib_cma.c
3222
u32 rand;
sys/ofed/drivers/infiniband/core/ib_cma.c
333
u32 seq_num;
sys/ofed/drivers/infiniband/core/ib_cma.c
334
u32 qkey;
sys/ofed/drivers/infiniband/core/ib_cma.c
335
u32 qp_num;
sys/ofed/drivers/infiniband/core/ib_cma.c
337
u32 options;
sys/ofed/drivers/infiniband/core/ib_cma.c
3913
enum ib_cm_sidr_status status, u32 qkey,
sys/ofed/drivers/infiniband/core/ib_cma.c
542
static int cma_set_qkey(struct rdma_id_private *id_priv, u32 qkey)
sys/ofed/drivers/infiniband/core/ib_core_uverbs.c
288
size_t length, u32 min_pgoff,
sys/ofed/drivers/infiniband/core/ib_core_uverbs.c
289
u32 max_pgoff)
sys/ofed/drivers/infiniband/core/ib_core_uverbs.c
292
u32 xa_first, xa_last, npages;
sys/ofed/drivers/infiniband/core/ib_core_uverbs.c
294
u32 i;
sys/ofed/drivers/infiniband/core/ib_core_uverbs.c
295
u32 j;
sys/ofed/drivers/infiniband/core/ib_core_uverbs.c
314
npages = (u32)DIV_ROUND_UP(length, PAGE_SIZE);
sys/ofed/drivers/infiniband/core/ib_fmr_pool.c
110
static inline u32 ib_fmr_hash(u64 first_page)
sys/ofed/drivers/infiniband/core/ib_fmr_pool.c
112
return jhash_2words((u32) first_page, (u32) (first_page >> 32), 0) &
sys/ofed/drivers/infiniband/core/ib_mad.c
1709
u32 hi_tid;
sys/ofed/drivers/infiniband/core/ib_mad.c
1793
u32 qp_num = qp_info->qp->qp_num;
sys/ofed/drivers/infiniband/core/ib_mad.c
206
u32 registration_flags)
sys/ofed/drivers/infiniband/core/ib_mad.c
2613
struct ib_mad_send_buf *send_buf, u32 timeout_ms)
sys/ofed/drivers/infiniband/core/ib_mad.c
66
static u32 ib_mad_client_id = 0;
sys/ofed/drivers/infiniband/core/ib_mad.c
782
u32 opa_drslid;
sys/ofed/drivers/infiniband/core/ib_mad.c
986
u32 remote_qpn, u16 pkey_index,
sys/ofed/drivers/infiniband/core/ib_mad_rmpp.c
582
u32 paylen = 0;
sys/ofed/drivers/infiniband/core/ib_mad_rmpp.c
69
u32 src_qp;
sys/ofed/drivers/infiniband/core/ib_packer.c
163
u32 val;
sys/ofed/drivers/infiniband/core/ib_packer.c
164
u32 mask;
sys/ofed/drivers/infiniband/core/ib_packer.c
74
u32 val;
sys/ofed/drivers/infiniband/core/ib_rdma_core.c
222
u32 id, struct uverbs_attr_bundle *attrs)
sys/ofed/drivers/infiniband/core/ib_rdma_core.c
245
int __uobj_perform_destroy(const struct uverbs_api_object *obj, u32 id,
sys/ofed/drivers/infiniband/core/ib_sa_query.c
149
static u32 tid;
sys/ofed/drivers/infiniband/core/ib_sa_query.c
96
u32 flags;
sys/ofed/drivers/infiniband/core/ib_sa_query.c
98
u32 seq; /* Local svc request sequence number */
sys/ofed/drivers/infiniband/core/ib_ucm.c
689
static int ib_ucm_alloc_data(const void **dest, u64 src, u32 len)
sys/ofed/drivers/infiniband/core/ib_user_mad.c
677
u32 *umm = (u32 *) ureq.method_mask;
sys/ofed/drivers/infiniband/core/ib_user_mad.c
700
(u32 __user *) ((char *)arg + offsetof(struct ib_user_mad_reg_req, id)))) {
sys/ofed/drivers/infiniband/core/ib_user_mad.c
762
const u32 flags = IB_USER_MAD_REG_FLAGS_CAP;
sys/ofed/drivers/infiniband/core/ib_user_mad.c
769
(u32 __user *) ((char *)arg + offsetof(struct
sys/ofed/drivers/infiniband/core/ib_user_mad.c
818
(u32 __user *)((char *)arg +
sys/ofed/drivers/infiniband/core/ib_user_mad.c
844
static int ib_umad_unreg_agent(struct ib_umad_file *file, u32 __user *arg)
sys/ofed/drivers/infiniband/core/ib_user_mad.c
847
u32 id;
sys/ofed/drivers/infiniband/core/ib_uverbs_cmd.c
122
static u32 uverbs_response_length(struct uverbs_attr_bundle *attrs,
sys/ofed/drivers/infiniband/core/ib_uverbs_cmd.c
2195
ib_uverbs_unmarshall_recv(struct uverbs_req_iter *iter, u32 wr_count,
sys/ofed/drivers/infiniband/core/ib_uverbs_cmd.c
2196
u32 wqe_size, u32 sge_count)
sys/ofed/drivers/infiniband/core/ib_uverbs_cmd.c
3060
u32 *wqs_handles = NULL;
sys/ofed/drivers/infiniband/core/ib_uverbs_cmd.c
3063
u32 num_wq_handles;
sys/ofed/drivers/infiniband/core/ib_uverbs_cmd.c
336
resp->device_cap_flags = (u32)attr->device_cap_flags;
sys/ofed/drivers/infiniband/core/ib_uverbs_ioctl.c
169
u32 attr_bkey)
sys/ofed/drivers/infiniband/core/ib_uverbs_ioctl.c
173
u32 *idr_vals;
sys/ofed/drivers/infiniband/core/ib_uverbs_ioctl.c
180
if (uattr->len % sizeof(u32))
sys/ofed/drivers/infiniband/core/ib_uverbs_ioctl.c
183
array_len = uattr->len / sizeof(u32);
sys/ofed/drivers/infiniband/core/ib_uverbs_ioctl.c
200
idr_vals = (u32 *)(attr->uobjects + array_len) - array_len;
sys/ofed/drivers/infiniband/core/ib_uverbs_ioctl.c
241
struct ib_uverbs_attr *uattr, u32 attr_bkey)
sys/ofed/drivers/infiniband/core/ib_uverbs_ioctl.c
353
u32 attr_key)
sys/ofed/drivers/infiniband/core/ib_uverbs_ioctl.c
362
u32 attr_key = uapi_key_attr(uattr->attr_id);
sys/ofed/drivers/infiniband/core/ib_uverbs_ioctl.c
363
u32 attr_bkey = uapi_bkey_attr(attr_key);
sys/ofed/drivers/infiniband/core/ib_uverbs_ioctl.c
56
u32 method_key;
sys/ofed/drivers/infiniband/core/ib_uverbs_ioctl.c
630
flags = *(const u32 *)&attr->ptr_attr.data;
sys/ofed/drivers/infiniband/core/ib_uverbs_ioctl.c
642
int uverbs_get_flags32(u32 *to, const struct uverbs_attr_bundle *attrs_bundle,
sys/ofed/drivers/infiniband/core/ib_uverbs_main.c
391
u32 *counter)
sys/ofed/drivers/infiniband/core/ib_uverbs_std_types_cq.c
155
UVERBS_ATTR_TYPE(u32),
sys/ofed/drivers/infiniband/core/ib_uverbs_std_types_cq.c
165
UVERBS_ATTR_TYPE(u32),
sys/ofed/drivers/infiniband/core/ib_uverbs_std_types_cq.c
170
UVERBS_ATTR_TYPE(u32),
sys/ofed/drivers/infiniband/core/ib_uverbs_std_types_device.c
100
u32 *handles;
sys/ofed/drivers/infiniband/core/ib_uverbs_std_types_device.c
104
if (out_len <= 0 || (out_len % sizeof(u32) != 0))
sys/ofed/drivers/infiniband/core/ib_uverbs_std_types_device.c
121
sizeof(u32) * total);
sys/ofed/drivers/infiniband/core/ib_uverbs_std_types_device.c
199
u32 num_comp = attrs->ufile->device->num_comp_vectors;
sys/ofed/drivers/infiniband/core/ib_uverbs_std_types_device.c
22
u32 cmd;
sys/ofed/drivers/infiniband/core/ib_uverbs_std_types_device.c
228
UVERBS_ATTR_TYPE(u32), UA_OPTIONAL),
sys/ofed/drivers/infiniband/core/ib_uverbs_std_types_device.c
239
UVERBS_ATTR_TYPE(u32), UA_OPTIONAL),
sys/ofed/drivers/infiniband/core/ib_uverbs_std_types_device.c
241
UVERBS_ATTR_MIN_SIZE(sizeof(u32)), UA_OPTIONAL));
sys/ofed/drivers/infiniband/core/ib_uverbs_std_types_device.c
48
UVERBS_ATTR_MIN_SIZE(sizeof(u32)),
sys/ofed/drivers/infiniband/core/ib_uverbs_std_types_device.c
62
u64 max_count = out_len / sizeof(u32);
sys/ofed/drivers/infiniband/core/ib_uverbs_std_types_device.c
65
u32 *handles;
sys/ofed/drivers/infiniband/core/ib_uverbs_std_types_device.c
76
u32 obj_id = obj->id;
sys/ofed/drivers/infiniband/core/ib_uverbs_std_types_dm.c
99
UVERBS_ATTR_TYPE(u32),
sys/ofed/drivers/infiniband/core/ib_uverbs_std_types_flow_action.c
52
u32 flags, bool is_modify)
sys/ofed/drivers/infiniband/core/ib_uverbs_std_types_mr.c
197
UVERBS_ATTR_TYPE(u32),
sys/ofed/drivers/infiniband/core/ib_uverbs_std_types_mr.c
200
UVERBS_ATTR_TYPE(u32),
sys/ofed/drivers/infiniband/core/ib_uverbs_std_types_mr.c
54
u32 flags;
sys/ofed/drivers/infiniband/core/ib_uverbs_uapi.c
101
struct uverbs_api_object *obj_elm, u32 obj_key,
sys/ofed/drivers/infiniband/core/ib_uverbs_uapi.c
105
u32 method_key = obj_key | uapi_key_ioctl_method(method->id);
sys/ofed/drivers/infiniband/core/ib_uverbs_uapi.c
16
static void *uapi_add_elm(struct uverbs_api *uapi, u32 key, size_t alloc_size)
sys/ofed/drivers/infiniband/core/ib_uverbs_uapi.c
176
u32 obj_key;
sys/ofed/drivers/infiniband/core/ib_uverbs_uapi.c
228
u32 obj_key,
sys/ofed/drivers/infiniband/core/ib_uverbs_uapi.c
229
u32 method_key)
sys/ofed/drivers/infiniband/core/ib_uverbs_uapi.c
278
u32 cur_obj_key = UVERBS_API_KEY_ERR;
sys/ofed/drivers/infiniband/core/ib_uverbs_uapi.c
279
u32 cur_method_key = UVERBS_API_KEY_ERR;
sys/ofed/drivers/infiniband/core/ib_uverbs_uapi.c
357
u32 method_key)
sys/ofed/drivers/infiniband/core/ib_uverbs_uapi.c
36
static void *uapi_add_get_elm(struct uverbs_api *uapi, u32 key,
sys/ofed/drivers/infiniband/core/ib_uverbs_uapi.c
370
u32 attr_key = iter.index & UVERBS_API_ATTR_KEY_MASK;
sys/ofed/drivers/infiniband/core/ib_uverbs_uapi.c
371
u32 attr_bkey = uapi_bkey_attr(attr_key);
sys/ofed/drivers/infiniband/core/ib_uverbs_uapi.c
472
static void uapi_remove_range(struct uverbs_api *uapi, u32 start, u32 last)
sys/ofed/drivers/infiniband/core/ib_uverbs_uapi.c
485
static void uapi_remove_object(struct uverbs_api *uapi, u32 obj_key)
sys/ofed/drivers/infiniband/core/ib_uverbs_uapi.c
492
static void uapi_remove_method(struct uverbs_api *uapi, u32 method_key)
sys/ofed/drivers/infiniband/core/ib_uverbs_uapi.c
499
static u32 uapi_get_obj_id(struct uverbs_attr_spec *spec)
sys/ofed/drivers/infiniband/core/ib_uverbs_uapi.c
509
static void uapi_key_okay(u32 key)
sys/ofed/drivers/infiniband/core/ib_uverbs_uapi.c
529
u32 starting_key = 0;
sys/ofed/drivers/infiniband/core/ib_uverbs_uapi.c
579
u32 obj_key;
sys/ofed/drivers/infiniband/core/ib_uverbs_uapi.c
60
u32 obj_key,
sys/ofed/drivers/infiniband/core/ib_uverbs_uapi.c
61
u32 *cur_method_key)
sys/ofed/drivers/infiniband/core/ib_uverbs_uapi.c
64
u32 method_key = obj_key;
sys/ofed/drivers/infiniband/core/ib_verbs.c
1617
u32 max_num_sg, struct ib_udata *udata)
sys/ofed/drivers/infiniband/core/ib_verbs.c
1882
u32 wq_attr_mask)
sys/ofed/drivers/infiniband/core/ib_verbs.c
1909
u32 table_size;
sys/ofed/drivers/infiniband/core/ib_verbs.c
1940
u32 table_size = (1 << rwq_ind_table->log_ind_tbl_size);
sys/ofed/drivers/infiniband/core/ib_verbs.c
1956
int ib_check_mr_status(struct ib_mr *mr, u32 check_mask,
sys/ofed/drivers/infiniband/core/ib_verbs.c
357
u32 flags,
sys/ofed/drivers/infiniband/core/ib_verbs.c
400
u32 flags)
sys/ofed/drivers/infiniband/core/ib_verbs.c
576
u32 flow_class;
sys/ofed/drivers/infiniband/core/ib_verbs.c
686
int ib_destroy_ah_user(struct ib_ah *ah, u32 flags, struct ib_udata *udata)
sys/ofed/drivers/infiniband/core/ib_verbs.c
933
qp->max_read_sge = min_t(u32, qp_init_attr->cap.max_send_sge,
sys/ofed/drivers/infiniband/core/mad_priv.h
89
u32 num;
sys/ofed/drivers/infiniband/core/rdma_core.h
166
uapi_get_method(const struct uverbs_api *uapi, u32 command)
sys/ofed/drivers/infiniband/core/rdma_core.h
168
u32 cmd_idx = command & IB_USER_VERBS_CMD_COMMAND_MASK;
sys/ofed/drivers/infiniband/core/rdma_core.h
170
if (command & ~(u32)(IB_USER_VERBS_CMD_FLAG_EXTENDED |
sys/ofed/drivers/infiniband/core/uverbs.h
107
u32 num_comp_vectors;
sys/ofed/drivers/infiniband/core/uverbs.h
175
u32 *counter;
sys/ofed/drivers/infiniband/core/uverbs.h
188
u32 events_reported;
sys/ofed/drivers/infiniband/core/uverbs.h
216
u32 comp_events_reported;
sys/ofed/drivers/infiniband/core/uverbs.h
281
static inline u32 make_port_cap_flags(const struct ib_port_attr *attr)
sys/ofed/drivers/infiniband/core/uverbs.h
283
u32 res;
sys/ofed/drivers/infiniband/core/uverbs.h
290
res = attr->port_cap_flags & ~(u32)IB_UVERBS_PCF_IP_BASED_GIDS;
sys/ofed/drivers/infiniband/ulp/ipoib/ipoib.h
281
u32 mtu; /* remote specified mtu, with grh. */
sys/ofed/drivers/infiniband/ulp/ipoib/ipoib.h
357
u32 qkey;
sys/ofed/drivers/infiniband/ulp/ipoib/ipoib.h
455
struct ipoib_ah *address, u32 qpn);
sys/ofed/drivers/infiniband/ulp/ipoib/ipoib_cm.c
1004
static int ipoib_cm_tx_init(struct ipoib_cm_tx *p, u32 qpn,
sys/ofed/drivers/infiniband/ulp/ipoib/ipoib_cm.c
1206
u32 qpn;
sys/ofed/drivers/infiniband/ulp/ipoib/ipoib_cm.c
944
u32 qpn,
sys/ofed/drivers/infiniband/ulp/ipoib/ipoib_ethtool.c
110
static void ipoib_get_strings(if_t netdev, u32 stringset, u8 *data)
sys/ofed/drivers/infiniband/ulp/ipoib/ipoib_ethtool.c
47
static u32 ipoib_get_rx_csum(if_t dev)
sys/ofed/drivers/infiniband/ulp/ipoib/ipoib_ib.c
450
struct ib_ah *address, u32 qpn, struct ipoib_tx_buf *tx_req, void *head,
sys/ofed/drivers/infiniband/ulp/ipoib/ipoib_ib.c
481
struct ipoib_ah *address, u32 qpn)
sys/ofed/drivers/infiniband/ulp/sdp/sdp.h
208
u32 size;
sys/ofed/drivers/infiniband/ulp/sdp/sdp.h
238
u32 mseq;
sys/ofed/drivers/infiniband/ulp/sdp/sdp.h
239
u32 used;
sys/ofed/drivers/infiniband/ulp/sdp/sdp.h
240
u32 reported;
sys/ofed/drivers/infiniband/ulp/sdp/sdp.h
241
u32 len;
sys/ofed/drivers/infiniband/ulp/sdp/sdp.h
242
u32 rkey;
sys/ofed/drivers/infiniband/ulp/sdp/sdp.h
261
u32 bytes_sent;
sys/ofed/drivers/infiniband/ulp/sdp/sdp.h
262
u32 bytes_acked;
sys/ofed/drivers/infiniband/ulp/sdp/sdp.h
267
u32 mseq;
sys/ofed/drivers/infiniband/ulp/sdp/sdp.h
310
u32 pkt_rate_low;
sys/ofed/drivers/infiniband/ulp/sdp/sdp.h
312
u32 pkt_rate_high;
sys/ofed/drivers/infiniband/ulp/sdp/sdp.h
316
u32 msg_enable;
sys/ofed/drivers/infiniband/ulp/sdp/sdp.h
557
sdp_alloc_mb_srcavail(struct socket *sk, u32 len, u32 rkey, u64 vaddr, int wait)
sys/ofed/drivers/infiniband/ulp/sdp/sdp.h
580
sdp_alloc_mb_rdmardcompl(struct socket *sk, u32 len, int wait)
sys/ofed/drivers/infiniband/ulp/sdp/sdp.h
660
int sdp_resize_buffers(struct sdp_sock *ssk, u32 new_size);
sys/ofed/drivers/infiniband/ulp/sdp/sdp.h
661
int sdp_init_buffers(struct sdp_sock *ssk, u32 new_size);
sys/ofed/drivers/infiniband/ulp/sdp/sdp.h
669
void sdp_handle_sendsm(struct sdp_sock *ssk, u32 mseq_ack);
sys/ofed/drivers/infiniband/ulp/sdp/sdp.h
670
void sdp_handle_rdma_read_compl(struct sdp_sock *ssk, u32 mseq_ack,
sys/ofed/drivers/infiniband/ulp/sdp/sdp.h
671
u32 bytes_completed);
sys/ofed/drivers/infiniband/ulp/sdp/sdp_proc.c
208
static void sdpstats_seq_hist(struct seq_file *seq, char *str, u32 *h, int n,
sys/ofed/drivers/infiniband/ulp/sdp/sdp_proc.c
212
u32 max = 0;
sys/ofed/drivers/infiniband/ulp/sdp/sdp_proc.c
238
u32 __val = 0; \
sys/ofed/drivers/infiniband/ulp/sdp/sdp_proc.c
249
u32 *h = per_cpu(sdpstats, __i).hist; \
sys/ofed/drivers/infiniband/ulp/sdp/sdp_proc.c
257
u32 tmp_hist[SDPSTATS_MAX_HIST_SIZE]; \
sys/ofed/drivers/infiniband/ulp/sdp/sdp_rx.c
253
sdp_get_recv_bytes(struct sdp_sock *ssk, u32 new_size)
sys/ofed/drivers/infiniband/ulp/sdp/sdp_rx.c
260
sdp_init_buffers(struct sdp_sock *ssk, u32 new_size)
sys/ofed/drivers/infiniband/ulp/sdp/sdp_rx.c
270
sdp_resize_buffers(struct sdp_sock *ssk, u32 new_size)
sys/ofed/drivers/infiniband/ulp/sdp/sdp_rx.c
272
u32 curr_size = ssk->recv_bytes;
sys/ofed/drivers/infiniband/ulp/sdp/sdp_rx.c
273
u32 max_size = SDP_MAX_PACKET;
sys/ofed/drivers/infiniband/ulp/sdp/sdp_rx.c
295
u32 new_size = ntohl(buf->size);
sys/ofed/drivers/infiniband/ulp/sdp/sdp_tx.c
304
(u32) tx_ring_posted(ssk));
sys/ofed/drivers/infiniband/ulp/sdp/sdp_tx.c
315
u32 inflight, wc_processed;
sys/ofed/drivers/infiniband/ulp/sdp/sdp_tx.c
318
(u32) tx_ring_posted(ssk),
sys/ofed/drivers/infiniband/ulp/sdp/sdp_tx.c
332
inflight = (u32) tx_ring_posted(ssk);
sys/ofed/drivers/infiniband/ulp/sdp/sdp_zcopy.c
339
void sdp_handle_sendsm(struct sdp_sock *ssk, u32 mseq_ack)
sys/ofed/drivers/infiniband/ulp/sdp/sdp_zcopy.c
370
void sdp_handle_rdma_read_compl(struct sdp_sock *ssk, u32 mseq_ack,
sys/ofed/drivers/infiniband/ulp/sdp/sdp_zcopy.c
371
u32 bytes_completed)
sys/ofed/include/rdma/ib_cm.h
134
u32 remote_qkey;
sys/ofed/include/rdma/ib_cm.h
135
u32 remote_qpn;
sys/ofed/include/rdma/ib_cm.h
138
u32 starting_psn;
sys/ofed/include/rdma/ib_cm.h
151
u32 remote_qkey;
sys/ofed/include/rdma/ib_cm.h
152
u32 remote_qpn;
sys/ofed/include/rdma/ib_cm.h
153
u32 starting_psn;
sys/ofed/include/rdma/ib_cm.h
263
u32 qkey;
sys/ofed/include/rdma/ib_cm.h
264
u32 qpn;
sys/ofed/include/rdma/ib_cm.h
329
u32 remote_cm_qpn; /* 1 unless redirected */
sys/ofed/include/rdma/ib_cm.h
386
u32 qp_num;
sys/ofed/include/rdma/ib_cm.h
388
u32 starting_psn;
sys/ofed/include/rdma/ib_cm.h
414
u32 qp_num;
sys/ofed/include/rdma/ib_cm.h
415
u32 starting_psn;
sys/ofed/include/rdma/ib_cm.h
604
u32 qp_num;
sys/ofed/include/rdma/ib_cm.h
605
u32 qkey;
sys/ofed/include/rdma/ib_mad.h
298
static inline u32 ib_get_cpi_capmask2(struct ib_class_port_info *cpi)
sys/ofed/include/rdma/ib_mad.h
311
u32 capmask2)
sys/ofed/include/rdma/ib_mad.h
538
u32 hi_tid;
sys/ofed/include/rdma/ib_mad.h
539
u32 flags;
sys/ofed/include/rdma/ib_mad.h
554
u32 vendor_err;
sys/ofed/include/rdma/ib_mad.h
640
u32 registration_flags);
sys/ofed/include/rdma/ib_mad.h
733
struct ib_mad_send_buf *send_buf, u32 timeout_ms);
sys/ofed/include/rdma/ib_mad.h
803
u32 remote_qpn, u16 pkey_index,
sys/ofed/include/rdma/ib_sa.h
277
u32 lease;
sys/ofed/include/rdma/ib_sa.h
282
u32 data32[4];
sys/ofed/include/rdma/ib_verbs.h
1060
u32 source_qpn;
sys/ofed/include/rdma/ib_verbs.h
1066
u32 qp_num;
sys/ofed/include/rdma/ib_verbs.h
1161
u32 qkey;
sys/ofed/include/rdma/ib_verbs.h
1162
u32 rq_psn;
sys/ofed/include/rdma/ib_verbs.h
1163
u32 sq_psn;
sys/ofed/include/rdma/ib_verbs.h
1164
u32 dest_qp_num;
sys/ofed/include/rdma/ib_verbs.h
1182
u32 rate_limit;
sys/ofed/include/rdma/ib_verbs.h
1231
u32 length;
sys/ofed/include/rdma/ib_verbs.h
1232
u32 lkey;
sys/ofed/include/rdma/ib_verbs.h
1251
u32 invalidate_rkey;
sys/ofed/include/rdma/ib_verbs.h
1258
u32 rkey;
sys/ofed/include/rdma/ib_verbs.h
1273
u32 rkey;
sys/ofed/include/rdma/ib_verbs.h
1287
u32 remote_qpn;
sys/ofed/include/rdma/ib_verbs.h
1288
u32 remote_qkey;
sys/ofed/include/rdma/ib_verbs.h
1301
u32 key;
sys/ofed/include/rdma/ib_verbs.h
1429
u32 local_dma_lkey;
sys/ofed/include/rdma/ib_verbs.h
1430
u32 flags;
sys/ofed/include/rdma/ib_verbs.h
1435
u32 unsafe_global_rkey;
sys/ofed/include/rdma/ib_verbs.h
1492
u32 srq_num;
sys/ofed/include/rdma/ib_verbs.h
1527
u32 wq_num;
sys/ofed/include/rdma/ib_verbs.h
1543
u32 max_wr;
sys/ofed/include/rdma/ib_verbs.h
1544
u32 max_sge;
sys/ofed/include/rdma/ib_verbs.h
1547
u32 create_flags; /* Use enum ib_wq_flags */
sys/ofed/include/rdma/ib_verbs.h
1559
u32 flags; /* Use enum ib_wq_flags */
sys/ofed/include/rdma/ib_verbs.h
1560
u32 flags_mask; /* Use enum ib_wq_flags */
sys/ofed/include/rdma/ib_verbs.h
1567
u32 ind_tbl_num;
sys/ofed/include/rdma/ib_verbs.h
1568
u32 log_ind_tbl_size;
sys/ofed/include/rdma/ib_verbs.h
1573
u32 log_ind_tbl_size;
sys/ofed/include/rdma/ib_verbs.h
1599
u32 qp_num;
sys/ofed/include/rdma/ib_verbs.h
1600
u32 max_write_sge;
sys/ofed/include/rdma/ib_verbs.h
1601
u32 max_read_sge;
sys/ofed/include/rdma/ib_verbs.h
1609
u32 length;
sys/ofed/include/rdma/ib_verbs.h
1610
u32 flags;
sys/ofed/include/rdma/ib_verbs.h
1618
u32 lkey;
sys/ofed/include/rdma/ib_verbs.h
1619
u32 rkey;
sys/ofed/include/rdma/ib_verbs.h
1638
u32 rkey;
sys/ofed/include/rdma/ib_verbs.h
1646
u32 lkey;
sys/ofed/include/rdma/ib_verbs.h
1647
u32 rkey;
sys/ofed/include/rdma/ib_verbs.h
1803
u32 type;
sys/ofed/include/rdma/ib_verbs.h
1817
u32 type;
sys/ofed/include/rdma/ib_verbs.h
1832
u32 type;
sys/ofed/include/rdma/ib_verbs.h
1845
u32 type;
sys/ofed/include/rdma/ib_verbs.h
1854
u32 tag_id;
sys/ofed/include/rdma/ib_verbs.h
1881
u32 type;
sys/ofed/include/rdma/ib_verbs.h
1903
u32 flags;
sys/ofed/include/rdma/ib_verbs.h
1957
u32 esn;
sys/ofed/include/rdma/ib_verbs.h
1958
u32 spi;
sys/ofed/include/rdma/ib_verbs.h
1959
u32 seq;
sys/ofed/include/rdma/ib_verbs.h
1960
u32 tfc_pad;
sys/ofed/include/rdma/ib_verbs.h
2052
u32 core_cap_flags;
sys/ofed/include/rdma/ib_verbs.h
2053
u32 max_mad_size;
sys/ofed/include/rdma/ib_verbs.h
2065
u32 ncounters;
sys/ofed/include/rdma/ib_verbs.h
2066
u32 flags; /* use enum ib_read_counters_flags */
sys/ofed/include/rdma/ib_verbs.h
2232
u32 flags, struct ib_udata *udata);
sys/ofed/include/rdma/ib_verbs.h
2237
void (*destroy_ah)(struct ib_ah *ah, u32 flags);
sys/ofed/include/rdma/ib_verbs.h
2300
u32 max_num_sg, struct ib_udata *udata);
sys/ofed/include/rdma/ib_verbs.h
2302
enum ib_uverbs_advise_mr_advice advice, u32 flags,
sys/ofed/include/rdma/ib_verbs.h
2303
const struct ib_sge *sg_list, u32 num_sge,
sys/ofed/include/rdma/ib_verbs.h
2354
int (*check_mr_status)(struct ib_mr *mr, u32 check_mask,
sys/ofed/include/rdma/ib_verbs.h
2380
u32 wq_attr_mask,
sys/ofed/include/rdma/ib_verbs.h
2419
u32 local_dma_lkey;
sys/ofed/include/rdma/ib_verbs.h
2494
size_t length, u32 min_pgoff,
sys/ofed/include/rdma/ib_verbs.h
2495
u32 max_pgoff);
sys/ofed/include/rdma/ib_verbs.h
281
u32 supported_qpts;
sys/ofed/include/rdma/ib_verbs.h
282
u32 max_rwq_indirection_tables;
sys/ofed/include/rdma/ib_verbs.h
283
u32 max_rwq_indirection_table_size;
sys/ofed/include/rdma/ib_verbs.h
2913
static inline bool rdma_cap_read_inv(struct ib_device *dev, u32 port_num)
sys/ofed/include/rdma/ib_verbs.h
293
u32 max_rndv_hdr_size;
sys/ofed/include/rdma/ib_verbs.h
295
u32 max_num_tags;
sys/ofed/include/rdma/ib_verbs.h
297
u32 flags;
sys/ofed/include/rdma/ib_verbs.h
299
u32 max_ops;
sys/ofed/include/rdma/ib_verbs.h
3004
u32 flags);
sys/ofed/include/rdma/ib_verbs.h
301
u32 max_sge;
sys/ofed/include/rdma/ib_verbs.h
3081
int ib_destroy_ah_user(struct ib_ah *ah, u32 flags, struct ib_udata *udata);
sys/ofed/include/rdma/ib_verbs.h
3090
static inline int ib_destroy_ah(struct ib_ah *ah, u32 flags)
sys/ofed/include/rdma/ib_verbs.h
311
u32 comp_vector;
sys/ofed/include/rdma/ib_verbs.h
312
u32 flags;
sys/ofed/include/rdma/ib_verbs.h
327
u32 access_flags;
sys/ofed/include/rdma/ib_verbs.h
332
u32 alignment;
sys/ofed/include/rdma/ib_verbs.h
333
u32 flags;
sys/ofed/include/rdma/ib_verbs.h
341
u32 vendor_id;
sys/ofed/include/rdma/ib_verbs.h
342
u32 vendor_part_id;
sys/ofed/include/rdma/ib_verbs.h
343
u32 hw_ver;
sys/ofed/include/rdma/ib_verbs.h
3777
u32 max_num_sg, struct ib_udata *udata);
sys/ofed/include/rdma/ib_verbs.h
3780
enum ib_mr_type mr_type, u32 max_num_sg)
sys/ofed/include/rdma/ib_verbs.h
3786
u32 max_num_data_sg,
sys/ofed/include/rdma/ib_verbs.h
3787
u32 max_num_meta_sg);
sys/ofed/include/rdma/ib_verbs.h
3806
static inline u32 ib_inc_rkey(u32 rkey)
sys/ofed/include/rdma/ib_verbs.h
3808
const u32 mask = 0x000000ff;
sys/ofed/include/rdma/ib_verbs.h
387
u32 max_wq_type_rq;
sys/ofed/include/rdma/ib_verbs.h
388
u32 raw_packet_caps; /* Use ib_raw_packet_caps enum */
sys/ofed/include/rdma/ib_verbs.h
393
u32 max_sgl_rd;
sys/ofed/include/rdma/ib_verbs.h
3931
int ib_check_mr_status(struct ib_mr *mr, u32 check_mask,
sys/ofed/include/rdma/ib_verbs.h
3941
u32 wq_attr_mask);
sys/ofed/include/rdma/ib_verbs.h
599
u32 port_cap_flags;
sys/ofed/include/rdma/ib_verbs.h
600
u32 max_msg_sz;
sys/ofed/include/rdma/ib_verbs.h
601
u32 bad_pkey_cntr;
sys/ofed/include/rdma/ib_verbs.h
602
u32 qkey_viol_cntr;
sys/ofed/include/rdma/ib_verbs.h
636
u32 set_port_cap_mask;
sys/ofed/include/rdma/ib_verbs.h
637
u32 clr_port_cap_mask;
sys/ofed/include/rdma/ib_verbs.h
693
u32 flow_label;
sys/ofed/include/rdma/ib_verbs.h
810
u32 fail_status;
sys/ofed/include/rdma/ib_verbs.h
896
u32 vendor_err;
sys/ofed/include/rdma/ib_verbs.h
897
u32 byte_len;
sys/ofed/include/rdma/ib_verbs.h
901
u32 invalidate_rkey;
sys/ofed/include/rdma/ib_verbs.h
903
u32 src_qp;
sys/ofed/include/rdma/ib_verbs.h
940
u32 max_wr;
sys/ofed/include/rdma/ib_verbs.h
941
u32 max_sge;
sys/ofed/include/rdma/ib_verbs.h
942
u32 srq_limit;
sys/ofed/include/rdma/ib_verbs.h
959
u32 max_num_tags;
sys/ofed/include/rdma/ib_verbs.h
966
u32 max_send_wr;
sys/ofed/include/rdma/ib_verbs.h
967
u32 max_recv_wr;
sys/ofed/include/rdma/ib_verbs.h
968
u32 max_send_sge;
sys/ofed/include/rdma/ib_verbs.h
969
u32 max_recv_sge;
sys/ofed/include/rdma/ib_verbs.h
970
u32 max_inline_data;
sys/ofed/include/rdma/ib_verbs.h
977
u32 max_rdma_ctxs;
sys/ofed/include/rdma/iw_cm.h
105
u32 ord;
sys/ofed/include/rdma/iw_cm.h
106
u32 ird;
sys/ofed/include/rdma/iw_cm.h
107
u32 qpn;
sys/ofed/include/rdma/opa_port_info.h
391
u32 reserved6;
sys/ofed/include/rdma/opa_port_info.h
392
u32 reserved7;
sys/ofed/include/rdma/opa_port_info.h
393
u32 reserved8;
sys/ofed/include/rdma/rdma_cm.h
104
u32 qp_num;
sys/ofed/include/rdma/rdma_cm.h
105
u32 qkey;
sys/ofed/include/rdma/rdma_cm.h
112
u32 qp_num;
sys/ofed/include/rdma/rdma_cm.h
113
u32 qkey;
sys/ofed/include/rdma/rdma_vt.h
158
u32 core_cap_flags;
sys/ofed/include/rdma/rdma_vt.h
159
u32 max_mad_size;
sys/ofed/include/rdma/rdma_vt.h
273
u32 (*mtu_from_qp)(struct rvt_dev_info *rdi, struct rvt_qp *qp,
sys/ofed/include/rdma/rdma_vt.h
274
u32 pmtu);
sys/ofed/include/rdma/rdma_vt.h
278
int (*mtu_to_path_mtu)(u32 mtu);
sys/ofed/include/rdma/rdma_vt.h
372
u32 n_srqs_allocated;
sys/ofed/include/rdma/rdma_vt.h
380
u32 n_qps_allocated; /* number of QPs allocated for device */
sys/ofed/include/rdma/rdma_vt.h
381
u32 n_rc_qps; /* number of RC QPs allocated for device */
sys/ofed/include/rdma/rdma_vt.h
382
u32 busy_jiffies; /* timeout scaling based on RC QP count */
sys/ofed/include/rdma/rdma_vt.h
388
u32 mmap_offset;
sys/ofed/include/rdma/rdma_vt.h
393
u32 n_cqs_allocated; /* number of CQs allocated for device */
sys/ofed/include/rdma/rdma_vt.h
397
u32 n_mcast_grps_allocated; /* number of mcast groups allocated */
sys/ofed/include/rdma/rdma_vt.h
468
u32 qpn) __must_hold(RCU)
sys/ofed/include/rdma/rdma_vt.h
475
u32 n = hash_32(qpn, rdi->qp_dev->qp_table_bits);
sys/ofed/include/rdma/rdma_vt.h
492
int rvt_fast_reg_mr(struct rvt_qp *qp, struct ib_mr *ibmr, u32 key,
sys/ofed/include/rdma/rdma_vt.h
494
int rvt_invalidate_rkey(struct rvt_qp *qp, u32 rkey);
sys/ofed/include/rdma/rdma_vt.h
496
u32 len, u64 vaddr, u32 rkey, int acc);
sys/ofed/include/rdma/rdma_vt.h
78
u32 port_cap_flags;
sys/ofed/include/rdma/rdma_vt.h
79
u32 pma_sample_start;
sys/ofed/include/rdma/rdma_vt.h
80
u32 pma_sample_interval;
sys/ofed/include/rdma/rdmavt_cq.h
69
u32 head; /* index of next entry to fill */
sys/ofed/include/rdma/rdmavt_cq.h
70
u32 tail; /* index of next ib_poll_cq() entry */
sys/ofed/include/rdma/rdmavt_mr.h
108
u32 sge_length; /* length of the SGE */
sys/ofed/include/rdma/rdmavt_mr.h
109
u32 length; /* remaining length of the segment */
sys/ofed/include/rdma/rdmavt_mr.h
117
u32 total_len;
sys/ofed/include/rdma/rdmavt_mr.h
78
u32 lkey;
sys/ofed/include/rdma/rdmavt_mr.h
79
u32 offset; /* offset (bytes) to start of region */
sys/ofed/include/rdma/rdmavt_mr.h
81
u32 max_segs; /* number of rvt_segs in all the arrays */
sys/ofed/include/rdma/rdmavt_mr.h
82
u32 mapsz; /* size of the map array */
sys/ofed/include/rdma/rdmavt_mr.h
95
u32 next; /* next unused index (speeds search) */
sys/ofed/include/rdma/rdmavt_mr.h
96
u32 gen; /* generation count */
sys/ofed/include/rdma/rdmavt_mr.h
97
u32 max; /* size of the table */
sys/ofed/include/rdma/rdmavt_qp.h
167
u32 psn; /* first packet sequence number */
sys/ofed/include/rdma/rdmavt_qp.h
168
u32 lpsn; /* last packet sequence number */
sys/ofed/include/rdma/rdmavt_qp.h
169
u32 ssn; /* send sequence number */
sys/ofed/include/rdma/rdmavt_qp.h
170
u32 length; /* total length of data in sg_list */
sys/ofed/include/rdma/rdmavt_qp.h
194
u32 head; /* new work requests posted to the head */
sys/ofed/include/rdma/rdmavt_qp.h
195
u32 tail; /* receives pull requests from here. */
sys/ofed/include/rdma/rdmavt_qp.h
201
u32 size; /* size of RWQE array */
sys/ofed/include/rdma/rdmavt_qp.h
228
u32 psn;
sys/ofed/include/rdma/rdmavt_qp.h
229
u32 lpsn;
sys/ofed/include/rdma/rdmavt_qp.h
258
u32 qpt_support;
sys/ofed/include/rdma/rdmavt_qp.h
259
u32 flags;
sys/ofed/include/rdma/rdmavt_qp.h
281
u32 remote_qpn;
sys/ofed/include/rdma/rdmavt_qp.h
282
u32 qkey; /* QKEY for this QP (for UD or RD) */
sys/ofed/include/rdma/rdmavt_qp.h
283
u32 s_size; /* send work queue size */
sys/ofed/include/rdma/rdmavt_qp.h
284
u32 s_ahgpsn; /* set to the psn in the copy of the header */
sys/ofed/include/rdma/rdmavt_qp.h
314
u32 r_psn; /* expected rcv packet sequence number */
sys/ofed/include/rdma/rdmavt_qp.h
317
u32 r_ack_psn; /* PSN for next ACK or atomic ACK */
sys/ofed/include/rdma/rdmavt_qp.h
318
u32 r_len; /* total length of r_sge */
sys/ofed/include/rdma/rdmavt_qp.h
319
u32 r_rcv_len; /* receive data len processed */
sys/ofed/include/rdma/rdmavt_qp.h
320
u32 r_msn; /* message sequence number */
sys/ofed/include/rdma/rdmavt_qp.h
333
u32 s_head; /* new entries added here */
sys/ofed/include/rdma/rdmavt_qp.h
334
u32 s_next_psn; /* PSN for next request */
sys/ofed/include/rdma/rdmavt_qp.h
335
u32 s_avail; /* number of entries avail */
sys/ofed/include/rdma/rdmavt_qp.h
336
u32 s_ssn; /* SSN of tail entry */
sys/ofed/include/rdma/rdmavt_qp.h
340
u32 s_flags;
sys/ofed/include/rdma/rdmavt_qp.h
345
u32 s_cur_size; /* size of send packet in bytes */
sys/ofed/include/rdma/rdmavt_qp.h
346
u32 s_len; /* total length of s_sge */
sys/ofed/include/rdma/rdmavt_qp.h
347
u32 s_rdma_read_len; /* total length of s_rdma_read_sge */
sys/ofed/include/rdma/rdmavt_qp.h
348
u32 s_last_psn; /* last response PSN processed */
sys/ofed/include/rdma/rdmavt_qp.h
349
u32 s_sending_psn; /* lowest PSN that is being sent */
sys/ofed/include/rdma/rdmavt_qp.h
350
u32 s_sending_hpsn; /* highest PSN that is being sent */
sys/ofed/include/rdma/rdmavt_qp.h
351
u32 s_psn; /* current packet sequence number */
sys/ofed/include/rdma/rdmavt_qp.h
352
u32 s_ack_rdma_psn; /* PSN for sending RDMA read responses */
sys/ofed/include/rdma/rdmavt_qp.h
353
u32 s_ack_psn; /* PSN for acking sends and RDMA writes */
sys/ofed/include/rdma/rdmavt_qp.h
354
u32 s_tail; /* next entry to process */
sys/ofed/include/rdma/rdmavt_qp.h
355
u32 s_cur; /* current work queue entry */
sys/ofed/include/rdma/rdmavt_qp.h
356
u32 s_acked; /* last un-ACK'ed entry */
sys/ofed/include/rdma/rdmavt_qp.h
357
u32 s_last; /* last completed entry */
sys/ofed/include/rdma/rdmavt_qp.h
358
u32 s_lsn; /* limit sequence number (credit) */
sys/ofed/include/rdma/rdmavt_qp.h
388
u32 limit;
sys/ofed/include/rdma/rdmavt_qp.h
409
u32 last; /* last QP number allocated */
sys/ofed/include/rdma/rdmavt_qp.h
410
u32 nmaps; /* size of the map table */
sys/ofed/include/rdma/rdmavt_qp.h
418
u32 qp_table_size;
sys/ofed/include/rdma/rdmavt_qp.h
419
u32 qp_table_bits;
sys/ofed/include/rdma/signature.h
118
u32 expected;
sys/ofed/include/rdma/signature.h
119
u32 actual;
sys/ofed/include/rdma/signature.h
121
u32 key;
sys/ofed/include/rdma/signature.h
60
u32 ref_tag;
sys/ofed/include/rdma/uverbs_ioctl.h
185
static inline __attribute_const__ u32 uapi_key_obj(u32 id)
sys/ofed/include/rdma/uverbs_ioctl.h
200
static inline __attribute_const__ bool uapi_key_is_object(u32 key)
sys/ofed/include/rdma/uverbs_ioctl.h
205
static inline __attribute_const__ u32 uapi_key_ioctl_method(u32 id)
sys/ofed/include/rdma/uverbs_ioctl.h
221
static inline __attribute_const__ u32 uapi_key_write_method(u32 id)
sys/ofed/include/rdma/uverbs_ioctl.h
228
static inline __attribute_const__ u32 uapi_key_write_ex_method(u32 id)
sys/ofed/include/rdma/uverbs_ioctl.h
235
static inline __attribute_const__ u32
sys/ofed/include/rdma/uverbs_ioctl.h
236
uapi_key_attr_to_ioctl_method(u32 attr_key)
sys/ofed/include/rdma/uverbs_ioctl.h
242
static inline __attribute_const__ bool uapi_key_is_ioctl_method(u32 key)
sys/ofed/include/rdma/uverbs_ioctl.h
250
static inline __attribute_const__ bool uapi_key_is_write_method(u32 key)
sys/ofed/include/rdma/uverbs_ioctl.h
255
static inline __attribute_const__ bool uapi_key_is_write_ex_method(u32 key)
sys/ofed/include/rdma/uverbs_ioctl.h
261
static inline __attribute_const__ u32 uapi_key_attrs_start(u32 ioctl_method_key)
sys/ofed/include/rdma/uverbs_ioctl.h
267
static inline __attribute_const__ u32 uapi_key_attr(u32 id)
sys/ofed/include/rdma/uverbs_ioctl.h
291
static inline __attribute_const__ bool uapi_key_is_attr(u32 key)
sys/ofed/include/rdma/uverbs_ioctl.h
305
static inline __attribute_const__ u32 uapi_bkey_attr(u32 attr_key)
sys/ofed/include/rdma/uverbs_ioctl.h
310
static inline __attribute_const__ u32 uapi_bkey_to_key_attr(u32 attr_bkey)
sys/ofed/include/rdma/uverbs_ioctl.h
329
u32 flags;
sys/ofed/include/rdma/uverbs_ioctl.h
593
UVERBS_ATTR_SIZE(sizeof(u32) + BUILD_BUG_ON_ZERO( \
sys/ofed/include/rdma/uverbs_ioctl.h
871
int uverbs_get_flags32(u32 *to, const struct uverbs_attr_bundle *attrs_bundle,
sys/ofed/include/rdma/uverbs_ioctl.h
902
uverbs_get_flags32(u32 *to, const struct uverbs_attr_bundle *attrs_bundle,
sys/ofed/include/rdma/uverbs_std_types.h
184
u32 id;
sys/ofed/include/rdma/uverbs_std_types.h
187
static inline u32 uobj_get_object_id(struct ib_uobject *uobj)
sys/ofed/include/rdma/uverbs_std_types.h
46
#define _uobj_check_id(_id) ({ CTASSERT(sizeof(_id) == sizeof(u32)); (_id); })
sys/ofed/include/rdma/uverbs_std_types.h
78
int __uobj_perform_destroy(const struct uverbs_api_object *obj, u32 id,
sys/ofed/include/rdma/uverbs_std_types.h
85
u32 id, struct uverbs_attr_bundle *attrs);
sys/sys/stats.h
1004
tmp.int32.u32 = voival;
sys/sys/stats.h
1018
tmp.int32.u32 = voival;
sys/sys/stats.h
139
uint32_t u32;
sys/sys/stats.h
180
uint32_t u32;
sys/sys/stats.h
919
*ret = vsd->int32.u32;
tests/sys/sys/qmath_test.c
172
u32q_t u32;
tests/sys/sys/qmath_test.c
174
Q_INI(&u32, QTEST_IV, 0, QTEST_RPSHFT);
tests/sys/sys/qmath_test.c
175
Q_TOSTR(u32, -1, 10, buf, sizeof(buf));
tests/sys/sys/qmath_test.c
177
ATF_CHECK_EQ(sizeof(u32) << 3, Q_NTBITS(u32));
tests/sys/sys/qmath_test.c
178
ATF_CHECK_EQ(QTEST_RPSHFT, Q_NFBITS(u32));
tests/sys/sys/qmath_test.c
179
ATF_CHECK_EQ(QTEST_INTBITS(u32), Q_NIBITS(u32));
tests/sys/sys/qmath_test.c
180
ATF_CHECK_EQ(QTEST_QITRUNC(u32, UINT32_MAX), Q_IMAXVAL(u32));
tests/sys/sys/qmath_test.c
181
ATF_CHECK_EQ(0, Q_IMINVAL(u32));
tools/tools/nvmf/nvmfd/controller.c
107
if (!update_cc(c, le32toh(pset->value.u32.low)))
tools/tools/nvmf/nvmfd/controller.c
77
rsp.value.u32.low = htole32(c->vs);
tools/tools/nvmf/nvmfd/controller.c
82
rsp.value.u32.low = htole32(c->cc);
tools/tools/nvmf/nvmfd/controller.c
87
rsp.value.u32.low = htole32(c->csts);
usr.bin/gzip/unxz.c
179
uint32_t u32[IO_BUFFER_SIZE / sizeof(uint32_t)];
usr.bin/gzip/unxz.c
312
if (buf.u32[i] != 0)
usr.bin/gzip/unxz.c
323
} while (i >= 0 && buf.u32[i] == 0);
usr.bin/sdiotool/linux_sdio_compat.c
70
u32 sdio_readl(struct sdio_func *func, unsigned int addr, int *err_ret) {
usr.bin/sdiotool/linux_sdio_compat.c
97
void sdio_writel(struct sdio_func *func, u32 b,
usr.bin/sdiotool/linux_sdio_compat.h
49
u32 sdio_readl(struct sdio_func *func, unsigned int addr, int *err_ret);
usr.bin/sdiotool/linux_sdio_compat.h
57
void sdio_writel(struct sdio_func *func, u32 b,
usr.bin/sdiotool/sdiotool.c
166
u32 sbwad; /* Save backplane window address */
usr.bin/sdiotool/sdiotool.c
175
static int brcmf_sdiod_request_data(struct brcmf_sdio_dev *sdiodev, u8 fn, u32 addr,
usr.bin/sdiotool/sdiotool.c
177
static int brcmf_sdiod_set_sbaddr_window(struct brcmf_sdio_dev *sdiodev, u32 address);
usr.bin/sdiotool/sdiotool.c
178
static int brcmf_sdiod_addrprep(struct brcmf_sdio_dev *sdiodev, uint width, u32 *addr);
usr.bin/sdiotool/sdiotool.c
179
u32 brcmf_sdiod_regrl(struct brcmf_sdio_dev *sdiodev, u32 addr, int *ret);
usr.bin/sdiotool/sdiotool.c
238
static int brcmf_sdiod_request_data(struct brcmf_sdio_dev *sdiodev, u8 fn, u32 addr, u8 regsz, void *data, bool write)
usr.bin/sdiotool/sdiotool.c
272
case sizeof(u32):
usr.bin/sdiotool/sdiotool.c
274
sdio_writel(func, *(u32 *)data, addr, &ret);
usr.bin/sdiotool/sdiotool.c
276
*(u32 *)data = sdio_readl(func, addr, &ret);
usr.bin/sdiotool/sdiotool.c
291
brcmf_sdiod_addrprep(struct brcmf_sdio_dev *sdiodev, uint width, u32 *addr)
usr.bin/sdiotool/sdiotool.c
312
static int brcmf_sdiod_regrw_helper(struct brcmf_sdio_dev *sdiodev, u32 addr, u8 regsz, void *data, bool write) {
usr.bin/sdiotool/sdiotool.c
361
brcmf_sdiod_set_sbaddr_window(struct brcmf_sdio_dev *sdiodev, u32 address)
usr.bin/sdiotool/sdiotool.c
387
u32 brcmf_sdiod_regrl(struct brcmf_sdio_dev *sdiodev, u32 addr, int *ret)
usr.bin/sdiotool/sdiotool.c
389
u32 data = 0;
usr.sbin/bhyve/pci_passthru.c
269
uint32_t u32;
usr.sbin/bhyve/pci_passthru.c
299
u32 = passthru_read_config(&sel, capptr,
usr.sbin/bhyve/pci_passthru.c
301
pci_set_cfgdata32(pi, capptr, u32);
usr.sbin/bhyve/pci_passthru.c
314
u32 = passthru_read_config(&sel, capptr,
usr.sbin/bhyve/pci_passthru.c
316
memcpy(msixcap_ptr, &u32, 4);
usr.sbin/bhyve/pci_passthru.c
317
pci_set_cfgdata32(pi, capptr, u32);
usr.sbin/ctld/nvmf_discovery.cc
297
rsp.value.u32.low = htole32(vs);
usr.sbin/ctld/nvmf_discovery.cc
302
rsp.value.u32.low = htole32(cc);
usr.sbin/ctld/nvmf_discovery.cc
307
rsp.value.u32.low = htole32(csts);
usr.sbin/ctld/nvmf_discovery.cc
327
if (!update_cc(le32toh(pset->value.u32.low)))
usr.sbin/ntp/ntpdc/nl.c
4
(int) offsetof(union req_data_u_tag, u32));
usr.sbin/ntp/ntpdc/nl.c
48
(int) offsetof(union resp_pkt_u_tag, u32));
