#include "opt_rss.h"
#include "opt_ratelimit.h"
#include <dev/mlx5/mlx5_en/en.h>
void
mlx5e_dim_build_cq_param(struct mlx5e_priv *priv,
struct mlx5e_cq_param *param)
{
struct net_dim_cq_moder prof;
void *cqc = param->cqc;
if (priv->params.rx_cq_moderation_mode < 2)
return;
switch (MLX5_GET(cqc, cqc, cq_period_mode)) {
case MLX5_CQ_PERIOD_MODE_START_FROM_CQE:
prof = net_dim_profile[NET_DIM_CQ_PERIOD_MODE_START_FROM_CQE]
[NET_DIM_DEF_PROFILE_CQE];
MLX5_SET(cqc, cqc, cq_period, prof.usec);
MLX5_SET(cqc, cqc, cq_max_count, prof.pkts);
break;
case MLX5_CQ_PERIOD_MODE_START_FROM_EQE:
prof = net_dim_profile[NET_DIM_CQ_PERIOD_MODE_START_FROM_EQE]
[NET_DIM_DEF_PROFILE_EQE];
MLX5_SET(cqc, cqc, cq_period, prof.usec);
MLX5_SET(cqc, cqc, cq_max_count, prof.pkts);
break;
default:
break;
}
}
void
mlx5e_dim_work(struct work_struct *work)
{
struct net_dim *dim = container_of(work, struct net_dim, work);
struct mlx5e_rq *rq = container_of(dim, struct mlx5e_rq, dim);
struct mlx5e_channel *c = container_of(rq, struct mlx5e_channel, rq);
struct net_dim_cq_moder cur_profile;
u8 profile_ix;
u8 mode;
mtx_lock(&rq->mtx);
profile_ix = dim->profile_ix;
mode = dim->mode;
dim->state = NET_DIM_START_MEASURE;
mtx_unlock(&rq->mtx);
if (mode == 255)
return;
cur_profile = net_dim_profile[mode][profile_ix];
if (c->priv->params.hw_lro_en &&
cur_profile.pkts > MLX5E_DIM_MAX_RX_CQ_MODERATION_PKTS_WITH_LRO) {
cur_profile.pkts = MLX5E_DIM_MAX_RX_CQ_MODERATION_PKTS_WITH_LRO;
}
mlx5_core_modify_cq_moderation(c->priv->mdev, &rq->cq.mcq,
cur_profile.usec, cur_profile.pkts);
}