sys/arch/atari/dev/zs.c

1166

(cs->cs_zc->zc_csr & ZSRR0_DCD) != 0)

sys/arch/atari/dev/zs.c

1321

zc->zc_csr = ZSM_RESET_ERR; /* reset error condition */

sys/arch/atari/dev/zs.c

313

(void)zc->zc_csr;

sys/arch/atari/dev/zs.c

314

(void)zc->zc_csr;

sys/arch/atari/dev/zs.c

455

if (((cs->cs_rr0 = cs->cs_zc->zc_csr) & ZSRR0_DCD) != 0)

sys/arch/atari/dev/zs.c

668

zc->zc_csr = ZSWR0_RESET_ERRORS;

sys/arch/atari/dev/zs.c

669

zc->zc_csr = ZSWR0_CLR_INTR;

sys/arch/atari/dev/zs.c

680

zc->zc_csr = ZSWR0_RESET_TXINT;

sys/arch/atari/dev/zs.c

681

zc->zc_csr = ZSWR0_CLR_INTR;

sys/arch/atari/dev/zs.c

686

zc->zc_csr = ZSWR0_CLR_INTR;

sys/arch/atari/dev/zs.c

695

rr0 = zc->zc_csr;

sys/arch/atari/dev/zs.c

696

zc->zc_csr = ZSWR0_RESET_STATUS;

sys/arch/atari/dev/zs.c

697

zc->zc_csr = ZSWR0_CLR_INTR;

sys/arch/atari/dev/zs.c

803

c = zc->zc_csr;

sys/arch/atari/dev/zsvar.h

176

#define ZS_READ(c, r) ((c)->zc_csr = (r), (c)->zc_csr)

sys/arch/atari/dev/zsvar.h

177

#define ZS_WRITE(c, r, v) ((c)->zc_csr = (r), (c)->zc_csr = (v))

sys/arch/atari/dev/zsvar.h

78

volatile uint8_t zc_csr; /* ctrl,status, and indirect access */

sys/arch/ews4800mips/sbd/zs_sbdio.c

147

cs->cs_reg_csr = &zc->zc_csr;

sys/arch/ews4800mips/sbd/zs_sbdio.c

243

cs->cs_reg_csr = &zc->zc_csr;

sys/arch/ews4800mips/sbd/zs_sbdio.c

62

volatile uint8_t zc_csr; /* ctrl, status, and indirect access */

sys/arch/mac68k/dev/zs.c

1033

rr0 = zc->zc_csr;

sys/arch/mac68k/dev/zs.c

112

volatile uint8_t zc_csr; /* ctrl,status, and indirect access */

sys/arch/mac68k/dev/zs.c

269

cs->cs_reg_csr = &zc->zc_csr;

sys/arch/mac68k/dev/zs.c

825

cs->cs_reg_csr = &zc->zc_csr;

sys/arch/mac68k/dev/zs.c

952

rr0 = zc->zc_csr;

sys/arch/mac68k/dev/zs.c

980

rr0 = zc->zc_csr;

sys/arch/mac68k/dev/zs_kgdb.c

168

cs.cs_reg_csr = &zc->zc_csr;

sys/arch/mac68k/dev/zs_kgdb.c

73

volatile u_char zc_csr; /* ctrl,status, and indirect access */

sys/arch/macppc/dev/zs.c

296

cs->cs_reg_csr = &zc->zc_csr;

sys/arch/macppc/dev/zs.c

886

rr0 = in8(&zc->zc_csr);

sys/arch/macppc/dev/zs.c

914

rr0 = in8(&zc->zc_csr);

sys/arch/macppc/dev/zs.c

976

rr0 = in8(&zc->zc_csr);

sys/arch/macppc/dev/zs_kgdb.c

166

cs.cs_reg_csr = &zc->zc_csr;

sys/arch/macppc/include/z8530var.h

183

volatile uint8_t zc_csr; /* ctrl,status, and indirect access */

sys/arch/mipsco/obio/zs.c

103

volatile uint8_t zc_csr; /* ctrl,status, and indirect access */

sys/arch/mipsco/obio/zs.c

118

#define ZS_REG_CSR OFFSET(struct zschan, zc_csr)

sys/arch/mipsco/obio/zs.c

589

rr0 = zc->zc_csr;

sys/arch/mipsco/obio/zs.c

613

rr0 = zc->zc_csr;

sys/arch/mvme68k/dev/zs.c

158

cs->cs_reg_csr = zc->zc_csr;

sys/arch/mvme68k/dev/zs.c

512

cs->cs_reg_csr = zc->zc_csr;

sys/arch/mvme68k/dev/zs_pcc.c

123

zs.zs_chan_b.zc_csr = (volatile uint8_t *)bush;

sys/arch/mvme68k/dev/zs_pcc.c

125

zs.zs_chan_a.zc_csr = (volatile uint8_t *)bush + 2;

sys/arch/mvme68k/dev/zs_pcc.c

196

zs.zs_chan_b.zc_csr = (volatile uint8_t *)bush;

sys/arch/mvme68k/dev/zs_pcc.c

198

zs.zs_chan_a.zc_csr = (volatile uint8_t *)bush + 2;

sys/arch/mvme68k/dev/zs_pcctwo.c

124

zs.zs_chan_b.zc_csr = (volatile uint8_t *)bush + 1;

sys/arch/mvme68k/dev/zs_pcctwo.c

126

zs.zs_chan_a.zc_csr = (volatile uint8_t *)bush + 5;

sys/arch/mvme68k/dev/zs_pcctwo.c

179

zs.zs_chan_b.zc_csr = (volatile uint8_t *)bush + 1;

sys/arch/mvme68k/dev/zs_pcctwo.c

181

zs.zs_chan_a.zc_csr = (volatile uint8_t *)bush + 5;

sys/arch/mvme68k/dev/zsvar.h

68

volatile u_char *zc_csr; /* ctrl,status, and indirect access */

sys/arch/news68k/dev/zs.c

220

cs->cs_reg_csr = &zc->zc_csr;

sys/arch/news68k/dev/zs.c

572

cs->cs_reg_csr = &zc_cons->zc_csr;

sys/arch/news68k/dev/zs.c

99

volatile uint8_t zc_csr; /* ctrl,status, and indirect access */

sys/arch/newsmips/apbus/zs_ap.c

134

volatile uint8_t zc_csr; /* ctrl,status, and indirect access */

sys/arch/newsmips/apbus/zs_ap.c

355

cs->cs_reg_csr = &zc->zc_csr;

sys/arch/newsmips/apbus/zs_ap.c

474

rr0 = zc->zc_csr;

sys/arch/newsmips/apbus/zs_ap.c

502

rr0 = zc->zc_csr;

sys/arch/newsmips/apbus/zs_ap.c

555

cs->cs_reg_csr = &zc_ap_cons->zc_csr;

sys/arch/newsmips/dev/zs_hb.c

240

cs->cs_reg_csr = &zc->zc_csr;

sys/arch/newsmips/dev/zs_hb.c

334

rr0 = zc->zc_csr;

sys/arch/newsmips/dev/zs_hb.c

361

rr0 = zc->zc_csr;

sys/arch/newsmips/dev/zs_hb.c

87

volatile uint8_t zc_csr; /* ctrl,status, and indirect access */

sys/arch/next68k/dev/zs.c

102

volatile uint8_t zc_csr; /* ctrl,status, and indirect access */

sys/arch/next68k/dev/zs.c

227

cs->cs_reg_csr = &zc->zc_csr;

sys/arch/next68k/dev/zs.c

510

rr0 = zc->zc_csr;

sys/arch/next68k/dev/zs.c

539

rr0 = zc->zc_csr;

sys/arch/next68k/dev/zs.c

566

rr0 = zc->zc_csr;

sys/arch/next68k/dev/zs.c

619

cs->cs_reg_csr = &zc->zc_csr;

sys/arch/next68k/dev/zs_kgdb.c

158

cs.cs_reg_csr = &zc->zc_csr;

sys/arch/next68k/dev/zs_kgdb.c

71

volatile uint8_t zc_csr; /* ctrl,status, and indirect access */

sys/arch/sgimips/dev/zs.c

700

rr0 = zc->zc_csr;

sys/arch/sgimips/dev/zs.c

723

rr0 = zc->zc_csr;

sys/arch/sgimips/dev/zs.c

98

volatile uint8_t zc_csr; /* ctrl,status, and indirect access */

sys/arch/sgimips/stand/common/iris_zs.c

197

rr0 = zc->zc_csr;

sys/arch/sgimips/stand/common/iris_zs.c

223

rr0 = zc->zc_csr;

sys/arch/sgimips/stand/common/iris_zs.c

250

rr0 = zc->zc_csr;

sys/arch/sgimips/stand/common/iris_zs.c

94

zc->zc_csr = val;

sys/arch/sgimips/stand/common/iris_zs.h

35

volatile uint8_t zc_csr; /* ctrl,status, and indirect access */

sys/arch/sparc/dev/zs.c

478

cs->cs_reg_csr = &zc->zc_csr;

sys/arch/sparc/dev/zs.c

807

rr0 = zc->zc_csr;

sys/arch/sparc/dev/zs.c

840

rr0 = zc->zc_csr;

sys/arch/sparc/dev/zs.c

872

rr0 = zc->zc_csr;

sys/arch/sparc/dev/zs.c

95

volatile uint8_t zc_csr; /* ctrl,status, and indirect access */

sys/arch/sparc/dev/zs_kgdb.c

166

cs.cs_reg_csr = &zc->zc_csr;

sys/arch/sparc/dev/zs_kgdb.c

69

volatile u_char zc_csr; /* ctrl,status, and indirect access */

sys/arch/sparc64/dev/zs.c

104

volatile uint8_t zc_csr; /* ctrl,status, and indirect access */

sys/arch/sparc64/dev/zs.c

383

cs->cs_reg_csr = &zc->zc_csr;

sys/arch/sparc64/dev/zs.c

721

rr0 = zc->zc_csr;

sys/arch/sparc64/dev/zs.c

752

rr0 = zc->zc_csr;

sys/arch/sparc64/dev/zs.c

780

rr0 = zc->zc_csr;

sys/arch/sparc64/dev/zsvar.h

180

#define ZS_READ(c, r) ((c)->zc_csr = (r), (c)->zc_csr)

sys/arch/sparc64/dev/zsvar.h

181

#define ZS_WRITE(c, r, v) ((c)->zc_csr = (r), (c)->zc_csr = (v))

sys/arch/sparc64/dev/zsvar.h

48

volatile uint8_t zc_csr; /* ctrl,status, and indirect access */

sys/arch/sun2/dev/zs.c

208

cs->cs_reg_csr = &zc->zc_csr;

sys/arch/sun2/dev/zs.c

560

rr0 = zc->zc_csr;

sys/arch/sun2/dev/zs.c

590

rr0 = zc->zc_csr;

sys/arch/sun2/dev/zs.c

618

rr0 = zc->zc_csr;

sys/arch/sun2/dev/zs_kgdb.c

156

cs.cs_reg_csr = &zc->zc_csr;

sys/arch/sun2/dev/zsreg.h

39

volatile u_char zc_csr; /* ctrl,status, and indirect access */

sys/arch/sun3/dev/zs.c

109

volatile uint8_t zc_csr; /* ctrl,status, and indirect access */

sys/arch/sun3/dev/zs.c

289

cs->cs_reg_csr = &zc->zc_csr;

sys/arch/sun3/dev/zs.c

562

rr0 = zc->zc_csr;

sys/arch/sun3/dev/zs.c

582

rr0 = zc->zc_csr;

sys/arch/sun3/dev/zs.c

609

rr0 = zc->zc_csr;

sys/arch/sun3/dev/zs_kgdb.c

159

cs.cs_reg_csr = &zc->zc_csr;

sys/arch/sun3/dev/zs_kgdb.c

70

volatile u_char zc_csr; /* ctrl,status, and indirect access */

sys/arch/x68k/dev/zs.c

216

cs->cs_reg_csr = &zc->zc_csr;

sys/arch/x68k/dev/zs.c

581

zscn_cs.cs_reg_csr = &cnchan->zc_csr;

sys/arch/x68k/include/z8530var.h

125

volatile uint8_t zc_csr; /* ctrl,status, and indirect access */

sys/arch/x68k/x68k/iodevice.h

260

unsigned char zc_csr; /* control and status, and indirect access */

sys/dev/sbus/zx.c

1018

while ((bus_space_read_4(sc->sc_bt, sc->sc_bhzc, zc_csr) &

sys/dev/sbus/zx.c

841

while ((bus_space_read_4(sc->sc_bt, sc->sc_bhzc, zc_csr) &

sys/dev/sbus/zx.c

871

while ((bus_space_read_4(sc->sc_bt, sc->sc_bhzc, zc_csr) &

sys/dev/tc/zs_ioasic.c

117

volatile u_int zc_csr; /* ctrl,status, and indirect access */

sys/dev/tc/zs_ioasic.c

123

volatile uint16_t zc_csr; /* ctrl,status, and indirect access */

sys/dev/tc/zs_ioasic.c

254

cs->cs_reg_csr = (volatile void *)&zc->zc_csr;

sys/dev/tc/zs_ioasic.c

549

zc->zc_csr = reg << 8;

sys/dev/tc/zs_ioasic.c

552

val = (zc->zc_csr >> 8) & 0xff;

sys/dev/tc/zs_ioasic.c

563

zc->zc_csr = reg << 8;

sys/dev/tc/zs_ioasic.c

566

zc->zc_csr = val << 8;

sys/dev/tc/zs_ioasic.c

577

val = (zc->zc_csr >> 8) & 0xff;

sys/dev/tc/zs_ioasic.c

588

zc->zc_csr = val << 8;

sys/dev/tc/zs_ioasic.c

731

cs->cs_reg_csr = (volatile void *)&zc->zc_csr;