arch/alpha/include/asm/io.h

153

REMAP1(u64, readq, const volatile)

arch/alpha/include/asm/io.h

244

extern u64 readq(const volatile void __iomem *addr);

arch/alpha/include/asm/io.h

252

#define readq readq

arch/alpha/include/asm/io.h

497

return IO_CONCAT(__IO_PREFIX,readq)(addr);

arch/alpha/include/asm/io_trivial.h

122

IO_CONCAT(__IO_PREFIX,readq)(const volatile void __iomem *a)

arch/alpha/kernel/io.c

140

return IO_CONCAT(__IO_PREFIX,readq)(addr);

arch/alpha/kernel/io.c

235

EXPORT_SYMBOL(readq);

arch/loongarch/include/asm/loongson.h

41

#define xconf_readq(addr) readq(addr)

arch/loongarch/pci/pci.c

120

regbase = ioremap(readq(base + PCI_BASE_ADDRESS_0) & ~0xffull, SZ_64K);

arch/mips/include/asm/io.h

509

#define readq readq

arch/parisc/lib/iomap.c

185

return readq(addr);

arch/powerpc/include/asm/io.h

687

#define readq readq

arch/powerpc/include/asm/io.h

697

#define readq_relaxed(addr) readq(addr)

arch/sparc/include/asm/io_64.h

143

#define readq readq

arch/sparc/include/asm/io_64.h

144

#define readq_relaxed readq

arch/x86/events/intel/uncore.c

194

return readq(box->io_addr + event->hw.event_base);

arch/x86/include/asm/io.h

107

#define readq readq

arch/x86/include/asm/io.h

95

build_mmio_read(readq, "q", u64, "=r", :"memory")

arch/x86/include/asm/numachip/numachip_csr.h

80

return readq(numachip2_lcsr_address(offset));

arch/x86/include/asm/uv/uv_hub.h

576

return readq(uv_global_mmr32_address(pnode, offset));

arch/x86/include/asm/uv/uv_hub.h

596

return readq(uv_global_mmr64_address(pnode, offset));

arch/x86/include/asm/uv/uv_hub.h

620

return readq(uv_local_mmr_address(offset));

arch/x86/kernel/cpu/resctrl/intel_aet.c

374

evtcount = readq(e->pfg->regions[i].addr + idx * sizeof(u64));

drivers/accel/habanalabs/common/device.c

103

*val = readq(acc_addr);

drivers/accel/habanalabs/gaudi/gaudi.c

6047

return readq(hdev->pcie_bar[HBM_BAR_ID] +

drivers/accel/habanalabs/gaudi2/gaudi2.c

11890

val = readq(hdev->pcie_bar[DRAM_BAR_ID] + (addr - gaudi2->dram_bar_cur_addr));

drivers/accel/habanalabs/goya/goya.c

4208

return readq(hdev->pcie_bar[DDR_BAR_ID] +

drivers/accel/ivpu/ivpu_hw_reg_io.h

100

u64 val = readq(base + reg);

drivers/accel/qaic/qaic_timesync.c

100

return readq(addr);

drivers/accel/qaic/qaic_timesync.c

97

#ifdef readq

drivers/acpi/osl.c

736

*(u64 *) value = readq(virt_addr);

drivers/ata/ahci.c

2632

cap = readq(hpriv->mmio + AHCI_REMAP_CAP);

drivers/bluetooth/hci_vhci.c

38

struct sk_buff_head readq;

drivers/bluetooth/hci_vhci.c

477

skb_queue_head(&data->readq, skb);

drivers/bluetooth/hci_vhci.c

597

skb = skb_dequeue(&data->readq);

drivers/bluetooth/hci_vhci.c

60

skb_queue_purge(&data->readq);

drivers/bluetooth/hci_vhci.c

601

skb_queue_head(&data->readq, skb);

drivers/bluetooth/hci_vhci.c

613

!skb_queue_empty(&data->readq));

drivers/bluetooth/hci_vhci.c

635

if (!skb_queue_empty(&data->readq))

drivers/bluetooth/hci_vhci.c

657

skb_queue_head_init(&data->readq);

drivers/bluetooth/hci_vhci.c

69

skb_queue_purge(&data->readq);

drivers/bluetooth/hci_vhci.c

704

skb_queue_purge(&data->readq);

drivers/bluetooth/hci_vhci.c

80

skb_queue_tail(&data->readq, skb);

drivers/char/agp/parisc-agp.c

263

io_tlb_ps = readq(info->ioc_regs+IOC_TCNFG);

drivers/char/agp/parisc-agp.c

279

iova_base = readq(info->ioc_regs+IOC_IBASE) & ~0x1;

drivers/char/agp/parisc-agp.c

285

io_pdir = phys_to_virt(readq(info->ioc_regs+IOC_PDIR_BASE));

drivers/char/agp/parisc-agp.c

97

readq(info->ioc_regs+IOC_PCOM); /* flush */

drivers/char/hpet.c

187

v = (readq(&timer->hpet_config) & Tn_INT_ROUTE_CAP_MASK) >>

drivers/char/hpet.c

407

writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK),

drivers/char/hpet.c

416

&& readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {

drivers/char/hpet.c

419

v = readq(&timer->hpet_config);

drivers/char/hpet.c

501

v = readq(&timer->hpet_config);

drivers/char/hpet.c

584

v = readq(&timer->hpet_config);

drivers/char/hpet.c

59

#define read_counter(MC) readq(MC)

drivers/char/hpet.c

600

readq(&timer->hpet_config) & Tn_PER_INT_CAP_MASK;

drivers/char/hpet.c

606

v = readq(&timer->hpet_config);

drivers/char/hpet.c

614

v = readq(&timer->hpet_config);

drivers/char/hpet.c

620

readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {

drivers/char/hpet.c

621

v = readq(&timer->hpet_config);

drivers/char/hpet.c

845

cap = readq(&hpet->hpet_cap);

drivers/char/hpet.c

885

mcfg = readq(&hpet->hpet_config);

drivers/char/hw_random/cavium-rng-vf.c

157

*((u64 *)dat) = readq(p->result);

drivers/char/hw_random/cavium-rng-vf.c

71

ret = CLOCK_BASE_RATE * ((readq(base + RST_BOOT_REG) >> 33) & 0x3F);

drivers/char/hw_random/cavium-rng-vf.c

93

status = readq(rng->pf_regbase + HEALTH_STATUS_REG);

drivers/char/hw_random/cn10k-rng.c

110

*value = readq(rng->reg_base + RNM_PF_TRNG_DAT);

drivers/char/hw_random/cn10k-rng.c

113

status = readq(rng->reg_base + RNM_PF_TRNG_RES);

drivers/char/hw_random/cn10k-rng.c

119

*value = readq(rng->reg_base + RNM_PF_RANDOM);

drivers/char/hw_random/cn10k-rng.c

125

upper = readq(rng->reg_base + RNM_PF_RANDOM);

drivers/char/hw_random/cn10k-rng.c

126

lower = readq(rng->reg_base + RNM_PF_RANDOM);

drivers/char/hw_random/cn10k-rng.c

128

upper = readq(rng->reg_base + RNM_PF_RANDOM);

drivers/char/hw_random/cn10k-rng.c

130

lower = readq(rng->reg_base + RNM_PF_RANDOM);

drivers/char/hw_random/cn10k-rng.c

87

status = readq(rng->reg_base + RNM_PF_EBG_HEALTH);

drivers/char/ipmi/ipmi_si_mem_io.c

101

#ifdef readq

drivers/char/ipmi/ipmi_si_mem_io.c

44

#ifdef readq

drivers/char/ipmi/ipmi_si_mem_io.c

47

return (readq((io->addr)+(offset * io->regspacing)) >> io->regshift)

drivers/clk/clk-eyeq.c

241

val = readq(base + pll->reg64);

drivers/clk/clk-eyeq.c

804

val = readq(base + pll->reg64);

drivers/clk/clk-loongson2.c

287

val = readq(clk->reg);

drivers/clk/clk-loongson2.c

305

val = readq(clk->reg);

drivers/cpufreq/tegra194-cpufreq.c

160

val = readq(actmon_reg);

drivers/cpufreq/tegra194-cpufreq.c

169

val = readq(actmon_reg);

drivers/crypto/cavium/cpt/cpt_common.h

151

return readq(hw_addr + offset);

drivers/crypto/cavium/nitrox/nitrox_dev.h

277

return readq(ndev->bar_addr + offset);

drivers/crypto/cavium/nitrox/nitrox_isr.c

34

slc_cnts.value = readq(cmdq->compl_cnt_csr_addr);

drivers/crypto/cavium/nitrox/nitrox_reqmgr.c

593

slc_cnts.value = readq(cmdq->compl_cnt_csr_addr);

drivers/crypto/hisilicon/qm.c

1715

val = readq(qm->io_base + QM_IFC_INT_SOURCE_P);

drivers/crypto/hisilicon/qm.c

1781

val = readq(qm->io_base + QM_IFC_READY_STATUS);

drivers/crypto/hisilicon/qm.c

1817

val = readq(qm->io_base + QM_IFC_READY_STATUS);

drivers/crypto/hisilicon/qm.c

2036

return readq(qm->io_base + QM_PF2VF_VF_R);

drivers/crypto/hisilicon/qm.c

5177

return readq(qm->io_base + QM_FUNC_AXI_ERR_ST0);

drivers/crypto/hisilicon/qm.c

5452

val = readq(qm->io_base + QM_IFC_INT_SOURCE_P);

drivers/crypto/marvell/octeontx/otx_cptpf_main.c

46

pf_cnsts.u = readq(cpt->reg_base + OTX_CPT_PF_CONSTANTS);

drivers/crypto/marvell/octeontx/otx_cptpf_main.c

55

bist_sts.u = readq(cpt->reg_base + OTX_CPT_PF_BIST_STATUS);

drivers/crypto/marvell/octeontx/otx_cptpf_main.c

63

bist_sts.u = readq(cpt->reg_base + OTX_CPT_PF_EXE_BIST_STATUS);

drivers/crypto/marvell/octeontx/otx_cptpf_mbox.c

117

pf_qx_ctl.u = readq(cpt->reg_base + OTX_CPT_PF_QX_CTL(vf));

drivers/crypto/marvell/octeontx/otx_cptpf_mbox.c

130

pf_qx_ctl.u = readq(cpt->reg_base + OTX_CPT_PF_QX_CTL(vf));

drivers/crypto/marvell/octeontx/otx_cptpf_mbox.c

160

pf_qx_ctl.u = readq(cpt->reg_base + OTX_CPT_PF_QX_CTL(q));

drivers/crypto/marvell/octeontx/otx_cptpf_mbox.c

187

mbx.msg = readq(cpt->reg_base + OTX_CPT_PF_VFX_MBOXX(vf, 0));

drivers/crypto/marvell/octeontx/otx_cptpf_mbox.c

188

mbx.data = readq(cpt->reg_base + OTX_CPT_PF_VFX_MBOXX(vf, 1));

drivers/crypto/marvell/octeontx/otx_cptpf_mbox.c

245

intr = readq(cpt->reg_base + OTX_CPT_PF_MBOX_INTX(0));

drivers/crypto/marvell/octeontx/otx_cptpf_ucode.c

1563

reg = readq(cpt->reg_base + OTX_CPT_PF_EXEC_BUSY);

drivers/crypto/marvell/octeontx/otx_cptpf_ucode.c

1566

reg = readq(cpt->reg_base + OTX_CPT_PF_EXEC_BUSY);

drivers/crypto/marvell/octeontx/otx_cptpf_ucode.c

219

reg = readq(cpt->reg_base + OTX_CPT_PF_GX_EN(eng_grp->idx));

drivers/crypto/marvell/octeontx/otx_cptpf_ucode.c

235

reg = readq(cpt->reg_base + OTX_CPT_PF_EXEC_BUSY);

drivers/crypto/marvell/octeontx/otx_cptpf_ucode.c

244

reg = readq(cpt->reg_base + OTX_CPT_PF_EXE_CTL);

drivers/crypto/marvell/octeontx/otx_cptpf_ucode.c

266

reg = readq(cpt->reg_base + OTX_CPT_PF_GX_EN(eng_grp->idx));

drivers/crypto/marvell/octeontx/otx_cptpf_ucode.c

276

reg = readq(cpt->reg_base + OTX_CPT_PF_EXE_CTL);

drivers/crypto/marvell/octeontx/otx_cptvf_main.c

350

vqx_ctl.u = readq(cptvf->reg_base + OTX_CPT_VQX_CTL(0));

drivers/crypto/marvell/octeontx/otx_cptvf_main.c

359

vqx_dbell.u = readq(cptvf->reg_base + OTX_CPT_VQX_DOORBELL(0));

drivers/crypto/marvell/octeontx/otx_cptvf_main.c

368

vqx_inprg.u = readq(cptvf->reg_base + OTX_CPT_VQX_INPROG(0));

drivers/crypto/marvell/octeontx/otx_cptvf_main.c

377

vqx_dwait.u = readq(cptvf->reg_base + OTX_CPT_VQX_DONE_WAIT(0));

drivers/crypto/marvell/octeontx/otx_cptvf_main.c

386

vqx_dwait.u = readq(cptvf->reg_base + OTX_CPT_VQX_DONE_WAIT(0));

drivers/crypto/marvell/octeontx/otx_cptvf_main.c

394

vqx_dwait.u = readq(cptvf->reg_base + OTX_CPT_VQX_DONE_WAIT(0));

drivers/crypto/marvell/octeontx/otx_cptvf_main.c

404

vqx_dwait.u = readq(cptvf->reg_base + OTX_CPT_VQX_DONE_WAIT(0));

drivers/crypto/marvell/octeontx/otx_cptvf_main.c

412

vqx_misc_ena.u = readq(cptvf->reg_base + OTX_CPT_VQX_MISC_ENA_W1S(0));

drivers/crypto/marvell/octeontx/otx_cptvf_main.c

422

vqx_misc_ena.u = readq(cptvf->reg_base + OTX_CPT_VQX_MISC_ENA_W1S(0));

drivers/crypto/marvell/octeontx/otx_cptvf_main.c

432

vqx_done_ena.u = readq(cptvf->reg_base + OTX_CPT_VQX_DONE_ENA_W1S(0));

drivers/crypto/marvell/octeontx/otx_cptvf_main.c

442

vqx_misc_int.u = readq(cptvf->reg_base + OTX_CPT_VQX_MISC_INT(0));

drivers/crypto/marvell/octeontx/otx_cptvf_main.c

452

vqx_misc_int.u = readq(cptvf->reg_base + OTX_CPT_VQX_MISC_INT(0));

drivers/crypto/marvell/octeontx/otx_cptvf_main.c

462

vqx_misc_int.u = readq(cptvf->reg_base + OTX_CPT_VQX_MISC_INT(0));

drivers/crypto/marvell/octeontx/otx_cptvf_main.c

472

vqx_misc_int.u = readq(cptvf->reg_base + OTX_CPT_VQX_MISC_INT(0));

drivers/crypto/marvell/octeontx/otx_cptvf_main.c

482

vqx_misc_int.u = readq(cptvf->reg_base + OTX_CPT_VQX_MISC_INT(0));

drivers/crypto/marvell/octeontx/otx_cptvf_main.c

490

return readq(cptvf->reg_base + OTX_CPT_VQX_MISC_INT(0));

drivers/crypto/marvell/octeontx/otx_cptvf_main.c

553

vqx_done.u = readq(cptvf->reg_base + OTX_CPT_VQX_DONE(0));

drivers/crypto/marvell/octeontx/otx_cptvf_main.c

562

vqx_dack_cnt.u = readq(cptvf->reg_base + OTX_CPT_VQX_DONE_ACK(0));

drivers/crypto/marvell/octeontx/otx_cptvf_mbox.c

92

mbx.msg = readq(cptvf->reg_base + OTX_CPT_VFX_PF_MBOXX(0, 0));

drivers/crypto/marvell/octeontx/otx_cptvf_mbox.c

93

mbx.data = readq(cptvf->reg_base + OTX_CPT_VFX_PF_MBOXX(0, 1));

drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c

372

vfpf_mbox_base = readq(cptpf->reg_base + RVU_PF_VF_MBOX_ADDR);

drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c

374

vfpf_mbox_base = readq(cptpf->reg_base + RVU_PF_VF_BAR4_ADDR);

drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.c

1104

while ((readq(base + RNM_ENTROPY_STATUS) & 0x7F) != 0x40) {

drivers/cxl/core/pci.c

174

md_status = readq(cxlds->regs.memdev + CXLMDEV_STATUS_OFFSET);

drivers/cxl/core/regs.c

127

cap_array = readq(base + CXLDEV_CAP_ARRAY_OFFSET);

drivers/cxl/pci.c

118

reg = readq(cxlds->regs.mbox + CXLDEV_MBOX_BG_CMD_STATUS_OFFSET);

drivers/cxl/pci.c

134

reg = readq(cxlds->regs.mbox + CXLDEV_MBOX_BG_CMD_STATUS_OFFSET);

drivers/cxl/pci.c

231

readq(cxlds->regs.memdev + CXLMDEV_STATUS_OFFSET);

drivers/cxl/pci.c

270

u64 md_status = readq(cxlds->regs.memdev + CXLMDEV_STATUS_OFFSET);

drivers/cxl/pci.c

277

status_reg = readq(cxlds->regs.mbox + CXLDEV_MBOX_STATUS_OFFSET);

drivers/cxl/pci.c

335

bg_status_reg = readq(cxlds->regs.mbox +

drivers/cxl/pci.c

353

cmd_reg = readq(cxlds->regs.mbox + CXLDEV_MBOX_CMD_OFFSET);

drivers/cxl/pci.c

402

md_status = readq(cxlds->regs.memdev + CXLMDEV_STATUS_OFFSET);

drivers/dma/dw-edma/dw-edma-v0-core.c

62

readq(&(__dw_regs(dw)->name))

drivers/dma/ioat/dma.c

1043

ioat_dma->msixtba0 = readq(ioat_dma->reg_base + 0x1000);

drivers/dma/ioat/dma.c

1044

ioat_dma->msixdata0 = readq(ioat_dma->reg_base + 0x1008);

drivers/dma/ioat/dma.c

1045

ioat_dma->msixpba = readq(ioat_dma->reg_base + 0x1800);

drivers/dma/ioat/dma.h

235

return readq(ioat_chan->reg_base + IOAT_CHANSTS_OFFSET);

drivers/dma/sf-pdma/sf-pdma.c

178

residue = readq(regs->residue);

drivers/dma/sf-pdma/sf-pdma.c

29

#ifndef readq

drivers/dma/sf-pdma/sf-pdma.c

351

residue = readq(regs->residue);

drivers/edac/i3200_edac.c

198

info->eccerrlog[0] = readq(window + I3200_C0ECCERRLOG);

drivers/edac/i3200_edac.c

200

info->eccerrlog[1] = readq(window + I3200_C1ECCERRLOG);

drivers/edac/i3200_edac.c

211

info->eccerrlog[0] = readq(window + I3200_C0ECCERRLOG);

drivers/edac/i3200_edac.c

213

info->eccerrlog[1] = readq(window + I3200_C1ECCERRLOG);

drivers/edac/igen6_edac.c

1139

u64 ecclog = readq(imc->window + ECC_ERROR_LOG_OFFSET);

drivers/edac/igen6_edac.c

1417

readq(imc->window + ECC_ERROR_LOG_OFFSET));

drivers/edac/igen6_edac.c

1775

ms_hash = readq(cmf + offset);

drivers/edac/loongson_edac.c

34

ecc = readq(pvt->ecc_base + ECC_CS_COUNT_REG);

drivers/edac/pnd2_edac.c

277

*(u64 *)data = readq(base + off);

drivers/edac/skx_common.c

68

return readq(addr);

drivers/edac/thunderx_edac.c

1080

ctx->reg_com_int = readq(ocx->regs + OCX_COM_INT);

drivers/edac/thunderx_edac.c

1084

readq(ocx->regs + OCX_LNE_INT(lane));

drivers/edac/thunderx_edac.c

1086

readq(ocx->regs + OCX_LNE_STAT(lane, 11));

drivers/edac/thunderx_edac.c

1172

ctx->reg_com_link_int = readq(ocx->regs + OCX_COM_LINKX_INT(ctx->link));

drivers/edac/thunderx_edac.c

1326

cfg = readq(ocx->regs + OCX_LNE_CFG(lane));

drivers/edac/thunderx_edac.c

1332

readq(ocx->regs + OCX_LNE_STAT(lane, stat));

drivers/edac/thunderx_edac.c

1441

reg = readq(ocx->regs + OCX_LNE_INT(i));

drivers/edac/thunderx_edac.c

1447

reg = readq(ocx->regs + OCX_COM_LINKX_INT(i));

drivers/edac/thunderx_edac.c

1454

reg = readq(ocx->regs + OCX_COM_INT);

drivers/edac/thunderx_edac.c

1762

ctx->reg_int = readq(tad->regs + L2C_TAD_INT_W1C);

drivers/edac/thunderx_edac.c

1766

ctx->reg_ext = readq(tad->regs + L2C_TAD_TQD_ERR);

drivers/edac/thunderx_edac.c

1769

ctx->reg_ext = readq(tad->regs + L2C_TAD_TTG_ERR);

drivers/edac/thunderx_edac.c

1772

ctx->reg_ext = readq(tad->regs + L2C_TAD_TIMEOUT);

drivers/edac/thunderx_edac.c

1775

ctx->reg_ext = readq(tad->regs + L2C_TAD_ERR);

drivers/edac/thunderx_edac.c

1794

ctx->reg_int = readq(cbc->regs + L2C_CBC_INT_W1C);

drivers/edac/thunderx_edac.c

1798

ctx->reg_ext = readq(cbc->regs + L2C_CBC_RSDERR);

drivers/edac/thunderx_edac.c

1801

ctx->reg_ext = readq(cbc->regs + L2C_CBC_MIBERR);

drivers/edac/thunderx_edac.c

1804

ctx->reg_ext = readq(cbc->regs + L2C_CBC_IODISOCIERR);

drivers/edac/thunderx_edac.c

1823

ctx->reg_int = readq(mci->regs + L2C_MCI_INT_W1C);

drivers/edac/thunderx_edac.c

1824

ctx->reg_ext = readq(mci->regs + L2C_MCI_ERR);

drivers/edac/thunderx_edac.c

259

sprintf(buf, "0x%016llx", readq(pdata->regs + _reg)); \

drivers/edac/thunderx_edac.c

322

u64 lmc_int = readq(lmc->regs + LMC_INT);

drivers/edac/thunderx_edac.c

349

readq(lmc->regs + LMC_CHAR_MASK0);

drivers/edac/thunderx_edac.c

350

readq(lmc->regs + LMC_CHAR_MASK2);

drivers/edac/thunderx_edac.c

351

readq(lmc->regs + LMC_ECC_PARITY_TEST);

drivers/edac/thunderx_edac.c

551

ctx->reg_int = readq(lmc->regs + LMC_INT);

drivers/edac/thunderx_edac.c

552

ctx->reg_fadr = readq(lmc->regs + LMC_FADR);

drivers/edac/thunderx_edac.c

553

ctx->reg_nxm_fadr = readq(lmc->regs + LMC_NXM_FADR);

drivers/edac/thunderx_edac.c

554

ctx->reg_scram_fadr = readq(lmc->regs + LMC_SCRAM_FADR);

drivers/edac/thunderx_edac.c

555

ctx->reg_ecc_synd = readq(lmc->regs + LMC_ECC_SYND);

drivers/edac/thunderx_edac.c

694

lmc_control = readq(lmc->regs + LMC_CONTROL);

drivers/edac/thunderx_edac.c

695

lmc_ddr_pll_ctl = readq(lmc->regs + LMC_DDR_PLL_CTL);

drivers/edac/thunderx_edac.c

696

lmc_config = readq(lmc->regs + LMC_CONFIG);

drivers/edac/thunderx_edac.c

761

lmc->l2c_alias = !(readq(l2c_ioaddr) & L2C_CTL_DISIDXALIAS);

drivers/edac/thunderx_edac.c

771

lmc_int = readq(lmc->regs + LMC_INT);

drivers/fpga/dfl-afu-error.c

124

error = readq(base + PORT_ERROR);

drivers/fpga/dfl-afu-error.c

155

error = readq(base + PORT_FIRST_ERROR);

drivers/fpga/dfl-afu-error.c

173

req0 = readq(base + PORT_MALFORMED_REQ0);

drivers/fpga/dfl-afu-error.c

174

req1 = readq(base + PORT_MALFORMED_REQ1);

drivers/fpga/dfl-afu-error.c

75

v = readq(base_hdr + PORT_HDR_STS);

drivers/fpga/dfl-afu-error.c

90

v = readq(base_err + PORT_ERROR);

drivers/fpga/dfl-afu-error.c

95

v = readq(base_err + PORT_FIRST_ERROR);

drivers/fpga/dfl-afu-main.c

150

return FIELD_GET(PORT_CAP_PORT_NUM, readq(base + PORT_HDR_CAP));

drivers/fpga/dfl-afu-main.c

173

v = readq(base + PORT_HDR_CTRL);

drivers/fpga/dfl-afu-main.c

194

v = readq(base + PORT_HDR_CTRL);

drivers/fpga/dfl-afu-main.c

214

v = readq(base + PORT_HDR_STS);

drivers/fpga/dfl-afu-main.c

252

v = readq(base + PORT_HDR_STS);

drivers/fpga/dfl-afu-main.c

289

v = readq(base + PORT_HDR_STS);

drivers/fpga/dfl-afu-main.c

349

userclk_freqsts = readq(base + PORT_HDR_USRCLK_STS0);

drivers/fpga/dfl-afu-main.c

367

userclk_freqcntrsts = readq(base + PORT_HDR_USRCLK_STS1);

drivers/fpga/dfl-afu-main.c

474

guidl = readq(base + GUID_L);

drivers/fpga/dfl-afu-main.c

475

guidh = readq(base + GUID_H);

drivers/fpga/dfl-afu-main.c

51

v = readq(base + PORT_HDR_CTRL);

drivers/fpga/dfl-afu-main.c

89

v = readq(base + PORT_HDR_CTRL);

drivers/fpga/dfl-fme-error.c

120

v = readq(base + PCIE1_ERROR);

drivers/fpga/dfl-fme-error.c

141

(unsigned long long)readq(base + RAS_NONFAT_ERROR));

drivers/fpga/dfl-fme-error.c

154

(unsigned long long)readq(base + RAS_CATFAT_ERROR));

drivers/fpga/dfl-fme-error.c

168

v = readq(base + RAS_ERROR_INJECT);

drivers/fpga/dfl-fme-error.c

193

v = readq(base + RAS_ERROR_INJECT);

drivers/fpga/dfl-fme-error.c

213

value = readq(base + FME_ERROR);

drivers/fpga/dfl-fme-error.c

236

v = readq(base + FME_ERROR);

drivers/fpga/dfl-fme-error.c

260

value = readq(base + FME_FIRST_ERROR);

drivers/fpga/dfl-fme-error.c

277

value = readq(base + FME_NEXT_ERROR);

drivers/fpga/dfl-fme-error.c

52

value = readq(base + PCIE0_ERROR);

drivers/fpga/dfl-fme-error.c

75

v = readq(base + PCIE0_ERROR);

drivers/fpga/dfl-fme-error.c

97

value = readq(base + PCIE1_ERROR);

drivers/fpga/dfl-fme-main.c

107

v = readq(base + FME_HDR_CAP);

drivers/fpga/dfl-fme-main.c

123

v = readq(base + FME_HDR_CAP);

drivers/fpga/dfl-fme-main.c

214

u64 v = readq(base + FME_THERM_CAP);

drivers/fpga/dfl-fme-main.c

240

v = readq(feature->ioaddr + FME_THERM_RDSENSOR_FMT1);

drivers/fpga/dfl-fme-main.c

244

v = readq(feature->ioaddr + FME_THERM_THRESHOLD);

drivers/fpga/dfl-fme-main.c

248

v = readq(feature->ioaddr + FME_THERM_THRESHOLD);

drivers/fpga/dfl-fme-main.c

252

v = readq(feature->ioaddr + FME_THERM_THRESHOLD);

drivers/fpga/dfl-fme-main.c

256

v = readq(feature->ioaddr + FME_THERM_THRESHOLD);

drivers/fpga/dfl-fme-main.c

260

v = readq(feature->ioaddr + FME_THERM_THRESHOLD);

drivers/fpga/dfl-fme-main.c

293

v = readq(feature->ioaddr + FME_THERM_THRESHOLD);

drivers/fpga/dfl-fme-main.c

37

v = readq(base + FME_HDR_CAP);

drivers/fpga/dfl-fme-main.c

391

v = readq(feature->ioaddr + FME_PWR_STATUS);

drivers/fpga/dfl-fme-main.c

395

v = readq(feature->ioaddr + FME_PWR_THRESHOLD);

drivers/fpga/dfl-fme-main.c

399

v = readq(feature->ioaddr + FME_PWR_THRESHOLD);

drivers/fpga/dfl-fme-main.c

403

v = readq(feature->ioaddr + FME_PWR_THRESHOLD);

drivers/fpga/dfl-fme-main.c

407

v = readq(feature->ioaddr + FME_PWR_THRESHOLD);

drivers/fpga/dfl-fme-main.c

431

v = readq(feature->ioaddr + FME_PWR_THRESHOLD);

drivers/fpga/dfl-fme-main.c

437

v = readq(feature->ioaddr + FME_PWR_THRESHOLD);

drivers/fpga/dfl-fme-main.c

494

v = readq(feature->ioaddr + FME_PWR_XEON_LIMIT);

drivers/fpga/dfl-fme-main.c

509

v = readq(feature->ioaddr + FME_PWR_FPGA_LIMIT);

drivers/fpga/dfl-fme-main.c

523

v = readq(feature->ioaddr + FME_PWR_STATUS);

drivers/fpga/dfl-fme-main.c

57

v = readq(base + FME_HDR_BITSTREAM_ID);

drivers/fpga/dfl-fme-main.c

76

v = readq(base + FME_HDR_BITSTREAM_MD);

drivers/fpga/dfl-fme-main.c

91

v = readq(base + FME_HDR_CAP);

drivers/fpga/dfl-fme-mgr.c

101

pr_error = readq(fme_pr + FME_PR_ERR);

drivers/fpga/dfl-fme-mgr.c

123

pr_ctrl = readq(fme_pr + FME_PR_CTRL);

drivers/fpga/dfl-fme-mgr.c

134

pr_ctrl = readq(fme_pr + FME_PR_CTRL);

drivers/fpga/dfl-fme-mgr.c

157

pr_ctrl = readq(fme_pr + FME_PR_CTRL);

drivers/fpga/dfl-fme-mgr.c

176

pr_ctrl = readq(fme_pr + FME_PR_CTRL);

drivers/fpga/dfl-fme-mgr.c

188

pr_status = readq(fme_pr + FME_PR_STS);

drivers/fpga/dfl-fme-mgr.c

199

pr_status = readq(fme_pr + FME_PR_STS);

drivers/fpga/dfl-fme-mgr.c

228

pr_ctrl = readq(fme_pr + FME_PR_CTRL);

drivers/fpga/dfl-fme-mgr.c

272

id->id_l = readq(fme_pr + FME_PR_INTFC_ID_L);

drivers/fpga/dfl-fme-mgr.c

273

id->id_h = readq(fme_pr + FME_PR_INTFC_ID_H);

drivers/fpga/dfl-fme-mgr.c

97

pr_status = readq(fme_pr + FME_PR_STS);

drivers/fpga/dfl-fme-perf.c

281

v = readq(addr);

drivers/fpga/dfl-fme-perf.c

328

v = readq(base + CACHE_CTRL);

drivers/fpga/dfl-fme-perf.c

398

v = readq(base + FAB_CTRL);

drivers/fpga/dfl-fme-perf.c

428

v = readq(base + FAB_CTRL);

drivers/fpga/dfl-fme-perf.c

461

v = readq(base + VTD_CTRL);

drivers/fpga/dfl-fme-perf.c

492

v = readq(base + VTD_SIP_CTRL);

drivers/fpga/dfl-fme-perf.c

896

v = readq(base + FAB_CTRL);

drivers/fpga/dfl-fme-pr.c

399

fme_cap = readq(fme_hdr + FME_HDR_CAP);

drivers/fpga/dfl-fme-pr.c

401

port_offset = readq(fme_hdr + FME_HDR_PORT_OFST(i));

drivers/fpga/dfl-fme-pr.c

93

v = readq(fme_hdr + FME_HDR_CAP);

drivers/fpga/dfl-n3000-nios.c

422

v = readq(base + N3000_NS_PARAM);

drivers/fpga/dfl-n3000-nios.c

469

*v = readq(base + N3000_NS_STAT);

drivers/fpga/dfl-pci.c

249

v = readq(base + FME_HDR_CAP);

drivers/fpga/dfl-pci.c

255

v = readq(base + FME_HDR_PORT_OFST(i));

drivers/fpga/dfl.c

1047

v = readq(base + PORT_UINT_CAP);

drivers/fpga/dfl.c

1052

v = readq(base + PORT_ERROR_CAP);

drivers/fpga/dfl.c

1060

v = readq(base + FME_ERROR_CAP);

drivers/fpga/dfl.c

1124

readq(dfh_base + DFHv1_CSR_SIZE_GRP)))

drivers/fpga/dfl.c

1128

v = readq(dfh_base + DFHv1_PARAM_HDR + size);

drivers/fpga/dfl.c

1165

v = readq(binfo->ioaddr + ofst);

drivers/fpga/dfl.c

1197

v = readq(binfo->ioaddr + ofst + DFHv1_CSR_ADDR);

drivers/fpga/dfl.c

1204

v = readq(binfo->ioaddr + ofst + DFHv1_CSR_SIZE_GRP);

drivers/fpga/dfl.c

1229

u64 v = readq(binfo->ioaddr + PORT_HDR_CAP);

drivers/fpga/dfl.c

1311

v = readq(binfo->ioaddr + DFH);

drivers/fpga/dfl.c

1329

v = readq(binfo->ioaddr + NEXT_AFU);

drivers/fpga/dfl.c

1345

feature_id(readq(binfo->ioaddr + ofst)));

drivers/fpga/dfl.c

1364

v = readq(binfo->ioaddr + ofst + DFH);

drivers/fpga/dfl.c

1405

v = readq(binfo->ioaddr + start - binfo->start + DFH);

drivers/fpga/dfl.c

1787

v = readq(base + FME_HDR_PORT_OFST(port_id));

drivers/fpga/dfl.h

477

u64 v = readq(base + DFH);

drivers/fpga/dfl.h

485

u64 v = readq(base + DFH);

drivers/fpga/dfl.h

493

return (u8)FIELD_GET(DFH_REVISION, readq(base + DFH));

drivers/gpio/gpio-mlxbf.c

100

gs->csave_regs.scratchpad = readq(gs->base + MLXBF_GPIO_SCRATCHPAD);

drivers/gpio/gpio-mlxbf.c

102

readq(gs->base + MLXBF_GPIO_PAD_CONTROL_FIRST_WORD);

drivers/gpio/gpio-mlxbf.c

104

readq(gs->base + MLXBF_GPIO_PAD_CONTROL_1_FIRST_WORD);

drivers/gpio/gpio-mlxbf.c

106

readq(gs->base + MLXBF_GPIO_PAD_CONTROL_2_FIRST_WORD);

drivers/gpio/gpio-mlxbf.c

108

readq(gs->base + MLXBF_GPIO_PAD_CONTROL_3_FIRST_WORD);

drivers/gpio/gpio-mlxbf.c

109

gs->csave_regs.pin_dir_i = readq(gs->base + MLXBF_GPIO_PIN_DIR_I);

drivers/gpio/gpio-mlxbf.c

110

gs->csave_regs.pin_dir_o = readq(gs->base + MLXBF_GPIO_PIN_DIR_O);

drivers/gpio/gpio-mmio.c

100

return readq(reg);

drivers/gpio/gpio-thunderx.c

172

bit_cfg = readq(txgpio->register_base + bit_cfg_reg(line));

drivers/gpio/gpio-thunderx.c

201

orig_dat = ((readq(reg) >> bank_bit) & 1) ^ orig_invert;

drivers/gpio/gpio-thunderx.c

202

bit_cfg = readq(txgpio->register_base + bit_cfg_reg(line));

drivers/gpio/gpio-thunderx.c

265

u64 read_bits = readq(txgpio->register_base + (bank * GPIO_2ND_BANK) + GPIO_RX_DAT);

drivers/gpio/gpio-thunderx.c

476

u64 c = readq(txgpio->register_base + GPIO_CONST);

drivers/gpio/gpio-thunderx.c

500

u64 bit_cfg = readq(txgpio->register_base + bit_cfg_reg(i));

drivers/gpio/gpio-thunderx.c

77

u64 bit_cfg = readq(txgpio->register_base + bit_cfg_reg(line));

drivers/gpu/drm/i915/gt/intel_ggtt.c

449

return readq(addr);

drivers/gpu/drm/i915/gvt/dmabuf.c

83

GEN8_DECODE_PTE(readq(&gtt_entries[i]));

drivers/gpu/drm/i915/gvt/gtt.c

221

return readq(addr);

drivers/gpu/drm/i915/i915_vgpu.c

89

magic = readq(shared_area + vgtif_offset(magic));

drivers/gpu/drm/loongson/lsdc_gfxpll.c

63

reg->d = readq(this->mmio);

drivers/gpu/drm/loongson/lsdc_pixpll.c

256

dst->d = readq(this->mmio);

drivers/gpu/drm/xe/xe_ggtt.c

257

return readq(&ggtt->gsm[addr >> XE_PTE_SHIFT]);

drivers/gpu/host1x/dev.c

79

return readq(sync_regs + r);

drivers/i2c/busses/i2c-ismt.c

247

(long long unsigned int)readq(priv->smba + ISMT_GR_SMTICL));

drivers/i2c/busses/i2c-ismt.c

273

(long long unsigned int)readq(priv->smba + ISMT_MSTR_MDBA));

drivers/infiniband/hw/erdma/erdma.h

238

return readq(dev->func_bar + reg);

drivers/infiniband/hw/hfi1/chip.c

1302

return readq(hfi1_addr_from_offset(dd, offset));

drivers/infiniband/hw/hfi1/pcie.c

122

dd->revision = readq(dd->kregbase1 + CCE_REVISION);

drivers/infiniband/hw/hfi1/pcie.c

128

rcv_array_count = readq(dd->kregbase1 + RCV_ARRAY_CNT);

drivers/infiniband/hw/irdma/utils.c

130

return readq(hw->hw_addr + reg);

drivers/input/misc/sgi_btns.c

32

status = readq(&mace->perif.audio.control);

drivers/iommu/amd/debugfs.c

58

value = readq(iommu->mmio_base + dbg_mmio_offset);

drivers/iommu/amd/init.c

1001

paddr = readq(iommu->mmio_base + MMIO_CMD_BUF_OFFSET) & PM_ADDR_MASK;

drivers/iommu/amd/init.c

1017

paddr = readq(iommu->mmio_base + MMIO_EXCL_BASE_OFFSET) & PM_ADDR_MASK;

drivers/iommu/amd/init.c

2124

features = readq(iommu->mmio_base + MMIO_EXT_FEATURES);

drivers/iommu/amd/init.c

2125

features2 = readq(iommu->mmio_base + MMIO_EXT_FEATURES2);

drivers/iommu/amd/init.c

249

ctrl = readq(iommu->mmio_base + MMIO_CONTROL_OFFSET);

drivers/iommu/amd/init.c

2859

ctrl = readq(iommu->mmio_base + MMIO_CONTROL_OFFSET);

drivers/iommu/amd/init.c

403

ctrl = readq(iommu->mmio_base + MMIO_CONTROL_OFFSET);

drivers/iommu/amd/init.c

987

paddr = readq(iommu->mmio_base + MMIO_EVT_BUF_OFFSET) & PM_ADDR_MASK;

drivers/iommu/amd/iommu.c

924

ctrl = readq(iommu->mmio_base + MMIO_CONTROL_OFFSET);

drivers/iommu/intel/debugfs.c

142

value = readq(iommu->reg + iommu_regs_64[i].offset);

drivers/iommu/intel/debugfs.c

250

if (readq(iommu->reg + DMAR_RTADDR_REG) & DMA_RTADDR_SMT) {

drivers/iommu/intel/debugfs.c

373

if (readq(iommu->reg + DMAR_RTADDR_REG) & DMA_RTADDR_SMT)

drivers/iommu/intel/debugfs.c

541

readq(iommu->reg + DMAR_IQH_REG) >> shift,

drivers/iommu/intel/debugfs.c

542

readq(iommu->reg + DMAR_IQT_REG) >> shift);

drivers/iommu/intel/dmar.c

1020

iommu->ecmdcap[i] = readq(iommu->reg + DMAR_ECCAP_REG +

drivers/iommu/intel/dmar.c

1243

u64 iqe_err = readq(iommu->reg + DMAR_IQER_REG);

drivers/iommu/intel/dmar.c

1324

iqe_err = readq(iommu->reg + DMAR_IQER_REG);

drivers/iommu/intel/dmar.c

1975

guest_addr = readq(iommu->reg + reg +

drivers/iommu/intel/dmar.c

902

cap = readq(addr + DMAR_CAP_REG);

drivers/iommu/intel/dmar.c

903

ecap = readq(addr + DMAR_ECAP_REG);

drivers/iommu/intel/dmar.c

985

iommu->cap = readq(iommu->reg + DMAR_CAP_REG);

drivers/iommu/intel/dmar.c

986

iommu->ecap = readq(iommu->reg + DMAR_ECAP_REG);

drivers/iommu/intel/iommu.c

1539

rtaddr_reg = readq(iommu->reg + DMAR_RTADDR_REG);

drivers/iommu/intel/iommu.c

4200

res = readq(iommu->reg + DMAR_ECRSP_REG);

drivers/iommu/intel/iommu.c

4216

IOMMU_WAIT_OP(iommu, DMAR_ECRSP_REG, readq,

drivers/iommu/intel/iommu.c

775

readq, (!(val & DMA_CCMD_ICC)), val);

drivers/iommu/intel/iommu.c

817

readq, (!(val & DMA_TLB_IVT)), val);

drivers/iommu/intel/irq_remapping.c

425

irta = readq(iommu->reg + DMAR_IRTA_REG);

drivers/iommu/intel/perfmon.c

310

new_count = readq(iommu_event_base(iommu_pmu, hwc->idx));

drivers/iommu/intel/perfmon.c

343

count = readq(iommu_event_base(iommu_pmu, hwc->idx));

drivers/iommu/intel/perfmon.c

499

while ((status = readq(iommu_pmu->overflow))) {

drivers/iommu/intel/perfmon.c

577

perfcap = readq(iommu->reg + DMAR_PERFCAP_REG);

drivers/iommu/intel/perfmon.c

620

pcap = readq(iommu->reg + DMAR_PERFEVNTCAP_REG +

drivers/iommu/intel/prq.c

211

tail = readq(iommu->reg + DMAR_PQT_REG) & PRQ_RING_MASK;

drivers/iommu/intel/prq.c

212

head = readq(iommu->reg + DMAR_PQH_REG) & PRQ_RING_MASK;

drivers/iommu/intel/prq.c

271

head = readq(iommu->reg + DMAR_PQH_REG) & PRQ_RING_MASK;

drivers/iommu/intel/prq.c

272

tail = readq(iommu->reg + DMAR_PQT_REG) & PRQ_RING_MASK;

drivers/iommu/intel/prq.c

84

tail = readq(iommu->reg + DMAR_PQT_REG) & PRQ_RING_MASK;

drivers/iommu/intel/prq.c

85

head = readq(iommu->reg + DMAR_PQH_REG) & PRQ_RING_MASK;

drivers/mailbox/pcc.c

139

*val = readq(vaddr);

drivers/mailbox/qcom-cpucp-mbox.c

61

status = readq(cpucp->rx_base + APSS_CPUCP_RX_MBOX_STAT);

drivers/mailbox/qcom-cpucp-mbox.c

85

val = readq(cpucp->rx_base + APSS_CPUCP_RX_MBOX_EN);

drivers/mailbox/qcom-cpucp-mbox.c

98

val = readq(cpucp->rx_base + APSS_CPUCP_RX_MBOX_EN);

drivers/memory/dfl-emif.c

203

readq(de->base + EMIF_CAPABILITY_BASE));

drivers/memory/dfl-emif.c

206

readq(de->base + EMIF_CAPABILITY_BASE));

drivers/memory/dfl-emif.c

67

val = readq(de->base + EMIF_STAT);

drivers/memory/dfl-emif.c

90

val = readq(base + EMIF_CTRL);

drivers/mfd/intel_pmc_bxt.c

143

deep = readq(pmc->gcr_mem_base + PMC_GCR_TELEM_DEEP_S0IX_REG);

drivers/mfd/intel_pmc_bxt.c

144

shlw = readq(pmc->gcr_mem_base + PMC_GCR_TELEM_SHLW_S0IX_REG);

drivers/mfd/intel_pmc_bxt.c

88

*data = readq(pmc->gcr_mem_base + offset);

drivers/misc/genwqe/card_base.c

1018

readq(cd->mmio + IO_SLC_CFGREG_GFIR);

drivers/misc/genwqe/card_ddcb.c

1144

readq(cd->mmio + IO_SLC_CFGREG_GFIR);

drivers/misc/mrvl_cn10k_dpi.c

195

return readq(dpi->reg_base + offset);

drivers/misc/mrvl_cn10k_dpi.c

327

msg.word_l = readq(mbox->vf_pf_data_reg);

drivers/misc/mrvl_cn10k_dpi.c

336

msg.word_h = readq(mbox->pf_vf_data_reg);

drivers/misc/ocxl/mmio.c

161

tmp = readq((char *)afu->global_mmio_ptr + offset);

drivers/misc/ocxl/mmio.c

224

tmp = readq((char *)afu->global_mmio_ptr + offset);

drivers/misc/ocxl/mmio.c

49

*val = readq((char *)afu->global_mmio_ptr + offset);

drivers/mmc/host/cavium-octeon.c

234

val = readq(host->base + MIO_EMM_INT(host));

drivers/mmc/host/cavium-octeon.c

308

dma_cfg = readq(host->dma_base + MIO_EMM_DMA_CFG(host));

drivers/mmc/host/cavium-thunderx.c

180

dma_cfg = readq(host->dma_base + MIO_EMM_DMA_CFG(host));

drivers/mmc/host/cavium.c

169

emm_switch = readq(host->base + MIO_EMM_SWITCH(host));

drivers/mmc/host/cavium.c

219

rsp_sts = readq(host->base + MIO_EMM_RSP_STS(host));

drivers/mmc/host/cavium.c

255

emm_switch = readq(slot->host->base + MIO_EMM_SWITCH(host));

drivers/mmc/host/cavium.c

260

wdog = readq(slot->host->base + MIO_EMM_WDOG(host));

drivers/mmc/host/cavium.c

282

old_slot->cached_switch = readq(host->base + MIO_EMM_SWITCH(host));

drivers/mmc/host/cavium.c

283

old_slot->cached_rca = readq(host->base + MIO_EMM_RCA(host));

drivers/mmc/host/cavium.c

317

dat = readq(host->base + MIO_EMM_BUF_DAT(host));

drivers/mmc/host/cavium.c

348

rsp_lo = readq(host->base + MIO_EMM_RSP_LO(host));

drivers/mmc/host/cavium.c

361

rsp_hi = readq(host->base + MIO_EMM_RSP_HI(host));

drivers/mmc/host/cavium.c

387

fifo_cfg = readq(host->dma_base + MIO_EMM_DMA_FIFO_CFG(host));

drivers/mmc/host/cavium.c

428

emm_dma = readq(host->base + MIO_EMM_DMA(host));

drivers/mmc/host/cavium.c

448

emm_int = readq(host->base + MIO_EMM_INT(host));

drivers/mmc/host/cavium.c

458

rsp_sts = readq(host->base + MIO_EMM_RSP_STS(host));

drivers/mmc/host/cavium.c

808

rsp_sts = readq(host->base + MIO_EMM_RSP_STS(host));

drivers/mmc/host/dw_mmc.h

495

#ifndef readq

drivers/mtd/devices/mtd_intel_dg.c

119

return readq(base + NVM_TRIGGER_REG);

drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.c

66

value = readq(hw->mmio + reg);

drivers/net/ethernet/cavium/common/cavium_ptp.c

217

return readq(clock->reg_base + PTP_CLOCK_HI);

drivers/net/ethernet/cavium/common/cavium_ptp.c

274

clock_cfg = readq(clock->reg_base + PTP_CLOCK_CFG);

drivers/net/ethernet/cavium/common/cavium_ptp.c

291

clock_cfg = readq(clock->reg_base + PTP_CLOCK_CFG);

drivers/net/ethernet/cavium/common/cavium_ptp.c

320

clock_cfg = readq(clock->reg_base + PTP_CLOCK_CFG);

drivers/net/ethernet/cavium/common/cavium_ptp.c

48

ret = CLOCK_BASE_RATE * ((readq(base + RST_BOOT) >> 33) & 0x3f);

drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c

297

writeq((readq(inst_cnt_reg) &

drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c

382

writeq(readq((u8 *)oct->mmio[0].hw_addr +

drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c

443

pkt_in_done = readq(iq->inst_cnt_reg);

drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c

519

mbox_int_val = readq(mbox->mbox_int_reg);

drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c

525

val64 = readq(oct->mbox[q_no]->mbox_write_reg);

drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c

787

pkts_sent = readq(droq->pkts_sent_reg);

drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c

819

mbox_int_val = readq(oct->mbox[0]->mbox_int_reg);

drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c

843

intr64 = readq(cn23xx->intr_sum_reg64);

drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c

942

intr_val = readq(cn23xx->intr_enb_reg64);

drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c

948

intr_val = readq(cn23xx->intr_enb_reg64);

drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c

964

intr_val = readq(cn23xx->intr_enb_reg64);

drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c

970

intr_val = readq(cn23xx->intr_enb_reg64);

drivers/net/ethernet/cavium/liquidio/cn23xx_vf_device.c

142

writeq((readq(inst_cnt_reg) &

drivers/net/ethernet/cavium/liquidio/cn23xx_vf_device.c

235

pkt_in_done = readq(iq->inst_cnt_reg);

drivers/net/ethernet/cavium/liquidio/cn23xx_vf_device.c

479

mbox_int_val = readq(oct->mbox[0]->mbox_int_reg);

drivers/net/ethernet/cavium/liquidio/cn23xx_vf_device.c

496

pkts_sent = readq(droq->pkts_sent_reg);

drivers/net/ethernet/cavium/liquidio/cn66xx_device.c

576

intr64 = readq(cn6xxx->intr_sum_reg64);

drivers/net/ethernet/cavium/liquidio/lio_ethtool.c

2405

val = readq(inst_cnt_reg);

drivers/net/ethernet/cavium/liquidio/octeon_device.c

1366

val64 = readq(oct->reg_list.pci_win_rd_data);

drivers/net/ethernet/cavium/liquidio/octeon_device.c

1466

instr_cnt = readq(iq->inst_cnt_reg);

drivers/net/ethernet/cavium/liquidio/octeon_device.h

740

readq((oct_dev)->mmio[0].hw_addr + (reg_off))

drivers/net/ethernet/cavium/liquidio/octeon_mailbox.c

188

while (readq(mbox->mbox_write_reg) != OCTEON_PFVFSIG) {

drivers/net/ethernet/cavium/liquidio/octeon_mailbox.c

200

while (readq(mbox->mbox_write_reg) !=

drivers/net/ethernet/cavium/liquidio/octeon_mailbox.c

68

msg.u64 = readq(mbox->mbox_read_reg);

drivers/net/ethernet/cavium/liquidio/octeon_mem_ops.c

79

*((u64 *)hostbuf) = readq(mapped_addr);

drivers/net/ethernet/chelsio/cxgb4/cxgb4.h

1512

#ifndef readq

drivers/net/ethernet/chelsio/cxgb4/cxgb4.h

1527

return readq(adap->regs + reg_addr);

drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c

1269

(unsigned long long)readq(addr + i));

drivers/net/ethernet/chelsio/cxgb4vf/adapter.h

448

#ifndef readq

drivers/net/ethernet/chelsio/cxgb4vf/adapter.h

470

return readq(adapter->regs + reg_addr);

drivers/net/ethernet/cisco/enic/vnic_dev.c

265

err = (int)readq(&devcmd->args[0]);

drivers/net/ethernet/cisco/enic/vnic_dev.c

279

vdev->args[i] = readq(&devcmd->args[i]);

drivers/net/ethernet/cisco/enic/vnic_dev.h

17

#ifndef readq

drivers/net/ethernet/fungible/funcore/fun_dev.c

711

fdev->cap_reg = readq(fdev->bar + NVME_REG_CAP);

drivers/net/ethernet/fungible/funeth/funeth_ethtool.c

454

*(u64 *)(buf + NVME_REG_CAP) = readq(bar + NVME_REG_CAP);

drivers/net/ethernet/fungible/funeth/funeth_ethtool.c

461

*(u64 *)(buf + NVME_REG_ASQ) = readq(bar + NVME_REG_ASQ);

drivers/net/ethernet/fungible/funeth/funeth_ethtool.c

462

*(u64 *)(buf + NVME_REG_ACQ) = readq(bar + NVME_REG_ACQ);

drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h

1093

readq((__iomem void *)(((drv)->io_base + 0xc00 + (offset))))

drivers/net/ethernet/intel/i40e/i40e_io.h

13

#define rd64(a, reg) readq((a)->hw_addr + (reg))

drivers/net/ethernet/intel/iavf/iavf_osdep.h

20

#define rd64(a, reg) readq((a)->hw_addr + (reg))

drivers/net/ethernet/intel/ice/ice_osdep.h

25

#define rd64(a, reg) readq((a)->hw_addr + (reg))

drivers/net/ethernet/intel/idpf/idpf_mem.h

18

#define idpf_mbx_rd64(a, reg) readq((a)->mbx.vaddr + (reg))

drivers/net/ethernet/marvell/octeon_ep/octep_ctrl_mbox.c

170

if (readq(OCTEP_CTRL_MBOX_INFO_FW_STATUS(mbox->barmem)) != OCTEP_CTRL_MBOX_STATUS_READY)

drivers/net/ethernet/marvell/octeon_ep/octep_ctrl_mbox.c

232

if (readq(OCTEP_CTRL_MBOX_INFO_FW_STATUS(mbox->barmem)) != OCTEP_CTRL_MBOX_STATUS_READY)

drivers/net/ethernet/marvell/octeon_ep/octep_ctrl_mbox.c

86

magic_num = readq(OCTEP_CTRL_MBOX_INFO_MAGIC_NUM(mbox->barmem));

drivers/net/ethernet/marvell/octeon_ep/octep_ctrl_mbox.c

92

status = readq(OCTEP_CTRL_MBOX_INFO_FW_STATUS(mbox->barmem));

drivers/net/ethernet/marvell/octeon_ep/octep_ctrl_mbox.c

98

fw_versions = readq(OCTEP_CTRL_MBOX_INFO_FW_VERSION(mbox->barmem));

drivers/net/ethernet/marvell/octeon_ep/octep_main.h

353

readq((octep_dev)->mmio[0].hw_addr + (reg_off))

drivers/net/ethernet/marvell/octeon_ep/octep_main.h

371

val64 = readq(oct->pci_win_regs.pci_win_rd_data);

drivers/net/ethernet/marvell/octeon_ep/octep_pfvf_mbox.c

424

cmd.u64 = readq(mbox->vf_pf_data_reg);

drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_main.h

321

readq((octep_vf_dev)->mmio.hw_addr + (reg_off))

drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_mbox.c

132

reg_val = readq(mbox->mbox_write_reg);

drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_mbox.c

89

pf_vf_data = readq(mbox->mbox_read_reg);

drivers/net/ethernet/marvell/octeontx2/af/cgx.c

137

return readq(cgx->reg_base + (lmac << cgx->mac_ops->lmac_offset) +

drivers/net/ethernet/marvell/octeontx2/af/mbox.c

358

intr_val = readq((void __iomem *)mbox->reg_base +

drivers/net/ethernet/marvell/octeontx2/af/mbox.c

385

data = readq((void __iomem *)mbox->reg_base +

drivers/net/ethernet/marvell/octeontx2/af/mbox.c

396

data = readq((void __iomem *)mbox->reg_base +

drivers/net/ethernet/marvell/octeontx2/af/mcs.h

174

return readq(mcs->reg_base + offset);

drivers/net/ethernet/marvell/octeontx2/af/ptp.c

130

ptp_clock_hi = readq(ptp->reg_base + PTP_CLOCK_HI);

drivers/net/ethernet/marvell/octeontx2/af/ptp.c

159

sec = readq(ptp->reg_base + PTP_CLOCK_SEC) & 0xFFFFFFFFUL;

drivers/net/ethernet/marvell/octeontx2/af/ptp.c

160

nsec = readq(ptp->reg_base + PTP_CLOCK_HI);

drivers/net/ethernet/marvell/octeontx2/af/ptp.c

161

sec1 = readq(ptp->reg_base + PTP_CLOCK_SEC) & 0xFFFFFFFFUL;

drivers/net/ethernet/marvell/octeontx2/af/ptp.c

164

nsec = readq(ptp->reg_base + PTP_CLOCK_HI);

drivers/net/ethernet/marvell/octeontx2/af/ptp.c

174

return readq(ptp->reg_base + PTP_CLOCK_HI);

drivers/net/ethernet/marvell/octeontx2/af/ptp.c

269

regval = readq(ptp->reg_base + PTP_CLOCK_CFG);

drivers/net/ethernet/marvell/octeontx2/af/ptp.c

290

ptp_clock_hi = readq(ptp->reg_base + PTP_CLOCK_HI);

drivers/net/ethernet/marvell/octeontx2/af/ptp.c

305

regval = readq(ptp->reg_base + PTP_CLOCK_CFG);

drivers/net/ethernet/marvell/octeontx2/af/ptp.c

398

clock_cfg = readq(ptp->reg_base + PTP_CLOCK_CFG);

drivers/net/ethernet/marvell/octeontx2/af/ptp.c

416

clock_cfg = readq(ptp->reg_base + PTP_CLOCK_CFG);

drivers/net/ethernet/marvell/octeontx2/af/ptp.c

435

timestamp = readq(ptp->reg_base + PTP_TIMESTAMP);

drivers/net/ethernet/marvell/octeontx2/af/ptp.c

438

*clk = readq(ptp->reg_base + PTP_TIMESTAMP);

drivers/net/ethernet/marvell/octeontx2/af/ptp.c

457

ptp_clock_hi = readq(ptp->reg_base + PTP_CLOCK_HI);

drivers/net/ethernet/marvell/octeontx2/af/ptp.c

471

clock_cfg = readq(ptp->reg_base + PTP_CLOCK_CFG);

drivers/net/ethernet/marvell/octeontx2/af/ptp.c

583

clock_cfg = readq(ptp->reg_base + PTP_CLOCK_CFG);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

108

reg_val = readq(reg);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3458

ret = (readq(base + 0x10) >> 32) & 0xffff;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

942

lbk_const = readq(base + LBK_CONST);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

689

return readq(rvu->afreg_base + ((block << 28) | offset));

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

699

return readq(rvu->pfreg_base + offset);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

382

cfg = readq(base + offset);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

42

*val = readq(lmt_map_base + index);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

424

lbk_const = readq(base + LBK_CONST);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

607

lmt_addr = readq(lmt_map_base + index);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

611

val = readq(lmt_map_base + index);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

623

lmt_addr = readq(lmt_map_base + index);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

627

val = readq(lmt_map_base + index);

drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h

725

return readq(addr);

drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c

631

base = readq(pf->reg_base + RVU_PF_VF_BAR4_ADDR);

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_ethtool.c

111

readq(priv->base + MLXBF_GIGE_RX_DIN_DROP_COUNTER));

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_ethtool.c

114

readq(priv->base + MLXBF_GIGE_RX_PASS_COUNTER_ALL));

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_ethtool.c

116

readq(priv->base + MLXBF_GIGE_RX_DISC_COUNTER_ALL));

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_intr.c

20

int_status = readq(priv->base + MLXBF_GIGE_INT_STATUS);

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c

100

p->rx_filter_discard_pkts += readq(priv->base +

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c

111

control = readq(priv->base + MLXBF_GIGE_CONTROL);

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c

123

control = readq(priv->base + MLXBF_GIGE_CONTROL);

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c

139

control = readq(priv->base + MLXBF_GIGE_CONTROL);

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c

271

readq(priv->base + MLXBF_GIGE_RX_DIN_DROP_COUNTER);

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c

425

priv->hw_version = readq(base + MLXBF_GIGE_VERSION);

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c

96

p->rx_din_dropped_pkts += readq(priv->base +

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c

98

p->rx_filter_passed_pkts += readq(priv->base +

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_rx.c

103

control = readq(base + MLXBF_GIGE_CONTROL);

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_rx.c

173

data = readq(priv->base + MLXBF_GIGE_RX);

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_rx.c

189

data = readq(priv->base + MLXBF_GIGE_INT_MASK);

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_rx.c

19

data = readq(base + MLXBF_GIGE_RX_MAC_FILTER_GENERAL);

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_rx.c

194

data = readq(priv->base + MLXBF_GIGE_RX_DMA);

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_rx.c

225

data = readq(priv->base + MLXBF_GIGE_RX_DMA);

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_rx.c

268

rx_pi = readq(priv->base + MLXBF_GIGE_RX_WQE_PI);

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_rx.c

29

data = readq(base + MLXBF_GIGE_RX_MAC_FILTER_GENERAL);

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_rx.c

312

rx_ci = readq(priv->base + MLXBF_GIGE_RX_CQE_PACKET_CI);

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_rx.c

358

data = readq(priv->base + MLXBF_GIGE_INT_MASK);

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_rx.c

41

control = readq(base + MLXBF_GIGE_CONTROL);

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_rx.c

53

control = readq(base + MLXBF_GIGE_CONTROL);

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_rx.c

74

*dmac = readq(base + MLXBF_GIGE_RX_MAC_FILTER +

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_rx.c

85

control = readq(base + MLXBF_GIGE_CONTROL);

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_tx.c

134

tx_status = readq(priv->base + MLXBF_GIGE_TX_STATUS);

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_tx.c

137

tx_ci = readq(priv->base + MLXBF_GIGE_TX_CONSUMER_INDEX);

drivers/net/ethernet/microsoft/mana/gdma_main.c

40

return readq(g->bar0_va + offset);

drivers/net/ethernet/netronome/nfp/nfp_net.h

812

return readq(nn->dp.ctrl_bar + off);

drivers/net/ethernet/netronome/nfp/nfp_net_ethtool.c

1003

id_word = readq(mem + i * 2);

drivers/net/ethernet/netronome/nfp/nfp_net_ethtool.c

1035

*data++ = readq(mem + i * 8);

drivers/net/ethernet/netronome/nfp/nfp_net_ethtool.c

1039

*data++ = readq(mem + NFP_NET_CFG_RXR_STATS(i));

drivers/net/ethernet/netronome/nfp/nfp_net_ethtool.c

1040

*data++ = readq(mem + NFP_NET_CFG_RXR_STATS(i) + 8);

drivers/net/ethernet/netronome/nfp/nfp_net_ethtool.c

1041

*data++ = readq(mem + NFP_NET_CFG_TXR_STATS(i));

drivers/net/ethernet/netronome/nfp/nfp_net_ethtool.c

1042

*data++ = readq(mem + NFP_NET_CFG_TXR_STATS(i) + 8);

drivers/net/ethernet/netronome/nfp/nfp_net_ethtool.c

1084

*data++ = readq(port->eth_stats + nfp_mac_et_stats[i].off);

drivers/net/ethernet/netronome/nfp/nfp_net_ethtool.c

977

*data++ = readq(mem + nfp_net_et_stats[i].off);

drivers/net/ethernet/netronome/nfp/nfp_net_ethtool.c

980

*data++ = readq(mem + NFP_NET_CFG_RXR_STATS(i));

drivers/net/ethernet/netronome/nfp/nfp_net_ethtool.c

981

*data++ = readq(mem + NFP_NET_CFG_RXR_STATS(i) + 8);

drivers/net/ethernet/netronome/nfp/nfp_net_ethtool.c

982

*data++ = readq(mem + NFP_NET_CFG_TXR_STATS(i));

drivers/net/ethernet/netronome/nfp/nfp_net_ethtool.c

983

*data++ = readq(mem + NFP_NET_CFG_TXR_STATS(i) + 8);

drivers/net/ethernet/netronome/nfp/nfp_net_repr.c

64

stats->tx_packets = readq(mem + NFP_MAC_STATS_TX_FRAMES_TRANSMITTED_OK);

drivers/net/ethernet/netronome/nfp/nfp_net_repr.c

65

stats->tx_bytes = readq(mem + NFP_MAC_STATS_TX_OUT_OCTETS);

drivers/net/ethernet/netronome/nfp/nfp_net_repr.c

66

stats->tx_dropped = readq(mem + NFP_MAC_STATS_TX_OUT_ERRORS);

drivers/net/ethernet/netronome/nfp/nfp_net_repr.c

68

stats->rx_packets = readq(mem + NFP_MAC_STATS_RX_FRAMES_RECEIVED_OK);

drivers/net/ethernet/netronome/nfp/nfp_net_repr.c

69

stats->rx_bytes = readq(mem + NFP_MAC_STATS_RX_IN_OCTETS);

drivers/net/ethernet/netronome/nfp/nfp_net_repr.c

70

stats->rx_dropped = readq(mem + NFP_MAC_STATS_RX_IN_ERRORS);

drivers/net/ethernet/netronome/nfp/nfp_net_repr.c

80

stats->tx_packets = readq(port->vnic + NFP_NET_CFG_STATS_RX_FRAMES);

drivers/net/ethernet/netronome/nfp/nfp_net_repr.c

81

stats->tx_bytes = readq(port->vnic + NFP_NET_CFG_STATS_RX_OCTETS);

drivers/net/ethernet/netronome/nfp/nfp_net_repr.c

82

stats->tx_dropped = readq(port->vnic + NFP_NET_CFG_STATS_RX_DISCARDS);

drivers/net/ethernet/netronome/nfp/nfp_net_repr.c

84

stats->rx_packets = readq(port->vnic + NFP_NET_CFG_STATS_TX_FRAMES);

drivers/net/ethernet/netronome/nfp/nfp_net_repr.c

85

stats->rx_bytes = readq(port->vnic + NFP_NET_CFG_STATS_TX_OCTETS);

drivers/net/ethernet/netronome/nfp/nfp_net_repr.c

86

stats->rx_dropped = readq(port->vnic + NFP_NET_CFG_STATS_TX_DISCARDS);

drivers/net/ethernet/pensando/ionic/ionic_lif.c

3928

qti->features = readq(&q_ident->features);

drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c

1399

*data = readq(addr);

drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c

1418

*data = readq(addr);

drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.c

1260

*data = readq(addr);

drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.c

1279

*data = readq(addr);

drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.c

35

#ifndef readq

drivers/net/ethernet/rocker/rocker_main.c

119

readq((rocker)->hw_addr + (ROCKER_ ## reg))

drivers/net/ethernet/sun/niu.c

100

#define nr64_pcs(reg) readq(np->regs + np->pcs_off + (reg))

drivers/net/ethernet/sun/niu.c

103

#define nr64_xpcs(reg) readq(np->regs + np->xpcs_off + (reg))

drivers/net/ethernet/sun/niu.c

69

#ifndef readq

drivers/net/ethernet/sun/niu.c

91

#define nr64(reg) readq(np->regs + (reg))

drivers/net/ethernet/sun/niu.c

94

#define nr64_mac(reg) readq(np->mac_regs + (reg))

drivers/net/ethernet/sun/niu.c

97

#define nr64_ipp(reg) readq(np->regs + np->ipp_off + (reg))

drivers/net/ieee802154/ca8210.c

2538

priv->test.readq,

drivers/net/ieee802154/ca8210.c

2617

poll_wait(filp, &priv->test.readq, ptable);

drivers/net/ieee802154/ca8210.c

2621

priv->test.readq,

drivers/net/ieee802154/ca8210.c

282

wait_queue_head_t readq;

drivers/net/ieee802154/ca8210.c

2952

init_waitqueue_head(&test->readq);

drivers/net/ieee802154/ca8210.c

599

wake_up_interruptible(&priv->test.readq);

drivers/net/mdio/mdio-cavium.h

114

#define oct_mdio_readq(addr) readq(addr)

drivers/ntb/hw/amd/ntb_hw_amd.h

62

#ifdef readq

drivers/ntb/hw/amd/ntb_hw_amd.h

63

#define read64 readq

drivers/nvme/host/apple.c

1158

anv->ctrl.cap = readq(anv->mmio_nvme + NVME_REG_CAP);

drivers/nvme/host/apple.c

1255

*val = readq(ctrl_to_apple_nvme(ctrl)->mmio_nvme + off);

drivers/parisc/lba_pci.c

138

#define READ_REG64(addr) readq(addr)

drivers/parisc/sba_iommu.c

134

#define READ_REG64(addr) readq(addr)

drivers/parport/parport_ip32.c

647

ctrl = readq(&mace->perif.ctrl.parport.cntlstat);

drivers/parport/parport_ip32.c

652

ctx_a = readq(&mace->perif.ctrl.parport.context_a);

drivers/parport/parport_ip32.c

653

ctx_b = readq(&mace->perif.ctrl.parport.context_b);

drivers/parport/parport_ip32.c

654

ctrl = readq(&mace->perif.ctrl.parport.cntlstat);

drivers/parport/parport_ip32.c

655

diag = readq(&mace->perif.ctrl.parport.diagnostic);

drivers/pci/controller/pci-thunder-pem.c

236

read_val = readq(pem_pci->pem_reg_base + PEM_CFG_RD);

drivers/pci/controller/pci-thunder-pem.c

245

read_val = readq(pem_pci->pem_reg_base + PEM_CFG_RD);

drivers/pci/controller/pci-thunder-pem.c

55

read_val = readq(pem_pci->pem_reg_base + PEM_CFG_RD);

drivers/pci/controller/pci-thunder-pem.c

84

tmp_val = readq(pem_pci->pem_reg_base + PEM_CFG_RD);

drivers/pci/controller/vmd.c

602

phys1 = readq(membar2 + MB2_SHADOW_OFFSET);

drivers/pci/controller/vmd.c

603

phys2 = readq(membar2 + MB2_SHADOW_OFFSET + 8);

drivers/pci/hotplug/octep_hp.c

271

intr_val = readq(hp_ctrl->base + OCTEP_HP_INTR_OFFSET(type));

drivers/peci/request.c

442

__read_pkg_config(readq, u64);

drivers/perf/arm-ccn.c

839

#ifdef readq

drivers/perf/arm-ccn.c

840

res = readq(ccn->dt.base + CCN_DT_PMCCNTR);

drivers/perf/arm_cspmu/arm_cspmu.c

731

readq(counter_addr) :

drivers/perf/arm_smmuv3_pmu.c

215

value = readq(smmu_pmu->reloc_base + SMMU_PMCG_EVCNTR(idx, 8));

drivers/perf/arm_smmuv3_pmu.c

695

ovsr = readq(smmu_pmu->reloc_base + SMMU_PMCG_OVSSET0);

drivers/perf/cxl_pmu.c

132

val = readq(base + CXL_PMU_CAP_REG);

drivers/perf/cxl_pmu.c

156

val = readq(base + CXL_PMU_COUNTER_CFG_REG(i));

drivers/perf/cxl_pmu.c

170

eval = readq(base + CXL_PMU_EVENT_CAP_REG(group_idx));

drivers/perf/cxl_pmu.c

199

eval = readq(base + CXL_PMU_EVENT_CAP_REG(j));

drivers/perf/cxl_pmu.c

641

cfg = readq(base + CXL_PMU_COUNTER_CFG_REG(hwc->idx));

drivers/perf/cxl_pmu.c

681

return readq(base + CXL_PMU_COUNTER_REG(event->hw.idx));

drivers/perf/cxl_pmu.c

722

cfg = readq(base + CXL_PMU_COUNTER_CFG_REG(hwc->idx));

drivers/perf/cxl_pmu.c

775

overflowed = readq(base + CXL_PMU_OVERFLOW_REG);

drivers/perf/hisilicon/hisi_uncore_cpa_pmu.c

52

return readq(cpa_pmu->base + hisi_cpa_pmu_get_counter_offset(hwc->idx));

drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c

94

return readq(ddrc_pmu->base + DDRC_EVENT_CNTn(regs->event_cnt, hwc->idx));

drivers/perf/hisilicon/hisi_uncore_hha_pmu.c

172

return readq(hha_pmu->base + hisi_hha_pmu_get_counter_offset(hwc->idx));

drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c

170

return readq((void __iomem *)hwc->event_base + reg);

drivers/perf/hisilicon/hisi_uncore_mn_pmu.c

77

return readq(mn_pmu->base + HISI_MN_CNTR_REGn(reg_info->event_cntr0, hwc->idx));

drivers/perf/hisilicon/hisi_uncore_noc_pmu.c

96

return readq(noc_pmu->base + NOC_PMU_EVENT_CNTRn(reg_info->event_cntr0, hwc->idx));

drivers/perf/hisilicon/hisi_uncore_pa_pmu.c

159

return readq(pa_pmu->base + hisi_pa_pmu_get_counter_offset(hwc->idx));

drivers/perf/hisilicon/hisi_uncore_sllc_pmu.c

219

return readq(sllc_pmu->base + SLLC_EVENT_CNTn(regs->event_cnt0, hwc->idx));

drivers/perf/hisilicon/hisi_uncore_uc_pmu.c

285

return readq(uc_pmu->base + HISI_UC_CNTR_REGn(hwc->idx));

drivers/perf/hisilicon/hns3_pmu.c

755

return readq(hns3_pmu->base + offset);

drivers/perf/marvell_cn10k_tad_pmu.c

62

new += readq(tad_pmu->regions[i].base +

drivers/perf/nvidia_t410_cmem_latency_pmu.c

201

return readq(cmem_lat_pmu->base[inst] + CMEM_LAT_STATUS);

drivers/perf/nvidia_t410_cmem_latency_pmu.c

219

return readq(cmem_lat_pmu->base[instance] + CMEM_LAT_CYCLE_CNTR);

drivers/perf/nvidia_t410_cmem_latency_pmu.c

239

val += readq(cmem_lat_pmu->base[i] + CMEM_LAT_MC0_REQ_CNTR);

drivers/perf/nvidia_t410_cmem_latency_pmu.c

240

val += readq(cmem_lat_pmu->base[i] + CMEM_LAT_MC1_REQ_CNTR);

drivers/perf/nvidia_t410_cmem_latency_pmu.c

241

val += readq(cmem_lat_pmu->base[i] + CMEM_LAT_MC2_REQ_CNTR);

drivers/perf/nvidia_t410_cmem_latency_pmu.c

264

val += readq(cmem_lat_pmu->base[i] + CMEM_LAT_MC0_AOR_CNTR);

drivers/perf/nvidia_t410_cmem_latency_pmu.c

265

val += readq(cmem_lat_pmu->base[i] + CMEM_LAT_MC1_AOR_CNTR);

drivers/perf/nvidia_t410_cmem_latency_pmu.c

266

val += readq(cmem_lat_pmu->base[i] + CMEM_LAT_MC2_AOR_CNTR);

drivers/perf/starfive_starlink_pmu.c

190

val = readq(starlink_pmu->pmu_base + STARLINK_PMU_INTERRUPT_ENABLE);

drivers/perf/starfive_starlink_pmu.c

218

val = readq(starlink_pmu->pmu_base + STARLINK_PMU_CONTROL);

drivers/perf/starfive_starlink_pmu.c

222

val = readq(starlink_pmu->pmu_base + STARLINK_PMU_INTERRUPT_ENABLE);

drivers/perf/starfive_starlink_pmu.c

243

new_raw_count = readq(starlink_pmu->pmu_base +

drivers/perf/starfive_starlink_pmu.c

246

new_raw_count = readq(starlink_pmu->pmu_base +

drivers/perf/starfive_starlink_pmu.c

411

overflow_status = readq(starlink_pmu->pmu_base +

drivers/platform/mellanox/mlxbf-bootctl.c

421

idx = readq(mlxbf_rsh_scratch_buf_ctl);

drivers/platform/mellanox/mlxbf-bootctl.c

974

cnt = readq(mlxbf_rsh_boot_cnt);

drivers/platform/mellanox/mlxbf-bootctl.c

983

data = readq(mlxbf_rsh_boot_data);

drivers/platform/mellanox/mlxbf-pmc.c

1040

*result = readq(addr);

drivers/platform/mellanox/mlxbf-tmfifo.c

1297

ctl = readq(fifo->tx.ctl);

drivers/platform/mellanox/mlxbf-tmfifo.c

1309

ctl = readq(fifo->rx.ctl);

drivers/platform/mellanox/mlxbf-tmfifo.c

515

sts = readq(fifo->rx.sts);

drivers/platform/mellanox/mlxbf-tmfifo.c

532

sts = readq(fifo->tx.sts);

drivers/platform/mellanox/mlxbf-tmfifo.c

616

data = readq(fifo->rx.data);

drivers/platform/mellanox/mlxbf-tmfifo.c

668

*(u64 *)&hdr = readq(fifo->rx.data);

drivers/platform/x86/ibm_rtl.c

277

if ((readq(&tmp->signature) & RTL_MASK) == RTL_SIGNATURE) {

drivers/platform/x86/intel/plr_tpmi.c

115

return readq(plr_die->base + offset);

drivers/platform/x86/intel/pmt/class.c

51

buf[i] = readq(&from[i]);

drivers/platform/x86/intel/pmt/class.c

56

u64 tmp = readq(&from[i]);

drivers/platform/x86/intel/sdsi.c

139

to[i] = readq(&from[i]);

drivers/platform/x86/intel/sdsi.c

293

control = readq(priv->control_addr);

drivers/platform/x86/intel/sdsi.c

354

return !!FIELD_GET(CTRL_INBAND_LOCK, readq(priv->control_addr));

drivers/platform/x86/intel/sdsi.c

647

priv->features = readq(priv->regs_addr + SDSI_ENABLED_FEATURES_OFFSET);

drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c

1009

val = readq(power_domain_info->sst_base +\

drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c

1756

pd_info->saved_sst_cp_control = readq(cp_base + SST_CP_CONTROL_OFFSET);

drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c

1766

pd_info->saved_pp_control = readq(pd_info->sst_base +

drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c

347

*((u64 *)&pd_info->feature_offsets) = readq(pd_info->sst_base +

drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c

351

perf_level_offsets = readq(pd_info->sst_base + pd_info->sst_header.pp_offset +

drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c

372

*((u64 *)&pd_info->sst_header) = readq(pd_info->sst_base);

drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c

390

*((u64 *)&pd_info->cp_header) = readq(pd_info->sst_base + pd_info->sst_header.cp_offset);

drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c

393

*((u64 *)&pd_info->pp_header) = readq(pd_info->sst_base + pd_info->sst_header.pp_offset);

drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c

572

val = readq(power_domain_info->sst_base + power_domain_info->sst_header.cp_offset +\

drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c

584

val = readq(power_domain_info->sst_base +\

drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c

766

val = readq(power_domain_info->sst_base +

drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c

791

val = readq(power_domain_info->sst_base + power_domain_info->sst_header.pp_offset +\

drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c

803

val = readq(power_domain_info->sst_base + power_domain_info->sst_header.pp_offset +\

drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c

816

val = readq(power_domain_info->sst_base +\

drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c

829

val = readq(power_domain_info->sst_base +\

drivers/platform/x86/intel/telemetry/pltdrv.c

657

timestamp_prev = readq(unit_config->regmap);

drivers/platform/x86/intel/telemetry/pltdrv.c

663

ssram_region->start_time = readq(unit_config->regmap +

drivers/platform/x86/intel/telemetry/pltdrv.c

668

readq(unit_config->regmap + TELEM_SSRAM_EVTLOG_OFFSET +

drivers/platform/x86/intel/telemetry/pltdrv.c

672

timestamp_next = readq(unit_config->regmap);

drivers/platform/x86/intel/uncore-frequency/uncore-frequency-tpmi.c

114

ctrl = readq(cluster_info->cluster_base + UNCORE_CONTROL_INDEX);

drivers/platform/x86/intel/uncore-frequency/uncore-frequency-tpmi.c

236

control = readq(cluster_info->cluster_base + UNCORE_CONTROL_INDEX);

drivers/platform/x86/intel/uncore-frequency/uncore-frequency-tpmi.c

278

control = readq(cluster_info->cluster_base + UNCORE_CONTROL_INDEX);

drivers/platform/x86/intel/uncore-frequency/uncore-frequency-tpmi.c

352

status = readq((u8 __iomem *)cluster_info->cluster_base + UNCORE_STATUS_INDEX);

drivers/platform/x86/intel/uncore-frequency/uncore-frequency-tpmi.c

373

status = readq((u8 __iomem *)cluster_info->cluster_base + UNCORE_STATUS_INDEX);

drivers/platform/x86/intel/uncore-frequency/uncore-frequency-tpmi.c

640

header = readq(pd_info->uncore_base);

drivers/platform/x86/intel/uncore-frequency/uncore-frequency-tpmi.c

680

cluster_offset = readq(pd_info->uncore_base +

drivers/platform/x86/intel/uncore-frequency/uncore-frequency-tpmi.c

94

control = readq(cluster_info->cluster_base + UNCORE_CONTROL_INDEX);

drivers/platform/x86/intel/vsec_tpmi.c

700

feature_header = readq(info_mem);

drivers/platform/x86/intel_ips.c

232

#define thm_readq(off) readq(ips->regmap + (off))

drivers/powercap/intel_rapl_tpmi.c

122

ra->value = readq(ra->reg.mmio);

drivers/powercap/intel_rapl_tpmi.c

135

val = readq(ra->reg.mmio);

drivers/powercap/intel_rapl_tpmi.c

204

u64 tpmi_domain_header = readq(trp->base + offset);

drivers/powercap/intel_rapl_tpmi.c

250

tpmi_domain_info = readq(trp->base + offset + TPMI_RAPL_REG_DOMAIN_INFO * 8);

drivers/rpmsg/rpmsg_char.c

121

wake_up_interruptible(&eptdev->readq);

drivers/rpmsg/rpmsg_char.c

136

wake_up_interruptible(&eptdev->readq);

drivers/rpmsg/rpmsg_char.c

229

if (wait_event_interruptible(eptdev->readq,

drivers/rpmsg/rpmsg_char.c

307

poll_wait(filp, &eptdev->readq, wait);

drivers/rpmsg/rpmsg_char.c

429

init_waitqueue_head(&eptdev->readq);

drivers/rpmsg/rpmsg_char.c

71

wait_queue_head_t readq;

drivers/rpmsg/rpmsg_char.c

92

wake_up_interruptible(&eptdev->readq);

drivers/scsi/csiostor/csio_defs.h

53

#ifndef readq

drivers/scsi/csiostor/csio_hw.h

564

#define csio_rd_reg64(_h, _r) readq(csio_reg((_h)->regstart, (_r)))

drivers/scsi/fnic/vnic_dev.c

291

err = dev_cmd_err[(int)readq(&devcmd->args[0])];

drivers/scsi/fnic/vnic_dev.c

299

*a0 = readq(&devcmd->args[0]);

drivers/scsi/fnic/vnic_dev.c

300

*a1 = readq(&devcmd->args[1]);

drivers/scsi/fnic/vnic_dev.h

58

#ifndef readq

drivers/scsi/qla2xxx/qla_nx.c

705

*(u64 *)data = readq(addr);

drivers/scsi/qla4xxx/ql4_nx.c

761

*(u64 *)data = readq(addr);

drivers/scsi/smartpqi/smartpqi_init.c

3114

signature = readq(&pqi_registers->signature);

drivers/scsi/smartpqi/smartpqi_init.c

4428

readq(&pqi_registers->admin_iq_pi_offset);

drivers/scsi/smartpqi/smartpqi_init.c

4431

readq(&pqi_registers->admin_oq_ci_offset);

drivers/scsi/snic/vnic_dev.h

14

#ifndef readq

drivers/spi/spi-altera-dfl.c

111

v = readq(base + SPI_CORE_PARAMETER);

drivers/spi/spi-altera-dfl.c

59

while ((readq(base + INDIRECT_ADDR) & INDIRECT_RD) &&

drivers/spi/spi-altera-dfl.c

68

v = readq(base + INDIRECT_RD_DATA);

drivers/spi/spi-altera-dfl.c

85

while ((readq(base + INDIRECT_ADDR) & INDIRECT_WR) &&

drivers/spi/spi-amd.c

158

return readq((u8 __iomem *)amd_spi->io_remap_addr + idx);

drivers/spi/spi-cadence-xspi.c

1007

u64 d = readq(cdns_xspi->xferbase +

drivers/spi/spi-cadence-xspi.c

1024

u64 d = readq(cdns_xspi->xferbase +

drivers/spi/spi-cadence-xspi.c

657

u64 b = readq(addr);

drivers/spi/spi-cadence-xspi.c

666

tmp_buf = readq(addr);

drivers/spi/spi-cavium.c

118

u64 v = readq(p->register_base + OCTEON_SPI_DAT0(p) + (8 * i));

drivers/spi/spi-cavium.c

24

mpi_sts.u64 = readq(p->register_base + OCTEON_SPI_STS(p));

drivers/spi/spi-cavium.c

90

u64 v = readq(p->register_base + OCTEON_SPI_DAT0(p) + (8 * i));

drivers/thermal/intel/int340x_thermal/platform_temperature_control.c

110

reg_val = readq((void __iomem *) (proc_priv->mmio_base + data->offset));

drivers/thermal/intel/int340x_thermal/platform_temperature_control.c

139

reg_val = readq((void __iomem *) (proc_priv->mmio_base + offset));

drivers/thermal/intel/int340x_thermal/processor_thermal_device_pci.c

145

status = readq(proc_priv->mmio_base + SOC_WT_RES_INT_STATUS_OFFSET);

drivers/thermal/intel/int340x_thermal/processor_thermal_mbox.c

82

*resp = readq(proc_priv->mmio_base + MBOX_OFFSET_DATA);

drivers/thermal/intel/int340x_thermal/processor_thermal_power_floor.c

117

status = readq(proc_priv->mmio_base + SOC_WT_RES_INT_STATUS_OFFSET);

drivers/thermal/intel/int340x_thermal/processor_thermal_power_floor.c

42

status = readq(proc_priv->mmio_base + SOC_WT_RES_INT_STATUS_OFFSET);

drivers/thermal/intel/int340x_thermal/processor_thermal_power_floor.c

94

int_status = readq(proc_priv->mmio_base + SOC_WT_RES_INT_STATUS_OFFSET);

drivers/thermal/intel/int340x_thermal/processor_thermal_rapl.c

105

ra->value = readq(ra->reg.mmio);

drivers/thermal/intel/int340x_thermal/processor_thermal_rapl.c

117

val = readq(ra->reg.mmio);

drivers/thermal/intel/int340x_thermal/processor_thermal_soc_slider.c

167

return readq(proc_priv->mmio_base + SOC_POWER_SLIDER_OFFSET);

drivers/thermal/intel/int340x_thermal/processor_thermal_wt_hint.c

242

int_status = readq(proc_priv->mmio_base + SOC_WT_RES_INT_STATUS_OFFSET);

drivers/thermal/intel/int340x_thermal/processor_thermal_wt_hint.c

255

status = readq(proc_priv->mmio_base + SOC_WT_RES_INT_STATUS_OFFSET);

drivers/thermal/intel/int340x_thermal/processor_thermal_wt_hint.c

71

status = readq(proc_priv->mmio_base + SOC_WT_RES_INT_STATUS_OFFSET);

drivers/vdpa/octeon_ep/octep_vdpa_main.c

718

val = readq(oct_hw->base[OCTEP_HW_MBOX_BAR] + OCTEP_VF_IN_CTRL(0));

drivers/vdpa/octeon_ep/octep_vdpa_main.c

837

val = readq(addr + OCTEP_EPF_RINFO(0));

drivers/vdpa/octeon_ep/octep_vdpa_main.c

905

val = readq(addr + OCTEP_EPF_RINFO(0));

drivers/vfio/fsl-mc/vfio_fsl_mc.c

264

data[i] = readq(region->ioaddr + i * sizeof(uint64_t));

drivers/watchdog/marvell_gti_wdt.c

127

regval = readq(priv->base + GTI_CWD_WDOG(priv->wdt_timer_idx));

drivers/watchdog/marvell_gti_wdt.c

144

regval = readq(priv->base + GTI_CWD_WDOG(priv->wdt_timer_idx));

drivers/watchdog/marvell_gti_wdt.c

178

regval = readq(priv->base + GTI_CWD_WDOG(priv->wdt_timer_idx));

include/asm-generic/io.h

240

#ifndef readq

include/asm-generic/io.h

241

#define readq readq

include/asm-generic/io.h

366

#if defined(readq) && !defined(readq_relaxed)

include/asm-generic/io.h

915

return readq(addr);

include/asm-generic/io.h

975

return swab64(readq(addr));

include/linux/coresight.h

554

return readq(csa->base + offset);

include/linux/io-64-nonatomic-hi-lo.h

42

#ifndef readq

include/linux/io-64-nonatomic-lo-hi.h

42

#ifndef readq

include/linux/iopoll.h

234

readx_poll_timeout(readq, addr, val, cond, delay_us, timeout_us)

include/linux/iopoll.h

237

readx_poll_timeout_atomic(readq, addr, val, cond, delay_us, timeout_us)

include/linux/iosys-map.h

347

u64: val_ = readq(vaddr_iomem_)

include/sound/hdaudio.h

464

#define snd_hdac_reg_readq(bus, addr) readq(addr)

lib/iomap.c

158

IO_COND(addr, return pio_read64_lo_hi(port), return readq(addr));

lib/iomap.c

165

IO_COND(addr, return pio_read64_hi_lo(port), return readq(addr));

lib/iomap.c

71

#define mmio_read64be(addr) swab64(readq(addr))

net/qrtr/tun.c

119

poll_wait(filp, &tun->readq, wait);

net/qrtr/tun.c

16

wait_queue_head_t readq;

net/qrtr/tun.c

26

wake_up_interruptible(&tun->readq);

net/qrtr/tun.c

41

init_waitqueue_head(&tun->readq);

net/qrtr/tun.c

71

if (wait_event_interruptible(tun->readq,

rust/helpers/io.c

40

return readq(addr);

sound/core/seq/oss/seq_oss_device.h

93

struct seq_oss_readq *readq;

sound/core/seq/oss/seq_oss_event.c

441

if (dp->readq == NULL)

sound/core/seq/oss/seq_oss_event.c

443

snd_seq_oss_readq_put_event(dp->readq, rec);

sound/core/seq/oss/seq_oss_init.c

226

dp->readq = snd_seq_oss_readq_new(dp, maxqlen);

sound/core/seq/oss/seq_oss_init.c

227

if (!dp->readq) {

sound/core/seq/oss/seq_oss_init.c

390

snd_seq_oss_readq_delete(dp->readq);

sound/core/seq/oss/seq_oss_init.c

439

if (dp->readq)

sound/core/seq/oss/seq_oss_init.c

440

snd_seq_oss_readq_clear(dp->readq);

sound/core/seq/oss/seq_oss_init.c

490

if (is_read_mode(dp->file_mode) && dp->readq)

sound/core/seq/oss/seq_oss_init.c

491

snd_seq_oss_readq_info_read(dp->readq, buf);

sound/core/seq/oss/seq_oss_ioctl.c

104

if (dp->readq == NULL || ! is_read_mode(dp->file_mode))

sound/core/seq/oss/seq_oss_ioctl.c

106

return put_user(dp->readq->qlen, p) ? -EFAULT : 0;

sound/core/seq/oss/seq_oss_ioctl.c

162

if (dp->readq == NULL || !is_read_mode(dp->file_mode))

sound/core/seq/oss/seq_oss_ioctl.c

170

dp->readq->pre_event_timeout = val;

sound/core/seq/oss/seq_oss_midi.c

489

if (dp->readq == NULL)

sound/core/seq/oss/seq_oss_midi.c

559

snd_seq_oss_readq_put_timestamp(dp->readq, ev->time.tick, dp->seq_mode);

sound/core/seq/oss/seq_oss_midi.c

560

snd_seq_oss_readq_put_event(dp->readq, &ossev);

sound/core/seq/oss/seq_oss_midi.c

574

snd_seq_oss_readq_put_timestamp(dp->readq, ev->time.tick, dp->seq_mode);

sound/core/seq/oss/seq_oss_midi.c

578

snd_seq_oss_readq_sysex(dp->readq, mdev->seq_device, ev);

sound/core/seq/oss/seq_oss_midi.c

583

snd_seq_oss_readq_puts(dp->readq, mdev->seq_device, msg, len);

sound/core/seq/oss/seq_oss_readq.c

107

struct seq_oss_readq *readq;

sound/core/seq/oss/seq_oss_readq.c

115

return snd_seq_oss_readq_puts(ctx->readq, ctx->dev, buf, count);

sound/core/seq/oss/seq_oss_readq.c

122

.readq = q,

sound/core/seq/oss/seq_oss_readq.h

32

void snd_seq_oss_readq_clear(struct seq_oss_readq *readq);

sound/core/seq/oss/seq_oss_readq.h

33

unsigned int snd_seq_oss_readq_poll(struct seq_oss_readq *readq, struct file *file, poll_table *wait);

sound/core/seq/oss/seq_oss_readq.h

34

int snd_seq_oss_readq_puts(struct seq_oss_readq *readq, int dev, unsigned char *data, int len);

sound/core/seq/oss/seq_oss_readq.h

37

int snd_seq_oss_readq_put_event(struct seq_oss_readq *readq, union evrec *ev);

sound/core/seq/oss/seq_oss_readq.h

38

int snd_seq_oss_readq_put_timestamp(struct seq_oss_readq *readq, unsigned long curt, int seq_mode);

sound/core/seq/oss/seq_oss_rw.c

193

if (dp->readq && is_read_mode(dp->file_mode)) {

sound/core/seq/oss/seq_oss_rw.c

194

if (snd_seq_oss_readq_poll(dp->readq, file, wait))

sound/core/seq/oss/seq_oss_rw.c

33

struct seq_oss_readq *readq = dp->readq;

sound/core/seq/oss/seq_oss_rw.c

39

if (readq == NULL || ! is_read_mode(dp->file_mode))

sound/core/seq/oss/seq_oss_rw.c

43

snd_seq_oss_readq_lock(readq, flags);

sound/core/seq/oss/seq_oss_rw.c

44

err = snd_seq_oss_readq_pick(readq, &rec);

sound/core/seq/oss/seq_oss_rw.c

47

snd_seq_oss_readq_unlock(readq, flags);

sound/core/seq/oss/seq_oss_rw.c

48

snd_seq_oss_readq_wait(readq);

sound/core/seq/oss/seq_oss_rw.c

49

snd_seq_oss_readq_lock(readq, flags);

sound/core/seq/oss/seq_oss_rw.c

53

err = snd_seq_oss_readq_pick(readq, &rec);

sound/core/seq/oss/seq_oss_rw.c

56

snd_seq_oss_readq_unlock(readq, flags);

sound/core/seq/oss/seq_oss_rw.c

62

snd_seq_oss_readq_unlock(readq, flags);

sound/core/seq/oss/seq_oss_rw.c

65

snd_seq_oss_readq_free(readq);

sound/core/seq/oss/seq_oss_rw.c

66

snd_seq_oss_readq_unlock(readq, flags);

sound/mips/sgio2audio.c

112

val = readq(&mace->perif.audio.codec_control); /* flush bus */

sound/mips/sgio2audio.c

115

val = readq(&mace->perif.audio.codec_read);

sound/mips/sgio2audio.c

134

val = readq(&mace->perif.audio.codec_control); /* flush bus */

sound/mips/sgio2audio.c

355

src_pos = readq(&mace->perif.audio.chan[ch].read_ptr);

sound/mips/sgio2audio.c

401

dst_pos = readq(&mace->perif.audio.chan[ch].write_ptr);

sound/mips/sgio2audio.c

474

readq(&mace->perif.audio.chan[ch].depth) - 32;

sound/mips/sgio2audio.c

493

readq(&mace->perif.audio.chan[ch].depth) - 32;

sound/mips/sgio2audio.c

788

if (!(readq(&mace->perif.audio.control) & AUDIO_CONTROL_CODEC_PRESENT))

sound/soc/loongson/loongson_dma.c

108

val |= (readq(order_reg) & DMA_ORDER_CTRL_MASK);

sound/soc/loongson/loongson_dma.c

121

val = readq(order_reg) | DMA_ORDER_STOP;

sound/soc/loongson/loongson_dma.c

81

val |= (readq(order_reg) & DMA_ORDER_CTRL_MASK);

sound/soc/sof/iomem-utils.c

46

return readq(addr);

sound/soc/sof/ops.h

364

return readq(sdev->bar[bar] + offset);

tools/arch/x86/include/asm/io.h

57

build_mmio_read(readq, "q", u64, "=r", :"memory")

tools/arch/x86/include/asm/io.h

69

#define readq readq

tools/include/asm-generic/io.h

194

#ifndef readq

tools/include/asm-generic/io.h

195

#define readq readq

tools/include/asm-generic/io.h

301

#if defined(readq) && !defined(readq_relaxed)

tools/testing/selftests/vfio/lib/drivers/dsa/dsa.c

200

dsa->gen_cap.bits = readq(bar0 + IDXD_GENCAP_OFFSET);

tools/testing/selftests/vfio/lib/drivers/dsa/dsa.c

201

dsa->wq_cap.bits = readq(bar0 + IDXD_WQCAP_OFFSET);

tools/testing/selftests/vfio/lib/drivers/dsa/dsa.c

202

dsa->group_cap.bits = readq(bar0 + IDXD_GRPCAP_OFFSET);

tools/testing/selftests/vfio/lib/drivers/dsa/dsa.c

203

dsa->engine_cap.bits = readq(bar0 + IDXD_ENGCAP_OFFSET);

tools/testing/selftests/vfio/lib/drivers/dsa/dsa.c

205

dsa->table_offsets.bits[0] = readq(bar0 + IDXD_TABLE_OFFSET);

tools/testing/selftests/vfio/lib/drivers/dsa/dsa.c

206

dsa->table_offsets.bits[1] = readq(bar0 + IDXD_TABLE_OFFSET + 8);

tools/testing/selftests/vfio/lib/drivers/dsa/dsa.c

58

gen_cap.bits = readq(bar0 + IDXD_GENCAP_OFFSET);

tools/testing/selftests/vfio/lib/drivers/dsa/dsa.c

98

err.bits[i] = readq(reg + offsetof(union sw_err_reg, bits[i]));

tools/testing/selftests/vfio/lib/drivers/ioat/ioat.c

62

return readq(bar + IOAT_CHANSTS_OFFSET) & IOAT_CHANSTS_STATUS;