RD4
#define RD4(sc, reg) bus_read_4((sc)->res, (reg))
#define RD4(sc, reg) bus_read_4((sc)->res[0], (reg))
#define RD4(res, o) bus_read_4(res, (o))
#define RD4(res, o) bus_read_4(res, (o))
#define RD4(sc, reg) bus_read_4((sc)->res[_RES_EMAC], (reg))
RD4(struct bcm_sdhci_softc *sc, bus_size_t off)
RD4(struct bcm_sdhost_softc *sc, bus_size_t off)
RD4(struct ocotp_softc *sc, bus_size_t off)
RD4(struct ccm_softc *sc, bus_size_t off)
RD4(struct snvs_softc *sc, bus_size_t offset)
RD4(struct src_softc *sc, bus_size_t off)
RD4(struct epit_softc *sc, bus_size_t offset)
RD4(struct iomux_softc *sc, bus_size_t off)
RD4(struct spi_softc *sc, bus_size_t offset)
#define RD4(_clk, offset, val) \
#define RD4(_sc, addr) bus_read_4(_sc->res, addr)
#define RD4(_clk, offset, val) \
#define RD4(_clk, offset, val) \
#define RD4(sc, reg) SYSCON_READ_4((sc)->syscon, (reg))
#define RD4(sc, reg) bus_read_4((sc)->res, (reg))
#define RD4(sc, reg) bus_read_4((sc)->mem_res, (reg))
#define RD4(sc, reg) SYSCON_READ_4((sc)->syscon, (reg))
#define RD4(sc, reg) bus_read_4((sc)->res, (reg))
#define RD4(sc, reg) \
#define RD4(sc, reg) SYSCON_READ_4((sc)->syscon, (reg))
#define RD4(_sc, _r) bus_read_4((_sc)->mem_res, 4 * (_r))
#define RD4(_sc, _r) bus_read_4((_sc)->mem_res, 4 * (_r))
#define RD4(_sc, _r) bus_read_4((_sc)->mem_res, (_r))
#define RD4(sc, reg, val) CLKDEV_READ_4((sc)->clkdev, reg, val)
#define RD4(_sc, _r) bus_read_4((_sc)->mem_res, (_r))
#define RD4(_sc, _r) bus_read_4((_sc)->mem_res, (_r))
#define RD4(_sc, _r) bus_read_4((_sc)->mem_res, (FUSES_START + (_r)))
#define RD4(_sc, _r) bus_read_4((_sc)->mem_res, (_r))
#define RD4(_sc, _r) bus_read_4((_sc)->mem_res, (_r))
#define RD4(_sc, _b, _r) bus_read_4((_sc)->mem_res[_b], (_r))
#define RD4(_sc, _r) bus_read_4((_sc)->mem_res, (_r))
#define RD4(_sc, _r) bus_read_4((_sc)->mem_res, (_r))
RD4(struct tegra_sdhci_softc *sc, bus_size_t off)
#define RD4(_sc, _r) bus_read_4((_sc)->mem_res, (_r))
#define RD4(sc, offs) \
RD4(struct ti_sdhci_softc *sc, bus_size_t off)
#define RD4(bas, reg) \
#define RD4(sc, off) (bus_read_4((sc)->mem_res, (off)))
#define RD4(sc, off) bus_read_4((sc)->mem_res, (off))
#define RD4(sc, off) (bus_read_4((sc)->mem_res, (off)))
#define RD4(sc, off) (bus_read_4((sc)->mem_res, (off)))
#define RD4(sc, off) (bus_read_4((sc)->mem_res, (off)))
#define RD4(sc, r) bus_read_4((sc)->sc_res[0], (r))
#define RD4(sc, reg) bus_read_4((sc)->res[_RES_MAC], (reg))
#define RD4(_clk, off, val) \
#define RD4(_clk, off, val) \
#define RD4(sc, reg, val) CLKDEV_READ_4((sc)->clkdev, reg, val)
RD4(struct tegra210_pmc_softc *sc, bus_size_t r)
#define RD4(_sc, _r) bus_read_4((_sc)->mem_res, (_r))
#define RD4(_clk, offset, val) \
#define RD4(sc, off) bus_read_4((sc)->base.sc_mem, (off))
RD4(struct qoriq_therm_softc *sc, bus_size_t addr)
#define RD4(sc, reg) SYSCON_READ_4((sc)->syscon, (reg))
#define RD4(_sc, _r) bus_read_4((_sc)->mem_res, (_r))
#define RD4(_sc, _r) bus_read_4((_sc)->mem_res, (_r))
#define RD4(sc, off) (bus_read_4((sc)->mem_res, (off)))
#define RD4(_clk, off, val) \
#define RD4(_clk, off, val) \
#define RD4(_clk, off, val) \
#define RD4(_clk, off, val) \
#define RD4(_clk, off, val) \
#define RD4(_clk, off, val) \
#define RD4(sc, o) bus_read_4(sc->res[EQOS_RES_MEM], (o))
RD4(struct ffec_softc *sc, bus_size_t off)
#define RD4(sc, r) bus_read_4((sc)->sc_res[0], (r))
RD4(struct mwl_softc *sc, bus_size_t off)
RD4(struct mwl_hal_priv *mh, bus_size_t off)
RD4(struct fsl_sdhci_softc *sc, bus_size_t off)
#define RD4(slot, off) SDHCI_READ_4((slot)->bus, (slot), (off))
#define RD4 (sc->read)
#define RD4(sc, reg) \
#define RD4(sc, reg) bus_read_4((sc)->reg_mem_res, (reg))