bin/csh/csh.c
1053
reset();
bin/csh/csh.c
1124
reset();
bin/csh/csh.c
991
reset();
bin/csh/error.c
374
reset(); /* Unwind */
bin/csh/lex.c
1311
reset();
bin/csh/lex.c
1360
reset();
bin/csh/lex.c
1367
reset();
bin/csh/parse.c
184
reset(); /* throw! */
bin/csh/parse.c
80
reset();
bin/ksh/var.c
1207
set_array(const char *var, int reset, char **vals)
bin/ksh/var.c
1219
if (reset > 0)
bin/pax/tar.c
738
reset:
bin/pax/tar.c
758
goto reset;
lib/libcrypto/hmac/hmac.c
116
if (reset) {
lib/libcrypto/hmac/hmac.c
73
int i, j, reset = 0;
lib/libcrypto/hmac/hmac.c
81
reset = 1;
lib/libcrypto/hmac/hmac.c
89
reset = 1;
lib/libedit/tokenizer.c
152
FUN(tok,reset)(TYPE(Tokenizer) *tok)
lib/libz/gzguts.h
195
int reset; /* true if a reset is pending after a Z_FINISH */
lib/libz/gzlib.c
78
state->reset = 0; /* no deflateReset pending */
lib/libz/gzwrite.c
100
state->reset = 0;
lib/libz/gzwrite.c
144
state->reset = 1;
lib/libz/gzwrite.c
94
if (state->reset) {
regress/sys/arch/amd64/vmm/vcpu.c
172
off = reset - vmr->vmr_gpa;
regress/sys/arch/amd64/vmm/vcpu.c
370
printf("--- RESET VECTOR @ gpa 0x%llx ---\n", reset);
regress/sys/arch/amd64/vmm/vcpu.c
99
off_t off, reset = 0xFFFFFFF0, stack = 0x800;
sbin/iked/iked.c
320
parent_reload(struct iked *env, int reset, const char *filename)
sbin/iked/iked.c
326
log_debug("%s: level %d config file %s", __func__, reset, filename);
sbin/iked/iked.c
328
if (reset == RESET_RELOAD) {
sbin/iked/iked.c
349
config_setreset(env, reset, PROC_IKEV2);
sbin/iked/iked.c
350
config_setreset(env, reset, PROC_CERT);
sbin/restore/interactive.c
111
if (setjmp(reset) != 0) {
sbin/restore/interactive.c
59
static jmp_buf reset;
sbin/restore/interactive.c
767
longjmp(reset, 1); /* XXX signal/longjmp reentrancy */
sbin/unwind/libunbound/daemon/stats.h
100
void server_stats_reply(struct worker* worker, int reset);
sbin/unwind/libunbound/daemon/stats.h
81
struct ub_stats_info* s, int reset);
sbin/unwind/libunbound/daemon/stats.h
92
int reset);
sys/arch/hppa/dev/com_dino.c
50
u_int8_t reset;
sys/arch/hppa/gsc/com_gsc.c
48
u_int8_t reset;
sys/arch/loongson/include/autoconf.h
76
void (*reset)(void);
sys/arch/loongson/include/pmon.h
97
struct pmon_env_reset reset;
sys/arch/loongson/loongson/gdium_machdep.c
73
.reset = gdium_reset
sys/arch/loongson/loongson/generic2e_machdep.c
148
.reset = generic2e_reset
sys/arch/loongson/loongson/generic3a_machdep.c
152
.reset = generic3a_reset,
sys/arch/loongson/loongson/machdep.c
1090
if (sys_platform->reset != NULL)
sys/arch/loongson/loongson/machdep.c
1091
(*(sys_platform->reset))();
sys/arch/loongson/loongson/pmon.c
185
return &env->reset;
sys/arch/loongson/loongson/yeeloong_machdep.c
174
.reset = lemote_reset
sys/arch/loongson/loongson/yeeloong_machdep.c
190
.reset = lemote_reset
sys/arch/loongson/loongson/yeeloong_machdep.c
206
.reset = lemote_reset,
sys/arch/loongson/loongson/yeeloong_machdep.c
227
.reset = lemote_reset,
sys/arch/luna88k/dev/mb89352.c
1072
goto reset;
sys/arch/luna88k/dev/mb89352.c
1082
reset:
sys/arch/luna88k/dev/mb89352.c
1620
goto reset;
sys/arch/luna88k/dev/mb89352.c
1691
goto reset;
sys/arch/luna88k/dev/mb89352.c
1735
goto reset;
sys/arch/luna88k/dev/mb89352.c
1934
reset:
sys/arch/luna88k/dev/mb89352.c
586
goto reset;
sys/arch/luna88k/dev/mb89352.c
631
reset:
sys/arch/macppc/dev/zs.c
328
u_char reset = (channel == 0) ?
sys/arch/macppc/dev/zs.c
331
zs_write_reg(cs, 9, reset);
sys/arch/riscv64/dev/smtclock.c
422
const struct smtreset *reset;
sys/arch/riscv64/dev/smtclock.c
428
for (reset = sc->sc_resets; reset->idx != -1; reset++) {
sys/arch/riscv64/dev/smtclock.c
429
if (reset->idx == idx)
sys/arch/riscv64/dev/smtclock.c
433
if (reset->idx == -1) {
sys/arch/riscv64/dev/smtclock.c
457
if (reset->assert_bit != -1)
sys/arch/riscv64/dev/smtclock.c
458
assert_mask = (1U << reset->assert_bit);
sys/arch/riscv64/dev/smtclock.c
459
if (reset->deassert_bit != -1)
sys/arch/riscv64/dev/smtclock.c
460
deassert_mask = (1U << reset->deassert_bit);
sys/arch/riscv64/dev/smtclock.c
463
val = HREAD4(sc, reset->reg) & ~mask;
sys/arch/riscv64/dev/smtclock.c
468
HWRITE4(sc, reset->reg, val);
sys/arch/sparc64/dev/z8530kbd.c
338
int reset;
sys/arch/sparc64/dev/z8530kbd.c
340
reset = (channel == 0) ? ZSWR9_A_RESET : ZSWR9_B_RESET;
sys/arch/sparc64/dev/z8530kbd.c
342
zs_write_reg(cs, 9, reset);
sys/arch/sparc64/dev/zs.c
381
u_char reset = (channel == 0) ?
sys/arch/sparc64/dev/zs.c
384
zs_write_reg(cs, 9, reset);
sys/dev/fdt/rkclock.c
367
void (*reset)(void *, uint32_t *, int);
sys/dev/fdt/rkclock.c
497
sc->sc_rd.rd_reset = rkclock_compat[i].reset;
sys/dev/fdt/rkvop.c
347
.reset = drm_atomic_helper_plane_reset,
sys/dev/fdt/rkvop.c
510
.reset = drm_atomic_helper_crtc_reset,
sys/dev/fdt/sxiccmu.c
365
void (*reset)(void *, uint32_t *, int);
sys/dev/fdt/sxiccmu.c
420
.reset = sxiccmu_reset
sys/dev/fdt/sxiccmu.c
456
.reset = sxiccmu_reset
sys/dev/fdt/sxiccmu.c
460
.reset = sxiccmu_reset
sys/dev/fdt/sxiccmu.c
464
.reset = sxiccmu_reset,
sys/dev/fdt/sxiccmu.c
516
.reset = sxiccmu_reset
sys/dev/fdt/sxiccmu.c
570
.reset = sxiccmu_reset
sys/dev/fdt/sxiccmu.c
576
.reset = sxiccmu_reset
sys/dev/fdt/sxiccmu.c
617
if (sxiccmu_devices[i].reset) {
sys/dev/fdt/sxiccmu.c
620
clock->sc_rd.rd_reset = sxiccmu_devices[i].reset;
sys/dev/ic/ac97.c
790
host_if->reset(host_if->arg);
sys/dev/ic/ac97.c
937
host_if->reset(host_if->arg);
sys/dev/ic/ac97.h
49
void (*reset)(void *arg);
sys/dev/ic/aic6360.c
1085
goto reset;
sys/dev/ic/aic6360.c
1095
reset:
sys/dev/ic/aic6360.c
1607
goto reset;
sys/dev/ic/aic6360.c
1680
goto reset;
sys/dev/ic/aic6360.c
1725
goto reset;
sys/dev/ic/aic6360.c
1926
reset:
sys/dev/ic/aic6360.c
635
goto reset;
sys/dev/ic/aic6360.c
679
reset:
sys/dev/ic/anxdp.c
224
.reset = drm_atomic_helper_connector_reset,
sys/dev/ic/ar5210.c
57
AR5K_HAL_FUNCTION(hal, ar5210, reset);
sys/dev/ic/ar5211.c
61
AR5K_HAL_FUNCTION(hal, ar5211, reset);
sys/dev/ic/ar5212.c
65
AR5K_HAL_FUNCTION(hal, ar5212, reset);
sys/dev/ic/athn.c
934
goto reset;
sys/dev/ic/athn.c
940
goto reset;
sys/dev/ic/athn.c
946
goto reset;
sys/dev/ic/athn.c
950
goto reset;
sys/dev/ic/athn.c
954
reset: /* Error found, try a full reset. */
sys/dev/ic/bwfm.c
1046
uint32_t ioctl, reset;
sys/dev/ic/bwfm.c
1050
reset = sc->sc_buscore_ops->bc_read(sc,
sys/dev/ic/bwfm.c
1055
((reset & BWFM_AGENT_RESET_CTL_RESET) == 0))
sys/dev/ic/bwfm.c
1063
uint32_t prereset, uint32_t reset)
sys/dev/ic/bwfm.c
1095
reset | BWFM_AGENT_IOCTL_FGC | BWFM_AGENT_IOCTL_CLK);
sys/dev/ic/bwfm.c
1102
uint32_t prereset, uint32_t reset, uint32_t postreset)
sys/dev/ic/bwfm.c
1106
bwfm_chip_ai_disable(sc, core, prereset, reset);
sys/dev/ic/bwfmvar.h
92
uint32_t prereset, uint32_t reset);
sys/dev/ic/bwfmvar.h
94
uint32_t prereset, uint32_t reset, uint32_t postreset);
sys/dev/ic/dwhdmi.c
581
.reset = drm_atomic_helper_connector_reset,
sys/dev/ic/gem.c
1450
int reset = 0;
sys/dev/ic/gem.c
1466
reset = (val & GEM_MII_CONTROL_RESET);
sys/dev/ic/gem.c
1484
if (reset)
sys/dev/ic/gem.c
1487
if (reg == GEM_MII_ANAR || reset) {
sys/dev/ic/i82596.c
506
goto reset;
sys/dev/ic/i82596.c
514
goto reset;
sys/dev/ic/i82596.c
533
goto reset;
sys/dev/ic/i82596.c
545
reset:
sys/dev/ic/lsi64854.c
106
sc->reset = lsi64854_reset;
sys/dev/ic/lsi64854var.h
55
void (*reset)(struct lsi64854_softc *);/* reset routine */
sys/dev/ic/lsi64854var.h
76
#define DMA_RESET(sc) (((sc)->reset)(sc))
sys/dev/ic/ncr53c9x.c
1338
goto reset;
sys/dev/ic/ncr53c9x.c
1391
reset:
sys/dev/ic/ncr53c9x.c
1719
goto reset;
sys/dev/ic/ncr53c9x.c
1734
goto reset;
sys/dev/ic/ncr53c9x.c
1742
reset:
sys/dev/ic/ncr53c9x.c
2174
goto reset;
sys/dev/ic/ncr53c9x.c
2361
goto reset;
sys/dev/ic/ncr53c9x.c
2366
goto reset;
sys/dev/ic/ncr53c9x.c
2454
goto reset;
sys/dev/ic/ncr53c9x.c
2643
goto reset;
sys/dev/ic/ncr53c9x.c
2649
reset:
sys/dev/ic/siop.c
1039
goto reset;
sys/dev/ic/siop.c
1052
goto reset; /* Where we should have gone in the first place! */
sys/dev/ic/siop.c
421
goto reset;
sys/dev/ic/siop.c
497
goto reset;
sys/dev/ic/siop.c
563
goto reset;
sys/dev/ic/siop.c
589
goto reset;
sys/dev/ic/siop.c
594
goto reset;
sys/dev/ic/siop.c
629
reset:
sys/dev/ic/siop.c
652
goto reset;
sys/dev/ic/siop.c
672
goto reset;
sys/dev/ic/siop.c
677
goto reset;
sys/dev/ic/siop.c
691
goto reset;
sys/dev/ic/siop.c
698
goto reset;
sys/dev/ic/siop.c
705
goto reset;
sys/dev/ic/siop.c
717
goto reset;
sys/dev/ic/siop.c
748
goto reset;
sys/dev/ic/siop.c
798
goto reset;
sys/dev/ic/wdc.c
755
if (chp->wdc->reset == NULL)
sys/dev/ic/wdc.c
756
chp->wdc->reset = wdc_do_reset;
sys/dev/ic/wdc.c
998
chp->wdc->reset(chp);
sys/dev/ic/wdcvar.h
204
void (*reset)(struct channel_softc *);
sys/dev/ipmi.c
1665
goto reset;
sys/dev/ipmi.c
1669
goto reset;
sys/dev/ipmi.c
1674
goto reset;
sys/dev/ipmi.c
1678
goto reset;
sys/dev/ipmi.c
1684
goto reset;
sys/dev/ipmi.c
1698
goto reset;
sys/dev/ipmi.c
1702
goto reset;
sys/dev/ipmi.c
1707
goto reset;
sys/dev/ipmi.c
1718
goto reset;
sys/dev/ipmi.c
1723
goto reset;
sys/dev/ipmi.c
1734
goto reset;
sys/dev/ipmi.c
1751
reset:
sys/dev/ipmivar.h
81
int (*reset)(struct ipmi_softc *);
sys/dev/isa/fd.c
145
void fd_set_motor(struct fdc_softc *fdc, int reset);
sys/dev/isa/fd.c
517
fd_set_motor(struct fdc_softc *fdc, int reset)
sys/dev/isa/fd.c
527
if (!reset)
sys/dev/ofw/ofw_clock.c
385
uint32_t *reset;
sys/dev/ofw/ofw_clock.c
395
reset = resets;
sys/dev/ofw/ofw_clock.c
396
while (reset && reset < resets + (len / sizeof(uint32_t))) {
sys/dev/ofw/ofw_clock.c
398
reset_assert_cells(reset, assert);
sys/dev/ofw/ofw_clock.c
401
reset = reset_next_reset(reset);
sys/dev/pci/auacer.c
261
sc->host_if.reset = auacer_reset_codec;
sys/dev/pci/auglx.c
320
sc->host_if.reset = auglx_reset_codec;
sys/dev/pci/auich.c
496
sc->host_if.reset = auich_reset_codec;
sys/dev/pci/auixp.c
1288
codec->host_if.reset = auixp_reset_codec;
sys/dev/pci/autri.c
517
codec->host_if.reset = autri_reset_codec;
sys/dev/pci/auvia.c
299
sc->host_if.reset = auvia_reset_codec;
sys/dev/pci/cs4280.c
612
sc->host_if.reset = cs4280_reset_codec;
sys/dev/pci/cs4281.c
313
sc->host_if.reset = cs4281_reset_codec;
sys/dev/pci/drm/amd/amdgpu/amdgpu.h
1561
#define amdgpu_asic_reset(adev) (adev)->asic_funcs->reset((adev))
sys/dev/pci/drm/amd/amdgpu/amdgpu.h
669
int (*reset)(struct amdgpu_device *adev);
sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd.c
752
pasid_notify pasid_fn, void *data, uint32_t reset)
sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd.c
754
amdgpu_umc_pasid_poison_handler(adev, block, pasid, pasid_fn, data, reset);
sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd.c
758
enum amdgpu_ras_block block, uint32_t reset)
sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd.c
760
amdgpu_umc_pasid_poison_handler(adev, block, 0, NULL, NULL, reset);
sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd.h
342
enum amdgpu_ras_block block, uint32_t reset);
sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd.h
346
pasid_notify pasid_fn, void *data, uint32_t reset);
sys/dev/pci/drm/amd/amdgpu/amdgpu_job.c
135
ring->funcs->reset) {
sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c
3323
pasid_notify pasid_fn, void *data, uint32_t reset)
sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c
3332
poison_msg.reset = reset;
sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c
3498
uint32_t reset_flags = 0, reset = 0;
sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c
3512
reset_flags |= msg.reset;
sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c
3524
reset = AMDGPU_RAS_GPU_RESET_MODE1_RESET;
sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c
3526
reset = AMDGPU_RAS_GPU_RESET_MODE2_RESET;
sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c
3528
reset = reset_flags;
sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c
3530
con->gpu_reset_flags |= reset;
sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c
3533
*gpu_reset = reset;
sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.h
1008
pasid_notify pasid_fn, void *data, uint32_t reset);
sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.h
472
uint32_t reset;
sys/dev/pci/drm/amd/amdgpu/amdgpu_ring.h
291
int (*reset)(struct amdgpu_ring *ring, unsigned int vmid,
sys/dev/pci/drm/amd/amdgpu/amdgpu_ring.h
451
#define amdgpu_ring_reset(r, v, f) (r)->funcs->reset((r), (v), (f))
sys/dev/pci/drm/amd/amdgpu/amdgpu_rlc.h
258
void (*reset)(struct amdgpu_device *adev);
sys/dev/pci/drm/amd/amdgpu/amdgpu_umc.c
191
uint32_t reset)
sys/dev/pci/drm/amd/amdgpu/amdgpu_umc.c
200
(reset || amdgpu_ras_is_rma(adev))) {
sys/dev/pci/drm/amd/amdgpu/amdgpu_umc.c
201
con->gpu_reset_flags |= reset;
sys/dev/pci/drm/amd/amdgpu/amdgpu_umc.c
210
pasid_notify pasid_fn, void *data, uint32_t reset)
sys/dev/pci/drm/amd/amdgpu/amdgpu_umc.c
216
if (reset) {
sys/dev/pci/drm/amd/amdgpu/amdgpu_umc.c
238
ret = amdgpu_umc_do_page_retirement(adev, &err_data, NULL, reset);
sys/dev/pci/drm/amd/amdgpu/amdgpu_umc.c
252
block, pasid, pasid_fn, data, reset);
sys/dev/pci/drm/amd/amdgpu/amdgpu_umc.c
271
enum amdgpu_ras_block block, uint32_t reset)
sys/dev/pci/drm/amd/amdgpu/amdgpu_umc.c
274
block, 0, NULL, NULL, reset);
sys/dev/pci/drm/amd/amdgpu/amdgpu_umc.h
155
enum amdgpu_ras_block block, uint32_t reset);
sys/dev/pci/drm/amd/amdgpu/amdgpu_umc.h
158
pasid_notify pasid_fn, void *data, uint32_t reset);
sys/dev/pci/drm/amd/amdgpu/amdgpu_vcn.c
1507
r = vinst->reset(vinst);
sys/dev/pci/drm/amd/amdgpu/amdgpu_vcn.h
335
int (*reset)(struct amdgpu_vcn_inst *vinst);
sys/dev/pci/drm/amd/amdgpu/amdgpu_vpe.c
993
.reset = vpe_ring_reset,
sys/dev/pci/drm/amd/amdgpu/cik.c
1969
.reset = &cik_asic_reset,
sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c
6845
static int gfx_v10_0_kgq_init_queue(struct amdgpu_ring *ring, bool reset)
sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c
6851
if (!reset && !amdgpu_in_reset(adev) && !adev->in_suspend) {
sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c
8411
.reset = gfx_v10_0_rlc_reset,
sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c
8425
.reset = gfx_v10_0_rlc_reset,
sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c
9882
.reset = gfx_v10_0_reset_kgq,
sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c
9922
.reset = gfx_v10_0_reset_kcq,
sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c
4183
static int gfx_v11_0_kgq_init_queue(struct amdgpu_ring *ring, bool reset)
sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c
4189
if (!reset && !amdgpu_in_reset(adev) && !adev->in_suspend) {
sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c
4515
static int gfx_v11_0_kcq_init_queue(struct amdgpu_ring *ring, bool reset)
sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c
4521
if (!reset && !amdgpu_in_reset(adev) && !adev->in_suspend) {
sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c
5611
.reset = gfx_v11_0_rlc_reset,
sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c
7252
.reset = gfx_v11_0_reset_kgq,
sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c
7293
.reset = gfx_v11_0_reset_kcq,
sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c
3061
static int gfx_v12_0_kgq_init_queue(struct amdgpu_ring *ring, bool reset)
sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c
3067
if (!reset && !amdgpu_in_reset(adev) && !adev->in_suspend) {
sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c
3393
static int gfx_v12_0_kcq_init_queue(struct amdgpu_ring *ring, bool reset)
sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c
3399
if (!reset && !amdgpu_in_reset(adev) && !adev->in_suspend) {
sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c
3995
.reset = gfx_v12_0_rlc_reset,
sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c
5519
.reset = gfx_v12_0_reset_kgq,
sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c
5557
.reset = gfx_v12_0_reset_kcq,
sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c
2514
adev->gfx.rlc.funcs->reset(adev);
sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c
3020
.reset = gfx_v6_0_rlc_reset,
sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c
3438
adev->gfx.rlc.funcs->reset(adev);
sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c
4095
.reset = gfx_v7_0_rlc_reset,
sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c
4077
adev->gfx.rlc.funcs->reset(adev);
sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c
5576
.reset = gfx_v8_0_rlc_reset,
sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c
5222
.reset = gfx_v9_0_rlc_reset,
sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c
7558
.reset = gfx_v9_0_reset_kcq,
sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c
2758
.reset = gfx_v9_4_3_rlc_reset,
sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c
4773
.reset = gfx_v9_4_3_reset_kcq,
sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c
830
.reset = jpeg_v2_0_ring_reset,
sys/dev/pci/drm/amd/amdgpu/jpeg_v2_5.c
721
.reset = jpeg_v2_5_ring_reset,
sys/dev/pci/drm/amd/amdgpu/jpeg_v2_5.c
752
.reset = jpeg_v2_5_ring_reset,
sys/dev/pci/drm/amd/amdgpu/jpeg_v3_0.c
622
.reset = jpeg_v3_0_ring_reset,
sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0.c
787
.reset = jpeg_v4_0_ring_reset,
sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c
1203
.reset = jpeg_v4_0_3_ring_reset,
sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_5.c
832
.reset = jpeg_v4_0_5_ring_reset,
sys/dev/pci/drm/amd/amdgpu/jpeg_v5_0_0.c
708
.reset = jpeg_v5_0_0_ring_reset,
sys/dev/pci/drm/amd/amdgpu/jpeg_v5_0_1.c
904
.reset = jpeg_v5_0_1_ring_reset,
sys/dev/pci/drm/amd/amdgpu/nv.c
622
.reset = &nv_asic_reset,
sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c
2139
.reset = sdma_v4_4_2_reset_queue,
sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c
2171
.reset = sdma_v4_4_2_reset_queue,
sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c
1967
.reset = sdma_v5_0_reset_queue,
sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c
1971
.reset = sdma_v5_2_reset_queue,
sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c
1780
.reset = sdma_v6_0_reset_queue,
sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c
1714
.reset = sdma_v7_0_reset_queue,
sys/dev/pci/drm/amd/amdgpu/si.c
2014
.reset = &si_asic_reset,
sys/dev/pci/drm/amd/amdgpu/soc15.c
905
.reset = &soc15_asic_reset,
sys/dev/pci/drm/amd/amdgpu/soc15.c
926
.reset = &soc15_asic_reset,
sys/dev/pci/drm/amd/amdgpu/soc15.c
947
.reset = &soc15_asic_reset,
sys/dev/pci/drm/amd/amdgpu/soc21.c
544
.reset = &soc21_asic_reset,
sys/dev/pci/drm/amd/amdgpu/soc24.c
351
.reset = &soc24_asic_reset,
sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c
2141
.reset = amdgpu_vcn_ring_reset,
sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c
216
adev->vcn.inst[0].reset = vcn_v2_0_reset;
sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c
2171
.reset = amdgpu_vcn_ring_reset,
sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c
1812
.reset = amdgpu_vcn_ring_reset,
sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c
1911
.reset = amdgpu_vcn_ring_reset,
sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c
389
adev->vcn.inst[j].reset = vcn_v2_5_reset;
sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c
2049
.reset = amdgpu_vcn_ring_reset,
sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c
2148
.reset = amdgpu_vcn_ring_reset,
sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c
291
adev->vcn.inst[i].reset = vcn_v3_0_reset;
sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c
2005
.reset = vcn_v4_0_ring_reset,
sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_3.c
1655
.reset = vcn_v4_0_3_ring_reset,
sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_5.c
1509
.reset = vcn_v4_0_5_ring_reset,
sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_0.c
1233
.reset = vcn_v5_0_0_ring_reset,
sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_1.c
1357
.reset = vcn_v5_0_1_ring_reset,
sys/dev/pci/drm/amd/amdgpu/vi.c
1436
.reset = &vi_asic_reset,
sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.c
2375
bool reset)
sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.c
2395
retval = pm_send_unmap_queue(&dqm->packet_mgr, filter, filter_param, reset);
sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.c
60
bool reset);
sys/dev/pci/drm/amd/amdkfd/kfd_int_process_v11.c
221
uint32_t reset = 0;
sys/dev/pci/drm/amd/amdkfd/kfd_int_process_v11.c
242
reset = AMDGPU_RAS_GPU_RESET_MODE2_RESET;
sys/dev/pci/drm/amd/amdkfd/kfd_int_process_v11.c
247
reset = AMDGPU_RAS_GPU_RESET_MODE2_RESET;
sys/dev/pci/drm/amd/amdkfd/kfd_int_process_v11.c
255
amdgpu_amdkfd_ras_poison_consumption_handler(dev->adev, block, reset);
sys/dev/pci/drm/amd/amdkfd/kfd_int_process_v9.c
148
uint32_t reset = 0;
sys/dev/pci/drm/amd/amdkfd/kfd_int_process_v9.c
174
reset = AMDGPU_RAS_GPU_RESET_MODE1_RESET;
sys/dev/pci/drm/amd/amdkfd/kfd_int_process_v9.c
176
reset = AMDGPU_RAS_GPU_RESET_MODE2_RESET;
sys/dev/pci/drm/amd/amdkfd/kfd_int_process_v9.c
181
reset = AMDGPU_RAS_GPU_RESET_MODE1_RESET;
sys/dev/pci/drm/amd/amdkfd/kfd_int_process_v9.c
183
reset = AMDGPU_RAS_GPU_RESET_MODE2_RESET;
sys/dev/pci/drm/amd/amdkfd/kfd_int_process_v9.c
185
reset = AMDGPU_RAS_GPU_RESET_MODE2_RESET;
sys/dev/pci/drm/amd/amdkfd/kfd_int_process_v9.c
192
reset = AMDGPU_RAS_GPU_RESET_MODE1_RESET;
sys/dev/pci/drm/amd/amdkfd/kfd_int_process_v9.c
204
reset = AMDGPU_RAS_GPU_RESET_MODE1_RESET;
sys/dev/pci/drm/amd/amdkfd/kfd_int_process_v9.c
206
reset = AMDGPU_RAS_GPU_RESET_MODE2_RESET;
sys/dev/pci/drm/amd/amdkfd/kfd_int_process_v9.c
211
reset = AMDGPU_RAS_GPU_RESET_MODE1_RESET;
sys/dev/pci/drm/amd/amdkfd/kfd_int_process_v9.c
213
reset = AMDGPU_RAS_GPU_RESET_MODE2_RESET;
sys/dev/pci/drm/amd/amdkfd/kfd_int_process_v9.c
215
reset = AMDGPU_RAS_GPU_RESET_MODE2_RESET;
sys/dev/pci/drm/amd/amdkfd/kfd_int_process_v9.c
237
block, pasid, NULL, NULL, reset);
sys/dev/pci/drm/amd/amdkfd/kfd_packet_manager.c
494
uint32_t filter_param, bool reset)
sys/dev/pci/drm/amd/amdkfd/kfd_packet_manager.c
511
retval = pm->pmf->unmap_queues(pm, buffer, filter, filter_param, reset);
sys/dev/pci/drm/amd/amdkfd/kfd_packet_manager_v9.c
396
uint32_t filter_param, bool reset)
sys/dev/pci/drm/amd/amdkfd/kfd_packet_manager_v9.c
414
if (reset)
sys/dev/pci/drm/amd/amdkfd/kfd_packet_manager_vi.c
203
uint32_t filter_param, bool reset)
sys/dev/pci/drm/amd/amdkfd/kfd_packet_manager_vi.c
216
if (reset)
sys/dev/pci/drm/amd/amdkfd/kfd_priv.h
1446
uint32_t filter_param, bool reset);
sys/dev/pci/drm/amd/amdkfd/kfd_priv.h
1478
uint32_t filter_param, bool reset);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
7747
.reset = amdgpu_dm_connector_funcs_reset,
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
8744
if (aconnector->base.funcs->reset)
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
8745
aconnector->base.funcs->reset(&aconnector->base);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
572
.reset = amdgpu_dm_crtc_reset_state,
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
755
if (acrtc->base.funcs->reset)
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
756
acrtc->base.funcs->reset(&acrtc->base);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
233
.reset = amdgpu_dm_connector_funcs_reset,
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
1796
.reset = amdgpu_dm_plane_drm_plane_reset,
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
1900
if (plane->funcs->reset)
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
1901
plane->funcs->reset(plane);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c
175
.reset = amdgpu_dm_connector_funcs_reset,
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c
214
if (wbcon->base.base.funcs->reset)
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c
215
wbcon->base.base.funcs->reset(&wbcon->base.base);
sys/dev/pci/drm/amd/display/dc/core/dc.c
700
uint8_t idx, bool reset)
sys/dev/pci/drm/amd/display/dc/core/dc.c
745
param.reset = reset;
sys/dev/pci/drm/amd/display/dc/dc_stream.h
559
bool reset);
sys/dev/pci/drm/amd/display/dc/dce110/dce110_timing_generator.c
2130
if (!params->enable || params->reset)
sys/dev/pci/drm/amd/display/dc/dce120/dce120_timing_generator.c
1103
if (!params->enable || params->reset)
sys/dev/pci/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.c
52
void enc314_reset_fifo(struct stream_encoder *enc, bool reset)
sys/dev/pci/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.c
55
uint32_t reset_val = reset ? 1 : 0;
sys/dev/pci/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.h
335
void enc314_reset_fifo(struct stream_encoder *enc, bool reset);
sys/dev/pci/drm/amd/display/dc/dio/dcn32/dcn32_dio_stream_encoder.c
394
static void enc32_reset_fifo(struct stream_encoder *enc, bool reset)
sys/dev/pci/drm/amd/display/dc/dio/dcn32/dcn32_dio_stream_encoder.c
397
uint32_t reset_val = reset ? 1 : 0;
sys/dev/pci/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.c
379
static void enc35_reset_fifo(struct stream_encoder *enc, bool reset)
sys/dev/pci/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.c
382
uint32_t reset_val = reset ? 1 : 0;
sys/dev/pci/drm/amd/display/dc/hubbub/dcn10/dcn10_hubbub.c
682
void hubbub1_soft_reset(struct hubbub *hubbub, bool reset)
sys/dev/pci/drm/amd/display/dc/hubbub/dcn10/dcn10_hubbub.c
686
uint32_t reset_en = reset ? 1 : 0;
sys/dev/pci/drm/amd/display/dc/hubbub/dcn10/dcn10_hubbub.h
495
void hubbub1_soft_reset(struct hubbub *hubbub, bool reset);
sys/dev/pci/drm/amd/display/dc/hubp/dcn10/dcn10_hubp.c
1322
void hubp1_soft_reset(struct hubp *hubp, bool reset)
sys/dev/pci/drm/amd/display/dc/hubp/dcn10/dcn10_hubp.c
1326
REG_UPDATE(DCHUBP_CNTL, HUBP_DISABLE, reset ? 1 : 0);
sys/dev/pci/drm/amd/display/dc/hubp/dcn10/dcn10_hubp.h
819
void hubp1_soft_reset(struct hubp *hubp, bool reset);
sys/dev/pci/drm/amd/display/dc/hubp/dcn31/dcn31_hubp.c
50
void hubp31_soft_reset(struct hubp *hubp, bool reset)
sys/dev/pci/drm/amd/display/dc/hubp/dcn31/dcn31_hubp.c
54
REG_UPDATE(DCHUBP_CNTL, HUBP_SOFT_RESET, reset);
sys/dev/pci/drm/amd/display/dc/hubp/dcn31/dcn31_hubp.h
244
void hubp31_soft_reset(struct hubp *hubp, bool reset);
sys/dev/pci/drm/amd/display/dc/inc/hw/dchubbub.h
254
void (*reset)(struct hubbub *hubbub);
sys/dev/pci/drm/amd/display/dc/inc/hw/hubp.h
274
void (*hubp_soft_reset)(struct hubp *hubp, bool reset);
sys/dev/pci/drm/amd/display/dc/inc/hw/timing_generator.h
146
bool reset;
sys/dev/pci/drm/amd/display/dc/optc/dcn10/dcn10_optc.c
1475
if (!params->enable || params->reset)
sys/dev/pci/drm/amd/display/dc/optc/dcn35/dcn35_optc.c
192
if (!params->enable || params->reset)
sys/dev/pci/drm/amd/display/dmub/dmub_srv.h
408
void (*reset)(struct dmub_srv *dmub);
sys/dev/pci/drm/amd/display/dmub/src/dmub_srv.c
178
funcs->reset = dmub_dcn20_reset;
sys/dev/pci/drm/amd/display/dmub/src/dmub_srv.c
253
funcs->reset = dmub_dcn31_reset;
sys/dev/pci/drm/amd/display/dmub/src/dmub_srv.c
293
funcs->reset = dmub_dcn32_reset;
sys/dev/pci/drm/amd/display/dmub/src/dmub_srv.c
333
funcs->reset = dmub_dcn35_reset;
sys/dev/pci/drm/amd/display/dmub/src/dmub_srv.c
379
funcs->reset = dmub_dcn401_reset;
sys/dev/pci/drm/amd/display/dmub/src/dmub_srv.c
676
if (dmub->hw_funcs.reset)
sys/dev/pci/drm/amd/display/dmub/src/dmub_srv.c
677
dmub->hw_funcs.reset(dmub);
sys/dev/pci/drm/amd/display/dmub/src/dmub_srv.c
810
if (dmub->hw_funcs.reset)
sys/dev/pci/drm/amd/display/dmub/src/dmub_srv.c
811
dmub->hw_funcs.reset(dmub);
sys/dev/pci/drm/apple/apple_drv.c
132
.reset = drm_atomic_helper_plane_reset,
sys/dev/pci/drm/apple/apple_drv.c
271
.reset = drm_atomic_helper_crtc_reset,
sys/dev/pci/drm/apple/apple_drv.c
294
.reset = drm_atomic_helper_connector_reset,
sys/dev/pci/drm/drm_connector.c
625
if (connector->funcs->reset)
sys/dev/pci/drm/drm_connector.c
626
connector->funcs->reset(connector);
sys/dev/pci/drm/drm_mode_config.c
201
if (plane->funcs->reset)
sys/dev/pci/drm/drm_mode_config.c
202
plane->funcs->reset(plane);
sys/dev/pci/drm/drm_mode_config.c
205
if (crtc->funcs->reset)
sys/dev/pci/drm/drm_mode_config.c
206
crtc->funcs->reset(crtc);
sys/dev/pci/drm/drm_mode_config.c
209
if (encoder->funcs && encoder->funcs->reset)
sys/dev/pci/drm/drm_mode_config.c
210
encoder->funcs->reset(encoder);
sys/dev/pci/drm/drm_mode_config.c
214
if (connector->funcs->reset)
sys/dev/pci/drm/drm_mode_config.c
215
connector->funcs->reset(connector);
sys/dev/pci/drm/i915/display/g4x_dp.c
1280
.reset = intel_dp_encoder_reset,
sys/dev/pci/drm/i915/display/intel_crt.c
1002
.reset = intel_crt_reset,
sys/dev/pci/drm/i915/display/intel_ddi.c
4628
.reset = intel_ddi_encoder_reset,
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
757
bool reset;
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
759
ret = kstrtobool_from_user(ubuf, cnt, &reset);
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
763
if (!reset)
sys/dev/pci/drm/i915/display/intel_dpio_phy.c
813
bool reset)
sys/dev/pci/drm/i915/display/intel_dpio_phy.c
822
if (reset)
sys/dev/pci/drm/i915/display/intel_dpio_phy.c
830
if (reset)
sys/dev/pci/drm/i915/display/intel_dpio_phy.c
839
if (reset)
sys/dev/pci/drm/i915/display/intel_dpio_phy.c
848
if (reset)
sys/dev/pci/drm/i915/display/intel_dpio_phy.c
858
bool reset)
sys/dev/pci/drm/i915/display/intel_dpio_phy.c
863
__chv_data_lane_soft_reset(encoder, crtc_state, reset);
sys/dev/pci/drm/i915/display/intel_dpio_phy.h
138
bool reset)
sys/dev/pci/drm/i915/display/intel_dpio_phy.h
56
bool reset);
sys/dev/pci/drm/i915/gem/selftests/i915_gem_migrate.c
323
mutex_lock(&__gt->reset.mutex);
sys/dev/pci/drm/i915/gem/selftests/i915_gem_migrate.c
324
wedged = test_bit(I915_WEDGED, &__gt->reset.flags);
sys/dev/pci/drm/i915/gem/selftests/i915_gem_migrate.c
325
mutex_unlock(&__gt->reset.mutex);
sys/dev/pci/drm/i915/gem/selftests/i915_gem_migrate.c
478
mutex_lock(&__gt->reset.mutex);
sys/dev/pci/drm/i915/gem/selftests/i915_gem_migrate.c
479
wedged = test_bit(I915_WEDGED, &__gt->reset.flags);
sys/dev/pci/drm/i915/gem/selftests/i915_gem_migrate.c
480
mutex_unlock(&__gt->reset.mutex);
sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c
1270
mutex_lock(>->reset.mutex);
sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c
1271
wedged = test_bit(I915_WEDGED, >->reset.flags);
sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c
1272
mutex_unlock(>->reset.mutex);
sys/dev/pci/drm/i915/gt/intel_context_types.h
63
void (*reset)(struct intel_context *ce);
sys/dev/pci/drm/i915/gt/intel_engine.h
246
if (engine->reset.rewind)
sys/dev/pci/drm/i915/gt/intel_engine.h
247
engine->reset.rewind(engine, stalled);
sys/dev/pci/drm/i915/gt/intel_engine_cs.c
694
memset(&engine->reset, 0, sizeof(engine->reset));
sys/dev/pci/drm/i915/gt/intel_engine_pm.c
322
ce->ops->reset(ce);
sys/dev/pci/drm/i915/gt/intel_engine_pm.c
81
ce->ops->reset(ce);
sys/dev/pci/drm/i915/gt/intel_engine_types.h
524
} reset;
sys/dev/pci/drm/i915/gt/intel_execlists_submission.c
2390
unsigned long *lock = &engine->gt->reset.flags;
sys/dev/pci/drm/i915/gt/intel_execlists_submission.c
2707
.reset = lrc_reset,
sys/dev/pci/drm/i915/gt/intel_execlists_submission.c
3441
engine->reset.prepare = execlists_reset_prepare;
sys/dev/pci/drm/i915/gt/intel_execlists_submission.c
3442
engine->reset.rewind = execlists_reset_rewind;
sys/dev/pci/drm/i915/gt/intel_execlists_submission.c
3443
engine->reset.cancel = execlists_reset_cancel;
sys/dev/pci/drm/i915/gt/intel_execlists_submission.c
3444
engine->reset.finish = execlists_reset_finish;
sys/dev/pci/drm/i915/gt/intel_gt.h
163
return test_bit(I915_WEDGED_ON_INIT, >->reset.flags) ||
sys/dev/pci/drm/i915/gt/intel_gt.h
164
test_bit(I915_WEDGED_ON_FINI, >->reset.flags);
sys/dev/pci/drm/i915/gt/intel_gt.h
170
!test_bit(I915_WEDGED, >->reset.flags));
sys/dev/pci/drm/i915/gt/intel_gt.h
172
return unlikely(test_bit(I915_WEDGED, >->reset.flags));
sys/dev/pci/drm/i915/gt/intel_gt_debugfs.c
36
wait_event(gt->reset.queue,
sys/dev/pci/drm/i915/gt/intel_gt_debugfs.c
37
!test_bit(I915_RESET_BACKOFF, >->reset.flags));
sys/dev/pci/drm/i915/gt/intel_gt_pm.c
212
if (engine->reset.prepare)
sys/dev/pci/drm/i915/gt/intel_gt_pm.c
213
engine->reset.prepare(engine);
sys/dev/pci/drm/i915/gt/intel_gt_pm.c
227
if (engine->reset.finish)
sys/dev/pci/drm/i915/gt/intel_gt_pm.c
228
engine->reset.finish(engine);
sys/dev/pci/drm/i915/gt/intel_gt_types.h
156
struct intel_reset reset;
sys/dev/pci/drm/i915/gt/intel_reset.c
1010
set_bit(I915_WEDGED, >->reset.flags);
sys/dev/pci/drm/i915/gt/intel_reset.c
1015
if (engine->reset.cancel)
sys/dev/pci/drm/i915/gt/intel_reset.c
1016
engine->reset.cancel(engine);
sys/dev/pci/drm/i915/gt/intel_reset.c
1038
if (test_bit(I915_WEDGED, >->reset.flags))
sys/dev/pci/drm/i915/gt/intel_reset.c
1042
mutex_lock(>->reset.mutex);
sys/dev/pci/drm/i915/gt/intel_reset.c
1061
mutex_unlock(>->reset.mutex);
sys/dev/pci/drm/i915/gt/intel_reset.c
1071
if (!test_bit(I915_WEDGED, >->reset.flags))
sys/dev/pci/drm/i915/gt/intel_reset.c
1143
clear_bit(I915_WEDGED, >->reset.flags);
sys/dev/pci/drm/i915/gt/intel_reset.c
1152
mutex_lock(>->reset.mutex);
sys/dev/pci/drm/i915/gt/intel_reset.c
1154
mutex_unlock(>->reset.mutex);
sys/dev/pci/drm/i915/gt/intel_reset.c
1221
GT_TRACE(gt, "flags=%lx\n", gt->reset.flags);
sys/dev/pci/drm/i915/gt/intel_reset.c
1224
GEM_BUG_ON(!test_bit(I915_RESET_BACKOFF, >->reset.flags));
sys/dev/pci/drm/i915/gt/intel_reset.c
1232
mutex_lock(>->reset.mutex);
sys/dev/pci/drm/i915/gt/intel_reset.c
1245
if (gt->i915->params.reset)
sys/dev/pci/drm/i915/gt/intel_reset.c
1289
mutex_unlock(>->reset.mutex);
sys/dev/pci/drm/i915/gt/intel_reset.c
1344
ENGINE_TRACE(engine, "flags=%lx\n", gt->reset.flags);
sys/dev/pci/drm/i915/gt/intel_reset.c
1345
GEM_BUG_ON(!test_bit(I915_RESET_ENGINE + engine->id, >->reset.flags));
sys/dev/pci/drm/i915/gt/intel_reset.c
1458
if (!test_bit(I915_WEDGED, >->reset.flags))
sys/dev/pci/drm/i915/gt/intel_reset.c
1526
>->reset.flags))
sys/dev/pci/drm/i915/gt/intel_reset.c
1533
>->reset.flags);
sys/dev/pci/drm/i915/gt/intel_reset.c
1542
if (test_and_set_bit(I915_RESET_BACKOFF, >->reset.flags)) {
sys/dev/pci/drm/i915/gt/intel_reset.c
1543
wait_event(gt->reset.queue,
sys/dev/pci/drm/i915/gt/intel_reset.c
1544
!test_bit(I915_RESET_BACKOFF, >->reset.flags));
sys/dev/pci/drm/i915/gt/intel_reset.c
1558
>->reset.flags))
sys/dev/pci/drm/i915/gt/intel_reset.c
1559
wait_on_bit(>->reset.flags,
sys/dev/pci/drm/i915/gt/intel_reset.c
1566
synchronize_srcu_expedited(>->reset.backoff_srcu);
sys/dev/pci/drm/i915/gt/intel_reset.c
1573
>->reset.flags);
sys/dev/pci/drm/i915/gt/intel_reset.c
1575
clear_bit_unlock(I915_RESET_BACKOFF, >->reset.flags);
sys/dev/pci/drm/i915/gt/intel_reset.c
1577
wake_up_all(>->reset.queue);
sys/dev/pci/drm/i915/gt/intel_reset.c
1585
might_lock(>->reset.backoff_srcu);
sys/dev/pci/drm/i915/gt/intel_reset.c
1590
while (test_bit(I915_RESET_BACKOFF, >->reset.flags)) {
sys/dev/pci/drm/i915/gt/intel_reset.c
1596
if (wait_event_interruptible(gt->reset.queue,
sys/dev/pci/drm/i915/gt/intel_reset.c
1598
>->reset.flags)))
sys/dev/pci/drm/i915/gt/intel_reset.c
1603
*srcu = srcu_read_lock(>->reset.backoff_srcu);
sys/dev/pci/drm/i915/gt/intel_reset.c
1620
__releases(>->reset.backoff_srcu)
sys/dev/pci/drm/i915/gt/intel_reset.c
1622
srcu_read_unlock(>->reset.backoff_srcu, tag);
sys/dev/pci/drm/i915/gt/intel_reset.c
1636
if (wait_event_interruptible(gt->reset.queue,
sys/dev/pci/drm/i915/gt/intel_reset.c
1638
>->reset.flags)))
sys/dev/pci/drm/i915/gt/intel_reset.c
1650
set_bit(I915_WEDGED_ON_INIT, >->reset.flags);
sys/dev/pci/drm/i915/gt/intel_reset.c
1660
set_bit(I915_WEDGED_ON_FINI, >->reset.flags);
sys/dev/pci/drm/i915/gt/intel_reset.c
1666
init_waitqueue_head(>->reset.queue);
sys/dev/pci/drm/i915/gt/intel_reset.c
1667
rw_init(>->reset.mutex, "gtres");
sys/dev/pci/drm/i915/gt/intel_reset.c
1668
init_srcu_struct(>->reset.backoff_srcu);
sys/dev/pci/drm/i915/gt/intel_reset.c
1680
i915_gem_shrinker_taints_mutex(gt->i915, >->reset.mutex);
sys/dev/pci/drm/i915/gt/intel_reset.c
1683
__set_bit(I915_WEDGED, >->reset.flags);
sys/dev/pci/drm/i915/gt/intel_reset.c
1688
cleanup_srcu_struct(>->reset.backoff_srcu);
sys/dev/pci/drm/i915/gt/intel_reset.c
767
reset_func reset;
sys/dev/pci/drm/i915/gt/intel_reset.c
771
reset = intel_get_gpu_reset(gt);
sys/dev/pci/drm/i915/gt/intel_reset.c
772
if (!reset)
sys/dev/pci/drm/i915/gt/intel_reset.c
786
ret = reset(gt, reset_mask, retry);
sys/dev/pci/drm/i915/gt/intel_reset.c
797
if (!gt->i915->params.reset)
sys/dev/pci/drm/i915/gt/intel_reset.c
805
if (gt->i915->params.reset < 2)
sys/dev/pci/drm/i915/gt/intel_reset.c
838
if (engine->reset.prepare)
sys/dev/pci/drm/i915/gt/intel_reset.c
839
engine->reset.prepare(engine);
sys/dev/pci/drm/i915/gt/intel_reset.c
945
if (engine->reset.finish)
sys/dev/pci/drm/i915/gt/intel_reset.c
946
engine->reset.finish(engine);
sys/dev/pci/drm/i915/gt/intel_reset.c
985
if (test_bit(I915_WEDGED, >->reset.flags))
sys/dev/pci/drm/i915/gt/intel_ring_submission.c
1171
engine->reset.prepare = reset_prepare;
sys/dev/pci/drm/i915/gt/intel_ring_submission.c
1172
engine->reset.rewind = reset_rewind;
sys/dev/pci/drm/i915/gt/intel_ring_submission.c
1173
engine->reset.cancel = reset_cancel;
sys/dev/pci/drm/i915/gt/intel_ring_submission.c
1174
engine->reset.finish = reset_finish;
sys/dev/pci/drm/i915/gt/intel_ring_submission.c
693
.reset = ring_context_reset,
sys/dev/pci/drm/i915/gt/mock_engine.c
213
.reset = mock_context_reset,
sys/dev/pci/drm/i915/gt/mock_engine.c
373
engine->base.reset.prepare = mock_reset_prepare;
sys/dev/pci/drm/i915/gt/mock_engine.c
374
engine->base.reset.rewind = mock_reset_rewind;
sys/dev/pci/drm/i915/gt/mock_engine.c
375
engine->base.reset.cancel = mock_reset_cancel;
sys/dev/pci/drm/i915/gt/mock_engine.c
376
engine->base.reset.finish = mock_reset_finish;
sys/dev/pci/drm/i915/gt/selftest_execlists.c
559
&engine->gt->reset.flags)) {
sys/dev/pci/drm/i915/gt/selftest_execlists.c
573
&engine->gt->reset.flags);
sys/dev/pci/drm/i915/gt/selftest_hangcheck.c
1046
>->reset.flags));
sys/dev/pci/drm/i915/gt/selftest_hangcheck.c
1169
clear_and_wake_up_bit(I915_RESET_ENGINE + id, >->reset.flags);
sys/dev/pci/drm/i915/gt/selftest_hangcheck.c
462
>->reset.flags));
sys/dev/pci/drm/i915/gt/selftest_hangcheck.c
519
clear_and_wake_up_bit(I915_RESET_ENGINE + id, >->reset.flags);
sys/dev/pci/drm/i915/gt/selftest_hangcheck.c
574
>->reset.flags));
sys/dev/pci/drm/i915/gt/selftest_hangcheck.c
671
clear_and_wake_up_bit(I915_RESET_ENGINE + id, >->reset.flags);
sys/dev/pci/drm/i915/gt/selftest_hangcheck.c
727
>->reset.flags));
sys/dev/pci/drm/i915/gt/selftest_hangcheck.c
817
clear_and_wake_up_bit(I915_RESET_ENGINE + id, >->reset.flags);
sys/dev/pci/drm/i915/gt/selftest_lrc.c
1754
unsigned long *lock = &engine->gt->reset.flags;
sys/dev/pci/drm/i915/gt/selftest_workarounds.c
298
int (*reset)(struct intel_engine_cs *),
sys/dev/pci/drm/i915/gt/selftest_workarounds.c
336
err = reset(engine);
sys/dev/pci/drm/i915/gt/uc/intel_guc.c
196
guc->interrupts.reset = gen11_reset_guc_interrupts;
sys/dev/pci/drm/i915/gt/uc/intel_guc.c
211
guc->interrupts.reset = gen9_reset_guc_interrupts;
sys/dev/pci/drm/i915/gt/uc/intel_guc.h
475
guc->interrupts.reset(guc);
sys/dev/pci/drm/i915/gt/uc/intel_guc.h
97
void (*reset)(struct intel_guc *guc);
sys/dev/pci/drm/i915/gt/uc/intel_guc_ads.c
172
if (i915->params.reset < 2)
sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c
1344
in_reset = test_bit(I915_RESET_BACKOFF, >->reset.flags);
sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c
1430
if (mutex_is_locked(&guc_to_gt(guc)->reset.mutex) ||
sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c
1431
test_bit(I915_RESET_BACKOFF, &guc_to_gt(guc)->reset.flags))
sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c
3802
.reset = lrc_reset,
sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c
4551
engine->reset.prepare = guc_engine_reset_prepare;
sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c
4552
engine->reset.rewind = guc_rewind_nop;
sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c
4553
engine->reset.cancel = guc_reset_nop;
sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c
4554
engine->reset.finish = guc_reset_nop;
sys/dev/pci/drm/i915/gvt/execlist.c
556
.reset = reset_execlist,
sys/dev/pci/drm/i915/gvt/gvt.h
147
void (*reset)(struct intel_vgpu *vgpu, intel_engine_mask_t engine_mask);
sys/dev/pci/drm/i915/gvt/scheduler.c
1352
s->ops->reset(vgpu, engine_mask);
sys/dev/pci/drm/i915/i915_debugfs_params.c
127
GET_I915(i915, reset, value);
sys/dev/pci/drm/i915/i915_gpu_error.c
2396
if (test_bit(I915_RESET_BACKOFF, >->reset.flags)) {
sys/dev/pci/drm/i915/i915_params.c
69
i915_param_named_unsafe(reset, uint, 0400,
sys/dev/pci/drm/i915/i915_params.h
57
param(unsigned int, reset, 3, 0600) \
sys/dev/pci/drm/i915/i915_request.c
2093
mutex_acquire(&rq->engine->gt->reset.mutex.dep_map, 0, 0, _THIS_IP_);
sys/dev/pci/drm/i915/i915_request.c
2188
mutex_release(&rq->engine->gt->reset.mutex.dep_map, _THIS_IP_);
sys/dev/pci/drm/i915/selftests/igt_reset.c
19
pr_debug("%s: current gpu_error=%08lx\n", __func__, gt->reset.flags);
sys/dev/pci/drm/i915/selftests/igt_reset.c
21
while (test_and_set_bit(I915_RESET_BACKOFF, >->reset.flags))
sys/dev/pci/drm/i915/selftests/igt_reset.c
22
wait_event(gt->reset.queue,
sys/dev/pci/drm/i915/selftests/igt_reset.c
23
!test_bit(I915_RESET_BACKOFF, >->reset.flags));
sys/dev/pci/drm/i915/selftests/igt_reset.c
27
>->reset.flags))
sys/dev/pci/drm/i915/selftests/igt_reset.c
28
wait_on_bit(>->reset.flags, I915_RESET_ENGINE + id,
sys/dev/pci/drm/i915/selftests/igt_reset.c
39
clear_and_wake_up_bit(I915_RESET_ENGINE + id, >->reset.flags);
sys/dev/pci/drm/i915/selftests/igt_reset.c
41
clear_bit(I915_RESET_BACKOFF, >->reset.flags);
sys/dev/pci/drm/i915/selftests/igt_reset.c
42
wake_up_all(>->reset.queue);
sys/dev/pci/drm/i915/selftests/intel_scheduler_helpers.c
37
saved->reset = engine->i915->params.reset;
sys/dev/pci/drm/i915/selftests/intel_scheduler_helpers.c
52
engine->i915->params.reset = 2;
sys/dev/pci/drm/i915/selftests/intel_scheduler_helpers.c
81
engine->i915->params.reset = saved->reset;
sys/dev/pci/drm/i915/selftests/intel_scheduler_helpers.h
17
u32 reset;
sys/dev/pci/drm/i915/selftests/mock_gem_device.c
247
__clear_bit(I915_WEDGED, &to_gt(i915)->reset.flags);
sys/dev/pci/drm/include/drm/drm_connector.h
1334
void (*reset)(struct drm_connector *connector);
sys/dev/pci/drm/include/drm/drm_crtc.h
413
void (*reset)(struct drm_crtc *crtc);
sys/dev/pci/drm/include/drm/drm_encoder.h
48
void (*reset)(struct drm_encoder *encoder);
sys/dev/pci/drm/include/drm/drm_plane.h
364
void (*reset)(struct drm_plane *plane);
sys/dev/pci/eap.c
558
sc->host_if.reset = eap1371_reset_codec;
sys/dev/pci/emuxki.c
396
sc->hostif.reset = emuxki_ac97_reset;
sys/dev/pci/envy.c
656
sc->host_if.reset = envy_ac97_reset_codec;
sys/dev/pci/esa.c
1002
sc->host_if.reset = esa_reset_codec;
sys/dev/pci/fms.c
221
sc->host_if.reset = fms_reset_codec;
sys/dev/pci/if_aq_pci.c
1209
.reset = aq_fw1x_reset,
sys/dev/pci/if_aq_pci.c
1217
.reset = aq_fw2x_reset,
sys/dev/pci/if_aq_pci.c
1225
.reset = aq2_fw_reset,
sys/dev/pci/if_aq_pci.c
2034
return sc->sc_fw_ops->reset(sc);
sys/dev/pci/if_aq_pci.c
982
int (*reset)(struct aq_softc *);
sys/dev/pci/if_bge.c
3273
u_int32_t reset, mac_mode, mac_mode_mask, val;
sys/dev/pci/if_bge.c
3328
reset = BGE_MISCCFG_RESET_CORE_CLOCKS | BGE_32BITTIME_66MHZ;
sys/dev/pci/if_bge.c
3344
reset |= (1<<29);
sys/dev/pci/if_bge.c
3365
reset |= BGE_MISCCFG_KEEP_GPHY_POWER;
sys/dev/pci/if_bge.c
3368
write_op(sc, BGE_MISC_CFG, reset);
sys/dev/pci/if_cas.c
1584
int reset = 0;
sys/dev/pci/if_cas.c
1600
reset = (val & CAS_MII_CONTROL_RESET);
sys/dev/pci/if_cas.c
1618
if (reset)
sys/dev/pci/if_cas.c
1621
if (reg == CAS_MII_ANAR || reset)
sys/dev/pci/if_ice.c
29176
uint32_t reset;
sys/dev/pci/if_ice.c
29178
reset = (ICE_READ(hw, GLGEN_RSTAT) &
sys/dev/pci/if_ice.c
29181
if (reset == ICE_RESET_CORER)
sys/dev/pci/if_ice.c
29183
else if (reset == ICE_RESET_GLOBR)
sys/dev/pci/if_ngbe.c
1844
phy->ops.reset = ngbe_phy_reset;
sys/dev/pci/if_ngbe.c
3509
status = hw->phy.ops.reset(sc);
sys/dev/pci/if_ngbe.c
3681
uint32_t reset = 0;
sys/dev/pci/if_ngbe.c
3735
reset = NGBE_MIS_RST_LAN0_RST;
sys/dev/pci/if_ngbe.c
3737
reset = NGBE_MIS_RST_LAN1_RST;
sys/dev/pci/if_ngbe.c
3739
reset = NGBE_MIS_RST_LAN2_RST;
sys/dev/pci/if_ngbe.c
3741
reset = NGBE_MIS_RST_LAN3_RST;
sys/dev/pci/if_ngbe.c
3744
reset | NGBE_READ_REG(hw, NGBE_MIS_RST));
sys/dev/pci/if_ngbereg.h
802
int (*reset)(struct ngbe_softc *);
sys/dev/pci/igc_api.c
354
if (hw->phy.ops.reset)
sys/dev/pci/igc_api.c
355
return hw->phy.ops.reset(hw);
sys/dev/pci/igc_hw.h
241
int (*reset)(struct igc_hw *);
sys/dev/pci/igc_i225.c
152
phy->ops.reset = igc_phy_hw_reset_generic;
sys/dev/pci/igc_i225.c
161
ret_val = hw->phy.ops.reset(hw);
sys/dev/pci/igc_phy.c
33
phy->ops.reset = igc_null_ops_generic;
sys/dev/pci/ixgbe_82598.c
226
phy->ops.reset = ixgbe_reset_phy_nl;
sys/dev/pci/ixgbe_82598.c
879
hw->phy.ops.reset(hw);
sys/dev/pci/ixgbe_82599.c
1091
if (hw->phy.reset_disable == FALSE && hw->phy.ops.reset != NULL)
sys/dev/pci/ixgbe_82599.c
1092
hw->phy.ops.reset(hw);
sys/dev/pci/ixgbe_82599.c
185
hw->phy.ops.reset = NULL;
sys/dev/pci/ixgbe_82599.c
219
hw->phy.ops.reset = NULL;
sys/dev/pci/ixgbe_phy.c
323
phy->ops.reset = ixgbe_reset_phy_generic;
sys/dev/pci/ixgbe_type.h
3993
int32_t (*reset)(struct ixgbe_hw *);
sys/dev/pci/ixgbe_x540.c
105
phy->ops.reset = NULL;
sys/dev/pci/ixgbe_x550.c
1443
hw->phy.ops.reset = NULL;
sys/dev/pci/ixgbe_x550.c
2151
phy->ops.reset = NULL;
sys/dev/pci/ixgbe_x550.c
2168
phy->ops.reset = NULL;
sys/dev/pci/ixgbe_x550.c
2190
phy->ops.reset = ixgbe_reset_phy_t_X550em;
sys/dev/pci/ixgbe_x550.c
2197
phy->ops.reset = ixgbe_reset_phy_fw;
sys/dev/pci/ixgbe_x550.c
2300
if (!hw->phy.reset_disable && hw->phy.ops.reset) {
sys/dev/pci/ixgbe_x550.c
2301
if (hw->phy.ops.reset(hw) == IXGBE_ERR_OVERTEMP)
sys/dev/pci/maestro.c
704
sc->host_if.reset = maestro_reset_codec;
sys/dev/pci/neo.c
578
sc->host_if.reset = neo_reset_codec;
sys/dev/pci/pciide.c
6915
sc->sc_wdcdev.reset = pdc205xx_do_reset;
sys/dev/pci/pciide.c
6926
sc->sc_wdcdev.reset = pdc205xx_do_reset;
sys/dev/pci/yds.c
743
codec->host_if.reset = yds_reset_codec;
sys/dev/tc/bba.c
238
bba_reset(struct bba_softc *sc, int reset)
sys/dev/tc/bba.c
245
if (reset)
sys/dev/tc/bba.c
257
if (reset) {
sys/dev/tc/zs_ioasic.c
327
uint8_t reset = (channel == 0) ?
sys/dev/tc/zs_ioasic.c
330
zs_write_reg(cs, 9, reset);
sys/dev/usb/dwc2/dwc2_core.c
418
int reset, int is_host)
sys/dev/usb/dwc2/dwc2_core.c
421
return dwc2_host_exit_hibernation(hsotg, rem_wakeup, reset);
sys/dev/usb/dwc2/dwc2_core.c
423
return dwc2_gadget_exit_hibernation(hsotg, rem_wakeup, reset);
sys/dev/usb/dwc2/dwc2_core.h
1350
int reset, int is_host);
sys/dev/usb/dwc2/dwc2_core.h
1447
bool reset);
sys/dev/usb/dwc2/dwc2_core.h
1458
int rem_wakeup, int reset);
sys/dev/usb/dwc2/dwc2_core.h
1482
bool reset) {}
sys/dev/usb/dwc2/dwc2_core.h
1499
int rem_wakeup, int reset)
sys/dev/usb/dwc2/dwc2_core.h
1533
int rem_wakeup, int reset);
sys/dev/usb/dwc2/dwc2_core.h
1569
int rem_wakeup, int reset)
sys/dev/usb/dwc2/dwc2_hcd.c
5625
int reset)
sys/dev/usb/dwc2/dwc2_hcd.c
5638
__func__, rem_wakeup, reset);
sys/dev/usb/dwc2/dwc2_hcd.c
5680
if (reset) {
sys/dev/usb/if_athn_usb.c
1539
goto reset;
sys/dev/usb/if_athn_usb.c
1543
goto reset;
sys/dev/usb/if_athn_usb.c
1547
goto reset;
sys/dev/usb/if_athn_usb.c
1553
goto reset;
sys/dev/usb/if_athn_usb.c
1560
reset: /* Error found, try a full reset. */
sys/dev/usb/if_urndis.c
682
struct rndis_reset_req *reset;
sys/dev/usb/if_urndis.c
686
reset = malloc(sizeof(*reset), M_TEMP, M_WAITOK | M_CANFAIL);
sys/dev/usb/if_urndis.c
687
if (reset == NULL) {
sys/dev/usb/if_urndis.c
692
reset->rm_type = htole32(REMOTE_NDIS_RESET_MSG);
sys/dev/usb/if_urndis.c
693
reset->rm_len = htole32(sizeof(*reset));
sys/dev/usb/if_urndis.c
694
reset->rm_rid = 0; /* XXX rm_rid == reserved ... remove ? */
sys/dev/usb/if_urndis.c
698
letoh32(reset->rm_type),
sys/dev/usb/if_urndis.c
699
letoh32(reset->rm_len),
sys/dev/usb/if_urndis.c
700
letoh32(reset->rm_rid)));
sys/dev/usb/if_urndis.c
702
rval = urndis_ctrl_send(sc, reset, sizeof(*reset));
sys/dev/usb/if_urndis.c
703
free(reset, M_TEMP, sizeof *reset);
sys/dev/usb/ohci.c
815
goto reset;
sys/dev/usb/ohci.c
828
reset:
sys/dev/usb/umass.c
874
sc->reset(sc, STATUS_CMD_OK);
sys/dev/wscons/wsdisplay.c
1166
(*scr->scr_dconf->wsemul->reset)
sys/dev/wscons/wsdisplay.c
1188
(*scr->scr_dconf->wsemul->reset)
sys/dev/wscons/wsdisplay.c
1926
(*scr->scr_dconf->wsemul->reset)(scr->scr_dconf->wsemulcookie,
sys/dev/wscons/wsdisplay.c
938
(*scr->scr_dconf->wsemul->reset)(scr->scr_dconf->wsemulcookie,
sys/dev/wscons/wsdisplay.c
941
(*scr->scr_dconf->wsemul->reset)
sys/dev/wscons/wsemulvar.h
73
void (*reset)(void *, enum wsemul_resetops);
sys/kern/kern_sig.c
765
postsig_done(struct proc *p, int signum, sigset_t catchmask, int reset)
sys/kern/kern_sig.c
769
if (reset != 0) {
usr.bin/ftp/cmdtab.c
189
{ "reset", H(resethelp), 0, 1, 1, CMPL0 reset },
usr.bin/ftp/extern.h
105
void reset(int, char **);
usr.bin/patch/util.c
285
set_signals(int reset)
usr.bin/patch/util.c
289
if (!reset) {
usr.bin/tmux/grid.c
912
int reset = (n != 0 && s[0] == 0);
usr.bin/tmux/grid.c
916
if (!reset &&
usr.bin/tmux/grid.c
920
if (reset && (newc[0] == 49 || newc[0] == 39))
usr.bin/vi/vi/v_txt.c
2126
int ac, nf, reset;
usr.bin/vi/vi/v_txt.c
2163
reset = 1;
usr.bin/vi/vi/v_txt.c
2166
reset = 0;
usr.bin/vi/vi/v_txt.c
2218
if (reset)
usr.sbin/bgpd/rtr_proto.c
955
struct rtr_reset reset;
usr.sbin/bgpd/rtr_proto.c
957
if (ibuf_get(pdu, &reset, sizeof(reset)) == -1)
usr.sbin/bgpd/rtr_proto.c
960
if (rtr_check_session_id(rs, 0, &reset.hdr, pdu) == -1)
usr.sbin/httpd/config.c
112
config_setreset(struct httpd *env, unsigned int reset)
usr.sbin/httpd/config.c
118
if ((reset & ps->ps_what[id]) == 0 ||
usr.sbin/httpd/config.c
122
&reset, sizeof(reset));
usr.sbin/httpd/config.c
86
config_purge(struct httpd *env, unsigned int reset)
usr.sbin/httpd/config.c
93
what = ps->ps_what[privsep_process] & reset;
usr.sbin/httpd/httpd.c
333
parent_reload(struct httpd *env, unsigned int reset, const char *filename)
usr.sbin/httpd/httpd.c
345
log_debug("%s: level %d config file %s", __func__, reset, filename);
usr.sbin/httpd/httpd.c
349
if (reset == CONFIG_RELOAD) {
usr.sbin/httpd/httpd.c
362
config_setreset(env, reset);
usr.sbin/kgmon/kgmon.c
168
reset(kvp, cpuid);
usr.sbin/kgmon/kgmon.c
69
void reset(struct kvmvars *, int);
usr.sbin/lpd/lp.c
526
lp_getqueuestate(struct lp_printer *lp, int reset, int *qstate)
usr.sbin/lpd/lp.c
561
if (reset) {
usr.sbin/mtrace/mtrace.c
1025
int *r = reset + rno;
usr.sbin/mtrace/mtrace.c
943
int *r = reset + rno;
usr.sbin/mtrace/mtrace.c
96
int reset[MAXHOPS]; /* To get around 3.4 bug, ... */
usr.sbin/ospf6d/lsupdate.c
394
int reset = 0;
usr.sbin/ospf6d/lsupdate.c
402
reset = 1;
usr.sbin/ospf6d/lsupdate.c
407
if (reset && TAILQ_FIRST(&nbr->ls_retrans_list)) {
usr.sbin/ospfd/lsupdate.c
387
int reset = 0;
usr.sbin/ospfd/lsupdate.c
395
reset = 1;
usr.sbin/ospfd/lsupdate.c
400
if (reset && TAILQ_FIRST(&nbr->ls_retrans_list)) {
usr.sbin/relayd/config.c
139
config_purge(struct relayd *env, u_int reset)
usr.sbin/relayd/config.c
154
what = ps->ps_what[privsep_process] & reset;
usr.sbin/relayd/config.c
226
config_setreset(struct relayd *env, u_int reset)
usr.sbin/relayd/config.c
232
if ((reset & ps->ps_what[id]) == 0 ||
usr.sbin/relayd/config.c
235
proc_compose(ps, id, IMSG_CTL_RESET, &reset, sizeof(reset));
usr.sbin/relayd/relayd.c
329
parent_reload(struct relayd *env, u_int reset, const char *filename)
usr.sbin/relayd/relayd.c
341
log_debug("%s: level %d config file %s", __func__, reset, filename);
usr.sbin/relayd/relayd.c
345
if (reset == CONFIG_RELOAD) {
usr.sbin/relayd/relayd.c
358
config_setreset(env, reset);
usr.sbin/rpki-client/repo.c
716
goto reset;
usr.sbin/rpki-client/repo.c
724
goto reset;
usr.sbin/rpki-client/repo.c
737
goto reset;
usr.sbin/rpki-client/repo.c
748
goto reset;
usr.sbin/rpki-client/repo.c
755
goto reset;
usr.sbin/rpki-client/repo.c
759
goto reset;
usr.sbin/rpki-client/repo.c
766
reset:
usr.sbin/smtpd/lka.c
708
goto reset;
usr.sbin/smtpd/lka.c
714
reset:
usr.sbin/unbound/daemon/remote.c
1219
do_stats(RES* ssl, struct worker* worker, int reset)
usr.sbin/unbound/daemon/remote.c
1229
server_stats_obtain(worker, daemon->workers[i], &s, reset);
usr.sbin/unbound/daemon/remote.c
1240
if(!print_uptime(ssl, worker, reset))
usr.sbin/unbound/daemon/remote.c
976
print_uptime(RES* ssl, struct worker* worker, int reset)
usr.sbin/unbound/daemon/remote.c
982
if(reset)
usr.sbin/unbound/daemon/stats.c
141
int reset)
usr.sbin/unbound/daemon/stats.c
148
if(reset && !worker->env.cfg->stat_cumulative) {
usr.sbin/unbound/daemon/stats.c
155
if(reset && !worker->env.cfg->stat_cumulative) {
usr.sbin/unbound/daemon/stats.c
166
int reset)
usr.sbin/unbound/daemon/stats.c
180
if(reset && !worker->env.cfg->stat_cumulative) {
usr.sbin/unbound/daemon/stats.c
189
get_rrset_bogus(struct worker* worker, int reset)
usr.sbin/unbound/daemon/stats.c
199
if(reset && !worker->env.cfg->stat_cumulative)
usr.sbin/unbound/daemon/stats.c
207
get_queries_ratelimit(struct worker* worker, int reset)
usr.sbin/unbound/daemon/stats.c
217
if(reset && !worker->env.cfg->stat_cumulative)
usr.sbin/unbound/daemon/stats.c
226
get_dnscrypt_cache_miss(struct worker* worker, int reset)
usr.sbin/unbound/daemon/stats.c
234
if(reset && !worker->env.cfg->stat_cumulative)
usr.sbin/unbound/daemon/stats.c
242
get_dnscrypt_replay(struct worker* worker, int reset)
usr.sbin/unbound/daemon/stats.c
249
if(reset && !worker->env.cfg->stat_cumulative)
usr.sbin/unbound/daemon/stats.c
257
server_stats_compile(struct worker* worker, struct ub_stats_info* s, int reset)
usr.sbin/unbound/daemon/stats.c
297
s->svr.rrset_bogus = (long long)get_rrset_bogus(worker, reset);
usr.sbin/unbound/daemon/stats.c
300
s->svr.queries_ratelimited = (long long)get_queries_ratelimit(worker, reset);
usr.sbin/unbound/daemon/stats.c
315
(long long)get_dnscrypt_cache_miss(worker, reset);
usr.sbin/unbound/daemon/stats.c
321
(long long)get_dnscrypt_replay(worker, reset);
usr.sbin/unbound/daemon/stats.c
352
set_neg_cache_stats(worker, &s->svr, reset);
usr.sbin/unbound/daemon/stats.c
355
set_subnet_stats(worker, &s->svr, reset);
usr.sbin/unbound/daemon/stats.c
373
if(reset && !worker->env.cfg->stat_cumulative) {
usr.sbin/unbound/daemon/stats.c
379
struct ub_stats_info* s, int reset)
usr.sbin/unbound/daemon/stats.c
385
server_stats_compile(worker, s, reset);
usr.sbin/unbound/daemon/stats.c
390
if(reset)
usr.sbin/unbound/daemon/stats.c
432
void server_stats_reply(struct worker* worker, int reset)
usr.sbin/unbound/daemon/stats.c
435
server_stats_compile(worker, &s, reset);
usr.sbin/unbound/daemon/stats.h
100
void server_stats_reply(struct worker* worker, int reset);
usr.sbin/unbound/daemon/stats.h
81
struct ub_stats_info* s, int reset);
usr.sbin/unbound/daemon/stats.h
92
int reset);
usr.sbin/vmd/config.c
114
what = ps->ps_what[privsep_process] & reset;
usr.sbin/vmd/config.c
163
config_setreset(struct vmd *env, unsigned int reset)
usr.sbin/vmd/config.c
171
if ((reset & ps->ps_what[id]) == 0 ||
usr.sbin/vmd/config.c
174
proc_compose(ps, id, IMSG_CTL_RESET, &reset, sizeof(reset));
usr.sbin/vmd/config.c
99
config_purge(struct vmd *env, unsigned int reset)
usr.sbin/vmd/vioblk.c
293
goto reset;
usr.sbin/vmd/vioblk.c
297
goto reset;
usr.sbin/vmd/vioblk.c
303
goto reset;
usr.sbin/vmd/vioblk.c
349
goto reset;
usr.sbin/vmd/vioblk.c
356
goto reset;
usr.sbin/vmd/vioblk.c
377
reset:
usr.sbin/vmd/vionet.c
351
goto reset;
usr.sbin/vmd/vionet.c
365
goto reset;
usr.sbin/vmd/vionet.c
374
goto reset;
usr.sbin/vmd/vionet.c
383
goto reset;
usr.sbin/vmd/vionet.c
395
goto reset;
usr.sbin/vmd/vionet.c
403
goto reset;
usr.sbin/vmd/vionet.c
410
goto reset;
usr.sbin/vmd/vionet.c
418
goto reset;
usr.sbin/vmd/vionet.c
433
goto reset;
usr.sbin/vmd/vionet.c
458
reset:
usr.sbin/vmd/vionet.c
692
goto reset;
usr.sbin/vmd/vionet.c
705
goto reset;
usr.sbin/vmd/vionet.c
715
goto reset;
usr.sbin/vmd/vionet.c
729
goto reset;
usr.sbin/vmd/vionet.c
737
goto reset;
usr.sbin/vmd/vionet.c
744
goto reset;
usr.sbin/vmd/vionet.c
791
goto reset;
usr.sbin/vmd/vionet.c
826
reset:
usr.sbin/vmd/vmd.c
851
vmd_reload(unsigned int reset, const char *filename)
usr.sbin/vmd/vmd.c
863
log_debug("%s: level %d config file %s", __func__, reset, filename);
usr.sbin/vmd/vmd.c
865
if (reset) {
usr.sbin/vmd/vmd.c
867
config_purge(env, reset);
usr.sbin/vmd/vmd.c
868
config_setreset(env, reset);
