bus_space_read_2
#define IR() bus_space_read_2(another_mystery_icu_iot, \
#define IR(h) bus_space_read_2(mystery_icu_iot, mystery_icu_ioh[h], 0)
bus_space_read_2((sc)->sc_iot, (sc)->sc_ioh, (reg))
bus_space_read_2((t), (h), (o))
cba = bus_space_read_2(sc->sc_iot, sc->sc_ioh, GCB_CBA);
cnfg = bus_space_read_2(sc->sc_iot, sc->sc_ioh, GCB_WDCNFG);
setup = bus_space_read_2(glxclk_sc->sc_iot, glxclk_sc->sc_ioh,
*dest++ = bus_space_read_2(tag, handle, offset);
*dest++ = bus_space_read_2(tag, handle, offset);
bus_space_read_2(wd->sc_iot, wd->sc_ioh, reg & 0x6)
return bus_space_read_2(sc->sc_iot, sc->sc_ioh, off);
static inline u_int16_t bus_space_read_2(bus_space_tag_t,
regval = bus_space_read_2(sc->sc_iot, ioh, offset);
bus_space_read_2(iot, ioh, reg);
k = bus_space_read_2(iot, ioh, EP_W0_ADDRESS_CFG);
irq = bus_space_read_2(iot, ioh, EP_W0_RESOURCE_CFG) >> 12;
if(!ISSET(bus_space_read_2(iot, ioh, EXUART_USR2), EXUART_SR2_RDR))
while(ISSET(bus_space_read_2(iot, ioh, EXUART_USR2), EXUART_SR2_RDR)) {
if (bus_space_read_2(sc->sc_iot, sc->sc_ioh, WCR) & WCR_WDE)
reg = bus_space_read_2(sc->sc_iot, sc->sc_ioh, WCR);
sr1 = bus_space_read_2(iot, ioh, IMXUART_USR1);
if(!ISSET(bus_space_read_2(iot, ioh, IMXUART_USR2), IMXUART_SR2_RDR))
while(ISSET(bus_space_read_2(iot, ioh, IMXUART_USR2), IMXUART_SR2_RDR)) {
c = bus_space_read_2(iot, ioh, IMXUART_URXD);
sc->sc_ucr1 = bus_space_read_2(iot, ioh, IMXUART_UCR1);
sc->sc_ucr2 = bus_space_read_2(iot, ioh, IMXUART_UCR2);
sc->sc_ucr3 = bus_space_read_2(iot, ioh, IMXUART_UCR3);
sc->sc_ucr4 = bus_space_read_2(iot, ioh, IMXUART_UCR4);
while((bus_space_read_2(imxuartconsiot, imxuartconsioh, IMXUART_USR2) &
while((bus_space_read_2(imxuartconsiot, imxuartconsioh, IMXUART_USR2) &
(bus_space_read_2((sc)->sc_iot, (sc)->sc_ioh, (reg)))
reg = bus_space_read_2(sc->sc_iot, sc->sc_ioh, SDHC_CLOCK_CTL);
reg = bus_space_read_2(sc->sc_iot, sc->sc_ioh, SDHC_CLOCK_CTL);
return bus_space_read_2(sc->sc_iot, sc->sc_ioh,
bus_space_read_2((sc)->aac_memt, (sc)->aac_memh, (reg))
bus_space_read_2((sc)->sc_mem1_bt, (sc)->sc_mem1_bh, \
#define ASC_GET_CHIP_SIGNATURE_WORD(iot, ioh) bus_space_read_2((iot), (ioh), ASC_IOP_SIG_WORD)
#define ASC_GET_CHIP_CFG_LSW(iot, ioh) bus_space_read_2((iot), (ioh), ASC_IOP_CONFIG_LOW)
#define ASC_GET_CHIP_CFG_MSW(iot, ioh) bus_space_read_2((iot), (ioh), ASC_IOP_CONFIG_HIGH)
#define ASC_GET_CHIP_EEP_DATA(iot, ioh) bus_space_read_2((iot), (ioh), ASC_IOP_EEP_DATA)
#define ASC_GET_CHIP_LRAM_ADDR(iot, ioh) bus_space_read_2((iot), (ioh), ASC_IOP_RAM_ADDR)
#define ASC_GET_CHIP_LRAM_DATA(iot, ioh) bus_space_read_2((iot), (ioh), ASC_IOP_RAM_DATA)
#define ASC_GET_CHIP_LRAM_DATA_NO_SWAP(iot, ioh) SWAPBYTES(bus_space_read_2((iot), (ioh), ASC_IOP_RAM_DATA))
#define ASC_GET_CHIP_LRAM_DATA_NO_SWAP(iot, ioh) bus_space_read_2((iot), (ioh), ASC_IOP_RAM_DATA)
#define ASC_GET_CHIP_STATUS(iot, ioh) (u_int16_t)bus_space_read_2((iot), (ioh), ASC_IOP_STATUS)
#define ASC_GET_PC_ADDR(iot, ioh) bus_space_read_2((iot), (ioh), ASC_IOP_REG_PC)
#define ASC_READ_CHIP_AX(iot, ioh) bus_space_read_2((iot), (ioh), ASC_IOP_REG_AX)
#define ASC_READ_CHIP_IH(iot, ioh) bus_space_read_2((iot), (ioh), ASC_IOP_REG_IH)
#define ASC_READ_CHIP_FIFO_L(iot, ioh) bus_space_read_2((iot), (ioh), ASC_IOP_REG_FIFO_L)
#define ASC_READ_CHIP_FIFO_H(iot, ioh) bus_space_read_2((iot), (ioh), ASC_IOP_REG_FIFO_H)
#define ASC_READ_CHIP_DA0(iot, ioh) bus_space_read_2((iot), (ioh), ASC_IOP_REG_DA0)
#define ASC_READ_CHIP_DA1(iot, ioh) bus_space_read_2((iot), (ioh), ASC_IOP_REG_DA1)
#define ASC_READ_CHIP_DC0(iot, ioh) bus_space_read_2((iot), (ioh), ASC_IOP_REG_DC0)
#define ASC_READ_CHIP_DC1(iot, ioh) bus_space_read_2((iot), (ioh), ASC_IOP_REG_DC1)
bus_space_read_2((iot), (ioh), (reg_off))
(word) = bus_space_read_2((iot), (ioh), IOPW_RAM_DATA); \
bus_space_read_2((iot), (ioh), IOPW_RAM_DATA) \
aic_le16toh(bus_space_read_2((ahd)->tags[(port) >> 8], \
bus_space_read_2(sc->sc_iot, sc->sc_ioh, reg)
bus_space_read_2((sc)->sc_mem_bt, (sc)->sc_mem_bh, (reg))
bus_space_read_2((sc)->sc_iot, (sc)->sc_ioh, port)
if ((bus_space_read_2(iot, ioh, ep_w1_reg(sc, EP_W1_RX_STATUS)) &
u_int16_t status = bus_space_read_2(iot, ioh, EP_STATUS);
fifost = bus_space_read_2(iot, ioh, EP_W4_FIFO_DIAG);
status = bus_space_read_2(iot, ioh, EP_STATUS);
len = bus_space_read_2(iot, ioh, ep_w1_reg(sc, EP_W1_RX_STATUS));
len = bus_space_read_2(iot, ioh,
data = (data << 1) | (bus_space_read_2(iot, ioh, 0) & 1);
j = bus_space_read_2(iot, ioh, EP_W0_EEPROM_COMMAND);
return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, EP_W0_EEPROM_DATA));
val = bus_space_read_2(sc->sc_iot, sc->sc_ioh, EP_W4_BOOM_PHYSMGMT);
val = bus_space_read_2(sc->sc_iot, sc->sc_ioh, EP_W4_BOOM_PHYSMGMT);
return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, EP_W4_BOOM_PHYSMGMT) &
mctl = bus_space_read_2(iot, ioh, EP_W3_MAC_CONTROL);
if ((bus_space_read_2(iot, ioh, EP_STATUS) &
if ((bus_space_read_2(iot, ioh, EP_STATUS) &
i = bus_space_read_2(iot, ioh, EP_W5_TX_AVAIL_THRESH);
ep_w0_config = bus_space_read_2(iot, ioh, EP_W0_CONFIG_CTRL);
port = bus_space_read_2(iot, ioh, EP_W0_EEPROM_DATA);
config1 = (u_int)bus_space_read_2(iot, ioh, EP_W3_INTERNAL_CONFIG + 2);
cor = bus_space_read_2(iot, ioh, 0) & ~0x30;
w4_media = bus_space_read_2(iot, ioh, EP_W4_MEDIA_TYPE);
resopt = bus_space_read_2(iot, ioh,
config0 = (u_int)bus_space_read_2(iot, ioh,
config1 = (u_int)bus_space_read_2(iot, ioh,
config0 = (u_int)bus_space_read_2(iot, ioh,
config1 = (u_int)bus_space_read_2(iot, ioh,
config0 = bus_space_read_2(iot, ioh, EP_W0_ADDRESS_CFG);
config1 = bus_space_read_2(iot, ioh, EP_W3_INTERNAL_CONFIG + 2);
ep_mediastatus = bus_space_read_2(iot, ioh, EP_W4_MEDIA_TYPE);
if (bus_space_read_2(iot, ioh, ep_w1_reg(sc, EP_W1_FREE_TX)) <
bus_space_read_2((sc)->sc_st, (sc)->sc_sh, (reg))
bus_space_read_2(sc->wi_btag, sc->wi_bhandle, \
letoh16(bus_space_read_2((sc)->sc_memt, (sc)->sc_memh, (o)))
#define CSR_READ_2(reg) bus_space_read_2(sc->sc_bust, sc->sc_bush, reg)
scr->cursortmp = bus_space_read_2(memt, memh, off);
data = (bus_space_read_2(memt, memh,
scr->cursortmp = bus_space_read_2(memt, memh, off);
c = bus_space_read_2(iot, ioh, UART_DR);
v = bus_space_read_2(sc->sc_iot, sc->sc_ioh, offset);
v = bus_space_read_2(sc->sc_iot, sc->sc_ioh, offset);
bus_space_read_2(sc->rl_btag, sc->rl_bhandle, csr)
return (bus_space_read_2(regs->r_bt, regs->r_bh, off));
sist = bus_space_read_2(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
bus_space_read_2(sc->sc_rt, sc->sc_rh, SIOP_DFBC);
return (bus_space_read_2(sc->sc_bst, sc->sc_bsh, MGMT_REG_W));
mctl = bus_space_read_2(bst, bsh, TXMIT_CONTROL_REG_W);
tmp = bus_space_read_2(bst, bsh, REVISION_REG_W);
tmp = bus_space_read_2(bst, bsh, IAR_ADDR0_REG_W + i);
tmp = bus_space_read_2(bst, bsh, CONFIG_REG_W);
tmp = bus_space_read_2(bst, bsh, CONFIG_REG_W);
tmp = bus_space_read_2(bst, bsh, CONFIG_REG_W);
while (bus_space_read_2(bst, bsh, MMU_CMD_REG_W) & MMUCR_BUSY)
if (bus_space_read_2(bst, bsh, FIFO_PORTS_REG_W) & FIFO_REMPTY)
packetno = bus_space_read_2(bst, bsh, FIFO_PORTS_REG_W);
while (bus_space_read_2(bst, bsh, MMU_CMD_REG_W) & MMUCR_BUSY)
packetno = bus_space_read_2(bst, bsh, FIFO_PORTS_REG_W) &
tx_status = bus_space_read_2(bst, bsh, DATA_REG_W);
while (bus_space_read_2(bst, bsh, MMU_CMD_REG_W) & MMUCR_BUSY)
card_stats = bus_space_read_2(bst, bsh, COUNTER_REG_W);
status = bus_space_read_2(bst, bsh, DATA_REG_W);
packetlen = bus_space_read_2(bst, bsh, DATA_REG_W);
while (bus_space_read_2(bst, bsh, MMU_CMD_REG_W) & MMUCR_BUSY)
packetno = bus_space_read_2(bst, bsh, FIFO_PORTS_REG_W);
val = (bus_space_read_2(iot, ioh, TCIC_R_ADDR2) & TCIC_SS_MASK)
val = bus_space_read_2(iot, ioh, TCIC_R_AUX);
val = bus_space_read_2(iot, ioh, TCIC_R_ADDR);
val = bus_space_read_2(iot, ioh, TCIC_R_ADDR2);
val = bus_space_read_2(iot, ioh, TCIC_R_EDC);
if ((bus_space_read_2(iot, ioh, TCIC_R_ADDR2)
val1 = bus_space_read_2(iot, ioh, TCIC_R_EDC);
val2 = bus_space_read_2(iot, ioh, TCIC_R_DATA);
val1 = bus_space_read_2(iot, ioh, TCIC_R_EDC);
return (bus_space_read_2(h->sc->iot, h->sc->ioh, reg));
val = bus_space_read_2(h->sc->iot, h->sc->ioh, reg);
val |= bus_space_read_2(h->sc->iot, h->sc->ioh, reg+2) << 16;
val = bus_space_read_2(h->sc->iot, h->sc->ioh, TCIC_R_DATA);
val = bus_space_read_2(iot, ioh, TCIC_R_AUX);
bus_space_read_2(iot,
if ((bus_space_read_2(iot, ioh, TRM_S1040_DMA_COMMAND) & 0x0001) != 0) {
if ((bus_space_read_2(iot, ioh,
if ((bus_space_read_2(iot, ioh,
RselTarLunId = bus_space_read_2(iot, ioh, TRM_S1040_SCSI_TARGETID) & 0x1FFF;
while ((bus_space_read_2(iot, ioh,
wval = bus_space_read_2(iot, ioh, TRM_S1040_GEN_CONTROL) & 0x7F;
wval = bus_space_read_2(iot, ioh, TRM_S1040_DMA_CONFIG) | DMA_ENHANCE;
if ((pDCB->DCBFlag & TRM_QUEUE_FULL) || (bus_space_read_2(iot, ioh,
scsi_status = bus_space_read_2(iot, ioh, TRM_S1040_SCSI_STATUS);
vgadata = bus_space_read_2(memt, memh, dispoffset);
if (bus_space_read_2(memt, memh, dispoffset) != 0xa55a)
bus_space_read_2(chp->cmd_iot, chp->cmd_ioh, 0);
bus_space_read_2(sc->xl_btag, sc->xl_bhandle, reg)
addr = (bus_space_read_2(iot, ioh2, GUS_DATA_LOW) & 0x1fff) << 7;
addr |= (bus_space_read_2(iot, ioh2, GUS_DATA_LOW) >> 9L) & 0x7f;
if (bus_space_read_2(memt, memh, i) != 0)
x = bus_space_read_2(iot, ioh, EF_W0_EEPROM_DATA);
if (bus_space_read_2(iot, ioh, EF_W1_FREE_TX) < len + pad + 4) {
while (bus_space_read_2(iot, ioh, EP_STATUS) & S_COMMAND_IN_PROGRESS)
(void)bus_space_read_2(iot, ioh, 10);
(void)bus_space_read_2(iot, ioh, 12);
while (bus_space_read_2(iot, ioh, EP_STATUS) & S_COMMAND_IN_PROGRESS)
status = bus_space_read_2(iot, ioh, EP_STATUS);
} while ((status = bus_space_read_2(iot, ioh, EP_STATUS)) &
j = bus_space_read_2(sc->sc_iot, sc->sc_ioh,
len = bus_space_read_2(iot, ioh, EF_W1_RX_STATUS);
bus_space_read_2((sc)->sc_iot, (sc)->sc_ioh, EP_W4_CTRLR_STATUS) \
bus_space_read_2((sc)->sc_iot, (sc)->sc_ioh, EP_W4_CTRLR_STATUS) \
ack = bus_space_read_2(sc->sc_iot, sc->sc_ioh, EP_W4_CTRLR_STATUS) &
if (bus_space_read_2(sc->sc_iot, sc->sc_ioh,
*ptr++ = bus_space_read_2(bst, bsh, EG_DATA);
bus_space_read_2((sc)->sc_iot, (sc)->sc_ioh, (off))
val = bus_space_read_2(iot, ioh, lesc->sc_rdp);
tmp = bus_space_read_2(iot, ioh, BANK_SELECT_REG_W);
tmp = bus_space_read_2(iot, ioh, BANK_SELECT_REG_W);
tmp = bus_space_read_2(iot, ioh, BASE_ADDR_REG_W);
tmp = bus_space_read_2(iot, ioh, REVISION_REG_W);
if (bus_space_read_2(memt, memh, i) != 0)
oldval = bus_space_read_2(memt, memh, 0);
val = bus_space_read_2(memt, memh, 0);
oldval = bus_space_read_2(memt, memh, 0);
val = bus_space_read_2(memt, memh, 0);
data = bus_space_read_2(sc->sc_iot, sc->sc_ioh, SKGPIO_GPIO_DIR);
data = bus_space_read_2(sc->sc_iot, sc->sc_ioh, SKGPIO_GPIO_INPUT);
data = bus_space_read_2(sc->sc_iot, sc->sc_ioh, SKGPIO_GPIO_INPUT);
data = bus_space_read_2(sc->sc_iot, sc->sc_ioh, SKGPIO_GPIO_DIR);
#define READ2(off) bus_space_read_2(asc->iot, asc->ioh, off)
st = bus_space_read_2(sc->sc_iot, sc->sc_i2c_ioh, AMDPM_SMBSTAT);
st = bus_space_read_2(sc->sc_iot, sc->sc_i2c_ioh,
st = bus_space_read_2(sc->sc_iot, sc->sc_i2c_ioh, AMDPM_SMBSTAT);
st = bus_space_read_2(sc->sc_iot, sc->sc_i2c_ioh, AMDPM_SMBSTAT);
data = bus_space_read_2(sc->sc_iot, sc->sc_i2c_ioh,
#define READ2(sc, a) bus_space_read_2(sc->iot, sc->aud_ioh, a)
irq_sts = bus_space_read_2(sc->sc_iot, sc->sc_ioh, ACC_IRQ_STATUS);
bus_space_read_2(sc->iot, sc->aud_ioh,
sts = bus_space_read_2(sc->iot, sc->aud_ioh,
bus_space_read_2(sc->iot, sc->aud_ioh,
osts = bus_space_read_2(sc->iot, sc->aud_ioh,
sts = bus_space_read_2(sc->iot, sc->aud_ioh,
sts = bus_space_read_2(sc->iot, sc->aud_ioh,
*val = bus_space_read_2(sc->iot_mix, sc->mix_ioh, reg);
sts = bus_space_read_2(sc->iot, sc->aud_ioh,
sts = bus_space_read_2(sc->iot, sc->aud_ioh,
bus_space_read_2(sc->iot, sc->aud_ioh,
sts = bus_space_read_2(sc->iot, sc->aud_ioh,
bus_space_read_2(sc->iot, sc->aud_ioh,
sts = bus_space_read_2(sc->iot, sc->aud_ioh,
#define TREAD2(sc, r) bus_space_read_2((sc)->memt, (sc)->memh, (r))
*val = bus_space_read_2(sc->sc_iot, sc->sc_ioh, AUVIA_CODEC_CTL);
bus_space_read_2((s)->az->iot, (s)->az->ioh, (s)->regbase + HDA_SD_##r)
#define AZ_READ_2(z, r) bus_space_read_2((z)->iot, (z)->ioh, HDA_##r)
__v = bus_space_read_2((sc)->memt, (sc)->memh, (o)); \
cfg_bar = bus_space_read_2(sc->iot, sc->ioh, CISS_CFG_BAR);
hwpos = bus_space_read_2(sc->sc_iot, sc->sc_ioh,
hwpos = bus_space_read_2(sc->sc_iot, sc->sc_ioh,
bus_space_read_2(psc->sc_iot, psc->sc_ioh,
#define EREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r))
*val = bus_space_read_2(sc->sc_iot, sc->sc_ioh, EMU_AC97DATA);
val = bus_space_read_2(sc->mt_iot, sc->mt_ioh, reg);
data = bus_space_read_2(iot, ioh, ESA_DSP_PORT_MEMORY_DATA);
*result = bus_space_read_2(iot, ioh, ESA_CODEC_DATA);
data = bus_space_read_2(iot, ioh, ESA_GPIO_DIRECTION);
data = bus_space_read_2(iot, ioh, ESA_RING_BUS_CTRL_B);
data = bus_space_read_2(iot, ioh, ESA_SDO_OUT_DEST_CTRL);
data = bus_space_read_2(iot, ioh, ESA_SDO_IN_DEST_CTRL);
data = bus_space_read_2(iot, ioh, ESA_GPIO_DIRECTION);
data = bus_space_read_2(iot, ioh, ESA_HOST_INT_CTRL);
data = bus_space_read_2(iot, ioh, ESA_HOST_INT_CTRL);
data = bus_space_read_2(iot, ioh, ESA_HOST_INT_CTRL);
data = bus_space_read_2(iot, ioh, ESA_HOST_INT_CTRL);
k1 = bus_space_read_2(sc->sc_iot, sc->sc_ioh, FM_INTMASK);
for (i = 0; i < TIMO && bus_space_read_2(sc->sc_iot, sc->sc_ioh,
for (i = 0; i < TIMO && !(bus_space_read_2(sc->sc_iot, sc->sc_ioh,
*val = bus_space_read_2(sc->sc_iot, sc->sc_ioh, FM_CODEC_DATA);
for (i = 0; i < TIMO && bus_space_read_2(sc->sc_iot, sc->sc_ioh,
istat = bus_space_read_2(sc->sc_iot, sc->sc_ioh, FM_INTSTATUS);
k1 = bus_space_read_2(sc->sc_iot, sc->sc_ioh, FM_PLAY_CTL);
k1 = bus_space_read_2(sc->sc_iot, sc->sc_ioh, FM_REC_CTL);
res |= bus_space_read_2(iot, ioh, offset) &
res |= bus_space_read_2(iot, ioh, offset) &
res |= bus_space_read_2(iot, ioh, offset) & PCR_DATA_ON ? 1 : 0;
i = bus_space_read_2(iot, ioh, offset);
ri->info = bus_space_read_2(radio->tea.iot, radio->tea.ioh,
ctx->cmd_status = bus_space_read_2(sc->sc_dpmemt,
ctx->service = bus_space_read_2(sc->sc_dpmemt,
sc->sc_wdog_period = bus_space_read_2(sc->sc_iot,
bus_space_read_2((sc)->sc_mem_bt, (sc)->sc_mem_bh, (reg))
bus_space_read_2((sc)->sc_mem_bt, (sc)->sc_mem_bh, (reg))
bus_space_read_2((sc)->sc_mem_bt, (sc)->sc_mem_bh, (reg))
((uint16_t *)otp)[i] = bus_space_read_2(sc->sc_reg_iot,
ring->r_ptr = bus_space_read_2(sc->sc_tcm_iot,
ring->w_ptr = bus_space_read_2(sc->sc_tcm_iot,
sc->sc_max_rxbufpost = bus_space_read_2(sc->sc_tcm_iot, sc->sc_tcm_ioh,
bus_space_read_2(((struct em_osdep *)(hw)->back)->flash_bus_space_tag, \
bus_space_read_2((sc)->sc_st, (sc)->sc_sh, (reg))
bus_space_read_2((sc)->sc_st, (sc)->sc_sh, (reg))
bus_space_read_2(sc->lge_btag, sc->lge_bhandle, reg)
bus_space_read_2((sc)->sc_mmiot, (sc)->sc_mmioh, (reg))
(void) bus_space_read_2(sc->sc_st, sc->sc_sh, PCN16_RESET);
bus_space_read_2(sc->rge_btag, sc->rge_bhandle, reg)
val = bus_space_read_2(sc->sc_st, sc->sc_sh, addr);
bus_space_read_2((sc)->sc_iot, (sc)->sc_ioh, reg)
bus_space_read_2((sc)->sk_btag, (sc)->sk_bhandle, (reg))
bus_space_read_2(sc->ste_btag, sc->ste_bhandle, reg)
bus_space_read_2((_sc)->sc_st, (_sc)->sc_sh, (reg))
bus_space_read_2(sc->tl_btag, sc->tl_bhandle, reg)
bus_space_read_2(sc->vge_btag, sc->vge_bhandle, reg)
bus_space_read_2(sc->vr_btag, sc->vr_bhandle, reg)
bus_space_read_2((sc)->sc_mem_bt, (sc)->sc_mem_bh, (reg))
bus_space_read_2(sc->wb_btag, sc->wb_bhandle, reg)
#define IREAD2(sc, a) bus_space_read_2((sc)->iot, (sc)->ioh, (a))
*datap = bus_space_read_2(sc->iot, sc->ioh, PORT_CODEC_REG);
data = bus_space_read_2(sc->iot, sc->ioh, PORT_GPIO_DIR);
~bus_space_read_2(sc->iot, sc->ioh, PORT_GPIO_DATA);
return bus_space_read_2(sc->iot, sc->ioh, PORT_DSP_DATA);
if (bus_space_read_2(sc->iot, sc->ioh,
if (bus_space_read_2(sc->iot, sc->ioh, PORT_DSP_DATA) == data)
return bus_space_read_2(sc->iot, sc->ioh, PORT_WAVCACHE_DATA);
bus_space_read_2(sc->iot, sc->ioh, PORT_GPIO_DIR) | 0x600);
if (bus_space_read_2(sc->sc_iot, sc->sc_ioh, AMCC_MCSR)
return bus_space_read_2(st, sh, regno);
return bus_space_read_2(st, sh, regno);
temp = bus_space_read_2(sc->sc_memt, sc->sc_memh, PCHTEMP_TEMP);
scnt = bus_space_read_2(chp->cmd_iot, iohs[wdr_seccnt], 0);
sn = bus_space_read_2(chp->cmd_iot, iohs[wdr_sector], 0);
cl = bus_space_read_2(chp->cmd_iot, iohs[wdr_cyl_lo], 0);
ch = bus_space_read_2(chp->cmd_iot, iohs[wdr_cyl_hi], 0);
v = bus_space_read_2(sc->sc_iot, sc->sc_mbox_ioh, offset);
(bus_addr_t)bus_space_read_2(pa->pa_memt, romh, ctx.romoffs + 0x0e);
tmp16 = bus_space_read_2(romt, romh, offs + 0);
dsoffs = (bus_addr_t)bus_space_read_2(romt, romh, offs + 0x18);
val = bus_space_read_2(sc->sc_iot, sc->sc_ioh, off);
ret = bus_space_read_2(sc->sc_iot, sc->sc_ioh,
return bus_space_read_2(sc->sc_devcfg_iot, sc->sc_devcfg_ioh, index);
#define YREAD2(sc, r) bus_space_read_2((sc)->memt, (sc)->memh, (r))
return bus_space_read_2(sc->memt,sc->memh,r);
bus_space_read_2((sc)->sc_pmemh.memt, (sc)->sc_pmemh.memh, \
bus_space_read_2((sc)->sc_iot, (sc)->sc_ioh, (reg))
space = bus_space_read_2(bst, bsh, offset + TSO0) & 0x7fff;
bus_space_read_2(sc->sc_bst, sc->sc_bsh, sc->sc_offset + TXST0);
bus_space_read_2(sc->sc_bst, sc->sc_bsh, sc->sc_offset + RBC0) &
hw->hw_hcr = bus_space_read_2(sc->sc_bustag, h, L64854_REG_HCR);
hw->hw_ocr = bus_space_read_2(sc->sc_bustag, h, L64854_REG_OCR);
irq = bus_space_read_2(t, h, L64854_REG_ICR);
irq = bus_space_read_2(lsi->sc_bustag, lsi->sc_regs, L64854_REG_ICR);
discard = bus_space_read_2(lesc->sc_bustag, lesc->sc_reg,
return (bus_space_read_2(lesc->sc_bustag, lesc->sc_reg, LEREG1_RDP));
discard = bus_space_read_2(lesc->sc_bustag, lesc->sc_reg,
return (bus_space_read_2(lesc->sc_bustag, lesc->sc_reg, LEREG1_RDP));
discard = bus_space_read_2(lesc->sc_bustag, lesc->sc_reg,
return (bus_space_read_2(lesc->sc_bustag, lesc->sc_reg, LEREG1_RDP));
return (bus_space_read_2(h->tag, h->regs, o));
return bus_space_read_2(hp->iot, hp->ioh, offset);
#define EREAD2(sc, a) bus_space_read_2((sc)->iot, (sc)->ioh, (a))
#define EOREAD2(sc, a) bus_space_read_2((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a))
return bus_space_read_2(sc->iot, sc->ioh, r);
return bus_space_read_2(sc->iot, sc->ioh, r);