sys/arch/algor/algor/algor_intr.c

141

if (pending & (MIPS_INT_MASK_0|MIPS_INT_MASK_1|MIPS_INT_MASK_2|

sys/arch/algor/algor/algor_intr.c

78

|MIPS_INT_MASK_0|MIPS_INT_MASK_1

sys/arch/algor/algor/algor_p4032_intr.c

466

if ((ipending & (MIPS_INT_MASK_0 << level)) == 0)

sys/arch/algor/algor/algor_p5064_intr.c

554

if ((ipending & (MIPS_INT_MASK_0 << level)) == 0)

sys/arch/algor/algor/algor_p6032_intr.c

400

if ((ipending & (MIPS_INT_MASK_0 << level)) == 0)

sys/arch/arc/arc/c_magnum.c

95

| MIPS_INT_MASK_0

sys/arch/arc/arc/c_nec_eisa.c

117

| MIPS_INT_MASK_0

sys/arch/arc/arc/c_nec_pci.c

122

| MIPS_INT_MASK_0

sys/arch/cobalt/cobalt/interrupt.c

144

[IPL_NONE] = MIPS_INT_MASK_0,

sys/arch/cobalt/cobalt/interrupt.c

145

[IPL_SOFTCLOCK] = MIPS_SOFT_INT_MASK_0 | MIPS_INT_MASK_0,

sys/arch/cobalt/cobalt/interrupt.c

146

[IPL_SOFTBIO] = MIPS_SOFT_INT_MASK_0 | MIPS_INT_MASK_0,

sys/arch/cobalt/cobalt/interrupt.c

147

[IPL_SOFTNET] = MIPS_SOFT_INT_MASK | MIPS_INT_MASK_0,

sys/arch/cobalt/cobalt/interrupt.c

148

[IPL_SOFTSERIAL] = MIPS_SOFT_INT_MASK | MIPS_INT_MASK_0,

sys/arch/cobalt/cobalt/interrupt.c

434

if (__predict_false(pending & MIPS_INT_MASK_0)) {

sys/arch/emips/include/intr.h

50

#define MIPS_SPL0 (MIPS_INT_MASK_0|MIPS_SOFT_INT_MASK_0|MIPS_SOFT_INT_MASK_1)

sys/arch/evbmips/gdium/gdium_intr.c

149

MIPS_INT_MASK_0 |

sys/arch/evbmips/gdium/gdium_intr.c

156

MIPS_INT_MASK_0 |

sys/arch/evbmips/ingenic/intr.c

218

if (ipending & MIPS_INT_MASK_0) {

sys/arch/evbmips/ingenic/intr.c

72

MIPS_INT_MASK_0 |

sys/arch/evbmips/ingenic/intr.c

78

MIPS_INT_MASK_0 |

sys/arch/evbmips/loongson/generic2e_machdep.c

152

.bonito_mips_intr = MIPS_INT_MASK_0,

sys/arch/evbmips/loongson/loongson_intr.c

79

MIPS_INT_MASK_0 |

sys/arch/evbmips/loongson/loongson_intr.c

86

MIPS_INT_MASK_0 |

sys/arch/evbmips/loongson/yeeloong_machdep.c

181

.isa_mips_intr = MIPS_INT_MASK_0,

sys/arch/evbmips/loongson/yeeloong_machdep.c

202

.isa_mips_intr = MIPS_INT_MASK_0,

sys/arch/evbmips/loongson/yeeloong_machdep.c

223

.isa_mips_intr = MIPS_INT_MASK_0,

sys/arch/evbmips/malta/malta_intr.c

264

if (ipending & MIPS_INT_MASK_0) {

sys/arch/evbmips/malta/malta_intr.c

73

[IPL_VM] = MIPS_SOFT_INT_MASK | MIPS_INT_MASK_0,

sys/arch/evbmips/malta/malta_intr.c

74

[IPL_SCHED] = MIPS_SOFT_INT_MASK | MIPS_INT_MASK_0

sys/arch/evbmips/mipssim/mipssim_intr.c

114

if ((ipending & (MIPS_INT_MASK_0 << level)) == 0)

sys/arch/evbmips/mipssim/mipssim_intr.c

53

| MIPS_INT_MASK_0 | MIPS_INT_MASK_1

sys/arch/evbmips/mipssim/mipssim_intr.c

56

| MIPS_INT_MASK_0 | MIPS_INT_MASK_1

sys/arch/evbmips/sbmips/sb1250_icu.c

66

[IPL_VM] = MIPS_SOFT_INT_MASK | MIPS_INT_MASK_0

sys/arch/evbmips/sbmips/sb1250_icu.c

68

[IPL_SCHED] = MIPS_SOFT_INT_MASK | MIPS_INT_MASK_0

sys/arch/evbmips/sbmips/sb1250_icu.c

70

[IPL_DDB] = MIPS_SOFT_INT_MASK | MIPS_INT_MASK_0

sys/arch/ews4800mips/ews4800mips/tr2_intr.c

242

if (ipending & MIPS_INT_MASK_0) { /* FDD, PRINTER */

sys/arch/ews4800mips/ews4800mips/tr2_intr.c

59

| MIPS_INT_MASK_0

sys/arch/ews4800mips/ews4800mips/tr2_intr.c

63

| MIPS_INT_MASK_0

sys/arch/ews4800mips/ews4800mips/tr2a_intr.c

273

if ((ipending & MIPS_INT_MASK_0) && (intc_cause & INTC_INT0)) {

sys/arch/hpcmips/vr/vr.c

139

| MIPS_INT_MASK_0,

sys/arch/hpcmips/vr/vr.c

141

| MIPS_INT_MASK_0

sys/arch/hpcmips/vr/vr.c

554

if (ipending & MIPS_INT_MASK_0) {

sys/arch/mips/adm5120/adm5120_intr.c

271

if ((ipending & (MIPS_INT_MASK_0 << level)) == 0)

sys/arch/mips/adm5120/adm5120_intr.c

97

[IPL_VM] = MIPS_SOFT_INT_MASK|MIPS_INT_MASK_0,

sys/arch/mips/alchemy/au_icu.c

103

MIPS_INT_MASK_0 |

sys/arch/mips/alchemy/au_icu.c

321

if ((ipending & (MIPS_INT_MASK_0 << level)) == 0)

sys/arch/mips/atheros/ar5312.c

373

[IPL_VM] = MIPS_SOFT_INT_MASK | MIPS_INT_MASK_0

sys/arch/mips/atheros/ar5315.c

358

[IPL_VM] = MIPS_SOFT_INT_MASK | MIPS_INT_MASK_0

sys/arch/mips/atheros/ar7100.c

78

MIPS_INT_MASK_0 | /* PCI */

sys/arch/mips/atheros/ar7100.c

81

MIPS_INT_MASK_0 | /* PCI */

sys/arch/mips/atheros/ar7100.c

86

MIPS_INT_MASK_0 | /* PCIE RC */

sys/arch/mips/atheros/ar9344.c

373

MIPS_INT_MASK_0 | /* PCIE RC */

sys/arch/mips/atheros/ar_intr.c

231

ipending *= __BIT(31) / (MIPS_INT_MASK_0 << (NINTRS-1));

sys/arch/mips/cavium/octeon_intr.c

499

} else if (ipending & MIPS_INT_MASK_0) {

sys/arch/mips/cavium/octeon_intr.c

83

[IPL_VM] = MIPS_SOFT_INT_MASK | MIPS_INT_MASK_0,

sys/arch/mips/cavium/octeon_intr.c

84

[IPL_SCHED] = MIPS_SOFT_INT_MASK | MIPS_INT_MASK_0

sys/arch/mips/cavium/octeon_intr.c

86

[IPL_DDB] = MIPS_SOFT_INT_MASK | MIPS_INT_MASK_0

sys/arch/mips/ralink/ralink_intr.c

355

const int irq = bitno - (31 - __builtin_clz(MIPS_INT_MASK_0));

sys/arch/mipsco/mipsco/mips_3x30.c

126

HANDLE_INTR(SYS_INTR_LEVEL0, MIPS_INT_MASK_0);

sys/arch/mipsco/mipsco/mips_3x30.c

64

#define MIPS_INT_MASK_SPL0 (MIPS_INT_MASK_0|MIPS_INT_MASK_SPL_SOFT1)

sys/arch/newsmips/newsmips/news3400.c

131

if (ipending & MIPS_INT_MASK_0) {

sys/arch/newsmips/newsmips/news3400.c

71

| MIPS_INT_MASK_0

sys/arch/newsmips/newsmips/news3400.c

74

| MIPS_INT_MASK_0

sys/arch/newsmips/newsmips/news4000.c

127

if (ipending & MIPS_INT_MASK_0) {

sys/arch/newsmips/newsmips/news4000.c

62

| MIPS_INT_MASK_0

sys/arch/newsmips/newsmips/news4000.c

65

| MIPS_INT_MASK_0

sys/arch/newsmips/newsmips/news5000.c

173

if (ipending & MIPS_INT_MASK_0) {

sys/arch/newsmips/newsmips/news5000.c

67

| MIPS_INT_MASK_0

sys/arch/newsmips/newsmips/news5000.c

70

| MIPS_INT_MASK_0

sys/arch/playstation2/playstation2/interrupt.c

141

if (ipending & MIPS_INT_MASK_0) {

sys/arch/pmax/include/intr.h

45

#define MIPS_SPL0 (MIPS_INT_MASK_0|MIPS_SOFT_INT_MASK)

sys/arch/pmax/pmax/dec_3100.c

213

CALLINTR(SYS_DEV_SCSI, MIPS_INT_MASK_0);

sys/arch/pmax/pmax/dec_3max.c

282

if (ipending & MIPS_INT_MASK_0) {

sys/arch/pmax/pmax/dec_3maxplus.c

130

[IPL_VM] = MIPS_SOFT_INT_MASK | MIPS_INT_MASK_0,

sys/arch/pmax/pmax/dec_3maxplus.c

384

if (ipending & MIPS_INT_MASK_0) {

sys/arch/pmax/pmax/dec_3min.c

244

mask = MIPS_INT_MASK_0;

sys/arch/pmax/pmax/dec_3min.c

414

if ((ipending & MIPS_INT_MASK_0) && intrtab[SYS_DEV_OPT0].ih_func) {

sys/arch/pmax/pmax/dec_5100.c

183

if (ipending & MIPS_INT_MASK_0) {

sys/arch/pmax/pmax/interrupt.c

96

if (pending & (MIPS_INT_MASK_0|MIPS_INT_MASK_1|MIPS_INT_MASK_2|

sys/arch/sbmips/sbmips/sb1250_icu.c

66

[IPL_VM] = MIPS_SOFT_INT_MASK | MIPS_INT_MASK_0

sys/arch/sbmips/sbmips/sb1250_icu.c

68

[IPL_SCHED] = MIPS_SOFT_INT_MASK | MIPS_INT_MASK_0

sys/arch/sbmips/sbmips/sb1250_icu.c

70

[IPL_DDB] = MIPS_SOFT_INT_MASK | MIPS_INT_MASK_0

sys/arch/sgimips/sgimips/cpu.c

147

if (pending & MIPS_INT_MASK_0) {

sys/arch/sgimips/sgimips/machdep.c

135

[IPL_VM] = MIPS_INT_MASK_1|MIPS_INT_MASK_0|MIPS_SOFT_INT_MASK,

sys/arch/sgimips/sgimips/machdep.c

137

MIPS_INT_MASK_1|MIPS_INT_MASK_0|MIPS_SOFT_INT_MASK,

sys/arch/sgimips/sgimips/machdep.c

143

[IPL_VM] = MIPS_INT_MASK_2|MIPS_INT_MASK_1|MIPS_INT_MASK_0|

sys/arch/sgimips/sgimips/machdep.c

146

MIPS_INT_MASK_1|MIPS_INT_MASK_0|MIPS_SOFT_INT_MASK,

sys/arch/sgimips/sgimips/machdep.c

155

[IPL_VM] = MIPS_INT_MASK_1|MIPS_INT_MASK_0|MIPS_SOFT_INT_MASK,

sys/arch/sgimips/sgimips/machdep.c

162

[IPL_VM] = MIPS_INT_MASK_0|MIPS_SOFT_INT_MASK,

sys/arch/sgimips/sgimips/machdep.c

163

[IPL_SCHED] = MIPS_INT_MASK_5|MIPS_INT_MASK_0|MIPS_SOFT_INT_MASK,