vtophys
paddr_t vtophys(vaddr_t);
#define POOL_VTOPHYS(va) vtophys((vaddr_t) (va))
#define POOL_VTOPHYS(va) vtophys((vaddr_t)(va))
l2->l_md.md_pcbpaddr = (void *)vtophys((vaddr_t)pcb2);
paddr_t vtophys(vaddr_t);
rdbase = vtophys((vaddr_t)va);
#define POOL_VTOPHYS(va) vtophys((vaddr_t) (va))
sc->sc_addr = vtophys(regbase);
d->d_pa = vtophys((vaddr_t)d) + SYNC_DESC_4_OFFSET;
cpu_reset_address_paddr = vtophys((uintptr_t)s3c2440_softreset);
cpu_reset_address_paddr = vtophys((u_int)s3c2410_softreset);
cpu_reset_address_paddr = vtophys((u_int)s3c2800_softreset);
pmagic = vtophys((vaddr_t)magic);
ext.seg = vtophys(buf) >> 4;
bootinfo->entry[bootinfo->nentries++] = vtophys(what);
boot_argv[2] = vtophys(bootinfo); /* old cyl offset */
bootinfo->entry[i] = vtophys(p);
mbi->mi_cmdline = (char *) vtophys(cmdline);
mbm[i].mmo_string = (char *)vtophys(bim->path);
mbi->mi_mods_addr = vtophys(mbm);
multiboot(mbp->mbp_marks[MARK_ENTRY], vtophys(mbi),
multiboot(entry, vtophys(mbi),
physaddr_t vtophys(void *);
#define VTOPSEG(vaddr) (vtophys(vaddr) >> 4)
#define VTOPOFF(vaddr) (vtophys(vaddr) & 0xf)
paddr_t vtophys(vaddr_t);
static inline paddr_t vtophys(vaddr_t);
paddr_t vtophys(vaddr_t va);
return (int)vtophys((vaddr_t)v);
return (int)vtophys((vaddr_t)addr);
DBDMA_BUILD(cmd, DBDMA_CMD_OUT_MORE, 0, PAGE_SIZE, vtophys(va),
out32rb(&cmd->d_cmddep, vtophys((vaddr_t)sc->sc_odmacmd));
unsigned long addr = vtophys((vaddr_t)commands);
vtophys((vaddr_t)sc->sc_rxbuf + BMAC_BUFLEN * i),
out32rb(&cmd->d_cmddep, vtophys((vaddr_t)sc->sc_rxcmd));
if (vtophys(va) + len - 1 != vtophys(va + len - 1))
DBDMA_BUILD(cmd, DBDMA_CMD_OUT_LAST, 0, len, vtophys(va),
dp->address = htole32(vtophys((vaddr_t)p));
dp->address = htole32(vtophys((vaddr_t)p));
vtophys((vaddr_t)sc->sc_txlist));
vtophys((vaddr_t)sc->sc_rxlist));
DBDMA_BUILD(cmdp, cmd, 0, rest, vtophys(va),
DBDMA_BUILD(cmdp, cmd, 0, PAGE_SIZE, vtophys(va),
DBDMA_BUILD(cmdp, cmd, 0, datalen, vtophys(va),
DBDMA_BUILD(cmd, DBDMA_CMD_OUT_MORE, 0, 32, vtophys((vaddr_t)sc->sc_dmabuf),
out32rb(&cmd->d_cmddep, vtophys((vaddr_t)sc->sc_odmacmd));
DBDMA_BUILD(cmdp, cmd, 0, rest, vtophys(va),
DBDMA_BUILD(cmdp, cmd, 0, PAGE_SIZE, vtophys(va),
DBDMA_BUILD(cmdp, cmd , 0, count, vtophys(va),
sc->sc_cmd_paddr = vtophys((vaddr_t) sc->sc_cmd);
DBDMA_BUILD(cmd, DBDMA_CMD_OUT_MORE, 0, NBPG, vtophys(va),
out32rb(&cmd->d_cmddep, vtophys((vaddr_t)sc->sc_odmacmd));
DBDMA_BUILD(cmd, DBDMA_CMD_IN_MORE, 0, NBPG, vtophys(va),
out32rb(&cmd->d_cmddep, vtophys((vaddr_t)sc->sc_idmacmd));
DBDMA_BUILD(cmdp, cmd, 0, rest, vtophys(va),
DBDMA_BUILD(cmdp, cmd, 0, PAGE_SIZE, vtophys(va),
DBDMA_BUILD(cmdp, cmd, 0, datalen, vtophys(va),
cpu_reset_address_paddr = vtophys((vaddr_t)netwinder_reset);
static __inline paddr_t vtophys(vaddr_t);
static __inline paddr_t vtophys(vaddr_t);
static __inline paddr_t vtophys (vaddr_t);
#define POOL_VTOPHYS(va) vtophys((vaddr_t) va)
curaddr = vtophys(vaddr);
pa = vtophys((vaddr_t)sf);
pa = vtophys((vaddr_t)pcb2->pcb_pm);
pa = vtophys((vaddr_t)pcb2);
gt->gt_paddr = vtophys((vaddr_t)gt->gt_ri->ri_bits);
paddr_t vtophys(vaddr_t);
paddr_t vtophys(vaddr_t);
#define POOL_VTOPHYS(va) vtophys((vaddr_t) (va))
smbios_entry.hdrphys = vtophys((vaddr_t)p);
smbios_entry.hdrphys = vtophys((vaddr_t)p);
hyperv_hypercall_ctx.hc_paddr = vtophys((vaddr_t)hyperv_hypercall_page);
ci->ci_kpm_pdirpa = vtophys((vaddr_t)ci->ci_kpm_pdir);
addr = vtophys((vaddr_t)buf);
return(i386_btop(vtophys(bktr->bigbuf) + offset));
return(i386_btop(vtophys(bktr->bigbuf) + offset));
return(atop(vtophys(bktr->bigbuf) + offset));
ds->driver_data = vtophys(sc);
txs->driver_data = vtophys(txq);
rxs->driver_data = vtophys(rxq);
vtophys((uintptr_t)sc->sc_xmit_bufs[i]);
vtophys((uintptr_t)sc->sc_recv_bufs[i]);
physaddr = vtophys((uintptr_t)sc->sc_taskfile);
curaddr = vtophys(vaddr);