Symbol: onoff
bin/ksh/edit.c
197
x_mode(bool onoff)
bin/ksh/edit.c
202
if (x_cur_mode == onoff)
bin/ksh/edit.c
205
x_cur_mode = onoff;
bin/ksh/edit.c
207
if (onoff) {
bin/ksh/edit.h
53
bool x_mode(bool onoff);
games/tetris/shapes.c
100
onoff = onoff ? shape->color : 0;
games/tetris/shapes.c
102
board[pos] = onoff;
games/tetris/shapes.c
103
board[pos + *o++] = onoff;
games/tetris/shapes.c
104
board[pos + *o++] = onoff;
games/tetris/shapes.c
105
board[pos + *o] = onoff;
games/tetris/shapes.c
97
place(const struct shape *shape, int pos, int onoff)
lib/libarch/alpha/alpha_pci_io.c
85
alpha_pci_io_enable(int onoff)
lib/libarch/alpha/alpha_pci_io.c
90
if (onoff == 0 && alpha_pci_io_windows != NULL) {
lib/libarch/alpha/alpha_pci_io.c
98
} else if (onoff == 0)
sbin/fsck/progress.c
59
progress_switch(int onoff)
sbin/fsck/progress.c
61
progress_onoff = onoff;
sys/arch/alpha/include/alpha_cpu.h
528
alpha_pal_wrfen(unsigned long onoff)
sys/arch/alpha/include/alpha_cpu.h
530
register unsigned long a0 __asm("$16") = onoff;
sys/arch/alpha/jensenio/jensenio_intr.c
339
jensenio_enable_intr(int irq, int onoff)
sys/arch/alpha/jensenio/jensenio_intr.c
348
if (onoff)
sys/arch/alpha/pci/cia.c
375
cia_pyxis_intr_enable(int irq, int onoff)
sys/arch/alpha/pci/cia.c
382
onoff ? "enabling" : "disabling", irq);
sys/arch/alpha/pci/cia.c
388
if (onoff)
sys/arch/alpha/pci/pci_2100_a500.c
682
dec_2100_a500_pic_enable_intr(struct ttwoga_config *tcp, int irq, int onoff)
sys/arch/alpha/pci/pci_2100_a500.c
691
if (onoff)
sys/arch/alpha/pci/pci_2100_a500.c
699
dec_2100_a500_icic_enable_intr(struct ttwoga_config *tcp, int irq, int onoff)
sys/arch/alpha/pci/pci_2100_a500.c
708
if (onoff)
sys/arch/alpha/pci/pci_kn8ae.c
279
kn8ae_enadis_intr(struct dwlpx_config *ccp, pci_intr_handle_t ih, int onoff)
sys/arch/alpha/pci/pci_kn8ae.c
308
if (onoff)
sys/arch/alpha/pci/pci_kn8ae.c
315
onoff? "enable" : "disable", ihv, val, hpc, ionode + 4, hose);
sys/arch/amiga/dev/grf_ul.c
863
ul_blank(struct grf_softc *gp, int *onoff, dev_t dev)
sys/arch/amiga/dev/grf_ul.c
871
if (*onoff > 0)
sys/arch/amiga/dev/if_bah_zbus.c
132
bah_zbus_reset(struct bah_softc *sc, int onoff)
sys/arch/amiga/dev/if_bah_zbus.c
144
if (!onoff)
sys/arch/arm/at91/at91cfvar.h
36
int (*power_ctl)(void *self, int onoff);
sys/arch/arm/at91/at91dbgu.c
429
at91dbgu_break(struct at91dbgu_softc *sc, int onoff)
sys/arch/arm/at91/at91usart.c
525
at91usart_break(struct at91usart_softc *sc, int onoff)
sys/arch/arm/at91/at91usart.c
527
at91usart_writereg(sc, US_CR, onoff ? US_CR_STTBRK : US_CR_STPBRK);
sys/arch/arm/broadcom/bcm2835_cm.c
117
bcmcm_wait(struct bcm2835cm_softc *sc, int ctlreg, int onoff)
sys/arch/arm/broadcom/bcm2835_cm.c
124
if (((r & CM_CTL_BUSY) != 0) == onoff)
sys/arch/arm/clps711x/clpscom.c
873
clpscom_break(struct clpscom_softc *sc, int onoff)
sys/arch/arm/clps711x/clpscom.c
880
if (onoff)
sys/arch/arm/ep93xx/epcom.c
427
epcom_break(struct epcom_softc *sc, int onoff)
sys/arch/arm/ep93xx/epcom.c
429
if (onoff)
sys/arch/arm/ep93xx/eppcicvar.h
45
int (*power_ctl)(void *, int socket, int onoff);
sys/arch/arm/imx/imxuart.c
1001
imxuart_break(struct imxuart_softc *sc, bool onoff)
sys/arch/arm/imx/imxuart.c
1006
if (onoff)
sys/arch/arm/imx/imxuart.c
1015
imxuart_modem(struct imxuart_softc *sc, int onoff)
sys/arch/arm/imx/imxuart.c
1021
if (onoff)
sys/arch/arm/ixp12x0/ixp12x0_com.c
420
ixpcom_break(struct ixpcom_softc *sc, int onoff)
sys/arch/arm/ixp12x0/ixp12x0_com.c
422
if (onoff)
sys/arch/arm/s3c2xx0/sscom.c
896
sscom_break(struct sscom_softc *sc, int onoff)
sys/arch/arm/s3c2xx0/sscom.c
899
if (onoff)
sys/arch/arm/s3c2xx0/sscom.c
915
sscom_modem(struct sscom_softc *sc, int onoff)
sys/arch/arm/s3c2xx0/sscom.c
917
if (onoff)
sys/arch/arm/sa11x0/sa11x0_com.c
792
sacom_break(struct sacom_softc *sc, int onoff)
sys/arch/arm/sa11x0/sa11x0_com.c
795
if (onoff)
sys/arch/arm/sa11x0/sa11x0_com.c
811
sacom_modem(struct sacom_softc *sc, int onoff)
sys/arch/arm/xilinx/zynq_uart.c
1002
if (onoff)
sys/arch/arm/xilinx/zynq_uart.c
1011
zynquart_modem(struct zynquart_softc *sc, int onoff)
sys/arch/arm/xilinx/zynq_uart.c
1017
if (onoff)
sys/arch/arm/xilinx/zynq_uart.c
997
zynquart_break(struct zynquart_softc *sc, bool onoff)
sys/arch/atari/dev/ser.c
615
ser_break(struct ser_softc *sc, int onoff)
sys/arch/atari/dev/ser.c
620
if (onoff)
sys/arch/atari/dev/ser.c
637
ser_modem(struct ser_softc *sc, int onoff)
sys/arch/atari/dev/ser.c
642
if (onoff)
sys/arch/epoc32/windermere/wmcom.c
743
wmcom_break(struct wmcom_softc *sc, int onoff)
sys/arch/epoc32/windermere/wmcom.c
750
if (onoff)
sys/arch/evbarm/armadillo/armadillo9_pcic.c
101
DPRINTFN(1, ("armadillo9pcic_power_ctl: %s\n",onoff?"on":"off"));
sys/arch/evbarm/armadillo/armadillo9_pcic.c
103
if (onoff)
sys/arch/evbarm/armadillo/armadillo9_pcic.c
97
armadillo9pcic_power_ctl(void *self, int socket, int onoff)
sys/arch/evbarm/dev/plcom.c
1267
plcom_break(struct plcom_softc *sc, int onoff)
sys/arch/evbarm/dev/plcom.c
1270
if (onoff)
sys/arch/evbarm/dev/plcom.c
1286
plcom_modem(struct plcom_softc *sc, int onoff)
sys/arch/evbarm/dev/plcom.c
1292
if (onoff)
sys/arch/evbarm/g42xxeb/obio.c
416
obio_peripheral_reset(struct obio_softc *bsc, int no, int onoff)
sys/arch/evbarm/g42xxeb/obio.c
423
onoff ? (reg & ~RST_EXT(no)) : (reg | RST_EXT(no)));
sys/arch/evbarm/mpcsa/mpcsa_cf.c
106
mpcsa_cf_power_ctl(void *self, int onoff)
sys/arch/evbarm/mpcsa/mpcsa_cf.c
109
if (onoff) {
sys/arch/evbarm/mpcsa/mpcsa_cf.c
61
static int mpcsa_cf_power_ctl(void *self, int onoff);
sys/arch/evbsh3/ap_ms104_sh4/rs5c316_mainbus.c
115
rtc_ce(struct rs5c313_softc *sc, int onoff)
sys/arch/evbsh3/ap_ms104_sh4/rs5c316_mainbus.c
120
if (onoff) {
sys/arch/evbsh3/ap_ms104_sh4/rs5c316_mainbus.c
130
rtc_clk(struct rs5c313_softc *sc, int onoff)
sys/arch/evbsh3/ap_ms104_sh4/rs5c316_mainbus.c
135
if (onoff) {
sys/arch/hp300/dev/dnkbd.c
856
dnkbd_break(struct dnkbd_softc *sc, int onoff)
sys/arch/hp300/dev/dnkbd.c
866
if (onoff)
sys/arch/hpc/hpc/debug_subr.c
45
static const char onoff[2] = "_x";
sys/arch/hpc/hpc/debug_subr.c
94
printf("%s[%c] ", name, onoff[reg & mask ? 1 : 0]);
sys/arch/hpc/stand/hpcboot/hpcboot.cpp
335
static const char onoff[3] = "_x";
sys/arch/hpc/stand/hpcboot/hpcboot.cpp
339
DPRINTF((TEXT("%S[%c] "), name, onoff[reg & mask ? 1 : 0]));
sys/arch/hpc/stand/hpcboot/menu/menu.cpp
335
BOOL onoff = pref.auto_boot ? TRUE : FALSE;
sys/arch/hpc/stand/hpcboot/menu/menu.cpp
336
EnableWindow(_spin_edit, onoff);
sys/arch/hpc/stand/hpcboot/menu/menu.cpp
337
EnableWindow(_spin, onoff);
sys/arch/hpc/stand/hpcboot/menu/tabwindow.cpp
177
TabWindow::_set_check(int id, BOOL onoff)
sys/arch/hpc/stand/hpcboot/menu/tabwindow.cpp
180
onoff ? BST_CHECKED : BST_UNCHECKED, 0);
sys/arch/hpc/stand/hpcboot/menu/tabwindow.h
91
void _set_check(int id, BOOL onoff);
sys/arch/hpcarm/dev/nbp_slhci.c
115
nbp_slhci_power(void *arg, enum power_change onoff)
sys/arch/hpcarm/dev/wzero3_keypad.c
349
wzero3keypad_wskbd_enable(void *arg, int onoff)
sys/arch/hpcmips/dev/ucbio.c
123
betty_out(hpcio_chip_t hc, int port, int onoff)
sys/arch/hpcmips/dev/ucbio.c
131
if (onoff)
sys/arch/hpcmips/dev/ucbsnd.c
513
__ucbsnd_sound_mute(tx_sound_tag_t arg, int onoff)
sys/arch/hpcmips/dev/ucbsnd.c
517
sc->sc_mute = onoff;
sys/arch/hpcmips/tx/tx39io.c
214
mfio_out(hpcio_chip_t arg, int port, int onoff)
sys/arch/hpcmips/tx/tx39io.c
231
if (onoff)
sys/arch/hpcmips/tx/tx39io.c
294
tx391x_io_out(hpcio_chip_t arg, int port, int onoff)
sys/arch/hpcmips/tx/tx39io.c
314
if (onoff)
sys/arch/hpcmips/tx/tx39io.c
376
tx392x_io_out(hpcio_chip_t arg, int port, int onoff)
sys/arch/hpcmips/tx/tx39io.c
394
if (onoff)
sys/arch/hpcmips/tx/txsnd.c
61
__tx_sound_mute(tx_sound_tag_t arg, int onoff)
sys/arch/hpcmips/tx/txsnd.h
44
#define tx_sound_mute(t, onoff) \
sys/arch/hpcmips/tx/txsnd.h
46
(((tx_sound_tag_t)(t->tc_soundt))->ts_v, (onoff))
sys/arch/hpcmips/vr/cmu.c
107
vrcmu_supply(vrcmu_chipset_tag_t cc, u_int16_t mask, int onoff)
sys/arch/hpcmips/vr/cmu.c
117
if (onoff)
sys/arch/hpcmips/vr/vr4181giu.c
205
vr4181giu_port_write(hpcio_chip_t hc, int port, int onoff)
sys/arch/hpcmips/vr/vr4181giu.c
213
if (onoff) {
sys/arch/hpcmips/vr/vr4181giu.c
223
if (onoff) {
sys/arch/hpcmips/vr/vrc4172gpio.c
369
vrc4172gpio_port_write(hpcio_chip_t hc, int port, int onoff)
sys/arch/hpcmips/vr/vrc4172gpio.c
377
if (onoff)
sys/arch/hpcmips/vr/vrc4173bcu.c
538
__vrc4173bcu_power(vrip_chipset_tag_t vc, int unit, int onoff)
sys/arch/hpcmips/vr/vrc4173bcu.c
550
vu->vu_clkmask, onoff);
sys/arch/hpcmips/vr/vrc4173bcu.c
635
u_int32_t mask /* Level 2 mask */, int onoff)
sys/arch/hpcmips/vr/vrc4173bcu.c
649
if (onoff)
sys/arch/hpcmips/vr/vrc4173bcu.c
657
if (onoff)
sys/arch/hpcmips/vr/vrc4173bcu.c
672
__vrc4173bcu_clock(vrcmu_chipset_tag_t cc, u_int16_t mask, int onoff)
sys/arch/hpcmips/vr/vrc4173bcu.c
682
if (onoff)
sys/arch/hpcmips/vr/vrgiu.c
472
vrgiu_port_write(hpcio_chip_t hc, int port, int onoff)
sys/arch/hpcmips/vr/vrgiu.c
487
if (onoff)
sys/arch/hpcmips/vr/vrip.c
311
__vrip_power(vrip_chipset_tag_t vc, int unit, int onoff)
sys/arch/hpcmips/vr/vrip.c
323
vu->vu_clkmask, onoff);
sys/arch/hpcmips/vr/vrip.c
458
u_int32_t mask /* Level 2 mask */, int onoff)
sys/arch/hpcmips/vr/vrip.c
472
if (onoff)
sys/arch/hpcmips/vr/vrip.c
480
if (onoff)
sys/arch/hpcmips/vr/vripif.h
106
#define vrip_intr_setmask2(vc, handle, mask, onoff) \
sys/arch/hpcmips/vr/vripif.h
107
((*(vc)->vc_intr_setmask2)((vc), (handle), (mask), (onoff)))
sys/arch/hpcmips/vr/vripif.h
98
#define vrip_power(vc, unit, onoff) \
sys/arch/hpcmips/vr/vripif.h
99
((*(vc)->vc_power)((vc), (unit), (onoff)))
sys/arch/landisk/dev/rs5c313_landisk.c
114
rtc_ce(struct rs5c313_softc *sc, int onoff)
sys/arch/landisk/dev/rs5c313_landisk.c
117
if (onoff)
sys/arch/landisk/dev/rs5c313_landisk.c
130
rtc_clk(struct rs5c313_softc *sc, int onoff)
sys/arch/landisk/dev/rs5c313_landisk.c
134
if (onoff)
sys/arch/landisk/stand/boot/getsecs.c
101
rtc_do(int onoff)
sys/arch/landisk/stand/boot/getsecs.c
104
if (onoff) {
sys/arch/landisk/stand/boot/getsecs.c
67
rtc_ce(int onoff)
sys/arch/landisk/stand/boot/getsecs.c
70
if (onoff) {
sys/arch/landisk/stand/boot/getsecs.c
78
rtc_clk(int onoff)
sys/arch/landisk/stand/boot/getsecs.c
81
if (onoff) {
sys/arch/mac68k/mac68k/via.c
233
via_set_modem(int onoff)
sys/arch/mac68k/mac68k/via.c
236
if (onoff)
sys/arch/mips/sibyte/dev/sbjcn.c
764
sbjcn_break(struct sbjcn_channel *ch, int onoff)
sys/arch/mips/sibyte/dev/sbjcn.c
770
sbjcn_modem(struct sbjcn_channel *ch, int onoff)
sys/arch/mips/sibyte/dev/sbjcn.c
776
if (onoff)
sys/arch/mips/sibyte/dev/sbscn.c
831
sbscn_break(struct sbscn_channel *ch, int onoff)
sys/arch/mips/sibyte/dev/sbscn.c
835
if (onoff)
sys/arch/mips/sibyte/dev/sbscn.c
853
sbscn_modem(struct sbscn_channel *ch, int onoff)
sys/arch/mips/sibyte/dev/sbscn.c
859
if (onoff)
sys/arch/playstation2/dev/spd.c
229
__spd_eeprom_out(u_int8_t *rp, int onoff)
sys/arch/playstation2/dev/spd.c
233
if (onoff)
sys/arch/sh3/dev/sci.c
841
sci_break(struct sci_softc *sc, int onoff)
sys/arch/sh3/dev/sci.c
844
if (onoff)
sys/arch/sh3/dev/scif.c
962
scif_break(struct scif_softc *sc, int onoff)
sys/arch/sh3/dev/scif.c
965
if (onoff)
sys/arch/sparc/sparc/mkclock.c
277
mk_clk_wenable(todr_chip_handle_t handle, int onoff)
sys/arch/sparc/sparc/mkclock.c
281
return (mk_nvram_wenable(onoff));
sys/arch/sparc/sparc/mkclock.c
285
mk_nvram_wenable(int onoff)
sys/arch/sparc/sparc/mkclock.c
294
if (onoff)
sys/arch/sparc64/dev/mkclock.c
271
mkclock_wenable(struct todr_chip_handle *handle, int onoff)
sys/arch/sparc64/dev/mkclock.c
281
if (onoff)
sys/arch/usermode/usermode/thunk.c
447
thunk_set_stdin_sigio(int onoff)
sys/arch/usermode/usermode/thunk.c
453
if (onoff)
sys/arch/x68k/dev/ms.c
643
ms_trigger(struct zs_chanstate *cs, int onoff)
sys/arch/x68k/dev/ms.c
646
if (onoff)
sys/arch/x68k/dev/ms.c
654
mfp_send_usart(onoff | 0x40);
sys/arch/zaurus/dev/ioexp.c
202
ioexp_set_backlight(int onoff, int cont)
sys/arch/zaurus/dev/ioexp.c
211
if (onoff)
sys/arch/zaurus/dev/ioexp.c
227
if (onoff && !bkreg) {
sys/arch/zaurus/dev/ioexp.c
230
} else if (!onoff && bkreg) {
sys/arch/zaurus/dev/ioexp.c
250
ioexp_set_irled(int onoff)
sys/arch/zaurus/dev/ioexp.c
260
if (onoff)
sys/arch/zaurus/dev/ioexp.c
270
if (onoff && reg) {
sys/arch/zaurus/dev/ioexp.c
273
} else if (!onoff && !reg) {
sys/arch/zaurus/dev/ioexp.c
284
ioexp_set_mic_bias(int onoff)
sys/arch/zaurus/dev/ioexp.c
293
if (onoff)
sys/arch/zaurus/dev/ioexp.c
302
if (onoff && !reg) {
sys/arch/zaurus/dev/ioexp.c
305
} else if (!onoff && reg) {
sys/arch/zaurus/dev/ioexp.c
316
ioexp_akin_pullup(int onoff)
sys/arch/zaurus/dev/ioexp.c
325
if (onoff)
sys/arch/zaurus/dev/ioexp.c
334
if (onoff && !reg) {
sys/arch/zaurus/dev/ioexp.c
337
} else if (!onoff && reg) {
sys/arch/zaurus/dev/ioexpvar.h
46
ioexp_set_backlight(int onoff, int cont)
sys/arch/zaurus/dev/ioexpvar.h
55
ioexp_set_irled(int onoff)
sys/arch/zaurus/dev/ioexpvar.h
64
ioexp_set_mic_bias(int onoff)
sys/arch/zaurus/dev/ioexpvar.h
73
ioexp_akin_pullup(int onoff)
sys/arch/zaurus/dev/lcdctl.c
230
lcdctl_set_backlight(struct lcdctl_softc *sc, bool onoff)
sys/arch/zaurus/dev/lcdctl.c
233
if (!onoff) {
sys/arch/zaurus/dev/lcdctl.c
256
lcdctl_set_onoff(struct lcdctl_softc *sc, bool onoff)
sys/arch/zaurus/dev/lcdctl.c
259
if (!onoff) {
sys/arch/zaurus/dev/lcdctl.c
321
lcdctl_onoff(bool onoff)
sys/arch/zaurus/dev/lcdctl.c
325
lcdctl_set_onoff(lcdctl_sc, onoff);
sys/arch/zaurus/dev/lcdctlvar.h
33
void lcdctl_onoff(bool onoff);
sys/arch/zaurus/dev/scoop.c
251
scoop_set_speaker(int onoff)
sys/arch/zaurus/dev/scoop.c
263
if (onoff) {
sys/arch/zaurus/dev/scoop.c
274
scoop_set_mic_bias(int onoff)
sys/arch/zaurus/dev/scoop.c
283
scoop_gpio_pin_write(sc1, SCOOP1_MIC_BIAS, onoff);
sys/arch/zaurus/dev/scoop.c
285
scoop_gpio_pin_write(sc0, SCOOP0_MIC_BIAS, onoff);
sys/arch/zaurus/dev/zapm.c
350
zapm_enable(void *v, int onoff)
sys/dev/acpi/acpi_apm.c
227
acpiapm_enable(void *opaque, int onoff)
sys/dev/dtv/dtv_demux.c
260
dtv_demux_set_pidfilter(struct dtv_demux *demux, uint16_t pid, bool onoff)
sys/dev/dtv/dtv_demux.c
279
memset(sc->sc_ts.ts_pidfilter, onoff ? 0xff : 0,
sys/dev/dtv/dtv_demux.c
282
sc->sc_ts.ts_pidfilter[pid] = onoff;
sys/dev/hpc/hpcapm.c
300
hpcapm_enable(void *scx, int onoff)
sys/dev/hpc/hpckbd.c
419
static int onoff; /* XXX -uch */
sys/dev/hpc/hpckbd.c
422
(void *)(onoff ^= 1));
sys/dev/i2c/au8522.c
287
au8522_set_audio(struct au8522 *au, bool onoff)
sys/dev/i2c/au8522.c
289
if (onoff) {
sys/dev/i2c/au8522.c
335
au8522_set_gate(struct au8522 *au, bool onoff)
sys/dev/i2c/au8522.c
337
au8522_write_1(au, AU8522_REG_TUNERCTL, onoff ? AU8522_TUNERCTL_EN : 0);
sys/dev/i2c/em3027.c
148
uint8_t onoff;
sys/dev/i2c/em3027.c
192
aprint_debug_dev(sc->sc_dev, "on/off=0x%02x\n", ctl.onoff);
sys/dev/i2c/em3027.c
194
if ((ctl.onoff & EM3027_ONOFF_SR) == 0) {
sys/dev/i2c/em3027.c
196
ctl.onoff |= EM3027_ONOFF_SR;
sys/dev/i2c/em3027.c
199
if ((ctl.onoff & EM3027_ONOFF_EEREF) == 0) {
sys/dev/i2c/em3027.c
201
ctl.onoff |= EM3027_ONOFF_EEREF;
sys/dev/i2c/em3027.c
204
ctl.onoff &= ~EM3027_ONOFF_TR;
sys/dev/i2c/em3027.c
206
if (ctl.onoff & EM3027_ONOFF_TI) {
sys/dev/i2c/em3027.c
208
ctl.onoff &= ~EM3027_ONOFF_TI;
sys/dev/i2c/em3027.c
211
if ((ctl.onoff & EM3027_ONOFF_WA) == 0) {
sys/dev/i2c/em3027.c
213
ctl.onoff |= EM3027_ONOFF_WA;
sys/dev/i2c/twl4030.c
157
twl_rtc_enable(struct twl_softc *sc, bool onoff)
sys/dev/i2c/twl4030.c
162
if (onoff)
sys/dev/ic/cd18xx.c
939
cdtty_break(struct cd18xx_softc *sc, struct cdtty_port *p, int onoff)
sys/dev/ic/cd18xx.c
943
p->p_needbreak = !!onoff;
sys/dev/ic/cd18xx.c
964
cdtty_modem(struct cd18xx_softc *sc, struct cdtty_port *p, int onoff)
sys/dev/ic/cd18xx.c
970
if (onoff)
sys/dev/ic/com.c
1506
com_break(struct com_softc *sc, int onoff)
sys/dev/ic/com.c
1509
if (onoff)
sys/dev/ic/com.c
1525
com_modem(struct com_softc *sc, int onoff)
sys/dev/ic/com.c
1531
if (onoff)
sys/dev/ic/mpt.c
1046
mpt_send_event_request(mpt_softc_t *mpt, int onoff)
sys/dev/ic/mpt.c
1058
enable_req->Switch = onoff;
sys/dev/ic/mpt.c
1062
mpt_prt(mpt, "%sabling async events", onoff? "en" : "dis");
sys/dev/ic/rs5c313.c
49
#define rtc_ce(sc, onoff) ((*sc->sc_ops->rs5c313_op_ce)(sc, onoff))
sys/dev/ic/rs5c313.c
50
#define rtc_clk(sc, onoff) ((*sc->sc_ops->rs5c313_op_clk)(sc, onoff))
sys/dev/ic/z8530tty.c
1174
zs_modem(struct zstty_softc *zst, int onoff)
sys/dev/ic/z8530tty.c
1183
if (onoff)
sys/dev/isa/mpu_ym.c
105
mpu_ym_power_ctl(void *arg, int onoff)
sys/dev/isa/mpu_ym.c
109
ym_power_ctl(ssc, YM_POWER_MPU401, onoff);
sys/dev/isa/opl_ym.c
102
opl_ym_power_ctl(void *arg, int onoff)
sys/dev/isa/opl_ym.c
106
ym_power_ctl(ssc, YM_POWER_OPL3 | YM_POWER_OPL3_DA, onoff);
sys/dev/isa/ym.c
1365
ym_power_ctl(struct ym_softc *sc, int parts, int onoff)
sys/dev/isa/ym.c
1372
DVNAME(sc), parts, onoff ? "on" : "off"));
sys/dev/isa/ym.c
1384
if (onoff && sc->sc_turning_off && (sc->sc_turning_off &= ~parts) == 0)
sys/dev/isa/ym.c
1388
if (!onoff && sc->sc_turning_off)
sys/dev/isa/ym.c
1392
parts &= onoff ? ~sc->sc_on_blocks : sc->sc_on_blocks;
sys/dev/isa/ym.c
1402
if (onoff) {
sys/dev/pci/cz.c
1207
cztty_break(struct cztty_softc *sc, int onoff)
sys/dev/pci/cz.c
1215
onoff ? C_CM_SET_BREAK : C_CM_CLR_BREAK);
sys/dev/pci/cz.c
1224
cztty_modem(struct cztty_softc *sc, int onoff)
sys/dev/pci/cz.c
1233
if (onoff)
sys/dev/pci/cz.c
185
static void cztty_modem(struct cztty_softc *sc, int onoff);
sys/dev/pci/cz.c
186
static void cztty_break(struct cztty_softc *sc, int onoff);
sys/dev/pci/if_vioif.c
182
uint8_t onoff;
sys/dev/pci/if_vioif.c
2450
vioif_ctrl_rx(struct vioif_softc *sc, int cmd, bool onoff)
sys/dev/pci/if_vioif.c
2461
rx->onoff = onoff;
sys/dev/pci/if_vioif.c
2474
vioif_set_promisc(struct vioif_softc *sc, bool onoff)
sys/dev/pci/if_vioif.c
2476
return vioif_ctrl_rx(sc, VIRTIO_NET_CTRL_RX_PROMISC, onoff);
sys/dev/pci/if_vioif.c
2480
vioif_set_allmulti(struct vioif_softc *sc, bool onoff)
sys/dev/pci/if_vioif.c
2482
return vioif_ctrl_rx(sc, VIRTIO_NET_CTRL_RX_ALLMULTI, onoff);
sys/dev/pci/if_vioif.c
914
bool onoff;
sys/dev/pci/if_vioif.c
923
onoff = ifp->if_flags & IFF_ALLMULTI ? true : false;
sys/dev/pci/if_vioif.c
924
r = vioif_set_allmulti(sc, onoff);
sys/dev/pci/if_vioif.c
928
ifp->if_xname, onoff ? "en" : "dis");
sys/dev/pci/if_vioif.c
929
if (onoff) {
sys/dev/pci/if_vioif.c
936
onoff = ifp->if_flags & IFF_PROMISC ? true : false;
sys/dev/pci/if_vioif.c
937
r = vioif_set_promisc(sc, onoff);
sys/dev/pci/if_vioif.c
941
ifp->if_xname, onoff ? "en" : "dis");
sys/dev/pci/if_vioif.c
942
if (onoff) {
sys/dev/pci/if_wi_pci.c
130
wi_pci_enable(device_t self, int onoff)
sys/dev/pci/if_wi_pci.c
135
if (onoff) {
sys/dev/pci/ixgbe/ixgbe_netmap.c
110
set_crcstrip(struct ixgbe_hw *hw, int onoff)
sys/dev/pci/ixgbe/ixgbe_netmap.c
127
onoff ? "enter" : "exit", hl, rxc);
sys/dev/pci/ixgbe/ixgbe_netmap.c
132
if (onoff && !ix_crcstrip) {
sys/dev/pci/ixgbe/ixgbe_netmap.c
144
onoff ? "enter" : "exit", hl, rxc);
sys/dev/pci/ixgbe/ixgbe_netmap.c
156
ixgbe_netmap_reg(struct netmap_adapter *na, int onoff)
sys/dev/pci/ixgbe/ixgbe_netmap.c
164
set_crcstrip(&sc->hw, onoff);
sys/dev/pci/ixgbe/ixgbe_netmap.c
166
if (onoff) {
sys/dev/pci/ixgbe/ixgbe_netmap.c
172
set_crcstrip(&sc->hw, onoff); // XXX why twice ?
sys/dev/pci/pci_subr.c
1202
onoff("SBA", rval, AGP_MODE_SBA);
sys/dev/pci/pci_subr.c
1203
onoff("htrans#", rval, AGP_MODE_HTRANS);
sys/dev/pci/pci_subr.c
1204
onoff("Over 4G", rval, AGP_MODE_4G);
sys/dev/pci/pci_subr.c
1205
onoff("Fast Write", rval, AGP_MODE_FW);
sys/dev/pci/pci_subr.c
1206
onoff("AGP 3.0 Mode", rval, AGP_MODE_MODE_3);
sys/dev/pci/pci_subr.c
1219
onoff("SBA", rval, AGP_MODE_SBA);
sys/dev/pci/pci_subr.c
1220
onoff("AGP", rval, AGP_MODE_AGP);
sys/dev/pci/pci_subr.c
1221
onoff("Over 4G", rval, AGP_MODE_4G);
sys/dev/pci/pci_subr.c
1222
onoff("Fast Write", rval, AGP_MODE_FW);
sys/dev/pci/pci_subr.c
1276
onoff("PME# clock", caps, PCI_PMCR_PME_CLOCK);
sys/dev/pci/pci_subr.c
1277
onoff("Device specific initialization", caps, PCI_PMCR_DSI);
sys/dev/pci/pci_subr.c
1280
onoff("D1 power management state support", caps, PCI_PMCR_D1SUPP);
sys/dev/pci/pci_subr.c
1281
onoff("D2 power management state support", caps, PCI_PMCR_D2SUPP);
sys/dev/pci/pci_subr.c
1282
onoff("PME# support D0", caps, PCI_PMCR_PME_D0);
sys/dev/pci/pci_subr.c
1283
onoff("PME# support D1", caps, PCI_PMCR_PME_D1);
sys/dev/pci/pci_subr.c
1284
onoff("PME# support D2", caps, PCI_PMCR_PME_D2);
sys/dev/pci/pci_subr.c
1285
onoff("PME# support D3 hot", caps, PCI_PMCR_PME_D3HOT);
sys/dev/pci/pci_subr.c
1286
onoff("PME# support D3 cold", caps, PCI_PMCR_PME_D3COLD);
sys/dev/pci/pci_subr.c
1290
onoff("PCI Express reserved", (pmcsr >> 2), 1);
sys/dev/pci/pci_subr.c
1291
onoff("No soft reset", pmcsr, PCI_PMCSR_NO_SOFTRST);
sys/dev/pci/pci_subr.c
1298
onoff("PME# status", pmcsr, PCI_PMCSR_PME_STS);
sys/dev/pci/pci_subr.c
1301
onoff("B2/B3 support", pmcsr, PCI_PMCSR_B2B3_SUPPORT);
sys/dev/pci/pci_subr.c
1302
onoff("Bus Power/Clock Control Enable", pmcsr, PCI_PMCSR_BPCC_EN);
sys/dev/pci/pci_subr.c
1323
onoff("MSI Enabled", ctl, PCI_MSI_CTL_MSI_ENABLE);
sys/dev/pci/pci_subr.c
1328
onoff("64 Bit Address Capable", ctl, PCI_MSI_CTL_64BIT_ADDR);
sys/dev/pci/pci_subr.c
1329
onoff("Per-Vector Masking Capable", ctl, PCI_MSI_CTL_PERVEC_MASK);
sys/dev/pci/pci_subr.c
1330
onoff("Extended Message Data Capable", ctl, PCI_MSI_CTL_EXTMDATA_CAP);
sys/dev/pci/pci_subr.c
1331
onoff("Extended Message Data Enable", ctl, PCI_MSI_CTL_EXTMDATA_EN);
sys/dev/pci/pci_subr.c
1421
onoff("64bit device", reg, PCIX_STATUS_64BIT);
sys/dev/pci/pci_subr.c
1422
onoff("133MHz capable", reg, PCIX_STATUS_133);
sys/dev/pci/pci_subr.c
1423
onoff("Split completion discarded", reg, PCIX_STATUS_SPLDISC);
sys/dev/pci/pci_subr.c
1424
onoff("Unexpected split completion", reg, PCIX_STATUS_SPLUNEX);
sys/dev/pci/pci_subr.c
1425
onoff("Split completion overrun", reg, PCIX_BRIDGE_ST_SPLOVRN);
sys/dev/pci/pci_subr.c
1426
onoff("Split request delayed", reg, PCIX_BRIDGE_ST_SPLRQDL);
sys/dev/pci/pci_subr.c
1432
onoff("266MHz capable", reg, PCIX_BRIDGE_ST_266);
sys/dev/pci/pci_subr.c
1433
onoff("533MHz capable", reg, PCIX_BRIDGE_ST_533);
sys/dev/pci/pci_subr.c
1437
onoff("Data Parity Error Recovery", reg,
sys/dev/pci/pci_subr.c
1439
onoff("Enable Relaxed Ordering", reg, PCIX_CMD_RELAXED_ORDER);
sys/dev/pci/pci_subr.c
1452
onoff("64bit device", reg, PCIX_STATUS_64BIT);
sys/dev/pci/pci_subr.c
1453
onoff("133MHz capable", reg, PCIX_STATUS_133);
sys/dev/pci/pci_subr.c
1454
onoff("Split completion discarded", reg, PCIX_STATUS_SPLDISC);
sys/dev/pci/pci_subr.c
1455
onoff("Unexpected split completion", reg, PCIX_STATUS_SPLUNEX);
sys/dev/pci/pci_subr.c
1457
onoff("Split completion overrun", reg, PCIX_BRIDGE_ST_SPLOVRN);
sys/dev/pci/pci_subr.c
1458
onoff("Split request delayed", reg, PCIX_BRIDGE_ST_SPLRQDL);
sys/dev/pci/pci_subr.c
1470
onoff("Received split completion error", reg,
sys/dev/pci/pci_subr.c
1473
onoff("266MHz capable", reg, PCIX_STATUS_266);
sys/dev/pci/pci_subr.c
1474
onoff("533MHz capable", reg, PCIX_STATUS_533);
sys/dev/pci/pci_subr.c
1511
onoff("Enable", val, PCI_HT_MSI_ENABLED);
sys/dev/pci/pci_subr.c
1512
onoff("Fixed", val, PCI_HT_MSI_FIXED);
sys/dev/pci/pci_subr.c
1650
onoff("IOTLB support", reg, PCI_SECURE_CAP_IOTLBSUP);
sys/dev/pci/pci_subr.c
1651
onoff("HyperTransport tunnel translation support", reg,
sys/dev/pci/pci_subr.c
1653
onoff("Not present table entries cached", reg, PCI_SECURE_CAP_NPCACHE);
sys/dev/pci/pci_subr.c
1654
onoff("IOMMU Extended Feature Register support", reg,
sys/dev/pci/pci_subr.c
1656
onoff("IOMMU Miscellaneous Information Register 1", reg,
sys/dev/pci/pci_subr.c
1662
onoff("Enable", reg, PCI_SECURE_IOMMU_BAL_EN);
sys/dev/pci/pci_subr.c
1673
onoff("Range valid", reg, PCI_SECURE_IOMMU_RANGE_RNGVALID);
sys/dev/pci/pci_subr.c
1695
onoff("ATS response address range reserved", reg,
sys/dev/pci/pci_subr.c
1946
onoff("Slot implemented", reg, PCIE_XCAP_SI);
sys/dev/pci/pci_subr.c
1976
onoff("Attention Button Present", reg, PCIE_DCAP_ATTN_BUTTON);
sys/dev/pci/pci_subr.c
1977
onoff("Attention Indicator Present", reg, PCIE_DCAP_ATTN_IND);
sys/dev/pci/pci_subr.c
1978
onoff("Power Indicator Present", reg, PCIE_DCAP_PWR_IND);
sys/dev/pci/pci_subr.c
1979
onoff("Role-Based Error Report", reg, PCIE_DCAP_ROLE_ERR_RPT);
sys/dev/pci/pci_subr.c
1986
onoff("Function-Level Reset Capability", reg, PCIE_DCAP_FLR);
sys/dev/pci/pci_subr.c
1991
onoff("Correctable Error Reporting Enable", reg,
sys/dev/pci/pci_subr.c
1993
onoff("Non Fatal Error Reporting Enable", reg, PCIE_DCSR_ENA_NFER);
sys/dev/pci/pci_subr.c
1994
onoff("Fatal Error Reporting Enable", reg, PCIE_DCSR_ENA_FER);
sys/dev/pci/pci_subr.c
1995
onoff("Unsupported Request Reporting Enable", reg, PCIE_DCSR_ENA_URR);
sys/dev/pci/pci_subr.c
1996
onoff("Enable Relaxed Ordering", reg, PCIE_DCSR_ENA_RELAX_ORD);
sys/dev/pci/pci_subr.c
1999
onoff("Extended Tag Field Enable", reg, PCIE_DCSR_EXT_TAG_FIELD);
sys/dev/pci/pci_subr.c
2000
onoff("Phantom Functions Enable", reg, PCIE_DCSR_PHANTOM_FUNCS);
sys/dev/pci/pci_subr.c
2001
onoff("Aux Power PM Enable", reg, PCIE_DCSR_AUX_POWER_PM);
sys/dev/pci/pci_subr.c
2002
onoff("Enable No Snoop", reg, PCIE_DCSR_ENA_NO_SNOOP);
sys/dev/pci/pci_subr.c
2006
onoff("Bridge Config Retry Enable", reg,
sys/dev/pci/pci_subr.c
2012
onoff("Correctable Error Detected", reg, PCIE_DCSR_CED);
sys/dev/pci/pci_subr.c
2013
onoff("Non Fatal Error Detected", reg, PCIE_DCSR_NFED);
sys/dev/pci/pci_subr.c
2014
onoff("Fatal Error Detected", reg, PCIE_DCSR_FED);
sys/dev/pci/pci_subr.c
2015
onoff("Unsupported Request Detected", reg, PCIE_DCSR_URD);
sys/dev/pci/pci_subr.c
2016
onoff("Aux Power Detected", reg, PCIE_DCSR_AUX_PWR);
sys/dev/pci/pci_subr.c
2017
onoff("Transaction Pending", reg, PCIE_DCSR_TRANSACTION_PND);
sys/dev/pci/pci_subr.c
2018
onoff("Emergency Power Reduction Detected", reg, PCIE_DCSR_EMGPWRREDD);
sys/dev/pci/pci_subr.c
2049
onoff("Clock Power Management", reg, PCIE_LCAP_CLOCK_PM);
sys/dev/pci/pci_subr.c
2050
onoff("Surprise Down Error Report", reg,
sys/dev/pci/pci_subr.c
2052
onoff("Data Link Layer Link Active", reg, PCIE_LCAP_DL_ACTIVE);
sys/dev/pci/pci_subr.c
2053
onoff("Link BW Notification Capable", reg,
sys/dev/pci/pci_subr.c
2055
onoff("ASPM Optionally Compliance", reg,
sys/dev/pci/pci_subr.c
2078
onoff("Link Disable", reg, PCIE_LCSR_LINK_DIS);
sys/dev/pci/pci_subr.c
2079
onoff("Retrain Link", reg, PCIE_LCSR_RETRAIN);
sys/dev/pci/pci_subr.c
2080
onoff("Common Clock Configuration", reg, PCIE_LCSR_COMCLKCFG);
sys/dev/pci/pci_subr.c
2081
onoff("Extended Synch", reg, PCIE_LCSR_EXTNDSYNC);
sys/dev/pci/pci_subr.c
2082
onoff("Enable Clock Power Management", reg, PCIE_LCSR_ENCLKPM);
sys/dev/pci/pci_subr.c
2083
onoff("Hardware Autonomous Width Disable", reg,PCIE_LCSR_HAWD);
sys/dev/pci/pci_subr.c
2084
onoff("Link Bandwidth Management Interrupt Enable", reg,
sys/dev/pci/pci_subr.c
2086
onoff("Link Autonomous Bandwidth Interrupt Enable", reg,
sys/dev/pci/pci_subr.c
2112
onoff("Training Error", reg, PCIE_LCSR_LINKTRAIN_ERR);
sys/dev/pci/pci_subr.c
2113
onoff("Link Training", reg, PCIE_LCSR_LINKTRAIN);
sys/dev/pci/pci_subr.c
2114
onoff("Slot Clock Configuration", reg, PCIE_LCSR_SLOTCLKCFG);
sys/dev/pci/pci_subr.c
2115
onoff("Data Link Layer Link Active", reg, PCIE_LCSR_DLACTIVE);
sys/dev/pci/pci_subr.c
2116
onoff("Link Bandwidth Management Status", reg,
sys/dev/pci/pci_subr.c
2118
onoff("Link Autonomous Bandwidth Status", reg,
sys/dev/pci/pci_subr.c
2128
onoff("Attention Button Present", reg, PCIE_SLCAP_ABP);
sys/dev/pci/pci_subr.c
2129
onoff("Power Controller Present", reg, PCIE_SLCAP_PCP);
sys/dev/pci/pci_subr.c
2130
onoff("MRL Sensor Present", reg, PCIE_SLCAP_MSP);
sys/dev/pci/pci_subr.c
2131
onoff("Attention Indicator Present", reg, PCIE_SLCAP_AIP);
sys/dev/pci/pci_subr.c
2132
onoff("Power Indicator Present", reg, PCIE_SLCAP_PIP);
sys/dev/pci/pci_subr.c
2133
onoff("Hot-Plug Surprise", reg, PCIE_SLCAP_HPS);
sys/dev/pci/pci_subr.c
2134
onoff("Hot-Plug Capable", reg, PCIE_SLCAP_HPC);
sys/dev/pci/pci_subr.c
2138
onoff("Electromechanical Interlock Present", reg,
sys/dev/pci/pci_subr.c
2140
onoff("No Command Completed Support", reg, PCIE_SLCAP_NCCS);
sys/dev/pci/pci_subr.c
2147
onoff("Attention Button Pressed Enabled", reg, PCIE_SLCSR_ABE);
sys/dev/pci/pci_subr.c
2148
onoff("Power Fault Detected Enabled", reg, PCIE_SLCSR_PFE);
sys/dev/pci/pci_subr.c
2149
onoff("MRL Sensor Changed Enabled", reg, PCIE_SLCSR_MSE);
sys/dev/pci/pci_subr.c
2150
onoff("Presence Detect Changed Enabled", reg, PCIE_SLCSR_PDE);
sys/dev/pci/pci_subr.c
2151
onoff("Command Completed Interrupt Enabled", reg,
sys/dev/pci/pci_subr.c
2153
onoff("Hot-Plug Interrupt Enabled", reg, PCIE_SLCSR_HPE);
sys/dev/pci/pci_subr.c
2195
onoff("Electromechanical Interlock Control",
sys/dev/pci/pci_subr.c
2197
onoff("Data Link Layer State Changed Enable", reg,
sys/dev/pci/pci_subr.c
2199
onoff("Auto Slot Power Limit Disable", reg,
sys/dev/pci/pci_subr.c
2204
onoff("Attention Button Pressed", reg, PCIE_SLCSR_ABP);
sys/dev/pci/pci_subr.c
2205
onoff("Power Fault Detected", reg, PCIE_SLCSR_PFD);
sys/dev/pci/pci_subr.c
2206
onoff("MRL Sensor Changed", reg, PCIE_SLCSR_MSC);
sys/dev/pci/pci_subr.c
2207
onoff("Presence Detect Changed", reg, PCIE_SLCSR_PDC);
sys/dev/pci/pci_subr.c
2208
onoff("Command Completed", reg, PCIE_SLCSR_CC);
sys/dev/pci/pci_subr.c
2209
onoff("MRL Open", reg, PCIE_SLCSR_MS);
sys/dev/pci/pci_subr.c
2210
onoff("Card Present in slot", reg, PCIE_SLCSR_PDS);
sys/dev/pci/pci_subr.c
2211
onoff("Electromechanical Interlock engaged", reg,
sys/dev/pci/pci_subr.c
2213
onoff("Data Link Layer State Changed", reg, PCIE_SLCSR_LACS);
sys/dev/pci/pci_subr.c
2220
onoff("SERR on Correctable Error Enable", reg,
sys/dev/pci/pci_subr.c
2222
onoff("SERR on Non-Fatal Error Enable", reg,
sys/dev/pci/pci_subr.c
2224
onoff("SERR on Fatal Error Enable", reg, PCIE_RCR_SERR_FER);
sys/dev/pci/pci_subr.c
2225
onoff("PME Interrupt Enable", reg, PCIE_RCR_PME_IE);
sys/dev/pci/pci_subr.c
2226
onoff("CRS Software Visibility Enable", reg, PCIE_RCR_CRS_SVE);
sys/dev/pci/pci_subr.c
2231
onoff("CRS Software Visibility", reg, PCIE_RCR_CRS_SV);
sys/dev/pci/pci_subr.c
2238
onoff("PME was asserted", reg, PCIE_RSR_PME_STAT);
sys/dev/pci/pci_subr.c
2239
onoff("another PME is pending", reg, PCIE_RSR_PME_PEND);
sys/dev/pci/pci_subr.c
2262
onoff("Completion Timeout Disable Supported", reg,
sys/dev/pci/pci_subr.c
2264
onoff("ARI Forwarding Supported", reg, PCIE_DCAP2_ARI_FWD);
sys/dev/pci/pci_subr.c
2265
onoff("AtomicOp Routing Supported", reg, PCIE_DCAP2_ATOM_ROUT);
sys/dev/pci/pci_subr.c
2266
onoff("32bit AtomicOp Completer Supported", reg, PCIE_DCAP2_32ATOM);
sys/dev/pci/pci_subr.c
2267
onoff("64bit AtomicOp Completer Supported", reg, PCIE_DCAP2_64ATOM);
sys/dev/pci/pci_subr.c
2268
onoff("128-bit CAS Completer Supported", reg, PCIE_DCAP2_128CAS);
sys/dev/pci/pci_subr.c
2269
onoff("No RO-enabled PR-PR passing", reg, PCIE_DCAP2_NO_ROPR_PASS);
sys/dev/pci/pci_subr.c
2270
onoff("LTR Mechanism Supported", reg, PCIE_DCAP2_LTR_MEC);
sys/dev/pci/pci_subr.c
2301
onoff("10-bit Tag Completer Supported", reg, PCIE_DCAP2_TBT_COMP);
sys/dev/pci/pci_subr.c
2302
onoff("10-bit Tag Requester Supported", reg, PCIE_DCAP2_TBT_REQ);
sys/dev/pci/pci_subr.c
2318
onoff("Extended Fmt Field Supported", reg, PCIE_DCAP2_EXTFMT_FLD);
sys/dev/pci/pci_subr.c
2319
onoff("End-End TLP Prefix Supported", reg, PCIE_DCAP2_EETLP_PREF);
sys/dev/pci/pci_subr.c
2337
onoff("Emergency Power Reduction Initialization Required", reg,
sys/dev/pci/pci_subr.c
2339
onoff("FRS Supported", reg, PCIE_DCAP2_FRS);
sys/dev/pci/pci_subr.c
2346
onoff("Completion Timeout Disabled", reg, PCIE_DCSR2_COMPT_DIS);
sys/dev/pci/pci_subr.c
2347
onoff("ARI Forwarding Enabled", reg, PCIE_DCSR2_ARI_FWD);
sys/dev/pci/pci_subr.c
2348
onoff("AtomicOp Requester Enabled", reg, PCIE_DCSR2_ATOM_REQ);
sys/dev/pci/pci_subr.c
2349
onoff("AtomicOp Egress Blocking", reg, PCIE_DCSR2_ATOM_EBLK);
sys/dev/pci/pci_subr.c
2350
onoff("IDO Request Enabled", reg, PCIE_DCSR2_IDO_REQ);
sys/dev/pci/pci_subr.c
2351
onoff("IDO Completion Enabled", reg, PCIE_DCSR2_IDO_COMP);
sys/dev/pci/pci_subr.c
2352
onoff("LTR Mechanism Enabled", reg, PCIE_DCSR2_LTR_MEC);
sys/dev/pci/pci_subr.c
2353
onoff("Emergency Power Reduction Request", reg,
sys/dev/pci/pci_subr.c
2355
onoff("10-bit Tag Requester Enabled", reg, PCIE_DCSR2_TBT_REQ);
sys/dev/pci/pci_subr.c
2371
onoff("End-End TLP Prefix Blocking on", reg, PCIE_DCSR2_EETLP);
sys/dev/pci/pci_subr.c
2385
onoff("Crosslink Supported", reg, PCIE_LCAP2_CROSSLNK);
sys/dev/pci/pci_subr.c
2396
onoff("Retimer Presence Detect Supported", reg,
sys/dev/pci/pci_subr.c
2398
onoff("DRS Supported", reg, PCIE_LCAP2_DRS);
sys/dev/pci/pci_subr.c
2409
onoff("Enter Compliance Enabled", reg, PCIE_LCSR2_ENT_COMPL);
sys/dev/pci/pci_subr.c
2410
onoff("HW Autonomous Speed Disabled", reg,
sys/dev/pci/pci_subr.c
2418
onoff("Enter Modified Compliance", reg, PCIE_LCSR2_EN_MCOMP);
sys/dev/pci/pci_subr.c
2419
onoff("Compliance SOS", reg, PCIE_LCSR2_COMP_SOS);
sys/dev/pci/pci_subr.c
2431
onoff("Equalization Complete", reg, PCIE_LCSR2_EQ_COMPL);
sys/dev/pci/pci_subr.c
2432
onoff("Equalization Phase 1 Successful", reg,
sys/dev/pci/pci_subr.c
2434
onoff("Equalization Phase 2 Successful", reg,
sys/dev/pci/pci_subr.c
2436
onoff("Equalization Phase 3 Successful", reg,
sys/dev/pci/pci_subr.c
2438
onoff("Link Equalization Request", reg, PCIE_LCSR2_LNKEQ_REQ);
sys/dev/pci/pci_subr.c
2439
onoff("Retimer Presence Detected", reg, PCIE_LCSR2_RETIMERPD);
sys/dev/pci/pci_subr.c
2464
onoff("DRS Message Received", reg, PCIE_LCSR2_DRSRCV);
sys/dev/pci/pci_subr.c
2484
onoff("Function Mask", reg, PCI_MSIX_CTL_FUNCMASK);
sys/dev/pci/pci_subr.c
2485
onoff("MSI-X Enable", reg, PCI_MSIX_CTL_ENABLE);
sys/dev/pci/pci_subr.c
2535
onoff("Transaction Pending", reg, PCI_AF_TP_CAP);
sys/dev/pci/pci_subr.c
2536
onoff("Function Level Reset", reg, PCI_AF_FLR_CAP);
sys/dev/pci/pci_subr.c
2544
onoff("Transaction Pending", reg, PCI_AFSR_TP);
sys/dev/pci/pci_subr.c
2665
onoff("Writable", reg, PCI_EA_W);
sys/dev/pci/pci_subr.c
2666
onoff("Enable for this entry", reg, PCI_EA_E);
sys/dev/pci/pci_subr.c
2837
onoff("Undefined", reg, PCI_AER_UC_UNDEFINED);
sys/dev/pci/pci_subr.c
2838
onoff("Data Link Protocol Error", reg, PCI_AER_UC_DL_PROTOCOL_ERROR);
sys/dev/pci/pci_subr.c
2839
onoff("Surprise Down Error", reg, PCI_AER_UC_SURPRISE_DOWN_ERROR);
sys/dev/pci/pci_subr.c
2840
onoff("Poisoned TLP Received", reg, PCI_AER_UC_POISONED_TLP);
sys/dev/pci/pci_subr.c
2841
onoff("Flow Control Protocol Error", reg, PCI_AER_UC_FC_PROTOCOL_ERROR);
sys/dev/pci/pci_subr.c
2842
onoff("Completion Timeout", reg, PCI_AER_UC_COMPLETION_TIMEOUT);
sys/dev/pci/pci_subr.c
2843
onoff("Completer Abort", reg, PCI_AER_UC_COMPLETER_ABORT);
sys/dev/pci/pci_subr.c
2844
onoff("Unexpected Completion", reg, PCI_AER_UC_UNEXPECTED_COMPLETION);
sys/dev/pci/pci_subr.c
2845
onoff("Receiver Overflow", reg, PCI_AER_UC_RECEIVER_OVERFLOW);
sys/dev/pci/pci_subr.c
2846
onoff("Malformed TLP", reg, PCI_AER_UC_MALFORMED_TLP);
sys/dev/pci/pci_subr.c
2847
onoff("ECRC Error", reg, PCI_AER_UC_ECRC_ERROR);
sys/dev/pci/pci_subr.c
2848
onoff("Unsupported Request Error", reg,
sys/dev/pci/pci_subr.c
2850
onoff("ACS Violation", reg, PCI_AER_UC_ACS_VIOLATION);
sys/dev/pci/pci_subr.c
2851
onoff("Uncorrectable Internal Error", reg, PCI_AER_UC_INTERNAL_ERROR);
sys/dev/pci/pci_subr.c
2852
onoff("MC Blocked TLP", reg, PCI_AER_UC_MC_BLOCKED_TLP);
sys/dev/pci/pci_subr.c
2853
onoff("AtomicOp Egress BLK", reg, PCI_AER_UC_ATOMIC_OP_EGRESS_BLOCKED);
sys/dev/pci/pci_subr.c
2854
onoff("TLP Prefix Blocked Error", reg,
sys/dev/pci/pci_subr.c
2856
onoff("Poisoned TLP Egress Blocked", reg,
sys/dev/pci/pci_subr.c
2864
onoff("Receiver Error", reg, PCI_AER_COR_RECEIVER_ERROR);
sys/dev/pci/pci_subr.c
2865
onoff("Bad TLP", reg, PCI_AER_COR_BAD_TLP);
sys/dev/pci/pci_subr.c
2866
onoff("Bad DLLP", reg, PCI_AER_COR_BAD_DLLP);
sys/dev/pci/pci_subr.c
2867
onoff("REPLAY_NUM Rollover", reg, PCI_AER_COR_REPLAY_NUM_ROLLOVER);
sys/dev/pci/pci_subr.c
2868
onoff("Replay Timer Timeout", reg, PCI_AER_COR_REPLAY_TIMER_TIMEOUT);
sys/dev/pci/pci_subr.c
2869
onoff("Advisory Non-Fatal Error", reg, PCI_AER_COR_ADVISORY_NF_ERROR);
sys/dev/pci/pci_subr.c
2870
onoff("Corrected Internal Error", reg, PCI_AER_COR_INTERNAL_ERROR);
sys/dev/pci/pci_subr.c
2871
onoff("Header Log Overflow", reg, PCI_AER_COR_HEADER_LOG_OVERFLOW);
sys/dev/pci/pci_subr.c
2880
onoff("ECRC Generation Capable", reg, PCI_AER_ECRC_GEN_CAPABLE);
sys/dev/pci/pci_subr.c
2881
onoff("ECRC Generation Enable", reg, PCI_AER_ECRC_GEN_ENABLE);
sys/dev/pci/pci_subr.c
2882
onoff("ECRC Check Capable", reg, PCI_AER_ECRC_CHECK_CAPABLE);
sys/dev/pci/pci_subr.c
2883
onoff("ECRC Check Enable", reg, PCI_AER_ECRC_CHECK_ENABLE);
sys/dev/pci/pci_subr.c
2884
onoff("Multiple Header Recording Capable", reg,
sys/dev/pci/pci_subr.c
2886
onoff("Multiple Header Recording Enable", reg,PCI_AER_MULT_HDR_ENABLE);
sys/dev/pci/pci_subr.c
2887
onoff("Completion Timeout Prefix/Header Log Capable", reg,
sys/dev/pci/pci_subr.c
2893
onoff("TLP Prefix Log Present", reg, PCI_AER_TLP_PREFIX_LOG_PRESENT);
sys/dev/pci/pci_subr.c
2901
onoff("Correctable Error Reporting Enable", reg,
sys/dev/pci/pci_subr.c
2903
onoff("Non-Fatal Error Reporting Enable", reg,
sys/dev/pci/pci_subr.c
2905
onoff("Fatal Error Reporting Enable", reg, PCI_AER_ROOTERR_F_ENABLE);
sys/dev/pci/pci_subr.c
2912
onoff("ERR_COR Received", reg, PCI_AER_ROOTERR_COR_ERR);
sys/dev/pci/pci_subr.c
2913
onoff("Multiple ERR_COR Received", reg, PCI_AER_ROOTERR_MULTI_COR_ERR);
sys/dev/pci/pci_subr.c
2914
onoff("ERR_FATAL/NONFATAL_ERR Received", reg, PCI_AER_ROOTERR_UC_ERR);
sys/dev/pci/pci_subr.c
2915
onoff("Multiple ERR_FATAL/NONFATAL_ERR Received", reg,
sys/dev/pci/pci_subr.c
2917
onoff("First Uncorrectable Fatal", reg,PCI_AER_ROOTERR_FIRST_UC_FATAL);
sys/dev/pci/pci_subr.c
2918
onoff("Non-Fatal Error Messages Received", reg,PCI_AER_ROOTERR_NF_ERR);
sys/dev/pci/pci_subr.c
2919
onoff("Fatal Error Messages Received", reg, PCI_AER_ROOTERR_F_ERR);
sys/dev/pci/pci_subr.c
3059
onoff("Hardware fixed arbitration scheme",
sys/dev/pci/pci_subr.c
3061
onoff("WRR arbitration with 32 phases",
sys/dev/pci/pci_subr.c
3063
onoff("WRR arbitration with 64 phases",
sys/dev/pci/pci_subr.c
3065
onoff("WRR arbitration with 128 phases",
sys/dev/pci/pci_subr.c
3077
onoff("VC Arbitration Table Status",
sys/dev/pci/pci_subr.c
3088
onoff(" Non-configurable Hardware fixed arbitration scheme",
sys/dev/pci/pci_subr.c
3090
onoff(" WRR arbitration with 32 phases",
sys/dev/pci/pci_subr.c
3092
onoff(" WRR arbitration with 64 phases",
sys/dev/pci/pci_subr.c
3094
onoff(" WRR arbitration with 128 phases",
sys/dev/pci/pci_subr.c
3096
onoff(" Time-based WRR arbitration with 128 phases",
sys/dev/pci/pci_subr.c
3098
onoff(" WRR arbitration with 256 phases",
sys/dev/pci/pci_subr.c
3100
onoff(" Advanced Packet Switching",
sys/dev/pci/pci_subr.c
3102
onoff(" Reject Snoop Transaction",
sys/dev/pci/pci_subr.c
3124
onoff(" VC Enable", reg, PCI_VC_RESOURCE_CTL_VC_ENABLE);
sys/dev/pci/pci_subr.c
3128
onoff(" Port Arbitration Table Status",
sys/dev/pci/pci_subr.c
3130
onoff(" VC Negotiation Pending",
sys/dev/pci/pci_subr.c
3255
onoff("System Allocated",
sys/dev/pci/pci_subr.c
3298
onoff(" Link Valid", reg, PCI_RCLINK_DCL_LINKDESC_LVALID);
sys/dev/pci/pci_subr.c
3302
onoff(" Associated RCRB Header", reg,
sys/dev/pci/pci_subr.c
3396
onoff("ACS Source Validation", cap, PCI_ACS_CAP_V);
sys/dev/pci/pci_subr.c
3397
onoff("ACS Transaction Blocking", cap, PCI_ACS_CAP_B);
sys/dev/pci/pci_subr.c
3398
onoff("ACS P2P Request Redirect", cap, PCI_ACS_CAP_R);
sys/dev/pci/pci_subr.c
3399
onoff("ACS P2P Completion Redirect", cap, PCI_ACS_CAP_C);
sys/dev/pci/pci_subr.c
3400
onoff("ACS Upstream Forwarding", cap, PCI_ACS_CAP_U);
sys/dev/pci/pci_subr.c
3401
onoff("ACS Egress Control", cap, PCI_ACS_CAP_E);
sys/dev/pci/pci_subr.c
3402
onoff("ACS Direct Translated P2P", cap, PCI_ACS_CAP_T);
sys/dev/pci/pci_subr.c
3408
onoff("ACS Source Validation Enable", ctl, PCI_ACS_CTL_V);
sys/dev/pci/pci_subr.c
3409
onoff("ACS Transaction Blocking Enable", ctl, PCI_ACS_CTL_B);
sys/dev/pci/pci_subr.c
3410
onoff("ACS P2P Request Redirect Enable", ctl, PCI_ACS_CTL_R);
sys/dev/pci/pci_subr.c
3411
onoff("ACS P2P Completion Redirect Enable", ctl, PCI_ACS_CTL_C);
sys/dev/pci/pci_subr.c
3412
onoff("ACS Upstream Forwarding Enable", ctl, PCI_ACS_CTL_U);
sys/dev/pci/pci_subr.c
3413
onoff("ACS Egress Control Enable", ctl, PCI_ACS_CTL_E);
sys/dev/pci/pci_subr.c
3414
onoff("ACS Direct Translated P2P Enable", ctl, PCI_ACS_CTL_T);
sys/dev/pci/pci_subr.c
3438
onoff("MVFC Function Groups Capability", reg, PCI_ARI_CAP_M);
sys/dev/pci/pci_subr.c
3439
onoff("ACS Function Groups Capability", reg, PCI_ARI_CAP_A);
sys/dev/pci/pci_subr.c
3443
onoff("MVFC Function Groups Enable", reg, PCI_ARI_CTL_M);
sys/dev/pci/pci_subr.c
3444
onoff("ACS Function Groups Enable", reg, PCI_ARI_CTL_A);
sys/dev/pci/pci_subr.c
3465
onoff("Page Aligned Request", reg, PCI_ATS_CAP_PALIGNREQ);
sys/dev/pci/pci_subr.c
3466
onoff("Global Invalidate", reg, PCI_ATS_CAP_GLOBALINVL);
sys/dev/pci/pci_subr.c
3467
onoff("Relaxed Ordering", reg, PCI_ATS_CAP_RELAXORD);
sys/dev/pci/pci_subr.c
3472
onoff("Enable", reg, PCI_ATS_CTL_EN);
sys/dev/pci/pci_subr.c
3502
onoff("VF Migration Capable", reg, PCI_SRIOV_CAP_VF_MIGRATION);
sys/dev/pci/pci_subr.c
3503
onoff("ARI Capable Hierarchy Preserved", reg,
sys/dev/pci/pci_subr.c
3512
onoff("VF Enable", reg, PCI_SRIOV_CTL_VF_ENABLE);
sys/dev/pci/pci_subr.c
3513
onoff("VF Migration Enable", reg, PCI_SRIOV_CTL_VF_MIGRATION_SUPPORT);
sys/dev/pci/pci_subr.c
3514
onoff("VF Migration Interrupt Enable", reg,
sys/dev/pci/pci_subr.c
3516
onoff("VF Memory Space Enable", reg, PCI_SRIOV_CTL_VF_MSE);
sys/dev/pci/pci_subr.c
3517
onoff("ARI Capable Hierarchy", reg, PCI_SRIOV_CTL_ARI_CAP_HIER);
sys/dev/pci/pci_subr.c
3521
onoff("VF Migration Status", reg, PCI_SRIOV_STA_VF_MIGRATION);
sys/dev/pci/pci_subr.c
3622
onoff("ECRC Regeneration Supported", reg, PCI_MCAST_CAP_ECRCREGEN);
sys/dev/pci/pci_subr.c
3627
onoff("Enable", reg, PCI_MCAST_CTL_ENA);
sys/dev/pci/pci_subr.c
3679
onoff("Enable", reg, PCI_PAGE_REQ_CTL_E);
sys/dev/pci/pci_subr.c
3680
onoff("Reset", reg, PCI_PAGE_REQ_CTL_R);
sys/dev/pci/pci_subr.c
3683
onoff("Response Failure", reg, PCI_PAGE_REQ_STA_RF);
sys/dev/pci/pci_subr.c
3684
onoff("Unexpected Page Request Group Index", reg,
sys/dev/pci/pci_subr.c
3686
onoff("Stopped", reg, PCI_PAGE_REQ_STA_S);
sys/dev/pci/pci_subr.c
3687
onoff("PRG Response PASID Required", reg, PCI_PAGE_REQ_STA_PASIDR);
sys/dev/pci/pci_subr.c
3810
onoff("Substate Control Enabled", reg, PCI_DPA_CS_SUBSTCTLEN);
sys/dev/pci/pci_subr.c
3847
onoff("No ST Mode Supported", reg, PCI_TPH_REQ_CAP_NOST);
sys/dev/pci/pci_subr.c
3848
onoff("Interrupt Vector Mode Supported", reg, PCI_TPH_REQ_CAP_INTVEC);
sys/dev/pci/pci_subr.c
3849
onoff("Device Specific Mode Supported", reg, PCI_TPH_REQ_CAP_DEVSPEC);
sys/dev/pci/pci_subr.c
3850
onoff("Extend TPH Requester Supported", reg, PCI_TPH_REQ_CAP_XTPHREQ);
sys/dev/pci/pci_subr.c
3937
onoff("Perform Equalization", reg, PCI_SECPCIE_LCTL3_PERFEQ);
sys/dev/pci/pci_subr.c
3938
onoff("Link Equalization Request Interrupt Enable",
sys/dev/pci/pci_subr.c
3991
onoff("Execute Permission Supported", reg, PCI_PASID_CAP_XPERM);
sys/dev/pci/pci_subr.c
3992
onoff("Privileged Mode Supported", reg, PCI_PASID_CAP_PRIVMODE);
sys/dev/pci/pci_subr.c
3997
onoff("PASID Enable", reg, PCI_PASID_CTL_PASID_EN);
sys/dev/pci/pci_subr.c
3998
onoff("Execute Permission Enable", reg, PCI_PASID_CTL_XPERM_EN);
sys/dev/pci/pci_subr.c
3999
onoff("Privileged Mode Enable", reg, PCI_PASID_CTL_PRIVMODE_EN);
sys/dev/pci/pci_subr.c
4014
onoff("LNR-64 Supported", reg, PCI_LNR_CAP_64);
sys/dev/pci/pci_subr.c
4015
onoff("LNR-128 Supported", reg, PCI_LNR_CAP_128);
sys/dev/pci/pci_subr.c
4020
onoff("LNR Enable", reg, PCI_LNR_CTL_EN);
sys/dev/pci/pci_subr.c
4021
onoff("LNR CLS", reg, PCI_LNR_CTL_CLS);
sys/dev/pci/pci_subr.c
4029
onoff("Cfg Request received UR Completion", r,PCI_DPC_RPPIO_CFGUR_CPL);
sys/dev/pci/pci_subr.c
4030
onoff("Cfg Request received CA Completion", r,PCI_DPC_RPPIO_CFGCA_CPL);
sys/dev/pci/pci_subr.c
4031
onoff("Cfg Request Completion Timeout", r, PCI_DPC_RPPIO_CFG_CTO);
sys/dev/pci/pci_subr.c
4032
onoff("I/O Request received UR Completion", r, PCI_DPC_RPPIO_IOUR_CPL);
sys/dev/pci/pci_subr.c
4033
onoff("I/O Request received CA Completion", r, PCI_DPC_RPPIO_IOCA_CPL);
sys/dev/pci/pci_subr.c
4034
onoff("I/O Request Completion Timeout", r, PCI_DPC_RPPIO_IO_CTO);
sys/dev/pci/pci_subr.c
4035
onoff("Mem Request received UR Completion", r,PCI_DPC_RPPIO_MEMUR_CPL);
sys/dev/pci/pci_subr.c
4036
onoff("Mem Request received CA Completion", r,PCI_DPC_RPPIO_MEMCA_CPL);
sys/dev/pci/pci_subr.c
4037
onoff("Mem Request Completion Timeout", r, PCI_DPC_RPPIO_MEM_CTO);
sys/dev/pci/pci_subr.c
4056
onoff("RP Extensions for DPC", reg, PCI_DPCCAP_RPEXT);
sys/dev/pci/pci_subr.c
4057
onoff("Poisoned TLP Egress Blocking Supported", reg,
sys/dev/pci/pci_subr.c
4059
onoff("DPC Software Triggering Supported", reg, PCI_DPCCAP_SWTRIG);
sys/dev/pci/pci_subr.c
4062
onoff("DL_Active ERR_COR Signaling Supported", reg,
sys/dev/pci/pci_subr.c
4083
onoff("DPC Interrupt Enable", reg, PCI_DPCCTL_IE);
sys/dev/pci/pci_subr.c
4084
onoff("DPC ERR_COR Enable", reg, PCI_DPCCTL_ERRCOREN);
sys/dev/pci/pci_subr.c
4085
onoff("Poisoned TLP Egress Blocking Enable", reg,
sys/dev/pci/pci_subr.c
4087
onoff("DPC Software Trigger", reg, PCI_DPCCTL_SWTRIG);
sys/dev/pci/pci_subr.c
4088
onoff("DL_Active ERR_COR Enable", reg, PCI_DPCCTL_DLACTECOR);
sys/dev/pci/pci_subr.c
4094
onoff("DPC Trigger Status", reg, PCI_DPCSTAT_TSTAT);
sys/dev/pci/pci_subr.c
4110
onoff("DPC Interrupt Status", reg, PCI_DPCSTAT_ISTAT);
sys/dev/pci/pci_subr.c
4112
onoff("DPC RP Busy", reg, PCI_DPCSTAT_RPBUSY);
sys/dev/pci/pci_subr.c
4194
onoff("PCI-PM L1.2 Supported", reg, PCI_L1PM_CAP_PCIPM12);
sys/dev/pci/pci_subr.c
4195
onoff("PCI-PM L1.1 Supported", reg, PCI_L1PM_CAP_PCIPM11);
sys/dev/pci/pci_subr.c
4196
onoff("ASPM L1.2 Supported", reg, PCI_L1PM_CAP_ASPM12);
sys/dev/pci/pci_subr.c
4197
onoff("ASPM L1.1 Supported", reg, PCI_L1PM_CAP_ASPM11);
sys/dev/pci/pci_subr.c
4198
onoff("L1 PM Substates Supported", reg, PCI_L1PM_CAP_L1PM);
sys/dev/pci/pci_subr.c
4204
onoff("Link Activation Supported", reg,
sys/dev/pci/pci_subr.c
4220
onoff("PCI-PM L1.2 Enable", reg, PCI_L1PM_CTL1_PCIPM12_EN);
sys/dev/pci/pci_subr.c
4221
onoff("PCI-PM L1.1 Enable", reg, PCI_L1PM_CTL1_PCIPM11_EN);
sys/dev/pci/pci_subr.c
4222
onoff("ASPM L1.2 Enable", reg, PCI_L1PM_CTL1_ASPM12_EN);
sys/dev/pci/pci_subr.c
4223
onoff("ASPM L1.1 Enable", reg, PCI_L1PM_CTL1_ASPM11_EN);
sys/dev/pci/pci_subr.c
4224
onoff("Link Activation Interrupt Enable", reg, PCI_L1PM_CTL1_LAIE);
sys/dev/pci/pci_subr.c
4225
onoff("Link Activation Control", reg, PCI_L1PM_CTL1_LA);
sys/dev/pci/pci_subr.c
4246
onoff("Link Activation Status", reg, PCI_L1PM_STAT_LA);
sys/dev/pci/pci_subr.c
4260
onoff("PTM Requester Capable", reg, PCI_PTM_CAP_REQ);
sys/dev/pci/pci_subr.c
4261
onoff("PTM Responder Capable", reg, PCI_PTM_CAP_RESP);
sys/dev/pci/pci_subr.c
4262
onoff("PTM Root Capable", reg, PCI_PTM_CAP_ROOT);
sys/dev/pci/pci_subr.c
4279
onoff("PTM Enable", reg, PCI_PTM_CTL_EN);
sys/dev/pci/pci_subr.c
4280
onoff("Root Select", reg, PCI_PTM_CTL_ROOTSEL);
sys/dev/pci/pci_subr.c
4310
onoff("Scaled Flow Control", reg, PCI_DLF_LFEAT_SCLFCTL);
sys/dev/pci/pci_subr.c
4311
onoff("DLF Exchange enable", reg, PCI_DLF_CAP_XCHG);
sys/dev/pci/pci_subr.c
4315
onoff("Scaled Flow Control", reg, PCI_DLF_LFEAT_SCLFCTL);
sys/dev/pci/pci_subr.c
4316
onoff("Remote DLF supported Valid", reg, PCI_DLF_STAT_RMTVALID);
sys/dev/pci/pci_subr.c
4335
onoff("Equalization 16.0 GT/s Complete", reg, PCI_PL16G_STAT_EQ_COMPL);
sys/dev/pci/pci_subr.c
4336
onoff("Equalization 16.0 GT/s Phase 1 Successful", reg,
sys/dev/pci/pci_subr.c
4338
onoff("Equalization 16.0 GT/s Phase 2 Successful", reg,
sys/dev/pci/pci_subr.c
4340
onoff("Equalization 16.0 GT/s Phase 3 Successful", reg,
sys/dev/pci/pci_subr.c
4447
onoff("Margining uses Driver Software", reg, PCI_LMR_PCAP_MUDS);
sys/dev/pci/pci_subr.c
4449
onoff("Margining Ready", reg, PCI_LMR_PSTAT_MR);
sys/dev/pci/pci_subr.c
4450
onoff("Margining Software Ready", reg, PCI_LMR_PSTAT_MSR);
sys/dev/pci/pci_subr.c
4693
onoff("66 MHz capable", rval, __BIT(5));
sys/dev/pci/pci_subr.c
4694
onoff("User Definable Features (UDF) support", rval, __BIT(6));
sys/dev/pci/pci_subr.c
4695
onoff("Fast back-to-back capable", rval, __BIT(7));
sys/dev/pci/pci_subr.c
4696
onoff("Data parity error detected", rval, __BIT(8));
sys/dev/pci/pci_subr.c
4716
onoff("Signalled target abort", rval, __BIT(11));
sys/dev/pci/pci_subr.c
4717
onoff("Received target abort", rval, __BIT(12));
sys/dev/pci/pci_subr.c
4718
onoff("Received master abort", rval, __BIT(13));
sys/dev/pci/pci_subr.c
4719
onoff("Received system error", rval, __BIT(14));
sys/dev/pci/pci_subr.c
4720
onoff("Detected parity error", rval, __BIT(15));
sys/dev/pci/pci_subr.c
4752
onoff("Expansion ROM Enable", rval, PCI_MAPREG_ROM_ENABLE);
sys/dev/pci/pci_subr.c
4872
onoff("32bit I/O", rval, use_upper);
sys/dev/pci/pci_subr.c
4925
onoff("64bit memory address", rval, use_upper);
sys/dev/pci/pci_subr.c
4981
onoff("Parity error response", rval, PCI_BRIDGE_CONTROL_PERE);
sys/dev/pci/pci_subr.c
4982
onoff("Secondary SERR forwarding", rval, PCI_BRIDGE_CONTROL_SERR);
sys/dev/pci/pci_subr.c
4983
onoff("ISA enable", rval, PCI_BRIDGE_CONTROL_ISA);
sys/dev/pci/pci_subr.c
4984
onoff("VGA enable", rval, PCI_BRIDGE_CONTROL_VGA);
sys/dev/pci/pci_subr.c
4991
onoff("VGA 16bit enable", rval, PCI_BRIDGE_CONTROL_VGA16);
sys/dev/pci/pci_subr.c
4992
onoff("Master abort reporting", rval, PCI_BRIDGE_CONTROL_MABRT);
sys/dev/pci/pci_subr.c
4993
onoff("Secondary bus reset", rval, PCI_BRIDGE_CONTROL_SECBR);
sys/dev/pci/pci_subr.c
4994
onoff("Fast back-to-back enable", rval, PCI_BRIDGE_CONTROL_SECFASTB2B);
sys/dev/pci/pci_subr.c
4995
onoff("Primary Discard Timer", rval,
sys/dev/pci/pci_subr.c
4997
onoff("Secondary Discard Timer",
sys/dev/pci/pci_subr.c
4999
onoff("Discard Timer Status", rval,
sys/dev/pci/pci_subr.c
5001
onoff("Discard Timer SERR# Enable", rval,
sys/dev/pci/pci_subr.c
5092
onoff("Parity error response", rval, __BIT(0));
sys/dev/pci/pci_subr.c
5093
onoff("SERR# enable", rval, __BIT(1));
sys/dev/pci/pci_subr.c
5094
onoff("ISA enable", rval, __BIT(2));
sys/dev/pci/pci_subr.c
5095
onoff("VGA enable", rval, __BIT(3));
sys/dev/pci/pci_subr.c
5096
onoff("Master abort mode", rval, __BIT(5));
sys/dev/pci/pci_subr.c
5097
onoff("Secondary (CardBus) bus reset", rval, __BIT(6));
sys/dev/pci/pci_subr.c
5098
onoff("Functional interrupts routed by ExCA registers", rval,
sys/dev/pci/pci_subr.c
5100
onoff("Memory window 0 prefetchable", rval, __BIT(8));
sys/dev/pci/pci_subr.c
5101
onoff("Memory window 1 prefetchable", rval, __BIT(9));
sys/dev/pci/pci_subr.c
5102
onoff("Write posting enable", rval, __BIT(10));
sys/dev/pci/pci_subr.c
861
onoff("I/O space accesses", rval, PCI_COMMAND_IO_ENABLE);
sys/dev/pci/pci_subr.c
862
onoff("Memory space accesses", rval, PCI_COMMAND_MEM_ENABLE);
sys/dev/pci/pci_subr.c
863
onoff("Bus mastering", rval, PCI_COMMAND_MASTER_ENABLE);
sys/dev/pci/pci_subr.c
864
onoff("Special cycles", rval, PCI_COMMAND_SPECIAL_ENABLE);
sys/dev/pci/pci_subr.c
865
onoff("MWI transactions", rval, PCI_COMMAND_INVALIDATE_ENABLE);
sys/dev/pci/pci_subr.c
866
onoff("Palette snooping", rval, PCI_COMMAND_PALETTE_ENABLE);
sys/dev/pci/pci_subr.c
867
onoff("Parity error checking", rval, PCI_COMMAND_PARITY_ENABLE);
sys/dev/pci/pci_subr.c
868
onoff("Address/data stepping", rval, PCI_COMMAND_STEPPING_ENABLE);
sys/dev/pci/pci_subr.c
869
onoff("System error (SERR)", rval, PCI_COMMAND_SERR_ENABLE);
sys/dev/pci/pci_subr.c
870
onoff("Fast back-to-back transactions", rval,
sys/dev/pci/pci_subr.c
872
onoff("Interrupt disable", rval, PCI_COMMAND_INTERRUPT_DISABLE);
sys/dev/pci/pci_subr.c
875
onoff("Immediate Readiness", rval, PCI_STATUS_IMMD_READNESS);
sys/dev/pci/pci_subr.c
878
onoff("Capability List support", rval, PCI_STATUS_CAPLIST_SUPPORT);
sys/dev/pci/pci_subr.c
879
onoff("66 MHz capable", rval, PCI_STATUS_66MHZ_SUPPORT);
sys/dev/pci/pci_subr.c
880
onoff("User Definable Features (UDF) support", rval,
sys/dev/pci/pci_subr.c
882
onoff("Fast back-to-back capable", rval,
sys/dev/pci/pci_subr.c
884
onoff("Data parity error detected", rval, PCI_STATUS_PARITY_ERROR);
sys/dev/pci/pci_subr.c
903
onoff("Slave signaled Target Abort", rval,
sys/dev/pci/pci_subr.c
905
onoff("Master received Target Abort", rval,
sys/dev/pci/pci_subr.c
907
onoff("Master received Master Abort", rval, PCI_STATUS_MASTER_ABORT);
sys/dev/pci/pci_subr.c
908
onoff("Asserted System Error (SERR)", rval, PCI_STATUS_SPECIAL_ERROR);
sys/dev/pci/pci_subr.c
909
onoff("Parity error detected", rval, PCI_STATUS_PARITY_DETECT);
sys/dev/pcmcia/aic_pcmcia.c
175
aic_pcmcia_enable(device_t self, int onoff)
sys/dev/pcmcia/aic_pcmcia.c
181
if (onoff) {
sys/dev/pcmcia/esp_pcmcia.c
233
esp_pcmcia_enable(device_t self, int onoff)
sys/dev/pcmcia/esp_pcmcia.c
238
if (onoff) {
sys/dev/pcmcia/if_wi_pcmcia.c
269
wi_pcmcia_enable(device_t self, int onoff)
sys/dev/pcmcia/if_wi_pcmcia.c
276
if (onoff) {
sys/dev/pcmcia/nca_pcmcia.c
211
nca_pcmcia_enable(device_t self, int onoff)
sys/dev/pcmcia/nca_pcmcia.c
216
if (onoff) {
sys/dev/pcmcia/spc_pcmcia.c
164
spc_pcmcia_enable(device_t self, int onoff)
sys/dev/pcmcia/spc_pcmcia.c
169
if (onoff) {
sys/dev/pcmcia/wdc_pcmcia.c
353
wdc_pcmcia_enable(device_t self, int onoff)
sys/dev/pcmcia/wdc_pcmcia.c
372
if (onoff) {
sys/dev/qbus/qd.c
3098
qdcnpollc(dev_t dev, int onoff)
sys/dev/qbus/qd.c
3100
qdpolling = onoff;
sys/dev/scsipi/st_scsi.c
229
st_scsibus_cmprss(struct st_softc *st, int flags, int onoff)
sys/dev/scsipi/st_scsi.c
277
if (onoff)
sys/dev/scsipi/st_scsi.c
284
if (onoff)
sys/dev/scsipi/st_scsi.c
305
if (onoff == ison)
sys/dev/tc/mfb.c
485
int onoff;
sys/dev/tc/mfb.c
487
onoff = (sc->sc_curenb) ? 0x4444 : 0x0404;
sys/dev/tc/mfb.c
489
REGWRITE32(curs, bt_ctl, onoff);
sys/dev/tc/sfb.c
565
int onoff;
sys/dev/tc/sfb.c
567
onoff = (sc->sc_curenb) ? 0xc0 : 0x00;
sys/dev/tc/sfb.c
569
REGWRITE32(vdac, bt_reg, onoff);
sys/dev/tc/tfb.c
554
int onoff;
sys/dev/tc/tfb.c
556
onoff = (sc->sc_curenb) ? 0x4444 : 0x0404;
sys/dev/tc/tfb.c
558
REGWRITE32(curs, bt_ctl, onoff);
sys/dev/tc/zs_ioasic.c
844
zs_ioasic_cnpollc(dev_t dev, int onoff)
sys/dev/usb/emdtv.c
386
emdtv_gpio_ctl(struct emdtv_softc *sc, emdtv_gpio_reg_t gpioreg, bool onoff)
sys/dev/usb/emdtv.c
434
if (onoff)
sys/dev/usb/u3g.c
558
u3g_set(void *arg, int portno, int reg, int onoff)
sys/dev/usb/u3g.c
581
if (onoff)
sys/dev/usb/uark.c
218
uark_set(void *vsc, int portno, int reg, int onoff)
sys/dev/usb/uark.c
227
uark_break(sc, portno, onoff);
sys/dev/usb/uark.c
335
uark_break(void *vsc, int portno, int onoff)
sys/dev/usb/uark.c
344
aprint_normal_dev(sc->sc_dev, "break %s!\n", onoff ? "on" : "off");
sys/dev/usb/uark.c
347
if (onoff)
sys/dev/usb/ubsa_common.c
127
ubsa_dtr(struct ubsa_softc *sc, int portno, int onoff)
sys/dev/usb/ubsa_common.c
130
DPRINTF(("ubsa_dtr: onoff = %d\n", onoff));
sys/dev/usb/ubsa_common.c
132
if (sc->sc_dtr == onoff)
sys/dev/usb/ubsa_common.c
134
sc->sc_dtr = onoff;
sys/dev/usb/ubsa_common.c
136
ubsa_request(sc, portno, UBSA_SET_DTR, onoff ? 1 : 0);
sys/dev/usb/ubsa_common.c
140
ubsa_rts(struct ubsa_softc *sc, int portno, int onoff)
sys/dev/usb/ubsa_common.c
143
DPRINTF(("ubsa_rts: onoff = %d\n", onoff));
sys/dev/usb/ubsa_common.c
145
if (sc->sc_rts == onoff)
sys/dev/usb/ubsa_common.c
147
sc->sc_rts = onoff;
sys/dev/usb/ubsa_common.c
149
ubsa_request(sc, portno, UBSA_SET_RTS, onoff ? 1 : 0);
sys/dev/usb/ubsa_common.c
153
ubsa_quadumts_dtr(struct ubsa_softc *sc, int portno, int onoff)
sys/dev/usb/ubsa_common.c
156
DPRINTF(("ubsa_dtr: onoff = %d\n", onoff));
sys/dev/usb/ubsa_common.c
158
if (sc->sc_dtr == onoff)
sys/dev/usb/ubsa_common.c
160
sc->sc_dtr = onoff;
sys/dev/usb/ubsa_common.c
167
ubsa_quadumts_rts(struct ubsa_softc *sc, int portno, int onoff)
sys/dev/usb/ubsa_common.c
170
DPRINTF(("ubsa_rts: onoff = %d\n", onoff));
sys/dev/usb/ubsa_common.c
172
if (sc->sc_rts == onoff)
sys/dev/usb/ubsa_common.c
174
sc->sc_rts = onoff;
sys/dev/usb/ubsa_common.c
181
ubsa_break(struct ubsa_softc *sc, int portno, int onoff)
sys/dev/usb/ubsa_common.c
183
DPRINTF(("ubsa_rts: onoff = %d\n", onoff));
sys/dev/usb/ubsa_common.c
188
ubsa_request(sc, portno, UBSA_SET_BREAK, onoff ? 1 : 0);
sys/dev/usb/ubsa_common.c
192
ubsa_set(void *addr, int portno, int reg, int onoff)
sys/dev/usb/ubsa_common.c
202
ubsa_quadumts_dtr(sc, portno, onoff);
sys/dev/usb/ubsa_common.c
204
ubsa_dtr(sc, portno, onoff);
sys/dev/usb/ubsa_common.c
208
ubsa_quadumts_rts(sc, portno, onoff);
sys/dev/usb/ubsa_common.c
210
ubsa_rts(sc, portno, onoff);
sys/dev/usb/ubsa_common.c
214
ubsa_break(sc, portno, onoff);
sys/dev/usb/uchcom.c
591
set_break(struct uchcom_softc *sc, int onoff)
sys/dev/usb/uchcom.c
599
if (onoff) {
sys/dev/usb/uchcom.c
855
uchcom_set(void *arg, int portno, int reg, int onoff)
sys/dev/usb/uchcom.c
864
sc->sc_dtr = !!onoff;
sys/dev/usb/uchcom.c
868
sc->sc_rts = !!onoff;
sys/dev/usb/uchcom.c
872
set_break(sc, onoff);
sys/dev/usb/ucom.c
1455
ucom_break(struct ucom_softc *sc, int onoff)
sys/dev/usb/ucom.c
1459
DPRINTF("onoff=%jd", onoff, 0, 0, 0);
sys/dev/usb/ucom.c
1463
UCOM_SET_BREAK, onoff);
sys/dev/usb/ucom.c
1467
ucom_dtr(struct ucom_softc *sc, int onoff)
sys/dev/usb/ucom.c
1471
DPRINTF("onoff=%jd", onoff, 0, 0, 0);
sys/dev/usb/ucom.c
1475
UCOM_SET_DTR, onoff);
sys/dev/usb/ucom.c
1479
ucom_rts(struct ucom_softc *sc, int onoff)
sys/dev/usb/ucom.c
1483
DPRINTF("onoff=%jd", onoff, 0, 0, 0);
sys/dev/usb/ucom.c
1487
UCOM_SET_RTS, onoff);
sys/dev/usb/uftdi.c
581
uftdi_set(void *vsc, int portno, int reg, int onoff)
sys/dev/usb/uftdi.c
588
reg, onoff));
sys/dev/usb/uftdi.c
595
ctl = onoff ? FTDI_SIO_SET_DTR_HIGH : FTDI_SIO_SET_DTR_LOW;
sys/dev/usb/uftdi.c
598
ctl = onoff ? FTDI_SIO_SET_RTS_HIGH : FTDI_SIO_SET_RTS_LOW;
sys/dev/usb/uftdi.c
601
uftdi_break(sc, portno, onoff);
sys/dev/usb/uftdi.c
870
uftdi_break(void *vsc, int portno, int onoff)
sys/dev/usb/uftdi.c
877
onoff));
sys/dev/usb/uftdi.c
879
if (onoff) {
sys/dev/usb/uipaq.c
253
uipaq_dtr(struct uipaq_softc* sc, int onoff)
sys/dev/usb/uipaq.c
259
DPRINTF(("%s: uipaq_dtr: onoff=%x\n", device_xname(sc->sc_dev), onoff));
sys/dev/usb/uipaq.c
262
if (onoff && (sc->sc_lcr & UCDC_LINE_DTR))
sys/dev/usb/uipaq.c
264
if (!onoff && !(sc->sc_lcr & UCDC_LINE_DTR))
sys/dev/usb/uipaq.c
270
sc->sc_lcr = onoff ? sc->sc_lcr | UCDC_LINE_DTR
sys/dev/usb/uipaq.c
287
uipaq_rts(struct uipaq_softc* sc, int onoff)
sys/dev/usb/uipaq.c
293
DPRINTF(("%s: uipaq_rts: onoff=%x\n", device_xname(sc->sc_dev), onoff));
sys/dev/usb/uipaq.c
296
if (onoff && (sc->sc_lcr & UCDC_LINE_RTS)) return;
sys/dev/usb/uipaq.c
297
if (!onoff && !(sc->sc_lcr & UCDC_LINE_RTS)) return;
sys/dev/usb/uipaq.c
301
sc->sc_lcr = onoff ? sc->sc_lcr | UCDC_LINE_RTS
sys/dev/usb/uipaq.c
317
uipaq_break(struct uipaq_softc* sc, int onoff)
sys/dev/usb/uipaq.c
324
onoff));
sys/dev/usb/uipaq.c
329
USETW(req.wValue, onoff ? UCDC_BREAK_ON : UCDC_BREAK_OFF);
sys/dev/usb/uipaq.c
343
uipaq_set(void *addr, int portno, int reg, int onoff)
sys/dev/usb/uipaq.c
352
uipaq_dtr(addr, onoff);
sys/dev/usb/uipaq.c
355
uipaq_rts(addr, onoff);
sys/dev/usb/uipaq.c
358
uipaq_break(addr, onoff);
sys/dev/usb/uipaq.c
362
"unhandled set request: reg=%x onoff=%x\n", reg, onoff);
sys/dev/usb/ukyopon.c
162
ukyopon_set(void *addr, int portno, int reg, int onoff)
sys/dev/usb/ukyopon.c
166
umodem_set(&sc->sc_umodem, portno, reg, onoff);
sys/dev/usb/umcs.c
588
umcs7840_set(void *self, int portno, int reg, int onoff)
sys/dev/usb/umcs.c
597
umcs7840_dtr(sc, portno, onoff);
sys/dev/usb/umcs.c
600
umcs7840_rts(sc, portno, onoff);
sys/dev/usb/umcs.c
603
umcs7840_break(sc, portno, onoff);
sys/dev/usb/umcs.c
680
umcs7840_dtr(struct umcs7840_softc *sc, int portno, bool onoff)
sys/dev/usb/umcs.c
685
if (onoff)
sys/dev/usb/umcs.c
696
umcs7840_rts(struct umcs7840_softc *sc, int portno, bool onoff)
sys/dev/usb/umcs.c
701
if (onoff)
sys/dev/usb/umcs.c
712
umcs7840_break(struct umcs7840_softc *sc, int portno, bool onoff)
sys/dev/usb/umcs.c
717
if (onoff)
sys/dev/usb/umct.c
378
umct_set(void *addr, int portno, int reg, int onoff)
sys/dev/usb/umct.c
387
umct_dtr(sc, onoff);
sys/dev/usb/umct.c
390
umct_rts(sc, onoff);
sys/dev/usb/umct.c
393
umct_break(sc, onoff);
sys/dev/usb/umct.c
401
umct_dtr(struct umct_softc *sc, int onoff)
sys/dev/usb/umct.c
404
DPRINTF(("umct_dtr: onoff=%d\n", onoff));
sys/dev/usb/umct.c
406
if (sc->sc_dtr == onoff)
sys/dev/usb/umct.c
408
sc->sc_dtr = onoff;
sys/dev/usb/umct.c
414
umct_rts(struct umct_softc *sc, int onoff)
sys/dev/usb/umct.c
416
DPRINTF(("umct_rts: onoff=%d\n", onoff));
sys/dev/usb/umct.c
418
if (sc->sc_rts == onoff)
sys/dev/usb/umct.c
420
sc->sc_rts = onoff;
sys/dev/usb/umct.c
426
umct_break(struct umct_softc *sc, int onoff)
sys/dev/usb/umct.c
428
DPRINTF(("umct_break: onoff=%d\n", onoff));
sys/dev/usb/umct.c
430
umct_set_lcr(sc, onoff ? sc->last_lcr | LCR_SET_BREAK :
sys/dev/usb/umodem_common.c
541
umodem_dtr(struct umodem_softc *sc, int onoff)
sys/dev/usb/umodem_common.c
543
DPRINTF(("umodem_dtr: onoff=%d\n", onoff));
sys/dev/usb/umodem_common.c
545
if (sc->sc_dtr == onoff)
sys/dev/usb/umodem_common.c
547
sc->sc_dtr = onoff;
sys/dev/usb/umodem_common.c
553
umodem_rts(struct umodem_softc *sc, int onoff)
sys/dev/usb/umodem_common.c
555
DPRINTF(("umodem_rts: onoff=%d\n", onoff));
sys/dev/usb/umodem_common.c
557
if (sc->sc_rts == onoff)
sys/dev/usb/umodem_common.c
559
sc->sc_rts = onoff;
sys/dev/usb/umodem_common.c
583
umodem_break(struct umodem_softc *sc, int onoff)
sys/dev/usb/umodem_common.c
587
DPRINTF(("umodem_break: onoff=%d\n", onoff));
sys/dev/usb/umodem_common.c
594
USETW(req.wValue, onoff ? UCDC_BREAK_ON : UCDC_BREAK_OFF);
sys/dev/usb/umodem_common.c
602
umodem_set(void *addr, int portno, int reg, int onoff)
sys/dev/usb/umodem_common.c
611
umodem_dtr(sc, onoff);
sys/dev/usb/umodem_common.c
614
umodem_rts(sc, onoff);
sys/dev/usb/umodem_common.c
617
umodem_break(sc, onoff);
sys/dev/usb/uplcom.c
651
uplcom_set(void *addr, int portno, int reg, int onoff)
sys/dev/usb/uplcom.c
660
uplcom_dtr(sc, onoff);
sys/dev/usb/uplcom.c
663
uplcom_rts(sc, onoff);
sys/dev/usb/uplcom.c
666
uplcom_break(sc, onoff);
sys/dev/usb/uplcom.c
674
uplcom_dtr(struct uplcom_softc *sc, int onoff)
sys/dev/usb/uplcom.c
678
DPRINTF("onoff=%jd", onoff, 0, 0, 0);
sys/dev/usb/uplcom.c
680
if (sc->sc_dtr != -1 && !sc->sc_dtr == !onoff)
sys/dev/usb/uplcom.c
683
sc->sc_dtr = !!onoff;
sys/dev/usb/uplcom.c
689
uplcom_rts(struct uplcom_softc *sc, int onoff)
sys/dev/usb/uplcom.c
692
DPRINTF("onoff=%jd", onoff, 0, 0, 0);
sys/dev/usb/uplcom.c
694
if (sc->sc_rts != -1 && !sc->sc_rts == !onoff)
sys/dev/usb/uplcom.c
697
sc->sc_rts = !!onoff;
sys/dev/usb/uplcom.c
703
uplcom_break(struct uplcom_softc *sc, int onoff)
sys/dev/usb/uplcom.c
708
DPRINTF("onoff=%jd", onoff, 0, 0, 0);
sys/dev/usb/uplcom.c
712
USETW(req.wValue, onoff ? UCDC_BREAK_ON : UCDC_BREAK_OFF);
sys/dev/usb/uslsa.c
330
uslsa_set(void *vsc, int portno, int reg, int onoff)
sys/dev/usb/uslsa.c
337
reg, onoff));
sys/dev/usb/uslsa.c
346
(onoff ? SLSA_RV_SET_MHS_DTR : 0))) {
sys/dev/usb/uslsa.c
353
(onoff ? SLSA_RV_SET_MHS_RTS : 0))) {
sys/dev/usb/uslsa.c
359
(onoff ? SLSA_RV_SET_BREAK_ENABLE :
sys/dev/usb/uvscom.c
548
uvscom_dtr(struct uvscom_softc *sc, int onoff)
sys/dev/usb/uvscom.c
551
device_xname(sc->sc_dev), onoff));
sys/dev/usb/uvscom.c
553
if (sc->sc_dtr == onoff)
sys/dev/usb/uvscom.c
556
sc->sc_dtr = onoff;
sys/dev/usb/uvscom.c
558
if (onoff)
sys/dev/usb/uvscom.c
567
uvscom_rts(struct uvscom_softc *sc, int onoff)
sys/dev/usb/uvscom.c
570
device_xname(sc->sc_dev), onoff));
sys/dev/usb/uvscom.c
572
if (sc->sc_rts == onoff)
sys/dev/usb/uvscom.c
575
sc->sc_rts = onoff;
sys/dev/usb/uvscom.c
577
if (onoff)
sys/dev/usb/uvscom.c
586
uvscom_break(struct uvscom_softc *sc, int onoff)
sys/dev/usb/uvscom.c
589
device_xname(sc->sc_dev), onoff));
sys/dev/usb/uvscom.c
591
if (onoff)
sys/dev/usb/uvscom.c
596
uvscom_set(void *addr, int portno, int reg, int onoff)
sys/dev/usb/uvscom.c
605
uvscom_dtr(sc, onoff);
sys/dev/usb/uvscom.c
608
uvscom_rts(sc, onoff);
sys/dev/usb/uvscom.c
611
uvscom_break(sc, onoff);
sys/dev/usb/uxrcom.c
174
uxrcom_set(void *addr, int portno, int reg, int onoff)
sys/dev/usb/uxrcom.c
184
index = onoff ? XR_GPIO_SET : XR_GPIO_CLEAR;
sys/dev/usb/uxrcom.c
194
uxrcom_break(sc, portno, onoff);
sys/dev/usb/uxrcom.c
306
uxrcom_break(void *addr, int portno, int onoff)
sys/dev/usb/uxrcom.c
310
uint8_t brk = onoff ? UCDC_BREAK_ON : UCDC_BREAK_OFF;
sys/dev/usb/uxrcom.c
312
DPRINTF(("%s: port=%d onoff=%d\n", __func__, portno, onoff));
sys/kern/kern_todr.c
413
todr_wenable(todr_chip_handle_t todr, int onoff)
sys/kern/kern_todr.c
417
return todr->todr_setwen(todr, onoff);
sys/net/npf/npf_os.c
244
const bool onoff = *(int *)data ? true : false;
sys/net/npf/npf_os.c
247
if (onoff) {
sys/net80211/ieee80211_proto.c
488
ieee80211_set_shortslottime(struct ieee80211com *ic, int onoff)
sys/net80211/ieee80211_proto.c
490
if (onoff)
sys/net80211/ieee80211_proto.h
96
void ieee80211_set_shortslottime(struct ieee80211com *, int onoff);
sys/stand/efiboot/efiblock.c
717
efi_block_set_readahead(bool onoff)
sys/stand/efiboot/efiblock.c
719
efi_ra_enable = onoff;
sys/stand/efiboot/module.c
150
module_enable(int onoff)
sys/stand/efiboot/module.c
152
module_enabled = onoff;
sys/stand/efiboot/overlay.c
111
dtoverlay_enable(int onoff)
sys/stand/efiboot/overlay.c
113
dtoverlay_enabled = onoff;
usr.bin/ftp/cmds.c
1070
onoff(gatemode), *gateserver ? gateserver : "(none)",
usr.bin/ftp/cmds.c
1132
fprintf(ttyout, "Debugging %s (debug=%d).\n", onoff(ftp_debug), ftp_debug);
usr.bin/ftp/cmds.c
2240
onoff(passivemode), onoff(activefallback));
usr.bin/ftp/cmds.c
2336
onoff(rate_get), rate_get, rate_get_incr);
usr.bin/ftp/cmds.c
2346
onoff(rate_put), rate_put, rate_put_incr);
usr.bin/ftp/cmds.c
821
fprintf(ttyout, "Gate ftp: %s, server %s, port %s.\n", onoff(gatemode),
usr.bin/ftp/cmds.c
824
onoff(passivemode), onoff(activefallback));
usr.bin/ftp/cmds.c
828
onoff(verbose), onoff(bell), onoff(interactive), onoff(doglob));
usr.bin/ftp/cmds.c
830
onoff(sunique), onoff(runique));
usr.bin/ftp/cmds.c
831
fprintf(ttyout, "Preserve modification times: %s.\n", onoff(preserve));
usr.bin/ftp/cmds.c
832
fprintf(ttyout, "Case: %s; CR stripping: %s.\n", onoff(mcase),
usr.bin/ftp/cmds.c
833
onoff(crflag));
usr.bin/ftp/cmds.c
848
onoff(hash), mark, onoff(progress));
usr.bin/ftp/cmds.c
851
onoff(rate_get), rate_get, rate_get_incr);
usr.bin/ftp/cmds.c
854
onoff(rate_put), rate_put, rate_put_incr);
usr.bin/ftp/cmds.c
858
fprintf(ttyout, "Use of PORT cmds: %s.\n", onoff(sendport));
usr.bin/ftp/cmds.c
859
fprintf(ttyout, "Use of EPSV/EPRT cmds for IPv4: %s%s.\n", onoff(epsv4),
usr.bin/ftp/cmds.c
861
fprintf(ttyout, "Use of EPSV/EPRT cmds for IPv6: %s%s.\n", onoff(epsv6),
usr.bin/ftp/cmds.c
867
onoff(editing)
usr.bin/ftp/cmds.c
900
fprintf(ttyout, "%s %s.\n", mesg, onoff(*var));
usr.bin/ftp/cmds.c
980
fprintf(ttyout, "Hash mark printing %s", onoff(hash));
usr.bin/ftp/extern.h
162
const char *onoff(int);
usr.bin/systat/netcmds.c
140
changeitems(char *args, int onoff)
usr.bin/systat/netcmds.c
162
selectport(sp->s_port, onoff);
usr.bin/systat/netcmds.c
174
selecthost(res->ai_addr, onoff);
usr.bin/systat/netcmds.c
205
int onoff;
usr.bin/systat/netcmds.c
209
selectport(long port, int onoff)
usr.bin/systat/netcmds.c
223
p->onoff = onoff;
usr.bin/systat/netcmds.c
232
p->onoff = onoff;
usr.bin/systat/netcmds.c
244
return (p->onoff);
usr.bin/systat/netcmds.c
257
if (!p->onoff)
usr.bin/systat/netcmds.c
295
selecthost(struct sockaddr *sa, int onoff)
usr.bin/systat/netcmds.c
308
p->onoff = onoff;
usr.bin/systat/netcmds.c
319
p->onoff = onoff;
usr.bin/systat/netcmds.c
336
return (p->onoff);
usr.bin/systat/netcmds.c
355
return (p->onoff);
usr.bin/systat/netcmds.c
379
if (!p->onoff)
usr.bin/systat/netcmds.c
71
int onoff;
usr.bin/telnet/sys_bsd.c
246
int onoff;
usr.bin/telnet/sys_bsd.c
360
onoff = 0;
usr.bin/telnet/sys_bsd.c
375
onoff = 1;
usr.bin/telnet/sys_bsd.c
419
ioctl(tin, FIONBIO, &onoff);
usr.bin/telnet/sys_bsd.c
420
ioctl(tout, FIONBIO, &onoff);
usr.sbin/mrouted/kern.c
24
void k_hdr_include(int onoff)
usr.sbin/mrouted/kern.c
28
(char *)&onoff, sizeof(onoff)) < 0)
usr.sbin/mrouted/kern.c
29
logit(LOG_ERR, errno, "setsockopt IP_HDRINCL %u", onoff);
usr.sbin/npf/npfctl/npfctl.c
266
npfctl_bpfjit(bool onoff)
usr.sbin/npf/npfctl/npfctl.c
268
bpfjit = onoff;
usr.sbin/screenblank/screenblank.c
303
int onoff, fd;
usr.sbin/screenblank/screenblank.c
309
if ((ioctl(fd, FBIOGVIDEO, &onoff)) == 0)