#include <drm/drm_debugfs.h>
#include <drm/drm_drv.h>
#include <drm/drm_exec.h>
#include <drm/drm_gpuvm.h>
#include <drm/drm_managed.h>
#include <drm/drm_print.h>
#include <drm/gpu_scheduler.h>
#include <drm/panthor_drm.h>
#include <linux/atomic.h>
#include <linux/bitfield.h>
#include <linux/delay.h>
#include <linux/dma-mapping.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/iopoll.h>
#include <linux/io-pgtable.h>
#include <linux/iommu.h>
#include <linux/kmemleak.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/rwsem.h>
#include <linux/sched.h>
#include <linux/shmem_fs.h>
#include <linux/sizes.h>
#include "panthor_device.h"
#include "panthor_gem.h"
#include "panthor_gpu.h"
#include "panthor_heap.h"
#include "panthor_mmu.h"
#include "panthor_regs.h"
#include "panthor_sched.h"
#define MAX_AS_SLOTS 32
struct panthor_vm;
struct panthor_as_slot {
struct panthor_vm *vm;
};
struct panthor_mmu {
struct panthor_irq irq;
struct {
struct mutex slots_lock;
unsigned long alloc_mask;
unsigned long faulty_mask;
struct panthor_as_slot slots[MAX_AS_SLOTS];
struct list_head lru_list;
} as;
struct {
struct mutex lock;
struct list_head list;
bool reset_in_progress;
struct workqueue_struct *wq;
} vm;
};
struct panthor_vm_pool {
struct xarray xa;
};
struct panthor_vma {
struct drm_gpuva base;
struct list_head node;
u32 flags;
};
struct panthor_vm_op_ctx {
struct {
u32 count;
u32 ptr;
void **pages;
} rsvd_page_tables;
struct panthor_vma *preallocated_vmas[3];
u32 flags;
struct {
u64 addr;
u64 range;
} va;
struct {
struct drm_gpuvm_bo *vm_bo;
u64 bo_offset;
struct sg_table *sgt;
struct panthor_vma *new_vma;
} map;
};
struct panthor_vm {
struct drm_gpuvm base;
struct drm_gpu_scheduler sched;
struct drm_sched_entity entity;
struct panthor_device *ptdev;
u64 memattr;
struct io_pgtable_ops *pgtbl_ops;
void *root_page_table;
struct mutex op_lock;
struct panthor_vm_op_ctx *op_ctx;
struct drm_mm mm;
struct mutex mm_lock;
struct {
u64 start;
u64 end;
} kernel_auto_va;
struct {
int id;
refcount_t active_cnt;
struct list_head lru_node;
} as;
struct {
struct panthor_heap_pool *pool;
struct mutex lock;
} heaps;
struct list_head node;
bool for_mcu;
bool destroyed;
bool unusable;
bool unhandled_fault;
struct {
u64 start;
u64 size;
} locked_region;
};
struct panthor_vm_bind_job {
struct drm_sched_job base;
struct kref refcount;
struct work_struct cleanup_op_ctx_work;
struct panthor_vm *vm;
struct panthor_vm_op_ctx ctx;
};
static struct kmem_cache *pt_cache;
static void *alloc_pt(void *cookie, size_t size, gfp_t gfp)
{
struct panthor_vm *vm = cookie;
void *page;
if (unlikely(!vm->root_page_table)) {
struct page *p;
drm_WARN_ON(&vm->ptdev->base, vm->op_ctx);
p = alloc_pages_node(dev_to_node(vm->ptdev->base.dev),
gfp | __GFP_ZERO, get_order(size));
page = p ? page_address(p) : NULL;
vm->root_page_table = page;
return page;
}
if (drm_WARN_ON(&vm->ptdev->base, size != SZ_4K))
return NULL;
if (drm_WARN_ON(&vm->ptdev->base, !vm->op_ctx) ||
drm_WARN_ON(&vm->ptdev->base,
vm->op_ctx->rsvd_page_tables.ptr >= vm->op_ctx->rsvd_page_tables.count))
return NULL;
page = vm->op_ctx->rsvd_page_tables.pages[vm->op_ctx->rsvd_page_tables.ptr++];
memset(page, 0, SZ_4K);
kmemleak_ignore(page);
return page;
}
static void free_pt(void *cookie, void *data, size_t size)
{
struct panthor_vm *vm = cookie;
if (unlikely(vm->root_page_table == data)) {
free_pages((unsigned long)data, get_order(size));
vm->root_page_table = NULL;
return;
}
if (drm_WARN_ON(&vm->ptdev->base, size != SZ_4K))
return;
kmem_cache_free(pt_cache, data);
}
static int wait_ready(struct panthor_device *ptdev, u32 as_nr)
{
int ret;
u32 val;
ret = gpu_read_relaxed_poll_timeout_atomic(ptdev, AS_STATUS(as_nr), val,
!(val & AS_STATUS_AS_ACTIVE),
10, 100000);
if (ret) {
panthor_device_schedule_reset(ptdev);
drm_err(&ptdev->base, "AS_ACTIVE bit stuck\n");
}
return ret;
}
static int as_send_cmd_and_wait(struct panthor_device *ptdev, u32 as_nr, u32 cmd)
{
int status;
status = wait_ready(ptdev, as_nr);
if (!status) {
gpu_write(ptdev, AS_COMMAND(as_nr), cmd);
status = wait_ready(ptdev, as_nr);
}
return status;
}
static u64 pack_region_range(struct panthor_device *ptdev, u64 *region_start, u64 *size)
{
u8 region_width;
u64 region_end = *region_start + *size;
if (drm_WARN_ON_ONCE(&ptdev->base, !*size))
return 0;
region_width = max(fls64(*region_start ^ (region_end - 1)),
const_ilog2(AS_LOCK_REGION_MIN_SIZE)) - 1;
*region_start &= GENMASK_ULL(63, region_width);
*size = 1ull << (region_width + 1);
return region_width | *region_start;
}
static int panthor_mmu_as_enable(struct panthor_device *ptdev, u32 as_nr,
u64 transtab, u64 transcfg, u64 memattr)
{
gpu_write64(ptdev, AS_TRANSTAB(as_nr), transtab);
gpu_write64(ptdev, AS_MEMATTR(as_nr), memattr);
gpu_write64(ptdev, AS_TRANSCFG(as_nr), transcfg);
return as_send_cmd_and_wait(ptdev, as_nr, AS_COMMAND_UPDATE);
}
static int panthor_mmu_as_disable(struct panthor_device *ptdev, u32 as_nr,
bool recycle_slot)
{
struct panthor_vm *vm = ptdev->mmu->as.slots[as_nr].vm;
int ret;
lockdep_assert_held(&ptdev->mmu->as.slots_lock);
ret = panthor_gpu_flush_caches(ptdev, CACHE_CLEAN | CACHE_INV,
CACHE_CLEAN | CACHE_INV, CACHE_INV);
if (ret)
return ret;
if (vm && vm->locked_region.size) {
ret = as_send_cmd_and_wait(ptdev, vm->as.id, AS_COMMAND_UNLOCK);
if (ret)
return ret;
}
if (recycle_slot)
return 0;
gpu_write64(ptdev, AS_TRANSTAB(as_nr), 0);
gpu_write64(ptdev, AS_MEMATTR(as_nr), 0);
gpu_write64(ptdev, AS_TRANSCFG(as_nr), AS_TRANSCFG_ADRMODE_UNMAPPED);
return as_send_cmd_and_wait(ptdev, as_nr, AS_COMMAND_UPDATE);
}
static u32 panthor_mmu_fault_mask(struct panthor_device *ptdev, u32 value)
{
return value & GENMASK(15, 0);
}
static u32 panthor_mmu_as_fault_mask(struct panthor_device *ptdev, u32 as)
{
return BIT(as);
}
bool panthor_vm_has_unhandled_faults(struct panthor_vm *vm)
{
return vm->unhandled_fault;
}
bool panthor_vm_is_unusable(struct panthor_vm *vm)
{
return vm->unusable;
}
static void panthor_vm_release_as_locked(struct panthor_vm *vm)
{
struct panthor_device *ptdev = vm->ptdev;
lockdep_assert_held(&ptdev->mmu->as.slots_lock);
if (drm_WARN_ON(&ptdev->base, vm->as.id < 0))
return;
ptdev->mmu->as.slots[vm->as.id].vm = NULL;
clear_bit(vm->as.id, &ptdev->mmu->as.alloc_mask);
refcount_set(&vm->as.active_cnt, 0);
list_del_init(&vm->as.lru_node);
vm->as.id = -1;
}
int panthor_vm_active(struct panthor_vm *vm)
{
struct panthor_device *ptdev = vm->ptdev;
u32 va_bits = GPU_MMU_FEATURES_VA_BITS(ptdev->gpu_info.mmu_features);
struct io_pgtable_cfg *cfg = &io_pgtable_ops_to_pgtable(vm->pgtbl_ops)->cfg;
int ret = 0, as, cookie;
u64 transtab, transcfg;
if (!drm_dev_enter(&ptdev->base, &cookie))
return -ENODEV;
if (refcount_inc_not_zero(&vm->as.active_cnt))
goto out_dev_exit;
mutex_lock(&vm->op_lock);
mutex_lock(&ptdev->mmu->as.slots_lock);
if (refcount_inc_not_zero(&vm->as.active_cnt))
goto out_unlock;
as = vm->as.id;
if (as >= 0) {
if (ptdev->mmu->as.faulty_mask & panthor_mmu_as_fault_mask(ptdev, as))
goto out_enable_as;
goto out_make_active;
}
if (vm->for_mcu) {
drm_WARN_ON(&ptdev->base, ptdev->mmu->as.alloc_mask & BIT(0));
as = 0;
} else {
as = ffz(ptdev->mmu->as.alloc_mask | BIT(0));
}
if (!(BIT(as) & ptdev->gpu_info.as_present)) {
struct panthor_vm *lru_vm;
lru_vm = list_first_entry_or_null(&ptdev->mmu->as.lru_list,
struct panthor_vm,
as.lru_node);
if (drm_WARN_ON(&ptdev->base, !lru_vm)) {
ret = -EBUSY;
goto out_unlock;
}
drm_WARN_ON(&ptdev->base, refcount_read(&lru_vm->as.active_cnt));
as = lru_vm->as.id;
ret = panthor_mmu_as_disable(ptdev, as, true);
if (ret)
goto out_unlock;
panthor_vm_release_as_locked(lru_vm);
}
vm->as.id = as;
set_bit(as, &ptdev->mmu->as.alloc_mask);
ptdev->mmu->as.slots[as].vm = vm;
out_enable_as:
transtab = cfg->arm_lpae_s1_cfg.ttbr;
transcfg = AS_TRANSCFG_PTW_MEMATTR_WB |
AS_TRANSCFG_PTW_RA |
AS_TRANSCFG_ADRMODE_AARCH64_4K |
AS_TRANSCFG_INA_BITS(55 - va_bits);
if (ptdev->coherent)
transcfg |= AS_TRANSCFG_PTW_SH_OS;
vm->unhandled_fault = false;
if (ptdev->mmu->as.faulty_mask & panthor_mmu_as_fault_mask(ptdev, as)) {
gpu_write(ptdev, MMU_INT_CLEAR, panthor_mmu_as_fault_mask(ptdev, as));
ptdev->mmu->as.faulty_mask &= ~panthor_mmu_as_fault_mask(ptdev, as);
ptdev->mmu->irq.mask |= panthor_mmu_as_fault_mask(ptdev, as);
gpu_write(ptdev, MMU_INT_MASK, ~ptdev->mmu->as.faulty_mask);
}
drm_WARN_ON(&vm->ptdev->base, vm->locked_region.size > 0);
ret = panthor_mmu_as_enable(vm->ptdev, vm->as.id, transtab, transcfg, vm->memattr);
out_make_active:
if (!ret) {
refcount_set(&vm->as.active_cnt, 1);
list_del_init(&vm->as.lru_node);
}
out_unlock:
mutex_unlock(&ptdev->mmu->as.slots_lock);
mutex_unlock(&vm->op_lock);
out_dev_exit:
drm_dev_exit(cookie);
return ret;
}
void panthor_vm_idle(struct panthor_vm *vm)
{
struct panthor_device *ptdev = vm->ptdev;
if (!refcount_dec_and_mutex_lock(&vm->as.active_cnt, &ptdev->mmu->as.slots_lock))
return;
if (!drm_WARN_ON(&ptdev->base, vm->as.id == -1 || !list_empty(&vm->as.lru_node)))
list_add_tail(&vm->as.lru_node, &ptdev->mmu->as.lru_list);
refcount_set(&vm->as.active_cnt, 0);
mutex_unlock(&ptdev->mmu->as.slots_lock);
}
u32 panthor_vm_page_size(struct panthor_vm *vm)
{
const struct io_pgtable *pgt = io_pgtable_ops_to_pgtable(vm->pgtbl_ops);
u32 pg_shift = ffs(pgt->cfg.pgsize_bitmap) - 1;
return 1u << pg_shift;
}
static void panthor_vm_stop(struct panthor_vm *vm)
{
drm_sched_stop(&vm->sched, NULL);
}
static void panthor_vm_start(struct panthor_vm *vm)
{
drm_sched_start(&vm->sched, 0);
}
int panthor_vm_as(struct panthor_vm *vm)
{
return vm->as.id;
}
static size_t get_pgsize(u64 addr, size_t size, size_t *count)
{
size_t blk_offset = -addr % SZ_2M;
if (blk_offset || size < SZ_2M) {
*count = min_not_zero(blk_offset, size) / SZ_4K;
return SZ_4K;
}
blk_offset = -addr % SZ_1G ?: SZ_1G;
*count = min(blk_offset, size) / SZ_2M;
return SZ_2M;
}
static void panthor_vm_declare_unusable(struct panthor_vm *vm)
{
struct panthor_device *ptdev = vm->ptdev;
int cookie;
if (vm->unusable)
return;
vm->unusable = true;
mutex_lock(&ptdev->mmu->as.slots_lock);
if (vm->as.id >= 0 && drm_dev_enter(&ptdev->base, &cookie)) {
panthor_mmu_as_disable(ptdev, vm->as.id, false);
drm_dev_exit(cookie);
}
mutex_unlock(&ptdev->mmu->as.slots_lock);
}
static void panthor_vm_unmap_pages(struct panthor_vm *vm, u64 iova, u64 size)
{
struct panthor_device *ptdev = vm->ptdev;
struct io_pgtable_ops *ops = vm->pgtbl_ops;
u64 start_iova = iova;
u64 offset = 0;
if (!size)
return;
drm_WARN_ON(&ptdev->base,
(iova < vm->locked_region.start) ||
(iova + size > vm->locked_region.start + vm->locked_region.size));
while (offset < size) {
size_t unmapped_sz = 0, pgcount;
size_t pgsize = get_pgsize(iova + offset, size - offset, &pgcount);
unmapped_sz = ops->unmap_pages(ops, iova + offset, pgsize, pgcount, NULL);
if (drm_WARN_ON_ONCE(&ptdev->base, unmapped_sz != pgsize * pgcount)) {
while (!ops->iova_to_phys(ops, iova + unmapped_sz) &&
unmapped_sz < pgsize * pgcount)
unmapped_sz += SZ_4K;
panthor_vm_declare_unusable(vm);
if (drm_WARN_ON_ONCE(&ptdev->base, !unmapped_sz))
return;
}
drm_dbg(&ptdev->base,
"unmap: as=%d, iova=0x%llx, sz=%llu, va=0x%llx, pgcnt=%zu, pgsz=%zu",
vm->as.id, start_iova, size, iova + offset,
unmapped_sz / pgsize, pgsize);
offset += unmapped_sz;
}
}
static int
panthor_vm_map_pages(struct panthor_vm *vm, u64 iova, int prot,
struct sg_table *sgt, u64 offset, u64 size)
{
struct panthor_device *ptdev = vm->ptdev;
unsigned int count;
struct scatterlist *sgl;
struct io_pgtable_ops *ops = vm->pgtbl_ops;
u64 start_iova = iova;
u64 start_size = size;
int ret;
if (!size)
return 0;
drm_WARN_ON(&ptdev->base,
(iova < vm->locked_region.start) ||
(iova + size > vm->locked_region.start + vm->locked_region.size));
for_each_sgtable_dma_sg(sgt, sgl, count) {
dma_addr_t paddr = sg_dma_address(sgl);
size_t len = sg_dma_len(sgl);
if (len <= offset) {
offset -= len;
continue;
}
paddr += offset;
len -= offset;
len = min_t(size_t, len, size);
size -= len;
while (len) {
size_t pgcount, mapped = 0;
size_t pgsize = get_pgsize(iova | paddr, len, &pgcount);
ret = ops->map_pages(ops, iova, paddr, pgsize, pgcount, prot,
GFP_KERNEL, &mapped);
drm_dbg(&ptdev->base,
"map: as=%d, iova=0x%llx, sz=%llu, va=0x%llx, pa=%pad, pgcnt=%zu, pgsz=%zu",
vm->as.id, start_iova, start_size, iova, &paddr,
mapped / pgsize, pgsize);
iova += mapped;
paddr += mapped;
len -= mapped;
if (!ret && !mapped)
ret = -ENOMEM;
if (drm_WARN_ON_ONCE(&ptdev->base, ret)) {
panthor_vm_unmap_pages(vm, start_iova, iova - start_iova);
panthor_vm_declare_unusable(vm);
return ret;
}
}
if (!size)
break;
offset = 0;
}
return 0;
}
static int flags_to_prot(u32 flags)
{
int prot = 0;
if (flags & DRM_PANTHOR_VM_BIND_OP_MAP_NOEXEC)
prot |= IOMMU_NOEXEC;
if (!(flags & DRM_PANTHOR_VM_BIND_OP_MAP_UNCACHED))
prot |= IOMMU_CACHE;
if (flags & DRM_PANTHOR_VM_BIND_OP_MAP_READONLY)
prot |= IOMMU_READ;
else
prot |= IOMMU_READ | IOMMU_WRITE;
return prot;
}
int
panthor_vm_alloc_va(struct panthor_vm *vm, u64 va, u64 size,
struct drm_mm_node *va_node)
{
ssize_t vm_pgsz = panthor_vm_page_size(vm);
int ret;
if (!size || !IS_ALIGNED(size, vm_pgsz))
return -EINVAL;
if (va != PANTHOR_VM_KERNEL_AUTO_VA && !IS_ALIGNED(va, vm_pgsz))
return -EINVAL;
mutex_lock(&vm->mm_lock);
if (va != PANTHOR_VM_KERNEL_AUTO_VA) {
va_node->start = va;
va_node->size = size;
ret = drm_mm_reserve_node(&vm->mm, va_node);
} else {
ret = drm_mm_insert_node_in_range(&vm->mm, va_node, size,
size >= SZ_2M ? SZ_2M : SZ_4K,
0, vm->kernel_auto_va.start,
vm->kernel_auto_va.end,
DRM_MM_INSERT_BEST);
}
mutex_unlock(&vm->mm_lock);
return ret;
}
void panthor_vm_free_va(struct panthor_vm *vm, struct drm_mm_node *va_node)
{
mutex_lock(&vm->mm_lock);
drm_mm_remove_node(va_node);
mutex_unlock(&vm->mm_lock);
}
static void panthor_vm_bo_free(struct drm_gpuvm_bo *vm_bo)
{
struct panthor_gem_object *bo = to_panthor_bo(vm_bo->obj);
if (!drm_gem_is_imported(&bo->base.base))
drm_gem_shmem_unpin(&bo->base);
kfree(vm_bo);
}
static void panthor_vm_cleanup_op_ctx(struct panthor_vm_op_ctx *op_ctx,
struct panthor_vm *vm)
{
u32 remaining_pt_count = op_ctx->rsvd_page_tables.count -
op_ctx->rsvd_page_tables.ptr;
if (remaining_pt_count) {
kmem_cache_free_bulk(pt_cache, remaining_pt_count,
op_ctx->rsvd_page_tables.pages +
op_ctx->rsvd_page_tables.ptr);
}
kfree(op_ctx->rsvd_page_tables.pages);
if (op_ctx->map.vm_bo)
drm_gpuvm_bo_put_deferred(op_ctx->map.vm_bo);
for (u32 i = 0; i < ARRAY_SIZE(op_ctx->preallocated_vmas); i++)
kfree(op_ctx->preallocated_vmas[i]);
drm_gpuvm_bo_deferred_cleanup(&vm->base);
}
static void
panthor_vm_op_ctx_return_vma(struct panthor_vm_op_ctx *op_ctx,
struct panthor_vma *vma)
{
for (u32 i = 0; i < ARRAY_SIZE(op_ctx->preallocated_vmas); i++) {
if (!op_ctx->preallocated_vmas[i]) {
op_ctx->preallocated_vmas[i] = vma;
return;
}
}
WARN_ON_ONCE(1);
}
static struct panthor_vma *
panthor_vm_op_ctx_get_vma(struct panthor_vm_op_ctx *op_ctx)
{
for (u32 i = 0; i < ARRAY_SIZE(op_ctx->preallocated_vmas); i++) {
struct panthor_vma *vma = op_ctx->preallocated_vmas[i];
if (vma) {
op_ctx->preallocated_vmas[i] = NULL;
return vma;
}
}
return NULL;
}
static int
panthor_vm_op_ctx_prealloc_vmas(struct panthor_vm_op_ctx *op_ctx)
{
u32 vma_count;
switch (op_ctx->flags & DRM_PANTHOR_VM_BIND_OP_TYPE_MASK) {
case DRM_PANTHOR_VM_BIND_OP_TYPE_MAP:
vma_count = 3;
break;
case DRM_PANTHOR_VM_BIND_OP_TYPE_UNMAP:
vma_count = 2;
break;
default:
return 0;
}
for (u32 i = 0; i < vma_count; i++) {
struct panthor_vma *vma = kzalloc_obj(*vma);
if (!vma)
return -ENOMEM;
op_ctx->preallocated_vmas[i] = vma;
}
return 0;
}
#define PANTHOR_VM_BIND_OP_MAP_FLAGS \
(DRM_PANTHOR_VM_BIND_OP_MAP_READONLY | \
DRM_PANTHOR_VM_BIND_OP_MAP_NOEXEC | \
DRM_PANTHOR_VM_BIND_OP_MAP_UNCACHED | \
DRM_PANTHOR_VM_BIND_OP_TYPE_MASK)
static int panthor_vm_prepare_map_op_ctx(struct panthor_vm_op_ctx *op_ctx,
struct panthor_vm *vm,
struct panthor_gem_object *bo,
u64 offset,
u64 size, u64 va,
u32 flags)
{
struct drm_gpuvm_bo *preallocated_vm_bo;
struct sg_table *sgt = NULL;
u64 pt_count;
int ret;
if (!bo)
return -EINVAL;
if ((flags & ~PANTHOR_VM_BIND_OP_MAP_FLAGS) ||
(flags & DRM_PANTHOR_VM_BIND_OP_TYPE_MASK) != DRM_PANTHOR_VM_BIND_OP_TYPE_MAP)
return -EINVAL;
if (size > bo->base.base.size || offset > bo->base.base.size - size)
return -EINVAL;
if (bo->exclusive_vm_root_gem &&
bo->exclusive_vm_root_gem != panthor_vm_root_gem(vm))
return -EINVAL;
memset(op_ctx, 0, sizeof(*op_ctx));
op_ctx->flags = flags;
op_ctx->va.range = size;
op_ctx->va.addr = va;
ret = panthor_vm_op_ctx_prealloc_vmas(op_ctx);
if (ret)
goto err_cleanup;
if (!drm_gem_is_imported(&bo->base.base)) {
ret = drm_gem_shmem_pin(&bo->base);
if (ret)
goto err_cleanup;
}
sgt = drm_gem_shmem_get_pages_sgt(&bo->base);
if (IS_ERR(sgt)) {
if (!drm_gem_is_imported(&bo->base.base))
drm_gem_shmem_unpin(&bo->base);
ret = PTR_ERR(sgt);
goto err_cleanup;
}
op_ctx->map.sgt = sgt;
preallocated_vm_bo = drm_gpuvm_bo_create(&vm->base, &bo->base.base);
if (!preallocated_vm_bo) {
if (!drm_gem_is_imported(&bo->base.base))
drm_gem_shmem_unpin(&bo->base);
ret = -ENOMEM;
goto err_cleanup;
}
op_ctx->map.vm_bo = drm_gpuvm_bo_obtain_prealloc(preallocated_vm_bo);
op_ctx->map.bo_offset = offset;
pt_count = ((ALIGN(va + size, 1ull << 39) - ALIGN_DOWN(va, 1ull << 39)) >> 39) +
((ALIGN(va + size, 1ull << 30) - ALIGN_DOWN(va, 1ull << 30)) >> 30) +
((ALIGN(va + size, 1ull << 21) - ALIGN_DOWN(va, 1ull << 21)) >> 21);
op_ctx->rsvd_page_tables.pages = kzalloc_objs(*op_ctx->rsvd_page_tables.pages,
pt_count);
if (!op_ctx->rsvd_page_tables.pages) {
ret = -ENOMEM;
goto err_cleanup;
}
ret = kmem_cache_alloc_bulk(pt_cache, GFP_KERNEL, pt_count,
op_ctx->rsvd_page_tables.pages);
op_ctx->rsvd_page_tables.count = ret;
if (ret != pt_count) {
ret = -ENOMEM;
goto err_cleanup;
}
dma_resv_lock(panthor_vm_resv(vm), NULL);
drm_gpuvm_bo_extobj_add(op_ctx->map.vm_bo);
dma_resv_unlock(panthor_vm_resv(vm));
return 0;
err_cleanup:
panthor_vm_cleanup_op_ctx(op_ctx, vm);
return ret;
}
static int panthor_vm_prepare_unmap_op_ctx(struct panthor_vm_op_ctx *op_ctx,
struct panthor_vm *vm,
u64 va, u64 size)
{
u32 pt_count = 0;
int ret;
memset(op_ctx, 0, sizeof(*op_ctx));
op_ctx->va.range = size;
op_ctx->va.addr = va;
op_ctx->flags = DRM_PANTHOR_VM_BIND_OP_TYPE_UNMAP;
if (va != ALIGN(va, SZ_2M))
pt_count++;
if (va + size != ALIGN(va + size, SZ_2M) &&
ALIGN(va + size, SZ_2M) != ALIGN(va, SZ_2M))
pt_count++;
ret = panthor_vm_op_ctx_prealloc_vmas(op_ctx);
if (ret)
goto err_cleanup;
if (pt_count) {
op_ctx->rsvd_page_tables.pages = kzalloc_objs(*op_ctx->rsvd_page_tables.pages,
pt_count);
if (!op_ctx->rsvd_page_tables.pages) {
ret = -ENOMEM;
goto err_cleanup;
}
ret = kmem_cache_alloc_bulk(pt_cache, GFP_KERNEL, pt_count,
op_ctx->rsvd_page_tables.pages);
if (ret != pt_count) {
ret = -ENOMEM;
goto err_cleanup;
}
op_ctx->rsvd_page_tables.count = pt_count;
}
return 0;
err_cleanup:
panthor_vm_cleanup_op_ctx(op_ctx, vm);
return ret;
}
static void panthor_vm_prepare_sync_only_op_ctx(struct panthor_vm_op_ctx *op_ctx,
struct panthor_vm *vm)
{
memset(op_ctx, 0, sizeof(*op_ctx));
op_ctx->flags = DRM_PANTHOR_VM_BIND_OP_TYPE_SYNC_ONLY;
}
struct panthor_gem_object *
panthor_vm_get_bo_for_va(struct panthor_vm *vm, u64 va, u64 *bo_offset)
{
struct panthor_gem_object *bo = ERR_PTR(-ENOENT);
struct drm_gpuva *gpuva;
struct panthor_vma *vma;
mutex_lock(&vm->op_lock);
gpuva = drm_gpuva_find_first(&vm->base, va, 1);
vma = gpuva ? container_of(gpuva, struct panthor_vma, base) : NULL;
if (vma && vma->base.gem.obj) {
drm_gem_object_get(vma->base.gem.obj);
bo = to_panthor_bo(vma->base.gem.obj);
*bo_offset = vma->base.gem.offset + (va - vma->base.va.addr);
}
mutex_unlock(&vm->op_lock);
return bo;
}
#define PANTHOR_VM_MIN_KERNEL_VA_SIZE SZ_256M
static u64
panthor_vm_create_get_user_va_range(const struct drm_panthor_vm_create *args,
u64 full_va_range)
{
u64 user_va_range;
if (full_va_range < PANTHOR_VM_MIN_KERNEL_VA_SIZE)
return 0;
if (args->user_va_range) {
user_va_range = args->user_va_range;
} else if (TASK_SIZE_OF(current) < full_va_range) {
user_va_range = TASK_SIZE_OF(current);
} else {
user_va_range = full_va_range > SZ_4G ?
full_va_range / 2 :
full_va_range - PANTHOR_VM_MIN_KERNEL_VA_SIZE;
}
if (full_va_range - PANTHOR_VM_MIN_KERNEL_VA_SIZE < user_va_range)
user_va_range = full_va_range - PANTHOR_VM_MIN_KERNEL_VA_SIZE;
return user_va_range;
}
#define PANTHOR_VM_CREATE_FLAGS 0
static int
panthor_vm_create_check_args(const struct panthor_device *ptdev,
const struct drm_panthor_vm_create *args,
u64 *kernel_va_start, u64 *kernel_va_range)
{
u32 va_bits = GPU_MMU_FEATURES_VA_BITS(ptdev->gpu_info.mmu_features);
u64 full_va_range = 1ull << va_bits;
u64 user_va_range;
if (args->flags & ~PANTHOR_VM_CREATE_FLAGS)
return -EINVAL;
user_va_range = panthor_vm_create_get_user_va_range(args, full_va_range);
if (!user_va_range || (args->user_va_range && args->user_va_range > user_va_range))
return -EINVAL;
*kernel_va_range = rounddown_pow_of_two(full_va_range - user_va_range);
*kernel_va_start = full_va_range - *kernel_va_range;
return 0;
}
#define PANTHOR_MAX_VMS_PER_FILE 32
int panthor_vm_pool_create_vm(struct panthor_device *ptdev,
struct panthor_vm_pool *pool,
struct drm_panthor_vm_create *args)
{
u64 kernel_va_start, kernel_va_range;
struct panthor_vm *vm;
int ret;
u32 id;
ret = panthor_vm_create_check_args(ptdev, args, &kernel_va_start, &kernel_va_range);
if (ret)
return ret;
vm = panthor_vm_create(ptdev, false, kernel_va_start, kernel_va_range,
kernel_va_start, kernel_va_range);
if (IS_ERR(vm))
return PTR_ERR(vm);
ret = xa_alloc(&pool->xa, &id, vm,
XA_LIMIT(1, PANTHOR_MAX_VMS_PER_FILE), GFP_KERNEL);
if (ret) {
panthor_vm_put(vm);
return ret;
}
args->user_va_range = kernel_va_start;
return id;
}
static void panthor_vm_destroy(struct panthor_vm *vm)
{
if (!vm)
return;
vm->destroyed = true;
if (refcount_read(&vm->as.active_cnt) > 0)
panthor_sched_prepare_for_vm_destruction(vm->ptdev);
mutex_lock(&vm->heaps.lock);
panthor_heap_pool_destroy(vm->heaps.pool);
vm->heaps.pool = NULL;
mutex_unlock(&vm->heaps.lock);
drm_WARN_ON(&vm->ptdev->base,
panthor_vm_unmap_range(vm, vm->base.mm_start, vm->base.mm_range));
panthor_vm_put(vm);
}
int panthor_vm_pool_destroy_vm(struct panthor_vm_pool *pool, u32 handle)
{
struct panthor_vm *vm;
vm = xa_erase(&pool->xa, handle);
panthor_vm_destroy(vm);
return vm ? 0 : -EINVAL;
}
struct panthor_vm *
panthor_vm_pool_get_vm(struct panthor_vm_pool *pool, u32 handle)
{
struct panthor_vm *vm;
xa_lock(&pool->xa);
vm = panthor_vm_get(xa_load(&pool->xa, handle));
xa_unlock(&pool->xa);
return vm;
}
void panthor_vm_pool_destroy(struct panthor_file *pfile)
{
struct panthor_vm *vm;
unsigned long i;
if (!pfile->vms)
return;
xa_for_each(&pfile->vms->xa, i, vm)
panthor_vm_destroy(vm);
xa_destroy(&pfile->vms->xa);
kfree(pfile->vms);
}
int panthor_vm_pool_create(struct panthor_file *pfile)
{
pfile->vms = kzalloc_obj(*pfile->vms);
if (!pfile->vms)
return -ENOMEM;
xa_init_flags(&pfile->vms->xa, XA_FLAGS_ALLOC1);
return 0;
}
static void mmu_tlb_flush_all(void *cookie)
{
}
static void mmu_tlb_flush_walk(unsigned long iova, size_t size, size_t granule, void *cookie)
{
}
static const struct iommu_flush_ops mmu_tlb_ops = {
.tlb_flush_all = mmu_tlb_flush_all,
.tlb_flush_walk = mmu_tlb_flush_walk,
};
static const char *access_type_name(struct panthor_device *ptdev,
u32 fault_status)
{
switch (fault_status & AS_FAULTSTATUS_ACCESS_TYPE_MASK) {
case AS_FAULTSTATUS_ACCESS_TYPE_ATOMIC:
return "ATOMIC";
case AS_FAULTSTATUS_ACCESS_TYPE_READ:
return "READ";
case AS_FAULTSTATUS_ACCESS_TYPE_WRITE:
return "WRITE";
case AS_FAULTSTATUS_ACCESS_TYPE_EX:
return "EXECUTE";
default:
drm_WARN_ON(&ptdev->base, 1);
return NULL;
}
}
static int panthor_vm_lock_region(struct panthor_vm *vm, u64 start, u64 size)
{
struct panthor_device *ptdev = vm->ptdev;
int ret = 0;
if (start >= vm->locked_region.start &&
start + size <= vm->locked_region.start + vm->locked_region.size)
return 0;
mutex_lock(&ptdev->mmu->as.slots_lock);
if (vm->as.id >= 0 && size) {
gpu_write64(ptdev, AS_LOCKADDR(vm->as.id),
pack_region_range(ptdev, &start, &size));
ret = as_send_cmd_and_wait(ptdev, vm->as.id, AS_COMMAND_LOCK);
}
if (!ret) {
vm->locked_region.start = start;
vm->locked_region.size = size;
}
mutex_unlock(&ptdev->mmu->as.slots_lock);
return ret;
}
static void panthor_vm_unlock_region(struct panthor_vm *vm)
{
struct panthor_device *ptdev = vm->ptdev;
mutex_lock(&ptdev->mmu->as.slots_lock);
if (vm->as.id >= 0) {
int ret;
ret = panthor_gpu_flush_caches(ptdev, CACHE_CLEAN | CACHE_INV,
CACHE_CLEAN | CACHE_INV,
CACHE_INV);
if (!ret)
ret = as_send_cmd_and_wait(ptdev, vm->as.id, AS_COMMAND_UNLOCK);
if (ret)
panthor_device_schedule_reset(ptdev);
}
vm->locked_region.start = 0;
vm->locked_region.size = 0;
mutex_unlock(&ptdev->mmu->as.slots_lock);
}
static void panthor_mmu_irq_handler(struct panthor_device *ptdev, u32 status)
{
bool has_unhandled_faults = false;
status = panthor_mmu_fault_mask(ptdev, status);
while (status) {
u32 as = ffs(status | (status >> 16)) - 1;
u32 mask = panthor_mmu_as_fault_mask(ptdev, as);
u32 new_int_mask;
u64 addr;
u32 fault_status;
u32 exception_type;
u32 access_type;
u32 source_id;
fault_status = gpu_read(ptdev, AS_FAULTSTATUS(as));
addr = gpu_read64(ptdev, AS_FAULTADDRESS(as));
exception_type = fault_status & 0xFF;
access_type = (fault_status >> 8) & 0x3;
source_id = (fault_status >> 16);
mutex_lock(&ptdev->mmu->as.slots_lock);
ptdev->mmu->as.faulty_mask |= mask;
new_int_mask =
panthor_mmu_fault_mask(ptdev, ~ptdev->mmu->as.faulty_mask);
drm_err(&ptdev->base,
"Unhandled Page fault in AS%d at VA 0x%016llX\n"
"raw fault status: 0x%X\n"
"decoded fault status: %s\n"
"exception type 0x%X: %s\n"
"access type 0x%X: %s\n"
"source id 0x%X\n",
as, addr,
fault_status,
(fault_status & (1 << 10) ? "DECODER FAULT" : "SLAVE FAULT"),
exception_type, panthor_exception_name(ptdev, exception_type),
access_type, access_type_name(ptdev, fault_status),
source_id);
gpu_write(ptdev, MMU_INT_CLEAR, mask);
ptdev->mmu->irq.mask = new_int_mask;
if (ptdev->mmu->as.slots[as].vm)
ptdev->mmu->as.slots[as].vm->unhandled_fault = true;
panthor_mmu_as_disable(ptdev, as, false);
mutex_unlock(&ptdev->mmu->as.slots_lock);
status &= ~mask;
has_unhandled_faults = true;
}
if (has_unhandled_faults)
panthor_sched_report_mmu_fault(ptdev);
}
PANTHOR_IRQ_HANDLER(mmu, MMU, panthor_mmu_irq_handler);
void panthor_mmu_suspend(struct panthor_device *ptdev)
{
mutex_lock(&ptdev->mmu->as.slots_lock);
for (u32 i = 0; i < ARRAY_SIZE(ptdev->mmu->as.slots); i++) {
struct panthor_vm *vm = ptdev->mmu->as.slots[i].vm;
if (vm) {
drm_WARN_ON(&ptdev->base,
panthor_mmu_as_disable(ptdev, i, false));
panthor_vm_release_as_locked(vm);
}
}
mutex_unlock(&ptdev->mmu->as.slots_lock);
panthor_mmu_irq_suspend(&ptdev->mmu->irq);
}
void panthor_mmu_resume(struct panthor_device *ptdev)
{
mutex_lock(&ptdev->mmu->as.slots_lock);
ptdev->mmu->as.alloc_mask = 0;
ptdev->mmu->as.faulty_mask = 0;
mutex_unlock(&ptdev->mmu->as.slots_lock);
panthor_mmu_irq_resume(&ptdev->mmu->irq, panthor_mmu_fault_mask(ptdev, ~0));
}
void panthor_mmu_pre_reset(struct panthor_device *ptdev)
{
struct panthor_vm *vm;
panthor_mmu_irq_suspend(&ptdev->mmu->irq);
mutex_lock(&ptdev->mmu->vm.lock);
ptdev->mmu->vm.reset_in_progress = true;
list_for_each_entry(vm, &ptdev->mmu->vm.list, node)
panthor_vm_stop(vm);
mutex_unlock(&ptdev->mmu->vm.lock);
}
void panthor_mmu_post_reset(struct panthor_device *ptdev)
{
struct panthor_vm *vm;
mutex_lock(&ptdev->mmu->as.slots_lock);
ptdev->mmu->as.alloc_mask = 0;
ptdev->mmu->as.faulty_mask = 0;
for (u32 i = 0; i < ARRAY_SIZE(ptdev->mmu->as.slots); i++) {
struct panthor_vm *vm = ptdev->mmu->as.slots[i].vm;
if (vm)
panthor_vm_release_as_locked(vm);
}
mutex_unlock(&ptdev->mmu->as.slots_lock);
panthor_mmu_irq_resume(&ptdev->mmu->irq, panthor_mmu_fault_mask(ptdev, ~0));
mutex_lock(&ptdev->mmu->vm.lock);
list_for_each_entry(vm, &ptdev->mmu->vm.list, node) {
panthor_vm_start(vm);
}
ptdev->mmu->vm.reset_in_progress = false;
mutex_unlock(&ptdev->mmu->vm.lock);
}
static void panthor_vm_free(struct drm_gpuvm *gpuvm)
{
struct panthor_vm *vm = container_of(gpuvm, struct panthor_vm, base);
struct panthor_device *ptdev = vm->ptdev;
mutex_lock(&vm->heaps.lock);
if (drm_WARN_ON(&ptdev->base, vm->heaps.pool))
panthor_heap_pool_destroy(vm->heaps.pool);
mutex_unlock(&vm->heaps.lock);
mutex_destroy(&vm->heaps.lock);
mutex_lock(&ptdev->mmu->vm.lock);
list_del(&vm->node);
if (ptdev->mmu->vm.reset_in_progress)
panthor_vm_start(vm);
mutex_unlock(&ptdev->mmu->vm.lock);
drm_sched_entity_destroy(&vm->entity);
drm_sched_fini(&vm->sched);
mutex_lock(&vm->op_lock);
mutex_lock(&ptdev->mmu->as.slots_lock);
if (vm->as.id >= 0) {
int cookie;
if (drm_dev_enter(&ptdev->base, &cookie)) {
panthor_mmu_as_disable(ptdev, vm->as.id, false);
drm_dev_exit(cookie);
}
ptdev->mmu->as.slots[vm->as.id].vm = NULL;
clear_bit(vm->as.id, &ptdev->mmu->as.alloc_mask);
list_del(&vm->as.lru_node);
}
mutex_unlock(&ptdev->mmu->as.slots_lock);
mutex_unlock(&vm->op_lock);
free_io_pgtable_ops(vm->pgtbl_ops);
drm_mm_takedown(&vm->mm);
kfree(vm);
}
void panthor_vm_put(struct panthor_vm *vm)
{
drm_gpuvm_put(vm ? &vm->base : NULL);
}
struct panthor_vm *panthor_vm_get(struct panthor_vm *vm)
{
if (vm)
drm_gpuvm_get(&vm->base);
return vm;
}
struct panthor_heap_pool *panthor_vm_get_heap_pool(struct panthor_vm *vm, bool create)
{
struct panthor_heap_pool *pool;
mutex_lock(&vm->heaps.lock);
if (!vm->heaps.pool && create) {
if (vm->destroyed)
pool = ERR_PTR(-EINVAL);
else
pool = panthor_heap_pool_create(vm->ptdev, vm);
if (!IS_ERR(pool))
vm->heaps.pool = panthor_heap_pool_get(pool);
} else {
pool = panthor_heap_pool_get(vm->heaps.pool);
if (!pool)
pool = ERR_PTR(-ENOENT);
}
mutex_unlock(&vm->heaps.lock);
return pool;
}
void panthor_vm_heaps_sizes(struct panthor_file *pfile, struct drm_memory_stats *stats)
{
struct panthor_vm *vm;
unsigned long i;
if (!pfile->vms)
return;
xa_lock(&pfile->vms->xa);
xa_for_each(&pfile->vms->xa, i, vm) {
size_t size = panthor_heap_pool_size(vm->heaps.pool);
stats->resident += size;
if (vm->as.id >= 0)
stats->active += size;
}
xa_unlock(&pfile->vms->xa);
}
static u64 mair_to_memattr(u64 mair, bool coherent)
{
u64 memattr = 0;
u32 i;
for (i = 0; i < 8; i++) {
u8 in_attr = mair >> (8 * i), out_attr;
u8 outer = in_attr >> 4, inner = in_attr & 0xf;
if (!(outer & 3) || !(outer & 4) || !(inner & 4)) {
out_attr = AS_MEMATTR_AARCH64_INNER_OUTER_NC |
AS_MEMATTR_AARCH64_SH_MIDGARD_INNER |
AS_MEMATTR_AARCH64_INNER_ALLOC_EXPL(false, false);
} else {
out_attr = AS_MEMATTR_AARCH64_INNER_OUTER_WB |
AS_MEMATTR_AARCH64_INNER_ALLOC_EXPL(inner & 1, inner & 2);
if (!coherent)
out_attr |= AS_MEMATTR_AARCH64_SH_MIDGARD_INNER;
else
out_attr |= AS_MEMATTR_AARCH64_SH_CPU_INNER;
}
memattr |= (u64)out_attr << (8 * i);
}
return memattr;
}
static void panthor_vma_link(struct panthor_vm *vm,
struct panthor_vma *vma,
struct drm_gpuvm_bo *vm_bo)
{
struct panthor_gem_object *bo = to_panthor_bo(vma->base.gem.obj);
mutex_lock(&bo->base.base.gpuva.lock);
drm_gpuva_link(&vma->base, vm_bo);
mutex_unlock(&bo->base.base.gpuva.lock);
}
static void panthor_vma_unlink(struct panthor_vma *vma)
{
drm_gpuva_unlink_defer(&vma->base);
kfree(vma);
}
static void panthor_vma_init(struct panthor_vma *vma, u32 flags)
{
INIT_LIST_HEAD(&vma->node);
vma->flags = flags;
}
#define PANTHOR_VM_MAP_FLAGS \
(DRM_PANTHOR_VM_BIND_OP_MAP_READONLY | \
DRM_PANTHOR_VM_BIND_OP_MAP_NOEXEC | \
DRM_PANTHOR_VM_BIND_OP_MAP_UNCACHED)
static int panthor_gpuva_sm_step_map(struct drm_gpuva_op *op, void *priv)
{
struct panthor_vm *vm = priv;
struct panthor_vm_op_ctx *op_ctx = vm->op_ctx;
struct panthor_vma *vma = panthor_vm_op_ctx_get_vma(op_ctx);
int ret;
if (!vma)
return -EINVAL;
panthor_vma_init(vma, op_ctx->flags & PANTHOR_VM_MAP_FLAGS);
ret = panthor_vm_map_pages(vm, op->map.va.addr, flags_to_prot(vma->flags),
op_ctx->map.sgt, op->map.gem.offset,
op->map.va.range);
if (ret) {
panthor_vm_op_ctx_return_vma(op_ctx, vma);
return ret;
}
drm_gpuva_map(&vm->base, &vma->base, &op->map);
panthor_vma_link(vm, vma, op_ctx->map.vm_bo);
drm_gpuvm_bo_put_deferred(op_ctx->map.vm_bo);
op_ctx->map.vm_bo = NULL;
return 0;
}
static bool
iova_mapped_as_huge_page(struct drm_gpuva_op_map *op, u64 addr)
{
const struct page *pg;
pgoff_t bo_offset;
bo_offset = addr - op->va.addr + op->gem.offset;
pg = to_panthor_bo(op->gem.obj)->base.pages[bo_offset >> PAGE_SHIFT];
return folio_size(page_folio(pg)) >= SZ_2M;
}
static void
unmap_hugepage_align(const struct drm_gpuva_op_remap *op,
u64 *unmap_start, u64 *unmap_range)
{
u64 aligned_unmap_start, aligned_unmap_end, unmap_end;
unmap_end = *unmap_start + *unmap_range;
aligned_unmap_start = ALIGN_DOWN(*unmap_start, SZ_2M);
aligned_unmap_end = ALIGN(unmap_end, SZ_2M);
if (op->prev && aligned_unmap_start < *unmap_start &&
op->prev->va.addr <= aligned_unmap_start &&
iova_mapped_as_huge_page(op->prev, *unmap_start)) {
*unmap_range += *unmap_start - aligned_unmap_start;
*unmap_start = aligned_unmap_start;
}
if (op->next && aligned_unmap_end > unmap_end &&
op->next->va.addr + op->next->va.range >= aligned_unmap_end &&
iova_mapped_as_huge_page(op->next, unmap_end - 1)) {
*unmap_range += aligned_unmap_end - unmap_end;
}
}
static int panthor_gpuva_sm_step_remap(struct drm_gpuva_op *op,
void *priv)
{
struct panthor_vma *unmap_vma = container_of(op->remap.unmap->va, struct panthor_vma, base);
struct panthor_vm *vm = priv;
struct panthor_vm_op_ctx *op_ctx = vm->op_ctx;
struct panthor_vma *prev_vma = NULL, *next_vma = NULL;
u64 unmap_start, unmap_range;
int ret;
drm_gpuva_op_remap_to_unmap_range(&op->remap, &unmap_start, &unmap_range);
unmap_hugepage_align(&op->remap, &unmap_start, &unmap_range);
panthor_vm_lock_region(vm, unmap_start, unmap_range);
panthor_vm_unmap_pages(vm, unmap_start, unmap_range);
if (op->remap.prev) {
struct panthor_gem_object *bo = to_panthor_bo(op->remap.prev->gem.obj);
u64 offset = op->remap.prev->gem.offset + unmap_start - op->remap.prev->va.addr;
u64 size = op->remap.prev->va.addr + op->remap.prev->va.range - unmap_start;
ret = panthor_vm_map_pages(vm, unmap_start, flags_to_prot(unmap_vma->flags),
bo->base.sgt, offset, size);
if (ret)
return ret;
prev_vma = panthor_vm_op_ctx_get_vma(op_ctx);
panthor_vma_init(prev_vma, unmap_vma->flags);
}
if (op->remap.next) {
struct panthor_gem_object *bo = to_panthor_bo(op->remap.next->gem.obj);
u64 addr = op->remap.next->va.addr;
u64 size = unmap_start + unmap_range - op->remap.next->va.addr;
ret = panthor_vm_map_pages(vm, addr, flags_to_prot(unmap_vma->flags),
bo->base.sgt, op->remap.next->gem.offset, size);
if (ret)
return ret;
next_vma = panthor_vm_op_ctx_get_vma(op_ctx);
panthor_vma_init(next_vma, unmap_vma->flags);
}
drm_gpuva_remap(prev_vma ? &prev_vma->base : NULL,
next_vma ? &next_vma->base : NULL,
&op->remap);
if (prev_vma) {
panthor_vma_link(vm, prev_vma, op->remap.unmap->va->vm_bo);
}
if (next_vma) {
panthor_vma_link(vm, next_vma, op->remap.unmap->va->vm_bo);
}
panthor_vma_unlink(unmap_vma);
return 0;
}
static int panthor_gpuva_sm_step_unmap(struct drm_gpuva_op *op,
void *priv)
{
struct panthor_vma *unmap_vma = container_of(op->unmap.va, struct panthor_vma, base);
struct panthor_vm *vm = priv;
panthor_vm_unmap_pages(vm, unmap_vma->base.va.addr,
unmap_vma->base.va.range);
drm_gpuva_unmap(&op->unmap);
panthor_vma_unlink(unmap_vma);
return 0;
}
static const struct drm_gpuvm_ops panthor_gpuvm_ops = {
.vm_free = panthor_vm_free,
.vm_bo_free = panthor_vm_bo_free,
.sm_step_map = panthor_gpuva_sm_step_map,
.sm_step_remap = panthor_gpuva_sm_step_remap,
.sm_step_unmap = panthor_gpuva_sm_step_unmap,
};
struct dma_resv *panthor_vm_resv(struct panthor_vm *vm)
{
return drm_gpuvm_resv(&vm->base);
}
struct drm_gem_object *panthor_vm_root_gem(struct panthor_vm *vm)
{
if (!vm)
return NULL;
return vm->base.r_obj;
}
static int
panthor_vm_exec_op(struct panthor_vm *vm, struct panthor_vm_op_ctx *op,
bool flag_vm_unusable_on_failure)
{
u32 op_type = op->flags & DRM_PANTHOR_VM_BIND_OP_TYPE_MASK;
int ret;
if (op_type == DRM_PANTHOR_VM_BIND_OP_TYPE_SYNC_ONLY)
return 0;
mutex_lock(&vm->op_lock);
vm->op_ctx = op;
ret = panthor_vm_lock_region(vm, op->va.addr, op->va.range);
if (ret)
goto out;
switch (op_type) {
case DRM_PANTHOR_VM_BIND_OP_TYPE_MAP: {
const struct drm_gpuvm_map_req map_req = {
.map.va.addr = op->va.addr,
.map.va.range = op->va.range,
.map.gem.obj = op->map.vm_bo->obj,
.map.gem.offset = op->map.bo_offset,
};
if (vm->unusable) {
ret = -EINVAL;
break;
}
ret = drm_gpuvm_sm_map(&vm->base, vm, &map_req);
break;
}
case DRM_PANTHOR_VM_BIND_OP_TYPE_UNMAP:
ret = drm_gpuvm_sm_unmap(&vm->base, vm, op->va.addr, op->va.range);
break;
default:
ret = -EINVAL;
break;
}
panthor_vm_unlock_region(vm);
out:
if (ret && flag_vm_unusable_on_failure)
panthor_vm_declare_unusable(vm);
vm->op_ctx = NULL;
mutex_unlock(&vm->op_lock);
return ret;
}
static struct dma_fence *
panthor_vm_bind_run_job(struct drm_sched_job *sched_job)
{
struct panthor_vm_bind_job *job = container_of(sched_job, struct panthor_vm_bind_job, base);
bool cookie;
int ret;
cookie = dma_fence_begin_signalling();
ret = panthor_vm_exec_op(job->vm, &job->ctx, true);
dma_fence_end_signalling(cookie);
return ret ? ERR_PTR(ret) : NULL;
}
static void panthor_vm_bind_job_release(struct kref *kref)
{
struct panthor_vm_bind_job *job = container_of(kref, struct panthor_vm_bind_job, refcount);
if (job->base.s_fence)
drm_sched_job_cleanup(&job->base);
panthor_vm_cleanup_op_ctx(&job->ctx, job->vm);
panthor_vm_put(job->vm);
kfree(job);
}
void panthor_vm_bind_job_put(struct drm_sched_job *sched_job)
{
struct panthor_vm_bind_job *job =
container_of(sched_job, struct panthor_vm_bind_job, base);
if (sched_job)
kref_put(&job->refcount, panthor_vm_bind_job_release);
}
static void
panthor_vm_bind_free_job(struct drm_sched_job *sched_job)
{
struct panthor_vm_bind_job *job =
container_of(sched_job, struct panthor_vm_bind_job, base);
drm_sched_job_cleanup(sched_job);
queue_work(panthor_cleanup_wq, &job->cleanup_op_ctx_work);
}
static enum drm_gpu_sched_stat
panthor_vm_bind_timedout_job(struct drm_sched_job *sched_job)
{
WARN(1, "VM_BIND ops are synchronous for now, there should be no timeout!");
return DRM_GPU_SCHED_STAT_RESET;
}
static const struct drm_sched_backend_ops panthor_vm_bind_ops = {
.run_job = panthor_vm_bind_run_job,
.free_job = panthor_vm_bind_free_job,
.timedout_job = panthor_vm_bind_timedout_job,
};
struct panthor_vm *
panthor_vm_create(struct panthor_device *ptdev, bool for_mcu,
u64 kernel_va_start, u64 kernel_va_size,
u64 auto_kernel_va_start, u64 auto_kernel_va_size)
{
u32 va_bits = GPU_MMU_FEATURES_VA_BITS(ptdev->gpu_info.mmu_features);
u32 pa_bits = GPU_MMU_FEATURES_PA_BITS(ptdev->gpu_info.mmu_features);
u64 full_va_range = 1ull << va_bits;
struct drm_gem_object *dummy_gem;
struct drm_gpu_scheduler *sched;
const struct drm_sched_init_args sched_args = {
.ops = &panthor_vm_bind_ops,
.submit_wq = ptdev->mmu->vm.wq,
.num_rqs = 1,
.credit_limit = 1,
.timeout = MAX_SCHEDULE_TIMEOUT,
.name = "panthor-vm-bind",
.dev = ptdev->base.dev,
};
struct io_pgtable_cfg pgtbl_cfg;
u64 mair, min_va, va_range;
struct panthor_vm *vm;
int ret;
vm = kzalloc_obj(*vm);
if (!vm)
return ERR_PTR(-ENOMEM);
dummy_gem = drm_gpuvm_resv_object_alloc(&ptdev->base);
if (!dummy_gem) {
ret = -ENOMEM;
goto err_free_vm;
}
mutex_init(&vm->heaps.lock);
vm->for_mcu = for_mcu;
vm->ptdev = ptdev;
mutex_init(&vm->op_lock);
if (for_mcu) {
min_va = 0;
va_range = SZ_4G;
} else {
min_va = 0;
va_range = full_va_range;
}
mutex_init(&vm->mm_lock);
drm_mm_init(&vm->mm, kernel_va_start, kernel_va_size);
vm->kernel_auto_va.start = auto_kernel_va_start;
vm->kernel_auto_va.end = vm->kernel_auto_va.start + auto_kernel_va_size - 1;
INIT_LIST_HEAD(&vm->node);
INIT_LIST_HEAD(&vm->as.lru_node);
vm->as.id = -1;
refcount_set(&vm->as.active_cnt, 0);
pgtbl_cfg = (struct io_pgtable_cfg) {
.pgsize_bitmap = SZ_4K | SZ_2M,
.ias = va_bits,
.oas = pa_bits,
.coherent_walk = ptdev->coherent,
.tlb = &mmu_tlb_ops,
.iommu_dev = ptdev->base.dev,
.alloc = alloc_pt,
.free = free_pt,
};
vm->pgtbl_ops = alloc_io_pgtable_ops(ARM_64_LPAE_S1, &pgtbl_cfg, vm);
if (!vm->pgtbl_ops) {
ret = -EINVAL;
goto err_mm_takedown;
}
ret = drm_sched_init(&vm->sched, &sched_args);
if (ret)
goto err_free_io_pgtable;
sched = &vm->sched;
ret = drm_sched_entity_init(&vm->entity, 0, &sched, 1, NULL);
if (ret)
goto err_sched_fini;
mair = io_pgtable_ops_to_pgtable(vm->pgtbl_ops)->cfg.arm_lpae_s1_cfg.mair;
vm->memattr = mair_to_memattr(mair, ptdev->coherent);
mutex_lock(&ptdev->mmu->vm.lock);
list_add_tail(&vm->node, &ptdev->mmu->vm.list);
if (ptdev->mmu->vm.reset_in_progress)
panthor_vm_stop(vm);
mutex_unlock(&ptdev->mmu->vm.lock);
drm_gpuvm_init(&vm->base, for_mcu ? "panthor-MCU-VM" : "panthor-GPU-VM",
DRM_GPUVM_RESV_PROTECTED | DRM_GPUVM_IMMEDIATE_MODE,
&ptdev->base, dummy_gem, min_va, va_range, 0, 0,
&panthor_gpuvm_ops);
drm_gem_object_put(dummy_gem);
return vm;
err_sched_fini:
drm_sched_fini(&vm->sched);
err_free_io_pgtable:
free_io_pgtable_ops(vm->pgtbl_ops);
err_mm_takedown:
drm_mm_takedown(&vm->mm);
drm_gem_object_put(dummy_gem);
err_free_vm:
kfree(vm);
return ERR_PTR(ret);
}
static int
panthor_vm_bind_prepare_op_ctx(struct drm_file *file,
struct panthor_vm *vm,
const struct drm_panthor_vm_bind_op *op,
struct panthor_vm_op_ctx *op_ctx)
{
ssize_t vm_pgsz = panthor_vm_page_size(vm);
struct drm_gem_object *gem;
int ret;
if (!IS_ALIGNED(op->va | op->size | op->bo_offset, vm_pgsz))
return -EINVAL;
switch (op->flags & DRM_PANTHOR_VM_BIND_OP_TYPE_MASK) {
case DRM_PANTHOR_VM_BIND_OP_TYPE_MAP:
gem = drm_gem_object_lookup(file, op->bo_handle);
ret = panthor_vm_prepare_map_op_ctx(op_ctx, vm,
gem ? to_panthor_bo(gem) : NULL,
op->bo_offset,
op->size,
op->va,
op->flags);
drm_gem_object_put(gem);
return ret;
case DRM_PANTHOR_VM_BIND_OP_TYPE_UNMAP:
if (op->flags & ~DRM_PANTHOR_VM_BIND_OP_TYPE_MASK)
return -EINVAL;
if (op->bo_handle || op->bo_offset)
return -EINVAL;
return panthor_vm_prepare_unmap_op_ctx(op_ctx, vm, op->va, op->size);
case DRM_PANTHOR_VM_BIND_OP_TYPE_SYNC_ONLY:
if (op->flags & ~DRM_PANTHOR_VM_BIND_OP_TYPE_MASK)
return -EINVAL;
if (op->bo_handle || op->bo_offset)
return -EINVAL;
if (op->va || op->size)
return -EINVAL;
if (!op->syncs.count)
return -EINVAL;
panthor_vm_prepare_sync_only_op_ctx(op_ctx, vm);
return 0;
default:
return -EINVAL;
}
}
static void panthor_vm_bind_job_cleanup_op_ctx_work(struct work_struct *work)
{
struct panthor_vm_bind_job *job =
container_of(work, struct panthor_vm_bind_job, cleanup_op_ctx_work);
panthor_vm_bind_job_put(&job->base);
}
struct drm_sched_job *
panthor_vm_bind_job_create(struct drm_file *file,
struct panthor_vm *vm,
const struct drm_panthor_vm_bind_op *op)
{
struct panthor_vm_bind_job *job;
int ret;
if (!vm)
return ERR_PTR(-EINVAL);
if (vm->destroyed || vm->unusable)
return ERR_PTR(-EINVAL);
job = kzalloc_obj(*job);
if (!job)
return ERR_PTR(-ENOMEM);
ret = panthor_vm_bind_prepare_op_ctx(file, vm, op, &job->ctx);
if (ret) {
kfree(job);
return ERR_PTR(ret);
}
INIT_WORK(&job->cleanup_op_ctx_work, panthor_vm_bind_job_cleanup_op_ctx_work);
kref_init(&job->refcount);
job->vm = panthor_vm_get(vm);
ret = drm_sched_job_init(&job->base, &vm->entity, 1, vm, file->client_id);
if (ret)
goto err_put_job;
return &job->base;
err_put_job:
panthor_vm_bind_job_put(&job->base);
return ERR_PTR(ret);
}
int panthor_vm_bind_job_prepare_resvs(struct drm_exec *exec,
struct drm_sched_job *sched_job)
{
struct panthor_vm_bind_job *job = container_of(sched_job, struct panthor_vm_bind_job, base);
int ret;
ret = drm_gpuvm_prepare_vm(&job->vm->base, exec, 1);
if (ret)
return ret;
if (job->ctx.map.vm_bo) {
ret = drm_exec_prepare_obj(exec, job->ctx.map.vm_bo->obj, 1);
if (ret)
return ret;
}
return 0;
}
void panthor_vm_bind_job_update_resvs(struct drm_exec *exec,
struct drm_sched_job *sched_job)
{
struct panthor_vm_bind_job *job = container_of(sched_job, struct panthor_vm_bind_job, base);
drm_gpuvm_resv_add_fence(&job->vm->base, exec,
&sched_job->s_fence->finished,
DMA_RESV_USAGE_BOOKKEEP,
DMA_RESV_USAGE_BOOKKEEP);
}
void panthor_vm_update_resvs(struct panthor_vm *vm, struct drm_exec *exec,
struct dma_fence *fence,
enum dma_resv_usage private_usage,
enum dma_resv_usage extobj_usage)
{
drm_gpuvm_resv_add_fence(&vm->base, exec, fence, private_usage, extobj_usage);
}
int panthor_vm_bind_exec_sync_op(struct drm_file *file,
struct panthor_vm *vm,
struct drm_panthor_vm_bind_op *op)
{
struct panthor_vm_op_ctx op_ctx;
int ret;
if (op->syncs.count)
return -EINVAL;
if (!op->size)
return 0;
ret = panthor_vm_bind_prepare_op_ctx(file, vm, op, &op_ctx);
if (ret)
return ret;
ret = panthor_vm_exec_op(vm, &op_ctx, false);
panthor_vm_cleanup_op_ctx(&op_ctx, vm);
return ret;
}
int panthor_vm_map_bo_range(struct panthor_vm *vm, struct panthor_gem_object *bo,
u64 offset, u64 size, u64 va, u32 flags)
{
struct panthor_vm_op_ctx op_ctx;
int ret;
ret = panthor_vm_prepare_map_op_ctx(&op_ctx, vm, bo, offset, size, va, flags);
if (ret)
return ret;
ret = panthor_vm_exec_op(vm, &op_ctx, false);
panthor_vm_cleanup_op_ctx(&op_ctx, vm);
return ret;
}
int panthor_vm_unmap_range(struct panthor_vm *vm, u64 va, u64 size)
{
struct panthor_vm_op_ctx op_ctx;
int ret;
ret = panthor_vm_prepare_unmap_op_ctx(&op_ctx, vm, va, size);
if (ret)
return ret;
ret = panthor_vm_exec_op(vm, &op_ctx, false);
panthor_vm_cleanup_op_ctx(&op_ctx, vm);
return ret;
}
int panthor_vm_prepare_mapped_bos_resvs(struct drm_exec *exec, struct panthor_vm *vm,
u32 slot_count)
{
int ret;
ret = drm_gpuvm_prepare_vm(&vm->base, exec, slot_count);
if (ret)
return ret;
return drm_gpuvm_prepare_objects(&vm->base, exec, slot_count);
}
void panthor_mmu_unplug(struct panthor_device *ptdev)
{
if (!IS_ENABLED(CONFIG_PM) || pm_runtime_active(ptdev->base.dev))
panthor_mmu_irq_suspend(&ptdev->mmu->irq);
mutex_lock(&ptdev->mmu->as.slots_lock);
for (u32 i = 0; i < ARRAY_SIZE(ptdev->mmu->as.slots); i++) {
struct panthor_vm *vm = ptdev->mmu->as.slots[i].vm;
if (vm) {
drm_WARN_ON(&ptdev->base,
panthor_mmu_as_disable(ptdev, i, false));
panthor_vm_release_as_locked(vm);
}
}
mutex_unlock(&ptdev->mmu->as.slots_lock);
}
static void panthor_mmu_release_wq(struct drm_device *ddev, void *res)
{
destroy_workqueue(res);
}
int panthor_mmu_init(struct panthor_device *ptdev)
{
u32 va_bits = GPU_MMU_FEATURES_VA_BITS(ptdev->gpu_info.mmu_features);
struct panthor_mmu *mmu;
int ret, irq;
mmu = drmm_kzalloc(&ptdev->base, sizeof(*mmu), GFP_KERNEL);
if (!mmu)
return -ENOMEM;
INIT_LIST_HEAD(&mmu->as.lru_list);
ret = drmm_mutex_init(&ptdev->base, &mmu->as.slots_lock);
if (ret)
return ret;
INIT_LIST_HEAD(&mmu->vm.list);
ret = drmm_mutex_init(&ptdev->base, &mmu->vm.lock);
if (ret)
return ret;
ptdev->mmu = mmu;
irq = platform_get_irq_byname(to_platform_device(ptdev->base.dev), "mmu");
if (irq <= 0)
return -ENODEV;
ret = panthor_request_mmu_irq(ptdev, &mmu->irq, irq,
panthor_mmu_fault_mask(ptdev, ~0));
if (ret)
return ret;
mmu->vm.wq = alloc_workqueue("panthor-vm-bind", WQ_UNBOUND, 0);
if (!mmu->vm.wq)
return -ENOMEM;
if (va_bits > BITS_PER_LONG) {
ptdev->gpu_info.mmu_features &= ~GENMASK(7, 0);
ptdev->gpu_info.mmu_features |= BITS_PER_LONG;
}
return drmm_add_action_or_reset(&ptdev->base, panthor_mmu_release_wq, mmu->vm.wq);
}
#ifdef CONFIG_DEBUG_FS
static int show_vm_gpuvas(struct panthor_vm *vm, struct seq_file *m)
{
int ret;
mutex_lock(&vm->op_lock);
ret = drm_debugfs_gpuva_info(m, &vm->base);
mutex_unlock(&vm->op_lock);
return ret;
}
static int show_each_vm(struct seq_file *m, void *arg)
{
struct drm_info_node *node = (struct drm_info_node *)m->private;
struct drm_device *ddev = node->minor->dev;
struct panthor_device *ptdev = container_of(ddev, struct panthor_device, base);
int (*show)(struct panthor_vm *, struct seq_file *) = node->info_ent->data;
struct panthor_vm *vm;
int ret = 0;
mutex_lock(&ptdev->mmu->vm.lock);
list_for_each_entry(vm, &ptdev->mmu->vm.list, node) {
ret = show(vm, m);
if (ret < 0)
break;
seq_puts(m, "\n");
}
mutex_unlock(&ptdev->mmu->vm.lock);
return ret;
}
static struct drm_info_list panthor_mmu_debugfs_list[] = {
DRM_DEBUGFS_GPUVA_INFO(show_each_vm, show_vm_gpuvas),
};
void panthor_mmu_debugfs_init(struct drm_minor *minor)
{
drm_debugfs_create_files(panthor_mmu_debugfs_list,
ARRAY_SIZE(panthor_mmu_debugfs_list),
minor->debugfs_root, minor);
}
#endif
int panthor_mmu_pt_cache_init(void)
{
pt_cache = kmem_cache_create("panthor-mmu-pt", SZ_4K, SZ_4K, 0, NULL);
if (!pt_cache)
return -ENOMEM;
return 0;
}
void panthor_mmu_pt_cache_fini(void)
{
kmem_cache_destroy(pt_cache);
}