arch/arm/mach-davinci/sleep.S

7

#define BIT(nr) (1 << (nr))

arch/arm/mach-omap2/sleep33xx.S

24

#define BIT(nr) (1 << (nr))

arch/arm/mach-omap2/sleep43xx.S

26

#define BIT(nr) (1 << (nr))

drivers/auxdisplay/img-ascii-lcd.c

115

#define SEAD3_REG_LCD_CTRL_SETDRAM BIT(7)

drivers/auxdisplay/img-ascii-lcd.c

118

#define SEAD3_REG_CPLD_STATUS_BUSY BIT(0)

drivers/auxdisplay/img-ascii-lcd.c

120

#define SEAD3_REG_CPLD_DATA_BUSY BIT(7)

drivers/comedi/drivers/ni_routing/tools/convert_c_to_py.c

13

#define BIT(x) (1UL << (x))

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8946

BIT(DRM_MODE_COLORIMETRY_BT709_YCC) |

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

277

BIT(AMDGPU_TRANSFER_FUNCTION_SRGB_INV_EOTF) |

drivers/gpu/drm/i915/gem/i915_gem_object_types.h

210

#define I915_MAP_OVERRIDE BIT(31)

drivers/hid/bpf/progs/hid_bpf_helpers.h

86

#define BIT(n) (1UL << (n))

drivers/input/joystick/adafruit-seesaw.c

60

BIT(SEESAW_BUTTON_A) | BIT(SEESAW_BUTTON_B) | BIT(SEESAW_BUTTON_X) |

drivers/net/ethernet/realtek/r8169_main.c

334

#define ALDPS_LTR_EN BIT(0)

drivers/net/ethernet/realtek/r8169_main.c

335

#define LTR_OBFF_LOCK_EN BIT(0)

drivers/net/ethernet/realtek/r8169_main.c

336

#define LINK_SPEED_CHANGE_EN BIT(14)

drivers/net/ethernet/realtek/r8169_main.c

348

#define D3COLD_NO_PLL_DOWN BIT(7)

drivers/net/ethernet/realtek/r8169_main.c

349

#define D3HOT_NO_PLL_DOWN BIT(6)

drivers/net/ethernet/realtek/r8169_main.c

350

#define D3_NO_PLL_DOWN (BIT(7) | BIT(6))

drivers/net/ethernet/realtek/r8169_main.c

350

#define D3_NO_PLL_DOWN (BIT(7) | BIT(6))

drivers/net/ethernet/realtek/r8169_main.c

424

#define COMBO_LTR_EXTEND_EN BIT(0)

drivers/net/ethernet/realtek/r8169_main.c

430

#define INT_CFG0_ENABLE_8125 BIT(0)

drivers/net/ethernet/realtek/r8169_main.c

431

#define INT_CFG0_CLKREQEN BIT(3)

drivers/net/ethernet/realtek/rtase/rtase.h

100

#define RTASE_ROK BIT(0)

drivers/net/ethernet/realtek/rtase/rtase.h

104

#define RTASE_Q_TOK BIT(4)

drivers/net/ethernet/realtek/rtase/rtase.h

105

#define RTASE_Q_RDU BIT(1)

drivers/net/ethernet/realtek/rtase/rtase.h

106

#define RTASE_Q_ROK BIT(0)

drivers/net/ethernet/realtek/rtase/rtase.h

117

#define RTASE_RX_SINGLE_FETCH BIT(14)

drivers/net/ethernet/realtek/rtase/rtase.h

118

#define RTASE_RX_SINGLE_TAG BIT(13)

drivers/net/ethernet/realtek/rtase/rtase.h

120

#define RTASE_ACPT_FLOW BIT(7)

drivers/net/ethernet/realtek/rtase/rtase.h

121

#define RTASE_ACCEPT_ERR BIT(5)

drivers/net/ethernet/realtek/rtase/rtase.h

122

#define RTASE_ACCEPT_RUNT BIT(4)

drivers/net/ethernet/realtek/rtase/rtase.h

123

#define RTASE_ACCEPT_BROADCAST BIT(3)

drivers/net/ethernet/realtek/rtase/rtase.h

124

#define RTASE_ACCEPT_MULTICAST BIT(2)

drivers/net/ethernet/realtek/rtase/rtase.h

125

#define RTASE_ACCEPT_MYPHYS BIT(1)

drivers/net/ethernet/realtek/rtase/rtase.h

126

#define RTASE_ACCEPT_ALLPHYS BIT(0)

drivers/net/ethernet/realtek/rtase/rtase.h

134

#define RTASE_RX_NEW_DESC_FORMAT_EN BIT(8)

drivers/net/ethernet/realtek/rtase/rtase.h

135

#define RTASE_OUTER_VLAN_DETAG_EN BIT(7)

drivers/net/ethernet/realtek/rtase/rtase.h

136

#define RTASE_INNER_VLAN_DETAG_EN BIT(6)

drivers/net/ethernet/realtek/rtase/rtase.h

137

#define RTASE_PCIE_NEW_FLOW BIT(2)

drivers/net/ethernet/realtek/rtase/rtase.h

138

#define RTASE_PCIE_RELOAD_EN BIT(0)

drivers/net/ethernet/realtek/rtase/rtase.h

147

#define RTASE_TX_FIFO_EMPTY BIT(5)

drivers/net/ethernet/realtek/rtase/rtase.h

148

#define RTASE_RX_FIFO_EMPTY BIT(4)

drivers/net/ethernet/realtek/rtase/rtase.h

152

#define RTASE_FORCE_RXFLOW_EN BIT(11)

drivers/net/ethernet/realtek/rtase/rtase.h

153

#define RTASE_FORCE_TXFLOW_EN BIT(10)

drivers/net/ethernet/realtek/rtase/rtase.h

154

#define RTASE_RX_CHKSUM BIT(5)

drivers/net/ethernet/realtek/rtase/rtase.h

164

#define RTASE_RX_DV_GATE_EN BIT(3)

drivers/net/ethernet/realtek/rtase/rtase.h

167

#define RTASE_TX_NEW_DESC_FORMAT_EN BIT(0)

drivers/net/ethernet/realtek/rtase/rtase.h

66

#define RTASE_COUNTER_RESET BIT(0)

drivers/net/ethernet/realtek/rtase/rtase.h

67

#define RTASE_COUNTER_DUMP BIT(3)

drivers/net/ethernet/realtek/rtase/rtase.h

73

#define RTASE_LBK_ATLD BIT(1)

drivers/net/ethernet/realtek/rtase/rtase.h

74

#define RTASE_LBK_CLR BIT(0)

drivers/net/ethernet/realtek/rtase/rtase.h

79

#define RTASE_TX_DESC_CMD_CS BIT(15)

drivers/net/ethernet/realtek/rtase/rtase.h

80

#define RTASE_TX_DESC_CMD_WE BIT(14)

drivers/net/ethernet/realtek/rtase/rtase.h

86

#define RTASE_STOP_REQ BIT(7)

drivers/net/ethernet/realtek/rtase/rtase.h

87

#define RTASE_STOP_REQ_DONE BIT(6)

drivers/net/ethernet/realtek/rtase/rtase.h

88

#define RTASE_RE BIT(3)

drivers/net/ethernet/realtek/rtase/rtase.h

89

#define RTASE_TE BIT(2)

drivers/net/ethernet/realtek/rtase/rtase.h

93

#define RTASE_TOK7 BIT(30)

drivers/net/ethernet/realtek/rtase/rtase.h

94

#define RTASE_TOK6 BIT(28)

drivers/net/ethernet/realtek/rtase/rtase.h

95

#define RTASE_TOK5 BIT(26)

drivers/net/ethernet/realtek/rtase/rtase.h

96

#define RTASE_TOK4 BIT(24)

drivers/net/ethernet/realtek/rtase/rtase.h

97

#define RTASE_FOVW BIT(6)

drivers/net/ethernet/realtek/rtase/rtase.h

98

#define RTASE_RDU BIT(4)

drivers/net/ethernet/realtek/rtase/rtase.h

99

#define RTASE_TOK BIT(2)

drivers/net/phy/air_en8811h.c

238

static const unsigned long en8811h_led_trig = BIT(TRIGGER_NETDEV_FULL_DUPLEX) |

drivers/net/phy/aquantia/aquantia_leds.c

25

static const unsigned long supported_triggers = (BIT(TRIGGER_NETDEV_LINK) |

drivers/net/phy/intel-xway.c

397

static const unsigned long supported_triggers = (BIT(TRIGGER_NETDEV_LINK) |

drivers/net/phy/mediatek/mtk-2p5ge.c

253

BIT(TRIGGER_NETDEV_FULL_DUPLEX) |

drivers/net/phy/mediatek/mtk-ge-soc.c

1251

BIT(TRIGGER_NETDEV_FULL_DUPLEX) |

drivers/net/phy/motorcomm.c

1702

static const unsigned long supported_trgs = (BIT(TRIGGER_NETDEV_FULL_DUPLEX) |

drivers/net/phy/mxl-86110.c

430

static const unsigned long supported_trgs = (BIT(TRIGGER_NETDEV_LINK_10) |

drivers/net/phy/mxl-gpy.c

915

static const unsigned long supported_triggers = (BIT(TRIGGER_NETDEV_LINK) |

drivers/net/wireless/realtek/rtw89/mac.h

1605

#define XTAL_SI_SMALL_PWR_CUT BIT(0)

drivers/net/wireless/realtek/rtw89/mac.h

1606

#define XTAL_SI_BIG_PWR_CUT BIT(1)

drivers/net/wireless/realtek/rtw89/mac.h

1608

#define XTAL_SI_DRV_LATCH BIT(4)

drivers/net/wireless/realtek/rtw89/mac.h

1622

#define XTAL_SI_RDY BIT(5)

drivers/net/wireless/realtek/rtw89/mac.h

1627

#define XTAL_SI_RF00 BIT(0)

drivers/net/wireless/realtek/rtw89/mac.h

1630

#define XTAL_SI_RF10 BIT(0)

drivers/net/wireless/realtek/rtw89/mac.h

1632

#define XTAL_SI_SRAM2RFC BIT(7)

drivers/net/wireless/realtek/rtw89/mac.h

1633

#define XTAL_SI_GND_SHDN_WL BIT(6)

drivers/net/wireless/realtek/rtw89/mac.h

1634

#define XTAL_SI_SHDN_WL BIT(5)

drivers/net/wireless/realtek/rtw89/mac.h

1635

#define XTAL_SI_RFC2RF BIT(4)

drivers/net/wireless/realtek/rtw89/mac.h

1636

#define XTAL_SI_OFF_EI BIT(3)

drivers/net/wireless/realtek/rtw89/mac.h

1637

#define XTAL_SI_OFF_WEI BIT(2)

drivers/net/wireless/realtek/rtw89/mac.h

1638

#define XTAL_SI_PON_EI BIT(1)

drivers/net/wireless/realtek/rtw89/mac.h

1639

#define XTAL_SI_PON_WEI BIT(0)

drivers/net/wireless/realtek/rtw89/mac.h

1641

#define XTAL_SI_SRAM_DIS BIT(1)

drivers/phy/broadcom/phy-bcm63xx-usbh.c

32

#define USBH_UC1_DEV_MODE_SEL BIT(0)

drivers/phy/broadcom/phy-bcm63xx-usbh.c

39

#define USBH_PLLC_XTAL_PWRDWNB BIT(4)

drivers/phy/broadcom/phy-bcm63xx-usbh.c

40

#define USBH_PLLC_PLL_PWRDWNB BIT(5)

drivers/phy/broadcom/phy-bcm63xx-usbh.c

41

#define USBH_PLLC_PLL_CALEN BIT(6)

drivers/phy/broadcom/phy-bcm63xx-usbh.c

42

#define USBH_PLLC_PHYPLL_BYP BIT(7)

drivers/phy/broadcom/phy-bcm63xx-usbh.c

43

#define USBH_PLLC_PLL_RESET BIT(8)

drivers/phy/broadcom/phy-bcm63xx-usbh.c

44

#define USBH_PLLC_PLL_IDDQ_PWRDN BIT(9)

drivers/phy/broadcom/phy-bcm63xx-usbh.c

45

#define USBH_PLLC_PLL_PWRDN_DELAY BIT(10)

drivers/phy/broadcom/phy-bcm63xx-usbh.c

46

#define USBH_6318_PLLC_PLL_SUSPEND_EN BIT(27)

drivers/phy/broadcom/phy-bcm63xx-usbh.c

47

#define USBH_6318_PLLC_PHYPLL_BYP BIT(29)

drivers/phy/broadcom/phy-bcm63xx-usbh.c

48

#define USBH_6318_PLLC_PLL_RESET BIT(30)

drivers/phy/broadcom/phy-bcm63xx-usbh.c

49

#define USBH_6318_PLLC_PLL_IDDQ_PWRDN BIT(31)

drivers/phy/broadcom/phy-bcm63xx-usbh.c

51

#define USBH_SC_OHCI_DATA_SWAP BIT(0)

drivers/phy/broadcom/phy-bcm63xx-usbh.c

52

#define USBH_SC_OHCI_ENDIAN_SWAP BIT(1)

drivers/phy/broadcom/phy-bcm63xx-usbh.c

53

#define USBH_SC_OHCI_LOGICAL_ADDR_EN BIT(2)

drivers/phy/broadcom/phy-bcm63xx-usbh.c

54

#define USBH_SC_EHCI_DATA_SWAP BIT(3)

drivers/phy/broadcom/phy-bcm63xx-usbh.c

55

#define USBH_SC_EHCI_ENDIAN_SWAP BIT(4)

drivers/phy/broadcom/phy-bcm63xx-usbh.c

56

#define USBH_SC_EHCI_LOGICAL_ADDR_EN BIT(5)

drivers/phy/broadcom/phy-bcm63xx-usbh.c

57

#define USBH_SC_USB_DEVICE_SEL BIT(6)

drivers/phy/broadcom/phy-bcm63xx-usbh.c

59

#define USBH_GC_PLL_SUSPEND_EN BIT(1)

drivers/phy/broadcom/phy-bcm63xx-usbh.c

62

#define USBH_S_IOC BIT(4)

drivers/phy/broadcom/phy-bcm63xx-usbh.c

63

#define USBH_S_IPP BIT(5)

drivers/phy/broadcom/phy-bcm63xx-usbh.c

67

#define USBH_USC_LADDR_SEL BIT(5)

drivers/power/reset/piix4-poweroff.c

18

#define PIIX4_FUNC3IO_PMSTS_PWRBTN_STS BIT(8)

drivers/power/reset/piix4-poweroff.c

20

#define PIIX4_FUNC3IO_PMCNTRL_SUS_EN BIT(13)

drivers/usb/gadget/udc/net2280.c

826

BIT(DMA_SCATTER_GATHER_DONE_INTERRUPT) |

include/linux/mfd/rohm-bd71828.h

299

#define BD71828_INT_BUCK_MASK BIT(BD71828_INT_BUCK)

include/linux/mfd/rohm-bd71828.h

301

#define BD71828_INT_DCIN_MASK BIT(BD71828_INT_DCIN)

include/linux/mfd/rohm-bd71828.h

303

#define BD71828_INT_VSYS_MASK BIT(BD71828_INT_VSYS)

include/linux/mfd/rohm-bd71828.h

305

#define BD71828_INT_CHG_MASK BIT(BD71828_INT_CHG)

include/linux/mfd/rohm-bd71828.h

307

#define BD71828_INT_BAT_MASK BIT(BD71828_INT_BAT)

include/linux/mfd/rohm-bd71828.h

309

#define BD71828_INT_BAT_MON_MASK BIT(BD71828_INT_BAT_MON)

include/linux/mfd/rohm-bd71828.h

311

#define BD71828_INT_TEMP_MASK BIT(BD71828_INT_TEMP)

include/linux/mfd/rohm-bd71828.h

313

#define BD71828_INT_RTC_MASK BIT(BD71828_INT_RTC)

include/linux/mfd/rohm-bd72720.h

381

#define BD72720_GPIO_DRIVE_MASK BIT(1)

include/linux/mfd/rohm-bd72720.h

382

#define BD72720_GPIO_HIGH BIT(0)

include/linux/mfd/rohm-bd72720.h

463

#define BD72720_MASK_DCIN_DET BIT(1)

include/linux/mfd/samsung/irq.h

100

#define S2MPG10_IRQ_SMPL_MASK BIT(7)

include/linux/mfd/samsung/irq.h

110

#define S2MPG10_IRQ_INT120C_MASK BIT(0)

include/linux/mfd/samsung/irq.h

111

#define S2MPG10_IRQ_INT140C_MASK BIT(1)

include/linux/mfd/samsung/irq.h

112

#define S2MPG10_IRQ_TSD_MASK BIT(2)

include/linux/mfd/samsung/irq.h

113

#define S2MPG10_IRQ_PIF_TIMEOUT1_MASK BIT(3)

include/linux/mfd/samsung/irq.h

114

#define S2MPG10_IRQ_PIF_TIMEOUT2_MASK BIT(4)

include/linux/mfd/samsung/irq.h

115

#define S2MPG10_IRQ_SPD_PARITY_ERR_MASK BIT(5)

include/linux/mfd/samsung/irq.h

116

#define S2MPG10_IRQ_SPD_ABNORMAL_STOP_MASK BIT(6)

include/linux/mfd/samsung/irq.h

117

#define S2MPG10_IRQ_PMETER_OVERF_MASK BIT(7)

include/linux/mfd/samsung/irq.h

127

#define S2MPG10_IRQ_OCP_B1M_MASK BIT(0)

include/linux/mfd/samsung/irq.h

128

#define S2MPG10_IRQ_OCP_B2M_MASK BIT(1)

include/linux/mfd/samsung/irq.h

129

#define S2MPG10_IRQ_OCP_B3M_MASK BIT(2)

include/linux/mfd/samsung/irq.h

130

#define S2MPG10_IRQ_OCP_B4M_MASK BIT(3)

include/linux/mfd/samsung/irq.h

131

#define S2MPG10_IRQ_OCP_B5M_MASK BIT(4)

include/linux/mfd/samsung/irq.h

132

#define S2MPG10_IRQ_OCP_B6M_MASK BIT(5)

include/linux/mfd/samsung/irq.h

133

#define S2MPG10_IRQ_OCP_B7M_MASK BIT(6)

include/linux/mfd/samsung/irq.h

134

#define S2MPG10_IRQ_OCP_B8M_MASK BIT(7)

include/linux/mfd/samsung/irq.h

142

#define S2MPG10_IRQ_OCP_B9M_MASK BIT(0)

include/linux/mfd/samsung/irq.h

143

#define S2MPG10_IRQ_OCP_B10M_MASK BIT(1)

include/linux/mfd/samsung/irq.h

144

#define S2MPG10_IRQ_WLWP_ACC_MASK BIT(2)

include/linux/mfd/samsung/irq.h

145

#define S2MPG10_IRQ_SMPL_TIMEOUT_MASK BIT(5)

include/linux/mfd/samsung/irq.h

146

#define S2MPG10_IRQ_WTSR_TIMEOUT_MASK BIT(6)

include/linux/mfd/samsung/irq.h

147

#define S2MPG10_IRQ_SPD_SRP_PKT_RST_MASK BIT(7)

include/linux/mfd/samsung/irq.h

157

#define S2MPG10_IRQ_PWR_WARN_CH0_MASK BIT(0)

include/linux/mfd/samsung/irq.h

158

#define S2MPG10_IRQ_PWR_WARN_CH1_MASK BIT(1)

include/linux/mfd/samsung/irq.h

159

#define S2MPG10_IRQ_PWR_WARN_CH2_MASK BIT(2)

include/linux/mfd/samsung/irq.h

160

#define S2MPG10_IRQ_PWR_WARN_CH3_MASK BIT(3)

include/linux/mfd/samsung/irq.h

161

#define S2MPG10_IRQ_PWR_WARN_CH4_MASK BIT(4)

include/linux/mfd/samsung/irq.h

162

#define S2MPG10_IRQ_PWR_WARN_CH5_MASK BIT(5)

include/linux/mfd/samsung/irq.h

163

#define S2MPG10_IRQ_PWR_WARN_CH6_MASK BIT(6)

include/linux/mfd/samsung/irq.h

164

#define S2MPG10_IRQ_PWR_WARN_CH7_MASK BIT(7)

include/linux/mfd/samsung/irq.h

184

#define S2MPG11_IRQ_PWRONF_MASK BIT(0)

include/linux/mfd/samsung/irq.h

185

#define S2MPG11_IRQ_PWRONR_MASK BIT(1)

include/linux/mfd/samsung/irq.h

186

#define S2MPG11_IRQ_PIF_TIMEOUT_MIF_MASK BIT(3)

include/linux/mfd/samsung/irq.h

187

#define S2MPG11_IRQ_PIF_TIMEOUTS_MASK BIT(4)

include/linux/mfd/samsung/irq.h

188

#define S2MPG11_IRQ_WTSR_MASK BIT(5)

include/linux/mfd/samsung/irq.h

189

#define S2MPG11_IRQ_SPD_ABNORMAL_STOP_MASK BIT(6)

include/linux/mfd/samsung/irq.h

190

#define S2MPG11_IRQ_SPD_PARITY_ERR_MASK BIT(7)

include/linux/mfd/samsung/irq.h

198

#define S2MPG11_IRQ_INT140C_MASK BIT(0)

include/linux/mfd/samsung/irq.h

199

#define S2MPG11_IRQ_INT120C_MASK BIT(1)

include/linux/mfd/samsung/irq.h

200

#define S2MPG11_IRQ_TSD_MASK BIT(2)

include/linux/mfd/samsung/irq.h

201

#define S2MPG11_IRQ_WRST_MASK BIT(5)

include/linux/mfd/samsung/irq.h

202

#define S2MPG11_IRQ_NTC_CYCLE_DONE_MASK BIT(6)

include/linux/mfd/samsung/irq.h

203

#define S2MPG11_IRQ_PMETER_OVERF_MASK BIT(7)

include/linux/mfd/samsung/irq.h

213

#define S2MPG11_IRQ_OCP_B1S_MASK BIT(0)

include/linux/mfd/samsung/irq.h

214

#define S2MPG11_IRQ_OCP_B2S_MASK BIT(1)

include/linux/mfd/samsung/irq.h

215

#define S2MPG11_IRQ_OCP_B3S_MASK BIT(2)

include/linux/mfd/samsung/irq.h

216

#define S2MPG11_IRQ_OCP_B4S_MASK BIT(3)

include/linux/mfd/samsung/irq.h

217

#define S2MPG11_IRQ_OCP_B5S_MASK BIT(4)

include/linux/mfd/samsung/irq.h

218

#define S2MPG11_IRQ_OCP_B6S_MASK BIT(5)

include/linux/mfd/samsung/irq.h

219

#define S2MPG11_IRQ_OCP_B7S_MASK BIT(6)

include/linux/mfd/samsung/irq.h

220

#define S2MPG11_IRQ_OCP_B8S_MASK BIT(7)

include/linux/mfd/samsung/irq.h

229

#define S2MPG11_IRQ_OCP_B9S_MASK BIT(0)

include/linux/mfd/samsung/irq.h

230

#define S2MPG11_IRQ_OCP_B10S_MASK BIT(1)

include/linux/mfd/samsung/irq.h

231

#define S2MPG11_IRQ_OCP_BDS_MASK BIT(2)

include/linux/mfd/samsung/irq.h

232

#define S2MPG11_IRQ_OCP_BAS_MASK BIT(3)

include/linux/mfd/samsung/irq.h

233

#define S2MPG11_IRQ_OCP_BBS_MASK BIT(4)

include/linux/mfd/samsung/irq.h

234

#define S2MPG11_IRQ_WLWP_ACC_MASK BIT(5)

include/linux/mfd/samsung/irq.h

235

#define S2MPG11_IRQ_SPD_SRP_PKT_RST_MASK BIT(7)

include/linux/mfd/samsung/irq.h

245

#define S2MPG11_IRQ_PWR_WARN_CH0_MASK BIT(0)

include/linux/mfd/samsung/irq.h

246

#define S2MPG11_IRQ_PWR_WARN_CH1_MASK BIT(1)

include/linux/mfd/samsung/irq.h

247

#define S2MPG11_IRQ_PWR_WARN_CH2_MASK BIT(2)

include/linux/mfd/samsung/irq.h

248

#define S2MPG11_IRQ_PWR_WARN_CH3_MASK BIT(3)

include/linux/mfd/samsung/irq.h

249

#define S2MPG11_IRQ_PWR_WARN_CH4_MASK BIT(4)

include/linux/mfd/samsung/irq.h

250

#define S2MPG11_IRQ_PWR_WARN_CH5_MASK BIT(5)

include/linux/mfd/samsung/irq.h

251

#define S2MPG11_IRQ_PWR_WARN_CH6_MASK BIT(6)

include/linux/mfd/samsung/irq.h

252

#define S2MPG11_IRQ_PWR_WARN_CH7_MASK BIT(7)

include/linux/mfd/samsung/irq.h

262

#define S2MPG11_IRQ_NTC_WARN_CH0_MASK BIT(0)

include/linux/mfd/samsung/irq.h

263

#define S2MPG11_IRQ_NTC_WARN_CH1_MASK BIT(1)

include/linux/mfd/samsung/irq.h

264

#define S2MPG11_IRQ_NTC_WARN_CH2_MASK BIT(2)

include/linux/mfd/samsung/irq.h

265

#define S2MPG11_IRQ_NTC_WARN_CH3_MASK BIT(3)

include/linux/mfd/samsung/irq.h

266

#define S2MPG11_IRQ_NTC_WARN_CH4_MASK BIT(4)

include/linux/mfd/samsung/irq.h

267

#define S2MPG11_IRQ_NTC_WARN_CH5_MASK BIT(5)

include/linux/mfd/samsung/irq.h

268

#define S2MPG11_IRQ_NTC_WARN_CH6_MASK BIT(6)

include/linux/mfd/samsung/irq.h

269

#define S2MPG11_IRQ_NTC_WARN_CH7_MASK BIT(7)

include/linux/mfd/samsung/irq.h

76

#define S2MPG10_IRQ_PWRONF_MASK BIT(0)

include/linux/mfd/samsung/irq.h

77

#define S2MPG10_IRQ_PWRONR_MASK BIT(1)

include/linux/mfd/samsung/irq.h

78

#define S2MPG10_IRQ_JIGONBF_MASK BIT(2)

include/linux/mfd/samsung/irq.h

79

#define S2MPG10_IRQ_JIGONBR_MASK BIT(3)

include/linux/mfd/samsung/irq.h

80

#define S2MPG10_IRQ_ACOKBF_MASK BIT(4)

include/linux/mfd/samsung/irq.h

81

#define S2MPG10_IRQ_ACOKBR_MASK BIT(5)

include/linux/mfd/samsung/irq.h

82

#define S2MPG10_IRQ_PWRON1S_MASK BIT(6)

include/linux/mfd/samsung/irq.h

83

#define S2MPG10_IRQ_MRB_MASK BIT(7)

include/linux/mfd/samsung/irq.h

93

#define S2MPG10_IRQ_RTC60S_MASK BIT(0)

include/linux/mfd/samsung/irq.h

94

#define S2MPG10_IRQ_RTCA1_MASK BIT(1)

include/linux/mfd/samsung/irq.h

95

#define S2MPG10_IRQ_RTCA0_MASK BIT(2)

include/linux/mfd/samsung/irq.h

96

#define S2MPG10_IRQ_RTC1S_MASK BIT(3)

include/linux/mfd/samsung/irq.h

97

#define S2MPG10_IRQ_WTSR_COLDRST_MASK BIT(4)

include/linux/mfd/samsung/irq.h

98

#define S2MPG10_IRQ_WTSR_MASK BIT(5)

include/linux/mfd/samsung/irq.h

99

#define S2MPG10_IRQ_WRST_MASK BIT(6)

include/soc/fsl/qman.h

863

qm_mcr_fqd_link_mask = BIT(24) - 1,

include/soc/fsl/qman.h

864

qm_mcr_odp_seq_mask = BIT(14) - 1,

include/soc/fsl/qman.h

865

qm_mcr_orp_nesn_mask = BIT(14) - 1,

include/soc/fsl/qman.h

866

qm_mcr_orp_ea_hseq_mask = BIT(15) - 1,

include/soc/fsl/qman.h

867

qm_mcr_orp_ea_tseq_mask = BIT(15) - 1,

include/soc/fsl/qman.h

868

qm_mcr_orp_ea_hptr_mask = BIT(24) - 1,

include/soc/fsl/qman.h

869

qm_mcr_orp_ea_tptr_mask = BIT(24) - 1,

include/soc/fsl/qman.h

870

qm_mcr_pfdr_hptr_mask = BIT(24) - 1,

include/soc/fsl/qman.h

871

qm_mcr_pfdr_tptr_mask = BIT(24) - 1,

include/soc/fsl/qman.h

872

qm_mcr_is_mask = BIT(1) - 1,

include/soc/fsl/qman.h

873

qm_mcr_frm_cnt_mask = BIT(24) - 1,

include/vdso/bits.h

7

#define BIT(nr) (UL(1) << (nr))

tools/include/vdso/bits.h

7

#define BIT(nr) (UL(1) << (nr))

tools/mm/page-types.c

98

#define BIT(name) (1ULL << KPF_##name)

tools/perf/util/intel-pt-decoder/intel-pt-pkt-decoder.c

17

#define BIT(n) (1 << (n))

tools/power/x86/intel-speed-select/isst.h

33

#define BIT(x) (1 << (x))

tools/testing/selftests/bpf/prog_tests/btf_skc_cls_ingress.c

22

#define BIT(n) (1 << (n))

tools/testing/selftests/bpf/xdp_metadata.h

21

#define BIT(nr) (1 << (nr))

tools/testing/selftests/net/tun.c

61

#define BIT(nr) (1UL << (nr))