/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */

#ifndef _DT_BINDINGS_CLK_MT6735_TOPCKGEN_H
#define _DT_BINDINGS_CLK_MT6735_TOPCKGEN_H

#define CLK_TOP_AD_SYS_26M_CK           0
#define CLK_TOP_CLKPH_MCK_O             1
#define CLK_TOP_DMPLL                   2
#define CLK_TOP_DPI_CK                  3
#define CLK_TOP_WHPLL_AUDIO_CK          4

#define CLK_TOP_SYSPLL_D2               5
#define CLK_TOP_SYSPLL_D3               6
#define CLK_TOP_SYSPLL_D5               7
#define CLK_TOP_SYSPLL1_D2              8
#define CLK_TOP_SYSPLL1_D4              9
#define CLK_TOP_SYSPLL1_D8              10
#define CLK_TOP_SYSPLL1_D16             11
#define CLK_TOP_SYSPLL2_D2              12
#define CLK_TOP_SYSPLL2_D4              13
#define CLK_TOP_SYSPLL3_D2              14
#define CLK_TOP_SYSPLL3_D4              15
#define CLK_TOP_SYSPLL4_D2              16
#define CLK_TOP_SYSPLL4_D4              17
#define CLK_TOP_UNIVPLL_D2              18
#define CLK_TOP_UNIVPLL_D3              19
#define CLK_TOP_UNIVPLL_D5              20
#define CLK_TOP_UNIVPLL_D26             21
#define CLK_TOP_UNIVPLL1_D2             22
#define CLK_TOP_UNIVPLL1_D4             23
#define CLK_TOP_UNIVPLL1_D8             24
#define CLK_TOP_UNIVPLL2_D2             25
#define CLK_TOP_UNIVPLL2_D4             26
#define CLK_TOP_UNIVPLL2_D8             27
#define CLK_TOP_UNIVPLL3_D2             28
#define CLK_TOP_UNIVPLL3_D4             29
#define CLK_TOP_MSDCPLL_D2              30
#define CLK_TOP_MSDCPLL_D4              31
#define CLK_TOP_MSDCPLL_D8              32
#define CLK_TOP_MSDCPLL_D16             33
#define CLK_TOP_VENCPLL_D3              34
#define CLK_TOP_TVDPLL_D2               35
#define CLK_TOP_TVDPLL_D4               36
#define CLK_TOP_DMPLL_D2                37
#define CLK_TOP_DMPLL_D4                38
#define CLK_TOP_DMPLL_D8                39
#define CLK_TOP_AD_SYS_26M_D2           40

#define CLK_TOP_AXI_SEL                 41
#define CLK_TOP_MEM_SEL                 42
#define CLK_TOP_DDRPHY_SEL              43
#define CLK_TOP_MM_SEL                  44
#define CLK_TOP_PWM_SEL                 45
#define CLK_TOP_VDEC_SEL                46
#define CLK_TOP_MFG_SEL                 47
#define CLK_TOP_CAMTG_SEL               48
#define CLK_TOP_UART_SEL                49
#define CLK_TOP_SPI_SEL                 50
#define CLK_TOP_USB20_SEL               51
#define CLK_TOP_MSDC50_0_SEL            52
#define CLK_TOP_MSDC30_0_SEL            53
#define CLK_TOP_MSDC30_1_SEL            54
#define CLK_TOP_MSDC30_2_SEL            55
#define CLK_TOP_MSDC30_3_SEL            56
#define CLK_TOP_AUDIO_SEL               57
#define CLK_TOP_AUDINTBUS_SEL           58
#define CLK_TOP_PMICSPI_SEL             59
#define CLK_TOP_SCP_SEL                 60
#define CLK_TOP_ATB_SEL                 61
#define CLK_TOP_DPI0_SEL                62
#define CLK_TOP_SCAM_SEL                63
#define CLK_TOP_MFG13M_SEL              64
#define CLK_TOP_AUD1_SEL                65
#define CLK_TOP_AUD2_SEL                66
#define CLK_TOP_IRDA_SEL                67
#define CLK_TOP_IRTX_SEL                68
#define CLK_TOP_DISPPWM_SEL             69

#endif