drivers/clk/mediatek/clk-mt2701.c

496

MUX_GATE(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents,

drivers/clk/mediatek/clk-mt2712.c

650

MUX_GATE(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents, 0x050, 0, 2, 7),

drivers/clk/mediatek/clk-mt6735-topckgen.c

339

MUX_GATE_CLR_SET_UPD(CLK_TOP_PWM_SEL, "pwm_sel", pwm_sel_parents, CLK_CFG_1, CLK_CFG_1_SET, CLK_CFG_1_CLR, 0, 2, 7, 0, 0),

drivers/clk/mediatek/clk-mt6765.c

451

MUX_GATE_CLR_SET_UPD(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents, CLK_CFG_6,

drivers/clk/mediatek/clk-mt6795-topckgen.c

460

TOP_MUX_GATE(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents, 0x50, 0, 2, 7, 0),

drivers/clk/mediatek/clk-mt7622.c

396

MUX_GATE(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents,

drivers/clk/mediatek/clk-mt7629.c

471

MUX_GATE(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents,

drivers/clk/mediatek/clk-mt7981-topckgen.c

303

MUX_GATE_CLR_SET_UPD(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents,

drivers/clk/mediatek/clk-mt7986-topckgen.c

186

MUX_GATE_CLR_SET_UPD(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents, 0x010,

drivers/clk/mediatek/clk-mt7988-topckgen.c

143

MUX_GATE_CLR_SET_UPD(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents, 0x040, 0x044, 0x048, 0, 3, 7,

drivers/clk/mediatek/clk-mt8167.c

610

MUX(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents,

drivers/clk/mediatek/clk-mt8173-topckgen.c

539

MUX_GATE(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents, 0x0050, 0, 2, 7),

drivers/clk/mediatek/clk-mt8192.c

673

MUX_GATE_CLR_SET_UPD(CLK_TOP_PWM_SEL, "pwm_sel",

drivers/clk/mediatek/clk-mt8365.c

490

MUX_GATE_CLR_SET_UPD(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents, 0x0b0,

drivers/clk/mediatek/clk-mt8516.c

421

MUX(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents,