CLK_TOP_AUD2_SEL
MUX_GATE_CLR_SET_UPD(CLK_TOP_AUD2_SEL, "aud_2_sel", aud_1_2_sel_parents, CLK_CFG_6, CLK_CFG_6_SET, CLK_CFG_6_CLR, 8, 1, 15, 0, 0),
MUX_GATE(CLK_TOP_AUD2_SEL, "aud2_sel", aud2_parents,
MUX_GATE(CLK_TOP_AUD2_SEL, "aud2_sel", aud1_parents,
MUX(CLK_TOP_AUD2_SEL, "aud2_sel", aud2_parents,
MUX(CLK_TOP_AUD2_SEL, "aud2_sel", aud2_parents,