arch/arm64/mm/extable.c
72
int reg_data = FIELD_GET(EX_DATA_REG_DATA, ex->data);
arch/arm64/mm/extable.c
89
pt_regs_write_reg(regs, reg_data, data);
arch/powerpc/platforms/powermac/low_i2c.c
291
kw_write_reg(reg_data, *(host->data++));
arch/powerpc/platforms/powermac/low_i2c.c
300
*(host->data++) = kw_read_reg(reg_data);
arch/powerpc/platforms/powermac/low_i2c.c
314
kw_write_reg(reg_data, *(host->data++));
arch/riscv/kernel/traps_misaligned.c
222
union reg_data val;
arch/riscv/kernel/traps_misaligned.c
335
union reg_data val;
arch/riscv/mm/extable.c
65
int reg_data = FIELD_GET(EX_DATA_REG_DATA, ex->data);
arch/riscv/mm/extable.c
76
regs_set_gpr(regs, reg_data * sizeof(unsigned long), data);
arch/s390/mm/extable.c
56
unsigned int reg_data = FIELD_GET(EX_DATA_REG_ERR, ex->data);
arch/s390/mm/extable.c
64
regs->gprs[reg_data] = data;
arch/x86/coco/sev/vc-handle.c
586
long *reg_data;
arch/x86/coco/sev/vc-handle.c
593
reg_data = insn_get_modrm_reg_ptr(insn, ctxt->regs);
arch/x86/coco/sev/vc-handle.c
594
if (!reg_data)
arch/x86/coco/sev/vc-handle.c
603
memcpy(ghcb->shared_buffer, reg_data, bytes);
arch/x86/coco/sev/vc-handle.c
617
*reg_data = 0;
arch/x86/coco/sev/vc-handle.c
619
memcpy(reg_data, ghcb->shared_buffer, bytes);
arch/x86/coco/sev/vc-handle.c
627
memset(reg_data, 0, insn->opnd_bytes);
arch/x86/coco/sev/vc-handle.c
628
memcpy(reg_data, ghcb->shared_buffer, bytes);
arch/x86/coco/sev/vc-handle.c
646
memset(reg_data, sign_byte, insn->opnd_bytes);
arch/x86/coco/sev/vc-handle.c
647
memcpy(reg_data, ghcb->shared_buffer, bytes);
drivers/char/xilinx_hwicap/fifo_icap.c
370
u32 reg_data;
drivers/char/xilinx_hwicap/fifo_icap.c
375
reg_data = in_be32(drvdata->base_address + XHI_CR_OFFSET);
drivers/char/xilinx_hwicap/fifo_icap.c
378
reg_data | XHI_CR_SW_RESET_MASK);
drivers/char/xilinx_hwicap/fifo_icap.c
381
reg_data & (~XHI_CR_SW_RESET_MASK));
drivers/char/xilinx_hwicap/fifo_icap.c
391
u32 reg_data;
drivers/char/xilinx_hwicap/fifo_icap.c
396
reg_data = in_be32(drvdata->base_address + XHI_CR_OFFSET);
drivers/char/xilinx_hwicap/fifo_icap.c
399
reg_data | XHI_CR_FIFO_CLR_MASK);
drivers/char/xilinx_hwicap/fifo_icap.c
402
reg_data & (~XHI_CR_FIFO_CLR_MASK));
drivers/char/xilinx_hwicap/xilinx_hwicap.c
262
u32 reg, u32 *reg_data)
drivers/char/xilinx_hwicap/xilinx_hwicap.c
308
status = drvdata->config->get_configuration(drvdata, reg_data, 1);
drivers/clk/clk-cdce925.c
522
u8 reg_data[2];
drivers/clk/clk-cdce925.c
528
reg_data[0] = CDCE925_I2C_COMMAND_BYTE_TRANSFER | ((u8 *)data)[0];
drivers/clk/clk-cdce925.c
529
reg_data[1] = ((u8 *)data)[1];
drivers/clk/clk-cdce925.c
532
reg_data[0], reg_data[1]);
drivers/clk/clk-cdce925.c
534
ret = i2c_master_send(i2c, reg_data, count);
drivers/clk/clk-cdce925.c
550
u8 reg_data[2];
drivers/clk/clk-cdce925.c
557
xfer[0].buf = reg_data;
drivers/clk/clk-cdce925.c
559
reg_data[0] =
drivers/clk/clk-cdce925.c
563
reg_data[0] =
drivers/clk/clk-cdce925.c
565
reg_data[1] = val_size;
drivers/clk/clk-cdce925.c
577
reg_size, val_size, reg_data[0], *((u8 *)val));
drivers/clk/rockchip/clk-cpu.c
155
const struct rockchip_cpuclk_reg_data *reg_data = cpuclk->reg_data;
drivers/clk/rockchip/clk-cpu.c
182
if (alt_div > reg_data->div_core_mask[0]) {
drivers/clk/rockchip/clk-cpu.c
184
__func__, alt_div, reg_data->div_core_mask[0]);
drivers/clk/rockchip/clk-cpu.c
185
alt_div = reg_data->div_core_mask[0];
drivers/clk/rockchip/clk-cpu.c
198
for (i = 0; i < reg_data->num_cores; i++) {
drivers/clk/rockchip/clk-cpu.c
199
writel(HIWORD_UPDATE(alt_div, reg_data->div_core_mask[i],
drivers/clk/rockchip/clk-cpu.c
200
reg_data->div_core_shift[i]),
drivers/clk/rockchip/clk-cpu.c
201
cpuclk->reg_base + reg_data->core_reg[i]);
drivers/clk/rockchip/clk-cpu.c
208
if (reg_data->mux_core_reg)
drivers/clk/rockchip/clk-cpu.c
209
writel(HIWORD_UPDATE(reg_data->mux_core_alt,
drivers/clk/rockchip/clk-cpu.c
210
reg_data->mux_core_mask,
drivers/clk/rockchip/clk-cpu.c
211
reg_data->mux_core_shift),
drivers/clk/rockchip/clk-cpu.c
212
cpuclk->reg_base + reg_data->mux_core_reg);
drivers/clk/rockchip/clk-cpu.c
214
writel(HIWORD_UPDATE(reg_data->mux_core_alt,
drivers/clk/rockchip/clk-cpu.c
215
reg_data->mux_core_mask,
drivers/clk/rockchip/clk-cpu.c
216
reg_data->mux_core_shift),
drivers/clk/rockchip/clk-cpu.c
217
cpuclk->reg_base + reg_data->core_reg[0]);
drivers/clk/rockchip/clk-cpu.c
226
const struct rockchip_cpuclk_reg_data *reg_data = cpuclk->reg_data;
drivers/clk/rockchip/clk-cpu.c
250
if (reg_data->mux_core_reg)
drivers/clk/rockchip/clk-cpu.c
251
writel(HIWORD_UPDATE(reg_data->mux_core_main,
drivers/clk/rockchip/clk-cpu.c
252
reg_data->mux_core_mask,
drivers/clk/rockchip/clk-cpu.c
253
reg_data->mux_core_shift),
drivers/clk/rockchip/clk-cpu.c
254
cpuclk->reg_base + reg_data->mux_core_reg);
drivers/clk/rockchip/clk-cpu.c
256
writel(HIWORD_UPDATE(reg_data->mux_core_main,
drivers/clk/rockchip/clk-cpu.c
257
reg_data->mux_core_mask,
drivers/clk/rockchip/clk-cpu.c
258
reg_data->mux_core_shift),
drivers/clk/rockchip/clk-cpu.c
259
cpuclk->reg_base + reg_data->core_reg[0]);
drivers/clk/rockchip/clk-cpu.c
264
for (i = 0; i < reg_data->num_cores; i++) {
drivers/clk/rockchip/clk-cpu.c
265
writel(HIWORD_UPDATE(0, reg_data->div_core_mask[i],
drivers/clk/rockchip/clk-cpu.c
266
reg_data->div_core_shift[i]),
drivers/clk/rockchip/clk-cpu.c
267
cpuclk->reg_base + reg_data->core_reg[i]);
drivers/clk/rockchip/clk-cpu.c
302
const struct rockchip_cpuclk_reg_data *reg_data,
drivers/clk/rockchip/clk-cpu.c
321
init.parent_names = &parent_names[reg_data->mux_core_main];
drivers/clk/rockchip/clk-cpu.c
335
cpuclk->reg_data = reg_data;
drivers/clk/rockchip/clk-cpu.c
339
cpuclk->alt_parent = __clk_lookup(parent_names[reg_data->mux_core_alt]);
drivers/clk/rockchip/clk-cpu.c
342
__func__, reg_data->mux_core_alt);
drivers/clk/rockchip/clk-cpu.c
354
clk = __clk_lookup(parent_names[reg_data->mux_core_main]);
drivers/clk/rockchip/clk-cpu.c
357
__func__, reg_data->mux_core_main,
drivers/clk/rockchip/clk-cpu.c
358
parent_names[reg_data->mux_core_main]);
drivers/clk/rockchip/clk-cpu.c
59
const struct rockchip_cpuclk_reg_data *reg_data;
drivers/clk/rockchip/clk-cpu.c
86
const struct rockchip_cpuclk_reg_data *reg_data = cpuclk->reg_data;
drivers/clk/rockchip/clk-cpu.c
87
u32 clksel0 = readl_relaxed(cpuclk->reg_base + reg_data->core_reg[0]);
drivers/clk/rockchip/clk-cpu.c
89
clksel0 >>= reg_data->div_core_shift[0];
drivers/clk/rockchip/clk-cpu.c
90
clksel0 &= reg_data->div_core_mask[0];
drivers/clk/rockchip/clk.c
706
const struct rockchip_cpuclk_reg_data *reg_data,
drivers/clk/rockchip/clk.c
713
reg_data, rates, nrates,
drivers/clk/rockchip/clk.h
1298
const struct rockchip_cpuclk_reg_data *reg_data,
drivers/clk/rockchip/clk.h
700
const struct rockchip_cpuclk_reg_data *reg_data,
drivers/clk/ti/clkctrl.c
514
const struct omap_clkctrl_reg_data *reg_data;
drivers/clk/ti/clkctrl.c
644
reg_data = data->regs;
drivers/clk/ti/clkctrl.c
646
while (reg_data->parent) {
drivers/clk/ti/clkctrl.c
647
if ((reg_data->flags & CLKF_SOC_MASK) &&
drivers/clk/ti/clkctrl.c
648
(reg_data->flags & soc_mask) == 0) {
drivers/clk/ti/clkctrl.c
649
reg_data++;
drivers/clk/ti/clkctrl.c
657
hw->enable_reg.ptr = provider->base + reg_data->offset;
drivers/clk/ti/clkctrl.c
659
_ti_clkctrl_setup_subclks(provider, node, reg_data,
drivers/clk/ti/clkctrl.c
662
if (reg_data->flags & CLKF_SW_SUP)
drivers/clk/ti/clkctrl.c
664
if (reg_data->flags & CLKF_HW_SUP)
drivers/clk/ti/clkctrl.c
666
if (reg_data->flags & CLKF_NO_IDLEST)
drivers/clk/ti/clkctrl.c
669
if (reg_data->clkdm_name)
drivers/clk/ti/clkctrl.c
670
hw->clkdm_name = reg_data->clkdm_name;
drivers/clk/ti/clkctrl.c
674
init.parent_names = ®_data->parent;
drivers/clk/ti/clkctrl.c
677
if (reg_data->flags & CLKF_SET_RATE_PARENT)
drivers/clk/ti/clkctrl.c
681
reg_data->offset, 0,
drivers/clk/ti/clkctrl.c
697
clkctrl_clk->reg_offset = reg_data->offset;
drivers/clk/ti/clkctrl.c
702
reg_data++;
drivers/edac/qcom_edac.c
209
struct llcc_edac_reg_data reg_data = edac_reg_data[err_type];
drivers/edac/qcom_edac.c
216
for (i = 0; i < reg_data.reg_cnt; i++) {
drivers/edac/qcom_edac.c
224
reg_data.name, i, synd_val);
drivers/edac/qcom_edac.c
232
err_cnt &= reg_data.count_mask;
drivers/edac/qcom_edac.c
233
err_cnt >>= reg_data.count_shift;
drivers/edac/qcom_edac.c
235
reg_data.name, err_cnt);
drivers/edac/qcom_edac.c
242
err_ways &= reg_data.ways_mask;
drivers/edac/qcom_edac.c
243
err_ways >>= reg_data.ways_shift;
drivers/edac/qcom_edac.c
246
reg_data.name, err_ways);
drivers/extcon/extcon-ptn5150.c
183
unsigned int reg_data, vendor_id, version_id;
drivers/extcon/extcon-ptn5150.c
186
ret = regmap_read(info->regmap, PTN5150_REG_DEVICE_ID, ®_data);
drivers/extcon/extcon-ptn5150.c
192
vendor_id = FIELD_GET(PTN5150_REG_DEVICE_ID_VENDOR, reg_data);
drivers/extcon/extcon-ptn5150.c
193
version_id = FIELD_GET(PTN5150_REG_DEVICE_ID_VERSION, reg_data);
drivers/extcon/extcon-ptn5150.c
198
ret = regmap_read(info->regmap, PTN5150_REG_INT_STATUS, ®_data);
drivers/extcon/extcon-ptn5150.c
206
ret = regmap_read(info->regmap, PTN5150_REG_INT_REG_STATUS, ®_data);
drivers/extcon/extcon-ptn5150.c
74
unsigned int port_status, reg_data, vbus;
drivers/extcon/extcon-ptn5150.c
78
ret = regmap_read(info->regmap, PTN5150_REG_CC_STATUS, ®_data);
drivers/extcon/extcon-ptn5150.c
84
port_status = FIELD_GET(PTN5150_REG_CC_PORT_ATTACHMENT, reg_data);
drivers/extcon/extcon-ptn5150.c
95
vbus = FIELD_GET(PTN5150_REG_CC_VBUS_DETECTION, reg_data);
drivers/extcon/extcon-rt8973a.c
523
u8 reg = info->reg_data[i].reg;
drivers/extcon/extcon-rt8973a.c
524
u8 mask = info->reg_data[i].mask;
drivers/extcon/extcon-rt8973a.c
527
if (info->reg_data[i].invert)
drivers/extcon/extcon-rt8973a.c
528
val = ~info->reg_data[i].val;
drivers/extcon/extcon-rt8973a.c
530
val = info->reg_data[i].val;
drivers/extcon/extcon-rt8973a.c
55
struct reg_data *reg_data;
drivers/extcon/extcon-rt8973a.c
570
info->reg_data = rt8973a_reg_data;
drivers/extcon/extcon-rt8973a.c
71
static struct reg_data rt8973a_reg_data[] = {
drivers/extcon/extcon-sm5502.c
102
static struct reg_data sm5504_reg_data[] = {
drivers/extcon/extcon-sm5502.c
644
unsigned int reg_data, vendor_id, version_id;
drivers/extcon/extcon-sm5502.c
648
ret = regmap_read(info->regmap, SM5502_REG_DEVICE_ID, ®_data);
drivers/extcon/extcon-sm5502.c
655
vendor_id = ((reg_data & SM5502_REG_DEVICE_ID_VENDOR_MASK) >>
drivers/extcon/extcon-sm5502.c
657
version_id = ((reg_data & SM5502_REG_DEVICE_ID_VERSION_MASK) >>
drivers/extcon/extcon-sm5502.c
66
struct reg_data *reg_data;
drivers/extcon/extcon-sm5502.c
667
if (!info->type->reg_data[i].invert)
drivers/extcon/extcon-sm5502.c
668
val |= ~info->type->reg_data[i].val;
drivers/extcon/extcon-sm5502.c
670
val = info->type->reg_data[i].val;
drivers/extcon/extcon-sm5502.c
671
regmap_write(info->regmap, info->type->reg_data[i].reg, val);
drivers/extcon/extcon-sm5502.c
74
static struct reg_data sm5502_reg_data[] = {
drivers/extcon/extcon-sm5502.c
780
.reg_data = sm5502_reg_data,
drivers/extcon/extcon-sm5502.c
790
.reg_data = sm5504_reg_data,
drivers/gpu/drm/amd/amdgpu/amdgpu.h
1314
u64 reg_addr, u32 reg_data);
drivers/gpu/drm/amd/amdgpu/amdgpu.h
1331
u32 reg_addr, u32 reg_data);
drivers/gpu/drm/amd/amdgpu/amdgpu.h
1333
u32 reg_addr, u64 reg_data);
drivers/gpu/drm/amd/amdgpu/amdgpu.h
1335
u64 reg_addr, u64 reg_data);
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c
1029
uint32_t *reg_data)
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c
1031
*reg_data = wait_times;
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c
1034
*reg_data = REG_SET_FIELD(*reg_data,
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c
1039
*reg_data = REG_SET_FIELD(*reg_data,
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.h
59
uint32_t *reg_data);
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
1085
uint32_t *reg_data)
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
1087
*reg_data = wait_times;
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
1090
*reg_data = REG_SET_FIELD(*reg_data,
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
1095
*reg_data = REG_SET_FIELD(*reg_data,
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.h
105
uint32_t *reg_data);
drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
1478
ATOM_MEMORY_SETTING_DATA_BLOCK *reg_data =
drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
1499
while ((le32_to_cpu(*(u32 *)reg_data) != END_OF_REG_DATA_BLOCK) &&
drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
1501
t_mem_id = (u8)((le32_to_cpu(*(u32 *)reg_data) & MEM_ID_MASK)
drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
1505
(u32)((le32_to_cpu(*(u32 *)reg_data) & CLOCK_RANGE_MASK)
drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
1510
(u32)le32_to_cpu(*((u32 *)reg_data + j));
drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
1521
reg_data = (ATOM_MEMORY_SETTING_DATA_BLOCK *)
drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
1522
((u8 *)reg_data + le16_to_cpu(reg_block->usRegDataBlkSize));
drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
1524
if (le32_to_cpu(*(u32 *)reg_data) != END_OF_REG_DATA_BLOCK)
drivers/gpu/drm/amd/amdgpu/amdgpu_cper.c
144
struct cper_sec_crashdump_reg_data reg_data)
drivers/gpu/drm/amd/amdgpu/amdgpu_cper.c
158
section->body.reg_arr_size = sizeof(reg_data);
drivers/gpu/drm/amd/amdgpu/amdgpu_cper.c
159
section->body.data = reg_data;
drivers/gpu/drm/amd/amdgpu/amdgpu_cper.c
294
struct cper_sec_crashdump_reg_data reg_data = { 0 };
drivers/gpu/drm/amd/amdgpu/amdgpu_cper.c
304
reg_data.status_lo = lower_32_bits(bank->regs[ACA_REG_IDX_STATUS]);
drivers/gpu/drm/amd/amdgpu/amdgpu_cper.c
305
reg_data.status_hi = upper_32_bits(bank->regs[ACA_REG_IDX_STATUS]);
drivers/gpu/drm/amd/amdgpu/amdgpu_cper.c
306
reg_data.addr_lo = lower_32_bits(bank->regs[ACA_REG_IDX_ADDR]);
drivers/gpu/drm/amd/amdgpu/amdgpu_cper.c
307
reg_data.addr_hi = upper_32_bits(bank->regs[ACA_REG_IDX_ADDR]);
drivers/gpu/drm/amd/amdgpu/amdgpu_cper.c
308
reg_data.ipid_lo = lower_32_bits(bank->regs[ACA_REG_IDX_IPID]);
drivers/gpu/drm/amd/amdgpu/amdgpu_cper.c
309
reg_data.ipid_hi = upper_32_bits(bank->regs[ACA_REG_IDX_IPID]);
drivers/gpu/drm/amd/amdgpu/amdgpu_cper.c
310
reg_data.synd_lo = lower_32_bits(bank->regs[ACA_REG_IDX_SYND]);
drivers/gpu/drm/amd/amdgpu/amdgpu_cper.c
311
reg_data.synd_hi = upper_32_bits(bank->regs[ACA_REG_IDX_SYND]);
drivers/gpu/drm/amd/amdgpu/amdgpu_cper.c
314
ret = amdgpu_cper_entry_fill_fatal_section(adev, fatal, 0, reg_data);
drivers/gpu/drm/amd/amdgpu/amdgpu_cper.c
372
uint32_t reg_data[CPER_ACA_REG_COUNT] = { 0 };
drivers/gpu/drm/amd/amdgpu/amdgpu_cper.c
398
reg_data[CPER_ACA_REG_CTL_LO] = lower_32_bits(bank->regs[ACA_REG_IDX_CTL]);
drivers/gpu/drm/amd/amdgpu/amdgpu_cper.c
399
reg_data[CPER_ACA_REG_CTL_HI] = upper_32_bits(bank->regs[ACA_REG_IDX_CTL]);
drivers/gpu/drm/amd/amdgpu/amdgpu_cper.c
400
reg_data[CPER_ACA_REG_STATUS_LO] = lower_32_bits(bank->regs[ACA_REG_IDX_STATUS]);
drivers/gpu/drm/amd/amdgpu/amdgpu_cper.c
401
reg_data[CPER_ACA_REG_STATUS_HI] = upper_32_bits(bank->regs[ACA_REG_IDX_STATUS]);
drivers/gpu/drm/amd/amdgpu/amdgpu_cper.c
402
reg_data[CPER_ACA_REG_ADDR_LO] = lower_32_bits(bank->regs[ACA_REG_IDX_ADDR]);
drivers/gpu/drm/amd/amdgpu/amdgpu_cper.c
403
reg_data[CPER_ACA_REG_ADDR_HI] = upper_32_bits(bank->regs[ACA_REG_IDX_ADDR]);
drivers/gpu/drm/amd/amdgpu/amdgpu_cper.c
404
reg_data[CPER_ACA_REG_MISC0_LO] = lower_32_bits(bank->regs[ACA_REG_IDX_MISC0]);
drivers/gpu/drm/amd/amdgpu/amdgpu_cper.c
405
reg_data[CPER_ACA_REG_MISC0_HI] = upper_32_bits(bank->regs[ACA_REG_IDX_MISC0]);
drivers/gpu/drm/amd/amdgpu/amdgpu_cper.c
406
reg_data[CPER_ACA_REG_CONFIG_LO] = lower_32_bits(bank->regs[ACA_REG_IDX_CONFIG]);
drivers/gpu/drm/amd/amdgpu/amdgpu_cper.c
407
reg_data[CPER_ACA_REG_CONFIG_HI] = upper_32_bits(bank->regs[ACA_REG_IDX_CONFIG]);
drivers/gpu/drm/amd/amdgpu/amdgpu_cper.c
408
reg_data[CPER_ACA_REG_IPID_LO] = lower_32_bits(bank->regs[ACA_REG_IDX_IPID]);
drivers/gpu/drm/amd/amdgpu/amdgpu_cper.c
409
reg_data[CPER_ACA_REG_IPID_HI] = upper_32_bits(bank->regs[ACA_REG_IDX_IPID]);
drivers/gpu/drm/amd/amdgpu/amdgpu_cper.c
410
reg_data[CPER_ACA_REG_SYND_LO] = lower_32_bits(bank->regs[ACA_REG_IDX_SYND]);
drivers/gpu/drm/amd/amdgpu/amdgpu_cper.c
411
reg_data[CPER_ACA_REG_SYND_HI] = upper_32_bits(bank->regs[ACA_REG_IDX_SYND]);
drivers/gpu/drm/amd/amdgpu/amdgpu_cper.c
415
reg_data, CPER_ACA_REG_COUNT);
drivers/gpu/drm/amd/amdgpu/amdgpu_cper.h
77
struct cper_sec_crashdump_reg_data reg_data);
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
1257
u32 reg_addr, u32 reg_data)
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
1272
writel(reg_data, pcie_data_offset);
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
1278
u64 reg_addr, u32 reg_data)
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
1305
writel(reg_data, pcie_data_offset);
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
1326
u32 reg_addr, u64 reg_data)
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
1342
writel((u32)(reg_data & 0xffffffffULL), pcie_data_offset);
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
1347
writel((u32)(reg_data >> 32), pcie_data_offset);
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
1353
u64 reg_addr, u64 reg_data)
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
1380
writel((u32)(reg_data & 0xffffffffULL), pcie_data_offset);
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
1389
writel((u32)(reg_data >> 32), pcie_data_offset);
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
5585
u32 reg_data;
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
5592
reg_data = amdgpu_device_indirect_rreg_ext(adev, reg_addr);
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
5593
if ((reg_data & AMDGPU_RAS_BOOT_STATUS_MASK) == AMDGPU_RAS_BOOT_STEADY_STATUS)
drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c
617
struct amdgpu_smn_reg_data *reg_data;
drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c
638
reg_data = pcie_regs->smn_reg_values;
drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c
645
aqua_read_smn(adev, reg_data, start_addr + n * incrx);
drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c
646
++reg_data;
drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c
706
struct amdgpu_smn_reg_data *reg_data;
drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c
733
reg_data = xgmi_regs->smn_reg_values;
drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c
742
adev, reg_data,
drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c
746
++reg_data;
drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c
749
p = reg_data;
drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c
780
struct amdgpu_smn_reg_data *reg_data;
drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c
807
reg_data = wafl_regs->smn_reg_values;
drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c
815
adev, reg_data,
drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c
819
++reg_data;
drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c
822
p = reg_data;
drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c
892
struct amdgpu_smn_reg_data *reg_data;
drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c
930
reg_data = usr_regs->smn_reg_values;
drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c
937
aqua_read_smn_ext(adev, reg_data,
drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c
939
reg_data++;
drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c
942
p = reg_data;
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
8160
uint32_t reg_data = 0;
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
8225
reg_data = RREG32(reg_idx);
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
8226
reg_data |= CGTS_SA0_WGP00_CU0_TCP_CTRL_REG__TCPI_LS_OVERRIDE_MASK;
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
8227
WREG32(reg_idx, reg_data);
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
8233
reg_data = RREG32(reg_idx);
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
8234
reg_data |= CGTS_SA0_WGP00_CU0_TCP_CTRL_REG__TCPI_LS_OVERRIDE_MASK;
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
8235
WREG32(reg_idx, reg_data);
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
8242
reg_data = RREG32(reg_idx);
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
8243
reg_data &= ~CGTS_SA0_QUAD0_SM_CTRL_REG__SM_MODE_MASK;
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
8244
reg_data |= 2 << CGTS_SA0_QUAD0_SM_CTRL_REG__SM_MODE__SHIFT;
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
8245
WREG32(reg_idx, reg_data);
drivers/gpu/drm/amd/amdgpu/imu_v11_0.c
360
u32 reg_data;
drivers/gpu/drm/amd/amdgpu/imu_v11_0.c
382
reg_data = RREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_INDEX);
drivers/gpu/drm/amd/amdgpu/imu_v11_0.c
383
reg_data |= GFX_IMU_RLC_RAM_INDEX__RAM_VALID_MASK;
drivers/gpu/drm/amd/amdgpu/imu_v11_0.c
384
WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_INDEX, reg_data);
drivers/gpu/drm/amd/amdgpu/imu_v12_0.c
369
u32 reg_data, size = 0;
drivers/gpu/drm/amd/amdgpu/imu_v12_0.c
394
reg_data = RREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_INDEX);
drivers/gpu/drm/amd/amdgpu/imu_v12_0.c
395
reg_data |= GFX_IMU_RLC_RAM_INDEX__RAM_VALID_MASK;
drivers/gpu/drm/amd/amdgpu/imu_v12_0.c
396
WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_INDEX, reg_data);
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c
424
uint32_t reg_data = 0;
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c
427
reg_data = RREG32_SOC15(JPEG, inst_idx, regUVD_JPEG_POWER_STATUS);
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c
428
reg_data &= ~UVD_JPEG_POWER_STATUS__JPEG_POWER_STATUS_MASK;
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c
429
reg_data |= 0x1;
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c
430
WREG32_SOC15(JPEG, inst_idx, regUVD_JPEG_POWER_STATUS, reg_data);
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c
440
reg_data = RREG32_SOC15(JPEG, inst_idx, regUVD_JPEG_POWER_STATUS);
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c
441
reg_data |= UVD_JPEG_POWER_STATUS__JPEG_PG_MODE_MASK;
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c
442
WREG32_SOC15(JPEG, inst_idx, regUVD_JPEG_POWER_STATUS, reg_data);
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c
486
uint32_t reg_data = 0;
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c
488
reg_data = RREG32_SOC15(JPEG, inst_idx, regUVD_JPEG_POWER_STATUS);
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c
489
reg_data &= ~UVD_JPEG_POWER_STATUS__JPEG_PG_MODE_MASK;
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c
490
WREG32_SOC15(JPEG, inst_idx, regUVD_JPEG_POWER_STATUS, reg_data);
drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c
344
uint32_t reg_data = 0;
drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c
349
reg_data = RREG32_SOC15(JPEG, inst_idx, regUVD_JPEG_POWER_STATUS);
drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c
350
reg_data |= UVD_JPEG_POWER_STATUS__JPEG_PG_MODE_MASK;
drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c
351
WREG32_SOC15(JPEG, inst_idx, regUVD_JPEG_POWER_STATUS, reg_data);
drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c
411
uint32_t reg_data = 0;
drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c
413
reg_data = RREG32_SOC15(JPEG, inst_idx, regUVD_JPEG_POWER_STATUS);
drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c
414
reg_data &= ~UVD_JPEG_POWER_STATUS__JPEG_PG_MODE_MASK;
drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c
415
WREG32_SOC15(JPEG, inst_idx, regUVD_JPEG_POWER_STATUS, reg_data);
drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c
327
uint32_t reg_data = 0;
drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c
332
reg_data = RREG32_SOC15(JPEG, inst_idx, regUVD_JPEG_POWER_STATUS);
drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c
333
reg_data |= UVD_JPEG_POWER_STATUS__JPEG_PG_MODE_MASK;
drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c
334
WREG32_SOC15(JPEG, inst_idx, regUVD_JPEG_POWER_STATUS, reg_data);
drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c
394
uint32_t reg_data = 0;
drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c
396
reg_data = RREG32_SOC15(JPEG, inst_idx, regUVD_JPEG_POWER_STATUS);
drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c
397
reg_data &= ~UVD_JPEG_POWER_STATUS__JPEG_PG_MODE_MASK;
drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c
398
WREG32_SOC15(JPEG, inst_idx, regUVD_JPEG_POWER_STATUS, reg_data);
drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
496
uint32_t reg_data = 0;
drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
503
reg_data = RREG32_PCIE(smnPCIE_LC_LINK_WIDTH_CNTL);
drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
504
link_width = (reg_data & PCIE_LC_LINK_WIDTH_CNTL__LC_LINK_WIDTH_RD_MASK)
drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
512
reg_data = RREG32_PCIE(smnPCIE_LC_CNTL6);
drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
513
reg_data &= ~PCIE_LC_CNTL6__LC_SPC_MODE_8GT_MASK;
drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
514
reg_data |= (0x2 << PCIE_LC_CNTL6__LC_SPC_MODE_8GT__SHIFT);
drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
515
WREG32_PCIE(smnPCIE_LC_CNTL6, reg_data);
drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
521
uint32_t reg_data = 0;
drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
526
reg_data = RREG32_PCIE(smnPCIE_LC_LINK_WIDTH_CNTL);
drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
527
reg_data |= PCIE_LC_LINK_WIDTH_CNTL__LC_L1_RECONFIG_EN_MASK;
drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
528
WREG32_PCIE(smnPCIE_LC_LINK_WIDTH_CNTL, reg_data);
drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
533
uint32_t reg, reg_data;
drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
545
reg_data = 1 << BIF_DOORBELL_INT_CNTL__DOORBELL_INTERRUPT_CLEAR__SHIFT;
drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
546
WREG32_SOC15(NBIO, 0, mmBIF_DOORBELL_INT_CNTL, reg_data);
drivers/gpu/drm/amd/amdgpu/psp_v13_0.c
850
uint32_t reg_data;
drivers/gpu/drm/amd/amdgpu/psp_v13_0.c
854
reg_data = RREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_67);
drivers/gpu/drm/amd/amdgpu/psp_v13_0.c
855
WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_67, reg_data + 0x10);
drivers/gpu/drm/amd/amdgpu/psp_v13_0.c
870
u32 reg_data;
drivers/gpu/drm/amd/amdgpu/psp_v13_0.c
884
reg_data = RREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_127);
drivers/gpu/drm/amd/amdgpu/psp_v13_0.c
885
adev->ras_hw_enabled = (reg_data & GENMASK_ULL(23, 0));
drivers/gpu/drm/amd/amdgpu/psp_v13_0.c
886
con->poison_supported = ((reg_data & GENMASK_ULL(24, 24)) >> 24) ? true : false;
drivers/gpu/drm/amd/amdgpu/psp_v15_0_8.c
194
u32 reg_data;
drivers/gpu/drm/amd/amdgpu/psp_v15_0_8.c
203
reg_data = RREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_127);
drivers/gpu/drm/amd/amdgpu/psp_v15_0_8.c
204
adev->ras_hw_enabled = (reg_data & GENMASK_ULL(23, 0));
drivers/gpu/drm/amd/amdgpu/psp_v15_0_8.c
205
con->poison_supported = ((reg_data & GENMASK_ULL(24, 24)) >> 24) ? true : false;
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
1296
uint32_t reg_data = 0;
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
1307
reg_data = RREG32_SOC15(UVD, 0, mmUVD_DPG_PAUSE) &
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
1313
if (!(reg_data & UVD_DPG_PAUSE__JPEG_PAUSE_DPG_ACK_MASK))
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
1320
reg_data |= UVD_DPG_PAUSE__NJ_PAUSE_DPG_REQ_MASK;
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
1321
WREG32_SOC15(UVD, 0, mmUVD_DPG_PAUSE, reg_data);
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
1349
reg_data &= ~UVD_DPG_PAUSE__NJ_PAUSE_DPG_REQ_MASK;
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
1350
WREG32_SOC15(UVD, 0, mmUVD_DPG_PAUSE, reg_data);
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
1362
reg_data = RREG32_SOC15(UVD, 0, mmUVD_DPG_PAUSE) &
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
1368
if (!(reg_data & UVD_DPG_PAUSE__NJ_PAUSE_DPG_ACK_MASK))
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
1380
reg_data |= UVD_DPG_PAUSE__JPEG_PAUSE_DPG_REQ_MASK;
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
1381
WREG32_SOC15(UVD, 0, mmUVD_DPG_PAUSE, reg_data);
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
1409
reg_data &= ~UVD_DPG_PAUSE__JPEG_PAUSE_DPG_REQ_MASK;
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
1410
WREG32_SOC15(UVD, 0, mmUVD_DPG_PAUSE, reg_data);
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
693
uint32_t reg_data = 0;
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
697
reg_data = 1 << JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT;
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
699
reg_data = 0 << JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT;
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
700
reg_data |= 1 << JPEG_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT;
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
701
reg_data |= 4 << JPEG_CGC_CTRL__CLK_OFF_DELAY__SHIFT;
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
702
WREG32_SOC15_DPG_MODE_1_0(UVD, 0, mmJPEG_CGC_CTRL, reg_data, 0xFFFFFFFF, sram_sel);
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
708
reg_data = 1 << UVD_CGC_CTRL__DYN_CLOCK_MODE__SHIFT;
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
710
reg_data = 0 << UVD_CGC_CTRL__DYN_CLOCK_MODE__SHIFT;
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
711
reg_data |= 1 << UVD_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT;
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
712
reg_data |= 4 << UVD_CGC_CTRL__CLK_OFF_DELAY__SHIFT;
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
713
reg_data &= ~(UVD_CGC_CTRL__UDEC_RE_MODE_MASK |
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
733
WREG32_SOC15_DPG_MODE_1_0(UVD, 0, mmUVD_CGC_CTRL, reg_data, 0xFFFFFFFF, sram_sel);
drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
1296
uint32_t reg_data = 0;
drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
1303
reg_data = RREG32_SOC15(UVD, 0, mmUVD_DPG_PAUSE) &
drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
1313
reg_data |= UVD_DPG_PAUSE__NJ_PAUSE_DPG_REQ_MASK;
drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
1314
WREG32_SOC15(UVD, 0, mmUVD_DPG_PAUSE, reg_data);
drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
1360
reg_data &= ~UVD_DPG_PAUSE__NJ_PAUSE_DPG_REQ_MASK;
drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
1361
WREG32_SOC15(UVD, 0, mmUVD_DPG_PAUSE, reg_data);
drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
653
uint32_t reg_data = 0;
drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
657
reg_data = 1 << UVD_CGC_CTRL__DYN_CLOCK_MODE__SHIFT;
drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
659
reg_data = 0 << UVD_CGC_CTRL__DYN_CLOCK_MODE__SHIFT;
drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
660
reg_data |= 1 << UVD_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT;
drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
661
reg_data |= 4 << UVD_CGC_CTRL__CLK_OFF_DELAY__SHIFT;
drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
662
reg_data &= ~(UVD_CGC_CTRL__UDEC_RE_MODE_MASK |
drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
683
UVD, 0, mmUVD_CGC_CTRL), reg_data, sram_sel, indirect);
drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
1657
uint32_t reg_data = 0;
drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
1664
reg_data = RREG32_SOC15(VCN, inst_idx, mmUVD_DPG_PAUSE) &
drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
1675
reg_data |= UVD_DPG_PAUSE__NJ_PAUSE_DPG_REQ_MASK;
drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
1676
WREG32_SOC15(VCN, inst_idx, mmUVD_DPG_PAUSE, reg_data);
drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
1717
reg_data &= ~UVD_DPG_PAUSE__NJ_PAUSE_DPG_REQ_MASK;
drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
1718
WREG32_SOC15(VCN, inst_idx, mmUVD_DPG_PAUSE, reg_data);
drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
864
uint32_t reg_data = 0;
drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
868
reg_data = 1 << UVD_CGC_CTRL__DYN_CLOCK_MODE__SHIFT;
drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
870
reg_data = 0 << UVD_CGC_CTRL__DYN_CLOCK_MODE__SHIFT;
drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
871
reg_data |= 1 << UVD_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT;
drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
872
reg_data |= 4 << UVD_CGC_CTRL__CLK_OFF_DELAY__SHIFT;
drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
873
reg_data &= ~(UVD_CGC_CTRL__UDEC_RE_MODE_MASK |
drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
894
VCN, 0, mmUVD_CGC_CTRL), reg_data, sram_sel, indirect);
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
1720
uint32_t reg_data = 0;
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
1727
reg_data = RREG32_SOC15(VCN, inst_idx, mmUVD_DPG_PAUSE) &
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
1736
reg_data |= UVD_DPG_PAUSE__NJ_PAUSE_DPG_REQ_MASK;
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
1737
WREG32_SOC15(VCN, inst_idx, mmUVD_DPG_PAUSE, reg_data);
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
1787
reg_data &= ~UVD_DPG_PAUSE__NJ_PAUSE_DPG_REQ_MASK;
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
1788
WREG32_SOC15(VCN, inst_idx, mmUVD_DPG_PAUSE, reg_data);
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
914
uint32_t reg_data = 0;
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
918
reg_data = 1 << UVD_CGC_CTRL__DYN_CLOCK_MODE__SHIFT;
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
920
reg_data = 0 << UVD_CGC_CTRL__DYN_CLOCK_MODE__SHIFT;
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
921
reg_data |= 1 << UVD_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT;
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
922
reg_data |= 4 << UVD_CGC_CTRL__CLK_OFF_DELAY__SHIFT;
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
923
reg_data &= ~(UVD_CGC_CTRL__UDEC_RE_MODE_MASK |
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
944
VCN, inst_idx, mmUVD_CGC_CTRL), reg_data, sram_sel, indirect);
drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
1703
uint32_t reg_data = 0;
drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
1710
reg_data = RREG32_SOC15(VCN, inst_idx, regUVD_DPG_PAUSE) &
drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
1719
reg_data |= UVD_DPG_PAUSE__NJ_PAUSE_DPG_REQ_MASK;
drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
1720
WREG32_SOC15(VCN, inst_idx, regUVD_DPG_PAUSE, reg_data);
drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
1732
reg_data &= ~UVD_DPG_PAUSE__NJ_PAUSE_DPG_REQ_MASK;
drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
1733
WREG32_SOC15(VCN, inst_idx, regUVD_DPG_PAUSE, reg_data);
drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
860
uint32_t reg_data = 0;
drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
866
reg_data = 0 << UVD_CGC_CTRL__DYN_CLOCK_MODE__SHIFT;
drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
867
reg_data |= 1 << UVD_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT;
drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
868
reg_data |= 4 << UVD_CGC_CTRL__CLK_OFF_DELAY__SHIFT;
drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
869
reg_data &= ~(UVD_CGC_CTRL__UDEC_RE_MODE_MASK |
drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
889
VCN, inst_idx, regUVD_CGC_CTRL), reg_data, sram_sel, indirect);
drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
1499
uint32_t reg_data = 0;
drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
1506
reg_data = RREG32_SOC15(VCN, inst_idx, regUVD_DPG_PAUSE) &
drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
1515
reg_data |= UVD_DPG_PAUSE__NJ_PAUSE_DPG_REQ_MASK;
drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
1516
WREG32_SOC15(VCN, inst_idx, regUVD_DPG_PAUSE, reg_data);
drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
1525
reg_data &= ~UVD_DPG_PAUSE__NJ_PAUSE_DPG_REQ_MASK;
drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
1526
WREG32_SOC15(VCN, inst_idx, regUVD_DPG_PAUSE, reg_data);
drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
745
uint32_t reg_data = 0;
drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
751
reg_data = 0 << UVD_CGC_CTRL__DYN_CLOCK_MODE__SHIFT;
drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
752
reg_data |= 1 << UVD_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT;
drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
753
reg_data |= 4 << UVD_CGC_CTRL__CLK_OFF_DELAY__SHIFT;
drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
754
reg_data &= ~(UVD_CGC_CTRL__SYS_MODE_MASK |
drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
768
VCN, 0, regUVD_CGC_CTRL), reg_data, sram_sel, indirect);
drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c
1366
uint32_t reg_data = 0;
drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c
1373
reg_data = RREG32_SOC15(VCN, inst_idx, regUVD_DPG_PAUSE) &
drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c
1382
reg_data |= UVD_DPG_PAUSE__NJ_PAUSE_DPG_REQ_MASK;
drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c
1383
WREG32_SOC15(VCN, inst_idx, regUVD_DPG_PAUSE, reg_data);
drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c
1396
reg_data &= ~UVD_DPG_PAUSE__NJ_PAUSE_DPG_REQ_MASK;
drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c
1397
WREG32_SOC15(VCN, inst_idx, regUVD_DPG_PAUSE, reg_data);
drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c
798
uint32_t reg_data = 0;
drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c
804
reg_data = 0 << UVD_CGC_CTRL__DYN_CLOCK_MODE__SHIFT;
drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c
805
reg_data |= 1 << UVD_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT;
drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c
806
reg_data |= 4 << UVD_CGC_CTRL__CLK_OFF_DELAY__SHIFT;
drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c
807
reg_data &= ~(UVD_CGC_CTRL__UDEC_RE_MODE_MASK |
drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c
827
VCN, inst_idx, regUVD_CGC_CTRL), reg_data, sram_sel, indirect);
drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c
1094
uint32_t reg_data = 0;
drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c
1101
reg_data = RREG32_SOC15(VCN, inst_idx, regUVD_DPG_PAUSE) &
drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c
1110
reg_data |= UVD_DPG_PAUSE__NJ_PAUSE_DPG_REQ_MASK;
drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c
1111
WREG32_SOC15(VCN, inst_idx, regUVD_DPG_PAUSE, reg_data);
drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c
1120
reg_data &= ~UVD_DPG_PAUSE__NJ_PAUSE_DPG_REQ_MASK;
drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c
1121
WREG32_SOC15(VCN, inst_idx, regUVD_DPG_PAUSE, reg_data);
drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c
624
uint32_t reg_data = 0;
drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c
634
reg_data = RREG32_SOC15(VCN, vcn_inst, regUVD_DPG_PAUSE) &
drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c
639
reg_data |= UVD_DPG_PAUSE__NJ_PAUSE_DPG_REQ_MASK;
drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c
640
WREG32_SOC15(VCN, vcn_inst, regUVD_DPG_PAUSE, reg_data);
drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c
648
reg_data &= ~UVD_DPG_PAUSE__NJ_PAUSE_DPG_REQ_MASK;
drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c
649
WREG32_SOC15(VCN, vcn_inst, regUVD_DPG_PAUSE, reg_data);
drivers/gpu/drm/amd/amdkfd/kfd_packet_manager_v9.c
301
uint32_t *reg_data)
drivers/gpu/drm/amd/amdkfd/kfd_packet_manager_v9.c
309
reg_data);
drivers/gpu/drm/amd/amdkfd/kfd_packet_manager_v9.c
326
uint32_t reg_data = 0;
drivers/gpu/drm/amd/amdkfd/kfd_packet_manager_v9.c
350
®_offset, ®_data);
drivers/gpu/drm/amd/amdkfd/kfd_packet_manager_v9.c
356
pm_build_dequeue_wait_counts_packet_info(pm, 0, 0, ®_offset, ®_data);
drivers/gpu/drm/amd/amdkfd/kfd_packet_manager_v9.c
366
pm_build_dequeue_wait_counts_packet_info(pm, value, 0, ®_offset, ®_data);
drivers/gpu/drm/amd/amdkfd/kfd_packet_manager_v9.c
385
packet->data = reg_data;
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
2322
bool dmub_lsdma_send_poll_reg_write_command(struct dc_dmub_srv *dc_dmub_srv, uint32_t reg_addr, uint32_t reg_data)
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
2337
lsdma_data->u.reg_write_data.reg_data = reg_data;
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h
300
bool dmub_lsdma_send_poll_reg_write_command(struct dc_dmub_srv *dc_dmub_srv, uint32_t reg_addr, uint32_t reg_data);
drivers/gpu/drm/amd/display/dc/dce/dce_audio.c
57
uint32_t reg_data)
drivers/gpu/drm/amd/display/dc/dce/dce_audio.c
67
AZALIA_ENDPOINT_REG_DATA, reg_data);
drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c
245
uint32_t reg_data;
drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c
247
reg_data = dm_read_reg(compressor->ctx, mmFBC_CNTL);
drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c
248
set_reg_field_value(reg_data, 0, FBC_CNTL, FBC_GRPH_COMP_EN);
drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c
249
dm_write_reg(compressor->ctx, mmFBC_CNTL, reg_data);
drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c
633
uint32_t reg_data = 0;
drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c
658
reg_data,
drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c
664
reg_data,
drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c
669
dm_write_reg(xfm->ctx, mmLBV_DATA_FORMAT, reg_data);
drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c
420
uint32_t reg_data;
drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c
422
reg_data = dm_read_reg(compressor->ctx, mmFBC_CNTL);
drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c
423
set_reg_field_value(reg_data, 0, FBC_CNTL, FBC_GRPH_COMP_EN);
drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c
424
dm_write_reg(compressor->ctx, mmFBC_CNTL, reg_data);
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
2411
uint32_t reg_data;
drivers/gpu/drm/amd/include/kgd_kfd_interface.h
321
uint32_t *reg_data);
drivers/gpu/drm/amd/pm/powerplay/hwmgr/ppatomctrl.c
53
ATOM_MEMORY_SETTING_DATA_BLOCK *reg_data = (ATOM_MEMORY_SETTING_DATA_BLOCK *)
drivers/gpu/drm/amd/pm/powerplay/hwmgr/ppatomctrl.c
58
while (*(uint32_t *)reg_data != END_OF_REG_DATA_BLOCK &&
drivers/gpu/drm/amd/pm/powerplay/hwmgr/ppatomctrl.c
60
tmem_id = (uint8_t)((*(uint32_t *)reg_data & MEM_ID_MASK) >> MEM_ID_SHIFT);
drivers/gpu/drm/amd/pm/powerplay/hwmgr/ppatomctrl.c
64
(uint32_t)((*(uint32_t *)reg_data & CLOCK_RANGE_MASK) >>
drivers/gpu/drm/amd/pm/powerplay/hwmgr/ppatomctrl.c
71
(uint32_t)*((uint32_t *)reg_data + j);
drivers/gpu/drm/amd/pm/powerplay/hwmgr/ppatomctrl.c
83
reg_data = (ATOM_MEMORY_SETTING_DATA_BLOCK *)
drivers/gpu/drm/amd/pm/powerplay/hwmgr/ppatomctrl.c
84
((uint8_t *)reg_data + le16_to_cpu(reg_block->usRegDataBlkSize)) ;
drivers/gpu/drm/amd/pm/powerplay/hwmgr/ppatomctrl.c
87
PP_ASSERT_WITH_CODE((*(uint32_t *)reg_data == END_OF_REG_DATA_BLOCK),
drivers/gpu/drm/amd/pm/powerplay/smumgr/smu8_smumgr.c
176
uint32_t reg_data;
drivers/gpu/drm/amd/pm/powerplay/smumgr/smu8_smumgr.c
206
reg_data = lower_32_bits(info.mc_addr) &
drivers/gpu/drm/amd/pm/powerplay/smumgr/smu8_smumgr.c
208
cgs_write_register(hwmgr->device, mmCP_CPC_IC_BASE_LO, reg_data);
drivers/gpu/drm/amd/pm/powerplay/smumgr/smu8_smumgr.c
210
reg_data = upper_32_bits(info.mc_addr) &
drivers/gpu/drm/amd/pm/powerplay/smumgr/smu8_smumgr.c
212
cgs_write_register(hwmgr->device, mmCP_CPC_IC_BASE_HI, reg_data);
drivers/gpu/drm/i915/gvt/edid.c
302
u32 reg_data = 0;
drivers/gpu/drm/i915/gvt/edid.c
315
reg_data |= (byte_data << (i << 3));
drivers/gpu/drm/i915/gvt/edid.c
318
memcpy(&vgpu_vreg(vgpu, offset), ®_data, byte_count);
drivers/gpu/drm/i915/i915_perf.c
2160
const struct i915_oa_reg *reg_data,
drivers/gpu/drm/i915/i915_perf.c
2173
*cs++ = i915_mmio_reg_offset(reg_data[i].addr);
drivers/gpu/drm/i915/i915_perf.c
2174
*cs++ = reg_data[i].value;
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
1003
u32 size = ARRAY_SIZE(reg_data);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
1004
u32 reg[ARRAY_SIZE(reg_data)];
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
1005
u32 data[ARRAY_SIZE(reg_data)];
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
1009
rd = ®_data[i];
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
1018
reg[i] = reg_data[i].reg_id;
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
995
struct hdmi_hdcp_reg_data reg_data[] = {
drivers/gpu/drm/radeon/radeon_atombios.c
4000
ATOM_MEMORY_SETTING_DATA_BLOCK *reg_data =
drivers/gpu/drm/radeon/radeon_atombios.c
4021
while ((le32_to_cpu(*(u32 *)reg_data) != END_OF_REG_DATA_BLOCK) &&
drivers/gpu/drm/radeon/radeon_atombios.c
4023
t_mem_id = (u8)((le32_to_cpu(*(u32 *)reg_data) & MEM_ID_MASK)
drivers/gpu/drm/radeon/radeon_atombios.c
4027
(u32)((le32_to_cpu(*(u32 *)reg_data) & CLOCK_RANGE_MASK)
drivers/gpu/drm/radeon/radeon_atombios.c
4032
(u32)le32_to_cpu(*((u32 *)reg_data + j));
drivers/gpu/drm/radeon/radeon_atombios.c
4041
reg_data = (ATOM_MEMORY_SETTING_DATA_BLOCK *)
drivers/gpu/drm/radeon/radeon_atombios.c
4042
((u8 *)reg_data + le16_to_cpu(reg_block->usRegDataBlkSize));
drivers/gpu/drm/radeon/radeon_atombios.c
4044
if (le32_to_cpu(*(u32 *)reg_data) != END_OF_REG_DATA_BLOCK)
drivers/gpu/drm/xe/xe_gt_sriov_pf_service.c
286
static_assert(hxg_sizeof(struct reg_data) == 2);
drivers/gpu/drm/xe/xe_gt_sriov_pf_service.c
290
struct reg_data *data, u32 *remaining)
drivers/gpu/drm/xe/xe_gt_sriov_pf_service.c
319
const u32 chunk_size = hxg_sizeof(struct reg_data);
drivers/gpu/drm/xe/xe_gt_sriov_pf_service.c
320
struct reg_data *reg_data_buf;
drivers/gpu/drm/xe/xe_gt_sriov_pf_service.c
353
return VF2PF_QUERY_RUNTIME_RESPONSE_MSG_MIN_LEN + ret * hxg_sizeof(struct reg_data);
drivers/gpu/drm/xe/xe_oa.c
669
static void write_cs_mi_lri(struct xe_bb *bb, const struct xe_oa_reg *reg_data, u32 n_regs)
drivers/gpu/drm/xe/xe_oa.c
682
bb->cs[bb->len++] = reg_data[i].addr.addr;
drivers/gpu/drm/xe/xe_oa.c
683
bb->cs[bb->len++] = reg_data[i].value;
drivers/iio/adc/ad4170-4.c
2540
int reg_data, ret;
drivers/iio/adc/ad4170-4.c
2563
reg_data = FIELD_PREP(AD4170_PIN_MUXING_DIG_AUX1_CTRL_MSK,
drivers/iio/adc/ad4170-4.c
2569
AD4170_PIN_MUXING_DIG_AUX1_CTRL_MSK, reg_data);
drivers/iio/adc/pac1934.c
312
struct reg_data chip_reg_data;
drivers/iio/adc/pac1934.c
598
struct reg_data *reg_data;
drivers/iio/adc/pac1934.c
622
reg_data = &info->chip_reg_data;
drivers/iio/adc/pac1934.c
626
(u8 *)reg_data->meas_regs, PAC1934_MEAS_REG_LEN);
drivers/iio/adc/pac1934.c
635
samp_rate = samp_rate_map_tbl[((reg_data->ctrl_regs[PAC1934_CTRL_LAT_REG_OFF]) >> 6)];
drivers/iio/adc/pac1934.c
638
ctrl_regs_tmp = reg_data->ctrl_regs[PAC1934_CHANNEL_DIS_LAT_REG_OFF];
drivers/iio/adc/pac1934.c
639
offset_reg_data_p = ®_data->meas_regs[PAC1934_ACC_REG_LEN];
drivers/iio/adc/pac1934.c
654
reg_data->vpower_acc[cnt] = sign_extend64(tmp_energy, 47);
drivers/iio/adc/pac1934.c
656
reg_data->vpower_acc[cnt] = tmp_energy;
drivers/iio/adc/pac1934.c
663
inc = (reg_data->vpower_acc[cnt] >> samp_shift);
drivers/iio/adc/pac1934.c
668
reg_data->energy_sec_acc[cnt] = clamp(curr_energy,
drivers/iio/adc/pac1934.c
684
reg_data->vbus[cnt] = sign_extend32((u32)(tmp_value), 15);
drivers/iio/adc/pac1934.c
686
reg_data->vbus[cnt] = tmp_value;
drivers/iio/adc/pac1934.c
699
reg_data->vsense[cnt] = sign_extend32((u32)(tmp_value), 15);
drivers/iio/adc/pac1934.c
701
reg_data->vsense[cnt] = tmp_value;
drivers/iio/adc/pac1934.c
714
reg_data->vbus_avg[cnt] = sign_extend32((u32)(tmp_value), 15);
drivers/iio/adc/pac1934.c
716
reg_data->vbus_avg[cnt] = tmp_value;
drivers/iio/adc/pac1934.c
729
reg_data->vsense_avg[cnt] = sign_extend32((u32)(tmp_value), 15);
drivers/iio/adc/pac1934.c
731
reg_data->vsense_avg[cnt] = tmp_value;
drivers/iio/adc/pac1934.c
744
reg_data->vpower[cnt] = sign_extend32(tmp, 27);
drivers/iio/adc/pac1934.c
746
reg_data->vpower[cnt] = tmp;
drivers/iio/dummy/iio_dummy_evgen.c
147
iio_evgen->regs[this_attr->address].reg_data = event;
drivers/iio/dummy/iio_dummy_evgen.h
7
u32 reg_data;
drivers/iio/dummy/iio_simple_dummy_events.c
181
st->regs->reg_id, st->regs->reg_data);
drivers/iio/dummy/iio_simple_dummy_events.c
183
switch (st->regs->reg_data) {
drivers/iio/imu/smi240.c
231
u16 reg_data;
drivers/iio/imu/smi240.c
242
memcpy(®_data, &data_ptr[1], sizeof(reg_data));
drivers/iio/imu/smi240.c
247
request |= FIELD_PREP(SMI240_WRITE_DATA_MASK, reg_data);
drivers/iio/magnetometer/tmag5273.c
160
__be16 reg_data[4];
drivers/iio/magnetometer/tmag5273.c
179
ret = regmap_bulk_read(data->map, TMAG5273_T_MSB_RESULT, reg_data,
drivers/iio/magnetometer/tmag5273.c
180
sizeof(reg_data));
drivers/iio/magnetometer/tmag5273.c
183
*t = be16_to_cpu(reg_data[0]);
drivers/iio/magnetometer/tmag5273.c
184
*x = be16_to_cpu(reg_data[1]);
drivers/iio/magnetometer/tmag5273.c
185
*y = be16_to_cpu(reg_data[2]);
drivers/iio/magnetometer/tmag5273.c
186
*z = be16_to_cpu(reg_data[3]);
drivers/iio/magnetometer/tmag5273.c
189
®_data[0], sizeof(reg_data[0]));
drivers/iio/magnetometer/tmag5273.c
197
*angle = be16_to_cpu(reg_data[0]);
drivers/iio/proximity/aw96103.c
498
u32 i, reg_data;
drivers/iio/proximity/aw96103.c
505
reg_data = get_unaligned_le32(aw_bin_data_s->data +
drivers/iio/proximity/aw96103.c
511
aw96103->hostirqen = reg_data;
drivers/iio/proximity/aw96103.c
516
reg_data);
drivers/iio/proximity/aw96103.c
518
ret = regmap_write(aw96103->regmap, reg_addr, reg_data);
drivers/iio/proximity/aw96103.c
706
u32 reg_data;
drivers/iio/proximity/aw96103.c
715
®_data);
drivers/iio/proximity/aw96103.c
719
if (FIELD_GET(AW96103_INITOVERIRQ_MASK, reg_data))
drivers/input/misc/ims-pcu.c
1332
static DEVICE_ATTR(reg_data, S_IRUGO | S_IWUSR,
drivers/input/mouse/cyapa.h
409
int cyapa_pip_state_parse(struct cyapa *cyapa, u8 *reg_data, int len);
drivers/input/mouse/cyapa_gen3.c
334
static int cyapa_gen3_state_parse(struct cyapa *cyapa, u8 *reg_data, int len)
drivers/input/mouse/cyapa_gen3.c
339
if (reg_data[REG_BL_FILE] == BL_FILE &&
drivers/input/mouse/cyapa_gen3.c
340
reg_data[REG_BL_ERROR] == BL_ERROR_NO_ERR_IDLE &&
drivers/input/mouse/cyapa_gen3.c
341
(reg_data[REG_BL_STATUS] ==
drivers/input/mouse/cyapa_gen3.c
343
reg_data[REG_BL_STATUS] == BL_STATUS_RUNNING)) {
drivers/input/mouse/cyapa_gen3.c
351
} else if (reg_data[REG_BL_FILE] == BL_FILE &&
drivers/input/mouse/cyapa_gen3.c
352
(reg_data[REG_BL_STATUS] & BL_STATUS_RUNNING) ==
drivers/input/mouse/cyapa_gen3.c
355
if (reg_data[REG_BL_STATUS] & BL_STATUS_BUSY) {
drivers/input/mouse/cyapa_gen3.c
358
if ((reg_data[REG_BL_ERROR] & BL_ERROR_BOOTLOADING) ==
drivers/input/mouse/cyapa_gen3.c
364
} else if ((reg_data[REG_OP_STATUS] & OP_STATUS_SRC) &&
drivers/input/mouse/cyapa_gen3.c
365
(reg_data[REG_OP_DATA1] & OP_DATA_VALID)) {
drivers/input/mouse/cyapa_gen3.c
371
if (GEN3_FINGER_NUM(reg_data[REG_OP_DATA1]) <=
drivers/input/mouse/cyapa_gen3.c
377
} else if (reg_data[REG_OP_STATUS] == 0x0C &&
drivers/input/mouse/cyapa_gen3.c
378
reg_data[REG_OP_DATA1] == 0x08) {
drivers/input/mouse/cyapa_gen3.c
382
} else if (reg_data[REG_BL_STATUS] &
drivers/input/mouse/cyapa_gen5.c
1001
reg_data[2] == GEN5_BL_REPORT_DESCRIPTOR_ID) {
drivers/input/mouse/cyapa_gen5.c
1005
} else if (reg_data[2] == PIP_TOUCH_REPORT_ID ||
drivers/input/mouse/cyapa_gen5.c
1006
reg_data[2] == PIP_BTN_REPORT_ID ||
drivers/input/mouse/cyapa_gen5.c
1007
reg_data[2] == GEN5_OLD_PUSH_BTN_REPORT_ID ||
drivers/input/mouse/cyapa_gen5.c
1008
reg_data[2] == PIP_PUSH_BTN_REPORT_ID ||
drivers/input/mouse/cyapa_gen5.c
1009
reg_data[2] == PIP_WAKEUP_EVENT_REPORT_ID) {
drivers/input/mouse/cyapa_gen5.c
1010
gen5_report_data_header_parse(cyapa, reg_data);
drivers/input/mouse/cyapa_gen5.c
1011
} else if (reg_data[2] == PIP_BL_RESP_REPORT_ID ||
drivers/input/mouse/cyapa_gen5.c
1012
reg_data[2] == PIP_APP_RESP_REPORT_ID) {
drivers/input/mouse/cyapa_gen5.c
1013
gen5_cmd_resp_header_parse(cyapa, reg_data);
drivers/input/mouse/cyapa_gen5.c
834
static int gen5_hid_description_header_parse(struct cyapa *cyapa, u8 *reg_data)
drivers/input/mouse/cyapa_gen5.c
855
if (reg_data[PIP_RESP_REPORT_ID_OFFSET] ==
drivers/input/mouse/cyapa_gen5.c
892
static int gen5_report_data_header_parse(struct cyapa *cyapa, u8 *reg_data)
drivers/input/mouse/cyapa_gen5.c
896
length = get_unaligned_le16(®_data[PIP_RESP_LENGTH_OFFSET]);
drivers/input/mouse/cyapa_gen5.c
897
switch (reg_data[PIP_RESP_REPORT_ID_OFFSET]) {
drivers/input/mouse/cyapa_gen5.c
923
static int gen5_cmd_resp_header_parse(struct cyapa *cyapa, u8 *reg_data)
drivers/input/mouse/cyapa_gen5.c
934
length = get_unaligned_le16(®_data[PIP_RESP_LENGTH_OFFSET]);
drivers/input/mouse/cyapa_gen5.c
941
if (reg_data[PIP_RESP_REPORT_ID_OFFSET] ==
drivers/input/mouse/cyapa_gen5.c
977
static int cyapa_gen5_state_parse(struct cyapa *cyapa, u8 *reg_data, int len)
drivers/input/mouse/cyapa_gen5.c
981
if (!reg_data || len < 3)
drivers/input/mouse/cyapa_gen5.c
987
length = get_unaligned_le16(®_data[PIP_RESP_LENGTH_OFFSET]);
drivers/input/mouse/cyapa_gen5.c
991
(reg_data[2] == PIP_HID_BL_REPORT_ID ||
drivers/input/mouse/cyapa_gen5.c
992
reg_data[2] == PIP_HID_APP_REPORT_ID)) {
drivers/input/mouse/cyapa_gen5.c
993
gen5_hid_description_header_parse(cyapa, reg_data);
drivers/input/mouse/cyapa_gen5.c
996
reg_data[2] == GEN5_APP_REPORT_DESCRIPTOR_ID) {
drivers/input/mouse/cyapa_gen6.c
136
int cyapa_pip_state_parse(struct cyapa *cyapa, u8 *reg_data, int len)
drivers/media/dvb-frontends/drxk_hard.c
2450
u16 reg_data = 0;
drivers/media/dvb-frontends/drxk_hard.c
2479
®_data);
drivers/media/dvb-frontends/drxk_hard.c
2483
eq_reg_td_sqr_err_i = (u32) reg_data;
drivers/media/dvb-frontends/drxk_hard.c
2488
status = read16(state, OFDM_EQ_TOP_TD_SQR_ERR_Q__A, ®_data);
drivers/media/dvb-frontends/drxk_hard.c
2492
eq_reg_td_sqr_err_q = (u32) reg_data;
drivers/media/dvb-frontends/mxl5xx.c
516
u32 reg_data = 0;
drivers/media/dvb-frontends/mxl5xx.c
523
®_data);
drivers/media/dvb-frontends/mxl5xx.c
528
p->cnr.stat[0].svalue = (s16)reg_data * 10;
drivers/media/dvb-frontends/mxl5xx.c
594
u32 reg_data = 0;
drivers/media/dvb-frontends/mxl5xx.c
600
®_data);
drivers/media/dvb-frontends/mxl5xx.c
605
p->strength.stat[0].svalue = (s16) reg_data * 10; /* fix scale */
drivers/media/dvb-frontends/mxl5xx.c
614
u32 reg_data = 0;
drivers/media/dvb-frontends/mxl5xx.c
620
®_data);
drivers/media/dvb-frontends/mxl5xx.c
624
*status = (reg_data == 1) ? 0x1f : 0;
drivers/media/dvb-frontends/mxl5xx.c
683
u32 reg_data[MXL_DEMOD_CHAN_PARAMS_BUFF_SIZE];
drivers/media/dvb-frontends/mxl5xx.c
692
(u8 *) ®_data[0]);
drivers/media/dvb-frontends/mxl5xx.c
703
freq * 1000, reg_data[DMD_STANDARD_ADDR],
drivers/media/dvb-frontends/mxl5xx.c
704
reg_data[DMD_SYMBOL_RATE_ADDR]);
drivers/media/dvb-frontends/mxl5xx.c
705
p->symbol_rate = reg_data[DMD_SYMBOL_RATE_ADDR];
drivers/media/dvb-frontends/mxl5xx.c
716
p->fec_inner = conv_fec(reg_data[DMD_FEC_CODE_RATE_ADDR]);
drivers/media/dvb-frontends/mxl5xx.c
722
reg_data[DMD_DVBS2_PILOT_ON_OFF_ADDR]) {
drivers/media/dvb-frontends/mxl5xx.c
735
reg_data[DMD_MODULATION_SCHEME_ADDR]) {
drivers/media/dvb-frontends/mxl5xx.c
746
reg_data[DMD_SPECTRUM_ROLL_OFF_ADDR]) {
drivers/media/dvb-frontends/mxl5xx.c
960
u32 reg_data = 0;
drivers/media/dvb-frontends/mxl5xx.c
996
status = read_register(state, HYDRA_PRCM_ROOT_CLK_REG, ®_data);
drivers/media/dvb-frontends/stv0900_core.c
118
u8 reg_data)
drivers/media/dvb-frontends/stv0900_core.c
131
data[2] = reg_data;
drivers/media/dvb-frontends/stv0900_priv.h
340
u16 reg_addr, u8 reg_data);
drivers/media/i2c/ov5640.c
1001
.reg_data = ov5640_setting_low_res,
drivers/media/i2c/ov5640.c
1044
.reg_data = ov5640_setting_720P_1280_720,
drivers/media/i2c/ov5640.c
1089
.reg_data = ov5640_setting_1080P_1920_1080,
drivers/media/i2c/ov5640.c
1133
.reg_data = ov5640_setting_QSXGA_2592_1944,
drivers/media/i2c/ov5640.c
2161
if (!mode->reg_data)
drivers/media/i2c/ov5640.c
2193
ov5640_load_regs(sensor, mode->reg_data, mode->reg_data_size);
drivers/media/i2c/ov5640.c
2314
if (!mode->reg_data)
drivers/media/i2c/ov5640.c
2318
ov5640_load_regs(sensor, mode->reg_data, mode->reg_data_size);
drivers/media/i2c/ov5640.c
399
const struct reg_value *reg_data;
drivers/media/i2c/ov5640.c
735
.reg_data = ov5640_setting_low_res,
drivers/media/i2c/ov5640.c
780
.reg_data = ov5640_setting_low_res,
drivers/media/i2c/ov5640.c
825
.reg_data = ov5640_setting_low_res,
drivers/media/i2c/ov5640.c
870
.reg_data = ov5640_setting_low_res,
drivers/media/i2c/ov5640.c
914
.reg_data = ov5640_setting_low_res,
drivers/media/i2c/ov5640.c
958
.reg_data = ov5640_setting_low_res,
drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c
63
s32 reg_data;
drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c
985
val = r->reg_data;
drivers/media/platform/rockchip/rkisp1/rkisp1-params.c
1292
unsigned int reg_addr, unsigned int reg_data,
drivers/media/platform/rockchip/rkisp1/rkisp1-params.c
1297
rkisp1_write(params->rkisp1, reg_data, curve[i]);
drivers/media/tuners/xc5000.c
484
u16 reg_data;
drivers/media/tuners/xc5000.c
487
result = xc5000_readreg(priv, XREG_FREQ_ERROR, ®_data);
drivers/media/tuners/xc5000.c
491
tmp = (u32)reg_data;
drivers/media/tuners/xc5000.c
527
u16 reg_data;
drivers/media/tuners/xc5000.c
530
result = xc5000_readreg(priv, XREG_HSYNC_FREQ, ®_data);
drivers/media/tuners/xc5000.c
534
(*hsync_freq_hz) = ((reg_data & 0x0fff) * 763)/100;
drivers/media/usb/gspca/m5602/m5602_s5k83a.c
165
static int s5k83a_get_rotation(struct sd *sd, u8 *reg_data);
drivers/media/usb/gspca/m5602/m5602_s5k83a.c
527
static int s5k83a_get_rotation(struct sd *sd, u8 *reg_data)
drivers/media/usb/gspca/m5602/m5602_s5k83a.c
529
int err = m5602_read_bridge(sd, M5602_XB_GPIO_DAT, reg_data);
drivers/media/usb/gspca/m5602/m5602_s5k83a.c
530
*reg_data = (*reg_data & S5K83A_GPIO_ROTATION_MASK) ? 0 : 1;
drivers/mfd/da9150-core.c
67
u8 *reg_data;
drivers/mfd/da9150-core.c
70
reg_data = kzalloc(1 + count, GFP_KERNEL);
drivers/mfd/da9150-core.c
71
if (!reg_data)
drivers/mfd/da9150-core.c
74
reg_data[0] = addr;
drivers/mfd/da9150-core.c
75
memcpy(®_data[1], buf, count);
drivers/mfd/da9150-core.c
81
xfer.buf = reg_data;
drivers/mfd/da9150-core.c
84
kfree(reg_data);
drivers/mfd/max14577.c
265
u8 reg_data, vendor_id, device_id;
drivers/mfd/max14577.c
269
®_data);
drivers/mfd/max14577.c
276
vendor_id = ((reg_data & DEVID_VENDORID_MASK) >>
drivers/mfd/max14577.c
278
device_id = ((reg_data & DEVID_DEVICEID_MASK) >>
drivers/mfd/max77693.c
152
unsigned int reg_data;
drivers/mfd/max77693.c
175
®_data);
drivers/mfd/max77693.c
180
dev_info(max77693->dev, "device ID: 0x%x\n", reg_data);
drivers/mfd/max77843.c
128
MAX77843_SYS_REG_PMICID, ®_data);
drivers/mfd/max77843.c
133
dev_info(&i2c->dev, "device ID: 0x%x\n", reg_data);
drivers/mfd/max77843.c
99
unsigned int reg_data;
drivers/mfd/pf1550.c
202
unsigned int reg_data = 0, otp_data = 0;
drivers/mfd/pf1550.c
220
ret = regmap_read(pf1550->regmap, PF1550_PMIC_REG_DEVICE_ID, ®_data);
drivers/mfd/pf1550.c
223
if (reg_data != PF1550_DEVICE_ID)
drivers/mfd/pf1550.c
224
return dev_err_probe(pf1550->dev, -ENODEV, "invalid device ID: 0x%02x\n", reg_data);
drivers/misc/amd-sbi/rmi-core.c
86
u8 reg_data[8];
drivers/mmc/core/sd.c
1035
u8 reg_data)
drivers/mmc/core/sd.c
1063
reg_buf[0] = reg_data;
drivers/mtd/nand/raw/intel-nand-controller.c
390
int ret, reg_data;
drivers/mtd/nand/raw/intel-nand-controller.c
401
reg_data = readl(ebu_host->hsnand + HSNAND_CTL);
drivers/mtd/nand/raw/intel-nand-controller.c
402
reg_data &= ~HSNAND_CTL_GO;
drivers/mtd/nand/raw/intel-nand-controller.c
403
writel(reg_data, ebu_host->hsnand + HSNAND_CTL);
drivers/mtd/nand/raw/intel-nand-controller.c
414
int reg_data, ret, val;
drivers/mtd/nand/raw/intel-nand-controller.c
436
reg_data = readl(ebu_host->hsnand + HSNAND_CTL);
drivers/mtd/nand/raw/intel-nand-controller.c
437
reg_data &= ~HSNAND_CTL_GO;
drivers/mtd/nand/raw/intel-nand-controller.c
438
writel(reg_data, ebu_host->hsnand + HSNAND_CTL);
drivers/mux/adgs1408.c
26
u8 reg_addr, u8 reg_data)
drivers/mux/adgs1408.c
31
tx_buf[1] = reg_data;
drivers/net/dsa/yt921x.c
323
u32 reg_data;
drivers/net/dsa/yt921x.c
339
reg_data = YT921X_SMI_SWITCHID(mdio->switchid) | YT921X_SMI_DATA |
drivers/net/dsa/yt921x.c
341
res = __mdiobus_read(bus, addr, reg_data);
drivers/net/dsa/yt921x.c
345
res = __mdiobus_read(bus, addr, reg_data);
drivers/net/dsa/yt921x.c
364
u32 reg_data;
drivers/net/dsa/yt921x.c
378
reg_data = YT921X_SMI_SWITCHID(mdio->switchid) | YT921X_SMI_DATA |
drivers/net/dsa/yt921x.c
380
res = __mdiobus_write(bus, addr, reg_data, (u16)(val >> 16));
drivers/net/dsa/yt921x.c
383
res = __mdiobus_write(bus, addr, reg_data, (u16)val);
drivers/net/ethernet/atheros/atl1c/atl1c_main.c
1679
u32 reg_data;
drivers/net/ethernet/atheros/atl1c/atl1c_main.c
1682
AT_READ_REG(hw, REG_ISR, ®_data);
drivers/net/ethernet/atheros/atl1c/atl1c_main.c
1683
status = reg_data & hw->intr_mask;
drivers/net/ethernet/broadcom/bnxt/bnxt.c
13336
*val = le16_to_cpu(resp->reg_data);
drivers/net/ethernet/broadcom/bnxt/bnxt.c
13363
req->reg_data = cpu_to_le16(val);
drivers/net/ethernet/chelsio/cxgb4/cudbg_entity.h
57
u32 reg_data[SGE_QBASE_DATA_REG_NUM];
drivers/net/ethernet/chelsio/cxgb4/cudbg_lib.c
1787
*buff = t4_read_reg(padap, qbase->reg_data[i]);
drivers/net/ethernet/chelsio/cxgb4/cudbg_lib.c
1846
sge_qbase->reg_data[i] =
drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
5340
static void t4_tp_indirect_rw(struct adapter *adap, u32 reg_addr, u32 reg_data,
drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
5369
t4_read_indirect(adap, reg_addr, reg_data, buff, nregs,
drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
5372
t4_write_indirect(adap, reg_addr, reg_data, buff, nregs,
drivers/net/ethernet/intel/e1000e/80003es2lan.c
1026
u16 reg_data;
drivers/net/ethernet/intel/e1000e/80003es2lan.c
1044
ret_val = e1000_read_kmrn_reg_80003es2lan(hw, 9, ®_data);
drivers/net/ethernet/intel/e1000e/80003es2lan.c
1047
reg_data |= 0x3F;
drivers/net/ethernet/intel/e1000e/80003es2lan.c
1048
ret_val = e1000_write_kmrn_reg_80003es2lan(hw, 9, reg_data);
drivers/net/ethernet/intel/e1000e/80003es2lan.c
1054
®_data);
drivers/net/ethernet/intel/e1000e/80003es2lan.c
1057
reg_data |= E1000_KMRNCTRLSTA_INB_CTRL_DIS_PADDING;
drivers/net/ethernet/intel/e1000e/80003es2lan.c
1061
reg_data);
drivers/net/ethernet/intel/e1000e/80003es2lan.c
1113
u16 reg_data, reg_data2;
drivers/net/ethernet/intel/e1000e/80003es2lan.c
1115
reg_data = E1000_KMRNCTRLSTA_HD_CTRL_10_100_DEFAULT;
drivers/net/ethernet/intel/e1000e/80003es2lan.c
1119
reg_data);
drivers/net/ethernet/intel/e1000e/80003es2lan.c
1130
ret_val = e1e_rphy(hw, GG82563_PHY_KMRN_MODE_CTRL, ®_data);
drivers/net/ethernet/intel/e1000e/80003es2lan.c
1138
} while ((reg_data != reg_data2) && (i < GG82563_MAX_KMRN_RETRY));
drivers/net/ethernet/intel/e1000e/80003es2lan.c
1141
reg_data |= GG82563_KMCR_PASS_FALSE_CARRIER;
drivers/net/ethernet/intel/e1000e/80003es2lan.c
1143
reg_data &= ~GG82563_KMCR_PASS_FALSE_CARRIER;
drivers/net/ethernet/intel/e1000e/80003es2lan.c
1145
return e1e_wphy(hw, GG82563_PHY_KMRN_MODE_CTRL, reg_data);
drivers/net/ethernet/intel/e1000e/80003es2lan.c
1158
u16 reg_data, reg_data2;
drivers/net/ethernet/intel/e1000e/80003es2lan.c
1162
reg_data = E1000_KMRNCTRLSTA_HD_CTRL_1000_DEFAULT;
drivers/net/ethernet/intel/e1000e/80003es2lan.c
1166
reg_data);
drivers/net/ethernet/intel/e1000e/80003es2lan.c
1177
ret_val = e1e_rphy(hw, GG82563_PHY_KMRN_MODE_CTRL, ®_data);
drivers/net/ethernet/intel/e1000e/80003es2lan.c
1185
} while ((reg_data != reg_data2) && (i < GG82563_MAX_KMRN_RETRY));
drivers/net/ethernet/intel/e1000e/80003es2lan.c
1187
reg_data &= ~GG82563_KMCR_PASS_FALSE_CARRIER;
drivers/net/ethernet/intel/e1000e/80003es2lan.c
1189
return e1e_wphy(hw, GG82563_PHY_KMRN_MODE_CTRL, reg_data);
drivers/net/ethernet/intel/e1000e/80003es2lan.c
730
u32 reg_data;
drivers/net/ethernet/intel/e1000e/80003es2lan.c
776
reg_data = er32(TXDCTL(0));
drivers/net/ethernet/intel/e1000e/80003es2lan.c
777
reg_data = ((reg_data & ~E1000_TXDCTL_WTHRESH) |
drivers/net/ethernet/intel/e1000e/80003es2lan.c
779
ew32(TXDCTL(0), reg_data);
drivers/net/ethernet/intel/e1000e/80003es2lan.c
782
reg_data = er32(TXDCTL(1));
drivers/net/ethernet/intel/e1000e/80003es2lan.c
783
reg_data = ((reg_data & ~E1000_TXDCTL_WTHRESH) |
drivers/net/ethernet/intel/e1000e/80003es2lan.c
785
ew32(TXDCTL(1), reg_data);
drivers/net/ethernet/intel/e1000e/80003es2lan.c
788
reg_data = er32(TCTL);
drivers/net/ethernet/intel/e1000e/80003es2lan.c
789
reg_data |= E1000_TCTL_RTLC;
drivers/net/ethernet/intel/e1000e/80003es2lan.c
790
ew32(TCTL, reg_data);
drivers/net/ethernet/intel/e1000e/80003es2lan.c
793
reg_data = er32(TCTL_EXT);
drivers/net/ethernet/intel/e1000e/80003es2lan.c
794
reg_data &= ~E1000_TCTL_EXT_GCEX_MASK;
drivers/net/ethernet/intel/e1000e/80003es2lan.c
795
reg_data |= DEFAULT_TCTL_EXT_GCEX_80003ES2LAN;
drivers/net/ethernet/intel/e1000e/80003es2lan.c
796
ew32(TCTL_EXT, reg_data);
drivers/net/ethernet/intel/e1000e/80003es2lan.c
799
reg_data = er32(TIPG);
drivers/net/ethernet/intel/e1000e/80003es2lan.c
800
reg_data &= ~E1000_TIPG_IPGT_MASK;
drivers/net/ethernet/intel/e1000e/80003es2lan.c
801
reg_data |= DEFAULT_TIPG_IPGT_1000_80003ES2LAN;
drivers/net/ethernet/intel/e1000e/80003es2lan.c
802
ew32(TIPG, reg_data);
drivers/net/ethernet/intel/e1000e/80003es2lan.c
804
reg_data = E1000_READ_REG_ARRAY(hw, E1000_FFLT, 0x0001);
drivers/net/ethernet/intel/e1000e/80003es2lan.c
805
reg_data &= ~0x00100000;
drivers/net/ethernet/intel/e1000e/80003es2lan.c
806
E1000_WRITE_REG_ARRAY(hw, E1000_FFLT, 0x0001, reg_data);
drivers/net/ethernet/intel/e1000e/82571.c
1068
u32 reg_data;
drivers/net/ethernet/intel/e1000e/82571.c
1102
reg_data = er32(TXDCTL(0));
drivers/net/ethernet/intel/e1000e/82571.c
1103
reg_data = ((reg_data & ~E1000_TXDCTL_WTHRESH) |
drivers/net/ethernet/intel/e1000e/82571.c
1105
ew32(TXDCTL(0), reg_data);
drivers/net/ethernet/intel/e1000e/82571.c
1114
reg_data = er32(GCR);
drivers/net/ethernet/intel/e1000e/82571.c
1115
reg_data |= E1000_GCR_L1_ACT_WITHOUT_L0S_RX;
drivers/net/ethernet/intel/e1000e/82571.c
1116
ew32(GCR, reg_data);
drivers/net/ethernet/intel/e1000e/82571.c
1119
reg_data = er32(TXDCTL(1));
drivers/net/ethernet/intel/e1000e/82571.c
1120
reg_data = ((reg_data & ~E1000_TXDCTL_WTHRESH) |
drivers/net/ethernet/intel/e1000e/82571.c
1123
ew32(TXDCTL(1), reg_data);
drivers/net/ethernet/intel/e1000e/ich8lan.c
2242
u16 word_addr, reg_data, reg_addr, phy_page = 0;
drivers/net/ethernet/intel/e1000e/ich8lan.c
2328
ret_val = e1000_read_nvm(hw, (word_addr + i * 2), 1, ®_data);
drivers/net/ethernet/intel/e1000e/ich8lan.c
2339
phy_page = reg_data;
drivers/net/ethernet/intel/e1000e/ich8lan.c
2346
ret_val = e1e_wphy_locked(hw, (u32)reg_addr, reg_data);
drivers/net/ethernet/intel/e1000e/ich8lan.c
5200
u16 reg_data;
drivers/net/ethernet/intel/e1000e/ich8lan.c
5215
®_data);
drivers/net/ethernet/intel/e1000e/ich8lan.c
5218
reg_data |= 0x3F;
drivers/net/ethernet/intel/e1000e/ich8lan.c
5220
reg_data);
drivers/net/ethernet/intel/e1000e/ich8lan.c
5243
ret_val = e1e_rphy(hw, IFE_PHY_MDIX_CONTROL, ®_data);
drivers/net/ethernet/intel/e1000e/ich8lan.c
5247
reg_data &= ~IFE_PMC_AUTO_MDIX;
drivers/net/ethernet/intel/e1000e/ich8lan.c
5251
reg_data &= ~IFE_PMC_FORCE_MDIX;
drivers/net/ethernet/intel/e1000e/ich8lan.c
5254
reg_data |= IFE_PMC_FORCE_MDIX;
drivers/net/ethernet/intel/e1000e/ich8lan.c
5258
reg_data |= IFE_PMC_AUTO_MDIX;
drivers/net/ethernet/intel/e1000e/ich8lan.c
5261
ret_val = e1e_wphy(hw, IFE_PHY_MDIX_CONTROL, reg_data);
drivers/net/ethernet/intel/e1000e/ich8lan.c
5476
u16 reg_data;
drivers/net/ethernet/intel/e1000e/ich8lan.c
5482
®_data);
drivers/net/ethernet/intel/e1000e/ich8lan.c
5485
reg_data |= E1000_KMRNCTRLSTA_DIAG_NELPBK;
drivers/net/ethernet/intel/e1000e/ich8lan.c
5487
reg_data);
drivers/net/ethernet/intel/e1000e/ich8lan.c
5490
reg_data &= ~E1000_KMRNCTRLSTA_DIAG_NELPBK;
drivers/net/ethernet/intel/e1000e/ich8lan.c
5491
e1000e_write_kmrn_reg(hw, E1000_KMRNCTRLSTA_DIAG_OFFSET, reg_data);
drivers/net/ethernet/intel/igb/igb_main.c
2151
u32 reg_data = rd32(E1000_CTRL_EXT);
drivers/net/ethernet/intel/igb/igb_main.c
2153
reg_data |= E1000_CTRL_EXT_PFRSTD;
drivers/net/ethernet/intel/igb/igb_main.c
2154
wr32(E1000_CTRL_EXT, reg_data);
drivers/net/ethernet/intel/igb/igb_main.c
4208
u32 reg_data = rd32(E1000_CTRL_EXT);
drivers/net/ethernet/intel/igb/igb_main.c
4210
reg_data |= E1000_CTRL_EXT_PFRSTD;
drivers/net/ethernet/intel/igb/igb_main.c
4211
wr32(E1000_CTRL_EXT, reg_data);
drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c
1921
u32 rctl, reg_data;
drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c
1943
reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_DMATXCTL);
drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c
1944
reg_data |= IXGBE_DMATXCTL_TE;
drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c
1945
IXGBE_WRITE_REG(&adapter->hw, IXGBE_DMATXCTL, reg_data);
drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c
1986
u32 reg_data;
drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c
1990
reg_data = IXGBE_READ_REG(hw, IXGBE_HLREG0);
drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c
1991
reg_data |= IXGBE_HLREG0_LPBK;
drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c
1992
IXGBE_WRITE_REG(hw, IXGBE_HLREG0, reg_data);
drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c
1994
reg_data = IXGBE_READ_REG(hw, IXGBE_FCTRL);
drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c
1995
reg_data |= IXGBE_FCTRL_BAM | IXGBE_FCTRL_SBP | IXGBE_FCTRL_MPE;
drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c
1996
IXGBE_WRITE_REG(hw, IXGBE_FCTRL, reg_data);
drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c
2005
reg_data = IXGBE_READ_REG(hw, IXGBE_MACC);
drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c
2006
reg_data |= IXGBE_MACC_FLU;
drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c
2007
IXGBE_WRITE_REG(hw, IXGBE_MACC, reg_data);
drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c
2011
reg_data = hw->mac.orig_autoc | IXGBE_AUTOC_FLU;
drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c
2012
IXGBE_WRITE_REG(hw, IXGBE_AUTOC, reg_data);
drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c
2046
u32 reg_data;
drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c
2048
reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_HLREG0);
drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c
2049
reg_data &= ~IXGBE_HLREG0_LPBK;
drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c
2050
IXGBE_WRITE_REG(&adapter->hw, IXGBE_HLREG0, reg_data);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
2370
u32 reg_data;
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
2376
reg_data = (mvpp2_read(port->priv, MVPP2_TXP_SCHED_Q_CMD_REG)) &
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
2378
if (reg_data != 0)
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
2380
(reg_data << MVPP2_TXP_SCHED_DISQ_OFFSET));
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
2388
reg_data);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
2397
reg_data = mvpp2_read(port->priv, MVPP2_TXP_SCHED_Q_CMD_REG);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
2398
} while (reg_data & MVPP2_TXP_SCHED_ENQ_MASK);
drivers/net/ethernet/mellanox/mlx4/fw.c
2900
u8 reg_data[MLX4_MAILBOX_SIZE-MLX4_ACCESS_REG_HEADER_SIZE];
drivers/net/ethernet/mellanox/mlx4/fw.c
2917
u16 reg_len, void *reg_data)
drivers/net/ethernet/mellanox/mlx4/fw.c
2941
reg_len = min(reg_len, (u16)(sizeof(inbuf->reg_data)));
drivers/net/ethernet/mellanox/mlx4/fw.c
2946
memcpy(inbuf->reg_data, reg_data, reg_len);
drivers/net/ethernet/mellanox/mlx4/fw.c
2961
memcpy(reg_data, outbuf->reg_data, reg_len);
drivers/net/ethernet/mellanox/mlx4/fw.c
3009
(struct mlx4_ptys_reg *)inbuf->reg_data;
drivers/net/ethernet/qlogic/qed/qed_debug.c
1808
const struct dbg_attn_reg *reg_data =
drivers/net/ethernet/qlogic/qed/qed_debug.c
1814
eval_mode = GET_FIELD(reg_data->mode.data,
drivers/net/ethernet/qlogic/qed/qed_debug.c
1817
GET_FIELD(reg_data->mode.data,
drivers/net/ethernet/qlogic/qed/qed_debug.c
1820
sts_clr_address = reg_data->sts_clr_address;
drivers/net/ethernet/qlogic/qed/qed_debug.c
2447
const struct dbg_attn_reg *reg_data =
drivers/net/ethernet/qlogic/qed/qed_debug.c
2454
eval_mode = GET_FIELD(reg_data->mode.data,
drivers/net/ethernet/qlogic/qed/qed_debug.c
2457
GET_FIELD(reg_data->mode.data,
drivers/net/ethernet/qlogic/qed/qed_debug.c
2464
addr = reg_data->mask_address;
drivers/net/ethernet/qlogic/qed/qed_debug.c
2472
addr = GET_FIELD(reg_data->data,
drivers/net/ethernet/qlogic/qed/qed_debug.c
5739
const struct dbg_attn_reg *reg_data = &attn_reg_arr[reg_idx];
drivers/net/ethernet/qlogic/qed/qed_debug.c
5746
eval_mode = GET_FIELD(reg_data->mode.data,
drivers/net/ethernet/qlogic/qed/qed_debug.c
5748
modes_buf_offset = GET_FIELD(reg_data->mode.data,
drivers/net/ethernet/qlogic/qed/qed_debug.c
5755
reg_data->sts_clr_address :
drivers/net/ethernet/qlogic/qed/qed_debug.c
5756
GET_FIELD(reg_data->data,
drivers/net/ethernet/qlogic/qed/qed_debug.c
5768
GET_FIELD(reg_data->data, DBG_ATTN_REG_NUM_REG_ATTN));
drivers/net/ethernet/qlogic/qed/qed_debug.c
5769
reg_result->block_attn_offset = reg_data->block_attn_offset;
drivers/net/ethernet/qlogic/qed/qed_debug.c
5774
(reg_data->mask_address));
drivers/net/ethernet/qlogic/qed/qed_mfw_hsi.h
2432
u32 reg_data;
drivers/net/ethernet/realtek/rtase/rtase_main.c
882
u16 reg_data;
drivers/net/ethernet/realtek/rtase/rtase_main.c
884
reg_data = rtase_r16(tp, RTASE_FCR);
drivers/net/ethernet/realtek/rtase/rtase_main.c
887
u16p_replace_bits(®_data, 0x1, RTASE_FCR_RXQ_MASK);
drivers/net/ethernet/realtek/rtase/rtase_main.c
890
u16p_replace_bits(®_data, 0x2, RTASE_FCR_RXQ_MASK);
drivers/net/ethernet/realtek/rtase/rtase_main.c
893
u16p_replace_bits(®_data, 0x3, RTASE_FCR_RXQ_MASK);
drivers/net/ethernet/realtek/rtase/rtase_main.c
896
rtase_w16(tp, RTASE_FCR, reg_data);
drivers/net/ethernet/realtek/rtase/rtase_main.c
901
u16 reg_data;
drivers/net/ethernet/realtek/rtase/rtase_main.c
903
reg_data = rtase_r16(tp, RTASE_TX_CONFIG_1);
drivers/net/ethernet/realtek/rtase/rtase_main.c
906
u16p_replace_bits(®_data, 0x0, RTASE_TC_MODE_MASK);
drivers/net/ethernet/realtek/rtase/rtase_main.c
909
u16p_replace_bits(®_data, 0x1, RTASE_TC_MODE_MASK);
drivers/net/ethernet/realtek/rtase/rtase_main.c
913
u16p_replace_bits(®_data, 0x2, RTASE_TC_MODE_MASK);
drivers/net/ethernet/realtek/rtase/rtase_main.c
916
u16p_replace_bits(®_data, 0x3, RTASE_TC_MODE_MASK);
drivers/net/ethernet/realtek/rtase/rtase_main.c
919
rtase_w16(tp, RTASE_TX_CONFIG_1, reg_data);
drivers/net/ethernet/xilinx/xilinx_emaclite.c
153
u32 reg_data;
drivers/net/ethernet/xilinx/xilinx_emaclite.c
156
reg_data = xemaclite_readl(drvdata->base_addr + XEL_TSR_OFFSET);
drivers/net/ethernet/xilinx/xilinx_emaclite.c
157
xemaclite_writel(reg_data | XEL_TSR_XMIT_IE_MASK,
drivers/net/ethernet/xilinx/xilinx_emaclite.c
176
u32 reg_data;
drivers/net/ethernet/xilinx/xilinx_emaclite.c
182
reg_data = xemaclite_readl(drvdata->base_addr + XEL_TSR_OFFSET);
drivers/net/ethernet/xilinx/xilinx_emaclite.c
183
xemaclite_writel(reg_data & (~XEL_TSR_XMIT_IE_MASK),
drivers/net/ethernet/xilinx/xilinx_emaclite.c
187
reg_data = xemaclite_readl(drvdata->base_addr + XEL_RSR_OFFSET);
drivers/net/ethernet/xilinx/xilinx_emaclite.c
188
xemaclite_writel(reg_data & (~XEL_RSR_RECV_IE_MASK),
drivers/net/ethernet/xilinx/xilinx_emaclite.c
311
u32 reg_data;
drivers/net/ethernet/xilinx/xilinx_emaclite.c
322
reg_data = xemaclite_readl(addr + XEL_TSR_OFFSET);
drivers/net/ethernet/xilinx/xilinx_emaclite.c
323
if ((reg_data & (XEL_TSR_XMIT_BUSY_MASK |
drivers/net/ethernet/xilinx/xilinx_emaclite.c
335
reg_data = xemaclite_readl(addr + XEL_TSR_OFFSET);
drivers/net/ethernet/xilinx/xilinx_emaclite.c
337
if ((reg_data & (XEL_TSR_XMIT_BUSY_MASK |
drivers/net/ethernet/xilinx/xilinx_emaclite.c
355
reg_data = xemaclite_readl(addr + XEL_TSR_OFFSET);
drivers/net/ethernet/xilinx/xilinx_emaclite.c
356
reg_data |= (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_XMIT_ACTIVE_MASK);
drivers/net/ethernet/xilinx/xilinx_emaclite.c
357
xemaclite_writel(reg_data, addr + XEL_TSR_OFFSET);
drivers/net/ethernet/xilinx/xilinx_emaclite.c
377
u32 reg_data;
drivers/net/ethernet/xilinx/xilinx_emaclite.c
383
reg_data = xemaclite_readl(addr + XEL_RSR_OFFSET);
drivers/net/ethernet/xilinx/xilinx_emaclite.c
385
if ((reg_data & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK) {
drivers/net/ethernet/xilinx/xilinx_emaclite.c
402
reg_data = xemaclite_readl(addr + XEL_RSR_OFFSET);
drivers/net/ethernet/xilinx/xilinx_emaclite.c
403
if ((reg_data & XEL_RSR_RECV_DONE_MASK) !=
drivers/net/ethernet/xilinx/xilinx_emaclite.c
448
reg_data = xemaclite_readl(addr + XEL_RSR_OFFSET);
drivers/net/ethernet/xilinx/xilinx_emaclite.c
449
reg_data &= ~XEL_RSR_RECV_DONE_MASK;
drivers/net/ethernet/xilinx/xilinx_emaclite.c
450
xemaclite_writel(reg_data, addr + XEL_RSR_OFFSET);
drivers/net/ethernet/xilinx/xilinx_emaclite.c
470
u32 reg_data;
drivers/net/ethernet/xilinx/xilinx_emaclite.c
480
reg_data = xemaclite_readl(addr + XEL_TSR_OFFSET);
drivers/net/ethernet/xilinx/xilinx_emaclite.c
481
xemaclite_writel(reg_data | XEL_TSR_PROG_MAC_ADDR, addr + XEL_TSR_OFFSET);
drivers/net/ieee802154/mcr20a.c
1038
lp->reg_xfer_data.rx_buf = lp->reg_data;
drivers/net/ieee802154/mcr20a.c
1039
lp->reg_xfer_data.tx_buf = lp->reg_data;
drivers/net/ieee802154/mcr20a.c
422
u8 reg_data[MCR20A_IRQSTS_NUM];
drivers/net/ieee802154/mcr20a.c
453
lp->reg_data[0] = MCR20A_XCVSEQ_TX;
drivers/net/ieee802154/mcr20a.c
477
lp->reg_data[0] = MCR20A_XCVSEQ_IDLE;
drivers/net/ieee802154/mcr20a.c
784
u8 len = lp->reg_data[0] & DAR_RX_FRAME_LENGTH_MASK;
drivers/net/ieee802154/mcr20a.c
823
len = lp->reg_data[0] & DAR_RX_FRAME_LENGTH_MASK;
drivers/net/ieee802154/mcr20a.c
942
memcpy(lp->reg_data, lp->irq_data, MCR20A_IRQSTS_NUM);
drivers/net/wireless/ath/wcn36xx/dxe.c
1048
int reg_data = 0;
drivers/net/wireless/ath/wcn36xx/dxe.c
1066
reg_data = WCN36XX_DXE_REG_RESET;
drivers/net/wireless/ath/wcn36xx/dxe.c
1067
wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_REG_CSR_RESET, reg_data);
drivers/net/wireless/ath/wcn36xx/dxe.c
262
int reg_data = 0;
drivers/net/wireless/ath/wcn36xx/dxe.c
266
®_data);
drivers/net/wireless/ath/wcn36xx/dxe.c
268
reg_data |= wcn_ch;
drivers/net/wireless/ath/wcn36xx/dxe.c
272
(int)reg_data);
drivers/net/wireless/ath/wcn36xx/dxe.c
278
int reg_data = 0;
drivers/net/wireless/ath/wcn36xx/dxe.c
282
®_data);
drivers/net/wireless/ath/wcn36xx/dxe.c
284
reg_data &= ~wcn_ch;
drivers/net/wireless/ath/wcn36xx/dxe.c
288
(int)reg_data);
drivers/net/wireless/ath/wcn36xx/dxe.c
902
int reg_data = 0, ret;
drivers/net/wireless/ath/wcn36xx/dxe.c
904
reg_data = WCN36XX_DXE_REG_RESET;
drivers/net/wireless/ath/wcn36xx/dxe.c
905
wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_REG_CSR_RESET, reg_data);
drivers/net/wireless/ath/wcn36xx/dxe.c
908
reg_data = (WCN36XX_DXE_INT_CH3_MASK | WCN36XX_DXE_INT_CH1_MASK) << 16 |
drivers/net/wireless/ath/wcn36xx/dxe.c
911
wcn36xx_ccu_write_register(wcn, WCN36XX_CCU_DXE_INT_SELECT_PRONTO, reg_data);
drivers/net/wireless/ath/wcn36xx/dxe.c
913
wcn36xx_ccu_write_register(wcn, WCN36XX_CCU_DXE_INT_SELECT_RIVA, reg_data);
drivers/net/wireless/ath/wcn36xx/dxe.c
934
wcn36xx_dxe_read_register(wcn, WCN36XX_DXE_REG_CH_EN, ®_data);
drivers/net/wireless/ath/wcn36xx/dxe.c
956
wcn36xx_dxe_read_register(wcn, WCN36XX_DXE_REG_CH_EN, ®_data);
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1073
struct iwl_dump_ini_region_data *reg_data,
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1076
struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1086
struct iwl_dump_ini_region_data *reg_data,
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1089
struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1163
struct iwl_dump_ini_region_data *reg_data,
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1166
struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1176
struct iwl_dump_ini_region_data *reg_data,
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1179
struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1189
struct iwl_dump_ini_region_data *reg_data,
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1192
struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1208
struct iwl_dump_ini_region_data *reg_data,
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1212
struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1236
struct iwl_dump_ini_region_data *reg_data,
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1239
struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1278
struct iwl_dump_ini_region_data *reg_data,
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1303
struct iwl_dump_ini_region_data *reg_data,
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1306
struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1322
struct iwl_dump_ini_region_data *reg_data,
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1325
struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1338
struct iwl_dump_ini_region_data *reg_data, int idx)
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1340
struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1390
struct iwl_dump_ini_region_data *reg_data,
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1393
struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1398
u32 registers_num = iwl_tlv_array_len(reg_data->reg_tlv, reg, addrs);
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1403
if (!iwl_ini_txf_iter(fwrt, reg_data, idx))
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1459
struct iwl_dump_ini_region_data *reg_data,
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1462
struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1511
struct iwl_dump_ini_region_data *reg_data,
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1514
struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1572
struct iwl_dump_ini_region_data *reg_data,
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1575
struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1580
u32 registers_num = iwl_tlv_array_len(reg_data->reg_tlv, reg, addrs);
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1585
iwl_ini_get_rxf_data(fwrt, reg_data, &rxf_data);
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1639
struct iwl_dump_ini_region_data *reg_data,
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1642
struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1658
struct iwl_dump_ini_region_data *reg_data,
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1661
struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1679
struct iwl_dump_ini_region_data *reg_data,
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1682
struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1707
struct iwl_dump_ini_region_data *reg_data,
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1711
struct iwl_rx_packet *pkt = reg_data->dump_data->fw_pkt;
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1728
struct iwl_dump_ini_region_data *reg_data,
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1756
struct iwl_dump_ini_region_data *reg_data,
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1830
struct iwl_dump_ini_region_data *reg_data,
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1834
struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1843
struct iwl_dump_ini_region_data *reg_data,
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1847
struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1856
struct iwl_dump_ini_region_data *reg_data,
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1870
struct iwl_dump_ini_region_data *reg_data,
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1873
struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1884
struct iwl_dump_ini_region_data *reg_data,
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1887
struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1899
struct iwl_dump_ini_region_data *reg_data,
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1910
struct iwl_dump_ini_region_data *reg_data)
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1912
struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1914
return iwl_tlv_array_len(reg_data->reg_tlv, reg, addrs);
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1919
struct iwl_dump_ini_region_data *reg_data)
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1921
struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1924
return iwl_tlv_array_len_with_size(reg_data->reg_tlv, reg, size);
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1928
struct iwl_dump_ini_region_data *reg_data)
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1942
struct iwl_dump_ini_region_data *reg_data)
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1944
struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1962
struct iwl_dump_ini_region_data *reg_data)
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1966
while (iwl_ini_txf_iter(fwrt, reg_data, num_of_fifos))
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1973
struct iwl_dump_ini_region_data *reg_data)
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1979
struct iwl_dump_ini_region_data *reg_data)
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
1999
struct iwl_dump_ini_region_data *reg_data)
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
2001
struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
2003
u32 ranges = iwl_dump_ini_mem_ranges(fwrt, reg_data);
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
2014
struct iwl_dump_ini_region_data *reg_data)
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
2016
struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
2018
u32 ranges = iwl_dump_ini_mem_block_ranges(fwrt, reg_data);
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
2033
struct iwl_dump_ini_region_data *reg_data)
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
2040
for (i = 1; i <= iwl_dump_ini_paging_ranges(fwrt, reg_data); i++) {
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
2053
struct iwl_dump_ini_region_data *reg_data)
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
2055
struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
2079
struct iwl_dump_ini_region_data *reg_data)
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
2081
struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
2095
struct iwl_dump_ini_region_data *reg_data)
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
2097
struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
2099
u32 ranges = iwl_dump_ini_mem_ranges(fwrt, reg_data);
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
2109
struct iwl_dump_ini_region_data *reg_data)
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
2111
struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
2113
u32 registers_num = iwl_tlv_array_len(reg_data->reg_tlv, reg, addrs);
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
2119
while (iwl_ini_txf_iter(fwrt, reg_data, size)) {
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
2132
struct iwl_dump_ini_region_data *reg_data)
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
2134
struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
2136
u32 registers_num = iwl_tlv_array_len(reg_data->reg_tlv, reg, addrs);
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
2144
iwl_ini_get_rxf_data(fwrt, reg_data, &rx_data);
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
2152
struct iwl_dump_ini_region_data *reg_data)
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
2154
struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
2166
struct iwl_dump_ini_region_data *reg_data)
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
2168
struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
2180
struct iwl_dump_ini_region_data *reg_data)
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
2184
if (!reg_data->dump_data->fw_pkt)
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
2187
size += iwl_rx_packet_payload_len(reg_data->dump_data->fw_pkt);
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
2197
struct iwl_dump_ini_region_data *reg_data)
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
2210
ranges = iwl_dump_ini_imr_ranges(fwrt, reg_data);
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
2231
struct iwl_dump_ini_region_data *reg_data);
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
2233
struct iwl_dump_ini_region_data *reg_data);
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
2235
struct iwl_dump_ini_region_data *reg_data,
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
2238
struct iwl_dump_ini_region_data *reg_data,
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
2255
struct iwl_dump_ini_region_data *reg_data,
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
2258
struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
2304
size = ops->get_size(fwrt, reg_data);
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
2324
num_of_ranges = ops->get_num_of_ranges(fwrt, reg_data);
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
2333
range = ops->fill_mem_hdr(fwrt, reg_data, header, free_size);
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
2354
int range_size = ops->fill_range(fwrt, reg_data, range,
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
2620
struct iwl_dump_ini_region_data reg_data = {
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
2629
reg_data.reg_tlv = fwrt->trans->dbg.active_regions[i];
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
2630
if (!reg_data.reg_tlv) {
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
2636
reg = (void *)reg_data.reg_tlv->data;
drivers/net/wireless/intel/iwlwifi/fw/dbg.c
2685
size += iwl_dump_ini_mem(fwrt, list, ®_data,
drivers/net/wireless/realtek/rtw88/sdio.c
185
u32 reg_data;
drivers/net/wireless/realtek/rtw88/sdio.c
192
reg_data = rtw_sdio_to_bus_offset(rtwdev, REG_SDIO_INDIRECT_REG_DATA);
drivers/net/wireless/realtek/rtw88/sdio.c
193
return sdio_readb(rtwsdio->sdio_func, reg_data, err_ret);
drivers/net/wireless/realtek/rtw88/sdio.c
213
u32 reg_data;
drivers/net/wireless/realtek/rtw88/sdio.c
229
reg_data = rtw_sdio_to_bus_offset(rtwdev, REG_SDIO_INDIRECT_REG_DATA);
drivers/net/wireless/realtek/rtw88/sdio.c
230
return rtw_sdio_readw(rtwdev, reg_data, err_ret);
drivers/net/wireless/realtek/rtw88/sdio.c
236
u32 reg_data;
drivers/net/wireless/realtek/rtw88/sdio.c
252
reg_data = rtw_sdio_to_bus_offset(rtwdev, REG_SDIO_INDIRECT_REG_DATA);
drivers/net/wireless/realtek/rtw88/sdio.c
253
return rtw_sdio_readl(rtwdev, reg_data, err_ret);
drivers/net/wireless/realtek/rtw88/sdio.c
344
u32 reg_data;
drivers/net/wireless/realtek/rtw88/sdio.c
346
reg_data = rtw_sdio_to_bus_offset(rtwdev, REG_SDIO_INDIRECT_REG_DATA);
drivers/net/wireless/realtek/rtw88/sdio.c
347
sdio_writeb(rtwsdio->sdio_func, val, reg_data, err_ret);
drivers/net/wireless/realtek/rtw88/sdio.c
358
u32 reg_data;
drivers/net/wireless/realtek/rtw88/sdio.c
366
reg_data = rtw_sdio_to_bus_offset(rtwdev, REG_SDIO_INDIRECT_REG_DATA);
drivers/net/wireless/realtek/rtw88/sdio.c
367
rtw_sdio_writew(rtwdev, val, reg_data, err_ret);
drivers/net/wireless/realtek/rtw88/sdio.c
379
u32 reg_data;
drivers/net/wireless/realtek/rtw88/sdio.c
387
reg_data = rtw_sdio_to_bus_offset(rtwdev, REG_SDIO_INDIRECT_REG_DATA);
drivers/net/wireless/realtek/rtw88/sdio.c
388
rtw_sdio_writel(rtwdev, val, reg_data, err_ret);
drivers/net/wireless/zydas/zd1211rw/zd_usb.c
1648
struct reg_data *rd = ®s->regs[i];
drivers/net/wireless/zydas/zd1211rw/zd_usb.c
1686
struct reg_data *rd = ®s->regs[i];
drivers/net/wireless/zydas/zd1211rw/zd_usb.c
1901
struct reg_data *rw = &req->reg_writes[i];
drivers/net/wireless/zydas/zd1211rw/zd_usb.h
121
struct reg_data regs[];
drivers/net/wireless/zydas/zd1211rw/zd_usb.h
82
struct reg_data reg_writes[];
drivers/pinctrl/pinctrl-sx150x.c
1103
return reg == pctl->data->reg_irq_src || reg == pctl->data->reg_data;
drivers/pinctrl/pinctrl-sx150x.c
155
.reg_data = 0x00,
drivers/pinctrl/pinctrl-sx150x.c
175
.reg_data = 0x00,
drivers/pinctrl/pinctrl-sx150x.c
198
.reg_data = 0x00,
drivers/pinctrl/pinctrl-sx150x.c
221
.reg_data = 0x00,
drivers/pinctrl/pinctrl-sx150x.c
240
.reg_data = 0x00,
drivers/pinctrl/pinctrl-sx150x.c
262
.reg_data = 0x00,
drivers/pinctrl/pinctrl-sx150x.c
285
.reg_data = 0x08,
drivers/pinctrl/pinctrl-sx150x.c
306
.reg_data = 0x08,
drivers/pinctrl/pinctrl-sx150x.c
327
.reg_data = 0x10,
drivers/pinctrl/pinctrl-sx150x.c
413
ret = regmap_read(pctl->regmap, pctl->data->reg_data, &value);
drivers/pinctrl/pinctrl-sx150x.c
423
return regmap_write_bits(pctl->regmap, pctl->data->reg_data,
drivers/pinctrl/pinctrl-sx150x.c
452
return regmap_write_bits(pctl->regmap, pctl->data->reg_data, *mask,
drivers/pinctrl/pinctrl-sx150x.c
81
u8 reg_data;
drivers/pinctrl/ti/pinctrl-ti-iodelay.c
157
const struct ti_iodelay_reg_data *reg_data;
drivers/pinctrl/ti/pinctrl-ti-iodelay.c
212
const struct ti_iodelay_reg_data *reg = iod->reg_data;
drivers/pinctrl/ti/pinctrl-ti-iodelay.c
285
const struct ti_iodelay_reg_data *reg = iod->reg_data;
drivers/pinctrl/ti/pinctrl-ti-iodelay.c
302
const struct ti_iodelay_reg_data *reg = iod->reg_data;
drivers/pinctrl/ti/pinctrl-ti-iodelay.c
408
const struct ti_iodelay_reg_data *r = iod->reg_data;
drivers/pinctrl/ti/pinctrl-ti-iodelay.c
448
r = iod->reg_data;
drivers/pinctrl/ti/pinctrl-ti-iodelay.c
652
const struct ti_iodelay_reg_data *r = iod->reg_data;
drivers/pinctrl/ti/pinctrl-ti-iodelay.c
674
r = iod->reg_data;
drivers/pinctrl/ti/pinctrl-ti-iodelay.c
754
const struct ti_iodelay_reg_data *r = iod->reg_data;
drivers/pinctrl/ti/pinctrl-ti-iodelay.c
846
iod->reg_data = device_get_match_data(dev);
drivers/pinctrl/ti/pinctrl-ti-iodelay.c
847
if (!iod->reg_data) {
drivers/pinctrl/ti/pinctrl-ti-iodelay.c
860
iod->reg_data->regmap_config);
drivers/power/supply/max14577_charger.c
124
u8 reg_data;
drivers/power/supply/max14577_charger.c
128
ret = max14577_read_reg(rmap, MAX14577_MUIC_REG_STATUS2, ®_data);
drivers/power/supply/max14577_charger.c
132
reg_data = ((reg_data & STATUS2_CHGTYP_MASK) >> STATUS2_CHGTYP_SHIFT);
drivers/power/supply/max14577_charger.c
133
chg_type = maxim_get_charger_type(chg->max14577->dev_type, reg_data);
drivers/power/supply/max14577_charger.c
164
u8 reg_data;
drivers/power/supply/max14577_charger.c
167
ret = max14577_read_reg(rmap, MAX14577_MUIC_REG_STATUS2, ®_data);
drivers/power/supply/max14577_charger.c
171
reg_data = ((reg_data & STATUS2_CHGTYP_MASK) >> STATUS2_CHGTYP_SHIFT);
drivers/power/supply/max14577_charger.c
172
chg_type = maxim_get_charger_type(chg->max14577->dev_type, reg_data);
drivers/power/supply/max14577_charger.c
178
ret = max14577_read_reg(rmap, MAX14577_CHG_REG_STATUS3, ®_data);
drivers/power/supply/max14577_charger.c
182
if (reg_data & STATUS3_OVP_MASK) {
drivers/power/supply/max14577_charger.c
209
u8 reg_data;
drivers/power/supply/max14577_charger.c
213
reg_data = hours - 3;
drivers/power/supply/max14577_charger.c
217
reg_data = 0x7;
drivers/power/supply/max14577_charger.c
224
reg_data <<= CHGCTRL1_TCHW_SHIFT;
drivers/power/supply/max14577_charger.c
227
MAX14577_REG_CHGCTRL1, CHGCTRL1_TCHW_MASK, reg_data);
drivers/power/supply/max14577_charger.c
233
u8 reg_data;
drivers/power/supply/max14577_charger.c
240
reg_data = 0x0;
drivers/power/supply/max14577_charger.c
242
reg_data = 0x1f;
drivers/power/supply/max14577_charger.c
249
reg_data = 0x1 + val;
drivers/power/supply/max14577_charger.c
251
reg_data = val; /* Fix for gap between 4.18V and 4.22V */
drivers/power/supply/max14577_charger.c
255
reg_data <<= CHGCTRL3_MBCCVWRC_SHIFT;
drivers/power/supply/max14577_charger.c
258
MAX14577_CHG_REG_CHG_CTRL3, reg_data);
drivers/power/supply/max14577_charger.c
265
u8 reg_data;
drivers/power/supply/max14577_charger.c
294
reg_data = current_bits << CHGCTRL5_EOCS_SHIFT;
drivers/power/supply/max14577_charger.c
298
reg_data);
drivers/power/supply/max14577_charger.c
304
u8 reg_data;
drivers/power/supply/max14577_charger.c
309
ret = maxim_charger_calc_reg_current(limits, uamp, uamp, ®_data);
drivers/power/supply/max14577_charger.c
318
reg_data);
drivers/power/supply/max14577_charger.c
329
u8 reg_data;
drivers/power/supply/max14577_charger.c
337
reg_data = 0x1 << CDETCTRL1_CHGDETEN_SHIFT;
drivers/power/supply/max14577_charger.c
340
reg_data);
drivers/power/supply/max14577_charger.c
346
reg_data = 0x1 << CHGCTRL2_VCHGR_RC_SHIFT;
drivers/power/supply/max14577_charger.c
347
reg_data |= 0x1 << CHGCTRL2_MBCHOSTEN_SHIFT;
drivers/power/supply/max14577_charger.c
348
max14577_write_reg(rmap, MAX14577_REG_CHGCTRL2, reg_data);
drivers/power/supply/max14577_charger.c
351
reg_data = 0x0 << CHGCTRL6_AUTOSTOP_SHIFT;
drivers/power/supply/max14577_charger.c
352
max14577_write_reg(rmap, MAX14577_REG_CHGCTRL6, reg_data);
drivers/power/supply/max14577_charger.c
374
reg_data = 0x0;
drivers/power/supply/max14577_charger.c
379
reg_data = 0x1 + (chg->pdata->ovp_uvolt - 6000000) / 500000;
drivers/power/supply/max14577_charger.c
386
reg_data <<= CHGCTRL7_OTPCGHCVS_SHIFT;
drivers/power/supply/max14577_charger.c
387
max14577_write_reg(rmap, MAX14577_REG_CHGCTRL7, reg_data);
drivers/power/supply/max14577_charger.c
51
u8 reg_data;
drivers/power/supply/max14577_charger.c
512
u8 reg_data;
drivers/power/supply/max14577_charger.c
517
®_data);
drivers/power/supply/max14577_charger.c
521
reg_data &= CHGCTRL1_TCHW_MASK;
drivers/power/supply/max14577_charger.c
522
reg_data >>= CHGCTRL1_TCHW_SHIFT;
drivers/power/supply/max14577_charger.c
523
switch (reg_data) {
drivers/power/supply/max14577_charger.c
525
val = reg_data + 3;
drivers/power/supply/max14577_charger.c
64
ret = max14577_read_reg(rmap, MAX14577_CHG_REG_CHG_CTRL2, ®_data);
drivers/power/supply/max14577_charger.c
68
if ((reg_data & CHGCTRL2_MBCHOSTEN_MASK) == 0) {
drivers/power/supply/max14577_charger.c
73
ret = max14577_read_reg(rmap, MAX14577_CHG_REG_STATUS3, ®_data);
drivers/power/supply/max14577_charger.c
77
if (reg_data & STATUS3_CGMBC_MASK) {
drivers/power/supply/max14577_charger.c
79
if (reg_data & STATUS3_EOC_MASK)
drivers/power/supply/max77705_charger.c
153
unsigned int reg_data;
drivers/power/supply/max77705_charger.c
157
regmap_read(regmap, MAX77705_CHG_REG_INT_OK, ®_data);
drivers/power/supply/max77705_charger.c
159
dev_dbg(chg->dev, "CHG_INT_OK(0x%x)\n", reg_data);
drivers/power/supply/max77705_charger.c
165
if ((reg_data & MAX77705_BATP_OK) || !(reg_data2 & MAX77705_BATP_DTLS))
drivers/power/supply/max77705_charger.c
176
unsigned int reg_data, chg_en;
drivers/power/supply/max77705_charger.c
184
regmap_read(regmap, MAX77705_CHG_REG_DETAILS_01, ®_data);
drivers/power/supply/max77705_charger.c
185
reg_data &= MAX77705_CHG_DTLS;
drivers/power/supply/max77705_charger.c
187
switch (reg_data) {
drivers/power/supply/max77705_charger.c
204
unsigned int reg_data, chg_en;
drivers/power/supply/max77705_charger.c
212
regmap_read(regmap, MAX77705_CHG_REG_DETAILS_01, ®_data);
drivers/power/supply/max77705_charger.c
213
reg_data &= MAX77705_CHG_DTLS;
drivers/power/supply/max77705_charger.c
215
switch (reg_data) {
drivers/power/supply/max77705_charger.c
335
unsigned int reg_data;
drivers/power/supply/max77705_charger.c
338
regmap_field_read(chg->rfield[MAX77705_CHG_CHGIN_LIM], ®_data);
drivers/power/supply/max77705_charger.c
340
if (reg_data <= 3)
drivers/power/supply/max77705_charger.c
343
get_current = (reg_data + 1) * MAX77705_CURRENT_CHGIN_STEP;
drivers/power/supply/max77705_charger.c
353
unsigned int reg_data;
drivers/power/supply/max77705_charger.c
355
regmap_field_read(chg->rfield[MAX77705_CHG_CC_LIM], ®_data);
drivers/power/supply/max77705_charger.c
357
*val = reg_data <= 0x2 ? MAX77705_CURRENT_CHGIN_MIN : reg_data * MAX77705_CURRENT_CHG_STEP;
drivers/power/supply/max77705_charger.c
366
unsigned int reg_data = 0;
drivers/power/supply/max77705_charger.c
369
reg_data = float_voltage_mv <= 4000 ? 0x0 :
drivers/power/supply/max77705_charger.c
374
return regmap_field_write(chg->rfield[MAX77705_CHG_CV_PRM], reg_data);
drivers/power/supply/max77705_charger.c
380
unsigned int reg_data = 0;
drivers/power/supply/max77705_charger.c
383
regmap_field_read(chg->rfield[MAX77705_CHG_CV_PRM], ®_data);
drivers/power/supply/max77705_charger.c
384
voltage_mv = reg_data <= 0x04 ? reg_data * 50 + 4000 :
drivers/power/supply/max77705_charger.c
385
(reg_data - 4) * 10 + 4200;
drivers/power/supply/rt5033_charger.c
104
unsigned int state, reg_data, data;
drivers/power/supply/rt5033_charger.c
106
regmap_read(regmap, RT5033_REG_CHG_CTRL5, ®_data);
drivers/power/supply/rt5033_charger.c
108
state = (reg_data & RT5033_CHGCTRL5_ICHG_MASK)
drivers/power/supply/rt5033_charger.c
120
unsigned int state, reg_data, data;
drivers/power/supply/rt5033_charger.c
122
regmap_read(regmap, RT5033_REG_CHG_CTRL2, ®_data);
drivers/power/supply/rt5033_charger.c
124
state = (reg_data & RT5033_CHGCTRL2_CV_MASK)
drivers/power/supply/rt5033_charger.c
138
u8 reg_data;
drivers/power/supply/rt5033_charger.c
149
reg_data = 0x00;
drivers/power/supply/rt5033_charger.c
151
reg_data = RT5033_CV_MAX_VOLTAGE;
drivers/power/supply/rt5033_charger.c
156
reg_data = val;
drivers/power/supply/rt5033_charger.c
161
reg_data << RT5033_CHGCTRL2_CV_SHIFT);
drivers/power/supply/rt5033_charger.c
168
charger->cv_regval = reg_data;
drivers/power/supply/rt5033_charger.c
179
reg_data = 0x01;
drivers/power/supply/rt5033_charger.c
181
reg_data = 0x07;
drivers/power/supply/rt5033_charger.c
187
reg_data = 0x01 + val;
drivers/power/supply/rt5033_charger.c
191
reg_data = 0x04 + val;
drivers/power/supply/rt5033_charger.c
193
reg_data = 0x04;
drivers/power/supply/rt5033_charger.c
198
RT5033_CHGCTRL4_EOC_MASK, reg_data);
drivers/power/supply/rt5033_charger.c
212
u8 reg_data;
drivers/power/supply/rt5033_charger.c
231
reg_data = 0x00;
drivers/power/supply/rt5033_charger.c
233
reg_data = RT5033_CHG_MAX_CURRENT;
drivers/power/supply/rt5033_charger.c
238
reg_data = val;
drivers/power/supply/rt5033_charger.c
243
reg_data << RT5033_CHGCTRL5_ICHG_SHIFT);
drivers/power/supply/rt5033_charger.c
257
u8 reg_data;
drivers/power/supply/rt5033_charger.c
268
reg_data = 0x00;
drivers/power/supply/rt5033_charger.c
270
reg_data = 0x0f;
drivers/power/supply/rt5033_charger.c
275
reg_data = val;
drivers/power/supply/rt5033_charger.c
279
RT5033_CHGCTRL5_VPREC_MASK, reg_data);
drivers/power/supply/rt5033_charger.c
294
reg_data = 0x00;
drivers/power/supply/rt5033_charger.c
296
reg_data = RT5033_CHG_MAX_PRE_CURRENT;
drivers/power/supply/rt5033_charger.c
301
reg_data = val;
drivers/power/supply/rt5033_charger.c
306
reg_data << RT5033_CHGCTRL4_IPREC_SHIFT);
drivers/power/supply/rt5033_charger.c
47
unsigned int reg_data;
drivers/power/supply/rt5033_charger.c
53
regmap_read(regmap, RT5033_REG_CHG_STAT, ®_data);
drivers/power/supply/rt5033_charger.c
55
switch (reg_data & RT5033_CHG_STAT_MASK) {
drivers/power/supply/rt5033_charger.c
82
unsigned int reg_data;
drivers/power/supply/rt5033_charger.c
85
regmap_read(regmap, RT5033_REG_CHG_STAT, ®_data);
drivers/power/supply/rt5033_charger.c
87
switch (reg_data & RT5033_CHG_STAT_TYPE_MASK) {
drivers/regulator/bd718x7-regulator.c
1493
struct bd718xx_regulator_data *reg_data,
drivers/regulator/bd718x7-regulator.c
1499
if (!of_node_name_eq(np, reg_data[i-1].desc.of_match))
drivers/regulator/bd718x7-regulator.c
1554
struct bd718xx_regulator_data *reg_data,
drivers/regulator/bd718x7-regulator.c
1575
struct regulator_desc *desc = ®_data[i].desc;
drivers/regulator/bd718x7-regulator.c
1638
struct bd718xx_regulator_data *reg_data,
drivers/regulator/bd718x7-regulator.c
1654
mark_hw_controlled(dev, np, reg_data, num_reg_data,
drivers/regulator/bd718x7-regulator.c
1665
ret = setup_feedback_loop(dev, np, reg_data, num_reg_data, uv);
drivers/regulator/bd718x7-regulator.c
1679
struct bd718xx_regulator_data *reg_data;
drivers/regulator/bd718x7-regulator.c
1692
reg_data = bd71837_regulators;
drivers/regulator/bd718x7-regulator.c
1698
reg_data = bd71847_regulators;
drivers/regulator/bd718x7-regulator.c
1751
err = get_special_regulators(pdev->dev.parent, reg_data, num_reg_data,
drivers/regulator/bd718x7-regulator.c
1763
r = ®_data[i];
drivers/regulator/core.c
6090
rdev->reg_data = config->driver_data;
drivers/regulator/core.c
6444
return rdev->reg_data;
drivers/regulator/core.c
6459
return regulator->rdev->reg_data;
drivers/regulator/core.c
6470
regulator->rdev->reg_data = data;
drivers/regulator/max14577-regulator.c
19
u8 reg_data;
drivers/regulator/max14577-regulator.c
23
max14577_read_reg(rmap, MAX14577_CHG_REG_CHG_CTRL2, ®_data);
drivers/regulator/max14577-regulator.c
24
if ((reg_data & CHGCTRL2_MBCHOSTEN_MASK) == 0)
drivers/regulator/max14577-regulator.c
26
max14577_read_reg(rmap, MAX14577_CHG_REG_STATUS3, ®_data);
drivers/regulator/max14577-regulator.c
27
if ((reg_data & STATUS3_CGMBC_MASK) == 0)
drivers/regulator/max14577-regulator.c
38
u8 reg_data;
drivers/regulator/max14577-regulator.c
48
ret = max14577_read_reg(rmap, MAX14577_CHG_REG_CHG_CTRL4, ®_data);
drivers/regulator/max14577-regulator.c
52
if ((reg_data & CHGCTRL4_MBCICHWRCL_MASK) == 0)
drivers/regulator/max14577-regulator.c
55
reg_data = ((reg_data & CHGCTRL4_MBCICHWRCH_MASK) >>
drivers/regulator/max14577-regulator.c
57
return limits->high_start + reg_data * limits->high_step;
drivers/regulator/max14577-regulator.c
63
u8 reg_data;
drivers/regulator/max14577-regulator.c
72
ret = maxim_charger_calc_reg_current(limits, min_uA, max_uA, ®_data);
drivers/regulator/max14577-regulator.c
78
reg_data);
drivers/regulator/max5970-regulator.c
38
u8 reg_data[2];
drivers/regulator/max5970-regulator.c
41
ret = regmap_bulk_read(regmap, reg, ®_data[0], 2);
drivers/regulator/max5970-regulator.c
45
*val = (reg_data[0] << 2) | (reg_data[1] & 3);
drivers/regulator/max77693-regulator.c
57
const struct chg_reg_data *reg_data = rdev_get_drvdata(rdev);
drivers/regulator/max77693-regulator.c
64
ret = regmap_read(rdev->regmap, reg_data->linear_reg, ®);
drivers/regulator/max77693-regulator.c
68
sel = reg & reg_data->linear_mask;
drivers/regulator/max77693-regulator.c
71
if (sel <= reg_data->min_sel)
drivers/regulator/max77693-regulator.c
74
sel -= reg_data->min_sel;
drivers/regulator/max77693-regulator.c
76
val = chg_min_uA + reg_data->uA_step * sel;
drivers/regulator/max77693-regulator.c
86
const struct chg_reg_data *reg_data = rdev_get_drvdata(rdev);
drivers/regulator/max77693-regulator.c
90
while (chg_min_uA + reg_data->uA_step * sel < min_uA)
drivers/regulator/max77693-regulator.c
93
if (chg_min_uA + reg_data->uA_step * sel > max_uA)
drivers/regulator/max77693-regulator.c
97
sel += reg_data->min_sel;
drivers/regulator/max77693-regulator.c
99
return regmap_write(rdev->regmap, reg_data->linear_reg, sel);
drivers/regulator/max8952.c
159
pd->reg_data = of_get_regulator_init_data(dev, np, ®ulator);
drivers/regulator/max8952.c
160
if (!pd->reg_data) {
drivers/regulator/max8952.c
206
config.init_data = pdata->reg_data;
drivers/regulator/max8952.c
210
if (pdata->reg_data->constraints.boot_on)
drivers/regulator/palmas-regulator.c
1080
config.init_data = pdata->reg_data[id];
drivers/regulator/palmas-regulator.c
1265
config.init_data = pdata->reg_data[id];
drivers/regulator/palmas-regulator.c
1369
config.init_data = pdata->reg_data[id];
drivers/regulator/palmas-regulator.c
1503
pdata->reg_data[idx] = match->init_data;
drivers/regulator/palmas-regulator.c
973
config.init_data = pdata->reg_data[id];
drivers/regulator/qcom-labibb-regulator.c
767
const struct labibb_regulator_data *reg_data;
drivers/regulator/qcom-labibb-regulator.c
778
reg_data = device_get_match_data(&pdev->dev);
drivers/regulator/qcom-labibb-regulator.c
779
if (!reg_data)
drivers/regulator/qcom-labibb-regulator.c
782
for (; reg_data->name; reg_data++) {
drivers/regulator/qcom-labibb-regulator.c
789
ret = regmap_read(reg_regmap, reg_data->base + REG_PERPH_TYPE,
drivers/regulator/qcom-labibb-regulator.c
799
WARN_ON(type != reg_data->type))
drivers/regulator/qcom-labibb-regulator.c
809
reg_data->name);
drivers/regulator/qcom-labibb-regulator.c
814
reg_data->name);
drivers/regulator/qcom-labibb-regulator.c
838
vreg->base = reg_data->base;
drivers/regulator/qcom-labibb-regulator.c
839
vreg->type = reg_data->type;
drivers/regulator/qcom-labibb-regulator.c
864
memcpy(&vreg->desc, reg_data->desc, sizeof(vreg->desc));
drivers/regulator/qcom-labibb-regulator.c
865
vreg->desc.of_match = reg_data->name;
drivers/regulator/qcom-labibb-regulator.c
866
vreg->desc.name = reg_data->name;
drivers/regulator/qcom-labibb-regulator.c
877
reg_data->name, ret);
drivers/regulator/tps6287x-regulator.c
128
struct tps6287x_reg_data *data = (struct tps6287x_reg_data *)rdev->reg_data;
drivers/regulator/tps6287x-regulator.c
188
struct tps6287x_reg_data *reg_data;
drivers/regulator/tps6287x-regulator.c
191
reg_data = devm_kzalloc(dev, sizeof(struct tps6287x_reg_data), GFP_KERNEL);
drivers/regulator/tps6287x-regulator.c
193
if (!reg_data)
drivers/regulator/tps6287x-regulator.c
207
reg_data->range = tps6287x_best_range(&config, &tps6287x_reg);
drivers/regulator/tps6287x-regulator.c
215
rdev->reg_data = (void *)reg_data;
drivers/regulator/tps6586x-regulator.c
453
struct regulator_init_data *reg_data;
drivers/regulator/tps6586x-regulator.c
475
reg_data = pdata->reg_init_data[id];
drivers/regulator/tps6586x-regulator.c
492
config.init_data = reg_data;
drivers/regulator/tps6586x-regulator.c
505
if (reg_data) {
drivers/regulator/tps6586x-regulator.c
507
reg_data);
drivers/regulator/tps68470-regulator.c
59
struct tps68470_regulator_data *data = rdev->reg_data;
drivers/regulator/tps68470-regulator.c
76
struct tps68470_regulator_data *data = rdev->reg_data;
drivers/rtc/rtc-rc5t619.c
100
reg_data &= ~(CTRL2_PON | CTRL2_CTC | 0x4a); /* 0101-1011 */
drivers/rtc/rtc-rc5t619.c
101
reg_data |= 0x20; /* 0010-0000 */
drivers/rtc/rtc-rc5t619.c
102
err = regmap_write(rtc->rn5t618->regmap, RN5T618_RTC_CTRL2, reg_data);
drivers/rtc/rtc-rc5t619.c
93
unsigned int reg_data;
drivers/rtc/rtc-rc5t619.c
95
err = regmap_read(rtc->rn5t618->regmap, RN5T618_RTC_CTRL2, ®_data);
drivers/scsi/lpfc/lpfc.h
1702
struct lpfc_register reg_data;
drivers/scsi/lpfc/lpfc.h
1704
reg_data.word0 = 0;
drivers/scsi/lpfc/lpfc.h
1705
bf_set(lpfc_sliport_eqdelay_id, ®_data, eq->queue_id);
drivers/scsi/lpfc/lpfc.h
1706
bf_set(lpfc_sliport_eqdelay_delay, ®_data, delay);
drivers/scsi/lpfc/lpfc.h
1707
writel(reg_data.word0, phba->sli4_hba.u.if_type2.EQDregaddr);
drivers/scsi/lpfc/lpfc_init.c
11666
struct lpfc_register reg_data;
drivers/scsi/lpfc/lpfc_init.c
11712
STATUSregaddr, ®_data.word0)) {
drivers/scsi/lpfc/lpfc_init.c
11716
if (bf_get(lpfc_sliport_status_rdy, ®_data))
drivers/scsi/lpfc/lpfc_init.c
11721
if (!bf_get(lpfc_sliport_status_rdy, ®_data)) {
drivers/scsi/lpfc/lpfc_init.c
11729
reg_data.word0,
drivers/scsi/lpfc/lpfc_init.c
11736
if (bf_get(lpfc_sliport_status_pldv, ®_data))
drivers/scsi/lpfc/lpfc_init.c
11743
reg_data.word0 = 0;
drivers/scsi/lpfc/lpfc_init.c
11744
bf_set(lpfc_sliport_ctrl_end, ®_data,
drivers/scsi/lpfc/lpfc_init.c
11746
bf_set(lpfc_sliport_ctrl_ip, ®_data,
drivers/scsi/lpfc/lpfc_init.c
11748
writel(reg_data.word0, phba->sli4_hba.u.if_type2.
drivers/scsi/lpfc/lpfc_init.c
11757
} else if (bf_get(lpfc_sliport_status_rn, ®_data)) {
drivers/scsi/lpfc/lpfc_init.c
9394
struct lpfc_register reg_data;
drivers/scsi/lpfc/lpfc_init.c
9399
memset(®_data, 0, sizeof(reg_data));
drivers/scsi/lpfc/lpfc_init.c
9491
®_data.word0) ||
drivers/scsi/lpfc/lpfc_init.c
9492
lpfc_sli4_unrecoverable_port(®_data)) {
drivers/scsi/lpfc/lpfc_init.c
9504
reg_data.word0,
drivers/scsi/lpfc/lpfc_sli.c
8024
struct lpfc_register reg_data;
drivers/scsi/lpfc/lpfc_sli.c
8027
®_data.word0))
drivers/scsi/lpfc/lpfc_sli.c
8030
if (bf_get(lpfc_sliport_status_dip, ®_data))
drivers/scsi/qla1280.c
2346
uint16_t reg_data;
drivers/scsi/qla1280.c
2366
reg_data = RD_REG_WORD(®->nvram);
drivers/scsi/qla1280.c
2367
if (reg_data & NV_DATA_IN)
drivers/scsi/qla2xxx/qla_sup.c
108
uint16_t reg_data;
drivers/scsi/qla2xxx/qla_sup.c
126
reg_data = rd_reg_word(®->nvram);
drivers/scsi/qla2xxx/qla_sup.c
127
if (reg_data & NVR_DATA_IN)
drivers/soc/mediatek/mtk-svs.c
1286
svsb->reg_data[phase][rg_i] = svs_readl_relaxed(svsp, rg_i);
drivers/soc/mediatek/mtk-svs.c
523
u32 reg_data[SVSB_PHASE_MAX][SVS_REG_MAX];
drivers/soc/mediatek/mtk-svs.c
751
svs_reg_addr, svsb->reg_data[i][j]);
drivers/soc/qcom/spm.c
259
if (drv->reg_data->reg_offset[reg])
drivers/soc/qcom/spm.c
261
drv->reg_data->reg_offset[reg]);
drivers/soc/qcom/spm.c
270
if (!drv->reg_data->reg_offset[reg])
drivers/soc/qcom/spm.c
275
drv->reg_data->reg_offset[reg]);
drivers/soc/qcom/spm.c
277
drv->reg_data->reg_offset[reg]);
drivers/soc/qcom/spm.c
287
return readl_relaxed(drv->reg_base + drv->reg_data->reg_offset[reg]);
drivers/soc/qcom/spm.c
296
start_index = drv->reg_data->start_index[mode];
drivers/soc/qcom/spm.c
312
return smp_call_function_single(drv->reg_cpu, drv->reg_data->set_vdd, drv, true);
drivers/soc/qcom/spm.c
425
if (!drv->reg_data->set_vdd)
drivers/soc/qcom/spm.c
438
rdesc->linear_ranges = drv->reg_data->range;
drivers/soc/qcom/spm.c
441
rdesc->ramp_delay = drv->reg_data->ramp_delay;
drivers/soc/qcom/spm.c
454
drv->volt_sel = DIV_ROUND_UP(drv->reg_data->init_uV - rdesc->min_uV,
drivers/soc/qcom/spm.c
456
ret = linear_range_get_selector_high(drv->reg_data->range,
drivers/soc/qcom/spm.c
457
drv->reg_data->init_uV,
drivers/soc/qcom/spm.c
466
smp_call_function_single(drv->reg_cpu, drv->reg_data->set_vdd, drv, true);
drivers/soc/qcom/spm.c
526
drv->reg_data = match_id->data;
drivers/soc/qcom/spm.c
531
addr = drv->reg_base + drv->reg_data->reg_offset[SPM_REG_SEQ_ENTRY];
drivers/soc/qcom/spm.c
532
__iowrite32_copy(addr, drv->reg_data->seq,
drivers/soc/qcom/spm.c
533
ARRAY_SIZE(drv->reg_data->seq) / 4);
drivers/soc/qcom/spm.c
541
spm_register_write(drv, SPM_REG_AVS_CTL, drv->reg_data->avs_ctl);
drivers/soc/qcom/spm.c
542
spm_register_write(drv, SPM_REG_AVS_LIMIT, drv->reg_data->avs_limit);
drivers/soc/qcom/spm.c
543
spm_register_write(drv, SPM_REG_CFG, drv->reg_data->spm_cfg);
drivers/soc/qcom/spm.c
544
spm_register_write(drv, SPM_REG_DLY, drv->reg_data->spm_dly);
drivers/soc/qcom/spm.c
545
spm_register_write(drv, SPM_REG_PMIC_DLY, drv->reg_data->pmic_dly);
drivers/soc/qcom/spm.c
547
drv->reg_data->pmic_data[0]);
drivers/soc/qcom/spm.c
549
drv->reg_data->pmic_data[1]);
drivers/soc/qcom/spm.c
552
if (drv->reg_data->reg_offset[SPM_REG_SPM_CTL])
drivers/soc/qcom/spm.c
84
const struct spm_reg_data *reg_data;
drivers/soc/tegra/pmc.c
2163
u32 pmu_addr, ctrl_id, reg_addr, reg_data, pinmux;
drivers/soc/tegra/pmc.c
2192
if (of_property_read_u32(np, "nvidia,reg-data", ®_data)) {
drivers/soc/tegra/pmc.c
2204
value = (reg_data << PMC_SCRATCH54_DATA_SHIFT) |
drivers/soc/tegra/pmc.c
2217
checksum = reg_addr + reg_data + (value & 0xff) + ((value >> 8) & 0xff)
drivers/thermal/intel/int340x_thermal/processor_thermal_mbox.c
44
u32 reg_data;
drivers/thermal/intel/int340x_thermal/processor_thermal_mbox.c
54
reg_data = BIT_ULL(MBOX_BUSY_BIT) | id;
drivers/thermal/intel/int340x_thermal/processor_thermal_mbox.c
55
writel(reg_data, (proc_priv->mmio_base + MBOX_OFFSET_INTERFACE));
drivers/thermal/intel/int340x_thermal/processor_thermal_mbox.c
63
u32 reg_data;
drivers/thermal/intel/int340x_thermal/processor_thermal_mbox.c
72
reg_data = BIT_ULL(MBOX_BUSY_BIT) | id;
drivers/thermal/intel/int340x_thermal/processor_thermal_mbox.c
73
writel(reg_data, (proc_priv->mmio_base + MBOX_OFFSET_INTERFACE));
drivers/usb/isp1760/isp1760-if.c
115
reg_data = readl(iobase + PLX_INT_CSR_REG);
drivers/usb/isp1760/isp1760-if.c
116
reg_data |= 0x900;
drivers/usb/isp1760/isp1760-if.c
117
writel(reg_data, iobase + PLX_INT_CSR_REG);
drivers/usb/isp1760/isp1760-if.c
39
u32 reg_data;
drivers/usb/isp1760/isp1760-if.c
75
reg_data = 0;
drivers/usb/isp1760/isp1760-if.c
76
while ((reg_data != 0xFACE) && retry_count) {
drivers/usb/isp1760/isp1760-if.c
82
reg_data = readl(iobase + ISP176x_HC_SCRATCH) & 0x0000ffff;
drivers/usb/isp1760/isp1760-if.c
92
if (reg_data != 0xFACE) {
drivers/usb/isp1760/isp1760-if.c
93
dev_err(&dev->dev, "scratch register mismatch %x\n", reg_data);
drivers/video/fbdev/omap2/omapfb/displays/panel-nec-nl8048hl11.c
85
unsigned char reg_data)
drivers/video/fbdev/omap2/omapfb/displays/panel-nec-nl8048hl11.c
91
data = 0x0100 | reg_data; /* register data write */
drivers/watchdog/mlx_wdt.c
100
struct mlxreg_core_data *reg_data = &wdt->pdata->data[wdt->ping_idx];
drivers/watchdog/mlx_wdt.c
102
return regmap_write_bits(wdt->regmap, reg_data->reg, ~reg_data->mask,
drivers/watchdog/mlx_wdt.c
103
BIT(reg_data->bit));
drivers/watchdog/mlx_wdt.c
110
struct mlxreg_core_data *reg_data = &wdt->pdata->data[wdt->timeout_idx];
drivers/watchdog/mlx_wdt.c
116
rc = regmap_read(wdt->regmap, reg_data->reg, ®val);
drivers/watchdog/mlx_wdt.c
121
regval = (regval & reg_data->mask) | hw_timeout;
drivers/watchdog/mlx_wdt.c
124
rc = regmap_write(wdt->regmap, reg_data->reg, regval);
drivers/watchdog/mlx_wdt.c
128
rc = regmap_write(wdt->regmap, reg_data->reg, timeout);
drivers/watchdog/mlx_wdt.c
135
rc = regmap_write(wdt->regmap, reg_data->reg, regval);
drivers/watchdog/mlx_wdt.c
139
reg_data->reg + 1, regval);
drivers/watchdog/mlx_wdt.c
142
rc = regmap_write(wdt->regmap, reg_data->reg, timeout);
drivers/watchdog/mlx_wdt.c
168
struct mlxreg_core_data *reg_data = &wdt->pdata->data[wdt->tleft_idx];
drivers/watchdog/mlx_wdt.c
173
rc = regmap_read(wdt->regmap, reg_data->reg, ®val);
drivers/watchdog/mlx_wdt.c
177
rc = regmap_read(wdt->regmap, reg_data->reg, &lsb);
drivers/watchdog/mlx_wdt.c
180
reg_data->reg + 1, &msb);
drivers/watchdog/mlx_wdt.c
184
rc = regmap_read(wdt->regmap, reg_data->reg, ®val);
drivers/watchdog/mlx_wdt.c
58
struct mlxreg_core_data *reg_data;
drivers/watchdog/mlx_wdt.c
68
reg_data = &wdt->pdata->data[wdt->reset_idx];
drivers/watchdog/mlx_wdt.c
69
rc = regmap_read(wdt->regmap, reg_data->reg, ®val);
drivers/watchdog/mlx_wdt.c
71
if (regval & ~reg_data->mask) {
drivers/watchdog/mlx_wdt.c
82
struct mlxreg_core_data *reg_data = &wdt->pdata->data[wdt->action_idx];
drivers/watchdog/mlx_wdt.c
84
return regmap_update_bits(wdt->regmap, reg_data->reg, ~reg_data->mask,
drivers/watchdog/mlx_wdt.c
85
BIT(reg_data->bit));
drivers/watchdog/mlx_wdt.c
91
struct mlxreg_core_data *reg_data = &wdt->pdata->data[wdt->action_idx];
drivers/watchdog/mlx_wdt.c
93
return regmap_update_bits(wdt->regmap, reg_data->reg, ~reg_data->mask,
drivers/watchdog/mlx_wdt.c
94
~BIT(reg_data->bit));
include/linux/bnge/hsi.h
5973
__le16 reg_data;
include/linux/bnge/hsi.h
6010
__le16 reg_data;
include/linux/bnxt/hsi.h
5720
__le16 reg_data;
include/linux/bnxt/hsi.h
5757
__le16 reg_data;
include/linux/mfd/palmas.h
321
struct regulator_init_data *reg_data[PALMAS_NUM_REGS];
include/linux/regulator/driver.h
651
void *reg_data; /* regulator_dev data */
include/linux/regulator/max8952.h
114
struct regulator_init_data *reg_data;
net/netfilter/nf_tables_core.c
102
if (((reg_data[0] & mask[0]) == data[0] &&
net/netfilter/nf_tables_core.c
103
((reg_data[1] & mask[1]) == data[1])) ^ priv->inv)
net/netfilter/nf_tables_core.c
98
const u64 *reg_data = (const u64 *)®s->data[priv->sreg];
sound/hda/codecs/side-codecs/tas2781_hda.c
43
struct cali_reg reg_data;
sound/hda/codecs/side-codecs/tas2781_hda.c
45
memcpy(®_data, &data[base], sizeof(reg_data));
sound/hda/codecs/side-codecs/tas2781_hda.c
47
swap(reg_data.r0_low_reg, reg_data.invr0_reg);
sound/hda/codecs/side-codecs/tas2781_hda.c
50
(u32 *)®_data, TASDEV_CALIB_N);
sound/soc/codecs/aw88081.c
420
int16_t *reg_data;
sound/soc/codecs/aw88081.c
429
reg_data = (int16_t *)data;
sound/soc/codecs/aw88081.c
438
reg_addr = reg_data[i];
sound/soc/codecs/aw88081.c
439
reg_val = reg_data[i + 1];
sound/soc/codecs/aw88166.c
937
int16_t *reg_data;
sound/soc/codecs/aw88166.c
940
reg_data = (int16_t *)data;
sound/soc/codecs/aw88166.c
949
reg_addr = reg_data[i];
sound/soc/codecs/aw88166.c
950
reg_val = reg_data[i + 1];
sound/soc/codecs/aw88261.c
400
int16_t *reg_data;
sound/soc/codecs/aw88261.c
409
reg_data = (int16_t *)data;
sound/soc/codecs/aw88261.c
418
reg_addr = reg_data[i];
sound/soc/codecs/aw88261.c
419
reg_val = reg_data[i + 1];
sound/soc/codecs/aw88395/aw88395_device.c
1003
int16_t *reg_data;
sound/soc/codecs/aw88395/aw88395_device.c
1010
reg_data = (int16_t *)data;
sound/soc/codecs/aw88395/aw88395_device.c
1019
reg_addr = reg_data[i];
sound/soc/codecs/aw88395/aw88395_device.c
1020
reg_val = reg_data[i + 1];
sound/soc/codecs/aw88399.c
1458
unsigned int reg_data;
sound/soc/codecs/aw88399.c
1462
ret = regmap_read(aw_dev->regmap, AW88399_ASR1_REG, ®_data);
sound/soc/codecs/aw88399.c
1468
reg_data &= (~AW88399_REABS_MASK);
sound/soc/codecs/aw88399.c
1469
if (!reg_data)
sound/soc/codecs/aw88399.c
916
int16_t *reg_data;
sound/soc/codecs/aw88399.c
919
reg_data = (int16_t *)data;
sound/soc/codecs/aw88399.c
928
reg_addr = reg_data[i];
sound/soc/codecs/aw88399.c
929
reg_val = reg_data[i + 1];
sound/soc/codecs/mt6660.c
333
u16 reg_data = 0;
sound/soc/codecs/mt6660.c
346
reg_data = 3;
sound/soc/codecs/mt6660.c
349
reg_data = 2;
sound/soc/codecs/mt6660.c
352
reg_data = 1;
sound/soc/codecs/mt6660.c
356
reg_data = 0;
sound/soc/codecs/mt6660.c
362
MT6660_REG_SERIAL_CFG1, 0xc0, (reg_data << 6));
sound/soc/codecs/mt6660.c
49
u8 reg_data[4];
sound/soc/codecs/mt6660.c
53
reg_data[size - i - 1] = (val >> (8 * i)) & 0xff;
sound/soc/codecs/mt6660.c
55
return i2c_smbus_write_i2c_block_data(chip->i2c, reg, size, reg_data);
sound/soc/codecs/mt6660.c
64
u32 reg_data = 0;
sound/soc/codecs/mt6660.c
70
reg_data <<= 8;
sound/soc/codecs/mt6660.c
71
reg_data |= data[i];
sound/soc/codecs/mt6660.c
73
*val = reg_data;
sound/soc/fsl/imx-pcm-rpmsg.h
417
unsigned int reg_data;
sound/soc/kirkwood/kirkwood-i2s.c
515
unsigned int reg_data;
sound/soc/kirkwood/kirkwood-i2s.c
522
reg_data = readl(priv->io + 0x1200);
sound/soc/kirkwood/kirkwood-i2s.c
523
reg_data &= (~(0x333FF8));
sound/soc/kirkwood/kirkwood-i2s.c
524
reg_data |= 0x111D18;
sound/soc/kirkwood/kirkwood-i2s.c
525
writel(reg_data, priv->io + 0x1200);
sound/soc/kirkwood/kirkwood-i2s.c
529
reg_data = readl(priv->io + 0x1200);
sound/soc/kirkwood/kirkwood-i2s.c
530
reg_data &= (~(0x333FF8));
sound/soc/kirkwood/kirkwood-i2s.c
531
reg_data |= 0x111D18;
sound/soc/kirkwood/kirkwood-i2s.c
532
writel(reg_data, priv->io + 0x1200);
sound/soc/tegra/tegra210_mbdrc.c
216
unsigned int reg_data, unsigned int ram_offset,
sound/soc/tegra/tegra210_mbdrc.c
230
regmap_write(regmap, reg_data, data[i]);
sound/soc/tegra/tegra210_mbdrc.c
430
u32 reg_data = reg_ctrl + cmpnt->val_bytes;
sound/soc/tegra/tegra210_mbdrc.c
433
tegra210_mbdrc_write_ram(ope->mbdrc_regmap, reg_ctrl, reg_data,
sound/soc/tegra/tegra210_peq.c
152
u32 reg_data = reg_ctrl + cmpnt->val_bytes;
sound/soc/tegra/tegra210_peq.c
157
tegra210_peq_read_ram(ope->peq_regmap, reg_ctrl, reg_data,
sound/soc/tegra/tegra210_peq.c
175
u32 reg_data = reg_ctrl + cmpnt->val_bytes;
sound/soc/tegra/tegra210_peq.c
183
tegra210_peq_write_ram(ope->peq_regmap, reg_ctrl, reg_data,
sound/soc/tegra/tegra210_peq.c
59
unsigned int reg_data, unsigned int ram_offset,
sound/soc/tegra/tegra210_peq.c
77
regmap_read(regmap, reg_data, &data[i]);
sound/soc/tegra/tegra210_peq.c
81
unsigned int reg_data, unsigned int ram_offset,
sound/soc/tegra/tegra210_peq.c
95
regmap_write(regmap, reg_data, data[i]);
