arch/m68k/include/asm/io_mm.h
206
#define isa_outl(val,port) (ISA_SEX ? out_be32(isa_itl(port),(val)) : out_le32(isa_itl(port),(val)))
arch/m68k/include/asm/raw_io.h
45
#define raw_outl(val,port) out_be32((port),(val))
arch/m68k/include/asm/raw_io.h
48
#define __raw_writel(val,addr) out_be32((addr),(val))
arch/m68k/mvme16x/config.c
411
out_be32(PCCTCNT1, 0);
arch/m68k/mvme16x/config.c
412
out_be32(PCCTCMP1, PCC_TIMER_CYCLES);
arch/microblaze/include/asm/io.h
44
#define writel_be(v, a) out_be32((__force unsigned *)a, v)
arch/powerpc/boot/cpm-serial.c
104
out_be32(cpcr, op | cpm_cmd | 0x10000);
arch/powerpc/boot/cpm-serial.c
119
out_be32(&scc->gsmrl, in_be32(&scc->gsmrl) & ~0x30);
arch/powerpc/boot/cpm-serial.c
130
out_be32(&scc->gsmrl, in_be32(&scc->gsmrl) | 0x30);
arch/powerpc/boot/cuboot-pq2.c
101
out_be32(&ctrl_addr[cs * 2], 0);
arch/powerpc/boot/cuboot-pq2.c
102
out_be32(&ctrl_addr[cs * 2 + 1],
arch/powerpc/boot/cuboot-pq2.c
104
out_be32(&ctrl_addr[cs * 2], base | cs_ranges_buf[i].addr);
arch/powerpc/boot/cuboot-pq2.c
185
out_be32(&pci_regs[1][0], mem_base->phys_addr | 1);
arch/powerpc/boot/cuboot-pq2.c
186
out_be32(&pci_regs[2][0], ~(mem->size[1] + mmio->size[1] - 1));
arch/powerpc/boot/cuboot-pq2.c
188
out_be32(&pci_regs[1][1], io->phys_addr | 1);
arch/powerpc/boot/cuboot-pq2.c
189
out_be32(&pci_regs[2][1], ~(io->size[1] - 1));
arch/powerpc/boot/cuboot-pq2.c
230
out_be32((u32 *)&soc_regs[0x1002c], 0x01236745);
arch/powerpc/boot/ugecon.c
47
out_be32(csr_reg, csr);
arch/powerpc/boot/ugecon.c
51
out_be32(data_reg, data);
arch/powerpc/boot/ugecon.c
53
out_be32(cr_reg, cr);
arch/powerpc/boot/ugecon.c
59
out_be32(csr_reg, 0);
arch/powerpc/boot/wii.c
146
out_be32(EXI_CTRL, in_be32(EXI_CTRL) | EXI_CTRL_ENABLE);
arch/powerpc/include/asm/io.h
172
DEF_MMIO_OUT_D(out_be32, 32, stw);
arch/powerpc/include/asm/io.h
182
DEF_MMIO_OUT_X(out_be32, 32, stwbrx);
arch/powerpc/include/asm/io.h
552
out_be32(addr, val);
arch/powerpc/include/asm/io.h
930
#define setbits32(_addr, _v) out_be32((_addr), in_be32(_addr) | (_v))
arch/powerpc/include/asm/io.h
931
#define clrbits32(_addr, _v) out_be32((_addr), in_be32(_addr) & ~(_v))
arch/powerpc/include/asm/mpic_msgr.h
113
out_be32(msgr->base, 1 << get_hard_smp_processor_id(cpu_num));
arch/powerpc/include/asm/mpic_msgr.h
75
out_be32(msgr->base, message);
arch/powerpc/include/asm/pmac_feature.h
391
#define UN_OUT(r,v) (out_be32(UN_REG(r), (v)))
arch/powerpc/include/asm/tsi108.h
110
out_be32((volatile u32 *)(tsi108_csr_vir_base + reg_offset), val);
arch/powerpc/kernel/rtas_pci.c
180
out_be32(chip_regs + 0xf6030, val);
arch/powerpc/platforms/44x/pci.c
1023
out_be32(port->utl_base + PEUTL_PBCTL, 0x0800000c);
arch/powerpc/platforms/44x/pci.c
1024
out_be32(port->utl_base + PEUTL_OUTTR, 0x08000000);
arch/powerpc/platforms/44x/pci.c
1025
out_be32(port->utl_base + PEUTL_INTR, 0x02000000);
arch/powerpc/platforms/44x/pci.c
1026
out_be32(port->utl_base + PEUTL_OPDBSZ, 0x04000000);
arch/powerpc/platforms/44x/pci.c
1027
out_be32(port->utl_base + PEUTL_PBBSZ, 0x00000000);
arch/powerpc/platforms/44x/pci.c
1028
out_be32(port->utl_base + PEUTL_IPHBSZ, 0x02000000);
arch/powerpc/platforms/44x/pci.c
1029
out_be32(port->utl_base + PEUTL_IPDBSZ, 0x04000000);
arch/powerpc/platforms/44x/pci.c
1030
out_be32(port->utl_base + PEUTL_RCIRQEN,0x00f00000);
arch/powerpc/platforms/44x/pci.c
1031
out_be32(port->utl_base + PEUTL_PCTL, 0x80800066);
arch/powerpc/platforms/44x/pci.c
1221
out_be32 (port->utl_base + PEUTL_PBBSZ, 0x00000000);
arch/powerpc/platforms/44x/pci.c
1223
out_be32(port->utl_base + PEUTL_PCTL, 0x80800000);
arch/powerpc/platforms/44x/pci.c
1518
out_be32(port->utl_base + PEUTL_RCSTA, 0x00040000);
arch/powerpc/platforms/44x/pci.c
896
out_be32(port->utl_base + PEUTL_OUTTR, 0x08000000);
arch/powerpc/platforms/44x/pci.c
897
out_be32(port->utl_base + PEUTL_INTR, 0x02000000);
arch/powerpc/platforms/44x/pci.c
898
out_be32(port->utl_base + PEUTL_OPDBSZ, 0x10000000);
arch/powerpc/platforms/44x/pci.c
899
out_be32(port->utl_base + PEUTL_PBBSZ, 0x53000000);
arch/powerpc/platforms/44x/pci.c
900
out_be32(port->utl_base + PEUTL_IPHBSZ, 0x08000000);
arch/powerpc/platforms/44x/pci.c
901
out_be32(port->utl_base + PEUTL_IPDBSZ, 0x10000000);
arch/powerpc/platforms/44x/pci.c
902
out_be32(port->utl_base + PEUTL_RCIRQEN, 0x00f00000);
arch/powerpc/platforms/44x/pci.c
903
out_be32(port->utl_base + PEUTL_PCTL, 0x80800066);
arch/powerpc/platforms/44x/pci.c
911
out_be32(port->utl_base + PEUTL_PBCTL, 0x08000000);
arch/powerpc/platforms/44x/warp.c
131
out_be32(dtm_fpga + 0x14, reset);
arch/powerpc/platforms/44x/warp.c
287
out_be32(fpga + 0x20, temp);
arch/powerpc/platforms/512x/clock-commonclk.c
652
out_be32(mccr_reg, (0 << 16));
arch/powerpc/platforms/512x/clock-commonclk.c
653
out_be32(mccr_reg, (0 << 16) | ((div - 1) << 17));
arch/powerpc/platforms/512x/clock-commonclk.c
654
out_be32(mccr_reg, (1 << 16) | ((div - 1) << 17));
arch/powerpc/platforms/512x/mpc512x_lpbfifo.c
267
out_be32(&lpbfifo.regs->enable,
arch/powerpc/platforms/512x/mpc512x_lpbfifo.c
269
out_be32(&lpbfifo.regs->enable, 0x0);
arch/powerpc/platforms/512x/mpc512x_lpbfifo.c
278
out_be32(&lpbfifo.regs->fifo_ctrl, MPC512X_SCLPC_FIFO_CTRL(0x7));
arch/powerpc/platforms/512x/mpc512x_lpbfifo.c
279
out_be32(&lpbfifo.regs->fifo_alarm, MPC512X_SCLPC_FIFO_ALARM(0x200));
arch/powerpc/platforms/512x/mpc512x_lpbfifo.c
285
out_be32(&lpbfifo.regs->start_addr, lpbfifo.req->dev_phys_addr);
arch/powerpc/platforms/512x/mpc512x_lpbfifo.c
297
out_be32(&lpbfifo.regs->ctrl, bits);
arch/powerpc/platforms/512x/mpc512x_lpbfifo.c
306
out_be32(&lpbfifo.regs->enable, bits);
arch/powerpc/platforms/512x/mpc512x_lpbfifo.c
310
out_be32(&lpbfifo.regs->pkt_size, bits);
arch/powerpc/platforms/512x/mpc512x_lpbfifo.c
322
out_be32(&lpbfifo.regs->enable,
arch/powerpc/platforms/512x/mpc512x_lpbfifo.c
445
out_be32(&lpbfifo.regs->enable,
arch/powerpc/platforms/512x/mpc512x_lpbfifo.c
490
out_be32(®s->enable, MPC512X_SCLPC_RESET | MPC512X_SCLPC_FIFO_RESET);
arch/powerpc/platforms/512x/mpc512x_lpbfifo.c
84
out_be32(&lpbfifo.regs->enable,
arch/powerpc/platforms/512x/mpc512x_lpbfifo.c
89
out_be32(&lpbfifo.regs->status, MPC512X_SCLPC_SUCCESS);
arch/powerpc/platforms/512x/mpc512x_shared.c
263
out_be32(&diu_reg->gamma, virt_to_phys(&diu_shared_fb.gamma));
arch/powerpc/platforms/512x/mpc512x_shared.c
264
out_be32(&diu_reg->desc[1], 0);
arch/powerpc/platforms/512x/mpc512x_shared.c
265
out_be32(&diu_reg->desc[2], 0);
arch/powerpc/platforms/512x/mpc512x_shared.c
266
out_be32(&diu_reg->desc[0], virt_to_phys(&diu_shared_fb.ad0));
arch/powerpc/platforms/512x/mpc512x_shared.c
36
out_be32(&reset_module_base->rpr, 0x52535445);
arch/powerpc/platforms/512x/mpc512x_shared.c
38
out_be32(&reset_module_base->rcr, 0x2);
arch/powerpc/platforms/512x/mpc512x_shared.c
429
out_be32(&FIFOC(psc)->txsz, (fifobase << 16) | tx_fifo_size);
arch/powerpc/platforms/512x/mpc512x_shared.c
431
out_be32(&FIFOC(psc)->rxsz, (fifobase << 16) | rx_fifo_size);
arch/powerpc/platforms/512x/mpc512x_shared.c
435
out_be32(&FIFOC(psc)->txcmd, 0x80);
arch/powerpc/platforms/512x/mpc512x_shared.c
436
out_be32(&FIFOC(psc)->txcmd, 0x01);
arch/powerpc/platforms/512x/mpc512x_shared.c
437
out_be32(&FIFOC(psc)->rxcmd, 0x80);
arch/powerpc/platforms/512x/mpc512x_shared.c
438
out_be32(&FIFOC(psc)->rxcmd, 0x01);
arch/powerpc/platforms/512x/mpc512x_shared.c
503
out_be32(&lpc->cs_cfg[cs], val);
arch/powerpc/platforms/512x/pdm360ng.c
67
out_be32(pdm360ng_gpio_base + 0xc, 0xffffffff);
arch/powerpc/platforms/52xx/lite5200.c
115
out_be32(&gpio->port_config, port_config);
arch/powerpc/platforms/52xx/lite5200.c
135
out_be32(mbar + 0x1048, in_be32(mbar + 0x1048) & ~0x300);
arch/powerpc/platforms/52xx/lite5200.c
137
out_be32(mbar + 0x1050, 0x00000001);
arch/powerpc/platforms/52xx/lite5200.c
143
out_be32(mbar + 0x1050, 0x00010000);
arch/powerpc/platforms/52xx/lite5200_pm.c
128
out_be32(&xlb->snoop_window, sxlb.snoop_window);
arch/powerpc/platforms/52xx/lite5200_pm.c
129
out_be32(&xlb->master_priority, sxlb.master_priority);
arch/powerpc/platforms/52xx/lite5200_pm.c
130
out_be32(&xlb->master_pri_enable, sxlb.master_pri_enable);
arch/powerpc/platforms/52xx/lite5200_pm.c
133
out_be32(&xlb->int_enable, sxlb.int_enable);
arch/powerpc/platforms/52xx/lite5200_pm.c
134
out_be32(&xlb->config, sxlb.config);
arch/powerpc/platforms/52xx/lite5200_pm.c
145
out_be32(&cdm->clk_enables, scdm.clk_enables);
arch/powerpc/platforms/52xx/lite5200_pm.c
156
out_be32(&bes->taskBar, sbes.taskBar);
arch/powerpc/platforms/52xx/lite5200_pm.c
157
out_be32(&bes->currentPointer, sbes.currentPointer);
arch/powerpc/platforms/52xx/lite5200_pm.c
158
out_be32(&bes->endPointer, sbes.endPointer);
arch/powerpc/platforms/52xx/lite5200_pm.c
159
out_be32(&bes->variablePointer, sbes.variablePointer);
arch/powerpc/platforms/52xx/lite5200_pm.c
168
out_be32(&bes->cReqSelect, sbes.cReqSelect);
arch/powerpc/platforms/52xx/lite5200_pm.c
169
out_be32(&bes->task_size0, sbes.task_size0);
arch/powerpc/platforms/52xx/lite5200_pm.c
170
out_be32(&bes->task_size1, sbes.task_size1);
arch/powerpc/platforms/52xx/lite5200_pm.c
171
out_be32(&bes->MDEDebug, sbes.MDEDebug);
arch/powerpc/platforms/52xx/lite5200_pm.c
172
out_be32(&bes->ADSDebug, sbes.ADSDebug);
arch/powerpc/platforms/52xx/lite5200_pm.c
173
out_be32(&bes->Value1, sbes.Value1);
arch/powerpc/platforms/52xx/lite5200_pm.c
174
out_be32(&bes->Value2, sbes.Value2);
arch/powerpc/platforms/52xx/lite5200_pm.c
175
out_be32(&bes->Control, sbes.Control);
arch/powerpc/platforms/52xx/lite5200_pm.c
176
out_be32(&bes->Status, sbes.Status);
arch/powerpc/platforms/52xx/lite5200_pm.c
177
out_be32(&bes->PTDDebug, sbes.PTDDebug);
arch/powerpc/platforms/52xx/lite5200_pm.c
184
out_be32(&bes->IntPend, sbes.IntPend);
arch/powerpc/platforms/52xx/lite5200_pm.c
185
out_be32(&bes->IntMask, sbes.IntMask);
arch/powerpc/platforms/52xx/lite5200_pm.c
189
out_be32(&pic->per_pri1, spic.per_pri1);
arch/powerpc/platforms/52xx/lite5200_pm.c
190
out_be32(&pic->per_pri2, spic.per_pri2);
arch/powerpc/platforms/52xx/lite5200_pm.c
191
out_be32(&pic->per_pri3, spic.per_pri3);
arch/powerpc/platforms/52xx/lite5200_pm.c
193
out_be32(&pic->main_pri1, spic.main_pri1);
arch/powerpc/platforms/52xx/lite5200_pm.c
194
out_be32(&pic->main_pri2, spic.main_pri2);
arch/powerpc/platforms/52xx/lite5200_pm.c
196
out_be32(&pic->enc_status, spic.enc_status);
arch/powerpc/platforms/52xx/lite5200_pm.c
199
out_be32(&pic->per_mask, spic.per_mask);
arch/powerpc/platforms/52xx/lite5200_pm.c
200
out_be32(&pic->main_mask, spic.main_mask);
arch/powerpc/platforms/52xx/lite5200_pm.c
201
out_be32(&pic->ctrl, spic.ctrl);
arch/powerpc/platforms/52xx/media5200.c
167
out_be32(media5200_irq.regs + MEDIA5200_IRQ_ENABLE, 0);
arch/powerpc/platforms/52xx/media5200.c
223
out_be32(&gpio->port_config, port_config);
arch/powerpc/platforms/52xx/media5200.c
56
out_be32(media5200_irq.regs + MEDIA5200_IRQ_ENABLE, val);
arch/powerpc/platforms/52xx/media5200.c
68
out_be32(media5200_irq.regs + MEDIA5200_IRQ_ENABLE, val);
arch/powerpc/platforms/52xx/mpc52xx_common.c
197
out_be32(&mpc52xx_cdm->clk_enables, val | mask);
arch/powerpc/platforms/52xx/mpc52xx_common.c
214
out_be32(&mpc52xx_wdt->mode, 0x00000000);
arch/powerpc/platforms/52xx/mpc52xx_common.c
215
out_be32(&mpc52xx_wdt->count, 0x000000ff);
arch/powerpc/platforms/52xx/mpc52xx_common.c
216
out_be32(&mpc52xx_wdt->mode, 0x00009004);
arch/powerpc/platforms/52xx/mpc52xx_common.c
274
out_be32(&simple_gpio->port_config, mux & (~gpio));
arch/powerpc/platforms/52xx/mpc52xx_common.c
298
out_be32(&simple_gpio->port_config, mux);
arch/powerpc/platforms/52xx/mpc52xx_common.c
71
out_be32(&xlb->master_pri_enable, 0xff);
arch/powerpc/platforms/52xx/mpc52xx_common.c
72
out_be32(&xlb->master_priority, 0x11111111);
arch/powerpc/platforms/52xx/mpc52xx_common.c
81
out_be32(&xlb->config, in_be32(&xlb->config) | MPC52xx_XLB_CFG_PLDIS);
arch/powerpc/platforms/52xx/mpc52xx_gpt.c
161
out_be32(&gpt->regs->status, MPC52xx_GPT_STATUS_IRQMASK);
arch/powerpc/platforms/52xx/mpc52xx_gpt.c
178
out_be32(&gpt->regs->mode, reg);
arch/powerpc/platforms/52xx/mpc52xx_gpt.c
265
out_be32(&gpt->regs->mode, mode | MPC52xx_GPT_MODE_MS_IC);
arch/powerpc/platforms/52xx/mpc52xx_gpt.c
440
out_be32(&gpt->regs->count, prescale << 16 | clocks);
arch/powerpc/platforms/52xx/mpc52xx_pci.c
118
out_be32(hose->cfg_addr,
arch/powerpc/platforms/52xx/mpc52xx_pci.c
158
out_be32(hose->cfg_addr, 0);
arch/powerpc/platforms/52xx/mpc52xx_pci.c
175
out_be32(hose->cfg_addr,
arch/powerpc/platforms/52xx/mpc52xx_pci.c
222
out_be32(hose->cfg_addr, 0);
arch/powerpc/platforms/52xx/mpc52xx_pci.c
256
out_be32(&pci_regs->scr, tmp);
arch/powerpc/platforms/52xx/mpc52xx_pci.c
262
out_be32(&pci_regs->iw0btar,
arch/powerpc/platforms/52xx/mpc52xx_pci.c
275
out_be32(&pci_regs->iw1btar,
arch/powerpc/platforms/52xx/mpc52xx_pci.c
293
out_be32(&pci_regs->iw2btar,
arch/powerpc/platforms/52xx/mpc52xx_pci.c
300
out_be32(&pci_regs->iwcr, MPC52xx_PCI_IWCR_PACK(iwcr0, iwcr1, iwcr2));
arch/powerpc/platforms/52xx/mpc52xx_pci.c
304
out_be32(&pci_regs->tbatr0, MPC52xx_PCI_TBATR_ENABLE | pci_phys);
arch/powerpc/platforms/52xx/mpc52xx_pci.c
305
out_be32(&pci_regs->bar0, PCI_BASE_ADDRESS_MEM_PREFETCH | pci_phys);
arch/powerpc/platforms/52xx/mpc52xx_pci.c
308
out_be32(&pci_regs->tbatr1, MPC52xx_PCI_TBATR_ENABLE);
arch/powerpc/platforms/52xx/mpc52xx_pci.c
309
out_be32(&pci_regs->bar1, PCI_BASE_ADDRESS_MEM_PREFETCH);
arch/powerpc/platforms/52xx/mpc52xx_pci.c
311
out_be32(&pci_regs->tcr, MPC52xx_PCI_TCR_LD | MPC52xx_PCI_TCR_WCT8);
arch/powerpc/platforms/52xx/mpc52xx_pci.c
319
out_be32(&pci_regs->gscr, tmp | MPC52xx_PCI_GSCR_PR);
arch/powerpc/platforms/52xx/mpc52xx_pci.c
324
out_be32(&pci_regs->gscr, tmp & ~MPC52xx_PCI_GSCR_PR);
arch/powerpc/platforms/52xx/mpc52xx_pic.c
148
out_be32(addr, in_be32(addr) | (1 << bitno));
arch/powerpc/platforms/52xx/mpc52xx_pic.c
153
out_be32(addr, in_be32(addr) & ~(1 << bitno));
arch/powerpc/platforms/52xx/mpc52xx_pic.c
198
out_be32(&intr->ctrl, ctrl_reg);
arch/powerpc/platforms/52xx/mpc52xx_pic.c
282
out_be32(&sdma->IntPend, 1 << l2irq);
arch/powerpc/platforms/52xx/mpc52xx_pic.c
426
out_be32(&sdma->IntPend, 0xffffffff); /* 1 means clear pending */
arch/powerpc/platforms/52xx/mpc52xx_pic.c
427
out_be32(&sdma->IntMask, 0xffffffff); /* 1 means disabled */
arch/powerpc/platforms/52xx/mpc52xx_pic.c
428
out_be32(&intr->per_mask, 0x7ffffc00); /* 1 means disabled */
arch/powerpc/platforms/52xx/mpc52xx_pic.c
429
out_be32(&intr->main_mask, 0x00010fff); /* 1 means disabled */
arch/powerpc/platforms/52xx/mpc52xx_pic.c
436
out_be32(&intr->ctrl, intr_ctrl);
arch/powerpc/platforms/52xx/mpc52xx_pic.c
439
out_be32(&intr->per_pri1, 0);
arch/powerpc/platforms/52xx/mpc52xx_pic.c
440
out_be32(&intr->per_pri2, 0);
arch/powerpc/platforms/52xx/mpc52xx_pic.c
441
out_be32(&intr->per_pri3, 0);
arch/powerpc/platforms/52xx/mpc52xx_pic.c
442
out_be32(&intr->main_pri1, 0);
arch/powerpc/platforms/52xx/mpc52xx_pic.c
443
out_be32(&intr->main_pri2, 0);
arch/powerpc/platforms/52xx/mpc52xx_pm.c
129
out_be32(&intr->main_mask, intr_main_mask | 0x1ffff);
arch/powerpc/platforms/52xx/mpc52xx_pm.c
146
out_be32(&cdm->clk_enables, clk_enables & 0x00088000);
arch/powerpc/platforms/52xx/mpc52xx_pm.c
173
out_be32(&cdm->clk_enables, clk_enables);
arch/powerpc/platforms/52xx/mpc52xx_pm.c
181
out_be32(&intr->main_mask, intr_main_mask);
arch/powerpc/platforms/83xx/misc.c
48
out_be32(restart_reg_base + (RST_PROT_REG >> 2), 0x52535445);
arch/powerpc/platforms/83xx/misc.c
51
out_be32(restart_reg_base + (RST_CTRL_REG >> 2), 0x2);
arch/powerpc/platforms/83xx/misc.c
67
out_be32(spcr, tmp | SPCR_TBEN);
arch/powerpc/platforms/83xx/suspend.c
133
out_be32(&pmc_regs->config1, reg_cfg1);
arch/powerpc/platforms/83xx/suspend.c
152
out_be32(&pmc_regs->event, event);
arch/powerpc/platforms/83xx/suspend.c
161
out_be32(&syscr_regs->sicrl, saved_regs.sicrl);
arch/powerpc/platforms/83xx/suspend.c
162
out_be32(&syscr_regs->sicrh, saved_regs.sicrh);
arch/powerpc/platforms/83xx/suspend.c
163
out_be32(&clock_regs->sccr, saved_regs.sccr);
arch/powerpc/platforms/83xx/suspend.c
185
out_be32(&pmc_regs->config1,
arch/powerpc/platforms/83xx/suspend.c
194
out_be32(&pmc_regs->config, PMCCR_SLPEN | PMCCR_DLPEN);
arch/powerpc/platforms/83xx/suspend.c
204
out_be32(&pmc_regs->mask, PMCER_ALL);
arch/powerpc/platforms/83xx/suspend.c
206
out_be32(&pmc_regs->config1,
arch/powerpc/platforms/83xx/suspend.c
214
out_be32(&pmc_regs->config1,
arch/powerpc/platforms/83xx/suspend.c
217
out_be32(&pmc_regs->mask, PMCER_PMCI);
arch/powerpc/platforms/83xx/suspend.c
221
out_be32(&pmc_regs->mask, PMCER_PMCI);
arch/powerpc/platforms/83xx/suspend.c
229
out_be32(&pmc_regs->config1,
arch/powerpc/platforms/83xx/suspend.c
293
out_be32(&pmc_regs->config1, PMCCR1_USE_STATE);
arch/powerpc/platforms/83xx/suspend.c
294
out_be32(&pmc_regs->mask, PMCER_PMCI);
arch/powerpc/platforms/83xx/usb_831x.c
104
out_be32(usb_regs + FSL_USB2_CONTROL_OFFS,
arch/powerpc/platforms/83xx/usb_831x.c
118
out_be32(usb_regs + FSL_USB2_CONTROL_OFFS, temp);
arch/powerpc/platforms/83xx/usb_834x.c
84
out_be32(immap + MPC83XX_SCCR_OFFS, sccr);
arch/powerpc/platforms/83xx/usb_834x.c
85
out_be32(immap + MPC83XX_SICRL_OFFS, sicrl);
arch/powerpc/platforms/83xx/usb_834x.c
86
out_be32(immap + MPC83XX_SICRH_OFFS, sicrh);
arch/powerpc/platforms/85xx/p1022_ds.c
253
out_be32(&lbc->bank[0].br, br0);
arch/powerpc/platforms/85xx/p1022_ds.c
254
out_be32(&lbc->bank[0].or, or0);
arch/powerpc/platforms/85xx/p1022_ds.c
259
out_be32(&lbc->bank[1].br, br1);
arch/powerpc/platforms/85xx/p1022_ds.c
260
out_be32(&lbc->bank[1].or, or1);
arch/powerpc/platforms/85xx/smp.c
250
out_be32(&spin_table->pir, hw_cpu);
arch/powerpc/platforms/85xx/smp.c
262
out_be32(&spin_table->addr_h, __pa(__early_start) >> 32);
arch/powerpc/platforms/85xx/smp.c
264
out_be32(&spin_table->addr_l, __pa(__early_start));
arch/powerpc/platforms/85xx/socrates_fpga_pic.c
62
out_be32(socrates_fpga_pic_iobase + reg, val);
arch/powerpc/platforms/85xx/xes_mpc85xx.c
71
out_be32(l2_base, ctl);
arch/powerpc/platforms/86xx/mpc86xx_smp.c
50
out_be32(mcm_vaddr + (MCM_PORT_CONFIG_OFFSET >> 2), pcr);
arch/powerpc/platforms/8xx/cpm1-ic.c
107
out_be32(&data->reg->cpic_cicr,
arch/powerpc/platforms/8xx/cpm1-ic.c
111
out_be32(&data->reg->cpic_cimr, 0);
arch/powerpc/platforms/8xx/cpm1-ic.c
39
out_be32(&data->reg->cpic_cisr, (1 << cpm_vec));
arch/powerpc/platforms/8xx/cpm1.c
136
out_be32(bp, (((BRG_UART_CLK / rate) - 1) << 1) | CPM_BRG_EN);
arch/powerpc/platforms/8xx/cpm1.c
138
out_be32(bp, (((BRG_UART_CLK_DIV16 / rate) - 1) << 1) |
arch/powerpc/platforms/8xx/cpm1.c
368
out_be32(reg, (in_be32(reg) & ~mask) | bits);
arch/powerpc/platforms/8xx/cpm1.c
556
out_be32(&iop->dat, cpm1_gc->cpdata);
arch/powerpc/platforms/8xx/cpm1.c
80
out_be32(&mpc8xx_immr->im_siu_conf.sc_sdcr, 0x40);
arch/powerpc/platforms/8xx/cpm1.c
82
out_be32(&mpc8xx_immr->im_siu_conf.sc_sdcr, 1);
arch/powerpc/platforms/8xx/m8xx_setup.c
102
out_be32(&mpc8xx_immr->im_sitk.sitk_tbscrk, ~KAPWR_KEY);
arch/powerpc/platforms/8xx/m8xx_setup.c
103
out_be32(&mpc8xx_immr->im_sitk.sitk_rtcsck, ~KAPWR_KEY);
arch/powerpc/platforms/8xx/m8xx_setup.c
104
out_be32(&mpc8xx_immr->im_sitk.sitk_tbk, ~KAPWR_KEY);
arch/powerpc/platforms/8xx/m8xx_setup.c
105
out_be32(&mpc8xx_immr->im_sitk.sitk_tbscrk, KAPWR_KEY);
arch/powerpc/platforms/8xx/m8xx_setup.c
106
out_be32(&mpc8xx_immr->im_sitk.sitk_rtcsck, KAPWR_KEY);
arch/powerpc/platforms/8xx/m8xx_setup.c
107
out_be32(&mpc8xx_immr->im_sitk.sitk_tbk, KAPWR_KEY);
arch/powerpc/platforms/8xx/m8xx_setup.c
144
out_be32(&mpc8xx_immr->im_sitk.sitk_rtck, KAPWR_KEY);
arch/powerpc/platforms/8xx/m8xx_setup.c
145
out_be32(&mpc8xx_immr->im_sit.sit_rtc, (u32)time);
arch/powerpc/platforms/8xx/m8xx_setup.c
146
out_be32(&mpc8xx_immr->im_sitk.sitk_rtck, ~KAPWR_KEY);
arch/powerpc/platforms/8xx/m8xx_setup.c
71
out_be32(&mpc8xx_immr->im_clkrstk.cark_sccrk, ~KAPWR_KEY);
arch/powerpc/platforms/8xx/m8xx_setup.c
72
out_be32(&mpc8xx_immr->im_clkrstk.cark_sccrk, KAPWR_KEY);
arch/powerpc/platforms/8xx/micropatch.c
370
out_be32(dst, in_be32(src));
arch/powerpc/platforms/8xx/pic.c
30
out_be32(&siu_reg->sc_simask, mpc8xx_cached_irq_mask);
arch/powerpc/platforms/8xx/pic.c
36
out_be32(&siu_reg->sc_simask, mpc8xx_cached_irq_mask);
arch/powerpc/platforms/8xx/pic.c
41
out_be32(&siu_reg->sc_sipend, mpc8xx_irqd_to_bit(d));
arch/powerpc/platforms/8xx/pic.c
47
out_be32(&siu_reg->sc_simask, mpc8xx_cached_irq_mask);
arch/powerpc/platforms/8xx/pic.c
56
out_be32(&siu_reg->sc_siel, siel);
arch/powerpc/platforms/cell/spufs/hw_ops.c
112
out_be32(&prob->spu_mb_W, data);
arch/powerpc/platforms/cell/spufs/hw_ops.c
126
out_be32(&ctx->spu->problem->signal_notify1, data);
arch/powerpc/platforms/cell/spufs/hw_ops.c
131
out_be32(&ctx->spu->problem->signal_notify2, data);
arch/powerpc/platforms/cell/spufs/hw_ops.c
183
out_be32(&ctx->spu->problem->spu_npc_RW, val);
arch/powerpc/platforms/cell/spufs/hw_ops.c
212
out_be32(&ctx->spu->problem->spu_runcntl_RW, val);
arch/powerpc/platforms/cell/spufs/hw_ops.c
219
out_be32(&ctx->spu->problem->spu_runcntl_RW, SPU_RUNCNTL_STOP);
arch/powerpc/platforms/cell/spufs/hw_ops.c
257
out_be32(&prob->dma_querymask_RW, mask);
arch/powerpc/platforms/cell/spufs/hw_ops.c
258
out_be32(&prob->dma_querytype_RW, mode);
arch/powerpc/platforms/cell/spufs/hw_ops.c
281
out_be32(&prob->mfc_lsa_W, cmd->lsa);
arch/powerpc/platforms/cell/spufs/hw_ops.c
283
out_be32(&prob->mfc_union_W.by32.mfc_size_tag32,
arch/powerpc/platforms/cell/spufs/hw_ops.c
285
out_be32(&prob->mfc_union_W.by32.mfc_class_cmd32,
arch/powerpc/platforms/cell/spufs/switch.c
1010
out_be32(&prob->spu_runcntl_RW, SPU_RUNCNTL_STOP);
arch/powerpc/platforms/cell/spufs/switch.c
1014
out_be32(&prob->spu_runcntl_RW, 0x2);
arch/powerpc/platforms/cell/spufs/switch.c
1021
out_be32(&prob->spu_runcntl_RW, SPU_RUNCNTL_STOP);
arch/powerpc/platforms/cell/spufs/switch.c
1045
out_be32(&prob->spu_runcntl_RW, SPU_RUNCNTL_RUNNABLE);
arch/powerpc/platforms/cell/spufs/switch.c
1057
out_be32(&prob->spu_runcntl_RW, 0x2);
arch/powerpc/platforms/cell/spufs/switch.c
1334
out_be32(&prob->spu_runcntl_RW, SPU_RUNCNTL_RUNNABLE);
arch/powerpc/platforms/cell/spufs/switch.c
1357
out_be32(&prob->spu_runcntl_RW, SPU_RUNCNTL_RUNNABLE);
arch/powerpc/platforms/cell/spufs/switch.c
1361
out_be32(&prob->spu_runcntl_RW, SPU_RUNCNTL_STOP);
arch/powerpc/platforms/cell/spufs/switch.c
1457
out_be32(&prob->dma_querymask_RW, csa->prob.dma_querymask_RW);
arch/powerpc/platforms/cell/spufs/switch.c
1468
out_be32(&prob->dma_querytype_RW, csa->prob.dma_querytype_RW);
arch/powerpc/platforms/cell/spufs/switch.c
1636
out_be32(&prob->spu_npc_RW, csa->prob.spu_npc_RW);
arch/powerpc/platforms/cell/spufs/switch.c
1720
out_be32(&prob->spu_runcntl_RW, SPU_RUNCNTL_RUNNABLE);
arch/powerpc/platforms/cell/spufs/switch.c
1877
out_be32(&prob->spu_runcntl_RW, SPU_RUNCNTL_STOP);
arch/powerpc/platforms/cell/spufs/switch.c
1888
out_be32(&prob->spu_runcntl_RW, 2);
arch/powerpc/platforms/cell/spufs/switch.c
232
out_be32(&prob->spu_runcntl_RW, SPU_RUNCNTL_STOP);
arch/powerpc/platforms/cell/spufs/switch.c
782
out_be32(&prob->mfc_lsa_W, ls_offset);
arch/powerpc/platforms/cell/spufs/switch.c
827
out_be32(&prob->spu_npc_RW, 0);
arch/powerpc/platforms/cell/spufs/switch.c
845
out_be32(&prob->signal_notify1, addr64.ui[0]);
arch/powerpc/platforms/cell/spufs/switch.c
863
out_be32(&prob->signal_notify2, addr64.ui[1]);
arch/powerpc/platforms/cell/spufs/switch.c
892
out_be32(&prob->dma_querymask_RW, MFC_TAGID_TO_TAGMASK(0));
arch/powerpc/platforms/chrp/pci.c
180
out_be32(®[12], val & ~PRG_CL_RESET_VALID);
arch/powerpc/platforms/chrp/setup.c
248
out_be32(briq_SPOR, 0);
arch/powerpc/platforms/embedded6xx/flipper-pic.c
119
out_be32(io_base + FLIPPER_IMR, 0x00000000);
arch/powerpc/platforms/embedded6xx/flipper-pic.c
120
out_be32(io_base + FLIPPER_ICR, 0xffffffff);
arch/powerpc/platforms/embedded6xx/flipper-pic.c
54
out_be32(io_base + FLIPPER_ICR, mask);
arch/powerpc/platforms/embedded6xx/flipper-pic.c
63
out_be32(io_base + FLIPPER_ICR, 1 << irq);
arch/powerpc/platforms/embedded6xx/hlwd-pic.c
152
out_be32(io_base + HW_BROADWAY_IMR, 0);
arch/powerpc/platforms/embedded6xx/hlwd-pic.c
153
out_be32(io_base + HW_BROADWAY_ICR, 0xffffffff);
arch/powerpc/platforms/embedded6xx/hlwd-pic.c
49
out_be32(io_base + HW_BROADWAY_ICR, mask);
arch/powerpc/platforms/embedded6xx/hlwd-pic.c
57
out_be32(io_base + HW_BROADWAY_ICR, 1 << irq);
arch/powerpc/platforms/embedded6xx/usbgecko_udbg.c
55
out_be32(csr_reg, csr);
arch/powerpc/platforms/embedded6xx/usbgecko_udbg.c
59
out_be32(data_reg, data);
arch/powerpc/platforms/embedded6xx/usbgecko_udbg.c
61
out_be32(cr_reg, cr);
arch/powerpc/platforms/embedded6xx/usbgecko_udbg.c
67
out_be32(csr_reg, 0);
arch/powerpc/platforms/powermac/pci.c
371
swap ? out_le32(addr, val) : out_be32(addr, val);
arch/powerpc/platforms/powermac/smp.c
353
out_be32(psurge_start, start);
arch/powerpc/platforms/powermac/smp.c
410
out_be32(psurge_start, 0x100);
arch/powerpc/sysdev/cpm2.c
131
out_be32(bp, val);
arch/powerpc/sysdev/cpm2.c
256
out_be32(reg, (in_be32(reg) & ~mask) | bits);
arch/powerpc/sysdev/cpm2.c
89
out_be32(&cpmp->cp_cpcr, command | opcode | CPM_CR_FLG);
arch/powerpc/sysdev/cpm2_pic.c
109
out_be32(&cpm2_intctl->ic_sipnrh + word, 1 << bit);
arch/powerpc/sysdev/cpm2_pic.c
121
out_be32(&cpm2_intctl->ic_simrh + word, ppc_cached_irq_mask[word]);
arch/powerpc/sysdev/cpm2_pic.c
180
out_be32(&cpm2_intctl->ic_siexr, vnew);
arch/powerpc/sysdev/cpm2_pic.c
240
out_be32(&cpm2_intctl->ic_simrh, 0x00000000);
arch/powerpc/sysdev/cpm2_pic.c
241
out_be32(&cpm2_intctl->ic_simrl, 0x00000000);
arch/powerpc/sysdev/cpm2_pic.c
246
out_be32(&cpm2_intctl->ic_sipnrh, 0xffffffff);
arch/powerpc/sysdev/cpm2_pic.c
247
out_be32(&cpm2_intctl->ic_sipnrl, 0xffffffff);
arch/powerpc/sysdev/cpm2_pic.c
258
out_be32(&cpm2_intctl->ic_scprrh, 0x05309770);
arch/powerpc/sysdev/cpm2_pic.c
259
out_be32(&cpm2_intctl->ic_scprrl, 0x05309770);
arch/powerpc/sysdev/cpm2_pic.c
86
out_be32(&cpm2_intctl->ic_simrh + word, ppc_cached_irq_mask[word]);
arch/powerpc/sysdev/cpm2_pic.c
98
out_be32(&cpm2_intctl->ic_simrh + word, ppc_cached_irq_mask[word]);
arch/powerpc/sysdev/cpm_common.c
133
out_be32(&iop->dat, cpm2_gc->cpdata);
arch/powerpc/sysdev/cpm_common.c
59
out_be32(&cpm_udbg_txdesc[0], 0xa0000001);
arch/powerpc/sysdev/dart.h
48
#define DART_OUT(r,v) (out_be32(DART_REG(r), (v)))
arch/powerpc/sysdev/ehv_pic.c
68
out_be32(mpic_percpu_base_vaddr + MPIC_EOI / 4, 0);
arch/powerpc/sysdev/fsl_lbc.c
163
out_be32(&fsl_lbc_ctrl_dev->regs->mar, mar);
arch/powerpc/sysdev/fsl_lbc.c
173
out_be32(io_base, 0x0);
arch/powerpc/sysdev/fsl_lbc.c
193
out_be32(&lbc->lteatr, 0);
arch/powerpc/sysdev/fsl_lbc.c
194
out_be32(&lbc->ltear, 0);
arch/powerpc/sysdev/fsl_lbc.c
195
out_be32(&lbc->lteccr, LTECCR_CLEAR);
arch/powerpc/sysdev/fsl_lbc.c
196
out_be32(&lbc->ltedr, LTEDR_ENABLE);
arch/powerpc/sysdev/fsl_lbc.c
224
out_be32(&lbc->ltesr, LTESR_CLEAR);
arch/powerpc/sysdev/fsl_lbc.c
225
out_be32(&lbc->lteatr, 0);
arch/powerpc/sysdev/fsl_lbc.c
226
out_be32(&lbc->ltear, 0);
arch/powerpc/sysdev/fsl_lbc.c
337
out_be32(&fsl_lbc_ctrl_dev->regs->lteir, LTEIR_ENABLE);
arch/powerpc/sysdev/fsl_mpic_err.c
30
out_be32(base + (MPIC_ERR_INT_EIMR >> 2), value);
arch/powerpc/sysdev/fsl_pci.c
1178
out_be32(&pci->pex_pme_mes_dr, dr);
arch/powerpc/sysdev/fsl_pci.c
1223
out_be32(&pci->pex_pme_mes_ier, 0);
arch/powerpc/sysdev/fsl_pci.c
1248
out_be32(&pci->pex_pme_mes_dr, dr);
arch/powerpc/sysdev/fsl_pci.c
1284
out_be32(&pci->pex_pme_mes_dr, dr);
arch/powerpc/sysdev/fsl_pci.c
168
out_be32(&pci->pow[index + i].potar, pci_addr >> 12);
arch/powerpc/sysdev/fsl_pci.c
169
out_be32(&pci->pow[index + i].potear, (u64)pci_addr >> 44);
arch/powerpc/sysdev/fsl_pci.c
170
out_be32(&pci->pow[index + i].powbar, phys_addr >> 12);
arch/powerpc/sysdev/fsl_pci.c
171
out_be32(&pci->pow[index + i].powar, flags | (bits - 1));
arch/powerpc/sysdev/fsl_pci.c
244
out_be32(&pci->pow[i].powar, 0);
arch/powerpc/sysdev/fsl_pci.c
248
out_be32(&pci->piw[i].piwar, 0);
arch/powerpc/sysdev/fsl_pci.c
280
out_be32(&pci->pow[j].potar, (hose->io_resource.start >> 12));
arch/powerpc/sysdev/fsl_pci.c
281
out_be32(&pci->pow[j].potear, 0);
arch/powerpc/sysdev/fsl_pci.c
282
out_be32(&pci->pow[j].powbar, (hose->io_base_phys >> 12));
arch/powerpc/sysdev/fsl_pci.c
284
out_be32(&pci->pow[j].powar, 0x80088000
arch/powerpc/sysdev/fsl_pci.c
367
out_be32(&pci->piw[win_idx].pitar, 0x00000000);
arch/powerpc/sysdev/fsl_pci.c
368
out_be32(&pci->piw[win_idx].piwbar, 0x00000000);
arch/powerpc/sysdev/fsl_pci.c
369
out_be32(&pci->piw[win_idx].piwar, piwar);
arch/powerpc/sysdev/fsl_pci.c
393
out_be32(&pci->piw[win_idx].pitar, 0x00000000);
arch/powerpc/sysdev/fsl_pci.c
394
out_be32(&pci->piw[win_idx].piwbear,
arch/powerpc/sysdev/fsl_pci.c
396
out_be32(&pci->piw[win_idx].piwbar,
arch/powerpc/sysdev/fsl_pci.c
398
out_be32(&pci->piw[win_idx].piwar, piwar);
arch/powerpc/sysdev/fsl_pci.c
414
out_be32(&pci->piw[win_idx].pitar, paddr >> 12);
arch/powerpc/sysdev/fsl_pci.c
415
out_be32(&pci->piw[win_idx].piwbar, paddr >> 12);
arch/powerpc/sysdev/fsl_pci.c
416
out_be32(&pci->piw[win_idx].piwar,
arch/powerpc/sysdev/fsl_pci.c
429
out_be32(&pci->piw[win_idx].pitar,
arch/powerpc/sysdev/fsl_pci.c
431
out_be32(&pci->piw[win_idx].piwbar,
arch/powerpc/sysdev/fsl_pci.c
433
out_be32(&pci->piw[win_idx].piwar, piwar);
arch/powerpc/sysdev/fsl_rio.c
118
out_be32((u32 *)(rio_regs_win + RIO_LTLEDCSR),
arch/powerpc/sysdev/fsl_rio.c
171
out_be32(priv->regs_win + offset, data);
arch/powerpc/sysdev/fsl_rio.c
210
out_be32(&priv->maint_atmu_regs->rowtar,
arch/powerpc/sysdev/fsl_rio.c
212
out_be32(&priv->maint_atmu_regs->rowtear, (destid >> 10));
arch/powerpc/sysdev/fsl_rio.c
275
out_be32(&priv->maint_atmu_regs->rowtar,
arch/powerpc/sysdev/fsl_rio.c
277
out_be32(&priv->maint_atmu_regs->rowtear, (destid >> 10));
arch/powerpc/sysdev/fsl_rio.c
288
out_be32((u32 *) data, val);
arch/powerpc/sysdev/fsl_rio.c
304
out_be32(&priv->inb_atmu_regs[i].riwar, 0);
arch/powerpc/sysdev/fsl_rio.c
350
out_be32(&priv->inb_atmu_regs[i].riwtar, lstart >> RIWTAR_TRAD_VAL_SHIFT);
arch/powerpc/sysdev/fsl_rio.c
351
out_be32(&priv->inb_atmu_regs[i].riwbar, rstart >> RIWBAR_BADD_VAL_SHIFT);
arch/powerpc/sysdev/fsl_rio.c
352
out_be32(&priv->inb_atmu_regs[i].riwar, RIWAR_ENABLE | RIWAR_TGINT_LOCAL |
arch/powerpc/sysdev/fsl_rio.c
375
out_be32(&priv->inb_atmu_regs[i].riwar, riwar & ~RIWAR_ENABLE);
arch/powerpc/sysdev/fsl_rio.c
384
out_be32((u32 *)(rio_regs_win + RIO_LTLEDCSR), 0);
arch/powerpc/sysdev/fsl_rio.c
387
out_be32((u32 *)(rio_regs_win + RIO_PORT1_EDCSR), 0);
arch/powerpc/sysdev/fsl_rio.c
388
out_be32((u32 *)(rio_regs_win + RIO_PORT1_IECSR), IECSR_CLEAR);
arch/powerpc/sysdev/fsl_rio.c
389
out_be32((u32 *)(rio_regs_win + RIO_ESCSR), ESCSR_CLEAR);
arch/powerpc/sysdev/fsl_rio.c
391
out_be32((u32 *)(rio_regs_win + RIO_PORT2_EDCSR), 0);
arch/powerpc/sysdev/fsl_rio.c
392
out_be32((u32 *)(rio_regs_win + RIO_PORT2_IECSR), IECSR_CLEAR);
arch/powerpc/sysdev/fsl_rio.c
393
out_be32((u32 *)(rio_regs_win + RIO_PORT2_ESCSR), ESCSR_CLEAR);
arch/powerpc/sysdev/fsl_rio.c
632
out_be32(priv->regs_win
arch/powerpc/sysdev/fsl_rio.c
660
out_be32(priv->regs_win + RIO_GCCSR, RIO_PORT_GEN_HOST |
arch/powerpc/sysdev/fsl_rio.c
663
out_be32(priv->regs_win + RIO_GCCSR,
arch/powerpc/sysdev/fsl_rio.c
677
out_be32((priv->regs_win + RIO_ISR_AACR + i*0x80),
arch/powerpc/sysdev/fsl_rio.c
681
out_be32(&priv->maint_atmu_regs->rowbar,
arch/powerpc/sysdev/fsl_rio.c
683
out_be32(&priv->maint_atmu_regs->rowar,
arch/powerpc/sysdev/fsl_rmu.c
1041
out_be32(&dbell->dbell_regs->dqdpar, (u32) dbell->dbell_ring.phys);
arch/powerpc/sysdev/fsl_rmu.c
1042
out_be32(&dbell->dbell_regs->dqepar, (u32) dbell->dbell_ring.phys);
arch/powerpc/sysdev/fsl_rmu.c
1045
out_be32(&dbell->dbell_regs->dsr, 0x00000091);
arch/powerpc/sysdev/fsl_rmu.c
1059
out_be32(&dbell->dbell_regs->dmr, 0x00108161);
arch/powerpc/sysdev/fsl_rmu.c
215
out_be32(&rmu->msg_regs->osr, RIO_MSG_OSR_TE);
arch/powerpc/sysdev/fsl_rmu.c
221
out_be32(&rmu->msg_regs->osr, RIO_MSG_OSR_QOI);
arch/powerpc/sysdev/fsl_rmu.c
234
out_be32(&rmu->msg_regs->osr, RIO_MSG_OSR_EOMI);
arch/powerpc/sysdev/fsl_rmu.c
260
out_be32((void *)&rmu->msg_regs->isr, RIO_MSG_ISR_TE);
arch/powerpc/sysdev/fsl_rmu.c
277
out_be32(&rmu->msg_regs->isr, RIO_MSG_ISR_DIQI);
arch/powerpc/sysdev/fsl_rmu.c
303
out_be32(&fsl_dbell->dbell_regs->dsr, DOORBELL_DSR_TE);
arch/powerpc/sysdev/fsl_rmu.c
309
out_be32(&fsl_dbell->dbell_regs->dsr, DOORBELL_DSR_QFI);
arch/powerpc/sysdev/fsl_rmu.c
355
out_be32(&fsl_dbell->dbell_regs->dsr, DOORBELL_DSR_DIQI);
arch/powerpc/sysdev/fsl_rmu.c
366
out_be32((u32 *)(rio_regs_win + RIO_LTLEDCSR), 0);
arch/powerpc/sysdev/fsl_rmu.c
368
out_be32((u32 *)(rmu_regs_win + RIO_IM0SR), IMSR_CLEAR);
arch/powerpc/sysdev/fsl_rmu.c
369
out_be32((u32 *)(rmu_regs_win + RIO_IM1SR), IMSR_CLEAR);
arch/powerpc/sysdev/fsl_rmu.c
370
out_be32((u32 *)(rmu_regs_win + RIO_OM0SR), OMSR_CLEAR);
arch/powerpc/sysdev/fsl_rmu.c
371
out_be32((u32 *)(rmu_regs_win + RIO_OM1SR), OMSR_CLEAR);
arch/powerpc/sysdev/fsl_rmu.c
373
out_be32(&dbell->dbell_regs->odsr, ODSR_CLEAR);
arch/powerpc/sysdev/fsl_rmu.c
374
out_be32(&dbell->dbell_regs->dsr, IDSR_CLEAR);
arch/powerpc/sysdev/fsl_rmu.c
376
out_be32(&pw->pw_regs->pwsr, IPWSR_CLEAR);
arch/powerpc/sysdev/fsl_rmu.c
432
out_be32(&pw->pw_regs->pwsr, RIO_IPWSR_QFI);
arch/powerpc/sysdev/fsl_rmu.c
433
out_be32(&pw->pw_regs->pwmr, ipwmr | RIO_IPWMR_CQ);
arch/powerpc/sysdev/fsl_rmu.c
445
out_be32(&pw->pw_regs->pwmr, ipwmr & ~RIO_IPWMR_PWE);
arch/powerpc/sysdev/fsl_rmu.c
446
out_be32(&pw->pw_regs->pwsr, RIO_IPWSR_TE);
arch/powerpc/sysdev/fsl_rmu.c
447
out_be32(&pw->pw_regs->pwmr, ipwmr);
arch/powerpc/sysdev/fsl_rmu.c
454
out_be32(&pw->pw_regs->pwsr, RIO_IPWSR_PWD);
arch/powerpc/sysdev/fsl_rmu.c
529
out_be32(&pw->pw_regs->pwmr, rval);
arch/powerpc/sysdev/fsl_rmu.c
548
out_be32(&pw->pw_regs->pwmr,
arch/powerpc/sysdev/fsl_rmu.c
564
out_be32(&pw->pw_regs->epwqbar, 0);
arch/powerpc/sysdev/fsl_rmu.c
565
out_be32(&pw->pw_regs->pwqbar, (u32) pw->port_write_msg.phys);
arch/powerpc/sysdev/fsl_rmu.c
572
out_be32(&pw->pw_regs->pwsr,
arch/powerpc/sysdev/fsl_rmu.c
577
out_be32(&pw->pw_regs->pwmr,
arch/powerpc/sysdev/fsl_rmu.c
589
out_be32((u32 *)(rio_regs_win + RIO_LTLEECSR), LTLEECSR_ENABLE_ALL);
arch/powerpc/sysdev/fsl_rmu.c
637
out_be32(&dbell->dbell_regs->odmr, 0x00000000);
arch/powerpc/sysdev/fsl_rmu.c
638
out_be32(&dbell->dbell_regs->odretcr, 0x00000004);
arch/powerpc/sysdev/fsl_rmu.c
639
out_be32(&dbell->dbell_regs->oddpr, destid << 16);
arch/powerpc/sysdev/fsl_rmu.c
640
out_be32(&dbell->dbell_regs->oddatr, (index << 20) | data);
arch/powerpc/sysdev/fsl_rmu.c
641
out_be32(&dbell->dbell_regs->odmr, 0x00000001);
arch/powerpc/sysdev/fsl_rmu.c
698
out_be32(&rmu->msg_regs->omr, omr | RIO_MSG_OMR_MUI);
arch/powerpc/sysdev/fsl_rmu.c
766
out_be32(&rmu->msg_regs->odqdpar, rmu->msg_tx_ring.phys);
arch/powerpc/sysdev/fsl_rmu.c
767
out_be32(&rmu->msg_regs->odqepar, rmu->msg_tx_ring.phys);
arch/powerpc/sysdev/fsl_rmu.c
770
out_be32(&rmu->msg_regs->osar, 0x00000004);
arch/powerpc/sysdev/fsl_rmu.c
773
out_be32(&rmu->msg_regs->osr, 0x000000b3);
arch/powerpc/sysdev/fsl_rmu.c
788
out_be32(&rmu->msg_regs->omr, 0x00100220);
arch/powerpc/sysdev/fsl_rmu.c
791
out_be32(&rmu->msg_regs->omr,
arch/powerpc/sysdev/fsl_rmu.c
796
out_be32(&rmu->msg_regs->omr, in_be32(&rmu->msg_regs->omr) | 0x1);
arch/powerpc/sysdev/fsl_rmu.c
829
out_be32(&rmu->msg_regs->omr, 0);
arch/powerpc/sysdev/fsl_rmu.c
881
out_be32(&rmu->msg_regs->ifqdpar, (u32) rmu->msg_rx_ring.phys);
arch/powerpc/sysdev/fsl_rmu.c
882
out_be32(&rmu->msg_regs->ifqepar, (u32) rmu->msg_rx_ring.phys);
arch/powerpc/sysdev/fsl_rmu.c
885
out_be32(&rmu->msg_regs->isr, 0x00000091);
arch/powerpc/sysdev/fsl_rmu.c
904
out_be32(&rmu->msg_regs->imr, 0x001b0060);
arch/powerpc/sysdev/fsl_rmu.c
930
out_be32(&rmu->msg_regs->imr, 0);
arch/powerpc/sysdev/fsl_soc.c
148
out_be32(rstcr, 0x2); /* HRESET_REQ */
arch/powerpc/sysdev/ge/ge_pic.c
122
out_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0), mask);
arch/powerpc/sysdev/ge/ge_pic.c
143
out_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0), mask);
arch/powerpc/sysdev/ge/ge_pic.c
201
out_be32(gef_pic_irq_reg_base + GEF_PIC_CPU0_INTR_MASK, 0);
arch/powerpc/sysdev/ge/ge_pic.c
202
out_be32(gef_pic_irq_reg_base + GEF_PIC_CPU1_INTR_MASK, 0);
arch/powerpc/sysdev/ge/ge_pic.c
204
out_be32(gef_pic_irq_reg_base + GEF_PIC_CPU0_MCP_MASK, 0);
arch/powerpc/sysdev/ge/ge_pic.c
205
out_be32(gef_pic_irq_reg_base + GEF_PIC_CPU1_MCP_MASK, 0);
arch/powerpc/sysdev/grackle.c
27
out_be32(bp->cfg_addr, GRACKLE_CFA(0, 0, 0xa8));
arch/powerpc/sysdev/grackle.c
31
out_be32(bp->cfg_addr, GRACKLE_CFA(0, 0, 0xa8));
arch/powerpc/sysdev/indirect_pci.c
116
out_be32(hose->cfg_addr, (0x80000000 | (bus_no << 16) |
arch/powerpc/sysdev/indirect_pci.c
50
out_be32(hose->cfg_addr, (0x80000000 | (bus_no << 16) |
arch/powerpc/sysdev/ipic.c
513
out_be32(base + (reg >> 2), value);
arch/powerpc/sysdev/mpic.c
204
out_be32(rb->base + (reg >> 2), value);
arch/powerpc/sysdev/mpic_msgr.c
34
out_be32(msgr->mer, value);
arch/powerpc/sysdev/mpic_timer.c
156
out_be32(&priv->regs[num].gtccr, 0);
arch/powerpc/sysdev/mpic_timer.c
157
out_be32(&priv->regs[num].gtbcr, tmp_ticks | TIMER_STOP);
arch/powerpc/sysdev/mpic_timer.c
159
out_be32(&priv->regs[num - 1].gtccr, 0);
arch/powerpc/sysdev/mpic_timer.c
160
out_be32(&priv->regs[num - 1].gtbcr, rem_ticks);
arch/powerpc/sysdev/mpic_timer.c
225
out_be32(&priv->regs[num].gtbcr,
arch/powerpc/sysdev/mpic_timer.c
227
out_be32(&priv->regs[num].gtccr, 0);
arch/powerpc/sysdev/mpic_timer.c
271
out_be32(&priv->regs[handle->num].gtccr, 0);
arch/powerpc/sysdev/mpic_timer.c
272
out_be32(&priv->regs[handle->num - 1].gtccr, 0);
arch/powerpc/sysdev/mpic_timer.c
274
out_be32(&priv->regs[handle->num].gtccr, 0);
arch/powerpc/sysdev/xics/icp-native.c
65
out_be32(&icp_native_regs[cpu]->xirr.word, value);
arch/powerpc/sysdev/xics/ics-native.c
118
out_be32(ics_native_xive(in, vec), xive);
arch/powerpc/sysdev/xics/ics-native.c
58
out_be32(ics_native_xive(in, vec), (server << 8) | DEFAULT_PRIORITY);
arch/powerpc/sysdev/xics/ics-native.c
80
out_be32(ics_native_xive(in, vec), 0xff);
arch/powerpc/sysdev/xive/native.c
427
out_be32(xive_tima + TM_QW2_HV_POOL + TM_WORD0, 0xff);
arch/powerpc/sysdev/xive/native.c
428
out_be32(xive_tima + TM_QW2_HV_POOL + TM_WORD2, TM_QW2W2_VP | vp_cam);
drivers/ata/pata_mpc52xx.c
337
out_be32(®s->pio1, timing->pio1);
drivers/ata/pata_mpc52xx.c
338
out_be32(®s->pio2, timing->pio2);
drivers/ata/pata_mpc52xx.c
339
out_be32(®s->mdma1, timing->mdma1);
drivers/ata/pata_mpc52xx.c
340
out_be32(®s->mdma2, timing->mdma2);
drivers/ata/pata_mpc52xx.c
341
out_be32(®s->udma1, timing->udma1);
drivers/ata/pata_mpc52xx.c
342
out_be32(®s->udma2, timing->udma2);
drivers/ata/pata_mpc52xx.c
343
out_be32(®s->udma3, timing->udma3);
drivers/ata/pata_mpc52xx.c
344
out_be32(®s->udma4, timing->udma4);
drivers/ata/pata_mpc52xx.c
345
out_be32(®s->udma5, timing->udma5);
drivers/ata/pata_mpc52xx.c
356
out_be32(®s->share_cnt, 0);
drivers/ata/pata_mpc52xx.c
359
out_be32(®s->config,
drivers/ata/pata_mpc52xx.c
367
out_be32(®s->config,
drivers/ata/pata_mpc52xx.c
373
out_be32(®s->share_cnt, tslot << 16);
drivers/char/xilinx_hwicap/buffer_icap.c
132
out_be32(base_address + XHI_SIZE_REG_OFFSET, data);
drivers/char/xilinx_hwicap/buffer_icap.c
146
out_be32(base_address + XHI_BRAM_OFFSET_REG_OFFSET, data);
drivers/char/xilinx_hwicap/buffer_icap.c
162
out_be32(base_address + XHI_RNC_REG_OFFSET, data);
drivers/char/xilinx_hwicap/buffer_icap.c
177
out_be32(base_address + (offset << 2), data);
drivers/char/xilinx_hwicap/buffer_icap.c
258
out_be32(drvdata->base_address + XHI_STATUS_REG_OFFSET, 0xFEFE);
drivers/char/xilinx_hwicap/fifo_icap.c
123
out_be32(drvdata->base_address + XHI_SZ_OFFSET, data);
drivers/char/xilinx_hwicap/fifo_icap.c
132
out_be32(drvdata->base_address + XHI_CR_OFFSET, XHI_CR_WRITE_MASK);
drivers/char/xilinx_hwicap/fifo_icap.c
142
out_be32(drvdata->base_address + XHI_CR_OFFSET, XHI_CR_READ_MASK);
drivers/char/xilinx_hwicap/fifo_icap.c
377
out_be32(drvdata->base_address + XHI_CR_OFFSET,
drivers/char/xilinx_hwicap/fifo_icap.c
380
out_be32(drvdata->base_address + XHI_CR_OFFSET,
drivers/char/xilinx_hwicap/fifo_icap.c
398
out_be32(drvdata->base_address + XHI_CR_OFFSET,
drivers/char/xilinx_hwicap/fifo_icap.c
401
out_be32(drvdata->base_address + XHI_CR_OFFSET,
drivers/char/xilinx_hwicap/fifo_icap.c
97
out_be32(drvdata->base_address + XHI_WF_OFFSET, data);
drivers/crypto/talitos.c
314
out_be32(priv->chan[ch].reg + TALITOS_FF,
drivers/crypto/talitos.c
316
out_be32(priv->chan[ch].reg + TALITOS_FF_LO,
drivers/crypto/talitos.c
688
out_be32(priv->reg + TALITOS_ICR, isr & (ch_done_mask | ch_err_mask)); \
drivers/crypto/talitos.c
689
out_be32(priv->reg + TALITOS_ICR_LO, isr_lo); \
drivers/crypto/talitos.c
723
out_be32(priv->reg + TALITOS_ICR, isr & (ch_done_mask | ch_err_mask)); \
drivers/crypto/talitos.c
724
out_be32(priv->reg + TALITOS_ICR_LO, isr_lo); \
drivers/dma/bestcomm/ata.c
93
out_be32(&bcom_eng->regs->IntPend, 1<<tsk->tasknum); /* Clear ints */
drivers/dma/bestcomm/bestcomm.c
324
out_be32(&bcom_eng->regs->taskBar, tdt_pa);
drivers/dma/bestcomm/bestcomm.c
351
out_be32(&bcom_eng->regs->taskBar, 0ul);
drivers/dma/bestcomm/fec.c
147
out_be32(&bcom_eng->regs->IntPend, 1<<tsk->tasknum); /* Clear ints */
drivers/dma/bestcomm/fec.c
248
out_be32(&bcom_eng->regs->IntPend, 1<<tsk->tasknum); /* Clear ints */
drivers/dma/bestcomm/gen_bd.c
154
out_be32(&bcom_eng->regs->IntPend, 1<<tsk->tasknum); /* Clear ints */
drivers/dma/bestcomm/gen_bd.c
238
out_be32(&bcom_eng->regs->IntPend, 1<<tsk->tasknum); /* Clear ints */
drivers/dma/fsl_raid.c
130
out_be32(&re_chan->jrregs->inbring_add_job, FSL_RE_ADD_JOB(1));
drivers/dma/fsl_raid.c
195
out_be32(&re_chan->jrregs->oubring_job_rmvd,
drivers/dma/fsl_raid.c
225
out_be32(&re_chan->jrregs->jr_interrupt_status, FSL_RE_CLR_INTR);
drivers/dma/fsl_raid.c
711
out_be32(&chan->jrregs->inbring_base_h,
drivers/dma/fsl_raid.c
713
out_be32(&chan->jrregs->oubring_base_h,
drivers/dma/fsl_raid.c
715
out_be32(&chan->jrregs->inbring_base_l,
drivers/dma/fsl_raid.c
717
out_be32(&chan->jrregs->oubring_base_l,
drivers/dma/fsl_raid.c
719
out_be32(&chan->jrregs->inbring_size,
drivers/dma/fsl_raid.c
721
out_be32(&chan->jrregs->oubring_size,
drivers/dma/fsl_raid.c
728
out_be32(&chan->jrregs->jr_config_1,
drivers/dma/fsl_raid.c
734
out_be32(&chan->jrregs->jr_command, FSL_RE_ENABLE);
drivers/dma/fsl_raid.c
771
out_be32(&re_priv->re_regs->global_config, FSL_RE_NON_DPAA_MODE);
drivers/dma/fsl_raid.c
774
out_be32(&re_priv->re_regs->galois_field_config, FSL_RE_GFM_POLY);
drivers/dma/fsldma.h
199
#define fsl_iowrite32be(v, p) out_be32(p, v)
drivers/dma/fsldma.h
231
out_be32((u32 __iomem *)addr, val >> 32);
drivers/dma/fsldma.h
232
out_be32((u32 __iomem *)addr + 1, (u32)val);
drivers/dma/mpc512x_dma.c
1023
out_be32(&mdma->regs->dmacr, MPC_DMA_DMACR_ERCA);
drivers/dma/mpc512x_dma.c
1026
out_be32(&mdma->regs->dmagpor, MPC_DMA_DMAGPOR_SNOOP_ENABLE);
drivers/dma/mpc512x_dma.c
1028
out_be32(&mdma->regs->dmaeeil, 0);
drivers/dma/mpc512x_dma.c
1031
out_be32(&mdma->regs->dmaintl, 0xFFFF);
drivers/dma/mpc512x_dma.c
1032
out_be32(&mdma->regs->dmaerrl, 0xFFFF);
drivers/dma/mpc512x_dma.c
1034
out_be32(&mdma->regs->dmacr, MPC_DMA_DMACR_EDCG |
drivers/dma/mpc512x_dma.c
1039
out_be32(&mdma->regs->dmaerqh, 0);
drivers/dma/mpc512x_dma.c
1040
out_be32(&mdma->regs->dmaerql, 0);
drivers/dma/mpc512x_dma.c
1043
out_be32(&mdma->regs->dmaeeih, 0);
drivers/dma/mpc512x_dma.c
1044
out_be32(&mdma->regs->dmaeeil, 0);
drivers/dma/mpc512x_dma.c
1047
out_be32(&mdma->regs->dmainth, 0xFFFFFFFF);
drivers/dma/mpc512x_dma.c
1048
out_be32(&mdma->regs->dmaintl, 0xFFFFFFFF);
drivers/dma/mpc512x_dma.c
1049
out_be32(&mdma->regs->dmaerrh, 0xFFFFFFFF);
drivers/dma/mpc512x_dma.c
1050
out_be32(&mdma->regs->dmaerrl, 0xFFFFFFFF);
drivers/dma/mpc512x_dma.c
1053
out_be32(&mdma->regs->dmaihsa, 0);
drivers/dma/mpc512x_dma.c
1054
out_be32(&mdma->regs->dmailsa, 0);
drivers/edac/mpc85xx_edac.c
108
out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DR, err_detect);
drivers/edac/mpc85xx_edac.c
111
out_be32(pdata->pci_vbase + MPC85XX_PCI_GAS_TIMR, err_cap_stat | 0x1);
drivers/edac/mpc85xx_edac.c
226
out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_ADDR, ~0);
drivers/edac/mpc85xx_edac.c
229
out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_EN, 0);
drivers/edac/mpc85xx_edac.c
235
out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_CAP_DR, 0x40);
drivers/edac/mpc85xx_edac.c
241
out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_EN, ~0x40);
drivers/edac/mpc85xx_edac.c
245
out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DR, ~0);
drivers/edac/mpc85xx_edac.c
248
out_be32(pdata->pci_vbase + MPC85XX_PCI_GAS_TIMR, 0x1);
drivers/edac/mpc85xx_edac.c
283
out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_EN, ~0
drivers/edac/mpc85xx_edac.c
285
out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_ADDR, 0
drivers/edac/mpc85xx_edac.c
310
out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_ADDR, orig_pci_err_cap_dr);
drivers/edac/mpc85xx_edac.c
311
out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_EN, orig_pci_err_en);
drivers/edac/mpc85xx_edac.c
369
out_be32(pdata->l2_vbase + MPC85XX_L2_ERRINJHI,
drivers/edac/mpc85xx_edac.c
382
out_be32(pdata->l2_vbase + MPC85XX_L2_ERRINJLO,
drivers/edac/mpc85xx_edac.c
395
out_be32(pdata->l2_vbase + MPC85XX_L2_ERRINJCTL,
drivers/edac/mpc85xx_edac.c
463
out_be32(pdata->l2_vbase + MPC85XX_L2_ERRDET, err_detect);
drivers/edac/mpc85xx_edac.c
536
out_be32(pdata->l2_vbase + MPC85XX_L2_ERRDET, ~0);
drivers/edac/mpc85xx_edac.c
541
out_be32(pdata->l2_vbase + MPC85XX_L2_ERRDIS, 0);
drivers/edac/mpc85xx_edac.c
574
out_be32(pdata->l2_vbase + MPC85XX_L2_ERRINTEN, L2_EIE_MASK);
drivers/edac/mpc85xx_edac.c
59
out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DR, err_detect);
drivers/edac/mpc85xx_edac.c
600
out_be32(pdata->l2_vbase + MPC85XX_L2_ERRINTEN, 0);
drivers/edac/mpc85xx_edac.c
604
out_be32(pdata->l2_vbase + MPC85XX_L2_ERRDIS, orig_l2_err_disable);
drivers/edac/mpc85xx_edac.c
78
out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DR, err_detect);
drivers/gpio/gpio-mpc5200.c
230
out_be32(®s->simple_dvo, chip->shadow_dvo);
drivers/gpio/gpio-mpc5200.c
259
out_be32(®s->simple_ddr, chip->shadow_ddr);
drivers/gpio/gpio-mpc5200.c
263
out_be32(®s->simple_gpioe, chip->shadow_gpioe);
drivers/gpio/gpio-mpc5200.c
284
out_be32(®s->simple_ddr, chip->shadow_ddr);
drivers/gpio/gpio-mpc5200.c
288
out_be32(®s->simple_gpioe, chip->shadow_gpioe);
drivers/i2c/busses/i2c-cpm.c
156
out_be32(&i2c_ram->rstate, 0);
drivers/i2c/busses/i2c-cpm.c
157
out_be32(&i2c_ram->rdp, 0);
drivers/i2c/busses/i2c-cpm.c
160
out_be32(&i2c_ram->rxtmp, 0);
drivers/i2c/busses/i2c-cpm.c
161
out_be32(&i2c_ram->tstate, 0);
drivers/i2c/busses/i2c-cpm.c
162
out_be32(&i2c_ram->tdp, 0);
drivers/i2c/busses/i2c-cpm.c
165
out_be32(&i2c_ram->txtmp, 0);
drivers/i2c/busses/i2c-cpm.c
535
out_be32(&rbdf[i].cbd_bufaddr, ((cpm->rxdma[i] + 1) & ~1));
drivers/i2c/busses/i2c-cpm.c
544
out_be32(&tbdf[i].cbd_bufaddr, cpm->txdma[i]);
drivers/input/serio/xilinx_ps2.c
113
out_be32(drvdata->base_address + XPS2_IPISR_OFFSET, intr_sr);
drivers/input/serio/xilinx_ps2.c
167
out_be32(drvdata->base_address + XPS2_TX_DATA_OFFSET, c);
drivers/input/serio/xilinx_ps2.c
192
out_be32(drvdata->base_address + XPS2_GIER_OFFSET, XPS2_GIER_GIE_MASK);
drivers/input/serio/xilinx_ps2.c
193
out_be32(drvdata->base_address + XPS2_IPIER_OFFSET, XPS2_IPIXR_RX_ALL);
drivers/input/serio/xilinx_ps2.c
210
out_be32(drvdata->base_address + XPS2_GIER_OFFSET, 0x00);
drivers/input/serio/xilinx_ps2.c
211
out_be32(drvdata->base_address + XPS2_IPIER_OFFSET, 0x00);
drivers/input/serio/xilinx_ps2.c
281
out_be32(drvdata->base_address + XPS2_IPIER_OFFSET, 0);
drivers/input/serio/xilinx_ps2.c
287
out_be32(drvdata->base_address + XPS2_SRST_OFFSET, XPS2_SRST_RESET);
drivers/iommu/fsl_pamu.c
427
out_be32(&pamu_regs->ppbah, upper_32_bits(ppaact_phys));
drivers/iommu/fsl_pamu.c
428
out_be32(&pamu_regs->ppbal, lower_32_bits(ppaact_phys));
drivers/iommu/fsl_pamu.c
430
out_be32(&pamu_regs->pplah, upper_32_bits(ppaact_phys));
drivers/iommu/fsl_pamu.c
431
out_be32(&pamu_regs->pplal, lower_32_bits(ppaact_phys));
drivers/iommu/fsl_pamu.c
433
out_be32(&pamu_regs->spbah, upper_32_bits(spaact_phys));
drivers/iommu/fsl_pamu.c
434
out_be32(&pamu_regs->spbal, lower_32_bits(spaact_phys));
drivers/iommu/fsl_pamu.c
436
out_be32(&pamu_regs->splah, upper_32_bits(spaact_phys));
drivers/iommu/fsl_pamu.c
437
out_be32(&pamu_regs->splal, lower_32_bits(spaact_phys));
drivers/iommu/fsl_pamu.c
439
out_be32(&pamu_regs->obah, upper_32_bits(omt_phys));
drivers/iommu/fsl_pamu.c
440
out_be32(&pamu_regs->obal, lower_32_bits(omt_phys));
drivers/iommu/fsl_pamu.c
442
out_be32(&pamu_regs->olah, upper_32_bits(omt_phys));
drivers/iommu/fsl_pamu.c
443
out_be32(&pamu_regs->olal, lower_32_bits(omt_phys));
drivers/iommu/fsl_pamu.c
451
out_be32((u32 *)(pamu_reg_base + PAMU_PICS),
drivers/iommu/fsl_pamu.c
453
out_be32(pc, PAMU_PC_PE | PAMU_PC_OCE | PAMU_PC_SPCC | PAMU_PC_PPCC);
drivers/iommu/fsl_pamu.c
539
out_be32(p + PAMU_AVS1, avs1 & PAMU_AV_MASK);
drivers/iommu/fsl_pamu.c
558
out_be32((p + PAMU_PICS), pics);
drivers/iommu/fsl_pamu.c
894
out_be32(&guts_regs->pamubypenr, pamubypenr);
drivers/macintosh/via-pmu.c
2054
out_be32(mem_ctrl_sleep, i);
drivers/macintosh/via-pmu.c
2085
out_be32(mem_ctrl_sleep, 0x3f);
drivers/mmc/host/sdhci-pltfm.h
54
out_be32(host->ioaddr + reg, val);
drivers/mtd/nand/raw/fsl_elbc_nand.c
167
out_be32(&lbc->fbar, page_addr >> 6);
drivers/mtd/nand/raw/fsl_elbc_nand.c
168
out_be32(&lbc->fpar,
drivers/mtd/nand/raw/fsl_elbc_nand.c
177
out_be32(&lbc->fbar, page_addr >> 5);
drivers/mtd/nand/raw/fsl_elbc_nand.c
178
out_be32(&lbc->fpar,
drivers/mtd/nand/raw/fsl_elbc_nand.c
211
out_be32(&lbc->fmr, priv->fmr | 3);
drivers/mtd/nand/raw/fsl_elbc_nand.c
213
out_be32(&lbc->mdr, elbc_fcm_ctrl->mdr);
drivers/mtd/nand/raw/fsl_elbc_nand.c
226
out_be32(&lbc->lsor, priv->bank);
drivers/mtd/nand/raw/fsl_elbc_nand.c
265
out_be32(&lbc->lteccr, 0x000F000F); /* clear lteccr */
drivers/mtd/nand/raw/fsl_elbc_nand.c
282
out_be32(&lbc->fir,
drivers/mtd/nand/raw/fsl_elbc_nand.c
289
out_be32(&lbc->fcr, (NAND_CMD_READ0 << FCR_CMD0_SHIFT) |
drivers/mtd/nand/raw/fsl_elbc_nand.c
292
out_be32(&lbc->fir,
drivers/mtd/nand/raw/fsl_elbc_nand.c
299
out_be32(&lbc->fcr, NAND_CMD_READOOB << FCR_CMD0_SHIFT);
drivers/mtd/nand/raw/fsl_elbc_nand.c
301
out_be32(&lbc->fcr, NAND_CMD_READ0 << FCR_CMD0_SHIFT);
drivers/mtd/nand/raw/fsl_elbc_nand.c
333
out_be32(&lbc->fbcr, 0); /* read entire page to enable ECC */
drivers/mtd/nand/raw/fsl_elbc_nand.c
358
out_be32(&lbc->fbcr, mtd->oobsize - column);
drivers/mtd/nand/raw/fsl_elbc_nand.c
371
out_be32(&lbc->fir, (FIR_OP_CM0 << FIR_OP0_SHIFT) |
drivers/mtd/nand/raw/fsl_elbc_nand.c
374
out_be32(&lbc->fcr, command << FCR_CMD0_SHIFT);
drivers/mtd/nand/raw/fsl_elbc_nand.c
379
out_be32(&lbc->fbcr, 256);
drivers/mtd/nand/raw/fsl_elbc_nand.c
399
out_be32(&lbc->fir,
drivers/mtd/nand/raw/fsl_elbc_nand.c
406
out_be32(&lbc->fcr,
drivers/mtd/nand/raw/fsl_elbc_nand.c
411
out_be32(&lbc->fbcr, 0);
drivers/mtd/nand/raw/fsl_elbc_nand.c
443
out_be32(&lbc->fir,
drivers/mtd/nand/raw/fsl_elbc_nand.c
452
out_be32(&lbc->fir,
drivers/mtd/nand/raw/fsl_elbc_nand.c
470
out_be32(&lbc->fcr, fcr);
drivers/mtd/nand/raw/fsl_elbc_nand.c
487
out_be32(&lbc->fbcr,
drivers/mtd/nand/raw/fsl_elbc_nand.c
490
out_be32(&lbc->fbcr, 0);
drivers/mtd/nand/raw/fsl_elbc_nand.c
499
out_be32(&lbc->fir,
drivers/mtd/nand/raw/fsl_elbc_nand.c
502
out_be32(&lbc->fcr, NAND_CMD_STATUS << FCR_CMD0_SHIFT);
drivers/mtd/nand/raw/fsl_elbc_nand.c
503
out_be32(&lbc->fbcr, 1);
drivers/mtd/nand/raw/fsl_elbc_nand.c
518
out_be32(&lbc->fir, FIR_OP_CM0 << FIR_OP0_SHIFT);
drivers/mtd/nand/raw/fsl_elbc_nand.c
519
out_be32(&lbc->fcr, NAND_CMD_RESET << FCR_CMD0_SHIFT);
drivers/mtd/nand/raw/fsl_elbc_nand.c
771
out_be32(&lbc->bank[priv->bank].br, br | BR_DECC_CHK_GEN);
drivers/mtd/nand/raw/fsl_elbc_nand.c
773
out_be32(&lbc->bank[priv->bank].br, br | BR_DECC_OFF);
drivers/mtd/nand/raw/ndfc.c
126
out_be32(ndfc->ndfcbase + NDFC_DATA, *p++);
drivers/mtd/nand/raw/ndfc.c
226
out_be32(ndfc->ndfcbase + NDFC_CCR, ccr);
drivers/mtd/nand/raw/ndfc.c
232
out_be32(ndfc->ndfcbase + offset, be32_to_cpup(reg));
drivers/mtd/nand/raw/ndfc.c
53
out_be32(ndfc->ndfcbase + NDFC_CCR, ccr);
drivers/mtd/nand/raw/ndfc.c
83
out_be32(ndfc->ndfcbase + NDFC_CCR, ccr);
drivers/mtd/nand/raw/socrates_nand.c
106
out_be32(host->io_base, val);
drivers/mtd/nand/raw/socrates_nand.c
45
out_be32(host->io_base, FPGA_NAND_ENABLE |
drivers/mtd/nand/raw/socrates_nand.c
66
out_be32(host->io_base, val);
drivers/net/ethernet/freescale/fec_mpc52xx.c
109
out_be32(&fec->paddr1, *(const u32 *)(&mac[0]));
drivers/net/ethernet/freescale/fec_mpc52xx.c
110
out_be32(&fec->paddr2, (*(const u16 *)(&mac[4]) << 16) | FEC_PADDR2_TYPE);
drivers/net/ethernet/freescale/fec_mpc52xx.c
191
out_be32(&fec->r_cntrl, rcntrl);
drivers/net/ethernet/freescale/fec_mpc52xx.c
192
out_be32(&fec->x_cntrl, tcntrl);
drivers/net/ethernet/freescale/fec_mpc52xx.c
456
out_be32(&fec->ievent, ievent); /* clear pending events */
drivers/net/ethernet/freescale/fec_mpc52xx.c
538
out_be32(&fec->mib_control, FEC_MIB_DISABLE);
drivers/net/ethernet/freescale/fec_mpc52xx.c
542
out_be32(&fec->mib_control, 0);
drivers/net/ethernet/freescale/fec_mpc52xx.c
560
out_be32(&fec->r_cntrl, rx_control);
drivers/net/ethernet/freescale/fec_mpc52xx.c
563
out_be32(&fec->r_cntrl, rx_control);
drivers/net/ethernet/freescale/fec_mpc52xx.c
566
out_be32(&fec->gaddr1, 0xffffffff);
drivers/net/ethernet/freescale/fec_mpc52xx.c
567
out_be32(&fec->gaddr2, 0xffffffff);
drivers/net/ethernet/freescale/fec_mpc52xx.c
581
out_be32(&fec->gaddr1, gaddr1);
drivers/net/ethernet/freescale/fec_mpc52xx.c
582
out_be32(&fec->gaddr2, gaddr2);
drivers/net/ethernet/freescale/fec_mpc52xx.c
600
out_be32(&fec->ecntrl, FEC_ECNTRL_RESET);
drivers/net/ethernet/freescale/fec_mpc52xx.c
610
out_be32(&fec->op_pause, FEC_OP_PAUSE_OPCODE | 0x20);
drivers/net/ethernet/freescale/fec_mpc52xx.c
615
out_be32(&fec->rfifo_cntrl, FEC_FIFO_CNTRL_FRAME | FEC_FIFO_CNTRL_LTG_7);
drivers/net/ethernet/freescale/fec_mpc52xx.c
616
out_be32(&fec->tfifo_cntrl, FEC_FIFO_CNTRL_FRAME | FEC_FIFO_CNTRL_LTG_7);
drivers/net/ethernet/freescale/fec_mpc52xx.c
619
out_be32(&fec->rfifo_alarm, 0x0000030c);
drivers/net/ethernet/freescale/fec_mpc52xx.c
620
out_be32(&fec->tfifo_alarm, 0x00000100);
drivers/net/ethernet/freescale/fec_mpc52xx.c
623
out_be32(&fec->x_wmrk, FEC_FIFO_WMRK_256B);
drivers/net/ethernet/freescale/fec_mpc52xx.c
626
out_be32(&fec->xmit_fsm, FEC_XMIT_FSM_APPEND_CRC | FEC_XMIT_FSM_ENABLE_CRC);
drivers/net/ethernet/freescale/fec_mpc52xx.c
627
out_be32(&fec->iaddr1, 0x00000000); /* No individual filter */
drivers/net/ethernet/freescale/fec_mpc52xx.c
628
out_be32(&fec->iaddr2, 0x00000000); /* No individual filter */
drivers/net/ethernet/freescale/fec_mpc52xx.c
633
out_be32(&fec->mii_speed, priv->mdio_speed);
drivers/net/ethernet/freescale/fec_mpc52xx.c
654
out_be32(&fec->rfifo_status, in_be32(&fec->rfifo_status) & tmp);
drivers/net/ethernet/freescale/fec_mpc52xx.c
655
out_be32(&fec->tfifo_status, in_be32(&fec->tfifo_status) & tmp);
drivers/net/ethernet/freescale/fec_mpc52xx.c
658
out_be32(&fec->reset_cntrl, FEC_RESET_CNTRL_ENABLE_IS_RESET);
drivers/net/ethernet/freescale/fec_mpc52xx.c
678
out_be32(&fec->r_cntrl, rcntrl);
drivers/net/ethernet/freescale/fec_mpc52xx.c
679
out_be32(&fec->x_cntrl, tcntrl);
drivers/net/ethernet/freescale/fec_mpc52xx.c
682
out_be32(&fec->ievent, 0xffffffff);
drivers/net/ethernet/freescale/fec_mpc52xx.c
685
out_be32(&fec->imask, FEC_IMASK_ENABLE);
drivers/net/ethernet/freescale/fec_mpc52xx.c
688
out_be32(&fec->ecntrl, FEC_ECNTRL_ETHER_EN);
drivers/net/ethernet/freescale/fec_mpc52xx.c
689
out_be32(&fec->r_des_active, 0x01000000);
drivers/net/ethernet/freescale/fec_mpc52xx.c
705
out_be32(&fec->imask, 0);
drivers/net/ethernet/freescale/fec_mpc52xx.c
734
out_be32(&fec->ecntrl, in_be32(&fec->ecntrl) & ~FEC_ECNTRL_ETHER_EN);
drivers/net/ethernet/freescale/fec_mpc52xx.c
745
out_be32(&fec->rfifo_status, in_be32(&fec->rfifo_status));
drivers/net/ethernet/freescale/fec_mpc52xx.c
746
out_be32(&fec->reset_cntrl, FEC_RESET_CNTRL_RESET_FIFO);
drivers/net/ethernet/freescale/fec_mpc52xx_phy.c
104
out_be32(&priv->regs->mii_speed, ((mpc5xxx_get_bus_frequency(dev) >> 20) / 5) << 1);
drivers/net/ethernet/freescale/fec_mpc52xx_phy.c
39
out_be32(&fec->ievent, FEC_IEVENT_MII);
drivers/net/ethernet/freescale/fec_mpc52xx_phy.c
40
out_be32(&fec->mii_data, value);
drivers/net/ethernet/freescale/fs_enet/fs_enet.h
204
#define __cbd_out32(addr, x) out_be32(addr, x)
drivers/net/ethernet/freescale/fs_enet/mac-fcc.c
48
#define W32(_p, _m, _v) out_be32(&(_p)->_m, (_v))
drivers/net/ethernet/freescale/fs_enet/mac-fec.c
50
#define __fs_out32(addr, x) out_be32(addr, x)
drivers/net/ethernet/freescale/fs_enet/mac-scc.c
48
#define __fs_out32(addr, x) out_be32(addr, x)
drivers/net/ethernet/freescale/fs_enet/mii-bitbang.c
42
out_be32(p, in_be32(p) | m);
drivers/net/ethernet/freescale/fs_enet/mii-bitbang.c
47
out_be32(p, in_be32(p) & ~m);
drivers/net/ethernet/freescale/fs_enet/mii-fec.c
159
out_be32(&fec->fecp->fec_ievent, FEC_ENET_MII);
drivers/net/ethernet/freescale/fs_enet/mii-fec.c
60
out_be32(&fecp->fec_mii_data, (phy_id << 23) | mk_mii_read(location));
drivers/net/ethernet/freescale/fs_enet/mii-fec.c
67
out_be32(&fecp->fec_ievent, FEC_ENET_MII);
drivers/net/ethernet/freescale/fs_enet/mii-fec.c
84
out_be32(&fecp->fec_mii_data, (phy_id << 23) | mk_mii_write(location, val));
drivers/net/ethernet/freescale/fs_enet/mii-fec.c
91
out_be32(&fecp->fec_ievent, FEC_ENET_MII);
drivers/net/ethernet/freescale/ucc_geth.c
1012
out_be32(upsmr_register, UCC_GETH_UPSMR_INIT);
drivers/net/ethernet/freescale/ucc_geth.c
1013
out_be32(maccfg1_register, UCC_GETH_MACCFG1_INIT);
drivers/net/ethernet/freescale/ucc_geth.c
1014
out_be32(maccfg2_register, UCC_GETH_MACCFG2_INIT);
drivers/net/ethernet/freescale/ucc_geth.c
1048
out_be32(hafdup_register, value);
drivers/net/ethernet/freescale/ucc_geth.c
1082
out_be32(ipgifg_register, value);
drivers/net/ethernet/freescale/ucc_geth.c
1100
out_be32(uempr_register, value);
drivers/net/ethernet/freescale/ucc_geth.c
1110
out_be32(maccfg1_register, value);
drivers/net/ethernet/freescale/ucc_geth.c
1152
out_be32(tx_rmon_base_ptr,
drivers/net/ethernet/freescale/ucc_geth.c
1158
out_be32(rx_rmon_base_ptr,
drivers/net/ethernet/freescale/ucc_geth.c
1191
out_be32(macstnaddr1_register, value);
drivers/net/ethernet/freescale/ucc_geth.c
1203
out_be32(macstnaddr2_register, value);
drivers/net/ethernet/freescale/ucc_geth.c
1231
out_be32(upsmr_register, value);
drivers/net/ethernet/freescale/ucc_geth.c
1280
out_be32(uccf->p_ucce, UCC_GETH_UCCE_GRA); /* clear by writing 1 */
drivers/net/ethernet/freescale/ucc_geth.c
1552
out_be32(&ug_regs->maccfg2, maccfg2);
drivers/net/ethernet/freescale/ucc_geth.c
1553
out_be32(&uf_regs->upsmr, upsmr);
drivers/net/ethernet/freescale/ucc_geth.c
1680
out_be32(addr_h, 0x00000000);
drivers/net/ethernet/freescale/ucc_geth.c
1681
out_be32(addr_l, 0x00000000);
drivers/net/ethernet/freescale/ucc_geth.c
1877
out_be32(&p_82xx_addr_filt->gaddr_h, 0xffffffff);
drivers/net/ethernet/freescale/ucc_geth.c
1878
out_be32(&p_82xx_addr_filt->gaddr_l, 0xffffffff);
drivers/net/ethernet/freescale/ucc_geth.c
1882
out_be32(&p_82xx_addr_filt->gaddr_h, 0x0);
drivers/net/ethernet/freescale/ucc_geth.c
1883
out_be32(&p_82xx_addr_filt->gaddr_l, 0x0);
drivers/net/ethernet/freescale/ucc_geth.c
1912
out_be32(ugeth->uccf->p_uccm, 0x00000000);
drivers/net/ethernet/freescale/ucc_geth.c
1915
out_be32(ugeth->uccf->p_ucce, 0xffffffff);
drivers/net/ethernet/freescale/ucc_geth.c
2087
out_be32(&((struct qe_bd __iomem *)bd)->buf, 0);
drivers/net/ethernet/freescale/ucc_geth.c
2089
out_be32((u32 __iomem *)bd, 0);
drivers/net/ethernet/freescale/ucc_geth.c
2094
out_be32((u32 __iomem *)bd, T_W); /* for last BD set Wrap bit */
drivers/net/ethernet/freescale/ucc_geth.c
2145
out_be32((u32 __iomem *)bd, R_I);
drivers/net/ethernet/freescale/ucc_geth.c
2147
out_be32(&((struct qe_bd __iomem *)bd)->buf, 0);
drivers/net/ethernet/freescale/ucc_geth.c
2152
out_be32((u32 __iomem *)bd, R_W); /* for last BD set Wrap bit */
drivers/net/ethernet/freescale/ucc_geth.c
2269
out_be32(&ug_regs->uempr, 0);
drivers/net/ethernet/freescale/ucc_geth.c
2317
out_be32(&ugeth->p_tx_glbl_pram->tqptr, ugeth->thread_dat_tx_offset);
drivers/net/ethernet/freescale/ucc_geth.c
2321
out_be32(&ugeth->p_tx_glbl_pram->vtagtable[i],
drivers/net/ethernet/freescale/ucc_geth.c
2344
out_be32(&ugeth->p_tx_glbl_pram->sqptr, ugeth->send_q_mem_reg_offset);
drivers/net/ethernet/freescale/ucc_geth.c
2352
out_be32(&ugeth->p_send_q_mem_reg->sqqd[i].bd_ring_base,
drivers/net/ethernet/freescale/ucc_geth.c
2354
out_be32(&ugeth->p_send_q_mem_reg->sqqd[i].
drivers/net/ethernet/freescale/ucc_geth.c
2375
out_be32(&ugeth->p_tx_glbl_pram->schedulerbasepointer,
drivers/net/ethernet/freescale/ucc_geth.c
2379
out_be32(&ugeth->p_scheduler->mblinterval,
drivers/net/ethernet/freescale/ucc_geth.c
2436
out_be32(&ugeth->p_tx_glbl_pram->tstate, ((u32) function_code) << 24);
drivers/net/ethernet/freescale/ucc_geth.c
244
out_be32(&((struct qe_bd __iomem *)bd)->buf,
drivers/net/ethernet/freescale/ucc_geth.c
2466
out_be32(&ugeth->p_rx_glbl_pram->rqptr, ugeth->thread_dat_rx_offset);
drivers/net/ethernet/freescale/ucc_geth.c
2504
out_be32(&ugeth->p_rx_glbl_pram->intcoalescingptr,
drivers/net/ethernet/freescale/ucc_geth.c
2509
out_be32(&ugeth->p_rx_irq_coalescing_tbl->coalescingentry[i].
drivers/net/ethernet/freescale/ucc_geth.c
251
out_be32((u32 __iomem *)bd,
drivers/net/ethernet/freescale/ucc_geth.c
2512
out_be32(&ugeth->p_rx_irq_coalescing_tbl->coalescingentry[i].
drivers/net/ethernet/freescale/ucc_geth.c
2535
out_be32(&ugeth->p_rx_glbl_pram->l2qt, l2qt);
drivers/net/ethernet/freescale/ucc_geth.c
2542
out_be32(&ugeth->p_rx_glbl_pram->l3qt[j/8], l3qt);
drivers/net/ethernet/freescale/ucc_geth.c
2552
out_be32(&ugeth->p_rx_glbl_pram->ecamptr, ug_info->ecamptr);
drivers/net/ethernet/freescale/ucc_geth.c
2570
out_be32(&ugeth->p_rx_glbl_pram->rbdqptr, ugeth->rx_bd_qs_tbl_offset);
drivers/net/ethernet/freescale/ucc_geth.c
2575
out_be32(&ugeth->p_rx_bd_qs_tbl[i].externalbdbaseptr,
drivers/net/ethernet/freescale/ucc_geth.c
2602
out_be32(&ugeth->p_rx_glbl_pram->remoder, remoder);
drivers/net/ethernet/freescale/ucc_geth.c
2644
out_be32(&ugeth->p_rx_glbl_pram->exfGlobalParam,
drivers/net/ethernet/freescale/ucc_geth.c
2646
out_be32(&ugeth->p_exf_glbl_param->l2pcdptr,
drivers/net/ethernet/freescale/ucc_geth.c
2787
out_be32(&p_init_enet_pram->rgftgfrxglobal,
drivers/net/ethernet/freescale/ucc_geth.c
2790
out_be32(&p_init_enet_pram->rxthread[i],
drivers/net/ethernet/freescale/ucc_geth.c
2792
out_be32(&p_init_enet_pram->txglobal,
drivers/net/ethernet/freescale/ucc_geth.c
2795
out_be32(&p_init_enet_pram->txthread[i],
drivers/net/ethernet/freescale/ucc_geth.c
2843
out_be32(&((struct qe_bd __iomem *)bd)->buf,
drivers/net/ethernet/freescale/ucc_geth.c
2852
out_be32((u32 __iomem *)bd, bd_status);
drivers/net/ethernet/freescale/ucc_geth.c
3061
out_be32(uccf->p_ucce, ucce);
drivers/net/ethernet/freescale/ucc_geth.c
3067
out_be32(uccf->p_uccm, uccm);
drivers/net/ethernet/ibm/emac/core.c
1010
out_be32(&p->iahr, (ndev->dev_addr[0] << 8) | ndev->dev_addr[1]);
drivers/net/ethernet/ibm/emac/core.c
1011
out_be32(&p->ialr, (ndev->dev_addr[2] << 24) |
drivers/net/ethernet/ibm/emac/core.c
1416
out_be32(&p->tmr0, EMAC4_TMR0_XMIT);
drivers/net/ethernet/ibm/emac/core.c
1418
out_be32(&p->tmr0, EMAC_TMR0_XMIT);
drivers/net/ethernet/ibm/emac/core.c
1910
out_be32(&p->isr, isr);
drivers/net/ethernet/ibm/emac/core.c
213
out_be32(&p->mr0, r | EMAC_MR0_TXE);
drivers/net/ethernet/ibm/emac/core.c
226
out_be32(&p->mr0, r & ~EMAC_MR0_TXE);
drivers/net/ethernet/ibm/emac/core.c
259
out_be32(&p->mr0, r | EMAC_MR0_RXE);
drivers/net/ethernet/ibm/emac/core.c
275
out_be32(&p->mr0, r & ~EMAC_MR0_RXE);
drivers/net/ethernet/ibm/emac/core.c
326
out_be32(&p->mr0, r & ~EMAC_MR0_RXE);
drivers/net/ethernet/ibm/emac/core.c
378
out_be32(&p->mr0, EMAC_MR0_SRST);
drivers/net/ethernet/ibm/emac/core.c
435
out_be32(gaht_base + i, gaht_temp[i]);
drivers/net/ethernet/ibm/emac/core.c
576
out_be32(&p->mr1, in_be32(&p->mr1)
drivers/net/ethernet/ibm/emac/core.c
612
out_be32(&p->u1.emac4.ipcr, 0xdeadbeef);
drivers/net/ethernet/ibm/emac/core.c
656
out_be32(&p->mr1, mr1);
drivers/net/ethernet/ibm/emac/core.c
659
out_be32(&p->iahr, (ndev->dev_addr[0] << 8) | ndev->dev_addr[1]);
drivers/net/ethernet/ibm/emac/core.c
660
out_be32(&p->ialr, (ndev->dev_addr[2] << 24) |
drivers/net/ethernet/ibm/emac/core.c
665
out_be32(&p->vtpid, 0x8100);
drivers/net/ethernet/ibm/emac/core.c
671
out_be32(&p->rmr, r);
drivers/net/ethernet/ibm/emac/core.c
680
out_be32(&p->tmr1, r);
drivers/net/ethernet/ibm/emac/core.c
681
out_be32(&p->trtr, emac_calc_trtr(dev, tx_size / 2));
drivers/net/ethernet/ibm/emac/core.c
704
out_be32(&p->rwmr, r);
drivers/net/ethernet/ibm/emac/core.c
707
out_be32(&p->ptr, 0xffff);
drivers/net/ethernet/ibm/emac/core.c
716
out_be32(&p->iser, r);
drivers/net/ethernet/ibm/emac/core.c
831
out_be32(&p->stacr, r);
drivers/net/ethernet/ibm/emac/core.c
904
out_be32(&p->stacr, r);
drivers/net/ethernet/ibm/emac/core.c
972
out_be32(&p->rmr, rmr);
drivers/net/ethernet/ibm/emac/rgmii.c
128
out_be32(&p->ssr, ssr);
drivers/net/ethernet/ibm/emac/rgmii.c
148
out_be32(&p->fer, fer);
drivers/net/ethernet/ibm/emac/rgmii.c
167
out_be32(&p->fer, fer);
drivers/net/ethernet/ibm/emac/rgmii.c
188
out_be32(&p->fer, in_be32(&p->fer) & ~RGMII_FER_MASK(input));
drivers/net/ethernet/ibm/emac/rgmii.c
251
out_be32(&dev->base->fer, 0);
drivers/net/ethernet/ibm/emac/rgmii.c
97
out_be32(&p->fer, in_be32(&p->fer) | rgmii_mode_mask(mode, input));
drivers/net/ethernet/ibm/emac/tah.c
53
out_be32(&p->mr, TAH_MR_SR);
drivers/net/ethernet/ibm/emac/tah.c
62
out_be32(&p->mr,
drivers/net/ethernet/ibm/emac/zmii.c
142
out_be32(&p->fer, in_be32(&p->fer) | zmii_mode_mask(dev->mode, input));
drivers/net/ethernet/ibm/emac/zmii.c
160
out_be32(&dev->base->fer, fer | ZMII_FER_MDI(input));
drivers/net/ethernet/ibm/emac/zmii.c
188
out_be32(&dev->base->ssr, ssr);
drivers/net/ethernet/ibm/emac/zmii.c
204
out_be32(&dev->base->fer,
drivers/net/ethernet/ibm/emac/zmii.c
260
out_be32(&dev->base->fer, 0);
drivers/net/ethernet/tundra/tsi108_eth.h
20
out_be32((data->regs + (offset)), val)
drivers/net/ethernet/tundra/tsi108_eth.h
26
out_be32((data->phyregs + (offset)), val)
drivers/rtc/rtc-mpc5121.c
134
out_be32(®s->target_time, now - in_be32(®s->actual_time));
drivers/rtc/rtc-mpc5121.c
347
out_be32(&rtc->regs->keep_alive, ka);
drivers/scsi/mac_scsi.c
275
out_be32(hostdata->io + (CTRL_REG << 4), value);
drivers/scsi/mvme16x_scsi.c
117
out_be32(0xfff4202c, v);
drivers/scsi/mvme16x_scsi.c
90
out_be32(0xfff4202c, v);
drivers/soc/fsl/qe/qe_ports_ic.c
40
out_be32(data->reg + CEPIER, 1 << (31 - irqd_to_hwirq(d)));
drivers/spi/spi-mpc512x-psc.c
111
out_be32(psc_addr(mps, sicr), sicr);
drivers/spi/spi-mpc512x-psc.c
121
out_be32(psc_addr(mps, ccr), ccr);
drivers/spi/spi-mpc512x-psc.c
186
out_be32(&fifo->txisr, MPC512x_PSC_FIFO_EMPTY);
drivers/spi/spi-mpc512x-psc.c
187
out_be32(&fifo->tximr, MPC512x_PSC_FIFO_EMPTY);
drivers/spi/spi-mpc512x-psc.c
352
out_be32(&fifo->tximr, 0);
drivers/spi/spi-mpc512x-psc.c
401
out_be32(&fifo->tximr, 0);
drivers/spi/spi-mpc512x-psc.c
402
out_be32(&fifo->rximr, 0);
drivers/spi/spi-mpc512x-psc.c
414
out_be32(psc_addr(mps, sicr), sicr);
drivers/spi/spi-mpc512x-psc.c
421
out_be32(psc_addr(mps, ccr), ccr);
drivers/spi/spi-mpc512x-psc.c
428
out_be32(&fifo->rxalarm, 0xfff);
drivers/spi/spi-mpc512x-psc.c
429
out_be32(&fifo->txalarm, 0);
drivers/spi/spi-mpc512x-psc.c
432
out_be32(&fifo->rxcmd,
drivers/spi/spi-mpc512x-psc.c
434
out_be32(&fifo->txcmd,
drivers/spi/spi-mpc512x-psc.c
450
out_be32(&fifo->txisr, MPC512x_PSC_FIFO_EMPTY);
drivers/spi/spi-mpc512x-psc.c
451
out_be32(&fifo->tximr, 0);
drivers/spi/spi-mpc52xx-psc.c
268
out_be32(&psc->sicr, 0x0180C800);
drivers/spi/spi-mpc52xx-psc.c
84
out_be32(&psc->sicr, sicr);
drivers/tty/serial/cpm_uart.c
407
out_be32(&pinfo->smcup->smc_rstate, 0);
drivers/tty/serial/cpm_uart.c
408
out_be32(&pinfo->smcup->smc_tstate, 0);
drivers/tty/serial/cpm_uart.c
727
out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
drivers/tty/serial/cpm_uart.c
732
out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
drivers/tty/serial/cpm_uart.c
742
out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
drivers/tty/serial/cpm_uart.c
747
out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
drivers/tty/serial/cpm_uart.c
801
out_be32(&scp->scc_gsmrh, 0);
drivers/tty/serial/cpm_uart.c
802
out_be32(&scp->scc_gsmrl,
drivers/tty/serial/cpm_uart.c
835
out_be32(&up->smc_rstate, 0);
drivers/tty/serial/cpm_uart.c
836
out_be32(&up->smc_tstate, 0);
drivers/tty/serial/mpc52xx_uart.c
178
out_be32(&PSC(port)->sicr, val);
drivers/tty/serial/mpc52xx_uart.c
427
out_be32(&FIFO_512x(port)->txcmd, MPC512x_PSC_FIFO_RESET_SLICE);
drivers/tty/serial/mpc52xx_uart.c
428
out_be32(&FIFO_512x(port)->txcmd, MPC512x_PSC_FIFO_ENABLE_SLICE);
drivers/tty/serial/mpc52xx_uart.c
429
out_be32(&FIFO_512x(port)->txalarm, 1);
drivers/tty/serial/mpc52xx_uart.c
430
out_be32(&FIFO_512x(port)->tximr, 0);
drivers/tty/serial/mpc52xx_uart.c
432
out_be32(&FIFO_512x(port)->rxcmd, MPC512x_PSC_FIFO_RESET_SLICE);
drivers/tty/serial/mpc52xx_uart.c
433
out_be32(&FIFO_512x(port)->rxcmd, MPC512x_PSC_FIFO_ENABLE_SLICE);
drivers/tty/serial/mpc52xx_uart.c
434
out_be32(&FIFO_512x(port)->rxalarm, 1);
drivers/tty/serial/mpc52xx_uart.c
435
out_be32(&FIFO_512x(port)->rximr, 0);
drivers/tty/serial/mpc52xx_uart.c
437
out_be32(&FIFO_512x(port)->tximr, MPC512x_PSC_FIFO_ALARM);
drivers/tty/serial/mpc52xx_uart.c
438
out_be32(&FIFO_512x(port)->rximr, MPC512x_PSC_FIFO_ALARM);
drivers/tty/serial/mpc52xx_uart.c
477
out_be32(&FIFO_512x(port)->rximr, rx_fifo_imr);
drivers/tty/serial/mpc52xx_uart.c
486
out_be32(&FIFO_512x(port)->tximr, tx_fifo_imr);
drivers/tty/serial/mpc52xx_uart.c
495
out_be32(&FIFO_512x(port)->tximr, tx_fifo_imr);
drivers/tty/serial/mpc52xx_uart.c
500
out_be32(&FIFO_512x(port)->rxisr, in_be32(&FIFO_512x(port)->rxisr));
drivers/tty/serial/mpc52xx_uart.c
505
out_be32(&FIFO_512x(port)->txisr, in_be32(&FIFO_512x(port)->txisr));
drivers/tty/serial/mpc52xx_uart.c
523
out_be32(&FIFO_512x(port)->tximr, 0);
drivers/tty/serial/mpc52xx_uart.c
524
out_be32(&FIFO_512x(port)->rximr, 0);
drivers/tty/serial/mpc52xx_uart.c
529
out_be32(&FIFO_512x(port)->tximr,
drivers/tty/serial/mpc52xx_uart.c
531
out_be32(&FIFO_512x(port)->rximr, port->read_status_mask & 0x7f);
drivers/tty/serial/mpc52xx_uart.c
768
out_be32(&FIFO_5125(port)->txcmd, MPC512x_PSC_FIFO_RESET_SLICE);
drivers/tty/serial/mpc52xx_uart.c
769
out_be32(&FIFO_5125(port)->txcmd, MPC512x_PSC_FIFO_ENABLE_SLICE);
drivers/tty/serial/mpc52xx_uart.c
770
out_be32(&FIFO_5125(port)->txalarm, 1);
drivers/tty/serial/mpc52xx_uart.c
771
out_be32(&FIFO_5125(port)->tximr, 0);
drivers/tty/serial/mpc52xx_uart.c
773
out_be32(&FIFO_5125(port)->rxcmd, MPC512x_PSC_FIFO_RESET_SLICE);
drivers/tty/serial/mpc52xx_uart.c
774
out_be32(&FIFO_5125(port)->rxcmd, MPC512x_PSC_FIFO_ENABLE_SLICE);
drivers/tty/serial/mpc52xx_uart.c
775
out_be32(&FIFO_5125(port)->rxalarm, 1);
drivers/tty/serial/mpc52xx_uart.c
776
out_be32(&FIFO_5125(port)->rximr, 0);
drivers/tty/serial/mpc52xx_uart.c
778
out_be32(&FIFO_5125(port)->tximr, MPC512x_PSC_FIFO_ALARM);
drivers/tty/serial/mpc52xx_uart.c
779
out_be32(&FIFO_5125(port)->rximr, MPC512x_PSC_FIFO_ALARM);
drivers/tty/serial/mpc52xx_uart.c
815
out_be32(&FIFO_5125(port)->rximr, rx_fifo_imr);
drivers/tty/serial/mpc52xx_uart.c
824
out_be32(&FIFO_5125(port)->tximr, tx_fifo_imr);
drivers/tty/serial/mpc52xx_uart.c
833
out_be32(&FIFO_5125(port)->tximr, tx_fifo_imr);
drivers/tty/serial/mpc52xx_uart.c
838
out_be32(&FIFO_5125(port)->rxisr, in_be32(&FIFO_5125(port)->rxisr));
drivers/tty/serial/mpc52xx_uart.c
843
out_be32(&FIFO_5125(port)->txisr, in_be32(&FIFO_5125(port)->txisr));
drivers/tty/serial/mpc52xx_uart.c
861
out_be32(&FIFO_5125(port)->tximr, 0);
drivers/tty/serial/mpc52xx_uart.c
862
out_be32(&FIFO_5125(port)->rximr, 0);
drivers/tty/serial/mpc52xx_uart.c
867
out_be32(&FIFO_5125(port)->tximr,
drivers/tty/serial/mpc52xx_uart.c
869
out_be32(&FIFO_5125(port)->rximr, port->read_status_mask & 0x7f);
drivers/tty/serial/mpc52xx_uart.c
951
out_be32(&PSC_5125(port)->sicr, val);
drivers/uio/uio_fsl_elbc_gpcm.c
132
out_be32(&bank->br, reg_new | BR_V);
drivers/uio/uio_fsl_elbc_gpcm.c
140
out_be32(&bank->or, reg_new);
drivers/uio/uio_fsl_elbc_gpcm.c
375
out_be32(&priv->lbc->bank[priv->bank].or, reg_or_new);
drivers/uio/uio_fsl_elbc_gpcm.c
376
out_be32(&priv->lbc->bank[priv->bank].br, reg_br_new);
drivers/usb/gadget/udc/fsl_qe_udc.c
1096
out_be32(&bd->buf, paddr);
drivers/usb/gadget/udc/fsl_qe_udc.c
1117
out_be32((u32 __iomem *)bd, bdstatus);
drivers/usb/gadget/udc/fsl_qe_udc.c
1373
out_be32((u32 __iomem *)bd, bdstatus & T_W);
drivers/usb/gadget/udc/fsl_qe_udc.c
1374
out_be32(&bd->buf, 0);
drivers/usb/gadget/udc/fsl_qe_udc.c
1437
out_be32((u32 __iomem *)bd, bdstatus & T_W);
drivers/usb/gadget/udc/fsl_qe_udc.c
1438
out_be32(&bd->buf, 0);
drivers/usb/gadget/udc/fsl_qe_udc.c
1540
out_be32((u32 __iomem *)bd, (bdstatus & BD_STATUS_MASK));
drivers/usb/gadget/udc/fsl_qe_udc.c
2360
out_be32(&usbpram->rstate, 0);
drivers/usb/gadget/udc/fsl_qe_udc.c
262
out_be32(&udc->ep_param[i]->tstate, 0);
drivers/usb/gadget/udc/fsl_qe_udc.c
296
out_be32((u32 __iomem *)bd, R_E | R_I);
drivers/usb/gadget/udc/fsl_qe_udc.c
299
out_be32((u32 __iomem *)bd, R_E | R_I | R_W);
drivers/usb/gadget/udc/fsl_qe_udc.c
303
out_be32(&bd->buf, 0);
drivers/usb/gadget/udc/fsl_qe_udc.c
304
out_be32((u32 __iomem *)bd, 0);
drivers/usb/gadget/udc/fsl_qe_udc.c
307
out_be32((u32 __iomem *)bd, T_W);
drivers/usb/gadget/udc/fsl_qe_udc.c
388
out_be32(&bd->buf, 0);
drivers/usb/gadget/udc/fsl_qe_udc.c
389
out_be32((u32 __iomem *)bd, 0);
drivers/usb/gadget/udc/fsl_qe_udc.c
392
out_be32(&bd->buf, 0);
drivers/usb/gadget/udc/fsl_qe_udc.c
393
out_be32((u32 __iomem *)bd, R_W);
drivers/usb/gadget/udc/fsl_qe_udc.c
397
out_be32(&bd->buf, 0);
drivers/usb/gadget/udc/fsl_qe_udc.c
398
out_be32((u32 __iomem *)bd, 0);
drivers/usb/gadget/udc/fsl_qe_udc.c
401
out_be32(&bd->buf, 0);
drivers/usb/gadget/udc/fsl_qe_udc.c
402
out_be32((u32 __iomem *)bd, T_W);
drivers/usb/gadget/udc/fsl_qe_udc.c
457
out_be32(&bd->buf, tmp);
drivers/usb/gadget/udc/fsl_qe_udc.c
458
out_be32((u32 __iomem *)bd, (R_E | R_I));
drivers/usb/gadget/udc/fsl_qe_udc.c
462
out_be32(&bd->buf, tmp);
drivers/usb/gadget/udc/fsl_qe_udc.c
463
out_be32((u32 __iomem *)bd, (R_E | R_I | R_W));
drivers/usb/gadget/udc/fsl_qe_udc.c
716
out_be32((u32 __iomem *)ep->e_rxbd, bdstatus);
drivers/usb/gadget/udc/fsl_qe_udc.c
736
out_be32((u32 __iomem *)bd, bdstatus);
drivers/usb/gadget/udc/fsl_qe_udc.c
995
out_be32((u32 __iomem *)bd, bdstatus & BD_STATUS_MASK);
drivers/usb/gadget/udc/fsl_udc_core.c
100
out_be32(p, v);
drivers/usb/host/ehci-ppc-of.c
87
out_be32(insreg_virt + 3, PPC440EPX_EHCI0_INSREG_BMT);
drivers/usb/host/fhci-hcd.c
279
out_be32(&fhci->pram->rx_state, 0);
drivers/usb/host/fhci-tds.c
213
out_be32(&td->buf_ptr, 0);
drivers/usb/host/fhci-tds.c
265
out_be32(&ep->ep_pram_ptr->tx_state, 0);
drivers/usb/host/fhci-tds.c
309
out_be32(&td->buf_ptr, 0);
drivers/usb/host/fhci-tds.c
405
out_be32(&td->buf_ptr, virt_to_phys(pkt->data));
drivers/usb/host/fhci-tds.c
485
out_be32(&td->buf_ptr, DUMMY2_BD_BUFFER);
drivers/usb/host/fhci-tds.c
499
out_be32(&td->buf_ptr, 0);
drivers/usb/host/fhci-tds.c
505
out_be32(&td->buf_ptr, 0);
drivers/usb/host/fhci-tds.c
510
out_be32(&ep->ep_pram_ptr->tx_state, 0);
drivers/usb/host/fhci-tds.c
543
out_be32(&td->buf_ptr, 0);
drivers/usb/host/fhci-tds.c
559
out_be32(&ep->ep_pram_ptr->tx_state, 0);
drivers/usb/host/fhci-tds.c
612
out_be32(&old_td->buf_ptr, 0);
drivers/usb/host/fhci-tds.c
616
out_be32(&old_td->buf_ptr, DUMMY2_BD_BUFFER);
drivers/usb/host/fhci-tds.c
87
out_be32(&ep->empty_td->buf_ptr, DUMMY_BD_BUFFER);
drivers/usb/host/fsl-mph-dr-of.c
318
out_be32(pdata->regs + ISIPHYCTRL, PHYCTRL_PHYE | PHYCTRL_PXE);
drivers/usb/host/fsl-mph-dr-of.c
319
out_be32(pdata->regs + USBGENCTRL, reg);
drivers/usb/phy/phy-fsl-usb.c
86
out_be32(p, v);
drivers/video/fbdev/fsl-diu-fb.c
1051
out_be32(&hw->curs_pos, yy << 16 | xx);
drivers/video/fbdev/fsl-diu-fb.c
1112
out_be32(&hw->cursor, DMA_ADDR(data, cursor));
drivers/video/fbdev/fsl-diu-fb.c
1114
out_be32(&hw->cursor, DMA_ADDR(data, blank_cursor));
drivers/video/fbdev/fsl-diu-fb.c
1444
out_be32(&data->diu_reg->int_mask, 0xffffffff);
drivers/video/fbdev/fsl-diu-fb.c
1585
out_be32(&hw->diu_mode, 0);
drivers/video/fbdev/fsl-diu-fb.c
1587
out_be32(&hw->diu_mode, 1);
drivers/video/fbdev/fsl-diu-fb.c
1773
out_be32(&data->diu_reg->desc[0], 0);
drivers/video/fbdev/fsl-diu-fb.c
1775
out_be32(&data->diu_reg->desc[1], data->dummy_ad.paddr);
drivers/video/fbdev/fsl-diu-fb.c
1776
out_be32(&data->diu_reg->desc[2], data->dummy_ad.paddr);
drivers/video/fbdev/fsl-diu-fb.c
1782
out_be32(&data->diu_reg->int_mask, 0xffffffff);
drivers/video/fbdev/fsl-diu-fb.c
496
out_be32(reg, val);
drivers/video/fbdev/fsl-diu-fb.c
612
out_be32(&hw->diu_mode, MFB_MODE1);
drivers/video/fbdev/fsl-diu-fb.c
621
out_be32(&hw->diu_mode, 0);
drivers/video/fbdev/fsl-diu-fb.c
829
out_be32(&hw->gamma, DMA_ADDR(data, gamma));
drivers/video/fbdev/fsl-diu-fb.c
831
out_be32(&hw->bgnd, 0x007F7F7F); /* Set background to grey */
drivers/video/fbdev/fsl-diu-fb.c
832
out_be32(&hw->disp_size, (var->yres << 16) | var->xres);
drivers/video/fbdev/fsl-diu-fb.c
839
out_be32(&hw->hsyn_para, temp);
drivers/video/fbdev/fsl-diu-fb.c
845
out_be32(&hw->vsyn_para, temp);
drivers/video/fbdev/fsl-diu-fb.c
861
out_be32(&hw->plut, 0x01F5F666);
drivers/video/fbdev/platinumfb.c
277
out_be32(&platinum_regs->reg[24].r, 7); /* turn display off */
drivers/video/fbdev/platinumfb.c
280
out_be32(&platinum_regs->reg[i+32].r, init->regs[i]);
drivers/video/fbdev/platinumfb.c
282
out_be32(&platinum_regs->reg[26+32].r, (pinfo->total_vram == 0x100000 ?
drivers/video/fbdev/platinumfb.c
285
out_be32(&platinum_regs->reg[16].r, (unsigned) pinfo->frame_buffer_phys+init->fb_offset+0x10);
drivers/video/fbdev/platinumfb.c
286
out_be32(&platinum_regs->reg[18].r, init->pitch[cmode]);
drivers/video/fbdev/platinumfb.c
287
out_be32(&platinum_regs->reg[19].r, (pinfo->total_vram == 0x100000 ?
drivers/video/fbdev/platinumfb.c
290
out_be32(&platinum_regs->reg[20].r, (pinfo->total_vram == 0x100000 ? 0x11 : 0x1011));
drivers/video/fbdev/platinumfb.c
291
out_be32(&platinum_regs->reg[21].r, 0x100);
drivers/video/fbdev/platinumfb.c
292
out_be32(&platinum_regs->reg[22].r, 1);
drivers/video/fbdev/platinumfb.c
293
out_be32(&platinum_regs->reg[23].r, 1);
drivers/video/fbdev/platinumfb.c
294
out_be32(&platinum_regs->reg[26].r, 0xc00);
drivers/video/fbdev/platinumfb.c
295
out_be32(&platinum_regs->reg[27].r, 0x235);
drivers/video/fbdev/platinumfb.c
306
out_be32(&platinum_regs->reg[24].r, 0); /* turn display on */
drivers/video/fbdev/platinumfb.c
411
out_be32(&platinum_regs->reg[23].r, 7); /* turn off drivers */
drivers/video/fbdev/platinumfb.c
416
out_be32(&platinum_regs->reg[23].r, 3); /* drive A low */
drivers/video/fbdev/platinumfb.c
419
out_be32(&platinum_regs->reg[23].r, 5); /* drive B low */
drivers/video/fbdev/platinumfb.c
423
out_be32(&platinum_regs->reg[23].r, 6); /* drive C low */
drivers/video/fbdev/platinumfb.c
427
out_be32(&platinum_regs->reg[23].r, 7); /* turn off drivers */
drivers/video/fbdev/platinumfb.c
581
out_be32(&pinfo->platinum_regs->reg[16].r, (unsigned)pinfo->frame_buffer_phys);
drivers/video/fbdev/platinumfb.c
582
out_be32(&pinfo->platinum_regs->reg[20].r, 0x1011); /* select max vram */
drivers/video/fbdev/platinumfb.c
583
out_be32(&pinfo->platinum_regs->reg[24].r, 0); /* switch in vram */
drivers/watchdog/mpc8xxx_wdt.c
171
out_be32(rsr, wdt_type->rsr_mask);
drivers/watchdog/mpc8xxx_wdt.c
94
out_be32(&ddata->base->swcrr, tmp);
drivers/watchdog/pika_wdt.c
83
out_be32(pikawdt_private.fpga + 0x14, reset);
sound/ppc/snd_ps3.c
63
out_be32(the_card.mapped_mmio_vaddr + reg, val);
sound/soc/fsl/fsl_dma.c
262
out_be32(&dma_channel->sr, sr2);
sound/soc/fsl/fsl_dma.c
441
out_be32(&dma_channel->clndar,
sound/soc/fsl/fsl_dma.c
443
out_be32(&dma_channel->eclndar,
sound/soc/fsl/fsl_dma.c
447
out_be32(&dma_channel->bcr, 0);
sound/soc/fsl/fsl_dma.c
479
out_be32(&dma_channel->mr, mr);
sound/soc/fsl/fsl_dma.c
612
out_be32(&dma_channel->mr, mr);
sound/soc/fsl/fsl_dma.c
748
out_be32(&dma_channel->mr, CCSR_DMA_MR_CA);
sound/soc/fsl/fsl_dma.c
749
out_be32(&dma_channel->mr, 0);
sound/soc/fsl/fsl_dma.c
752
out_be32(&dma_channel->sr, -1);
sound/soc/fsl/fsl_dma.c
753
out_be32(&dma_channel->clndar, 0);
sound/soc/fsl/fsl_dma.c
754
out_be32(&dma_channel->eclndar, 0);
sound/soc/fsl/fsl_dma.c
755
out_be32(&dma_channel->satr, 0);
sound/soc/fsl/fsl_dma.c
756
out_be32(&dma_channel->sar, 0);
sound/soc/fsl/fsl_dma.c
757
out_be32(&dma_channel->datr, 0);
sound/soc/fsl/fsl_dma.c
758
out_be32(&dma_channel->dar, 0);
sound/soc/fsl/fsl_dma.c
759
out_be32(&dma_channel->bcr, 0);
sound/soc/fsl/fsl_dma.c
760
out_be32(&dma_channel->nlndar, 0);
sound/soc/fsl/fsl_dma.c
761
out_be32(&dma_channel->enlndar, 0);
sound/soc/fsl/mpc5200_psc_ac97.c
101
out_be32(®s->sicr, psc_dma->sicr | MPC52xx_PSC_SICR_AWR);
sound/soc/fsl/mpc5200_psc_ac97.c
103
out_be32(®s->sicr, psc_dma->sicr);
sound/soc/fsl/mpc5200_psc_ac97.c
118
out_be32(®s->sicr, psc_dma->sicr | MPC52xx_PSC_SICR_ACRB);
sound/soc/fsl/mpc5200_psc_ac97.c
168
out_be32(&psc_dma->psc_regs->ac97_slots, 0x01000000);
sound/soc/fsl/mpc5200_psc_ac97.c
170
out_be32(&psc_dma->psc_regs->ac97_slots, 0x03000000);
sound/soc/fsl/mpc5200_psc_ac97.c
188
out_be32(&psc_dma->psc_regs->ac97_slots, psc_dma->slots);
sound/soc/fsl/mpc5200_psc_ac97.c
197
out_be32(&psc_dma->psc_regs->ac97_slots, psc_dma->slots);
sound/soc/fsl/mpc5200_psc_ac97.c
305
out_be32(®s->sicr, psc_dma->sicr);
sound/soc/fsl/mpc5200_psc_ac97.c
308
out_be32(®s->ac97_slots, 0x00000000);
sound/soc/fsl/mpc5200_psc_ac97.c
49
out_be32(&psc_dma->psc_regs->ac97_cmd, (1<<31) | ((reg & 0x7f) << 24));
sound/soc/fsl/mpc5200_psc_ac97.c
88
out_be32(&psc_dma->psc_regs->ac97_cmd,
sound/soc/fsl/mpc5200_psc_i2s.c
182
out_be32(&psc_dma->psc_regs->sicr,
sound/soc/fsl/mpc5200_psc_i2s.c
67
out_be32(&psc_dma->psc_regs->sicr, psc_dma->sicr | mode);
