mul_u64_u64_div_u64
return mul_u64_u64_div_u64(bps_limit, (u64)jiffy_elapsed, (u64)HZ);
frac = mul_u64_u64_div_u64(pll_freq, frac_max, parent_freq);
scaled_diff = -mul_u64_u64_div_u64(diff,
scaled_diff = mul_u64_u64_div_u64(diff,
diff = mul_u64_u64_div_u64(diff, data->scaled_freq,
diff = mul_u64_u64_div_u64(adj, scaled_ppm, 32768000000);
div = min_t(u64, mul_u64_u64_div_u64(state->period,
duty_steps = max_t(u64, mul_u64_u64_div_u64(state->duty_cycle,
on_cycles = mul_u64_u64_div_u64(fpwm->clkrate,
off_cycles = mul_u64_u64_div_u64(fpwm->clkrate,
*wfhw = mul_u64_u64_div_u64(wf->duty_length_ns, 100, ARGON40_FAN_HAT_PERIOD_NS);
pc = mul_u64_u64_div_u64(rate, period_ns, div);
dc = mul_u64_u64_div_u64(rate, duty_ns, div);
pc = mul_u64_u64_div_u64(period_ns, rate, NSEC_PER_SEC);
dc = mul_u64_u64_div_u64(duty_ns + 1, rate, NSEC_PER_SEC);
val = mul_u64_u64_div_u64(state->duty_cycle, 0xf, state->period);
p = mul_u64_u64_div_u64(max, duty_ns, period_ns);
duty = mul_u64_u64_div_u64(duty_ns, ddata->clk_rate, NSEC_PER_SEC);
period = mul_u64_u64_div_u64(period_ns, ddata->clk_rate, NSEC_PER_SEC);
val = mul_u64_u64_div_u64(period_ns, lpc18xx_pwm->clk_rate, NSEC_PER_SEC);
val = mul_u64_u64_div_u64(duty_ns, lpc18xx_pwm->clk_rate, NSEC_PER_SEC);
mul_u64_u64_div_u64(NSEC_PER_SEC, LPC18XX_PWM_TIMER_MAX, lpc18xx_pwm->clk_rate);
cnt_period = mul_u64_u64_div_u64(wf->period_length_ns, clk_rate, NSEC_PER_SEC);
cnt_duty = mul_u64_u64_div_u64(wf->duty_length_ns, clk_rate, NSEC_PER_SEC) >> clkdiv;
cnt = mul_u64_u64_div_u64(fin_freq, period, NSEC_PER_SEC);
duty_cnt = mul_u64_u64_div_u64(fin_freq, duty, NSEC_PER_SEC);
duty_steps = mul_u64_u64_div_u64(state->duty_cycle, clk_rate, tmp);
tmp = mul_u64_u64_div_u64(state->period, clk_rate, NSEC_PER_SEC);
clk_div = mul_u64_u64_div_u64(state->period, rate, NSEC_PER_SEC) >>
period = mul_u64_u64_div_u64(state->period, rate, div);
high_width = mul_u64_u64_div_u64(state->duty_cycle, rate, div);
dc = mul_u64_u64_div_u64(pv + 1, duty_ns, period_ns);
tmp = mul_u64_u64_div_u64(period_ns, clk_rate, (u64)NSEC_PER_SEC << div);
tmp = mul_u64_u64_div_u64(duty_ns, clk_rate, (u64)NSEC_PER_SEC << div);
period = mul_u64_u64_div_u64(clk_rate, period_ns, NSEC_PER_SEC);
duty = mul_u64_u64_div_u64(clk_rate, duty_ns,
tmp = mul_u64_u64_div_u64(clk_rate, state->period, prescaled_ns);
tmp = mul_u64_u64_div_u64(clk_rate, state->duty_cycle, prescaled_ns);
period_ticks = mul_u64_u64_div_u64(state->period, rzg2l_gpt->rate_khz, USEC_PER_SEC);
duty_ticks = mul_u64_u64_div_u64(state->duty_cycle, rzg2l_gpt->rate_khz, USEC_PER_SEC);
period_ticks = min(mul_u64_u64_div_u64(ddata->clk_rate_hz, state->period, NSEC_PER_SEC), U32_MAX);
hlperiod_ticks = min(mul_u64_u64_div_u64(ddata->clk_rate_hz, state->duty_cycle, NSEC_PER_SEC), U32_MAX);
arr = mul_u64_u64_div_u64(wf->period_length_ns, rate,
u64 psc = mul_u64_u64_div_u64(wf->period_length_ns, rate,
arr = mul_u64_u64_div_u64(wf->period_length_ns, rate,
duty = mul_u64_u64_div_u64(wf->duty_length_ns, rate,
u64 res = mul_u64_u64_div_u64(a, b, c);
duty = mul_u64_u64_div_u64(state->duty_cycle, clk_rate,
dd_freq = mul_u64_u64_div_u64(clk_rate, state->period, (u64)SP7021_PWM_FREQ_SCALER
rate = mul_u64_u64_div_u64(pc->clk_rate, period_ns,
*diff = mul_u64_u64_div_u64(base, (u64)scaled_ppm, 1000000ULL << 16);
stime = mul_u64_u64_div_u64(stime, rtime, stime + utime);
result = mul_u64_u64_div_u64(a, b, d);