cpuid_eax
max_level = cpuid_eax(0x80000000);
caps = cpuid_eax(IBS_CPUID_FEATURES);
return cpuid_eax(ACRN_CPUID_TIMING_INFO);
tlb_lld_2m = (cpuid_eax(0x80000005) >> 16) & 0xff;
if (c->extended_cpuid_level >= 0x8000001f && (cpuid_eax(0x8000001f) & BIT(0)))
level = cpuid_eax(1);
bhyve_cpuid_max = cpuid_eax(bhyve_cpuid_base);
return cpuid_eax(cpuid_leaf);
unsigned int eax = cpuid_eax(10);
if (cpuid_eax(0x80000000) >= 0x80000005) {
if (cpuid_eax(0xC0000000) >= 0xC0000001) {
c->x86_capability[CPUID_6_EAX] = cpuid_eax(0x00000006);
eax = cpuid_eax(0x80000000);
c->x86_capability[CPUID_8000_001F_EAX] = cpuid_eax(0x8000001f);
c->x86_capability[CPUID_8000_0021_EAX] = cpuid_eax(0x80000021);
curr_info->cpuid_level = cpuid_eax(0);
c->cpuid_level = cpuid_eax(0);
tlb_lld_2m = (cpuid_eax(0x80000005) >> 16) & 0xff;
c->cpuid_level = cpuid_eax(0);
unsigned eax = cpuid_eax(10);
m->cpuid = cpuid_eax(1);
m->cpuid = cpuid_eax(1);
csig->sig = cpuid_eax(0x00000001);
sig->sig = cpuid_eax(1);
eax = cpuid_eax(HYPERV_CPUID_FEATURES);
hv_max_functions = cpuid_eax(HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS);
ms_hyperv.features = cpuid_eax(HYPERV_CPUID_FEATURES);
ms_hyperv.hints = cpuid_eax(HYPERV_CPUID_ENLIGHTMENT_INFO);
hv_max_functions_eax = cpuid_eax(HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS);
ms_hyperv.max_vp_index = cpuid_eax(HYPERV_CPUID_IMPLEMENT_LIMITS);
eax = cpuid_eax(HYPERV_CPUID_VIRT_STACK_PROPERTIES);
ms_hyperv.isolation_config_a = cpuid_eax(HYPERV_CPUID_ISOLATION_CONFIG);
cpuid_eax(HYPERV_CPUID_NESTED_FEATURES);
max_level = cpuid_eax(cb->level & 0xffff0000);
c->topo.cpu_type = cpuid_eax(0x1a);
xlvl = cpuid_eax(0x80860000);
max = cpuid_eax(0x80860000);
if (cpuid_eax(0xC0000000) >= 0xC0000001) {
unsigned int eax = cpuid_eax(10);
return cpuid_eax(kvm_cpuid_base() | KVM_CPUID_FEATURES);
WRITE_ONCE(max_cpuid_80000000, cpuid_eax(0x80000000));
if (cpuid_eax(base) < cpuid.function)
return cpuid_eax(0x80000008) & 0xff;
if (cpuid_eax(0x80000000) < 0x8000001f)
return cpuid_eax(0) >= 0x12 && (cpuid_eax(0x12) & BIT(0));
u32 eax = cpuid_eax(0x00000001), i;
uint32_t eax = cpuid_eax(xen_cpuid_base() + 4);
eax = cpuid_eax(0x80000025);
return cpuid_eax(xen_cpuid_base() + 4) & XEN_HVM_CPUID_EXT_DEST_ID;
eax = cpuid_eax(base + 1);
eax = cpuid_eax(0x80000000);
eax = cpuid_eax(0x80000008);
maxei = cpuid_eax(0x80000000);
etuple = cpuid_eax(0x80000001);
eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
eax = cpuid_eax(CPUID_GET_MAX_CAPABILITIES);
thiscpuid = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
eax = cpuid_eax(CPUID_LEAF_DCA);
nr_class_id = cpuid_eax(AMD_HETERO_CPUID_27);
cpuid = cpuid_eax(1);
fmp->fru_arch = cpuid_eax(1);
if (!(cpuid_eax(ACRN_CPUID_FEATURES) & ACRN_FEATURE_PRIVILEGED_VM))
if ((cpuid_eax(xen_cpuid_base() + 4) & XEN_HVM_CPUID_UPCALL_VECTOR) &&
if (cpuid_eax(base) < 5)
cpuid_level = cpuid_eax(0);
ext_cpuid_level = cpuid_eax(0x80000000);
(cpuid_eax(6) & (1 << 1)))
unsigned int cpuid_eax(unsigned int op);