sys/arch/algor/algor/algor_intr.c

80

[IPL_SCHED] = MIPS_INT_MASK,

sys/arch/algor/algor/algor_intr.c

81

[IPL_HIGH] = MIPS_INT_MASK,

sys/arch/arc/arc/c_magnum.c

100

[IPL_DDB] = MIPS_INT_MASK,

sys/arch/arc/arc/c_magnum.c

101

[IPL_HIGH] = MIPS_INT_MASK,

sys/arch/arc/arc/c_magnum.c

99

[IPL_SCHED] = MIPS_INT_MASK,

sys/arch/arc/arc/c_nec_eisa.c

120

[IPL_SCHED] = MIPS_INT_MASK,

sys/arch/arc/arc/c_nec_eisa.c

121

[IPL_DDB] = MIPS_INT_MASK,

sys/arch/arc/arc/c_nec_eisa.c

122

[IPL_HIGH] = MIPS_INT_MASK,

sys/arch/arc/arc/c_nec_pci.c

125

[IPL_SCHED] = MIPS_INT_MASK,

sys/arch/arc/arc/c_nec_pci.c

126

[IPL_DDB] = MIPS_INT_MASK,

sys/arch/arc/arc/c_nec_pci.c

127

[IPL_HIGH] = MIPS_INT_MASK,

sys/arch/arc/arc/p_dti_arcstation.c

111

[IPL_VM] = MIPS_INT_MASK, /* XXX */

sys/arch/arc/arc/p_dti_arcstation.c

112

[IPL_SCHED] = MIPS_INT_MASK,

sys/arch/arc/arc/p_dti_arcstation.c

113

[IPL_DDB] = MIPS_INT_MASK,

sys/arch/arc/arc/p_dti_arcstation.c

114

[IPL_HIGH] = MIPS_INT_MASK,

sys/arch/arc/arc/p_dti_tyne.c

114

[IPL_VM] = MIPS_INT_MASK, /* XXX */

sys/arch/arc/arc/p_dti_tyne.c

115

[IPL_SCHED] = MIPS_INT_MASK,

sys/arch/arc/arc/p_dti_tyne.c

116

[IPL_DDB] = MIPS_INT_MASK,

sys/arch/arc/arc/p_dti_tyne.c

117

[IPL_HIGH] = MIPS_INT_MASK,

sys/arch/arc/arc/p_sni_rm200pci.c

95

[IPL_VM] = MIPS_INT_MASK, /* XXX */

sys/arch/arc/arc/p_sni_rm200pci.c

96

[IPL_SCHED] = MIPS_INT_MASK,

sys/arch/arc/arc/p_sni_rm200pci.c

97

[IPL_DDB] = MIPS_INT_MASK,

sys/arch/arc/arc/p_sni_rm200pci.c

98

[IPL_HIGH] = MIPS_INT_MASK,

sys/arch/cobalt/cobalt/interrupt.c

149

[IPL_VM] = MIPS_INT_MASK ^ MIPS_INT_MASK_5,

sys/arch/cobalt/cobalt/interrupt.c

150

[IPL_SCHED] = MIPS_INT_MASK,

sys/arch/cobalt/cobalt/interrupt.c

151

[IPL_DDB] = MIPS_INT_MASK,

sys/arch/cobalt/cobalt/interrupt.c

152

[IPL_HIGH] = MIPS_INT_MASK,

sys/arch/emips/emips/xilinx_ml40x.c

62

#define NOINTS MIPS_INT_MASK

sys/arch/emips/emips/xs_bee3.c

60

#define NOINTS MIPS_INT_MASK

sys/arch/emips/include/intr.h

49

#define MIPS_SPLHIGH (MIPS_INT_MASK)

sys/arch/evbmips/gdium/gdium_intr.c

162

[IPL_DDB] = MIPS_INT_MASK,

sys/arch/evbmips/gdium/gdium_intr.c

163

[IPL_HIGH] = MIPS_INT_MASK,

sys/arch/evbmips/ingenic/intr.c

84

[IPL_DDB] = MIPS_INT_MASK,

sys/arch/evbmips/ingenic/intr.c

85

[IPL_HIGH] = MIPS_INT_MASK,

sys/arch/evbmips/loongson/loongson_intr.c

92

[IPL_DDB] = MIPS_INT_MASK,

sys/arch/evbmips/loongson/loongson_intr.c

93

[IPL_HIGH] = MIPS_INT_MASK,

sys/arch/evbmips/malta/malta_intr.c

76

[IPL_DDB] = MIPS_INT_MASK,

sys/arch/evbmips/malta/malta_intr.c

77

[IPL_HIGH] = MIPS_INT_MASK,

sys/arch/evbmips/mipssim/mipssim_intr.c

58

[IPL_DDB] = MIPS_INT_MASK,

sys/arch/evbmips/mipssim/mipssim_intr.c

59

[IPL_HIGH] = MIPS_INT_MASK,

sys/arch/evbmips/sbmips/sb1250_icu.c

73

[IPL_HIGH] = MIPS_INT_MASK,

sys/arch/ews4800mips/ews4800mips/tr2_intr.c

67

[IPL_DDB] = MIPS_INT_MASK,

sys/arch/ews4800mips/ews4800mips/tr2_intr.c

68

[IPL_HIGH] = MIPS_INT_MASK,

sys/arch/ews4800mips/ews4800mips/tr2a_intr.c

56

[IPL_VM] = MIPS_INT_MASK & ~MIPS_INT_MASK_5,

sys/arch/ews4800mips/ews4800mips/tr2a_intr.c

57

[IPL_SCHED] = MIPS_INT_MASK,

sys/arch/ews4800mips/ews4800mips/tr2a_intr.c

58

[IPL_DDB] = MIPS_INT_MASK,

sys/arch/ews4800mips/ews4800mips/tr2a_intr.c

59

[IPL_HIGH] = MIPS_INT_MASK,

sys/arch/hpcmips/tx/tx39icu.c

96

[IPL_DDB] = MIPS_INT_MASK,

sys/arch/hpcmips/tx/tx39icu.c

97

[IPL_HIGH] = MIPS_INT_MASK,

sys/arch/hpcmips/vr/vr.c

143

[IPL_DDB] = MIPS_INT_MASK,

sys/arch/hpcmips/vr/vr.c

144

[IPL_HIGH] = MIPS_INT_MASK,

sys/arch/mips/adm5120/adm5120_intr.c

98

[IPL_SCHED] = MIPS_INT_MASK,

sys/arch/mips/adm5120/adm5120_intr.c

99

[IPL_HIGH] = MIPS_INT_MASK,

sys/arch/mips/alchemy/au_icu.c

107

[IPL_SCHED] = MIPS_INT_MASK,

sys/arch/mips/alchemy/au_icu.c

108

[IPL_DDB] = MIPS_INT_MASK,

sys/arch/mips/alchemy/au_icu.c

109

[IPL_HIGH] = MIPS_INT_MASK,

sys/arch/mips/atheros/ar5312.c

376

[IPL_SCHED] = MIPS_INT_MASK,

sys/arch/mips/atheros/ar5312.c

377

[IPL_DDB] = MIPS_INT_MASK,

sys/arch/mips/atheros/ar5312.c

378

[IPL_HIGH] = MIPS_INT_MASK,

sys/arch/mips/atheros/ar5315.c

360

[IPL_SCHED] = MIPS_INT_MASK,

sys/arch/mips/atheros/ar5315.c

361

[IPL_DDB] = MIPS_INT_MASK,

sys/arch/mips/atheros/ar5315.c

362

[IPL_HIGH] = MIPS_INT_MASK,

sys/arch/mips/atheros/ar7100.c

92

[IPL_SCHED] = MIPS_INT_MASK, /* EVERYTHING */

sys/arch/mips/atheros/ar7100.c

93

[IPL_DDB] = MIPS_INT_MASK, /* EVERYTHING */

sys/arch/mips/atheros/ar7100.c

94

[IPL_HIGH] = MIPS_INT_MASK, /* EVERYTHING */

sys/arch/mips/atheros/ar9344.c

378

[IPL_SCHED] = MIPS_INT_MASK, /* EVERYTHING */

sys/arch/mips/atheros/ar9344.c

379

[IPL_DDB] = MIPS_INT_MASK, /* EVERYTHING */

sys/arch/mips/atheros/ar9344.c

380

[IPL_HIGH] = MIPS_INT_MASK, /* EVERYTHING */

sys/arch/mips/cavium/octeon_cpunode.c

231

KASSERT((mips_cp0_status_read() & MIPS_INT_MASK) == 0);

sys/arch/mips/cavium/octeon_intr.c

485

KASSERT((ipending & ~MIPS_INT_MASK) == 0);

sys/arch/mips/cavium/octeon_intr.c

88

[IPL_HIGH] = MIPS_INT_MASK,

sys/arch/mips/include/asm.h

800

ori sr, (MIPS_INT_MASK | MIPS_SR_INT_IE); \

sys/arch/mips/include/cpuregs.h

340

#define MIPS3_INT_MASK MIPS_INT_MASK

sys/arch/mips/include/cpuregs.h

343

#define MIPS3_INT_MASK (MIPS_INT_MASK & ~MIPS_INT_MASK_5)

sys/arch/mips/include/psl.h

69

#define MIPS1_PSL_LOWIPL (MIPS_INT_MASK | MIPS_SR_INT_IE)

sys/arch/mips/include/psl.h

76

MIPS_INT_MASK)

sys/arch/mips/mips/mips_machdep.c

2150

| (ipl_sr_map.sr_bits[IPL_SCHED] ^ MIPS_INT_MASK);

sys/arch/mips/mips/mips_machdep.c

2383

status = mips_cp0_status_read() & MIPS_INT_MASK;

sys/arch/mips/mips/mips_machdep.c

2384

KASSERT(status == MIPS_INT_MASK);

sys/arch/mips/mips/mips_machdep.c

2388

status = mips_cp0_status_read() & MIPS_INT_MASK;

sys/arch/mips/mips/mips_machdep.c

2389

KASSERT((status ^ sr_map[IPL_SOFTCLOCK]) == MIPS_INT_MASK);

sys/arch/mips/mips/mips_machdep.c

2394

status = mips_cp0_status_read() & MIPS_INT_MASK;

sys/arch/mips/mips/mips_machdep.c

2395

KASSERT((status ^ sr_map[IPL_SOFTBIO]) == MIPS_INT_MASK);

sys/arch/mips/mips/mips_machdep.c

2400

status = mips_cp0_status_read() & MIPS_INT_MASK;

sys/arch/mips/mips/mips_machdep.c

2401

KASSERT((status ^ sr_map[IPL_SOFTNET]) == MIPS_INT_MASK);

sys/arch/mips/mips/mips_machdep.c

2406

status = mips_cp0_status_read() & MIPS_INT_MASK;

sys/arch/mips/mips/mips_machdep.c

2407

KASSERT((status ^ sr_map[IPL_SOFTSERIAL]) == MIPS_INT_MASK);

sys/arch/mips/mips/mips_machdep.c

2412

status = mips_cp0_status_read() & MIPS_INT_MASK;

sys/arch/mips/mips/mips_machdep.c

2413

KASSERT((status ^ sr_map[IPL_VM]) == MIPS_INT_MASK);

sys/arch/mips/mips/mips_machdep.c

2418

status = mips_cp0_status_read() & MIPS_INT_MASK;

sys/arch/mips/mips/mips_machdep.c

2419

KASSERT((status ^ sr_map[IPL_SCHED]) == MIPS_INT_MASK);

sys/arch/mips/mips/mips_machdep.c

2424

status = mips_cp0_status_read() & MIPS_INT_MASK;

sys/arch/mips/mips/mips_machdep.c

2425

KASSERT((status ^ sr_map[IPL_HIGH]) == MIPS_INT_MASK);

sys/arch/mips/mips/mips_machdep.c

2430

status = mips_cp0_status_read() & MIPS_INT_MASK;

sys/arch/mips/mips/mips_machdep.c

2431

KASSERT(status == MIPS_INT_MASK);

sys/arch/mips/mips/mips_machdep.c

2446

status = mips_cp0_status_read() & MIPS_INT_MASK;

sys/arch/mips/mips/mips_machdep.c

2447

KASSERT((status ^ sr_map[t]) == MIPS_INT_MASK);

sys/arch/mips/mips/mips_machdep.c

2452

status = mips_cp0_status_read() & MIPS_INT_MASK;

sys/arch/mips/mips/mips_machdep.c

2453

KASSERT((status ^ sr_map[r]) == MIPS_INT_MASK);

sys/arch/mips/mips/mips_machdep.c

2458

status = mips_cp0_status_read() & MIPS_INT_MASK;

sys/arch/mips/mips/mips_machdep.c

2459

KASSERT((status ^ sr_map[s]) == MIPS_INT_MASK);

sys/arch/mips/mips/mips_machdep.c

2463

status = mips_cp0_status_read() & MIPS_INT_MASK;

sys/arch/mips/mips/mips_machdep.c

2464

KASSERT(status == MIPS_INT_MASK);

sys/arch/mips/ralink/ralink_intr.c

61

[IPL_VM] = MIPS_INT_MASK ^ MIPS_INT_MASK_5,

sys/arch/mips/ralink/ralink_intr.c

62

[IPL_SCHED] = MIPS_INT_MASK,

sys/arch/mips/ralink/ralink_intr.c

63

[IPL_DDB] = MIPS_INT_MASK,

sys/arch/mips/ralink/ralink_intr.c

64

[IPL_HIGH] = MIPS_INT_MASK,

sys/arch/mipsco/mipsco/mips_3x30.c

78

[IPL_DDB] = MIPS_INT_MASK,

sys/arch/mipsco/mipsco/mips_3x30.c

79

[IPL_HIGH] = MIPS_INT_MASK,

sys/arch/newsmips/newsmips/news3400.c

77

[IPL_DDB] = MIPS_INT_MASK,

sys/arch/newsmips/newsmips/news3400.c

78

[IPL_HIGH] = MIPS_INT_MASK,

sys/arch/newsmips/newsmips/news4000.c

68

[IPL_DDB] = MIPS_INT_MASK,

sys/arch/newsmips/newsmips/news4000.c

69

[IPL_HIGH] = MIPS_INT_MASK,

sys/arch/newsmips/newsmips/news5000.c

73

[IPL_DDB] = MIPS_INT_MASK,

sys/arch/newsmips/newsmips/news5000.c

74

[IPL_HIGH] = MIPS_INT_MASK,

sys/arch/pmax/include/intr.h

44

#define MIPS_SPLHIGH (MIPS_INT_MASK)

sys/arch/pmax/pmax/dec_3maxplus.c

131

[IPL_SCHED] = MIPS_INT_MASK,

sys/arch/pmax/pmax/dec_3maxplus.c

132

[IPL_DDB] = MIPS_INT_MASK,

sys/arch/pmax/pmax/dec_3maxplus.c

133

[IPL_HIGH] = MIPS_INT_MASK,

sys/arch/pmax/pmax/dec_maxine.c

127

[IPL_SCHED] = MIPS_INT_MASK,

sys/arch/pmax/pmax/dec_maxine.c

128

[IPL_DDB] = MIPS_INT_MASK,

sys/arch/pmax/pmax/dec_maxine.c

129

[IPL_HIGH] = MIPS_INT_MASK,

sys/arch/sbmips/sbmips/sb1250_icu.c

73

[IPL_HIGH] = MIPS_INT_MASK,

sys/arch/sgimips/sgimips/machdep.c

127

[IPL_DDB] = MIPS_INT_MASK, \

sys/arch/sgimips/sgimips/machdep.c

128

[IPL_HIGH] = MIPS_INT_MASK

sys/arch/sgimips/sgimips/machdep.c

156

[IPL_SCHED] = MIPS_INT_MASK,