IPL_DDB
[IPL_DDB] = MIPS_INT_MASK,
[IPL_DDB] = MIPS_INT_MASK,
[IPL_DDB] = MIPS_INT_MASK,
[IPL_DDB] = MIPS_INT_MASK,
[IPL_DDB] = MIPS_INT_MASK,
[IPL_DDB] = MIPS_INT_MASK,
[IPL_DDB] = MIPS_INT_MASK,
[IPL_DDB] = NOINTS,
[IPL_DDB] = NOINTS,
[IPL_DDB] = MIPS_INT_MASK,
[IPL_DDB] = MIPS_INT_MASK,
[IPL_DDB] = MIPS_INT_MASK,
[IPL_DDB] = MIPS_INT_MASK,
[IPL_DDB] = MIPS_INT_MASK,
[IPL_DDB] = MIPS_SOFT_INT_MASK | MIPS_INT_MASK_0
[IPL_DDB] = MIPS_INT_MASK,
[IPL_DDB] = MIPS_INT_MASK,
[IPL_DDB] = MIPS_INT_MASK,
[IPL_DDB] = MIPS_INT_MASK,
[IPL_DDB] = MIPS_INT_MASK,
[IPL_DDB] = MIPS_INT_MASK,
[IPL_DDB] = MIPS_INT_MASK,
[IPL_DDB] = MIPS_INT_MASK, /* EVERYTHING */
[IPL_DDB] = MIPS_INT_MASK, /* EVERYTHING */
case IPL_DDB:
case IPL_DDB:
[IPL_DDB] = MIPS_SOFT_INT_MASK | MIPS_INT_MASK_0
#define IPL_HIGH (IPL_DDB+1)
[IPL_DDB] = MIPS_INT_MASK,
IPL_DDB, ipl_eimr_map[IPL_DDB]);
(void)cpu_intr_establish(K_INT_BAD_ECC, IPL_DDB,
(void)cpu_intr_establish(K_INT_COR_ECC, IPL_DDB,
(void)cpu_intr_establish(K_INT_IO_BUS, IPL_DDB,
[IPL_DDB] = MIPS_INT_MASK,
[IPL_DDB] = MIPS_INT_MASK,
[IPL_DDB] = MIPS_INT_MASK,
[IPL_DDB] = MIPS_INT_MASK,
[IPL_DDB] = MIPS_SPLHIGH,
[IPL_DDB] = MIPS_SPLHIGH,
[IPL_DDB] = MIPS_INT_MASK,
[IPL_DDB] = MIPS_SPLHIGH,
[IPL_DDB] = MIPS_SPLHIGH,
[IPL_DDB] = MIPS_INT_MASK,
[IPL_DDB] = MIPS_SOFT_INT_MASK | MIPS_INT_MASK_0
[IPL_DDB] = MIPS_INT_MASK, \