DATA_OUT_PHASE
case DATA_OUT_PHASE:
case SBIC_CSR_XFERRED | DATA_OUT_PHASE:
case SBIC_CSR_MIS | DATA_OUT_PHASE:
case SBIC_CSR_MIS_1 | DATA_OUT_PHASE:
case SBIC_CSR_MIS_2 | DATA_OUT_PHASE:
case SBIC_CSR_XFERRED | DATA_OUT_PHASE:
case SBIC_CSR_MIS | DATA_OUT_PHASE:
case SBIC_CSR_MIS_1 | DATA_OUT_PHASE:
case SBIC_CSR_MIS_2 | DATA_OUT_PHASE:
if ( (flscphase == DATA_OUT_PHASE)
case DATA_OUT_PHASE:
case SBIC_CSR_XFERRED|DATA_OUT_PHASE:
case SBIC_CSR_MIS|DATA_OUT_PHASE:
case SBIC_CSR_MIS_1|DATA_OUT_PHASE:
case SBIC_CSR_MIS_2|DATA_OUT_PHASE:
case SBIC_CSR_XFERRED|DATA_OUT_PHASE:
case SBIC_CSR_MIS|DATA_OUT_PHASE:
case SBIC_CSR_MIS_1|DATA_OUT_PHASE:
case SBIC_CSR_MIS_2|DATA_OUT_PHASE:
phase = DATA_OUT_PHASE;
case DATA_OUT_PHASE:
xs->xs_control & XS_CTL_DATA_IN ? DATA_IN_PHASE : DATA_OUT_PHASE);
phase = xs->xs_control & XS_CTL_DATA_IN ? DATA_IN_PHASE : DATA_OUT_PHASE;
case DATA_OUT_PHASE:
case DATA_OUT_PHASE:
DATA_OUT_PHASE);
if ((hs->sc_phase == DATA_OUT_PHASE) ||
if ( (espphase == DATA_OUT_PHASE)
case SBIC_CSR_XFERRED | DATA_OUT_PHASE:
case SBIC_CSR_MIS | DATA_OUT_PHASE:
case SBIC_CSR_MIS_1 | DATA_OUT_PHASE:
case SBIC_CSR_MIS_2 | DATA_OUT_PHASE:
case DATA_OUT_PHASE:
case SBIC_CSR_XFERRED | DATA_OUT_PHASE:
case SBIC_CSR_MIS | DATA_OUT_PHASE:
case SBIC_CSR_MIS_1 | DATA_OUT_PHASE:
case SBIC_CSR_MIS_2 | DATA_OUT_PHASE:
case DATA_OUT_PHASE:
case DATA_OUT_PHASE:
sc->sc_prevphase = DATA_OUT_PHASE;
sc->sc_phase = DATA_OUT_PHASE;
case DATA_OUT_PHASE:
sc->sc_prevphase = DATA_OUT_PHASE;
case DATA_OUT_PHASE:
sc->sc_prevphase = DATA_OUT_PHASE;
case DATA_OUT_PHASE:
case SBIC_CSR_XFERRED | DATA_OUT_PHASE:
case SBIC_CSR_MIS | DATA_OUT_PHASE:
case SBIC_CSR_MIS_1 | DATA_OUT_PHASE:
case SBIC_CSR_MIS_2 | DATA_OUT_PHASE:
case DATA_OUT_PHASE:
if ((espphase == DATA_OUT_PHASE) ||
if (espphase == DATA_OUT_PHASE ||
if ((espphase == DATA_OUT_PHASE) ||