bin/csh/extern.h
292
void shift(Char **, struct command *);
bin/csh/init.c
93
{ "shift", shift, 0, 1 },
common/lib/libc/atomic/atomic_cas_by_cas32.c
51
const size_t shift = off*8;
common/lib/libc/atomic/atomic_cas_by_cas32.c
52
const uint32_t mask = 0x0ffff << shift;
common/lib/libc/atomic/atomic_cas_by_cas32.c
53
const uint32_t old32_part = (uint32_t)old << shift;
common/lib/libc/atomic/atomic_cas_by_cas32.c
54
const uint32_t new32_part = (uint32_t)new << shift;
common/lib/libc/atomic/atomic_cas_by_cas32.c
60
return (uint16_t)((old32 & mask) >> shift);
common/lib/libc/atomic/atomic_cas_by_cas32.c
73
const size_t shift = off*8;
common/lib/libc/atomic/atomic_cas_by_cas32.c
74
const uint32_t mask = 0x0ff << shift;
common/lib/libc/atomic/atomic_cas_by_cas32.c
75
const uint32_t old32_part = (uint32_t)old << shift;
common/lib/libc/atomic/atomic_cas_by_cas32.c
76
const uint32_t new32_part = (uint32_t)new << shift;
common/lib/libc/atomic/atomic_cas_by_cas32.c
82
return (uint8_t)((old32 & mask) >> shift);
common/lib/libc/gen/radixtree.c
507
int shift;
common/lib/libc/gen/radixtree.c
523
for (shift = 64 - RADIX_TREE_BITS_PER_HEIGHT; shift >= 0;) {
common/lib/libc/gen/radixtree.c
526
const uint64_t i = (idx >> shift) & mask;
common/lib/libc/gen/radixtree.c
528
if (shift >= hshift) {
common/lib/libc/gen/radixtree.c
533
shift -= RADIX_TREE_BITS_PER_HEIGHT;
common/lib/libc/gen/radixtree.c
544
newheight = shift / RADIX_TREE_BITS_PER_HEIGHT + 1;
common/lib/libc/gen/radixtree.c
573
shift -= RADIX_TREE_BITS_PER_HEIGHT;
common/lib/libc/quad/ashldi3.c
52
__ashldi3(quad_t a, qshift_t shift)
common/lib/libc/quad/ashldi3.c
56
if (shift == 0)
common/lib/libc/quad/ashldi3.c
59
if (shift >= INT_BITS) {
common/lib/libc/quad/ashldi3.c
60
aa.ul[H] = aa.ul[L] << (unsigned int)(shift - INT_BITS);
common/lib/libc/quad/ashldi3.c
63
aa.ul[H] = (aa.ul[H] << shift) |
common/lib/libc/quad/ashldi3.c
64
(aa.ul[L] >> (INT_BITS - shift));
common/lib/libc/quad/ashldi3.c
65
aa.ul[L] <<= shift;
common/lib/libc/quad/ashrdi3.c
53
__ashrdi3(quad_t a, qshift_t shift)
common/lib/libc/quad/ashrdi3.c
57
if (shift == 0)
common/lib/libc/quad/ashrdi3.c
60
if (shift >= INT_BITS) {
common/lib/libc/quad/ashrdi3.c
73
aa.ul[L] = aa.sl[H] >> (shift - INT_BITS);
common/lib/libc/quad/ashrdi3.c
76
aa.ul[L] = (aa.ul[L] >> shift) |
common/lib/libc/quad/ashrdi3.c
77
(aa.ul[H] << (unsigned int)(INT_BITS - shift));
common/lib/libc/quad/ashrdi3.c
79
aa.sl[H] >>= shift;
common/lib/libc/quad/lshldi3.c
54
__lshldi3(quad_t a, qshift_t shift)
common/lib/libc/quad/lshldi3.c
58
if (shift == 0)
common/lib/libc/quad/lshldi3.c
61
if (shift >= INT_BITS) {
common/lib/libc/quad/lshldi3.c
62
aa.ul[H] = aa.ul[L] << (unsigned int)(shift - INT_BITS);
common/lib/libc/quad/lshldi3.c
65
aa.ul[H] = (aa.ul[H] << shift) |
common/lib/libc/quad/lshldi3.c
66
(aa.ul[L] >> (INT_BITS - shift));
common/lib/libc/quad/lshldi3.c
67
aa.ul[L] <<= shift;
common/lib/libc/quad/lshrdi3.c
53
__lshrdi3(quad_t a, qshift_t shift)
common/lib/libc/quad/lshrdi3.c
57
if (shift == 0)
common/lib/libc/quad/lshrdi3.c
60
if (shift >= INT_BITS) {
common/lib/libc/quad/lshrdi3.c
61
aa.ul[L] = aa.ul[H] >> (shift - INT_BITS);
common/lib/libc/quad/lshrdi3.c
64
aa.ul[L] = (aa.ul[L] >> shift) |
common/lib/libc/quad/lshrdi3.c
65
(aa.ul[H] << (unsigned int)(INT_BITS - shift));
common/lib/libc/quad/lshrdi3.c
66
aa.ul[H] >>= shift;
common/lib/libc/string/memmem.c
146
k = l-shift[h[l-1]];
common/lib/libc/string/memmem.c
86
size_t shift[256];
common/lib/libc/string/memmem.c
90
BITOP(byteset, n[i], |=), shift[n[i]] = i+1;
common/lib/libx86emu/x86emu.c
4996
uint8_t shift;
common/lib/libx86emu/x86emu.c
5003
shift = emu->x86.R_CL;
common/lib/libx86emu/x86emu.c
5005
destval = decode_and_fetch_long_imm8(emu, &shift);
common/lib/libx86emu/x86emu.c
5008
destval = shld_long(emu, destval, *shiftreg, shift);
common/lib/libx86emu/x86emu.c
5010
destval = shrd_long(emu, destval, *shiftreg, shift);
common/lib/libx86emu/x86emu.c
5017
uint8_t shift;
common/lib/libx86emu/x86emu.c
5024
shift = emu->x86.R_CL;
common/lib/libx86emu/x86emu.c
5026
destval = decode_and_fetch_word_imm8(emu, &shift);
common/lib/libx86emu/x86emu.c
5029
destval = shld_word(emu, destval, *shiftreg, shift);
common/lib/libx86emu/x86emu.c
5031
destval = shrd_word(emu, destval, *shiftreg, shift);
common/lib/libx86emu/x86emu.c
5336
uint8_t shift;
common/lib/libx86emu/x86emu.c
5342
srcval = decode_and_fetch_long_imm8(emu, &shift);
common/lib/libx86emu/x86emu.c
5343
bit = shift & 0x1F;
common/lib/libx86emu/x86emu.c
5366
uint8_t shift;
common/lib/libx86emu/x86emu.c
5372
srcval = decode_and_fetch_word_imm8(emu, &shift);
common/lib/libx86emu/x86emu.c
5373
bit = shift & 0xF;
crypto/dist/ipsec-tools/src/racoon/missing/crypto/rijndael/rijndael-alg-fst.c
411
word8 temp[4], shift;
crypto/dist/ipsec-tools/src/racoon/missing/crypto/rijndael/rijndael-alg-fst.c
429
shift = (4 - i) & 3;
crypto/dist/ipsec-tools/src/racoon/missing/crypto/rijndael/rijndael-alg-fst.c
430
temp[0] = a[(0 + shift) & 3][i];
crypto/dist/ipsec-tools/src/racoon/missing/crypto/rijndael/rijndael-alg-fst.c
431
temp[1] = a[(1 + shift) & 3][i];
crypto/dist/ipsec-tools/src/racoon/missing/crypto/rijndael/rijndael-alg-fst.c
432
temp[2] = a[(2 + shift) & 3][i];
crypto/dist/ipsec-tools/src/racoon/missing/crypto/rijndael/rijndael-alg-fst.c
433
temp[3] = a[(3 + shift) & 3][i];
crypto/dist/ipsec-tools/src/racoon/missing/crypto/rijndael/rijndael-alg-fst.c
476
shift = (4 - i) & 3;
crypto/dist/ipsec-tools/src/racoon/missing/crypto/rijndael/rijndael-alg-fst.c
477
temp[0] = a[(0 + shift) & 3][i];
crypto/dist/ipsec-tools/src/racoon/missing/crypto/rijndael/rijndael-alg-fst.c
478
temp[1] = a[(1 + shift) & 3][i];
crypto/dist/ipsec-tools/src/racoon/missing/crypto/rijndael/rijndael-alg-fst.c
479
temp[2] = a[(2 + shift) & 3][i];
crypto/dist/ipsec-tools/src/racoon/missing/crypto/rijndael/rijndael-alg-fst.c
480
temp[3] = a[(3 + shift) & 3][i];
distrib/utils/ssh/ssh.c
444
goto shift;
distrib/utils/ssh/ssh.c
447
goto shift;
distrib/utils/ssh/ssh.c
450
goto shift;
distrib/utils/ssh/ssh.c
454
shift:
include/arpa/nameser.h
153
struct _ns_flagdata { int mask, shift; };
lib/libc/nameser/ns_parse.c
84
return((u_int32_t)((handle)._flags & _ns_flagdata[flag].mask) >> _ns_flagdata[flag].shift);
lib/libc/stdlib/a64l.c
23
long value, digit, shift;
lib/libc/stdlib/a64l.c
29
shift = 0;
lib/libc/stdlib/a64l.c
40
value |= digit << shift;
lib/libc/stdlib/a64l.c
41
shift += 6;
lib/libc/stdlib/malloc.c
1057
i = ((size_t)(uintptr_t)ptr & malloc_pagemask) >> info->shift;
lib/libc/stdlib/malloc.c
1075
mp = page_dir + info->shift;
lib/libc/stdlib/malloc.c
1081
mp = page_dir + info->shift;
lib/libc/stdlib/malloc.c
154
u_short shift; /* How far to shift for this size chunks */
lib/libc/stdlib/malloc.c
692
bp->shift = bits;
lib/libc/stdlib/malloc.c
780
k <<= bp->shift;
lib/libc/stdlib/malloc.c
874
i = ((size_t)(uintptr_t)ptr & malloc_pagemask) >> (*mp)->shift;
lib/libc/time/zic.c
2598
register int shift;
lib/libc/time/zic.c
2601
for (i = 0, shift = 24; i < 4; ++i, shift -= 8)
lib/libc/time/zic.c
2602
b[i] = (val >> shift) & 0xff;
lib/libc/time/zic.c
2609
register int shift;
lib/libc/time/zic.c
2612
for (i = 0, shift = 56; i < 8; ++i, shift -= 8)
lib/libc/time/zic.c
2613
b[i] = (val >> shift) & 0xff;
lib/libcurses/EXAMPLES/view.c
411
shift += n;
lib/libcurses/EXAMPLES/view.c
420
shift -= n;
lib/libcurses/EXAMPLES/view.c
421
if (shift < 0) {
lib/libcurses/EXAMPLES/view.c
422
shift = 0;
lib/libcurses/EXAMPLES/view.c
492
sprintf(temp, "%s (%3dx%3d) col %d ", tag, LINES, COLS, shift);
lib/libcurses/EXAMPLES/view.c
514
if (len > shift) {
lib/libcurses/EXAMPLES/view.c
516
add_wchstr(s + shift);
lib/libcurses/EXAMPLES/view.c
518
addchstr(s + shift);
lib/libcurses/EXAMPLES/view.c
69
static int shift = 0;
lib/libedit/refresh.c
193
re_putc(EditLine *el, wint_t c, int shift)
lib/libedit/refresh.c
203
while (shift && (cur->h + w > sizeh))
lib/libedit/refresh.c
212
if (!shift)
lib/libm/src/s_rintl.c
45
shift[2] = {
lib/libm/src/s_rintl.c
81
x += shift[sign];
lib/libm/src/s_rintl.c
82
x -= shift[sign];
lib/libskey/put.c
2239
int shift;
lib/libskey/put.c
2246
shift = ((8 - ((start + length) % 8)) % 8);
lib/libskey/put.c
2247
y = (int) x << shift;
lib/libskey/put.c
2251
if (shift + length > 16)
lib/libskey/put.c
2257
else if (shift + length > 8)
sbin/newfs/newfs.c
790
int shift = 0;
sbin/newfs/newfs.c
804
shift += 10;
sbin/newfs/newfs.c
807
shift += 10;
sbin/newfs/newfs.c
810
shift += 10;
sbin/newfs/newfs.c
813
shift += 10;
sbin/newfs/newfs.c
822
result = r1 << shift;
sbin/newfs/newfs.c
823
if (errno == ERANGE || result >> shift != r1)
sbin/newfs_ext2fs/newfs_ext2fs.c
409
int shift = 0;
sbin/newfs_ext2fs/newfs_ext2fs.c
426
shift += 10;
sbin/newfs_ext2fs/newfs_ext2fs.c
430
shift += 10;
sbin/newfs_ext2fs/newfs_ext2fs.c
434
shift += 10;
sbin/newfs_ext2fs/newfs_ext2fs.c
445
result = r1 << shift;
sbin/newfs_ext2fs/newfs_ext2fs.c
446
if (errno == ERANGE || result >> shift != r1)
sbin/newfs_lfs/newfs.c
405
int shift = 0;
sbin/newfs_lfs/newfs.c
419
shift += 10;
sbin/newfs_lfs/newfs.c
422
shift += 10;
sbin/newfs_lfs/newfs.c
425
shift += 10;
sbin/newfs_lfs/newfs.c
434
result = r1 << shift;
sbin/newfs_lfs/newfs.c
435
if (errno == ERANGE || result >> shift != r1)
sbin/nvmectl/bignum.c
280
mp_digit *tmpc, shift, mask, carry, rr;
sbin/nvmectl/bignum.c
287
shift = DIGIT_BIT - d;
sbin/nvmectl/bignum.c
296
rr = (*tmpc >> shift) & mask;
sbin/nvmectl/bignum.c
937
mp_digit *tmpc, mask, shift;
sbin/nvmectl/bignum.c
943
shift = DIGIT_BIT - D;
sbin/nvmectl/bignum.c
955
*tmpc = (*tmpc >> D) | (r << shift);
share/examples/rump/ukbd_read/kbd.c
54
int shift = 0;
share/examples/rump/ukbd_read/kbd.c
75
shift = 0;
share/examples/rump/ukbd_read/kbd.c
80
shift = SHIFT;
share/examples/rump/ukbd_read/kbd.c
94
printf(" (%c)", wev->value - 0x04 + 'a' + shift);
sys/arch/aarch64/aarch64/disasm.c
1009
if (shift == 0) {
sys/arch/aarch64/aarch64/disasm.c
1032
uint64_t sf, uint64_t shift, uint64_t imm12, uint64_t Rn, uint64_t Rd,
sys/arch/aarch64/aarch64/disasm.c
1035
if (shift & 2) {
sys/arch/aarch64/aarch64/disasm.c
1045
SHIFTOP4(shift, "", ", lsl #12", "", ""));
sys/arch/aarch64/aarch64/disasm.c
1052
SHIFTOP4(shift, "", ", lsl #12", "", ""));
sys/arch/aarch64/aarch64/disasm.c
1109
OP5FUNC(op_add_imm, sf, shift, imm12, Rn, Rd)
sys/arch/aarch64/aarch64/disasm.c
1111
if (shift & 2) {
sys/arch/aarch64/aarch64/disasm.c
1126
SHIFTOP2(shift, "", ", lsl #12"));
sys/arch/aarch64/aarch64/disasm.c
1130
OP6FUNC(op_add_shiftreg, sf, shift, Rm, imm6, Rn, Rd)
sys/arch/aarch64/aarch64/disasm.c
1132
if (shift == 3) {
sys/arch/aarch64/aarch64/disasm.c
1136
shiftreg_common(di, pc, insn, sf, shift, Rm, imm6, Rn, Rd,
sys/arch/aarch64/aarch64/disasm.c
1147
OP5FUNC(op_adds_imm, sf, shift, imm12, Rn, Rd)
sys/arch/aarch64/aarch64/disasm.c
1150
addsub_imm_common(di, pc, insn, sf, shift, imm12, Rn, Rd,
sys/arch/aarch64/aarch64/disasm.c
1154
OP6FUNC(op_adds_shiftreg, sf, shift, Rm, imm6, Rn, Rd)
sys/arch/aarch64/aarch64/disasm.c
1156
if (shift == 3) {
sys/arch/aarch64/aarch64/disasm.c
1161
shiftreg_common(di, pc, insn, sf, shift, Rm, imm6, Rn, Rd,
sys/arch/aarch64/aarch64/disasm.c
1196
OP6FUNC(op_and_shiftreg, sf, shift, Rm, imm6, Rn, Rd)
sys/arch/aarch64/aarch64/disasm.c
1198
shiftreg_common(di, pc, insn, sf, shift, Rm, imm6, Rn, Rd,
sys/arch/aarch64/aarch64/disasm.c
1222
OP6FUNC(op_ands_shiftreg, sf, shift, Rm, imm6, Rn, Rd)
sys/arch/aarch64/aarch64/disasm.c
1225
shiftreg_common(di, pc, insn, sf, shift, Rm, imm6, Rn, Rd,
sys/arch/aarch64/aarch64/disasm.c
1445
OP6FUNC(op_bic_shiftreg, sf, shift, Rm, imm6, Rn, Rd)
sys/arch/aarch64/aarch64/disasm.c
1447
shiftreg_common(di, pc, insn, sf, shift, Rm, imm6, Rn, Rd,
sys/arch/aarch64/aarch64/disasm.c
1451
OP6FUNC(op_bics_shiftreg, sf, shift, Rm, imm6, Rn, Rd)
sys/arch/aarch64/aarch64/disasm.c
1453
shiftreg_common(di, pc, insn, sf, shift, Rm, imm6, Rn, Rd,
sys/arch/aarch64/aarch64/disasm.c
1573
OP5FUNC(op_subs_imm, sf, shift, imm12, Rn, Rd)
sys/arch/aarch64/aarch64/disasm.c
1576
addsub_imm_common(di, pc, insn, sf, shift, imm12, Rn, Rd,
sys/arch/aarch64/aarch64/disasm.c
1580
OP6FUNC(op_subs_shiftreg, sf, shift, Rm, imm6, Rn, Rd)
sys/arch/aarch64/aarch64/disasm.c
1582
if (shift == 3) {
sys/arch/aarch64/aarch64/disasm.c
1588
shiftreg_common(di, pc, insn, sf, shift, Rm, imm6, Rn, Rd,
sys/arch/aarch64/aarch64/disasm.c
1676
OP6FUNC(op_eon_shiftreg, sf, shift, Rm, imm6, Rn, Rd)
sys/arch/aarch64/aarch64/disasm.c
1678
shiftreg_common(di, pc, insn, sf, shift, Rm, imm6, Rn, Rd,
sys/arch/aarch64/aarch64/disasm.c
1695
OP6FUNC(op_eor_shiftreg, sf, shift, Rm, imm6, Rn, Rd)
sys/arch/aarch64/aarch64/disasm.c
1697
shiftreg_common(di, pc, insn, sf, shift, Rm, imm6, Rn, Rd,
sys/arch/aarch64/aarch64/disasm.c
1961
OP6FUNC(op_ldr_reg, size, Rm, option, shift, Rn, Rt)
sys/arch/aarch64/aarch64/disasm.c
1963
regoffset_x_common(di, pc, insn, size, Rm, option, shift, Rn, Rt,
sys/arch/aarch64/aarch64/disasm.c
1997
OP5FUNC(op_ldrb_reg, Rm, option, shift, Rn, Rt)
sys/arch/aarch64/aarch64/disasm.c
1999
regoffset_b_common(di, pc, insn, Rm, option, shift, Rn, Rt, "ldrb");
sys/arch/aarch64/aarch64/disasm.c
2032
OP5FUNC(op_ldrh_reg, Rm, option, shift, Rn, Rt)
sys/arch/aarch64/aarch64/disasm.c
2034
regoffset_h_common(di, pc, insn, Rm, option, shift, Rn, Rt, 0, "ldrh");
sys/arch/aarch64/aarch64/disasm.c
2067
OP6FUNC(op_ldrsb_reg, opc, Rm, option, shift, Rn, Rt)
sys/arch/aarch64/aarch64/disasm.c
2069
regoffset_b_common(di, pc, insn, Rm, option, shift, Rn, Rt, "ldrsb");
sys/arch/aarch64/aarch64/disasm.c
2102
OP6FUNC(op_ldrsh_reg, opc, Rm, option, shift, Rn, Rt)
sys/arch/aarch64/aarch64/disasm.c
2104
regoffset_h_common(di, pc, insn, Rm, option, shift, Rn, Rt, opc ^ 1,
sys/arch/aarch64/aarch64/disasm.c
2145
OP5FUNC(op_ldrsw_reg, Rm, option, shift, Rn, Rt)
sys/arch/aarch64/aarch64/disasm.c
2147
regoffset_w_common(di, pc, insn, Rm, option, shift, Rn, Rt, "ldrsw");
sys/arch/aarch64/aarch64/disasm.c
2484
const uint64_t shift = hw * 16;
sys/arch/aarch64/aarch64/disasm.c
2487
~(ZeroExtend(16, imm16, 1) << shift) & mask);
sys/arch/aarch64/aarch64/disasm.c
2491
OP6FUNC(op_orr_reg, sf, shift, Rm, imm6, Rn, Rd)
sys/arch/aarch64/aarch64/disasm.c
2499
shiftreg_common(di, pc, insn, sf, shift, Rm, imm6, Rn, Rd,
sys/arch/aarch64/aarch64/disasm.c
2512
const int shift = hw * 16;
sys/arch/aarch64/aarch64/disasm.c
2516
ZeroExtend(16, imm16, 1), shift);
sys/arch/aarch64/aarch64/disasm.c
2521
ZeroExtend(16, imm16, 1) << shift);
sys/arch/aarch64/aarch64/disasm.c
2528
const int shift = hw * 16;
sys/arch/aarch64/aarch64/disasm.c
2537
ZeroExtend(16, imm16, 1), shift);
sys/arch/aarch64/aarch64/disasm.c
2608
OP6FUNC(op_orn, sf, shift, Rm, imm6, Rn, Rd)
sys/arch/aarch64/aarch64/disasm.c
2611
shiftreg_common(di, pc, insn, sf, shift, Rm, imm6, Rn, Rd,
sys/arch/aarch64/aarch64/disasm.c
2615
OP6FUNC(op_sub_shiftreg, sf, shift, Rm, imm6, Rn, Rd)
sys/arch/aarch64/aarch64/disasm.c
2618
shiftreg_common(di, pc, insn, sf, shift, Rm, imm6, Rn, Rd,
sys/arch/aarch64/aarch64/disasm.c
2673
OP5FUNC(op_prfm_reg, Rm, option, shift, Rn, Rt)
sys/arch/aarch64/aarch64/disasm.c
2682
if (shift == 0) {
sys/arch/aarch64/aarch64/disasm.c
2948
OP6FUNC(op_str_reg, size, Rm, option, shift, Rn, Rt)
sys/arch/aarch64/aarch64/disasm.c
2950
regoffset_x_common(di, pc, insn, size, Rm, option, shift, Rn, Rt,
sys/arch/aarch64/aarch64/disasm.c
2984
OP5FUNC(op_strb_reg, Rm, option, shift, Rn, Rt)
sys/arch/aarch64/aarch64/disasm.c
2986
regoffset_b_common(di, pc, insn, Rm, option, shift, Rn, Rt, "strb");
sys/arch/aarch64/aarch64/disasm.c
3019
OP5FUNC(op_strh_reg, Rm, option, shift, Rn, Rt)
sys/arch/aarch64/aarch64/disasm.c
3021
regoffset_h_common(di, pc, insn, Rm, option, shift, Rn, Rt, 0, "strh");
sys/arch/aarch64/aarch64/disasm.c
3146
OP5FUNC(op_sub_imm, sf, shift, imm12, Rn, Rd)
sys/arch/aarch64/aarch64/disasm.c
3148
if (shift & 2) {
sys/arch/aarch64/aarch64/disasm.c
3157
SHIFTOP2(shift, "", ", lsl #12"));
sys/arch/aarch64/aarch64/disasm.c
784
DecodeShift(uint64_t shift)
sys/arch/aarch64/aarch64/disasm.c
786
return SHIFTOP4(shift, "lsl", "lsr", "asr", "ror");
sys/arch/aarch64/aarch64/disasm.c
842
uint64_t sf, uint64_t shift, uint64_t Rm, uint64_t imm6,
sys/arch/aarch64/aarch64/disasm.c
869
PRINTF(", %s #%u", DecodeShift(shift), (u_int)imm6);
sys/arch/aarch64/aarch64/disasm.c
890
uint64_t Rm, uint64_t option, uint64_t shift, uint64_t Rn, uint64_t Rt,
sys/arch/aarch64/aarch64/disasm.c
900
if (shift == 0) {
sys/arch/aarch64/aarch64/disasm.c
922
uint64_t Rm, uint64_t option, uint64_t shift, uint64_t Rn, uint64_t Rt,
sys/arch/aarch64/aarch64/disasm.c
932
if ((shift == 0) && (option == 3)) {
sys/arch/aarch64/aarch64/disasm.c
938
} else if (shift == 0) {
sys/arch/aarch64/aarch64/disasm.c
954
(u_int)shift);
sys/arch/aarch64/aarch64/disasm.c
960
uint64_t Rm, uint64_t option, uint64_t shift, uint64_t Rn, uint64_t Rt,
sys/arch/aarch64/aarch64/disasm.c
970
if ((shift == 0) && (option == 3)) {
sys/arch/aarch64/aarch64/disasm.c
976
} else if (shift == 0) {
sys/arch/aarch64/aarch64/disasm.c
992
(u_int)shift * 2);
sys/arch/aarch64/aarch64/disasm.c
998
uint64_t size, uint64_t Rm, uint64_t option, uint64_t shift,
sys/arch/aarch64/aarch64/kobj_machdep.c
130
uint32_t *insn, immhi, immlo, shift;
sys/arch/aarch64/aarch64/kobj_machdep.c
227
shift = 0;
sys/arch/aarch64/aarch64/kobj_machdep.c
230
shift = 1;
sys/arch/aarch64/aarch64/kobj_machdep.c
233
shift = 2;
sys/arch/aarch64/aarch64/kobj_machdep.c
236
shift = 3;
sys/arch/aarch64/aarch64/kobj_machdep.c
250
if (checkalign(val, 1 << shift, where, off)) {
sys/arch/aarch64/aarch64/kobj_machdep.c
255
val >>= shift;
sys/arch/acorn32/podulebus/podulebus.c
554
podulebus_shift_tag(bus_space_tag_t tag, u_int shift, bus_space_tag_t *tagp)
sys/arch/acorn32/podulebus/podulebus.c
566
(*tagp)->bs_cookie = (void *)shift;
sys/arch/amiga/amiga/cc.h
99
#define BLT_SHIFT_MASK(shift) (0xf&shift)
sys/arch/arc/dev/pccons.c
1787
capchar[0] = scan_codes[dt].shift[0];
sys/arch/arc/dev/pccons.c
1804
more_chars = scan_codes[dt].shift;
sys/arch/arc/dev/pccons.c
1816
more_chars = scan_codes[dt].shift;
sys/arch/arc/dev/pccons.c
777
map[i].shift[KB_CODE_SIZE-1] ||
sys/arch/arc/include/pccons.h
33
char shift[KB_CODE_SIZE];
sys/arch/arm/altera/cycv_clkmgr.c
263
clk->u.div.shift = 0;
sys/arch/arm/altera/cycv_clkmgr.c
272
clk->u.div.shift = of_decode_int(buf + 4);
sys/arch/arm/altera/cycv_clkmgr.c
274
clk->u.div.shift;
sys/arch/arm/altera/cycv_clkmgr.c
397
tmp = (tmp & clk->u.div.mask) >> clk->u.div.shift;
sys/arch/arm/altera/cycv_clkmgr.c
488
divisor = (divisor & clk->u.div.mask) >> clk->u.div.shift;
sys/arch/arm/altera/cycv_clkmgr.c
84
int shift;
sys/arch/arm/arm/cpufunc.c
2259
int shift;
sys/arch/arm/arm/cpufunc.c
2273
shift = (fault_instruction >> 7) & 0x1f;
sys/arch/arm/arm/cpufunc.c
2279
shift = ((fault_instruction >> 8) & 0xf);
sys/arch/arm/arm/cpufunc.c
2280
if (base == shift)
sys/arch/arm/arm/cpufunc.c
2282
DFC_PRINTF(("shift reg=%d ", shift));
sys/arch/arm/arm/cpufunc.c
2283
shift = registers[shift];
sys/arch/arm/arm/cpufunc.c
2285
DFC_PRINTF(("shift=%08x ", shift));
sys/arch/arm/arm/cpufunc.c
2288
offset = (int)(((u_int)offset) << shift);
sys/arch/arm/arm/cpufunc.c
2291
if (shift == 0) shift = 32;
sys/arch/arm/arm/cpufunc.c
2292
offset = (int)(((u_int)offset) >> shift);
sys/arch/arm/arm/cpufunc.c
2295
if (shift == 0) shift = 32;
sys/arch/arm/arm/cpufunc.c
2296
offset = (int)(((int)offset) >> shift);
sys/arch/arm/arm32/db_machdep.c
333
const u_int shift = (size & 1)
sys/arch/arm/arm32/db_machdep.c
338
+ (va_index << shift);
sys/arch/arm/broadcom/bcm2835_gpio.c
778
const u_int shift = (pin % BCM2835_GPIO_GPFSEL_PINS_PER_REGISTER) *
sys/arch/arm/broadcom/bcm2835_gpio.c
787
if (((v >> shift) & mask) == func) {
sys/arch/arm/broadcom/bcm2835_gpio.c
794
v &= ~(mask << shift);
sys/arch/arm/broadcom/bcm2835_gpio.c
795
v |= (func << shift);
sys/arch/arm/broadcom/bcm2835_gpio.c
805
const u_int shift = (pin % BCM2835_GPIO_GPFSEL_PINS_PER_REGISTER) *
sys/arch/arm/broadcom/bcm2835_gpio.c
811
return ((v >> shift) & mask);
sys/arch/arm/imx/imx51_ipuv3.c
806
int shift = (name >> 8) & 0xff;
sys/arch/arm/imx/imx51_ipuv3.c
811
index += shift / 32;
sys/arch/arm/imx/imx51_ipuv3.c
812
shift = shift % 32;
sys/arch/arm/imx/imx51_ipuv3.c
814
params[index] |= val << shift;
sys/arch/arm/imx/imx51_ipuv3.c
815
shift = 32 - shift;
sys/arch/arm/imx/imx51_ipuv3.c
817
if (width > shift)
sys/arch/arm/imx/imx51_ipuv3.c
818
params[index+1] |= val >> shift;
sys/arch/arm/imx/imx51_ipuv3reg.h
743
#define __IDMA_PARAM(word, shift, size) \
sys/arch/arm/imx/imx51_ipuv3reg.h
744
((((word) & 0xff) << 16) | (((shift) & 0xff) << 8) | ((size) & 0xff))
sys/arch/arm/marvell/mvsocgpp.c
187
(sc->sc_pic + j)->shift = (j & 3) * 8;
sys/arch/arm/marvell/mvsocgpp.c
249
irq_mask = irq_mask << mvsocgpp_pic->shift;
sys/arch/arm/marvell/mvsocgpp.c
272
irq_mask = irq_mask << mvsocgpp_pic->shift;
sys/arch/arm/marvell/mvsocgpp.c
288
pending &= (0xff << mvsocgpp_pic->shift);
sys/arch/arm/marvell/mvsocgpp.c
291
pending = pending >> mvsocgpp_pic->shift;
sys/arch/arm/marvell/mvsocgpp.c
74
int shift;
sys/arch/arm/nxp/imx6_iomux.c
97
uint8_t shift = __SHIFTOUT(input_val, __BITS(23, 16));
sys/arch/arm/nxp/imx6_iomux.c
98
uint32_t mask = __BITS(shift + (width - 1), shift);
sys/arch/arm/rockchip/rk_cru.c
66
const u_int shift = reset_id % 16;
sys/arch/arm/rockchip/rk_cru.c
68
CRU_WRITE(sc, reg, (1 << (shift + 16)) | (1 << shift));
sys/arch/arm/rockchip/rk_cru.c
79
const u_int shift = reset_id % 16;
sys/arch/arm/rockchip/rk_cru.c
81
CRU_WRITE(sc, reg, (1 << (shift + 16)) | (0 << shift));
sys/arch/arm/sunxi/sun4i_a10_codec.c
153
u_int val, shift;
sys/arch/arm/sunxi/sun4i_a10_codec.c
161
shift = 8 - fls32(__SHIFTOUT_MASK(mix->mask));
sys/arch/arm/sunxi/sun4i_a10_codec.c
162
nvol = mc->un.value.level[AUDIO_MIXER_LEVEL_LEFT] >> shift;
sys/arch/arm/sunxi/sun4i_a10_codec.c
176
u_int val, shift;
sys/arch/arm/sunxi/sun4i_a10_codec.c
184
shift = 8 - fls32(__SHIFTOUT_MASK(mix->mask));
sys/arch/arm/sunxi/sun4i_a10_codec.c
185
nvol = __SHIFTOUT(val, mix->mask) << shift;
sys/arch/arm/sunxi/sun50i_a64_acodec.c
281
u_int val, shift;
sys/arch/arm/sunxi/sun50i_a64_acodec.c
297
shift = 8 - fls32(__SHIFTOUT_MASK(mix->mask));
sys/arch/arm/sunxi/sun50i_a64_acodec.c
298
nvol = mc->un.value.level[AUDIO_MIXER_LEVEL_LEFT] >> shift;
sys/arch/arm/sunxi/sun50i_a64_acodec.c
370
u_int val, shift;
sys/arch/arm/sunxi/sun50i_a64_acodec.c
386
shift = 8 - fls32(__SHIFTOUT_MASK(mix->mask));
sys/arch/arm/sunxi/sun50i_a64_acodec.c
387
nvol = __SHIFTOUT(val, mix->mask) << shift;
sys/arch/arm/sunxi/sun6i_a31_codec.c
214
u_int val, shift;
sys/arch/arm/sunxi/sun6i_a31_codec.c
222
shift = 8 - fls32(__SHIFTOUT_MASK(mix->mask));
sys/arch/arm/sunxi/sun6i_a31_codec.c
223
nvol = mc->un.value.level[AUDIO_MIXER_LEVEL_LEFT] >> shift;
sys/arch/arm/sunxi/sun6i_a31_codec.c
237
u_int val, shift;
sys/arch/arm/sunxi/sun6i_a31_codec.c
245
shift = 8 - fls32(__SHIFTOUT_MASK(mix->mask));
sys/arch/arm/sunxi/sun6i_a31_codec.c
246
nvol = __SHIFTOUT(val, mix->mask) << shift;
sys/arch/arm/sunxi/sun8i_h3_codec.c
285
u_int val, shift;
sys/arch/arm/sunxi/sun8i_h3_codec.c
297
shift = 8 - fls32(__SHIFTOUT_MASK(mix->mask));
sys/arch/arm/sunxi/sun8i_h3_codec.c
298
nvol = mc->un.value.level[AUDIO_MIXER_LEVEL_LEFT] >> shift;
sys/arch/arm/sunxi/sun8i_h3_codec.c
318
u_int val, shift;
sys/arch/arm/sunxi/sun8i_h3_codec.c
330
shift = 8 - fls32(__SHIFTOUT_MASK(mix->mask));
sys/arch/arm/sunxi/sun8i_h3_codec.c
331
nvol = __SHIFTOUT(val, mix->mask) << shift;
sys/arch/arm/sunxi/sun8i_v3s_codec.c
270
u_int val, shift;
sys/arch/arm/sunxi/sun8i_v3s_codec.c
279
shift = 8 - fls32(__SHIFTOUT_MASK(mix->mask));
sys/arch/arm/sunxi/sun8i_v3s_codec.c
280
nvol = mc->un.value.level[AUDIO_MIXER_LEVEL_LEFT] >> shift;
sys/arch/arm/sunxi/sun8i_v3s_codec.c
300
u_int val, shift;
sys/arch/arm/sunxi/sun8i_v3s_codec.c
309
shift = 8 - fls32(__SHIFTOUT_MASK(mix->mask));
sys/arch/arm/sunxi/sun8i_v3s_codec.c
310
nvol = __SHIFTOUT(val, mix->mask) << shift;
sys/arch/arm/sunxi/sunxi_debe.c
445
u_int index, count, shift, off, pcnt;
sys/arch/arm/sunxi/sunxi_debe.c
509
shift = (pcnt & 0xf) * 2;
sys/arch/arm/sunxi/sunxi_debe.c
512
val &= ~(3 << shift);
sys/arch/arm/sunxi/sunxi_debe.c
513
val |= (idx << shift);
sys/arch/arm/sunxi/sunxi_nand.c
417
const u_int shift = (chip->chip_addr_count & 3) * 8;
sys/arch/arm/sunxi/sunxi_nand.c
421
chip->chip_addr[index] |= ((uint32_t)address << shift);
sys/arch/arm/ti/ti_gate_clock.c
107
u_int shift;
sys/arch/arm/ti/ti_gate_clock.c
124
if (of_getprop_uint32(phandle, "ti,bit-shift", &shift) != 0)
sys/arch/arm/ti/ti_gate_clock.c
125
shift = 0;
sys/arch/arm/ti/ti_gate_clock.c
127
sc->sc_shift = shift;
sys/arch/arm/ti/ti_mux_clock.c
108
u_int shift;
sys/arch/arm/ti/ti_mux_clock.c
131
if (of_getprop_uint32(phandle, "ti,bit-shift", &shift) != 0)
sys/arch/arm/ti/ti_mux_clock.c
132
shift = 0;
sys/arch/arm/ti/ti_mux_clock.c
134
sc->sc_mask = (sc->sc_nparent - 1) << shift;
sys/arch/atari/atari/atari_init.c
1323
int shift, i;
sys/arch/atari/atari/atari_init.c
1328
shift = SG_ISHIFT;
sys/arch/atari/atari/atari_init.c
1336
printf("$%08x: $%08x\t", i << shift, *s & SG_FRAME);
sys/arch/atari/vme/if_le_vme.c
522
int shift;
sys/arch/atari/vme/if_le_vme.c
529
for (shift = 9; shift >= 0; shift--) {
sys/arch/atari/vme/if_le_vme.c
530
if (((bits >> shift) & 1) == 1)
sys/arch/atari/vme/if_le_vme.c
544
for (shift = 15; shift >= 0; shift--) {
sys/arch/atari/vme/if_le_vme.c
549
data |= (bus_space_read_2(iot, ioh, BVME410_BAR) & 1) << shift;
sys/arch/bebox/stand/boot/kbd.c
138
chr = shift[dt];
sys/arch/dreamcast/dev/maple/mkbd.c
267
v = sc->sc_condition.shift & ~kbddata->shift;
sys/arch/dreamcast/dev/maple/mkbd.c
273
v = kbddata->shift & ~sc->sc_condition.shift;
sys/arch/dreamcast/dev/maple/mkbdvar.h
34
uint8_t shift;
sys/arch/evbarm/dev/plcom.c
291
const size_t shift = 8 * (o & 3);
sys/arch/evbarm/dev/plcom.c
294
tmp = (val << shift) | (tmp & ~(0xff << shift));
sys/arch/evbarm/dev/plcom.c
305
const size_t shift = 8 * (o & 3);
sys/arch/evbarm/dev/plcom.c
308
tmp = (val << shift) | (tmp & ~(0xffff << shift));
sys/arch/evbarm/g42xxeb/gb225_pcic.c
318
int shift, save;
sys/arch/evbarm/g42xxeb/gb225_pcic.c
332
shift = 4 * !so->ss.socket;
sys/arch/evbarm/g42xxeb/gb225_pcic.c
335
*p = (*p & ~(0x0f << shift)) | ((CARDPOW_VPPVCC | (arg<<2)) << shift);
sys/arch/evbarm/gumstix/gxpcic.c
290
u_int shift = 0, gpio;
sys/arch/evbarm/gumstix/gxpcic.c
295
result |= ((gpio & GPIO_SET) == GPIO_SET) << shift;
sys/arch/evbarm/gumstix/gxpcic.c
296
shift++;
sys/arch/evbmips/alchemy/dbau1550.c
259
int shift;
sys/arch/evbmips/alchemy/dbau1550.c
265
shift = DBAU1550_PCMCIA_PC0_SHIFT;
sys/arch/evbmips/alchemy/dbau1550.c
269
shift = DBAU1550_PCMCIA_PC1_SHIFT;
sys/arch/evbmips/alchemy/dbau1550.c
294
status &= ~(DBAU1550_PCMCIA_MASK << shift);
sys/arch/evbmips/alchemy/dbau1550.c
296
status |= vcc << shift;
sys/arch/evbmips/alchemy/dbau1550.c
297
status |= vpp << shift;
sys/arch/evbmips/alchemy/dbau1550.c
303
status |= (DBAU1550_PCMCIA_DRV_EN << shift);
sys/arch/evbmips/alchemy/dbau1550.c
309
status |= (DBAU1550_PCMCIA_RST << shift);
sys/arch/ews4800mips/stand/common/cons_zskbd.c
129
zskbd.shift = map_shift;
sys/arch/ews4800mips/stand/common/cons_zskbd.c
228
return *(zskbd.shift + c);
sys/arch/ews4800mips/stand/common/console.h
92
const uint8_t *shift;
sys/arch/hpc/stand/hpcboot/memory.cpp
250
Console *&cons, size_t pagesize, int shift)
sys/arch/hpc/stand/hpcboot/memory.cpp
255
_shift = shift;
sys/arch/hpc/stand/hpcboot/mips/mips_boot.cpp
111
shift = 0;
sys/arch/hpc/stand/hpcboot/mips/mips_boot.cpp
119
shift = 4; // VR41 specific shift. for LockPages()
sys/arch/hpc/stand/hpcboot/mips/mips_boot.cpp
143
_cons, pagesz, shift);
sys/arch/hpc/stand/hpcboot/mips/mips_boot.cpp
86
int shift;
sys/arch/hpc/stand/hpcboot/sh3/dev/sh_dev.cpp
167
(_reg_read_2(tab->reg) >> tab->shift) & SH_IPR_MASK));
sys/arch/hpc/stand/hpcboot/sh3/dev/sh_dev.h
44
int shift;
sys/arch/hpcmips/dev/plumpcmcia.c
597
int shift;
sys/arch/hpcmips/dev/plumpcmcia.c
622
shift = win == 0 ? PLUM_PCMCIA_IOWINCTRL_WIN0SHIFT :
sys/arch/hpcmips/dev/plumpcmcia.c
625
reg &= ~(PLUM_PCMCIA_IOWINCTRL_WINMASK << shift);
sys/arch/hpcmips/dev/plumpcmcia.c
627
PLUM_PCMCIA_IOWINCTRL_ZEROWAIT) << shift);
sys/arch/hppa/spmath/dbl_float.h
371
#define Dbl_right_align(srcdstA,srcdstB,shift,extent) \
sys/arch/hppa/spmath/dbl_float.h
372
if( shift >= 32 ) \
sys/arch/hppa/spmath/dbl_float.h
376
if(shift < 64) \
sys/arch/hppa/spmath/dbl_float.h
378
if(shift > 32) \
sys/arch/hppa/spmath/dbl_float.h
381
shift-32, Extall(extent)); \
sys/arch/hppa/spmath/dbl_float.h
382
if(Dallp2(srcdstB) << (64 - (shift))) Ext_setone_low(extent); \
sys/arch/hppa/spmath/dbl_float.h
385
Dallp2(srcdstB) = Dallp1(srcdstA) >> (shift - 32); \
sys/arch/hppa/spmath/dbl_float.h
398
if (shift > 0) \
sys/arch/hppa/spmath/dbl_float.h
400
Extall(extent) = Dallp2(srcdstB) << (32 - (shift)); \
sys/arch/hppa/spmath/dbl_float.h
401
Variable_shift_double(Dallp1(srcdstA),Dallp2(srcdstB),shift, \
sys/arch/hppa/spmath/dbl_float.h
403
Dallp1(srcdstA) >>= shift; \
sys/arch/hppa/spmath/dbl_float.h
412
#define Dbl_fix_overshift(srcdstA,srcdstB,shift,extent) \
sys/arch/hppa/spmath/dbl_float.h
413
Extall(extent) = Dallp2(srcdstB) << (32 - (shift)); \
sys/arch/hppa/spmath/dbl_float.h
414
Dallp2(srcdstB) = (Dallp1(srcdstA) << (32 - (shift))) | \
sys/arch/hppa/spmath/dbl_float.h
415
(Dallp2(srcdstB) >> (shift)); \
sys/arch/hppa/spmath/dbl_float.h
416
Dallp1(srcdstA) = Dallp1(srcdstA) >> shift
sys/arch/hppa/spmath/sgl_float.h
240
#define Sgl_right_align(srcdst,shift,extent) \
sys/arch/hppa/spmath/sgl_float.h
242
if (shift < 32) { \
sys/arch/hppa/spmath/sgl_float.h
243
Extall(extent) = Sall(srcdst) << (32-(shift)); \
sys/arch/hppa/spmath/sgl_float.h
244
Sall(srcdst) >>= shift; \
sys/arch/i386/pci/ali1543.c
205
int shift, val;
sys/arch/i386/pci/ali1543.c
213
shift = ALI1543_INTR_PIRQ_SHIFT(clink);
sys/arch/i386/pci/ali1543.c
214
reg &= ~(0x0f << shift);
sys/arch/i386/pci/ali1543.c
215
reg |= (ali1543_intr_shuffle_set[irq] << shift);
sys/arch/i386/pci/elan520.c
1268
int pin, reg, shift;
sys/arch/i386/pci/elan520.c
1374
shift = pin % 16;
sys/arch/i386/pci/elan520.c
1376
if ((data & (1 << shift)) == 0)
sys/arch/i386/pci/elan520.c
1496
int reg, shift;
sys/arch/i386/pci/elan520.c
1500
shift = pin % 16;
sys/arch/i386/pci/elan520.c
1506
return ((data >> shift) & 0x1);
sys/arch/i386/pci/elan520.c
1513
int reg, shift;
sys/arch/i386/pci/elan520.c
1517
shift = pin % 16;
sys/arch/i386/pci/elan520.c
1522
data &= ~(1 << shift);
sys/arch/i386/pci/elan520.c
1524
data |= (1 << shift);
sys/arch/i386/pci/elan520.c
1534
int reg, shift;
sys/arch/i386/pci/elan520.c
1538
shift = pin % 16;
sys/arch/i386/pci/elan520.c
1542
data &= ~(1 << shift);
sys/arch/i386/pci/elan520.c
1544
data |= (1 << shift);
sys/arch/i386/pci/gscpcib.c
202
int reg, shift;
sys/arch/i386/pci/gscpcib.c
206
shift = pin % 32;
sys/arch/i386/pci/gscpcib.c
209
return ((data >> shift) & 0x1);
sys/arch/i386/pci/gscpcib.c
216
int reg, shift;
sys/arch/i386/pci/gscpcib.c
220
shift = pin % 32;
sys/arch/i386/pci/gscpcib.c
223
data &= ~(1 << shift);
sys/arch/i386/pci/gscpcib.c
225
data |= (1 << shift);
sys/arch/i386/pci/opti82c558.c
174
int shift;
sys/arch/i386/pci/opti82c558.c
181
shift = VIPER_PIRQ_SELECT_SHIFT * clink;
sys/arch/i386/pci/opti82c558.c
182
reg &= ~(VIPER_PIRQ_SELECT_MASK << shift);
sys/arch/i386/pci/opti82c558.c
183
reg |= (viper_pirq_encode[irq] << shift);
sys/arch/i386/pci/opti82c558.c
214
int shift;
sys/arch/i386/pci/opti82c558.c
223
shift = (VIPER_CFG_TRIGGER_SHIFT + viper_pirq_encode[irq]);
sys/arch/i386/pci/opti82c558.c
225
reg |= (1 << shift);
sys/arch/i386/pci/opti82c558.c
227
reg &= ~(1 << shift);
sys/arch/i386/pci/piix.c
234
int shift;
sys/arch/i386/pci/piix.c
245
shift = clink << 3;
sys/arch/i386/pci/piix.c
246
if ((reg >> shift) & PIIX_CFG_PIRQ_NONE)
sys/arch/i386/pci/piix.c
258
int shift;
sys/arch/i386/pci/piix.c
269
shift = clink << 3;
sys/arch/i386/pci/piix.c
270
reg &= ~((PIIX_CFG_PIRQ_NONE | PIIX_CFG_PIRQ_MASK) << shift);
sys/arch/i386/pci/piix.c
271
reg |= irq << shift;
sys/arch/i386/pci/sis85c503.c
150
int shift;
sys/arch/i386/pci/sis85c503.c
158
shift = SIS85C503_CFG_PIRQ_SHIFT(clink);
sys/arch/i386/pci/sis85c503.c
160
SIS85C503_CFG_PIRQ_INTR_MASK) << shift);
sys/arch/i386/pci/sis85c503.c
161
reg |= (irq << shift);
sys/arch/i386/pci/via82c586.c
174
int shift, val;
sys/arch/i386/pci/via82c586.c
182
shift = vp3_cfg_intr_shift[clink];
sys/arch/i386/pci/via82c586.c
183
reg &= ~(VP3_CFG_INTR_MASK << shift);
sys/arch/i386/pci/via82c586.c
184
reg |= (irq << shift);
sys/arch/i386/pci/via82c586.c
228
int i, pciirq, shift, testtrig;
sys/arch/i386/pci/via82c586.c
239
shift = vp3_cfg_trigger_shift[i];
sys/arch/i386/pci/via82c586.c
241
reg &= ~(VP3_CFG_TRIGGER_MASK << shift);
sys/arch/i386/pci/via82c586.c
243
reg |= (VP3_CFG_TRIGGER_EDGE << shift);
sys/arch/macppc/dev/akbd.c
516
static int shift;
sys/arch/macppc/dev/akbd.c
532
shift = 0;
sys/arch/macppc/dev/akbd.c
535
if (shift == 0) {
sys/arch/macppc/dev/akbd.c
537
shift = 1;
sys/arch/macppc/dev/akbd.c
540
shift = 0;
sys/arch/macppc/dev/obio.c
928
int shift;
sys/arch/macppc/dev/obio.c
930
shift = (3 - which) * 8;
sys/arch/macppc/dev/obio.c
931
mask = 0xff << shift;
sys/arch/macppc/dev/obio.c
933
return (reg & mask) >> shift;
sys/arch/macppc/dev/obio.c
940
int shift;
sys/arch/macppc/dev/obio.c
942
shift = (3 - which) * 8;
sys/arch/macppc/dev/obio.c
943
mask = 0xff << shift;
sys/arch/macppc/dev/obio.c
946
reg |= (pwm & 0xff) << shift;
sys/arch/macppc/dev/smusat.c
176
sensor->shift = 10;
sys/arch/macppc/dev/smusat.c
179
sensor->shift = 8;
sys/arch/macppc/dev/smusat.c
182
sensor->shift = 4;
sys/arch/macppc/dev/smusat.c
185
sensor->shift = 0;
sys/arch/macppc/dev/smusat.c
370
sensor->current_value <<= sensor->shift;
sys/arch/macppc/dev/smusat.c
65
int shift;
sys/arch/mips/include/cpuregs.h
386
#define MIPS3_CONFIG_CACHE_SIZE(config, mask, base, shift) \
sys/arch/mips/include/cpuregs.h
387
((base) << (((config) & (mask)) >> (shift)))
sys/arch/mips/include/cpuregs.h
457
#define MIPS4_CONFIG_CACHE_SIZE(config, mask, base, shift) \
sys/arch/mips/include/cpuregs.h
458
((base) << (((config) & (mask)) >> (shift)))
sys/arch/mips/mips/bus_space_alignstride_chipdep.c
704
const int shift = (h & (CHIP_ACCESS_SIZE - 1)) * 8;
sys/arch/mips/mips/bus_space_alignstride_chipdep.c
715
const uint8_t r = (uint8_t)(CHIP_SWAP_ACCESS(val) >> shift);
sys/arch/mips/mips/bus_space_alignstride_chipdep.c
726
const int shift = (h & (CHIP_ACCESS_SIZE - 1)) * 8;
sys/arch/mips/mips/bus_space_alignstride_chipdep.c
735
const uint16_t r = (uint16_t)CHIP_SWAP16(val >> shift);
sys/arch/mips/mips/bus_space_alignstride_chipdep.c
746
const int shift = (h & (CHIP_ACCESS_SIZE - 1)) * 8;
sys/arch/mips/mips/bus_space_alignstride_chipdep.c
753
const uint32_t r = (uint32_t)CHIP_SWAP32(val >> shift);
sys/arch/mips/mips/bus_space_alignstride_chipdep.c
764
const int shift = (h & (CHIP_ACCESS_SIZE - 1)) * 8;
sys/arch/mips/mips/bus_space_alignstride_chipdep.c
766
const uint64_t r = CHIP_SWAP64(mips3_ld(h) >> shift);
sys/arch/mips/mips/bus_space_alignstride_chipdep.c
817
const int shift = (h & (CHIP_ACCESS_SIZE - 1)) * 8;
sys/arch/mips/mips/bus_space_alignstride_chipdep.c
819
CHIP_TYPE cval = CHIP_SWAP_ACCESS(((CHIP_TYPE)val) << shift);
sys/arch/mips/mips/bus_space_alignstride_chipdep.c
840
const int shift = (h & (CHIP_ACCESS_SIZE - 1)) * 8;
sys/arch/mips/mips/bus_space_alignstride_chipdep.c
842
CHIP_TYPE cval = ((CHIP_TYPE)CHIP_SWAP16(val)) << shift;
sys/arch/mips/mips/bus_space_alignstride_chipdep.c
861
const int shift = (h & (CHIP_ACCESS_SIZE - 1)) * 8;
sys/arch/mips/mips/bus_space_alignstride_chipdep.c
863
mips3_sd(h, ((CHIP_TYPE)CHIP_SWAP32(val)) << shift);
sys/arch/mips/mips/mips_emul.c
1062
uint32_t a, x, shift;
sys/arch/mips/mips/mips_emul.c
1081
shift = (3 - (vaddr & 3)) * 8;
sys/arch/mips/mips/mips_emul.c
1082
x >>= shift;
sys/arch/mips/mips/mips_emul.c
1083
a &= ~(0xFFFFFFFFUL >> shift);
sys/arch/mips/mips/mips_emul.c
1098
uint32_t a, x, shift;
sys/arch/mips/mips/mips_emul.c
1117
shift = (vaddr & 3) * 8;
sys/arch/mips/mips/mips_emul.c
1118
x <<= shift;
sys/arch/mips/mips/mips_emul.c
1119
a &= ~(0xFFFFFFFFUL << shift);
sys/arch/mips/mips/mips_emul.c
1159
uint32_t shift;
sys/arch/mips/mips/mips_emul.c
1178
shift = (7 - (vaddr & 7)) * 8;
sys/arch/mips/mips/mips_emul.c
1179
x >>= shift;
sys/arch/mips/mips/mips_emul.c
1180
a &= ~(~(uint64_t)0U >> shift);
sys/arch/mips/mips/mips_emul.c
1196
uint32_t shift;
sys/arch/mips/mips/mips_emul.c
1215
shift = (vaddr & 7) * 8;
sys/arch/mips/mips/mips_emul.c
1216
x <<= shift;
sys/arch/mips/mips/mips_emul.c
1217
a &= ~(~(uint64_t)0U << shift);
sys/arch/mips/mips/mips_emul.c
808
uint32_t a, x, shift;
sys/arch/mips/mips/mips_emul.c
827
shift = (3 - (vaddr & 0x00000003)) * 8;
sys/arch/mips/mips/mips_emul.c
828
a <<= shift;
sys/arch/mips/mips/mips_emul.c
829
x &= ~(0xFFFFFFFFUL << shift);
sys/arch/mips/mips/mips_emul.c
841
uint32_t a, x, shift;
sys/arch/mips/mips/mips_emul.c
860
shift = (vaddr & 0x00000003) * 8;
sys/arch/mips/mips/mips_emul.c
861
a >>= shift;
sys/arch/mips/mips/mips_emul.c
862
x &= ~(0xFFFFFFFFUL >> shift);
sys/arch/mips/mips/mips_emul.c
925
uint32_t shift;
sys/arch/mips/mips/mips_emul.c
944
shift = (7 - (vaddr & 0x7)) * 8;
sys/arch/mips/mips/mips_emul.c
945
a <<= shift;
sys/arch/mips/mips/mips_emul.c
946
x &= ~(~(uint64_t)0UL << shift);
sys/arch/mips/mips/mips_emul.c
959
uint32_t shift;
sys/arch/mips/mips/mips_emul.c
978
shift = (vaddr & 0x7) * 8;
sys/arch/mips/mips/mips_emul.c
979
a >>= shift;
sys/arch/mips/mips/mips_emul.c
980
x &= ~(~(uint64_t)0UL >> shift);
sys/arch/mips/rmi/rmixl_com.c
202
u_int shift = sizeof(val) * 8; \
sys/arch/mips/rmi/rmixl_com.c
206
shift -= 4; \
sys/arch/mips/rmi/rmixl_com.c
207
rmixl_putchar(hexc[(val >> shift) & 0xf]); \
sys/arch/mips/rmi/rmixl_com.c
208
} while(shift != 0)
sys/arch/mipsco/mipsco/bus_space.c
67
mipsco_bus_space_set_aligned_stride(bus_space_tag_t bst, unsigned int shift)
sys/arch/mipsco/mipsco/bus_space.c
70
bst->bs_stride = shift;
sys/arch/mipsco/mipsco/bus_space.c
72
if (shift == 2) { /* XXX Assumes Big Endian & 4B */
sys/arch/powerpc/booke/dev/pq3gpio.c
121
const size_t shift = gc->gc_pins[num].pin_num ^ 31;
sys/arch/powerpc/booke/dev/pq3gpio.c
135
uint64_t new_dir = (old_dir & (3ULL << (2 * shift)))
sys/arch/powerpc/booke/dev/pq3gpio.c
136
| ((uint64_t)dir << (2 * shift));
sys/arch/powerpc/booke/dev/pq3gpio.c
152
uint32_t odr_mask = 1UL << shift;
sys/arch/powerpc/fpu/fpu_emu.c
309
int exp, shift;
sys/arch/powerpc/fpu/fpu_emu.c
325
shift = - 126 - exp; /* 1 ... 23 */
sys/arch/powerpc/fpu/fpu_emu.c
326
frac = __SHIFTOUT(__BIT(52) | reg, __BITS(52, 29 + shift));
sys/arch/prep/stand/boot/kbd.c
138
chr = shift[dt];
sys/arch/prep/stand/boot/vreset.c
273
set_text_clut(int shift)
sys/arch/prep/stand/boot/vreset.c
283
outb(0x3c9, vga_dacpal[i++] << shift);
sys/arch/prep/stand/boot/vreset.c
284
outb(0x3c9, vga_dacpal[i++] << shift);
sys/arch/prep/stand/boot/vreset.c
285
outb(0x3c9, vga_dacpal[i++] << shift);
sys/arch/riscv/starfive/jh7100_pinctrl.c
130
const u_int shift = PAD_SHIFT(pad_no);
sys/arch/riscv/starfive/jh7100_pinctrl.c
131
const uint32_t regmask = mask << shift;
sys/arch/riscv/starfive/jh7100_pinctrl.c
132
const uint32_t regval = val << shift;
sys/arch/riscv/starfive/jh7110_pinctrl.c
333
const u_int shift = 8 * (pin_no % 4);
sys/arch/riscv/starfive/jh7110_pinctrl.c
334
const uint32_t dout_mask = jpd->jpd_dout_mask << shift;
sys/arch/riscv/starfive/jh7110_pinctrl.c
335
const uint32_t doen_mask = jpd->jpd_doen_mask << shift;
sys/arch/riscv/starfive/jh7110_pinctrl.c
669
const u_int shift = bits_per_pin * (pin_no % pins_per_bank);
sys/arch/riscv/starfive/jh7110_pinctrl.c
670
const uint32_t mask = sc->sc_jpd->jpd_dout_mask << shift;
sys/arch/riscv/starfive/jh71x0_eth.c
67
const uint32_t shift = jh_sc->sc_phy_syscon_shift;
sys/arch/riscv/starfive/jh71x0_eth.c
71
val &= ~(STARFIVE_GMAC_PHY_INFT_MASK << shift);
sys/arch/riscv/starfive/jh71x0_eth.c
72
val |= STARFIVE_GMAC_PHY_INFT_RGMII << shift;
sys/arch/sgimips/dev/crmfb.c
1072
shift = 64;
sys/arch/sgimips/dev/crmfb.c
1075
shift -= 16;
sys/arch/sgimips/dev/crmfb.c
1076
reg |= (((uint64_t)(v | 0x8000)) << shift);
sys/arch/sgimips/dev/crmfb.c
1077
if (shift == 0) {
sys/arch/sgimips/dev/crmfb.c
1078
shift = 64;
sys/arch/sgimips/dev/crmfb.c
1088
if (shift != 64) {
sys/arch/sgimips/dev/crmfb.c
928
int i, bail, tile_width, tlbptr, lptr, j, tx, shift, overhang;
sys/arch/sgimips/hpc/if_sq.c
1074
int shift = 0;
sys/arch/sgimips/hpc/if_sq.c
1079
shift = 16;
sys/arch/sgimips/hpc/if_sq.c
1081
status = sq_hpc_read(sc, sc->hpc_regs->enetx_ctl) >> shift;
sys/arch/sgimips/hpc/if_sq.c
1086
tmp = (sc->hpc_regs->enetx_ctl_active >> shift) | TXSTAT_GOOD;
sys/arch/sparc/sparc/timer.c
158
res >>= cntr.shift;
sys/arch/sparc/sparc/timer.c
240
cntr.shift = t0;
sys/arch/sparc/sparc/timer.c
274
cntr.limit >>= cntr.shift;
sys/arch/sparc/sparc/timer.c
92
u_int shift; /* scaling for valid bits */
sys/arch/sparc64/sparc64/ipifuncs.c
245
int i, ik, shift = 0;
sys/arch/sparc64/sparc64/ipifuncs.c
255
shift = (upaid & 0x3) * 2;
sys/arch/sparc64/sparc64/ipifuncs.c
257
if (ldxa(0, ASI_IDSR) & (IDSR_BUSY << shift))
sys/arch/sparc64/sparc64/ipifuncs.c
278
if (ldxa(0, ASI_IDSR) & (IDSR_BUSY << shift))
sys/arch/sparc64/sparc64/ipifuncs.c
288
if ((ldxa(0, ASI_IDSR) & (IDSR_NACK << shift)) == 0)
sys/arch/x68k/stand/libdos/dos.h
158
unsigned char shift;
sys/arch/x86/pci/ichlpcib.c
1000
int reg, shift;
sys/arch/x86/pci/ichlpcib.c
1003
shift = pin % 32;
sys/arch/x86/pci/ichlpcib.c
1010
data |= __BIT(shift);
sys/arch/x86/pci/ichlpcib.c
1012
data &= ~__BIT(shift);
sys/arch/x86/pci/ichlpcib.c
1024
int reg, shift;
sys/arch/x86/pci/ichlpcib.c
1026
shift = pin % 32;
sys/arch/x86/pci/ichlpcib.c
1034
data &= ~__BIT(shift);
sys/arch/x86/pci/ichlpcib.c
1037
data |= __BIT(shift);
sys/arch/x86/pci/ichlpcib.c
1047
data |= __BIT(shift);
sys/arch/x86/pci/ichlpcib.c
1049
data &= ~__BIT(shift);
sys/arch/x86/pci/ichlpcib.c
880
int pin, shift, base_reg, cntl_reg, reg;
sys/arch/x86/pci/ichlpcib.c
927
shift = pin % 32;
sys/arch/x86/pci/ichlpcib.c
928
bit = __BIT(shift);
sys/arch/x86/pci/ichlpcib.c
983
int reg, shift;
sys/arch/x86/pci/ichlpcib.c
986
shift = pin % 32;
sys/arch/x86/pci/ichlpcib.c
992
return (__SHIFTOUT(data, __BIT(shift)) ? GPIO_PIN_HIGH : GPIO_PIN_LOW);
sys/compat/freebsd/freebsd_timex.h
272
int shift; /* interval duration (s) (shift) (ro) */
sys/compat/netbsd32/netbsd32.h
985
int shift; /* interval duration (s) (shift) (ro) */
sys/compat/netbsd32/netbsd32_conv.h
448
tx32p->shift = txp->shift;
sys/compat/netbsd32/netbsd32_conv.h
472
txp->shift = tx32p->shift;
sys/dev/adb/adb_ktm.c
317
int shift = 7, ddx, ddy, sign, smask;
sys/dev/adb/adb_ktm.c
330
dx |= (ddx << shift);
sys/dev/adb/adb_ktm.c
331
dy |= (ddy << shift);
sys/dev/adb/adb_ktm.c
332
shift += 3;
sys/dev/adb/adb_ktm.c
334
sign = 1 << (shift - 1);
sys/dev/adb/adb_ktm.c
335
smask = 0xffffffff << shift;
sys/dev/adb/adb_ktm.c
341
printf("%d %d %08x %d\n", dx, dy, smask, shift);
sys/dev/adb/adb_ms.c
644
int shift = 7, ddx, ddy, sign, smask;
sys/dev/adb/adb_ms.c
657
dx |= (ddx << shift);
sys/dev/adb/adb_ms.c
658
dy |= (ddy << shift);
sys/dev/adb/adb_ms.c
659
shift += 3;
sys/dev/adb/adb_ms.c
661
sign = 1 << (shift - 1);
sys/dev/adb/adb_ms.c
662
smask = 0xffffffff << shift;
sys/dev/adb/adb_ms.c
668
printf("%d %d %08x %d\n", dx, dy, smask, shift);
sys/dev/audio/linear.c
117
u_int shift;
sys/dev/audio/linear.c
132
shift = AUDIO_INTERNAL_BITS - 16;
sys/dev/audio/linear.c
147
*d++ = (auint_t)val << shift;
sys/dev/audio/linear.c
158
*d++ = (auint_t)val << shift;
sys/dev/audio/linear.c
175
u_int shift;
sys/dev/audio/linear.c
190
shift = AUDIO_INTERNAL_BITS - 16;
sys/dev/audio/linear.c
203
val = (*s++) >> shift;
sys/dev/audio/linear.c
212
val = (*s++) >> shift;
sys/dev/dkwedge/dk.c
1861
unsigned shift;
sys/dev/dkwedge/dk.c
1872
shift = (sc->sc_parent->dk_blkshift + DEV_BSHIFT);
sys/dev/dkwedge/dk.c
1876
KASSERT(size <= (__type_max(off_t) >> shift));
sys/dev/dkwedge/dk.c
1877
KASSERT(sc->sc_offset <= ((__type_max(off_t) >> shift) - size));
sys/dev/dkwedge/dk.c
1878
offset = ((off_t)sc->sc_offset << shift);
sys/dev/dkwedge/dk.c
1879
maxlen = ((off_t)size << shift);
sys/dev/hdaudio/hdafg.c
3341
#define ISFREQOK(shift) ((caps & (1 << (shift))) ? true : false)
sys/dev/hdaudio/hdafg.c
3378
#define ISBITSOK(shift) ((caps & (1 << (shift))) ? true : false)
sys/dev/hdaudio/hdaudiovar.h
221
const size_t shift = 8 * (off & 3);
sys/dev/hdaudio/hdaudiovar.h
224
tmp = (val << shift) | (tmp & ~(0xff << shift));
sys/dev/hdaudio/hdaudiovar.h
235
const size_t shift = 8 * (off & 2);
sys/dev/hdaudio/hdaudiovar.h
238
tmp = (val << shift) | (tmp & ~(0xffff << shift));
sys/dev/i2c/es8316ac.c
342
int nvol, shift, ch;
sys/dev/i2c/es8316ac.c
358
shift = 8 - fls32(__SHIFTOUT_MASK(mix->mask[ch]));
sys/dev/i2c/es8316ac.c
359
nvol = mc->un.value.level[ch] >> shift;
sys/dev/i2c/es8316ac.c
395
int nvol, shift, ch;
sys/dev/i2c/es8316ac.c
412
shift = 8 - fls32(__SHIFTOUT_MASK(mix->mask[ch]));
sys/dev/i2c/es8316ac.c
416
nvol <<= shift;
sys/dev/i2c/sensirion_voc_algorithm.c
725
fix16_t shift;
sys/dev/i2c/sensirion_voc_algorithm.c
735
shift = (fix16_div(
sys/dev/i2c/sensirion_voc_algorithm.c
739
return ((fix16_div((F16(VocAlgorithm_SIGMOID_L) + shift),
sys/dev/i2c/sensirion_voc_algorithm.c
741
shift);
sys/dev/ic/ct65550.c
777
int shift = 0;
sys/dev/ic/ct65550.c
781
latch |= (bork << shift);
sys/dev/ic/ct65550.c
782
if (shift == 24) {
sys/dev/ic/ct65550.c
785
shift = 0;
sys/dev/ic/ct65550.c
787
shift += 8;
sys/dev/ic/ct65550.c
790
if (shift != 0) {
sys/dev/ic/ispreg.h
809
#define ISPBSMX(c, byte, shift, mask) \
sys/dev/ic/ispreg.h
810
(((c)[(byte)] >> (shift)) & (mask))
sys/dev/ic/nslm7x.c
2937
int shift, data, divisor = 1;
sys/dev/ic/nslm7x.c
2940
shift = 0;
sys/dev/ic/nslm7x.c
2944
reg = 0x47; shift = 0;
sys/dev/ic/nslm7x.c
2947
reg = 0x47; shift = 4;
sys/dev/ic/nslm7x.c
2950
reg = 0x5b; shift = 0;
sys/dev/ic/nslm7x.c
2953
reg = 0x5b; shift = 4;
sys/dev/ic/nslm7x.c
2956
reg = 0x5c; shift = 0;
sys/dev/ic/nslm7x.c
2959
reg = 0x5c; shift = 4;
sys/dev/ic/nslm7x.c
2962
reg = 0x9e; shift = 0;
sys/dev/ic/nslm7x.c
2974
divisor = ((*sc->lm_readreg)(sc, reg) >> shift) & 0x7;
sys/dev/ieee1394/firewire.c
1217
int shift;
sys/dev/ieee1394/firewire.c
1221
for (shift = 28; shift >= 0; shift -= 4) {
sys/dev/ieee1394/firewire.c
1222
sum = ((crc >> 12) ^ (ptr[i/4] >> shift)) & 0xf;
sys/dev/ieee1394/fwcrom.c
219
int i, shift;
sys/dev/ieee1394/fwcrom.c
224
for (shift = 28; shift >= 0; shift -= 4) {
sys/dev/ieee1394/fwcrom.c
225
sum = ((crc >> 12) ^ (data >> shift)) & 0xf;
sys/dev/isa/nsclpcsio_isa.c
586
int port, shift, reg;
sys/dev/isa/nsclpcsio_isa.c
590
shift = pin % 8;
sys/dev/isa/nsclpcsio_isa.c
612
return ((v >> shift) & 0x1);
sys/dev/isa/nsclpcsio_isa.c
619
int port, shift, reg;
sys/dev/isa/nsclpcsio_isa.c
623
shift = pin % 8;
sys/dev/isa/nsclpcsio_isa.c
645
d &= ~(1 << shift);
sys/dev/isa/nsclpcsio_isa.c
647
d |= (1 << shift);
sys/dev/isa/wbsio.c
600
int port, shift, data;
sys/dev/isa/wbsio.c
603
shift = pin & 0x07;
sys/dev/isa/wbsio.c
607
return ((data >> shift) & 0x01);
sys/dev/isa/wbsio.c
614
int port, shift, data;
sys/dev/isa/wbsio.c
617
shift = pin & 0x07;
sys/dev/isa/wbsio.c
622
data &= ~(1 << shift);
sys/dev/isa/wbsio.c
624
data |= (1 << shift);
sys/dev/isa/wbsio.c
634
int port, shift;
sys/dev/isa/wbsio.c
637
shift = pin & 0x07;
sys/dev/isa/wbsio.c
643
ior |= (1 << shift);
sys/dev/isa/wbsio.c
644
inv &= ~(1 << shift);
sys/dev/isa/wbsio.c
646
ior &= ~(1 << shift);
sys/dev/isa/wbsio.c
647
inv &= ~(1 << shift);
sys/dev/isa/wbsio.c
649
ior |= (1 << shift);
sys/dev/isa/wbsio.c
650
inv |= (1 << shift);
sys/dev/isa/wbsio.c
652
ior &= ~(1 << shift);
sys/dev/isa/wbsio.c
653
inv |= (1 << shift);
sys/dev/midisyn.c
749
uint_fast8_t shift;
sys/dev/midisyn.c
765
for ( shift = 0; mp < 1900544; ++ shift )
sys/dev/midisyn.c
769
return UINT32_C(2463438621) >> shift;
sys/dev/midisyn.c
779
return (uint32_t)t64b >> shift;
sys/dev/pci/cmpci.c
212
cmpci_reg_partial_write_1(struct cmpci_softc *sc, int no, int shift,
sys/dev/pci/cmpci.c
217
(val<<shift) |
sys/dev/pci/cmpci.c
218
(bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) & ~(mask<<shift)));
sys/dev/pci/cmpci.c
223
cmpci_reg_partial_write_4(struct cmpci_softc *sc, int no, int shift,
sys/dev/pci/cmpci.c
228
(val<<shift) |
sys/dev/pci/cmpci.c
229
(bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) & ~(mask<<shift)));
sys/dev/pci/cxgb/cxgb_t3_hw.c
150
static int shift[] = { 0, 0, 16, 24 };
sys/dev/pci/cxgb/cxgb_t3_hw.c
185
val >>= shift[mc7->width];
sys/dev/pci/if_ixlreg.h
65
#define I40E_MASK(mask, shift) ((mask) << (shift))
sys/dev/pci/if_rtwn.c
1670
int infosz, pktlen, shift, totlen, error, s;
sys/dev/pci/if_rtwn.c
1705
shift = MS(rxdw0, R92C_RXDW0_SHIFT);
sys/dev/pci/if_rtwn.c
1706
totlen = pktlen + infosz + shift;
sys/dev/pci/if_rtwn.c
1717
pktlen, rate, infosz, shift, rssi));
sys/dev/pci/if_rtwn.c
1773
m_adj(m, infosz + shift);
sys/dev/pci/if_rtwn.c
1775
m_adj(m, shift);
sys/dev/pci/igc/if_igc.c
3656
const int shift = 0; /* XXXRO */
sys/dev/pci/igc/if_igc.c
3659
queue_id <<= shift;
sys/dev/pci/ixgbe/ixgbe_x550.c
1623
u32 i, j, reg, q, shift, vf, idx;
sys/dev/pci/ixgbe/ixgbe_x550.c
1631
shift = 3; /* 16 VFs / pools */
sys/dev/pci/ixgbe/ixgbe_x550.c
1635
shift = 2; /* 32 VFs / pools */
sys/dev/pci/ixgbe/ixgbe_x550.c
1638
shift = 1; /* 64 VFs / pools */
sys/dev/pci/ixgbe/ixgbe_x550.c
1660
vf = (q >> shift);
sys/dev/pci/machfb.c
1892
int shift = 0;
sys/dev/pci/machfb.c
1897
latch |= (bork << shift);
sys/dev/pci/machfb.c
1898
if (shift == 24) {
sys/dev/pci/machfb.c
1901
shift = 0;
sys/dev/pci/machfb.c
1904
shift += 8;
sys/dev/pci/machfb.c
1906
if (shift != 0) /* 24 */
sys/dev/pci/pm3fb.c
1033
shift = 24;
sys/dev/pci/pm3fb.c
1049
latch |= pixel << shift;
sys/dev/pci/pm3fb.c
1050
shift -= 8;
sys/dev/pci/pm3fb.c
1051
if (shift < 0) {
sys/dev/pci/pm3fb.c
1060
shift = 24;
sys/dev/pci/pm3fb.c
1064
if (shift != 24)
sys/dev/pci/pm3fb.c
967
int r1, g1, b1, r0, g0, b0, fgo, bgo, shift;
sys/dev/pci/qat/qat.c
1129
qat_modulo(u_int data, u_int shift)
sys/dev/pci/qat/qat.c
1131
u_int div = data >> shift;
sys/dev/pci/qat/qat.c
1132
u_int mult = div << shift;
sys/dev/pci/radeonfb_bios.c
449
uint8_t shift;
sys/dev/pci/radeonfb_bios.c
486
shift = GETBIOS8(sc, offset) * 8;
sys/dev/pci/radeonfb_bios.c
490
(((uint32_t)GETBIOS8(sc, offset)) << shift) |
sys/dev/pci/radeonfb_bios.c
491
~((uint32_t)0xff << shift);
sys/dev/pci/radeonfb_bios.c
494
ormask = ((uint32_t)GETBIOS8(sc, offset)) << shift;
sys/dev/pci/radeonfb_bios.c
498
shift, andmask, ormask));
sys/dev/pci/voodoofb.c
1112
int shift = 0;
sys/dev/pci/voodoofb.c
1117
latch |= (bork << shift);
sys/dev/pci/voodoofb.c
1118
if (shift == 24) {
sys/dev/pci/voodoofb.c
1121
shift = 0;
sys/dev/pci/voodoofb.c
1123
shift += 8;
sys/dev/pci/voodoofb.c
1125
if (shift != 24)
sys/dev/qbus/qd.c
2801
q_keyboard.shift ^= 0xFFFF;
sys/dev/qbus/qd.c
2810
q_keyboard.shift = 0;
sys/dev/qbus/qd.c
2830
else if( q_keyboard.lock || q_keyboard.shift )
sys/dev/qbus/qd.c
3152
q_keyboard.shift ^= 0xFFFF;
sys/dev/qbus/qd.c
3161
q_keyboard.shift = 0;
sys/dev/qbus/qd.c
3179
else if ( q_keyboard.lock || q_keyboard.shift )
sys/dev/qbus/qd.c
365
int shift; /* state variables */
sys/dev/sbus/p9100.c
850
int shift = 24;
sys/dev/sbus/p9100.c
857
latch |= (bork << shift);
sys/dev/sbus/p9100.c
858
if (shift == 0) {
sys/dev/sbus/p9100.c
873
shift = 24;
sys/dev/sbus/p9100.c
875
shift -= 8;
sys/dev/sbus/p9100.c
877
if (shift != 24)
sys/dev/sbus/tcx.c
1132
int addr, i, uc, shift;
sys/dev/sbus/tcx.c
1145
shift = addr & 0x1f;
sys/dev/sbus/tcx.c
1148
fmask = fmask << (32 - font->fontwidth - shift);
sys/dev/sbus/tcx.c
1167
if (shift > 24) {
sys/dev/sbus/tcx.c
1169
(shift - 24));
sys/dev/sbus/tcx.c
1172
(24 - shift));
sys/dev/sbus/tcx.c
1186
if (shift > 24) {
sys/dev/sbus/tcx.c
1187
fg = (uint64_t)(cc >> (shift - 24));
sys/dev/sbus/tcx.c
1189
fg = (uint64_t)(cc << (24 - shift));
sys/dev/sbus/tcx.c
1202
if (shift > 16) {
sys/dev/sbus/tcx.c
1204
(shift - 16));
sys/dev/sbus/tcx.c
1207
(16 - shift));
sys/dev/sbus/tcx.c
1221
if (shift > 16) {
sys/dev/sbus/tcx.c
1223
(shift - 16));
sys/dev/sbus/tcx.c
1226
(16 - shift));
sys/dev/sbus/tcx.c
1237
shift = addr & 0x1f;
sys/dev/sbus/tcx.c
1239
mask = 0xffffffff >> shift;
sys/dev/sbus/tcx.c
1241
(32 - (font->fontwidth + shift - 32)));
sys/dev/sbus/tcx.c
1262
fg = (uint64_t)bork >> (shift - 24);
sys/dev/sbus/tcx.c
1264
fgr = (uint64_t)(bork << (52 - shift));
sys/dev/sbus/tcx.c
1279
fg = (uint64_t)bork >> (shift - 24);
sys/dev/sbus/tcx.c
1281
fgr = (uint64_t)(bork << (52 - shift));
sys/dev/sbus/tcx.c
1294
fg = (uint64_t)bork >> (shift - 16);
sys/dev/sbus/tcx.c
1296
fgr = (uint64_t)(bork << (48 - shift));
sys/dev/sbus/tcx.c
1311
fg = (uint64_t)bork >> (shift - 16);
sys/dev/sbus/tcx.c
1313
fgr = (uint64_t)(bork << (48 - shift));
sys/dev/sdmmc/sdhc.c
139
const size_t shift = 8 * (o & 3);
sys/dev/sdmmc/sdhc.c
142
tmp = (val << shift) | (tmp & ~(0xffU << shift));
sys/dev/sdmmc/sdhc.c
154
const size_t shift = 8 * (o & 2);
sys/dev/sdmmc/sdhc.c
157
tmp = (val << shift) | (tmp & ~(0xffffU << shift));
sys/dev/spi/mcp48x1.c
105
.shift = 2
sys/dev/spi/mcp48x1.c
111
.shift = 0
sys/dev/spi/mcp48x1.c
224
reg |= sc->sc_dac_data << sc->sc_dm->shift;
sys/dev/spi/mcp48x1.c
62
uint8_t shift; /* data left shift during write */
sys/dev/spi/mcp48x1.c
99
.shift = 4
sys/dev/stbi/stb_image.c
3274
static int shiftsigned(int v, int shift, int bits)
sys/dev/stbi/stb_image.c
3279
if (shift < 0) v <<= -shift;
sys/dev/stbi/stb_image.c
3280
else v >>= shift;
sys/dev/std/ieee1212.c
1184
int shift;
sys/dev/std/ieee1212.c
1189
for (shift = 28; shift > 0; shift -= 4) {
sys/dev/std/ieee1212.c
1190
sum = ((crc >> 12) ^ (ntohl(data[i]) >> shift)) &
sys/dev/sun/btreg.h
100
(bt)->bt_cmap = 0 << (shift); \
sys/dev/sun/btreg.h
102
BT_INIT((bt), (shift)); \
sys/dev/sun/btreg.h
77
#define BT_INIT(bt, shift) do { /* whatever this means.. */ \
sys/dev/sun/btreg.h
78
(bt)->bt_addr = 0x06 << (shift); /* command reg */ \
sys/dev/sun/btreg.h
79
(bt)->bt_ctrl = 0x73 << (shift); /* overlay plane */ \
sys/dev/sun/btreg.h
80
(bt)->bt_addr = 0x04 << (shift); /* read mask */ \
sys/dev/sun/btreg.h
81
(bt)->bt_ctrl = 0xff << (shift); /* color planes */ \
sys/dev/sun/btreg.h
83
#define BT_UNBLANK(bt, x, shift) do { \
sys/dev/sun/btreg.h
85
(bt)->bt_addr = 0 << (shift); \
sys/dev/sun/btreg.h
87
if ((shift)) { \
sys/dev/sun/btreg.h
91
BT_INIT((bt), (shift)); \
sys/dev/sun/btreg.h
93
#define BT_BLANK(bt, shift) do { \
sys/dev/sun/btreg.h
94
(bt)->bt_addr = 0x06 << (shift); /* command reg */ \
sys/dev/sun/btreg.h
95
(bt)->bt_ctrl = 0x70 << (shift); /* overlay plane */ \
sys/dev/sun/btreg.h
96
(bt)->bt_addr = 0x04 << (shift); /* read mask */ \
sys/dev/sun/btreg.h
97
(bt)->bt_ctrl = 0x00 << (shift); /* color planes */ \
sys/dev/sun/btreg.h
99
(bt)->bt_addr = 0 << (shift); \
sys/dev/sun/cgsix.c
1339
uint32_t latch, res = 0, shift;
sys/dev/sun/cgsix.c
1346
shift = 24;
sys/dev/sun/cgsix.c
1349
res |= latch << shift;
sys/dev/sun/cgsix.c
1350
shift -= 8;
sys/dev/sun/cgsix.c
1420
int i, j, shift, x, y, wi, he, r, g, b, aval;
sys/dev/sun/cgsix.c
1482
shift = 24;
sys/dev/sun/cgsix.c
1499
latch |= pixel << shift;
sys/dev/sun/cgsix.c
1500
if (shift == 0) {
sys/dev/sun/cgsix.c
1503
shift = 24;
sys/dev/sun/cgsix.c
1505
shift -= 8;
sys/dev/sun/cgsix.c
1507
if (shift != 24)
sys/dev/tc/sfb.c
1001
int scanspan, height, width, aligns, alignd, shift, w, y;
sys/dev/tc/sfb.c
1038
shift = alignd - aligns;
sys/dev/tc/sfb.c
1039
if (shift < 0) {
sys/dev/tc/sfb.c
1040
shift = 8 + shift; /* enforce right rotate */
sys/dev/tc/sfb.c
1049
SFBPIXELSHIFT(sfb, shift);
sys/dev/tc/sfb.c
1078
shift = alignd - aligns;
sys/dev/tc/sfb.c
1079
if (shift > 0) {
sys/dev/tc/sfb.c
1080
shift = shift - 8; /* force left rotate */
sys/dev/tc/sfb.c
1089
SFBPIXELSHIFT(sfb, shift);
sys/dev/usb/if_ure.c
170
uint8_t shift;
sys/dev/usb/if_ure.c
172
shift = (reg & 3) << 3;
sys/dev/usb/if_ure.c
177
val >>= shift;
sys/dev/usb/if_ure.c
187
uint8_t shift;
sys/dev/usb/if_ure.c
189
shift = (reg & 2) << 3;
sys/dev/usb/if_ure.c
194
val >>= shift;
sys/dev/usb/if_ure.c
213
uint8_t shift;
sys/dev/usb/if_ure.c
216
shift = reg & 3;
sys/dev/usb/if_ure.c
220
byen <<= shift;
sys/dev/usb/if_ure.c
221
val <<= (shift << 3);
sys/dev/usb/if_ure.c
234
uint8_t shift;
sys/dev/usb/if_ure.c
237
shift = reg & 2;
sys/dev/usb/if_ure.c
241
byen <<= shift;
sys/dev/usb/if_ure.c
242
val <<= (shift << 3);
sys/fs/nfs/common/nfs_commonsubs.c
3632
int cnt = 0, gotd = 0, shift = 0;
sys/fs/nfs/common/nfs_commonsubs.c
3660
if (cnt == 0 && (val >> shift) == 0x0) {
sys/fs/nfs/common/nfs_commonsubs.c
3676
shift = utf8_shift[cnt - 1];
sys/kern/kern_ntptime.c
331
if (ntv->shift < PPS_FAVG)
sys/kern/kern_ntptime.c
333
else if (ntv->shift > PPS_FAVGMAX)
sys/kern/kern_ntptime.c
336
pps_shiftmax = ntv->shift;
sys/kern/kern_ntptime.c
398
ntv->shift = pps_shift;
sys/kern/subr_kmem.c
460
pool_cache_t alloc_table[], size_t maxsize, int shift, int ipl)
sys/kern/subr_kmem.c
463
size_t table_unit = (1 << shift);
sys/kern/subr_kmem.c
499
if ((cache_size >> shift) > maxidx) {
sys/kern/subr_kmem.c
500
maxidx = cache_size >> shift;
sys/kern/subr_kmem.c
508
alloc_table[(size - 1) >> shift] = pc;
sys/kern/subr_kmem.c
511
alloc_probe_table[(size - 1) >> shift] =
sys/kern/subr_kmem.c
515
free_probe_table[(size - 1) >> shift] =
sys/kern/subr_thmap.c
391
const unsigned shift = offset & HASHVAL_MOD;
sys/kern/subr_thmap.c
399
return (query->hashval >> shift) & LEVEL_MASK;
sys/kern/subr_thmap.c
408
const unsigned shift = offset & HASHVAL_MOD;
sys/kern/subr_thmap.c
411
return (hash(thmap->seed, key, leaf->len, i) >> shift) & LEVEL_MASK;
sys/net/bpfjit.c
1101
int shift = 0;
sys/net/bpfjit.c
1109
shift++;
sys/net/bpfjit.c
1112
if (shift != 0) {
sys/net/bpfjit.c
1117
SLJIT_IMM, shift);
sys/net/npf/npf_connkey.c
193
const unsigned shift = 16 * !which;
sys/net/npf/npf_connkey.c
194
const uint32_t mask = 0xffff0000 >> shift;
sys/net/npf/npf_connkey.c
195
k[1] = ((uint32_t)id << shift) | (oid & mask);
sys/net/toeplitz.c
151
unsigned int b, shift, val;
sys/net/toeplitz.c
164
shift = NBBY - b - 1;
sys/net/toeplitz.c
165
if (val & (1 << shift))
sys/sys/ptree.h
121
#define PTN__INSERT2(field, v, shift, mask) \
sys/sys/ptree.h
122
((field) = ((field) & ~((mask) << (shift))) | ((v) << (shift)))
sys/sys/timex.h
232
int shift; /* interval duration (s) (shift) (ro) */
sys/uvm/uvm_page.c
871
u_int min_numa, max_numa, npackage, shift;
sys/uvm/uvm_page.c
911
for (shift = 0; npackage > PGFL_MAX_BUCKETS; shift++) {
sys/uvm/uvm_page.c
930
ci3->ci_data.cpu_uvm->pgflbucket = npackage >> shift;
sys/uvm/uvm_page.c
938
"%d package(s) per bucket\n", 1 << shift);
tests/usr.bin/indent/edge_cases.c
136
return shift()->[FNAME];
tests/usr.bin/indent/edge_cases.c
96
sub fname($) { return shift()->[FNAME]; }
usr.bin/stat/stat.c
1235
if (shift > 0) {
usr.bin/stat/stat.c
1236
data >>= (shift - 1);
usr.bin/stat/stat.c
673
int shift; /* powers of 2 to scale numbers before printing */
usr.bin/stat/stat.c
681
shift = 0;
usr.bin/stat/stat.c
853
shift = 30; /* gigabytes */
usr.bin/stat/stat.c
857
shift = 20; /* megabytes */
usr.bin/stat/stat.c
861
shift = 10; /* kilobytes */
usr.bin/xlint/lint1/tree.c
3476
goto shift;
usr.bin/xlint/lint1/tree.c
3479
shift:
usr.sbin/bad144/bad144.c
284
shift(f, nbad, nbad-new);
usr.sbin/bad144/bad144.c
99
static void shift(int, int, int);