Symbol: mips_options
sys/arch/arc/arc/machdep.c
342
if (mips_options.mips_cpu_flags & CPU_MIPS_DOUBLE_COUNT) {
sys/arch/evbmips/alchemy/dbau1500.c
86
if (MIPS_PRID_COPTS(mips_options.mips_cpu_id) != MIPS_AU1500)
sys/arch/evbmips/alchemy/dbau1550.c
121
if (MIPS_PRID_COPTS(mips_options.mips_cpu_id) != MIPS_AU1550)
sys/arch/evbmips/alchemy/genericbd.c
80
const mips_prid_t cpu_id = mips_options.mips_cpu_id;
sys/arch/evbmips/alchemy/mtx-1.c
89
if (MIPS_PRID_COPTS(mips_options.mips_cpu_id) != MIPS_AU1500)
sys/arch/evbmips/alchemy/omsal400.c
111
if (MIPS_PRID_COPTS(mips_options.mips_cpu_id) != MIPS_AU1550)
sys/arch/evbmips/atheros/machdep.c
168
if (mips_options.mips_cpu_flags & CPU_MIPS_DOUBLE_COUNT)
sys/arch/evbmips/cavium/machdep.c
238
octeon_cpu_model(mips_options.mips_cpu_id));
sys/arch/evbmips/evbmips/yamon.c
155
if (mips_options.mips_cpu_flags & CPU_MIPS_DOUBLE_COUNT) {
sys/arch/evbmips/gdium/machdep.c
274
if (mips_options.mips_cpu_flags & CPU_MIPS_DOUBLE_COUNT)
sys/arch/evbmips/gdium/machdep.c
288
if (mips_options.mips_cpu_flags & CPU_MIPS_DOUBLE_COUNT)
sys/arch/evbmips/loongson/machdep.c
350
switch ((mips_options.mips_cpu_id >> 8) & 0xff) {
sys/arch/evbmips/loongson/machdep.c
352
switch (mips_options.mips_cpu_id & 0xff) {
sys/arch/evbmips/loongson/machdep.c
372
(mips_options.mips_cpu_id >> 8) & 0xff,
sys/arch/evbmips/loongson/machdep.c
373
(mips_options.mips_cpu_id >> 4) & 0x0f,
sys/arch/evbmips/loongson/machdep.c
374
mips_options.mips_cpu_id & 0x0f);
sys/arch/evbmips/loongson/machdep.c
578
if (mips_options.mips_cpu_flags & CPU_MIPS_DOUBLE_COUNT)
sys/arch/evbmips/loongson/machdep.c
593
if (mips_options.mips_cpu_flags & CPU_MIPS_DOUBLE_COUNT)
sys/arch/evbmips/malta/malta_intr.c
194
if (mips_options.mips_cpu_flags & CPU_MIPS_DOUBLE_COUNT)
sys/arch/evbmips/mipssim/machdep.c
128
if (mips_options.mips_cpu_flags & CPU_MIPS_DOUBLE_COUNT)
sys/arch/evbmips/rasoc/machdep.c
84
if (mips_options.mips_cpu_flags & CPU_MIPS_DOUBLE_COUNT)
sys/arch/evbmips/rmixl/machdep.c
262
cpu_setmodel("%s", mips_options.mips_cpu->cpu_name);
sys/arch/evbmips/rmixl/machdep.c
314
if (mips_options.mips_cpu_flags & CPU_MIPS_DOUBLE_COUNT)
sys/arch/evbmips/rmixl/machdep.c
632
switch(cpu_rmixl_chip_type(mips_options.mips_cpu)) {
sys/arch/ews4800mips/ews4800mips/machdep.c
132
if (mips_options.mips_cpu_flags & CPU_MIPS_DOUBLE_COUNT) {
sys/arch/hpcmips/tx/tx39.c
118
model = MIPS_PRID_REV(mips_options.mips_cpu_id);
sys/arch/mips/alchemy/au1000.c
210
if (MIPS_PRID_COPTS(mips_options.mips_cpu_id) == MIPS_AU1000) {
sys/arch/mips/alchemy/au1100.c
211
if (MIPS_PRID_COPTS(mips_options.mips_cpu_id) == MIPS_AU1100) {
sys/arch/mips/alchemy/au1500.c
207
if (MIPS_PRID_COPTS(mips_options.mips_cpu_id) == MIPS_AU1500) {
sys/arch/mips/alchemy/au1550.c
212
if (MIPS_PRID_COPTS(mips_options.mips_cpu_id) == MIPS_AU1550) {
sys/arch/mips/alchemy/au_chipdep.c
69
mips_options.mips_cpu_id);
sys/arch/mips/alchemy/au_timer.c
126
if (mips_options.mips_cpu_flags & CPU_MIPS_DOUBLE_COUNT)
sys/arch/mips/atheros/ar_conf.c
172
const u_int cid = MIPS_PRID_CID(mips_options.mips_cpu_id);
sys/arch/mips/atheros/ar_conf.c
173
const u_int pid = MIPS_PRID_IMPL(mips_options.mips_cpu_id);
sys/arch/mips/cavium/dev/if_cnmac.c
265
if (MIPS_PRID_IMPL(mips_options.mips_cpu_id) <= MIPS_CN30XX) {
sys/arch/mips/cavium/dev/octeon_dwctwo.c
137
const mips_prid_t cpu_id = mips_options.mips_cpu_id;
sys/arch/mips/cavium/dev/octeon_dwctwo.c
192
switch (MIPS_PRID_IMPL(mips_options.mips_cpu_id)) {
sys/arch/mips/cavium/dev/octeon_gmx.c
292
const mips_prid_t cpu_id = mips_options.mips_cpu_id;
sys/arch/mips/cavium/dev/octeon_gpio.c
133
switch (MIPS_PRID_IMPL(mips_options.mips_cpu_id)) {
sys/arch/mips/cavium/dev/octeon_pip.c
110
if (MIPS_PRID_IMPL(mips_options.mips_cpu_id) == MIPS_CN68XX)
sys/arch/mips/cavium/dev/octeon_pip.c
161
if (MIPS_PRID_IMPL(mips_options.mips_cpu_id) == MIPS_CN68XX)
sys/arch/mips/cavium/dev/octeon_pip.c
211
if (MIPS_PRID_IMPL(mips_options.mips_cpu_id) == MIPS_CN50XX) {
sys/arch/mips/include/cpuregs.h
139
(MIPS_XKPHYS_START | ((uint64_t)(mips_options.mips3_cca_devmem) << 59) | (x))
sys/arch/mips/include/cpuregs.h
141
(mips_options.mips3_xkphys_cached | (x))
sys/arch/mips/include/locore.h
209
# define MIPS_HAS_LLSC (mips_options.mips_has_llsc)
sys/arch/mips/include/locore.h
211
# define MIPS_HAS_LLADDR ((mips_options.mips_cpu_flags & CPU_MIPS_NO_LLADDR) == 0)
sys/arch/mips/include/locore.h
213
# define MIPS_HAS_LMMI ((mips_options.mips_cpu_flags & CPU_MIPS_LOONGSON2) != 0)
sys/arch/mips/include/locore.h
233
# define MIPS_HAS_LLADDR ((mips_options.mips_cpu_flags & CPU_MIPS_NO_LLADDR) == 0)
sys/arch/mips/include/locore.h
251
# define MIPS_HAS_LLADDR ((mips_options.mips_cpu_flags & CPU_MIPS_NO_LLADDR) == 0)
sys/arch/mips/include/locore.h
253
# define MIPS_HAS_DSP (mips_options.mips_cpu_flags & CPU_MIPS_HAVE_DSP)
sys/arch/mips/include/locore.h
254
# define MIPS_HAS_USERLOCAL (mips_options.mips_cpu_flags & CPU_MIPS_HAVE_USERLOCAL)
sys/arch/mips/include/locore.h
269
# define MIPS_HAS_LLADDR ((mips_options.mips_cpu_flags & CPU_MIPS_NO_LLADDR) == 0)
sys/arch/mips/include/locore.h
287
# define MIPS_HAS_LLADDR ((mips_options.mips_cpu_flags & CPU_MIPS_NO_LLADDR) == 0)
sys/arch/mips/include/locore.h
289
# define MIPS_HAS_DSP (mips_options.mips_cpu_flags & CPU_MIPS_HAVE_DSP)
sys/arch/mips/include/locore.h
290
# define MIPS_HAS_USERLOCAL (mips_options.mips_cpu_flags & CPU_MIPS_HAVE_USERLOCAL)
sys/arch/mips/include/locore.h
297
#define MIPS_HAS_R4K_MMU (mips_options.mips_has_r4k_mmu)
sys/arch/mips/include/locore.h
298
#define MIPS_HAS_LLSC (mips_options.mips_has_llsc)
sys/arch/mips/include/locore.h
304
#define MIPS_HAS_LLSC (mips_options.mips_has_llsc)
sys/arch/mips/include/locore.h
307
#define MIPS_HAS_LLADDR ((mips_options.mips_cpu_flags & CPU_MIPS_NO_LLADDR) == 0)
sys/arch/mips/include/locore.h
308
#define MIPS_HAS_DSP (mips_options.mips_cpu_flags & CPU_MIPS_HAVE_DSP)
sys/arch/mips/include/locore.h
309
#define MIPS_HAS_USERLOCAL (mips_options.mips_cpu_flags & CPU_MIPS_HAVE_USERLOCAL)
sys/arch/mips/include/locore.h
312
#define CPUISMIPS3 ((mips_options.mips_cpu_arch & \
sys/arch/mips/include/locore.h
316
#define CPUISMIPS4 ((mips_options.mips_cpu_arch & CPU_ARCH_MIPS4) != 0)
sys/arch/mips/include/locore.h
317
#define CPUISMIPS5 ((mips_options.mips_cpu_arch & CPU_ARCH_MIPS5) != 0)
sys/arch/mips/include/locore.h
318
#define CPUISMIPS32 ((mips_options.mips_cpu_arch & CPU_ARCH_MIPS32) != 0)
sys/arch/mips/include/locore.h
319
#define CPUISMIPS32R2 ((mips_options.mips_cpu_arch & CPU_ARCH_MIPS32R2) != 0)
sys/arch/mips/include/locore.h
320
#define CPUISMIPS64 ((mips_options.mips_cpu_arch & CPU_ARCH_MIPS64) != 0)
sys/arch/mips/include/locore.h
321
#define CPUISMIPS64R2 ((mips_options.mips_cpu_arch & CPU_ARCH_MIPS64R2) != 0)
sys/arch/mips/include/locore.h
322
#define CPUISMIPSNN ((mips_options.mips_cpu_arch & \
sys/arch/mips/include/locore.h
324
#define CPUISMIPSNNR2 ((mips_options.mips_cpu_arch & \
sys/arch/mips/include/locore.h
326
#define CPUIS64BITS ((mips_options.mips_cpu_arch & \
sys/arch/mips/include/locore.h
329
#define MIPS_HAS_CLOCK (mips_options.mips_cpu_arch >= CPU_ARCH_MIPS3)
sys/arch/mips/include/locore.h
709
extern struct mips_options mips_options;
sys/arch/mips/include/mips3_pte.h
102
#define MIPS3_XPHYS_ACC MIPS_PHYS_TO_XKPHYS(mips_options.mips3_cca_devmem, 0)
sys/arch/mips/include/mips3_pte.h
106
#define MIPS3_PG_ACC MIPS3_CCA_TO_PG(mips_options.mips3_cca_devmem)
sys/arch/mips/include/mips3_pte.h
112
#define MIPS3_PG_CACHED mips_options.mips3_pg_cached
sys/arch/mips/include/mips3_pte.h
147
#define MIPS3_PG_SHIFT mips_options.mips3_pg_shift
sys/arch/mips/include/pte.h
318
return MIPS3_PG_TO_CCA(pte) == MIPS3_PG_TO_CCA(mips_options.mips3_pg_cached);
sys/arch/mips/include/pte.h
449
cca = mips_options.mips3_cca_devmem;
sys/arch/mips/mips/bus_dma.c
1114
if (((mips_options.mips_cpu_flags & CPU_MIPS_D_CACHE_COHERENT)
sys/arch/mips/mips/bus_dma.c
1126
if (((mips_options.mips_cpu_flags & CPU_MIPS_D_CACHE_COHERENT)
sys/arch/mips/mips/bus_dma.c
118
(mips_options.mips_cpu_flags & CPU_MIPS_D_CACHE_COHERENT) != 0;
sys/arch/mips/mips/bus_dma.c
282
if (mips_options.mips_cpu_flags & CPU_MIPS_D_CACHE_COHERENT)
sys/arch/mips/mips/bus_dma.c
489
if (mips_options.mips_cpu_flags & CPU_MIPS_D_CACHE_COHERENT)
sys/arch/mips/mips/bus_dma.c
568
if (mips_options.mips_cpu_flags & CPU_MIPS_D_CACHE_COHERENT)
sys/arch/mips/mips/bus_dma.c
644
if (mips_options.mips_cpu_flags & CPU_MIPS_D_CACHE_COHERENT)
sys/arch/mips/mips/bus_dma.c
669
(mips_options.mips_cpu_flags & CPU_MIPS_D_CACHE_COHERENT);
sys/arch/mips/mips/cache.c
1065
struct mips_options * const opts = &mips_options;
sys/arch/mips/mips/cache.c
193
const mips_prid_t cpu_id = mips_options.mips_cpu_id;
sys/arch/mips/mips/cache.c
252
const mips_prid_t cpu_id = mips_options.mips_cpu_id;
sys/arch/mips/mips/cache.c
872
const mips_prid_t cpu_id = mips_options.mips_cpu_id;
sys/arch/mips/mips/cache.c
989
const mips_prid_t cpu_id = mips_options.mips_cpu_id;
sys/arch/mips/mips/cpu_exec.c
110
if (mips_options.mips_cpu_arch < CPU_ARCH_MIPS2)
sys/arch/mips/mips/cpu_exec.c
114
if (mips_options.mips_cpu_arch < CPU_ARCH_MIPS3)
sys/arch/mips/mips/cpu_exec.c
118
if (mips_options.mips_cpu_arch < CPU_ARCH_MIPS4)
sys/arch/mips/mips/cpu_exec.c
122
if (mips_options.mips_cpu_arch < CPU_ARCH_MIPS5)
sys/arch/mips/mips/cpu_exec.c
178
if (mips_options.mips_cpu_arch & CPU_ARCH_MIPS64R2) {
sys/arch/mips/mips/cpu_exec.c
180
} else if (mips_options.mips_cpu_arch & CPU_ARCH_MIPS64) {
sys/arch/mips/mips/cpu_exec.c
182
} else if (mips_options.mips_cpu_arch & CPU_ARCH_MIPS32R2) {
sys/arch/mips/mips/cpu_exec.c
184
} else if (mips_options.mips_cpu_arch & CPU_ARCH_MIPS32) {
sys/arch/mips/mips/cpu_exec.c
186
} else if (mips_options.mips_cpu_arch & CPU_ARCH_MIPS5) {
sys/arch/mips/mips/cpu_exec.c
188
} else if (mips_options.mips_cpu_arch & CPU_ARCH_MIPS4) {
sys/arch/mips/mips/cpu_exec.c
190
} else if (mips_options.mips_cpu_arch & CPU_ARCH_MIPS3) {
sys/arch/mips/mips/cpu_exec.c
192
} else if (mips_options.mips_cpu_arch & CPU_ARCH_MIPS2) {
sys/arch/mips/mips/cpu_exec.c
225
if (mips_options.mips_cpu_arch < CPU_ARCH_MIPS2)
sys/arch/mips/mips/cpu_exec.c
229
if (mips_options.mips_cpu_arch < CPU_ARCH_MIPS3)
sys/arch/mips/mips/cpu_exec.c
233
if (mips_options.mips_cpu_arch < CPU_ARCH_MIPS4)
sys/arch/mips/mips/cpu_exec.c
237
if (mips_options.mips_cpu_arch < CPU_ARCH_MIPS5)
sys/arch/mips/mips/cpu_exec.c
287
if (mips_options.mips_cpu_arch & CPU_ARCH_MIPS64) {
sys/arch/mips/mips/cpu_exec.c
289
} else if (mips_options.mips_cpu_arch & CPU_ARCH_MIPS32) {
sys/arch/mips/mips/cpu_exec.c
291
} else if (mips_options.mips_cpu_arch & CPU_ARCH_MIPS5) {
sys/arch/mips/mips/cpu_exec.c
293
} else if (mips_options.mips_cpu_arch & CPU_ARCH_MIPS4) {
sys/arch/mips/mips/cpu_exec.c
295
} else if (mips_options.mips_cpu_arch & CPU_ARCH_MIPS3) {
sys/arch/mips/mips/cpu_exec.c
297
} else if (mips_options.mips_cpu_arch & CPU_ARCH_MIPS2) {
sys/arch/mips/mips/cpu_subr.c
215
const int cp0flags = mips_options.mips_cpu->cpu_cp0flags;
sys/arch/mips/mips/db_interface.c
274
for (i = 0; i < mips_options.mips_num_tlb_entries; i++) {
sys/arch/mips/mips/db_interface.c
293
mips_options.mips_num_tlb_entries > 100 ? 3 : 2;
sys/arch/mips/mips/db_interface.c
295
for (i = 0; i < mips_options.mips_num_tlb_entries; i++) {
sys/arch/mips/mips/db_interface.c
422
u_int cp0flags = mips_options.mips_cpu->cpu_cp0flags;
sys/arch/mips/mips/db_interface.c
456
if (mips_options.mips_cpu_arch >= CPU_ARCH_MIPS3) {
sys/arch/mips/mips/db_interface.c
473
if (mips_options.mips_cpu_arch >= CPU_ARCH_MIPS3) {
sys/arch/mips/mips/db_interface.c
783
if ((mips_options.mips_cpu->cpu_flags & CPU_MIPS_HAVE_MxCR) == 0) {
sys/arch/mips/mips/db_interface.c
812
if ((mips_options.mips_cpu->cpu_flags & CPU_MIPS_HAVE_MxCR) == 0) {
sys/arch/mips/mips/mips3_clock.c
119
if (mips_options.mips_cpu_flags & CPU_MIPS_DOUBLE_COUNT) {
sys/arch/mips/mips/mips_fixup.c
55
if (ebase == mips_options.mips_cpu_id
sys/arch/mips/mips/mips_machdep.c
1102
mips_options.mips_cpu_flags |= CPU_MIPS_HAVE_USERLOCAL;
sys/arch/mips/mips/mips_machdep.c
1105
mips_options.mips_cpu_flags |= CPU_MIPS_HAVE_DSP;
sys/arch/mips/mips/mips_machdep.c
1165
struct mips_options * const opts = &mips_options;
sys/arch/mips/mips/mips_machdep.c
1457
struct mips_options * const opts = &mips_options;
sys/arch/mips/mips/mips_machdep.c
1506
const struct mips_options * const opts = &mips_options;
sys/arch/mips/mips/mips_machdep.c
264
struct mips_options mips_options = {
sys/arch/mips/mips/mips_machdep.c
956
mips_options.mips_cpu_flags |= CPU_MIPS_HAVE_USERLOCAL;
sys/arch/mips/mips/mips_machdep.c
959
mips_options.mips_cpu_flags |= CPU_MIPS_HAVE_DSP;
sys/arch/mips/mips/mips_mcclock.c
121
mips_options.mips_cpu_mhz = mips_mcclock_to_mhz(iters);
sys/arch/mips/mips/mips_mcclock.c
125
iters, mips_options.mips_cpu_mhz, cpuspeed);
sys/arch/mips/mips/pmap_machdep.c
1085
KASSERT(mips_options.mips3_xkphys_cached);
sys/arch/mips/mips/pmap_machdep.c
675
struct mips_options * const opts = &mips_options;
sys/arch/mips/mips/pmap_machdep.c
905
for (size_t i = 0; i < mips_options.mips_num_tlb_entries; i++) {
sys/arch/mips/rmi/rmixl_cpu.c
132
if (mips_options.mips_cpu->cpu_pid == MIPS_XLS616) {
sys/arch/mips/rmi/rmixl_cpu.c
155
if (!cpu_rmixl(mips_options.mips_cpu))
sys/arch/mips/rmi/rmixl_cpucore.c
132
nthreads = MIPS_CIDFL_RMI_NTHREADS(mips_options.mips_cpu->cpu_cidflags);
sys/arch/mips/rmi/rmixl_cpucore.c
70
if (!cpu_rmixl(mips_options.mips_cpu))
sys/arch/mips/rmi/rmixl_cpunode.c
73
if (!cpu_rmixl(mips_options.mips_cpu))
sys/arch/mips/rmi/rmixl_cpunode.c
91
const u_int cpu_cidflags = mips_options.mips_cpu->cpu_cidflags;
sys/arch/mips/rmi/rmixl_fmn.c
445
switch (MIPS_PRID_IMPL(mips_options.mips_cpu_id)) {
sys/arch/mips/rmi/rmixl_fmn.c
471
MIPS_PRID_IMPL(mips_options.mips_cpu_id));
sys/arch/mips/rmi/rmixl_fmn.c
500
switch(cpu_rmixl_chip_type(mips_options.mips_cpu)) {
sys/arch/mips/rmi/rmixl_fmn.c
511
cpu_rmixl_chip_type(mips_options.mips_cpu));
sys/arch/mips/rmi/rmixl_intr.c
402
KASSERT(cpu_rmixlr(mips_options.mips_cpu)
sys/arch/mips/rmi/rmixl_intr.c
403
|| cpu_rmixls(mips_options.mips_cpu));
sys/arch/mips/rmi/rmixl_intr.c
523
switch(cpu_rmixl_chip_type(mips_options.mips_cpu)) {
sys/arch/mips/rmi/rmixl_intr.c
546
switch (MIPS_PRID_IMPL(mips_options.mips_cpu_id)) {
sys/arch/mips/rmi/rmixl_intr.c
593
switch (MIPS_PRID_IMPL(mips_options.mips_cpu_id)) {
sys/arch/mips/rmi/rmixl_intr.c
614
mips_options.mips_cpu_id);
sys/arch/mips/rmi/rmixl_nand.c
112
if (cpu_rmixlp(mips_options.mips_cpu)) {
sys/arch/mips/rmi/rmixl_nand.c
117
if (! cpu_rmixls(mips_options.mips_cpu)) {
sys/arch/mips/rmi/rmixl_obio.c
284
if (cpu_rmixls(mips_options.mips_cpu))
sys/arch/mips/rmi/rmixl_pcie.c
1051
switch (MIPS_PRID_IMPL(mips_options.mips_cpu_id)) {
sys/arch/mips/rmi/rmixl_pcie.c
1081
__func__, MIPS_PRID_IMPL(mips_options.mips_cpu_id));
sys/arch/mips/rmi/rmixl_pcie.c
1100
switch (MIPS_PRID_IMPL(mips_options.mips_cpu_id)) {
sys/arch/mips/rmi/rmixl_pcie.c
1139
__func__, MIPS_PRID_IMPL(mips_options.mips_cpu_id));
sys/arch/mips/rmi/rmixl_pcie.c
258
if (! cpu_rmixls(mips_options.mips_cpu))
sys/arch/mips/rmi/rmixl_pcie.c
517
switch (MIPS_PRID_IMPL(mips_options.mips_cpu_id)) {
sys/arch/mips/rmi/rmixl_pcie.c
586
const mips_prid_t cpu_id = mips_options.mips_cpu_id;
sys/arch/mips/rmi/rmixl_pcie.c
787
switch (MIPS_PRID_IMPL(mips_options.mips_cpu_id)) {
sys/arch/mips/rmi/rmixl_pcix.c
278
if (! cpu_rmixlr(mips_options.mips_cpu))
sys/arch/mips/rmi/rmixl_pcix.c
788
if (! cpu_rmixlr(mips_options.mips_cpu))
sys/arch/mips/rmi/rmixl_pcix.c
790
__func__, mips_options.mips_cpu_id);
sys/arch/pmax/pmax/dec_3100.c
140
if (mips_options.mips_cpu_mhz < 15)
sys/arch/pmax/pmax/dec_3maxplus.c
457
tc3.tc_frequency = mips_options.mips_cpu_mhz * 1000000;
sys/arch/pmax/pmax/dec_3min.c
186
cpu_setmodel("DECstation 5000/1%d (3MIN)", mips_options.mips_cpu_mhz);
sys/arch/pmax/pmax/dec_3min.c
466
tc.tc_frequency = mips_options.mips_cpu_mhz * 1000000;
sys/arch/pmax/pmax/dec_maxine.c
172
cpu_setmodel("Personal DECstation 5000/%d (MAXINE)", mips_options.mips_cpu_mhz);
sys/arch/pmax/pmax/dec_maxine.c
404
tc3.tc_frequency = mips_options.mips_cpu_mhz * 1000000;
sys/arch/sgimips/dev/crime.c
178
if (mips_options.mips_cpu_flags & CPU_MIPS_DOUBLE_COUNT)
sys/arch/sgimips/sgimips/machdep.c
948
switch (MIPS_PRID_IMPL(mips_options.mips_cpu_id)) {