#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: tx39.c,v 1.45 2014/03/26 17:53:36 christos Exp $");
#include "opt_vr41xx.h"
#include "opt_tx39xx.h"
#include "m38813c.h"
#include "tc5165buf.h"
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/intr.h>
#include <uvm/uvm_extern.h>
#include <mips/cache.h>
#include <mips/locore.h>
#include <machine/bootinfo.h>
#include <machine/sysconf.h>
#include <machine/platid.h>
#include <machine/platid_mask.h>
#include <machine/bus.h>
#include <hpcmips/tx/tx39biureg.h>
#include <hpcmips/tx/tx39reg.h>
#include <hpcmips/tx/tx39var.h>
#ifdef TX391X
#include <hpcmips/tx/tx3912videovar.h>
#endif
#include <sys/termios.h>
#include <sys/ttydefaults.h>
#include <hpcmips/tx/tx39uartvar.h>
#ifndef CONSPEED
#define CONSPEED TTYDEF_SPEED
#endif
#if NM38813C > 0
#include <hpcmips/dev/m38813cvar.h>
#endif
#if NTC5165BUF > 0
#include <hpcmips/dev/tc5165bufvar.h>
#endif
struct tx_chipset_tag tx_chipset;
void tx_init(void);
#if defined(VR41XX) && defined(TX39XX)
#define TX_INTR tx_intr
#else
#define TX_INTR cpu_intr
#endif
extern void TX_INTR(int, vaddr_t, uint32_t);
void tx39clock_cpuspeed(int *, int *);
void tx_cons_init(void);
void tx_fb_init(void **);
void tx_mem_init(paddr_t);
void tx_find_dram(paddr_t, paddr_t);
void tx_reboot(int, char *);
void
tx_init(void)
{
tx_chipset_tag_t tc;
int model, rev;
int cpuclock;
tc = tx_conf_get_tag();
platform.cpu_intr = TX_INTR;
platform.cpu_idle = NULL;
platform.cons_init = tx_cons_init;
platform.fb_init = tx_fb_init;
platform.mem_init = tx_mem_init;
platform.reboot = tx_reboot;
model = MIPS_PRID_REV(mips_options.mips_cpu_id);
switch (model) {
default:
cpuname_printf("Unknown TOSHIBA TX39-series %x", model);
break;
case TMPR3912:
tx39clock_cpuspeed(&cpuclock, &cpuspeed);
cpuname_printf("TOSHIBA TMPR3912 %d.%02d MHz",
cpuclock / 1000000, (cpuclock % 1000000) / 10000);
tc->tc_chipset = __TX391X;
break;
case TMPR3922:
tx39clock_cpuspeed(&cpuclock, &cpuspeed);
rev = tx_conf_read(tc, TX3922_REVISION_REG);
cpuname_printf("TOSHIBA TMPR3922 rev. %x.%x "
"%d.%02d MHz", (rev >> 4) & 0xf, rev & 0xf,
cpuclock / 1000000, (cpuclock % 1000000) / 10000);
tc->tc_chipset = __TX392X;
break;
}
}
void
tx_fb_init(void **kernend)
{
#ifdef TX391X
paddr_t fb_end;
fb_end = MIPS_KSEG0_TO_PHYS(mem_clusters[0].start +
mem_clusters[0].size - 1);
tx3912video_init(MIPS_KSEG0_TO_PHYS(*kernend), &fb_end);
*kernend = (void *)MIPS_PHYS_TO_KSEG0(fb_end);
#endif
#ifdef TX392X
bootinfo->fb_addr = 0;
#endif
}
void
tx_mem_init(paddr_t kernend)
{
mem_clusters[0].start = 0;
mem_clusters[0].size = kernend;
mem_cluster_cnt = 1;
tx_find_dram(kernend, 0x02000000);
tx_find_dram(0x02000000, 0x04000000);
}
void
tx_find_dram(paddr_t start, paddr_t end)
{
char *page, *startaddr, *endaddr;
uint32_t magic0, magic1;
#define MAGIC0 (*(volatile uint32_t *)(page + 0))
#define MAGIC1 (*(volatile uint32_t *)(page + 4))
startaddr = (char *)MIPS_PHYS_TO_KSEG1(start);
endaddr = (char *)MIPS_PHYS_TO_KSEG1(end);
page = startaddr;
if (badaddr(page, 4))
return;
do {
magic0 = random();
magic1 = random();
} while (MAGIC0 == magic0 || MAGIC0 == magic1);
MAGIC0 = magic0;
MAGIC1 = magic1;
wbflush();
if (MAGIC0 != magic0 || MAGIC1 != magic1)
return;
for (page += PAGE_SIZE; page < endaddr; page += PAGE_SIZE) {
if (badaddr(page, 4))
return;
if (MAGIC0 == magic0 &&
MAGIC1 == magic1) {
goto memend_found;
}
}
page -= PAGE_SIZE;
MAGIC0 = magic0;
MAGIC1 = magic1;
wbflush();
if (MAGIC0 != magic0 || MAGIC1 != magic1)
return;
memend_found:
mem_clusters[mem_cluster_cnt].start = start;
mem_clusters[mem_cluster_cnt].size = page - startaddr;
if (mem_cluster_cnt == 1)
mem_clusters[mem_cluster_cnt].size -= start;
mem_cluster_cnt++;
#undef MAGIC0
#undef MAGIC1
}
void
tx_reboot(int howto, char *bootstr)
{
goto *(uint32_t *)MIPS_RESET_EXC_VEC;
}
void
tx_cons_init(void)
{
int slot;
#define CONSPLATIDMATCH(p) \
platid_match(&platid, &platid_mask_MACH_##p)
#ifdef SERIALCONSSLOT
slot = SERIALCONSSLOT;
#else
slot = TX39_UARTA;
#endif
if (bootinfo->bi_cnuse & BI_CNUSE_SERIAL) {
if(txcom_cnattach(slot, CONSPEED,
(TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8)) {
panic("tx_cons_init: can't attach serial console.");
}
} else {
#if NM38813C > 0
if(CONSPLATIDMATCH(VICTOR_INTERLINK) &&
m38813c_cnattach(TX39_SYSADDR_CARD1)) {
goto panic;
}
#endif
#if NTC5165BUF > 0
if(CONSPLATIDMATCH(COMPAQ_C) &&
tc5165buf_cnattach(TX39_SYSADDR_CS3)) {
goto panic;
}
if(CONSPLATIDMATCH(SHARP_TELIOS) &&
tc5165buf_cnattach(TX39_SYSADDR_CS1)) {
goto panic;
}
if(CONSPLATIDMATCH(SHARP_MOBILON) &&
tc5165buf_cnattach(TX39_SYSADDR_MCS0)) {
goto panic;
}
#endif
}
return;
#if (NM38813C > 0) || (NTC5165BUF > 0)
panic:
#endif
panic("tx_cons_init: can't init console");
}
void
tx_conf_register_intr(tx_chipset_tag_t t, void *intrt)
{
KASSERT(t == &tx_chipset);
tx_chipset.tc_intrt = intrt;
}
void
tx_conf_register_power(tx_chipset_tag_t t, void *powert)
{
KASSERT(t == &tx_chipset);
tx_chipset.tc_powert = powert;
}
void
tx_conf_register_clock(tx_chipset_tag_t t, void *clockt)
{
KASSERT(t == &tx_chipset);
tx_chipset.tc_clockt = clockt;
}
void
tx_conf_register_sound(tx_chipset_tag_t t, void *soundt)
{
KASSERT(t == &tx_chipset);
tx_chipset.tc_soundt = soundt;
}
void
tx_conf_register_video(tx_chipset_tag_t t, void *videot)
{
KASSERT(t == &tx_chipset);
tx_chipset.tc_videot = videot;
}