XS_CTL_DATA_OUT
else if (flags & XS_CTL_DATA_OUT)
if (control & XS_CTL_DATA_OUT) {
if (xs->xs_control & XS_CTL_DATA_OUT)
if (flags & XS_CTL_DATA_OUT)
if (sr->sr_xs->xs_control & XS_CTL_DATA_OUT) {
if ((xs->xs_control & XS_CTL_DATA_OUT) != 0)
if (xs->xs_control & XS_CTL_DATA_OUT)
if (xs->xs_control & XS_CTL_DATA_OUT)
if (xs->xs_control & XS_CTL_DATA_OUT)
else if (acb->xs->xs_control & XS_CTL_DATA_OUT) {
switch (xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) {
case XS_CTL_DATA_OUT:
xs->datalen, (flags & XS_CTL_DATA_OUT) == 0);
((sc_xfer->xs_control & XS_CTL_DATA_OUT) ? AHCI_CMDH_F_WR : 0) |
return (scb->xs->xs_control & (XS_CTL_DATA_IN|XS_CTL_DATA_OUT));
CAM_DIR_OUT = XS_CTL_DATA_OUT,
return (scb->xs->xs_control & (XS_CTL_DATA_IN|XS_CTL_DATA_OUT));
else if (xs->xs_control & XS_CTL_DATA_OUT)
if ((flags & XS_CTL_DATA_OUT) != 0)
if (xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) {
if (xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) {
if (xs->xs_control & XS_CTL_DATA_OUT)
if (xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT))
if (xs->xs_control & XS_CTL_DATA_OUT)
else if (xs->xs_control & XS_CTL_DATA_OUT)
if (xs->xs_control & XS_CTL_DATA_OUT)
if ((sc_xfer->xs_control & XS_CTL_DATA_OUT) == 0 ||
expected_phase = (xs->xs_control & XS_CTL_DATA_OUT) ?
if ((xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) == 0) {
if (control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) {
if (control & XS_CTL_DATA_OUT) {
if ((control & XS_CTL_DATA_OUT) == 0) {
if (xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) {
if (xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) {
if (xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) {
if (xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) {
if ((sc_xfer->xs_control & XS_CTL_DATA_OUT))
(sc_xfer->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) ?
if (xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) {
if (xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) {
if (xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) {
if ((siop_cmd->xs->xs_control & (XS_CTL_DATA_OUT | XS_CTL_DATA_IN))
if (siop_cmd->xs->xs_control & XS_CTL_DATA_OUT) {
if ((siop_cmd->xs->xs_control & (XS_CTL_DATA_OUT | XS_CTL_DATA_IN))
if ((siop_cmd->xs->xs_control & (XS_CTL_DATA_OUT | XS_CTL_DATA_IN))
if ((xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) == 0) {
expected_phase = (xs->xs_control & XS_CTL_DATA_OUT) ?
((xs->xs_control & XS_CTL_DATA_OUT) == 0 ?
((xs->xs_control & XS_CTL_DATA_OUT) == 0 ?
if (((xs->xs_control & XS_CTL_DATA_OUT) == 0) &&
xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT),
xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT),
if ((xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) ==
if (xs->xs_control & XS_CTL_DATA_OUT)
if (xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) {
if (xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) {
if (ccb->c_flags & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT))
switch (xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) {
case XS_CTL_DATA_OUT:
switch (xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) {
case XS_CTL_DATA_OUT:
switch (xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) {
case XS_CTL_DATA_OUT:
if ((xs->xs_control & XS_CTL_DATA_OUT) != 0)
switch (xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) {
case XS_CTL_DATA_OUT:
if (xs->xs_control & XS_CTL_DATA_OUT)
switch (xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) {
case XS_CTL_DATA_OUT:
if (xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT) ||
if (xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) {
if ((xs->xs_control & (XS_CTL_DATA_IN|XS_CTL_DATA_OUT)) != 0)
if ((xs->xs_control & (XS_CTL_DATA_IN|XS_CTL_DATA_OUT)) != 0)
if (xs->xs_control & XS_CTL_DATA_OUT)
if ((sc_xfer->xs_control & XS_CTL_DATA_OUT) == 0 ||
CDRETRIES, 30000, NULL, XS_CTL_DATA_OUT);
CDRETRIES, 30000, NULL, XS_CTL_DATA_OUT);
CDRETRIES, 30000, NULL, XS_CTL_DATA_OUT);
flags = XS_CTL_DATA_OUT;
flags = XS_CTL_DATA_OUT;
flags = XS_CTL_DATA_OUT;
flags = XS_CTL_DATA_OUT;
flags = XS_CTL_DATA_OUT;
flags |= XS_CTL_DATA_OUT;
datalen ? XS_CTL_DATA_OUT : 0));
mybuf, len, DSE_RETRIES, DSE_TIMEOUT, NULL, XS_CTL_DATA_OUT);
DSE_TIMEOUT, NULL, XS_CTL_NOSLEEP | XS_CTL_DATA_OUT);
SETIMEOUT, NULL, XS_CTL_NOSLEEP | XS_CTL_DATA_OUT);
XS_CTL_DATA_OUT);
XS_CTL_DATA_OUT);
addr, ETHER_ADDR_LEN, SERETRIES, SETIMEOUT, NULL, XS_CTL_DATA_OUT);
addr, ETHER_ADDR_LEN, SERETRIES, SETIMEOUT, NULL, XS_CTL_DATA_OUT);
(void *)data, len, retries, timeout, NULL, flags | XS_CTL_DATA_OUT);
(void *)data, len, retries, timeout, NULL, flags | XS_CTL_DATA_OUT);
flags |= XS_CTL_DATA_OUT;
flags | XS_CTL_DATA_OUT);
XS_CTL_DATA_OUT;
flags |= XS_CTL_DATA_OUT;
flg = XS_CTL_DATA_OUT;
MUSTEK_RETRIES, 5000, NULL, XS_CTL_DATA_OUT);
MUSTEK_RETRIES, 5000, NULL, XS_CTL_DATA_OUT);
flags | XS_CTL_DATA_OUT);
flags |= XS_CTL_DATA_OUT;
(XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) {
case XS_CTL_DATA_OUT:
if ((xs->xs_control & XS_CTL_DATA_OUT) != 0)