#include <linux/bitfield.h>
#include <linux/bits.h>
#include <linux/cleanup.h>
#include <linux/extcon-provider.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/mux/consumer.h>
#include <linux/of.h>
#include <linux/phy/phy.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/regulator/consumer.h>
#include <linux/regulator/driver.h>
#include <linux/reset.h>
#include <linux/string.h>
#include <linux/usb/of.h>
#include <linux/workqueue.h>
#define USB2_INT_ENABLE 0x000
#define USB2_AHB_BUS_CTR 0x008
#define USB2_USBCTR 0x00c
#define USB2_REGEN_CG_CTRL 0x104
#define USB2_SPD_RSM_TIMSET 0x10c
#define USB2_OC_TIMSET 0x110
#define USB2_UTMI_CTRL 0x118
#define USB2_COMMCTRL 0x600
#define USB2_OBINTSTA 0x604
#define USB2_OBINTEN 0x608
#define USB2_VBCTRL 0x60c
#define USB2_LINECTRL1 0x610
#define USB2_ADPCTRL 0x630
#define USB2_INT_ENABLE_UCOM_INTEN BIT(3)
#define USB2_INT_ENABLE_USBH_INTB_EN BIT(2)
#define USB2_INT_ENABLE_USBH_INTA_EN BIT(1)
#define USB2_AHB_BUS_CTR_MBL_MASK GENMASK(1, 0)
#define USB2_AHB_BUS_CTR_MBL_INCR4 2
#define USB2_USBCTR_DIRPD BIT(2)
#define USB2_USBCTR_PLL_RST BIT(1)
#define USB2_REGEN_CG_CTRL_UPHY_WEN BIT(0)
#define USB2_SPD_RSM_TIMSET_INIT 0x014e029b
#define USB2_OC_TIMSET_INIT 0x000209ab
#define USB2_UTMI_CTRL_INIT 0x8000018f
#define USB2_COMMCTRL_OTG_PERI BIT(31)
#define USB2_OBINTSTA_CLEAR GENMASK(31, 0)
#define USB2_OBINT_SESSVLDCHG BIT(12)
#define USB2_OBINT_IDDIGCHG BIT(11)
#define USB2_OBINT_VBSTAINT BIT(3)
#define USB2_OBINT_IDCHG_EN BIT(0)
#define USB2_VBCTRL_VBSTA_MASK GENMASK(31, 28)
#define USB2_VBCTRL_VBSTA_DEFAULT 2
#define USB2_VBCTRL_VBLVL_MASK GENMASK(23, 20)
#define USB2_VBCTRL_VBLVL(m) FIELD_PREP_CONST(USB2_VBCTRL_VBLVL_MASK, (m))
#define USB2_VBCTRL_OCCLREN BIT(16)
#define USB2_VBCTRL_DRVVBUSSEL BIT(8)
#define USB2_VBCTRL_SIDDQREL BIT(2)
#define USB2_VBCTRL_VBOUT BIT(0)
#define USB2_LINECTRL1_DPRPD_EN BIT(19)
#define USB2_LINECTRL1_DP_RPD BIT(18)
#define USB2_LINECTRL1_DMRPD_EN BIT(17)
#define USB2_LINECTRL1_DM_RPD BIT(16)
#define USB2_LINECTRL1_OPMODE_NODRV BIT(6)
#define USB2_ADPCTRL_OTGSESSVLD BIT(20)
#define USB2_ADPCTRL_IDDIG BIT(19)
#define USB2_ADPCTRL_VBUSVALID BIT(18)
#define USB2_ADPCTRL_IDPULLUP BIT(5)
#define USB2_ADPCTRL_DRVVBUS BIT(4)
#define USB2_LINECTRL1_USB2_IDMON BIT(0)
#define NUM_OF_PHYS 4
enum rcar_gen3_phy_index {
PHY_INDEX_BOTH_HC,
PHY_INDEX_OHCI,
PHY_INDEX_EHCI,
PHY_INDEX_HSUSB
};
static const u32 rcar_gen3_int_enable[NUM_OF_PHYS] = {
USB2_INT_ENABLE_USBH_INTB_EN | USB2_INT_ENABLE_USBH_INTA_EN,
USB2_INT_ENABLE_USBH_INTA_EN,
USB2_INT_ENABLE_USBH_INTB_EN,
0
};
struct rcar_gen3_phy {
struct phy *phy;
struct rcar_gen3_chan *ch;
u32 int_enable_bits;
bool initialized;
bool powered;
};
struct rcar_gen3_chan {
void __iomem *base;
struct device *dev;
const struct rcar_gen3_phy_drv_data *phy_data;
struct extcon_dev *extcon;
struct reset_control *rstc;
struct rcar_gen3_phy rphys[NUM_OF_PHYS];
struct regulator *vbus;
struct work_struct work;
spinlock_t lock;
enum usb_dr_mode dr_mode;
bool extcon_host;
bool is_otg_channel;
bool uses_otg_pins;
bool otg_internal_reg;
};
struct rcar_gen3_phy_drv_data {
const struct phy_ops *phy_usb2_ops;
bool no_adp_ctrl;
bool init_bus;
bool utmi_ctrl;
bool vblvl_ctrl;
u32 obint_enable_bits;
};
static void rcar_gen3_phy_usb2_work(struct work_struct *work)
{
struct rcar_gen3_chan *ch = container_of(work, struct rcar_gen3_chan,
work);
if (ch->extcon_host) {
extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, true);
extcon_set_state_sync(ch->extcon, EXTCON_USB, false);
} else {
extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, false);
extcon_set_state_sync(ch->extcon, EXTCON_USB, true);
}
}
static void rcar_gen3_set_host_mode(struct rcar_gen3_chan *ch, int host)
{
void __iomem *usb2_base = ch->base;
u32 val = readl(usb2_base + USB2_COMMCTRL);
dev_vdbg(ch->dev, "%s: %08x, %d\n", __func__, val, host);
if (host)
val &= ~USB2_COMMCTRL_OTG_PERI;
else
val |= USB2_COMMCTRL_OTG_PERI;
writel(val, usb2_base + USB2_COMMCTRL);
}
static void rcar_gen3_set_linectrl(struct rcar_gen3_chan *ch, int dp, int dm)
{
void __iomem *usb2_base = ch->base;
u32 val = readl(usb2_base + USB2_LINECTRL1);
dev_vdbg(ch->dev, "%s: %08x, %d, %d\n", __func__, val, dp, dm);
val &= ~(USB2_LINECTRL1_DP_RPD | USB2_LINECTRL1_DM_RPD);
if (dp)
val |= USB2_LINECTRL1_DP_RPD;
if (dm)
val |= USB2_LINECTRL1_DM_RPD;
writel(val, usb2_base + USB2_LINECTRL1);
}
static void rcar_gen3_phy_usb2_set_vbus(struct rcar_gen3_chan *ch,
u32 vbus_ctrl_reg,
u32 vbus_ctrl_val,
bool enable)
{
void __iomem *usb2_base = ch->base;
u32 val;
val = readl(usb2_base + vbus_ctrl_reg);
if (enable)
val |= vbus_ctrl_val;
else
val &= ~vbus_ctrl_val;
writel(val, usb2_base + vbus_ctrl_reg);
dev_vdbg(ch->dev, "%s: reg=0x%08x, val=%08x, enable=%d\n",
__func__, vbus_ctrl_reg, val, enable);
}
static void rcar_gen3_enable_vbus_ctrl(struct rcar_gen3_chan *ch, int vbus)
{
if (ch->otg_internal_reg) {
regulator_hardware_enable(ch->vbus, vbus);
return;
}
if (ch->phy_data->no_adp_ctrl || ch->phy_data->vblvl_ctrl) {
if (ch->vbus)
regulator_hardware_enable(ch->vbus, vbus);
rcar_gen3_phy_usb2_set_vbus(ch, USB2_VBCTRL,
USB2_VBCTRL_VBOUT, vbus);
return;
}
rcar_gen3_phy_usb2_set_vbus(ch, USB2_ADPCTRL,
USB2_ADPCTRL_DRVVBUS, vbus);
}
static void rcar_gen3_control_otg_irq(struct rcar_gen3_chan *ch, int enable)
{
void __iomem *usb2_base = ch->base;
u32 val = readl(usb2_base + USB2_OBINTEN);
if (ch->uses_otg_pins && enable)
val |= ch->phy_data->obint_enable_bits;
else
val &= ~ch->phy_data->obint_enable_bits;
writel(val, usb2_base + USB2_OBINTEN);
}
static void rcar_gen3_init_for_host(struct rcar_gen3_chan *ch)
{
rcar_gen3_set_linectrl(ch, 1, 1);
rcar_gen3_set_host_mode(ch, 1);
rcar_gen3_enable_vbus_ctrl(ch, 1);
ch->extcon_host = true;
schedule_work(&ch->work);
}
static void rcar_gen3_init_for_peri(struct rcar_gen3_chan *ch)
{
rcar_gen3_set_linectrl(ch, 0, 1);
rcar_gen3_set_host_mode(ch, 0);
rcar_gen3_enable_vbus_ctrl(ch, 0);
ch->extcon_host = false;
schedule_work(&ch->work);
}
static void rcar_gen3_init_for_b_host(struct rcar_gen3_chan *ch)
{
void __iomem *usb2_base = ch->base;
u32 val;
val = readl(usb2_base + USB2_LINECTRL1);
writel(val | USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);
rcar_gen3_set_linectrl(ch, 1, 1);
rcar_gen3_set_host_mode(ch, 1);
rcar_gen3_enable_vbus_ctrl(ch, 0);
val = readl(usb2_base + USB2_LINECTRL1);
writel(val & ~USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);
}
static void rcar_gen3_init_for_a_peri(struct rcar_gen3_chan *ch)
{
rcar_gen3_set_linectrl(ch, 0, 1);
rcar_gen3_set_host_mode(ch, 0);
rcar_gen3_enable_vbus_ctrl(ch, 1);
}
static void rcar_gen3_init_from_a_peri_to_a_host(struct rcar_gen3_chan *ch)
{
rcar_gen3_control_otg_irq(ch, 0);
rcar_gen3_enable_vbus_ctrl(ch, 1);
rcar_gen3_init_for_host(ch);
rcar_gen3_control_otg_irq(ch, 1);
}
static bool rcar_gen3_check_id(struct rcar_gen3_chan *ch)
{
if (ch->phy_data->vblvl_ctrl) {
bool vbus_valid;
bool device;
device = !!(readl(ch->base + USB2_ADPCTRL) & USB2_ADPCTRL_IDDIG);
vbus_valid = !!(readl(ch->base + USB2_ADPCTRL) & USB2_ADPCTRL_VBUSVALID);
return vbus_valid ? device : !device;
}
if (!ch->uses_otg_pins)
return ch->dr_mode != USB_DR_MODE_HOST;
if (ch->phy_data->no_adp_ctrl)
return !!(readl(ch->base + USB2_LINECTRL1) & USB2_LINECTRL1_USB2_IDMON);
return !!(readl(ch->base + USB2_ADPCTRL) & USB2_ADPCTRL_IDDIG);
}
static void rcar_gen3_device_recognition(struct rcar_gen3_chan *ch)
{
if (!rcar_gen3_check_id(ch))
rcar_gen3_init_for_host(ch);
else
rcar_gen3_init_for_peri(ch);
}
static bool rcar_gen3_is_host(struct rcar_gen3_chan *ch)
{
return !(readl(ch->base + USB2_COMMCTRL) & USB2_COMMCTRL_OTG_PERI);
}
static enum phy_mode rcar_gen3_get_phy_mode(struct rcar_gen3_chan *ch)
{
if (rcar_gen3_is_host(ch))
return PHY_MODE_USB_HOST;
return PHY_MODE_USB_DEVICE;
}
static bool rcar_gen3_is_any_rphy_initialized(struct rcar_gen3_chan *ch)
{
int i;
for (i = 0; i < NUM_OF_PHYS; i++) {
if (ch->rphys[i].initialized)
return true;
}
return false;
}
static bool rcar_gen3_is_any_otg_rphy_initialized(struct rcar_gen3_chan *ch)
{
for (enum rcar_gen3_phy_index i = PHY_INDEX_BOTH_HC; i <= PHY_INDEX_EHCI;
i++) {
if (ch->rphys[i].initialized)
return true;
}
return false;
}
static bool rcar_gen3_are_all_rphys_power_off(struct rcar_gen3_chan *ch)
{
int i;
for (i = 0; i < NUM_OF_PHYS; i++) {
if (ch->rphys[i].powered)
return false;
}
return true;
}
static ssize_t role_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
bool is_b_device;
enum phy_mode cur_mode, new_mode;
guard(spinlock_irqsave)(&ch->lock);
if (!ch->is_otg_channel || !rcar_gen3_is_any_otg_rphy_initialized(ch))
return -EIO;
if (sysfs_streq(buf, "host"))
new_mode = PHY_MODE_USB_HOST;
else if (sysfs_streq(buf, "peripheral"))
new_mode = PHY_MODE_USB_DEVICE;
else
return -EINVAL;
is_b_device = rcar_gen3_check_id(ch);
cur_mode = rcar_gen3_get_phy_mode(ch);
if (cur_mode == new_mode)
return -EINVAL;
if (new_mode == PHY_MODE_USB_HOST) {
if (!is_b_device)
rcar_gen3_init_from_a_peri_to_a_host(ch);
else
rcar_gen3_init_for_b_host(ch);
} else {
if (!is_b_device)
rcar_gen3_init_for_a_peri(ch);
else
rcar_gen3_init_for_peri(ch);
}
return count;
}
static ssize_t role_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
if (!ch->is_otg_channel || !rcar_gen3_is_any_otg_rphy_initialized(ch))
return -EIO;
return sprintf(buf, "%s\n", rcar_gen3_is_host(ch) ? "host" :
"peripheral");
}
static DEVICE_ATTR_RW(role);
static void rcar_gen3_init_otg(struct rcar_gen3_chan *ch)
{
void __iomem *usb2_base = ch->base;
u32 val;
if (!ch->is_otg_channel || rcar_gen3_is_any_otg_rphy_initialized(ch))
return;
val = readl(usb2_base + USB2_LINECTRL1);
val = (val & ~USB2_LINECTRL1_DP_RPD) | USB2_LINECTRL1_DPRPD_EN |
USB2_LINECTRL1_DMRPD_EN | USB2_LINECTRL1_DM_RPD;
writel(val, usb2_base + USB2_LINECTRL1);
if (!ch->phy_data->no_adp_ctrl) {
if (ch->phy_data->vblvl_ctrl) {
val = readl(usb2_base + USB2_VBCTRL);
val = (val & ~USB2_VBCTRL_VBLVL_MASK) | USB2_VBCTRL_VBLVL(2);
writel(val, usb2_base + USB2_VBCTRL);
val = readl(usb2_base + USB2_ADPCTRL);
writel(val | USB2_ADPCTRL_IDPULLUP | USB2_ADPCTRL_DRVVBUS,
usb2_base + USB2_ADPCTRL);
} else {
val = readl(usb2_base + USB2_VBCTRL);
val &= ~USB2_VBCTRL_OCCLREN;
writel(val | USB2_VBCTRL_DRVVBUSSEL, usb2_base + USB2_VBCTRL);
val = readl(usb2_base + USB2_ADPCTRL);
writel(val | USB2_ADPCTRL_IDPULLUP, usb2_base + USB2_ADPCTRL);
}
}
mdelay(20);
writel(0xffffffff, usb2_base + USB2_OBINTSTA);
writel(ch->phy_data->obint_enable_bits, usb2_base + USB2_OBINTEN);
rcar_gen3_device_recognition(ch);
}
static void rcar_gen3_configure_vblvl_ctrl(struct rcar_gen3_chan *ch)
{
void __iomem *usb2_base = ch->base;
u32 val;
if (!ch->phy_data->vblvl_ctrl)
return;
val = readl(usb2_base + USB2_VBCTRL);
if ((val & USB2_VBCTRL_VBSTA_MASK) ==
FIELD_PREP_CONST(USB2_VBCTRL_VBSTA_MASK, USB2_VBCTRL_VBSTA_DEFAULT))
val &= ~USB2_VBCTRL_VBLVL_MASK;
else
val |= USB2_VBCTRL_VBLVL(USB2_VBCTRL_VBSTA_DEFAULT);
writel(val, usb2_base + USB2_VBCTRL);
}
static irqreturn_t rcar_gen3_phy_usb2_irq(int irq, void *_ch)
{
struct rcar_gen3_chan *ch = _ch;
void __iomem *usb2_base = ch->base;
struct device *dev = ch->dev;
irqreturn_t ret = IRQ_NONE;
u32 status;
pm_runtime_get_noresume(dev);
if (pm_runtime_suspended(dev))
goto rpm_put;
scoped_guard(spinlock, &ch->lock) {
status = readl(usb2_base + USB2_OBINTSTA);
if (status & ch->phy_data->obint_enable_bits) {
dev_vdbg(dev, "%s: %08x\n", __func__, status);
if (ch->phy_data->vblvl_ctrl)
writel(USB2_OBINTSTA_CLEAR, usb2_base + USB2_OBINTSTA);
else
writel(ch->phy_data->obint_enable_bits, usb2_base + USB2_OBINTSTA);
rcar_gen3_device_recognition(ch);
rcar_gen3_configure_vblvl_ctrl(ch);
ret = IRQ_HANDLED;
}
}
rpm_put:
pm_runtime_put_noidle(dev);
return ret;
}
static int rcar_gen3_phy_usb2_init(struct phy *p)
{
struct rcar_gen3_phy *rphy = phy_get_drvdata(p);
struct rcar_gen3_chan *channel = rphy->ch;
void __iomem *usb2_base = channel->base;
u32 val;
guard(spinlock_irqsave)(&channel->lock);
val = readl(usb2_base + USB2_INT_ENABLE);
val |= USB2_INT_ENABLE_UCOM_INTEN | rphy->int_enable_bits;
writel(val, usb2_base + USB2_INT_ENABLE);
if (!rcar_gen3_is_any_rphy_initialized(channel)) {
writel(USB2_SPD_RSM_TIMSET_INIT, usb2_base + USB2_SPD_RSM_TIMSET);
writel(USB2_OC_TIMSET_INIT, usb2_base + USB2_OC_TIMSET);
}
if (rphy->int_enable_bits)
rcar_gen3_init_otg(channel);
if (channel->phy_data->vblvl_ctrl) {
writel(readl(usb2_base + USB2_VBCTRL) | USB2_VBCTRL_SIDDQREL,
usb2_base + USB2_VBCTRL);
udelay(250);
}
if (channel->phy_data->utmi_ctrl) {
val = readl(usb2_base + USB2_REGEN_CG_CTRL) | USB2_REGEN_CG_CTRL_UPHY_WEN;
writel(val, usb2_base + USB2_REGEN_CG_CTRL);
writel(USB2_UTMI_CTRL_INIT, usb2_base + USB2_UTMI_CTRL);
writel(val & ~USB2_REGEN_CG_CTRL_UPHY_WEN, usb2_base + USB2_REGEN_CG_CTRL);
}
rphy->initialized = true;
return 0;
}
static int rcar_gen3_phy_usb2_exit(struct phy *p)
{
struct rcar_gen3_phy *rphy = phy_get_drvdata(p);
struct rcar_gen3_chan *channel = rphy->ch;
void __iomem *usb2_base = channel->base;
u32 val;
guard(spinlock_irqsave)(&channel->lock);
rphy->initialized = false;
val = readl(usb2_base + USB2_INT_ENABLE);
val &= ~rphy->int_enable_bits;
if (!rcar_gen3_is_any_rphy_initialized(channel))
val &= ~USB2_INT_ENABLE_UCOM_INTEN;
writel(val, usb2_base + USB2_INT_ENABLE);
return 0;
}
static int rcar_gen3_phy_usb2_power_on(struct phy *p)
{
struct rcar_gen3_phy *rphy = phy_get_drvdata(p);
struct rcar_gen3_chan *channel = rphy->ch;
void __iomem *usb2_base = channel->base;
u32 val;
int ret = 0;
if (channel->vbus && !channel->otg_internal_reg) {
ret = regulator_enable(channel->vbus);
if (ret)
return ret;
}
guard(spinlock_irqsave)(&channel->lock);
if (!rcar_gen3_are_all_rphys_power_off(channel))
goto out;
val = readl(usb2_base + USB2_USBCTR);
val |= USB2_USBCTR_PLL_RST;
writel(val, usb2_base + USB2_USBCTR);
val &= ~USB2_USBCTR_PLL_RST;
writel(val, usb2_base + USB2_USBCTR);
out:
rphy->powered = true;
return 0;
}
static int rcar_gen3_phy_usb2_power_off(struct phy *p)
{
struct rcar_gen3_phy *rphy = phy_get_drvdata(p);
struct rcar_gen3_chan *channel = rphy->ch;
int ret = 0;
scoped_guard(spinlock_irqsave, &channel->lock) {
rphy->powered = false;
if (rcar_gen3_are_all_rphys_power_off(channel)) {
u32 val = readl(channel->base + USB2_USBCTR);
val |= USB2_USBCTR_PLL_RST;
writel(val, channel->base + USB2_USBCTR);
}
}
if (channel->vbus && !channel->otg_internal_reg)
ret = regulator_disable(channel->vbus);
return ret;
}
static const struct phy_ops rcar_gen3_phy_usb2_ops = {
.init = rcar_gen3_phy_usb2_init,
.exit = rcar_gen3_phy_usb2_exit,
.power_on = rcar_gen3_phy_usb2_power_on,
.power_off = rcar_gen3_phy_usb2_power_off,
.owner = THIS_MODULE,
};
static const struct phy_ops rz_g1c_phy_usb2_ops = {
.init = rcar_gen3_phy_usb2_init,
.exit = rcar_gen3_phy_usb2_exit,
.owner = THIS_MODULE,
};
static const struct rcar_gen3_phy_drv_data rcar_gen3_phy_usb2_data = {
.phy_usb2_ops = &rcar_gen3_phy_usb2_ops,
.no_adp_ctrl = false,
.obint_enable_bits = USB2_OBINT_SESSVLDCHG |
USB2_OBINT_IDDIGCHG,
};
static const struct rcar_gen3_phy_drv_data rz_g1c_phy_usb2_data = {
.phy_usb2_ops = &rz_g1c_phy_usb2_ops,
.no_adp_ctrl = false,
.obint_enable_bits = USB2_OBINT_SESSVLDCHG |
USB2_OBINT_IDDIGCHG,
};
static const struct rcar_gen3_phy_drv_data rz_g2l_phy_usb2_data = {
.phy_usb2_ops = &rcar_gen3_phy_usb2_ops,
.no_adp_ctrl = true,
.obint_enable_bits = USB2_OBINT_IDCHG_EN,
};
static const struct rcar_gen3_phy_drv_data rz_g3s_phy_usb2_data = {
.phy_usb2_ops = &rcar_gen3_phy_usb2_ops,
.no_adp_ctrl = true,
.init_bus = true,
.obint_enable_bits = USB2_OBINT_IDCHG_EN,
};
static const struct rcar_gen3_phy_drv_data rz_t2h_phy_usb2_data = {
.phy_usb2_ops = &rcar_gen3_phy_usb2_ops,
.vblvl_ctrl = true,
.obint_enable_bits = USB2_OBINT_IDCHG_EN | USB2_OBINT_VBSTAINT,
};
static const struct rcar_gen3_phy_drv_data rz_v2h_phy_usb2_data = {
.phy_usb2_ops = &rcar_gen3_phy_usb2_ops,
.no_adp_ctrl = true,
.utmi_ctrl = true,
.obint_enable_bits = USB2_OBINT_IDCHG_EN,
};
static const struct of_device_id rcar_gen3_phy_usb2_match_table[] = {
{
.compatible = "renesas,usb2-phy-r8a77470",
.data = &rz_g1c_phy_usb2_data,
},
{
.compatible = "renesas,usb2-phy-r8a7795",
.data = &rcar_gen3_phy_usb2_data,
},
{
.compatible = "renesas,usb2-phy-r8a7796",
.data = &rcar_gen3_phy_usb2_data,
},
{
.compatible = "renesas,usb2-phy-r8a77965",
.data = &rcar_gen3_phy_usb2_data,
},
{
.compatible = "renesas,usb2-phy-r9a08g045",
.data = &rz_g3s_phy_usb2_data,
},
{
.compatible = "renesas,usb2-phy-r9a09g057",
.data = &rz_v2h_phy_usb2_data,
},
{
.compatible = "renesas,usb2-phy-r9a09g077",
.data = &rz_t2h_phy_usb2_data,
},
{
.compatible = "renesas,rzg2l-usb2-phy",
.data = &rz_g2l_phy_usb2_data,
},
{
.compatible = "renesas,rcar-gen3-usb2-phy",
.data = &rcar_gen3_phy_usb2_data,
},
{ },
};
MODULE_DEVICE_TABLE(of, rcar_gen3_phy_usb2_match_table);
static const unsigned int rcar_gen3_phy_cable[] = {
EXTCON_USB,
EXTCON_USB_HOST,
EXTCON_NONE,
};
static struct phy *rcar_gen3_phy_usb2_xlate(struct device *dev,
const struct of_phandle_args *args)
{
struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
if (args->args_count == 0)
return ch->rphys[PHY_INDEX_BOTH_HC].phy;
else if (args->args_count > 1)
return ERR_PTR(-ENODEV);
if (args->args[0] >= NUM_OF_PHYS)
return ERR_PTR(-ENODEV);
return ch->rphys[args->args[0]].phy;
}
static enum usb_dr_mode rcar_gen3_get_dr_mode(struct device_node *np)
{
enum usb_dr_mode candidate = USB_DR_MODE_UNKNOWN;
int i;
for (i = 0; i < NUM_OF_PHYS; i++) {
enum usb_dr_mode mode = of_usb_get_dr_mode_by_phy(np, i);
if (mode != USB_DR_MODE_UNKNOWN) {
if (candidate == USB_DR_MODE_UNKNOWN)
candidate = mode;
else if (candidate != mode)
return USB_DR_MODE_UNKNOWN;
}
}
return candidate;
}
static void rcar_gen3_reset_assert(void *data)
{
reset_control_assert(data);
}
static int rcar_gen3_phy_usb2_init_bus(struct rcar_gen3_chan *channel)
{
struct device *dev = channel->dev;
int ret;
u32 val;
if (!channel->phy_data->init_bus)
return 0;
ret = pm_runtime_resume_and_get(dev);
if (ret)
return ret;
val = readl(channel->base + USB2_AHB_BUS_CTR);
val &= ~USB2_AHB_BUS_CTR_MBL_MASK;
val |= USB2_AHB_BUS_CTR_MBL_INCR4;
writel(val, channel->base + USB2_AHB_BUS_CTR);
pm_runtime_put(dev);
return 0;
}
static int rcar_gen3_phy_usb2_regulator_endisable(struct regulator_dev *rdev,
bool enable)
{
struct rcar_gen3_chan *channel = rdev_get_drvdata(rdev);
struct device *dev = channel->dev;
int ret;
ret = pm_runtime_resume_and_get(dev);
if (ret < 0) {
dev_warn(dev, "pm_runtime_get failed: %i\n", ret);
return ret;
}
rcar_gen3_phy_usb2_set_vbus(channel, USB2_VBCTRL,
USB2_VBCTRL_VBOUT, enable);
pm_runtime_put_noidle(dev);
return ret;
}
static int rcar_gen3_phy_usb2_regulator_enable(struct regulator_dev *rdev)
{
return rcar_gen3_phy_usb2_regulator_endisable(rdev, true);
}
static int rcar_gen3_phy_usb2_regulator_disable(struct regulator_dev *rdev)
{
return rcar_gen3_phy_usb2_regulator_endisable(rdev, false);
}
static int rcar_gen3_phy_usb2_regulator_is_enabled(struct regulator_dev *rdev)
{
struct rcar_gen3_chan *channel = rdev_get_drvdata(rdev);
void __iomem *usb2_base = channel->base;
struct device *dev = channel->dev;
u32 vbus_ctrl_reg = USB2_VBCTRL;
u32 val;
int ret;
ret = pm_runtime_resume_and_get(dev);
if (ret < 0) {
dev_warn(dev, "pm_runtime_get failed: %i\n", ret);
return ret;
}
val = readl(usb2_base + vbus_ctrl_reg);
pm_runtime_put_noidle(dev);
dev_dbg(channel->dev, "%s: %08x\n", __func__, val);
return (val & USB2_VBCTRL_VBOUT) ? 1 : 0;
}
static const struct regulator_ops rcar_gen3_phy_usb2_regulator_ops = {
.enable = rcar_gen3_phy_usb2_regulator_enable,
.disable = rcar_gen3_phy_usb2_regulator_disable,
.is_enabled = rcar_gen3_phy_usb2_regulator_is_enabled,
};
static const struct regulator_desc rcar_gen3_phy_usb2_regulator = {
.name = "otg-vbus-regulator",
.of_match = of_match_ptr("vbus-regulator"),
.ops = &rcar_gen3_phy_usb2_regulator_ops,
.type = REGULATOR_VOLTAGE,
.owner = THIS_MODULE,
.fixed_uV = 5000000,
.n_voltages = 1,
};
static void rcar_gen3_phy_usb2_vbus_disable_action(void *data)
{
struct regulator *vbus = data;
regulator_disable(vbus);
}
static int rcar_gen3_phy_usb2_vbus_regulator_get_exclusive_enable(struct rcar_gen3_chan *channel,
bool enable)
{
struct device *dev = channel->dev;
int ret;
channel->vbus = devm_regulator_get_exclusive(dev, "vbus");
if (IS_ERR(channel->vbus))
return PTR_ERR(channel->vbus);
if (!enable)
return 0;
ret = regulator_enable(channel->vbus);
if (ret)
return ret;
return devm_add_action_or_reset(dev, rcar_gen3_phy_usb2_vbus_disable_action,
channel->vbus);
}
static int rcar_gen3_phy_usb2_vbus_regulator_register(struct rcar_gen3_chan *channel)
{
struct device *dev = channel->dev;
struct regulator_config rcfg = { .dev = dev, };
struct regulator_dev *rdev;
bool enable = false;
rcfg.of_node = of_get_available_child_by_name(dev->of_node,
"vbus-regulator");
if (rcfg.of_node) {
rcfg.driver_data = channel;
rdev = devm_regulator_register(dev, &rcar_gen3_phy_usb2_regulator,
&rcfg);
of_node_put(rcfg.of_node);
if (IS_ERR(rdev))
return dev_err_probe(dev, PTR_ERR(rdev),
"Failed to create vbus-regulator\n");
channel->otg_internal_reg = true;
enable = true;
}
return rcar_gen3_phy_usb2_vbus_regulator_get_exclusive_enable(channel, enable);
}
static inline struct mux_state *
devm_mux_state_get_optional(struct device *dev, const char *mux_name)
{
if (!of_property_present(dev->of_node, "mux-states"))
return NULL;
return devm_mux_state_get(dev, mux_name);
}
static void rcar_gen3_phy_mux_state_deselect(void *data)
{
mux_state_deselect(data);
}
static int rcar_gen3_phy_usb2_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct rcar_gen3_chan *channel;
struct phy_provider *provider;
struct mux_state *mux_state;
int ret = 0, i, irq;
if (!dev->of_node) {
dev_err(dev, "This driver needs device tree\n");
return -EINVAL;
}
channel = devm_kzalloc(dev, sizeof(*channel), GFP_KERNEL);
if (!channel)
return -ENOMEM;
channel->base = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(channel->base))
return PTR_ERR(channel->base);
channel->dr_mode = rcar_gen3_get_dr_mode(dev->of_node);
if (channel->dr_mode != USB_DR_MODE_UNKNOWN) {
channel->is_otg_channel = true;
channel->uses_otg_pins = !of_property_read_bool(dev->of_node,
"renesas,no-otg-pins");
channel->extcon = devm_extcon_dev_allocate(dev,
rcar_gen3_phy_cable);
if (IS_ERR(channel->extcon))
return PTR_ERR(channel->extcon);
ret = devm_extcon_dev_register(dev, channel->extcon);
if (ret < 0) {
dev_err(dev, "Failed to register extcon\n");
return ret;
}
}
channel->rstc = devm_reset_control_array_get_optional_shared(dev);
if (IS_ERR(channel->rstc))
return PTR_ERR(channel->rstc);
ret = reset_control_deassert(channel->rstc);
if (ret)
return ret;
ret = devm_add_action_or_reset(dev, rcar_gen3_reset_assert, channel->rstc);
if (ret)
return ret;
ret = devm_pm_runtime_enable(dev);
if (ret)
return dev_err_probe(dev, ret, "Failed to enable pm_runtime\n");
channel->phy_data = of_device_get_match_data(dev);
if (!channel->phy_data)
return -EINVAL;
platform_set_drvdata(pdev, channel);
channel->dev = dev;
ret = rcar_gen3_phy_usb2_init_bus(channel);
if (ret)
return ret;
spin_lock_init(&channel->lock);
for (i = 0; i < NUM_OF_PHYS; i++) {
channel->rphys[i].phy = devm_phy_create(dev, NULL,
channel->phy_data->phy_usb2_ops);
if (IS_ERR(channel->rphys[i].phy))
return dev_err_probe(dev, PTR_ERR(channel->rphys[i].phy),
"Failed to create USB2 PHY\n");
channel->rphys[i].ch = channel;
channel->rphys[i].int_enable_bits = rcar_gen3_int_enable[i];
phy_set_drvdata(channel->rphys[i].phy, &channel->rphys[i]);
}
mux_state = devm_mux_state_get_optional(dev, NULL);
if (IS_ERR(mux_state))
return PTR_ERR(mux_state);
if (mux_state) {
ret = mux_state_select(mux_state);
if (ret)
return dev_err_probe(dev, ret, "Failed to select USB mux\n");
ret = devm_add_action_or_reset(dev, rcar_gen3_phy_mux_state_deselect,
mux_state);
if (ret)
return dev_err_probe(dev, ret,
"Failed to register USB mux state deselect\n");
}
if (channel->phy_data->no_adp_ctrl && channel->is_otg_channel) {
ret = rcar_gen3_phy_usb2_vbus_regulator_register(channel);
if (ret)
return ret;
} else {
channel->vbus = devm_regulator_get_optional(dev, "vbus");
}
if (IS_ERR(channel->vbus)) {
if (PTR_ERR(channel->vbus) == -EPROBE_DEFER)
return PTR_ERR(channel->vbus);
channel->vbus = NULL;
}
irq = platform_get_irq_optional(pdev, 0);
if (irq < 0 && irq != -ENXIO) {
return irq;
} else if (irq > 0) {
INIT_WORK(&channel->work, rcar_gen3_phy_usb2_work);
ret = devm_request_irq(dev, irq, rcar_gen3_phy_usb2_irq,
IRQF_SHARED, dev_name(dev), channel);
if (ret < 0)
return dev_err_probe(dev, ret,
"Failed to request irq (%d)\n",
irq);
}
provider = devm_of_phy_provider_register(dev, rcar_gen3_phy_usb2_xlate);
if (IS_ERR(provider)) {
return dev_err_probe(dev, PTR_ERR(provider),
"Failed to register PHY provider\n");
} else if (channel->is_otg_channel) {
ret = device_create_file(dev, &dev_attr_role);
if (ret < 0)
return ret;
}
return 0;
}
static void rcar_gen3_phy_usb2_remove(struct platform_device *pdev)
{
struct rcar_gen3_chan *channel = platform_get_drvdata(pdev);
if (channel->is_otg_channel)
device_remove_file(&pdev->dev, &dev_attr_role);
}
static int rcar_gen3_phy_usb2_suspend(struct device *dev)
{
struct rcar_gen3_chan *channel = dev_get_drvdata(dev);
return reset_control_assert(channel->rstc);
}
static int rcar_gen3_phy_usb2_resume(struct device *dev)
{
struct rcar_gen3_chan *channel = dev_get_drvdata(dev);
int ret;
ret = reset_control_deassert(channel->rstc);
if (ret)
return ret;
ret = rcar_gen3_phy_usb2_init_bus(channel);
if (ret)
reset_control_assert(channel->rstc);
return ret;
}
static DEFINE_SIMPLE_DEV_PM_OPS(rcar_gen3_phy_usb2_pm_ops,
rcar_gen3_phy_usb2_suspend,
rcar_gen3_phy_usb2_resume);
static struct platform_driver rcar_gen3_phy_usb2_driver = {
.driver = {
.name = "phy_rcar_gen3_usb2",
.of_match_table = rcar_gen3_phy_usb2_match_table,
.pm = pm_ptr(&rcar_gen3_phy_usb2_pm_ops),
},
.probe = rcar_gen3_phy_usb2_probe,
.remove = rcar_gen3_phy_usb2_remove,
};
module_platform_driver(rcar_gen3_phy_usb2_driver);
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("Renesas R-Car Gen3 USB 2.0 PHY");
MODULE_AUTHOR("Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>");
