arch/alpha/include/asm/io.h
259
extern u16 __raw_readw(const volatile void __iomem *addr);
arch/alpha/include/asm/io.h
267
#define __raw_readw __raw_readw
arch/alpha/include/asm/io.h
471
ret = __raw_readw(addr);
arch/alpha/include/asm/io.h
574
return __raw_readw(addr);
arch/alpha/include/asm/vga.h
29
return __raw_readw((volatile const u16 __iomem *) addr);
arch/alpha/kernel/io.c
164
EXPORT_SYMBOL(__raw_readw);
arch/alpha/kernel/io.c
185
ret = __raw_readw(addr);
arch/alpha/kernel/io.c
254
return __raw_readw(addr);
arch/alpha/kernel/io.c
514
*(u16 *)to = __raw_readw(from);
arch/alpha/kernel/io.c
672
u16 tmp = __raw_readw(ios++);
arch/arc/include/asm/io.h
221
__raw_readw(c)); __r; })
arch/arc/include/asm/io.h
39
#define ioread16be(p) ({ u16 __v = be16_to_cpu((__force __be16)__raw_readw(p)); __iormb(); __v; })
arch/arc/include/asm/io.h
59
#define __raw_readw __raw_readw
arch/arm/include/asm/io.h
243
__raw_readw(__io(p))); __iormb(); __v; })
arch/arm/include/asm/io.h
276
__raw_readw(c)); __r; })
arch/arm/include/asm/io.h
390
#define ioread16be(p) ({ __u16 __v = be16_to_cpu((__force __be16)__raw_readw(p)); __iormb(); __v; })
arch/arm/include/asm/io.h
74
#define __raw_readw __raw_readw
arch/arm/mach-omap1/clock.c
196
regval32 = __raw_readw(clk->enable_reg);
arch/arm/mach-omap1/clock.c
222
dsor = 1 << (3 & (__raw_readw(DSP_CKCTL) >> clk->rate_offset));
arch/arm/mach-omap1/clock.c
276
regval = __raw_readw(DSP_CKCTL);
arch/arm/mach-omap1/clock.c
422
ratio_bits |= __raw_readw(clk->enable_reg) & ~0xfd;
arch/arm/mach-omap1/clock.c
489
ratio_bits = __raw_readw(clk->enable_reg) & ~1;
arch/arm/mach-omap1/clock.c
557
regval16 = __raw_readw(clk->enable_reg);
arch/arm/mach-omap1/clock.c
602
regval16 = __raw_readw(clk->enable_reg);
arch/arm/mach-omap1/dma.c
195
val = __raw_readw(addr);
arch/arm/mach-omap1/dma.c
197
val |= __raw_readw(addr + 2) << 16;
arch/arm/mach-omap1/io.c
83
return __raw_readw(OMAP1_IO_ADDRESS(pa));
arch/arm/mach-omap1/mcbsp.c
53
__raw_writew(__raw_readw(DSP_RSTCT2) | DPS_RSTCT2_PER_EN |
arch/arm/mach-omap1/pm.h
132
#define DSP_SAVE(x) dsp_sleep_save[DSP_SLEEP_SAVE_##x] = __raw_readw(x)
arch/arm/mach-omap1/reset.c
51
rs = __raw_readw(OMAP1_IO_ADDRESS(ARM_SYSST));
arch/arm64/include/asm/io.h
298
#define ioread16be(p) ({ __u16 __v = be16_to_cpu((__force __be16)__raw_readw(p)); __iormb(__v); __v; })
arch/arm64/include/asm/io.h
64
#define __raw_readw __raw_readw
arch/hexagon/include/asm/io.h
63
#define __raw_readw __raw_readw
arch/m68k/coldfire/intc-2.c
170
pa = __raw_readw(MCFEPORT_EPPAR);
arch/m68k/coldfire/intc-simr.c
154
pa = __raw_readw(MCFEPORT_EPPAR);
arch/m68k/coldfire/intc.c
48
imr = __raw_readw(MCFSIM_IMR);
arch/m68k/coldfire/intc.c
55
imr = __raw_readw(MCFSIM_IMR);
arch/m68k/coldfire/intc.c
62
imr = __raw_readw(MCFSIM_IMR);
arch/m68k/coldfire/pci.c
80
*value = le16_to_cpu(__raw_readw(addr));
arch/m68k/coldfire/pit.c
104
pcsr = __raw_readw(TA(MCFPIT_PCSR));
arch/m68k/coldfire/pit.c
121
pcntr = __raw_readw(TA(MCFPIT_PCNTR));
arch/m68k/coldfire/timers.c
44
#define __raw_readtrr __raw_readw
arch/m68k/coldfire/timers.c
91
tcn = __raw_readw(TA(MCFTIMER_TCN));
arch/m68k/include/asm/io_no.h
102
#define readw __raw_readw
arch/m68k/include/asm/io_no.h
69
return __raw_readw(addr);
arch/m68k/include/asm/io_no.h
70
return swab16(__raw_readw(addr));
arch/m68k/include/asm/mcfgpio.h
107
#define mcfgpio_read(port) __raw_readw(port)
arch/microblaze/include/asm/io.h
42
#define in_be16(a) __raw_readw(a)
arch/microblaze/include/asm/io.h
52
#define in_le16(a) __le16_to_cpu(__raw_readw(a))
arch/mips/alchemy/devboards/bcsr.c
56
r = __raw_readw(bcsr_regs[reg].raddr);
arch/mips/alchemy/devboards/bcsr.c
79
r = __raw_readw(bcsr_regs[reg].raddr);
arch/mips/alchemy/devboards/bcsr.c
93
unsigned short bisr = __raw_readw(bcsr_virt + BCSR_REG_INTSTAT);
arch/mips/include/asm/io.h
361
be16_to_cpu(__raw_readw((__force unsigned *)(addr)))
arch/mips/include/asm/io.h
493
#define __raw_readw __raw_readw
arch/mips/pci/ops-tx4927.c
106
return __raw_readw((void __iomem *)&pcicptr->g2pcfgdata + offset);
arch/parisc/lib/iomap.c
169
return __raw_readw(addr);
arch/parisc/lib/iomap.c
242
*(u16 *)dst = __raw_readw(addr);
arch/powerpc/kvm/book3s_xive.c
51
ack = be16_to_cpu(__raw_readw(xive_tima + TM_SPC_ACK_OS_REG));
arch/powerpc/sysdev/xive/native.c
347
ack = be16_to_cpu(__raw_readw(xive_tima + TM_SPC_ACK_HV_REG));
arch/powerpc/sysdev/xive/spapr.c
616
ack = be16_to_cpu(__raw_readw(xive_tima + TM_SPC_ACK_OS_REG));
arch/riscv/include/asm/mmio.h
54
#define __raw_readw __raw_readw
arch/riscv/include/asm/mmio.h
89
#define readw_cpu(c) ({ u16 __r = le16_to_cpu((__force __le16)__raw_readw(c)); __r; })
arch/sh/boards/board-polaris.c
103
wcr = __raw_readw(WCR2);
arch/sh/boards/board-polaris.c
109
bcr_mask = __raw_readw(BCR2);
arch/sh/boards/board-urquell.c
155
__raw_writew(__raw_readw(UBOARDREG(IRL2MSKR)) & ~0x00000001,
arch/sh/boards/board-urquell.c
175
return __raw_readw(UBOARDREG(MDSWMR));
arch/sh/boards/mach-ap325rxa/setup.c
480
__raw_writew(__raw_readw(PORT_MSELCRB) & ~0x0001, PORT_MSELCRB);
arch/sh/boards/mach-ecovec24/setup.c
1134
__raw_writew((__raw_readw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA);
arch/sh/boards/mach-ecovec24/setup.c
1204
__raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);
arch/sh/boards/mach-ecovec24/setup.c
1214
__raw_writew((__raw_readw(IODRIVEA) & ~0x00c0) | 0x0080 , IODRIVEA);
arch/sh/boards/mach-ecovec24/setup.c
1357
__raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000,
arch/sh/boards/mach-highlander/irq-r7780mp.c
64
if ((__raw_readw(0xa4000700) & 0xf000) == 0x2000) {
arch/sh/boards/mach-highlander/irq-r7780rp.c
57
if (__raw_readw(0xa5000600)) {
arch/sh/boards/mach-highlander/irq-r7785rp.c
66
if ((__raw_readw(0xa4000158) & 0xf000) != 0x1000)
arch/sh/boards/mach-highlander/psw.c
24
l = __raw_readw(PA_DBSW);
arch/sh/boards/mach-highlander/setup.c
313
__raw_writew(__raw_readw(PA_IVDRCTL) | (1 << IVDR_CK_ON), PA_IVDRCTL);
arch/sh/boards/mach-highlander/setup.c
319
__raw_writew(__raw_readw(PA_IVDRCTL) & ~(1 << IVDR_CK_ON), PA_IVDRCTL);
arch/sh/boards/mach-highlander/setup.c
351
u16 ver = __raw_readw(PA_VERREG);
arch/sh/boards/mach-highlander/setup.c
383
__raw_writew(__raw_readw(PA_IVDRCTL) | 0x01, PA_IVDRCTL); /* Si13112 */
arch/sh/boards/mach-hp6xx/pm.c
55
frqcr = __raw_readw(FRQCR);
arch/sh/boards/mach-hp6xx/pm.c
64
mcr = __raw_readw(MCR);
arch/sh/boards/mach-hp6xx/pm.c
85
frqcr = __raw_readw(FRQCR);
arch/sh/boards/mach-hp6xx/setup.c
160
v = __raw_readw(SCPCR);
arch/sh/boards/mach-kfr2r09/setup.c
462
__raw_writew((__raw_readw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB);
arch/sh/boards/mach-kfr2r09/setup.c
596
__raw_writew((__raw_readw(DRVCRB) & ~0x0003) | 0x0001, DRVCRB);
arch/sh/boards/mach-landisk/gio.c
98
data = __raw_readw(addr);
arch/sh/boards/mach-migor/setup.c
568
__raw_writew(__raw_readw(PORT_MSELCRB) | 0x2000, PORT_MSELCRB); /* D15->D8 */
arch/sh/boards/mach-migor/setup.c
581
__raw_writew(__raw_readw(PORT_MSELCRA) | 1, PORT_MSELCRA);
arch/sh/boards/mach-r2d/irq.c
133
switch (__raw_readw(PA_VERREG) & 0xf0) {
arch/sh/boards/mach-r2d/irq.c
151
__raw_readw(PA_VERREG));
arch/sh/boards/mach-r2d/setup.c
271
u16 ver = __raw_readw(PA_VERREG);
arch/sh/boards/mach-sdk7780/setup.c
74
u16 ver = __raw_readw(FPGA_FPVERR);
arch/sh/boards/mach-sdk7780/setup.c
75
u16 dateStamp = __raw_readw(FPGA_FPDATER);
arch/sh/boards/mach-se/7206/irq.c
100
sts0 = __raw_readw(INTSTS0);
arch/sh/boards/mach-se/7206/irq.c
101
sts1 = __raw_readw(INTSTS1);
arch/sh/boards/mach-se/7206/irq.c
143
__raw_writew(__raw_readw(INTC_ICR1) | 0x000b, INTC_ICR1); /* ICR1 */
arch/sh/boards/mach-se/7206/irq.c
37
val = __raw_readw(INTC_IPR01);
arch/sh/boards/mach-se/7206/irq.c
41
msk0 = __raw_readw(INTMSK0);
arch/sh/boards/mach-se/7206/irq.c
42
msk1 = __raw_readw(INTMSK1);
arch/sh/boards/mach-se/7206/irq.c
68
val = __raw_readw(INTC_IPR01);
arch/sh/boards/mach-se/7206/irq.c
73
msk0 = __raw_readw(INTMSK0);
arch/sh/boards/mach-se/7206/irq.c
74
msk1 = __raw_readw(INTMSK1);
arch/sh/boards/mach-se/7721/irq.c
38
__raw_writew(__raw_readw(0xa4050118) & ~0x00ff, 0xa4050118);
arch/sh/boards/mach-se/7722/setup.c
179
__raw_writew(__raw_readw(PORT_HIZCRA) & ~0x4000, PORT_HIZCRA);
arch/sh/boards/mach-se/7722/setup.c
180
__raw_writew(__raw_readw(PORT_HIZCRC) & ~0xc000, PORT_HIZCRC);
arch/sh/boards/mach-se/7724/irq.c
75
__raw_writew(__raw_readw(set.mraddr) | 0x0001 << bit, set.mraddr);
arch/sh/boards/mach-se/7724/irq.c
83
__raw_writew(__raw_readw(set.mraddr) & ~(0x0001 << bit), set.mraddr);
arch/sh/boards/mach-se/7724/irq.c
96
unsigned short intv = __raw_readw(set.sraddr);
arch/sh/boards/mach-se/7724/setup.c
618
if (!__raw_readw(EEPROM_STAT))
arch/sh/boards/mach-se/7724/setup.c
644
mac = __raw_readw(EEPROM_DATA);
arch/sh/boards/mach-se/7724/setup.c
680
u16 sw = __raw_readw(SW4140); /* select camera, monitor */
arch/sh/boards/mach-se/7724/setup.c
696
fpga_out = __raw_readw(FPGA_OUT);
arch/sh/boards/mach-se/7724/setup.c
718
__raw_writew((__raw_readw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB);
arch/sh/boards/mach-se/7724/setup.c
781
__raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);
arch/sh/boards/mach-se/7780/irq.c
26
__raw_writew((__raw_readw(FPGA_INTMSK1) | 0x0002), FPGA_INTMSK1);
arch/sh/boards/mach-se/7780/setup.c
97
__raw_writew(__raw_readw(GPIO_PHCR)&0xfff3, GPIO_PHCR);
arch/sh/boards/mach-sh7763rdp/setup.c
163
if (__raw_readw(CPLD_BOARD_ID_ERV_REG) == 0xECB1)
arch/sh/boards/mach-sh7763rdp/setup.c
169
__raw_writew((__raw_readw(PORT_PSEL2) & 0xFFC3), PORT_PSEL2);
arch/sh/boards/mach-sh7763rdp/setup.c
171
__raw_writew(__raw_readw(PORT_PICR) & 0xFC0F, PORT_PICR);
arch/sh/boards/mach-sh7763rdp/setup.c
178
__raw_writew(__raw_readw(PORT_PJCR) & 0x0003, PORT_PJCR);
arch/sh/boards/mach-sh7763rdp/setup.c
180
__raw_writew(__raw_readw(PORT_PICR) & 0xF3FF, PORT_PICR);
arch/sh/boards/mach-sh7763rdp/setup.c
184
__raw_writew((__raw_readw(PORT_PSEL2) & 0x00C0), PORT_PSEL2);
arch/sh/boards/mach-sh7763rdp/setup.c
186
__raw_writew((__raw_readw(PORT_PSEL3) & 0x0700), PORT_PSEL3);
arch/sh/boards/mach-sh7763rdp/setup.c
190
__raw_writew((__raw_readw(PORT_PSEL1) & 0xFFF0) | 0x0004, PORT_PSEL1);
arch/sh/boards/mach-sh7763rdp/setup.c
192
__raw_writew(__raw_readw(PORT_PSEL4) | 0x4000, PORT_PSEL4);
arch/sh/boards/mach-sh7763rdp/setup.c
195
__raw_writew((__raw_readw(PORT_PSEL1) & ~0xff00) | 0x2400, PORT_PSEL1);
arch/sh/boards/mach-sh7763rdp/setup.c
205
__raw_writew(__raw_readw(PORT_PACR) & ~0x3000, PORT_PACR);
arch/sh/boards/mach-sh7763rdp/setup.c
206
__raw_writew(__raw_readw(PORT_PCCR) & ~0xCFC3, PORT_PCCR);
arch/sh/boards/mach-x3proto/gpio.c
35
data = __raw_readw(KEYCTLR);
arch/sh/boards/mach-x3proto/gpio.c
45
return !!(__raw_readw(KEYDETR) & (1 << gpio));
arch/sh/boards/mach-x3proto/gpio.c
69
mask = __raw_readw(KEYDETR);
arch/sh/boards/mach-x3proto/ilsel.c
150
tmp = __raw_readw(addr);
arch/sh/boards/mach-x3proto/ilsel.c
74
tmp = __raw_readw(addr);
arch/sh/boot/romimage/mmcif-sh7724.c
48
__raw_writew(__raw_readw(PTXCR) & ~0x000f, PTXCR);
arch/sh/boot/romimage/mmcif-sh7724.c
51
__raw_writew(__raw_readw(PSELA) & ~0x2000, PSELA);
arch/sh/boot/romimage/mmcif-sh7724.c
54
__raw_writew(__raw_readw(PSELE) & ~0x3000, PSELE);
arch/sh/boot/romimage/mmcif-sh7724.c
57
__raw_writew(__raw_readw(HIZCRC) & ~0x0620, HIZCRC);
arch/sh/boot/romimage/mmcif-sh7724.c
60
__raw_writew(__raw_readw(DRVCRA) | 0x3000, DRVCRA);
arch/sh/cchips/hd6446x/hd64461.c
27
nimr = __raw_readw(HD64461_NIMR);
arch/sh/cchips/hd6446x/hd64461.c
38
nimr = __raw_readw(HD64461_NIMR);
arch/sh/cchips/hd6446x/hd64461.c
62
unsigned short intv = __raw_readw(HD64461_NIRR);
arch/sh/drivers/dma/dma-sh.c
265
#define dmaor_read_reg(n) __raw_readw(dma_find_base((n) * \
arch/sh/drivers/pci/pci-sh7751.c
33
word = __raw_readw(SH7751_BCR2);
arch/sh/drivers/pci/pci-sh7780.c
105
status = __raw_readw(hose->reg_base + PCI_STATUS);
arch/sh/drivers/pci/pci-sh7780.c
234
tmp = __raw_readw(hose->reg_base + PCI_STATUS);
arch/sh/drivers/pci/pci-sh7780.c
271
id = __raw_readw(chan->reg_base + PCI_VENDOR_ID);
arch/sh/drivers/pci/pci-sh7780.c
277
id = __raw_readw(chan->reg_base + PCI_DEVICE_ID);
arch/sh/drivers/pci/pci-sh7780.c
398
(__raw_readw(chan->reg_base + PCI_STATUS) & PCI_STATUS_66MHZ)
arch/sh/include/asm/io.h
153
#define SLOW_DOWN_IO __raw_readw(sh_io_port_base)
arch/sh/include/asm/io.h
39
#define readw_relaxed(c) ({ u16 __v = ioswabw(__raw_readw(c)); __v; })
arch/sh/include/mach-common/mach/magicpanelr2.h
20
#define SETBITS_OUTW(mask, reg) __raw_writew(__raw_readw(reg) | mask, reg)
arch/sh/include/mach-common/mach/magicpanelr2.h
23
#define CLRBITS_OUTW(mask, reg) __raw_writew(__raw_readw(reg) & ~mask, reg)
arch/sh/include/mach-ecovec24/mach/romimage.h
42
__raw_writew(__raw_readw(HIZCRA) & ~(1 << 1), HIZCRA);
arch/sh/include/mach-se/mach/mrshpc.h
12
if ((__raw_readw(MRSHPC_CSR) & 0x0080) == 0) {
arch/sh/include/mach-se/mach/mrshpc.h
24
if((__raw_readw(MRSHPC_CSR) & 0x4000) != 0)
arch/sh/include/mach-se/mach/mrshpc.h
33
if ((__raw_readw(MRSHPC_CSR) & 0x4000) != 0)
arch/sh/include/mach-se/mach/mrshpc.h
43
if ((__raw_readw(MRSHPC_CSR) & 0x4000) != 0)
arch/sh/include/mach-se/mach/mrshpc.h
9
if ((__raw_readw(MRSHPC_CSR) & 0x000c) != 0)
arch/sh/kernel/cpu/irq/ipr.c
35
__raw_writew(__raw_readw(addr) & (0xffff ^ (0xf << p->shift)), addr);
arch/sh/kernel/cpu/irq/ipr.c
36
(void)__raw_readw(addr); /* Read back to flush write posting */
arch/sh/kernel/cpu/irq/ipr.c
44
__raw_writew(__raw_readw(addr) | (p->priority << p->shift), addr);
arch/sh/kernel/cpu/sh2/clock-sh7619.c
25
clk->rate *= pll2_mult * pll1rate[(__raw_readw(FREQCR) >> 8) & 7];
arch/sh/kernel/cpu/sh2/clock-sh7619.c
34
int idx = (__raw_readw(FREQCR) & 0x0007);
arch/sh/kernel/cpu/sh2/clock-sh7619.c
44
return clk->parent->rate / pll1rate[(__raw_readw(FREQCR) >> 8) & 7];
arch/sh/kernel/cpu/sh2a/clock-sh7201.c
27
pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007];
arch/sh/kernel/cpu/sh2a/clock-sh7201.c
36
int idx = (__raw_readw(FREQCR) & 0x0007);
arch/sh/kernel/cpu/sh2a/clock-sh7201.c
46
int idx = (__raw_readw(FREQCR) & 0x0007);
arch/sh/kernel/cpu/sh2a/clock-sh7201.c
56
int idx = ((__raw_readw(FREQCR) >> 4) & 0x0007);
arch/sh/kernel/cpu/sh2a/clock-sh7203.c
29
clk->rate *= pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0003] * pll2_mult;
arch/sh/kernel/cpu/sh2a/clock-sh7203.c
38
int idx = (__raw_readw(FREQCR) & 0x0007);
arch/sh/kernel/cpu/sh2a/clock-sh7203.c
48
int idx = (__raw_readw(FREQCR) & 0x0007);
arch/sh/kernel/cpu/sh2a/clock-sh7206.c
26
clk->rate *= pll2_mult * pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007];
arch/sh/kernel/cpu/sh2a/clock-sh7206.c
35
int idx = (__raw_readw(FREQCR) & 0x0007);
arch/sh/kernel/cpu/sh2a/clock-sh7206.c
45
return clk->parent->rate / pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007];
arch/sh/kernel/cpu/sh2a/clock-sh7206.c
54
int idx = (__raw_readw(FREQCR) & 0x0007);
arch/sh/kernel/cpu/sh2a/clock-sh7264.c
44
return rate * pll1rate[(__raw_readw(FRQCR) >> 8) & 1];
arch/sh/kernel/cpu/sh3/clock-sh3.c
28
int frqcr = __raw_readw(FRQCR);
arch/sh/kernel/cpu/sh3/clock-sh3.c
40
int frqcr = __raw_readw(FRQCR);
arch/sh/kernel/cpu/sh3/clock-sh3.c
52
int frqcr = __raw_readw(FRQCR);
arch/sh/kernel/cpu/sh3/clock-sh3.c
64
int frqcr = __raw_readw(FRQCR);
arch/sh/kernel/cpu/sh3/clock-sh7705.c
32
clk->rate *= pfc_divisors[__raw_readw(FRQCR) & 0x0003];
arch/sh/kernel/cpu/sh3/clock-sh7705.c
41
int idx = __raw_readw(FRQCR) & 0x0003;
arch/sh/kernel/cpu/sh3/clock-sh7705.c
51
int idx = (__raw_readw(FRQCR) & 0x0300) >> 8;
arch/sh/kernel/cpu/sh3/clock-sh7705.c
61
int idx = (__raw_readw(FRQCR) & 0x0030) >> 4;
arch/sh/kernel/cpu/sh3/clock-sh7706.c
24
int frqcr = __raw_readw(FRQCR);
arch/sh/kernel/cpu/sh3/clock-sh7706.c
36
int frqcr = __raw_readw(FRQCR);
arch/sh/kernel/cpu/sh3/clock-sh7706.c
48
int frqcr = __raw_readw(FRQCR);
arch/sh/kernel/cpu/sh3/clock-sh7706.c
60
int frqcr = __raw_readw(FRQCR);
arch/sh/kernel/cpu/sh3/clock-sh7709.c
24
int frqcr = __raw_readw(FRQCR);
arch/sh/kernel/cpu/sh3/clock-sh7709.c
36
int frqcr = __raw_readw(FRQCR);
arch/sh/kernel/cpu/sh3/clock-sh7709.c
48
int frqcr = __raw_readw(FRQCR);
arch/sh/kernel/cpu/sh3/clock-sh7709.c
61
int frqcr = __raw_readw(FRQCR);
arch/sh/kernel/cpu/sh3/clock-sh7710.c
26
clk->rate *= md_table[__raw_readw(FRQCR) & 0x0007];
arch/sh/kernel/cpu/sh3/clock-sh7710.c
35
int idx = (__raw_readw(FRQCR) & 0x0007);
arch/sh/kernel/cpu/sh3/clock-sh7710.c
45
int idx = (__raw_readw(FRQCR) & 0x0700) >> 8;
arch/sh/kernel/cpu/sh3/clock-sh7710.c
55
int idx = (__raw_readw(FRQCR) & 0x0070) >> 4;
arch/sh/kernel/cpu/sh3/clock-sh7712.c
23
int frqcr = __raw_readw(FRQCR);
arch/sh/kernel/cpu/sh3/clock-sh7712.c
35
int frqcr = __raw_readw(FRQCR);
arch/sh/kernel/cpu/sh3/clock-sh7712.c
47
int frqcr = __raw_readw(FRQCR);
arch/sh/kernel/cpu/sh3/serial-sh770x.c
15
data = __raw_readw(SCPCR);
arch/sh/kernel/cpu/sh3/serial-sh770x.c
21
data = __raw_readw(SCPCR);
arch/sh/kernel/cpu/sh3/serial-sh7710.c
13
__raw_writew(__raw_readw(PACR) & 0xffc0, PACR);
arch/sh/kernel/cpu/sh3/serial-sh7710.c
14
__raw_writew(__raw_readw(PBCR) & 0x0fff, PBCR);
arch/sh/kernel/cpu/sh3/serial-sh7710.c
16
__raw_writew(__raw_readw(PBCR) & 0xf003, PBCR);
arch/sh/kernel/cpu/sh3/serial-sh7720.c
16
data = __raw_readw(PORT_PTCR);
arch/sh/kernel/cpu/sh3/serial-sh7720.c
20
data = __raw_readw(PORT_PVCR);
arch/sh/kernel/cpu/sh3/serial-sh7720.c
26
data = __raw_readw(PORT_PTCR);
arch/sh/kernel/cpu/sh3/serial-sh7720.c
30
data = __raw_readw(PORT_PVCR);
arch/sh/kernel/cpu/sh3/setup-sh3.c
59
__raw_writew(__raw_readw(INTC_ICR1) & ~INTC_ICR1_IRQLVL, INTC_ICR1);
arch/sh/kernel/cpu/sh4/clock-sh4.c
28
clk->rate *= pfc_divisors[__raw_readw(FRQCR) & 0x0007];
arch/sh/kernel/cpu/sh4/clock-sh4.c
37
int idx = (__raw_readw(FRQCR) & 0x0007);
arch/sh/kernel/cpu/sh4/clock-sh4.c
47
int idx = (__raw_readw(FRQCR) >> 3) & 0x0007;
arch/sh/kernel/cpu/sh4/clock-sh4.c
57
int idx = (__raw_readw(FRQCR) >> 6) & 0x0007;
arch/sh/kernel/cpu/sh4/perf_event.c
212
tmp = __raw_readw(PMCR(idx));
arch/sh/kernel/cpu/sh4/perf_event.c
219
__raw_writew(__raw_readw(PMCR(idx)) | PMCR_PMCLR, PMCR(idx));
arch/sh/kernel/cpu/sh4/perf_event.c
228
__raw_writew(__raw_readw(PMCR(i)) & ~PMCR_PMEN, PMCR(i));
arch/sh/kernel/cpu/sh4/perf_event.c
236
__raw_writew(__raw_readw(PMCR(i)) | PMCR_PMEN, PMCR(i));
arch/sh/kernel/cpu/sh4/setup-sh7750.c
353
__raw_writew(__raw_readw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
arch/sh/kernel/cpu/sh4/setup-sh7760.c
286
__raw_writew(__raw_readw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
arch/sh/kernel/cpu/sh4a/serial-sh7722.c
13
data = __raw_readw(PSCR);
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
1171
sh7724_rstandby_state.ipra = __raw_readw(0xa4080000); /* IPRA */
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
1172
sh7724_rstandby_state.iprb = __raw_readw(0xa4080004); /* IPRB */
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
1173
sh7724_rstandby_state.iprc = __raw_readw(0xa4080008); /* IPRC */
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
1174
sh7724_rstandby_state.iprd = __raw_readw(0xa408000c); /* IPRD */
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
1175
sh7724_rstandby_state.ipre = __raw_readw(0xa4080010); /* IPRE */
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
1176
sh7724_rstandby_state.iprf = __raw_readw(0xa4080014); /* IPRF */
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
1177
sh7724_rstandby_state.iprg = __raw_readw(0xa4080018); /* IPRG */
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
1178
sh7724_rstandby_state.iprh = __raw_readw(0xa408001c); /* IPRH */
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
1179
sh7724_rstandby_state.ipri = __raw_readw(0xa4080020); /* IPRI */
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
1180
sh7724_rstandby_state.iprj = __raw_readw(0xa4080024); /* IPRJ */
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
1181
sh7724_rstandby_state.iprk = __raw_readw(0xa4080028); /* IPRK */
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
1182
sh7724_rstandby_state.iprl = __raw_readw(0xa408002c); /* IPRL */
arch/sh/kernel/io_trapped.c
193
tmp = __raw_readw(src_addr);
arch/sh/kernel/kgdb.c
146
stepped_opcode = __raw_readw((long)addr);
arch/sh/kernel/kgdb.c
310
regs->pc -= instruction_size(__raw_readw(regs->pc - 4));
arch/sh/kernel/kgdb.c
49
insn_size_t op = __raw_readw(linux_regs->pc);
arch/sh/kernel/signal_32.c
427
regs->pc -= instruction_size(__raw_readw(regs->pc - 4));
arch/sh/kernel/signal_32.c
487
regs->pc -= instruction_size(__raw_readw(regs->pc - 4));
arch/sh/kernel/signal_32.c
489
regs->pc -= instruction_size(__raw_readw(regs->pc - 4));
arch/sh/kernel/traps.c
140
regs->pc -= instruction_size(__raw_readw(regs->pc - 4));
arch/sh/kernel/traps.c
157
regs->pc -= instruction_size(__raw_readw(regs->pc - 4));
arch/sparc/include/asm/io.h
16
#define readw_be(__addr) __raw_readw(__addr)
arch/sparc/include/asm/io_64.h
311
return __raw_readw(addr);
arch/sparc/include/asm/io_64.h
33
#define __raw_readw __raw_readw
arch/sparc/include/asm/io_64.h
441
#define ioread16be __raw_readw
arch/sparc/lib/PeeCeeI.c
125
*ps++ = __raw_readw(addr);
arch/sparc/lib/PeeCeeI.c
132
w = __raw_readw(addr) << 16;
arch/sparc/lib/PeeCeeI.c
133
w |= __raw_readw(addr) << 0;
arch/sparc/lib/PeeCeeI.c
139
*ps = __raw_readw(addr);
drivers/ata/pata_octeon_cf.c
385
blob = __raw_readw(base + 0xc);
drivers/ata/pata_octeon_cf.c
388
blob = __raw_readw(base + 2);
drivers/ata/pata_octeon_cf.c
392
blob = __raw_readw(base + 4);
drivers/ata/pata_octeon_cf.c
396
blob = __raw_readw(base + 6);
drivers/ata/pata_octeon_cf.c
404
blob = __raw_readw(base + 0xc);
drivers/ata/pata_octeon_cf.c
407
blob = __raw_readw(base + 2);
drivers/ata/pata_octeon_cf.c
411
blob = __raw_readw(base + 4);
drivers/ata/pata_octeon_cf.c
428
blob = __raw_readw(base + 6);
drivers/bcma/host_soc.c
71
*buf = (__force __le16)__raw_readw(addr);
drivers/cdrom/gdrom.c
171
data[c] = __raw_readw(GDROM_DATA_REG);
drivers/dma/sh/shdmac.c
275
__raw_writew((__raw_readw(addr) & (0xff00 >> shift)) | (val << shift),
drivers/dma/sh/shdmac.c
94
return __raw_readw(addr);
drivers/input/keyboard/jornada680_kbd.c
138
dc_static = (__raw_readw(PDCR) & (~0xcc0c));
drivers/input/keyboard/jornada680_kbd.c
139
ec_static = (__raw_readw(PECR) & (~0xf0cf));
drivers/memory/renesas-rpc-if.c
790
*(u16 *)buf = __raw_readw((void __iomem *)((unsigned long)from & ~1));
drivers/memory/renesas-rpc-if.c
797
*(u16 *)to = __raw_readw(from);
drivers/memory/renesas-rpc-if.c
813
*(u16 *)to = __raw_readw(from);
drivers/memory/renesas-rpc-if.c
819
*(u16 *)buf = __raw_readw(from);
drivers/mmc/host/dw_mmc.h
469
#define mci_fifo_readw(__reg) __raw_readw(__reg)
drivers/mmc/host/omap.c
82
#define OMAP_MMC_READ(host, reg) __raw_readw((host)->virt_base + OMAP_MMC_REG(host, reg))
drivers/mtd/maps/physmap-ixp4xx.c
42
return be16_to_cpu(__raw_readw((void __iomem *)((unsigned long)addr ^ 0x2)));
drivers/mtd/maps/physmap-ixp4xx.c
57
return __raw_readw(addr);
drivers/mtd/nand/raw/mxc_nand.c
215
*t++ = __raw_readw(s++);
drivers/net/ethernet/8390/pcnet_cs.c
1338
do { *d++ = __raw_readw(s++); } while (--c);
drivers/net/ethernet/8390/pcnet_cs.c
1451
if (__raw_readw(info->base+offset+i) != (i>>1)) break;
drivers/net/ethernet/cirrus/ep93xx_eth.c
177
#define rdw(ep, off) __raw_readw((ep)->base_addr + (off))
drivers/net/ethernet/freescale/enetc/enetc_pf.c
18
u16 lower = __raw_readw(hw->port + ENETC_PSIPMAR1(si));
drivers/net/ethernet/freescale/fs_enet/fs_enet.h
201
#define __cbd_in16(addr) __raw_readw(addr)
drivers/net/ethernet/freescale/fs_enet/mac-fec.c
47
#define __fs_in16(addr) __raw_readw(addr)
drivers/net/ethernet/freescale/fs_enet/mac-scc.c
44
#define __fs_in16(addr) __raw_readw(addr)
drivers/net/ethernet/natsemi/sonic.h
369
return __raw_readw(base + (offset * 2) + 1);
drivers/net/ethernet/natsemi/sonic.h
371
return __raw_readw(base + (offset * 2) + 0);
drivers/net/ethernet/natsemi/sonic.h
374
return __raw_readw(base + (offset * 1) + 0);
drivers/net/mdio/mdio-mux-bcm6368.c
53
ret = __raw_readw(md->base + MDIOD_REG);
drivers/parisc/lba_pci.c
129
#define READ_U16(addr) __raw_readw(addr)
drivers/scsi/ncr53c8xx.h
273
#define readw_l2b __raw_readw
drivers/scsi/ncr53c8xx.h
277
#define readw_raw __raw_readw
drivers/sh/intc/access.c
110
(void)__raw_readw(ptr); /* Defeat write posting */
drivers/sh/intc/access.c
144
value = intc_set_field_from_handle(__raw_readw(ptr), data, h);
drivers/sh/intc/access.c
146
(void)__raw_readw(ptr); /* Defeat write posting */
drivers/sh/intc/access.c
86
return intc_get_field_from_handle(__raw_readw(ptr), h);
drivers/sh/intc/chip.c
103
__raw_readw(addr);
drivers/spi/spi-omap-uwire.c
112
return __raw_readw(uwire_base + (idx << uwire_idx_shift));
drivers/ssb/host_soc.c
66
*buf = (__force __le16)__raw_readw(addr);
drivers/ssb/pcmcia.c
304
*buf = (__force __le16)__raw_readw(addr);
drivers/ssb/pcmcia.c
315
*buf = (__force __le16)__raw_readw(addr);
drivers/ssb/pcmcia.c
317
*buf = (__force __le16)__raw_readw(addr + 2);
drivers/usb/c67x00/c67x00-ll-hpi.c
73
return __raw_readw(dev->hpi.base + reg * dev->hpi.regstep);
drivers/usb/host/isp116x.h
388
val = __raw_readw(isp116x->data_reg);
drivers/usb/isp1760/isp1760-hcd.c
393
*dstptr = __raw_readw(priv->base + ISP1763_HC_DATA);
drivers/usb/musb/musb_core.c
267
u16 data = __raw_readw(addr + offset);
drivers/usb/musb/musb_core.c
381
*(u16 *)&dst[index] = __raw_readw(fifo);
drivers/usb/musb/tusb6010.c
155
tmp = __raw_readw(addr + (offset & ~1));
drivers/usb/musb/tusb6010.c
168
tmp = __raw_readw(addr + (offset & ~1));
drivers/video/fbdev/nvidia/nv_local.h
65
#define NV_RD16(p,i) (__raw_readw((void __iomem *)(p) + (i)))
drivers/video/fbdev/riva/riva_hw.h
81
#define NV_RD16(p,i) (__raw_readw((void __iomem *)(p) + (i)))
include/asm-generic/io.h
123
#ifndef __raw_readw
include/asm-generic/io.h
124
#define __raw_readw __raw_readw
include/asm-generic/io.h
214
val = __le16_to_cpu((__le16 __force)__raw_readw(addr));
include/asm-generic/io.h
344
val = __le16_to_cpu((__le16 __force)__raw_readw(addr));
include/asm-generic/io.h
458
u16 x = __raw_readw(addr);
include/asm-generic/io.h
601
val = __le16_to_cpu((__le16 __force)__raw_readw(PCI_IOBASE + addr));
include/asm-generic/logic_io.h
42
#define __raw_readw __raw_readw
include/asm-generic/logic_io.h
43
u16 __raw_readw(const volatile void __iomem *addr);
include/asm-generic/video.h
55
return __raw_readw(addr);
include/linux/mtd/doc2000.h
94
return __raw_readw(addr + reg);
include/linux/mtd/map.h
398
r.x[0] = __raw_readw(map->virt + ofs);
lib/iomap.c
321
u16 data = __raw_readw(addr);
sound/soc/renesas/sh7760-ac97.c
43
ipsel = __raw_readw(IPSEL);
tools/include/asm-generic/io.h
172
val = __le16_to_cpu((__le16 __force)__raw_readw(addr));
tools/include/asm-generic/io.h
282
val = __le16_to_cpu((__le16 __force)__raw_readw(addr));
tools/include/asm-generic/io.h
383
u16 x = __raw_readw(addr);
tools/include/asm-generic/io.h
88
#ifndef __raw_readw
tools/include/asm-generic/io.h
89
#define __raw_readw __raw_readw
