DMA_SLAVE_BUSWIDTH_2_BYTES
config.src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
config.dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
case DMA_SLAVE_BUSWIDTH_2_BYTES:
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) | \
case DMA_SLAVE_BUSWIDTH_2_BYTES:
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
case DMA_SLAVE_BUSWIDTH_2_BYTES:
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |\
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |\
case DMA_SLAVE_BUSWIDTH_2_BYTES:
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) | \
DMA_SLAVE_BUSWIDTH_2_BYTES | \
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) | \
case DMA_SLAVE_BUSWIDTH_2_BYTES:
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) | \
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) | \
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) | \
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) | \
case DMA_SLAVE_BUSWIDTH_2_BYTES:
case DMA_SLAVE_BUSWIDTH_2_BYTES:
case DMA_SLAVE_BUSWIDTH_2_BYTES:
case DMA_SLAVE_BUSWIDTH_2_BYTES:
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) | \
case DMA_SLAVE_BUSWIDTH_2_BYTES:
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) | \
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) | \
DMA_SLAVE_BUSWIDTH_1_BYTE | DMA_SLAVE_BUSWIDTH_2_BYTES |
else if (width == DMA_SLAVE_BUSWIDTH_2_BYTES)
case DMA_SLAVE_BUSWIDTH_2_BYTES:
case DMA_SLAVE_BUSWIDTH_2_BYTES:
case DMA_SLAVE_BUSWIDTH_2_BYTES:
case DMA_SLAVE_BUSWIDTH_2_BYTES:
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) | \
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) | \
DMA_SLAVE_BUSWIDTH_1_BYTE | DMA_SLAVE_BUSWIDTH_2_BYTES |
else if (width == DMA_SLAVE_BUSWIDTH_2_BYTES)
width != DMA_SLAVE_BUSWIDTH_2_BYTES) ||
if (width == DMA_SLAVE_BUSWIDTH_2_BYTES)
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES);
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES);
DMA_SLAVE_BUSWIDTH_1_BYTE | DMA_SLAVE_BUSWIDTH_2_BYTES |
DMA_SLAVE_BUSWIDTH_2_BYTES | DMA_SLAVE_BUSWIDTH_4_BYTES |
DMA_SLAVE_BUSWIDTH_2_BYTES,
DMA_SLAVE_BUSWIDTH_1_BYTE | DMA_SLAVE_BUSWIDTH_2_BYTES |
case DMA_SLAVE_BUSWIDTH_2_BYTES:
case DMA_SLAVE_BUSWIDTH_2_BYTES:
case DMA_SLAVE_BUSWIDTH_2_BYTES:
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) | \
else if (width == DMA_SLAVE_BUSWIDTH_2_BYTES)
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
case DMA_SLAVE_BUSWIDTH_2_BYTES:
max_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
case DMA_SLAVE_BUSWIDTH_2_BYTES:
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
case DMA_SLAVE_BUSWIDTH_2_BYTES:
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
case DMA_SLAVE_BUSWIDTH_2_BYTES:
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) | \
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) | \
case DMA_SLAVE_BUSWIDTH_2_BYTES:
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) | \
case DMA_SLAVE_BUSWIDTH_2_BYTES:
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) | \
case DMA_SLAVE_BUSWIDTH_2_BYTES:
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) | \
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) | \
tx.dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
config.src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
config.src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
dma->conf.src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
.src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES,
.dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES,
cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
config.src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
config.dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
slave_config.dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
slave_config.src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
return DMA_SLAVE_BUSWIDTH_2_BYTES;
buswidth = DMA_SLAVE_BUSWIDTH_2_BYTES;
buswidth = DMA_SLAVE_BUSWIDTH_2_BYTES;
buswidth = DMA_SLAVE_BUSWIDTH_2_BYTES;
cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
width = DMA_SLAVE_BUSWIDTH_2_BYTES;
dmawidth = DMA_SLAVE_BUSWIDTH_2_BYTES;
rx_conf.src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
tx_conf.dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
width = DMA_SLAVE_BUSWIDTH_2_BYTES;
return DMA_SLAVE_BUSWIDTH_2_BYTES;
ss->dma.width = DMA_SLAVE_BUSWIDTH_2_BYTES;
buswidth = DMA_SLAVE_BUSWIDTH_2_BYTES;
buswidth = DMA_SLAVE_BUSWIDTH_2_BYTES;
dma_cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
dma_cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
buswidth = DMA_SLAVE_BUSWIDTH_2_BYTES;
slave_config->dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
DMA_SLAVE_BUSWIDTH_2_BYTES,
enum dma_slave_buswidth buswidth = DMA_SLAVE_BUSWIDTH_2_BYTES;
buswidth = DMA_SLAVE_BUSWIDTH_2_BYTES;
buswidth = DMA_SLAVE_BUSWIDTH_2_BYTES;
kmb_i2s->play_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
kmb_i2s->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
DMA_SLAVE_BUSWIDTH_2_BYTES;
.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES,
.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES,
.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES,
buswidth = DMA_SLAVE_BUSWIDTH_2_BYTES;
cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
dma_data->addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
i2s->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
i2s->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
bus_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
dev->play_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
dma_bus_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
tdm->play_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
tdm->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
scodec->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
scodec->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
scodec->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
scodec->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
width = DMA_SLAVE_BUSWIDTH_2_BYTES;
host->dma_params_tx.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
host->dma_params_tx.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
host->dma_params_rx.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
slave_config->src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
slave_config->dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;