arch/arm/mach-pxa/pxa27x-udc.h

43

#define UDCICR_INT(n,intr) (((intr) & 0x03) << (((n) & 0x0F) * 2))

arch/arm/mach-pxa/pxa27x-udc.h

52

#define UDCISR_INT(n,intr) (((intr) & 0x03) << (((n) & 0x0F) * 2))

arch/loongarch/kvm/vcpu.c

1490

int intr = (int)irq->irq;

arch/loongarch/kvm/vcpu.c

1492

if (intr > 0)

arch/loongarch/kvm/vcpu.c

1493

kvm_queue_irq(vcpu, intr);

arch/loongarch/kvm/vcpu.c

1494

else if (intr < 0)

arch/loongarch/kvm/vcpu.c

1495

kvm_dequeue_irq(vcpu, -intr);

arch/loongarch/kvm/vcpu.c

349

u32 intr = estat & CSR_ESTAT_IS;

arch/loongarch/kvm/vcpu.c

367

WARN(!intr, "vm exiting with suspicious irq\n");

arch/mips/cavium-octeon/executive/cvmx-pko.c

150

config.s.intr = __cvmx_pko_int(interface, index);

arch/mips/cavium-octeon/executive/cvmx-pko.c

151

config.s.eid = config.s.intr;

arch/mips/cavium-octeon/octeon-irq.c

2607

if (likely(dest_pp_int.s.intr)) {

arch/mips/cavium-octeon/octeon-irq.c

2674

if (likely(dest_pp_int.s.intr)) {

arch/mips/include/asm/mips-gic.h

102

static inline unsigned int read_gic_##name(unsigned int intr) \

arch/mips/include/asm/mips-gic.h

108

addr += (intr / 64) * sizeof(uint64_t); \

arch/mips/include/asm/mips-gic.h

109

val = __raw_readq(addr) >> intr % 64; \

arch/mips/include/asm/mips-gic.h

111

addr += (intr / 32) * sizeof(uint32_t); \

arch/mips/include/asm/mips-gic.h

112

val = __raw_readl(addr) >> intr % 32; \

arch/mips/include/asm/mips-gic.h

122

static inline void write_gic_##name(unsigned int intr) \

arch/mips/include/asm/mips-gic.h

127

addr += (intr / 64) * sizeof(uint64_t); \

arch/mips/include/asm/mips-gic.h

128

__raw_writeq(BIT(intr % 64), addr); \

arch/mips/include/asm/mips-gic.h

130

addr += (intr / 32) * sizeof(uint32_t); \

arch/mips/include/asm/mips-gic.h

131

__raw_writel(BIT(intr % 32), addr); \

arch/mips/include/asm/mips-gic.h

135

static inline void change_gic_##name(unsigned int intr, \

arch/mips/include/asm/mips-gic.h

143

addr += (intr / 64) * sizeof(uint64_t); \

arch/mips/include/asm/mips-gic.h

145

_val &= ~BIT_ULL(intr % 64); \

arch/mips/include/asm/mips-gic.h

146

_val |= (uint64_t)val << (intr % 64); \

arch/mips/include/asm/mips-gic.h

151

addr += (intr / 32) * sizeof(uint32_t); \

arch/mips/include/asm/mips-gic.h

153

_val &= ~BIT(intr % 32); \

arch/mips/include/asm/mips-gic.h

154

_val |= val << (intr % 32); \

arch/mips/include/asm/mips-gic.h

347

mips_gic_vx_map_reg(enum mips_gic_local_interrupt intr)

arch/mips/include/asm/mips-gic.h

350

if (intr <= GIC_LOCAL_INT_TIMER)

arch/mips/include/asm/mips-gic.h

351

return intr;

arch/mips/include/asm/mips-gic.h

354

if (intr == GIC_LOCAL_INT_FDC)

arch/mips/include/asm/mips-gic.h

358

return intr + 1;

arch/mips/include/asm/mips-gic.h

51

static inline void __iomem *addr_gic_##name(unsigned int intr) \

arch/mips/include/asm/mips-gic.h

53

return mips_gic_base + (off) + (intr * (stride)); \

arch/mips/include/asm/mips-gic.h

56

static inline unsigned int read_gic_##name(unsigned int intr) \

arch/mips/include/asm/mips-gic.h

59

return __raw_readl(addr_gic_##name(intr)); \

arch/mips/include/asm/mips-gic.h

66

static inline void write_gic_##name(unsigned int intr, \

arch/mips/include/asm/mips-gic.h

70

__raw_writel(val, addr_gic_##name(intr)); \

arch/mips/include/asm/octeon/cvmx-ciu3-defs.h

100

uint64_t intr : 1;

arch/mips/include/asm/octeon/cvmx-ciu3-defs.h

119

uint64_t intr : 1;

arch/mips/include/asm/octeon/cvmx-ciu3-defs.h

121

uint64_t intr : 1;

arch/mips/include/asm/octeon/cvmx-ciu3-defs.h

151

uint64_t intr : 1;

arch/mips/include/asm/octeon/cvmx-ciu3-defs.h

157

uint64_t intr : 1;

arch/mips/include/asm/octeon/cvmx-ciu3-defs.h

98

uint64_t intr : 1;

arch/mips/include/asm/octeon/cvmx-ipd-defs.h

1126

uint64_t intr:64;

arch/mips/include/asm/octeon/cvmx-ipd-defs.h

1128

uint64_t intr:64;

arch/mips/include/asm/octeon/cvmx-npei-defs.h

2959

uint64_t intr:64;

arch/mips/include/asm/octeon/cvmx-npei-defs.h

2961

uint64_t intr:64;

arch/mips/include/asm/octeon/cvmx-npei-defs.h

2970

uint64_t intr:64;

arch/mips/include/asm/octeon/cvmx-npei-defs.h

2972

uint64_t intr:64;

arch/mips/include/asm/octeon/cvmx-npei-defs.h

2981

uint64_t intr:64;

arch/mips/include/asm/octeon/cvmx-npei-defs.h

2983

uint64_t intr:64;

arch/mips/include/asm/octeon/cvmx-npei-defs.h

2992

uint64_t intr:64;

arch/mips/include/asm/octeon/cvmx-npei-defs.h

2994

uint64_t intr:64;

arch/mips/include/asm/octeon/cvmx-npei-defs.h

3145

uint64_t intr:8;

arch/mips/include/asm/octeon/cvmx-npei-defs.h

3147

uint64_t intr:8;

arch/mips/include/asm/octeon/cvmx-npei-defs.h

3158

uint64_t intr:8;

arch/mips/include/asm/octeon/cvmx-npei-defs.h

3162

uint64_t intr:8;

arch/mips/include/asm/octeon/cvmx-npei-defs.h

3173

uint64_t intr:8;

arch/mips/include/asm/octeon/cvmx-npei-defs.h

3177

uint64_t intr:8;

arch/mips/include/asm/octeon/cvmx-npei-defs.h

3188

uint64_t intr:8;

arch/mips/include/asm/octeon/cvmx-npei-defs.h

3192

uint64_t intr:8;

arch/mips/include/asm/octeon/cvmx-pci-defs.h

1804

uint32_t intr:6;

arch/mips/include/asm/octeon/cvmx-pci-defs.h

1806

uint32_t intr:6;

arch/mips/include/asm/octeon/cvmx-pko-defs.h

1219

uint64_t intr:5;

arch/mips/include/asm/octeon/cvmx-pko-defs.h

1221

uint64_t intr:5;

arch/mips/include/asm/octeon/cvmx-pko-defs.h

966

uint64_t intr:5;

arch/mips/include/asm/octeon/cvmx-pko-defs.h

976

uint64_t intr:5;

arch/mips/include/asm/octeon/cvmx-sriox-defs.h

739

uint64_t intr:1;

arch/mips/include/asm/octeon/cvmx-sriox-defs.h

741

uint64_t intr:1;

arch/mips/kvm/mips.c

482

int intr = (int)irq->irq;

arch/mips/kvm/mips.c

485

if (intr == kvm_priority_to_irq[MIPS_EXC_INT_IPI_1] ||

arch/mips/kvm/mips.c

486

intr == kvm_priority_to_irq[MIPS_EXC_INT_IPI_2] ||

arch/mips/kvm/mips.c

487

intr == (-kvm_priority_to_irq[MIPS_EXC_INT_IPI_1]) ||

arch/mips/kvm/mips.c

488

intr == (-kvm_priority_to_irq[MIPS_EXC_INT_IPI_2]))

arch/mips/kvm/mips.c

490

(int)intr);

arch/mips/kvm/mips.c

497

if (intr == 2 || intr == 3 || intr == 4 || intr == 6) {

arch/mips/kvm/mips.c

500

} else if (intr == -2 || intr == -3 || intr == -4 || intr == -6) {

arch/mips/kvm/vz.c

236

int intr = (int)irq->irq;

arch/mips/kvm/vz.c

242

kvm_vz_queue_irq(vcpu, kvm_irq_to_priority(intr));

arch/mips/kvm/vz.c

248

int intr = (int)irq->irq;

arch/mips/kvm/vz.c

254

kvm_vz_dequeue_irq(vcpu, kvm_irq_to_priority(-intr));

arch/mips/pci/ops-gt64xxx_pci0.c

34

u32 intr;

arch/mips/pci/ops-gt64xxx_pci0.c

71

intr = GT_READ(GT_INTRCAUSE_OFS);

arch/mips/pci/ops-gt64xxx_pci0.c

73

if (intr & (GT_INTRCAUSE_MASABORT0_BIT | GT_INTRCAUSE_TARABORT0_BIT)) {

arch/mips/pci/ops-msc.c

37

u32 intr;

arch/mips/pci/ops-msc.c

56

MSC_READ(MSC01_PCI_INTSTAT, intr);

arch/mips/pci/ops-msc.c

57

if (intr & (MSC01_PCI_INTCFG_MA_BIT | MSC01_PCI_INTCFG_TA_BIT)) {

arch/powerpc/platforms/52xx/mpc52xx_pic.c

134

static struct mpc52xx_intr __iomem *intr;

arch/powerpc/platforms/52xx/mpc52xx_pic.c

162

io_be_clrbit(&intr->ctrl, 11 - l2irq);

arch/powerpc/platforms/52xx/mpc52xx_pic.c

168

io_be_setbit(&intr->ctrl, 11 - l2irq);

arch/powerpc/platforms/52xx/mpc52xx_pic.c

174

io_be_setbit(&intr->ctrl, 27-l2irq);

arch/powerpc/platforms/52xx/mpc52xx_pic.c

195

ctrl_reg = in_be32(&intr->ctrl);

arch/powerpc/platforms/52xx/mpc52xx_pic.c

198

out_be32(&intr->ctrl, ctrl_reg);

arch/powerpc/platforms/52xx/mpc52xx_pic.c

224

io_be_setbit(&intr->main_mask, 16 - l2irq);

arch/powerpc/platforms/52xx/mpc52xx_pic.c

230

io_be_clrbit(&intr->main_mask, 16 - l2irq);

arch/powerpc/platforms/52xx/mpc52xx_pic.c

247

io_be_setbit(&intr->per_mask, 31 - l2irq);

arch/powerpc/platforms/52xx/mpc52xx_pic.c

253

io_be_clrbit(&intr->per_mask, 31 - l2irq);

arch/powerpc/platforms/52xx/mpc52xx_pic.c

357

reg = in_be32(&intr->ctrl);

arch/powerpc/platforms/52xx/mpc52xx_pic.c

411

intr = of_iomap(picnode, 0);

arch/powerpc/platforms/52xx/mpc52xx_pic.c

412

if (!intr)

arch/powerpc/platforms/52xx/mpc52xx_pic.c

423

pr_debug("MPC5200 IRQ controller mapped to 0x%p\n", intr);

arch/powerpc/platforms/52xx/mpc52xx_pic.c

428

out_be32(&intr->per_mask, 0x7ffffc00); /* 1 means disabled */

arch/powerpc/platforms/52xx/mpc52xx_pic.c

429

out_be32(&intr->main_mask, 0x00010fff); /* 1 means disabled */

arch/powerpc/platforms/52xx/mpc52xx_pic.c

430

intr_ctrl = in_be32(&intr->ctrl);

arch/powerpc/platforms/52xx/mpc52xx_pic.c

436

out_be32(&intr->ctrl, intr_ctrl);

arch/powerpc/platforms/52xx/mpc52xx_pic.c

439

out_be32(&intr->per_pri1, 0);

arch/powerpc/platforms/52xx/mpc52xx_pic.c

440

out_be32(&intr->per_pri2, 0);

arch/powerpc/platforms/52xx/mpc52xx_pic.c

441

out_be32(&intr->per_pri3, 0);

arch/powerpc/platforms/52xx/mpc52xx_pic.c

442

out_be32(&intr->main_pri1, 0);

arch/powerpc/platforms/52xx/mpc52xx_pic.c

443

out_be32(&intr->main_pri2, 0);

arch/powerpc/platforms/52xx/mpc52xx_pic.c

493

status = in_be32(&intr->enc_status);

arch/powerpc/platforms/52xx/mpc52xx_pm.c

128

intr_main_mask = in_be32(&intr->main_mask);

arch/powerpc/platforms/52xx/mpc52xx_pm.c

129

out_be32(&intr->main_mask, intr_main_mask | 0x1ffff);

arch/powerpc/platforms/52xx/mpc52xx_pm.c

162

mpc52xx_deep_sleep(sram, sdram, cdm, intr);

arch/powerpc/platforms/52xx/mpc52xx_pm.c

181

out_be32(&intr->main_mask, intr_main_mask);

arch/powerpc/platforms/52xx/mpc52xx_pm.c

22

static struct mpc52xx_intr __iomem *intr;

arch/powerpc/platforms/52xx/mpc52xx_pm.c

91

intr = mbar + 0x500;

arch/powerpc/platforms/8xx/cpm1.c

144

__be16 dir, par, odr_sor, dat, intr;

arch/powerpc/platforms/8xx/cpm1.c

230

setbits16(&iop->intr, pin);

arch/powerpc/platforms/8xx/cpm1.c

232

clrbits16(&iop->intr, pin);

arch/sparc/kernel/of_device_32.c

344

const struct linux_prom_irqs *intr;

arch/sparc/kernel/of_device_32.c

356

intr = of_get_property(dp, "intr", &len);

arch/sparc/kernel/of_device_32.c

357

if (intr) {

arch/sparc/kernel/of_device_32.c

361

sparc_config.build_device_irq(op, intr[i].pri);

arch/sparc/kernel/prom_32.c

138

unsigned int *intr;

arch/sparc/kernel/prom_32.c

157

intr = &interrupt; /* IRQ0 does not exist */

arch/sparc/kernel/prom_32.c

159

intr = prop->value;

arch/sparc/kernel/prom_32.c

161

sprintf(tmp_buf, "%s@%x,%x", name, *intr, reg0);

arch/x86/events/intel/pt.c

1133

buf->stop_te->intr = 0;

arch/x86/events/intel/pt.c

1137

buf->intr_te->intr = 0;

arch/x86/events/intel/pt.c

1170

buf->stop_te->intr = 1;

arch/x86/events/intel/pt.c

1171

buf->intr_te->intr = 1;

arch/x86/events/intel/pt.c

797

TOPA_ENTRY(topa, -1)->intr = 1;

arch/x86/events/intel/pt.c

829

tp->table[i].intr ? 'I' : ' ',

arch/x86/events/intel/pt.h

30

u64 intr : 1;

arch/x86/include/asm/kvm_host.h

521

bool intr;

arch/x86/kvm/pmu.c

196

if (pmc->intr && !skip_pmi)

arch/x86/kvm/pmu.c

252

bool intr)

arch/x86/kvm/pmu.c

300

pmc->intr = intr || pebs;

arch/x86/kvm/svm/svm.c

3723

struct kvm_queued_interrupt *intr = &vcpu->arch.interrupt;

arch/x86/kvm/svm/svm.c

3727

if (intr->soft) {

arch/x86/kvm/svm/svm.c

3728

if (svm_update_soft_interrupt_rip(vcpu, intr->nr))

arch/x86/kvm/svm/svm.c

3736

trace_kvm_inj_virq(intr->nr, intr->soft, reinjected);

arch/x86/kvm/svm/svm.c

3739

svm->vmcb->control.event_inj = intr->nr | SVM_EVTINJ_VALID | type;

arch/x86/kvm/vmx/vmx.c

5177

uint32_t intr;

arch/x86/kvm/vmx/vmx.c

5190

intr = irq | INTR_INFO_VALID_MASK;

arch/x86/kvm/vmx/vmx.c

5192

intr |= INTR_TYPE_SOFT_INTR;

arch/x86/kvm/vmx/vmx.c

5196

intr |= INTR_TYPE_EXT_INTR;

arch/x86/kvm/vmx/vmx.c

5197

vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, intr);

arch/x86/kvm/x86.h

600

enum kvm_intr_type intr)

arch/x86/kvm/x86.h

602

WRITE_ONCE(vcpu->arch.handling_intr_from_guest, (u8)intr);

drivers/accel/habanalabs/common/irq.c

258

struct hl_user_interrupt *intr)

drivers/accel/habanalabs/common/irq.c

265

ts_free_jobs_data = &intr->ts_free_jobs_data;

drivers/accel/habanalabs/common/irq.c

283

intr->interrupt_id);

drivers/accel/habanalabs/common/irq.c

302

timestamp = ktime_to_ns(intr->timestamp);

drivers/accel/habanalabs/common/irq.c

307

pend, pend->ts_reg_info.timestamp_kernel_addr, intr->interrupt_id);

drivers/accel/habanalabs/common/irq.c

331

static void handle_user_interrupt_ts_list(struct hl_device *hdev, struct hl_user_interrupt *intr)

drivers/accel/habanalabs/common/irq.c

353

spin_lock_irqsave(&intr->ts_list_lock, flags);

drivers/accel/habanalabs/common/irq.c

354

list_for_each_entry_safe(pend, temp_pend, &intr->ts_list_head, list_node) {

drivers/accel/habanalabs/common/irq.c

360

&dynamic_alloc_list_head, intr);

drivers/accel/habanalabs/common/irq.c

366

spin_unlock_irqrestore(&intr->ts_list_lock, flags);

drivers/accel/habanalabs/common/irq.c

379

static void handle_user_interrupt_wait_list(struct hl_device *hdev, struct hl_user_interrupt *intr)

drivers/accel/habanalabs/common/irq.c

384

spin_lock_irqsave(&intr->wait_list_lock, flags);

drivers/accel/habanalabs/common/irq.c

385

list_for_each_entry_safe(pend, temp_pend, &intr->wait_list_head, list_node) {

drivers/accel/habanalabs/common/irq.c

389

pend->fence.timestamp = intr->timestamp;

drivers/accel/habanalabs/common/irq.c

393

spin_unlock_irqrestore(&intr->wait_list_lock, flags);

drivers/atm/fore200e.c

1654

tpd->spec.intr = 1;

drivers/atm/fore200e.h

116

u32 intr : 4 /* interrupt requested */

drivers/block/swim3.c

1098

in_8(&sw->intr);

drivers/block/swim3.c

377

in_8(&sw->intr); /* clear SEEN_SECTOR bit */

drivers/block/swim3.c

479

in_8(&sw->intr);

drivers/block/swim3.c

659

int intr, err, n;

drivers/block/swim3.c

669

intr = in_8(&sw->intr);

drivers/block/swim3.c

670

err = (intr & ERROR_INTR)? in_8(&sw->error): 0;

drivers/block/swim3.c

671

if ((intr & ERROR_INTR) && fs->state != do_transfer)

drivers/block/swim3.c

673

fs->state, rq_data_dir(req), intr, err);

drivers/block/swim3.c

676

if (intr & SEEN_SECTOR) {

drivers/block/swim3.c

71

REG(intr);

drivers/block/swim3.c

724

if ((intr & (ERROR_INTR | TRANSFER_DONE)) == 0)

drivers/block/swim3.c

742

if ((intr & ERROR_INTR) == 0 && cp->xfer_status == 0) {

drivers/block/swim3.c

755

if (intr & ERROR_INTR) {

drivers/block/swim3.c

776

fs->state, rq_data_dir(req), intr, err);

drivers/char/hw_random/jh7110-trng.c

176

u32 mode, intr = 0;

drivers/char/hw_random/jh7110-trng.c

185

intr |= STARFIVE_IE_ALL;

drivers/char/hw_random/jh7110-trng.c

186

writel(intr, trng->base + STARFIVE_IE);

drivers/clocksource/timer-zevio.c

101

u32 intr;

drivers/clocksource/timer-zevio.c

103

intr = readl(timer->interrupt_regs + IO_INTR_ACK);

drivers/clocksource/timer-zevio.c

104

if (!(intr & TIMER_INTR_MSK))

drivers/crypto/axis/artpec6_crypto.c

153

unsigned char intr : 1;

drivers/crypto/axis/artpec6_crypto.c

2579

u32 intr;

drivers/crypto/axis/artpec6_crypto.c

2582

intr = readl_relaxed(base + A6_PDMA_MASKED_INTR);

drivers/crypto/axis/artpec6_crypto.c

2589

intr = readl_relaxed(base + A7_PDMA_MASKED_INTR);

drivers/crypto/axis/artpec6_crypto.c

2604

if (intr & mask_in_data)

drivers/crypto/axis/artpec6_crypto.c

2607

if (intr & mask_in_eop_flush)

drivers/crypto/axis/artpec6_crypto.c

2614

if (intr & mask_in_eop_flush)

drivers/crypto/axis/artpec6_crypto.c

738

dma_addr_t addr, unsigned int len, bool intr)

drivers/crypto/axis/artpec6_crypto.c

751

d->ctrl.intr = intr;

drivers/crypto/axis/artpec6_crypto.c

988

d->ctrl.intr = 1;

drivers/crypto/cavium/cpt/cptpf_mbox.c

148

u64 intr;

drivers/crypto/cavium/cpt/cptpf_mbox.c

151

intr = cpt_read_csr64(cpt->reg_base, CPTX_PF_MBOX_INTX(0, 0));

drivers/crypto/cavium/cpt/cptpf_mbox.c

152

dev_dbg(&cpt->pdev->dev, "PF interrupt Mbox%d 0x%llx\n", mbx, intr);

drivers/crypto/cavium/cpt/cptpf_mbox.c

154

if (intr & (1ULL << vf)) {

drivers/crypto/cavium/cpt/cptvf_main.c

519

u64 intr;

drivers/crypto/cavium/cpt/cptvf_main.c

521

intr = cptvf_read_vf_misc_intr_status(cptvf);

drivers/crypto/cavium/cpt/cptvf_main.c

523

if (likely(intr & CPT_VF_INTR_MBOX_MASK)) {

drivers/crypto/cavium/cpt/cptvf_main.c

525

intr, cptvf->vfid);

drivers/crypto/cavium/cpt/cptvf_main.c

528

} else if (unlikely(intr & CPT_VF_INTR_DOVF_MASK)) {

drivers/crypto/cavium/cpt/cptvf_main.c

533

intr, cptvf->vfid);

drivers/crypto/cavium/cpt/cptvf_main.c

534

} else if (unlikely(intr & CPT_VF_INTR_IRDE_MASK)) {

drivers/crypto/cavium/cpt/cptvf_main.c

537

intr, cptvf->vfid);

drivers/crypto/cavium/cpt/cptvf_main.c

538

} else if (unlikely(intr & CPT_VF_INTR_NWRP_MASK)) {

drivers/crypto/cavium/cpt/cptvf_main.c

541

intr, cptvf->vfid);

drivers/crypto/cavium/cpt/cptvf_main.c

542

} else if (unlikely(intr & CPT_VF_INTR_SERR_MASK)) {

drivers/crypto/cavium/cpt/cptvf_main.c

545

intr, cptvf->vfid);

drivers/crypto/cavium/cpt/cptvf_main.c

591

u32 intr = cptvf_read_vq_done_count(cptvf);

drivers/crypto/cavium/cpt/cptvf_main.c

593

if (intr) {

drivers/crypto/cavium/cpt/cptvf_main.c

599

cptvf_write_vq_done_ack(cptvf, intr);

drivers/crypto/marvell/octeontx/otx_cptpf_mbox.c

242

u64 intr;

drivers/crypto/marvell/octeontx/otx_cptpf_mbox.c

245

intr = readq(cpt->reg_base + OTX_CPT_PF_MBOX_INTX(0));

drivers/crypto/marvell/octeontx/otx_cptpf_mbox.c

246

pr_debug("PF interrupt mbox%d mask 0x%llx\n", mbx, intr);

drivers/crypto/marvell/octeontx/otx_cptpf_mbox.c

248

if (intr & (1ULL << vf)) {

drivers/crypto/marvell/octeontx/otx_cptvf_main.c

498

u64 intr;

drivers/crypto/marvell/octeontx/otx_cptvf_main.c

500

intr = cptvf_read_vf_misc_intr_status(cptvf);

drivers/crypto/marvell/octeontx/otx_cptvf_main.c

502

if (likely(intr & OTX_CPT_VF_INTR_MBOX_MASK)) {

drivers/crypto/marvell/octeontx/otx_cptvf_main.c

504

intr, cptvf->vfid);

drivers/crypto/marvell/octeontx/otx_cptvf_main.c

507

} else if (unlikely(intr & OTX_CPT_VF_INTR_DOVF_MASK)) {

drivers/crypto/marvell/octeontx/otx_cptvf_main.c

513

intr, cptvf->vfid);

drivers/crypto/marvell/octeontx/otx_cptvf_main.c

514

} else if (unlikely(intr & OTX_CPT_VF_INTR_IRDE_MASK)) {

drivers/crypto/marvell/octeontx/otx_cptvf_main.c

518

intr, cptvf->vfid);

drivers/crypto/marvell/octeontx/otx_cptvf_main.c

519

} else if (unlikely(intr & OTX_CPT_VF_INTR_NWRP_MASK)) {

drivers/crypto/marvell/octeontx/otx_cptvf_main.c

523

intr, cptvf->vfid);

drivers/crypto/marvell/octeontx/otx_cptvf_main.c

524

} else if (unlikely(intr & OTX_CPT_VF_INTR_SERR_MASK)) {

drivers/crypto/marvell/octeontx/otx_cptvf_main.c

528

intr, cptvf->vfid);

drivers/crypto/marvell/octeontx/otx_cptvf_main.c

573

u32 intr = cptvf_read_vq_done_count(cptvf);

drivers/crypto/marvell/octeontx/otx_cptvf_main.c

575

if (intr) {

drivers/crypto/marvell/octeontx/otx_cptvf_main.c

582

cptvf_write_vq_done_ack(cptvf, intr);

drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c

181

u64 intr;

drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c

187

intr = otx2_cpt_read64(cptpf->reg_base, BLKADDR_RVUM, 0,

drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c

189

if (!intr)

drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c

193

if (!(intr & BIT_ULL(vf)))

drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c

213

u64 intr;

drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c

219

intr = otx2_cpt_read64(cptpf->reg_base, BLKADDR_RVUM, 0,

drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c

221

if (!intr)

drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c

224

if (!(intr & BIT_ULL(vf)))

drivers/crypto/marvell/octeontx2/otx2_cptpf_mbox.c

346

u64 intr;

drivers/crypto/marvell/octeontx2/otx2_cptpf_mbox.c

354

intr = otx2_cpt_read64(cptpf->reg_base, BLKADDR_RVUM, 0,

drivers/crypto/marvell/octeontx2/otx2_cptpf_mbox.c

359

if (intr & (1ULL << vf->intr_idx)) {

drivers/crypto/marvell/octeontx2/otx2_cptpf_mbox.c

423

u64 intr;

drivers/crypto/marvell/octeontx2/otx2_cptpf_mbox.c

426

intr = otx2_cpt_read64(cptpf->reg_base, BLKADDR_RVUM, 0, RVU_PF_INT);

drivers/crypto/marvell/octeontx2/otx2_cptpf_mbox.c

428

if (intr & 0x1ULL) {

drivers/crypto/marvell/octeontx2/otx2_cptvf_mbox.c

53

u64 intr;

drivers/crypto/marvell/octeontx2/otx2_cptvf_mbox.c

56

intr = otx2_cpt_read64(cptvf->reg_base, BLKADDR_RVUM, 0,

drivers/crypto/marvell/octeontx2/otx2_cptvf_mbox.c

59

if (intr & 0x1ULL) {

drivers/dma-buf/dma-fence.c

523

dma_fence_wait_timeout(struct dma_fence *fence, bool intr, signed long timeout)

drivers/dma-buf/dma-fence.c

542

ret = fence->ops->wait(fence, intr, timeout);

drivers/dma-buf/dma-fence.c

544

ret = dma_fence_default_wait(fence, intr, timeout);

drivers/dma-buf/dma-fence.c

800

dma_fence_default_wait(struct dma_fence *fence, bool intr, signed long timeout)

drivers/dma-buf/dma-fence.c

811

if (intr && signal_pending(current)) {

drivers/dma-buf/dma-fence.c

826

if (intr)

drivers/dma-buf/dma-fence.c

835

if (ret > 0 && intr && signal_pending(current))

drivers/dma-buf/dma-fence.c

888

bool intr, signed long timeout, uint32_t *idx)

drivers/dma-buf/dma-fence.c

928

if (intr)

drivers/dma-buf/dma-fence.c

938

if (ret > 0 && intr && signal_pending(current))

drivers/dma-buf/dma-resv.c

679

bool intr, unsigned long timeout)

drivers/dma-buf/dma-resv.c

688

ret = dma_fence_wait_timeout(fence, intr, timeout);

drivers/dma/amd/qdma/qdma.c

833

struct qdma_intr_ring *intr = data;

drivers/dma/amd/qdma/qdma.c

842

qdev = intr->qdev;

drivers/dma/amd/qdma/qdma.c

843

index = intr->cidx;

drivers/dma/amd/qdma/qdma.c

850

intr_ent = le64_to_cpu(intr->base[index]);

drivers/dma/amd/qdma/qdma.c

852

if (color != intr->color)

drivers/dma/amd/qdma/qdma.c

899

intr->color = !intr->color;

drivers/dma/amd/qdma/qdma.c

907

qdma_dbg(qdev, "update intr ring%d %d", intr->ridx, index);

drivers/dma/amd/qdma/qdma.c

913

intr->cidx = index;

drivers/dma/amd/qdma/qdma.c

915

ret = qdma_update_cidx(q, intr->ridx, index);

drivers/dma/fsl-edma-main.c

133

unsigned int intr;

drivers/dma/fsl-edma-main.c

135

intr = edma_readl_chreg(fsl_chan, ch_int);

drivers/dma/fsl-edma-main.c

136

if (!intr)

drivers/dma/fsl-edma-main.c

37

unsigned int intr, ch;

drivers/dma/fsl-edma-main.c

40

intr = edma_readl(fsl_edma, regs->intl);

drivers/dma/fsl-edma-main.c

41

if (!intr)

drivers/dma/fsl-edma-main.c

45

if (intr & (0x1 << ch)) {

drivers/dma/fsl-qdma.c

743

unsigned int intr;

drivers/dma/fsl-qdma.c

751

intr = qdma_readl(fsl_qdma, status + FSL_QDMA_DEDR);

drivers/dma/fsl-qdma.c

753

if (intr) {

drivers/dma/fsl-qdma.c

760

intr, decfdw0r, decfdw1r, decfdw2r, decfdw3r);

drivers/dma/fsl-qdma.c

770

unsigned int intr, reg;

drivers/dma/fsl-qdma.c

784

intr = qdma_readl(fsl_qdma, block + FSL_QDMA_BCQIDR(0));

drivers/dma/fsl-qdma.c

786

if ((intr & FSL_QDMA_CQIDR_SQT) != 0)

drivers/dma/fsl-qdma.c

787

intr = fsl_qdma_queue_transfer_complete(fsl_qdma, block, id);

drivers/dma/fsl-qdma.c

789

if (intr != 0) {

drivers/extcon/extcon-fsa9480.c

247

int intr = 0;

drivers/extcon/extcon-fsa9480.c

250

fsa9480_read_irq(usbsw, &intr);

drivers/extcon/extcon-fsa9480.c

251

if (!intr)

drivers/gpio/gpio-ep93xx.c

278

void __iomem *intr;

drivers/gpio/gpio-ep93xx.c

280

intr = devm_platform_ioremap_resource_byname(pdev, "intr");

drivers/gpio/gpio-ep93xx.c

281

if (IS_ERR(intr))

drivers/gpio/gpio-ep93xx.c

282

return PTR_ERR(intr);

drivers/gpio/gpio-ep93xx.c

289

egc->eic->base = intr;

drivers/gpio/gpio-xgs-iproc.c

176

int_status = readl_relaxed(chip->intr + IPROC_CCA_INT_STS);

drivers/gpio/gpio-xgs-iproc.c

259

chip->intr = devm_platform_ioremap_resource(pdev, 1);

drivers/gpio/gpio-xgs-iproc.c

260

if (IS_ERR(chip->intr))

drivers/gpio/gpio-xgs-iproc.c

261

return PTR_ERR(chip->intr);

drivers/gpio/gpio-xgs-iproc.c

264

val = readl_relaxed(chip->intr + IPROC_CCA_INT_MASK);

drivers/gpio/gpio-xgs-iproc.c

266

writel_relaxed(val, chip->intr + IPROC_CCA_INT_MASK);

drivers/gpio/gpio-xgs-iproc.c

302

if (chip->intr) {

drivers/gpio/gpio-xgs-iproc.c

305

val = readl_relaxed(chip->intr + IPROC_CCA_INT_MASK);

drivers/gpio/gpio-xgs-iproc.c

307

writel_relaxed(val, chip->intr + IPROC_CCA_INT_MASK);

drivers/gpio/gpio-xgs-iproc.c

36

void __iomem *intr;

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h

326

struct amdgpu_device *adev, struct kgd_mem *mem, bool intr);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c

1257

bool wait, bool intr)

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c

1262

ret = amdgpu_sync_wait(ctx->sync, intr);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c

2207

struct amdgpu_device *adev, struct kgd_mem *mem, bool intr)

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c

2218

ret = amdgpu_sync_wait(&sync, intr);

drivers/gpu/drm/amd/amdgpu/amdgpu_object.c

1433

bool intr)

drivers/gpu/drm/amd/amdgpu/amdgpu_object.c

1440

r = amdgpu_sync_wait(&sync, intr);

drivers/gpu/drm/amd/amdgpu/amdgpu_object.c

1455

int amdgpu_bo_sync_wait(struct amdgpu_bo *bo, void *owner, bool intr)

drivers/gpu/drm/amd/amdgpu/amdgpu_object.c

1460

AMDGPU_SYNC_NE_OWNER, owner, intr);

drivers/gpu/drm/amd/amdgpu/amdgpu_object.h

305

bool intr);

drivers/gpu/drm/amd/amdgpu/amdgpu_object.h

306

int amdgpu_bo_sync_wait(struct amdgpu_bo *bo, void *owner, bool intr);

drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c

458

int amdgpu_sync_wait(struct amdgpu_sync *sync, bool intr)

drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c

465

r = dma_fence_wait(e->fence, intr);

drivers/gpu/drm/amd/amdgpu/amdgpu_sync.h

62

int amdgpu_sync_wait(struct amdgpu_sync *sync, bool intr);

drivers/gpu/drm/amd/amdkfd/kfd_svm.c

1569

bool intr;

drivers/gpu/drm/amd/amdkfd/kfd_svm.c

1574

static int svm_range_reserve_bos(struct svm_validate_context *ctx, bool intr)

drivers/gpu/drm/amd/amdkfd/kfd_svm.c

1581

drm_exec_init(&ctx->exec, intr ? DRM_EXEC_INTERRUPTIBLE_WAIT: 0, 0);

drivers/gpu/drm/amd/amdkfd/kfd_svm.c

1668

bool intr, bool wait, bool flush_tlb)

drivers/gpu/drm/amd/amdkfd/kfd_svm.c

1682

ctx->intr = intr;

drivers/gpu/drm/amd/amdkfd/kfd_svm.c

1735

r = svm_range_reserve_bos(ctx, intr);

drivers/gpu/drm/drm_suballoc.c

316

gfp_t gfp, bool intr, size_t align)

drivers/gpu/drm/drm_suballoc.c

365

t = dma_fence_wait_any_timeout(fences, count, intr,

drivers/gpu/drm/drm_suballoc.c

373

} else if (intr) {

drivers/gpu/drm/etnaviv/etnaviv_gpu.c

1580

u32 intr = gpu_read(gpu, VIVS_HI_INTR_ACKNOWLEDGE);

drivers/gpu/drm/etnaviv/etnaviv_gpu.c

1582

if (intr != 0) {

drivers/gpu/drm/etnaviv/etnaviv_gpu.c

1588

dev_dbg(gpu->dev, "intr 0x%08x\n", intr);

drivers/gpu/drm/etnaviv/etnaviv_gpu.c

1590

if (intr & VIVS_HI_INTR_ACKNOWLEDGE_AXI_BUS_ERROR) {

drivers/gpu/drm/etnaviv/etnaviv_gpu.c

1592

intr &= ~VIVS_HI_INTR_ACKNOWLEDGE_AXI_BUS_ERROR;

drivers/gpu/drm/etnaviv/etnaviv_gpu.c

1595

if (intr & VIVS_HI_INTR_ACKNOWLEDGE_MMU_EXCEPTION) {

drivers/gpu/drm/etnaviv/etnaviv_gpu.c

1599

intr &= ~VIVS_HI_INTR_ACKNOWLEDGE_MMU_EXCEPTION;

drivers/gpu/drm/etnaviv/etnaviv_gpu.c

1602

while ((event = ffs(intr)) != 0) {

drivers/gpu/drm/etnaviv/etnaviv_gpu.c

1607

intr &= ~(1 << event);

drivers/gpu/drm/i915/gem/i915_gem_object.c

960

bool intr)

drivers/gpu/drm/i915/gem/i915_gem_object.c

967

intr, MAX_SCHEDULE_TIMEOUT);

drivers/gpu/drm/i915/gem/i915_gem_object.h

165

bool intr)

drivers/gpu/drm/i915/gem/i915_gem_object.h

169

if (intr)

drivers/gpu/drm/i915/gem/i915_gem_object.h

192

return __i915_gem_object_lock(obj, ww, ww && ww->intr);

drivers/gpu/drm/i915/gem/i915_gem_object.h

198

WARN_ON(ww && !ww->intr);

drivers/gpu/drm/i915/gem/i915_gem_object.h

764

bool intr);

drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c

706

bool allow_accel, bool intr)

drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c

711

.interruptible = intr,

drivers/gpu/drm/i915/gem/i915_gem_ttm_move.h

29

bool allow_accel, bool intr);

drivers/gpu/drm/i915/gt/intel_gt_irq.c

124

const u16 intr = GEN11_INTR_ENGINE_INTR(identity);

drivers/gpu/drm/i915/gt/intel_gt_irq.c

126

if (unlikely(!intr))

drivers/gpu/drm/i915/gt/intel_gt_irq.c

138

return intel_engine_cs_irq(engine, intr);

drivers/gpu/drm/i915/gt/intel_gt_irq.c

142

return gen11_other_irq_handler(gt, instance, intr);

drivers/gpu/drm/i915/gt/intel_gt_irq.c

145

class, instance, intr);

drivers/gpu/drm/i915/i915_gem_ww.c

13

ww->intr = intr;

drivers/gpu/drm/i915/i915_gem_ww.c

50

if (ww->intr)

drivers/gpu/drm/i915/i915_gem_ww.c

9

void i915_gem_ww_ctx_init(struct i915_gem_ww_ctx *ww, bool intr)

drivers/gpu/drm/i915/i915_gem_ww.h

14

bool intr;

drivers/gpu/drm/i915/i915_gem_ww.h

17

void i915_gem_ww_ctx_init(struct i915_gem_ww_ctx *ctx, bool intr);

drivers/gpu/drm/i915/i915_vma_resource.c

298

bool intr)

drivers/gpu/drm/i915/i915_vma_resource.c

309

int ret = dma_fence_wait(&node->unbind_fence, intr);

drivers/gpu/drm/i915/i915_vma_resource.c

383

bool intr,

drivers/gpu/drm/i915/i915_vma_resource.c

402

ret = dma_fence_wait(&node->unbind_fence, intr);

drivers/gpu/drm/i915/i915_vma_resource.h

246

bool intr);

drivers/gpu/drm/i915/i915_vma_resource.h

252

bool intr,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

294

static inline struct dpu_hw_intr_entry *dpu_core_irq_get_entry(struct dpu_hw_intr *intr,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

297

return &intr->irq_tbl[irq_idx - 1];

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

333

struct dpu_hw_intr *intr = dpu_kms->hw_intr;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

341

if (!intr)

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

344

spin_lock_irqsave(&intr->irq_lock, irq_flags);

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

346

if (!test_bit(reg_idx, &intr->irq_mask))

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

350

irq_status = DPU_REG_READ(&intr->hw, intr->intr_set[reg_idx].status_off);

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

353

enable_mask = DPU_REG_READ(&intr->hw, intr->intr_set[reg_idx].en_off);

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

357

DPU_REG_WRITE(&intr->hw, intr->intr_set[reg_idx].clr_off,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

386

spin_unlock_irqrestore(&intr->irq_lock, irq_flags);

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

391

static int dpu_hw_intr_enable_irq_locked(struct dpu_hw_intr *intr,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

399

if (!intr)

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

413

assert_spin_locked(&intr->irq_lock);

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

416

reg = &intr->intr_set[reg_idx];

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

422

cache_irq_mask = intr->cache_irq_mask[reg_idx];

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

430

DPU_REG_WRITE(&intr->hw, reg->clr_off, DPU_IRQ_MASK(irq_idx));

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

432

DPU_REG_WRITE(&intr->hw, reg->en_off, cache_irq_mask);

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

437

intr->cache_irq_mask[reg_idx] = cache_irq_mask;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

447

static int dpu_hw_intr_disable_irq_locked(struct dpu_hw_intr *intr,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

455

if (!intr)

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

469

assert_spin_locked(&intr->irq_lock);

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

472

reg = &intr->intr_set[reg_idx];

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

474

cache_irq_mask = intr->cache_irq_mask[reg_idx];

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

482

DPU_REG_WRITE(&intr->hw, reg->en_off, cache_irq_mask);

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

484

DPU_REG_WRITE(&intr->hw, reg->clr_off, DPU_IRQ_MASK(irq_idx));

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

489

intr->cache_irq_mask[reg_idx] = cache_irq_mask;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

501

struct dpu_hw_intr *intr = dpu_kms->hw_intr;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

504

if (!intr)

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

508

if (test_bit(i, &intr->irq_mask))

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

509

DPU_REG_WRITE(&intr->hw,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

510

intr->intr_set[i].clr_off, 0xffffffff);

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

519

struct dpu_hw_intr *intr = dpu_kms->hw_intr;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

522

if (!intr)

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

526

if (test_bit(i, &intr->irq_mask))

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

527

DPU_REG_WRITE(&intr->hw,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

528

intr->intr_set[i].en_off, 0x00000000);

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

544

struct dpu_hw_intr *intr = dpu_kms->hw_intr;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

549

if (!intr)

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

557

spin_lock_irqsave(&intr->irq_lock, irq_flags);

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

560

intr_status = DPU_REG_READ(&intr->hw,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

561

intr->intr_set[reg_idx].status_off) &

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

564

DPU_REG_WRITE(&intr->hw, intr->intr_set[reg_idx].clr_off,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

570

spin_unlock_irqrestore(&intr->irq_lock, irq_flags);

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

585

struct dpu_hw_intr *intr;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

591

intr = drmm_kzalloc(dev, sizeof(*intr), GFP_KERNEL);

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

592

if (!intr)

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

596

intr->intr_set = dpu_intr_set_13xx;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

598

intr->intr_set = dpu_intr_set_7xxx;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

600

intr->intr_set = dpu_intr_set_legacy;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

602

intr->hw.blk_addr = addr + m->mdp[0].base;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

604

intr->irq_mask = BIT(MDP_SSPP_TOP0_INTR) |

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

613

intr->irq_mask |= BIT(MDP_INTFn_INTR(intf->id));

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

616

intr->irq_mask |= BIT(DPU_IRQ_REG(intf->intr_tear_rd_ptr));

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

619

spin_lock_init(&intr->irq_lock);

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

621

return intr;

drivers/gpu/drm/msm/dp/dp_ctrl.c

228

u32 intr, intr_ack;

drivers/gpu/drm/msm/dp/dp_ctrl.c

230

intr = msm_dp_read_ahb(ctrl, REG_DP_INTR_STATUS);

drivers/gpu/drm/msm/dp/dp_ctrl.c

231

intr &= ~DP_INTERRUPT_STATUS1_MASK;

drivers/gpu/drm/msm/dp/dp_ctrl.c

232

intr_ack = (intr & DP_INTERRUPT_STATUS1)

drivers/gpu/drm/msm/dp/dp_ctrl.c

237

return intr;

drivers/gpu/drm/msm/dp/dp_ctrl.c

243

u32 intr, intr_ack;

drivers/gpu/drm/msm/dp/dp_ctrl.c

245

intr = msm_dp_read_ahb(ctrl, REG_DP_INTR_STATUS2);

drivers/gpu/drm/msm/dp/dp_ctrl.c

246

intr &= ~DP_INTERRUPT_STATUS2_MASK;

drivers/gpu/drm/msm/dp/dp_ctrl.c

247

intr_ack = (intr & DP_INTERRUPT_STATUS2)

drivers/gpu/drm/msm/dp/dp_ctrl.c

252

return intr;

drivers/gpu/drm/msm/dp/dp_ctrl.c

277

u32 intr, intr_ack;

drivers/gpu/drm/msm/dp/dp_ctrl.c

279

intr = msm_dp_read_ahb(ctrl, REG_DP_INTR_STATUS4);

drivers/gpu/drm/msm/dp/dp_ctrl.c

280

intr_ack = (intr & DP_INTERRUPT_STATUS4)

drivers/gpu/drm/msm/dp/dp_ctrl.c

284

return intr;

drivers/gpu/drm/msm/dsi/dsi_host.c

729

u32 intr;

drivers/gpu/drm/msm/dsi/dsi_host.c

733

intr = dsi_read(msm_host, REG_DSI_INTR_CTRL);

drivers/gpu/drm/msm/dsi/dsi_host.c

736

intr |= mask;

drivers/gpu/drm/msm/dsi/dsi_host.c

738

intr &= ~mask;

drivers/gpu/drm/msm/dsi/dsi_host.c

740

DBG("intr=%x enable=%d", intr, enable);

drivers/gpu/drm/msm/dsi/dsi_host.c

742

dsi_write(msm_host, REG_DSI_INTR_CTRL, intr);

drivers/gpu/drm/nouveau/include/nvkm/core/device.h

71

struct list_head intr;

drivers/gpu/drm/nouveau/include/nvkm/core/device.h

78

} intr;

drivers/gpu/drm/nouveau/include/nvkm/core/engine.h

26

void (*intr)(struct nvkm_engine *);

drivers/gpu/drm/nouveau/include/nvkm/core/intr.h

59

struct nvkm_intr *intr;

drivers/gpu/drm/nouveau/include/nvkm/core/subdev.h

44

void (*intr)(struct nvkm_subdev *);

drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h

103

void (*intr)(struct nvkm_falcon *, struct nvkm_chan *);

drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h

73

int (*bind_stat)(struct nvkm_falcon *, bool intr);

drivers/gpu/drm/nouveau/include/nvkm/engine/fifo.h

71

struct nvkm_inth intr;

drivers/gpu/drm/nouveau/include/nvkm/subdev/gsp.h

223

} intr[32];

drivers/gpu/drm/nouveau/include/nvkm/subdev/gsp.h

260

struct dentry *intr;

drivers/gpu/drm/nouveau/include/nvkm/subdev/i2c.h

49

u32 intr;

drivers/gpu/drm/nouveau/include/nvkm/subdev/mc.h

10

struct nvkm_intr intr;

drivers/gpu/drm/nouveau/include/nvkm/subdev/top.h

20

int intr;

drivers/gpu/drm/nouveau/include/nvkm/subdev/vfn.h

15

struct nvkm_intr intr;

drivers/gpu/drm/nouveau/nouveau_fence.c

263

nouveau_fence_wait_legacy(struct dma_fence *f, bool intr, long wait)

drivers/gpu/drm/nouveau/nouveau_fence.c

279

__set_current_state(intr ? TASK_INTERRUPTIBLE :

drivers/gpu/drm/nouveau/nouveau_fence.c

288

if (intr && signal_pending(current))

drivers/gpu/drm/nouveau/nouveau_fence.c

298

nouveau_fence_wait_busy(struct nouveau_fence *fence, bool intr)

drivers/gpu/drm/nouveau/nouveau_fence.c

308

__set_current_state(intr ?

drivers/gpu/drm/nouveau/nouveau_fence.c

312

if (intr && signal_pending(current)) {

drivers/gpu/drm/nouveau/nouveau_fence.c

323

nouveau_fence_wait(struct nouveau_fence *fence, bool lazy, bool intr)

drivers/gpu/drm/nouveau/nouveau_fence.c

328

return nouveau_fence_wait_busy(fence, intr);

drivers/gpu/drm/nouveau/nouveau_fence.c

330

ret = dma_fence_wait_timeout(&fence->base, intr, 15 * HZ);

drivers/gpu/drm/nouveau/nouveau_fence.c

341

bool exclusive, bool intr)

drivers/gpu/drm/nouveau/nouveau_fence.c

385

ret = dma_fence_wait(fence, intr);

drivers/gpu/drm/nouveau/nouveau_fence.h

32

int nouveau_fence_wait(struct nouveau_fence *, bool lazy, bool intr);

drivers/gpu/drm/nouveau/nouveau_fence.h

33

int nouveau_fence_sync(struct nouveau_bo *, struct nouveau_channel *, bool exclusive, bool intr);

drivers/gpu/drm/nouveau/nvkm/core/engine.c

161

.intr = nvkm_engine_intr,

drivers/gpu/drm/nouveau/nvkm/core/engine.c

85

if (engine->func->intr)

drivers/gpu/drm/nouveau/nvkm/core/engine.c

86

engine->func->intr(engine);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

105

struct nvkm_intr *intr;

drivers/gpu/drm/nouveau/nvkm/core/intr.c

110

intr = nvkm_intr_find(subdev, type, &leaf, &mask);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

111

if (intr) {

drivers/gpu/drm/nouveau/nvkm/core/intr.c

112

nvkm_debug(intr->subdev, "intr %d/%08x allowed by %s\n", leaf, mask, subdev->name);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

113

spin_lock_irqsave(&device->intr.lock, flags);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

114

nvkm_intr_allow_locked(intr, leaf, mask);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

115

spin_unlock_irqrestore(&device->intr.lock, flags);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

120

nvkm_intr_block_locked(struct nvkm_intr *intr, int leaf, u32 mask)

drivers/gpu/drm/nouveau/nvkm/core/intr.c

122

intr->mask[leaf] &= ~mask;

drivers/gpu/drm/nouveau/nvkm/core/intr.c

123

if (intr->func->block)

drivers/gpu/drm/nouveau/nvkm/core/intr.c

124

intr->func->block(intr, leaf, mask);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

131

struct nvkm_intr *intr;

drivers/gpu/drm/nouveau/nvkm/core/intr.c

136

intr = nvkm_intr_find(subdev, type, &leaf, &mask);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

137

if (intr) {

drivers/gpu/drm/nouveau/nvkm/core/intr.c

138

nvkm_debug(intr->subdev, "intr %d/%08x blocked by %s\n", leaf, mask, subdev->name);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

139

spin_lock_irqsave(&device->intr.lock, flags);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

140

nvkm_intr_block_locked(intr, leaf, mask);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

141

spin_unlock_irqrestore(&device->intr.lock, flags);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

148

struct nvkm_intr *intr;

drivers/gpu/drm/nouveau/nvkm/core/intr.c

150

list_for_each_entry(intr, &device->intr.intr, head)

drivers/gpu/drm/nouveau/nvkm/core/intr.c

151

intr->func->rearm(intr);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

157

struct nvkm_intr *intr;

drivers/gpu/drm/nouveau/nvkm/core/intr.c

159

list_for_each_entry(intr, &device->intr.intr, head)

drivers/gpu/drm/nouveau/nvkm/core/intr.c

160

intr->func->unarm(intr);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

167

struct nvkm_intr *intr;

drivers/gpu/drm/nouveau/nvkm/core/intr.c

174

spin_lock(&device->intr.lock);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

175

if (!device->intr.armed)

drivers/gpu/drm/nouveau/nvkm/core/intr.c

182

list_for_each_entry(intr, &device->intr.intr, head) {

drivers/gpu/drm/nouveau/nvkm/core/intr.c

183

if (intr->func->pending(intr))

drivers/gpu/drm/nouveau/nvkm/core/intr.c

195

for (prio = 0; prio < ARRAY_SIZE(device->intr.prio); prio++) {

drivers/gpu/drm/nouveau/nvkm/core/intr.c

196

list_for_each_entry(inth, &device->intr.prio[prio], head) {

drivers/gpu/drm/nouveau/nvkm/core/intr.c

197

struct nvkm_intr *intr = inth->intr;

drivers/gpu/drm/nouveau/nvkm/core/intr.c

199

if (intr->stat[inth->leaf] & inth->mask) {

drivers/gpu/drm/nouveau/nvkm/core/intr.c

201

if (intr->func->reset)

drivers/gpu/drm/nouveau/nvkm/core/intr.c

202

intr->func->reset(intr, inth->leaf, inth->mask);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

212

list_for_each_entry(intr, &device->intr.intr, head) {

drivers/gpu/drm/nouveau/nvkm/core/intr.c

213

for (leaf = 0; leaf < intr->leaves; leaf++) {

drivers/gpu/drm/nouveau/nvkm/core/intr.c

214

if (intr->stat[leaf]) {

drivers/gpu/drm/nouveau/nvkm/core/intr.c

215

nvkm_debug(intr->subdev, "intr%d: %08x\n",

drivers/gpu/drm/nouveau/nvkm/core/intr.c

216

leaf, intr->stat[leaf]);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

217

nvkm_intr_block_locked(intr, leaf, intr->stat[leaf]);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

227

spin_unlock(&device->intr.lock);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

233

struct nvkm_subdev *subdev, int leaves, struct nvkm_intr *intr)

drivers/gpu/drm/nouveau/nvkm/core/intr.c

238

intr->func = func;

drivers/gpu/drm/nouveau/nvkm/core/intr.c

239

intr->data = data;

drivers/gpu/drm/nouveau/nvkm/core/intr.c

240

intr->subdev = subdev;

drivers/gpu/drm/nouveau/nvkm/core/intr.c

241

intr->leaves = leaves;

drivers/gpu/drm/nouveau/nvkm/core/intr.c

242

intr->stat = kzalloc_objs(*intr->stat, leaves);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

243

intr->mask = kzalloc_objs(*intr->mask, leaves);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

244

if (!intr->stat || !intr->mask) {

drivers/gpu/drm/nouveau/nvkm/core/intr.c

245

kfree(intr->stat);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

249

if (intr->subdev->debug >= NV_DBG_DEBUG) {

drivers/gpu/drm/nouveau/nvkm/core/intr.c

250

for (i = 0; i < intr->leaves; i++)

drivers/gpu/drm/nouveau/nvkm/core/intr.c

251

intr->mask[i] = ~0;

drivers/gpu/drm/nouveau/nvkm/core/intr.c

254

spin_lock_irq(&device->intr.lock);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

255

list_add_tail(&intr->head, &device->intr.intr);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

256

spin_unlock_irq(&device->intr.lock);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

270

nvkm_intr_subdev_add_dev(struct nvkm_intr *intr, enum nvkm_subdev_type type, int inst)

drivers/gpu/drm/nouveau/nvkm/core/intr.c

276

subdev = nvkm_device_subdev(intr->subdev->device, type, inst);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

277

if (!subdev || !subdev->func->intr)

drivers/gpu/drm/nouveau/nvkm/core/intr.c

285

ret = nvkm_inth_add(intr, NVKM_INTR_SUBDEV, prio, subdev, nvkm_intr_subdev, &subdev->inth);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

29

nvkm_intr_xlat(struct nvkm_subdev *subdev, struct nvkm_intr *intr,

drivers/gpu/drm/nouveau/nvkm/core/intr.c

293

nvkm_intr_subdev_add(struct nvkm_intr *intr)

drivers/gpu/drm/nouveau/nvkm/core/intr.c

296

struct nvkm_device *device = intr->subdev->device;

drivers/gpu/drm/nouveau/nvkm/core/intr.c

299

for (data = intr->data; data && data->mask; data++) {

drivers/gpu/drm/nouveau/nvkm/core/intr.c

303

if (tdev->intr < 0 || !(data->mask & BIT(tdev->intr)))

drivers/gpu/drm/nouveau/nvkm/core/intr.c

306

nvkm_intr_subdev_add_dev(intr, tdev->type, tdev->inst);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

309

nvkm_intr_subdev_add_dev(intr, data->type, data->inst);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

318

struct nvkm_intr *intr;

drivers/gpu/drm/nouveau/nvkm/core/intr.c

321

if (unlikely(!device->intr.legacy_done)) {

drivers/gpu/drm/nouveau/nvkm/core/intr.c

322

list_for_each_entry(intr, &device->intr.intr, head)

drivers/gpu/drm/nouveau/nvkm/core/intr.c

323

nvkm_intr_subdev_add(intr);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

324

device->intr.legacy_done = true;

drivers/gpu/drm/nouveau/nvkm/core/intr.c

327

spin_lock_irq(&device->intr.lock);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

328

list_for_each_entry(intr, &device->intr.intr, head) {

drivers/gpu/drm/nouveau/nvkm/core/intr.c

329

for (i = 0; intr->func->block && i < intr->leaves; i++) {

drivers/gpu/drm/nouveau/nvkm/core/intr.c

330

intr->func->block(intr, i, ~0);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

331

intr->func->allow(intr, i, intr->mask[i]);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

336

device->intr.armed = true;

drivers/gpu/drm/nouveau/nvkm/core/intr.c

337

spin_unlock_irq(&device->intr.lock);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

343

spin_lock_irq(&device->intr.lock);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

345

device->intr.armed = false;

drivers/gpu/drm/nouveau/nvkm/core/intr.c

346

spin_unlock_irq(&device->intr.lock);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

354

device->intr.irq = device->func->irq(device);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

355

if (device->intr.irq < 0)

drivers/gpu/drm/nouveau/nvkm/core/intr.c

356

return device->intr.irq;

drivers/gpu/drm/nouveau/nvkm/core/intr.c

358

ret = request_irq(device->intr.irq, nvkm_intr, IRQF_SHARED, "nvkm", device);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

36

const struct nvkm_intr_data *data = intr->data;

drivers/gpu/drm/nouveau/nvkm/core/intr.c

362

device->intr.alloc = true;

drivers/gpu/drm/nouveau/nvkm/core/intr.c

369

struct nvkm_intr *intr, *intt;

drivers/gpu/drm/nouveau/nvkm/core/intr.c

371

list_for_each_entry_safe(intr, intt, &device->intr.intr, head) {

drivers/gpu/drm/nouveau/nvkm/core/intr.c

372

list_del(&intr->head);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

373

kfree(intr->mask);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

374

kfree(intr->stat);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

377

if (device->intr.alloc)

drivers/gpu/drm/nouveau/nvkm/core/intr.c

378

free_irq(device->intr.irq, device);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

386

INIT_LIST_HEAD(&device->intr.intr);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

387

for (i = 0; i < ARRAY_SIZE(device->intr.prio); i++)

drivers/gpu/drm/nouveau/nvkm/core/intr.c

388

INIT_LIST_HEAD(&device->intr.prio[i]);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

390

spin_lock_init(&device->intr.lock);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

391

device->intr.armed = false;

drivers/gpu/drm/nouveau/nvkm/core/intr.c

397

if (unlikely(!inth->intr))

drivers/gpu/drm/nouveau/nvkm/core/intr.c

406

struct nvkm_intr *intr = inth->intr;

drivers/gpu/drm/nouveau/nvkm/core/intr.c

409

if (unlikely(!inth->intr))

drivers/gpu/drm/nouveau/nvkm/core/intr.c

412

spin_lock_irqsave(&intr->subdev->device->intr.lock, flags);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

414

if ((intr->mask[inth->leaf] & inth->mask) != inth->mask)

drivers/gpu/drm/nouveau/nvkm/core/intr.c

415

nvkm_intr_allow_locked(intr, inth->leaf, inth->mask);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

417

spin_unlock_irqrestore(&intr->subdev->device->intr.lock, flags);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

42

if (tdev->intr >= 0 &&

drivers/gpu/drm/nouveau/nvkm/core/intr.c

421

nvkm_inth_add(struct nvkm_intr *intr, enum nvkm_intr_type type, enum nvkm_intr_prio prio,

drivers/gpu/drm/nouveau/nvkm/core/intr.c

430

ret = nvkm_intr_xlat(subdev, intr, type, &inth->leaf, &inth->mask);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

434

nvkm_debug(intr->subdev, "intr %d/%08x requested by %s\n",

drivers/gpu/drm/nouveau/nvkm/core/intr.c

437

inth->intr = intr;

drivers/gpu/drm/nouveau/nvkm/core/intr.c

440

list_add_tail(&inth->head, &device->intr.prio[prio]);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

45

if (data->mask & BIT(tdev->intr)) {

drivers/gpu/drm/nouveau/nvkm/core/intr.c

47

*mask = BIT(tdev->intr);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

65

if (type < intr->leaves * sizeof(*intr->stat) * 8) {

drivers/gpu/drm/nouveau/nvkm/core/intr.c

78

struct nvkm_intr *intr;

drivers/gpu/drm/nouveau/nvkm/core/intr.c

81

list_for_each_entry(intr, &subdev->device->intr.intr, head) {

drivers/gpu/drm/nouveau/nvkm/core/intr.c

82

ret = nvkm_intr_xlat(subdev, intr, type, leaf, mask);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

84

return intr;

drivers/gpu/drm/nouveau/nvkm/core/intr.c

91

nvkm_intr_allow_locked(struct nvkm_intr *intr, int leaf, u32 mask)

drivers/gpu/drm/nouveau/nvkm/core/intr.c

93

intr->mask[leaf] |= mask;

drivers/gpu/drm/nouveau/nvkm/core/intr.c

94

if (intr->func->allow) {

drivers/gpu/drm/nouveau/nvkm/core/intr.c

95

if (intr->func->reset)

drivers/gpu/drm/nouveau/nvkm/core/intr.c

96

intr->func->reset(intr, leaf, mask);

drivers/gpu/drm/nouveau/nvkm/core/intr.c

97

intr->func->allow(intr, leaf, mask);

drivers/gpu/drm/nouveau/nvkm/core/subdev.c

41

if (subdev->func->intr)

drivers/gpu/drm/nouveau/nvkm/core/subdev.c

42

subdev->func->intr(subdev);

drivers/gpu/drm/nouveau/nvkm/engine/ce/ga100.c

71

return nvkm_inth_add(&device->vfn->intr, vector, NVKM_INTR_PRIO_NORMAL,

drivers/gpu/drm/nouveau/nvkm/engine/ce/gf100.c

42

.intr = gt215_ce_intr,

drivers/gpu/drm/nouveau/nvkm/engine/ce/gf100.c

56

.intr = gt215_ce_intr,

drivers/gpu/drm/nouveau/nvkm/engine/ce/gk104.c

65

u32 intr = nvkm_rd32(device, 0x104908 + base) & mask;

drivers/gpu/drm/nouveau/nvkm/engine/ce/gk104.c

66

if (intr & 0x00000001) {

drivers/gpu/drm/nouveau/nvkm/engine/ce/gk104.c

69

intr &= ~0x00000001;

drivers/gpu/drm/nouveau/nvkm/engine/ce/gk104.c

71

if (intr & 0x00000002) {

drivers/gpu/drm/nouveau/nvkm/engine/ce/gk104.c

74

intr &= ~0x00000002;

drivers/gpu/drm/nouveau/nvkm/engine/ce/gk104.c

76

if (intr & 0x00000004) {

drivers/gpu/drm/nouveau/nvkm/engine/ce/gk104.c

79

intr &= ~0x00000004;

drivers/gpu/drm/nouveau/nvkm/engine/ce/gk104.c

81

if (intr) {

drivers/gpu/drm/nouveau/nvkm/engine/ce/gk104.c

82

nvkm_warn(subdev, "intr %08x\n", intr);

drivers/gpu/drm/nouveau/nvkm/engine/ce/gk104.c

83

nvkm_wr32(device, 0x104908 + base, intr);

drivers/gpu/drm/nouveau/nvkm/engine/ce/gk104.c

89

.intr = gk104_ce_intr,

drivers/gpu/drm/nouveau/nvkm/engine/ce/gm107.c

30

.intr = gk104_ce_intr,

drivers/gpu/drm/nouveau/nvkm/engine/ce/gm200.c

30

.intr = gk104_ce_intr,

drivers/gpu/drm/nouveau/nvkm/engine/ce/gp100.c

66

u32 intr = nvkm_rd32(device, 0x104410 + base) & mask;

drivers/gpu/drm/nouveau/nvkm/engine/ce/gp100.c

67

if (intr & 0x00000001) { //XXX: guess

drivers/gpu/drm/nouveau/nvkm/engine/ce/gp100.c

70

intr &= ~0x00000001;

drivers/gpu/drm/nouveau/nvkm/engine/ce/gp100.c

72

if (intr & 0x00000002) { //XXX: guess

drivers/gpu/drm/nouveau/nvkm/engine/ce/gp100.c

75

intr &= ~0x00000002;

drivers/gpu/drm/nouveau/nvkm/engine/ce/gp100.c

77

if (intr & 0x00000004) {

drivers/gpu/drm/nouveau/nvkm/engine/ce/gp100.c

80

intr &= ~0x00000004;

drivers/gpu/drm/nouveau/nvkm/engine/ce/gp100.c

82

if (intr) {

drivers/gpu/drm/nouveau/nvkm/engine/ce/gp100.c

83

nvkm_warn(subdev, "intr %08x\n", intr);

drivers/gpu/drm/nouveau/nvkm/engine/ce/gp100.c

84

nvkm_wr32(device, 0x104410 + base, intr);

drivers/gpu/drm/nouveau/nvkm/engine/ce/gp100.c

90

.intr = gp100_ce_intr,

drivers/gpu/drm/nouveau/nvkm/engine/ce/gp102.c

31

.intr = gp100_ce_intr,

drivers/gpu/drm/nouveau/nvkm/engine/ce/gt215.c

70

.intr = gt215_ce_intr,

drivers/gpu/drm/nouveau/nvkm/engine/ce/gv100.c

51

.intr = gp100_ce_intr,

drivers/gpu/drm/nouveau/nvkm/engine/ce/tu102.c

30

.intr = gp100_ce_intr,

drivers/gpu/drm/nouveau/nvkm/engine/cipher/g84.c

120

.intr = g84_cipher_intr,

drivers/gpu/drm/nouveau/nvkm/engine/disp/base.c

224

.intr = nvkm_disp_intr,

drivers/gpu/drm/nouveau/nvkm/engine/disp/base.c

98

disp->func->intr(disp);

drivers/gpu/drm/nouveau/nvkm/engine/disp/chan.c

136

chan->func->intr(chan, false);

drivers/gpu/drm/nouveau/nvkm/engine/disp/chan.c

145

chan->func->intr(chan, true);

drivers/gpu/drm/nouveau/nvkm/engine/disp/chan.h

39

void (*intr)(struct nvkm_disp_chan *, bool en);

drivers/gpu/drm/nouveau/nvkm/engine/disp/g84.c

326

.intr = nv50_disp_intr,

drivers/gpu/drm/nouveau/nvkm/engine/disp/g94.c

356

.intr = nv50_disp_intr,

drivers/gpu/drm/nouveau/nvkm/engine/disp/ga102.c

129

.intr = gv100_disp_intr,

drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c

1106

u32 intr = nvkm_rd32(device, 0x610088);

drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c

1108

if (intr & 0x00000001) {

drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c

1115

intr &= ~0x00000001;

drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c

1118

if (intr & 0x00000002) {

drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c

1123

intr &= ~0x00000002;

drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c

1126

if (intr & 0x00100000) {

drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c

1140

intr &= ~0x00100000;

drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c

1146

if (mask & intr) {

drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c

1238

.intr = gf119_disp_intr,

drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c

563

.intr = gf119_disp_chan_intr,

drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c

630

.intr = gf119_disp_chan_intr,

drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c

997

.intr = gf119_disp_chan_intr,

drivers/gpu/drm/nouveau/nvkm/engine/disp/gk104.c

310

.intr = gf119_disp_intr,

drivers/gpu/drm/nouveau/nvkm/engine/disp/gk110.c

36

.intr = gf119_disp_intr,

drivers/gpu/drm/nouveau/nvkm/engine/disp/gm107.c

90

.intr = gf119_disp_intr,

drivers/gpu/drm/nouveau/nvkm/engine/disp/gm200.c

173

.intr = gf119_disp_intr,

drivers/gpu/drm/nouveau/nvkm/engine/disp/gp100.c

63

.intr = gf119_disp_intr,

drivers/gpu/drm/nouveau/nvkm/engine/disp/gp102.c

134

.intr = gf119_disp_chan_intr,

drivers/gpu/drm/nouveau/nvkm/engine/disp/gp102.c

178

.intr = gf119_disp_intr,

drivers/gpu/drm/nouveau/nvkm/engine/disp/gp102.c

67

.intr = gf119_disp_chan_intr,

drivers/gpu/drm/nouveau/nvkm/engine/disp/gt200.c

86

.intr = nv50_disp_intr,

drivers/gpu/drm/nouveau/nvkm/engine/disp/gt215.c

244

.intr = nv50_disp_intr,

drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c

1231

.intr = gv100_disp_intr,

drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c

406

.intr = gv100_disp_wimm_intr,

drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c

532

.intr = gv100_disp_wndw_intr,

drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c

599

.intr = gv100_disp_curs_intr,

drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c

781

.intr = gv100_disp_core_intr,

drivers/gpu/drm/nouveau/nvkm/engine/disp/mcp77.c

50

.intr = nv50_disp_intr,

drivers/gpu/drm/nouveau/nvkm/engine/disp/mcp89.c

64

.intr = nv50_disp_intr,

drivers/gpu/drm/nouveau/nvkm/engine/disp/nv04.c

108

.intr = nv04_disp_intr,

drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c

1000

.intr = nv50_disp_chan_intr,

drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c

1772

.intr = nv50_disp_intr,

drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c

621

.intr = nv50_disp_chan_intr,

drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c

710

.intr = nv50_disp_chan_intr,

drivers/gpu/drm/nouveau/nvkm/engine/disp/priv.h

25

void (*intr)(struct nvkm_disp *);

drivers/gpu/drm/nouveau/nvkm/engine/disp/tu102.c

215

.intr = gv100_disp_intr,

drivers/gpu/drm/nouveau/nvkm/engine/falcon.c

332

.intr = nvkm_falcon_intr,

drivers/gpu/drm/nouveau/nvkm/engine/falcon.c

66

u32 intr = nvkm_rd32(device, base + 0x008) & dest & ~(dest >> 16);

drivers/gpu/drm/nouveau/nvkm/engine/falcon.c

73

if (intr & 0x00000040) {

drivers/gpu/drm/nouveau/nvkm/engine/falcon.c

74

if (falcon->func->intr) {

drivers/gpu/drm/nouveau/nvkm/engine/falcon.c

75

falcon->func->intr(falcon, chan);

drivers/gpu/drm/nouveau/nvkm/engine/falcon.c

77

intr &= ~0x00000040;

drivers/gpu/drm/nouveau/nvkm/engine/falcon.c

81

if (intr & 0x00000010) {

drivers/gpu/drm/nouveau/nvkm/engine/falcon.c

84

intr &= ~0x00000010;

drivers/gpu/drm/nouveau/nvkm/engine/falcon.c

87

if (intr) {

drivers/gpu/drm/nouveau/nvkm/engine/falcon.c

88

nvkm_error(subdev, "intr %08x\n", intr);

drivers/gpu/drm/nouveau/nvkm/engine/falcon.c

89

nvkm_wr32(device, base + 0x004, intr);

drivers/gpu/drm/nouveau/nvkm/engine/fifo/base.c

278

if (fifo->func->intr) {

drivers/gpu/drm/nouveau/nvkm/engine/fifo/base.c

279

ret = nvkm_inth_add(&device->mc->intr, NVKM_INTR_SUBDEV, NVKM_INTR_PRIO_NORMAL,

drivers/gpu/drm/nouveau/nvkm/engine/fifo/base.c

280

subdev, fifo->func->intr, &subdev->inth);

drivers/gpu/drm/nouveau/nvkm/engine/fifo/g84.c

215

.intr = nv04_fifo_intr,

drivers/gpu/drm/nouveau/nvkm/engine/fifo/g98.c

54

.intr = nv04_fifo_intr,

drivers/gpu/drm/nouveau/nvkm/engine/fifo/ga100.c

189

u32 intr = nvkm_rd32(device, 0x040148 + (runq->id * 0x800));

drivers/gpu/drm/nouveau/nvkm/engine/fifo/ga100.c

190

u32 stat = intr & inte;

drivers/gpu/drm/nouveau/nvkm/engine/fifo/ga100.c

193

RUNQ_DEBUG(runq, "inte1 %08x %08x", intr, inte);

drivers/gpu/drm/nouveau/nvkm/engine/fifo/ga100.c

218

nvkm_wr32(device, 0x040148 + (runq->id * 0x800), intr);

drivers/gpu/drm/nouveau/nvkm/engine/fifo/ga100.c

227

u32 intr = nvkm_rd32(device, 0x040108 + (runq->id * 0x800));

drivers/gpu/drm/nouveau/nvkm/engine/fifo/ga100.c

228

u32 stat = intr & inte;

drivers/gpu/drm/nouveau/nvkm/engine/fifo/ga100.c

231

RUNQ_DEBUG(runq, "inte0 %08x %08x", intr, inte);

drivers/gpu/drm/nouveau/nvkm/engine/fifo/ga100.c

256

nvkm_wr32(device, 0x040108 + (runq->id * 0x800), intr);

drivers/gpu/drm/nouveau/nvkm/engine/fifo/ga100.c

283

.intr = ga100_runq_intr,

drivers/gpu/drm/nouveau/nvkm/engine/fifo/ga100.c

337

u32 intr = nvkm_rd32(device, runl->addr + 0x100);

drivers/gpu/drm/nouveau/nvkm/engine/fifo/ga100.c

338

u32 stat = intr & inte;

drivers/gpu/drm/nouveau/nvkm/engine/fifo/ga100.c

342

RUNL_DEBUG(runl, "inte %08x %08x", intr, inte);

drivers/gpu/drm/nouveau/nvkm/engine/fifo/ga100.c

364

if (runl->runq[0]->func->intr(runl->runq[0], runl))

drivers/gpu/drm/nouveau/nvkm/engine/fifo/ga100.c

371

if (runl->runq[1]->func->intr(runl->runq[1], runl))

drivers/gpu/drm/nouveau/nvkm/engine/fifo/ga100.c

496

ret = nvkm_inth_add(&device->vfn->intr, vector & 0x00000fff, NVKM_INTR_PRIO_NORMAL,

drivers/gpu/drm/nouveau/nvkm/engine/fifo/ga100.c

554

ret = nvkm_inth_add(&vfn->intr, runl->nonstall.vector, NVKM_INTR_PRIO_NORMAL,

drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c

365

.intr = gf100_runq_intr,

drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c

678

u32 intr = nvkm_rd32(device, 0x00254c);

drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c

679

u32 code = intr & 0x000000ff;

drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c

741

if (runq->func->intr(runq, NULL))

drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c

755

u32 intr = nvkm_rd32(device, 0x002a00);

drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c

757

if (intr & 0x10000000) {

drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c

759

intr &= ~0x10000000;

drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c

762

if (intr) {

drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c

763

nvkm_error(subdev, "RUNLIST %08x\n", intr);

drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c

764

nvkm_wr32(device, 0x002a00, intr);

drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c

773

u32 intr = nvkm_rd32(device, 0x0025a8 + (engn * 0x04));

drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c

777

nvkm_wr32(device, 0x0025a8 + (engn * 0x04), intr);

drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c

780

u32 ints = (intr >> (unkn * 0x04)) & inte;

drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c

815

u32 intr = nvkm_rd32(device, 0x00252c);

drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c

816

nvkm_warn(subdev, "INTR 00000001: %08x\n", intr);

drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c

828

u32 intr = nvkm_rd32(device, 0x00256c);

drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c

829

nvkm_warn(subdev, "INTR 00010000: %08x\n", intr);

drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c

835

u32 intr = nvkm_rd32(device, 0x00258c);

drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c

836

nvkm_warn(subdev, "INTR 01000000: %08x\n", intr);

drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c

952

.intr = gf100_fifo_intr,

drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c

398

.intr = gk104_runq_intr,

drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c

612

u32 intr = nvkm_rd32(subdev->device, 0x00252c);

drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c

613

u32 code = intr & 0x000000ff;

drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c

815

.intr = gk104_fifo_intr,

drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk110.c

114

.intr = gk104_fifo_intr,

drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk208.c

40

.intr = gk104_runq_intr,

drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk208.c

59

.intr = gk104_fifo_intr,

drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk20a.c

34

.intr = gk104_fifo_intr,

drivers/gpu/drm/nouveau/nvkm/engine/fifo/gm107.c

138

.intr = gk104_fifo_intr,

drivers/gpu/drm/nouveau/nvkm/engine/fifo/gm200.c

48

.intr = gk104_fifo_intr,

drivers/gpu/drm/nouveau/nvkm/engine/fifo/gp100.c

121

.intr = gk104_fifo_intr,

drivers/gpu/drm/nouveau/nvkm/engine/fifo/gv100.c

169

.intr = gk104_runq_intr,

drivers/gpu/drm/nouveau/nvkm/engine/fifo/gv100.c

474

.intr = gk104_fifo_intr,

drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c

528

.intr = nv04_fifo_intr,

drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv10.c

98

.intr = nv04_fifo_intr,

drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv17.c

127

.intr = nv04_fifo_intr,

drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv40.c

237

.intr = nv04_fifo_intr,

drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.c

383

.intr = nv04_fifo_intr,

drivers/gpu/drm/nouveau/nvkm/engine/fifo/priv.h

27

irqreturn_t (*intr)(struct nvkm_inth *);

drivers/gpu/drm/nouveau/nvkm/engine/fifo/runq.h

10

bool (*intr)(struct nvkm_runq *, struct nvkm_runl *);

drivers/gpu/drm/nouveau/nvkm/engine/fifo/tu102.c

191

u32 intr = nvkm_rd32(subdev->device, 0x00254c);

drivers/gpu/drm/nouveau/nvkm/engine/fifo/tu102.c

192

u32 code = intr & 0x000000ff;

drivers/gpu/drm/nouveau/nvkm/engine/fifo/tu102.c

271

.intr = tu102_fifo_intr,

drivers/gpu/drm/nouveau/nvkm/engine/gr/base.c

125

gr->func->intr(gr);

drivers/gpu/drm/nouveau/nvkm/engine/gr/base.c

196

.intr = nvkm_gr_intr,

drivers/gpu/drm/nouveau/nvkm/engine/gr/g84.c

180

.intr = nv50_gr_intr,

drivers/gpu/drm/nouveau/nvkm/engine/gr/ga102.c

138

return &device->vfn->intr;

drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c

1995

struct nvkm_intr *intr = &device->mc->intr;

drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c

2000

intr = gr->func->oneinit_intr(gr, &intr_type);

drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c

2002

ret = nvkm_inth_add(intr, intr_type, NVKM_INTR_PRIO_NORMAL, &gr->base.engine.subdev,

drivers/gpu/drm/nouveau/nvkm/engine/gr/gt200.c

31

.intr = nv50_gr_intr,

drivers/gpu/drm/nouveau/nvkm/engine/gr/gt215.c

31

.intr = nv50_gr_intr,

drivers/gpu/drm/nouveau/nvkm/engine/gr/mcp79.c

31

.intr = nv50_gr_intr,

drivers/gpu/drm/nouveau/nvkm/engine/gr/mcp89.c

31

.intr = nv50_gr_intr,

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv04.c

1367

.intr = nv04_gr_intr,

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

1191

.intr = nv10_gr_intr,

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv15.c

29

.intr = nv10_gr_intr,

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv17.c

29

.intr = nv10_gr_intr,

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c

349

.intr = nv20_gr_intr,

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c

108

.intr = nv20_gr_intr,

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.c

99

.intr = nv20_gr_intr,

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c

170

.intr = nv20_gr_intr,

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c

107

.intr = nv20_gr_intr,

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.c

107

.intr = nv20_gr_intr,

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv40.c

447

.intr = nv40_gr_intr,

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv44.c

79

.intr = nv40_gr_intr,

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.c

779

.intr = nv50_gr_intr,

drivers/gpu/drm/nouveau/nvkm/engine/gr/priv.h

22

void (*intr)(struct nvkm_gr *);

drivers/gpu/drm/nouveau/nvkm/engine/mpeg/g84.c

31

.intr = nv50_mpeg_intr,

drivers/gpu/drm/nouveau/nvkm/engine/mpeg/nv31.c

265

.intr = nv31_mpeg_intr,

drivers/gpu/drm/nouveau/nvkm/engine/mpeg/nv44.c

195

.intr = nv44_mpeg_intr,

drivers/gpu/drm/nouveau/nvkm/engine/mpeg/nv50.c

123

.intr = nv50_mpeg_intr,

drivers/gpu/drm/nouveau/nvkm/engine/sec/g98.c

69

.intr = g98_sec_intr,

drivers/gpu/drm/nouveau/nvkm/engine/sec2/base.c

100

struct nvkm_intr *intr = &sec2->engine.subdev.device->mc->intr;

drivers/gpu/drm/nouveau/nvkm/engine/sec2/base.c

104

intr = sec2->func->intr_vector(sec2, &type);

drivers/gpu/drm/nouveau/nvkm/engine/sec2/base.c

105

if (IS_ERR(intr))

drivers/gpu/drm/nouveau/nvkm/engine/sec2/base.c

106

return PTR_ERR(intr);

drivers/gpu/drm/nouveau/nvkm/engine/sec2/base.c

109

return nvkm_inth_add(intr, type, NVKM_INTR_PRIO_NORMAL, subdev, sec2->func->intr,

drivers/gpu/drm/nouveau/nvkm/engine/sec2/ga102.c

145

.intr = gp102_sec2_intr,

drivers/gpu/drm/nouveau/nvkm/engine/sec2/ga102.c

71

return &device->vfn->intr;

drivers/gpu/drm/nouveau/nvkm/engine/sec2/gp102.c

159

u32 intr = nvkm_falcon_rd32(falcon, 0x008) & disp & ~(disp >> 16);

drivers/gpu/drm/nouveau/nvkm/engine/sec2/gp102.c

161

if (intr & 0x00000040) {

drivers/gpu/drm/nouveau/nvkm/engine/sec2/gp102.c

177

intr &= ~0x00000040;

drivers/gpu/drm/nouveau/nvkm/engine/sec2/gp102.c

180

if (intr & 0x00000010) {

drivers/gpu/drm/nouveau/nvkm/engine/sec2/gp102.c

187

intr &= ~0x00000010;

drivers/gpu/drm/nouveau/nvkm/engine/sec2/gp102.c

190

if (intr) {

drivers/gpu/drm/nouveau/nvkm/engine/sec2/gp102.c

191

nvkm_error(subdev, "unhandled intr %08x\n", intr);

drivers/gpu/drm/nouveau/nvkm/engine/sec2/gp102.c

192

nvkm_falcon_wr32(falcon, 0x004, intr);

drivers/gpu/drm/nouveau/nvkm/engine/sec2/gp102.c

223

.intr = gp102_sec2_intr,

drivers/gpu/drm/nouveau/nvkm/engine/sec2/priv.h

15

irqreturn_t (*intr)(struct nvkm_inth *);

drivers/gpu/drm/nouveau/nvkm/engine/sec2/tu102.c

53

.intr = gp102_sec2_intr,

drivers/gpu/drm/nouveau/nvkm/engine/xtensa.c

172

.intr = nvkm_xtensa_intr,

drivers/gpu/drm/nouveau/nvkm/engine/xtensa.c

64

u32 intr = nvkm_rd32(device, base + 0xc20);

drivers/gpu/drm/nouveau/nvkm/engine/xtensa.c

68

if (intr & 0x10)

drivers/gpu/drm/nouveau/nvkm/engine/xtensa.c

70

nvkm_wr32(device, base + 0xc20, intr);

drivers/gpu/drm/nouveau/nvkm/engine/xtensa.c

71

intr = nvkm_rd32(device, base + 0xc20);

drivers/gpu/drm/nouveau/nvkm/engine/xtensa.c

72

if (unk104 == 0x10001 && unk10c == 0x200 && chan && !intr) {

drivers/gpu/drm/nouveau/nvkm/falcon/gm200.c

123

gm200_flcn_bind_stat(struct nvkm_falcon *falcon, bool intr)

drivers/gpu/drm/nouveau/nvkm/falcon/gm200.c

125

if (intr && !(nvkm_falcon_rd32(falcon, 0x008) & 0x00000008))

drivers/gpu/drm/nouveau/nvkm/subdev/bus/base.c

30

bus->func->intr(bus);

drivers/gpu/drm/nouveau/nvkm/subdev/bus/base.c

51

.intr = nvkm_bus_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/bus/g94.c

55

.intr = nv50_bus_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/bus/gf100.c

70

.intr = gf100_bus_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/bus/nv04.c

67

.intr = nv04_bus_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/bus/nv31.c

81

.intr = nv31_bus_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/bus/nv50.c

96

.intr = nv50_bus_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/bus/priv.h

9

void (*intr)(struct nvkm_bus *);

drivers/gpu/drm/nouveau/nvkm/subdev/fault/base.c

151

.intr = nvkm_fault_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/fault/base.c

30

fault->func->buffer.intr(fault->buffer[index], false);

drivers/gpu/drm/nouveau/nvkm/subdev/fault/base.c

37

fault->func->buffer.intr(fault->buffer[index], true);

drivers/gpu/drm/nouveau/nvkm/subdev/fault/base.c

50

return fault->func->intr(fault);

drivers/gpu/drm/nouveau/nvkm/subdev/fault/gp100.c

73

.intr = gp100_fault_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/fault/gp100.c

80

.buffer.intr = gp100_fault_buffer_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/fault/gp10b.c

37

.intr = gp100_fault_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/fault/gp10b.c

44

.buffer.intr = gp100_fault_buffer_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/fault/gv100.c

219

.intr = gv100_fault_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/fault/gv100.c

226

.buffer.intr = gv100_fault_buffer_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/fault/gv100.c

79

const u32 intr = buffer->id ? 0x08000000 : 0x20000000;

drivers/gpu/drm/nouveau/nvkm/subdev/fault/gv100.c

81

nvkm_mask(device, 0x100a2c, intr, intr);

drivers/gpu/drm/nouveau/nvkm/subdev/fault/gv100.c

83

nvkm_mask(device, 0x100a34, intr, intr);

drivers/gpu/drm/nouveau/nvkm/subdev/fault/priv.h

30

void (*intr)(struct nvkm_fault *);

drivers/gpu/drm/nouveau/nvkm/subdev/fault/priv.h

38

void (*intr)(struct nvkm_fault_buffer *, bool enable);

drivers/gpu/drm/nouveau/nvkm/subdev/fault/tu102.c

140

struct nvkm_intr *intr = &device->vfn->intr;

drivers/gpu/drm/nouveau/nvkm/subdev/fault/tu102.c

143

ret = nvkm_inth_add(intr, nvkm_rd32(device, 0x100ee0) & 0x0000ffff,

drivers/gpu/drm/nouveau/nvkm/subdev/fault/tu102.c

150

ret = nvkm_inth_add(intr, nvkm_rd32(device, 0x100ee4 + (i * 4)) >> 16,

drivers/gpu/drm/nouveau/nvkm/subdev/fault/tu102.c

171

.buffer.intr = tu102_fault_buffer_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/fb/base.c

101

if (fb->func->intr)

drivers/gpu/drm/nouveau/nvkm/subdev/fb/base.c

102

fb->func->intr(fb);

drivers/gpu/drm/nouveau/nvkm/subdev/fb/base.c

268

.intr = nvkm_fb_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/fb/gf100.c

129

.intr = gf100_fb_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/fb/gf100.c

37

u32 intr = nvkm_rd32(device, 0x000100);

drivers/gpu/drm/nouveau/nvkm/subdev/fb/gf100.c

38

if (intr & 0x08000000)

drivers/gpu/drm/nouveau/nvkm/subdev/fb/gf100.c

40

if (intr & 0x00002000)

drivers/gpu/drm/nouveau/nvkm/subdev/fb/gf108.c

33

.intr = gf100_fb_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/fb/gk104.c

79

.intr = gf100_fb_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/fb/gk110.c

61

.intr = gf100_fb_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/fb/gk20a.c

32

.intr = gf100_fb_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/fb/gm107.c

33

.intr = gf100_fb_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/fb/gm200.c

61

.intr = gf100_fb_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/fb/gm20b.c

32

.intr = gf100_fb_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/fb/gp10b.c

30

.intr = gf100_fb_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv50.c

236

.intr = nv50_fb_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/fb/priv.h

20

void (*intr)(struct nvkm_fb *);

drivers/gpu/drm/nouveau/nvkm/subdev/gpio/base.c

221

.intr = nvkm_gpio_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/gpio/nv10.c

86

u32 intr = nvkm_rd32(device, 0x001104);

drivers/gpu/drm/nouveau/nvkm/subdev/gpio/nv10.c

87

u32 stat = nvkm_rd32(device, 0x001144) & intr;

drivers/gpu/drm/nouveau/nvkm/subdev/gpio/nv10.c

90

nvkm_wr32(device, 0x001104, intr);

drivers/gpu/drm/nouveau/nvkm/subdev/gpio/nv50.c

100

u32 stat = nvkm_rd32(device, 0x00e050) & intr;

drivers/gpu/drm/nouveau/nvkm/subdev/gpio/nv50.c

103

nvkm_wr32(device, 0x00e054, intr);

drivers/gpu/drm/nouveau/nvkm/subdev/gpio/nv50.c

99

u32 intr = nvkm_rd32(device, 0x00e054);

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/base.c

28

if (gsp->intr[i].type == type && gsp->intr[i].inst == inst)

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/base.c

29

return gsp->intr[i].nonstall;

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/base.c

39

if (gsp->intr[i].type == type && gsp->intr[i].inst == inst) {

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/base.c

40

if (gsp->intr[i].stall != ~0)

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/base.c

41

return gsp->intr[i].stall;

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/disp.c

139

.intr = r535_chan_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/disp.c

1714

ret = nvkm_inth_add(&device->vfn->intr, ret, NVKM_INTR_PRIO_NORMAL, &disp->engine.subdev,

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/disp.c

213

.intr = r535_chan_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/disp.c

223

.intr = r535_chan_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/disp.c

253

.intr = r535_chan_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/gsp.c

1388

gsp->debugfs.intr = create_debugfs(gsp, "logintr", &gsp->blob_intr);

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/gsp.c

1389

if (!gsp->debugfs.intr)

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/gsp.c

1412

i_size_write(d_inode(gsp->debugfs.intr), gsp->blob_intr.size);

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/gsp.c

161

if (WARN_ON(gsp->intr_nr == ARRAY_SIZE(gsp->intr))) {

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/gsp.c

166

gsp->intr[gsp->intr_nr].type = type;

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/gsp.c

167

gsp->intr[gsp->intr_nr].inst = inst;

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/gsp.c

168

gsp->intr[gsp->intr_nr].stall = ctrl->table[i].vectorStall;

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/gsp.c

169

gsp->intr[gsp->intr_nr].nonstall = ctrl->table[i].vectorNonStall;

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/gsp.c

2017

debugfs_remove(gsp->debugfs.intr);

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/gsp.c

313

ret = nvkm_inth_add(&device->vfn->intr, ret, NVKM_INTR_PRIO_NORMAL, &gsp->subdev,

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/gsp.c

64

u32 intr = nvkm_falcon_rd32(&gsp->falcon, 0x0008);

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/gsp.c

67

u32 stat = intr & inte;

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/gsp.c

70

nvkm_debug(subdev, "inte %08x %08x\n", intr, inte);

drivers/gpu/drm/nouveau/nvkm/subdev/i2c/auxg94.c

180

aux->base.intr = 1 << aux->ch;

drivers/gpu/drm/nouveau/nvkm/subdev/i2c/auxgm200.c

186

aux->base.intr = 1 << aux->ch;

drivers/gpu/drm/nouveau/nvkm/subdev/i2c/base.c

103

i2c->func->aux_mask(i2c, type, aux->intr, aux->intr);

drivers/gpu/drm/nouveau/nvkm/subdev/i2c/base.c

128

if (hi & aux->intr) mask |= NVKM_I2C_PLUG;

drivers/gpu/drm/nouveau/nvkm/subdev/i2c/base.c

129

if (lo & aux->intr) mask |= NVKM_I2C_UNPLUG;

drivers/gpu/drm/nouveau/nvkm/subdev/i2c/base.c

130

if (rq & aux->intr) mask |= NVKM_I2C_IRQ;

drivers/gpu/drm/nouveau/nvkm/subdev/i2c/base.c

131

if (tx & aux->intr) mask |= NVKM_I2C_DONE;

drivers/gpu/drm/nouveau/nvkm/subdev/i2c/base.c

242

.intr = nvkm_i2c_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/i2c/base.c

94

i2c->func->aux_mask(i2c, type, aux->intr, 0);

drivers/gpu/drm/nouveau/nvkm/subdev/i2c/g94.c

31

u32 intr = nvkm_rd32(device, 0x00e06c);

drivers/gpu/drm/nouveau/nvkm/subdev/i2c/g94.c

32

u32 stat = nvkm_rd32(device, 0x00e068) & intr, i;

drivers/gpu/drm/nouveau/nvkm/subdev/i2c/g94.c

39

nvkm_wr32(device, 0x00e06c, intr);

drivers/gpu/drm/nouveau/nvkm/subdev/i2c/gk104.c

31

u32 intr = nvkm_rd32(device, 0x00dc60);

drivers/gpu/drm/nouveau/nvkm/subdev/i2c/gk104.c

32

u32 stat = nvkm_rd32(device, 0x00dc68) & intr, i;

drivers/gpu/drm/nouveau/nvkm/subdev/i2c/gk104.c

39

nvkm_wr32(device, 0x00dc60, intr);

drivers/gpu/drm/nouveau/nvkm/subdev/ltc/base.c

127

.intr = nvkm_ltc_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/ltc/base.c

84

ltc->func->intr(ltc);

drivers/gpu/drm/nouveau/nvkm/subdev/ltc/ga102.c

42

.intr = gp100_ltc_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gf100.c

107

nvkm_wr32(device, base + 0x020, intr);

drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gf100.c

241

.intr = gf100_ltc_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gf100.c

98

u32 intr = nvkm_rd32(device, base + 0x020);

drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gf100.c

99

u32 stat = intr & 0x0000ffff;

drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gk104.c

42

.intr = gf100_ltc_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gm107.c

137

.intr = gm107_ltc_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gm107.c

77

u32 intr = nvkm_rd32(device, base + 0x00c);

drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gm107.c

78

u16 stat = intr & 0x0000ffff;

drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gm107.c

83

nvkm_error(subdev, "LTC%d_LTS%d: %08x [%s]\n", c, s, intr, msg);

drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gm107.c

86

nvkm_wr32(device, base + 0x00c, intr);

drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gm200.c

49

.intr = gm107_ltc_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gp100.c

61

.intr = gp100_ltc_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gp102.c

38

.intr = gp100_ltc_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gp10b.c

45

.intr = gp100_ltc_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/ltc/priv.h

14

void (*intr)(struct nvkm_ltc *);

drivers/gpu/drm/nouveau/nvkm/subdev/mc/base.c

139

if (mc->func->intr) {

drivers/gpu/drm/nouveau/nvkm/subdev/mc/base.c

140

ret = nvkm_intr_add(mc->func->intr, mc->func->intrs, &mc->subdev,

drivers/gpu/drm/nouveau/nvkm/subdev/mc/base.c

141

mc->func->intr_nonstall ? 2 : 1, &mc->intr);

drivers/gpu/drm/nouveau/nvkm/subdev/mc/g84.c

57

.intr = &nv04_mc_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/mc/g98.c

57

.intr = &nv04_mc_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/mc/gf100.c

70

.intr = &gt215_mc_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/mc/gk104.c

54

.intr = &gt215_mc_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/mc/gk20a.c

29

.intr = &gt215_mc_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/mc/gp100.c

48

gp100_mc_intr_allow(struct nvkm_intr *intr, int leaf, u32 mask)

drivers/gpu/drm/nouveau/nvkm/subdev/mc/gp100.c

50

struct nvkm_mc *mc = container_of(intr, typeof(*mc), intr);

drivers/gpu/drm/nouveau/nvkm/subdev/mc/gp100.c

56

gp100_mc_intr_block(struct nvkm_intr *intr, int leaf, u32 mask)

drivers/gpu/drm/nouveau/nvkm/subdev/mc/gp100.c

58

struct nvkm_mc *mc = container_of(intr, typeof(*mc), intr);

drivers/gpu/drm/nouveau/nvkm/subdev/mc/gp100.c

64

gp100_mc_intr_rearm(struct nvkm_intr *intr)

drivers/gpu/drm/nouveau/nvkm/subdev/mc/gp100.c

68

for (i = 0; i < intr->leaves; i++)

drivers/gpu/drm/nouveau/nvkm/subdev/mc/gp100.c

69

intr->func->allow(intr, i, intr->mask[i]);

drivers/gpu/drm/nouveau/nvkm/subdev/mc/gp100.c

73

gp100_mc_intr_unarm(struct nvkm_intr *intr)

drivers/gpu/drm/nouveau/nvkm/subdev/mc/gp100.c

77

for (i = 0; i < intr->leaves; i++)

drivers/gpu/drm/nouveau/nvkm/subdev/mc/gp100.c

78

intr->func->block(intr, i, 0xffffffff);

drivers/gpu/drm/nouveau/nvkm/subdev/mc/gp100.c

93

.intr = &gp100_mc_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/mc/gp10b.c

37

.intr = &gp100_mc_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/mc/gt215.c

57

gt215_mc_intr_allow(struct nvkm_intr *intr, int leaf, u32 mask)

drivers/gpu/drm/nouveau/nvkm/subdev/mc/gt215.c

59

struct nvkm_mc *mc = container_of(intr, typeof(*mc), intr);

drivers/gpu/drm/nouveau/nvkm/subdev/mc/gt215.c

65

gt215_mc_intr_block(struct nvkm_intr *intr, int leaf, u32 mask)

drivers/gpu/drm/nouveau/nvkm/subdev/mc/gt215.c

67

struct nvkm_mc *mc = container_of(intr, typeof(*mc), intr);

drivers/gpu/drm/nouveau/nvkm/subdev/mc/gt215.c

84

.intr = &nv04_mc_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv04.c

100

for (leaf = 0; leaf < intr->leaves; leaf++) {

drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv04.c

101

intr->stat[leaf] = nvkm_rd32(mc->subdev.device, 0x000100 + (leaf * 4));

drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv04.c

102

if (intr->stat[leaf])

drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv04.c

127

.intr = &nv04_mc_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv04.c

72

nv04_mc_intr_rearm(struct nvkm_intr *intr)

drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv04.c

74

struct nvkm_mc *mc = container_of(intr, typeof(*mc), intr);

drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv04.c

77

for (leaf = 0; leaf < intr->leaves; leaf++)

drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv04.c

82

nv04_mc_intr_unarm(struct nvkm_intr *intr)

drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv04.c

84

struct nvkm_mc *mc = container_of(intr, typeof(*mc), intr);

drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv04.c

87

for (leaf = 0; leaf < intr->leaves; leaf++)

drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv04.c

94

nv04_mc_intr_pending(struct nvkm_intr *intr)

drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv04.c

96

struct nvkm_mc *mc = container_of(intr, typeof(*mc), intr);

drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv11.c

39

.intr = &nv04_mc_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv17.c

48

.intr = &nv04_mc_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv44.c

43

.intr = &nv04_mc_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv50.c

50

.intr = &nv04_mc_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/mc/priv.h

20

const struct nvkm_intr_func *intr;

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/base.c

122

.intr = nvkm_pmu_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/base.c

74

if (!pmu->func->intr)

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/base.c

76

pmu->func->intr(pmu);

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gf100.c

54

.intr = gt215_pmu_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gf119.c

38

.intr = gt215_pmu_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk104.c

117

.intr = gt215_pmu_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk110.c

96

.intr = gt215_pmu_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk208.c

38

.intr = gt215_pmu_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gm107.c

40

.intr = gt215_pmu_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gm200.c

27

gm200_pmu_flcn_bind_stat(struct nvkm_falcon *falcon, bool intr)

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gm20b.c

238

.intr = gt215_pmu_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gt215.c

144

u32 intr = nvkm_rd32(device, 0x10a008) & disp & ~(disp >> 16);

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gt215.c

146

if (intr & 0x00000020) {

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gt215.c

153

intr &= ~0x00000020;

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gt215.c

157

if (intr & 0x00000040) {

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gt215.c

160

intr &= ~0x00000040;

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gt215.c

163

if (intr & 0x00000080) {

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gt215.c

168

intr &= ~0x00000080;

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gt215.c

171

if (intr) {

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gt215.c

172

nvkm_error(subdev, "intr %08x\n", intr);

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gt215.c

173

nvkm_wr32(device, 0x10a004, intr);

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gt215.c

278

.intr = gt215_pmu_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/priv.h

27

void (*intr)(struct nvkm_pmu *);

drivers/gpu/drm/nouveau/nvkm/subdev/privring/gf100.c

114

.intr = gf100_privring_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/privring/gf117.c

39

.intr = gf100_privring_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/privring/gk104.c

117

.intr = gk104_privring_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/privring/gk20a.c

77

.intr = gk20a_privring_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/privring/gm200.c

30

.intr = gk104_privring_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/privring/gp10b.c

47

.intr = gk104_privring_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/therm/base.c

339

if (therm->func->intr)

drivers/gpu/drm/nouveau/nvkm/subdev/therm/base.c

340

therm->func->intr(therm);

drivers/gpu/drm/nouveau/nvkm/subdev/therm/base.c

420

.intr = nvkm_therm_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/therm/g84.c

145

uint32_t intr;

drivers/gpu/drm/nouveau/nvkm/subdev/therm/g84.c

149

intr = nvkm_rd32(device, 0x20100) & 0x3ff;

drivers/gpu/drm/nouveau/nvkm/subdev/therm/g84.c

152

if (intr & 0x002) {

drivers/gpu/drm/nouveau/nvkm/subdev/therm/g84.c

156

intr &= ~0x002;

drivers/gpu/drm/nouveau/nvkm/subdev/therm/g84.c

160

if (intr & 0x004) {

drivers/gpu/drm/nouveau/nvkm/subdev/therm/g84.c

164

intr &= ~0x004;

drivers/gpu/drm/nouveau/nvkm/subdev/therm/g84.c

168

if (intr & 0x008) {

drivers/gpu/drm/nouveau/nvkm/subdev/therm/g84.c

172

intr &= ~0x008;

drivers/gpu/drm/nouveau/nvkm/subdev/therm/g84.c

176

if (intr & 0x010) {

drivers/gpu/drm/nouveau/nvkm/subdev/therm/g84.c

180

intr &= ~0x010;

drivers/gpu/drm/nouveau/nvkm/subdev/therm/g84.c

183

if (intr)

drivers/gpu/drm/nouveau/nvkm/subdev/therm/g84.c

184

nvkm_error(subdev, "intr %08x\n", intr);

drivers/gpu/drm/nouveau/nvkm/subdev/therm/g84.c

216

.intr = g84_therm_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/therm/nv40.c

191

.intr = nv40_therm_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/therm/nv50.c

162

.intr = nv40_therm_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/therm/priv.h

87

void (*intr)(struct nvkm_therm *);

drivers/gpu/drm/nouveau/nvkm/subdev/timer/base.c

148

tmr->func->intr(tmr);

drivers/gpu/drm/nouveau/nvkm/subdev/timer/base.c

181

.intr = nvkm_timer_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/timer/gk20a.c

28

.intr = nv04_timer_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/timer/nv04.c

140

.intr = nv04_timer_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/timer/nv40.c

77

.intr = nv04_timer_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/timer/nv41.c

74

.intr = nv04_timer_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/timer/priv.h

12

void (*intr)(struct nvkm_timer *);

drivers/gpu/drm/nouveau/nvkm/subdev/top/base.c

38

info->intr = -1;

drivers/gpu/drm/nouveau/nvkm/subdev/top/base.c

84

if (info->type == type && info->inst == inst && info->intr >= 0)

drivers/gpu/drm/nouveau/nvkm/subdev/top/base.c

85

return BIT(info->intr);

drivers/gpu/drm/nouveau/nvkm/subdev/top/gk104.c

104

info->intr, info->reset);

drivers/gpu/drm/nouveau/nvkm/subdev/top/gk104.c

62

info->intr = (data & 0x000f8000) >> 15;

drivers/gpu/drm/nouveau/nvkm/subdev/vfn/base.c

50

if (vfn->func->intr) {

drivers/gpu/drm/nouveau/nvkm/subdev/vfn/base.c

51

ret = nvkm_intr_add(vfn->func->intr, vfn->func->intrs,

drivers/gpu/drm/nouveau/nvkm/subdev/vfn/base.c

52

&vfn->subdev, 8, &vfn->intr);

drivers/gpu/drm/nouveau/nvkm/subdev/vfn/ga100.c

39

.intr = &tu102_vfn_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/vfn/priv.h

10

const struct nvkm_intr_func *intr;

drivers/gpu/drm/nouveau/nvkm/subdev/vfn/r535.c

45

rm->intr = &tu102_vfn_intr;

drivers/gpu/drm/nouveau/nvkm/subdev/vfn/tu102.c

101

.intr = &tu102_vfn_intr,

drivers/gpu/drm/nouveau/nvkm/subdev/vfn/tu102.c

29

tu102_vfn_intr_reset(struct nvkm_intr *intr, int leaf, u32 mask)

drivers/gpu/drm/nouveau/nvkm/subdev/vfn/tu102.c

31

struct nvkm_vfn *vfn = container_of(intr, typeof(*vfn), intr);

drivers/gpu/drm/nouveau/nvkm/subdev/vfn/tu102.c

37

tu102_vfn_intr_allow(struct nvkm_intr *intr, int leaf, u32 mask)

drivers/gpu/drm/nouveau/nvkm/subdev/vfn/tu102.c

39

struct nvkm_vfn *vfn = container_of(intr, typeof(*vfn), intr);

drivers/gpu/drm/nouveau/nvkm/subdev/vfn/tu102.c

45

tu102_vfn_intr_block(struct nvkm_intr *intr, int leaf, u32 mask)

drivers/gpu/drm/nouveau/nvkm/subdev/vfn/tu102.c

47

struct nvkm_vfn *vfn = container_of(intr, typeof(*vfn), intr);

drivers/gpu/drm/nouveau/nvkm/subdev/vfn/tu102.c

53

tu102_vfn_intr_rearm(struct nvkm_intr *intr)

drivers/gpu/drm/nouveau/nvkm/subdev/vfn/tu102.c

55

struct nvkm_vfn *vfn = container_of(intr, typeof(*vfn), intr);

drivers/gpu/drm/nouveau/nvkm/subdev/vfn/tu102.c

61

tu102_vfn_intr_unarm(struct nvkm_intr *intr)

drivers/gpu/drm/nouveau/nvkm/subdev/vfn/tu102.c

63

struct nvkm_vfn *vfn = container_of(intr, typeof(*vfn), intr);

drivers/gpu/drm/nouveau/nvkm/subdev/vfn/tu102.c

69

tu102_vfn_intr_pending(struct nvkm_intr *intr)

drivers/gpu/drm/nouveau/nvkm/subdev/vfn/tu102.c

71

struct nvkm_vfn *vfn = container_of(intr, typeof(*vfn), intr);

drivers/gpu/drm/nouveau/nvkm/subdev/vfn/tu102.c

78

intr->stat[leaf] = nvkm_rd32(device, vfn->addr.priv + 0x1000 + (leaf * 4));

drivers/gpu/drm/nouveau/nvkm/subdev/vfn/tu102.c

79

if (intr->stat[leaf])

drivers/gpu/drm/nouveau/nvkm/subdev/vfn/tu102.c

82

intr->stat[leaf] = 0;

drivers/gpu/drm/qxl/qxl_cmd.c

281

static int wait_for_io_cmd_user(struct qxl_device *qdev, uint8_t val, long port, bool intr)

drivers/gpu/drm/qxl/qxl_cmd.c

290

if (intr)

drivers/gpu/drm/qxl/qxl_cmd.c

303

if (intr)

drivers/gpu/drm/qxl/qxl_release.c

59

static long qxl_fence_wait(struct dma_fence *fence, bool intr,

drivers/gpu/drm/radeon/radeon_fence.c

1003

static signed long radeon_fence_default_wait(struct dma_fence *f, bool intr,

drivers/gpu/drm/radeon/radeon_fence.c

1016

if (intr)

drivers/gpu/drm/radeon/radeon_fence.c

1035

if (t > 0 && intr && signal_pending(current))

drivers/gpu/drm/radeon/radeon_fence.c

471

u64 *target_seq, bool intr,

drivers/gpu/drm/radeon/radeon_fence.c

489

if (intr) {

drivers/gpu/drm/radeon/radeon_fence.c

526

long radeon_fence_wait_timeout(struct radeon_fence *fence, bool intr, long timeout)

drivers/gpu/drm/radeon/radeon_fence.c

538

return dma_fence_wait(&fence->base, intr);

drivers/gpu/drm/radeon/radeon_fence.c

541

r = radeon_fence_wait_seq_timeout(fence->rdev, seq, intr, timeout);

drivers/gpu/drm/radeon/radeon_fence.c

560

int radeon_fence_wait(struct radeon_fence *fence, bool intr)

drivers/gpu/drm/radeon/radeon_fence.c

562

long r = radeon_fence_wait_timeout(fence, intr, MAX_SCHEDULE_TIMEOUT);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1475

VOP_REG_SET(vop, intr, line_flag_num[0], vact_end);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

238

for (i = 0; i < vop->data->intr->nintrs; i++) {

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

239

if ((type & vop->data->intr->intrs[i]) && (regs & 1 << i))

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

240

ret |= vop->data->intr->intrs[i];

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

66

vop_reg_set(vop, &vop->data->intr->name, 0, mask, v, #name)

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

77

for (i = 0; i < vop->data->intr->nintrs; i++) { \

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

78

if (vop->data->intr->intrs[i] & type) { \

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

86

vop_get_intr_type(vop, &vop->data->intr->name, type)

drivers/gpu/drm/rockchip/rockchip_drm_vop.h

225

const struct vop_intr *intr;

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1051

.intr = &rk3366_vop_intr,

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1079

.intr = &rk3366_vop_intr,

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1101

.intr = &rk3366_vop_intr,

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1173

.intr = &rk3328_vop_intr,

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1228

.intr = &px30_intr,

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1280

.intr = &px30_intr,

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

198

.intr = &rk3036_intr,

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

242

.intr = &rk3036_intr,

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

369

.intr = &px30_intr,

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

386

.intr = &px30_intr,

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

512

.intr = &rk3066_intr,

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

619

.intr = &rk3188_vop_intr,

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

768

.intr = &rk3288_vop_intr,

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

875

.intr = &rk3368_vop_intr,

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

898

.intr = &rk3366_vop_intr,

drivers/gpu/drm/ttm/ttm_backup.c

52

pgoff_t handle, bool intr)

drivers/gpu/drm/ttm/ttm_execbuf_util.c

117

ret = ttm_bo_reserve_slowpath(bo, intr, ticket);

drivers/gpu/drm/ttm/ttm_execbuf_util.c

77

struct list_head *list, bool intr,

drivers/gpu/drm/ttm/ttm_execbuf_util.c

93

ret = ttm_bo_reserve(bo, intr, (ticket == NULL), ticket);

drivers/gpu/drm/vmwgfx/ttm_object.h

311

static inline int ttm_bo_wait(struct ttm_buffer_object *bo, bool intr,

drivers/gpu/drm/vmwgfx/ttm_object.h

314

struct ttm_operation_ctx ctx = { intr, no_wait };

drivers/gpu/drm/vmwgfx/vmwgfx_drv.h

784

extern int vmw_resource_validate(struct vmw_resource *res, bool intr,

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

1791

ret = vmw_validation_prepare(&val_ctx, update->mutex, update->intr);

drivers/gpu/drm/vmwgfx/vmwgfx_kms.h

111

bool intr;

drivers/gpu/drm/vmwgfx/vmwgfx_resource.c

681

int vmw_resource_validate(struct vmw_resource *res, bool intr,

drivers/gpu/drm/vmwgfx/vmwgfx_resource.c

720

ret = vmw_resource_do_evict(NULL, evict_res, intr);

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

547

bo_update.base.intr = true;

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

709

srf_update.base.intr = true;

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

1259

bo_update.base.intr = false;

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

1374

srf_update.intr = true;

drivers/gpu/drm/vmwgfx/vmwgfx_validation.c

409

bool intr)

drivers/gpu/drm/vmwgfx/vmwgfx_validation.c

419

ret = vmw_resource_reserve(res, intr, val->no_buffer_needed);

drivers/gpu/drm/vmwgfx/vmwgfx_validation.c

534

int vmw_validation_bo_validate(struct vmw_validation_context *ctx, bool intr)

drivers/gpu/drm/vmwgfx/vmwgfx_validation.c

542

ret = vmw_validation_bo_validate_single(entry->base.bo, intr);

drivers/gpu/drm/vmwgfx/vmwgfx_validation.c

583

int vmw_validation_res_validate(struct vmw_validation_context *ctx, bool intr)

drivers/gpu/drm/vmwgfx/vmwgfx_validation.c

592

ret = vmw_resource_validate(res, intr, val->dirty_set &&

drivers/gpu/drm/vmwgfx/vmwgfx_validation.c

695

bool intr)

drivers/gpu/drm/vmwgfx/vmwgfx_validation.c

700

if (intr)

drivers/gpu/drm/vmwgfx/vmwgfx_validation.c

709

ret = vmw_validation_res_reserve(ctx, intr);

drivers/gpu/drm/vmwgfx/vmwgfx_validation.c

713

ret = vmw_validation_bo_reserve(ctx, intr);

drivers/gpu/drm/vmwgfx/vmwgfx_validation.c

717

ret = vmw_validation_bo_validate(ctx, intr);

drivers/gpu/drm/vmwgfx/vmwgfx_validation.c

721

ret = vmw_validation_res_validate(ctx, intr);

drivers/gpu/drm/vmwgfx/vmwgfx_validation.h

120

bool intr)

drivers/gpu/drm/vmwgfx/vmwgfx_validation.h

122

return ttm_eu_reserve_buffers(&ctx->ticket, &ctx->bo_list, intr,

drivers/gpu/drm/vmwgfx/vmwgfx_validation.h

156

int vmw_validation_bo_validate(struct vmw_validation_context *ctx, bool intr);

drivers/gpu/drm/vmwgfx/vmwgfx_validation.h

166

bool intr);

drivers/gpu/drm/vmwgfx/vmwgfx_validation.h

173

int vmw_validation_res_validate(struct vmw_validation_context *ctx, bool intr);

drivers/gpu/drm/vmwgfx/vmwgfx_validation.h

176

struct mutex *mutex, bool intr);

drivers/gpu/drm/xe/tests/xe_bo.c

563

bool purgeable, intr = false;

drivers/gpu/drm/xe/tests/xe_bo.c

573

intr = true;

drivers/gpu/drm/xe/tests/xe_bo.c

583

} else if (intr) {

drivers/gpu/drm/xe/xe_bo.c

2416

u64 alignment, bool intr)

drivers/gpu/drm/xe/xe_bo.c

2423

xe_validation_guard(&ctx, &xe->val, &exec, (struct xe_val_flags) {.interruptible = intr},

drivers/gpu/drm/xe/xe_bo.c

2590

u64 alignment, bool intr)

drivers/gpu/drm/xe/xe_bo.c

2597

xe_validation_guard(&ctx, &xe->val, &exec, (struct xe_val_flags) {.interruptible = intr},

drivers/gpu/drm/xe/xe_bo.c

2659

bool intr)

drivers/gpu/drm/xe/xe_bo.c

2661

return xe_bo_create_pin_map_at_novm(xe, tile, size, ~0ull, type, flags, 0, intr);

drivers/gpu/drm/xe/xe_bo.c

3345

int xe_bo_lock(struct xe_bo *bo, bool intr)

drivers/gpu/drm/xe/xe_bo.c

3347

if (intr)

drivers/gpu/drm/xe/xe_bo.h

112

bool intr);

drivers/gpu/drm/xe/xe_bo.h

119

u32 flags, u64 alignment, bool intr);

drivers/gpu/drm/xe/xe_bo.h

186

int xe_bo_lock(struct xe_bo *bo, bool intr);

drivers/gpu/drm/xe/xe_vm.c

3931

int xe_vm_lock(struct xe_vm *vm, bool intr)

drivers/gpu/drm/xe/xe_vm.c

3935

if (intr)

drivers/gpu/drm/xe/xe_vm.h

45

int xe_vm_lock(struct xe_vm *vm, bool intr);

drivers/iio/accel/bmc150-accel-core.c

1248

ret = bmc150_accel_set_interrupt(data, t->intr, state);

drivers/iio/accel/bmc150-accel-core.c

1383

int intr;

drivers/iio/accel/bmc150-accel-core.c

1388

.intr = 0,

drivers/iio/accel/bmc150-accel-core.c

1392

.intr = 1,

drivers/iio/accel/bmc150-accel-core.c

1430

t->intr = bmc150_accel_triggers[i].intr;

drivers/iio/accel/bmc150-accel-core.c

522

struct bmc150_accel_interrupt *intr = &data->interrupts[i];

drivers/iio/accel/bmc150-accel-core.c

523

const struct bmc150_accel_interrupt_info *info = intr->info;

drivers/iio/accel/bmc150-accel-core.c

531

if (atomic_inc_return(&intr->users) > 1)

drivers/iio/accel/bmc150-accel-core.c

534

if (atomic_dec_return(&intr->users) > 0)

drivers/iio/accel/bmc150-accel.h

42

int intr;

drivers/iio/light/tsl2563.c

110

u8 intr;

drivers/iio/light/tsl2563.c

216

chip->intr &= ~TSL2563_INT_MASK;

drivers/iio/light/tsl2563.c

218

chip->intr |= TSL2563_INT_LEVEL;

drivers/iio/light/tsl2563.c

222

chip->intr);

drivers/iio/light/tsl2563.c

639

if (state && !(chip->intr & TSL2563_INT_MASK)) {

drivers/iio/light/tsl2563.c

653

if (!state && (chip->intr & TSL2563_INT_MASK)) {

drivers/iio/light/tsl2563.c

727

chip->intr = TSL2563_INT_PERSIST(4);

drivers/infiniband/hw/ionic/ionic_admin.c

1008

eq->intr = intr_obj.index;

drivers/infiniband/hw/ionic/ionic_admin.c

1018

ionic_intr_mask(dev->lif_cfg.intr_ctrl, eq->intr, IONIC_INTR_MASK_SET);

drivers/infiniband/hw/ionic/ionic_admin.c

1019

ionic_intr_mask_assert(dev->lif_cfg.intr_ctrl, eq->intr, IONIC_INTR_MASK_SET);

drivers/infiniband/hw/ionic/ionic_admin.c

1020

ionic_intr_coal_init(dev->lif_cfg.intr_ctrl, eq->intr, 0);

drivers/infiniband/hw/ionic/ionic_admin.c

1021

ionic_intr_clean(dev->lif_cfg.intr_ctrl, eq->intr);

drivers/infiniband/hw/ionic/ionic_admin.c

1029

rc = ionic_rdma_queue_devcmd(dev, &eq->q, eq->eqid, eq->intr,

drivers/infiniband/hw/ionic/ionic_admin.c

1034

ionic_intr_mask(dev->lif_cfg.intr_ctrl, eq->intr, IONIC_INTR_MASK_CLEAR);

drivers/infiniband/hw/ionic/ionic_admin.c

1043

ionic_intr_free(dev->lif_cfg.lif, eq->intr);

drivers/infiniband/hw/ionic/ionic_admin.c

1060

ionic_intr_free(dev->lif_cfg.lif, eq->intr);

drivers/infiniband/hw/ionic/ionic_admin.c

945

ionic_intr_credits(eq->dev->lif_cfg.intr_ctrl, eq->intr,

drivers/infiniband/hw/ionic/ionic_admin.c

950

ionic_intr_credits(eq->dev->lif_cfg.intr_ctrl, eq->intr,

drivers/infiniband/hw/ionic/ionic_admin.c

968

ionic_intr_credits(eq->dev->lif_cfg.intr_ctrl, eq->intr,

drivers/infiniband/hw/ionic/ionic_admin.c

973

ionic_intr_credits(eq->dev->lif_cfg.intr_ctrl, eq->intr,

drivers/infiniband/hw/ionic/ionic_ibdev.h

125

u32 intr;

drivers/infiniband/hw/mthca/mthca_eq.c

467

u8 intr,

drivers/infiniband/hw/mthca/mthca_eq.c

541

eq_context->intr = intr;

drivers/infiniband/hw/mthca/mthca_eq.c

59

u8 intr;

drivers/infiniband/hw/mthca/mthca_eq.c

770

u8 intr;

drivers/infiniband/hw/mthca/mthca_eq.c

795

intr = dev->eq_table.inta_pin;

drivers/infiniband/hw/mthca/mthca_eq.c

798

(dev->mthca_flags & MTHCA_FLAG_MSI_X) ? 128 : intr,

drivers/infiniband/hw/mthca/mthca_eq.c

804

(dev->mthca_flags & MTHCA_FLAG_MSI_X) ? 129 : intr,

drivers/infiniband/hw/mthca/mthca_eq.c

810

(dev->mthca_flags & MTHCA_FLAG_MSI_X) ? 130 : intr,

drivers/irqchip/irq-mips-gic.c

150

static void gic_clear_pcpu_masks(unsigned int intr)

drivers/irqchip/irq-mips-gic.c

156

clear_bit(intr, per_cpu_ptr(pcpu_masks, i));

drivers/irqchip/irq-mips-gic.c

159

static bool gic_local_irq_is_routable(int intr)

drivers/irqchip/irq-mips-gic.c

168

switch (intr) {

drivers/irqchip/irq-mips-gic.c

239

unsigned int intr;

drivers/irqchip/irq-mips-gic.c

255

for_each_set_bit(intr, pending, gic_shared_intrs) {

drivers/irqchip/irq-mips-gic.c

258

GIC_SHARED_TO_HWIRQ(intr));

drivers/irqchip/irq-mips-gic.c

261

GIC_SHARED_TO_HWIRQ(intr));

drivers/irqchip/irq-mips-gic.c

267

unsigned int intr = GIC_HWIRQ_TO_SHARED(d->hwirq);

drivers/irqchip/irq-mips-gic.c

270

write_gic_redir_rmask(intr);

drivers/irqchip/irq-mips-gic.c

273

write_gic_rmask(intr);

drivers/irqchip/irq-mips-gic.c

276

gic_clear_pcpu_masks(intr);

drivers/irqchip/irq-mips-gic.c

281

unsigned int intr = GIC_HWIRQ_TO_SHARED(d->hwirq);

drivers/irqchip/irq-mips-gic.c

285

write_gic_redir_smask(intr);

drivers/irqchip/irq-mips-gic.c

288

write_gic_smask(intr);

drivers/irqchip/irq-mips-gic.c

291

gic_clear_pcpu_masks(intr);

drivers/irqchip/irq-mips-gic.c

293

set_bit(intr, per_cpu_ptr(pcpu_masks, cpu));

drivers/irqchip/irq-mips-gic.c

473

unsigned int intr;

drivers/irqchip/irq-mips-gic.c

480

for_each_set_bit(intr, &pending, GIC_NUM_LOCAL_INTRS) {

drivers/irqchip/irq-mips-gic.c

483

GIC_LOCAL_TO_HWIRQ(intr));

drivers/irqchip/irq-mips-gic.c

486

GIC_LOCAL_TO_HWIRQ(intr));

drivers/irqchip/irq-mips-gic.c

492

int intr = GIC_HWIRQ_TO_LOCAL(d->hwirq);

drivers/irqchip/irq-mips-gic.c

494

write_gic_vl_rmask(BIT(intr));

drivers/irqchip/irq-mips-gic.c

499

int intr = GIC_HWIRQ_TO_LOCAL(d->hwirq);

drivers/irqchip/irq-mips-gic.c

501

write_gic_vl_smask(BIT(intr));

drivers/irqchip/irq-mips-gic.c

513

int intr, cpu;

drivers/irqchip/irq-mips-gic.c

518

intr = GIC_HWIRQ_TO_LOCAL(d->hwirq);

drivers/irqchip/irq-mips-gic.c

523

write_gic_vo_rmask(BIT(intr));

drivers/irqchip/irq-mips-gic.c

529

int intr, cpu;

drivers/irqchip/irq-mips-gic.c

534

intr = GIC_HWIRQ_TO_LOCAL(d->hwirq);

drivers/irqchip/irq-mips-gic.c

539

write_gic_vo_smask(BIT(intr));

drivers/irqchip/irq-mips-gic.c

555

unsigned int intr = local_intrs[i];

drivers/irqchip/irq-mips-gic.c

558

if (!gic_local_irq_is_routable(intr))

drivers/irqchip/irq-mips-gic.c

560

cd = &gic_all_vpes_chip_data[intr];

drivers/irqchip/irq-mips-gic.c

561

write_gic_vl_map(mips_gic_vx_map_reg(intr), cd->map);

drivers/irqchip/irq-mips-gic.c

563

write_gic_vl_smask(BIT(intr));

drivers/irqchip/irq-mips-gic.c

590

int intr = GIC_HWIRQ_TO_SHARED(hw);

drivers/irqchip/irq-mips-gic.c

601

write_gic_redir_map_pin(intr,

drivers/irqchip/irq-mips-gic.c

603

write_gic_redir_map_vp(intr, BIT(mips_cm_vp_id(cpu)));

drivers/irqchip/irq-mips-gic.c

606

write_gic_map_pin(intr, GIC_MAP_PIN_MAP_TO_PIN | gic_cpu_pin);

drivers/irqchip/irq-mips-gic.c

607

write_gic_map_vp(intr, BIT(mips_cm_vp_id(cpu)));

drivers/irqchip/irq-mips-gic.c

638

unsigned int intr;

drivers/irqchip/irq-mips-gic.c

659

intr = GIC_HWIRQ_TO_LOCAL(hwirq);

drivers/irqchip/irq-mips-gic.c

666

switch (intr) {

drivers/irqchip/irq-mips-gic.c

675

cd = &gic_all_vpes_chip_data[intr];

drivers/irqchip/irq-mips-gic.c

698

if (!gic_local_irq_is_routable(intr))

drivers/irqchip/irq-mips-gic.c

703

write_gic_vo_map(mips_gic_vx_map_reg(intr), map);

drivers/irqchip/irq-mxs.c

194

icoll_priv.intr = icoll_base + HW_ICOLL_INTERRUPT0;

drivers/irqchip/irq-mxs.c

223

icoll_priv.intr = icoll_base + ASM9260_HW_ICOLL_INTERRUPT0;

drivers/irqchip/irq-mxs.c

233

writel(0, icoll_priv.intr + i);

drivers/irqchip/irq-mxs.c

53

void __iomem *intr;

drivers/irqchip/irq-mxs.c

75

return icoll_priv.intr + ((d->hwirq >> 2) * 0x10);

drivers/irqchip/irq-mxs.c

92

icoll_priv.intr + CLR_REG + HW_ICOLL_INTERRUPTn(d->hwirq));

drivers/irqchip/irq-mxs.c

98

icoll_priv.intr + SET_REG + HW_ICOLL_INTERRUPTn(d->hwirq));

drivers/irqchip/irq-ti-sci-intr.c

120

struct ti_sci_intr_irq_domain *intr = domain->host_data;

drivers/irqchip/irq-ti-sci-intr.c

127

intr->sci->ops.rm_irq_ops.free_irq(intr->sci,

drivers/irqchip/irq-ti-sci-intr.c

128

intr->ti_sci_id, data->hwirq,

drivers/irqchip/irq-ti-sci-intr.c

129

intr->ti_sci_id, out_irq);

drivers/irqchip/irq-ti-sci-intr.c

130

ti_sci_release_resource(intr->out_irqs, out_irq);

drivers/irqchip/irq-ti-sci-intr.c

147

struct ti_sci_intr_irq_domain *intr = domain->host_data;

drivers/irqchip/irq-ti-sci-intr.c

153

out_irq = ti_sci_get_free_resource(intr->out_irqs);

drivers/irqchip/irq-ti-sci-intr.c

157

p_hwirq = ti_sci_intr_xlate_irq(intr, out_irq);

drivers/irqchip/irq-ti-sci-intr.c

161

parent_node = of_irq_find_parent(dev_of_node(intr->dev));

drivers/irqchip/irq-ti-sci-intr.c

191

err = intr->sci->ops.rm_irq_ops.set_irq(intr->sci,

drivers/irqchip/irq-ti-sci-intr.c

192

intr->ti_sci_id, hwirq,

drivers/irqchip/irq-ti-sci-intr.c

193

intr->ti_sci_id, out_irq);

drivers/irqchip/irq-ti-sci-intr.c

202

ti_sci_release_resource(intr->out_irqs, out_irq);

drivers/irqchip/irq-ti-sci-intr.c

248

struct ti_sci_intr_irq_domain *intr;

drivers/irqchip/irq-ti-sci-intr.c

266

intr = devm_kzalloc(dev, sizeof(*intr), GFP_KERNEL);

drivers/irqchip/irq-ti-sci-intr.c

267

if (!intr)

drivers/irqchip/irq-ti-sci-intr.c

270

intr->dev = dev;

drivers/irqchip/irq-ti-sci-intr.c

272

if (of_property_read_u32(dev_of_node(dev), "ti,intr-trigger-type", &intr->type))

drivers/irqchip/irq-ti-sci-intr.c

273

intr->type = IRQ_TYPE_NONE;

drivers/irqchip/irq-ti-sci-intr.c

275

intr->sci = devm_ti_sci_get_by_phandle(dev, "ti,sci");

drivers/irqchip/irq-ti-sci-intr.c

276

if (IS_ERR(intr->sci))

drivers/irqchip/irq-ti-sci-intr.c

277

return dev_err_probe(dev, PTR_ERR(intr->sci),

drivers/irqchip/irq-ti-sci-intr.c

281

&intr->ti_sci_id);

drivers/irqchip/irq-ti-sci-intr.c

287

intr->out_irqs = devm_ti_sci_get_resource(intr->sci, dev,

drivers/irqchip/irq-ti-sci-intr.c

288

intr->ti_sci_id,

drivers/irqchip/irq-ti-sci-intr.c

290

if (IS_ERR(intr->out_irqs)) {

drivers/irqchip/irq-ti-sci-intr.c

292

return PTR_ERR(intr->out_irqs);

drivers/irqchip/irq-ti-sci-intr.c

296

&ti_sci_intr_irq_domain_ops, intr);

drivers/irqchip/irq-ti-sci-intr.c

302

dev_info(dev, "Interrupt Router %d domain created\n", intr->ti_sci_id);

drivers/irqchip/irq-ti-sci-intr.c

62

struct ti_sci_intr_irq_domain *intr = domain->host_data;

drivers/irqchip/irq-ti-sci-intr.c

64

if (intr->type) {

drivers/irqchip/irq-ti-sci-intr.c

70

*type = intr->type;

drivers/irqchip/irq-ti-sci-intr.c

89

static int ti_sci_intr_xlate_irq(struct ti_sci_intr_irq_domain *intr, u32 irq)

drivers/irqchip/irq-ti-sci-intr.c

91

struct device_node *np = dev_of_node(intr->dev);

drivers/macintosh/macio-adb.c

114

out_8(&adb->intr.r, 0);

drivers/macintosh/macio-adb.c

215

if (in_8(&adb->intr.r) & TAG) {

drivers/macintosh/macio-adb.c

234

out_8(&adb->intr.r, 0);

drivers/macintosh/macio-adb.c

237

if (in_8(&adb->intr.r) & DFB) {

drivers/macintosh/macio-adb.c

261

out_8(&adb->intr.r, 0);

drivers/macintosh/macio-adb.c

285

if (in_8(&adb->intr.r) != 0)

drivers/macintosh/macio-adb.c

29

struct preg intr;

drivers/macintosh/via-pmu.c

1575

int intr;

drivers/macintosh/via-pmu.c

1590

intr = 0;

drivers/macintosh/via-pmu.c

1592

intr = in_8(&via1[IFR]) & (SR_INT | CB1_INT);

drivers/macintosh/via-pmu.c

1593

out_8(&via1[IFR], intr);

drivers/macintosh/via-pmu.c

1598

intr = CB1_INT;

drivers/macintosh/via-pmu.c

1601

intr = SR_INT;

drivers/macintosh/via-pmu.c

1605

if (intr == 0)

drivers/macintosh/via-pmu.c

1611

intr, in_8(&via1[IER]), pmu_state);

drivers/macintosh/via-pmu.c

1614

if (intr & CB1_INT) {

drivers/macintosh/via-pmu.c

1618

if (intr & SR_INT) {

drivers/media/pci/cx18/cx18-driver.c

268

int cx18_msleep_timeout(unsigned int msecs, int intr)

drivers/media/pci/cx18/cx18-driver.c

274

set_current_state(intr ? TASK_INTERRUPTIBLE : TASK_UNINTERRUPTIBLE);

drivers/media/pci/cx18/cx18-driver.c

276

sig = intr ? signal_pending(current) : 0;

drivers/media/pci/cx18/cx18-driver.h

666

int cx18_msleep_timeout(unsigned int msecs, int intr);

drivers/media/pci/ivtv/ivtv-driver.c

344

int ivtv_msleep_timeout(unsigned int msecs, int intr)

drivers/media/pci/ivtv/ivtv-driver.c

349

set_current_state(intr ? TASK_INTERRUPTIBLE : TASK_UNINTERRUPTIBLE);

drivers/media/pci/ivtv/ivtv-driver.c

351

if (intr) {

drivers/media/pci/ivtv/ivtv-driver.h

769

int ivtv_msleep_timeout(unsigned int msecs, int intr);

drivers/media/platform/amlogic/meson-ge2d/ge2d.c

296

u32 intr;

drivers/media/platform/amlogic/meson-ge2d/ge2d.c

298

regmap_read(ge2d->map, GE2D_STATUS0, &intr);

drivers/media/platform/amlogic/meson-ge2d/ge2d.c

300

if (!(intr & GE2D_GE2D_BUSY)) {

drivers/media/platform/rockchip/rga/rga.c

58

int intr;

drivers/media/platform/rockchip/rga/rga.c

60

intr = rga_read(rga, RGA_INT) & 0xf;

drivers/media/platform/rockchip/rga/rga.c

62

rga_mod(rga, RGA_INT, intr << 4, 0xf << 4);

drivers/media/platform/rockchip/rga/rga.c

64

if (intr & 0x04) {

drivers/media/platform/ti/am437x/am437x-vpfe.c

1249

unsigned int intr = VPFE_VDINT0;

drivers/media/platform/ti/am437x/am437x-vpfe.c

1254

intr |= VPFE_VDINT1;

drivers/media/platform/ti/am437x/am437x-vpfe.c

1256

vpfe_reg_write(&vpfe->ccdc, intr, VPFE_IRQ_EN_CLR);

drivers/media/platform/ti/am437x/am437x-vpfe.c

1261

unsigned int intr = VPFE_VDINT0;

drivers/media/platform/ti/am437x/am437x-vpfe.c

1266

intr |= VPFE_VDINT1;

drivers/media/platform/ti/am437x/am437x-vpfe.c

1268

vpfe_reg_write(&vpfe->ccdc, intr, VPFE_IRQ_EN_SET);

drivers/misc/mei/hw-me.c

891

static u32 mei_me_d0i3_set(struct mei_device *dev, bool intr)

drivers/misc/mei/hw-me.c

896

if (intr)

drivers/misc/sgi-gru/grufault.c

528

STAT(intr);

drivers/misc/sgi-gru/gruprocfs.c

53

printstat(s, intr);

drivers/misc/sgi-gru/grutables.h

181

atomic_long_t intr;

drivers/mmc/host/mvsdio.c

141

u32 cmdreg = 0, xfer = 0, intr = 0;

drivers/mmc/host/mvsdio.c

170

intr |= MVSD_NOR_UNEXP_RSP;

drivers/mmc/host/mvsdio.c

187

intr |= MVSD_NOR_TX_AVAIL;

drivers/mmc/host/mvsdio.c

189

intr |= MVSD_NOR_RX_FIFO_8W;

drivers/mmc/host/mvsdio.c

191

intr |= MVSD_NOR_RX_READY;

drivers/mmc/host/mvsdio.c

209

intr |= MVSD_NOR_AUTOCMD12_DONE;

drivers/mmc/host/mvsdio.c

211

intr |= MVSD_NOR_XFER_DONE;

drivers/mmc/host/mvsdio.c

214

intr |= MVSD_NOR_CMD_DONE;

drivers/mmc/host/mvsdio.c

231

host->intr_en |= intr | MVSD_NOR_ERROR;

drivers/mtd/nand/onenand/onenand_omap2.c

129

static void wait_err(char *msg, int state, unsigned int ctrl, unsigned int intr)

drivers/mtd/nand/onenand/onenand_omap2.c

132

msg, state, ctrl, intr);

drivers/mtd/nand/onenand/onenand_omap2.c

136

unsigned int intr)

drivers/mtd/nand/onenand/onenand_omap2.c

139

"intr 0x%04x\n", msg, state, ctrl, intr);

drivers/mtd/nand/onenand/onenand_omap2.c

146

unsigned int intr = 0;

drivers/mtd/nand/onenand/onenand_omap2.c

170

intr = read_reg(c, ONENAND_REG_INTERRUPT);

drivers/mtd/nand/onenand/onenand_omap2.c

171

if (intr & ONENAND_INT_MASTER)

drivers/mtd/nand/onenand/onenand_omap2.c

176

wait_err("controller error", state, ctrl, intr);

drivers/mtd/nand/onenand/onenand_omap2.c

179

if ((intr & intr_flags) == intr_flags)

drivers/mtd/nand/onenand/onenand_omap2.c

200

intr = read_reg(c, ONENAND_REG_INTERRUPT);

drivers/mtd/nand/onenand/onenand_omap2.c

201

wait_err("gpio error", state, ctrl, intr);

drivers/mtd/nand/onenand/onenand_omap2.c

219

intr = read_reg(c,

drivers/mtd/nand/onenand/onenand_omap2.c

221

wait_err("timeout", state, ctrl, intr);

drivers/mtd/nand/onenand/onenand_omap2.c

224

intr = read_reg(c, ONENAND_REG_INTERRUPT);

drivers/mtd/nand/onenand/onenand_omap2.c

225

if ((intr & ONENAND_INT_MASTER) == 0)

drivers/mtd/nand/onenand/onenand_omap2.c

226

wait_warn("timeout", state, ctrl, intr);

drivers/mtd/nand/onenand/onenand_omap2.c

240

intr = read_reg(c, ONENAND_REG_INTERRUPT);

drivers/mtd/nand/onenand/onenand_omap2.c

241

if (intr & ONENAND_INT_MASTER)

drivers/mtd/nand/onenand/onenand_omap2.c

263

intr = read_reg(c, ONENAND_REG_INTERRUPT);

drivers/mtd/nand/onenand/onenand_omap2.c

266

if (intr & ONENAND_INT_READ) {

drivers/mtd/nand/onenand/onenand_omap2.c

288

wait_err("timeout", state, ctrl, intr);

drivers/mtd/nand/onenand/onenand_omap2.c

293

wait_err("controller error", state, ctrl, intr);

drivers/mtd/nand/onenand/onenand_omap2.c

305

wait_warn("unexpected controller status", state, ctrl, intr);

drivers/net/ethernet/8390/axnet_cs.c

1123

netif_dbg(ei_local, intr, dev, "interrupt(isr=%#2.2x)\n",

drivers/net/ethernet/8390/axnet_cs.c

1134

netif_warn(ei_local, intr, dev,

drivers/net/ethernet/8390/lib8390.c

454

netif_dbg(ei_local, intr, dev, "interrupt(isr=%#2.2x)\n",

drivers/net/ethernet/airoha/airoha_eth.c

1272

u32 intr[ARRAY_SIZE(irq_bank->irqmask)];

drivers/net/ethernet/airoha/airoha_eth.c

1275

for (i = 0; i < ARRAY_SIZE(intr); i++) {

drivers/net/ethernet/airoha/airoha_eth.c

1276

intr[i] = airoha_qdma_rr(qdma, REG_INT_STATUS(i));

drivers/net/ethernet/airoha/airoha_eth.c

1277

intr[i] &= irq_bank->irqmask[i];

drivers/net/ethernet/airoha/airoha_eth.c

1278

airoha_qdma_wr(qdma, REG_INT_STATUS(i), intr[i]);

drivers/net/ethernet/airoha/airoha_eth.c

1284

rx_intr1 = intr[1] & RX_DONE_LOW_INT_MASK;

drivers/net/ethernet/airoha/airoha_eth.c

1290

rx_intr2 = intr[2] & RX_DONE_HIGH_INT_MASK;

drivers/net/ethernet/airoha/airoha_eth.c

1304

if (intr[0] & INT_TX_MASK) {

drivers/net/ethernet/airoha/airoha_eth.c

1306

if (!(intr[0] & TX_DONE_INT_MASK(i)))

drivers/net/ethernet/amd/pcnet32.c

2575

netif_printk(lp, intr, KERN_DEBUG, dev,

drivers/net/ethernet/amd/pcnet32.c

2614

netif_printk(lp, intr, KERN_DEBUG, dev,

drivers/net/ethernet/amd/pds_core/debugfs.c

148

struct pdsc_intr_info *intr = &pdsc->intr_info[qcq->intx];

drivers/net/ethernet/amd/pds_core/debugfs.c

154

debugfs_create_u32("index", 0400, intr_dentry, &intr->index);

drivers/net/ethernet/amd/pds_core/debugfs.c

155

debugfs_create_u32("vector", 0400, intr_dentry, &intr->vector);

drivers/net/ethernet/amd/pds_core/debugfs.c

164

intr_ctrl_regset->base = &pdsc->intr_ctrl[intr->index];

drivers/net/ethernet/amd/xgbe/xgbe-drv.c

306

netif_dbg(pdata, intr, pdata->netdev, "ECC_ISR=%#010x\n", ecc_isr);

drivers/net/ethernet/amd/xgbe/xgbe-drv.c

385

netif_dbg(pdata, intr, pdata->netdev, "DMA_ISR=%#010x\n", dma_isr);

drivers/net/ethernet/amd/xgbe/xgbe-drv.c

404

netif_dbg(pdata, intr, pdata->netdev, "DMA_CH%u_ISR=%#010x\n",

drivers/net/ethernet/amd/xgbe/xgbe-drv.c

464

netif_dbg(pdata, intr, pdata->netdev, "MAC_ISR=%#010x\n",

drivers/net/ethernet/amd/xgbe/xgbe-drv.c

476

netif_dbg(pdata, intr, pdata->netdev,

drivers/net/ethernet/amd/xgbe/xgbe-drv.c

491

netif_dbg(pdata, intr, pdata->netdev,

drivers/net/ethernet/amd/xgbe/xgbe-i2c.c

178

netif_dbg(pdata, intr, pdata->netdev,

drivers/net/ethernet/amd/xgbe/xgbe-mdio.c

605

netif_dbg(pdata, intr, pdata->netdev, "AN interrupt received\n");

drivers/net/ethernet/apple/mace.c

639

static void mace_handle_misc_intrs(struct mace_data *mp, int intr, struct net_device *dev)

drivers/net/ethernet/apple/mace.c

644

if (intr & MPCO)

drivers/net/ethernet/apple/mace.c

647

if (intr & RNTPCO)

drivers/net/ethernet/apple/mace.c

650

if (intr & CERR)

drivers/net/ethernet/apple/mace.c

652

if (intr & BABBLE)

drivers/net/ethernet/apple/mace.c

655

if (intr & JABBER)

drivers/net/ethernet/apple/mace.c

667

int intr, fs, i, stat, x;

drivers/net/ethernet/apple/mace.c

673

intr = in_8(&mb->ir); /* read interrupt register */

drivers/net/ethernet/apple/mace.c

675

mace_handle_misc_intrs(mp, intr, dev);

drivers/net/ethernet/apple/mace.c

686

intr = in_8(&mb->ir);

drivers/net/ethernet/apple/mace.c

687

if (intr != 0)

drivers/net/ethernet/apple/mace.c

688

mace_handle_misc_intrs(mp, intr, dev);

drivers/net/ethernet/apple/macmace.c

534

static void mace_handle_misc_intrs(struct net_device *dev, int intr)

drivers/net/ethernet/apple/macmace.c

540

if (intr & MPCO)

drivers/net/ethernet/apple/macmace.c

543

if (intr & RNTPCO)

drivers/net/ethernet/apple/macmace.c

546

if (intr & CERR)

drivers/net/ethernet/apple/macmace.c

548

if (intr & BABBLE)

drivers/net/ethernet/apple/macmace.c

551

if (intr & JABBER)

drivers/net/ethernet/apple/macmace.c

561

int intr, fs;

drivers/net/ethernet/apple/macmace.c

567

intr = mb->ir; /* read interrupt register */

drivers/net/ethernet/apple/macmace.c

568

mace_handle_misc_intrs(dev, intr);

drivers/net/ethernet/apple/macmace.c

570

if (intr & XMTINT) {

drivers/net/ethernet/asix/ax88796c_main.c

559

netif_dbg(ax_local, intr, ndev, " ISR 0x%04x\n", isr);

drivers/net/ethernet/asix/ax88796c_main.c

562

netif_dbg(ax_local, intr, ndev, " TXERR interrupt\n");

drivers/net/ethernet/asix/ax88796c_main.c

568

netif_dbg(ax_local, intr, ndev, " TXPAGES interrupt\n");

drivers/net/ethernet/asix/ax88796c_main.c

573

netif_dbg(ax_local, intr, ndev, " Link change interrupt\n");

drivers/net/ethernet/asix/ax88796c_main.c

578

netif_dbg(ax_local, intr, ndev, " RX interrupt\n");

drivers/net/ethernet/asix/ax88796c_main.c

599

netif_dbg(ax_local, intr, ndev, "Interrupt occurred\n");

drivers/net/ethernet/atheros/ag71xx.c

1750

netif_err(ag, intr, ndev, "TX BUS error\n");

drivers/net/ethernet/atheros/ag71xx.c

1754

netif_err(ag, intr, ndev, "RX BUS error\n");

drivers/net/ethernet/atheros/ag71xx.c

1760

netif_dbg(ag, intr, ndev, "enable polling mode\n");

drivers/net/ethernet/atheros/alx/main.c

330

static bool alx_intr_handle_misc(struct alx_priv *alx, u32 intr)

drivers/net/ethernet/atheros/alx/main.c

334

if (intr & ALX_ISR_FATAL) {

drivers/net/ethernet/atheros/alx/main.c

336

"fatal interrupt 0x%x, resetting\n", intr);

drivers/net/ethernet/atheros/alx/main.c

341

if (intr & ALX_ISR_ALERT)

drivers/net/ethernet/atheros/alx/main.c

342

netdev_warn(alx->dev, "alert interrupt: 0x%x\n", intr);

drivers/net/ethernet/atheros/alx/main.c

344

if (intr & ALX_ISR_PHY) {

drivers/net/ethernet/atheros/alx/main.c

357

static irqreturn_t alx_intr_handle(struct alx_priv *alx, u32 intr)

drivers/net/ethernet/atheros/alx/main.c

364

alx_write_mem32(hw, ALX_ISR, intr | ALX_ISR_DIS);

drivers/net/ethernet/atheros/alx/main.c

365

intr &= alx->int_mask;

drivers/net/ethernet/atheros/alx/main.c

367

if (alx_intr_handle_misc(alx, intr))

drivers/net/ethernet/atheros/alx/main.c

370

if (intr & (ALX_ISR_TX_Q0 | ALX_ISR_RX_Q0)) {

drivers/net/ethernet/atheros/alx/main.c

403

u32 intr;

drivers/net/ethernet/atheros/alx/main.c

409

intr = alx_read_mem32(hw, ALX_ISR);

drivers/net/ethernet/atheros/alx/main.c

410

intr &= (alx->int_mask & ~ALX_ISR_ALL_QUEUES);

drivers/net/ethernet/atheros/alx/main.c

412

if (alx_intr_handle_misc(alx, intr))

drivers/net/ethernet/atheros/alx/main.c

416

alx_write_mem32(hw, ALX_ISR, intr);

drivers/net/ethernet/atheros/alx/main.c

435

u32 intr;

drivers/net/ethernet/atheros/alx/main.c

437

intr = alx_read_mem32(hw, ALX_ISR);

drivers/net/ethernet/atheros/alx/main.c

439

if (intr & ALX_ISR_DIS || !(intr & alx->int_mask))

drivers/net/ethernet/atheros/alx/main.c

442

return alx_intr_handle(alx, intr);

drivers/net/ethernet/broadcom/asp2/bcmasp.h

18

#define ASP_INTR2_RX_ECH(intr) BIT(intr)

drivers/net/ethernet/broadcom/asp2/bcmasp.h

19

#define ASP_INTR2_TX_DESC(intr) BIT((intr) + 14)

drivers/net/ethernet/broadcom/asp2/bcmasp.h

22

#define ASP_INTR2_PHY_EVENT(intr) ((intr) ? BIT(30) | BIT(31) : \

drivers/net/ethernet/broadcom/genet/bcmgenet.c

3142

netif_dbg(priv, intr, priv->dev, "%s\n", __func__);

drivers/net/ethernet/broadcom/genet/bcmgenet.c

3176

netif_dbg(priv, intr, priv->dev,

drivers/net/ethernet/broadcom/genet/bcmgenet.c

3223

netif_dbg(priv, intr, priv->dev,

drivers/net/ethernet/brocade/bna/bfi_enet.h

198

} __packed intr;

drivers/net/ethernet/brocade/bna/bna_tx_rx.c

1671

cfg_req->q_cfg[i].ib.intr.msix_index =

drivers/net/ethernet/brocade/bna/bna_tx_rx.c

3108

cfg_req->q_cfg[i].ib.intr.msix_index =

drivers/net/ethernet/cavium/liquidio/cn66xx_device.c

303

u32 intr;

drivers/net/ethernet/cavium/liquidio/cn66xx_device.c

320

intr = octeon_read_csr(oct, CN6XXX_SLI_PKT_TIME_INT_ENB);

drivers/net/ethernet/cavium/liquidio/cn66xx_device.c

321

intr |= (1 << oq_no);

drivers/net/ethernet/cavium/liquidio/cn66xx_device.c

322

octeon_write_csr(oct, CN6XXX_SLI_PKT_TIME_INT_ENB, intr);

drivers/net/ethernet/cavium/liquidio/cn66xx_device.c

325

intr = octeon_read_csr(oct, CN6XXX_SLI_PKT_CNT_INT_ENB);

drivers/net/ethernet/cavium/liquidio/cn66xx_device.c

326

intr |= (1 << oq_no);

drivers/net/ethernet/cavium/liquidio/cn66xx_device.c

327

octeon_write_csr(oct, CN6XXX_SLI_PKT_CNT_INT_ENB, intr);

drivers/net/ethernet/cavium/thunder/nic_main.c

1150

u64 intr;

drivers/net/ethernet/cavium/thunder/nic_main.c

1158

intr = nic_reg_read(nic, NIC_PF_MAILBOX_INT + (mbx << 3));

drivers/net/ethernet/cavium/thunder/nic_main.c

1159

dev_dbg(&nic->pdev->dev, "PF interrupt Mbox%d 0x%llx\n", mbx, intr);

drivers/net/ethernet/cavium/thunder/nic_main.c

1161

if (intr & (1ULL << vf)) {

drivers/net/ethernet/cavium/thunder/nicvf_main.c

1018

netif_info(nic, intr, nic->netdev, "interrupt status 0x%llx\n",

drivers/net/ethernet/cavium/thunder/nicvf_main.c

1025

u64 intr;

drivers/net/ethernet/cavium/thunder/nicvf_main.c

1029

intr = nicvf_reg_read(nic, NIC_VF_INT);

drivers/net/ethernet/cavium/thunder/nicvf_main.c

1031

if (!(intr & NICVF_INTR_MBOX_MASK))

drivers/net/ethernet/chelsio/cxgb3/t3_hw.c

2263

unsigned int intr = 0;

drivers/net/ethernet/chelsio/cxgb3/t3_hw.c

2276

intr = V_RQ_MSI_VEC(irq_vec_idx) | F_RQ_INTR_EN;

drivers/net/ethernet/chelsio/cxgb3/t3_hw.c

2278

V_CQ_BASE_HI((u32) base_addr) | intr | V_RQ_GEN(gen));

drivers/net/ethernet/cirrus/mac89x0.c

387

netif_dbg(lp, intr, dev, "status=%04x\n", status);

drivers/net/ethernet/cisco/enic/enic.h

232

struct vnic_intr *intr;

drivers/net/ethernet/cisco/enic/enic.h

320

static inline bool enic_is_err_intr(struct enic *enic, int intr)

drivers/net/ethernet/cisco/enic/enic.h

324

return intr == ENIC_LEGACY_ERR_INTR;

drivers/net/ethernet/cisco/enic/enic.h

326

return intr == enic_msix_err_intr(enic);

drivers/net/ethernet/cisco/enic/enic.h

333

static inline bool enic_is_notify_intr(struct enic *enic, int intr)

drivers/net/ethernet/cisco/enic/enic.h

337

return intr == ENIC_LEGACY_NOTIFY_INTR;

drivers/net/ethernet/cisco/enic/enic.h

339

return intr == enic_msix_notify_intr(enic);

drivers/net/ethernet/cisco/enic/enic_ethtool.c

121

int intr;

drivers/net/ethernet/cisco/enic/enic_ethtool.c

124

intr = enic_msix_rq_intr(enic, i);

drivers/net/ethernet/cisco/enic/enic_ethtool.c

125

vnic_intr_coalescing_timer_set(&enic->intr[intr], timer);

drivers/net/ethernet/cisco/enic/enic_ethtool.c

429

unsigned int i, intr;

drivers/net/ethernet/cisco/enic/enic_ethtool.c

449

intr = enic_msix_wq_intr(enic, i);

drivers/net/ethernet/cisco/enic/enic_ethtool.c

450

vnic_intr_coalescing_timer_set(&enic->intr[intr],

drivers/net/ethernet/cisco/enic/enic_main.c

1267

unsigned int intr = enic_msix_rq_intr(enic, rq->index);

drivers/net/ethernet/cisco/enic/enic_main.c

1272

vnic_intr_coalescing_timer_set(&enic->intr[intr], timer);

drivers/net/ethernet/cisco/enic/enic_main.c

1329

unsigned int intr = ENIC_LEGACY_IO_INTR;

drivers/net/ethernet/cisco/enic/enic_main.c

1348

vnic_intr_return_credits(&enic->intr[intr],

drivers/net/ethernet/cisco/enic/enic_main.c

1375

vnic_intr_unmask(&enic->intr[intr]);

drivers/net/ethernet/cisco/enic/enic_main.c

1429

unsigned int intr;

drivers/net/ethernet/cisco/enic/enic_main.c

1436

intr = enic_msix_wq_intr(enic, wq_irq);

drivers/net/ethernet/cisco/enic/enic_main.c

1440

vnic_intr_return_credits(&enic->intr[intr], wq_work_done,

drivers/net/ethernet/cisco/enic/enic_main.c

1445

vnic_intr_unmask(&enic->intr[intr]);

drivers/net/ethernet/cisco/enic/enic_main.c

1458

unsigned int intr = enic_msix_rq_intr(enic, rq);

drivers/net/ethernet/cisco/enic/enic_main.c

1475

vnic_intr_return_credits(&enic->intr[intr],

drivers/net/ethernet/cisco/enic/enic_main.c

1502

vnic_intr_unmask(&enic->intr[intr]);

drivers/net/ethernet/cisco/enic/enic_main.c

1548

unsigned int i, intr;

drivers/net/ethernet/cisco/enic/enic_main.c

1569

intr = enic_msix_rq_intr(enic, i);

drivers/net/ethernet/cisco/enic/enic_main.c

1570

snprintf(enic->msix[intr].devname,

drivers/net/ethernet/cisco/enic/enic_main.c

1571

sizeof(enic->msix[intr].devname),

drivers/net/ethernet/cisco/enic/enic_main.c

1573

enic->msix[intr].isr = enic_isr_msix;

drivers/net/ethernet/cisco/enic/enic_main.c

1574

enic->msix[intr].devid = &enic->napi[i];

drivers/net/ethernet/cisco/enic/enic_main.c

1580

intr = enic_msix_wq_intr(enic, i);

drivers/net/ethernet/cisco/enic/enic_main.c

1581

snprintf(enic->msix[intr].devname,

drivers/net/ethernet/cisco/enic/enic_main.c

1582

sizeof(enic->msix[intr].devname),

drivers/net/ethernet/cisco/enic/enic_main.c

1584

enic->msix[intr].isr = enic_isr_msix;

drivers/net/ethernet/cisco/enic/enic_main.c

1585

enic->msix[intr].devid = &enic->napi[wq];

drivers/net/ethernet/cisco/enic/enic_main.c

1588

intr = enic_msix_err_intr(enic);

drivers/net/ethernet/cisco/enic/enic_main.c

1589

snprintf(enic->msix[intr].devname,

drivers/net/ethernet/cisco/enic/enic_main.c

1590

sizeof(enic->msix[intr].devname),

drivers/net/ethernet/cisco/enic/enic_main.c

1592

enic->msix[intr].isr = enic_isr_msix_err;

drivers/net/ethernet/cisco/enic/enic_main.c

1593

enic->msix[intr].devid = enic;

drivers/net/ethernet/cisco/enic/enic_main.c

1595

intr = enic_msix_notify_intr(enic);

drivers/net/ethernet/cisco/enic/enic_main.c

1596

snprintf(enic->msix[intr].devname,

drivers/net/ethernet/cisco/enic/enic_main.c

1597

sizeof(enic->msix[intr].devname),

drivers/net/ethernet/cisco/enic/enic_main.c

1599

enic->msix[intr].isr = enic_isr_msix_notify;

drivers/net/ethernet/cisco/enic/enic_main.c

1600

enic->msix[intr].devid = enic;

drivers/net/ethernet/cisco/enic/enic_main.c

1752

vnic_intr_unmask(&enic->intr[i]);

drivers/net/ethernet/cisco/enic/enic_main.c

1784

vnic_intr_mask(&enic->intr[i]);

drivers/net/ethernet/cisco/enic/enic_main.c

1785

(void)vnic_intr_masked(&enic->intr[i]); /* flush write */

drivers/net/ethernet/cisco/enic/enic_main.c

1832

vnic_intr_clean(&enic->intr[i]);

drivers/net/ethernet/cisco/enic/enic_main.c

1893

unsigned int i, intr;

drivers/net/ethernet/cisco/enic/enic_main.c

1898

intr = enic_msix_rq_intr(enic, i);

drivers/net/ethernet/cisco/enic/enic_main.c

1899

enic_isr_msix(enic->msix_entry[intr].vector,

drivers/net/ethernet/cisco/enic/enic_main.c

1904

intr = enic_msix_wq_intr(enic, i);

drivers/net/ethernet/cisco/enic/enic_main.c

1905

enic_isr_msix(enic->msix_entry[intr].vector,

drivers/net/ethernet/cisco/enic/enic_main.c

2453

kfree(enic->intr);

drivers/net/ethernet/cisco/enic/enic_main.c

2454

enic->intr = NULL;

drivers/net/ethernet/cisco/enic/enic_main.c

2484

enic->intr = kzalloc_objs(struct vnic_intr, enic->intr_avail);

drivers/net/ethernet/cisco/enic/enic_main.c

2485

if (!enic->intr)

drivers/net/ethernet/cisco/enic/enic_main.c

443

vnic_intr_mask(&enic->intr[io_intr]);

drivers/net/ethernet/cisco/enic/enic_main.c

447

vnic_intr_unmask(&enic->intr[io_intr]);

drivers/net/ethernet/cisco/enic/enic_main.c

453

vnic_intr_return_all_credits(&enic->intr[notify_intr]);

drivers/net/ethernet/cisco/enic/enic_main.c

457

vnic_intr_return_all_credits(&enic->intr[err_intr]);

drivers/net/ethernet/cisco/enic/enic_main.c

467

vnic_intr_unmask(&enic->intr[io_intr]);

drivers/net/ethernet/cisco/enic/enic_main.c

509

unsigned int intr = enic_msix_err_intr(enic);

drivers/net/ethernet/cisco/enic/enic_main.c

511

vnic_intr_return_all_credits(&enic->intr[intr]);

drivers/net/ethernet/cisco/enic/enic_main.c

523

unsigned int intr = enic_msix_notify_intr(enic);

drivers/net/ethernet/cisco/enic/enic_main.c

526

vnic_intr_return_all_credits(&enic->intr[intr]);

drivers/net/ethernet/cisco/enic/enic_res.c

192

vnic_intr_free(&enic->intr[i]);

drivers/net/ethernet/cisco/enic/enic_res.c

312

vnic_intr_init(&enic->intr[i],

drivers/net/ethernet/cisco/enic/enic_res.c

388

err = vnic_intr_alloc(enic->vdev, &enic->intr[i], i);

drivers/net/ethernet/cisco/enic/vnic_dev.c

809

void *notify_addr, dma_addr_t notify_pa, u16 intr)

drivers/net/ethernet/cisco/enic/vnic_dev.c

820

a1 = ((u64)intr << 32) & 0x0000ffff00000000ULL;

drivers/net/ethernet/cisco/enic/vnic_dev.c

828

int vnic_dev_notify_set(struct vnic_dev *vdev, u16 intr)

drivers/net/ethernet/cisco/enic/vnic_dev.c

845

return vnic_dev_notify_setcmd(vdev, notify_addr, notify_pa, intr);

drivers/net/ethernet/cisco/enic/vnic_dev.h

134

int vnic_dev_notify_set(struct vnic_dev *vdev, u16 intr);

drivers/net/ethernet/cisco/enic/vnic_intr.c

17

void vnic_intr_free(struct vnic_intr *intr)

drivers/net/ethernet/cisco/enic/vnic_intr.c

19

intr->ctrl = NULL;

drivers/net/ethernet/cisco/enic/vnic_intr.c

22

int vnic_intr_alloc(struct vnic_dev *vdev, struct vnic_intr *intr,

drivers/net/ethernet/cisco/enic/vnic_intr.c

25

intr->index = index;

drivers/net/ethernet/cisco/enic/vnic_intr.c

26

intr->vdev = vdev;

drivers/net/ethernet/cisco/enic/vnic_intr.c

28

intr->ctrl = vnic_dev_get_res(vdev, RES_TYPE_INTR_CTRL, index);

drivers/net/ethernet/cisco/enic/vnic_intr.c

29

if (!intr->ctrl) {

drivers/net/ethernet/cisco/enic/vnic_intr.c

38

void vnic_intr_init(struct vnic_intr *intr, u32 coalescing_timer,

drivers/net/ethernet/cisco/enic/vnic_intr.c

41

vnic_intr_coalescing_timer_set(intr, coalescing_timer);

drivers/net/ethernet/cisco/enic/vnic_intr.c

42

iowrite32(coalescing_type, &intr->ctrl->coalescing_type);

drivers/net/ethernet/cisco/enic/vnic_intr.c

43

iowrite32(mask_on_assertion, &intr->ctrl->mask_on_assertion);

drivers/net/ethernet/cisco/enic/vnic_intr.c

44

iowrite32(0, &intr->ctrl->int_credits);

drivers/net/ethernet/cisco/enic/vnic_intr.c

47

void vnic_intr_coalescing_timer_set(struct vnic_intr *intr,

drivers/net/ethernet/cisco/enic/vnic_intr.c

50

iowrite32(vnic_dev_intr_coal_timer_usec_to_hw(intr->vdev,

drivers/net/ethernet/cisco/enic/vnic_intr.c

51

coalescing_timer), &intr->ctrl->coalescing_timer);

drivers/net/ethernet/cisco/enic/vnic_intr.c

54

void vnic_intr_clean(struct vnic_intr *intr)

drivers/net/ethernet/cisco/enic/vnic_intr.c

56

iowrite32(0, &intr->ctrl->int_credits);

drivers/net/ethernet/cisco/enic/vnic_intr.h

41

static inline void vnic_intr_unmask(struct vnic_intr *intr)

drivers/net/ethernet/cisco/enic/vnic_intr.h

43

iowrite32(0, &intr->ctrl->mask);

drivers/net/ethernet/cisco/enic/vnic_intr.h

46

static inline void vnic_intr_mask(struct vnic_intr *intr)

drivers/net/ethernet/cisco/enic/vnic_intr.h

48

iowrite32(1, &intr->ctrl->mask);

drivers/net/ethernet/cisco/enic/vnic_intr.h

51

static inline int vnic_intr_masked(struct vnic_intr *intr)

drivers/net/ethernet/cisco/enic/vnic_intr.h

53

return ioread32(&intr->ctrl->mask);

drivers/net/ethernet/cisco/enic/vnic_intr.h

56

static inline void vnic_intr_return_credits(struct vnic_intr *intr,

drivers/net/ethernet/cisco/enic/vnic_intr.h

66

iowrite32(int_credit_return, &intr->ctrl->int_credit_return);

drivers/net/ethernet/cisco/enic/vnic_intr.h

69

static inline unsigned int vnic_intr_credits(struct vnic_intr *intr)

drivers/net/ethernet/cisco/enic/vnic_intr.h

71

return ioread32(&intr->ctrl->int_credits);

drivers/net/ethernet/cisco/enic/vnic_intr.h

74

static inline void vnic_intr_return_all_credits(struct vnic_intr *intr)

drivers/net/ethernet/cisco/enic/vnic_intr.h

76

unsigned int credits = vnic_intr_credits(intr);

drivers/net/ethernet/cisco/enic/vnic_intr.h

80

vnic_intr_return_credits(intr, credits, unmask, reset_timer);

drivers/net/ethernet/cisco/enic/vnic_intr.h

89

void vnic_intr_free(struct vnic_intr *intr);

drivers/net/ethernet/cisco/enic/vnic_intr.h

90

int vnic_intr_alloc(struct vnic_dev *vdev, struct vnic_intr *intr,

drivers/net/ethernet/cisco/enic/vnic_intr.h

92

void vnic_intr_init(struct vnic_intr *intr, u32 coalescing_timer,

drivers/net/ethernet/cisco/enic/vnic_intr.h

94

void vnic_intr_coalescing_timer_set(struct vnic_intr *intr,

drivers/net/ethernet/cisco/enic/vnic_intr.h

96

void vnic_intr_clean(struct vnic_intr *intr);

drivers/net/ethernet/dec/tulip/de2104x.c

504

netif_dbg(de, intr, dev, "intr, status %08x mode %08x desc %u/%u/%u\n",

drivers/net/ethernet/freescale/gianfar.c

2782

netif_err(priv, intr, dev, "Can't get IRQ %d\n",

drivers/net/ethernet/freescale/gianfar.c

2792

netif_err(priv, intr, dev, "Can't get IRQ %d\n",

drivers/net/ethernet/freescale/gianfar.c

2799

netif_err(priv, intr, dev, "Can't get IRQ %d\n",

drivers/net/ethernet/freescale/gianfar.c

2809

netif_err(priv, intr, dev, "Can't get IRQ %d\n",

drivers/net/ethernet/fungible/funeth/funeth_main.c

311

netif_info(fp, intr, dev, "Released %u queue IRQs\n", nreleased);

drivers/net/ethernet/fungible/funeth/funeth_main.c

345

netif_info(fp, intr, dev, "Reserved %u/%u IRQs for Tx/Rx queues\n",

drivers/net/ethernet/ibm/ehea/ehea_main.c

1334

netif_info(port, intr, dev,

drivers/net/ethernet/ibm/ehea/ehea_main.c

1341

netif_info(port, intr, dev,

drivers/net/ethernet/intel/e100.c

2196

netif_printk(nic, intr, KERN_DEBUG, nic->netdev,

drivers/net/ethernet/intel/ice/devlink/health.c

380

u32 intr;

drivers/net/ethernet/intel/ice/devlink/health.c

401

ICE_DEVLINK_FMSG_PUT_FIELD(fmsg, event, intr);

drivers/net/ethernet/intel/ice/devlink/health.c

419

u16 vsi_num, u32 head, u32 intr)

drivers/net/ethernet/intel/ice/devlink/health.c

426

buf->intr = intr;

drivers/net/ethernet/intel/ice/devlink/health.c

436

.intr = buf->intr,

drivers/net/ethernet/intel/ice/devlink/health.h

51

u32 intr;

drivers/net/ethernet/intel/ice/devlink/health.h

66

u16 vsi_num, u32 head, u32 intr);

drivers/net/ethernet/intel/ice/ice_main.c

8316

u32 head, intr = 0;

drivers/net/ethernet/intel/ice/ice_main.c

8321

intr = rd32(hw, GLINT_DYN_CTL(tx_ring->q_vector->reg_idx));

drivers/net/ethernet/intel/ice/ice_main.c

8325

head, tx_ring->next_to_use, intr);

drivers/net/ethernet/intel/ice/ice_main.c

8327

ice_prep_tx_hang_report(pf, tx_ring, vsi->vsi_num, head, intr);

drivers/net/ethernet/intel/idpf/idpf_dev.c

102

intr->dyn_ctl = idpf_get_reg_addr(adapter,

drivers/net/ethernet/intel/idpf/idpf_dev.c

104

intr->dyn_ctl_intena_m = PF_GLINT_DYN_CTL_INTENA_M;

drivers/net/ethernet/intel/idpf/idpf_dev.c

105

intr->dyn_ctl_intena_msk_m = PF_GLINT_DYN_CTL_INTENA_MSK_M;

drivers/net/ethernet/intel/idpf/idpf_dev.c

106

intr->dyn_ctl_itridx_s = PF_GLINT_DYN_CTL_ITR_INDX_S;

drivers/net/ethernet/intel/idpf/idpf_dev.c

107

intr->dyn_ctl_intrvl_s = PF_GLINT_DYN_CTL_INTERVAL_S;

drivers/net/ethernet/intel/idpf/idpf_dev.c

108

intr->dyn_ctl_wb_on_itr_m = PF_GLINT_DYN_CTL_WB_ON_ITR_M;

drivers/net/ethernet/intel/idpf/idpf_dev.c

109

intr->dyn_ctl_swint_trig_m = PF_GLINT_DYN_CTL_SWINT_TRIG_M;

drivers/net/ethernet/intel/idpf/idpf_dev.c

110

intr->dyn_ctl_sw_itridx_ena_m =

drivers/net/ethernet/intel/idpf/idpf_dev.c

121

intr->rx_itr = idpf_get_reg_addr(adapter, rx_itr);

drivers/net/ethernet/intel/idpf/idpf_dev.c

122

intr->tx_itr = idpf_get_reg_addr(adapter, tx_itr);

drivers/net/ethernet/intel/idpf/idpf_dev.c

60

struct idpf_intr_reg *intr = &adapter->mb_vector.intr_reg;

drivers/net/ethernet/intel/idpf/idpf_dev.c

63

intr->dyn_ctl = idpf_get_reg_addr(adapter, dyn_ctl);

drivers/net/ethernet/intel/idpf/idpf_dev.c

64

intr->dyn_ctl_intena_m = PF_GLINT_DYN_CTL_INTENA_M;

drivers/net/ethernet/intel/idpf/idpf_dev.c

65

intr->dyn_ctl_itridx_m = PF_GLINT_DYN_CTL_ITR_INDX_M;

drivers/net/ethernet/intel/idpf/idpf_dev.c

66

intr->icr_ena = idpf_get_reg_addr(adapter, PF_INT_DIR_OICR_ENA);

drivers/net/ethernet/intel/idpf/idpf_dev.c

67

intr->icr_ena_ctlq_m = PF_INT_DIR_OICR_ENA_M;

drivers/net/ethernet/intel/idpf/idpf_dev.c

99

struct idpf_intr_reg *intr = &q_vector->intr_reg;

drivers/net/ethernet/intel/idpf/idpf_lib.c

117

struct idpf_intr_reg *intr = &adapter->mb_vector.intr_reg;

drivers/net/ethernet/intel/idpf/idpf_lib.c

120

val = intr->dyn_ctl_intena_m | intr->dyn_ctl_itridx_m;

drivers/net/ethernet/intel/idpf/idpf_lib.c

121

writel(val, intr->dyn_ctl);

drivers/net/ethernet/intel/idpf/idpf_lib.c

122

writel(intr->icr_ena_ctlq_m, intr->icr_ena);

drivers/net/ethernet/intel/idpf/idpf_vf_dev.c

101

intr->dyn_ctl = idpf_get_reg_addr(adapter,

drivers/net/ethernet/intel/idpf/idpf_vf_dev.c

103

intr->dyn_ctl_intena_m = VF_INT_DYN_CTLN_INTENA_M;

drivers/net/ethernet/intel/idpf/idpf_vf_dev.c

104

intr->dyn_ctl_intena_msk_m = VF_INT_DYN_CTLN_INTENA_MSK_M;

drivers/net/ethernet/intel/idpf/idpf_vf_dev.c

105

intr->dyn_ctl_itridx_s = VF_INT_DYN_CTLN_ITR_INDX_S;

drivers/net/ethernet/intel/idpf/idpf_vf_dev.c

106

intr->dyn_ctl_intrvl_s = VF_INT_DYN_CTLN_INTERVAL_S;

drivers/net/ethernet/intel/idpf/idpf_vf_dev.c

107

intr->dyn_ctl_wb_on_itr_m = VF_INT_DYN_CTLN_WB_ON_ITR_M;

drivers/net/ethernet/intel/idpf/idpf_vf_dev.c

108

intr->dyn_ctl_swint_trig_m = VF_INT_DYN_CTLN_SWINT_TRIG_M;

drivers/net/ethernet/intel/idpf/idpf_vf_dev.c

109

intr->dyn_ctl_sw_itridx_ena_m =

drivers/net/ethernet/intel/idpf/idpf_vf_dev.c

120

intr->rx_itr = idpf_get_reg_addr(adapter, rx_itr);

drivers/net/ethernet/intel/idpf/idpf_vf_dev.c

121

intr->tx_itr = idpf_get_reg_addr(adapter, tx_itr);

drivers/net/ethernet/intel/idpf/idpf_vf_dev.c

59

struct idpf_intr_reg *intr = &adapter->mb_vector.intr_reg;

drivers/net/ethernet/intel/idpf/idpf_vf_dev.c

62

intr->dyn_ctl = idpf_get_reg_addr(adapter, dyn_ctl);

drivers/net/ethernet/intel/idpf/idpf_vf_dev.c

63

intr->dyn_ctl_intena_m = VF_INT_DYN_CTL0_INTENA_M;

drivers/net/ethernet/intel/idpf/idpf_vf_dev.c

64

intr->dyn_ctl_itridx_m = VF_INT_DYN_CTL0_ITR_INDX_M;

drivers/net/ethernet/intel/idpf/idpf_vf_dev.c

65

intr->icr_ena = idpf_get_reg_addr(adapter, VF_INT_ICR0_ENA1);

drivers/net/ethernet/intel/idpf/idpf_vf_dev.c

66

intr->icr_ena_ctlq_m = VF_INT_ICR0_ENA1_ADMINQ_M;

drivers/net/ethernet/intel/idpf/idpf_vf_dev.c

98

struct idpf_intr_reg *intr = &q_vector->intr_reg;

drivers/net/ethernet/jme.c

1269

netif_info(jme, intr, jme->dev, "Get link change lock failed\n");

drivers/net/ethernet/jme.c

1271

netif_info(jme, intr, jme->dev, "Waiting link change lock\n");

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

106

u64 intr;

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

109

intr = rvu_read64(rvu, BLKADDR_RVUM, rvu_irq_data->intr_status);

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

110

rvu_write64(rvu, BLKADDR_RVUM, rvu_irq_data->intr_status, intr);

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

112

if (intr)

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

113

trace_otx2_msg_interrupt(rvu->pdev, "PF(s) to AF", intr);

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

120

rvu_irq_data->mdevs, intr);

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

20

u64 intr;

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

26

intr = rvupf_read64(rvu, rvu_irq_data->intr_status);

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

27

rvupf_write64(rvu, rvu_irq_data->intr_status, intr);

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

29

if (intr)

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

30

trace_otx2_msg_interrupt(rvu->pdev, "VF(s) to AF", intr);

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

33

rvu_irq_data->mdevs, intr);

drivers/net/ethernet/marvell/octeontx2/af/mcs.c

1005

if (intr & MCS_CPM_TX_INT_ENA) {

drivers/net/ethernet/marvell/octeontx2/af/mcs.c

1029

if (intr & MCS_BBE_RX_INT_ENA) {

drivers/net/ethernet/marvell/octeontx2/af/mcs.c

1039

if (intr & MCS_BBE_TX_INT_ENA) {

drivers/net/ethernet/marvell/octeontx2/af/mcs.c

1049

if (intr & MCS_PAB_RX_INT_ENA) {

drivers/net/ethernet/marvell/octeontx2/af/mcs.c

1059

if (intr & MCS_PAB_TX_INT_ENA) {

drivers/net/ethernet/marvell/octeontx2/af/mcs.c

880

u64 intr;

drivers/net/ethernet/marvell/octeontx2/af/mcs.c

887

intr = mcs_reg_read(mcs, MCSX_CPM_RX_SLAVE_PN_THRESH_REACHEDX(reg));

drivers/net/ethernet/marvell/octeontx2/af/mcs.c

889

if (!(intr & BIT_ULL(sa)))

drivers/net/ethernet/marvell/octeontx2/af/mcs.c

901

static void mcs_rx_misc_intr_handler(struct mcs *mcs, u64 intr)

drivers/net/ethernet/marvell/octeontx2/af/mcs.c

908

if (intr & MCS_CPM_RX_INT_SECTAG_V_EQ1)

drivers/net/ethernet/marvell/octeontx2/af/mcs.c

910

if (intr & MCS_CPM_RX_INT_SECTAG_E_EQ0_C_EQ1)

drivers/net/ethernet/marvell/octeontx2/af/mcs.c

912

if (intr & MCS_CPM_RX_INT_SL_GTE48)

drivers/net/ethernet/marvell/octeontx2/af/mcs.c

914

if (intr & MCS_CPM_RX_INT_ES_EQ1_SC_EQ1)

drivers/net/ethernet/marvell/octeontx2/af/mcs.c

916

if (intr & MCS_CPM_RX_INT_SC_EQ1_SCB_EQ1)

drivers/net/ethernet/marvell/octeontx2/af/mcs.c

918

if (intr & MCS_CPM_RX_INT_PACKET_XPN_EQ0)

drivers/net/ethernet/marvell/octeontx2/af/mcs.c

924

static void mcs_tx_misc_intr_handler(struct mcs *mcs, u64 intr)

drivers/net/ethernet/marvell/octeontx2/af/mcs.c

928

if (!(intr & MCS_CPM_TX_INT_SA_NOT_VALID))

drivers/net/ethernet/marvell/octeontx2/af/mcs.c

939

void cn10kb_mcs_bbe_intr_handler(struct mcs *mcs, u64 intr,

drivers/net/ethernet/marvell/octeontx2/af/mcs.c

945

if (!(intr & 0x6ULL))

drivers/net/ethernet/marvell/octeontx2/af/mcs.c

948

if (intr & BIT_ULL(1))

drivers/net/ethernet/marvell/octeontx2/af/mcs.c

964

void cn10kb_mcs_pab_intr_handler(struct mcs *mcs, u64 intr,

drivers/net/ethernet/marvell/octeontx2/af/mcs.c

969

if (!(intr & 0xFFFFFULL))

drivers/net/ethernet/marvell/octeontx2/af/mcs.c

973

if (intr & BIT_ULL(lmac))

drivers/net/ethernet/marvell/octeontx2/af/mcs.c

981

u64 intr, cpm_intr, bbe_intr, pab_intr;

drivers/net/ethernet/marvell/octeontx2/af/mcs.c

987

intr = mcs_reg_read(mcs, MCSX_TOP_SLAVE_INT_SUM);

drivers/net/ethernet/marvell/octeontx2/af/mcs.c

990

if (intr & MCS_CPM_RX_INT_ENA) {

drivers/net/ethernet/marvell/octeontx2/af/mcs.h

161

void (*mcs_bbe_intr_handler)(struct mcs *mcs, u64 intr, enum mcs_direction dir);

drivers/net/ethernet/marvell/octeontx2/af/mcs.h

162

void (*mcs_pab_intr_handler)(struct mcs *mcs, u64 intr, enum mcs_direction dir);

drivers/net/ethernet/marvell/octeontx2/af/mcs.h

218

void cn10kb_mcs_pab_intr_handler(struct mcs *mcs, u64 intr, enum mcs_direction dir);

drivers/net/ethernet/marvell/octeontx2/af/mcs.h

219

void cn10kb_mcs_bbe_intr_handler(struct mcs *mcs, u64 intr, enum mcs_direction dir);

drivers/net/ethernet/marvell/octeontx2/af/mcs.h

230

void cnf10kb_mcs_bbe_intr_handler(struct mcs *mcs, u64 intr, enum mcs_direction dir);

drivers/net/ethernet/marvell/octeontx2/af/mcs.h

231

void cnf10kb_mcs_pab_intr_handler(struct mcs *mcs, u64 intr, enum mcs_direction dir);

drivers/net/ethernet/marvell/octeontx2/af/mcs_cnf10kb.c

219

void cnf10kb_mcs_bbe_intr_handler(struct mcs *mcs, u64 intr,

drivers/net/ethernet/marvell/octeontx2/af/mcs_cnf10kb.c

225

if (!(intr & MCS_BBE_INT_MASK))

drivers/net/ethernet/marvell/octeontx2/af/mcs_cnf10kb.c

232

if (!(intr & BIT_ULL(i)))

drivers/net/ethernet/marvell/octeontx2/af/mcs_cnf10kb.c

238

if (intr & 0xFULL)

drivers/net/ethernet/marvell/octeontx2/af/mcs_cnf10kb.c

253

void cnf10kb_mcs_pab_intr_handler(struct mcs *mcs, u64 intr,

drivers/net/ethernet/marvell/octeontx2/af/mcs_cnf10kb.c

259

if (!(intr & MCS_PAB_INT_MASK))

drivers/net/ethernet/marvell/octeontx2/af/mcs_cnf10kb.c

266

if (!(intr & BIT_ULL(i)))

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2666

int mdevs, u64 intr)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2675

if (!(intr & BIT_ULL(i - first)))

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2709

u64 intr;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2711

intr = rvu_read64(rvu, BLKADDR_RVUM, RVU_AF_PFAF_MBOX_INT);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2713

rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFAF_MBOX_INT, intr);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2714

if (intr)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2715

trace_otx2_msg_interrupt(rvu->pdev, "PF(s) to AF", intr);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2720

rvu_queue_work(&rvu->afpf_wq_info, 0, rvu->hw->total_pfs, intr);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2729

u64 intr;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2736

intr = rvupf_read64(rvu, RVU_PF_VFPF_MBOX_INTX(1));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2737

rvupf_write64(rvu, RVU_PF_VFPF_MBOX_INTX(1), intr);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2739

rvu_queue_work(&rvu->afvf_wq_info, 64, vfs, intr);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2743

intr = rvupf_read64(rvu, RVU_PF_VFPF_MBOX_INTX(0));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2744

rvupf_write64(rvu, RVU_PF_VFPF_MBOX_INTX(0), intr);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2745

if (intr)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2746

trace_otx2_msg_interrupt(rvu->pdev, "VF(s) to AF", intr);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2748

rvu_queue_work(&rvu->afvf_wq_info, 0, vfs, intr);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2896

u64 intr;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2901

intr = rvupf_read64(rvu, RVU_PF_VFFLR_INTX(reg));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2902

if (!intr)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2906

if (!(intr & BIT_ULL(vf)))

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2920

u64 intr;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2923

intr = rvu_read64(rvu, BLKADDR_RVUM, RVU_AF_PFFLR_INT);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2924

if (!intr)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2928

if (intr & (1ULL << pf)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2948

static void rvu_me_handle_vfset(struct rvu *rvu, int idx, u64 intr)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2956

if (intr & (1ULL << vf)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2970

u64 intr;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2972

intr = rvu_read64(rvu, BLKADDR_RVUM, RVU_AF_PFME_INT);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2975

intr = rvupf_read64(rvu, RVU_PF_VFME_INTX(vfset));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2976

if (intr)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2977

rvu_me_handle_vfset(rvu, vfset, intr);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2987

u64 intr;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2990

intr = rvu_read64(rvu, BLKADDR_RVUM, RVU_AF_PFME_INT);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2996

if (intr & (1ULL << pf)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

480

int mdevs, u64 intr);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

482

int mdevs, u64 intr);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

986

int mdevs, u64 intr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

105

intr = rvu_read64(rvu, blkaddr, NIX_AF_GEN_INT);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

106

nix_event_context->nix_af_rvu_gen = intr;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

109

rvu_write64(rvu, blkaddr, NIX_AF_GEN_INT, intr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

132

u64 intr;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

140

intr = rvu_read64(rvu, blkaddr, NIX_AF_ERR_INT);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

141

nix_event_context->nix_af_rvu_err = intr;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

144

rvu_write64(rvu, blkaddr, NIX_AF_ERR_INT, intr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

167

u64 intr;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

175

intr = rvu_read64(rvu, blkaddr, NIX_AF_ERR_INT);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

176

nix_event_context->nix_af_rvu_ras = intr;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

179

rvu_write64(rvu, blkaddr, NIX_AF_RAS, intr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

617

u64 intr;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

62

u64 intr;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

625

intr = rvu_read64(rvu, blkaddr, NPA_AF_RVU_INT);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

626

npa_event_context->npa_af_rvu_int = intr;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

629

rvu_write64(rvu, blkaddr, NPA_AF_RVU_INT, intr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

652

u64 intr;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

660

intr = rvu_read64(rvu, blkaddr, NPA_AF_GEN_INT);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

661

npa_event_context->npa_af_rvu_gen = intr;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

664

rvu_write64(rvu, blkaddr, NPA_AF_GEN_INT, intr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

687

u64 intr;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

694

intr = rvu_read64(rvu, blkaddr, NPA_AF_ERR_INT);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

695

npa_event_context->npa_af_rvu_err = intr;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

698

rvu_write64(rvu, blkaddr, NPA_AF_ERR_INT, intr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

70

intr = rvu_read64(rvu, blkaddr, NIX_AF_RVU_INT);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

71

nix_event_context->nix_af_rvu_int = intr;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

721

u64 intr;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

729

intr = rvu_read64(rvu, blkaddr, NPA_AF_RAS);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

730

npa_event_context->npa_af_rvu_ras = intr;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

733

rvu_write64(rvu, blkaddr, NPA_AF_RAS, intr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

74

rvu_write64(rvu, blkaddr, NIX_AF_RVU_INT, intr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

97

u64 intr;

drivers/net/ethernet/marvell/octeontx2/af/rvu_trace.h

78

TP_PROTO(const struct pci_dev *pdev, const char *msg, u64 intr),

drivers/net/ethernet/marvell/octeontx2/af/rvu_trace.h

79

TP_ARGS(pdev, msg, intr),

drivers/net/ethernet/marvell/octeontx2/af/rvu_trace.h

82

__field(u64, intr)

drivers/net/ethernet/marvell/octeontx2/af/rvu_trace.h

86

__entry->intr = intr;

drivers/net/ethernet/marvell/octeontx2/af/rvu_trace.h

89

__get_str(str), __entry->intr)

drivers/net/ethernet/marvell/octeontx2/nic/cn20k.c

152

u64 intr;

drivers/net/ethernet/marvell/octeontx2/nic/cn20k.c

158

intr = otx2_read64(pf, irq_data->intr_status);

drivers/net/ethernet/marvell/octeontx2/nic/cn20k.c

159

otx2_write64(pf, irq_data->intr_status, intr);

drivers/net/ethernet/marvell/octeontx2/nic/cn20k.c

162

if (intr)

drivers/net/ethernet/marvell/octeontx2/nic/cn20k.c

163

trace_otx2_msg_interrupt(pf->pdev, "VF(s) to PF", intr);

drivers/net/ethernet/marvell/octeontx2/nic/cn20k.c

166

irq_data->mdevs, intr);

drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h

1225

int first, int mdevs, u64 intr);

drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h

454

int first, int mdevs, u64 intr);

drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c

151

u64 intr;

drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c

157

intr = otx2_read64(pf, RVU_PF_VFFLR_INTX(reg));

drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c

158

if (!intr)

drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c

162

if (!(intr & BIT_ULL(vf)))

drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c

180

u64 intr;

drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c

186

intr = otx2_read64(pf, RVU_PF_VFME_INTX(reg));

drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c

187

if (!intr)

drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c

190

if (!(intr & BIT_ULL(vf)))

drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c

300

int first, int mdevs, u64 intr)

drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c

309

if (!(intr & BIT_ULL(i - first)))

drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c

555

u64 intr;

drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c

560

intr = otx2_read64(pf, RVU_PF_VFPF_MBOX_INTX(1));

drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c

561

otx2_write64(pf, RVU_PF_VFPF_MBOX_INTX(1), intr);

drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c

562

otx2_queue_vf_work(mbox, pf->mbox_pfvf_wq, 64, vfs, intr);

drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c

563

if (intr)

drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c

564

trace_otx2_msg_interrupt(mbox->mbox.pdev, "VF(s) to PF", intr);

drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c

568

intr = otx2_read64(pf, RVU_PF_VFPF_MBOX_INTX(0));

drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c

569

otx2_write64(pf, RVU_PF_VFPF_MBOX_INTX(0), intr);

drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c

571

otx2_queue_vf_work(mbox, pf->mbox_pfvf_wq, 0, vfs, intr);

drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c

573

if (intr)

drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c

574

trace_otx2_msg_interrupt(mbox->mbox.pdev, "VF(s) to PF", intr);

drivers/net/ethernet/marvell/skge.c

1771

netif_printk(skge, intr, KERN_DEBUG, skge->netdev,

drivers/net/ethernet/marvell/skge.c

1876

netif_printk(skge, intr, KERN_DEBUG, skge->netdev,

drivers/net/ethernet/marvell/skge.c

2273

netif_printk(skge, intr, KERN_DEBUG, skge->netdev,

drivers/net/ethernet/marvell/skge.c

2353

netif_printk(skge, intr, KERN_DEBUG, skge->netdev,

drivers/net/ethernet/marvell/sky2.c

2309

netif_info(sky2, intr, sky2->netdev, "phy interrupt status 0x%x 0x%x\n",

drivers/net/ethernet/marvell/sky2.c

2895

netif_info(sky2, intr, dev, "mac interrupt status 0x%x\n", status);

drivers/net/ethernet/mediatek/mtk_wed_wo.c

238

u32 intr, mask;

drivers/net/ethernet/mediatek/mtk_wed_wo.c

243

intr = mtk_wed_wo_get_isr(wo);

drivers/net/ethernet/mediatek/mtk_wed_wo.c

244

intr &= wo->mmio.irq_mask;

drivers/net/ethernet/mediatek/mtk_wed_wo.c

245

mask = intr & (MTK_WED_WO_RXCH_INT_MASK | MTK_WED_WO_EXCEPTION_INT_MASK);

drivers/net/ethernet/mediatek/mtk_wed_wo.c

248

if (intr & MTK_WED_WO_RXCH_INT_MASK) {

drivers/net/ethernet/mellanox/mlx4/eq.c

1039

eq_context->intr = intr;

drivers/net/ethernet/mellanox/mlx4/eq.c

971

u8 intr, struct mlx4_eq *eq)

drivers/net/ethernet/mellanox/mlx4/mlx4.h

333

u8 intr;

drivers/net/ethernet/mellanox/mlx5/core/debugfs.c

411

param = MLX5_GET(eqc, ctx, intr);

drivers/net/ethernet/mellanox/mlx5/core/eq.c

311

MLX5_SET(eqc, eqc, intr, vecidx);

drivers/net/ethernet/micrel/ks8851_common.c

324

netif_dbg(ks, intr, ks->netdev,

drivers/net/ethernet/micrel/ks8851_common.c

336

netif_dbg(ks, intr, ks->netdev,

drivers/net/ethernet/micrel/ksz884x.c

3638

cur->sw.buf.tx.intr = 1;

drivers/net/ethernet/micrel/ksz884x.c

827

u32 intr:1;

drivers/net/ethernet/micrel/ksz884x.c

849

u32 intr:1;

drivers/net/ethernet/microchip/encx24j600.c

294

netif_dbg(priv, intr, dev, "%s", __func__);

drivers/net/ethernet/microchip/lan743x_main.c

211

struct lan743x_intr *intr = &adapter->intr;

drivers/net/ethernet/microchip/lan743x_main.c

215

intr->software_isr_flag = true;

drivers/net/ethernet/microchip/lan743x_main.c

216

wake_up(&intr->software_isr_wq);

drivers/net/ethernet/microchip/lan743x_main.c

3525

adapter->intr.irq = adapter->pdev->irq;

drivers/net/ethernet/microchip/lan743x_main.c

412

struct lan743x_intr *intr = &adapter->intr;

drivers/net/ethernet/microchip/lan743x_main.c

415

intr->software_isr_flag = false;

drivers/net/ethernet/microchip/lan743x_main.c

421

ret = wait_event_timeout(intr->software_isr_wq,

drivers/net/ethernet/microchip/lan743x_main.c

422

intr->software_isr_flag,

drivers/net/ethernet/microchip/lan743x_main.c

437

struct lan743x_vector *vector = &adapter->intr.vector_list

drivers/net/ethernet/microchip/lan743x_main.c

464

struct lan743x_vector *vector = &adapter->intr.vector_list

drivers/net/ethernet/microchip/lan743x_main.c

480

if (adapter->intr.vector_list[index].int_mask & int_mask)

drivers/net/ethernet/microchip/lan743x_main.c

481

return adapter->intr.vector_list[index].flags;

drivers/net/ethernet/microchip/lan743x_main.c

488

struct lan743x_intr *intr = &adapter->intr;

drivers/net/ethernet/microchip/lan743x_main.c

497

for (index = 0; index < intr->number_of_vectors; index++) {

drivers/net/ethernet/microchip/lan743x_main.c

498

if (intr->flags & INTR_FLAG_IRQ_REQUESTED(index)) {

drivers/net/ethernet/microchip/lan743x_main.c

500

intr->flags &= ~INTR_FLAG_IRQ_REQUESTED(index);

drivers/net/ethernet/microchip/lan743x_main.c

504

if (intr->flags & INTR_FLAG_MSI_ENABLED) {

drivers/net/ethernet/microchip/lan743x_main.c

506

intr->flags &= ~INTR_FLAG_MSI_ENABLED;

drivers/net/ethernet/microchip/lan743x_main.c

509

if (intr->flags & INTR_FLAG_MSIX_ENABLED) {

drivers/net/ethernet/microchip/lan743x_main.c

511

intr->flags &= ~INTR_FLAG_MSIX_ENABLED;

drivers/net/ethernet/microchip/lan743x_main.c

518

struct lan743x_intr *intr = &adapter->intr;

drivers/net/ethernet/microchip/lan743x_main.c

528

intr->number_of_vectors = 0;

drivers/net/ethernet/microchip/lan743x_main.c

543

intr->flags |= INTR_FLAG_MSIX_ENABLED;

drivers/net/ethernet/microchip/lan743x_main.c

544

intr->number_of_vectors = ret;

drivers/net/ethernet/microchip/lan743x_main.c

545

intr->using_vectors = true;

drivers/net/ethernet/microchip/lan743x_main.c

546

for (index = 0; index < intr->number_of_vectors; index++)

drivers/net/ethernet/microchip/lan743x_main.c

547

intr->vector_list[index].irq = msix_entries

drivers/net/ethernet/microchip/lan743x_main.c

551

intr->number_of_vectors);

drivers/net/ethernet/microchip/lan743x_main.c

555

if (!intr->number_of_vectors) {

drivers/net/ethernet/microchip/lan743x_main.c

558

intr->flags |= INTR_FLAG_MSI_ENABLED;

drivers/net/ethernet/microchip/lan743x_main.c

559

intr->number_of_vectors = 1;

drivers/net/ethernet/microchip/lan743x_main.c

560

intr->using_vectors = true;

drivers/net/ethernet/microchip/lan743x_main.c

561

intr->vector_list[0].irq =

drivers/net/ethernet/microchip/lan743x_main.c

565

intr->number_of_vectors);

drivers/net/ethernet/microchip/lan743x_main.c

571

if (!intr->number_of_vectors) {

drivers/net/ethernet/microchip/lan743x_main.c

572

intr->number_of_vectors = 1;

drivers/net/ethernet/microchip/lan743x_main.c

573

intr->using_vectors = false;

drivers/net/ethernet/microchip/lan743x_main.c

574

intr->vector_list[0].irq = intr->irq;

drivers/net/ethernet/microchip/lan743x_main.c

591

if (intr->using_vectors) {

drivers/net/ethernet/microchip/lan743x_main.c

609

init_waitqueue_head(&intr->software_isr_wq);

drivers/net/ethernet/microchip/lan743x_main.c

617

intr->flags |= INTR_FLAG_IRQ_REQUESTED(0);

drivers/net/ethernet/microchip/lan743x_main.c

619

if (intr->using_vectors)

drivers/net/ethernet/microchip/lan743x_main.c

650

if (intr->number_of_vectors > 1) {

drivers/net/ethernet/microchip/lan743x_main.c

651

int number_of_tx_vectors = intr->number_of_vectors - 1;

drivers/net/ethernet/microchip/lan743x_main.c

679

intr->vector_list[0].int_mask &= ~int_bit;

drivers/net/ethernet/microchip/lan743x_main.c

685

intr->flags |= INTR_FLAG_IRQ_REQUESTED(vector);

drivers/net/ethernet/microchip/lan743x_main.c

692

if ((intr->number_of_vectors - used_tx_channels) > 1) {

drivers/net/ethernet/microchip/lan743x_main.c

693

int number_of_rx_vectors = intr->number_of_vectors -

drivers/net/ethernet/microchip/lan743x_main.c

729

intr->vector_list[0].int_mask &= ~int_bit;

drivers/net/ethernet/microchip/lan743x_main.c

735

intr->flags |= INTR_FLAG_IRQ_REQUESTED(vector);

drivers/net/ethernet/microchip/lan743x_main.h

1061

struct lan743x_intr intr;

drivers/net/ethernet/natsemi/sonic.c

369

netif_dbg(lp, intr, dev, "%s: packet rx\n", __func__);

drivers/net/ethernet/natsemi/sonic.c

386

netif_dbg(lp, intr, dev, "%s: tx done\n", __func__);

drivers/net/ethernet/pensando/ionic/ionic_api.h

107

void ionic_intr_free(struct ionic_lif *lif, int intr);

drivers/net/ethernet/pensando/ionic/ionic_api.h

98

int ionic_intr_alloc(struct ionic_lif *lif, struct ionic_intr_info *intr);

drivers/net/ethernet/pensando/ionic/ionic_debugfs.c

119

struct ionic_intr_info *intr = &qcq->intr;

drivers/net/ethernet/pensando/ionic/ionic_debugfs.c

187

&intr->index);

drivers/net/ethernet/pensando/ionic/ionic_debugfs.c

189

&intr->vector);

drivers/net/ethernet/pensando/ionic/ionic_debugfs.c

191

&intr->dim_coal_hw);

drivers/net/ethernet/pensando/ionic/ionic_debugfs.c

199

intr_ctrl_regset->base = &idev->intr_ctrl[intr->index];

drivers/net/ethernet/pensando/ionic/ionic_dev.c

176

cpu = ionic_get_preferred_cpu(ionic, &ionic->lif->adminqcq->intr);

drivers/net/ethernet/pensando/ionic/ionic_dev.c

72

struct ionic_intr_info *intr)

drivers/net/ethernet/pensando/ionic/ionic_dev.c

76

cpu = cpumask_first_and(*intr->affinity_mask, cpu_online_mask);

drivers/net/ethernet/pensando/ionic/ionic_dev.c

91

cpu = ionic_get_preferred_cpu(ionic, &qcq->intr);

drivers/net/ethernet/pensando/ionic/ionic_dev.c

974

struct ionic_intr_info *intr,

drivers/net/ethernet/pensando/ionic/ionic_dev.c

987

cq->bound_intr = intr;

drivers/net/ethernet/pensando/ionic/ionic_dev.h

303

struct ionic_intr_info *intr,

drivers/net/ethernet/pensando/ionic/ionic_dev.h

307

intr->index = index;

drivers/net/ethernet/pensando/ionic/ionic_dev.h

368

struct ionic_intr_info *intr,

drivers/net/ethernet/pensando/ionic/ionic_ethtool.c

553

lif->rxqcqs[i]->intr.index,

drivers/net/ethernet/pensando/ionic/ionic_ethtool.c

555

lif->rxqcqs[i]->intr.dim_coal_hw = rx_dim;

drivers/net/ethernet/pensando/ionic/ionic_ethtool.c

560

lif->txqcqs[i]->intr.index,

drivers/net/ethernet/pensando/ionic/ionic_ethtool.c

562

lif->txqcqs[i]->intr.dim_coal_hw = tx_dim;

drivers/net/ethernet/pensando/ionic/ionic_lif.c

1216

struct ionic_intr_info *intr = napi_to_cq(napi)->bound_intr;

drivers/net/ethernet/pensando/ionic/ionic_lif.c

1249

intr->rearm_count++;

drivers/net/ethernet/pensando/ionic/ionic_lif.c

1255

ionic_intr_credits(idev->intr_ctrl, intr->index, credits, flags);

drivers/net/ethernet/pensando/ionic/ionic_lif.c

2098

lif->txqcqs[i]->intr.index,

drivers/net/ethernet/pensando/ionic/ionic_lif.c

2101

lif->txqcqs[i]->intr.dim_coal_hw = lif->tx_coalesce_hw;

drivers/net/ethernet/pensando/ionic/ionic_lif.c

2132

lif->rxqcqs[i]->intr.index,

drivers/net/ethernet/pensando/ionic/ionic_lif.c

2135

lif->rxqcqs[i]->intr.dim_coal_hw = lif->rx_coalesce_hw;

drivers/net/ethernet/pensando/ionic/ionic_lif.c

230

struct ionic_intr_info *intr = &qcq->intr;

drivers/net/ethernet/pensando/ionic/ionic_lif.c

240

snprintf(intr->name, sizeof(intr->name),

drivers/net/ethernet/pensando/ionic/ionic_lif.c

243

return devm_request_irq(dev, intr->vector, ionic_isr,

drivers/net/ethernet/pensando/ionic/ionic_lif.c

244

0, intr->name, &qcq->napi);

drivers/net/ethernet/pensando/ionic/ionic_lif.c

247

int ionic_intr_alloc(struct ionic_lif *lif, struct ionic_intr_info *intr)

drivers/net/ethernet/pensando/ionic/ionic_lif.c

257

ionic_intr_init(&ionic->idev, intr, index);

drivers/net/ethernet/pensando/ionic/ionic_lif.c

259

err = ionic_bus_get_irq(ionic, intr->index);

drivers/net/ethernet/pensando/ionic/ionic_lif.c

265

intr->vector = err;

drivers/net/ethernet/pensando/ionic/ionic_lif.c

281

struct ionic_intr_info *intr = container_of(notify, struct ionic_intr_info, aff_notify);

drivers/net/ethernet/pensando/ionic/ionic_lif.c

283

cpumask_copy(*intr->affinity_mask, mask);

drivers/net/ethernet/pensando/ionic/ionic_lif.c

3088

lif->rxqcqs[i]->intr.index,

drivers/net/ethernet/pensando/ionic/ionic_lif.c

3095

lif->txqcqs[i]->intr.index,

drivers/net/ethernet/pensando/ionic/ionic_lif.c

3098

lif->txqcqs[i]->intr.dim_coal_hw = lif->tx_coalesce_hw;

drivers/net/ethernet/pensando/ionic/ionic_lif.c

316

ionic_intr_clean(idev->intr_ctrl, qcq->intr.index);

drivers/net/ethernet/pensando/ionic/ionic_lif.c

324

irq_set_affinity_notifier(qcq->intr.vector,

drivers/net/ethernet/pensando/ionic/ionic_lif.c

325

&qcq->intr.aff_notify);

drivers/net/ethernet/pensando/ionic/ionic_lif.c

326

irq_set_affinity_hint(qcq->intr.vector,

drivers/net/ethernet/pensando/ionic/ionic_lif.c

327

*qcq->intr.affinity_mask);

drivers/net/ethernet/pensando/ionic/ionic_lif.c

328

ionic_intr_mask(idev->intr_ctrl, qcq->intr.index,

drivers/net/ethernet/pensando/ionic/ionic_lif.c

3573

ionic_dev_cmd_adminq_init(idev, qcq, lif->index, qcq->intr.index);

drivers/net/ethernet/pensando/ionic/ionic_lif.c

3597

irq_set_affinity_hint(qcq->intr.vector,

drivers/net/ethernet/pensando/ionic/ionic_lif.c

3598

*qcq->intr.affinity_mask);

drivers/net/ethernet/pensando/ionic/ionic_lif.c

3599

ionic_intr_mask(idev->intr_ctrl, qcq->intr.index,

drivers/net/ethernet/pensando/ionic/ionic_lif.c

360

ionic_intr_mask(idev->intr_ctrl, qcq->intr.index,

drivers/net/ethernet/pensando/ionic/ionic_lif.c

362

synchronize_irq(qcq->intr.vector);

drivers/net/ethernet/pensando/ionic/ionic_lif.c

3625

.intr_index = cpu_to_le16(lif->adminqcq->intr.index),

drivers/net/ethernet/pensando/ionic/ionic_lif.c

363

irq_set_affinity_notifier(qcq->intr.vector, NULL);

drivers/net/ethernet/pensando/ionic/ionic_lif.c

364

irq_set_affinity_hint(qcq->intr.vector, NULL);

drivers/net/ethernet/pensando/ionic/ionic_lif.c

395

ionic_intr_mask(idev->intr_ctrl, qcq->intr.index,

drivers/net/ethernet/pensando/ionic/ionic_lif.c

405

if (!(qcq->flags & IONIC_QCQ_F_INTR) || qcq->intr.vector == 0)

drivers/net/ethernet/pensando/ionic/ionic_lif.c

408

irq_set_affinity_hint(qcq->intr.vector, NULL);

drivers/net/ethernet/pensando/ionic/ionic_lif.c

409

devm_free_irq(lif->ionic->dev, qcq->intr.vector, &qcq->napi);

drivers/net/ethernet/pensando/ionic/ionic_lif.c

410

qcq->intr.vector = 0;

drivers/net/ethernet/pensando/ionic/ionic_lif.c

411

ionic_intr_free(lif, qcq->intr.index);

drivers/net/ethernet/pensando/ionic/ionic_lif.c

412

qcq->intr.index = IONIC_INTR_INDEX_NOT_ASSIGNED;

drivers/net/ethernet/pensando/ionic/ionic_lif.c

500

n_qcq->intr.vector = src_qcq->intr.vector;

drivers/net/ethernet/pensando/ionic/ionic_lif.c

501

n_qcq->intr.index = src_qcq->intr.index;

drivers/net/ethernet/pensando/ionic/ionic_lif.c

510

qcq->intr.index = IONIC_INTR_INDEX_NOT_ASSIGNED;

drivers/net/ethernet/pensando/ionic/ionic_lif.c

514

err = ionic_intr_alloc(lif, &qcq->intr);

drivers/net/ethernet/pensando/ionic/ionic_lif.c

521

ionic_intr_mask_assert(lif->ionic->idev.intr_ctrl, qcq->intr.index,

drivers/net/ethernet/pensando/ionic/ionic_lif.c

531

affinity_mask = &lif->ionic->affinity_masks[qcq->intr.index];

drivers/net/ethernet/pensando/ionic/ionic_lif.c

535

cpu = cpumask_local_spread(qcq->intr.index,

drivers/net/ethernet/pensando/ionic/ionic_lif.c

541

qcq->intr.affinity_mask = affinity_mask;

drivers/net/ethernet/pensando/ionic/ionic_lif.c

542

qcq->intr.aff_notify.notify = ionic_irq_aff_notify;

drivers/net/ethernet/pensando/ionic/ionic_lif.c

543

qcq->intr.aff_notify.release = ionic_irq_aff_release;

drivers/net/ethernet/pensando/ionic/ionic_lif.c

545

netdev_dbg(lif->netdev, "%s: Interrupt index %d\n", qcq->q.name, qcq->intr.index);

drivers/net/ethernet/pensando/ionic/ionic_lif.c

549

ionic_intr_free(lif, qcq->intr.index);

drivers/net/ethernet/pensando/ionic/ionic_lif.c

59

struct ionic_intr_info *intr;

drivers/net/ethernet/pensando/ionic/ionic_lif.c

627

err = ionic_cq_init(lif, &new->cq, &new->intr, num_descs, cq_desc_size);

drivers/net/ethernet/pensando/ionic/ionic_lif.c

743

devm_free_irq(dev, new->intr.vector, &new->napi);

drivers/net/ethernet/pensando/ionic/ionic_lif.c

744

ionic_intr_free(lif, new->intr.index);

drivers/net/ethernet/pensando/ionic/ionic_lif.c

75

intr = &qcq->intr;

drivers/net/ethernet/pensando/ionic/ionic_lif.c

76

if (intr->dim_coal_hw != new_coal) {

drivers/net/ethernet/pensando/ionic/ionic_lif.c

77

intr->dim_coal_hw = new_coal;

drivers/net/ethernet/pensando/ionic/ionic_lif.c

80

intr->index, intr->dim_coal_hw);

drivers/net/ethernet/pensando/ionic/ionic_lif.c

846

.intr_index = cpu_to_le16(qcq->intr.index),

drivers/net/ethernet/pensando/ionic/ionic_lif.h

91

struct ionic_intr_info intr;

drivers/net/ethernet/pensando/ionic/ionic_txrx.c

911

if (!qcq->intr.dim_coal_hw)

drivers/net/ethernet/qualcomm/emac/emac-mac.c

1233

adpt->rx_q.intr = adpt->irq.mask & ISR_RX_PKT;

drivers/net/ethernet/qualcomm/emac/emac-mac.h

179

u32 intr;

drivers/net/ethernet/qualcomm/emac/emac.c

109

irq->mask |= rx_q->intr;

drivers/net/ethernet/qualcomm/emac/emac.c

152

if (status & rx_q->intr) {

drivers/net/ethernet/qualcomm/emac/emac.c

154

irq->mask &= ~rx_q->intr;

drivers/net/ethernet/realtek/8139cp.c

592

netif_dbg(cp, intr, dev, "intr, status %04x cmd %02x cpcmd %04x\n",

drivers/net/ethernet/realtek/8139too.c

1983

netif_dbg(tp, intr, dev, "fifo copy in progress\n");

drivers/net/ethernet/sfc/ef10.c

2143

netif_vdbg(efx, intr, efx->net_dev,

drivers/net/ethernet/sfc/ef10.c

2185

netif_vdbg(efx, intr, efx->net_dev,

drivers/net/ethernet/sfc/ef100_nic.c

333

netif_vdbg(efx, intr, efx->net_dev,

drivers/net/ethernet/sfc/efx_channels.c

1262

netif_vdbg(efx, intr, efx->net_dev,

drivers/net/ethernet/sfc/efx_common.h

74

netif_vdbg(channel->efx, intr, channel->efx->net_dev,

drivers/net/ethernet/sfc/falcon/efx.c

298

netif_vdbg(efx, intr, efx->net_dev,

drivers/net/ethernet/sfc/falcon/efx.h

234

netif_vdbg(channel->efx, intr, channel->efx->net_dev,

drivers/net/ethernet/sfc/falcon/falcon.c

442

netif_vdbg(efx, intr, efx->net_dev,

drivers/net/ethernet/sfc/falcon/falcon.c

448

netif_vdbg(efx, intr, efx->net_dev,

drivers/net/ethernet/sfc/falcon/farch.c

1277

netif_vdbg(channel->efx, intr, channel->efx->net_dev,

drivers/net/ethernet/sfc/falcon/farch.c

1570

netif_vdbg(efx, intr, efx->net_dev,

drivers/net/ethernet/sfc/falcon/farch.c

1591

netif_vdbg(efx, intr, efx->net_dev,

drivers/net/ethernet/sfc/siena/efx_channels.c

1281

netif_vdbg(efx, intr, efx->net_dev,

drivers/net/ethernet/sfc/siena/efx_common.h

78

netif_vdbg(channel->efx, intr, channel->efx->net_dev,

drivers/net/ethernet/sfc/siena/farch.c

1284

netif_vdbg(channel->efx, intr, channel->efx->net_dev,

drivers/net/ethernet/sfc/siena/farch.c

1584

netif_vdbg(efx, intr, efx->net_dev,

drivers/net/ethernet/sfc/siena/farch.c

1605

netif_vdbg(efx, intr, efx->net_dev,

drivers/net/ethernet/sis/sis190.c

605

netif_info(tp, intr, dev,

drivers/net/ethernet/sis/sis190.c

643

netif_info(tp, intr, dev, "no Rx buffer allocated\n");

drivers/net/ethernet/sis/sis190.c

647

netif_emerg(tp, intr, dev, "Rx buffers exhausted\n");

drivers/net/ethernet/sis/sis190.c

760

netif_info(tp, intr, dev, "link change\n");

drivers/net/ethernet/smsc/smsc911x.c

1552

SMSC_TRACE(pdata, intr, "RX Stop interrupt");

drivers/net/ethernet/smsc/smsc911x.c

1569

SMSC_TRACE(pdata, intr, "RX Error interrupt");

drivers/net/ethernet/sun/cassini.c

1102

netif_printk(cp, intr, KERN_DEBUG, cp->dev,

drivers/net/ethernet/sun/cassini.c

1489

netif_dbg(cp, intr, cp->dev, "rxmac interrupt, stat: 0x%x\n", stat);

drivers/net/ethernet/sun/cassini.c

1522

netif_printk(cp, intr, KERN_DEBUG, cp->dev,

drivers/net/ethernet/sun/cassini.c

1890

netif_printk(cp, intr, KERN_DEBUG, cp->dev,

drivers/net/ethernet/sun/cassini.c

2173

netif_printk(cp, intr, KERN_DEBUG, cp->dev,

drivers/net/ethernet/sun/cassini.c

2244

netif_printk(cp, intr, KERN_DEBUG, cp->dev,

drivers/net/ethernet/sun/cassini.c

2362

netif_printk(cp, intr, KERN_DEBUG, dev,

drivers/net/ethernet/sun/niu.c

3753

netif_printk(np, intr, KERN_DEBUG, np->dev,

drivers/net/ethernet/sun/niu.c

4152

netif_printk(np, intr, KERN_DEBUG, np->dev,

drivers/net/ethernet/sun/niu.c

4161

netif_printk(np, intr, KERN_DEBUG, np->dev,

drivers/net/ethernet/synopsys/dwc-xlgmac-net.c

269

netif_dbg(pdata, intr, pdata->netdev, "DMA_ISR=%#010x\n", dma_isr);

drivers/net/ethernet/synopsys/dwc-xlgmac-net.c

278

netif_dbg(pdata, intr, pdata->netdev, "DMA_CH%u_ISR=%#010x\n",

drivers/net/ethernet/via/via-rhine.c

1899

netif_dbg(rp, intr, dev, "Interrupt, status %08x\n", status);

drivers/net/ethernet/via/via-rhine.c

1909

netif_err(rp, intr, dev, "Something Wicked happened! %08x\n",

drivers/net/usb/r8152.c

1979

netif_info(tp, intr, tp->netdev,

drivers/net/usb/r8152.c

1984

netif_info(tp, intr, tp->netdev,

drivers/net/usb/r8152.c

1989

netif_info(tp, intr, tp->netdev, "intr status %d\n", status);

drivers/net/usb/r8152.c

2013

netif_err(tp, intr, tp->netdev,

drivers/net/usb/r8152.c

8359

struct usb_endpoint_descriptor *in, *out, *intr;

drivers/net/usb/r8152.c

8361

if (usb_find_common_endpoints(alt, &in, &out, &intr, NULL) < 0) {

drivers/net/usb/r8152.c

8379

if (usb_endpoint_num(intr) != 3) {

drivers/net/usb/usbnet.c

109

int intr = 0;

drivers/net/usb/usbnet.c

121

intr = 1;

drivers/net/usb/usbnet.c

129

if (!intr && !in)

drivers/net/usb/usbnet.c

131

else if (intr && !status)

drivers/net/vmxnet3/vmxnet3_drv.c

107

for (i = 0; i < adapter->intr.num_intrs; i++)

drivers/net/vmxnet3/vmxnet3_drv.c

2429

if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE)

drivers/net/vmxnet3/vmxnet3_drv.c

2460

if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE)

drivers/net/vmxnet3/vmxnet3_drv.c

2487

if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE)

drivers/net/vmxnet3/vmxnet3_drv.c

2488

vmxnet3_disable_intr(adapter, adapter->intr.event_intr_idx);

drivers/net/vmxnet3/vmxnet3_drv.c

2493

vmxnet3_enable_intr(adapter, adapter->intr.event_intr_idx);

drivers/net/vmxnet3/vmxnet3_drv.c

2508

if (adapter->intr.type == VMXNET3_IT_INTX) {

drivers/net/vmxnet3/vmxnet3_drv.c

2517

if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE)

drivers/net/vmxnet3/vmxnet3_drv.c

2533

switch (adapter->intr.type) {

drivers/net/vmxnet3/vmxnet3_drv.c

2554

struct vmxnet3_intr *intr = &adapter->intr;

drivers/net/vmxnet3/vmxnet3_drv.c

2559

if (adapter->intr.type == VMXNET3_IT_MSIX) {

drivers/net/vmxnet3/vmxnet3_drv.c

2565

intr->msix_entries[vector].vector,

drivers/net/vmxnet3/vmxnet3_drv.c

2604

err = request_irq(intr->msix_entries[vector].vector,

drivers/net/vmxnet3/vmxnet3_drv.c

2619

sprintf(intr->event_msi_vector_name, "%s-event-%d",

drivers/net/vmxnet3/vmxnet3_drv.c

2621

err = request_irq(intr->msix_entries[vector].vector,

drivers/net/vmxnet3/vmxnet3_drv.c

2623

intr->event_msi_vector_name, adapter->netdev);

drivers/net/vmxnet3/vmxnet3_drv.c

2624

intr->event_intr_idx = vector;

drivers/net/vmxnet3/vmxnet3_drv.c

2626

} else if (intr->type == VMXNET3_IT_MSI) {

drivers/net/vmxnet3/vmxnet3_drv.c

2639

intr->num_intrs = vector + 1;

drivers/net/vmxnet3/vmxnet3_drv.c

2643

intr->type, err);

drivers/net/vmxnet3/vmxnet3_drv.c

2654

for (i = 0; i < intr->num_intrs; i++)

drivers/net/vmxnet3/vmxnet3_drv.c

2655

intr->mod_levels[i] = UPT1_IML_ADAPTIVE;

drivers/net/vmxnet3/vmxnet3_drv.c

2656

if (adapter->intr.type != VMXNET3_IT_MSIX) {

drivers/net/vmxnet3/vmxnet3_drv.c

2657

adapter->intr.event_intr_idx = 0;

drivers/net/vmxnet3/vmxnet3_drv.c

2665

intr->type, intr->mask_mode, intr->num_intrs);

drivers/net/vmxnet3/vmxnet3_drv.c

2675

struct vmxnet3_intr *intr = &adapter->intr;

drivers/net/vmxnet3/vmxnet3_drv.c

2676

BUG_ON(intr->type == VMXNET3_IT_AUTO || intr->num_intrs <= 0);

drivers/net/vmxnet3/vmxnet3_drv.c

2678

switch (intr->type) {

drivers/net/vmxnet3/vmxnet3_drv.c

2686

free_irq(intr->msix_entries[vector++].vector,

drivers/net/vmxnet3/vmxnet3_drv.c

2694

free_irq(intr->msix_entries[vector++].vector,

drivers/net/vmxnet3/vmxnet3_drv.c

2698

free_irq(intr->msix_entries[vector].vector,

drivers/net/vmxnet3/vmxnet3_drv.c

2700

BUG_ON(vector >= intr->num_intrs);

drivers/net/vmxnet3/vmxnet3_drv.c

3020

devRead->intrConf.autoMask = adapter->intr.mask_mode ==

drivers/net/vmxnet3/vmxnet3_drv.c

3022

devRead->intrConf.numIntrs = adapter->intr.num_intrs;

drivers/net/vmxnet3/vmxnet3_drv.c

3023

for (i = 0; i < adapter->intr.num_intrs; i++)

drivers/net/vmxnet3/vmxnet3_drv.c

3024

devRead->intrConf.modLevels[i] = adapter->intr.mod_levels[i];

drivers/net/vmxnet3/vmxnet3_drv.c

3026

devRead->intrConf.eventIntrIdx = adapter->intr.event_intr_idx;

drivers/net/vmxnet3/vmxnet3_drv.c

3029

devReadExt->intrConfExt.autoMask = adapter->intr.mask_mode ==

drivers/net/vmxnet3/vmxnet3_drv.c

3031

devReadExt->intrConfExt.numIntrs = adapter->intr.num_intrs;

drivers/net/vmxnet3/vmxnet3_drv.c

3032

for (i = 0; i < adapter->intr.num_intrs; i++)

drivers/net/vmxnet3/vmxnet3_drv.c

3033

devReadExt->intrConfExt.modLevels[i] = adapter->intr.mod_levels[i];

drivers/net/vmxnet3/vmxnet3_drv.c

3035

devReadExt->intrConfExt.eventIntrIdx = adapter->intr.event_intr_idx;

drivers/net/vmxnet3/vmxnet3_drv.c

3806

adapter->intr.msix_entries, nvec, nvec);

drivers/net/vmxnet3/vmxnet3_drv.c

3814

adapter->intr.msix_entries,

drivers/net/vmxnet3/vmxnet3_drv.c

3842

adapter->intr.type = cfg & 0x3;

drivers/net/vmxnet3/vmxnet3_drv.c

3843

adapter->intr.mask_mode = (cfg >> 2) & 0x3;

drivers/net/vmxnet3/vmxnet3_drv.c

3845

if (adapter->intr.type == VMXNET3_IT_AUTO) {

drivers/net/vmxnet3/vmxnet3_drv.c

3846

adapter->intr.type = VMXNET3_IT_MSIX;

drivers/net/vmxnet3/vmxnet3_drv.c

3850

if (adapter->intr.type == VMXNET3_IT_MSIX) {

drivers/net/vmxnet3/vmxnet3_drv.c

3862

adapter->intr.msix_entries[i].entry = i;

drivers/net/vmxnet3/vmxnet3_drv.c

3882

adapter->intr.num_intrs = nvec_allocated;

drivers/net/vmxnet3/vmxnet3_drv.c

3891

adapter->intr.type = VMXNET3_IT_MSI;

drivers/net/vmxnet3/vmxnet3_drv.c

3894

if (adapter->intr.type == VMXNET3_IT_MSI) {

drivers/net/vmxnet3/vmxnet3_drv.c

3897

adapter->intr.num_intrs = 1;

drivers/net/vmxnet3/vmxnet3_drv.c

3906

adapter->intr.type = VMXNET3_IT_INTX;

drivers/net/vmxnet3/vmxnet3_drv.c

3909

adapter->intr.num_intrs = 1;

drivers/net/vmxnet3/vmxnet3_drv.c

3916

if (adapter->intr.type == VMXNET3_IT_MSIX)

drivers/net/vmxnet3/vmxnet3_drv.c

3918

else if (adapter->intr.type == VMXNET3_IT_MSI)

drivers/net/vmxnet3/vmxnet3_drv.c

3921

BUG_ON(adapter->intr.type != VMXNET3_IT_INTX);

drivers/net/vmxnet3/vmxnet3_drv.c

4228

adapter->intr.type == VMXNET3_IT_MSIX) {

drivers/net/vmxnet3/vmxnet3_drv.c

4255

if (adapter->intr.type == VMXNET3_IT_MSIX) {

drivers/net/vmxnet3/vmxnet3_drv.c

81

for (i = 0; i < adapter->intr.num_intrs; i++)

drivers/net/vmxnet3/vmxnet3_ethtool.c

1286

if (IS_ENABLED(CONFIG_PCI_MSI) && adapter->intr.type == VMXNET3_IT_MSIX) {

drivers/net/vmxnet3/vmxnet3_ethtool.c

215

(1 + adapter->intr.num_intrs) +

drivers/net/vmxnet3/vmxnet3_ethtool.c

542

buf[j++] = adapter->intr.num_intrs;

drivers/net/vmxnet3/vmxnet3_ethtool.c

543

for (i = 0; i < adapter->intr.num_intrs; i++) {

drivers/net/vmxnet3/vmxnet3_int.h

384

struct vmxnet3_intr intr;

drivers/net/wireless/ath/ath9k/ar9003_mci.c

349

u32 intr;

drivers/net/wireless/ath/ath9k/ar9003_mci.c

351

intr = REG_READ(ah, AR_MCI_INTERRUPT_RX_MSG_RAW);

drivers/net/wireless/ath/ath9k/ar9003_mci.c

352

return ((intr & ints) == ints);

drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c

2371

if (!bus->intr) {

drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c

3663

if (!bus->intr)

drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c

3683

if (!bus->intr ||

drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c

4084

bus->intr = true;

drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c

478

bool intr; /* Use interrupts */

drivers/net/wireless/mediatek/mt76/mt76.h

708

int (*parse_irq)(struct mt76_dev *dev, struct mt76s_intr *intr);

drivers/net/wireless/mediatek/mt76/mt7603/core.c

16

u32 intr;

drivers/net/wireless/mediatek/mt76/mt7603/core.c

18

intr = mt76_rr(dev, MT_INT_SOURCE_CSR);

drivers/net/wireless/mediatek/mt76/mt7603/core.c

19

mt76_wr(dev, MT_INT_SOURCE_CSR, intr);

drivers/net/wireless/mediatek/mt76/mt7603/core.c

24

trace_dev_irq(&dev->mt76, intr, dev->mt76.mmio.irqmask);

drivers/net/wireless/mediatek/mt76/mt7603/core.c

26

intr &= dev->mt76.mmio.irqmask;

drivers/net/wireless/mediatek/mt76/mt7603/core.c

28

if (intr & MT_INT_MAC_IRQ3) {

drivers/net/wireless/mediatek/mt76/mt7603/core.c

39

if (intr & MT_INT_TX_DONE_ALL) {

drivers/net/wireless/mediatek/mt76/mt7603/core.c

44

if (intr & MT_INT_RX_DONE(0)) {

drivers/net/wireless/mediatek/mt76/mt7603/core.c

50

if (intr & MT_INT_RX_DONE(1)) {

drivers/net/wireless/mediatek/mt76/mt7615/mmio.c

100

mask |= intr & MT_INT_RX_DONE_ALL;

drivers/net/wireless/mediatek/mt76/mt7615/mmio.c

101

if (intr & tx_mcu_mask)

drivers/net/wireless/mediatek/mt76/mt7615/mmio.c

105

if (intr & tx_mcu_mask)

drivers/net/wireless/mediatek/mt76/mt7615/mmio.c

108

if (intr & MT_INT_RX_DONE(0))

drivers/net/wireless/mediatek/mt76/mt7615/mmio.c

111

if (intr & MT_INT_RX_DONE(1))

drivers/net/wireless/mediatek/mt76/mt7615/mmio.c

114

if (!(intr & (MT_INT_MCU_CMD | MT7663_INT_MCU_CMD)))

drivers/net/wireless/mediatek/mt76/mt7615/mmio.c

89

u32 intr, mask = 0, tx_mcu_mask = mt7615_tx_mcu_int_mask(dev);

drivers/net/wireless/mediatek/mt76/mt7615/mmio.c

94

intr = mt76_rr(dev, MT_INT_SOURCE_CSR);

drivers/net/wireless/mediatek/mt76/mt7615/mmio.c

95

intr &= dev->mt76.mmio.irqmask;

drivers/net/wireless/mediatek/mt76/mt7615/mmio.c

96

mt76_wr(dev, MT_INT_SOURCE_CSR, intr);

drivers/net/wireless/mediatek/mt76/mt7615/mmio.c

98

trace_dev_irq(&dev->mt76, intr, dev->mt76.mmio.irqmask);

drivers/net/wireless/mediatek/mt76/mt7615/sdio.c

53

static int mt7663s_parse_intr(struct mt76_dev *dev, struct mt76s_intr *intr)

drivers/net/wireless/mediatek/mt76/mt7615/sdio.c

66

intr->isr = irq_data->isr;

drivers/net/wireless/mediatek/mt76/mt7615/sdio.c

67

intr->rec_mb = irq_data->rec_mb;

drivers/net/wireless/mediatek/mt76/mt7615/sdio.c

68

intr->tx.wtqcr = irq_data->tx.wtqcr;

drivers/net/wireless/mediatek/mt76/mt7615/sdio.c

69

intr->rx.num = irq_data->rx.num;

drivers/net/wireless/mediatek/mt76/mt7615/sdio.c

71

intr->rx.len[i] = irq_data->rx.len[i];

drivers/net/wireless/mediatek/mt76/mt76x02_mmio.c

261

u32 intr, mask;

drivers/net/wireless/mediatek/mt76/mt76x02_mmio.c

263

intr = mt76_rr(dev, MT_INT_SOURCE_CSR);

drivers/net/wireless/mediatek/mt76/mt76x02_mmio.c

264

intr &= dev->mt76.mmio.irqmask;

drivers/net/wireless/mediatek/mt76/mt76x02_mmio.c

265

mt76_wr(dev, MT_INT_SOURCE_CSR, intr);

drivers/net/wireless/mediatek/mt76/mt76x02_mmio.c

270

trace_dev_irq(&dev->mt76, intr, dev->mt76.mmio.irqmask);

drivers/net/wireless/mediatek/mt76/mt76x02_mmio.c

272

mask = intr & (MT_INT_RX_DONE_ALL | MT_INT_GPTIMER);

drivers/net/wireless/mediatek/mt76/mt76x02_mmio.c

273

if (intr & (MT_INT_TX_DONE_ALL | MT_INT_TX_STAT))

drivers/net/wireless/mediatek/mt76/mt76x02_mmio.c

278

if (intr & MT_INT_RX_DONE(0))

drivers/net/wireless/mediatek/mt76/mt76x02_mmio.c

281

if (intr & MT_INT_RX_DONE(1))

drivers/net/wireless/mediatek/mt76/mt76x02_mmio.c

284

if (intr & MT_INT_PRE_TBTT)

drivers/net/wireless/mediatek/mt76/mt76x02_mmio.c

288

if (intr & MT_INT_TBTT) {

drivers/net/wireless/mediatek/mt76/mt76x02_mmio.c

295

if (intr & MT_INT_TX_STAT)

drivers/net/wireless/mediatek/mt76/mt76x02_mmio.c

298

if (intr & (MT_INT_TX_STAT | MT_INT_TX_DONE_ALL))

drivers/net/wireless/mediatek/mt76/mt76x02_mmio.c

301

if (intr & MT_INT_GPTIMER)

drivers/net/wireless/mediatek/mt76/mt7915/mmio.c

830

u32 intr, intr1, mask;

drivers/net/wireless/mediatek/mt76/mt7915/mmio.c

836

intr = mtk_wed_device_irq_get(wed, dev->mt76.mmio.irqmask);

drivers/net/wireless/mediatek/mt76/mt7915/mmio.c

842

intr = mt76_rr(dev, MT_INT_SOURCE_CSR);

drivers/net/wireless/mediatek/mt76/mt7915/mmio.c

843

intr &= dev->mt76.mmio.irqmask;

drivers/net/wireless/mediatek/mt76/mt7915/mmio.c

844

mt76_wr(dev, MT_INT_SOURCE_CSR, intr);

drivers/net/wireless/mediatek/mt76/mt7915/mmio.c

852

intr |= intr1;

drivers/net/wireless/mediatek/mt76/mt7915/mmio.c

855

trace_dev_irq(&dev->mt76, intr, dev->mt76.mmio.irqmask);

drivers/net/wireless/mediatek/mt76/mt7915/mmio.c

857

mask = intr & MT_INT_RX_DONE_ALL;

drivers/net/wireless/mediatek/mt76/mt7915/mmio.c

858

if (intr & MT_INT_TX_DONE_MCU)

drivers/net/wireless/mediatek/mt76/mt7915/mmio.c

863

if (intr & MT_INT_TX_DONE_MCU)

drivers/net/wireless/mediatek/mt76/mt7915/mmio.c

866

if (intr & MT_INT_RX(MT_RXQ_MAIN))

drivers/net/wireless/mediatek/mt76/mt7915/mmio.c

869

if (intr & MT_INT_RX(MT_RXQ_BAND1))

drivers/net/wireless/mediatek/mt76/mt7915/mmio.c

872

if (intr & MT_INT_RX(MT_RXQ_MCU))

drivers/net/wireless/mediatek/mt76/mt7915/mmio.c

875

if (intr & MT_INT_RX(MT_RXQ_MCU_WA))

drivers/net/wireless/mediatek/mt76/mt7915/mmio.c

879

(intr & MT_INT_RX(MT_RXQ_MAIN_WA)))

drivers/net/wireless/mediatek/mt76/mt7915/mmio.c

882

if (intr & MT_INT_RX(MT_RXQ_BAND1_WA))

drivers/net/wireless/mediatek/mt76/mt7915/mmio.c

885

if (intr & MT_INT_MCU_CMD) {

drivers/net/wireless/mediatek/mt76/mt7921/sdio.c

57

static int mt7921s_parse_intr(struct mt76_dev *dev, struct mt76s_intr *intr)

drivers/net/wireless/mediatek/mt76/mt7921/sdio.c

74

intr->isr = irq_data->isr;

drivers/net/wireless/mediatek/mt76/mt7921/sdio.c

75

intr->rec_mb = irq_data->rec_mb;

drivers/net/wireless/mediatek/mt76/mt7921/sdio.c

76

intr->tx.wtqcr = irq_data->tx.wtqcr;

drivers/net/wireless/mediatek/mt76/mt7921/sdio.c

77

intr->rx.num = irq_data->rx.num;

drivers/net/wireless/mediatek/mt76/mt7921/sdio.c

80

intr->rx.len[0] = irq_data->rx.len0;

drivers/net/wireless/mediatek/mt76/mt7921/sdio.c

82

intr->rx.len[1] = irq_data->rx.len1;

drivers/net/wireless/mediatek/mt76/mt792x_dma.c

32

u32 intr, mask = 0;

drivers/net/wireless/mediatek/mt76/mt792x_dma.c

36

intr = mt76_rr(dev, MT_WFDMA0_HOST_INT_STA);

drivers/net/wireless/mediatek/mt76/mt792x_dma.c

37

intr &= dev->mt76.mmio.irqmask;

drivers/net/wireless/mediatek/mt76/mt792x_dma.c

38

mt76_wr(dev, MT_WFDMA0_HOST_INT_STA, intr);

drivers/net/wireless/mediatek/mt76/mt792x_dma.c

40

trace_dev_irq(&dev->mt76, intr, dev->mt76.mmio.irqmask);

drivers/net/wireless/mediatek/mt76/mt792x_dma.c

42

mask |= intr & (irq_map->rx.data_complete_mask |

drivers/net/wireless/mediatek/mt76/mt792x_dma.c

45

if (intr & dev->irq_map->tx.mcu_complete_mask)

drivers/net/wireless/mediatek/mt76/mt792x_dma.c

48

if (intr & MT_INT_MCU_CMD) {

drivers/net/wireless/mediatek/mt76/mt792x_dma.c

56

intr |= irq_map->rx.data_complete_mask;

drivers/net/wireless/mediatek/mt76/mt792x_dma.c

62

if (intr & dev->irq_map->tx.all_complete_mask)

drivers/net/wireless/mediatek/mt76/mt792x_dma.c

65

if (intr & irq_map->rx.wm_complete_mask)

drivers/net/wireless/mediatek/mt76/mt792x_dma.c

68

if (intr & irq_map->rx.wm2_complete_mask)

drivers/net/wireless/mediatek/mt76/mt792x_dma.c

71

if (intr & irq_map->rx.data_complete_mask)

drivers/net/wireless/mediatek/mt76/mt7996/dma.c

481

u32 intr = is_mt7996(&dev->mt76) ?

drivers/net/wireless/mediatek/mt76/mt7996/dma.c

487

intr);

drivers/net/wireless/mediatek/mt76/mt7996/mmio.c

730

u32 i, intr, mask, intr1 = 0;

drivers/net/wireless/mediatek/mt76/mt7996/mmio.c

748

intr = mtk_wed_device_irq_get(wed, dev->mt76.mmio.irqmask);

drivers/net/wireless/mediatek/mt76/mt7996/mmio.c

749

intr |= (intr1 & ~MT_INT_TX_RX_DONE_EXT);

drivers/net/wireless/mediatek/mt76/mt7996/mmio.c

755

intr = mt76_rr(dev, MT_INT_SOURCE_CSR);

drivers/net/wireless/mediatek/mt76/mt7996/mmio.c

756

intr &= dev->mt76.mmio.irqmask;

drivers/net/wireless/mediatek/mt76/mt7996/mmio.c

757

mt76_wr(dev, MT_INT_SOURCE_CSR, intr);

drivers/net/wireless/mediatek/mt76/mt7996/mmio.c

762

intr |= intr1;

drivers/net/wireless/mediatek/mt76/mt7996/mmio.c

766

trace_dev_irq(&dev->mt76, intr, dev->mt76.mmio.irqmask);

drivers/net/wireless/mediatek/mt76/mt7996/mmio.c

768

mask = intr & MT_INT_RX_DONE_ALL;

drivers/net/wireless/mediatek/mt76/mt7996/mmio.c

769

if (intr & MT_INT_TX_DONE_MCU)

drivers/net/wireless/mediatek/mt76/mt7996/mmio.c

773

if (intr & MT_INT_TX_DONE_MCU)

drivers/net/wireless/mediatek/mt76/mt7996/mmio.c

777

if ((intr & MT_INT_RX(i)))

drivers/net/wireless/mediatek/mt76/mt7996/mmio.c

781

if (intr & MT_INT_MCU_CMD) {

drivers/net/wireless/mediatek/mt76/sdio_txrx.c

123

while (i < intr->rx.num[qid] && buf < end) {

drivers/net/wireless/mediatek/mt76/sdio_txrx.c

157

struct mt76s_intr intr;

drivers/net/wireless/mediatek/mt76/sdio_txrx.c

160

ret = sdio->parse_irq(dev, &intr);

drivers/net/wireless/mediatek/mt76/sdio_txrx.c

164

trace_dev_irq(dev, intr.isr, 0);

drivers/net/wireless/mediatek/mt76/sdio_txrx.c

166

if (intr.isr & WHIER_RX0_DONE_INT_EN) {

drivers/net/wireless/mediatek/mt76/sdio_txrx.c

167

ret = mt76s_rx_run_queue(dev, 0, &intr);

drivers/net/wireless/mediatek/mt76/sdio_txrx.c

174

if (intr.isr & WHIER_RX1_DONE_INT_EN) {

drivers/net/wireless/mediatek/mt76/sdio_txrx.c

175

ret = mt76s_rx_run_queue(dev, 1, &intr);

drivers/net/wireless/mediatek/mt76/sdio_txrx.c

182

nframes += !!mt76s_refill_sched_quota(dev, intr.tx.wtqcr);

drivers/net/wireless/mediatek/mt76/sdio_txrx.c

86

struct mt76s_intr *intr)

drivers/net/wireless/mediatek/mt76/sdio_txrx.c

94

for (i = 0; i < intr->rx.num[qid]; i++)

drivers/net/wireless/mediatek/mt76/sdio_txrx.c

95

len += round_up(intr->rx.len[qid][i] + 4, 4);

drivers/net/wireless/ti/wl1251/cmd.c

26

u32 intr;

drivers/net/wireless/ti/wl1251/cmd.c

41

intr = wl1251_reg_read32(wl, ACX_REG_INTERRUPT_NO_CLEAR);

drivers/net/wireless/ti/wl1251/cmd.c

42

while (!(intr & WL1251_ACX_INTR_CMD_COMPLETE)) {

drivers/net/wireless/ti/wl1251/cmd.c

51

intr = wl1251_reg_read32(wl, ACX_REG_INTERRUPT_NO_CLEAR);

drivers/net/wireless/ti/wl1251/main.c

199

u32 intr, ctr = WL1251_IRQ_LOOP_COUNT;

drivers/net/wireless/ti/wl1251/main.c

217

intr = wl1251_reg_read32(wl, ACX_REG_INTERRUPT_CLEAR);

drivers/net/wireless/ti/wl1251/main.c

218

wl1251_debug(DEBUG_IRQ, "intr: 0x%x", intr);

drivers/net/wireless/ti/wl1251/main.c

230

intr &= ~WL1251_ACX_INTR_RX0_DATA;

drivers/net/wireless/ti/wl1251/main.c

231

intr &= ~WL1251_ACX_INTR_RX1_DATA;

drivers/net/wireless/ti/wl1251/main.c

235

intr |= WL1251_ACX_INTR_RX0_DATA;

drivers/net/wireless/ti/wl1251/main.c

236

intr &= ~WL1251_ACX_INTR_RX1_DATA;

drivers/net/wireless/ti/wl1251/main.c

240

intr |= WL1251_ACX_INTR_RX0_DATA;

drivers/net/wireless/ti/wl1251/main.c

241

intr |= WL1251_ACX_INTR_RX1_DATA;

drivers/net/wireless/ti/wl1251/main.c

256

intr &= wl->intr_mask;

drivers/net/wireless/ti/wl1251/main.c

258

if (intr == 0) {

drivers/net/wireless/ti/wl1251/main.c

263

if (intr & WL1251_ACX_INTR_RX0_DATA) {

drivers/net/wireless/ti/wl1251/main.c

268

if (intr & WL1251_ACX_INTR_RX1_DATA) {

drivers/net/wireless/ti/wl1251/main.c

273

if (intr & WL1251_ACX_INTR_TX_RESULT) {

drivers/net/wireless/ti/wl1251/main.c

278

if (intr & WL1251_ACX_INTR_EVENT_A) {

drivers/net/wireless/ti/wl1251/main.c

283

if (intr & WL1251_ACX_INTR_EVENT_B) {

drivers/net/wireless/ti/wl1251/main.c

288

if (intr & WL1251_ACX_INTR_INIT_COMPLETE)

drivers/net/wireless/ti/wl1251/main.c

295

intr = wl1251_reg_read32(wl, ACX_REG_INTERRUPT_CLEAR);

drivers/net/wireless/ti/wl1251/main.c

296

} while (intr);

drivers/net/wireless/ti/wl12xx/main.c

1430

fw_status->intr = le32_to_cpu(int_fw_status->intr);

drivers/net/wireless/ti/wl12xx/wl12xx.h

117

__le32 intr;

drivers/net/wireless/ti/wl18xx/main.c

1186

fw_status->intr = le32_to_cpu(int_fw_status->intr);

drivers/net/wireless/ti/wl18xx/main.c

1226

fw_status->intr = le32_to_cpu(int_fw_status->intr);

drivers/net/wireless/ti/wl18xx/wl18xx.h

123

__le32 intr;

drivers/net/wireless/ti/wl18xx/wl18xx.h

183

__le32 intr;

drivers/net/wireless/ti/wlcore/boot.c

433

u32 chip_id, intr;

drivers/net/wireless/ti/wlcore/boot.c

459

ret = wlcore_read_reg(wl, REG_INTERRUPT_NO_CLEAR, &intr);

drivers/net/wireless/ti/wlcore/boot.c

463

if (intr == 0xffffffff) {

drivers/net/wireless/ti/wlcore/boot.c

469

else if (intr & WL1271_ACX_INTR_INIT_COMPLETE) {

drivers/net/wireless/ti/wlcore/cmd.c

45

u32 intr;

drivers/net/wireless/ti/wlcore/cmd.c

78

ret = wlcore_read_reg(wl, REG_INTERRUPT_NO_CLEAR, &intr);

drivers/net/wireless/ti/wlcore/cmd.c

82

while (!(intr & WL1271_ACX_INTR_CMD_COMPLETE)) {

drivers/net/wireless/ti/wlcore/cmd.c

94

ret = wlcore_read_reg(wl, REG_INTERRUPT_NO_CLEAR, &intr);

drivers/net/wireless/ti/wlcore/main.c

399

status->intr,

drivers/net/wireless/ti/wlcore/main.c

592

u32 intr;

drivers/net/wireless/ti/wlcore/main.c

624

intr = wl->fw_status->intr;

drivers/net/wireless/ti/wlcore/main.c

625

intr &= WLCORE_ALL_INTR_MASK;

drivers/net/wireless/ti/wlcore/main.c

626

if (!intr) {

drivers/net/wireless/ti/wlcore/main.c

631

if (unlikely(intr & WL1271_ACX_INTR_WATCHDOG)) {

drivers/net/wireless/ti/wlcore/main.c

640

if (unlikely(intr & WL1271_ACX_SW_INTR_WATCHDOG)) {

drivers/net/wireless/ti/wlcore/main.c

650

if (likely(intr & WL1271_ACX_INTR_DATA)) {

drivers/net/wireless/ti/wlcore/main.c

688

if (intr & WL1271_ACX_INTR_EVENT_A) {

drivers/net/wireless/ti/wlcore/main.c

695

if (intr & WL1271_ACX_INTR_EVENT_B) {

drivers/net/wireless/ti/wlcore/main.c

702

if (intr & WL1271_ACX_INTR_INIT_COMPLETE)

drivers/net/wireless/ti/wlcore/main.c

706

if (intr & WL1271_ACX_INTR_HW_AVAILABLE)

drivers/net/wireless/ti/wlcore/wlcore_i.h

115

u32 intr;

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

1159

struct zd_usb_interrupt *intr = &usb->intr;

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

1161

spin_lock_init(&intr->lock);

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

1162

intr->interval = int_urb_interval(zd_usb_to_usbdev(usb));

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

1163

init_completion(&intr->read_regs.completion);

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

1164

atomic_set(&intr->read_regs_enabled, 0);

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

1165

intr->read_regs.cr_int_addr = cpu_to_le16((u16)CR_INTERRUPT);

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

1603

struct zd_usb_interrupt *intr = &usb->intr;

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

1605

spin_lock_irq(&intr->lock);

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

1606

atomic_set(&intr->read_regs_enabled, 1);

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

1607

intr->read_regs.req = req;

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

1608

intr->read_regs.req_count = count;

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

1609

reinit_completion(&intr->read_regs.completion);

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

1610

spin_unlock_irq(&intr->lock);

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

1615

struct zd_usb_interrupt *intr = &usb->intr;

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

1617

spin_lock_irq(&intr->lock);

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

1618

atomic_set(&intr->read_regs_enabled, 0);

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

1619

spin_unlock_irq(&intr->lock);

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

1626

struct zd_usb_interrupt *intr = &usb->intr;

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

1627

struct read_regs_int *rr = &intr->read_regs;

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

1667

struct zd_usb_interrupt *intr = &usb->intr;

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

1668

struct read_regs_int *rr = &intr->read_regs;

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

1671

spin_lock_irq(&intr->lock);

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

1676

*retry = !!intr->read_regs_int_overridden;

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

1692

spin_unlock_irq(&intr->lock);

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

1752

time_left = wait_for_completion_timeout(&usb->intr.read_regs.completion,

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

360

struct zd_usb_interrupt *intr = &usb->intr;

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

363

spin_lock_irqsave(&intr->lock, flags);

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

364

if (atomic_read(&intr->read_regs_enabled)) {

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

365

atomic_set(&intr->read_regs_enabled, 0);

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

366

intr->read_regs_int_overridden = 1;

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

367

complete(&intr->read_regs.completion);

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

369

spin_unlock_irqrestore(&intr->lock, flags);

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

375

struct zd_usb_interrupt *intr = &usb->intr;

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

380

spin_lock_irqsave(&intr->lock, flags);

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

390

} else if (atomic_read(&intr->read_regs_enabled)) {

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

392

intr->read_regs.length = urb->actual_length;

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

393

if (len > sizeof(intr->read_regs.buffer))

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

394

len = sizeof(intr->read_regs.buffer);

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

396

memcpy(intr->read_regs.buffer, urb->transfer_buffer, len);

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

404

if (!check_read_regs(usb, intr->read_regs.req,

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

405

intr->read_regs.req_count))

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

408

atomic_set(&intr->read_regs_enabled, 0);

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

409

intr->read_regs_int_overridden = 0;

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

410

complete(&intr->read_regs.completion);

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

416

spin_unlock_irqrestore(&intr->lock, flags);

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

420

atomic_read(&intr->read_regs_enabled))

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

429

struct zd_usb_interrupt *intr;

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

462

intr = &usb->intr;

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

463

if (hdr->id != USB_INT_ID_REGS && atomic_read(&intr->read_regs_enabled))

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

505

struct zd_usb_interrupt *intr = &usb->intr;

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

508

spin_lock_irqsave(&intr->lock, flags);

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

509

urb = intr->urb;

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

510

spin_unlock_irqrestore(&intr->lock, flags);

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

518

struct zd_usb_interrupt *intr = &usb->intr;

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

530

spin_lock_irq(&intr->lock);

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

531

if (intr->urb) {

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

532

spin_unlock_irq(&intr->lock);

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

536

intr->urb = urb;

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

537

spin_unlock_irq(&intr->lock);

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

540

intr->buffer = usb_alloc_coherent(udev, USB_MAX_EP_INT_BUFFER,

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

541

GFP_KERNEL, &intr->buffer_dma);

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

542

if (!intr->buffer) {

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

549

intr->buffer, USB_MAX_EP_INT_BUFFER,

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

551

intr->interval);

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

552

urb->transfer_dma = intr->buffer_dma;

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

555

dev_dbg_f(zd_usb_dev(usb), "submit urb %p\n", intr->urb);

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

566

intr->buffer, intr->buffer_dma);

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

568

spin_lock_irq(&intr->lock);

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

569

intr->urb = NULL;

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

570

spin_unlock_irq(&intr->lock);

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

581

struct zd_usb_interrupt *intr = &usb->intr;

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

586

spin_lock_irqsave(&intr->lock, flags);

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

587

urb = intr->urb;

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

589

spin_unlock_irqrestore(&intr->lock, flags);

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

592

intr->urb = NULL;

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

593

buffer = intr->buffer;

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

594

buffer_dma = intr->buffer_dma;

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

595

intr->buffer = NULL;

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

596

spin_unlock_irqrestore(&intr->lock, flags);

drivers/net/wireless/zydas/zd1211rw/zd_usb.h

165

static inline struct usb_int_regs *get_read_regs(struct zd_usb_interrupt *intr)

drivers/net/wireless/zydas/zd1211rw/zd_usb.h

167

return (struct usb_int_regs *)intr->read_regs.buffer;

drivers/net/wireless/zydas/zd1211rw/zd_usb.h

207

struct zd_usb_interrupt intr;

drivers/pci/hotplug/octep_hp.c

243

static enum octep_hp_intr_type octep_hp_intr_type(struct octep_hp_intr_info *intr,

drivers/pci/hotplug/octep_hp.c

249

if (intr[type].number == irq)

drivers/pci/hotplug/octep_hp.c

264

type = octep_hp_intr_type(hp_ctrl->intr, irq);

drivers/pci/hotplug/octep_hp.c

302

struct octep_hp_intr_info *intr;

drivers/pci/hotplug/octep_hp.c

309

intr = &hp_ctrl->intr[type];

drivers/pci/hotplug/octep_hp.c

310

intr->number = irq;

drivers/pci/hotplug/octep_hp.c

311

intr->type = type;

drivers/pci/hotplug/octep_hp.c

312

snprintf(intr->name, sizeof(intr->name), "octep_hp_%d", type);

drivers/pci/hotplug/octep_hp.c

315

IRQF_SHARED, intr->name, hp_ctrl);

drivers/pci/hotplug/octep_hp.c

61

struct octep_hp_intr_info intr[OCTEP_HP_INTR_MAX];

drivers/pcmcia/i82365.c

150

u_char cs_irq, intr;

drivers/pcmcia/i82365.c

443

i365_bflip(s, I365_INTCTL, I365_INTR_ENA, t->intr);

drivers/pcmcia/i82365.c

935

reg = t->intr;

drivers/pcmcia/yenta_socket.c

342

u8 intr;

drivers/pcmcia/yenta_socket.c

346

intr = exca_readb(socket, I365_INTCTL);

drivers/pcmcia/yenta_socket.c

347

intr = (intr & ~0xf);

drivers/pcmcia/yenta_socket.c

349

intr |= socket->cb_irq ? socket->cb_irq : state->io_irq;

drivers/pcmcia/yenta_socket.c

352

exca_writeb(socket, I365_INTCTL, intr);

drivers/perf/hisilicon/hns3_pmu.c

322

#define FILTER_CONDITION_FUNC_INTR(func, intr) (((intr) << 8) | (func))

drivers/perf/hisilicon/hns3_pmu.c

338

HNS3_PMU_FILTER_ATTR(intr, config1, 40, 51);

drivers/perf/hisilicon/hns3_pmu.c

659

HNS3_PMU_FORMAT_ATTR(intr, "config1:40-51"),

drivers/phy/mediatek/phy-mtk-tphy.c

1143

&instance->intr);

drivers/phy/mediatek/phy-mtk-tphy.c

1151

instance->intr, instance->discth);

drivers/phy/mediatek/phy-mtk-tphy.c

1176

if (instance->intr) {

drivers/phy/mediatek/phy-mtk-tphy.c

1182

instance->intr);

drivers/phy/mediatek/phy-mtk-tphy.c

332

int intr;

drivers/ptp/ptp_ocp.c

122

u32 intr;

drivers/ptp/ptp_ocp.c

204

u32 intr;

drivers/ptp/ptp_ocp.c

2050

iowrite32(0, &reg->intr); /* ack interrupt */

drivers/ptp/ptp_ocp.c

2151

iowrite32(0, &reg->intr); /* clear interrupt state */

drivers/ptp/ptp_ocp.c

2189

iowrite32(1, &reg->intr); /* write 1 to ack */

drivers/ptp/ptp_ocp.c

2217

iowrite32(1, &reg->intr);

drivers/rapidio/devices/tsi721.c

583

u32 intr;

drivers/rapidio/devices/tsi721.c

597

intr = TSI721_INT_SR2PC_CHAN(IDB_QUEUE) |

drivers/rapidio/devices/tsi721.c

601

intr = TSI721_INT_SR2PC_CHAN(IDB_QUEUE);

drivers/rapidio/devices/tsi721.c

603

iowrite32(intr, priv->regs + TSI721_DEV_CHAN_INTE);

drivers/rapidio/devices/tsi721.c

606

intr = TSI721_DEV_INT_SRIO;

drivers/rapidio/devices/tsi721.c

608

intr = TSI721_DEV_INT_SR2PC_CH | TSI721_DEV_INT_SRIO |

drivers/rapidio/devices/tsi721.c

611

iowrite32(intr, priv->regs + TSI721_DEV_INTE);

drivers/rtc/rtc-imxdi.c

442

static void di_int_enable(struct imxdi_dev *imxdi, u32 intr)

drivers/rtc/rtc-imxdi.c

447

writel(readl(imxdi->ioaddr + DIER) | intr,

drivers/rtc/rtc-imxdi.c

455

static void di_int_disable(struct imxdi_dev *imxdi, u32 intr)

drivers/rtc/rtc-imxdi.c

460

writel(readl(imxdi->ioaddr + DIER) & ~intr,

drivers/sbus/char/uctrl.c

263

int stat, incnt, outcnt, bytecnt, intr;

drivers/sbus/char/uctrl.c

267

intr = sbus_readl(&driver->regs->uctrl_intr);

drivers/sbus/char/uctrl.c

270

dprintk(("interrupt stat 0x%x int 0x%x\n", stat, intr));

drivers/scsi/aha152x.c

637

static irqreturn_t intr(int irq, void *dev_id);

drivers/scsi/aha152x.c

843

if (request_irq(shpnt->irq, intr, IRQF_SHARED, "aha152x", shpnt)) {

drivers/scsi/aha1740.c

133

intr:1, /* Interrupt issued */

drivers/scsi/bfa/bfa_core.c

765

u32 intr, qintr;

drivers/scsi/bfa/bfa_core.c

768

intr = readl(bfa->iocfc.bfa_regs.intr_status);

drivers/scsi/bfa/bfa_core.c

769

if (!intr)

drivers/scsi/bfa/bfa_core.c

775

qintr = intr & __HFN_INT_RME_MASK;

drivers/scsi/bfa/bfa_core.c

781

intr &= ~qintr;

drivers/scsi/bfa/bfa_core.c

782

if (!intr)

drivers/scsi/bfa/bfa_core.c

788

qintr = intr & __HFN_INT_CPE_MASK;

drivers/scsi/bfa/bfa_core.c

793

intr &= ~qintr;

drivers/scsi/bfa/bfa_core.c

794

if (!intr)

drivers/scsi/bfa/bfa_core.c

797

bfa_msix_lpu_err(bfa, intr);

drivers/scsi/bfa/bfa_core.c

803

u32 intr, qintr;

drivers/scsi/bfa/bfa_core.c

807

intr = readl(bfa->iocfc.bfa_regs.intr_status);

drivers/scsi/bfa/bfa_core.c

809

qintr = intr & (__HFN_INT_RME_MASK | __HFN_INT_CPE_MASK);

drivers/scsi/bfa/bfa_core.c

822

if (!intr)

drivers/scsi/bfa/bfa_core.c

828

qintr = intr & __HFN_INT_CPE_MASK;

drivers/scsi/bfa/bfa_core.c

833

intr &= ~qintr;

drivers/scsi/bfa/bfa_core.c

834

if (!intr)

drivers/scsi/bfa/bfa_core.c

838

bfa_msix_lpu_err(bfa, intr);

drivers/scsi/bfa/bfa_core.c

908

u32 intr, curr_value;

drivers/scsi/bfa/bfa_core.c

911

intr = readl(bfa->iocfc.bfa_regs.intr_status);

drivers/scsi/bfa/bfa_core.c

914

halt_isr = intr & __HFN_INT_CPQ_HALT_CT2;

drivers/scsi/bfa/bfa_core.c

915

pss_isr = intr & __HFN_INT_ERR_PSS_CT2;

drivers/scsi/bfa/bfa_core.c

916

lpu_isr = intr & (__HFN_INT_MBOX_LPU0_CT2 |

drivers/scsi/bfa/bfa_core.c

918

intr &= __HFN_INT_ERR_MASK_CT2;

drivers/scsi/bfa/bfa_core.c

921

(intr & __HFN_INT_LL_HALT) : 0;

drivers/scsi/bfa/bfa_core.c

922

pss_isr = intr & __HFN_INT_ERR_PSS;

drivers/scsi/bfa/bfa_core.c

923

lpu_isr = intr & (__HFN_INT_MBOX_LPU0 | __HFN_INT_MBOX_LPU1);

drivers/scsi/bfa/bfa_core.c

924

intr &= __HFN_INT_ERR_MASK;

drivers/scsi/bfa/bfa_core.c

930

if (intr) {

drivers/scsi/bfa/bfa_core.c

954

writel(intr, bfa->iocfc.bfa_regs.intr_status);

drivers/scsi/bfa/bfa_defs_svc.h

209

u32 intr;

drivers/scsi/fnic/fnic.h

479

____cacheline_aligned struct vnic_intr intr[FNIC_MSIX_INTR_MAX];

drivers/scsi/fnic/fnic_isr.c

106

vnic_intr_return_credits(&fnic->intr[FNIC_MSIX_WQ],

drivers/scsi/fnic/fnic_isr.c

132

vnic_intr_return_credits(&fnic->intr[i],

drivers/scsi/fnic/fnic_isr.c

146

vnic_intr_return_all_credits(&fnic->intr[fnic->err_intr_offset]);

drivers/scsi/fnic/fnic_isr.c

32

vnic_intr_return_all_credits(&fnic->intr[FNIC_INTX_NOTIFY]);

drivers/scsi/fnic/fnic_isr.c

37

vnic_intr_return_all_credits(&fnic->intr[FNIC_INTX_ERR]);

drivers/scsi/fnic/fnic_isr.c

43

vnic_intr_return_all_credits(&fnic->intr[FNIC_INTX_DUMMY]);

drivers/scsi/fnic/fnic_isr.c

51

vnic_intr_return_credits(&fnic->intr[FNIC_INTX_WQ_RQ_COPYWQ],

drivers/scsi/fnic/fnic_isr.c

72

vnic_intr_return_credits(&fnic->intr[0],

drivers/scsi/fnic/fnic_isr.c

89

vnic_intr_return_credits(&fnic->intr[FNIC_MSIX_RQ],

drivers/scsi/fnic/fnic_main.c

1065

vnic_intr_unmask(&fnic->intr[i]);

drivers/scsi/fnic/fnic_main.c

516

vnic_intr_mask(&fnic->intr[i]);

drivers/scsi/fnic/fnic_main.c

552

vnic_intr_clean(&fnic->intr[i]);

drivers/scsi/fnic/fnic_res.c

224

vnic_intr_free(&fnic->intr[i]);

drivers/scsi/fnic/fnic_res.c

316

err = vnic_intr_alloc(fnic->vdev, &fnic->intr[i], i);

drivers/scsi/fnic/fnic_res.c

419

vnic_intr_init(&fnic->intr[i],

drivers/scsi/fnic/vnic_dev.c

757

int vnic_dev_notify_set(struct vnic_dev *vdev, u16 intr)

drivers/scsi/fnic/vnic_dev.c

771

a1 = ((u64)intr << 32) & 0x0000ffff00000000ULL;

drivers/scsi/fnic/vnic_dev.h

128

int vnic_dev_notify_set(struct vnic_dev *vdev, u16 intr);

drivers/scsi/fnic/vnic_intr.c

15

void vnic_intr_free(struct vnic_intr *intr)

drivers/scsi/fnic/vnic_intr.c

17

intr->ctrl = NULL;

drivers/scsi/fnic/vnic_intr.c

20

int vnic_intr_alloc(struct vnic_dev *vdev, struct vnic_intr *intr,

drivers/scsi/fnic/vnic_intr.c

23

intr->index = index;

drivers/scsi/fnic/vnic_intr.c

24

intr->vdev = vdev;

drivers/scsi/fnic/vnic_intr.c

26

intr->ctrl = vnic_dev_get_res(vdev, RES_TYPE_INTR_CTRL, index);

drivers/scsi/fnic/vnic_intr.c

27

if (!intr->ctrl) {

drivers/scsi/fnic/vnic_intr.c

36

void vnic_intr_init(struct vnic_intr *intr, unsigned int coalescing_timer,

drivers/scsi/fnic/vnic_intr.c

39

iowrite32(coalescing_timer, &intr->ctrl->coalescing_timer);

drivers/scsi/fnic/vnic_intr.c

40

iowrite32(coalescing_type, &intr->ctrl->coalescing_type);

drivers/scsi/fnic/vnic_intr.c

41

iowrite32(mask_on_assertion, &intr->ctrl->mask_on_assertion);

drivers/scsi/fnic/vnic_intr.c

42

iowrite32(0, &intr->ctrl->int_credits);

drivers/scsi/fnic/vnic_intr.c

45

void vnic_intr_clean(struct vnic_intr *intr)

drivers/scsi/fnic/vnic_intr.c

47

iowrite32(0, &intr->ctrl->int_credits);

drivers/scsi/fnic/vnic_intr.h

100

int vnic_intr_alloc(struct vnic_dev *vdev, struct vnic_intr *intr,

drivers/scsi/fnic/vnic_intr.h

102

void vnic_intr_init(struct vnic_intr *intr, unsigned int coalescing_timer,

drivers/scsi/fnic/vnic_intr.h

104

void vnic_intr_clean(struct vnic_intr *intr);

drivers/scsi/fnic/vnic_intr.h

56

static inline void vnic_intr_unmask(struct vnic_intr *intr)

drivers/scsi/fnic/vnic_intr.h

58

iowrite32(0, &intr->ctrl->mask);

drivers/scsi/fnic/vnic_intr.h

61

static inline void vnic_intr_mask(struct vnic_intr *intr)

drivers/scsi/fnic/vnic_intr.h

63

iowrite32(1, &intr->ctrl->mask);

drivers/scsi/fnic/vnic_intr.h

66

static inline void vnic_intr_return_credits(struct vnic_intr *intr,

drivers/scsi/fnic/vnic_intr.h

76

iowrite32(int_credit_return, &intr->ctrl->int_credit_return);

drivers/scsi/fnic/vnic_intr.h

79

static inline unsigned int vnic_intr_credits(struct vnic_intr *intr)

drivers/scsi/fnic/vnic_intr.h

81

return ioread32(&intr->ctrl->int_credits);

drivers/scsi/fnic/vnic_intr.h

84

static inline void vnic_intr_return_all_credits(struct vnic_intr *intr)

drivers/scsi/fnic/vnic_intr.h

86

unsigned int credits = vnic_intr_credits(intr);

drivers/scsi/fnic/vnic_intr.h

90

vnic_intr_return_credits(intr, credits, unmask, reset_timer);

drivers/scsi/fnic/vnic_intr.h

99

void vnic_intr_free(struct vnic_intr *intr);

drivers/scsi/ips.c

1220

(*ha->func.intr) (ha);

drivers/scsi/ips.c

1231

irqstatus = (*ha->func.intr) (ha);

drivers/scsi/ips.c

1543

ips_make_passthru(ips_ha_t *ha, struct scsi_cmnd *SC, ips_scb_t *scb, int intr)

drivers/scsi/ips.c

2214

ips_get_bios_version(ips_ha_t * ha, int intr)

drivers/scsi/ips.c

2335

intr)) == IPS_FAILURE)

drivers/scsi/ips.c

2508

ips_next(ips_ha_t * ha, int intr)

drivers/scsi/ips.c

2526

if (intr == IPS_INTR_ON)

drivers/scsi/ips.c

2550

if (intr == IPS_INTR_ON)

drivers/scsi/ips.c

2555

ret = ips_make_passthru(ha, scb->scsi_cmd, scb, intr);

drivers/scsi/ips.c

2557

if (intr == IPS_INTR_ON)

drivers/scsi/ips.c

2627

if (intr == IPS_INTR_ON)

drivers/scsi/ips.c

2684

if (intr == IPS_INTR_ON)

drivers/scsi/ips.c

2723

if (intr == IPS_INTR_ON)

drivers/scsi/ips.c

3369

ips_send_wait(ips_ha_t * ha, ips_scb_t * scb, int timeout, int intr)

drivers/scsi/ips.c

3375

if (intr != IPS_FFDC) { /* Won't be Waiting if this is a Time Stamp */

drivers/scsi/ips.c

3385

if (intr != IPS_FFDC) /* Don't Wait around if this is a Time Stamp */

drivers/scsi/ips.c

3386

ret = ips_wait(ha, timeout, intr);

drivers/scsi/ips.c

5517

ips_wait(ips_ha_t * ha, int time, int intr)

drivers/scsi/ips.c

5530

if (intr == IPS_INTR_ON) {

drivers/scsi/ips.c

5536

} else if (intr == IPS_INTR_IORL) {

drivers/scsi/ips.c

5554

(*ha->func.intr) (ha);

drivers/scsi/ips.c

5575

ips_write_driver_status(ips_ha_t * ha, int intr)

drivers/scsi/ips.c

5579

if (!ips_readwrite_page5(ha, false, intr)) {

drivers/scsi/ips.c

5604

ips_get_bios_version(ha, intr);

drivers/scsi/ips.c

5617

if (!ips_readwrite_page5(ha, true, intr)) {

drivers/scsi/ips.c

5640

ips_read_adapter_status(ips_ha_t * ha, int intr)

drivers/scsi/ips.c

5665

ips_send_wait(ha, scb, ips_cmd_timeout, intr)) == IPS_FAILURE)

drivers/scsi/ips.c

5683

ips_read_subsystem_parameters(ips_ha_t * ha, int intr)

drivers/scsi/ips.c

5708

ips_send_wait(ha, scb, ips_cmd_timeout, intr)) == IPS_FAILURE)

drivers/scsi/ips.c

5727

ips_read_config(ips_ha_t * ha, int intr)

drivers/scsi/ips.c

5753

ips_send_wait(ha, scb, ips_cmd_timeout, intr)) == IPS_FAILURE)

drivers/scsi/ips.c

5785

ips_readwrite_page5(ips_ha_t * ha, int write, int intr)

drivers/scsi/ips.c

5812

ips_send_wait(ha, scb, ips_cmd_timeout, intr)) == IPS_FAILURE)

drivers/scsi/ips.c

5835

ips_clear_adapter(ips_ha_t * ha, int intr)

drivers/scsi/ips.c

5859

ips_send_wait(ha, scb, ips_reset_timeout, intr)) == IPS_FAILURE)

drivers/scsi/ips.c

5880

ips_send_wait(ha, scb, ips_cmd_timeout, intr)) == IPS_FAILURE)

drivers/scsi/ips.c

5898

ips_ffdc_reset(ips_ha_t * ha, int intr)

drivers/scsi/ips.c

5919

ips_send_wait(ha, scb, ips_cmd_timeout, intr);

drivers/scsi/ips.c

597

ha->func.intr = ips_intr_morpheus;

drivers/scsi/ips.c

607

ha->func.intr = ips_intr_copperhead;

drivers/scsi/ips.c

624

ha->func.intr = ips_intr_copperhead;

drivers/scsi/ips.h

1001

int (*intr)(struct ips_ha *);

drivers/scsi/mac53c94.c

198

int nb, stat, seq, intr;

drivers/scsi/mac53c94.c

207

intr = readb(&regs->interrupt);

drivers/scsi/mac53c94.c

211

intr, stat, seq, state->phase);

drivers/scsi/mac53c94.c

214

if (intr & INTR_RESET) {

drivers/scsi/mac53c94.c

222

if (intr & INTR_ILL_CMD) {

drivers/scsi/mac53c94.c

224

intr, stat, seq, state->phase);

drivers/scsi/mac53c94.c

232

intr, stat, seq, state->phase);

drivers/scsi/mac53c94.c

248

if (intr & INTR_DISCONNECT) {

drivers/scsi/mac53c94.c

253

if (intr != INTR_BUS_SERV + INTR_DONE) {

drivers/scsi/mac53c94.c

254

printk(KERN_DEBUG "got intr %x during selection\n", intr);

drivers/scsi/mac53c94.c

292

if (intr != INTR_BUS_SERV) {

drivers/scsi/mac53c94.c

293

printk(KERN_DEBUG "got intr %x before status\n", intr);

drivers/scsi/mac53c94.c

311

printk(KERN_DEBUG "intr %x before data xfer complete\n", intr);

drivers/scsi/mac53c94.c

320

if (intr != INTR_DONE) {

drivers/scsi/mac53c94.c

321

printk(KERN_DEBUG "got intr %x on completion\n", intr);

drivers/scsi/mac53c94.c

331

if (intr != INTR_DISCONNECT) {

drivers/scsi/mac53c94.c

332

printk(KERN_DEBUG "got intr %x when expected disconnect\n", intr);

drivers/scsi/mac53c94.c

444

state->intr = macio_irq(mdev, 0);

drivers/scsi/mac53c94.c

46

int intr;

drivers/scsi/mac53c94.c

481

if (request_irq(state->intr, do_mac53c94_interrupt, 0, "53C94",state)) {

drivers/scsi/mac53c94.c

483

state->intr, node);

drivers/scsi/mac53c94.c

495

free_irq(state->intr, state);

drivers/scsi/mac53c94.c

517

free_irq(fp->intr, fp);

drivers/scsi/mesh.c

1658

int intr;

drivers/scsi/mesh.c

1667

while ((intr = in_8(&mr->interrupt)) != 0) {

drivers/scsi/mesh.c

1669

MKWORD(intr, mr->error, mr->exception, mr->sequence));

drivers/scsi/mesh.c

1670

if (intr & INT_ERROR) {

drivers/scsi/mesh.c

1672

} else if (intr & INT_EXCEPTION) {

drivers/scsi/mesh.c

1674

} else if (intr & INT_CMDDONE) {

drivers/scsi/qla2xxx/qla_isr.c

4790

const struct qla_init_msix_entry *intr =

drivers/scsi/qla2xxx/qla_isr.c

4797

ret = request_irq(msix->vector, intr->handler, 0, msix->name, qpair);

drivers/scsi/snic/snic.h

334

____cacheline_aligned struct vnic_intr intr[SNIC_MSIX_INTR_MAX];

drivers/scsi/snic/snic_isr.c

154

ARRAY_SIZE(snic->intr));

drivers/scsi/snic/snic_isr.c

30

svnic_intr_return_credits(&snic->intr[SNIC_MSIX_WQ],

drivers/scsi/snic/snic_isr.c

48

svnic_intr_return_credits(&snic->intr[SNIC_MSIX_IO_CMPL],

drivers/scsi/snic/snic_isr.c

64

svnic_intr_return_all_credits(&snic->intr[SNIC_MSIX_ERR_NOTIFY]);

drivers/scsi/snic/snic_main.c

221

svnic_intr_mask(&snic->intr[i]);

drivers/scsi/snic/snic_main.c

242

svnic_intr_clean(&snic->intr[i]);

drivers/scsi/snic/snic_main.c

626

svnic_intr_unmask(&snic->intr[i]);

drivers/scsi/snic/snic_main.c

669

svnic_intr_mask(&snic->intr[i]);

drivers/scsi/snic/snic_res.c

129

svnic_intr_free(&snic->intr[i]);

drivers/scsi/snic/snic_res.c

196

ret = svnic_intr_alloc(snic->vdev, &snic->intr[i], i);

drivers/scsi/snic/snic_res.c

240

svnic_intr_init(&snic->intr[i],

drivers/scsi/snic/vnic_dev.c

587

int svnic_dev_notify_set(struct vnic_dev *vdev, u16 intr)

drivers/scsi/snic/vnic_dev.c

601

a1 = ((u64)intr << 32) & VNIC_NOTIFY_INTR_MASK;

drivers/scsi/snic/vnic_dev.h

77

int svnic_dev_notify_set(struct vnic_dev *vdev, u16 intr);

drivers/scsi/snic/vnic_intr.c

12

void svnic_intr_free(struct vnic_intr *intr)

drivers/scsi/snic/vnic_intr.c

14

intr->ctrl = NULL;

drivers/scsi/snic/vnic_intr.c

17

int svnic_intr_alloc(struct vnic_dev *vdev, struct vnic_intr *intr,

drivers/scsi/snic/vnic_intr.c

20

intr->index = index;

drivers/scsi/snic/vnic_intr.c

21

intr->vdev = vdev;

drivers/scsi/snic/vnic_intr.c

23

intr->ctrl = svnic_dev_get_res(vdev, RES_TYPE_INTR_CTRL, index);

drivers/scsi/snic/vnic_intr.c

24

if (!intr->ctrl) {

drivers/scsi/snic/vnic_intr.c

33

void svnic_intr_init(struct vnic_intr *intr, unsigned int coalescing_timer,

drivers/scsi/snic/vnic_intr.c

36

iowrite32(coalescing_timer, &intr->ctrl->coalescing_timer);

drivers/scsi/snic/vnic_intr.c

37

iowrite32(coalescing_type, &intr->ctrl->coalescing_type);

drivers/scsi/snic/vnic_intr.c

38

iowrite32(mask_on_assertion, &intr->ctrl->mask_on_assertion);

drivers/scsi/snic/vnic_intr.c

39

iowrite32(0, &intr->ctrl->int_credits);

drivers/scsi/snic/vnic_intr.c

42

void svnic_intr_clean(struct vnic_intr *intr)

drivers/scsi/snic/vnic_intr.c

44

iowrite32(0, &intr->ctrl->int_credits);

drivers/scsi/snic/vnic_intr.h

40

svnic_intr_unmask(struct vnic_intr *intr)

drivers/scsi/snic/vnic_intr.h

42

iowrite32(0, &intr->ctrl->mask);

drivers/scsi/snic/vnic_intr.h

46

svnic_intr_mask(struct vnic_intr *intr)

drivers/scsi/snic/vnic_intr.h

48

iowrite32(1, &intr->ctrl->mask);

drivers/scsi/snic/vnic_intr.h

52

svnic_intr_return_credits(struct vnic_intr *intr,

drivers/scsi/snic/vnic_intr.h

64

iowrite32(int_credit_return, &intr->ctrl->int_credit_return);

drivers/scsi/snic/vnic_intr.h

68

svnic_intr_credits(struct vnic_intr *intr)

drivers/scsi/snic/vnic_intr.h

70

return ioread32(&intr->ctrl->int_credits);

drivers/scsi/snic/vnic_intr.h

74

svnic_intr_return_all_credits(struct vnic_intr *intr)

drivers/scsi/snic/vnic_intr.h

76

unsigned int credits = svnic_intr_credits(intr);

drivers/scsi/snic/vnic_intr.h

80

svnic_intr_return_credits(intr, credits, unmask, reset_timer);

drivers/scsi/snic/vnic_intr.h

85

void svnic_intr_init(struct vnic_intr *intr,

drivers/soundwire/stream.c

452

bool intr = false;

drivers/soundwire/stream.c

489

intr = true;

drivers/soundwire/stream.c

496

if (prep && intr) {

drivers/soundwire/stream.c

539

if (!prep && intr)

drivers/spi/spi-bcm63xx.c

414

u8 intr;

drivers/spi/spi-bcm63xx.c

417

intr = bcm_spi_readb(bs, SPI_INT_STATUS);

drivers/spi/spi-bcm63xx.c

422

if (intr & SPI_INTR_CMD_DONE)

drivers/spmi/spmi-pmic-arb.c

1584

return bus->intr + 0x20 * m + 0x4 * n;

drivers/spmi/spmi-pmic-arb.c

1590

return bus->intr + 0x100000 + 0x1000 * m + 0x4 * n;

drivers/spmi/spmi-pmic-arb.c

1596

return bus->intr + 0x200000 + 0x1000 * m + 0x4 * n;

drivers/spmi/spmi-pmic-arb.c

1602

return bus->intr + 0x10000 * m + 0x4 * n;

drivers/spmi/spmi-pmic-arb.c

1608

return bus->intr + 0x1000 * m + 0x4 * n;

drivers/spmi/spmi-pmic-arb.c

1614

return bus->intr + 0x200 + 0x4 * n;

drivers/spmi/spmi-pmic-arb.c

1620

return bus->intr + 0x1000 * n;

drivers/spmi/spmi-pmic-arb.c

1648

return bus->intr + 0x600 + 0x4 * n;

drivers/spmi/spmi-pmic-arb.c

1654

return bus->intr + 0x4 + 0x1000 * n;

drivers/spmi/spmi-pmic-arb.c

1682

return bus->intr + 0xA00 + 0x4 * n;

drivers/spmi/spmi-pmic-arb.c

1688

return bus->intr + 0x8 + 0x1000 * n;

drivers/spmi/spmi-pmic-arb.c

172

void __iomem *intr;

drivers/spmi/spmi-pmic-arb.c

1869

void __iomem *intr;

drivers/spmi/spmi-pmic-arb.c

1916

intr = devm_of_iomap(dev, node, index, NULL);

drivers/spmi/spmi-pmic-arb.c

1917

if (IS_ERR(intr))

drivers/spmi/spmi-pmic-arb.c

1918

return PTR_ERR(intr);

drivers/spmi/spmi-pmic-arb.c

1925

bus->intr = intr;

drivers/staging/axis-fifo/axis-fifo.c

298

u32 isr, ier, intr;

drivers/staging/axis-fifo/axis-fifo.c

302

intr = ier & isr;

drivers/staging/axis-fifo/axis-fifo.c

304

if (intr & XLLF_INT_RC_MASK)

drivers/staging/axis-fifo/axis-fifo.c

307

if (intr & XLLF_INT_TC_MASK)

drivers/staging/axis-fifo/axis-fifo.c

310

if (intr & XLLF_INT_RPURE_MASK)

drivers/staging/axis-fifo/axis-fifo.c

313

if (intr & XLLF_INT_RPORE_MASK)

drivers/staging/axis-fifo/axis-fifo.c

316

if (intr & XLLF_INT_RPUE_MASK)

drivers/staging/axis-fifo/axis-fifo.c

319

if (intr & XLLF_INT_TPOE_MASK)

drivers/staging/axis-fifo/axis-fifo.c

322

if (intr & XLLF_INT_TSE_MASK)

drivers/staging/media/atomisp/pci/atomisp_internal.h

146

u8 intr;

drivers/staging/media/atomisp/pci/atomisp_v4l2.c

354

pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &isp->saved_regs.intr);

drivers/staging/media/atomisp/pci/atomisp_v4l2.c

409

pci_write_config_byte(pdev, PCI_INTERRUPT_LINE, isp->saved_regs.intr);

drivers/thermal/broadcom/brcmstb_thermal.c

236

int low, high, intr;

drivers/thermal/broadcom/brcmstb_thermal.c

240

intr = avs_tmon_get_intr_temp(priv);

drivers/thermal/broadcom/brcmstb_thermal.c

243

low, intr, high);

drivers/thermal/broadcom/brcmstb_thermal.c

246

if (intr >= high)

drivers/thermal/broadcom/brcmstb_thermal.c

249

if (intr <= low)

drivers/thermal/broadcom/brcmstb_thermal.c

256

thermal_zone_device_update(priv->thermal, intr);

drivers/thermal/intel/x86_pkg_temp_thermal.c

128

u32 l, h, mask, shift, intr;

drivers/thermal/intel/x86_pkg_temp_thermal.c

152

intr = THERM_INT_THRESHOLD1_ENABLE;

drivers/thermal/intel/x86_pkg_temp_thermal.c

156

intr = THERM_INT_THRESHOLD0_ENABLE;

drivers/thermal/intel/x86_pkg_temp_thermal.c

164

l &= ~intr;

drivers/thermal/intel/x86_pkg_temp_thermal.c

167

l |= intr;

drivers/tty/moxa.c

1419

u16 intr;

drivers/tty/moxa.c

1446

intr = readw(ip); /* port irq status */

drivers/tty/moxa.c

1447

if (intr == 0)

drivers/tty/moxa.c

1452

if (intr & IntrTx) /* disable tx intr */

drivers/tty/moxa.c

1459

if (tty && (intr & IntrBreak) && !I_IGNBRK(tty)) { /* BREAK */

drivers/tty/moxa.c

1464

if (intr & IntrLine)

drivers/tty/serial/jsm/jsm.h

104

irq_handler_t intr;

drivers/tty/serial/jsm/jsm_cls.c

884

.intr = cls_intr,

drivers/tty/serial/jsm/jsm_driver.c

218

rc = request_irq(brd->irq, brd->bd_ops->intr, IRQF_SHARED, "JSM", brd);

drivers/tty/serial/jsm/jsm_neo.c

1321

.intr = neo_intr,

drivers/tty/serial/mvebu-uart.c

1003

.regs.intr = UART_EXT_CTRL2,

drivers/tty/serial/mvebu-uart.c

123

unsigned int intr;

drivers/tty/serial/mvebu-uart.c

146

unsigned int intr;

drivers/tty/serial/mvebu-uart.c

173

#define UART_INTR(port) (to_mvuart(port)->data->regs.intr)

drivers/tty/serial/mvebu-uart.c

732

unsigned int ier, intr, ctl;

drivers/tty/serial/mvebu-uart.c

741

intr = readl(port->membase + UART_INTR(port)) &

drivers/tty/serial/mvebu-uart.c

753

if (intr) {

drivers/tty/serial/mvebu-uart.c

754

ctl = intr | readl(port->membase + UART_INTR(port));

drivers/tty/serial/mvebu-uart.c

831

mvuart->pm_regs.intr = readl(port->membase + UART_INTR(port));

drivers/tty/serial/mvebu-uart.c

852

writel(mvuart->pm_regs.intr, port->membase + UART_INTR(port));

drivers/tty/serial/mvebu-uart.c

991

.regs.intr = UART_STD_CTRL2,

drivers/ufs/core/ufs_trace.h

274

u32 intr, u64 lba, u8 opcode, u8 group_id),

drivers/ufs/core/ufs_trace.h

276

TP_ARGS(sdev, hba, str_t, tag, doorbell, hwq_id, transfer_len, intr, lba,

drivers/ufs/core/ufs_trace.h

286

__field(u32, intr)

drivers/ufs/core/ufs_trace.h

300

__entry->intr = intr;

drivers/ufs/core/ufs_trace.h

311

__entry->doorbell, __entry->transfer_len, __entry->intr,

drivers/ufs/core/ufshcd.c

486

u32 intr;

drivers/ufs/core/ufshcd.c

517

intr = ufshcd_readl(hba, REG_INTERRUPT_STATUS);

drivers/ufs/core/ufshcd.c

527

transfer_len, intr, lba, opcode, group_id);

drivers/usb/atm/ueagle-atm.c

1964

static void uea_dispatch_cmv_e1(struct uea_softc *sc, struct intr_pkt *intr)

drivers/usb/atm/ueagle-atm.c

1967

struct cmv_e1 *cmv = &intr->u.e1.s2.cmv;

drivers/usb/atm/ueagle-atm.c

2026

static void uea_dispatch_cmv_e4(struct uea_softc *sc, struct intr_pkt *intr)

drivers/usb/atm/ueagle-atm.c

2029

struct cmv_e4 *cmv = &intr->u.e4.s2.cmv;

drivers/usb/atm/ueagle-atm.c

2069

struct intr_pkt *intr)

drivers/usb/atm/ueagle-atm.c

2071

sc->pageno = intr->e1_bSwapPageNo;

drivers/usb/atm/ueagle-atm.c

2072

sc->ovl = intr->e1_bOvl >> 4 | intr->e1_bOvl << 4;

drivers/usb/atm/ueagle-atm.c

2077

struct intr_pkt *intr)

drivers/usb/atm/ueagle-atm.c

2079

sc->pageno = intr->e4_bSwapPageNo;

drivers/usb/atm/ueagle-atm.c

2089

struct intr_pkt *intr = urb->transfer_buffer;

drivers/usb/atm/ueagle-atm.c

2101

if (intr->bType != 0x08 || sc->booting) {

drivers/usb/atm/ueagle-atm.c

2106

switch (le16_to_cpu(intr->wInterrupt)) {

drivers/usb/atm/ueagle-atm.c

2108

sc->schedule_load_page(sc, intr);

drivers/usb/atm/ueagle-atm.c

2112

sc->dispatch_cmv(sc, intr);

drivers/usb/atm/ueagle-atm.c

2117

le16_to_cpu(intr->wInterrupt));

drivers/usb/atm/ueagle-atm.c

2129

struct intr_pkt *intr;

drivers/usb/atm/ueagle-atm.c

2161

intr = kmalloc(size, GFP_KERNEL);

drivers/usb/atm/ueagle-atm.c

2162

if (!intr)

drivers/usb/atm/ueagle-atm.c

2171

intr, size, uea_intr, sc,

drivers/usb/atm/ueagle-atm.c

2199

kfree(intr);

drivers/usb/chipidea/udc.c

1044

u32 intr;

drivers/usb/chipidea/udc.c

1060

intr = hw_read(ci, OP_USBINTR, ~0);

drivers/usb/chipidea/udc.c

1061

hw_write(ci, OP_USBINTR, ~0, intr | USBi_SLI);

drivers/usb/chipidea/udc.c

2205

u32 intr;

drivers/usb/chipidea/udc.c

2219

intr = hw_test_and_clear_intr_active(ci);

drivers/usb/chipidea/udc.c

2221

if (intr) {

drivers/usb/chipidea/udc.c

2223

if (USBi_URI & intr)

drivers/usb/chipidea/udc.c

2226

if (USBi_PCI & intr) {

drivers/usb/chipidea/udc.c

2244

if ((USBi_UI | USBi_UEI) & intr)

drivers/usb/chipidea/udc.c

2247

if ((USBi_SLI & intr) && !(ci->suspended)) {

drivers/usb/dwc2/hcd.c

1742

u32 intr;

drivers/usb/dwc2/hcd.c

1754

intr = dwc2_readl(hsotg, GINTMSK);

drivers/usb/dwc2/hcd.c

1755

intr &= ~(GINTSTS_NPTXFEMP | GINTSTS_PTXFEMP | GINTSTS_HCHINT);

drivers/usb/dwc2/hcd.c

1756

dwc2_writel(hsotg, intr, GINTMSK);

drivers/usb/dwc2/hcd.c

1757

intr = GINTSTS_NPTXFEMP | GINTSTS_PTXFEMP | GINTSTS_HCHINT;

drivers/usb/dwc2/hcd.c

1758

dwc2_writel(hsotg, intr, GINTSTS);

drivers/usb/dwc2/hcd.h

444

static inline void disable_hc_int(struct dwc2_hsotg *hsotg, int chnum, u32 intr)

drivers/usb/dwc2/hcd.h

448

mask &= ~intr;

drivers/usb/gadget/udc/pch_udc.c

1297

if (dev->vbus_gpio.intr)

drivers/usb/gadget/udc/pch_udc.c

1348

if (!dev->vbus_gpio.port || !dev->vbus_gpio.intr)

drivers/usb/gadget/udc/pch_udc.c

1375

dev->vbus_gpio.intr = 0;

drivers/usb/gadget/udc/pch_udc.c

1392

dev->vbus_gpio.intr = irq_num;

drivers/usb/gadget/udc/pch_udc.c

1410

if (dev->vbus_gpio.intr)

drivers/usb/gadget/udc/pch_udc.c

1411

free_irq(dev->vbus_gpio.intr, dev);

drivers/usb/gadget/udc/pch_udc.c

2671

&& !dev->vbus_gpio.intr)

drivers/usb/gadget/udc/pch_udc.c

2916

if ((pch_vbus_gpio_get_value(dev) != 0) || !dev->vbus_gpio.intr)

drivers/usb/gadget/udc/pch_udc.c

308

int intr;

drivers/usb/gadget/udc/pxa27x_udc.h

59

#define UDCICR_INT(n, intr) (((intr) & 0x03) << (((n) & 0x0F) * 2))

drivers/usb/gadget/udc/pxa27x_udc.h

69

#define UDCISR_INT(n, intr) (((intr) & 0x03) << (((n) & 0x0F) * 2))

drivers/usb/host/pci-quirks.c

686

unsigned int cmd, intr;

drivers/usb/host/pci-quirks.c

713

intr = inw(base + UHCI_USBINTR);

drivers/usb/host/pci-quirks.c

714

if (intr & (~UHCI_USBINTR_RESUME)) {

drivers/usb/host/pci-quirks.c

716

__func__, intr);

drivers/usb/host/uhci-hcd.c

213

unsigned int cmd, intr;

drivers/usb/host/uhci-hcd.c

232

intr = uhci_readw(uhci, USBINTR);

drivers/usb/host/uhci-hcd.c

233

if (intr & (~USBINTR_RESUME)) {

drivers/usb/host/uhci-hcd.c

235

__func__, intr);

drivers/usb/host/xen-hcd.c

698

req->u.intr.interval = urb->interval;

drivers/usb/misc/usbtest.c

179

if (dev->info->intr)

drivers/usb/misc/usbtest.c

2938

.intr = 1,

drivers/usb/misc/usbtest.c

83

unsigned intr:1; /* try interrupt in/out */

drivers/usb/mtu3/mtu3_trace.h

36

TP_PROTO(u32 intr),

drivers/usb/mtu3/mtu3_trace.h

37

TP_ARGS(intr),

drivers/usb/mtu3/mtu3_trace.h

39

__field(u32, intr)

drivers/usb/mtu3/mtu3_trace.h

42

__entry->intr = intr;

drivers/usb/mtu3/mtu3_trace.h

44

TP_printk("(%08x) %s %s %s %s %s %s", __entry->intr,

drivers/usb/mtu3/mtu3_trace.h

45

__entry->intr & HOT_RST_INTR ? "HOT_RST" : "",

drivers/usb/mtu3/mtu3_trace.h

46

__entry->intr & WARM_RST_INTR ? "WARM_RST" : "",

drivers/usb/mtu3/mtu3_trace.h

47

__entry->intr & ENTER_U3_INTR ? "ENT_U3" : "",

drivers/usb/mtu3/mtu3_trace.h

48

__entry->intr & EXIT_U3_INTR ? "EXIT_U3" : "",

drivers/usb/mtu3/mtu3_trace.h

49

__entry->intr & VBUS_RISE_INTR ? "VBUS_RISE" : "",

drivers/usb/mtu3/mtu3_trace.h

50

__entry->intr & VBUS_FALL_INTR ? "VBUS_FALL" : ""

drivers/usb/mtu3/mtu3_trace.h

55

TP_PROTO(u32 intr),

drivers/usb/mtu3/mtu3_trace.h

56

TP_ARGS(intr),

drivers/usb/mtu3/mtu3_trace.h

58

__field(u32, intr)

drivers/usb/mtu3/mtu3_trace.h

61

__entry->intr = intr;

drivers/usb/mtu3/mtu3_trace.h

63

TP_printk("(%08x) %s %s %s", __entry->intr,

drivers/usb/mtu3/mtu3_trace.h

64

__entry->intr & SUSPEND_INTR ? "SUSPEND" : "",

drivers/usb/mtu3/mtu3_trace.h

65

__entry->intr & RESUME_INTR ? "RESUME" : "",

drivers/usb/mtu3/mtu3_trace.h

66

__entry->intr & RESET_INTR ? "RESET" : ""

drivers/usb/storage/ene_ub6250.c

1371

ExtraDat->intr = 0x80; /* Not yet, waiting for fireware support */

drivers/usb/storage/ene_ub6250.c

398

u8 intr;

drivers/usb/storage/ene_ub6250.c

921

ExtraDat->intr = 0x80; /* Not yet,fireware support */

drivers/video/fbdev/sh7760fb.c

75

unsigned short intr = ioread16(par->base + LDINTR);

drivers/video/fbdev/sh7760fb.c

79

intr |= VINT_START;

drivers/video/fbdev/sh7760fb.c

83

intr &= ~VINT_START;

drivers/video/fbdev/sh7760fb.c

91

iowrite16(intr, par->base + LDINTR);

drivers/video/fbdev/valkyriefb.h

69

struct vpreg intr;

drivers/watchdog/cpwd.c

305

unsigned char intr = cpwd_readb(p->devs[index].regs + PLD_IMASK);

drivers/watchdog/cpwd.c

316

if (intr & p->devs[index].intr_mask) {

fs/afs/fs_probe.c

314

int afs_wait_for_fs_probes(struct afs_operation *op, struct afs_server_state *states, bool intr)

fs/afs/fs_probe.c

341

set_current_state(intr ? TASK_INTERRUPTIBLE : TASK_UNINTERRUPTIBLE);

fs/afs/internal.h

1238

int afs_wait_for_fs_probes(struct afs_operation *op, struct afs_server_state *states, bool intr);

fs/afs/internal.h

1426

call->intr = !(op->flags & AFS_OPERATION_UNINTR);

fs/afs/internal.h

177

bool intr; /* T if interruptible */

fs/afs/rxrpc.c

384

(call->intr ? RXRPC_PREINTERRUPTIBLE :

fs/smb/client/fs_context.c

1776

ctx->intr = !result.negated;

fs/smb/client/fs_context.h

248

bool intr:1;

include/drm/drm_suballoc.h

58

gfp_t gfp, bool intr, size_t align);

include/drm/ttm/ttm_backup.h

59

pgoff_t handle, bool intr);

include/drm/ttm/ttm_execbuf_util.h

100

struct list_head *list, bool intr,

include/linux/dma-fence.h

223

bool intr, signed long timeout);

include/linux/dma-fence.h

374

bool intr, signed long timeout);

include/linux/dma-fence.h

632

bool intr, signed long timeout);

include/linux/dma-fence.h

635

bool intr, signed long timeout,

include/linux/dma-fence.h

653

static inline signed long dma_fence_wait(struct dma_fence *fence, bool intr)

include/linux/dma-fence.h

661

ret = dma_fence_wait_timeout(fence, intr, MAX_SCHEDULE_TIMEOUT);

include/linux/dma-resv.h

481

bool intr, unsigned long timeout);

include/linux/key.h

386

extern int wait_for_key_construction(struct key *key, bool intr);

include/linux/mlx5/mlx5_ifc.h

4655

u8 intr[0xc];

include/xen/interface/io/usbif.h

354

} intr;

net/bluetooth/hidp/core.c

1327

struct bt_sock *ctrl, *intr;

net/bluetooth/hidp/core.c

1341

intr = bt_sk(intr_sock->sk);

net/bluetooth/hidp/core.c

1344

intr->sk.sk_state != BT_CONNECTED)

net/bluetooth/hidp/core.c

440

const u8 *data, unsigned int len, int intr)

net/bluetooth/hidp/core.c

446

hid_input_report(session->hid, type, session->input_buf, len, intr);

net/bluetooth/hidp/core.c

918

struct bt_sock *ctrl, *intr;

net/bluetooth/hidp/core.c

921

intr = bt_sk(intr_sock->sk);

net/bluetooth/hidp/core.c

945

session->intr_mtu = min_t(uint, l2cap_pi(intr)->chan->omtu,

net/bluetooth/hidp/core.c

946

l2cap_pi(intr)->chan->imtu);

security/keys/request_key.c

676

int wait_for_key_construction(struct key *key, bool intr)

security/keys/request_key.c

681

intr ? TASK_INTERRUPTIBLE : TASK_UNINTERRUPTIBLE);

sound/pci/ca0106/ca0106_main.c

1630

static void ca0106_midi_interrupt_enable(struct snd_ca_midi *midi, int intr)

sound/pci/ca0106/ca0106_main.c

1632

snd_ca0106_intr_enable((struct snd_ca0106 *)(midi->dev_id), intr);

sound/pci/ca0106/ca0106_main.c

1635

static void ca0106_midi_interrupt_disable(struct snd_ca_midi *midi, int intr)

sound/pci/ca0106/ca0106_main.c

1637

snd_ca0106_intr_disable((struct snd_ca0106 *)(midi->dev_id), intr);

sound/pci/ca0106/ca_midi.h

41

void (*interrupt_enable)(struct snd_ca_midi *midi, int intr);

sound/pci/ca0106/ca_midi.h

42

void (*interrupt_disable)(struct snd_ca_midi *midi, int intr);

sound/pci/sis7019.c

297

u32 intr, status;

sound/pci/sis7019.c

305

intr = inl(io + SIS_GISR);

sound/pci/sis7019.c

306

intr &= SIS_GISR_AUDIO_PLAY_DMA_IRQ_STATUS |

sound/pci/sis7019.c

308

if (!intr)

sound/pci/sis7019.c

333

outl(intr, io + SIS_GISR);

sound/pci/sis7019.c

334

intr = inl(io + SIS_GISR);

sound/pci/sis7019.c

335

intr &= SIS_GISR_AUDIO_PLAY_DMA_IRQ_STATUS |

sound/pci/sis7019.c

337

} while (intr);

sound/soc/codecs/max9860.c

599

int intr;

sound/soc/codecs/max9860.c

676

ret = regmap_read(max9860->regmap, MAX9860_INTRSTATUS, &intr);

sound/soc/fsl/fsl_spdif.c

741

u32 intr = SIE_INTR_FOR(tx);

sound/soc/fsl/fsl_spdif.c

748

regmap_update_bits(regmap, REG_SPDIF_SIE, intr, intr);

sound/soc/fsl/fsl_spdif.c

755

regmap_update_bits(regmap, REG_SPDIF_SIE, intr, 0);

sound/sparc/dbri.c

119

#define DBRI_CMD(cmd, intr, value) ((cmd << 28) | \

sound/sparc/dbri.c

120

(intr << 27) | \

sound/sparc/dbri.c

1908

while ((x = dbri->dma->intr[dbri->dbri_irqp]) != 0) {

sound/sparc/dbri.c

1909

dbri->dma->intr[dbri->dbri_irqp] = 0;

sound/sparc/dbri.c

271

volatile s32 intr[DBRI_INT_BLK]; /* Interrupt field */

sound/sparc/dbri.c

774

dma_addr = dvma_addr + dbri_dma_off(intr, 0);

sound/sparc/dbri.c

775

dbri->dma->intr[0] = dma_addr;

tools/perf/util/parse-regs-options.c

53

__parse_regs(const struct option *opt, const char *str, int unset, bool intr)

tools/perf/util/parse-regs-options.c

69

mask = intr ? perf_intr_reg_mask(EM_HOST) : perf_user_reg_mask(EM_HOST);

tools/perf/util/parse-regs-options.c

97

s, intr ? "-I" : "--user-regs=");

tools/perf/util/perf-regs-arch/perf_regs_aarch64.c

107

uint64_t __perf_reg_mask_arm64(bool intr)

tools/perf/util/perf-regs-arch/perf_regs_aarch64.c

120

if (intr)

tools/perf/util/perf-regs-arch/perf_regs_arm.c

6

uint64_t __perf_reg_mask_arm(bool intr __maybe_unused)

tools/perf/util/perf-regs-arch/perf_regs_csky.c

14

uint64_t __perf_reg_mask_csky(bool intr __maybe_unused)

tools/perf/util/perf-regs-arch/perf_regs_loongarch.c

6

uint64_t __perf_reg_mask_loongarch(bool intr __maybe_unused)

tools/perf/util/perf-regs-arch/perf_regs_mips.c

6

uint64_t __perf_reg_mask_mips(bool intr __maybe_unused)

tools/perf/util/perf-regs-arch/perf_regs_powerpc.c

134

uint64_t __perf_reg_mask_powerpc(bool intr)

tools/perf/util/perf-regs-arch/perf_regs_powerpc.c

148

if (!intr)

tools/perf/util/perf-regs-arch/perf_regs_powerpc.c

181

uint64_t __perf_reg_mask_powerpc(bool intr __maybe_unused)

tools/perf/util/perf-regs-arch/perf_regs_riscv.c

6

uint64_t __perf_reg_mask_riscv(bool intr __maybe_unused)

tools/perf/util/perf-regs-arch/perf_regs_s390.c

6

uint64_t __perf_reg_mask_s390(bool intr __maybe_unused)

tools/perf/util/perf-regs-arch/perf_regs_x86.c

238

uint64_t __perf_reg_mask_x86(bool intr)

tools/perf/util/perf-regs-arch/perf_regs_x86.c

251

if (!intr)

tools/perf/util/perf_regs.h

25

uint64_t __perf_reg_mask_arm64(bool intr);

tools/perf/util/perf_regs.h

30

uint64_t __perf_reg_mask_arm(bool intr);

tools/perf/util/perf_regs.h

35

uint64_t __perf_reg_mask_csky(bool intr);

tools/perf/util/perf_regs.h

40

uint64_t __perf_reg_mask_loongarch(bool intr);

tools/perf/util/perf_regs.h

45

uint64_t __perf_reg_mask_mips(bool intr);

tools/perf/util/perf_regs.h

51

uint64_t __perf_reg_mask_powerpc(bool intr);

tools/perf/util/perf_regs.h

56

uint64_t __perf_reg_mask_riscv(bool intr);

tools/perf/util/perf_regs.h

61

uint64_t __perf_reg_mask_s390(bool intr);

tools/perf/util/perf_regs.h

67

uint64_t __perf_reg_mask_x86(bool intr);