usr/src/boot/efi/include/Uefi/UefiInternalFormRepresentation.h

1038

} u32;

usr/src/boot/efi/include/Uefi/UefiInternalFormRepresentation.h

679

UINT32 u32;

usr/src/cmd/bhyve/common/pci_passthru.c

247

uint32_t u32;

usr/src/cmd/bhyve/common/pci_passthru.c

273

u32 = passthru_read_config(sc,

usr/src/cmd/bhyve/common/pci_passthru.c

275

pci_set_cfgdata32(pi, capptr, u32);

usr/src/cmd/bhyve/common/pci_passthru.c

288

u32 = passthru_read_config(sc,

usr/src/cmd/bhyve/common/pci_passthru.c

290

memcpy(msixcap_ptr, &u32, 4);

usr/src/cmd/bhyve/common/pci_passthru.c

291

pci_set_cfgdata32(pi, capptr, u32);

usr/src/cmd/cmd-inet/usr.sbin/ipqosconf/ipqosconf.c

3395

uint32_t u32;

usr/src/cmd/cmd-inet/usr.sbin/ipqosconf/ipqosconf.c

3397

(void) nvpair_value_uint32(nvp, &u32);

usr/src/cmd/cmd-inet/usr.sbin/ipqosconf/ipqosconf.c

3398

(void) fprintf(fp, "%u\n", u32);

usr/src/cmd/cmd-inet/usr.sbin/ipqosconf/ipqosconf.c

5249

uint32_t u32;

usr/src/cmd/cmd-inet/usr.sbin/ipqosconf/ipqosconf.c

5337

ret = str_val_list_lookup(enum_vals, tk, &u32);

usr/src/cmd/cmd-inet/usr.sbin/ipqosconf/ipqosconf.c

5346

*val = *val | u32;

usr/src/cmd/cmd-inet/usr.sbin/ipqosconf/ipqosconf.c

5986

uint32_t u32;

usr/src/cmd/cmd-inet/usr.sbin/ipqosconf/ipqosconf.c

5988

res = readuint32(valst, &u32, &tmp);

usr/src/cmd/cmd-inet/usr.sbin/ipqosconf/ipqosconf.c

5990

res = nvlist_add_uint32(*nvlp, name, u32);

usr/src/cmd/cmd-inet/usr.sbin/ipqosconf/ipqosconf.c

8755

uint32_t u32;

usr/src/cmd/cmd-inet/usr.sbin/ipqosconf/ipqosconf.c

8787

ret = nvlist_lookup_uint32(nvlcp, IPP_CONFIG_ORIGINATOR, &u32);

usr/src/cmd/cmd-inet/usr.sbin/ipqosconf/ipqosconf.c

8789

params->originator = u32;

usr/src/cmd/cmd-inet/usr.sbin/ipqosconf/ipqosconf.c

8797

ret = nvlist_lookup_uint32(nvlcp, IPP_ACTION_STATS_ENABLE, &u32);

usr/src/cmd/cmd-inet/usr.sbin/ipqosconf/ipqosconf.c

8799

params->stats_enable = *(boolean_t *)&u32;

usr/src/cmd/cmd-inet/usr.sbin/ipqosconf/ipqosconf.c

8854

uint32_t u32;

usr/src/cmd/cmd-inet/usr.sbin/ipqosconf/ipqosconf.c

8861

ret = nvlist_lookup_uint32(nvl, IPP_CONFIG_ORIGINATOR, &u32);

usr/src/cmd/cmd-inet/usr.sbin/ipqosconf/ipqosconf.c

8863

class->originator = u32;

usr/src/cmd/cmd-inet/usr.sbin/ipqosconf/ipqosconf.c

8884

ret = nvlist_lookup_uint32(nvl, CLASSIFIER_CLASS_STATS_ENABLE, &u32);

usr/src/cmd/cmd-inet/usr.sbin/ipqosconf/ipqosconf.c

8886

class->stats_enable = *(boolean_t *)&u32;

usr/src/cmd/cmd-inet/usr.sbin/ipqosconf/ipqosconf.c

8904

uint32_t u32;

usr/src/cmd/cmd-inet/usr.sbin/ipqosconf/ipqosconf.c

8919

ret = nvlist_lookup_uint32(nvlcp, IPP_CONFIG_ORIGINATOR, &u32);

usr/src/cmd/cmd-inet/usr.sbin/ipqosconf/ipqosconf.c

8921

filter->originator = u32;

usr/src/cmd/cxgbetool/cudbg_view.c

1192

u32 i, *p;

usr/src/cmd/cxgbetool/cudbg_view.c

1343

do_div(unsigned long *number, u32 divisor)

usr/src/cmd/cxgbetool/cudbg_view.c

1365

const u32 divisor[] = {1000, 1024};

usr/src/cmd/cxgbetool/cudbg_view.c

139

cudbg_sge_ctxt_check_valid(u32 *buf, int type)

usr/src/cmd/cxgbetool/cudbg_view.c

1405

mem_region_show(const char *name, u32 from, u32 to,

usr/src/cmd/cxgbetool/cudbg_view.c

1425

u32 i, lo, idx;

usr/src/cmd/cxgbetool/cudbg_view.c

1643

u32 *p;

usr/src/cmd/cxgbetool/cudbg_view.c

1650

p = (u32 *)cim_pif_la_buff->data;

usr/src/cmd/cxgbetool/cudbg_view.c

1660

p = (u32 *) cim_pif_la_buff->data + 6 * CIM_PIFLA_SIZE;

usr/src/cmd/cxgbetool/cudbg_view.c

1981

u32 rssconf;

usr/src/cmd/cxgbetool/cudbg_view.c

2174

u32 *key;

usr/src/cmd/cxgbetool/cudbg_view.c

2180

key = (u32 *)dc_buff.data;

usr/src/cmd/cxgbetool/cudbg_view.c

2290

u32 i;

usr/src/cmd/cxgbetool/cudbg_view.c

2315

u32 num_entries = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2316

u32 first_entry = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2318

u32 itr;

usr/src/cmd/cxgbetool/cudbg_view.c

233

validate_next_rec_offset(void *pinbuf, u32 inbuf_size, u32

usr/src/cmd/cxgbetool/cudbg_view.c

2356

translate_fw_devlog(void *pbuf, u32 io_size,

usr/src/cmd/cxgbetool/cudbg_view.c

2357

u32 *num_entries, u32 *first_entry)

usr/src/cmd/cxgbetool/cudbg_view.c

2361

u32 index;

usr/src/cmd/cxgbetool/cudbg_view.c

2394

dump_block_regs(const struct reg_info *reg_array, const u32 *regs,

usr/src/cmd/cxgbetool/cudbg_view.c

2424

dump_regs_table(const u32 *regs, const struct mod_regs *modtab,

usr/src/cmd/cxgbetool/cudbg_view.c

2445

dump_regs_t6(const u32 *regs, struct cudbg_buffer *cudbg_poutbuf)

usr/src/cmd/cxgbetool/cudbg_view.c

2488

dump_regs_t5(const u32 *regs, struct cudbg_buffer *cudbg_poutbuf)

usr/src/cmd/cxgbetool/cudbg_view.c

2535

u32 *regs;

usr/src/cmd/cxgbetool/cudbg_view.c

2541

regs = (u32 *) ((unsigned int *)dc_buff.data);

usr/src/cmd/cxgbetool/cudbg_view.c

2543

rc = dump_regs_t5((u32 *)regs, cudbg_poutbuf);

usr/src/cmd/cxgbetool/cudbg_view.c

2545

rc = dump_regs_t6((u32 *)regs, cudbg_poutbuf);

usr/src/cmd/cxgbetool/cudbg_view.c

255

u32 size, total_size = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2558

u32 pcie_core_dmaw_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2559

u32 sge_pcie_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

256

u32 next_ext_offset = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2560

u32 csw_sge_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2561

u32 tp_csw_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2562

u32 tpcside_csw_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2563

u32 ulprx_tpcside_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2564

u32 pmrx_ulprx_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2565

u32 mps_tpeside_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2566

u32 mps_tp_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2567

u32 xgm_mps_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2568

u32 rx_xgm_xgm_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2569

u32 wire_xgm_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

257

u32 entity_type;

usr/src/cmd/cxgbetool/cudbg_view.c

2570

u32 rx_wire_macok_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2572

u32 pcie_core_dmaw_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2573

u32 sge_pcie_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2574

u32 csw_sge_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2575

u32 tp_csw_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2576

u32 tpcside_csw_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2577

u32 ulprx_tpcside_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2578

u32 pmrx_ulprx_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2579

u32 mps_tpeside_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2580

u32 mps_tp_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2581

u32 xgm_mps_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2582

u32 rx_xgm_xgm_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2583

u32 wire_xgm_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2584

u32 rx_wire_macok_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2587

u32 core_pcie_dma_rsp_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2588

u32 pcie_sge_dma_rsp_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2589

u32 sge_debug_index6_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2590

u32 sge_utx_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2591

u32 utx_tp_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2592

u32 sge_work_req_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2593

u32 utx_tpcside_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2594

u32 tpcside_rxarb_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2595

u32 tpeside_mps_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2596

u32 tp_mps_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2597

u32 mps_xgm_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2598

u32 tx_xgm_xgm_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2599

u32 xgm_wire_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2600

u32 tx_macok_wire_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2602

u32 core_pcie_dma_rsp_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2603

u32 pcie_sge_dma_rsp_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2604

u32 sge_debug_index6_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2605

u32 sge_utx_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2606

u32 utx_tp_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2607

u32 utx_tpcside_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2608

u32 tpcside_rxarb_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2609

u32 tpeside_mps_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2610

u32 tp_mps_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2611

u32 mps_xgm_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2612

u32 tx_xgm_xgm_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2613

u32 xgm_wire_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2614

u32 tx_macok_wire_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2616

u32 pcie_core_cmd_req_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2617

u32 sge_pcie_cmd_req_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2618

u32 core_pcie_cmd_rsp_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2619

u32 pcie_sge_cmd_rsp_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2620

u32 sge_cim_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2621

u32 pcie_core_dma_req_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2622

u32 sge_pcie_dma_req_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2623

u32 utx_sge_dma_req_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2625

u32 sge_pcie_cmd_req_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2626

u32 pcie_core_cmd_req_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2627

u32 core_pcie_cmd_rsp_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2628

u32 pcie_sge_cmd_rsp_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2629

u32 sge_cim_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2630

u32 pcie_core_dma_req_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2631

u32 sge_pcie_dma_req_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

2632

u32 utx_sge_dma_req_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3012

u32 pcie_core_dmaw_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3013

u32 sge_pcie_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3014

u32 csw_sge_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3015

u32 tp_csw_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3016

u32 tpcside_csw_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3017

u32 ulprx_tpcside_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3018

u32 pmrx_ulprx_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3019

u32 mps_tpeside_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3020

u32 mps_tp_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3021

u32 xgm_mps_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3022

u32 rx_xgm_xgm_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3023

u32 wire_xgm_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3025

u32 pcie_core_dmaw_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3026

u32 sge_pcie_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3027

u32 csw_sge_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3028

u32 tp_csw_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3029

u32 tpcside_csw_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3030

u32 ulprx_tpcside_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3031

u32 pmrx_ulprx_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3032

u32 mps_tpeside_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3033

u32 mps_tp_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3034

u32 xgm_mps_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3035

u32 rx_xgm_xgm_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3036

u32 wire_xgm_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3039

u32 core_pcie_dma_rsp_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3040

u32 pcie_sge_dma_rsp_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3041

u32 sge_debug_index6_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3042

u32 sge_utx_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3043

u32 utx_tp_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3044

u32 sge_work_req_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3045

u32 utx_tpcside_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3046

u32 tpcside_rxarb_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3047

u32 tpeside_mps_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3048

u32 tp_mps_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3049

u32 mps_xgm_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3050

u32 tx_xgm_xgm_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3051

u32 xgm_wire_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3053

u32 core_pcie_dma_rsp_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3054

u32 pcie_sge_dma_rsp_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3055

u32 sge_debug_index6_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3056

u32 sge_utx_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3057

u32 utx_tp_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3058

u32 utx_tpcside_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3059

u32 tpcside_rxarb_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3060

u32 tpeside_mps_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3061

u32 tp_mps_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3062

u32 mps_xgm_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3063

u32 tx_xgm_xgm_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3064

u32 xgm_wire_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3066

u32 pcie_core_cmd_req_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3067

u32 sge_pcie_cmd_req_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3068

u32 core_pcie_cmd_rsp_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3069

u32 pcie_sge_cmd_rsp_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3070

u32 sge_cim_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3071

u32 pcie_core_dma_req_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3072

u32 sge_pcie_dma_req_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3073

u32 utx_sge_dma_req_sop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3075

u32 sge_pcie_cmd_req_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3076

u32 pcie_core_cmd_req_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3077

u32 core_pcie_cmd_rsp_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3078

u32 pcie_sge_cmd_rsp_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3079

u32 sge_cim_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3080

u32 pcie_core_dma_req_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3081

u32 sge_pcie_dma_req_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3082

u32 utx_sge_dma_req_eop = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3532

u32 indirect_addr, const u32 *regs,

usr/src/cmd/cxgbetool/cudbg_view.c

3569

u32 i = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

357

cudbg_view(void *handle, void *pinbuf, u32 inbuf_size,

usr/src/cmd/cxgbetool/cudbg_view.c

3597

u32 indirect_addr;

usr/src/cmd/cxgbetool/cudbg_view.c

3609

n = sizeof(t5_up_cim_reg_array) / (5 * sizeof(u32));

usr/src/cmd/cxgbetool/cudbg_view.c

3611

n = sizeof(t6_up_cim_reg_array) / (5 * sizeof(u32));

usr/src/cmd/cxgbetool/cudbg_view.c

3614

u32 *buff = up_cim_indr->outbuf;

usr/src/cmd/cxgbetool/cudbg_view.c

3619

(const u32 *)buff,

usr/src/cmd/cxgbetool/cudbg_view.c

3624

(const u32 *)buff,

usr/src/cmd/cxgbetool/cudbg_view.c

363

u32 info, offset, max_entities, i;

usr/src/cmd/cxgbetool/cudbg_view.c

3643

print_pbt_addr_entry(struct cudbg_buffer *cudbg_poutbuf, u32 val)

usr/src/cmd/cxgbetool/cudbg_view.c

3646

u32 vld, alloc, pending, address;

usr/src/cmd/cxgbetool/cudbg_view.c

365

u32 next_rec_offset = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

3713

u32 addr;

usr/src/cmd/cxgbetool/cudbg_view.c

3772

u32 indirect_addr;

usr/src/cmd/cxgbetool/cudbg_view.c

3783

n = sizeof(t6_ma_ireg_array) / (4 * sizeof(u32));

usr/src/cmd/cxgbetool/cudbg_view.c

3784

n += sizeof(t6_ma_ireg_array2) / (4 * sizeof(u32));

usr/src/cmd/cxgbetool/cudbg_view.c

3786

u32 *buff = ma_indr->outbuf;

usr/src/cmd/cxgbetool/cudbg_view.c

3789

(const u32 *) buff, cudbg_poutbuf);

usr/src/cmd/cxgbetool/cudbg_view.c

3805

u32 indirect_addr;

usr/src/cmd/cxgbetool/cudbg_view.c

3816

n = sizeof(t6_hma_ireg_array) / (4 * sizeof(u32));

usr/src/cmd/cxgbetool/cudbg_view.c

3818

u32 *buff = hma_indr->outbuf;

usr/src/cmd/cxgbetool/cudbg_view.c

3821

(const u32 *) buff, cudbg_poutbuf);

usr/src/cmd/cxgbetool/cudbg_view.c

3837

u32 indirect_addr;

usr/src/cmd/cxgbetool/cudbg_view.c

3852

n = sizeof(t5_pm_rx_array)/(4 * sizeof(u32));

usr/src/cmd/cxgbetool/cudbg_view.c

3854

u32 *buff = ch_pm->outbuf;

usr/src/cmd/cxgbetool/cudbg_view.c

3857

(const u32 *) buff, cudbg_poutbuf);

usr/src/cmd/cxgbetool/cudbg_view.c

3868

n = sizeof(t5_pm_tx_array)/(4 * sizeof(u32));

usr/src/cmd/cxgbetool/cudbg_view.c

3870

u32 *buff = ch_pm->outbuf;

usr/src/cmd/cxgbetool/cudbg_view.c

3873

(const u32 *) buff, cudbg_poutbuf);

usr/src/cmd/cxgbetool/cudbg_view.c

3934

u32 tid_start = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

4021

u32 index = field->start_bit / 32;

usr/src/cmd/cxgbetool/cudbg_view.c

4022

u32 bits = field->start_bit % 32;

usr/src/cmd/cxgbetool/cudbg_view.c

4023

u32 width = field->end_bit - field->start_bit + 1;

usr/src/cmd/cxgbetool/cudbg_view.c

4024

u32 mask = (1ULL << width) - 1;

usr/src/cmd/cxgbetool/cudbg_view.c

4264

u32 i;

usr/src/cmd/cxgbetool/cudbg_view.c

4355

u32 *pcie_config;

usr/src/cmd/cxgbetool/cudbg_view.c

4365

pcie_config = (u32 *)dc_buff.data;

usr/src/cmd/cxgbetool/cudbg_view.c

4367

(const u32 *)pcie_config, cudbg_poutbuf);

usr/src/cmd/cxgbetool/cudbg_view.c

4378

u32 indirect_addr;

usr/src/cmd/cxgbetool/cudbg_view.c

4392

n = sizeof(t5_pcie_pdbg_array)/(4 * sizeof(u32));

usr/src/cmd/cxgbetool/cudbg_view.c

4394

u32 *buff = ch_pcie->outbuf;

usr/src/cmd/cxgbetool/cudbg_view.c

4397

(const u32 *) buff, cudbg_poutbuf);

usr/src/cmd/cxgbetool/cudbg_view.c

4407

n = sizeof(t5_pcie_cdbg_array)/(4 * sizeof(u32));

usr/src/cmd/cxgbetool/cudbg_view.c

4409

u32 *buff = ch_pcie->outbuf;

usr/src/cmd/cxgbetool/cudbg_view.c

4412

(const u32 *) buff, cudbg_poutbuf);

usr/src/cmd/cxgbetool/cudbg_view.c

4429

u32 indirect_addr;

usr/src/cmd/cxgbetool/cudbg_view.c

4430

u32 *pkey = NULL;

usr/src/cmd/cxgbetool/cudbg_view.c

4446

n = sizeof(t5_tp_pio_array)/(4 * sizeof(u32));

usr/src/cmd/cxgbetool/cudbg_view.c

4448

n = sizeof(t6_tp_pio_array)/(4 * sizeof(u32));

usr/src/cmd/cxgbetool/cudbg_view.c

4451

u32 *buff = ch_tp_pio->outbuf;

usr/src/cmd/cxgbetool/cudbg_view.c

4455

(const u32 *) buff,

usr/src/cmd/cxgbetool/cudbg_view.c

4459

(const u32 *) buff,

usr/src/cmd/cxgbetool/cudbg_view.c

4474

n = sizeof(t5_tp_tm_pio_array)/(4 * sizeof(u32));

usr/src/cmd/cxgbetool/cudbg_view.c

4476

n = sizeof(t6_tp_tm_pio_array)/(4 * sizeof(u32));

usr/src/cmd/cxgbetool/cudbg_view.c

4479

u32 *buff = ch_tp_pio->outbuf;

usr/src/cmd/cxgbetool/cudbg_view.c

4483

(const u32 *)buff,

usr/src/cmd/cxgbetool/cudbg_view.c

4487

(const u32 *)buff,

usr/src/cmd/cxgbetool/cudbg_view.c

4501

n = sizeof(t5_tp_mib_index_array)/(4 * sizeof(u32));

usr/src/cmd/cxgbetool/cudbg_view.c

4503

n = sizeof(t6_tp_mib_index_array)/(4 * sizeof(u32));

usr/src/cmd/cxgbetool/cudbg_view.c

4505

u32 *buff = ch_tp_pio->outbuf;

usr/src/cmd/cxgbetool/cudbg_view.c

4507

pkey = (u32 *) buff;

usr/src/cmd/cxgbetool/cudbg_view.c

454

cudbg_poutbuf.size = (u32)*poutbuf_size;

usr/src/cmd/cxgbetool/cudbg_view.c

4541

find_index_in_t6_sge_regs(u32 addr)

usr/src/cmd/cxgbetool/cudbg_view.c

4543

u32 i = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

4555

print_t6_sge_reg_value(u32 reg_addr, u32 reg_data, u32 data_value,

usr/src/cmd/cxgbetool/cudbg_view.c

4559

u32 value;

usr/src/cmd/cxgbetool/cudbg_view.c

4582

print_sge_qbase(struct sge_qbase_reg_field *sge_qbase, u32 pf_vf_count,

usr/src/cmd/cxgbetool/cudbg_view.c

4585

u32 *data_value;

usr/src/cmd/cxgbetool/cudbg_view.c

4586

u32 f;

usr/src/cmd/cxgbetool/cudbg_view.c

4604

data_value = (u32 *)sge_qbase->pf_data_value[f];

usr/src/cmd/cxgbetool/cudbg_view.c

4606

data_value = (u32 *)sge_qbase->vf_data_value[f];

usr/src/cmd/cxgbetool/cudbg_view.c

4631

u32 indirect_addr;

usr/src/cmd/cxgbetool/cudbg_view.c

4632

u32 *pkey = NULL;

usr/src/cmd/cxgbetool/cudbg_view.c

4642

pkey = (u32 *) (dc_buff.data + sizeof(struct ireg_field));

usr/src/cmd/cxgbetool/cudbg_view.c

4666

pkey = (u32 *)((char *)pkey + sizeof(struct ireg_buf));

usr/src/cmd/cxgbetool/cudbg_view.c

4690

u32 pcie_c0rd_full, pcie_c0wr_full, pcie_c0rsp_full;

usr/src/cmd/cxgbetool/cudbg_view.c

4691

u32 pcie_c1rd_full, pcie_c1wr_full, pcie_c1rsp_full;

usr/src/cmd/cxgbetool/cudbg_view.c

4692

u32 rx_fifo_cng, rx_pcmd_cng, rx_hdr_cng;

usr/src/cmd/cxgbetool/cudbg_view.c

4693

u32 tx, rx, cs, es, pcie, pcie1, sge;

usr/src/cmd/cxgbetool/cudbg_view.c

4695

u32 sge_req_full = 0, sge_rx_full;

usr/src/cmd/cxgbetool/cudbg_view.c

4696

u32 cng0, cng1;

usr/src/cmd/cxgbetool/cudbg_view.c

4698

u32 *sp;

usr/src/cmd/cxgbetool/cudbg_view.c

4704

sp = (u32 *)dc_buff.data;

usr/src/cmd/cxgbetool/cudbg_view.c

4783

u32 sge_rsp_full, sge_req_full, sge_rx_full;

usr/src/cmd/cxgbetool/cudbg_view.c

4784

u32 rx_fifo_cng, rx_pcmd_cng, rx_hdr_cng;

usr/src/cmd/cxgbetool/cudbg_view.c

4786

u32 pcie_rd_full, pcie_wr_full;

usr/src/cmd/cxgbetool/cudbg_view.c

4787

u32 tx, rx, cs, es, pcie, sge;

usr/src/cmd/cxgbetool/cudbg_view.c

4788

u32 cng0, cng1;

usr/src/cmd/cxgbetool/cudbg_view.c

4790

u32 *sp;

usr/src/cmd/cxgbetool/cudbg_view.c

4796

sp = (u32 *)dc_buff.data;

usr/src/cmd/cxgbetool/cudbg_view.c

4935

u32 *value;

usr/src/cmd/cxgbetool/cudbg_view.c

4941

value = (u32 *) dc_buff.data;

usr/src/cmd/cxgbetool/cudbg_view.c

5024

u32 i, j, k, l, max_desc;

usr/src/cmd/cxgbetool/cudbg_view.c

5025

u32 star_count = 0;

usr/src/cmd/cxgbetool/cudbg_view.c

5089

sizeof(u32));

usr/src/cmd/cxgbetool/cudbg_view.c

528

u32 i, *pdata = NULL;

usr/src/cmd/cxgbetool/cudbg_view.c

535

pdata = (u32 *)dc_buff.data;

usr/src/cmd/cxgbetool/cudbg_view.c

550

u32 i, *p, cfg, dc_size;

usr/src/cmd/cxgbetool/cudbg_view.c

558

p = (u32 *)((char *)dc_buff.data + sizeof(cfg));

usr/src/cmd/cxgbetool/cudbg_view.c

559

cfg = *((u32 *)dc_buff.data);

usr/src/cmd/cxgbetool/cudbg_view.c

608

u32 i, *p, cfg, dc_size;

usr/src/cmd/cxgbetool/cudbg_view.c

616

p = (u32 *)((char *)dc_buff.data + sizeof(cfg));

usr/src/cmd/cxgbetool/cudbg_view.c

617

cfg = *((u32 *)dc_buff.data);

usr/src/cmd/cxgbetool/cudbg_view.c

676

u32 *p;

usr/src/cmd/cxgbetool/cudbg_view.c

682

p = (u32 *)dc_buff.data;

usr/src/cmd/cxgbetool/cudbg_view.c

718

u32 *p, *wr;

usr/src/cmd/cxgbetool/cudbg_view.c

852

u32 fw_state;

usr/src/cmd/cxgbetool/cudbg_view.c

963

u32 port_count, i;

usr/src/cmd/cxgbetool/cudbg_view.h

174

void translate_fw_devlog(void *, u32, u32 *, u32 *);

usr/src/cmd/cxgbetool/cudbg_view_compat.h

22

u32 rdptr[CUDBG_NUM_ULPTX];

usr/src/cmd/cxgbetool/cudbg_view_compat.h

23

u32 wrptr[CUDBG_NUM_ULPTX];

usr/src/cmd/cxgbetool/cudbg_view_compat.h

24

u32 rddata[CUDBG_NUM_ULPTX];

usr/src/cmd/cxgbetool/cudbg_view_compat.h

25

u32 rd_data[CUDBG_NUM_ULPTX][CUDBG_NUM_ULPTX_READ];

usr/src/cmd/cxgbetool/cudbg_view_compat.h

31

u32 avail_c;

usr/src/cmd/cxgbetool/cudbg_view_compat.h

32

u32 mem_c;

usr/src/cmd/cxgbetool/cudbg_view_compat.h

33

u32 up_ram_lo;

usr/src/cmd/cxgbetool/cudbg_view_compat.h

34

u32 up_ram_hi;

usr/src/cmd/cxgbetool/cudbg_view_compat.h

35

u32 up_extmem2_lo;

usr/src/cmd/cxgbetool/cudbg_view_compat.h

36

u32 up_extmem2_hi;

usr/src/cmd/cxgbetool/cudbg_view_compat.h

37

u32 rx_pages_data[3];

usr/src/cmd/cxgbetool/cudbg_view_compat.h

38

u32 tx_pages_data[4];

usr/src/cmd/cxgbetool/cudbg_view_compat.h

39

u32 p_structs;

usr/src/cmd/cxgbetool/cudbg_view_compat.h

41

u32 port_used[4];

usr/src/cmd/cxgbetool/cudbg_view_compat.h

42

u32 port_alloc[4];

usr/src/cmd/cxgbetool/cudbg_view_compat.h

43

u32 loopback_used[NCHAN];

usr/src/cmd/cxgbetool/cudbg_view_compat.h

44

u32 loopback_alloc[NCHAN];

usr/src/cmd/cxgbetool/cxgbetool.c

257

int dump_block_regs(const struct reg_info *reg_array, const u32 *regs)

usr/src/cmd/cxgbetool/cxgbetool.c

279

const u32 *regs, const struct mod_regs *modtab,

usr/src/cmd/cxgbetool/cxgbetool.c

346

static int dump_regs_t6(int argc, char *argv[], int start_arg, const u32 *regs)

usr/src/cmd/cxgbetool/cxgbetool.c

662

typedef void (*cudbg_alias_get_entities_cb)(char *dst, u32 dst_size);

usr/src/cmd/cxgbetool/cxgbetool.c

670

cudbg_append_string(char *dst, u32 dst_size, char *src)

usr/src/cmd/cxgbetool/cxgbetool.c

677

cudbg_alias_get_allregs(char *dst, u32 dst_size)

usr/src/cmd/cxgbetool/cxgbetool.c

679

u32 i;

usr/src/cmd/cxgbetool/cxgbetool.c

693

u32 i;

usr/src/cmd/cxgbetool/cxgbetool.c

705

u32 i;

usr/src/cmd/cxgbetool/cxgbetool.c

715

u32 dst_size)

usr/src/cmd/dtrace/test/tst/common/bitfields/tst.bitfields.c

65

uint32_t u32;

usr/src/cmd/dtrace/test/tst/common/bitfields/tst.bitfields.c

88

u32 = (uint32_t)l;

usr/src/cmd/dtrace/test/tst/common/bitfields/tst.bitfields.c

89

mumble(f, (bit0_t *)&u32, (bit1_t *)&u16);

usr/src/cmd/gpioadm/gpioadm_gpio.c

129

if (!xpio_gpio_attr_value_uint32(attr, &u32)) {

usr/src/cmd/gpioadm/gpioadm_gpio.c

133

if (snprintf(buf, buflen, "0x%x", u32) >= buflen) {

usr/src/cmd/gpioadm/gpioadm_gpio.c

81

uint32_t u32;

usr/src/cmd/i2cadm/i2cadm_controller.c

601

uint32_t u32;

usr/src/cmd/i2cadm/i2cadm_controller.c

607

u32 = (uint32_t)strtonumx(val, 0, UINT32_MAX, &errstr,

usr/src/cmd/i2cadm/i2cadm_controller.c

622

(void) memcpy(buf, &u32, sizeof (uint32_t));

usr/src/cmd/i2cadm/i2cadm_io.c

508

uint32_t *u32;

usr/src/cmd/i2cadm/i2cadm_io.c

555

u32 = req->io_wdata;

usr/src/cmd/i2cadm/i2cadm_io.c

556

u32[i] = (uint32_t)ull;

usr/src/cmd/mdb/common/mdb/mdb_linkerset.c

125

uint32_t u32;

usr/src/cmd/mdb/common/mdb/mdb_linkerset.c

131

n = mdb_vread(&val.u32, sizeof (uint32_t), addr);

usr/src/cmd/mdb/common/mdb/mdb_linkerset.c

132

*addrp = (uintptr_t)val.u32;

usr/src/cmd/od/od.c

135

DECL_GET(u32)

usr/src/cmd/od/od.c

159

DECL_OUT(oct_d, u32, " %011o")

usr/src/cmd/od/od.c

163

DECL_OUT(dec_d, u32, " %010u")

usr/src/cmd/pcieadm/pcieadm_bar.c

739

uint32_t u32;

usr/src/cmd/pcieadm/pcieadm_bar.c

762

u32 = (uint32_t)value;

usr/src/cmd/pcieadm/pcieadm_bar.c

763

(void) memcpy(buf, &u32, sizeof (uint32_t));

usr/src/cmd/prtconf/pdevinfo.c

1072

uint32_t u32;

usr/src/cmd/prtconf/pdevinfo.c

1094

(void) memcpy(&u32, value, sizeof (u32));

usr/src/cmd/prtconf/pdevinfo.c

1095

if (u32 > UINT16_MAX) {

usr/src/cmd/prtconf/pdevinfo.c

1099

*valp = (uint16_t)u32;

usr/src/common/crypto/chacha/chacha.c

20

#define U32V(v) ((u32)(v) & U32C(0xFFFFFFFF))

usr/src/common/crypto/chacha/chacha.c

26

(((u32)((p)[0]) ) | \

usr/src/common/crypto/chacha/chacha.c

27

((u32)((p)[1]) << 8) | \

usr/src/common/crypto/chacha/chacha.c

28

((u32)((p)[2]) << 16) | \

usr/src/common/crypto/chacha/chacha.c

29

((u32)((p)[3]) << 24))

usr/src/common/crypto/chacha/chacha.c

54

chacha_keysetup(chacha_ctx_t *x, const u8 *k, u32 kbits, u32 ivbits __unused)

usr/src/common/crypto/chacha/chacha.c

88

chacha_encrypt_bytes(chacha_ctx_t *x, const u8 *m, u8 *c, u32 bytes)

usr/src/common/crypto/chacha/chacha.c

90

u32 x0, x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15;

usr/src/common/crypto/chacha/chacha.c

91

u32 j0, j1, j2, j3, j4, j5, j6, j7, j8, j9, j10, j11, j12, j13, j14, j15;

usr/src/grub/grub-0.97/netboot/davicom.c

169

static void phy_write_1bit(u32, u32);

usr/src/grub/grub-0.97/netboot/davicom.c

170

static int phy_read_1bit(u32);

usr/src/grub/grub-0.97/netboot/davicom.c

212

u32 io_dcr9;

usr/src/grub/grub-0.97/netboot/davicom.c

256

u32 io_dcr9;

usr/src/grub/grub-0.97/netboot/davicom.c

294

static void phy_write_1bit(u32 ee_addr, u32 phy_data)

usr/src/grub/grub-0.97/netboot/davicom.c

308

static int phy_read_1bit(u32 ee_addr)

usr/src/grub/grub-0.97/netboot/eepro100.c

209

u32 tx_good_frames;

usr/src/grub/grub-0.97/netboot/eepro100.c

210

u32 tx_coll16_errs;

usr/src/grub/grub-0.97/netboot/eepro100.c

211

u32 tx_late_colls;

usr/src/grub/grub-0.97/netboot/eepro100.c

212

u32 tx_underruns;

usr/src/grub/grub-0.97/netboot/eepro100.c

213

u32 tx_lost_carrier;

usr/src/grub/grub-0.97/netboot/eepro100.c

214

u32 tx_deferred;

usr/src/grub/grub-0.97/netboot/eepro100.c

215

u32 tx_one_colls;

usr/src/grub/grub-0.97/netboot/eepro100.c

216

u32 tx_multi_colls;

usr/src/grub/grub-0.97/netboot/eepro100.c

217

u32 tx_total_colls;

usr/src/grub/grub-0.97/netboot/eepro100.c

218

u32 rx_good_frames;

usr/src/grub/grub-0.97/netboot/eepro100.c

219

u32 rx_crc_errs;

usr/src/grub/grub-0.97/netboot/eepro100.c

220

u32 rx_align_errs;

usr/src/grub/grub-0.97/netboot/eepro100.c

221

u32 rx_resource_errs;

usr/src/grub/grub-0.97/netboot/eepro100.c

222

u32 rx_overrun_errs;

usr/src/grub/grub-0.97/netboot/eepro100.c

223

u32 rx_colls_errs;

usr/src/grub/grub-0.97/netboot/eepro100.c

224

u32 rx_runt_errs;

usr/src/grub/grub-0.97/netboot/eepro100.c

225

u32 done_marker;

usr/src/grub/grub-0.97/netboot/eepro100.c

232

u32 link; /* void * */

usr/src/grub/grub-0.97/netboot/eepro100.c

233

u32 tx_desc_addr; /* (almost) Always points to the tx_buf_addr element. */

usr/src/grub/grub-0.97/netboot/eepro100.c

236

u32 tx_buf_addr0; /* void *, header of frame to be transmitted. */

usr/src/grub/grub-0.97/netboot/eepro100.c

238

u32 tx_buf_addr1; /* void *, data to be transmitted. */

usr/src/grub/grub-0.97/netboot/eepro100.c

245

u32 link; /* struct RxFD * */

usr/src/grub/grub-0.97/netboot/eepro100.c

246

u32 rx_buf_addr; /* void * */

usr/src/grub/grub-0.97/netboot/eepro100.c

266

u32 link;

usr/src/grub/grub-0.97/netboot/forcedeth.c

287

u32 PacketBuffer;

usr/src/grub/grub-0.97/netboot/forcedeth.c

314

u32 linkspeed;

usr/src/grub/grub-0.97/netboot/forcedeth.c

320

u32 orig_mac[2];

usr/src/grub/grub-0.97/netboot/forcedeth.c

321

u32 irqmask;

usr/src/grub/grub-0.97/netboot/forcedeth.c

328

u32 rx_dma[RX_RING];

usr/src/grub/grub-0.97/netboot/forcedeth.c

337

u32 tx_dma[TX_RING];

usr/src/grub/grub-0.97/netboot/forcedeth.c

348

static int reg_delay(int offset, u32 mask,

usr/src/grub/grub-0.97/netboot/forcedeth.c

349

u32 target, int delay, int delaymax, const char *msg)

usr/src/grub/grub-0.97/netboot/forcedeth.c

397

u32 reg;

usr/src/grub/grub-0.97/netboot/forcedeth.c

548

u32 newls;

usr/src/grub/grub-0.97/netboot/forcedeth.c

604

u32 addr[2];

usr/src/grub/grub-0.97/netboot/forcedeth.c

605

u32 mask[2];

usr/src/grub/grub-0.97/netboot/forcedeth.c

606

u32 pff;

usr/src/grub/grub-0.97/netboot/forcedeth.c

607

u32 alwaysOff[2];

usr/src/grub/grub-0.97/netboot/forcedeth.c

608

u32 alwaysOn[2];

usr/src/grub/grub-0.97/netboot/forcedeth.c

662

u32 mac[2];

usr/src/grub/grub-0.97/netboot/forcedeth.c

742

writel((u32) virt_to_le32desc(&rx_ring[0]),

usr/src/grub/grub-0.97/netboot/forcedeth.c

744

writel((u32) virt_to_le32desc(&tx_ring[0]),

usr/src/grub/grub-0.97/netboot/forcedeth.c

863

tx_ring[nr].PacketBuffer = (u32) virt_to_le32desc(ptxb);

usr/src/grub/grub-0.97/netboot/natsemi.c

166

u32 link;

usr/src/grub/grub-0.97/netboot/natsemi.c

167

volatile u32 cmdsts;

usr/src/grub/grub-0.97/netboot/natsemi.c

168

u32 bufptr;

usr/src/grub/grub-0.97/netboot/natsemi.c

169

u32 software_use;

usr/src/grub/grub-0.97/netboot/natsemi.c

188

static u32 SavedClkRun;

usr/src/grub/grub-0.97/netboot/natsemi.c

248

u32 tmp;

usr/src/grub/grub-0.97/netboot/natsemi.c

272

u32 newtmp = tmp & ~(0x03|0x100);

usr/src/grub/grub-0.97/netboot/natsemi.c

295

u32 chip_config = inl(ioaddr + ChipConfig);

usr/src/grub/grub-0.97/netboot/natsemi.c

507

txd.link = (u32) 0;

usr/src/grub/grub-0.97/netboot/natsemi.c

508

txd.cmdsts = (u32) 0;

usr/src/grub/grub-0.97/netboot/natsemi.c

537

rxd[i].cmdsts = (u32) RX_BUF_SIZE;

usr/src/grub/grub-0.97/netboot/natsemi.c

565

u32 rx_mode = RxFilterEnable | AcceptBroadcast |

usr/src/grub/grub-0.97/netboot/natsemi.c

609

u32 to, nstype;

usr/src/grub/grub-0.97/netboot/natsemi.c

610

u32 tx_status;

usr/src/grub/grub-0.97/netboot/natsemi.c

639

txd.cmdsts = (u32) OWN | s;

usr/src/grub/grub-0.97/netboot/natsemi.c

649

while ((((volatile u32) tx_status=txd.cmdsts) & OWN) && (currticks() < to))

usr/src/grub/grub-0.97/netboot/natsemi.c

678

u32 rx_status = rxd[cur_rx].cmdsts;

usr/src/grub/grub-0.97/netboot/ns83820.c

361

u32 cmdsts;

usr/src/grub/grub-0.97/netboot/ns83820.c

362

u32 extsts; /* Extended status field */

usr/src/grub/grub-0.97/netboot/ns83820.c

366

u32 link;

usr/src/grub/grub-0.97/netboot/ns83820.c

367

u32 bufptr;

usr/src/grub/grub-0.97/netboot/ns83820.c

368

u32 cmdsts;

usr/src/grub/grub-0.97/netboot/ns83820.c

369

u32 extsts; /* Extended status field */

usr/src/grub/grub-0.97/netboot/ns83820.c

397

u32 *next_rx_desc;

usr/src/grub/grub-0.97/netboot/ns83820.c

399

u32 cur_rx;

usr/src/grub/grub-0.97/netboot/ns83820.c

400

u32 *descs;

usr/src/grub/grub-0.97/netboot/ns83820.c

402

u32 CFG_cache;

usr/src/grub/grub-0.97/netboot/ns83820.c

403

u32 MEAR_cache;

usr/src/grub/grub-0.97/netboot/ns83820.c

404

u32 IMR_cache;

usr/src/grub/grub-0.97/netboot/ns83820.c

409

u32 phy_descs;

usr/src/grub/grub-0.97/netboot/ns83820.c

410

u32 *tx_descs;

usr/src/grub/grub-0.97/netboot/ns83820.c

419

u32 cfg, new_cfg;

usr/src/grub/grub-0.97/netboot/ns83820.c

420

u32 tbisr, tanar, tanlpar;

usr/src/grub/grub-0.97/netboot/ns83820.c

556

static void ns83820_do_reset(struct nic *nic __unused, u32 which)

usr/src/grub/grub-0.97/netboot/ns83820.c

591

u32 data;

usr/src/grub/grub-0.97/netboot/ns83820.c

605

u32 and_mask = 0xffffffff;

usr/src/grub/grub-0.97/netboot/ns83820.c

606

u32 or_mask = 0;

usr/src/grub/grub-0.97/netboot/ns83820.c

607

u32 val;

usr/src/grub/grub-0.97/netboot/ns83820.c

619

u32 enable, u32 done, u32 fail)

usr/src/grub/grub-0.97/netboot/ns83820.c

623

u32 status;

usr/src/grub/grub-0.97/netboot/ns83820.c

658

u32 isr = readl(ns->base + ISR);

usr/src/grub/grub-0.97/netboot/ns83820.c

678

u32 cmdsts;

usr/src/grub/grub-0.97/netboot/ns83820.c

725

u32 cmdsts, extsts;

usr/src/grub/grub-0.97/netboot/ns83820.c

727

u32 isr = readl(ns->base + ISR);

usr/src/grub/grub-0.97/netboot/pcnet32.c

199

u32 base;

usr/src/grub/grub-0.97/netboot/pcnet32.c

202

u32 msg_length;

usr/src/grub/grub-0.97/netboot/pcnet32.c

203

u32 reserved;

usr/src/grub/grub-0.97/netboot/pcnet32.c

207

u32 base;

usr/src/grub/grub-0.97/netboot/pcnet32.c

210

u32 misc;

usr/src/grub/grub-0.97/netboot/pcnet32.c

211

u32 reserved;

usr/src/grub/grub-0.97/netboot/pcnet32.c

220

u32 filter[2];

usr/src/grub/grub-0.97/netboot/pcnet32.c

222

u32 rx_ring;

usr/src/grub/grub-0.97/netboot/pcnet32.c

223

u32 tx_ring;

usr/src/grub/grub-0.97/netboot/pcnet32.c

412

rx_ring[i].base = (u32) virt_to_le32desc(&rxb[i]);

usr/src/grub/grub-0.97/netboot/pcnet32.c

429

lp->init_block.rx_ring = (u32) virt_to_le32desc(&rx_ring[0]);

usr/src/grub/grub-0.97/netboot/pcnet32.c

430

lp->init_block.tx_ring = (u32) virt_to_le32desc(&tx_ring[0]);

usr/src/grub/grub-0.97/netboot/pcnet32.c

610

tx_ring[entry].base = (u32) virt_to_le32desc(ptxb);

usr/src/grub/grub-0.97/netboot/pcnet32.c

64

static u32 ioaddr; /* Globally used for the card's io address */

usr/src/grub/grub-0.97/netboot/r8169.c

259

u32 RxConfigMask; /* should clear the bits supported by this chip */

usr/src/grub/grub-0.97/netboot/r8169.c

272

u32 status;

usr/src/grub/grub-0.97/netboot/r8169.c

273

u32 vlan_tag;

usr/src/grub/grub-0.97/netboot/r8169.c

274

u32 buf_addr;

usr/src/grub/grub-0.97/netboot/r8169.c

275

u32 buf_Haddr;

usr/src/grub/grub-0.97/netboot/r8169.c

279

u32 status;

usr/src/grub/grub-0.97/netboot/r8169.c

280

u32 vlan_tag;

usr/src/grub/grub-0.97/netboot/r8169.c

281

u32 buf_addr;

usr/src/grub/grub-0.97/netboot/r8169.c

282

u32 buf_Haddr;

usr/src/grub/grub-0.97/netboot/r8169.c

367

u32 tmp;

usr/src/grub/grub-0.97/netboot/r8169.c

508

u32 to;

usr/src/grub/grub-0.97/netboot/r8169.c

546

u32 mc_filter[2]; /* Multicast hash filter */

usr/src/grub/grub-0.97/netboot/r8169.c

548

u32 tmp = 0;

usr/src/grub/grub-0.97/netboot/r8169.c

566

u32 i;

usr/src/grub/grub-0.97/netboot/r8169.c

64

static u32 ioaddr;

usr/src/grub/grub-0.97/netboot/r8169.c

645

u32 TxPhyAddr, RxPhyAddr;

usr/src/grub/grub-0.97/netboot/sis900.c

1028

u32 status;

usr/src/grub/grub-0.97/netboot/sis900.c

1078

u32 to, nstype;

usr/src/grub/grub-0.97/netboot/sis900.c

1079

u32 tx_status;

usr/src/grub/grub-0.97/netboot/sis900.c

1108

txd.cmdsts = (u32) OWN | s;

usr/src/grub/grub-0.97/netboot/sis900.c

1118

while ((((volatile u32) tx_status=txd.cmdsts) & OWN) && (currticks() < to))

usr/src/grub/grub-0.97/netboot/sis900.c

1150

u32 rx_status = rxd[cur_rx].cmdsts;

usr/src/grub/grub-0.97/netboot/sis900.c

203

u32 waittime = 0;

usr/src/grub/grub-0.97/netboot/sis900.c

278

u32 rfcrSave;

usr/src/grub/grub-0.97/netboot/sis900.c

279

u32 i;

usr/src/grub/grub-0.97/netboot/sis900.c

450

u32 read_cmd = location | EEread;

usr/src/grub/grub-0.97/netboot/sis900.c

459

u32 dataval = (read_cmd & (1 << i)) ? EEDI | EECS : EECS;

usr/src/grub/grub-0.97/netboot/sis900.c

629

u32 status = TxRCMP | RxRCMP;

usr/src/grub/grub-0.97/netboot/sis900.c

660

u32 rfcrSave;

usr/src/grub/grub-0.97/netboot/sis900.c

670

u32 w;

usr/src/grub/grub-0.97/netboot/sis900.c

672

w = (u32) *((u16 *)(nic->node_addr)+i);

usr/src/grub/grub-0.97/netboot/sis900.c

698

txd.link = (u32) 0;

usr/src/grub/grub-0.97/netboot/sis900.c

699

txd.cmdsts = (u32) 0;

usr/src/grub/grub-0.97/netboot/sis900.c

728

rxd[i].cmdsts = (u32) RX_BUF_SIZE;

usr/src/grub/grub-0.97/netboot/sis900.c

758

u32 rx_mode;

usr/src/grub/grub-0.97/netboot/sis900.c

774

outl((u32)(0x00000004+i) << RFADDR_shift, ioaddr + rfcr);

usr/src/grub/grub-0.97/netboot/sis900.c

799

u32 tx_flags = 0, rx_flags = 0;

usr/src/grub/grub-0.97/netboot/sis900.c

844

u32 status;

usr/src/grub/grub-0.97/netboot/sis900.c

945

u32 status;

usr/src/grub/grub-0.97/netboot/sis900.c

984

u32 status;

usr/src/grub/grub-0.97/netboot/sis900.h

377

u32 link;

usr/src/grub/grub-0.97/netboot/sis900.h

378

volatile u32 cmdsts;

usr/src/grub/grub-0.97/netboot/sis900.h

379

u32 bufptr;

usr/src/grub/grub-0.97/netboot/sundance.c

233

u32 next_desc;

usr/src/grub/grub-0.97/netboot/sundance.c

234

u32 status;

usr/src/grub/grub-0.97/netboot/sundance.c

235

u32 addr;

usr/src/grub/grub-0.97/netboot/sundance.c

236

u32 length;

usr/src/grub/grub-0.97/netboot/sundance.c

268

static u32 BASE;

usr/src/grub/grub-0.97/netboot/sundance.c

474

u32 frame_status = le32_to_cpu(rx_ring[entry].status);

usr/src/grub/grub-0.97/netboot/sundance.c

521

u32 to;

usr/src/grub/grub-0.97/netboot/sundance.c

871

u32 rx_mode;

usr/src/grub/grub-0.97/netboot/tlan.c

103

static void TLan_MiiSendData(u16, u32, unsigned);

usr/src/grub/grub-0.97/netboot/tlan.c

1189

u32 i;

usr/src/grub/grub-0.97/netboot/tlan.c

126

u32 pci, pci_mask, subsystem, subsystem_mask;

usr/src/grub/grub-0.97/netboot/tlan.c

1264

void TLan_MiiSendData(u16 base_port, u32 data, unsigned num_bits)

usr/src/grub/grub-0.97/netboot/tlan.c

1267

u32 i;

usr/src/grub/grub-0.97/netboot/tlan.c

127

u32 revision, revision_mask; /* Only 8 bits. */

usr/src/grub/grub-0.97/netboot/tlan.c

129

u32 flags;

usr/src/grub/grub-0.97/netboot/tlan.c

1436

u32 phy;

usr/src/grub/grub-0.97/netboot/tlan.c

187

u32 forward;

usr/src/grub/grub-0.97/netboot/tlan.c

191

u32 count;

usr/src/grub/grub-0.97/netboot/tlan.c

192

u32 address;

usr/src/grub/grub-0.97/netboot/tlan.c

221

u32 rxHead;

usr/src/grub/grub-0.97/netboot/tlan.c

222

u32 rxTail;

usr/src/grub/grub-0.97/netboot/tlan.c

223

u32 rxEocCount;

usr/src/grub/grub-0.97/netboot/tlan.c

230

u32 txHead;

usr/src/grub/grub-0.97/netboot/tlan.c

231

u32 txInProgress;

usr/src/grub/grub-0.97/netboot/tlan.c

232

u32 txTail;

usr/src/grub/grub-0.97/netboot/tlan.c

234

u32 txBusyCount;

usr/src/grub/grub-0.97/netboot/tlan.c

235

u32 phyOnline;

usr/src/grub/grub-0.97/netboot/tlan.c

236

u32 timerSetAt;

usr/src/grub/grub-0.97/netboot/tlan.c

237

u32 timerType;

usr/src/grub/grub-0.97/netboot/tlan.c

238

u32 adapterRev;

usr/src/grub/grub-0.97/netboot/tlan.c

239

u32 aui;

usr/src/grub/grub-0.97/netboot/tlan.c

240

u32 debug;

usr/src/grub/grub-0.97/netboot/tlan.c

241

u32 duplex;

usr/src/grub/grub-0.97/netboot/tlan.c

242

u32 phy[2];

usr/src/grub/grub-0.97/netboot/tlan.c

243

u32 phyNum;

usr/src/grub/grub-0.97/netboot/tlan.c

244

u32 speed;

usr/src/grub/grub-0.97/netboot/tlan.c

255

u32 BASE;

usr/src/grub/grub-0.97/netboot/tlan.c

336

u32 addr;

usr/src/grub/grub-0.97/netboot/tlan.c

337

u32 data;

usr/src/grub/grub-0.97/netboot/tlan.c

416

u32 phy;

usr/src/grub/grub-0.97/netboot/tlan.c

534

u32 framesize;

usr/src/grub/grub-0.97/netboot/tlan.c

535

u32 host_cmd = 0;

usr/src/grub/grub-0.97/netboot/tlan.c

536

u32 ack = 1;

usr/src/grub/grub-0.97/netboot/tlan.c

617

u32 to;

usr/src/grub/grub-0.97/netboot/tlan.c

621

u32 ack = 0;

usr/src/grub/grub-0.97/netboot/tlan.c

622

u32 host_cmd;

usr/src/grub/grub-0.97/netboot/tlan.c

685

tail_list->buffer[0].count = TLAN_LAST_BUFFER | (u32) s;

usr/src/grub/grub-0.97/netboot/tlan.c

868

if ((((u32) pci->dev_id << 16) | pci->vendor) ==

usr/src/grub/grub-0.97/netboot/tlan.h

416

inline u32 TLan_DioRead32(u16 base_addr, u16 internal_addr)

usr/src/grub/grub-0.97/netboot/tlan.h

446

inline void TLan_DioWrite32(u16 base_addr, u16 internal_addr, u32 data)

usr/src/grub/grub-0.97/netboot/tlan.h

485

inline u32 TLan_HashFunc(u8 * a)

usr/src/grub/grub-0.97/netboot/tlan.h

501

inline u32 xor(u32 a, u32 b)

usr/src/grub/grub-0.97/netboot/tlan.h

509

inline u32 TLan_HashFunc(u8 * a)

usr/src/grub/grub-0.97/netboot/tlan.h

511

u32 hash;

usr/src/grub/grub-0.97/netboot/tlan.h

99

u32 flags;

usr/src/grub/grub-0.97/netboot/tulip.c

1015

u32 tx_flags = 0x08000000 | 192;

usr/src/grub/grub-0.97/netboot/tulip.c

1074

u32 to;

usr/src/grub/grub-0.97/netboot/tulip.c

1075

u32 csr6 = inl(ioaddr + CSR6);

usr/src/grub/grub-0.97/netboot/tulip.c

1211

u32 i;

usr/src/grub/grub-0.97/netboot/tulip.c

1262

if ( (((u32) tp->dev_id << 16) | tp->vendor_id) ==

usr/src/grub/grub-0.97/netboot/tulip.c

1336

put_unaligned(inl(ioaddr + 0xA4), (u32 *)nic->node_addr);

usr/src/grub/grub-0.97/netboot/tulip.c

1699

u32 phy_reg = inl(ioaddr + 0xB8);

usr/src/grub/grub-0.97/netboot/tulip.c

1700

u32 new_csr6 = tp->csr6 & ~0x40C40200;

usr/src/grub/grub-0.97/netboot/tulip.c

1737

u32 new_csr6;

usr/src/grub/grub-0.97/netboot/tulip.c

174

u32 pci, pci_mask, subsystem, subsystem_mask;

usr/src/grub/grub-0.97/netboot/tulip.c

175

u32 revision, revision_mask; /* Only 8 bits. */

usr/src/grub/grub-0.97/netboot/tulip.c

1763

u32 csr13val, csr14val, csr15dir, csr15val;

usr/src/grub/grub-0.97/netboot/tulip.c

329

u32 csr15dir, csr15val; /* 21143 NWay setting. */

usr/src/grub/grub-0.97/netboot/tulip.c

377

volatile u32 status;

usr/src/grub/grub-0.97/netboot/tulip.c

378

u32 length;

usr/src/grub/grub-0.97/netboot/tulip.c

379

u32 buffer1, buffer2;

usr/src/grub/grub-0.97/netboot/tulip.c

383

volatile u32 status;

usr/src/grub/grub-0.97/netboot/tulip.c

384

u32 length;

usr/src/grub/grub-0.97/netboot/tulip.c

385

u32 buffer1, buffer2;

usr/src/grub/grub-0.97/netboot/tulip.c

392

static u32 ioaddr;

usr/src/grub/grub-0.97/netboot/tulip.c

852

u32 base15 = (p[2] & 0x40) ? get_u16(p + 7) : 0x0008;

usr/src/grub/grub-0.97/netboot/tulip.c

983

u32 addr_high = (nic->node_addr[1]<<8) + (nic->node_addr[0]<<0);

usr/src/grub/grub-0.97/netboot/tulip.c

993

u32 addr_low = cpu_to_le32(get_unaligned((u32 *)nic->node_addr));

usr/src/grub/grub-0.97/netboot/tulip.c

994

u32 addr_high = cpu_to_le32(get_unaligned((u16 *)(nic->node_addr+4)));

usr/src/grub/grub-0.97/netboot/w89c840.c

146

static u32 driver_flags = CanHaveMII | HasBrokenTx;

usr/src/grub/grub-0.97/netboot/w89c840.c

209

u32 buffer1;

usr/src/grub/grub-0.97/netboot/w89c840.c

210

u32 next_desc;

usr/src/grub/grub-0.97/netboot/w89c840.c

216

u32 buffer1, buffer2; /* We use only buffer 1. */

usr/src/grub/grub-0.97/netboot/w89c840.c

275

static void decode_interrupt(u32 intr_status)

usr/src/grub/grub-0.97/netboot/w89c840.c

349

static void handle_intr(u32 intr_stat)

usr/src/grub/grub-0.97/netboot/w89c840.c

387

u32 intr_status = readl(ioaddr + IntrStatus);

usr/src/grub/grub-0.97/netboot/w89c840.c

515

w840private.tx_ring[entry].length = (DescWholePkt | (u32) s);

usr/src/grub/grub-0.97/netboot/w89c840.c

545

u32 intr_stat = 0;

usr/src/grub/grub-0.97/netboot/w89c840.c

881

u32 mc_filter[2]; /* Multicast hash filter */

usr/src/grub/grub-0.97/netboot/w89c840.c

882

u32 rx_mode;

usr/src/grub/grub-0.97/stage2/fsys_jfs.c

106

di_read (u32 inum, dinode_t *di)

usr/src/grub/grub-0.97/stage2/fsys_jfs.c

109

u32 xd, ioffset;

usr/src/grub/grub-0.97/stage2/fsys_jfs.c

278

u32 inum, parent_inum;

usr/src/grub/grub-0.97/stage2/fsys_jfs.c

280

u32 di_mode;

usr/src/grub/grub-0.97/stage2/jfs.h

121

u32 tv_sec;

usr/src/grub/grub-0.97/stage2/jfs.h

122

u32 tv_nsec;

usr/src/grub/grub-0.97/stage2/jfs.h

131

u32 addr2;

usr/src/grub/grub-0.97/stage2/jfs.h

144

u32 size; /* 4: size in byte */

usr/src/grub/grub-0.97/stage2/jfs.h

147

u32 addr2; /* 4: address in unit of fsblksize */

usr/src/grub/grub-0.97/stage2/jfs.h

158

u32 limit_lo; /* DASD limit (in logical blocks) */

usr/src/grub/grub-0.97/stage2/jfs.h

161

u32 used_lo; /* DASD usage (in logical blocks) */

usr/src/grub/grub-0.97/stage2/jfs.h

171

u32 s_magic; /* 4: magic number */

usr/src/grub/grub-0.97/stage2/jfs.h

172

u32 s_version; /* 4: version number */

usr/src/grub/grub-0.97/stage2/jfs.h

186

u32 s_agsize; /* 4: allocation group size in aggr. blocks */

usr/src/grub/grub-0.97/stage2/jfs.h

188

u32 s_flag; /* 4: aggregate attributes:

usr/src/grub/grub-0.97/stage2/jfs.h

191

u32 s_state; /* 4: mount/unmount/recovery state:

usr/src/grub/grub-0.97/stage2/jfs.h

203

u32 s_logdev; /* 4: device address of log */

usr/src/grub/grub-0.97/stage2/jfs.h

307

u32 inumber; /* 4: 4-byte aligned */

usr/src/grub/grub-0.97/stage2/jfs.h

311

u32 index; /* 4: index into dir_table */

usr/src/grub/grub-0.97/stage2/jfs.h

329

u32 addr2; /* 4: lower 32 bits of leaf page address -OR-

usr/src/grub/grub-0.97/stage2/jfs.h

347

u32 idotdot; /* 4: parent inode number */

usr/src/grub/grub-0.97/stage2/jfs.h

407

u32 off2; /* 4: offset in unit of fsblksize */

usr/src/grub/grub-0.97/stage2/jfs.h

410

u32 addr2; /* 4: address in unit of fsblksize */

usr/src/grub/grub-0.97/stage2/jfs.h

451

u32 di_inostamp; /* 4: stamp to show inode belongs to fileset */

usr/src/grub/grub-0.97/stage2/jfs.h

453

u32 di_number; /* 4: inode number, aka file serial number */

usr/src/grub/grub-0.97/stage2/jfs.h

454

u32 di_gen; /* 4: inode generation number */

usr/src/grub/grub-0.97/stage2/jfs.h

461

u32 di_nlink; /* 4: number of links to the object */

usr/src/grub/grub-0.97/stage2/jfs.h

463

u32 di_uid; /* 4: user id of owner */

usr/src/grub/grub-0.97/stage2/jfs.h

464

u32 di_gid; /* 4: group id of owner */

usr/src/grub/grub-0.97/stage2/jfs.h

466

u32 di_mode; /* 4: attribute, format and permission */

usr/src/grub/grub-0.97/stage2/jfs.h

515

u32 _gengen; /* 4: generator */

usr/src/grub/grub-0.97/stage2/jfs.h

526

u32 _rdev; /* 4: */

usr/src/grub/grub-0.97/stage2/jfs.h

596

u32 wmap[EXTSPERIAG]; /* 512: working allocation map */

usr/src/grub/grub-0.97/stage2/jfs.h

597

u32 pmap[EXTSPERIAG]; /* 512: persistent allocation map */

usr/src/lib/iconv_modules/ja/common/EUC-JIS-2004_TO_Unicode.c

101

PUTU(u32, "CS1->BMP");

usr/src/lib/iconv_modules/ja/common/EUC-JIS-2004_TO_Unicode.c

109

u32 = (unsigned int)

usr/src/lib/iconv_modules/ja/common/EUC-JIS-2004_TO_Unicode.c

111

PUTU(u32, "CS2->Kana");

usr/src/lib/iconv_modules/ja/common/EUC-JIS-2004_TO_Unicode.c

121

u32 = (unsigned int)

usr/src/lib/iconv_modules/ja/common/EUC-JIS-2004_TO_Unicode.c

124

if (IFHISUR(u32)) {

usr/src/lib/iconv_modules/ja/common/EUC-JIS-2004_TO_Unicode.c

125

u32 = _jfp_lookup_x0213_nonbmp(

usr/src/lib/iconv_modules/ja/common/EUC-JIS-2004_TO_Unicode.c

126

e16, u32);

usr/src/lib/iconv_modules/ja/common/EUC-JIS-2004_TO_Unicode.c

127

PUTU(u32, "CS3->NONBMP");

usr/src/lib/iconv_modules/ja/common/EUC-JIS-2004_TO_Unicode.c

129

PUTU(u32, "CS3->BMP");

usr/src/lib/iconv_modules/ja/common/EUC-JIS-2004_TO_Unicode.c

138

u32 = ic1;

usr/src/lib/iconv_modules/ja/common/EUC-JIS-2004_TO_Unicode.c

139

PUTU(u32, "E2BIG C1CTRL");

usr/src/lib/iconv_modules/ja/common/EUC-JIS-2004_TO_Unicode.c

53

unsigned int u32; /* UTF-32 */

usr/src/lib/iconv_modules/ja/common/EUC-JIS-2004_TO_Unicode.c

81

u32 = (unsigned int)_jfp_tbl_jisx0201roman_to_ucs2[ic1];

usr/src/lib/iconv_modules/ja/common/EUC-JIS-2004_TO_Unicode.c

82

PUTU(u32, "CS0");

usr/src/lib/iconv_modules/ja/common/EUC-JIS-2004_TO_Unicode.c

87

u32 = (unsigned int)_jfp_tbl_jisx0208_to_ucs2[

usr/src/lib/iconv_modules/ja/common/EUC-JIS-2004_TO_Unicode.c

89

if (IFHISUR(u32)) {

usr/src/lib/iconv_modules/ja/common/EUC-JIS-2004_TO_Unicode.c

90

u32 = _jfp_lookup_x0213_nonbmp(

usr/src/lib/iconv_modules/ja/common/EUC-JIS-2004_TO_Unicode.c

91

e16, u32);

usr/src/lib/iconv_modules/ja/common/EUC-JIS-2004_TO_Unicode.c

92

PUTU(u32, "CS1->NONBMP");

usr/src/lib/iconv_modules/ja/common/EUC-JIS-2004_TO_Unicode.c

93

} else if (u32 == 0xffff) {

usr/src/lib/iconv_modules/ja/common/EUC-JIS-2004_TO_Unicode.c

96

u32 = _jfp_lookup_x0213_compose(

usr/src/lib/iconv_modules/ja/common/EUC-JIS-2004_TO_Unicode.c

98

PUTU(u32, "CS1->CP1");

usr/src/lib/iconv_modules/ja/common/ISO-2022-JP-2004_TO_Unicode.c

146

u32 = (unsigned int)_jfp_tbl_jisx0201roman_to_ucs2[ic1];

usr/src/lib/iconv_modules/ja/common/ISO-2022-JP-2004_TO_Unicode.c

147

PUTU(u32, "IRV");

usr/src/lib/iconv_modules/ja/common/ISO-2022-JP-2004_TO_Unicode.c

157

u32 = (unsigned int)_jfp_tbl_jisx0208_to_ucs2[

usr/src/lib/iconv_modules/ja/common/ISO-2022-JP-2004_TO_Unicode.c

159

if (IFHISUR(u32)) {

usr/src/lib/iconv_modules/ja/common/ISO-2022-JP-2004_TO_Unicode.c

160

u32 = _jfp_lookup_x0213_nonbmp(e16, u32);

usr/src/lib/iconv_modules/ja/common/ISO-2022-JP-2004_TO_Unicode.c

161

PUTU(u32, "PLANE1->NONBMP");

usr/src/lib/iconv_modules/ja/common/ISO-2022-JP-2004_TO_Unicode.c

162

} else if (u32 == 0xffff) {

usr/src/lib/iconv_modules/ja/common/ISO-2022-JP-2004_TO_Unicode.c

165

u32 = _jfp_lookup_x0213_compose(e16, &u32_2);

usr/src/lib/iconv_modules/ja/common/ISO-2022-JP-2004_TO_Unicode.c

166

PUTU(u32, "PLANE1->CP1");

usr/src/lib/iconv_modules/ja/common/ISO-2022-JP-2004_TO_Unicode.c

169

PUTU(u32, "PLANE1->BMP");

usr/src/lib/iconv_modules/ja/common/ISO-2022-JP-2004_TO_Unicode.c

180

u32 = (unsigned int)_jfp_tbl_jisx0213p2_to_ucs2[

usr/src/lib/iconv_modules/ja/common/ISO-2022-JP-2004_TO_Unicode.c

182

if (IFHISUR(u32)) {

usr/src/lib/iconv_modules/ja/common/ISO-2022-JP-2004_TO_Unicode.c

183

u32 = _jfp_lookup_x0213_nonbmp(e16, u32);

usr/src/lib/iconv_modules/ja/common/ISO-2022-JP-2004_TO_Unicode.c

184

PUTU(u32, "PLANE2->NONBMP");

usr/src/lib/iconv_modules/ja/common/ISO-2022-JP-2004_TO_Unicode.c

186

PUTU(u32, "PLANE2->BMP");

usr/src/lib/iconv_modules/ja/common/ISO-2022-JP-2004_TO_Unicode.c

67

unsigned int u32; /* UTF-32 */

usr/src/lib/iconv_modules/ja/common/Shift_JIS-2004_TO_Unicode.c

162

unsigned int u32; /* UTF-32 */

usr/src/lib/iconv_modules/ja/common/Shift_JIS-2004_TO_Unicode.c

190

u32 = _jfp_tbl_jisx0201roman_to_ucs2[ic1];

usr/src/lib/iconv_modules/ja/common/Shift_JIS-2004_TO_Unicode.c

191

PUTU(u32, "ASCII");

usr/src/lib/iconv_modules/ja/common/Shift_JIS-2004_TO_Unicode.c

193

u32 = _jfp_tbl_jisx0201kana_to_ucs2[ic1 - 0xa1];

usr/src/lib/iconv_modules/ja/common/Shift_JIS-2004_TO_Unicode.c

194

PUTU(u32, "KANA");

usr/src/lib/iconv_modules/ja/common/Shift_JIS-2004_TO_Unicode.c

201

u32 = (unsigned int)_jfp_tbl_jisx0208_to_ucs2[

usr/src/lib/iconv_modules/ja/common/Shift_JIS-2004_TO_Unicode.c

204

if (IFHISUR(u32)) {

usr/src/lib/iconv_modules/ja/common/Shift_JIS-2004_TO_Unicode.c

205

u32 = _jfp_lookup_x0213_nonbmp(

usr/src/lib/iconv_modules/ja/common/Shift_JIS-2004_TO_Unicode.c

206

e16, u32);

usr/src/lib/iconv_modules/ja/common/Shift_JIS-2004_TO_Unicode.c

207

PUTU(u32, "PLANE1->NONBMP");

usr/src/lib/iconv_modules/ja/common/Shift_JIS-2004_TO_Unicode.c

208

} else if (u32 == 0xffff) {

usr/src/lib/iconv_modules/ja/common/Shift_JIS-2004_TO_Unicode.c

211

u32 = _jfp_lookup_x0213_compose(

usr/src/lib/iconv_modules/ja/common/Shift_JIS-2004_TO_Unicode.c

213

PUTU(u32, "PLANE1->CP1");

usr/src/lib/iconv_modules/ja/common/Shift_JIS-2004_TO_Unicode.c

216

PUTU(u32, "PLANE1->BMP");

usr/src/lib/iconv_modules/ja/common/Shift_JIS-2004_TO_Unicode.c

227

u32 = (unsigned int)_jfp_tbl_jisx0213p2_to_ucs2[

usr/src/lib/iconv_modules/ja/common/Shift_JIS-2004_TO_Unicode.c

230

if (IFHISUR(u32)) {

usr/src/lib/iconv_modules/ja/common/Shift_JIS-2004_TO_Unicode.c

231

u32 = _jfp_lookup_x0213_nonbmp(

usr/src/lib/iconv_modules/ja/common/Shift_JIS-2004_TO_Unicode.c

232

e16, u32);

usr/src/lib/iconv_modules/ja/common/Shift_JIS-2004_TO_Unicode.c

233

PUTU(u32, "PLANE2->NONBMP");

usr/src/lib/iconv_modules/ja/common/Shift_JIS-2004_TO_Unicode.c

235

PUTU(u32, "PLANE2->BMP");

usr/src/lib/iconv_modules/ja/common/Unicode_TO_EUC-JIS-2004.c

56

unsigned int u32; /* UTF-32 */

usr/src/lib/iconv_modules/ja/common/Unicode_TO_EUC-JIS-2004.c

81

GETU(&u32)

usr/src/lib/iconv_modules/ja/common/Unicode_TO_EUC-JIS-2004.c

83

e16 = _jfp_u32_to_euc16(u32);

usr/src/lib/iconv_modules/ja/common/Unicode_TO_ISO-2022-JP-2004.c

124

GETU(&u32)

usr/src/lib/iconv_modules/ja/common/Unicode_TO_ISO-2022-JP-2004.c

126

e16 = _jfp_u32_to_euc16(u32);

usr/src/lib/iconv_modules/ja/common/Unicode_TO_ISO-2022-JP-2004.c

81

unsigned int u32; /* UTF-32 */

usr/src/lib/iconv_modules/ja/common/Unicode_TO_Shift_JIS-2004.c

144

unsigned int u32; /* UTF-32 */

usr/src/lib/iconv_modules/ja/common/Unicode_TO_Shift_JIS-2004.c

169

GETU(&u32)

usr/src/lib/iconv_modules/ja/common/Unicode_TO_Shift_JIS-2004.c

171

e16 = _jfp_u32_to_euc16(u32);

usr/src/lib/iconv_modules/ja/common/eucJP_TO_Unicode.c

100

u32 = _jfp_tbl_jisx0201kana_to_ucs2[

usr/src/lib/iconv_modules/ja/common/eucJP_TO_Unicode.c

102

PUTU(u32, "CS2");

usr/src/lib/iconv_modules/ja/common/eucJP_TO_Unicode.c

111

u32 = _jfp_tbl_jisx0212_to_ucs2[

usr/src/lib/iconv_modules/ja/common/eucJP_TO_Unicode.c

114

PUTU(u32, "CS3");

usr/src/lib/iconv_modules/ja/common/eucJP_TO_Unicode.c

122

u32 = ic1;

usr/src/lib/iconv_modules/ja/common/eucJP_TO_Unicode.c

123

PUTU(u32, "C1CTRL");

usr/src/lib/iconv_modules/ja/common/eucJP_TO_Unicode.c

59

unsigned int u32; /* UTF-32 */

usr/src/lib/iconv_modules/ja/common/eucJP_TO_Unicode.c

86

u32 = _jfp_tbl_jisx0201roman_to_ucs2[ic1];

usr/src/lib/iconv_modules/ja/common/eucJP_TO_Unicode.c

87

PUTU(u32, "ASCII");

usr/src/lib/iconv_modules/ja/common/eucJP_TO_Unicode.c

91

u32 = _jfp_tbl_jisx0208_to_ucs2[

usr/src/lib/iconv_modules/ja/common/eucJP_TO_Unicode.c

93

PUTU(u32, "CS1");

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

100

u32 |= (unsigned int)ic4 << 0;

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

101

if (u32 == BOM) {

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

107

} else if (u32 == BSBOM32) {

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

119

u32 = 0U;

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

120

u32 |= (unsigned int)ic1 << 0;

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

121

u32 |= (unsigned int)ic2 << 8;

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

122

u32 |= (unsigned int)ic3 << 16;

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

123

u32 |= (unsigned int)ic4 << 24;

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

125

u32 = 0U;

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

126

u32 |= (unsigned int)ic1 << 24;

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

127

u32 |= (unsigned int)ic2 << 16;

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

128

u32 |= (unsigned int)ic3 << 8;

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

129

u32 |= (unsigned int)ic4 << 0;

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

132

if (u32 == BSBOM32) {

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

136

if ((u32 == 0xfffe) || (u32 == 0xffff) || (u32 > 0x10ffff)

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

137

|| IFHISUR(u32) || IFLOSUR(u32)) {

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

141

*p = u32;

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

167

unsigned int u32; /* resulted UTF-32 */

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

176

u32 = 0U;

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

177

u32 |= (unsigned int)ic1 << 8;

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

178

u32 |= (unsigned int)ic2 << 0;

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

179

if (u32 == BOM) {

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

185

} else if (u32 == BSBOM16) {

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

197

u32 = (((unsigned int)ic2) << 8) | ic1;

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

199

u32 = (((unsigned int)ic1) << 8) | ic2;

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

202

if (u32 == BSBOM16) {

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

206

if ((u32 == 0xfffe) || (u32 == 0xffff) || (u32 > 0x10ffff)

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

207

|| (IFLOSUR(u32))) {

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

211

if (IFHISUR(u32)) {

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

225

u32 = ((u32 - 0xd800) * 0x400)

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

233

*p = u32;

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

459

unsigned int u32, /* UTF-32 to write */

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

490

ic1 = (unsigned char)((u32 >> 0) & 0xff);

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

491

ic2 = (unsigned char)((u32 >> 8) & 0xff);

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

492

ic3 = (unsigned char)((u32 >> 16) & 0xff);

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

493

ic4 = (unsigned char)((u32 >> 24) & 0xff);

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

496

ic1 = (unsigned char)((u32 >> 24) & 0xff);

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

497

ic2 = (unsigned char)((u32 >> 16) & 0xff);

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

498

ic3 = (unsigned char)((u32 >> 8) & 0xff);

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

499

ic4 = (unsigned char)((u32 >> 0) & 0xff);

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

524

unsigned int u32, /* UTF-32 to write */

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

549

if (u32 > 0xffff) {

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

551

u32 = REPLACE;

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

553

losur = ((u32 - 0x10000) % 0x400) + 0xdc00;

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

554

u32 = ((u32 - 0x10000) / 0x400) + 0xd800;

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

559

ic1 = (unsigned char)(u32 & 0xff);

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

560

ic2 = (unsigned char)((u32 >> 8) & 0xff);

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

563

ic1 = (unsigned char)((u32 >> 8) & 0xff);

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

564

ic2 = (unsigned char)(u32 & 0xff);

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

603

unsigned int u32, /* UTF-32 to write */

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

613

if (u32 <= 0x7f) {

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

614

NPUT((unsigned char)(u32), msg);

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

616

} else if (u32 <= 0x7ff) {

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

617

NPUT((unsigned char)((((u32)>>6) & 0x1f) | 0xc0), msg);

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

618

NPUT((unsigned char)((((u32)>>0) & 0x3f) | 0x80), msg);

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

620

} else if ((u32 >= 0xd800) && (u32 <= 0xdfff)) {

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

622

} else if (u32 <= 0xffff) {

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

623

NPUT((unsigned char)((((u32)>>12) & 0x0f) | 0xe0), msg);

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

624

NPUT((unsigned char)((((u32)>>6) & 0x3f) | 0x80), msg);

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

625

NPUT((unsigned char)((((u32)>>0) & 0x3f) | 0x80), msg);

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

627

} else if (u32 <= 0x10ffff) {

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

628

NPUT((unsigned char)((((u32)>>18) & 0x07) | 0xf0), msg);

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

629

NPUT((unsigned char)((((u32)>>12) & 0x3f) | 0x80), msg);

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

630

NPUT((unsigned char)((((u32)>>6) & 0x3f) | 0x80), msg);

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

631

NPUT((unsigned char)((((u32)>>0) & 0x3f) | 0x80), msg);

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

665

#define PUTU(u32, msg) \

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

666

if (write_unicode(u32, &op, &oleft, (ucs_state_t *)cd, msg) \

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

88

unsigned int u32; /* resulted UTF-32 */

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

96

u32 = 0U;

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

97

u32 |= (unsigned int)ic1 << 24;

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

98

u32 |= (unsigned int)ic2 << 16;

usr/src/lib/iconv_modules/ja/common/jfp_iconv_unicode.h

99

u32 |= (unsigned int)ic3 << 8;

usr/src/lib/iconv_modules/ja/common/jfp_jis_to_ucs2.h

14767

unsigned int u32;

usr/src/lib/iconv_modules/ja/common/jfp_jis_to_ucs2.h

15094

return (p->u32);

usr/src/lib/iconv_modules/ja/common/jfp_ucs2_to_euc16.h

69992

_jfp_u32_to_euc16(unsigned int u32)

usr/src/lib/iconv_modules/ja/common/jfp_ucs2_to_euc16.h

69996

if ((u32 <= 0xffff)

usr/src/lib/iconv_modules/ja/common/jfp_ucs2_to_euc16.h

69997

&& (p = _jfp_tbl_ucs2_to_euc16_index[u32 >> 8]) != NULL) {

usr/src/lib/iconv_modules/ja/common/jfp_ucs2_to_euc16.h

69998

return (p[u32 & 0xff]);

usr/src/lib/iconv_modules/ja/common/jfp_ucs2_to_euc16.h

70001

else if ((u32 >= 0x20000) && (u32 <= 0x2ffff)

usr/src/lib/iconv_modules/ja/common/jfp_ucs2_to_euc16.h

70002

&& ((p = _jfp_tbl_uni_to_euc16_index_p2[(u32 & 0xffff) >> 8])

usr/src/lib/iconv_modules/ja/common/jfp_ucs2_to_euc16.h

70004

return (p[u32 & 0xff]);

usr/src/lib/libdladm/common/linkprop.c

3959

uint32_t u32;

usr/src/lib/libdladm/common/linkprop.c

3983

u32 = vdp->vd_val;

usr/src/lib/libdladm/common/linkprop.c

3984

val = &u32;

usr/src/lib/libi2c/common/libi2c_io.c

281

smbus_io_req_set_write_u32(smbus_io_req_t *req, uint8_t cmd, uint32_t u32)

usr/src/lib/libi2c/common/libi2c_io.c

287

req->sir_write = u32;

usr/src/lib/libi2c/common/libi2c_io.c

530

uint32_t u32 = htole32((uint32_t)req->sir_write);

usr/src/lib/libi2c/common/libi2c_io.c

531

(void) memcpy(smbus.smbr_wdata, &u32, sizeof (u32));

usr/src/lib/libi2c/common/libi2c_io.c

574

uint32_t u32;

usr/src/lib/libi2c/common/libi2c_io.c

575

(void) memcpy(&u32, smbus.smbr_rdata, sizeof (uint32_t));

usr/src/lib/libi2c/common/libi2c_io.c

576

*(uint32_t *)req->sir_readp = letoh32(u32);

usr/src/lib/libproc/common/Pstack.c

194

ucontext32_t u32;

usr/src/lib/libproc/common/Pstack.c

196

if (Pread(P, &u32, sizeof (u32), addr) != sizeof (u32))

usr/src/lib/libproc/common/Pstack.c

198

uc.uc_link = (ucontext_t *)(uintptr_t)u32.uc_link;

usr/src/lib/libresolv2/common/resolv/res_init.c

771

u_int32_t u32;

usr/src/lib/libresolv2/common/resolv/res_init.c

775

u32 = now.tv_sec;

usr/src/lib/libresolv2/common/resolv/res_init.c

776

memcpy(statp->_u._ext._rnd, &u32, 4);

usr/src/lib/libresolv2/common/resolv/res_init.c

777

u32 = now.tv_usec;

usr/src/lib/libresolv2/common/resolv/res_init.c

778

memcpy(statp->_u._ext._rnd + 4, &u32, 4);

usr/src/lib/libresolv2/common/resolv/res_init.c

779

u32 += now.tv_sec;

usr/src/lib/libresolv2/common/resolv/res_init.c

780

memcpy(statp->_u._ext._rnd + 8, &u32, 4);

usr/src/lib/libsqlite/src/btree.c

398

u32 swab32(u32 x){

usr/src/lib/libsqlite/src/btree.c

699

assert( sizeof(u32)==4 );

usr/src/lib/libsqlite/src/pager.c

1395

+ sizeof(u32) + pPager->nExtra );

usr/src/lib/libsqlite/src/pager.c

168

u32 cksumInit; /* Quasi-random value added to every checksum */

usr/src/lib/libsqlite/src/pager.c

1810

u32 saved;

usr/src/lib/libsqlite/src/pager.c

1812

u32 cksum = pager_cksum(pPager, pPg->pgno, pData);

usr/src/lib/libsqlite/src/pager.c

1813

saved = *(u32*)PGHDR_TO_EXTRA(pPg);

usr/src/lib/libsqlite/src/pager.c

1825

*(u32*)PGHDR_TO_EXTRA(pPg) = saved;

usr/src/lib/libsqlite/src/pager.c

288

(sizeof(aJournalMagic1) + sizeof(Pgno) + ((X)>=3)*2*sizeof(u32))

usr/src/lib/libsqlite/src/pager.c

290

(SQLITE_PAGE_SIZE + sizeof(Pgno) + ((X)>=3)*sizeof(u32))

usr/src/lib/libsqlite/src/pager.c

320

static int read32bits(int format, OsFile *fd, u32 *pRes){

usr/src/lib/libsqlite/src/pager.c

321

u32 res;

usr/src/lib/libsqlite/src/pager.c

342

static int write32bits(OsFile *fd, u32 val){

usr/src/lib/libsqlite/src/pager.c

361

static void store32bits(u32 val, PgHdr *p, int offset){

usr/src/lib/libsqlite/src/pager.c

521

static u32 pager_cksum(Pager *pPager, Pgno pgno, const char *aData){

usr/src/lib/libsqlite/src/pager.c

522

u32 cksum = pPager->cksumInit + pgno;

usr/src/lib/libsqlite/src/pager.c

537

u32 cksum;

usr/src/lib/libsqlite/src/pager.c

687

if( szJ < sizeof(aMagic) + 3*sizeof(u32) ){

usr/src/lib/libsqlite/src/pager.c

696

rc = read32bits(format, &pPager->jfd, (u32*)&nRec);

usr/src/lib/libsqlite/src/vdbe.c

1848

u32 addr;

usr/src/lib/libsqlite/src/vdbe.c

2068

if( nByte+sizeof(u32)>MAX_BYTES_PER_ROW ){

usr/src/lib/libsqlite/src/vdbe.c

2072

if( addRowid ) nByte += sizeof(u32);

usr/src/lib/libsqlite/src/vdbe.c

2097

u32 iKey;

usr/src/lib/libsqlite/src/vdbe.c

2102

memcpy(&zNewKey[j], &iKey, sizeof(u32));

usr/src/lib/libsqlite/src/vdbe.c

3259

sqliteBtreeKey(pC->pCursor, 0, sizeof(u32), (char*)&v);

usr/src/lib/libsqlite/src/vdbe.c

3528

if( sz<sizeof(u32) ){

usr/src/lib/libsqlite/src/vdbe.c

3531

sqliteBtreeKey(pCrsr, sz - sizeof(u32), sizeof(u32), (char*)&v);

usr/src/lib/libsqlite/src/vdbe.c

3702

*(u32*)pOp->p3 = pgno;

usr/src/lib/libxpio/common/libxpio_attr.c

729

uint32_t u32;

usr/src/lib/libxpio/common/libxpio_attr.c

734

xpio_attr_xlates[i].xt_pairs, &u32)) {

usr/src/lib/libxpio/common/libxpio_attr.c

741

return (xpio_gpio_attr_set_uint32(update, attr, u32));

usr/src/test/os-tests/tests/xsave/xsave_util.c

590

for (uint32_t u32 = 0; u32 < XSU_XMM_U32; u32++, seed++) {

usr/src/test/os-tests/tests/xsave/xsave_util.c

591

u128->_l[u32] = seed;

usr/src/test/os-tests/tests/xsave/xsave_util.c

617

for (uint32_t u32 = 0; u32 < XSU_XMM_U32; u32++, seed++) {

usr/src/test/os-tests/tests/xsave/xsave_util.c

618

xsave->prx_fx_xmm[i]._l[u32] = seed;

usr/src/test/os-tests/tests/xsave/xsave_util.c

709

for (uint32_t u32 = 0; u32 < XSU_XMM_U32; u32++) {

usr/src/test/os-tests/tests/xsave/xsave_util.c

710

if (u128->_l[u32] != xsave->prx_fx_xmm[i]._l[u32]) {

usr/src/test/os-tests/tests/xsave/xsave_util.c

714

"0x%x, xsave: 0x%x\n", i, u32,

usr/src/test/os-tests/tests/xsave/xsave_util.c

715

u128->_l[u32],

usr/src/test/os-tests/tests/xsave/xsave_util.c

716

xsave->prx_fx_xmm[i]._l[u32]);

usr/src/test/os-tests/tests/xsave/xsave_util.c

87

for (uint32_t u32 = 0; u32 < XSU_YMM_U32; u32++,

usr/src/test/os-tests/tests/xsave/xsave_util.c

89

fpu->xf_reg[regno]._l[u32] = start;

usr/src/test/os-tests/tests/xsave/xsave_util.c

95

for (uint32_t u32 = 0; u32 < XSU_ZMM_U32; u32++,

usr/src/test/os-tests/tests/xsave/xsave_util.c

97

fpu->xf_reg[regno]._l[u32] = start;

usr/src/test/util-tests/tests/libjedec/hex2spd/libjedec_hex2spd.c

206

uint32_t u32, *u32a;

usr/src/test/util-tests/tests/libjedec/hex2spd/libjedec_hex2spd.c

214

nvret = nvlist_lookup_uint32(nvl, spd->hs_key, &u32);

usr/src/test/util-tests/tests/libjedec/hex2spd/libjedec_hex2spd.c

220

} else if (u32 != spd->hs_val.hs_u32) {

usr/src/test/util-tests/tests/libjedec/hex2spd/libjedec_hex2spd.c

223

spd->hs_key, u32, spd->hs_val.hs_u32);

usr/src/tools/smatch/src/validation/attr_vector_size.c

2

typedef u32 __attribute__((vector_size(16))) sse128_t;

usr/src/tools/smatch/src/validation/bitwise-cast-ptr.c

12

static __be32* tobe(u32 *x)

usr/src/tools/smatch/src/validation/bitwise-cast-ptr.c

17

static __be32* tobf(u32 *x)

usr/src/tools/smatch/src/validation/bitwise-cast-ptr.c

7

static __be32* tobi(u32 *x)

usr/src/tools/smatch/src/validation/bitwise-cast.c

2

typedef u32 __attribute__((bitwise)) __be32;

usr/src/tools/smatch/src/validation/builtin-bswap-variable.c

10

static u32 swap32v(u64 a)

usr/src/tools/smatch/src/validation/builtin-bswap-variable.c

15

static u64 swap64v(u32 a)

usr/src/tools/smatch/src/validation/cast-bad-00.c

10

u32 a;

usr/src/tools/smatch/src/validation/cast-bad-00.c

15

void bar(u16, u32);

usr/src/tools/smatch/src/validation/cast-bad-00.c

5

u32 a;

usr/src/tools/smatch/src/validation/int128.c

19

u64 foo(u64 a, u64 b, u64 c, u32 s)

usr/src/tools/smatch/src/validation/linear/bool-cast.c

11

static _Bool fu32_i(u32 a) { return a; }

usr/src/tools/smatch/src/validation/linear/bool-cast.c

12

static _Bool fu32_e(u32 a) { return (_Bool)a; }

usr/src/tools/smatch/src/validation/linear/call-builtin.c

3

u32 ff(u32 a) { return __builtin_popcount(a); }

usr/src/tools/smatch/src/validation/linear/call-builtin.c

5

u32 f0(u32 a) { return (__builtin_popcount)(a); }

usr/src/tools/smatch/src/validation/linear/call-builtin.c

6

u32 f1(u32 a) { return (*__builtin_popcount)(a); } // C99,C11 6.5.3.2p4

usr/src/tools/smatch/src/validation/linear/call-builtin.c

7

u32 f2(u32 a) { return (**__builtin_popcount)(a); } // C99,C11 6.5.3.2p4

usr/src/tools/smatch/src/validation/linear/call-builtin.c

8

u32 f3(u32 a) { return (***__builtin_popcount)(a); } // C99,C11 6.5.3.2p4

usr/src/tools/smatch/src/validation/mem2reg/short-load.c

10

u32 a;

usr/src/tools/smatch/src/validation/optim/and-extend.c

12

u32 sfoo(u32 x)

usr/src/tools/smatch/src/validation/optim/and-extend.c

6

u32 ufoo(u32 x)

usr/src/tools/smatch/src/validation/optim/binops-same-args.c

18

u32 ueq(u32 a) { return a == a; }

usr/src/tools/smatch/src/validation/optim/binops-same-args.c

19

u32 une(u32 a) { return a != a; }

usr/src/tools/smatch/src/validation/optim/binops-same-args.c

20

u32 ult(u32 a) { return a < a; }

usr/src/tools/smatch/src/validation/optim/binops-same-args.c

21

u32 ugt(u32 a) { return a > a; }

usr/src/tools/smatch/src/validation/optim/binops-same-args.c

22

u32 ule(u32 a) { return a <= a; }

usr/src/tools/smatch/src/validation/optim/binops-same-args.c

23

u32 uge(u32 a) { return a >= a; }

usr/src/tools/smatch/src/validation/optim/binops-same-args.c

25

u32 xor(u32 a) { return a ^ a; }

usr/src/tools/smatch/src/validation/optim/binops-same-args.c

27

u32 ior(u32 a) { return a | a; }

usr/src/tools/smatch/src/validation/optim/binops-same-args.c

28

u32 and(u32 a) { return a & a; }

usr/src/tools/smatch/src/validation/optim/binops-same-args.c

4

u32 usub(u32 a) { return a - a; }

usr/src/tools/smatch/src/validation/optim/binops-same-args.c

7

u32 udiv(u32 a) { return a / a; }

usr/src/tools/smatch/src/validation/optim/binops-same-args.c

9

u32 umod(u32 a) { return a % a; }

usr/src/tools/smatch/src/validation/optim/double-unop.c

3

u32 unotnot(u32 a) { return ~(~a); }

usr/src/tools/smatch/src/validation/optim/double-unop.c

5

u32 unegneg(int a) { return -(-a); }

usr/src/tools/smatch/src/validation/optim/muldiv-minus-one.c

4

u32 umulm1(u32 a) { return a * (u32) -1; }

usr/src/tools/smatch/src/validation/optim/muldiv-minus-one.c

6

u32 udivm1(u32 a) { return a / (u32) -1; }

usr/src/tools/smatch/src/validation/optim/shift-big.c

10

u32 lsr33(u32 a) { return a >> 33; }

usr/src/tools/smatch/src/validation/optim/shift-big.c

12

u32 shl31(u32 a) { return a << 31; }

usr/src/tools/smatch/src/validation/optim/shift-big.c

13

u32 shl32(u32 a) { return a << 32; }

usr/src/tools/smatch/src/validation/optim/shift-big.c

14

u32 shl33(u32 a) { return a << 33; }

usr/src/tools/smatch/src/validation/optim/shift-big.c

8

u32 lsr31(u32 a) { return a >> 31; }

usr/src/tools/smatch/src/validation/optim/shift-big.c

9

u32 lsr32(u32 a) { return a >> 32; }

usr/src/tools/smatch/src/validation/shift-undef.c

102

hw_w32x2(val >> 32, (u32) val);

usr/src/tools/smatch/src/validation/shift-undef.c

105

void hw_write(u32 val)

usr/src/tools/smatch/src/validation/shift-undef.c

98

extern void hw_w32x2(u32 hi, u32 lo);

usr/src/tools/smatch/src/validation/tautological-compare.c

10

u32 ueq(u32 a) { return a == a; }

usr/src/tools/smatch/src/validation/tautological-compare.c

11

u32 une(u32 a) { return a != a; }

usr/src/tools/smatch/src/validation/tautological-compare.c

12

u32 ult(u32 a) { return a < a; }

usr/src/tools/smatch/src/validation/tautological-compare.c

13

u32 ugt(u32 a) { return a > a; }

usr/src/tools/smatch/src/validation/tautological-compare.c

14

u32 ule(u32 a) { return a <= a; }

usr/src/tools/smatch/src/validation/tautological-compare.c

15

u32 uge(u32 a) { return a >= a; }

usr/src/uts/common/fs/smbsrv/smb2_durable.c

511

uint32_t u32;

usr/src/uts/common/fs/smbsrv/smb2_durable.c

535

u32 = 0;

usr/src/uts/common/fs/smbsrv/smb2_durable.c

536

rc = nvlist_lookup_uint32(nvl, "info_version", &u32);

usr/src/uts/common/fs/smbsrv/smb2_durable.c

537

if (rc != 0 || u32 != smb2_ca_info_version) {

usr/src/uts/common/fs/smbsrv/smb2_durable.c

539

tree->t_resource, str_node->od_name, u32);

usr/src/uts/common/io/bnx/include/bcmtype.h

56

typedef u32 u32_t;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

10190

u32 swap_val, swap_override;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

10264

u32 tx_en_mode;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

10351

u32 val = REG_RD(cb, params->shmem_base +

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

10730

u32 action)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

10986

u32 pair_swap;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

11013

u32 shmem_base_path[],

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

11014

u32 chip_id)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

11016

u32 reset_pin[2];

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

11017

u32 idx;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

11057

u32 other_shmem_base_addr = REG_RD(cb, params->shmem2_base +

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

11061

u32 shmem_base_path[2];

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

11142

u32 actual_phy_selection;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

11259

u32 cms_enable = REG_RD(cb, params->shmem_base +

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

11466

elink_848xx_format_ver(u32 raw_ver, u8 *str, u16 *len)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

11470

u32 spirom_ver;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

1178

u32 pri_cli_pbf = 0x0;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

11844

u32 action)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

11878

u32 cfg_pin;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

11880

u32 link_init_required = 1;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

12133

u32 cfg_pin;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

12271

u32 umac_base = params->port ? GRCBASE_UMAC1 : GRCBASE_UMAC0;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

12357

(u32)(fw_ver1<<16 | fw_ver2), phy->ver_addr);

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

12402

elink_7101_format_ver(u32 spirom_ver, u8 *str, u16 *len)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

1241

(u32)pri_cli_nig);

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

1246

const u32 pri_cli_nig_lsb = (u32) (pri_cli_nig);

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

1247

const u32 pri_cli_nig_msb = (u32) ((pri_cli_nig >> 32) & 0xF);

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

1271

const u32 min_w_val_nig = elink_ets_get_min_w_val_nig(vars);

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

1272

const u32 min_w_val_pbf = ELINK_ETS_E3B0_PBF_MIN_W_VAL;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

13035

static void elink_populate_preemphasis(struct elink_dev *cb, u32 shmem_base,

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

13040

u32 rx = 0, tx = 0, i;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

13073

static u32 elink_get_ext_phy_config(struct elink_dev *cb, u32 shmem_base,

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

13076

u32 ext_phy_config = 0;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

13096

static elink_status_t elink_populate_int_phy(struct elink_dev *cb, u32 shmem_base, u8 port,

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

13099

u32 phy_addr;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

13100

u32 chip_id;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

13101

u32 switch_cfg = (REG_RD(cb, shmem_base +

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

13111

u32 serdes_net_if;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

13243

u32 shmem_base,

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

13244

u32 shmem2_base,

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

13248

u32 ext_phy_config, phy_type, config2;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

13249

u32 mdc_mdio_access = SHARED_HW_CFG_MDC_MDIO_ACCESS1_BOTH;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

13347

u32 size = REG_RD(cb, shmem2_base);

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

13370

u32 raw_ver = REG_RD(cb, phy->ver_addr);

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

13385

static elink_status_t elink_populate_phy(struct elink_dev *cb, u8 phy_index, u32 shmem_base,

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

13386

u32 shmem2_base, u8 port, struct elink_phy *phy)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

13404

u32 link_config;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

13475

u32 elink_phy_selection(struct elink_params *params)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

13477

u32 phy_config_swapped, prio_cfg;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

13478

u32 return_cfg = PORT_HW_CFG_PHY_SELECTION_HARDWARE_DEFAULT;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

13511

u32 phy_config_swapped, sync_offset, media_types;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

13951

u32 phy_idx;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

13952

u32 dont_clear_stat, lfa_sts;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

14035

u32 lfa_sts, cfg_idx, tmp_val;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

1409

void elink_ets_bw_limit(const struct elink_params *params, const u32 cos0_bw,

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

1410

const u32 cos1_bw)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

1414

const u32 total_bw = cos0_bw + cos1_bw;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

1415

u32 cos0_credit_weight = 0;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

1416

u32 cos1_credit_weight = 0;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

14309

u32 xmac_base = (params->port) ? GRCBASE_XMAC1 : GRCBASE_XMAC0;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

14386

u32 shmem_base_path[],

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

14387

u32 shmem2_base_path[], u8 phy_index,

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

14388

u32 chip_id)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

14395

u32 swap_val, swap_override;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

14402

u32 shmem_base, shmem2_base;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

1445

u32 val = 0;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

14514

u32 shmem_base_path[],

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

14515

u32 shmem2_base_path[], u8 phy_index,

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

14516

u32 chip_id)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

14518

u32 val;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

14531

u32 shmem_base, shmem2_base;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

14564

static void elink_get_ext_phy_reset_gpio(struct elink_dev *cb, u32 shmem_base,

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

14568

u32 phy_gpio_reset = REG_RD(cb, shmem_base +

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

14611

u32 shmem_base_path[],

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

14612

u32 shmem2_base_path[], u8 phy_index,

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

14613

u32 chip_id)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

14616

u32 swap_val, swap_override;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

14646

u32 shmem_base, shmem2_base;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

14712

u32 shmem_base_path[],

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

14713

u32 shmem2_base_path[],

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

14715

u32 chip_id)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

14763

u32 shmem_base,

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

14764

u32 shmem2_base,

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

14765

u32 chip_id,

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

14788

static elink_status_t elink_ext_phy_common_init(struct elink_dev *cb, u32 shmem_base_path[],

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

14789

u32 shmem2_base_path[], u8 phy_index,

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

14790

u32 ext_phy_type, u32 chip_id)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

14850

u32 shmem_base_path[],

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

14851

u32 shmem2_base_path[],

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

14853

u32 chip_id,

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

14857

u32 wc_lane_config;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

1492

u32 xmac_base;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

1493

u32 pause_val, pfc0_val, pfc1_val;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

14946

elink_status_t elink_common_init_phy(struct elink_dev *cb, u32 shmem_base_path[],

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

14947

u32 shmem2_base_path[], u32 chip_id,

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

14951

u32 phy_ver, val;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

14954

u32 ext_phy_type, ext_phy_config;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

15010

u32 cfg_pin;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

15012

u32 pin_val;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

15045

struct elink_vars *vars, u32 status,

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

15046

u32 phy_flag, u32 link_flag, u8 notify)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

15051

u32 old_status = (vars->phy_flags & phy_flag) ? 1 : 0;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

15137

u32 lss_status = 0;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

15138

u32 mac_base;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

15168

u32 lss_status_reg;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

15169

u32 wb_data[2];

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

15193

u32 cfg_pin, value = 0;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

15385

u32 shmem_base,

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

15386

u32 shmem2_base,

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

15451

u32 chip_id, u32 shmem_base, u32 shmem2_base,

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

15455

u32 val;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

15456

u32 offset, aeu_mask, swap_val, swap_override, sync_offset;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

15524

u32 phy_idx;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

1553

u32 pfc_frames_sent[2],

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

1554

u32 pfc_frames_received[2])

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

1558

u32 emac_base = params->port ? GRCBASE_EMAC1 : GRCBASE_EMAC0;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

1559

u32 val_xon = 0;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

1560

u32 val_xoff = 0;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

15603

u32 *temp_reading, u8 path, u8 port)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

15627

*temp_reading = (u32)cmd_args[0];

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

15629

*temp_reading = (u32)cmd_args[1];

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

15638

void set_cfg_pin(struct elink_dev *cb, u32 pin_cfg, u32 val)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

15642

int get_cfg_pin(struct elink_dev *cb, u32 pin_cfg, u32 *val)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

1585

u32 pfc_frames_sent[2],

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

1586

u32 pfc_frames_received[2])

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

1607

static void elink_set_mdio_clk(struct elink_dev *cb, u32 chip_id,

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

1608

u32 emac_base)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

1610

u32 new_mode, cur_mode;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

1611

u32 clc_cnt;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

1640

u32 port4mode_ovwr_val;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

1671

u32 emac_base = port ? GRCBASE_EMAC1 : GRCBASE_EMAC0;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

1672

u32 val;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

1727

u32 umac_base = params->port ? GRCBASE_UMAC1 : GRCBASE_UMAC0;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

1728

u32 val;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

1747

u32 val;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

1748

u32 umac_base = params->port ? GRCBASE_UMAC1 : GRCBASE_UMAC0;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

1843

static void elink_xmac_init(struct elink_params *params, u32 max_speed)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

1846

u32 is_port4mode = elink_is_4_port_mode(cb);

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

1909

u32 pfc_ctrl, xmac_base = (port) ? GRCBASE_XMAC1 : GRCBASE_XMAC0;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

1910

u32 val;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

1936

u32 val, xmac_base;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

2010

u32 emac_base = port ? GRCBASE_EMAC1 : GRCBASE_EMAC0;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

2011

u32 val;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

2043

u32 ser_lane = ((params->lane_config &

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

2184

u32 wb_data[2];

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

2186

u32 bmac_addr = params->port ? NIG_REG_INGRESS_BMAC1_MEM :

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

2189

u32 val = 0x14;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

2219

u32 wb_data[2];

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

2221

u32 bmac_addr = params->port ? NIG_REG_INGRESS_BMAC1_MEM :

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

2223

u32 val = 0x14;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

2307

u32 priority_mask, u8 port)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

2309

u32 nig_reg_rx_priority_mask_add = 0;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

2350

static void elink_update_mng(struct elink_params *params, u32 link_status)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

2364

u32 xcm_mask = 0, ppp_enable = 0, pause_enable = 0, llfc_out_en = 0;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

2365

u32 llfc_enable = 0, xcm_out_en = 0, hwpfc_enable = 0;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

2366

u32 pkt_priority_to_cos = 0;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

2464

u32 val;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

2518

u32 bmac_addr = port ? NIG_REG_INGRESS_BMAC1_MEM :

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

2520

u32 wb_data[2];

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

2521

u32 val;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

2593

u32 bmac_addr = port ? NIG_REG_INGRESS_BMAC1_MEM :

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

2595

u32 wb_data[2];

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

2661

u32 val;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

2709

static void elink_set_bmac_rx(struct elink_dev *cb, u32 chip_id, u8 port, u8 en)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

2711

u32 bmac_addr = port ? NIG_REG_INGRESS_BMAC1_MEM :

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

2713

u32 wb_data[2];

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

2714

u32 nig_bmac_enable = REG_RD(cb, NIG_REG_BMAC0_REGS_OUT_EN + port*4);

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

2738

static elink_status_t elink_pbf_update(struct elink_params *params, u32 flow_ctrl,

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

2739

u32 line_speed)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

2743

u32 init_crd, crd;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

2744

u32 count = 1000;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

2778

u32 thresh = (ELINK_ETH_MAX_JUMBO_PACKET_SIZE +

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

2825

static u32 elink_get_emac_base(struct elink_dev *cb,

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

2826

u32 mdc_mdio_access, u8 port)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

2828

u32 emac_base = 0;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

2867

u32 tmp, mode;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

2902

u32 val, mode;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

2945

u32 val;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

2949

u32 chip_id;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

3024

u32 tmp;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

3028

u32 chip_id;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

3114

static elink_status_t elink_eee_nvram_to_time(u32 nvram_mode, u32 *idle_timer)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

3134

static elink_status_t elink_eee_time_to_nvram(u32 idle_timer, u32 *nvram_mode)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

3154

static u32 elink_eee_calc_timer(struct elink_params *params)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

3156

u32 eee_mode, eee_idle;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

3189

u32 eee_idle = 0, eee_mode;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

3222

vars->eee_status |= ((u32) mode) << SHMEM_EEE_SUPPORTED_SHIFT;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

3281

static void elink_update_mng_eee(struct elink_params *params, u32 eee_status)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

3297

u32 lp_adv = 0;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

3343

u32 board_cfg, sfp_ctrl;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

3344

u32 i2c_pins[I2C_SWITCH_WIDTH], i2c_val[I2C_SWITCH_WIDTH];

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

3372

u32 *data_array)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

3374

u32 val, i;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

346

static u32 elink_bits_en(struct elink_dev *cb, u32 reg, u32 bits)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

348

u32 val = REG_RD(cb, reg);

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

3518

u32 path_swap, path_swap_ovr;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

3525

u32 port_swap, port_swap_ovr;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

355

static u32 elink_bits_dis(struct elink_dev *cb, u32 reg, u32 bits)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

357

u32 val = REG_RD(cb, reg);

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

3572

u32 ser_lane;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

3610

u32 emac_base = (port) ? GRCBASE_EMAC1 : GRCBASE_EMAC0;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

3624

u32 val;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

3646

u32 action)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

3663

u32 val;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

375

u32 link_status, cfg_idx, lfa_mask, cfg_size;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

376

u32 cur_speed_cap_mask, cur_req_fc_auto_adv, additional_config;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

377

u32 saved_val, req_val, eee_status;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

3793

static void elink_pause_resolve(struct elink_vars *vars, u32 pause_result)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

3919

static void elink_update_link_attr(struct elink_params *params, u32 link_attr)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

4034

u32 wc_lane_config;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

4256

u32 cfg_tap_val, tx_drv_brdct, tx_equal;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

4618

u32 chip_id,

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

4619

u32 shmem_base, u8 port,

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

4622

u32 cfg_pin;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

4661

u32 gpio_val;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

4694

u32 serdes_net_if;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

4767

u32 cfg_pin;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

4788

u32 serdes_net_if;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

4959

u32 lane;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

497

static void elink_get_epio(struct elink_dev *cb, u32 epio_pin, u32 *en)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

499

u32 epio_mask, gp_oenable;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

5082

u32 wc_lane_config)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

5112

u32 wc_lane_config)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

514

static void elink_set_epio(struct elink_dev *cb, u32 epio_pin, u32 en)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

5145

u32 pll_lock;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

516

u32 epio_mask, gp_output, gp_oenable;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

5208

u32 shmem_base)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

5211

u32 serdes_net_if;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

539

static void elink_set_cfg_pin(struct elink_dev *cb, u32 pin_cfg, u32 val)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

5439

u32 sync_offset, media_types;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

552

static u32 elink_get_cfg_pin(struct elink_dev *cb, u32 pin_cfg, u32 *val)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

6012

u32 gp_status)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

6059

u32 gp_status)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

6157

u32 gp_status)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

629

static u32 elink_ets_get_min_w_val_nig(const struct elink_vars *vars)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

631

u32 min_w_val = 0;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

650

static u32 elink_ets_get_credit_upper_bound(const u32 min_w_val)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

652

const u32 credit_upper_bound = (u32)ELINK_MAXVAL((150 * min_w_val),

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

663

const u32 min_w_val)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

667

const u32 credit_upper_bound =

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

6704

u32 mask;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

6752

u32 latch_status = 0;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

6788

u32 mask;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

6806

u32 ser_lane =

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

6825

elink_format_ver(u32 num, u8 *str, u16 *len)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

6829

u32 mask = 0xf0000000;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

6869

elink_null_format_ver(u32 spirom_ver, u8 *str, u16 *len)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

6884

u32 spirom_ver = 0;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

6930

u32 md_devad = 0;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

6981

struct elink_vars *vars, u8 mode, u32 speed)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

6987

u32 tmp;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

6988

u32 emac_base = port ? GRCBASE_EMAC1 : GRCBASE_EMAC0;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

705

const u32 min_w_val = elink_ets_get_min_w_val_nig(vars);

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

7083

u32 nig_led_mode = ((params->hw_led_mode <<

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

7499

u32 addr, val;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

7532

u32 prev_link_status = vars->link_status;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

7797

u32 spirom_ver, u32 ver_addr)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

7817

elink_save_spirom_version(cb, port, (u32)(fw_ver1<<16 | fw_ver2),

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

785

const u32 min_w_val)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

788

const u32 credit_upper_bound =

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

7886

u32 count = 0;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

791

u32 base_upper_bound = 0;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

8101

u32 action)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

821

const u32 min_w_val_pbf = ELINK_ETS_E3B0_PBF_MIN_W_VAL;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

823

u32 base_weight = 0;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

83

#define OFFSETOF(_s, _m) ((u32) ((u8 *)(&((_s *) 0)->_m) - \

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

8528

u32 swap_val, swap_override;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

8546

u32 tx_en_mode;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

8691

u32 pin_cfg;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

8718

u32 data_array[4];

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

8991

u32 sync_offset = 0, phy_idx, media_types;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

9174

u32 val, cmd;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

9175

u32 fw_resp, fw_cmd_param;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

9406

u32 action)

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

9456

u32 fault_led_gpio = REG_RD(cb, params->shmem_base +

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

9490

u32 pin_cfg;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

957

const u32 min_w_val_nig,

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

958

const u32 min_w_val_pbf,

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

963

u32 nig_reg_adress_crd_weight = 0;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

9635

u32 val = REG_RD(cb, params->shmem_base +

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

964

u32 pbf_reg_adress_crd_weight = 0;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

966

const u32 cos_bw_nig = ((bw ? bw : 1) * min_w_val_nig) / total_bw;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

967

const u32 cos_bw_pbf = ((bw ? bw : 1) * min_w_val_pbf) / total_bw;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

9691

u32 gpio_val;

usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c

9859

u32 tx_en_mode;

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_common.h

47

u32 addr, size_t size, u32 *data)

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init.h

180

u32 addr;

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init.h

181

u32 bits;

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init.h

200

u32 reg_val;

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init.h

214

static __inline u32 ecore_parity_reg_mask(struct _lm_device_t *pdev, int idx)

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init.h

231

u32 dis_mask = ecore_parity_reg_mask(pdev, i);

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init.h

252

u32 reg_val, mcp_aeu_bits =

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init.h

265

u32 reg_mask = ecore_parity_reg_mask(pdev, i);

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init.h

27

u32 size;

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init.h

300

u32 reg_mask = ecore_parity_reg_mask(pdev, i);

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init.h

31

u32 page_size;

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init.h

41

u32 start_line;

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init.h

83

u32 mask_addr;

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init.h

84

u32 sts_clr_addr;

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init.h

85

u32 en_mask; /* Mask to enable parity attentions */

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init.h

87

u32 e1; /* 57710 */

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init.h

88

u32 e1h; /* 57711 */

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init.h

89

u32 e2; /* 57712 */

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init.h

90

u32 e3; /* 578xx */

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

100

static void ecore_init_wr_64(struct _lm_device_t *pdev, u32 addr,

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

101

const u32 *data, u32 len64)

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

103

u32 buf_len32 = FW_BUF_SIZE/4;

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

104

u32 len = len64*2;

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

106

u32 i;

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

111

len64 = min((u32)(FW_BUF_SIZE/8), len64);

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

119

u32 cur_len = min(buf_len32, len - i);

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

139

static const u8 *ecore_sel_blob(struct _lm_device_t *pdev, u32 addr,

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

169

static void ecore_init_wr_wb(struct _lm_device_t *pdev, u32 addr,

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

170

const u32 *data, u32 len)

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

185

static void ecore_init_fw(struct _lm_device_t *pdev, u32 addr, u32 len)

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

196

ecore_init_ind_wr(pdev, addr, (const u32 *)data, len);

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

200

ecore_init_str_wr(pdev, addr, (const u32 *)data, len);

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

206

static void ecore_wr_64(struct _lm_device_t *pdev, u32 reg, u32 val_lo,

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

207

u32 val_hi)

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

209

u32 wb_write[2];

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

217

static void ecore_init_wr_zp(struct _lm_device_t *pdev, u32 addr, u32 len,

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

218

u32 blob_off)

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

222

u32 i;

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

233

((u32 *)GUNZIP_BUF(pdev))[i] = FORCE32

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

234

mm_cpu_to_le32(((u32 *)GUNZIP_BUF(pdev))[i]);

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

239

static void ecore_init_block(struct _lm_device_t *pdev, u32 block, u32 stage)

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

248

u32 op_idx, op_type, addr, len;

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

249

const u32 *data, *data_base;

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

29

#define FORCE32 (u32)

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

32

static void ecore_reg_wr_ind(struct _lm_device_t *pdev, u32 addr, u32 val);

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

34

lm_address_t phys_addr, u32 addr,

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

35

u32 len);

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

37

static void ecore_init_str_wr(struct _lm_device_t *pdev, u32 addr,

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

38

const u32 *data, u32 len)

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

40

u32 i;

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

46

static void ecore_init_ind_wr(struct _lm_device_t *pdev, u32 addr,

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

47

const u32 *data, u32 len)

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

49

u32 i;

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

500

u32 val, i;

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

55

static void ecore_write_big_buf(struct _lm_device_t *pdev, u32 addr, u32 len,

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

637

#define ILT_ADDR1(x) ((u32)(((u64)x >> 12) & 0xFFFFFFFF))

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

638

#define ILT_ADDR2(x) ((u32)((1 << 20) | ((u64)x >> 44)))

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

642

struct ilt_line *line, u32 size, u8 memop)

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

70

static void ecore_init_fill(struct _lm_device_t *pdev, u32 addr, int fill,

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

702

u32 reg;

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

71

u32 len, u8 wb)

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

73

u32 buf_len = (((len*4) > FW_BUF_SIZE) ? FW_BUF_SIZE : (len*4));

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

734

u32 ilt_start, u8 initop)

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

736

u32 start_reg = 0;

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

737

u32 end_reg = 0;

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

74

u32 buf_len32 = buf_len/4;

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

75

u32 i;

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

80

u32 cur_len = min(buf_len32, len - i);

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

835

u32 psz_reg, u8 initop)

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

86

static void ecore_write_big_buf_wb(struct _lm_device_t *pdev, u32 addr, u32 len)

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

898

u32 base_reg, u32 reg)

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h

901

u32 wb_data[2] = {0, 0};

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_sp_verbs.c

1094

u32 wb_data[2];

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_sp_verbs.c

1095

u32 reg_offset = PORT_ID(pdev) ? NIG_REG_LLH1_FUNC_MEM :

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_sp_verbs.c

1163

static INLINE void ecore_vlan_mac_set_rdata_hdr_e2(u32 cid, int type,

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_sp_verbs.c

1286

u32 cl_bit_vec = (1 << r->cl_id);

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_sp_verbs.c

2401

u32 cid, u8 func_id, void *rdata, lm_address_t rdata_mapping, int state,

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_sp_verbs.c

2419

u8 cl_id, u32 cid, u8 func_id, void *rdata, lm_address_t rdata_mapping,

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_sp_verbs.c

2443

u8 cl_id, u32 cid, u8 func_id, void *rdata,

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_sp_verbs.c

2497

u8 cl_id, u32 cid, u8 func_id, void *rdata,

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_sp_verbs.c

2538

u8 cl_id, u32 cid, u8 func_id, void *rdata,

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_sp_verbs.c

2606

u32 addr = BAR_TSTRORM_INTMEM +

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_sp_verbs.c

2609

__storm_memset_struct(pdev, addr, size, (u32 *)mac_filters);

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_sp_verbs.c

2616

u32 mask = (1 << p->cl_id);

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_sp_verbs.c

2694

static INLINE void ecore_rx_mode_set_rdata_hdr_e2(u32 cid,

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_sp_verbs.c

2914

u32 macs_num; /* Needed for DEL command */

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_sp_verbs.c

2925

u32 alloc_len; /* passed to ECORE_FREE */

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_sp_verbs.c

3596

u32 *mc_filter)

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_sp_verbs.c

3617

u32 *mc_filter)

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_sp_verbs.c

3645

u32 mc_filter[MC_HASH_SIZE] = {0};

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_sp_verbs.c

4188

u8 mcast_cl_id, u32 mcast_cid, u8 func_id,

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_sp_verbs.c

4766

u8 cl_id, u32 cid, u8 func_id, u8 engine_id,

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_sp_verbs.c

5912

u8 cl_id, u32 *cids, u8 cid_cnt, u8 func_id,

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_sp_verbs.c

6243

u32 load_code = params->params.hw_init.load_phase;

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_sp_verbs.c

6363

u32 reset_phase = params->params.hw_reset.reset_phase;

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_sp_verbs.h

1104

u32 cids[ECORE_MULTI_TX_COS];

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_sp_verbs.h

1216

u32 load_phase;

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_sp_verbs.h

1228

u32 reset_phase;

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_sp_verbs.h

130

u32 cid;

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_sp_verbs.h

1321

u32 drift_adjust_period;

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_sp_verbs.h

1447

struct ecore_queue_sp_obj *obj, u8 cl_id, u32 *cids,

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_sp_verbs.h

1460

u8 cl_id, u32 cid, u8 func_id, void *rdata,

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_sp_verbs.h

1467

u8 cl_id, u32 cid, u8 func_id, void *rdata,

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_sp_verbs.h

1474

u8 cl_id, u32 cid, u8 func_id, void *rdata,

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_sp_verbs.h

1516

u8 mcast_cl_id, u32 mcast_cid, u8 func_id,

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_sp_verbs.h

1556

u8 cl_id, u32 cid, u8 func_id, u8 engine_id,

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_sp_verbs.h

534

u32 cid;

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_sp_verbs.h

798

u32 rss_key[10];

usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_sp_verbs.h

930

#define MAC_PAD (ECORE_ALIGN(ETH_ALEN, sizeof(u32)) - ETH_ALEN)

usr/src/uts/common/io/bnxe/577xx/drivers/common/include/vm/hw_channel.h

123

u32 resp_msg_offset;

usr/src/uts/common/io/bnxe/577xx/drivers/common/include/vm/hw_channel.h

178

u32 rss_flags;

usr/src/uts/common/io/bnxe/577xx/drivers/common/include/vm/hw_channel.h

193

u32 rss_key[T_ETH_RSS_KEY]; /* hash values */

usr/src/uts/common/io/bnxe/577xx/drivers/common/include/vm/hw_channel.h

200

u32 chip_num;

usr/src/uts/common/io/bnxe/577xx/drivers/common/include/vm/hw_channel.h

201

u32 pf_cap;

usr/src/uts/common/io/bnxe/577xx/drivers/common/include/vm/hw_channel.h

241

u32 pf_link_supported;

usr/src/uts/common/io/bnxe/577xx/drivers/common/include/vm/hw_channel.h

263

u32 flags;

usr/src/uts/common/io/bnxe/577xx/drivers/common/include/vm/hw_channel.h

264

u32 padding [2];

usr/src/uts/common/io/bnxe/577xx/drivers/common/include/vm/hw_channel.h

311

u32 flags; /* VFPF_QUEUE_FLG_X flags */

usr/src/uts/common/io/bnxe/577xx/drivers/common/include/vm/hw_channel.h

326

u32 flags;

usr/src/uts/common/io/bnxe/577xx/drivers/common/include/vm/hw_channel.h

342

u32 flags;

usr/src/uts/common/io/bnxe/577xx/drivers/common/include/vm/hw_channel.h

361

u32 rx_mask; /* see mask constants at the top of the file */

usr/src/uts/common/io/bnxe/577xx/drivers/common/include/vm/hw_channel.h

433

u32 crc; /* crc of structure to ensure is not in

usr/src/uts/common/io/bnxe/577xx/drivers/common/include/vm/hw_channel.h

464

u32 link_flags; /* VFPF_LINK_REPORT_XXX flags */

usr/src/uts/common/io/bnxe/577xx/drivers/common/include/vm/vfpf_if.h

109

u32 rss_key[10];

usr/src/uts/common/io/bnxe/577xx/drivers/common/include/vm/vfpf_if.h

114

u32 rsc_ipv4_state;

usr/src/uts/common/io/bnxe/577xx/drivers/common/include/vm/vfpf_if.h

115

u32 rsc_ipv6_state;

usr/src/uts/common/io/bnxe/577xx/drivers/common/include/vm/vfpf_if.h

128

u32 chip_num;

usr/src/uts/common/io/bnxe/577xx/drivers/common/include/vm/vfpf_if.h

130

u32 pf_cap;

usr/src/uts/common/io/bnxe/577xx/drivers/common/include/vm/vfpf_if.h

230

u32 flags; /* VFPF_QUEUE_FLG_X flags */

usr/src/uts/common/io/bnxe/577xx/drivers/common/include/vm/vfpf_if.h

240

u32 flags;

usr/src/uts/common/io/bnxe/577xx/drivers/common/include/vm/vfpf_if.h

253

u32 flags;

usr/src/uts/common/io/bnxe/577xx/drivers/common/include/vm/vfpf_if.h

275

u32 rx_mask;

usr/src/uts/common/io/bnxe/577xx/drivers/common/include/vm/vfpf_if.h

321

u32 req_sz;

usr/src/uts/common/io/bnxe/577xx/drivers/common/include/vm/vfpf_if.h

322

u32 resp_sz;

usr/src/uts/common/io/bnxe/577xx/drivers/common/include/vm/vfpf_if.h

42

u32 resp_msg_offset;

usr/src/uts/common/io/bnxe/577xx/drivers/common/include/vm/vfpf_if.h

68

u32 vf_fw_hsi_version; /* e.g. 6.0.12 */

usr/src/uts/common/io/bnxe/577xx/drivers/common/include/vm/vfpf_if.h

97

u32 rss_flags;

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/hw_debug.h

178

u32 rd_ptr, wr_ptr, rd_bank, wr_bank; \

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_devinfo.c

1087

static u32_t lm_parse_license_info(u32 val, u8_t is_high)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_devinfo.c

1109

static u32_t lm_parse_license_info_bounded(u32 val, u32_t max_cons, u8_t is_high)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_devinfo.c

1807

u32 pcicfg_chip;

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_access.c

343

u32 offset = 0;

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_access.c

829

u32 pin = 1 << pin_num;

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_attn.c

989

u32 cnt = 0;

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c

2450

*((u32 *)&ver_str[str_idx]) = val;

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c

3763

u32 wb_write[3] = {0} ;

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c

4038

LM_INTMEM_WRITE32(pdev, addr + (sizeof(u32_t) * index), *((u32 *)&eq_data + index), BAR_CSTRORM_INTMEM);

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c

601

static void ecore_reg_wr_ind(struct _lm_device_t *pdev, u32 addr, u32 val)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c

607

lm_address_t phys_addr, u32 addr,

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c

608

u32 len)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_phy.c

107

u32 elink_cb_gpio_read(struct elink_dev *cb, u16 gpio_num, u8 port)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_phy.c

109

u32 val=0;

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_phy.c

118

void elink_cb_udelay(struct elink_dev *cb, u32 microsecond)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_phy.c

137

u32 elink_cb_fw_command(struct elink_dev *cb, u32 command, u32 param)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_phy.c

139

u32 fw_resp = 0;

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_phy.c

145

void elink_cb_download_progress(struct elink_dev *cb, u32 cur, u32 total)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_phy.c

202

REG_WR(cb, MISC_REG_AEU_GENERAL_ATTN_12 + FUNC_ID((lm_device_t *)cb)*sizeof(u32), 1);

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_phy.c

59

void elink_cb_dbg1(struct elink_dev *bp, _In_ char* fmt, u32 arg1 )

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_phy.c

63

void elink_cb_dbg2(struct elink_dev *bp, _In_ char* fmt, u32 arg1, u32 arg2 )

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_phy.c

68

void elink_cb_dbg3(struct elink_dev *bp, _In_ char* fmt, u32 arg1, u32 arg2, u32 arg3 )

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_phy.c

75

u32 elink_cb_reg_read(struct elink_dev *cb, u32 reg_addr )

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_phy.c

80

void elink_cb_reg_write(struct elink_dev *cb, u32 reg_addr, u32 val )

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_phy.c

86

void elink_cb_reg_wb_write(struct elink_dev *cb, u32 offset, u32 *wb_write, u16 len )

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_phy.c

91

void elink_cb_reg_wb_read(struct elink_dev *cb, u32 offset, u32 *wb_write, u16 len )

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_phy.c

971

u32 phy_sel ;

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_phy.c

986

u32 phy_sel;

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_sb.c

47

u32 offset = IS_PFDEV(pdev) ? BAR_IGU_INTMEM : VF_BAR0_IGU_OFFSET;

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_sb.c

66

u32 offset = IS_PFDEV(pdev) ? BAR_IGU_INTMEM : VF_BAR0_IGU_OFFSET;

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/57710_init_values.c

29186

INIT_DATA(pdev) = (u32 *)init_data_e1;

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/57710_init_values.c

967

static const u32 init_data_e1[] = {

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/57711_init_values.c

1471

static const u32 init_data_e1h[] = {

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/57711_init_values.c

30483

INIT_DATA(pdev) = (u32 *)init_data_e1h;

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/57712_init_values.c

2228

static const u32 init_data_e2[] = {

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/57712_init_values.c

58028

INIT_DATA(pdev) = (u32 *)init_data_e2;

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/init_defs.h

100

u32 op:8;

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/init_defs.h

101

u32 offset:24;

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/init_defs.h

102

u32 len;

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/init_defs.h

106

u32 op:8;

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/init_defs.h

107

u32 cmd_offset:24;

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/init_defs.h

108

u32 mode_bit_map;

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/init_defs.h

113

u32 op:8;

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/init_defs.h

114

u32 cmd_offset:24;

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/init_defs.h

115

u32 phase_bit_map;

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/init_defs.h

119

u32 op:8;

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/init_defs.h

120

u32 reserved:24;

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/init_defs.h

121

u32 delay;

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/init_defs.h

70

u32 op:8;

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/init_defs.h

71

u32 offset:24;

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/init_defs.h

72

u32 raw_data;

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/init_defs.h

76

u32 op:8;

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/init_defs.h

77

u32 offset:24;

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/init_defs.h

78

u32 val;

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/init_defs.h

82

u32 op:8;

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/init_defs.h

83

u32 offset:24;

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/init_defs.h

84

u32 val;

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/init_defs.h

88

u32 op:8;

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/init_defs.h

89

u32 offset:24;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/cdu_def.h

24

static u8 calc_crc8(u32 data, u8 crc)

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

100

extern void elink_cb_dbg2(struct elink_dev *cb, _In_ char *fmt, u32 arg1, u32 arg2);

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

101

extern void elink_cb_dbg3(struct elink_dev *cb, _In_ char *fmt, u32 arg1, u32 arg2,

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

102

u32 arg3);

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

24

extern u32 elink_cb_reg_read(struct elink_dev *cb, u32 reg_addr);

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

245

typedef elink_status_t (*format_fw_ver_t)(u32 raw, u8 *str, u16 *len);

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

25

extern void elink_cb_reg_write(struct elink_dev *cb, u32 reg_addr, u32 val);

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

250

struct elink_params *params, u32 action);

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

258

u32 type;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

27

extern void elink_cb_reg_wb_write(struct elink_dev *cb, u32 offset,

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

28

u32 *wb_write, u16 len);

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

29

extern void elink_cb_reg_wb_read(struct elink_dev *cb, u32 offset,

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

290

u32 mdio_ctrl;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

292

u32 supported;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

30

u32 *wb_write, u16 len);

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

308

u32 media_type;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

319

u32 sfp_media;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

333

u32 ver_addr;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

339

u32 speed_cap_mask;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

397

u32 shmem_base;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

398

u32 shmem2_base;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

399

u32 speed_cap_mask[ELINK_LINK_CONFIG_SIZE];

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

40

extern u32 elink_cb_gpio_read(struct elink_dev *cb, u16 gpio_num, u8 port);

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

400

u32 switch_cfg;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

405

u32 lane_config;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

408

u32 chip_id;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

411

u32 feature_config_flags;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

448

u32 eee_mode;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

45

extern u32 elink_cb_fw_command(struct elink_dev *cb, u32 command, u32 param);

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

460

u32 multi_phy_config;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

469

u32 lfa_base;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

472

u32 link_attr_sync;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

48

extern void elink_cb_udelay(struct elink_dev *cb, u32 microsecond);

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

502

u32 link_status;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

503

u32 eee_status;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

510

u32 aeu_int_mask;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

52

extern void elink_cb_download_progress(struct elink_dev *cb, u32 cur, u32 total);

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

558

struct elink_vars *vars, u8 mode, u32 speed);

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

577

elink_status_t elink_common_init_phy(struct elink_dev *cb, u32 shmem_base_path[],

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

578

u32 shmem2_base_path[], u32 chip_id, u8 one_port_enabled);

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

596

u32 elink_phy_selection(struct elink_params *params);

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

603

u8 elink_fan_failure_det_req(struct elink_dev *cb, u32 shmem_base,

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

604

u32 shmem2_base, u8 port);

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

627

u32 pause_enable;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

628

u32 llfc_out_en;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

629

u32 llfc_enable;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

630

u32 pkt_priority_to_cos;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

632

u32 rx_cos_priority_mask[ELINK_DCBX_MAX_NUM_COS];

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

633

u32 llfc_high_priority_classes;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

634

u32 llfc_low_priority_classes;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

682

void elink_ets_bw_limit(const struct elink_params *params, const u32 cos0_bw,

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

683

const u32 cos1_bw);

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

696

u32 pfc_frames_sent[2],

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

697

u32 pfc_frames_received[2]);

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

700

u32 chip_id, u32 shmem_base, u32 shmem2_base,

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

718

u32 shmem_base,

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

719

u32 shmem2_base,

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

720

u32 chip_id,

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

729

u32 *temp_reading, u8 path, u8 port);

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

732

void set_cfg_pin(struct elink_dev *cb, u32 pin_cfg, u32 val);

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

733

int get_cfg_pin(struct elink_dev *cb, u32 pin_cfg, u32 *val);

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/clc.h

99

extern void elink_cb_dbg1(struct elink_dev *cb, _In_ char *fmt, u32 arg1);

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

1700

static const u32 read_reg_e1_0[] = { 0x1b1000};

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

1709

static const u32 read_reg_e1h_0[] = { 0x1b1040, 0x1b1000};

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

1719

static const u32 read_reg_e2_0[] = { 0x1b1040, 0x1b1000};

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

1730

static const u32 read_reg_e3_0[] = { 0x1b1040, 0x1b1000};

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

1739

static const u32 read_reg_e3b0_0[] = { 0x1b1040, 0x1b1000};

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

1760

static const u32 timer_status_regs_e1[] = { 0x164014, 0x164018};

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

1761

static const u32 timer_scan_regs_e1[] = { 0x1640d0, 0x1640d4};

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

1774

static const u32 timer_status_regs_e1h[] = { 0x164014, 0x164018};

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

1775

static const u32 timer_scan_regs_e1h[] = { 0x1640d0, 0x1640d4};

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

1791

static const u32 timer_status_regs_e2[] = { 0x164014, 0x164018};

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

1792

static const u32 timer_scan_regs_e2[] = { 0x1640d0, 0x1640d4};

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

184

u32 time_stamp;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

185

u32 diag_ver;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

186

u32 grc_dump_ver;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

190

u32 hdr_size; /* in dwords, excluding this field */

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

192

u32 x_storm_wait_p_status;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

193

u32 t_storm_wait_p_status;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

194

u32 u_storm_wait_p_status;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

195

u32 c_storm_wait_p_status;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

204

u32 hdr_signature;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

205

u32 hdr_size; /* in dwords, excluding this field */

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

206

u32 data_size; /* in dwords */

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

207

u32 additional_data;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

208

u32 data_source; /* storm number or none if from a block. */

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

209

u32 data_type;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

210

u32 reserved;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

211

u32 error;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

215

u32 valid; /* is valid for the current chip */

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

216

u32 max_size; /* max read iterations */

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

217

u32 is_last_commands; /* put value in the additional_data field */

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

218

u32 is_data_valid; /* non-zero for valid */

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

219

u32 data[2];

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

223

u32 valid; /* is valid for the current chip */

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

224

u32 vfc_status;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

225

u32 vfc_address;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

226

u32 vfc_data_write;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

227

u32 vfc_data_read;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

231

u32 read_size;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

232

u32 address_value;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

233

u32 write_value_num_valid;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

234

u32 write_value[MAX_VFC_WRITE_SIZE];

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

239

u32 array_size;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

243

u32 addr;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

244

u32 size;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

249

u32 addr;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

250

u32 size;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

251

u32 read_regs_count;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

252

const u32 *read_regs;

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

3917

static const u32 timer_status_regs_e3[] = { 0x164014, 0x164018};

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

3918

static const u32 timer_scan_regs_e3[] = { 0x1640d0, 0x1640d4};

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

6043

static const u32 timer_status_regs_e3b0[] = { 0x164014, 0x164018};

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

6044

static const u32 timer_scan_regs_e3b0[] = { 0x1640d0, 0x1640d4};

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

8175

static const u32 page_vals_e1[] = {0};

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

8177

static const u32 page_write_regs_e1[] = {0};

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

8190

static const u32 page_vals_e1h[] = {0};

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

8192

static const u32 page_write_regs_e1h[] = {0};

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

8206

static const u32 page_vals_e2[] = { 0, 128};

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

8208

static const u32 page_write_regs_e2[] = {328476};

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

8221

static const u32 page_vals_e3[] = { 0, 128};

usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/hw_dump.h

8223

static const u32 page_write_regs_e3[] = {328476};

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/bdn.h

104

u32 link_config;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/bdn.h

156

u32 size;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/bdn.h

157

u32 uuid; // Unique identifer of the slot/chassis of the blade

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/bdn.h

165

u32 crc;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/bdn.h

63

typedef u32 bdn_cfg;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/code_swap_def.h

20

u32 nvm_offset;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/code_swap_def.h

21

u32 image_size;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/code_swap_def.h

22

u32 stat_times_loaded;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/code_swap_def.h

23

u32 stat_times_load_not_required;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/code_swap_def.h

24

u32 stat_times_load_failed;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/code_swap_def.h

25

u32 stored_gp_val;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

1007

u32 Reserved0; /* 0x460 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

1009

u32 mba_vlan_cfg;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

1017

u32 Reserved1;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

1018

u32 smbus_config;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

1022

u32 vf_config;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

1042

u32 link_config; /* Used as HW defaults for the driver */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

1081

u32 mfw_wol_link_cfg;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

1085

u32 link_config2; /* 0x47C */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

1089

u32 mfw_wol_link_cfg2; /* 0x480 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

1095

u32 eee_power_mode; /* 0x484 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

1104

u32 Reserved2[16]; /* 0x488 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

1112

u32 bc_rev; /* 8 bits each: major, minor, build */ /* 4 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

1127

u32 temperature_monitor1; /* 0x4000 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

1211

u32 temperature_monitor2; /* 0x4004 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

1217

u32 mfw_cfg; /* 0x4008 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

1235

u32 smbus_config; /* 0x400C */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

1240

u32 board_cfg; /* 0x4010 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

1285

u32 temperature_report; /* 0x4014 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

1294

u32 wwn_prefix; /* 0x4018 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

1310

u32 dbg_cfg_flags; /* 0x401C */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

1335

u32 dbg_rx_sigdet_threshold; /* 0x4020 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

1340

u32 iffe_features; /* 0x4024 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

1369

u32 current_iffe_mask; /* 0x4028 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

1389

u32 threshold_pin; /* 0x402C */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

1398

u32 mac_threshold_val; /* 0x4030 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

1407

u32 phy_threshold_val; /* 0x4034 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

1418

u32 host_pin; /* 0x4038 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

162

u32 config2; /* 0x118 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

236

u32 config_3; /* 0x11C */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

247

u32 ump_nc_si_config; /* 0x120 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

259

u32 board; /* 0x124 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

275

u32 wc_lane_config; /* 0x128 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

317

u32 pci_id;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

324

u32 pci_sub_id;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

331

u32 power_dissipated;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

341

u32 power_consumed;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

351

u32 mac_upper;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

352

u32 mac_lower; /* 0x140 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

357

u32 iscsi_mac_upper; /* Upper 16 bits are always zeroes */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

358

u32 iscsi_mac_lower;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

360

u32 rdma_mac_upper; /* Upper 16 bits are always zeroes */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

361

u32 rdma_mac_lower;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

363

u32 serdes_config;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

372

u32 reserved;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

374

u32 vf_config; /* 0x15C */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

378

u32 mf_pci_id; /* 0x160 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

383

u32 sfp_ctrl; /* 0x164 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

403

u32 e3_sfp_ctrl; /* 0x168 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

425

u32 e3_cmn_pin_cfg; /* 0x16C */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

451

u32 e3_cmn_pin_cfg1; /* 0x170 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

456

u32 generic_features; /* 0x174 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

466

u32 sfi_tap_values; /* 0x178 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

477

u32 reserved0[5]; /* 0x17c */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

479

u32 aeu_int_mask; /* 0x190 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

481

u32 media_type; /* 0x194 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

501

u32 fcoe_fip_mac_upper;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

504

u32 fcoe_fip_mac_lower;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

506

u32 fcoe_wwn_port_name_upper;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

507

u32 fcoe_wwn_port_name_lower;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

509

u32 fcoe_wwn_node_name_upper;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

510

u32 fcoe_wwn_node_name_lower;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

513

u32 wwpn_for_npiv_config; /* 0x1C0 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

520

u32 wwpn_for_npiv_valid_addresses; /* 0x1C4 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

527

u32 Reserved1[14];

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

529

u32 pf_allocation; /* 0x280 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

536

u32 xgbt_phy_cfg; /* 0x284 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

540

u32 default_cfg; /* 0x288 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

632

u32 speed_capability_mask2; /* 0x28C */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

660

u32 multi_phy_config; /* 0x290 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

678

u32 external_phy_config2; /* 0x294 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

712

u32 lane_config;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

736

u32 external_phy_config;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

774

u32 speed_capability_mask;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

800

u32 backup_mac_upper; /* 0x2B4 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

801

u32 backup_mac_lower; /* 0x2B8 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

811

u32 config; /* 0x450 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

87

u32 upper;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

871

u32 config;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

88

u32 lower;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

947

u32 wol_config;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

951

u32 mba_config;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/dev_info.h

97

u32 config; /* 0x114 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h

105

u32 qos_priority;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h

106

u32 txq_size; /* FCoE TX Descriptors Queue Size. */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h

107

u32 rxq_size; /* FCoE RX Descriptors Queue Size. */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h

109

u32 txq_avg_depth;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h

11

u32 capability1;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h

111

u32 rxq_avg_depth;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h

112

u32 rx_frames_lo; /* FCoE RX Frames received. */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h

113

u32 rx_frames_hi; /* FCoE RX Frames received. */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h

114

u32 rx_bytes_lo; /* FCoE RX Bytes received. */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h

115

u32 rx_bytes_hi; /* FCoE RX Bytes received. */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h

116

u32 tx_frames_lo; /* FCoE TX Frames sent. */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h

117

u32 tx_frames_hi; /* FCoE TX Frames sent. */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h

118

u32 tx_bytes_lo; /* FCoE TX Bytes sent. */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h

119

u32 tx_bytes_hi; /* FCoE TX Bytes sent. */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h

120

u32 rx_fcs_errors; /* number of receive packets with FCS errors */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h

121

u32 rx_fc_crc_errors; /* number of FC frames with CRC errors*/

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h

122

u32 fip_login_failures; /* number of FCoE/FIP Login failures */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h

131

u32 qos_priority;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h

140

u32 boot_target_portal; /* iSCSI Boot Target Portal. */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h

142

u32 max_frame_size; /* Max Frame Size. bytes */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h

143

u32 txq_size; /* PDU TX Descriptors Queue Size. */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h

144

u32 rxq_size; /* PDU RX Descriptors Queue Size. */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h

146

u32 txq_avg_depth; /*PDU TX Descriptor Queue Avg Depth. */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h

147

u32 rxq_avg_depth; /*PDU RX Descriptors Queue Avg Depth. */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h

148

u32 rx_pdus_lo; /* iSCSI PDUs received. */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h

149

u32 rx_pdus_hi; /* iSCSI PDUs received. */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h

151

u32 rx_bytes_lo; /* iSCSI RX Bytes received. */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h

152

u32 rx_bytes_hi; /* iSCSI RX Bytes received. */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h

153

u32 tx_pdus_lo; /* iSCSI PDUs sent. */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h

154

u32 tx_pdus_hi; /* iSCSI PDUs sent. */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h

156

u32 tx_bytes_lo; /* iSCSI PDU TX Bytes sent. */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h

157

u32 tx_bytes_hi; /* iSCSI PDU TX Bytes sent. */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h

158

u32 pcp_prior_map_tbl; /*C-PCP to S-PCP Priority MapTable.

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h

19

u32 capability2;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h

27

u32 capability3;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h

35

u32 capability4;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h

43

u32 driver_version;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h

44

u32 unused[3];

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h

67

u32 mtu_size; /* MTU Size. Note : Negotiated MTU */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h

68

u32 feature_flags; /* Feature_Flags. */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h

78

u32 lso_max_size; /* LSO MaxOffloadSize. */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h

79

u32 lso_min_seg_cnt; /* LSO MinSegmentCount. */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h

81

u32 ipv4_ofld_cnt;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h

83

u32 ipv6_ofld_cnt;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h

84

u32 promiscuous_mode; /* Promiscuous Mode. non-zero true */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h

85

u32 txq_size; /* TX Descriptors Queue Size */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h

86

u32 rxq_size; /* RX Descriptors Queue Size */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h

88

u32 txq_avg_depth;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h

90

u32 rxq_avg_depth;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h

92

u32 iov_offload;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h

94

u32 netq_cnt;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h

95

u32 vf_cnt; /* Num VF assigned to this PF. */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

10

u32 rx_stat_ifhcinucastpkts;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

100

u32 tx_stat_gtbyt_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

102

u32 rx_stat_gr64_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

103

u32 rx_stat_gr64_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

104

u32 rx_stat_gr127_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

105

u32 rx_stat_gr127_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

106

u32 rx_stat_gr255_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

107

u32 rx_stat_gr255_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

108

u32 rx_stat_gr511_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

109

u32 rx_stat_gr511_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

11

u32 rx_stat_ifhcinmulticastpkts;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

110

u32 rx_stat_gr1023_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

111

u32 rx_stat_gr1023_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

112

u32 rx_stat_gr1518_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

113

u32 rx_stat_gr1518_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

114

u32 rx_stat_gr2047_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

115

u32 rx_stat_gr2047_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

116

u32 rx_stat_gr4095_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

117

u32 rx_stat_gr4095_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

118

u32 rx_stat_gr9216_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

119

u32 rx_stat_gr9216_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

12

u32 rx_stat_ifhcinbroadcastpkts;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

120

u32 rx_stat_gr16383_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

121

u32 rx_stat_gr16383_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

122

u32 rx_stat_grmax_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

123

u32 rx_stat_grmax_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

124

u32 rx_stat_grpkt_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

125

u32 rx_stat_grpkt_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

126

u32 rx_stat_grfcs_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

127

u32 rx_stat_grfcs_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

128

u32 rx_stat_grmca_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

129

u32 rx_stat_grmca_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

13

u32 rx_stat_dot3statsfcserrors;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

130

u32 rx_stat_grbca_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

131

u32 rx_stat_grbca_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

132

u32 rx_stat_grxcf_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

133

u32 rx_stat_grxcf_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

134

u32 rx_stat_grxpf_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

135

u32 rx_stat_grxpf_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

136

u32 rx_stat_grxuo_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

137

u32 rx_stat_grxuo_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

138

u32 rx_stat_grjbr_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

139

u32 rx_stat_grjbr_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

14

u32 rx_stat_dot3statsalignmenterrors;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

140

u32 rx_stat_grovr_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

141

u32 rx_stat_grovr_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

142

u32 rx_stat_grflr_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

143

u32 rx_stat_grflr_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

144

u32 rx_stat_grmeg_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

145

u32 rx_stat_grmeg_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

146

u32 rx_stat_grmeb_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

147

u32 rx_stat_grmeb_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

148

u32 rx_stat_grbyt_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

149

u32 rx_stat_grbyt_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

15

u32 rx_stat_dot3statscarriersenseerrors;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

150

u32 rx_stat_grund_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

151

u32 rx_stat_grund_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

152

u32 rx_stat_grfrg_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

153

u32 rx_stat_grfrg_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

154

u32 rx_stat_grerb_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

155

u32 rx_stat_grerb_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

156

u32 rx_stat_grfre_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

157

u32 rx_stat_grfre_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

158

u32 rx_stat_gripj_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

159

u32 rx_stat_gripj_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

16

u32 rx_stat_xonpauseframesreceived;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

163

u32 tx_stat_gtpk_lo; /* gtpok */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

164

u32 tx_stat_gtpk_hi; /* gtpok */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

165

u32 tx_stat_gtxpf_lo; /* gtpf */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

166

u32 tx_stat_gtxpf_hi; /* gtpf */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

167

u32 tx_stat_gtpp_lo; /* NEW BMAC2 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

168

u32 tx_stat_gtpp_hi; /* NEW BMAC2 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

169

u32 tx_stat_gtfcs_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

17

u32 rx_stat_xoffpauseframesreceived;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

170

u32 tx_stat_gtfcs_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

171

u32 tx_stat_gtuca_lo; /* NEW BMAC2 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

172

u32 tx_stat_gtuca_hi; /* NEW BMAC2 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

173

u32 tx_stat_gtmca_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

174

u32 tx_stat_gtmca_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

175

u32 tx_stat_gtbca_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

176

u32 tx_stat_gtbca_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

177

u32 tx_stat_gtovr_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

178

u32 tx_stat_gtovr_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

179

u32 tx_stat_gtfrg_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

18

u32 rx_stat_maccontrolframesreceived;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

180

u32 tx_stat_gtfrg_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

181

u32 tx_stat_gtpkt1_lo; /* gtpkt */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

182

u32 tx_stat_gtpkt1_hi; /* gtpkt */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

183

u32 tx_stat_gt64_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

184

u32 tx_stat_gt64_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

185

u32 tx_stat_gt127_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

186

u32 tx_stat_gt127_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

187

u32 tx_stat_gt255_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

188

u32 tx_stat_gt255_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

189

u32 tx_stat_gt511_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

19

u32 rx_stat_xoffstateentered;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

190

u32 tx_stat_gt511_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

191

u32 tx_stat_gt1023_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

192

u32 tx_stat_gt1023_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

193

u32 tx_stat_gt1518_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

194

u32 tx_stat_gt1518_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

195

u32 tx_stat_gt2047_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

196

u32 tx_stat_gt2047_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

197

u32 tx_stat_gt4095_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

198

u32 tx_stat_gt4095_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

199

u32 tx_stat_gt9216_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

20

u32 rx_stat_dot3statsframestoolong;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

200

u32 tx_stat_gt9216_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

201

u32 tx_stat_gt16383_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

202

u32 tx_stat_gt16383_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

203

u32 tx_stat_gtmax_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

204

u32 tx_stat_gtmax_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

205

u32 tx_stat_gtufl_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

206

u32 tx_stat_gtufl_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

207

u32 tx_stat_gterr_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

208

u32 tx_stat_gterr_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

209

u32 tx_stat_gtbyt_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

21

u32 rx_stat_etherstatsjabbers;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

210

u32 tx_stat_gtbyt_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

212

u32 rx_stat_gr64_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

213

u32 rx_stat_gr64_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

214

u32 rx_stat_gr127_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

215

u32 rx_stat_gr127_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

216

u32 rx_stat_gr255_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

217

u32 rx_stat_gr255_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

218

u32 rx_stat_gr511_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

219

u32 rx_stat_gr511_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

22

u32 rx_stat_etherstatsundersizepkts;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

220

u32 rx_stat_gr1023_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

221

u32 rx_stat_gr1023_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

222

u32 rx_stat_gr1518_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

223

u32 rx_stat_gr1518_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

224

u32 rx_stat_gr2047_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

225

u32 rx_stat_gr2047_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

226

u32 rx_stat_gr4095_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

227

u32 rx_stat_gr4095_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

228

u32 rx_stat_gr9216_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

229

u32 rx_stat_gr9216_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

23

u32 rx_stat_etherstatspkts64octets;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

230

u32 rx_stat_gr16383_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

231

u32 rx_stat_gr16383_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

232

u32 rx_stat_grmax_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

233

u32 rx_stat_grmax_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

234

u32 rx_stat_grpkt_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

235

u32 rx_stat_grpkt_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

236

u32 rx_stat_grfcs_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

237

u32 rx_stat_grfcs_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

238

u32 rx_stat_gruca_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

239

u32 rx_stat_gruca_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

24

u32 rx_stat_etherstatspkts65octetsto127octets;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

240

u32 rx_stat_grmca_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

241

u32 rx_stat_grmca_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

242

u32 rx_stat_grbca_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

243

u32 rx_stat_grbca_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

244

u32 rx_stat_grxpf_lo; /* grpf */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

245

u32 rx_stat_grxpf_hi; /* grpf */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

246

u32 rx_stat_grpp_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

247

u32 rx_stat_grpp_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

248

u32 rx_stat_grxuo_lo; /* gruo */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

249

u32 rx_stat_grxuo_hi; /* gruo */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

25

u32 rx_stat_etherstatspkts128octetsto255octets;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

250

u32 rx_stat_grjbr_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

251

u32 rx_stat_grjbr_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

252

u32 rx_stat_grovr_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

253

u32 rx_stat_grovr_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

254

u32 rx_stat_grxcf_lo; /* grcf */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

255

u32 rx_stat_grxcf_hi; /* grcf */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

256

u32 rx_stat_grflr_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

257

u32 rx_stat_grflr_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

258

u32 rx_stat_grpok_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

259

u32 rx_stat_grpok_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

26

u32 rx_stat_etherstatspkts256octetsto511octets;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

260

u32 rx_stat_grmeg_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

261

u32 rx_stat_grmeg_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

262

u32 rx_stat_grmeb_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

263

u32 rx_stat_grmeb_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

264

u32 rx_stat_grbyt_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

265

u32 rx_stat_grbyt_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

266

u32 rx_stat_grund_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

267

u32 rx_stat_grund_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

268

u32 rx_stat_grfrg_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

269

u32 rx_stat_grfrg_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

27

u32 rx_stat_etherstatspkts512octetsto1023octets;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

270

u32 rx_stat_grerb_lo; /* grerrbyt */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

271

u32 rx_stat_grerb_hi; /* grerrbyt */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

272

u32 rx_stat_grfre_lo; /* grfrerr */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

273

u32 rx_stat_grfre_hi; /* grfrerr */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

274

u32 rx_stat_gripj_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

275

u32 rx_stat_gripj_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

28

u32 rx_stat_etherstatspkts1024octetsto1522octets;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

283

u32 tx_gtxpok_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

284

u32 tx_gtxpok_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

285

u32 tx_gtxpf_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

286

u32 tx_gtxpf_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

287

u32 tx_gtxpp_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

288

u32 tx_gtxpp_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

289

u32 tx_gtfcs_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

29

u32 rx_stat_etherstatspktsover1522octets;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

290

u32 tx_gtfcs_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

291

u32 tx_gtuca_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

292

u32 tx_gtuca_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

293

u32 tx_gtmca_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

294

u32 tx_gtmca_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

295

u32 tx_gtgca_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

296

u32 tx_gtgca_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

297

u32 tx_gtpkt_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

298

u32 tx_gtpkt_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

299

u32 tx_gt64_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

300

u32 tx_gt64_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

301

u32 tx_gt127_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

302

u32 tx_gt127_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

303

u32 tx_gt255_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

304

u32 tx_gt255_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

305

u32 tx_gt511_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

306

u32 tx_gt511_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

307

u32 tx_gt1023_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

308

u32 tx_gt1023_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

309

u32 tx_gt1518_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

31

u32 rx_stat_falsecarriererrors;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

310

u32 tx_gt1518_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

311

u32 tx_gt2047_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

312

u32 tx_gt2047_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

313

u32 tx_gt4095_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

314

u32 tx_gt4095_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

315

u32 tx_gt9216_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

316

u32 tx_gt9216_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

317

u32 tx_gt16383_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

318

u32 tx_gt16383_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

319

u32 tx_gtufl_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

320

u32 tx_gtufl_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

321

u32 tx_gterr_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

322

u32 tx_gterr_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

323

u32 tx_gtbyt_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

324

u32 tx_gtbyt_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

325

u32 tx_collisions_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

326

u32 tx_collisions_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

327

u32 tx_singlecollision_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

328

u32 tx_singlecollision_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

329

u32 tx_multiplecollisions_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

33

u32 tx_stat_ifhcoutoctets;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

330

u32 tx_multiplecollisions_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

331

u32 tx_deferred_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

332

u32 tx_deferred_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

333

u32 tx_excessivecollisions_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

334

u32 tx_excessivecollisions_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

335

u32 tx_latecollisions_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

336

u32 tx_latecollisions_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

34

u32 tx_stat_ifhcoutbadoctets;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

340

u32 rx_gr64_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

341

u32 rx_gr64_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

342

u32 rx_gr127_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

343

u32 rx_gr127_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

344

u32 rx_gr255_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

345

u32 rx_gr255_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

346

u32 rx_gr511_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

347

u32 rx_gr511_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

348

u32 rx_gr1023_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

349

u32 rx_gr1023_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

35

u32 tx_stat_etherstatscollisions;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

350

u32 rx_gr1518_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

351

u32 rx_gr1518_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

352

u32 rx_gr2047_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

353

u32 rx_gr2047_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

354

u32 rx_gr4095_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

355

u32 rx_gr4095_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

356

u32 rx_gr9216_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

357

u32 rx_gr9216_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

358

u32 rx_gr16383_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

359

u32 rx_gr16383_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

36

u32 tx_stat_outxonsent;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

360

u32 rx_grpkt_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

361

u32 rx_grpkt_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

362

u32 rx_grfcs_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

363

u32 rx_grfcs_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

364

u32 rx_gruca_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

365

u32 rx_gruca_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

366

u32 rx_grmca_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

367

u32 rx_grmca_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

368

u32 rx_grbca_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

369

u32 rx_grbca_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

37

u32 tx_stat_outxoffsent;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

370

u32 rx_grxpf_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

371

u32 rx_grxpf_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

372

u32 rx_grxpp_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

373

u32 rx_grxpp_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

374

u32 rx_grxuo_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

375

u32 rx_grxuo_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

376

u32 rx_grovr_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

377

u32 rx_grovr_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

378

u32 rx_grxcf_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

379

u32 rx_grxcf_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

38

u32 tx_stat_flowcontroldone;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

380

u32 rx_grflr_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

381

u32 rx_grflr_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

382

u32 rx_grpok_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

383

u32 rx_grpok_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

384

u32 rx_grbyt_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

385

u32 rx_grbyt_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

386

u32 rx_grund_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

387

u32 rx_grund_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

388

u32 rx_grfrg_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

389

u32 rx_grfrg_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

39

u32 tx_stat_dot3statssinglecollisionframes;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

390

u32 rx_grerb_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

391

u32 rx_grerb_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

392

u32 rx_grfre_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

393

u32 rx_grfre_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

395

u32 rx_alignmenterrors_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

396

u32 rx_alignmenterrors_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

397

u32 rx_falsecarrier_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

398

u32 rx_falsecarrier_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

399

u32 rx_llfcmsgcnt_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

40

u32 tx_stat_dot3statsmultiplecollisionframes;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

400

u32 rx_llfcmsgcnt_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

41

u32 tx_stat_dot3statsdeferredtransmissions;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

414

u32 rx_stat_ifhcinbadoctets_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

415

u32 rx_stat_ifhcinbadoctets_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

418

u32 tx_stat_ifhcoutbadoctets_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

419

u32 tx_stat_ifhcoutbadoctets_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

42

u32 tx_stat_dot3statsexcessivecollisions;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

422

u32 rx_stat_dot3statsfcserrors_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

423

u32 rx_stat_dot3statsfcserrors_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

425

u32 rx_stat_dot3statsalignmenterrors_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

426

u32 rx_stat_dot3statsalignmenterrors_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

428

u32 rx_stat_dot3statscarriersenseerrors_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

429

u32 rx_stat_dot3statscarriersenseerrors_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

43

u32 tx_stat_dot3statslatecollisions;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

431

u32 rx_stat_falsecarriererrors_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

432

u32 rx_stat_falsecarriererrors_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

435

u32 rx_stat_etherstatsundersizepkts_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

436

u32 rx_stat_etherstatsundersizepkts_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

438

u32 rx_stat_dot3statsframestoolong_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

439

u32 rx_stat_dot3statsframestoolong_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

44

u32 tx_stat_ifhcoutucastpkts;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

442

u32 rx_stat_etherstatsfragments_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

443

u32 rx_stat_etherstatsfragments_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

445

u32 rx_stat_etherstatsjabbers_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

446

u32 rx_stat_etherstatsjabbers_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

449

u32 rx_stat_maccontrolframesreceived_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

45

u32 tx_stat_ifhcoutmulticastpkts;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

450

u32 rx_stat_maccontrolframesreceived_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

451

u32 rx_stat_mac_xpf_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

452

u32 rx_stat_mac_xpf_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

453

u32 rx_stat_mac_xcf_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

454

u32 rx_stat_mac_xcf_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

457

u32 rx_stat_xoffstateentered_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

458

u32 rx_stat_xoffstateentered_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

46

u32 tx_stat_ifhcoutbroadcastpkts;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

460

u32 rx_stat_xonpauseframesreceived_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

461

u32 rx_stat_xonpauseframesreceived_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

463

u32 rx_stat_xoffpauseframesreceived_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

464

u32 rx_stat_xoffpauseframesreceived_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

466

u32 tx_stat_outxonsent_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

467

u32 tx_stat_outxonsent_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

469

u32 tx_stat_outxoffsent_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

47

u32 tx_stat_etherstatspkts64octets;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

470

u32 tx_stat_outxoffsent_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

472

u32 tx_stat_flowcontroldone_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

473

u32 tx_stat_flowcontroldone_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

476

u32 tx_stat_etherstatscollisions_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

477

u32 tx_stat_etherstatscollisions_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

479

u32 tx_stat_dot3statssinglecollisionframes_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

48

u32 tx_stat_etherstatspkts65octetsto127octets;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

480

u32 tx_stat_dot3statssinglecollisionframes_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

482

u32 tx_stat_dot3statsmultiplecollisionframes_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

483

u32 tx_stat_dot3statsmultiplecollisionframes_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

485

u32 tx_stat_dot3statsdeferredtransmissions_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

486

u32 tx_stat_dot3statsdeferredtransmissions_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

488

u32 tx_stat_dot3statsexcessivecollisions_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

489

u32 tx_stat_dot3statsexcessivecollisions_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

49

u32 tx_stat_etherstatspkts128octetsto255octets;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

491

u32 tx_stat_dot3statslatecollisions_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

492

u32 tx_stat_dot3statslatecollisions_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

495

u32 tx_stat_etherstatspkts64octets_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

496

u32 tx_stat_etherstatspkts64octets_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

498

u32 tx_stat_etherstatspkts65octetsto127octets_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

499

u32 tx_stat_etherstatspkts65octetsto127octets_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

50

u32 tx_stat_etherstatspkts256octetsto511octets;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

501

u32 tx_stat_etherstatspkts128octetsto255octets_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

502

u32 tx_stat_etherstatspkts128octetsto255octets_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

504

u32 tx_stat_etherstatspkts256octetsto511octets_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

505

u32 tx_stat_etherstatspkts256octetsto511octets_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

507

u32 tx_stat_etherstatspkts512octetsto1023octets_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

508

u32 tx_stat_etherstatspkts512octetsto1023octets_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

51

u32 tx_stat_etherstatspkts512octetsto1023octets;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

510

u32 tx_stat_etherstatspkts1024octetsto1522octets_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

511

u32 tx_stat_etherstatspkts1024octetsto1522octets_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

513

u32 tx_stat_etherstatspktsover1522octets_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

514

u32 tx_stat_etherstatspktsover1522octets_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

515

u32 tx_stat_mac_2047_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

516

u32 tx_stat_mac_2047_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

517

u32 tx_stat_mac_4095_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

518

u32 tx_stat_mac_4095_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

519

u32 tx_stat_mac_9216_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

52

u32 tx_stat_etherstatspkts1024octetsto1522octets;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

520

u32 tx_stat_mac_9216_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

521

u32 tx_stat_mac_16383_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

522

u32 tx_stat_mac_16383_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

525

u32 tx_stat_dot3statsinternalmactransmiterrors_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

526

u32 tx_stat_dot3statsinternalmactransmiterrors_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

529

u32 tx_stat_mac_ufl_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

53

u32 tx_stat_etherstatspktsover1522octets;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

530

u32 tx_stat_mac_ufl_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

537

u32 host_port_stats_counter;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

54

u32 tx_stat_dot3statsinternalmactransmiterrors;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

541

u32 brb_drop_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

542

u32 brb_drop_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

544

u32 not_used; /* obsolete as of MFW 7.2.1 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

546

u32 pfc_frames_tx_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

547

u32 pfc_frames_tx_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

548

u32 pfc_frames_rx_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

549

u32 pfc_frames_rx_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

551

u32 eee_lpi_count_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

552

u32 eee_lpi_count_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

557

u32 host_func_stats_start;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

559

u32 total_bytes_received_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

560

u32 total_bytes_received_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

562

u32 total_bytes_transmitted_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

563

u32 total_bytes_transmitted_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

565

u32 total_unicast_packets_received_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

566

u32 total_unicast_packets_received_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

568

u32 total_multicast_packets_received_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

569

u32 total_multicast_packets_received_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

571

u32 total_broadcast_packets_received_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

572

u32 total_broadcast_packets_received_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

574

u32 total_unicast_packets_transmitted_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

575

u32 total_unicast_packets_transmitted_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

577

u32 total_multicast_packets_transmitted_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

578

u32 total_multicast_packets_transmitted_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

580

u32 total_broadcast_packets_transmitted_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

581

u32 total_broadcast_packets_transmitted_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

583

u32 valid_bytes_received_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

584

u32 valid_bytes_received_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

586

u32 host_func_stats_end;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

59

u32 tx_stat_gtpkt_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

598

u32 tx_unicast_frames_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

599

u32 tx_unicast_frames_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

60

u32 tx_stat_gtpkt_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

600

u32 tx_unicast_bytes_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

601

u32 tx_unicast_bytes_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

602

u32 tx_multicast_frames_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

603

u32 tx_multicast_frames_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

604

u32 tx_multicast_bytes_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

605

u32 tx_multicast_bytes_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

606

u32 tx_broadcast_frames_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

607

u32 tx_broadcast_frames_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

608

u32 tx_broadcast_bytes_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

609

u32 tx_broadcast_bytes_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

61

u32 tx_stat_gtxpf_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

610

u32 tx_frames_discarded_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

611

u32 tx_frames_discarded_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

612

u32 tx_frames_dropped_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

613

u32 tx_frames_dropped_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

615

u32 rx_unicast_frames_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

616

u32 rx_unicast_frames_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

617

u32 rx_unicast_bytes_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

618

u32 rx_unicast_bytes_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

619

u32 rx_multicast_frames_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

62

u32 tx_stat_gtxpf_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

620

u32 rx_multicast_frames_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

621

u32 rx_multicast_bytes_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

622

u32 rx_multicast_bytes_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

623

u32 rx_broadcast_frames_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

624

u32 rx_broadcast_frames_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

625

u32 rx_broadcast_bytes_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

626

u32 rx_broadcast_bytes_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

627

u32 rx_frames_discarded_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

628

u32 rx_frames_discarded_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

629

u32 rx_frames_dropped_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

63

u32 tx_stat_gtfcs_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

630

u32 rx_frames_dropped_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

638

u32 size; /* size of this structure (i.e. sizeof(port_info)) */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

639

u32 enabled; /* 0 =Disabled, 1= Enabled */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

64

u32 tx_stat_gtfcs_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

640

u32 link_speed; /* multiplier of 100Mb */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

641

u32 wol_support; /* WoL Support (i.e. Non-Zero if WOL supported ) */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

642

u32 flow_control; /* 802.3X Flow Ctrl. 0=off 1=RX 2=TX 3=RX&TX.*/

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

643

u32 flex10; /* Flex10 mode enabled. non zero = yes */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

644

u32 rx_drops; /* RX Discards. Counters roll over, never reset */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

645

u32 rx_errors; /* RX Errors. Physical Port Stats L95, All PFs and NC-SI.

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

647

u32 rx_uncast_lo; /* RX Unicast Packets. Free running counters: */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

648

u32 rx_uncast_hi; /* RX Unicast Packets. Free running counters: */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

649

u32 rx_mcast_lo; /* RX Multicast Packets */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

65

u32 tx_stat_gtmca_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

650

u32 rx_mcast_hi; /* RX Multicast Packets */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

651

u32 rx_bcast_lo; /* RX Broadcast Packets */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

652

u32 rx_bcast_hi; /* RX Broadcast Packets */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

653

u32 tx_uncast_lo; /* TX Unicast Packets */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

654

u32 tx_uncast_hi; /* TX Unicast Packets */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

655

u32 tx_mcast_lo; /* TX Multicast Packets */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

656

u32 tx_mcast_hi; /* TX Multicast Packets */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

657

u32 tx_bcast_lo; /* TX Broadcast Packets */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

658

u32 tx_bcast_hi; /* TX Broadcast Packets */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

659

u32 tx_errors; /* TX Errors */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

66

u32 tx_stat_gtmca_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

660

u32 tx_discards; /* TX Discards */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

661

u32 rx_frames_lo; /* RX Frames received */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

662

u32 rx_frames_hi; /* RX Frames received */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

663

u32 rx_bytes_lo; /* RX Bytes received */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

664

u32 rx_bytes_hi; /* RX Bytes received */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

665

u32 tx_frames_lo; /* TX Frames sent */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

666

u32 tx_frames_hi; /* TX Frames sent */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

667

u32 tx_bytes_lo; /* TX Bytes sent */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

668

u32 tx_bytes_hi; /* TX Bytes sent */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

669

u32 link_status; /* Port P Link Status. 1:0 bit for port enabled.

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

67

u32 tx_stat_gtbca_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

672

u32 tx_pfc_frames_lo; /* PFC Frames sent. */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

673

u32 tx_pfc_frames_hi; /* PFC Frames sent. */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

674

u32 rx_pfc_frames_lo; /* PFC Frames Received. */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

675

u32 rx_pfc_frames_hi; /* PFC Frames Received. */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

68

u32 tx_stat_gtbca_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

69

u32 tx_stat_gtfrg_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

7

u32 rx_stat_ifhcinoctets;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

70

u32 tx_stat_gtfrg_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

71

u32 tx_stat_gtovr_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

72

u32 tx_stat_gtovr_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

73

u32 tx_stat_gt64_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

74

u32 tx_stat_gt64_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

75

u32 tx_stat_gt127_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

76

u32 tx_stat_gt127_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

77

u32 tx_stat_gt255_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

78

u32 tx_stat_gt255_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

79

u32 tx_stat_gt511_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

8

u32 rx_stat_ifhcinbadoctets;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

80

u32 tx_stat_gt511_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

81

u32 tx_stat_gt1023_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

82

u32 tx_stat_gt1023_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

83

u32 tx_stat_gt1518_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

84

u32 tx_stat_gt1518_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

85

u32 tx_stat_gt2047_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

86

u32 tx_stat_gt2047_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

87

u32 tx_stat_gt4095_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

88

u32 tx_stat_gt4095_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

89

u32 tx_stat_gt9216_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

9

u32 rx_stat_etherstatsfragments;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

90

u32 tx_stat_gt9216_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

91

u32 tx_stat_gt16383_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

92

u32 tx_stat_gt16383_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

93

u32 tx_stat_gtmax_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

94

u32 tx_stat_gtmax_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

95

u32 tx_stat_gtufl_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

96

u32 tx_stat_gtufl_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

97

u32 tx_stat_gterr_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

98

u32 tx_stat_gterr_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_stats.h

99

u32 tx_stat_gtbyt_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/multi_thread_def.h

102

u32 total_cpu_time;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/multi_thread_def.h

103

u32 times_in_cpu;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/multi_thread_def.h

104

u32 going_to_sleep_count;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/multi_thread_def.h

105

u32 waking_up_count;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/multi_thread_def.h

106

u32 swim_failure_cnt;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/multi_thread_def.h

107

u32 swim_failure_timeout_cnt;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/multi_thread_def.h

111

u32 current_SP; /* Current_SP will be initialized as the start of stack */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/multi_thread_def.h

112

u32 stack_guard_addr;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/multi_thread_def.h

114

u32 start_time; /* The time that the thread started to run */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/multi_thread_def.h

115

u32 time_slice_ticks; /* Const value initialized once during compilation (only for the Network Manager) */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/multi_thread_def.h

116

u32 /* thread_state_e*/ state;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/multi_thread_def.h

117

u32 sleep_time; /* In ticks */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/multi_thread_def.h

118

u32 sleep_length; /* In ticks */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/multi_thread_def.h

119

u32 swim_load_fail_time;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/multi_thread_def.h

125

u32 times_called;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/multi_thread_def.h

129

u32 cur_thread;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/multi_thread_def.h

75

u32 io_rsp; /* The response to write */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/multi_thread_def.h

89

u32 front; /* For de-queue */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/multi_thread_def.h

90

u32 rear; /* For queuing */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/multi_thread_def.h

91

u32 attributes;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/multi_thread_def.h

98

#define THREAD_FUNC_PTR u32

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/nvm_map.h

404

u32 gbl_cfg;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/nvm_map.h

414

u32 port_cfg;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/nvm_map.h

434

u32 Reserved0[2];

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/nvm_map.h

439

u32 func_cfg;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/nvm_map.h

459

u32 net_mac_addr_upper;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/nvm_map.h

461

u32 net_mac_addr_lower;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/nvm_map.h

463

u32 iscsi_mac_addr_upper;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/nvm_map.h

465

u32 iscsi_mac_addr_lower;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/nvm_map.h

467

u32 fcoe_mac_addr_upper;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/nvm_map.h

469

u32 fcoe_mac_addr_lower;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/nvm_map.h

471

u32 fcoe_node_wwn_upper;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/nvm_map.h

473

u32 fcoe_node_wwn_lower;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/nvm_map.h

475

u32 fcoe_port_wwn_upper;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/nvm_map.h

477

u32 fcoe_port_wwn_lower;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/nvm_map.h

479

u32 pf_allocation;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/nvm_map.h

501

u32 gbl_cfg; /* 0x1000 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/nvm_map.h

506

u32 Reserved0[2]; /* 0x1004 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/nvm_map.h

511

u32 port_cfg; /* 0x100C */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/nvm_map.h

530

u32 bw_params; /* 0x1024 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/nvm_map.h

538

u32 func_cfg_1; /* 0x1028 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/nvm_map.h

562

u32 net_mac_addr_upper; /* 0x102B */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/nvm_map.h

564

u32 net_mac_addr_lower; /* 0x102F */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/nvm_map.h

566

u32 iscsi_mac_addr_upper; /* 0x1034 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/nvm_map.h

568

u32 iscsi_mac_addr_lower; /* 0x1038 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/nvm_map.h

570

u32 fcoe_mac_addr_upper; /* 0x103C */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/nvm_map.h

572

u32 fcoe_mac_addr_lower; /* 0x1040 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/nvm_map.h

574

u32 fcoe_node_wwn_upper; /* 0x1044 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/nvm_map.h

576

u32 fcoe_node_wwn_lower; /* 0x1048 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/nvm_map.h

578

u32 fcoe_port_wwn_upper; /* 0x104C */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/nvm_map.h

580

u32 fcoe_port_wwn_lower; /* 0x1050 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/nvm_map.h

584

u32 Reserved0[2]; /* 0x10A4 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/nvm_map.h

591

u32 reserved[2];

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

1000

u32 dcbx_lldp_dcbx_stat_offset; /* 0x0064 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

1012

u32 edebug_driver_if[2]; /* 0x0068 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

1017

u32 nvm_retain_bitmap_addr; /* 0x0070 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

1020

u32 afex_driver_support; /* 0x0074 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

1026

u32 afex_scratchpad_addr_to_write[E2_FUNC_MAX];

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

1032

u32 afex_param1_to_driver[E2_FUNC_MAX]; /* 0x0088 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

1033

u32 afex_param2_to_driver[E2_FUNC_MAX]; /* 0x0098 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

1035

u32 swim_base_addr; /* 0x0108 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

1036

u32 swim_funcs;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

1037

u32 swim_main_cb;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

1043

u32 afex_profiles_enabled[2];

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

1046

u32 drv_flags;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

1068

u32 extended_dev_info_shared_addr;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

1069

u32 ncsi_oem_data_addr;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

1071

u32 sensor_data_addr;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

1072

u32 buffer_block_addr;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

1073

u32 sensor_data_req_update_interval;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

1074

u32 temperature_in_half_celsius;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

1075

u32 glob_struct_in_host;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

1077

u32 dcbx_neg_res_ext_offset;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

1080

u32 drv_capabilities_flag[E2_FUNC_MAX];

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

1088

u32 extended_dev_info_shared_cfg_size;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

1090

u32 dcbx_en[PORT_MAX];

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

1093

u32 multi_thread_data_offset;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

1096

u32 drv_info_host_addr_lo;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

1097

u32 drv_info_host_addr_hi;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

1100

u32 drv_info_control;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

1105

u32 ibft_host_addr; /* initialized by option ROM */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

1108

u32 pf_allocation[E2_FUNC_MAX];

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

1126

u32 eee_status[PORT_MAX];

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

114

u32 port_stx;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

1142

u32 sizeof_port_stats;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

1145

u32 lfa_host_addr[PORT_MAX];

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

1148

u32 extphy_temps_in_celsius;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

1152

u32 ocdata_info_addr; /* Offset 0x148 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

1153

u32 drv_func_info_addr; /* Offset 0x14C */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

1154

u32 drv_func_info_size; /* Offset 0x150 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

1155

u32 link_attr_sync[PORT_MAX]; /* Offset 0x154 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

116

u32 stat_nig_timer;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

1163

u32 ibft_host_addr_hi; /* Initialize by uEFI ROM Offset 0x158 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

1164

u32 fcode_ver; /* Offset 0x15c */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

1165

u32 link_change_count[PORT_MAX]; /* Offset 0x160-0x164 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

1171

u32 mfw_drv_indication;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

119

u32 ext_phy_fw_version;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

126

u32 drv_mb_header;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

204

u32 drv_mb_param;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

218

u32 fw_mb_header;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

288

u32 fw_mb_param;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

292

u32 drv_pulse_mb;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

306

u32 mcp_pulse_mb;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

314

u32 iscsi_boot_signature;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

315

u32 iscsi_boot_block_offset;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

317

u32 drv_status;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

349

u32 virt_mac_upper;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

352

u32 virt_mac_lower;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

364

u32 opaque[MGMTFW_STATE_WORD_SIZE];

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

373

u32 clp_mb;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

384

u32 dynamic_cfg; /* device control channel */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

389

u32 reserved[1];

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

395

u32 config;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

431

u32 mac_upper; /* MAC */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

435

u32 mac_lower;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

438

u32 e1hov_tag; /* VNI */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

447

u32 afex_config;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

456

u32 pf_allocation;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

470

u32 func_cfg;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

479

u32 iscsi_mac_addr_upper;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

480

u32 iscsi_mac_addr_lower;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

482

u32 fcoe_mac_addr_upper;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

483

u32 fcoe_mac_addr_lower;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

485

u32 fcoe_wwn_port_name_upper;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

486

u32 fcoe_wwn_port_name_lower;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

488

u32 fcoe_wwn_node_name_upper;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

489

u32 fcoe_wwn_node_name_lower;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

491

u32 preserve_data;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

51

u32 link_status;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

519

u32 validity_map[PORT_MAX]; /* 0x0 (4*2 = 0x8) */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

545

u32 fw_info_fio_offset; /* 0x4a8 (0x4) */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

578

u32 pf_ack;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

579

u32 vf_ack;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

580

u32 iov_dis_ack;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

584

u32 aggint;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

585

u32 opgen_addr;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

590

u32 tx_tw;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

591

u32 rx_tw;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

677

u32 enabled;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

678

u32 pg_bw_tbl[2];

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

679

u32 pri_pg_tbl[1];

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

803

u32 peer_chassis_id[REM_CHASSIS_ID_STAT_LEN];

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

805

u32 peer_port_id[REM_PORT_ID_STAT_LEN];

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

812

u32 local_chassis_id[LOCAL_CHASSIS_ID_STAT_LEN];

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

814

u32 local_port_id[LOCAL_PORT_ID_STAT_LEN];

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

816

u32 num_tx_dcbx_pkts;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

818

u32 num_rx_dcbx_pkts;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

823

u32 ver_cfg_flags;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

844

u32 prefix_seq_num;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

845

u32 flags;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

858

u32 suffix_seq_num;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

863

u32 prefix_seq_num;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

865

u32 error;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

876

u32 suffix_seq_num;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

880

u32 prefix_seq_num;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

883

u32 suffix_seq_num;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

892

u32 req_duplex;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

897

u32 req_flow_ctrl;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

902

u32 req_line_speed; /* Also determine AutoNeg */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

907

u32 speed_cap_mask[SHMEM_LINK_CONFIG_SIZE];

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

908

u32 additional_config;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

912

u32 lfa_sts;

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

949

u32 versions[MAX_DRV_PERS];

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

954

u32 size; /* 0x0000 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

956

u32 dcc_support; /* 0x0004 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

964

u32 ext_phy_fw_version2[PORT_MAX]; /* 0x0008 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

970

u32 mf_cfg_addr; /* 0x0010 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

974

u32 dcbx_lldp_params_offset; /* 0x0028 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

976

u32 dcbx_neg_res_offset; /* 0x002c */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

978

u32 dcbx_remote_mib_offset; /* 0x0030 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

986

u32 other_shmem_base_addr; /* 0x0034 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

987

u32 other_shmem2_base_addr; /* 0x0038 */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

992

u32 mcp_vf_disabled[E2_VF_MAX / 32]; /* 0x003c */

usr/src/uts/common/io/bnxe/577xx/hsi/mcp/shmem.h

998

u32 drv_ack_vf_disabled[E2_FUNC_MAX][E2_VF_MAX / 32]; /* 0x0044 */

usr/src/uts/common/io/bnxe/577xx/include/bcmtype.h

74

typedef u32 u32_t;

usr/src/uts/common/io/bnxe/bnxe_debug.c

105

void elink_cb_dbg2(struct elink_dev * bp, char * fmt, u32 arg1, u32 arg2)

usr/src/uts/common/io/bnxe/bnxe_debug.c

122

void elink_cb_dbg3(struct elink_dev * bp, char * fmt, u32 arg1, u32 arg2, u32 arg3)

usr/src/uts/common/io/bnxe/bnxe_debug.c

88

void elink_cb_dbg1(struct elink_dev * bp, char * fmt, u32 arg1)

usr/src/uts/common/io/chxge/ch.h

322

int tpi_read(ch_t *obj, u32 addr, u32 *value);

usr/src/uts/common/io/chxge/com/ch_mac.c

106

u32 mac_intr;

usr/src/uts/common/io/chxge/com/ch_mac.c

132

u32 mac_intr;

usr/src/uts/common/io/chxge/com/ch_mac.c

157

u32 data32_lo, data32_hi;

usr/src/uts/common/io/chxge/com/ch_mac.c

175

u32 data32;

usr/src/uts/common/io/chxge/com/ch_mac.c

202

u32 val;

usr/src/uts/common/io/chxge/com/ch_mac.c

218

u32 data32;

usr/src/uts/common/io/chxge/com/ch_mac.c

253

u32 val;

usr/src/uts/common/io/chxge/com/ch_mac.c

268

u32 val;

usr/src/uts/common/io/chxge/com/ch_mac.c

282

mac_set_ifs(struct cmac *mac, u32 mode)

usr/src/uts/common/io/chxge/com/ch_mac.c

293

u32 data32 = t1_read_reg_4(mac->adapter,

usr/src/uts/common/io/chxge/com/ch_mac.c

317

u32 *p = (u32 *) & st, i;

usr/src/uts/common/io/chxge/com/ch_mac.c

321

for (i = 0; i < sizeof (st) / sizeof (u32); i++)

usr/src/uts/common/io/chxge/com/ch_mac.c

374

u32 data32;

usr/src/uts/common/io/chxge/com/ch_mac.c

39

u32 TxFramesTransmittedOK;

usr/src/uts/common/io/chxge/com/ch_mac.c

40

u32 TxReserved1;

usr/src/uts/common/io/chxge/com/ch_mac.c

41

u32 TxReserved2;

usr/src/uts/common/io/chxge/com/ch_mac.c

42

u32 TxOctetsTransmittedOK;

usr/src/uts/common/io/chxge/com/ch_mac.c

43

u32 TxFramesWithDeferredXmissions;

usr/src/uts/common/io/chxge/com/ch_mac.c

44

u32 TxLateCollisions;

usr/src/uts/common/io/chxge/com/ch_mac.c

45

u32 TxFramesAbortedDueToXSCollisions;

usr/src/uts/common/io/chxge/com/ch_mac.c

46

u32 TxFramesLostDueToIntMACXmitError;

usr/src/uts/common/io/chxge/com/ch_mac.c

47

u32 TxReserved3;

usr/src/uts/common/io/chxge/com/ch_mac.c

48

u32 TxMulticastFrameXmittedOK;

usr/src/uts/common/io/chxge/com/ch_mac.c

49

u32 TxBroadcastFramesXmittedOK;

usr/src/uts/common/io/chxge/com/ch_mac.c

50

u32 TxFramesWithExcessiveDeferral;

usr/src/uts/common/io/chxge/com/ch_mac.c

51

u32 TxPAUSEMACCtrlFramesTransmitted;

usr/src/uts/common/io/chxge/com/ch_mac.c

54

u32 RxFramesReceivedOK;

usr/src/uts/common/io/chxge/com/ch_mac.c

55

u32 RxFrameCheckSequenceErrors;

usr/src/uts/common/io/chxge/com/ch_mac.c

56

u32 RxAlignmentErrors;

usr/src/uts/common/io/chxge/com/ch_mac.c

57

u32 RxOctetsReceivedOK;

usr/src/uts/common/io/chxge/com/ch_mac.c

58

u32 RxFramesLostDueToIntMACRcvError;

usr/src/uts/common/io/chxge/com/ch_mac.c

59

u32 RxMulticastFramesReceivedOK;

usr/src/uts/common/io/chxge/com/ch_mac.c

60

u32 RxBroadcastFramesReceivedOK;

usr/src/uts/common/io/chxge/com/ch_mac.c

61

u32 RxInRangeLengthErrors;

usr/src/uts/common/io/chxge/com/ch_mac.c

62

u32 RxTxOutOfRangeLengthField;

usr/src/uts/common/io/chxge/com/ch_mac.c

63

u32 RxFrameTooLongErrors;

usr/src/uts/common/io/chxge/com/ch_mac.c

64

u32 RxPAUSEMACCtrlFramesReceived;

usr/src/uts/common/io/chxge/com/ch_mac.c

75

u32 index;

usr/src/uts/common/io/chxge/com/ch_mac.c

80

u32 mac_intr;

usr/src/uts/common/io/chxge/com/ch_subr.c

101

t1_tpi_write(adapter_t *adapter, u32 addr, u32 value)

usr/src/uts/common/io/chxge/com/ch_subr.c

1010

u32 pl_intr = t1_read_reg_4(adapter, A_PL_ENABLE);

usr/src/uts/common/io/chxge/com/ch_subr.c

1088

u32 pl_intr = t1_read_reg_4(adapter, A_PL_CAUSE);

usr/src/uts/common/io/chxge/com/ch_subr.c

1104

u32 cause = t1_read_reg_4(adapter, A_PL_CAUSE);

usr/src/uts/common/io/chxge/com/ch_subr.c

115

__t1_tpi_read(adapter_t *adapter, u32 addr, u32 *valp)

usr/src/uts/common/io/chxge/com/ch_subr.c

1150

u32 mod_detect;

usr/src/uts/common/io/chxge/com/ch_subr.c

1151

u32 gpo;

usr/src/uts/common/io/chxge/com/ch_subr.c

1171

u32 val = t1_read_reg_4(adapter, A_TP_PC_CONFIG);

usr/src/uts/common/io/chxge/com/ch_subr.c

1250

u32 val = t1_read_reg_4(adapter, A_MC4_CFG);

usr/src/uts/common/io/chxge/com/ch_subr.c

1288

u32 pci_mode;

usr/src/uts/common/io/chxge/com/ch_subr.c

134

t1_tpi_read(adapter_t *adapter, u32 addr, u32 *valp)

usr/src/uts/common/io/chxge/com/ch_subr.c

147

static void t1_tpi_par(adapter_t *adapter, u32 value)

usr/src/uts/common/io/chxge/com/ch_subr.c

183

u32 pcix_cause;

usr/src/uts/common/io/chxge/com/ch_subr.c

205

u32 cause = t1_read_reg_4(adapter, FPGA_GMAC_ADDR_INTERRUPT_CAUSE);

usr/src/uts/common/io/chxge/com/ch_subr.c

224

u32 cause = t1_read_reg_4(adapter, A_PL_CAUSE);

usr/src/uts/common/io/chxge/com/ch_subr.c

238

u32 tp_cause = t1_read_reg_4(adapter,

usr/src/uts/common/io/chxge/com/ch_subr.c

326

u32 val;

usr/src/uts/common/io/chxge/com/ch_subr.c

344

u32 clkdiv = bi->clock_elmer0 / (2 * bi->mdio_mdc) - 1;

usr/src/uts/common/io/chxge/com/ch_subr.c

345

u32 val = F_MI1_PREAMBLE_ENABLE | V_MI1_MDI_INVERT(bi->mdio_mdiinv) |

usr/src/uts/common/io/chxge/com/ch_subr.c

360

u32 addr = V_MI1_REG_ADDR(reg_addr) | V_MI1_PHY_ADDR(phy_addr);

usr/src/uts/common/io/chxge/com/ch_subr.c

378

u32 addr = V_MI1_REG_ADDR(reg_addr) | V_MI1_PHY_ADDR(phy_addr);

usr/src/uts/common/io/chxge/com/ch_subr.c

407

u32 addr = V_MI1_REG_ADDR(mmd_addr) | V_MI1_PHY_ADDR(phy_addr);

usr/src/uts/common/io/chxge/com/ch_subr.c

433

u32 addr = V_MI1_REG_ADDR(mmd_addr) | V_MI1_PHY_ADDR(phy_addr);

usr/src/uts/common/io/chxge/com/ch_subr.c

458

u32 addr = V_MI1_REG_ADDR(mmd_addr) | V_MI1_PHY_ADDR(phy_addr);

usr/src/uts/common/io/chxge/com/ch_subr.c

61

int t1_wait_op_done(adapter_t *adapter, int reg, u32 mask, int polarity,

usr/src/uts/common/io/chxge/com/ch_subr.c

65

u32 val = t1_read_reg_4(adapter, reg) & mask;

usr/src/uts/common/io/chxge/com/ch_subr.c

743

u32 format_version;

usr/src/uts/common/io/chxge/com/ch_subr.c

758

t1_seeprom_read(adapter_t *adapter, u32 addr, u32 *data)

usr/src/uts/common/io/chxge/com/ch_subr.c

787

for (addr = 0; !ret && addr < sizeof (*vpd); addr += sizeof (u32))

usr/src/uts/common/io/chxge/com/ch_subr.c

789

(u32 *)((u8 *)vpd + addr));

usr/src/uts/common/io/chxge/com/ch_subr.c

84

__t1_tpi_write(adapter_t *adapter, u32 addr, u32 value)

usr/src/uts/common/io/chxge/com/ch_subr.c

868

u32 cause;

usr/src/uts/common/io/chxge/com/ch_subr.c

933

u32 mod_detect;

usr/src/uts/common/io/chxge/com/common.h

236

int __t1_tpi_read(adapter_t *adapter, u32 addr, u32 *valp);

usr/src/uts/common/io/chxge/com/common.h

237

int __t1_tpi_write(adapter_t *adapter, u32 addr, u32 value);

usr/src/uts/common/io/chxge/com/common.h

238

int t1_tpi_write(adapter_t *adapter, u32 addr, u32 value);

usr/src/uts/common/io/chxge/com/common.h

239

int t1_tpi_read(adapter_t *adapter, u32 addr, u32 *value);

usr/src/uts/common/io/chxge/com/common.h

240

int t1_wait_op_done(adapter_t *adapter, int reg, u32 mask, int polarity,

usr/src/uts/common/io/chxge/com/common.h

253

int t1_seeprom_read(adapter_t *adapter, u32 addr, u32 *data);

usr/src/uts/common/io/chxge/com/cphy.h

87

u32 elmer_gpo;

usr/src/uts/common/io/chxge/com/cspi.c

46

int t1_cspi_intr_status_read(struct pecspi *cspi, u32 *status)

usr/src/uts/common/io/chxge/com/cspi.h

39

int t1_cspi_intr_status_read(struct pecspi *, u32 *);

usr/src/uts/common/io/chxge/com/espi.c

127

u32 enable, pl_intr = t1_read_reg_4(espi->adapter, A_PL_ENABLE);

usr/src/uts/common/io/chxge/com/espi.c

150

u32 pl_intr = t1_read_reg_4(espi->adapter, A_PL_ENABLE);

usr/src/uts/common/io/chxge/com/espi.c

158

u32 status = t1_read_reg_4(espi->adapter, A_ESPI_INTR_STATUS);

usr/src/uts/common/io/chxge/com/espi.c

192

u32 wmark = t1_is_T1B(adapter) ? 0x4000 : 0x3200;

usr/src/uts/common/io/chxge/com/espi.c

209

u32 wmark = t1_is_T1B(adapter) ? 0x4000 : 0x3200;

usr/src/uts/common/io/chxge/com/espi.c

263

u32 status_enable_extra = 0;

usr/src/uts/common/io/chxge/com/espi.c

326

void t1_espi_set_misc_ctrl(adapter_t *adapter, u32 val)

usr/src/uts/common/io/chxge/com/espi.c

33

u32 misc_ctrl;

usr/src/uts/common/io/chxge/com/espi.c

339

u32 t1_espi_get_mon(adapter_t *adapter, u32 addr, u8 wait)

usr/src/uts/common/io/chxge/com/espi.c

342

u32 sel;

usr/src/uts/common/io/chxge/com/espi.c

371

t1_espi_get_mon_t204(adapter_t *adapter, u32 *valp, u8 wait)

usr/src/uts/common/io/chxge/com/espi.c

48

int ch_addr, int reg_offset, u32 wr_data)

usr/src/uts/common/io/chxge/com/espi.c

73

u32 status;

usr/src/uts/common/io/chxge/com/espi.h

52

void t1_espi_set_misc_ctrl(adapter_t *adapter, u32 val);

usr/src/uts/common/io/chxge/com/espi.h

53

u32 t1_espi_get_mon(adapter_t *adapter, u32 addr, u8 wait);

usr/src/uts/common/io/chxge/com/espi.h

54

int t1_espi_get_mon_t204(adapter_t *, u32 *, u8);

usr/src/uts/common/io/chxge/com/ixf1010.c

157

u32 mac_base;

usr/src/uts/common/io/chxge/com/ixf1010.c

158

u32 index;

usr/src/uts/common/io/chxge/com/ixf1010.c

159

u32 version;

usr/src/uts/common/io/chxge/com/ixf1010.c

160

u32 ticks;

usr/src/uts/common/io/chxge/com/ixf1010.c

165

u32 val;

usr/src/uts/common/io/chxge/com/ixf1010.c

182

u32 val;

usr/src/uts/common/io/chxge/com/ixf1010.c

226

u32 addr_lo, addr_hi;

usr/src/uts/common/io/chxge/com/ixf1010.c

243

u32 addr_lo, addr_hi;

usr/src/uts/common/io/chxge/com/ixf1010.c

266

u32 val, new_mode;

usr/src/uts/common/io/chxge/com/ixf1010.c

268

u32 addr_lo, addr_hi;

usr/src/uts/common/io/chxge/com/ixf1010.c

311

u32 val;

usr/src/uts/common/io/chxge/com/ixf1010.c

336

u32 val;

usr/src/uts/common/io/chxge/com/ixf1010.c

358

u32 val;

usr/src/uts/common/io/chxge/com/ixf1010.c

359

u32 index = mac->instance->index;

usr/src/uts/common/io/chxge/com/ixf1010.c

437

u32 val;

usr/src/uts/common/io/chxge/com/ixf1010.c

492

u32 val;

usr/src/uts/common/io/chxge/com/ixf1010.c

511

u32 val;

usr/src/uts/common/io/chxge/com/mc3.c

111

u32 cause;

usr/src/uts/common/io/chxge/com/mc3.c

180

static int wrreg_wait(adapter_t *adapter, unsigned int addr, u32 val)

usr/src/uts/common/io/chxge/com/mc3.c

195

u32 val;

usr/src/uts/common/io/chxge/com/mc3.c

326

static unsigned int __devinit mc3_calc_size(const adapter_t *adapter, u32 cfg)

usr/src/uts/common/io/chxge/com/mc3.c

46

u32 en = t1_read_reg_4(mc3->adapter, A_PL_ENABLE);

usr/src/uts/common/io/chxge/com/mc3.c

63

u32 pl_intr = t1_read_reg_4(mc3->adapter, A_PL_ENABLE);

usr/src/uts/common/io/chxge/com/mc3.c

86

u32 old_en;

usr/src/uts/common/io/chxge/com/mc4.c

212

u32 pl_intr;

usr/src/uts/common/io/chxge/com/mc4.c

225

u32 pl_intr;

usr/src/uts/common/io/chxge/com/mc4.c

247

u32 cause = t1_read_reg_4(adapter, A_MC4_INT_CAUSE);

usr/src/uts/common/io/chxge/com/mc4.c

297

u32 *buf)

usr/src/uts/common/io/chxge/com/mc4.c

307

u32 val;

usr/src/uts/common/io/chxge/com/mc4.c

49

u32 mc4_cfg = t1_read_reg_4(adapter, A_MC4_CFG);

usr/src/uts/common/io/chxge/com/mc4.c

62

static int wrreg_wait(adapter_t *adapter, unsigned int addr, u32 val)

usr/src/uts/common/io/chxge/com/mc4.c

84

u32 val;

usr/src/uts/common/io/chxge/com/mc4.h

50

u32 *buf);

usr/src/uts/common/io/chxge/com/mc5.c

114

u32 lip[MC5_LIP_NUM_OF_ENTRIES];

usr/src/uts/common/io/chxge/com/mc5.c

125

static int mc5_cmd_write(adapter_t *adapter, u32 cmd)

usr/src/uts/common/io/chxge/com/mc5.c

178

static inline void dbgi_wr_addr3(adapter_t *adapter, u32 v1, u32 v2, u32 v3)

usr/src/uts/common/io/chxge/com/mc5.c

185

static inline void dbgi_wr_data3(adapter_t *adapter, u32 v1, u32 v2, u32 v3)

usr/src/uts/common/io/chxge/com/mc5.c

192

static inline void dbgi_rd_rsp3(adapter_t *adapter, u32 *v1, u32 *v2, u32 *v3)

usr/src/uts/common/io/chxge/com/mc5.c

204

static int mc5_write(adapter_t *adapter, u32 addr_lo, u32 cmd)

usr/src/uts/common/io/chxge/com/mc5.c

214

static int init_mask_data_array(struct pemc5 *mc5, u32 mask_array_base,

usr/src/uts/common/io/chxge/com/mc5.c

215

u32 data_array_base, u32 write_cmd)

usr/src/uts/common/io/chxge/com/mc5.c

404

u32 cfg;

usr/src/uts/common/io/chxge/com/mc5.c

462

unsigned int n, u32 *buf)

usr/src/uts/common/io/chxge/com/mc5.c

464

u32 read_cmd;

usr/src/uts/common/io/chxge/com/mc5.c

501

u32 mask = MC5_INT_MASK;

usr/src/uts/common/io/chxge/com/mc5.c

518

u32 pl_intr = t1_read_reg_4(mc5->adapter, A_PL_ENABLE);

usr/src/uts/common/io/chxge/com/mc5.c

536

u32 pl_intr = t1_read_reg_4(mc5->adapter, A_PL_ENABLE);

usr/src/uts/common/io/chxge/com/mc5.c

563

u32 cause = t1_read_reg_4(adap, A_MC5_INT_CAUSE);

usr/src/uts/common/io/chxge/com/mc5.c

635

u32 cfg, bits_per_entry;

usr/src/uts/common/io/chxge/com/mc5.c

670

const u32 *pii = (const u32 *)pi;

usr/src/uts/common/io/chxge/com/mc5.c

671

const u32 *pjj = (const u32 *)pj;

usr/src/uts/common/io/chxge/com/mc5.c

685

static int mc5_set_lip_entries(struct pemc5 *mc5, u32 *p,

usr/src/uts/common/io/chxge/com/mc5.c

694

u32 cfg = t1_read_reg_4(mc5->adapter, A_MC5_CONFIG);

usr/src/uts/common/io/chxge/com/mc5.c

715

u32 filler = 0;

usr/src/uts/common/io/chxge/com/mc5.c

719

qsort(mc5->lip, mc5->lip_index, sizeof(u32), mc5_cmp);

usr/src/uts/common/io/chxge/com/mc5.c

735

int t1_mc5_lip_add_entry(struct pemc5 *mc5, u32 lip)

usr/src/uts/common/io/chxge/com/mc5.h

64

unsigned int n, u32 *buf);

usr/src/uts/common/io/chxge/com/mc5.h

73

int t1_mc5_lip_add_entry(struct pemc5 *mc5, u32 lip);

usr/src/uts/common/io/chxge/com/mv88e1xxx.c

116

u32 elmer;

usr/src/uts/common/io/chxge/com/mv88e1xxx.c

130

u32 elmer;

usr/src/uts/common/io/chxge/com/mv88e1xxx.c

153

u32 ctl;

usr/src/uts/common/io/chxge/com/mv88e1xxx.c

176

u32 data32;

usr/src/uts/common/io/chxge/com/mv88e1xxx.c

187

u32 ctl;

usr/src/uts/common/io/chxge/com/mv88e1xxx.c

200

u32 ctl;

usr/src/uts/common/io/chxge/com/mv88e1xxx.c

226

u32 val = 0;

usr/src/uts/common/io/chxge/com/mv88e1xxx.c

268

u32 status;

usr/src/uts/common/io/chxge/com/mv88e1xxx.c

299

u32 val;

usr/src/uts/common/io/chxge/com/mv88e1xxx.c

318

u32 status;

usr/src/uts/common/io/chxge/com/mv88e1xxx.c

325

u32 cause;

usr/src/uts/common/io/chxge/com/mv88e1xxx.c

41

static void mdio_set_bit(struct cphy *cphy, int reg, u32 bitval)

usr/src/uts/common/io/chxge/com/mv88e1xxx.c

43

u32 val;

usr/src/uts/common/io/chxge/com/mv88e1xxx.c

52

static void mdio_clear_bit(struct cphy *cphy, int reg, u32 bitval)

usr/src/uts/common/io/chxge/com/mv88e1xxx.c

54

u32 val;

usr/src/uts/common/io/chxge/com/mv88e1xxx.c

74

u32 ctl;

usr/src/uts/common/io/chxge/com/mv88e1xxx.c

97

u32 elmer;

usr/src/uts/common/io/chxge/com/mv88x201x.c

107

u32 elmer;

usr/src/uts/common/io/chxge/com/mv88x201x.c

108

u32 val;

usr/src/uts/common/io/chxge/com/mv88x201x.c

162

u32 val = 0;

usr/src/uts/common/io/chxge/com/mv88x201x.c

219

u32 val;

usr/src/uts/common/io/chxge/com/mv88x201x.c

243

u32 val;

usr/src/uts/common/io/chxge/com/mv88x201x.c

46

static int led_link(struct cphy *cphy, u32 do_enable)

usr/src/uts/common/io/chxge/com/mv88x201x.c

48

u32 led = 0;

usr/src/uts/common/io/chxge/com/mv88x201x.c

80

u32 elmer;

usr/src/uts/common/io/chxge/com/mv88x201x.c

96

u32 elmer;

usr/src/uts/common/io/chxge/com/my3126.c

134

u32 val;

usr/src/uts/common/io/chxge/com/my3126.c

225

u32 val;

usr/src/uts/common/io/chxge/com/my3126.c

72

u32 val;

usr/src/uts/common/io/chxge/com/my3126.c

75

u32 act_count;

usr/src/uts/common/io/chxge/com/pm3393.c

123

u32 elmer;

usr/src/uts/common/io/chxge/com/pm3393.c

125

u32 pl_intr;

usr/src/uts/common/io/chxge/com/pm3393.c

173

u32 elmer;

usr/src/uts/common/io/chxge/com/pm3393.c

212

u32 elmer;

usr/src/uts/common/io/chxge/com/pm3393.c

213

u32 pl_intr;

usr/src/uts/common/io/chxge/com/pm3393.c

214

u32 val32;

usr/src/uts/common/io/chxge/com/pm3393.c

257

u32 master_intr_status;

usr/src/uts/common/io/chxge/com/pm3393.c

362

u32 val = TXXG_CONF1_VAL | SUNI1x10GEXP_BITMSK_TXXG_TXEN0;

usr/src/uts/common/io/chxge/com/pm3393.c

448

static u32 calc_crc(u8 *b, int len)

usr/src/uts/common/io/chxge/com/pm3393.c

451

u32 crc = (u32)~0;

usr/src/uts/common/io/chxge/com/pm3393.c

478

u32 rx_mode;

usr/src/uts/common/io/chxge/com/pm3393.c

571

u32 val0, val1, val2, val3;

usr/src/uts/common/io/chxge/com/pm3393.c

620

u32 val, lo, mid, hi, enabled = cmac->instance->enabled;

usr/src/uts/common/io/chxge/com/pm3393.c

643

lo = ((u32) ma[1] << 8) | (u32) ma[0];

usr/src/uts/common/io/chxge/com/pm3393.c

644

mid = ((u32) ma[3] << 8) | (u32) ma[2];

usr/src/uts/common/io/chxge/com/pm3393.c

645

hi = ((u32) ma[5] << 8) | (u32) ma[4];

usr/src/uts/common/io/chxge/com/pm3393.c

828

u32 val;

usr/src/uts/common/io/chxge/com/pm3393.c

829

u32 x;

usr/src/uts/common/io/chxge/com/pm3393.c

830

u32 is_pl4_reset_finished;

usr/src/uts/common/io/chxge/com/pm3393.c

831

u32 is_pl4_outof_lock;

usr/src/uts/common/io/chxge/com/pm3393.c

832

u32 is_xaui_mabc_pll_locked;

usr/src/uts/common/io/chxge/com/pm3393.c

833

u32 successful_reset;

usr/src/uts/common/io/chxge/com/pm3393.c

93

static int pmread(struct cmac *cmac, u32 reg, u32 * data32)

usr/src/uts/common/io/chxge/com/pm3393.c

99

static int pmwrite(struct cmac *cmac, u32 reg, u32 data32)

usr/src/uts/common/io/chxge/com/tp.c

105

u32 tps = t1_tp_ticks_per_sec(adapter, tp_clk);

usr/src/uts/common/io/chxge/com/tp.c

106

u32 tp_scnt;

usr/src/uts/common/io/chxge/com/tp.c

134

u32 val;

usr/src/uts/common/io/chxge/com/tp.c

145

u32 v = t1_is_T1B(tp->adapter) ? 0 : V_MAX_RX_SIZE(size);

usr/src/uts/common/io/chxge/com/tp.c

161

u32 *data = (u32 *)tps;

usr/src/uts/common/io/chxge/com/tp.c

166

for (i = 0; i < sizeof(*tps) / sizeof(u32); i++)

usr/src/uts/common/io/chxge/com/tp.c

175

u32 val;

usr/src/uts/common/io/chxge/com/tp.c

198

u32 drop_ticks = DROP_MSEC * (tp_clk / 1000);

usr/src/uts/common/io/chxge/com/tp.c

317

u32 tp_intr = t1_read_reg_4(tp->adapter, A_PL_ENABLE);

usr/src/uts/common/io/chxge/com/tp.c

338

u32 tp_intr = t1_read_reg_4(tp->adapter, A_PL_ENABLE);

usr/src/uts/common/io/chxge/com/tp.c

371

u32 cause;

usr/src/uts/common/io/chxge/com/tp.c

384

static void set_csum_offload(struct petp *tp, u32 csum_bit, int enable)

usr/src/uts/common/io/chxge/com/tp.c

386

u32 val = t1_read_reg_4(tp->adapter, A_TP_GLOBAL_CONFIG);

usr/src/uts/common/io/chxge/com/tp.c

43

static inline u32 pm_num_pages(u32 size, u32 pg_size)

usr/src/uts/common/io/chxge/com/tp.c

45

u32 num = size / pg_size;

usr/src/uts/common/io/chxge/com/tp.c

52

u32 num;

usr/src/uts/common/io/chxge/com/tp.c

72

static void tp_cm_configure(adapter_t *adapter, u32 cm_size)

usr/src/uts/common/io/chxge/com/tp.c

74

u32 mm_base = (cm_size >> 1);

usr/src/uts/common/io/chxge/com/tp.c

75

u32 mm_sub_size = (cm_size >> 5);

usr/src/uts/common/io/chxge/com/tp.c

91

u32 tr = t1_read_reg_4(adap, A_TP_TIMER_RESOLUTION);

usr/src/uts/common/io/chxge/com/tp.c

98

u32 tr = t1_read_reg_4(adap, A_TP_TIMER_RESOLUTION);

usr/src/uts/common/io/chxge/com/tp.h

36

u32 ipInReceive_hi;

usr/src/uts/common/io/chxge/com/tp.h

37

u32 ipInReceive_lo;

usr/src/uts/common/io/chxge/com/tp.h

38

u32 ipInHdrErrors_hi;

usr/src/uts/common/io/chxge/com/tp.h

39

u32 ipInHdrErrors_lo;

usr/src/uts/common/io/chxge/com/tp.h

40

u32 ipInAddrErrors_hi;

usr/src/uts/common/io/chxge/com/tp.h

41

u32 ipInAddrErrors_lo;

usr/src/uts/common/io/chxge/com/tp.h

42

u32 ipInUnknownProtos_hi;

usr/src/uts/common/io/chxge/com/tp.h

43

u32 ipInUnknownProtos_lo;

usr/src/uts/common/io/chxge/com/tp.h

44

u32 ipInDiscards_hi;

usr/src/uts/common/io/chxge/com/tp.h

45

u32 ipInDiscards_lo;

usr/src/uts/common/io/chxge/com/tp.h

46

u32 ipInDelivers_hi;

usr/src/uts/common/io/chxge/com/tp.h

47

u32 ipInDelivers_lo;

usr/src/uts/common/io/chxge/com/tp.h

48

u32 ipOutRequests_hi;

usr/src/uts/common/io/chxge/com/tp.h

49

u32 ipOutRequests_lo;

usr/src/uts/common/io/chxge/com/tp.h

50

u32 ipOutDiscards_hi;

usr/src/uts/common/io/chxge/com/tp.h

51

u32 ipOutDiscards_lo;

usr/src/uts/common/io/chxge/com/tp.h

52

u32 ipOutNoRoutes_hi;

usr/src/uts/common/io/chxge/com/tp.h

53

u32 ipOutNoRoutes_lo;

usr/src/uts/common/io/chxge/com/tp.h

54

u32 ipReasmTimeout;

usr/src/uts/common/io/chxge/com/tp.h

55

u32 ipReasmReqds;

usr/src/uts/common/io/chxge/com/tp.h

56

u32 ipReasmOKs;

usr/src/uts/common/io/chxge/com/tp.h

57

u32 ipReasmFails;

usr/src/uts/common/io/chxge/com/tp.h

60

u32 reserved[8];

usr/src/uts/common/io/chxge/com/tp.h

63

u32 tcpActiveOpens;

usr/src/uts/common/io/chxge/com/tp.h

64

u32 tcpPassiveOpens;

usr/src/uts/common/io/chxge/com/tp.h

65

u32 tcpAttemptFails;

usr/src/uts/common/io/chxge/com/tp.h

66

u32 tcpEstabResets;

usr/src/uts/common/io/chxge/com/tp.h

67

u32 tcpOutRsts;

usr/src/uts/common/io/chxge/com/tp.h

68

u32 tcpCurrEstab;

usr/src/uts/common/io/chxge/com/tp.h

69

u32 tcpInSegs_hi;

usr/src/uts/common/io/chxge/com/tp.h

70

u32 tcpInSegs_lo;

usr/src/uts/common/io/chxge/com/tp.h

71

u32 tcpOutSegs_hi;

usr/src/uts/common/io/chxge/com/tp.h

72

u32 tcpOutSegs_lo;

usr/src/uts/common/io/chxge/com/tp.h

73

u32 tcpRetransSeg_hi;

usr/src/uts/common/io/chxge/com/tp.h

74

u32 tcpRetransSeg_lo;

usr/src/uts/common/io/chxge/com/tp.h

75

u32 tcpInErrs_hi;

usr/src/uts/common/io/chxge/com/tp.h

76

u32 tcpInErrs_lo;

usr/src/uts/common/io/chxge/com/tp.h

77

u32 tcpRtoMin;

usr/src/uts/common/io/chxge/com/tp.h

78

u32 tcpRtoMax;

usr/src/uts/common/io/chxge/com/ulp.c

45

u32 pl_intr = t1_read_reg_4(ulp->adapter, A_PL_ENABLE);

usr/src/uts/common/io/chxge/com/ulp.c

64

u32 pl_intr = t1_read_reg_4(ulp->adapter, A_PL_ENABLE);

usr/src/uts/common/io/chxge/com/ulp.c

74

u32 cause = t1_read_reg_4(ulp->adapter, A_ULP_INT_CAUSE);

usr/src/uts/common/io/chxge/com/vsc7321.c

241

u32 val;

usr/src/uts/common/io/chxge/com/vsc7321.c

258

u32 vhi, vlo;

usr/src/uts/common/io/chxge/com/vsc7321.c

311

u32 addr_lo, addr_hi;

usr/src/uts/common/io/chxge/com/vsc7321.c

329

u32 addr_lo, addr_hi;

usr/src/uts/common/io/chxge/com/vsc7321.c

377

u32 val;

usr/src/uts/common/io/chxge/com/vsc7321.c

391

u32 val;

usr/src/uts/common/io/chxge/com/vsc7321.c

50

u32 addr;

usr/src/uts/common/io/chxge/com/vsc7321.c

51

u32 data;

usr/src/uts/common/io/chxge/com/vsc7321.c

57

u32 mac_base;

usr/src/uts/common/io/chxge/com/vsc7321.c

58

u32 index;

usr/src/uts/common/io/chxge/com/vsc7321.c

59

u32 version;

usr/src/uts/common/io/chxge/com/vsc7321.c

64

static void vsc_read(adapter_t *adapter, u32 addr, u32 *val)

usr/src/uts/common/io/chxge/com/vsc7321.c

66

u32 status, vlo, vhi;

usr/src/uts/common/io/chxge/com/vsc7321.c

82

static void vsc_write(adapter_t *adapter, u32 addr, u32 data)

usr/src/uts/common/io/chxge/com/vsc7321.c

91

u32 val;

usr/src/uts/common/io/chxge/com/vsc7326.c

255

u32 result=0;

usr/src/uts/common/io/chxge/com/vsc7326.c

282

u32 result=0;

usr/src/uts/common/io/chxge/com/vsc7326.c

342

u32 val=0;

usr/src/uts/common/io/chxge/com/vsc7326.c

408

u32 val;

usr/src/uts/common/io/chxge/com/vsc7326.c

42

u32 addr;

usr/src/uts/common/io/chxge/com/vsc7326.c

43

u32 data;

usr/src/uts/common/io/chxge/com/vsc7326.c

431

u32 addr_lo, addr_hi;

usr/src/uts/common/io/chxge/com/vsc7326.c

459

u32 v;

usr/src/uts/common/io/chxge/com/vsc7326.c

47

u32 index;

usr/src/uts/common/io/chxge/com/vsc7326.c

48

u32 ticks;

usr/src/uts/common/io/chxge/com/vsc7326.c

489

u32 v;

usr/src/uts/common/io/chxge/com/vsc7326.c

53

static void vsc_read(adapter_t *adapter, u32 addr, u32 *val)

usr/src/uts/common/io/chxge/com/vsc7326.c

55

u32 status, vlo, vhi;

usr/src/uts/common/io/chxge/com/vsc7326.c

557

u32 val;

usr/src/uts/common/io/chxge/com/vsc7326.c

571

u32 val;

usr/src/uts/common/io/chxge/com/vsc7326.c

597

u32 v, lo;

usr/src/uts/common/io/chxge/com/vsc7326.c

725

u32 val;

usr/src/uts/common/io/chxge/com/vsc7326.c

740

u32 vhi, vlo;

usr/src/uts/common/io/chxge/com/vsc7326.c

81

static void vsc_write(adapter_t *adapter, u32 addr, u32 data)

usr/src/uts/common/io/chxge/com/vsc7326.c

95

u32 val;

usr/src/uts/common/io/chxge/com/vsc7326.c

96

u32 result = 0xffff;

usr/src/uts/common/io/chxge/com/xpak.c

125

u32 val;

usr/src/uts/common/io/chxge/glue.c

455

u32

usr/src/uts/common/io/chxge/glue.c

456

le32_to_cpu(u32 data)

usr/src/uts/common/io/chxge/oschtoe.h

179

u32 line_up;

usr/src/uts/common/io/chxge/pe.c

1514

u32 enable;

usr/src/uts/common/io/chxge/pe.c

1531

u32 enable = t1_read_reg_4(adapter, A_PL_ENABLE);

usr/src/uts/common/io/chxge/sge.c

100

static inline void setup_ring_params(ch_t *adapter, u64 addr, u32 size,

usr/src/uts/common/io/chxge/sge.c

1095

e->AddrLow = (u32)mapping;

usr/src/uts/common/io/chxge/sge.c

1136

u32 irq_reg = t1_read_reg_4(sge->obj, A_SG_INT_ENABLE);

usr/src/uts/common/io/chxge/sge.c

1137

u32 irqholdoff_reg;

usr/src/uts/common/io/chxge/sge.c

117

static inline void sge_ring_doorbell(pesge *sge, u32 control_reg);

usr/src/uts/common/io/chxge/sge.c

120

sge_ring_doorbell(pesge *sge, u32 control_reg)

usr/src/uts/common/io/chxge/sge.c

1419

u32 newTimer = p->rx_coalesce_usecs *

usr/src/uts/common/io/chxge/sge.c

1455

t1_write_reg_4(ap, A_SG_RSPQUEUECREDIT, (u32)sge->respQ.rq_entries_n);

usr/src/uts/common/io/chxge/sge.c

1503

setup_ring_params(ch_t *adapter, u64 addr, u32 size, int base_reg_lo,

usr/src/uts/common/io/chxge/sge.c

1506

t1_write_reg_4(adapter, base_reg_lo, (u32)addr);

usr/src/uts/common/io/chxge/sge.c

1640

t1_sge_set_ptimeout(adapter_t *adapter, u32 val)

usr/src/uts/common/io/chxge/sge.c

1649

u32

usr/src/uts/common/io/chxge/sge.c

234

u32 seop;

usr/src/uts/common/io/chxge/sge.c

506

u32 val = t1_read_reg_4(sge->obj, A_PL_ENABLE);

usr/src/uts/common/io/chxge/sge.c

522

u32 en = SGE_INT_ENABLE;

usr/src/uts/common/io/chxge/sge.c

523

u32 val = t1_read_reg_4(sge->obj, A_PL_ENABLE);

usr/src/uts/common/io/chxge/sge.c

550

u32 cause = t1_read_reg_4(obj, A_SG_INT_CAUSE);

usr/src/uts/common/io/chxge/sge.h

117

u32 AddrLow;

usr/src/uts/common/io/chxge/sge.h

118

u32 GenerationBit: 1;

usr/src/uts/common/io/chxge/sge.h

119

u32 BufferLength: 31;

usr/src/uts/common/io/chxge/sge.h

120

u32 RespQueueSelector: 4;

usr/src/uts/common/io/chxge/sge.h

121

u32 ResponseTokens: 12;

usr/src/uts/common/io/chxge/sge.h

122

u32 CmdId: 8;

usr/src/uts/common/io/chxge/sge.h

123

u32 Reserved: 3;

usr/src/uts/common/io/chxge/sge.h

124

u32 TokenValid: 1;

usr/src/uts/common/io/chxge/sge.h

125

u32 Eop: 1;

usr/src/uts/common/io/chxge/sge.h

126

u32 Sop: 1;

usr/src/uts/common/io/chxge/sge.h

127

u32 DataValid: 1;

usr/src/uts/common/io/chxge/sge.h

128

u32 GenerationBit2: 1;

usr/src/uts/common/io/chxge/sge.h

129

u32 AddrHigh;

usr/src/uts/common/io/chxge/sge.h

137

u32 BufferLength: 31;

usr/src/uts/common/io/chxge/sge.h

138

u32 GenerationBit: 1;

usr/src/uts/common/io/chxge/sge.h

139

u32 AddrLow;

usr/src/uts/common/io/chxge/sge.h

140

u32 AddrHigh;

usr/src/uts/common/io/chxge/sge.h

141

u32 GenerationBit2: 1;

usr/src/uts/common/io/chxge/sge.h

142

u32 DataValid: 1;

usr/src/uts/common/io/chxge/sge.h

143

u32 Sop: 1;

usr/src/uts/common/io/chxge/sge.h

144

u32 Eop: 1;

usr/src/uts/common/io/chxge/sge.h

145

u32 TokenValid: 1;

usr/src/uts/common/io/chxge/sge.h

146

u32 Reserved: 3;

usr/src/uts/common/io/chxge/sge.h

147

u32 CmdId: 8;

usr/src/uts/common/io/chxge/sge.h

148

u32 ResponseTokens: 12;

usr/src/uts/common/io/chxge/sge.h

149

u32 RespQueueSelector: 4;

usr/src/uts/common/io/chxge/sge.h

160

u32 Qsleeping: 4;

usr/src/uts/common/io/chxge/sge.h

161

u32 Cmdq1CreditReturn: 5;

usr/src/uts/common/io/chxge/sge.h

162

u32 Cmdq1DmaComplete: 5;

usr/src/uts/common/io/chxge/sge.h

163

u32 Cmdq0CreditReturn: 5;

usr/src/uts/common/io/chxge/sge.h

164

u32 Cmdq0DmaComplete: 5;

usr/src/uts/common/io/chxge/sge.h

165

u32 FreelistQid: 2;

usr/src/uts/common/io/chxge/sge.h

166

u32 CreditValid: 1;

usr/src/uts/common/io/chxge/sge.h

167

u32 DataValid: 1;

usr/src/uts/common/io/chxge/sge.h

168

u32 Offload: 1;

usr/src/uts/common/io/chxge/sge.h

169

u32 Eop: 1;

usr/src/uts/common/io/chxge/sge.h

170

u32 Sop: 1;

usr/src/uts/common/io/chxge/sge.h

171

u32 GenerationBit: 1;

usr/src/uts/common/io/chxge/sge.h

172

u32 BufferLength;

usr/src/uts/common/io/chxge/sge.h

180

u32 BufferLength;

usr/src/uts/common/io/chxge/sge.h

181

u32 GenerationBit: 1;

usr/src/uts/common/io/chxge/sge.h

182

u32 Sop: 1;

usr/src/uts/common/io/chxge/sge.h

183

u32 Eop: 1;

usr/src/uts/common/io/chxge/sge.h

184

u32 Offload: 1;

usr/src/uts/common/io/chxge/sge.h

185

u32 DataValid: 1;

usr/src/uts/common/io/chxge/sge.h

186

u32 CreditValid: 1;

usr/src/uts/common/io/chxge/sge.h

187

u32 FreelistQid: 2;

usr/src/uts/common/io/chxge/sge.h

188

u32 Cmdq0DmaComplete: 5;

usr/src/uts/common/io/chxge/sge.h

189

u32 Cmdq0CreditReturn: 5;

usr/src/uts/common/io/chxge/sge.h

190

u32 Cmdq1DmaComplete: 5;

usr/src/uts/common/io/chxge/sge.h

191

u32 Cmdq1CreditReturn: 5;

usr/src/uts/common/io/chxge/sge.h

192

u32 Qsleeping: 4;

usr/src/uts/common/io/chxge/sge.h

203

u32 AddrLow;

usr/src/uts/common/io/chxge/sge.h

204

u32 GenerationBit: 1;

usr/src/uts/common/io/chxge/sge.h

205

u32 BufferLength: 31;

usr/src/uts/common/io/chxge/sge.h

206

u32 Reserved: 31;

usr/src/uts/common/io/chxge/sge.h

207

u32 GenerationBit2: 1;

usr/src/uts/common/io/chxge/sge.h

208

u32 AddrHigh;

usr/src/uts/common/io/chxge/sge.h

216

u32 BufferLength: 31;

usr/src/uts/common/io/chxge/sge.h

217

u32 GenerationBit: 1;

usr/src/uts/common/io/chxge/sge.h

218

u32 AddrLow;

usr/src/uts/common/io/chxge/sge.h

219

u32 AddrHigh;

usr/src/uts/common/io/chxge/sge.h

220

u32 GenerationBit2: 1;

usr/src/uts/common/io/chxge/sge.h

221

u32 Reserved: 31;

usr/src/uts/common/io/chxge/sge.h

244

u32 cq_credits; /* # available descriptors for Xmit */

usr/src/uts/common/io/chxge/sge.h

245

u32 cq_asleep; /* HW DMA Fetch status */

usr/src/uts/common/io/chxge/sge.h

246

u32 cq_pio_pidx; /* Variable updated on Doorbell */

usr/src/uts/common/io/chxge/sge.h

247

u32 cq_entries_n; /* # entries for Xmit */

usr/src/uts/common/io/chxge/sge.h

248

u32 cq_pidx; /* producer index (SW) */

usr/src/uts/common/io/chxge/sge.h

249

u32 cq_complete; /* Shadow consumer index (HW) */

usr/src/uts/common/io/chxge/sge.h

250

u32 cq_cidx; /* consumer index (HW) */

usr/src/uts/common/io/chxge/sge.h

251

u32 cq_genbit; /* current generation (=valid) bit */

usr/src/uts/common/io/chxge/sge.h

264

u32 fq_id; /* 0 queue 0, 1 queue 1 */

usr/src/uts/common/io/chxge/sge.h

265

u32 fq_credits; /* # available RX buffer descriptors */

usr/src/uts/common/io/chxge/sge.h

266

u32 fq_entries_n; /* # RX buffer descriptors */

usr/src/uts/common/io/chxge/sge.h

267

u32 fq_pidx; /* producer index (SW) */

usr/src/uts/common/io/chxge/sge.h

268

u32 fq_cidx; /* consumer index (HW) */

usr/src/uts/common/io/chxge/sge.h

269

u32 fq_genbit; /* current generation (=valid) bit */

usr/src/uts/common/io/chxge/sge.h

270

u32 fq_rx_buffer_size; /* size buffer on this freelist */

usr/src/uts/common/io/chxge/sge.h

276

u32 fq_pause_on_thresh;

usr/src/uts/common/io/chxge/sge.h

277

u32 fq_pause_off_thresh;

usr/src/uts/common/io/chxge/sge.h

284

u32 rq_credits; /* # avail response Q entries */

usr/src/uts/common/io/chxge/sge.h

285

u32 rq_credits_pend; /* # not yet returned entries */

usr/src/uts/common/io/chxge/sge.h

286

u32 rq_credits_thresh; /* return threshold */

usr/src/uts/common/io/chxge/sge.h

287

u32 rq_entries_n; /* # response Q descriptors */

usr/src/uts/common/io/chxge/sge.h

288

u32 rq_pidx; /* producer index (HW) */

usr/src/uts/common/io/chxge/sge.h

289

u32 rq_cidx; /* consumer index (SW) */

usr/src/uts/common/io/chxge/sge.h

290

u32 rq_genbit; /* current generation(=valid) bit */

usr/src/uts/common/io/chxge/sge.h

454

extern u32 t1_sge_get_ptimeout(ch_t *);

usr/src/uts/common/io/chxge/sge.h

455

extern void t1_sge_set_ptimeout(ch_t *, u32);

usr/src/uts/common/io/cxgbe/common/common.c

29

u32 a = ((u32)addr[0] << 16) | ((u32)addr[1] << 8) | addr[2];

usr/src/uts/common/io/cxgbe/common/common.c

30

u32 b = ((u32)addr[3] << 16) | ((u32)addr[4] << 8) | addr[5];

usr/src/uts/common/io/cxgbe/common/common.c

7

int mtype, u32 maddr, u32 len,

usr/src/uts/common/io/cxgbe/common/common.h

228

u32 tcp_out_rsts;

usr/src/uts/common/io/cxgbe/common/common.h

235

u32 frames;

usr/src/uts/common/io/cxgbe/common/common.h

236

u32 drops;

usr/src/uts/common/io/cxgbe/common/common.h

241

u32 frames_ddp;

usr/src/uts/common/io/cxgbe/common/common.h

242

u32 frames_drop;

usr/src/uts/common/io/cxgbe/common/common.h

247

u32 mac_in_errs[4];

usr/src/uts/common/io/cxgbe/common/common.h

248

u32 hdr_in_errs[4];

usr/src/uts/common/io/cxgbe/common/common.h

249

u32 tcp_in_errs[4];

usr/src/uts/common/io/cxgbe/common/common.h

250

u32 tnl_cong_drops[4];

usr/src/uts/common/io/cxgbe/common/common.h

251

u32 ofld_chan_drops[4];

usr/src/uts/common/io/cxgbe/common/common.h

252

u32 tnl_tx_drops[4];

usr/src/uts/common/io/cxgbe/common/common.h

253

u32 ofld_vlan_drops[4];

usr/src/uts/common/io/cxgbe/common/common.h

254

u32 tcp6_in_errs[4];

usr/src/uts/common/io/cxgbe/common/common.h

255

u32 ofld_no_neigh;

usr/src/uts/common/io/cxgbe/common/common.h

256

u32 ofld_cong_defer;

usr/src/uts/common/io/cxgbe/common/common.h

260

u32 proxy[4];

usr/src/uts/common/io/cxgbe/common/common.h

264

u32 req[4];

usr/src/uts/common/io/cxgbe/common/common.h

265

u32 rsp[4];

usr/src/uts/common/io/cxgbe/common/common.h

269

u32 rqe_dfr_pkt;

usr/src/uts/common/io/cxgbe/common/common.h

270

u32 rqe_dfr_mod;

usr/src/uts/common/io/cxgbe/common/common.h

274

u32 hps; /* host page size for our PF/VF */

usr/src/uts/common/io/cxgbe/common/common.h

275

u32 eq_qpp; /* egress queues/page for our PF/VF */

usr/src/uts/common/io/cxgbe/common/common.h

276

u32 iq_qpp; /* egress queues/page for our PF/VF */

usr/src/uts/common/io/cxgbe/common/common.h

285

u32 vlan_pri_map; /* cached TP_VLAN_PRI_MAP */

usr/src/uts/common/io/cxgbe/common/common.h

286

u32 filter_mask;

usr/src/uts/common/io/cxgbe/common/common.h

287

u32 ingress_config; /* cached TP_INGRESS_CONFIG */

usr/src/uts/common/io/cxgbe/common/common.h

353

u32 memtype; /* which memory (EDC0, EDC1, MC) */

usr/src/uts/common/io/cxgbe/common/common.h

354

u32 start; /* start of log in firmware memory */

usr/src/uts/common/io/cxgbe/common/common.h

355

u32 size; /* size of log */

usr/src/uts/common/io/cxgbe/common/common.h

365

u32 sge_fl_db;

usr/src/uts/common/io/cxgbe/common/common.h

452

u32 seqno; /* sequence number */

usr/src/uts/common/io/cxgbe/common/common.h

460

u32 seqno; /* next sequence number */

usr/src/uts/common/io/cxgbe/common/common.h

479

u32 data[TRACE_LEN / 4];

usr/src/uts/common/io/cxgbe/common/common.h

480

u32 mask[TRACE_LEN / 4];

usr/src/uts/common/io/cxgbe/common/common.h

493

typedef u32 fw_port_cap32_t; /* 32-bit Port Capabilities integral value */

usr/src/uts/common/io/cxgbe/common/common.h

549

void t4_set_reg_field(struct adapter *adap, unsigned int addr, u32 mask, u32 val);

usr/src/uts/common/io/cxgbe/common/common.h

566

unsigned int data_reg, u32 *vals, unsigned int nregs,

usr/src/uts/common/io/cxgbe/common/common.h

569

unsigned int data_reg, const u32 *vals,

usr/src/uts/common/io/cxgbe/common/common.h

572

void t4_hw_pci_read_cfg4(adapter_t *adapter, int reg, u32 *val);

usr/src/uts/common/io/cxgbe/common/common.h

617

u32 *data, int byte_oriented);

usr/src/uts/common/io/cxgbe/common/common.h

640

int t4_get_fw_version(struct adapter *adapter, u32 *vers);

usr/src/uts/common/io/cxgbe/common/common.h

641

int t4_get_bs_version(struct adapter *adapter, u32 *vers);

usr/src/uts/common/io/cxgbe/common/common.h

642

int t4_get_tp_version(struct adapter *adapter, u32 *vers);

usr/src/uts/common/io/cxgbe/common/common.h

643

int t4_get_exprom_version(struct adapter *adapter, u32 *vers);

usr/src/uts/common/io/cxgbe/common/common.h

644

int t4_get_scfg_version(struct adapter *adapter, u32 *vers);

usr/src/uts/common/io/cxgbe/common/common.h

645

int t4_get_vpd_version(struct adapter *adapter, u32 *vers);

usr/src/uts/common/io/cxgbe/common/common.h

701

void t4_read_rss_key(struct adapter *adapter, u32 *key, bool sleep_ok);

usr/src/uts/common/io/cxgbe/common/common.h

702

void t4_write_rss_key(struct adapter *adap, const u32 *key, int idx,

usr/src/uts/common/io/cxgbe/common/common.h

705

u32 *valp, bool sleep_ok);

usr/src/uts/common/io/cxgbe/common/common.h

707

u32 val, bool sleep_ok);

usr/src/uts/common/io/cxgbe/common/common.h

709

u32 *vfl, u32 *vfh, bool sleep_ok);

usr/src/uts/common/io/cxgbe/common/common.h

710

u32 t4_read_rss_pf_map(struct adapter *adapter, bool sleep_ok);

usr/src/uts/common/io/cxgbe/common/common.h

711

u32 t4_read_rss_pf_mask(struct adapter *adapter, bool sleep_ok);

usr/src/uts/common/io/cxgbe/common/common.h

716

int t4_read_tcb(struct adapter *adap, int win, int tid, u32 tcb[TCB_SIZE/4]);

usr/src/uts/common/io/cxgbe/common/common.h

717

void t4_pmtx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[]);

usr/src/uts/common/io/cxgbe/common/common.h

718

void t4_pmrx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[]);

usr/src/uts/common/io/cxgbe/common/common.h

720

int t4_read_cim_ibq(struct adapter *adap, unsigned int qid, u32 *data, size_t n);

usr/src/uts/common/io/cxgbe/common/common.h

721

int t4_read_cim_obq(struct adapter *adap, unsigned int qid, u32 *data, size_t n);

usr/src/uts/common/io/cxgbe/common/common.h

726

int t4_cim_read_la(struct adapter *adap, u32 *la_buf, unsigned int *wrptr);

usr/src/uts/common/io/cxgbe/common/common.h

727

void t4_cim_read_pif_la(struct adapter *adap, u32 *pif_req, u32 *pif_rsp,

usr/src/uts/common/io/cxgbe/common/common.h

729

void t4_cim_read_ma_la(struct adapter *adap, u32 *ma_req, u32 *ma_rsp);

usr/src/uts/common/io/cxgbe/common/common.h

732

u32 t4_read_pcie_cfg4(struct adapter *adap, int reg, int drv_fw_attach);

usr/src/uts/common/io/cxgbe/common/common.h

734

void t4_setup_memwin(struct adapter *adap, u32 memwin_base, u32 window);

usr/src/uts/common/io/cxgbe/common/common.h

746

u32 addr, u32 len,

usr/src/uts/common/io/cxgbe/common/common.h

749

int mtype, u32 maddr, u32 len,

usr/src/uts/common/io/cxgbe/common/common.h

753

int mtype, u32 maddr, u32 len,

usr/src/uts/common/io/cxgbe/common/common.h

792

void t4_ulprx_read_la(struct adapter *adap, u32 *la_buf);

usr/src/uts/common/io/cxgbe/common/common.h

814

unsigned int vf, unsigned int nparams, const u32 *params,

usr/src/uts/common/io/cxgbe/common/common.h

815

u32 *val);

usr/src/uts/common/io/cxgbe/common/common.h

817

unsigned int vf, unsigned int nparams, const u32 *params,

usr/src/uts/common/io/cxgbe/common/common.h

818

u32 *val);

usr/src/uts/common/io/cxgbe/common/common.h

820

unsigned int vf, unsigned int nparams, const u32 *params,

usr/src/uts/common/io/cxgbe/common/common.h

821

u32 *val, int rw, bool sleep_ok);

usr/src/uts/common/io/cxgbe/common/common.h

824

unsigned int nparams, const u32 *params,

usr/src/uts/common/io/cxgbe/common/common.h

825

const u32 *val, int timeout);

usr/src/uts/common/io/cxgbe/common/common.h

827

unsigned int vf, unsigned int nparams, const u32 *params,

usr/src/uts/common/io/cxgbe/common/common.h

828

const u32 *val);

usr/src/uts/common/io/cxgbe/common/common.h

912

enum ctxt_type ctype, u32 *data);

usr/src/uts/common/io/cxgbe/common/common.h

914

u32 *data);

usr/src/uts/common/io/cxgbe/common/common.h

924

int t4_fwaddrspace_write(struct adapter *adap, unsigned int mbox, u32 addr, u32 val);

usr/src/uts/common/io/cxgbe/common/common.h

947

void t4_tp_pio_read(struct adapter *adap, u32 *buff, u32 nregs,

usr/src/uts/common/io/cxgbe/common/common.h

948

u32 start_index, bool sleep_ok);

usr/src/uts/common/io/cxgbe/common/common.h

949

void t4_tp_pio_write(struct adapter *adap, u32 *buff, u32 nregs,

usr/src/uts/common/io/cxgbe/common/common.h

950

u32 start_index, bool sleep_ok);

usr/src/uts/common/io/cxgbe/common/common.h

951

void t4_tp_tm_pio_read(struct adapter *adap, u32 *buff, u32 nregs,

usr/src/uts/common/io/cxgbe/common/common.h

952

u32 start_index, bool sleep_ok);

usr/src/uts/common/io/cxgbe/common/common.h

953

void t4_tp_mib_read(struct adapter *adap, u32 *buff, u32 nregs,

usr/src/uts/common/io/cxgbe/common/common.h

954

u32 start_index, bool sleep_ok);

usr/src/uts/common/io/cxgbe/common/t4_hw.c

100

u32 *valp)

usr/src/uts/common/io/cxgbe/common/t4_hw.c

10005

u32 pl_rev = G_REV(t4_read_reg(adap, A_PL_REV));

usr/src/uts/common/io/cxgbe/common/t4_hw.c

1013

(__force u32)cpu_to_le32(last.word));

usr/src/uts/common/io/cxgbe/common/t4_hw.c

10185

u32 a_port_cfg = is_t4(adapter->params.chip) ?

usr/src/uts/common/io/cxgbe/common/t4_hw.c

10301

u32 pf_dparams;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

1033

int t4_memory_rw_mtype(struct adapter *adap, int win, int mtype, u32 maddr,

usr/src/uts/common/io/cxgbe/common/t4_hw.c

1034

u32 len, void *hbuf, int dir)

usr/src/uts/common/io/cxgbe/common/t4_hw.c

1036

u32 mtype_offset;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

10366

u32 hps, qpp;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

1037

u32 edc_size, mc_size;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

10397

u32 param, val, v;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

1068

u32 t4_read_pcie_cfg4(struct adapter *adap, int reg, int drv_fw_attach)

usr/src/uts/common/io/cxgbe/common/t4_hw.c

1070

u32 val;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

10778

u32 param, val;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

10805

u32 lstatus = be32_to_cpu(cmd.u.info.lstatus_to_modtype);

usr/src/uts/common/io/cxgbe/common/t4_hw.c

10814

u32 lstatus32 = be32_to_cpu(cmd.u.info32.lstatus32_to_cbllen32);

usr/src/uts/common/io/cxgbe/common/t4_hw.c

10948

int t4_read_cim_ibq(struct adapter *adap, unsigned int qid, u32 *data, size_t n)

usr/src/uts/common/io/cxgbe/common/t4_hw.c

10990

int t4_read_cim_obq(struct adapter *adap, unsigned int qid, u32 *data, size_t n)

usr/src/uts/common/io/cxgbe/common/t4_hw.c

11091

int t4_cim_read_la(struct adapter *adap, u32 *la_buf, unsigned int *wrptr)

usr/src/uts/common/io/cxgbe/common/t4_hw.c

1122

u32 bar0;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

11258

u32 debug0, debug11;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

11493

u32 params[1], val[1];

usr/src/uts/common/io/cxgbe/common/t4_hw.c

1156

void t4_setup_memwin(struct adapter *adap, u32 memwin_base, u32 window)

usr/src/uts/common/io/cxgbe/common/t4_hw.c

11590

u32 cur_header = 0;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

116

static inline int t4_os_pci_write_seeprom(adapter_t *adapter, int addr, u32 val)

usr/src/uts/common/io/cxgbe/common/t4_hw.c

11759

if (le32_to_cpu(*(u32*)pcir_header->signature) != PCIR_SIGNATURE) {

usr/src/uts/common/io/cxgbe/common/t4_hw.c

11898

u32 *ptr = (u32 *)cfg_data;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

11912

size = size / sizeof (u32);

usr/src/uts/common/io/cxgbe/common/t4_hw.c

11970

u32 bgmap = t4_get_mps_bg_map(adap, idx);

usr/src/uts/common/io/cxgbe/common/t4_hw.c

11971

u32 port_base_addr;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

12082

enum ctxt_type ctype, u32 *data)

usr/src/uts/common/io/cxgbe/common/t4_hw.c

12126

u32 *data)

usr/src/uts/common/io/cxgbe/common/t4_hw.c

145

static int t4_wait_op_done_val(struct adapter *adapter, int reg, u32 mask,

usr/src/uts/common/io/cxgbe/common/t4_hw.c

146

int polarity, int attempts, int delay, u32 *valp)

usr/src/uts/common/io/cxgbe/common/t4_hw.c

149

u32 val = t4_read_reg(adapter, reg);

usr/src/uts/common/io/cxgbe/common/t4_hw.c

163

static inline int t4_wait_op_done(struct adapter *adapter, int reg, u32 mask,

usr/src/uts/common/io/cxgbe/common/t4_hw.c

180

void t4_set_reg_field(struct adapter *adapter, unsigned int addr, u32 mask,

usr/src/uts/common/io/cxgbe/common/t4_hw.c

181

u32 val)

usr/src/uts/common/io/cxgbe/common/t4_hw.c

183

u32 v = t4_read_reg(adapter, addr) & ~mask;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

202

unsigned int data_reg, u32 *vals,

usr/src/uts/common/io/cxgbe/common/t4_hw.c

225

unsigned int data_reg, const u32 *vals,

usr/src/uts/common/io/cxgbe/common/t4_hw.c

244

void t4_hw_pci_read_cfg4(struct adapter *adap, int reg, u32 *val)

usr/src/uts/common/io/cxgbe/common/t4_hw.c

246

u32 req = V_FUNCTION(adap->pf) | V_REGISTER(reg);

usr/src/uts/common/io/cxgbe/common/t4_hw.c

287

u32 pcie_fw;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

2986

u32 *buf_end = (u32 *)((char *)buf + buf_size);

usr/src/uts/common/io/cxgbe/common/t4_hw.c

301

u32 mbox_addr)

usr/src/uts/common/io/cxgbe/common/t4_hw.c

3023

u32 *bufp = (u32 *)((char *)buf + reg);

usr/src/uts/common/io/cxgbe/common/t4_hw.c

3030

reg += sizeof(u32);

usr/src/uts/common/io/cxgbe/common/t4_hw.c

3109

int t4_seeprom_read(struct adapter *adapter, u32 addr, u32 *data)

usr/src/uts/common/io/cxgbe/common/t4_hw.c

3164

int t4_seeprom_write(struct adapter *adapter, u32 addr, u32 data)

usr/src/uts/common/io/cxgbe/common/t4_hw.c

3168

u32 stats_reg;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

3346

ret = t4_os_pci_read_seeprom(adapter, VPD_BASE, (u32 *)(vpd));

usr/src/uts/common/io/cxgbe/common/t4_hw.c

3359

ret = t4_os_pci_read_seeprom(adapter, addr+i, (u32 *)(vpd+i));

usr/src/uts/common/io/cxgbe/common/t4_hw.c

3421

u32 cclk_param, cclk_val;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

3459

u32 word;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

3526

int lock, u32 *valp)

usr/src/uts/common/io/cxgbe/common/t4_hw.c

3555

int lock, u32 val)

usr/src/uts/common/io/cxgbe/common/t4_hw.c

3578

u32 status;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

3613

unsigned int nwords, u32 *data, int byte_oriented)

usr/src/uts/common/io/cxgbe/common/t4_hw.c

3617

if (addr + nwords * sizeof(u32) > adapter->params.sf_size || (addr & 3))

usr/src/uts/common/io/cxgbe/common/t4_hw.c

3655

u32 buf[64];

usr/src/uts/common/io/cxgbe/common/t4_hw.c

3711

int t4_get_fw_version(struct adapter *adapter, u32 *vers)

usr/src/uts/common/io/cxgbe/common/t4_hw.c

3725

int t4_get_bs_version(struct adapter *adapter, u32 *vers)

usr/src/uts/common/io/cxgbe/common/t4_hw.c

3739

int t4_get_tp_version(struct adapter *adapter, u32 *vers)

usr/src/uts/common/io/cxgbe/common/t4_hw.c

3756

int t4_get_exprom_version(struct adapter *adapter, u32 *vers)

usr/src/uts/common/io/cxgbe/common/t4_hw.c

3762

u32 exprom_header_buf[DIV_ROUND_UP(sizeof(struct exprom_header),

usr/src/uts/common/io/cxgbe/common/t4_hw.c

3763

sizeof(u32))];

usr/src/uts/common/io/cxgbe/common/t4_hw.c

3806

int t4_get_scfg_version(struct adapter *adapter, u32 *vers)

usr/src/uts/common/io/cxgbe/common/t4_hw.c

3808

u32 scfgrev_param;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

3841

int t4_get_vpd_version(struct adapter *adapter, u32 *vers)

usr/src/uts/common/io/cxgbe/common/t4_hw.c

3843

u32 vpdrev_param;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

4273

u32 csum;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

4376

u32 param, val;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

4424

u32 param, val;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

444

u32 v;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

448

u32 data_reg = PF_REG(mbox, A_CIM_PF_MAILBOX_DATA);

usr/src/uts/common/io/cxgbe/common/t4_hw.c

449

u32 ctl_reg = PF_REG(mbox, A_CIM_PF_MAILBOX_CTRL);

usr/src/uts/common/io/cxgbe/common/t4_hw.c

450

u32 ctl;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

453

u32 pcie_fw;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

4536

void t4_cim_read_pif_la(struct adapter *adap, u32 *pif_req, u32 *pif_rsp,

usr/src/uts/common/io/cxgbe/common/t4_hw.c

4541

u32 cfg, val, req, rsp;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

4570

void t4_cim_read_ma_la(struct adapter *adap, u32 *ma_req, u32 *ma_rsp)

usr/src/uts/common/io/cxgbe/common/t4_hw.c

4572

u32 cfg;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

4591

void t4_ulprx_read_la(struct adapter *adap, u32 *la_buf)

usr/src/uts/common/io/cxgbe/common/t4_hw.c

4596

u32 *p = la_buf + i;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

4795

u32 v = 0, perr;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

4796

u32 err;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

4934

u32 val, fw_err;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

5211

u32 cnt = G_ECC_CECNT(t4_read_reg(adapter, cnt_addr));

usr/src/uts/common/io/cxgbe/common/t4_hw.c

5235

u32 v, status = t4_read_reg(adapter, A_MA_INT_CAUSE);

usr/src/uts/common/io/cxgbe/common/t4_hw.c

5296

u32 v, int_cause_reg;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

5400

u32 raw_cause = t4_read_reg(adapter, A_PL_INT_CAUSE);

usr/src/uts/common/io/cxgbe/common/t4_hw.c

5401

u32 enable = t4_read_reg(adapter, A_PL_INT_ENABLE);

usr/src/uts/common/io/cxgbe/common/t4_hw.c

5402

u32 cause = raw_cause & enable;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

5484

u32 val = 0;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

5485

u32 whoami = t4_read_reg(adapter, A_PL_WHOAMI);

usr/src/uts/common/io/cxgbe/common/t4_hw.c

5486

u32 pf = (CHELSIO_CHIP_VERSION(adapter->params.chip) <= CHELSIO_T5

usr/src/uts/common/io/cxgbe/common/t4_hw.c

5515

u32 whoami = t4_read_reg(adapter, A_PL_WHOAMI);

usr/src/uts/common/io/cxgbe/common/t4_hw.c

5516

u32 pf = (CHELSIO_CHIP_VERSION(adapter->params.chip) <= CHELSIO_T5

usr/src/uts/common/io/cxgbe/common/t4_hw.c

5685

static int rd_rss_row(struct adapter *adap, int row, u32 *val)

usr/src/uts/common/io/cxgbe/common/t4_hw.c

5701

u32 val;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

5727

static int t4_tp_fw_ldst_rw(struct adapter *adap, int cmd, u32 *vals,

usr/src/uts/common/io/cxgbe/common/t4_hw.c

5771

static void t4_tp_indirect_rw(struct adapter *adap, u32 reg_addr, u32 reg_data,

usr/src/uts/common/io/cxgbe/common/t4_hw.c

5772

u32 *buff, u32 nregs, u32 start_index, int rw,

usr/src/uts/common/io/cxgbe/common/t4_hw.c

5818

void t4_tp_pio_read(struct adapter *adap, u32 *buff, u32 nregs,

usr/src/uts/common/io/cxgbe/common/t4_hw.c

5819

u32 start_index, bool sleep_ok)

usr/src/uts/common/io/cxgbe/common/t4_hw.c

5835

void t4_tp_pio_write(struct adapter *adap, u32 *buff, u32 nregs,

usr/src/uts/common/io/cxgbe/common/t4_hw.c

5836

u32 start_index, bool sleep_ok)

usr/src/uts/common/io/cxgbe/common/t4_hw.c

5852

void t4_tp_tm_pio_read(struct adapter *adap, u32 *buff, u32 nregs,

usr/src/uts/common/io/cxgbe/common/t4_hw.c

5853

u32 start_index, bool sleep_ok)

usr/src/uts/common/io/cxgbe/common/t4_hw.c

5869

void t4_tp_mib_read(struct adapter *adap, u32 *buff, u32 nregs, u32 start_index,

usr/src/uts/common/io/cxgbe/common/t4_hw.c

5884

void t4_read_rss_key(struct adapter *adap, u32 *key, bool sleep_ok)

usr/src/uts/common/io/cxgbe/common/t4_hw.c

5900

void t4_write_rss_key(struct adapter *adap, const u32 *key, int idx,

usr/src/uts/common/io/cxgbe/common/t4_hw.c

5904

u32 vrt = t4_read_reg(adap, A_TP_RSS_CONFIG_VRT);

usr/src/uts/common/io/cxgbe/common/t4_hw.c

5938

u32 *valp, bool sleep_ok)

usr/src/uts/common/io/cxgbe/common/t4_hw.c

5954

u32 val, bool sleep_ok)

usr/src/uts/common/io/cxgbe/common/t4_hw.c

5972

u32 *vfl, u32 *vfh, bool sleep_ok)

usr/src/uts/common/io/cxgbe/common/t4_hw.c

5974

u32 vrt, mask, data;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

6005

u32 t4_read_rss_pf_map(struct adapter *adapter, bool sleep_ok)

usr/src/uts/common/io/cxgbe/common/t4_hw.c

6007

u32 pfmap;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

6021

u32 t4_read_rss_pf_mask(struct adapter *adapter, bool sleep_ok)

usr/src/uts/common/io/cxgbe/common/t4_hw.c

6023

u32 pfmask;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

6043

u32 val[A_TP_MIB_TCP_RXT_SEG_LO - A_TP_MIB_TCP_OUT_RST + 1];

usr/src/uts/common/io/cxgbe/common/t4_hw.c

6155

u32 val[2];

usr/src/uts/common/io/cxgbe/common/t4_hw.c

6180

u32 val[4];

usr/src/uts/common/io/cxgbe/common/t4_hw.c

6199

u32 v;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

6369

u32 v;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

6406

u32 data_reg, mask_reg, cfg;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

6482

u32 ctla, ctlb;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

6484

u32 data_reg, mask_reg;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

6523

int t4_read_tcb(struct adapter *adap, int win, int tid, u32 tcb[TCB_SIZE/4])

usr/src/uts/common/io/cxgbe/common/t4_hw.c

6525

u32 tcb_base = t4_read_reg(adap, A_TP_CMM_TCB_BASE);

usr/src/uts/common/io/cxgbe/common/t4_hw.c

6526

u32 tcb_addr = tcb_base + tid * TCB_SIZE;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

6549

void t4_pmtx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[])

usr/src/uts/common/io/cxgbe/common/t4_hw.c

6552

u32 data[2];

usr/src/uts/common/io/cxgbe/common/t4_hw.c

6576

void t4_pmrx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[])

usr/src/uts/common/io/cxgbe/common/t4_hw.c

6579

u32 data[2];

usr/src/uts/common/io/cxgbe/common/t4_hw.c

664

u32 v;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

6672

u32 param, val;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

669

u32 data_reg = PF_REG(mbox, A_CIM_PF_MAILBOX_DATA);

usr/src/uts/common/io/cxgbe/common/t4_hw.c

670

u32 ctl_reg = PF_REG(mbox, A_CIM_PF_MAILBOX_CTRL);

usr/src/uts/common/io/cxgbe/common/t4_hw.c

6708

u32 param, val = 0;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

671

u32 ctl;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

673

u32 pcie_fw;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

6844

u32 bgmap = t4_get_mps_bg_map(adap, idx);

usr/src/uts/common/io/cxgbe/common/t4_hw.c

6845

u32 stat_ctl = t4_read_reg(adap, A_MPS_STAT_CTL);

usr/src/uts/common/io/cxgbe/common/t4_hw.c

6942

u32 bgmap = t4_get_mps_bg_map(adap, idx);

usr/src/uts/common/io/cxgbe/common/t4_hw.c

7012

u32 addr, u32 val)

usr/src/uts/common/io/cxgbe/common/t4_hw.c

7014

u32 ldst_addrspace;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

7045

u32 ldst_addrspace;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

7078

u32 ldst_addrspace;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

7208

static const u32 sge_regs[] = {

usr/src/uts/common/io/cxgbe/common/t4_hw.c

7263

u32 ldst_addrspace;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

7299

u32 params[7], vals[7];

usr/src/uts/common/io/cxgbe/common/t4_hw.c

7337

u32 v;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

7403

u32 pcie_fw;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

7701

u32 sge_control, sge_control2;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

7955

unsigned int vf, unsigned int nparams, const u32 *params,

usr/src/uts/common/io/cxgbe/common/t4_hw.c

7956

u32 *val, int rw, bool sleep_ok)

usr/src/uts/common/io/cxgbe/common/t4_hw.c

7996

unsigned int vf, unsigned int nparams, const u32 *params,

usr/src/uts/common/io/cxgbe/common/t4_hw.c

7997

u32 *val)

usr/src/uts/common/io/cxgbe/common/t4_hw.c

8004

unsigned int vf, unsigned int nparams, const u32 *params,

usr/src/uts/common/io/cxgbe/common/t4_hw.c

8005

u32 *val)

usr/src/uts/common/io/cxgbe/common/t4_hw.c

8027

unsigned int nparams, const u32 *params,

usr/src/uts/common/io/cxgbe/common/t4_hw.c

8028

const u32 *val, int timeout)

usr/src/uts/common/io/cxgbe/common/t4_hw.c

806

u32 edc_ecc_err_addr_reg;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

8065

unsigned int vf, unsigned int nparams, const u32 *params,

usr/src/uts/common/io/cxgbe/common/t4_hw.c

8066

const u32 *val)

usr/src/uts/common/io/cxgbe/common/t4_hw.c

807

u32 edc_bist_status_rdata_reg;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

8314

u32 val;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

8361

u32 val;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

8506

u32 exact;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

8548

u32 raw;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

86

int t4_seeprom_read(struct adapter *adapter, u32 addr, u32 *data);

usr/src/uts/common/io/cxgbe/common/t4_hw.c

865

int t4_memory_rw_addr(struct adapter *adap, int win, u32 addr,

usr/src/uts/common/io/cxgbe/common/t4_hw.c

866

u32 len, void *hbuf, int dir)

usr/src/uts/common/io/cxgbe/common/t4_hw.c

868

u32 pos, offset, resid;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

869

u32 win_pf, mem_reg, mem_aperture, mem_base;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

8696

u32 val;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

87

int t4_seeprom_write(struct adapter *adapter, u32 addr, u32 data);

usr/src/uts/common/io/cxgbe/common/t4_hw.c

870

u32 *buf;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

876

buf = (u32 *)hbuf;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

9136

static fw_port_cap32_t t4_link_supported_speed_to_fec(u32 speed)

usr/src/uts/common/io/cxgbe/common/t4_hw.c

9159

static void t4_link_update_fec(struct port_info *pi, u32 max_speed,

usr/src/uts/common/io/cxgbe/common/t4_hw.c

9214

u32 max_speed;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

9280

u32 max_speed;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

9438

u32 max_speed = t4_link_fwcap_to_speed(acaps);

usr/src/uts/common/io/cxgbe/common/t4_hw.c

9489

static fw_port_cap32_t lstatus_to_fwcap(u32 lstatus)

usr/src/uts/common/io/cxgbe/common/t4_hw.c

9541

u32 lstatus = be32_to_cpu(cmd->u.info.lstatus_to_modtype);

usr/src/uts/common/io/cxgbe/common/t4_hw.c

9555

u32 lstatus32 = be32_to_cpu(cmd->u.info32.lstatus32_to_cbllen32);

usr/src/uts/common/io/cxgbe/common/t4_hw.c

967

(__force u32)cpu_to_le32(*buf++));

usr/src/uts/common/io/cxgbe/common/t4_hw.c

9723

u32 lstatus = be32_to_cpu(port_cmd.u.info.lstatus_to_modtype);

usr/src/uts/common/io/cxgbe/common/t4_hw.c

9729

u32 lstatus32 = be32_to_cpu(port_cmd.u.info32.lstatus32_to_cbllen32);

usr/src/uts/common/io/cxgbe/common/t4_hw.c

9798

u32 pcie_cap;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

9818

u32 whoami;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

9835

u32 vendor_and_model_id;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

9836

u32 size_mb;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

9850

u32 flashid = 0;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

996

u32 word;

usr/src/uts/common/io/cxgbe/common/t4_hw.c

9986

u32 pcie_cap;

usr/src/uts/common/io/cxgbe/t4nex/adapter.h

471

u32 t4_bar0;

usr/src/uts/common/io/cxgbe/t4nex/cudbg.h

238

struct el {char *name; char *file_name; int bit; u32 flag; };

usr/src/uts/common/io/cxgbe/t4nex/cudbg.h

335

u32 signature;

usr/src/uts/common/io/cxgbe/t4nex/cudbg.h

342

u32 hdr_len;

usr/src/uts/common/io/cxgbe/t4nex/cudbg.h

343

u32 data_len;

usr/src/uts/common/io/cxgbe/t4nex/cudbg.h

344

u32 hdr_flags;

usr/src/uts/common/io/cxgbe/t4nex/cudbg.h

345

u32 sec_seq_no;

usr/src/uts/common/io/cxgbe/t4nex/cudbg.h

346

u32 reserved[22];

usr/src/uts/common/io/cxgbe/t4nex/cudbg.h

354

u32 memtype; /* which memory (EDC0, EDC1, MC) */

usr/src/uts/common/io/cxgbe/t4nex/cudbg.h

355

u32 start; /* start of log in firmware memory */

usr/src/uts/common/io/cxgbe/t4nex/cudbg.h

356

u32 size; /* size of log */

usr/src/uts/common/io/cxgbe/t4nex/cudbg.h

399

u32 verbose:1; /* Turn on verbose print */

usr/src/uts/common/io/cxgbe/t4nex/cudbg.h

400

u32 use_flash:1; /* Use flash to collect or view

usr/src/uts/common/io/cxgbe/t4nex/cudbg.h

402

u32 full_mode:1; /* If set, cudbg will pull in

usr/src/uts/common/io/cxgbe/t4nex/cudbg.h

404

u32 no_compress:1; /* Dont compress will storing

usr/src/uts/common/io/cxgbe/t4nex/cudbg.h

406

u32 info:1; /* Show just the info, Dont

usr/src/uts/common/io/cxgbe/t4nex/cudbg.h

408

u32 reserved:27;

usr/src/uts/common/io/cxgbe/t4nex/cudbg.h

440

int cudbg_collect(void *handle, void *outbuf, u32 *outbuf_size);

usr/src/uts/common/io/cxgbe/t4nex/cudbg.h

442

int cudbg_view(void *handle, void *pinbuf, u32 inbuf_size,

usr/src/uts/common/io/cxgbe/t4nex/cudbg_common.c

51

get_scratch_buff(struct cudbg_buffer *pdbg_buff, u32 size,

usr/src/uts/common/io/cxgbe/t4nex/cudbg_common.c

54

u32 scratch_offset;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

155

u32 pbt_dynamic[CUDBG_PBT_DYNAMIC_ENTRIES];

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

156

u32 pbt_static[CUDBG_PBT_STATIC_ENTRIES];

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

157

u32 lrf_table[CUDBG_LRF_ENTRIES];

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

158

u32 pbt_data[CUDBG_PBT_DATA_ENTRIES];

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

171

u32 rss_pf_map;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

172

u32 rss_pf_mask;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

173

u32 rss_pf_config;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

183

u32 filter_start;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

184

u32 server_start;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

185

u32 clip_start;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

186

u32 routing_start;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

187

u32 tid_hash_base;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

188

u32 max_tid;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

193

u32 hi[MBOX_LEN / 8];

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

194

u32 lo[MBOX_LEN / 8];

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

198

u32 tid;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

199

u32 dbig_cmd;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

200

u32 dbig_conf;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

201

u32 dbig_rsp_stat;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

202

u32 data[CUDBG_NUM_REQ_REGS];

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

207

u32 start_bit;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

208

u32 end_bit;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

209

u32 shift;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

210

u32 islog2;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

215

u32 rplc[8];

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

216

u32 idx;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

217

u32 cls_lo;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

218

u32 cls_hi;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

219

u32 rplc_size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

220

u32 vniy;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

221

u32 vnix;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

222

u32 dip_hit;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

223

u32 vlan_vld;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

224

u32 repli;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

233

u32 rss_vf_vfl;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

234

u32 rss_vf_vfh;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

238

u32 tp_rssconf; /* A_TP_RSS_CONFIG */

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

239

u32 tp_rssconf_tnl; /* A_TP_RSS_CONFIG_TNL */

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

240

u32 tp_rssconf_ofd; /* A_TP_RSS_CONFIG_OFD */

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

241

u32 tp_rssconf_syn; /* A_TP_RSS_CONFIG_SYN */

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

242

u32 tp_rssconf_vrt; /* A_TP_RSS_CONFIG_VRT */

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

243

u32 tp_rssconf_cng; /* A_TP_RSS_CONFIG_CNG */

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

244

u32 chip;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

248

u32 tx_cnt[T6_PM_NSTATS];

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

249

u32 rx_cnt[T6_PM_NSTATS];

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

255

u32 kbps[NTX_SCHED];

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

256

u32 ipg[NTX_SCHED];

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

257

u32 pace_tab[NTX_SCHED];

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

258

u32 mode;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

259

u32 map;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

268

u32 nchan;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

273

u32 nchan;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

277

u32 port_count;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

283

u32 port_count;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

284

u32 reserved;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

290

u32 nchan;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

294

u32 wr_cl_success;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

295

u32 wr_cl_fail;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

299

u32 rdptr[CUDBG_NUM_ULPTX];

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

300

u32 wrptr[CUDBG_NUM_ULPTX];

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

301

u32 rddata[CUDBG_NUM_ULPTX];

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

302

u32 rd_data[CUDBG_NUM_ULPTX][CUDBG_NUM_ULPTX_READ];

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

303

u32 rdptr_asic[CUDBG_NUM_ULPTX_ASIC_READ];

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

304

u32 rddata_asic[CUDBG_NUM_ULPTX_ASIC_READ][CUDBG_NUM_ULPTX_ASIC];

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

308

u32 data[ULPRX_LA_SIZE * 8];

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

309

u32 size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

317

u32 obq_wr[2 * CIM_NUM_OBQ_T5];

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

318

u32 stat[4 * (CIM_NUM_IBQ + CIM_NUM_OBQ_T5)];

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

351

u32 qdesc_entry_size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

352

u32 num_queues;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

371

u32 start; /* Start wrt 0 */

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

372

u32 end; /* End wrt 0 */

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

376

u32 id;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

377

u32 used;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

378

u32 alloc;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

382

u32 id;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

383

u32 used;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

384

u32 alloc;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

388

u32 base;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

389

u32 limit;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

390

u32 idx;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

401

u32 avail_c;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

402

u32 mem_c;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

403

u32 up_ram_lo;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

404

u32 up_ram_hi;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

405

u32 up_extmem2_lo;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

406

u32 up_extmem2_hi;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

407

u32 rx_pages_data[3];

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

408

u32 tx_pages_data[4];

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

409

u32 p_structs;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

411

u32 port_used[4];

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

412

u32 port_alloc[4];

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

413

u32 loopback_used[NCHAN];

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

414

u32 loopback_alloc[NCHAN];

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

415

u32 pstructs_free_cnt;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

416

u32 free_rx_cnt;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

417

u32 free_tx_cnt;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

438

u32 dack_timer;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

439

u32 res;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

440

u32 cclk_ps;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

441

u32 tre;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

442

u32 dack_re;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

455

u32 size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

456

u32 mode;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

462

u32 start;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

463

u32 width;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

468

u32 addr;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

469

u32 value;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

473

u32 sop;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

474

u32 eop;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

478

u32 sop[2];

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

479

u32 eop[2];

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

483

u32 sop[4];

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

484

u32 eop[4];

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

488

u32 sop[4];

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

489

u32 eop[4];

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

490

u32 drops;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

602

u32 sop[8]; /* => undef,*/

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

603

u32 eop[8]; /* => undef,*/

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

604

u32 drop; /* => undef,*/

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

605

u32 cls_drop; /* => undef,*/

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

606

u32 err; /* => undef,*/

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

607

u32 bp; /* => undef,*/

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

740

u32 ireg_addr;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

741

u32 ireg_data;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

742

u32 ireg_local_offset;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

743

u32 ireg_offset_range;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

748

u32 outbuf[32];

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

754

u32 nchan;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

758

u32 ntids;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

759

u32 nstids;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

760

u32 stid_base;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

761

u32 hash_base;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

763

u32 natids;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

764

u32 nftids;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

765

u32 ftid_base;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

766

u32 aftid_base;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

767

u32 aftid_end;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

770

u32 sftid_base;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

771

u32 nsftids;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

774

u32 uotid_base;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

775

u32 nuotids;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

777

u32 sb;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

778

u32 flags;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

779

u32 le_db_conf;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

780

u32 IP_users;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

781

u32 IPv6_users;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

783

u32 hpftid_base;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

784

u32 nhpftids;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

790

u32 tid_start;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

791

u32 reserved[16];

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

803

u32 scfg_vers;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

804

u32 vpd_vers;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

808

u32 fw_state;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

812

u32 reserved1[16];

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

816

u32 reg_addr;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

817

u32 reg_data[4];

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

818

u32 pf_data_value[8][4]; /* [max pf][4 data reg SGE_QBASE_MAP[0-3] */

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

819

u32 vf_data_value[256][4]; /* [max vf][4 data reg SGE_QBASE_MAP[0-3] */

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

820

u32 vfcount;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

824

u32 data_size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

825

u32 qtype;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

826

u32 qid;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

827

u32 desc_size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

828

u32 num_desc;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

832

static u32 ATTRIBUTE_UNUSED t6_tp_pio_array[][4] = {

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

847

static u32 ATTRIBUTE_UNUSED t5_tp_pio_array[][4] = {

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

861

static u32 ATTRIBUTE_UNUSED t6_ma_ireg_array[][4] = {

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

867

static u32 ATTRIBUTE_UNUSED t6_ma_ireg_array2[][4] = {

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

872

static u32 ATTRIBUTE_UNUSED t6_hma_ireg_array[][4] = {

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

875

static u32 ATTRIBUTE_UNUSED t5_pcie_pdbg_array[][4] = {

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

881

static u32 ATTRIBUTE_UNUSED t5_pcie_config_array[][2] = {

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

898

static u32 ATTRIBUTE_UNUSED t5_pcie_cdbg_array[][4] = {

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

903

static u32 ATTRIBUTE_UNUSED t6_tp_tm_pio_array[1][4] = {

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

907

static u32 ATTRIBUTE_UNUSED t5_tp_tm_pio_array[1][4] = {

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

911

static u32 ATTRIBUTE_UNUSED t5_pm_rx_array[][4] = {

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

916

static u32 ATTRIBUTE_UNUSED t5_pm_tx_array[][4] = {

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

921

static u32 ATTRIBUTE_UNUSED t6_tp_mib_index_array[6][4] = {

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

930

static u32 ATTRIBUTE_UNUSED t5_tp_mib_index_array[9][4] = {

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

942

static u32 ATTRIBUTE_UNUSED t5_sge_dbg_index_array[9][4] = {

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

947

static u32 ATTRIBUTE_UNUSED t6_up_cim_reg_array[][4] = {

usr/src/uts/common/io/cxgbe/t4nex/cudbg_entity.h

964

static u32 ATTRIBUTE_UNUSED t5_up_cim_reg_array[][4] = {

usr/src/uts/common/io/cxgbe/t4nex/cudbg_flash_utils.c

100

u64 timestamp, u32 cur_entity_hdr_offset,

usr/src/uts/common/io/cxgbe/t4nex/cudbg_flash_utils.c

101

u32 start_offset, u32 ext_size)

usr/src/uts/common/io/cxgbe/t4nex/cudbg_flash_utils.c

109

u32 hdr_offset;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_flash_utils.c

110

u32 data_hdr_size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_flash_utils.c

111

u32 total_hdr_size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_flash_utils.c

112

u32 sec_hdr_start_addr;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_flash_utils.c

163

u32 start_offset, u32 cur_entity_hdr_offset,

usr/src/uts/common/io/cxgbe/t4nex/cudbg_flash_utils.c

164

u32 cur_entity_size,

usr/src/uts/common/io/cxgbe/t4nex/cudbg_flash_utils.c

165

u32 ext_size)

usr/src/uts/common/io/cxgbe/t4nex/cudbg_flash_utils.c

173

u32 data_hdr_size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_flash_utils.c

174

u32 total_hdr_size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_flash_utils.c

175

u32 tmp_size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_flash_utils.c

176

u32 sec_data_offset;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_flash_utils.c

177

u32 sec_hdr_start_addr;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_flash_utils.c

178

u32 sec_data_size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_flash_utils.c

179

u32 space_left;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_flash_utils.c

260

write_flash(struct adapter *adap, u32 start_sec, void *data, u32 size)

usr/src/uts/common/io/cxgbe/t4nex/cudbg_flash_utils.c

315

cudbg_read_flash_data(void *handle, void *buf, u32 buf_size)

usr/src/uts/common/io/cxgbe/t4nex/cudbg_flash_utils.c

318

u32 total_hdr_size, data_header_size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_flash_utils.c

320

u32 payload_size = 0;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_flash_utils.c

343

cudbg_read_flash(void *handle, void *data, u32 size, int data_flag)

usr/src/uts/common/io/cxgbe/t4nex/cudbg_flash_utils.c

350

u32 total_hdr_size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_flash_utils.c

351

u32 data_hdr_size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_flash_utils.c

352

u32 sec_hdr_start_addr;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_flash_utils.c

353

u32 tmp_size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_flash_utils.c

354

u32 data_offset = 0;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_flash_utils.c

355

u32 i, j;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_flash_utils.c

485

read_flash(struct adapter *adap, u32 start_sec , void *data, u32 size,

usr/src/uts/common/io/cxgbe/t4nex/cudbg_flash_utils.c

486

u32 start_address)

usr/src/uts/common/io/cxgbe/t4nex/cudbg_flash_utils.c

490

u32 *ptr = (u32 *)data;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_flash_utils.c

59

int write_flash(struct adapter *adap, u32 start_sec, void *data, u32 size);

usr/src/uts/common/io/cxgbe/t4nex/cudbg_flash_utils.c

60

int read_flash(struct adapter *adap, u32 start_sec , void *data, u32 size,

usr/src/uts/common/io/cxgbe/t4nex/cudbg_flash_utils.c

61

u32 start_address);

usr/src/uts/common/io/cxgbe/t4nex/cudbg_flash_utils.c

64

update_skip_size(struct cudbg_flash_sec_info *sec_info, u32 size)

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

1054

u32 sge_ctrl = t4_read_reg(padap, A_SGE_CONTROL2);

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

1055

u32 fifo_size = t4_read_reg(padap, A_SGE_DBVFIFO_SIZE);

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

1172

u32 size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

1206

u32 i, n, size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

1250

u32 size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

1352

u32 i, n, size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

1396

u32 size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

1400

2 * CIM_PIFLA_SIZE * 6 * sizeof(u32);

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

1409

t4_cim_read_pif_la(padap, (u32 *)cim_pif_la_buff->data,

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

1410

(u32 *)cim_pif_la_buff->data + 6 * CIM_PIFLA_SIZE,

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

1432

u32 size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

1465

u32 size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

1503

u32 size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

152

read_sge_ctxt(struct cudbg_init *pdbg_init, u32 cid,

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

153

enum ctxt_type ctype, u32 *data)

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

1536

u32 size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

1570

u32 size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

1613

u32 size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

1645

u32 size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

1674

u32 size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

1678

size = 10 * sizeof(u32);

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

1683

t4_read_rss_key(padap, (u32 *)scratch_buff.data, 1);

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

169

get_next_ext_entity_hdr(void *outbuf, u32 *ext_size,

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

1705

u32 size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

1744

u32 size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

175

u32 ext_offset = cudbg_hdr->data_len;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

1780

u32 rss_pf_map, rss_pf_mask, size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

1813

check_valid(u32 *buf, int type)

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

1854

u32 *max_ctx_qid, u8 nelem)

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

1856

u32 i, idx, found = 0;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

1881

u32 value, edram_ptr_count;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

1925

max_ctx_qid[CTXT_EGRESS] = min_t(u32, max_ctx_qid[CTXT_EGRESS],

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

1927

max_ctx_qid[CTXT_INGRESS] = min_t(u32, max_ctx_qid[CTXT_INGRESS],

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

1929

max_ctx_qid[CTXT_FLM] = min_t(u32, max_ctx_qid[CTXT_FLM],

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

1931

max_ctx_qid[CTXT_CNM] = min_t(u32, max_ctx_qid[CTXT_CNM],

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

1944

u32 size = 0, next_offset = 0, total_size = 0;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

1949

u32 i, j;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

1950

u32 max_ctx_qid[CTXT_CNM + 1];

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

1952

u32 qid_count = 0;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

2058

u32 offset;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

2211

u32 qsize;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

2216

qsize = 6 * CIM_OBQ_SIZE * 4 * sizeof(u32);

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

2223

(u32 *)((u32 *)scratch_buff.data +

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

223

u32 cur_entity_data_offset,

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

224

u32 cur_entity_size,

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

225

int entity_nu, u32 ext_size)

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

232

u32 cur_entity_hdr_offset = sizeof(struct cudbg_hdr);

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

233

u32 remain_flash_size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

2333

u32 qsize;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

2338

qsize = CIM_IBQ_SIZE * 4 * sizeof(u32);

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

234

u32 flash_data_offset;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

2346

(u32 *)((u32 *)scratch_buff.data +

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

235

u32 data_hdr_size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

2384

u32 rc = 0;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

2387

scratch_buff.size = 2 * CIM_MALA_SIZE * 5 * sizeof(u32);

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

2394

(u32 *) ((char *)scratch_buff.data +

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

2396

(u32 *) ((char *)scratch_buff.data +

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

2420

u32 cfg = 0;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

2426

size *= 11 * sizeof(u32);

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

2429

size *= 8 * sizeof(u32);

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

2453

(u32 *) ((char *)scratch_buff.data +

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

2485

u32 offset;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

2610

u32 value;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

2821

u32 buf_size = 0, bytes = 0;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

283

cudbg_collect(void *handle, void *outbuf, u32 *outbuf_size)

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

2868

u32 size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

2895

u32 val;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

2896

u32 busy = 1;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

2914

cim_ha_rreg(struct adapter *padap, u32 addr, u32 *val)

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

2935

struct ireg_field *up_cim_reg, u32 *buff)

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

2937

u32 i;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

296

u32 total_size, remaining_buf_size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

2967

u32 size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

297

u32 ext_size = 0;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

2970

n = sizeof(t5_up_cim_reg_array) / (4 * sizeof(u32));

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

2982

u32 *buff = up_cim->outbuf;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

3028

u32 size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

3067

mboxlog->hi[i] = (u32)(flit >> 32);

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

3068

mboxlog->lo[i] = (u32)flit;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

3096

u32 size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

3097

u32 addr;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

3183

u32 size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

3186

n = sizeof(t5_pm_rx_array) / (4 * sizeof(u32));

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

3199

u32 *buff = ch_pm->outbuf;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

3217

n = sizeof(t5_pm_tx_array) / (4 * sizeof(u32));

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

3220

u32 *buff = ch_pm->outbuf;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

3260

u32 para[7], val[7];

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

3261

u32 mbox, pf;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

3342

tid->natids = min_t(u32, tid->ntids / 2, MAX_ATIDS_A);

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

3406

u32 size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

3476

u32 size = 0, i, n, total_size = 0;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

3477

u32 ctl, data2;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

3641

u32 size, *value, j;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

3644

size = sizeof(u32) * NUM_PCIE_CONFIG_REGS;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

3645

n = sizeof(t5_pcie_config_array) / (2 * sizeof(u32));

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

3652

value = (u32 *)scratch_buff.data;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

3673

cudbg_read_tid(struct cudbg_init *pdbg_init, u32 tid,

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

3678

u32 val;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

3741

u32 value, bytes = 0, bytes_left = 0;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

3742

u32 i;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

3854

u32 size, j;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

3865

n = sizeof(t6_ma_ireg_array) / (4 * sizeof(u32));

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

3877

u32 *buff = ma_indr->outbuf;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

3892

n = sizeof(t6_ma_ireg_array2) / (4 * sizeof(u32));

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

3896

u32 *buff = ma_indr->outbuf;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

3932

u32 size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

3943

n = sizeof(t6_hma_ireg_array) / (4 * sizeof(u32));

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

3955

u32 *buff = hma_indr->outbuf;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

3990

u32 size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

3993

n = sizeof(t5_pcie_pdbg_array) / (4 * sizeof(u32));

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

4006

u32 *buff = ch_pcie->outbuf;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

4024

n = sizeof(t5_pcie_cdbg_array) / (4 * sizeof(u32));

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

4027

u32 *buff = ch_pcie->outbuf;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

4065

u32 size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

4069

n = sizeof(t5_tp_pio_array) / (4 * sizeof(u32));

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

4071

n = sizeof(t6_tp_pio_array) / (4 * sizeof(u32));

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

4085

u32 *buff = ch_tp_pio->outbuf;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

4107

n = sizeof(t5_tp_tm_pio_array) / (4 * sizeof(u32));

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

4109

n = sizeof(t6_tp_tm_pio_array) / (4 * sizeof(u32));

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

4113

u32 *buff = ch_tp_pio->outbuf;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

4135

n = sizeof(t5_tp_mib_index_array) / (4 * sizeof(u32));

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

4137

n = sizeof(t6_tp_mib_index_array) / (4 * sizeof(u32));

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

4141

u32 *buff = ch_tp_pio->outbuf;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

4185

u32 size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

4199

u32 *buff = ch_sge_dbg->outbuf;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

4235

u32 reg_addr, reg_data, reg_local_offset, reg_offset_range;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

4236

u32 *sp;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

4255

scratch_buff.size = nreg * sizeof(u32);

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

4261

sp = (u32 *)scratch_buff.data;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

4344

u32 fw_vers;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

4345

u32 size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

619

get_entity_hdr(void *outbuf, int i, u32 size,

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

641

u32 size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

679

u32 size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

715

u32 size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

750

u32 size, i, j;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

799

u32 size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

809

t4_ulprx_read_la(padap, (u32 *)ulprx_la_buff->data);

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

832

u32 size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

866

u32 val1;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

867

u32 val2;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

868

u32 size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

89

u32 t = *(u32 *)a;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

91

*(u32 *)a = *(u32 *)b;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

913

u32 size, lo, hi;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

914

u32 used, alloc;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c

92

*(u32 *)b = t;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.h

259

int get_entity_hdr(void *outbuf, int i, u32 size, struct cudbg_entity_hdr **);

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib_common.h

104

u32 size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib_common.h

105

u32 offset;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib_common.h

138

int get_scratch_buff(struct cudbg_buffer *, u32, struct cudbg_buffer *);

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib_common.h

148

int cudbg_read_flash(void *handle, void *data, u32 size, int data_flag);

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib_common.h

150

u32 start_offset, u32 start_hdr_offset,

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib_common.h

151

u32 cur_entity_size,

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib_common.h

152

u32 ext_size);

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib_common.h

57

u32 max_seq_no;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib_common.h

58

u32 max_seq_sec;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib_common.h

59

u32 hdr_data_len; /* Total data */

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib_common.h

60

u32 skip_size; /* Total size of large entities. */

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib_common.h

66

void update_skip_size(struct cudbg_flash_sec_info *, u32);

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib_common.h

71

u32 signature;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib_common.h

72

u32 hdr_len;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib_common.h

75

u32 data_len;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib_common.h

76

u32 hdr_flags;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib_common.h

80

u32 reserved[8];

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib_common.h

84

u32 entity_type;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib_common.h

85

u32 start_offset;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib_common.h

86

u32 size;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib_common.h

88

u32 sys_warn;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib_common.h

89

u32 sys_err;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib_common.h

93

u32 next_ext_offset; /* pointer to next extended entity meta data */

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib_common.h

94

u32 reserved[5];

usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib_common.h

98

u32 signature;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

100

u32 debug_U_Tx_SOP0_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

101

u32 debug_U_Tx_EOP0_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

1035

t4_tp_pio_read(padap, &value, 1, (u32)(A_TP_DBG_CSIDE_RX0 + i),

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

104

u32 reserved6:32;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

1045

t4_tp_pio_read(padap, &value, 1, (u32)(A_TP_DBG_ESIDE_PKT0 + i),

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

107

u32 debug_PC_Rsp_SOP1_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

108

u32 debug_PC_Rsp_EOP1_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

109

u32 debug_PC_Rsp_SOP0_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

110

u32 debug_PC_Rsp_EOP0_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

111

u32 debug_PC_Req_SOP1_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

1119

t4_tp_pio_read(padap, &value, 1, (u32)(A_TP_DBG_CSIDE_TX0 + i),

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

112

u32 debug_PC_Req_EOP1_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

113

u32 debug_PC_Req_SOP0_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

114

u32 debug_PC_Req_EOP0_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

1144

t4_tp_pio_read(padap, &value, 1, (u32)(A_TP_DBG_ESIDE_PKT0 + i),

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

117

u32 reserved7:32;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

120

u32 debug_PD_Req_SOP3_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

121

u32 debug_PD_Req_EOP3_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

122

u32 debug_PD_Req_SOP2_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

123

u32 debug_PD_Req_EOP2_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

124

u32 debug_PD_Req_SOP1_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

125

u32 debug_PD_Req_EOP1_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

126

u32 debug_PD_Req_SOP0_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

127

u32 debug_PD_Req_EOP0_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

130

u32 reserved8:32;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

133

u32 debug_PD_Rsp_SOP3_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

134

u32 debug_PD_Rsp_EOP3_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

135

u32 debug_PD_Rsp_SOP2_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

136

u32 debug_PD_Rsp_EOP2_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

137

u32 debug_PD_Rsp_SOP1_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

138

u32 debug_PD_Rsp_EOP1_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

139

u32 debug_PD_Rsp_SOP0_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

140

u32 debug_PD_Rsp_EOP0_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

143

u32 reserved9:32;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

146

u32 debug_CPLSW_TP_Rx_SOP1_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

147

u32 debug_CPLSW_TP_Rx_EOP1_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

148

u32 debug_CPLSW_TP_Rx_SOP0_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

149

u32 debug_CPLSW_TP_Rx_EOP0_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

150

u32 debug_CPLSW_CIM_SOP1_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

151

u32 debug_CPLSW_CIM_EOP1_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

152

u32 debug_CPLSW_CIM_SOP0_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

153

u32 debug_CPLSW_CIM_EOP0_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

156

u32 reserved10:32;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

159

u32 debug_PD_Req_Rd3_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

160

u32 debug_PD_Req_Rd2_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

161

u32 debug_PD_Req_Rd1_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

162

u32 debug_PD_Req_Rd0_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

163

u32 debug_PD_Req_Int3_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

164

u32 debug_PD_Req_Int2_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

165

u32 debug_PD_Req_Int1_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

166

u32 debug_PD_Req_Int0_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

267

static u32

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

268

read_sge_debug_data(struct cudbg_init *pdbg_init, u32 *sge_dbg_reg)

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

271

u32 value;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

275

t4_write_reg(padap, A_SGE_DEBUG_INDEX, (u32)i);

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

286

static u32

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

291

u32 i = 0;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

295

(u32)tp_mib[i].addr, true);

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

312

u32 Sge_Dbg[32] = {0};

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

313

u32 value = 0;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

314

u32 i = 0;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

315

u32 drop = 0;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

316

u32 err = 0;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

317

u32 offset;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

511

t4_tp_pio_read(padap, &value, 1, (u32)(A_TP_DBG_CSIDE_RX0 + i),

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

526

t4_tp_pio_read(padap, &value, 1, (u32)(A_TP_DBG_ESIDE_PKT0 + i),

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

55

u32 reserved1:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

56

u32 reserved2:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

57

u32 debug_uP_SOP_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

58

u32 debug_uP_EOP_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

59

u32 debug_CIM_SOP1_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

60

u32 debug_CIM_EOP1_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

61

u32 debug_CIM_SOP0_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

62

u32 debug_CIM_EOP0_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

65

u32 reserved3:32;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

68

u32 debug_T_Rx_SOP1_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

69

u32 debug_T_Rx_EOP1_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

70

u32 debug_T_Rx_SOP0_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

71

u32 debug_T_Rx_EOP0_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

72

u32 debug_U_Rx_SOP1_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

73

u32 debug_U_Rx_EOP1_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

74

u32 debug_U_Rx_SOP0_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

75

u32 debug_U_Rx_EOP0_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

78

u32 reserved4:32;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

791

t4_tp_pio_read(padap, &value, 1, (u32)(A_TP_DBG_CSIDE_RX0 + i),

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

81

u32 debug_UD_Rx_SOP3_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

82

u32 debug_UD_Rx_EOP3_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

83

u32 debug_UD_Rx_SOP2_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

84

u32 debug_UD_Rx_EOP2_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

85

u32 debug_UD_Rx_SOP1_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

86

u32 debug_UD_Rx_EOP1_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

87

u32 debug_UD_Rx_SOP0_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

874

t4_tp_pio_read(padap, &value, 1, (u32)(A_TP_DBG_CSIDE_TX0 + i),

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

88

u32 debug_UD_Rx_EOP0_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

898

t4_tp_pio_read(padap, &value, 1, (u32)(A_TP_DBG_ESIDE_PKT0 + i),

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

91

u32 reserved5:32;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

94

u32 debug_U_Tx_SOP3_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

95

u32 debug_U_Tx_EOP3_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

955

u32 Sge_Dbg[32] = {0};

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

956

u32 value = 0;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

957

u32 i = 0;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

958

u32 drop = 0;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

959

u32 err = 0;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

96

u32 debug_U_Tx_SOP2_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

960

u32 offset;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

97

u32 debug_U_Tx_EOP2_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

98

u32 debug_U_Tx_SOP1_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/cudbg_wtp.c

99

u32 debug_U_Tx_EOP1_cnt:4;

usr/src/uts/common/io/cxgbe/t4nex/fastlz.h

62

int write_to_buf(void *, u32, u32 *, void *, u32);

usr/src/uts/common/io/cxgbe/t4nex/fastlz.h

63

int read_from_buf(void *, u32, u32 *, void *, u32);

usr/src/uts/common/io/cxgbe/t4nex/fastlz_api.c

102

write_to_buf(void *out_buf, u32 out_buf_size, u32 *offset, void *in_buf,

usr/src/uts/common/io/cxgbe/t4nex/fastlz_api.c

103

u32 in_buf_size)

usr/src/uts/common/io/cxgbe/t4nex/fastlz_api.c

120

read_from_buf(void *in_buf, u32 in_buf_size, u32 *offset, void *out_buf,

usr/src/uts/common/io/cxgbe/t4nex/fastlz_api.c

121

u32 out_buf_size)

usr/src/uts/common/io/cxgbe/t4nex/fastlz_api.c

217

(u32)strlen(shown_name)+1);

usr/src/uts/common/io/cxgbe/t4nex/fastlz_api.c

259

if ((chunk_size > 62000) && (cudbg_hdr->reserved[7] < (u32)

usr/src/uts/common/io/cxgbe/t4nex/fastlz_api.c

261

cudbg_hdr->reserved[7] = (u32) chunk_size;

usr/src/uts/common/io/cxgbe/t4nex/fastlz_api.c

382

u32 decompressed_size = 0;

usr/src/uts/common/io/cxgbe/t4nex/fastlz_api.c

429

decompressed_size = (u32)readU32(buffer);

usr/src/uts/common/io/cxgbe/t4nex/t4_sge.c

2188

txinfo->sgl.cmd_nsge = cpu_to_be32(V_ULPTX_CMD((u32)ULP_TX_SC_DSGL) |

usr/src/uts/common/io/cxgbe/t4nex/t4_sge.c

2671

ctrl = V_LSO_OPCODE((u32)CPL_TX_PKT_LSO) | F_LSO_FIRST_SLICE |

usr/src/uts/common/io/cxgbe/t4nex/t4_sge.c

2854

ulpsc->cmd_more = cpu_to_be32(V_ULPTX_CMD((u32)ULP_TX_SC_IMM) |

usr/src/uts/common/io/e1000api/e1000_80003es2lan.c

1045

u32 reg;

usr/src/uts/common/io/e1000api/e1000_80003es2lan.c

1191

u32 ctrl;

usr/src/uts/common/io/e1000api/e1000_80003es2lan.c

1282

u32 tipg;

usr/src/uts/common/io/e1000api/e1000_80003es2lan.c

1283

u32 i = 0;

usr/src/uts/common/io/e1000api/e1000_80003es2lan.c

1334

u32 tipg;

usr/src/uts/common/io/e1000api/e1000_80003es2lan.c

1335

u32 i = 0;

usr/src/uts/common/io/e1000api/e1000_80003es2lan.c

1381

static s32 e1000_read_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset,

usr/src/uts/common/io/e1000api/e1000_80003es2lan.c

1384

u32 kmrnctrlsta;

usr/src/uts/common/io/e1000api/e1000_80003es2lan.c

1418

static s32 e1000_write_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset,

usr/src/uts/common/io/e1000api/e1000_80003es2lan.c

1421

u32 kmrnctrlsta;

usr/src/uts/common/io/e1000api/e1000_80003es2lan.c

143

u32 eecd = E1000_READ_REG(hw, E1000_EECD);

usr/src/uts/common/io/e1000api/e1000_80003es2lan.c

404

u32 swfw_sync;

usr/src/uts/common/io/e1000api/e1000_80003es2lan.c

405

u32 swmask = mask;

usr/src/uts/common/io/e1000api/e1000_80003es2lan.c

406

u32 fwmask = mask << 16;

usr/src/uts/common/io/e1000api/e1000_80003es2lan.c

451

u32 swfw_sync;

usr/src/uts/common/io/e1000api/e1000_80003es2lan.c

46

u32 offset,

usr/src/uts/common/io/e1000api/e1000_80003es2lan.c

474

u32 offset, u16 *data)

usr/src/uts/common/io/e1000api/e1000_80003es2lan.c

477

u32 page_select;

usr/src/uts/common/io/e1000api/e1000_80003es2lan.c

49

u32 offset,

usr/src/uts/common/io/e1000api/e1000_80003es2lan.c

545

u32 offset, u16 data)

usr/src/uts/common/io/e1000api/e1000_80003es2lan.c

548

u32 page_select;

usr/src/uts/common/io/e1000api/e1000_80003es2lan.c

634

u32 mask = E1000_NVM_CFG_DONE_PORT_0;

usr/src/uts/common/io/e1000api/e1000_80003es2lan.c

66

static s32 e1000_read_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset,

usr/src/uts/common/io/e1000api/e1000_80003es2lan.c

68

static s32 e1000_write_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset,

usr/src/uts/common/io/e1000api/e1000_80003es2lan.c

821

u32 ctrl;

usr/src/uts/common/io/e1000api/e1000_80003es2lan.c

887

u32 reg_data;

usr/src/uts/common/io/e1000api/e1000_80003es2lan.c

996

u32 reg;

usr/src/uts/common/io/e1000api/e1000_82540.c

120

u32 eecd = E1000_READ_REG(hw, E1000_EECD);

usr/src/uts/common/io/e1000api/e1000_82540.c

272

u32 ctrl, manc;

usr/src/uts/common/io/e1000api/e1000_82540.c

331

u32 txdctl, ctrl_ext;

usr/src/uts/common/io/e1000api/e1000_82540.c

413

u32 ctrl;

usr/src/uts/common/io/e1000api/e1000_82541.c

1094

u32 ret_val;

usr/src/uts/common/io/e1000api/e1000_82541.c

132

u32 eecd = E1000_READ_REG(hw, E1000_EECD);

usr/src/uts/common/io/e1000api/e1000_82541.c

298

u32 ledctl, ctrl, manc;

usr/src/uts/common/io/e1000api/e1000_82541.c

378

u32 i, txdctl;

usr/src/uts/common/io/e1000api/e1000_82541.c

502

u32 ledctl;

usr/src/uts/common/io/e1000api/e1000_82541.c

538

u32 ctrl, ledctl;

usr/src/uts/common/io/e1000api/e1000_82541.c

674

u32 idle_errs = 0;

usr/src/uts/common/io/e1000api/e1000_82542.c

196

u32 ctrl;

usr/src/uts/common/io/e1000api/e1000_82542.c

248

u32 ctrl;

usr/src/uts/common/io/e1000api/e1000_82542.c

375

u32 ctrl = E1000_READ_REG(hw, E1000_CTRL);

usr/src/uts/common/io/e1000api/e1000_82542.c

394

u32 ctrl = E1000_READ_REG(hw, E1000_CTRL);

usr/src/uts/common/io/e1000api/e1000_82542.c

414

static int e1000_rar_set_82542(struct e1000_hw *hw, u8 *addr, u32 index)

usr/src/uts/common/io/e1000api/e1000_82542.c

416

u32 rar_low, rar_high;

usr/src/uts/common/io/e1000api/e1000_82542.c

424

rar_low = ((u32) addr[0] | ((u32) addr[1] << 8) |

usr/src/uts/common/io/e1000api/e1000_82542.c

425

((u32) addr[2] << 16) | ((u32) addr[3] << 24));

usr/src/uts/common/io/e1000api/e1000_82542.c

427

rar_high = ((u32) addr[4] | ((u32) addr[5] << 8));

usr/src/uts/common/io/e1000api/e1000_82542.c

448

u32 e1000_translate_register_82542(u32 reg)

usr/src/uts/common/io/e1000api/e1000_82542.c

50

static int e1000_rar_set_82542(struct e1000_hw *hw, u8 *addr, u32 index);

usr/src/uts/common/io/e1000api/e1000_82543.c

1021

u32 ctrl_ext;

usr/src/uts/common/io/e1000api/e1000_82543.c

1062

u32 ctrl;

usr/src/uts/common/io/e1000api/e1000_82543.c

1150

u32 ctrl;

usr/src/uts/common/io/e1000api/e1000_82543.c

1200

u32 icr, rctl;

usr/src/uts/common/io/e1000api/e1000_82543.c

1336

u32 rxcw, ctrl, status;

usr/src/uts/common/io/e1000api/e1000_82543.c

1405

u32 ctrl;

usr/src/uts/common/io/e1000api/e1000_82543.c

1457

static void e1000_write_vfta_82543(struct e1000_hw *hw, u32 offset, u32 value)

usr/src/uts/common/io/e1000api/e1000_82543.c

1459

u32 temp;

usr/src/uts/common/io/e1000api/e1000_82543.c

1482

u32 ctrl = E1000_READ_REG(hw, E1000_CTRL);

usr/src/uts/common/io/e1000api/e1000_82543.c

1509

u32 ctrl = E1000_READ_REG(hw, E1000_CTRL);

usr/src/uts/common/io/e1000api/e1000_82543.c

412

struct e1000_hw_stats *stats, u32 frame_len,

usr/src/uts/common/io/e1000api/e1000_82543.c

413

u8 *mac_addr, u32 max_frame_size)

usr/src/uts/common/io/e1000api/e1000_82543.c

487

static s32 e1000_read_phy_reg_82543(struct e1000_hw *hw, u32 offset, u16 *data)

usr/src/uts/common/io/e1000api/e1000_82543.c

489

u32 mdic;

usr/src/uts/common/io/e1000api/e1000_82543.c

49

static s32 e1000_read_phy_reg_82543(struct e1000_hw *hw, u32 offset,

usr/src/uts/common/io/e1000api/e1000_82543.c

51

static s32 e1000_write_phy_reg_82543(struct e1000_hw *hw, u32 offset,

usr/src/uts/common/io/e1000api/e1000_82543.c

543

static s32 e1000_write_phy_reg_82543(struct e1000_hw *hw, u32 offset, u16 data)

usr/src/uts/common/io/e1000api/e1000_82543.c

545

u32 mdic;

usr/src/uts/common/io/e1000api/e1000_82543.c

574

mdic |= (u32)data;

usr/src/uts/common/io/e1000api/e1000_82543.c

590

static void e1000_raise_mdi_clk_82543(struct e1000_hw *hw, u32 *ctrl)

usr/src/uts/common/io/e1000api/e1000_82543.c

609

static void e1000_lower_mdi_clk_82543(struct e1000_hw *hw, u32 *ctrl)

usr/src/uts/common/io/e1000api/e1000_82543.c

630

static void e1000_shift_out_mdi_bits_82543(struct e1000_hw *hw, u32 data,

usr/src/uts/common/io/e1000api/e1000_82543.c

633

u32 ctrl, mask;

usr/src/uts/common/io/e1000api/e1000_82543.c

64

static void e1000_write_vfta_82543(struct e1000_hw *hw, u32 offset,

usr/src/uts/common/io/e1000api/e1000_82543.c

65

u32 value);

usr/src/uts/common/io/e1000api/e1000_82543.c

684

u32 ctrl;

usr/src/uts/common/io/e1000api/e1000_82543.c

69

static void e1000_lower_mdi_clk_82543(struct e1000_hw *hw, u32 *ctrl);

usr/src/uts/common/io/e1000api/e1000_82543.c

71

static void e1000_raise_mdi_clk_82543(struct e1000_hw *hw, u32 *ctrl);

usr/src/uts/common/io/e1000api/e1000_82543.c

73

static void e1000_shift_out_mdi_bits_82543(struct e1000_hw *hw, u32 data,

usr/src/uts/common/io/e1000api/e1000_82543.c

863

u32 ctrl_ext;

usr/src/uts/common/io/e1000api/e1000_82543.c

903

u32 ctrl;

usr/src/uts/common/io/e1000api/e1000_82543.c

960

u32 ctrl;

usr/src/uts/common/io/e1000api/e1000_82543.h

51

u32 frame_len, u8 *mac_addr,

usr/src/uts/common/io/e1000api/e1000_82543.h

52

u32 max_frame_size);

usr/src/uts/common/io/e1000api/e1000_82571.c

1067

u32 ctrl, ctrl_ext, eecd, tctl;

usr/src/uts/common/io/e1000api/e1000_82571.c

1193

u32 reg_data;

usr/src/uts/common/io/e1000api/e1000_82571.c

1272

u32 reg;

usr/src/uts/common/io/e1000api/e1000_82571.c

1406

u32 offset;

usr/src/uts/common/io/e1000api/e1000_82571.c

1407

u32 vfta_value = 0;

usr/src/uts/common/io/e1000api/e1000_82571.c

1408

u32 vfta_offset = 0;

usr/src/uts/common/io/e1000api/e1000_82571.c

1409

u32 vfta_bit_in_reg = 0;

usr/src/uts/common/io/e1000api/e1000_82571.c

1475

u32 ctrl;

usr/src/uts/common/io/e1000api/e1000_82571.c

1476

u32 i;

usr/src/uts/common/io/e1000api/e1000_82571.c

1572

u32 ctrl;

usr/src/uts/common/io/e1000api/e1000_82571.c

1653

u32 rxcw;

usr/src/uts/common/io/e1000api/e1000_82571.c

1654

u32 ctrl;

usr/src/uts/common/io/e1000api/e1000_82571.c

1655

u32 status;

usr/src/uts/common/io/e1000api/e1000_82571.c

1656

u32 txcw;

usr/src/uts/common/io/e1000api/e1000_82571.c

1657

u32 i;

usr/src/uts/common/io/e1000api/e1000_82571.c

208

u32 eecd = E1000_READ_REG(hw, E1000_EECD);

usr/src/uts/common/io/e1000api/e1000_82571.c

289

u32 swsm = 0;

usr/src/uts/common/io/e1000api/e1000_82571.c

290

u32 swsm2 = 0;

usr/src/uts/common/io/e1000api/e1000_82571.c

491

phy->id = (u32)(phy_id << 16);

usr/src/uts/common/io/e1000api/e1000_82571.c

497

phy->id |= (u32)(phy_id);

usr/src/uts/common/io/e1000api/e1000_82571.c

498

phy->revision = (u32)(phy_id & ~PHY_REVISION_MASK);

usr/src/uts/common/io/e1000api/e1000_82571.c

516

u32 swsm;

usr/src/uts/common/io/e1000api/e1000_82571.c

577

u32 swsm;

usr/src/uts/common/io/e1000api/e1000_82571.c

597

u32 extcnf_ctrl;

usr/src/uts/common/io/e1000api/e1000_82571.c

634

u32 extcnf_ctrl;

usr/src/uts/common/io/e1000api/e1000_82571.c

692

u32 data = E1000_READ_REG(hw, E1000_POEMB);

usr/src/uts/common/io/e1000api/e1000_82571.c

718

u32 data = E1000_READ_REG(hw, E1000_POEMB);

usr/src/uts/common/io/e1000api/e1000_82571.c

828

u32 eecd;

usr/src/uts/common/io/e1000api/e1000_82571.c

915

u32 i, eewr = 0;

usr/src/uts/common/io/e1000api/e1000_82575.c

1001

u32 eecd = E1000_READ_REG(hw, E1000_EECD);

usr/src/uts/common/io/e1000api/e1000_82575.c

1012

u32 eecd = E1000_READ_REG(hw, E1000_EECD);

usr/src/uts/common/io/e1000api/e1000_82575.c

104

static void e1000_write_vfta_i350(struct e1000_hw *hw, u32 offset, u32 value);

usr/src/uts/common/io/e1000api/e1000_82575.c

1055

u32 swfw_sync;

usr/src/uts/common/io/e1000api/e1000_82575.c

1056

u32 swmask = mask;

usr/src/uts/common/io/e1000api/e1000_82575.c

1057

u32 fwmask = mask << 16;

usr/src/uts/common/io/e1000api/e1000_82575.c

1107

u32 swfw_sync;

usr/src/uts/common/io/e1000api/e1000_82575.c

1134

u32 mask = E1000_NVM_CFG_DONE_PORT_0;

usr/src/uts/common/io/e1000api/e1000_82575.c

114

static void e1000_raise_i2c_clk(struct e1000_hw *hw, u32 *i2cctl);

usr/src/uts/common/io/e1000api/e1000_82575.c

115

static void e1000_lower_i2c_clk(struct e1000_hw *hw, u32 *i2cctl);

usr/src/uts/common/io/e1000api/e1000_82575.c

116

static s32 e1000_set_i2c_data(struct e1000_hw *hw, u32 *i2cctl, bool data);

usr/src/uts/common/io/e1000api/e1000_82575.c

117

static bool e1000_get_i2c_data(u32 *i2cctl);

usr/src/uts/common/io/e1000api/e1000_82575.c

1296

u32 reg;

usr/src/uts/common/io/e1000api/e1000_82575.c

1332

u32 pcs;

usr/src/uts/common/io/e1000api/e1000_82575.c

1333

u32 status;

usr/src/uts/common/io/e1000api/e1000_82575.c

135

u32 reg = 0;

usr/src/uts/common/io/e1000api/e1000_82575.c

1394

u32 reg;

usr/src/uts/common/io/e1000api/e1000_82575.c

1429

u32 ctrl;

usr/src/uts/common/io/e1000api/e1000_82575.c

1550

u32 ctrl;

usr/src/uts/common/io/e1000api/e1000_82575.c

1552

u32 phpm_reg;

usr/src/uts/common/io/e1000api/e1000_82575.c

1636

u32 ctrl_ext, ctrl_reg, reg, anadv_reg;

usr/src/uts/common/io/e1000api/e1000_82575.c

168

u32 ctrl_ext;

usr/src/uts/common/io/e1000api/e1000_82575.c

1781

u32 ctrl_ext = 0;

usr/src/uts/common/io/e1000api/e1000_82575.c

1782

u32 link_mode = 0;

usr/src/uts/common/io/e1000api/e1000_82575.c

1859

u32 ctrl_ext = 0;

usr/src/uts/common/io/e1000api/e1000_82575.c

2039

u32 tctl_ext;

usr/src/uts/common/io/e1000api/e1000_82575.c

2149

u32 rctl, rlpml, rxdctl[4], rfctl, temp_rctl, rx_enabled;

usr/src/uts/common/io/e1000api/e1000_82575.c

2229

u32 gcr = E1000_READ_REG(hw, E1000_GCR);

usr/src/uts/common/io/e1000api/e1000_82575.c

2278

u32 reg_val, reg_offset;

usr/src/uts/common/io/e1000api/e1000_82575.c

2316

u32 dtxswc;

usr/src/uts/common/io/e1000api/e1000_82575.c

2353

u32 vt_ctl = E1000_READ_REG(hw, E1000_VT_CTL);

usr/src/uts/common/io/e1000api/e1000_82575.c

2372

static s32 e1000_read_phy_reg_82580(struct e1000_hw *hw, u32 offset, u16 *data)

usr/src/uts/common/io/e1000api/e1000_82575.c

2398

static s32 e1000_write_phy_reg_82580(struct e1000_hw *hw, u32 offset, u16 data)

usr/src/uts/common/io/e1000api/e1000_82575.c

2427

u32 mdicnfg;

usr/src/uts/common/io/e1000api/e1000_82575.c

2467

u32 ctrl;

usr/src/uts/common/io/e1000api/e1000_82575.c

2562

u16 e1000_rxpbs_adjust_82580(u32 data)

usr/src/uts/common/io/e1000api/e1000_82575.c

3022

u32 ipcnfg, eeer;

usr/src/uts/common/io/e1000api/e1000_82575.c

3034

u32 eee_su = E1000_READ_REG(hw, E1000_EEE_SU);

usr/src/uts/common/io/e1000api/e1000_82575.c

3198

u32 offset;

usr/src/uts/common/io/e1000api/e1000_82575.c

3220

void e1000_write_vfta_i350(struct e1000_hw *hw, u32 offset, u32 value)

usr/src/uts/common/io/e1000api/e1000_82575.c

3243

u32 ctrl_ext, i2cparams;

usr/src/uts/common/io/e1000api/e1000_82575.c

3276

u32 max_retry = 10;

usr/src/uts/common/io/e1000api/e1000_82575.c

3277

u32 retry = 1;

usr/src/uts/common/io/e1000api/e1000_82575.c

333

u32 eecd = E1000_READ_REG(hw, E1000_EECD);

usr/src/uts/common/io/e1000api/e1000_82575.c

3367

u32 max_retry = 1;

usr/src/uts/common/io/e1000api/e1000_82575.c

3368

u32 retry = 0;

usr/src/uts/common/io/e1000api/e1000_82575.c

3434

u32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);

usr/src/uts/common/io/e1000api/e1000_82575.c

3465

u32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);

usr/src/uts/common/io/e1000api/e1000_82575.c

3516

u32 i2cctl;

usr/src/uts/common/io/e1000api/e1000_82575.c

3548

u32 i = 0;

usr/src/uts/common/io/e1000api/e1000_82575.c

3549

u32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);

usr/src/uts/common/io/e1000api/e1000_82575.c

3550

u32 timeout = 10;

usr/src/uts/common/io/e1000api/e1000_82575.c

3593

u32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);

usr/src/uts/common/io/e1000api/e1000_82575.c

3623

u32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);

usr/src/uts/common/io/e1000api/e1000_82575.c

3654

static void e1000_raise_i2c_clk(struct e1000_hw *hw, u32 *i2cctl)

usr/src/uts/common/io/e1000api/e1000_82575.c

3674

static void e1000_lower_i2c_clk(struct e1000_hw *hw, u32 *i2cctl)

usr/src/uts/common/io/e1000api/e1000_82575.c

3696

static s32 e1000_set_i2c_data(struct e1000_hw *hw, u32 *i2cctl, bool data)

usr/src/uts/common/io/e1000api/e1000_82575.c

3731

static bool e1000_get_i2c_data(u32 *i2cctl)

usr/src/uts/common/io/e1000api/e1000_82575.c

3754

u32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);

usr/src/uts/common/io/e1000api/e1000_82575.c

3755

u32 i;

usr/src/uts/common/io/e1000api/e1000_82575.c

597

static s32 e1000_read_phy_reg_sgmii_82575(struct e1000_hw *hw, u32 offset,

usr/src/uts/common/io/e1000api/e1000_82575.c

60

static s32 e1000_read_phy_reg_sgmii_82575(struct e1000_hw *hw, u32 offset,

usr/src/uts/common/io/e1000api/e1000_82575.c

630

static s32 e1000_write_phy_reg_sgmii_82575(struct e1000_hw *hw, u32 offset,

usr/src/uts/common/io/e1000api/e1000_82575.c

65

u32 offset, u16 *data);

usr/src/uts/common/io/e1000api/e1000_82575.c

666

u32 ctrl_ext;

usr/src/uts/common/io/e1000api/e1000_82575.c

667

u32 mdic;

usr/src/uts/common/io/e1000api/e1000_82575.c

67

u32 offset, u16 data);

usr/src/uts/common/io/e1000api/e1000_82575.c

80

u32 offset, u16 data);

usr/src/uts/common/io/e1000api/e1000_82575.c

900

u32 data;

usr/src/uts/common/io/e1000api/e1000_82575.c

947

u32 data;

usr/src/uts/common/io/e1000api/e1000_82575.h

101

u32 ip_config;

usr/src/uts/common/io/e1000api/e1000_82575.h

103

u32 iplen:9;

usr/src/uts/common/io/e1000api/e1000_82575.h

104

u32 maclen:7;

usr/src/uts/common/io/e1000api/e1000_82575.h

105

u32 vlan_tag:16;

usr/src/uts/common/io/e1000api/e1000_82575.h

108

u32 seq_num;

usr/src/uts/common/io/e1000api/e1000_82575.h

112

u32 mkrloc:9;

usr/src/uts/common/io/e1000api/e1000_82575.h

113

u32 tucmd:11;

usr/src/uts/common/io/e1000api/e1000_82575.h

114

u32 dtyp:4;

usr/src/uts/common/io/e1000api/e1000_82575.h

115

u32 adv:8;

usr/src/uts/common/io/e1000api/e1000_82575.h

116

u32 rsvd:4;

usr/src/uts/common/io/e1000api/e1000_82575.h

117

u32 idx:4;

usr/src/uts/common/io/e1000api/e1000_82575.h

118

u32 l4len:8;

usr/src/uts/common/io/e1000api/e1000_82575.h

119

u32 mss:16;

usr/src/uts/common/io/e1000api/e1000_82575.h

496

u16 e1000_rxpbs_adjust_82580(u32 data);

usr/src/uts/common/io/e1000api/e1000_82575.h

64

u32 data;

usr/src/uts/common/io/e1000api/e1000_82575.h

66

u32 datalen:16; /* Data buffer length */

usr/src/uts/common/io/e1000api/e1000_82575.h

67

u32 rsvd:4;

usr/src/uts/common/io/e1000api/e1000_82575.h

68

u32 dtyp:4; /* Descriptor type */

usr/src/uts/common/io/e1000api/e1000_82575.h

69

u32 dcmd:8; /* Descriptor command */

usr/src/uts/common/io/e1000api/e1000_82575.h

73

u32 data;

usr/src/uts/common/io/e1000api/e1000_82575.h

75

u32 status:4; /* Descriptor status */

usr/src/uts/common/io/e1000api/e1000_82575.h

76

u32 idx:4;

usr/src/uts/common/io/e1000api/e1000_82575.h

77

u32 popts:6; /* Packet Options */

usr/src/uts/common/io/e1000api/e1000_82575.h

78

u32 paylen:18; /* Payload length */

usr/src/uts/common/io/e1000api/e1000_api.c

1023

s32 e1000_set_obff_timer(struct e1000_hw *hw, u32 itr)

usr/src/uts/common/io/e1000api/e1000_api.c

1055

s32 e1000_read_phy_reg(struct e1000_hw *hw, u32 offset, u16 *data)

usr/src/uts/common/io/e1000api/e1000_api.c

1072

s32 e1000_write_phy_reg(struct e1000_hw *hw, u32 offset, u16 data)

usr/src/uts/common/io/e1000api/e1000_api.c

1130

s32 e1000_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data)

usr/src/uts/common/io/e1000api/e1000_api.c

1145

s32 e1000_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data)

usr/src/uts/common/io/e1000api/e1000_api.c

1283

s32 e1000_read_pba_string(struct e1000_hw *hw, u8 *pba_num, u32 pba_num_size)

usr/src/uts/common/io/e1000api/e1000_api.c

1298

s32 e1000_read_pba_length(struct e1000_hw *hw, u32 *pba_num_size)

usr/src/uts/common/io/e1000api/e1000_api.c

1392

s32 e1000_write_8bit_ctrl_reg(struct e1000_hw *hw, u32 reg, u32 offset,

usr/src/uts/common/io/e1000api/e1000_api.c

626

void e1000_write_vfta(struct e1000_hw *hw, u32 offset, u32 value)

usr/src/uts/common/io/e1000api/e1000_api.c

642

u32 mc_addr_count)

usr/src/uts/common/io/e1000api/e1000_api.c

920

int e1000_rar_set(struct e1000_hw *hw, u8 *addr, u32 index)

usr/src/uts/common/io/e1000api/e1000_api.c

951

u32 e1000_hash_mc_addr(struct e1000_hw *hw, u8 *mc_addr)

usr/src/uts/common/io/e1000api/e1000_api.h

100

s32 e1000_read_pba_string(struct e1000_hw *hw, u8 *pba_num, u32 pba_num_size);

usr/src/uts/common/io/e1000api/e1000_api.h

101

s32 e1000_read_pba_length(struct e1000_hw *hw, u32 *pba_num_size);

usr/src/uts/common/io/e1000api/e1000_api.h

106

s32 e1000_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data);

usr/src/uts/common/io/e1000api/e1000_api.h

107

s32 e1000_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data);

usr/src/uts/common/io/e1000api/e1000_api.h

119

u32 e1000_translate_register_82542(u32 reg);

usr/src/uts/common/io/e1000api/e1000_api.h

54

s32 e1000_set_obff_timer(struct e1000_hw *hw, u32 itr);

usr/src/uts/common/io/e1000api/e1000_api.h

63

void e1000_write_vfta(struct e1000_hw *hw, u32 offset, u32 value);

usr/src/uts/common/io/e1000api/e1000_api.h

72

int e1000_rar_set(struct e1000_hw *hw, u8 *addr, u32 index);

usr/src/uts/common/io/e1000api/e1000_api.h

73

u32 e1000_hash_mc_addr(struct e1000_hw *hw, u8 *mc_addr);

usr/src/uts/common/io/e1000api/e1000_api.h

75

u32 mc_addr_count);

usr/src/uts/common/io/e1000api/e1000_api.h

87

s32 e1000_read_phy_reg(struct e1000_hw *hw, u32 offset, u16 *data);

usr/src/uts/common/io/e1000api/e1000_api.h

88

s32 e1000_write_phy_reg(struct e1000_hw *hw, u32 offset, u16 data);

usr/src/uts/common/io/e1000api/e1000_api.h

89

s32 e1000_write_8bit_ctrl_reg(struct e1000_hw *hw, u32 reg, u32 offset,

usr/src/uts/common/io/e1000api/e1000_hw.h

1011

u32 tbi_compatibility;

usr/src/uts/common/io/e1000api/e1000_hw.h

1018

u32 smb_counter;

usr/src/uts/common/io/e1000api/e1000_hw.h

1061

u32 mtu;

usr/src/uts/common/io/e1000api/e1000_hw.h

1068

u32 vf_number;

usr/src/uts/common/io/e1000api/e1000_hw.h

1069

u32 v2p_mailbox;

usr/src/uts/common/io/e1000api/e1000_hw.h

1117

s32 e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value);

usr/src/uts/common/io/e1000api/e1000_hw.h

1118

s32 e1000_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value);

usr/src/uts/common/io/e1000api/e1000_hw.h

1119

void e1000_read_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value);

usr/src/uts/common/io/e1000api/e1000_hw.h

1120

void e1000_write_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value);

usr/src/uts/common/io/e1000api/e1000_hw.h

454

#define __le32 u32

usr/src/uts/common/io/e1000api/e1000_hw.h

693

u32 last_gprc;

usr/src/uts/common/io/e1000api/e1000_hw.h

694

u32 last_gptc;

usr/src/uts/common/io/e1000api/e1000_hw.h

695

u32 last_gorc;

usr/src/uts/common/io/e1000api/e1000_hw.h

696

u32 last_gotc;

usr/src/uts/common/io/e1000api/e1000_hw.h

697

u32 last_mprc;

usr/src/uts/common/io/e1000api/e1000_hw.h

698

u32 last_gotlbc;

usr/src/uts/common/io/e1000api/e1000_hw.h

699

u32 last_gptlbc;

usr/src/uts/common/io/e1000api/e1000_hw.h

700

u32 last_gorlbc;

usr/src/uts/common/io/e1000api/e1000_hw.h

701

u32 last_gprlbc;

usr/src/uts/common/io/e1000api/e1000_hw.h

715

u32 idle_errors;

usr/src/uts/common/io/e1000api/e1000_hw.h

716

u32 receive_errors;

usr/src/uts/common/io/e1000api/e1000_hw.h

720

u32 signature;

usr/src/uts/common/io/e1000api/e1000_hw.h

724

u32 reserved1;

usr/src/uts/common/io/e1000api/e1000_hw.h

780

void (*update_mc_addr_list)(struct e1000_hw *, u8 *, u32);

usr/src/uts/common/io/e1000api/e1000_hw.h

788

void (*write_vfta)(struct e1000_hw *, u32, u32);

usr/src/uts/common/io/e1000api/e1000_hw.h

790

int (*rar_set)(struct e1000_hw *, u8*, u32);

usr/src/uts/common/io/e1000api/e1000_hw.h

793

s32 (*set_obff_timer)(struct e1000_hw *, u32);

usr/src/uts/common/io/e1000api/e1000_hw.h

824

s32 (*read_reg)(struct e1000_hw *, u32, u16 *);

usr/src/uts/common/io/e1000api/e1000_hw.h

825

s32 (*read_reg_locked)(struct e1000_hw *, u32, u16 *);

usr/src/uts/common/io/e1000api/e1000_hw.h

826

s32 (*read_reg_page)(struct e1000_hw *, u32, u16 *);

usr/src/uts/common/io/e1000api/e1000_hw.h

831

s32 (*write_reg)(struct e1000_hw *, u32, u16);

usr/src/uts/common/io/e1000api/e1000_hw.h

832

s32 (*write_reg_locked)(struct e1000_hw *, u32, u16);

usr/src/uts/common/io/e1000api/e1000_hw.h

833

s32 (*write_reg_page)(struct e1000_hw *, u32, u16);

usr/src/uts/common/io/e1000api/e1000_hw.h

860

u32 collision_delta;

usr/src/uts/common/io/e1000api/e1000_hw.h

861

u32 ledctl_default;

usr/src/uts/common/io/e1000api/e1000_hw.h

862

u32 ledctl_mode1;

usr/src/uts/common/io/e1000api/e1000_hw.h

863

u32 ledctl_mode2;

usr/src/uts/common/io/e1000api/e1000_hw.h

864

u32 mc_filter_type;

usr/src/uts/common/io/e1000api/e1000_hw.h

865

u32 tx_packet_delta;

usr/src/uts/common/io/e1000api/e1000_hw.h

866

u32 txcw;

usr/src/uts/common/io/e1000api/e1000_hw.h

878

u32 mta_shadow[MAX_MTA_REG];

usr/src/uts/common/io/e1000api/e1000_hw.h

895

u32 max_frame_size;

usr/src/uts/common/io/e1000api/e1000_hw.h

909

u32 addr;

usr/src/uts/common/io/e1000api/e1000_hw.h

910

u32 id;

usr/src/uts/common/io/e1000api/e1000_hw.h

911

u32 reset_delay_us; /* in usec */

usr/src/uts/common/io/e1000api/e1000_hw.h

912

u32 revision;

usr/src/uts/common/io/e1000api/e1000_hw.h

936

u32 flash_bank_size;

usr/src/uts/common/io/e1000api/e1000_hw.h

937

u32 flash_base_addr;

usr/src/uts/common/io/e1000api/e1000_hw.h

956

u32 high_water; /* Flow control high-water mark */

usr/src/uts/common/io/e1000api/e1000_hw.h

957

u32 low_water; /* Flow control low-water mark */

usr/src/uts/common/io/e1000api/e1000_hw.h

968

s32 (*read)(struct e1000_hw *, u32 *, u16, u16);

usr/src/uts/common/io/e1000api/e1000_hw.h

969

s32 (*write)(struct e1000_hw *, u32 *, u16, u16);

usr/src/uts/common/io/e1000api/e1000_hw.h

970

s32 (*read_posted)(struct e1000_hw *, u32 *, u16, u16);

usr/src/uts/common/io/e1000api/e1000_hw.h

971

s32 (*write_posted)(struct e1000_hw *, u32 *, u16, u16);

usr/src/uts/common/io/e1000api/e1000_hw.h

978

u32 msgs_tx;

usr/src/uts/common/io/e1000api/e1000_hw.h

979

u32 msgs_rx;

usr/src/uts/common/io/e1000api/e1000_hw.h

981

u32 acks;

usr/src/uts/common/io/e1000api/e1000_hw.h

982

u32 reqs;

usr/src/uts/common/io/e1000api/e1000_hw.h

983

u32 rsts;

usr/src/uts/common/io/e1000api/e1000_hw.h

989

u32 timeout;

usr/src/uts/common/io/e1000api/e1000_hw.h

990

u32 usec_delay;

usr/src/uts/common/io/e1000api/e1000_hw.h

997

u32 tx_fifo_head;

usr/src/uts/common/io/e1000api/e1000_hw.h

998

u32 tx_fifo_start;

usr/src/uts/common/io/e1000api/e1000_hw.h

999

u32 tx_fifo_size;

usr/src/uts/common/io/e1000api/e1000_i210.c

142

u32 swfw_sync;

usr/src/uts/common/io/e1000api/e1000_i210.c

164

u32 swsm;

usr/src/uts/common/io/e1000api/e1000_i210.c

325

u32 i, k, eewr = 0;

usr/src/uts/common/io/e1000api/e1000_i210.c

326

u32 attempts = 100000;

usr/src/uts/common/io/e1000api/e1000_i210.c

379

u32 invm_dword;

usr/src/uts/common/io/e1000api/e1000_i210.c

598

u32 eec = 0;

usr/src/uts/common/io/e1000api/e1000_i210.c

619

u32 flup;

usr/src/uts/common/io/e1000api/e1000_i210.c

650

u32 i, reg;

usr/src/uts/common/io/e1000api/e1000_i210.c

829

u32 wuc, mdicnfg, ctrl, ctrl_ext, reg_val;

usr/src/uts/common/io/e1000api/e1000_i210.c

898

u32 mask = E1000_NVM_CFG_DONE_PORT_0;

usr/src/uts/common/io/e1000api/e1000_i210.c

90

u32 swfw_sync;

usr/src/uts/common/io/e1000api/e1000_i210.c

91

u32 swmask = mask;

usr/src/uts/common/io/e1000api/e1000_i210.c

92

u32 fwmask = mask << 16;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

1035

u32 fextnvm6 = E1000_READ_REG(hw, E1000_FEXTNVM6);

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

1036

u32 status = E1000_READ_REG(hw, E1000_STATUS);

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

1114

u32 value, scale;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

1144

u32 reg = link << (E1000_LTRV_REQ_SHIFT + E1000_LTRV_NOSNOOP_SHIFT) |

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

1157

u32 rxa;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

122

static s32 e1000_erase_flash_bank_ich8lan(struct e1000_hw *hw, u32 bank);

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

1250

static s32 e1000_set_obff_timer_pch_lpt(struct e1000_hw *hw, u32 itr)

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

1252

u32 svcr;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

126

u32 offset, u8 *data);

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

127

static s32 e1000_read_flash_data_ich8lan(struct e1000_hw *hw, u32 offset,

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

1286

u32 mac_reg;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

129

static s32 e1000_read_flash_data32_ich8lan(struct e1000_hw *hw, u32 offset,

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

130

u32 *data);

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

132

u32 offset, u32 *data);

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

134

u32 offset, u32 data);

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

136

u32 offset, u32 dword);

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

138

u32 offset, u16 *data);

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

140

u32 offset, u8 byte);

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

1433

u32 mac_reg;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

147

static s32 e1000_set_obff_timer_pch_lpt(struct e1000_hw *hw, u32 itr);

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

1716

u32 mac_reg;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

1748

u32 pcieanacfg = E1000_READ_REG(hw, E1000_PCIEANACFG);

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

1749

u32 fextnvm6 = E1000_READ_REG(hw, E1000_FEXTNVM6);

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

182

u32 grra:8; /* 0:7 GbE region Read Access */

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

183

u32 grwa:8; /* 8:15 GbE region Write Access */

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

184

u32 gmrag:8; /* 23:16 GbE Master Read Access Grant */

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

185

u32 gmwag:8; /* 31:24 GbE Master Write Access Grant */

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

1909

u32 extcnf_ctrl, timeout = PHY_CFG_TIMEOUT;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

1970

u32 extcnf_ctrl;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

1998

u32 fwsm;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

2019

u32 fwsm;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

203

u32 phy_id = 0;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

2040

static int e1000_rar_set_pch2lan(struct e1000_hw *hw, u8 *addr, u32 index)

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

2042

u32 rar_low, rar_high;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

2049

rar_low = ((u32) addr[0] |

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

2050

((u32) addr[1] << 8) |

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

2051

((u32) addr[2] << 16) | ((u32) addr[3] << 24));

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

2053

rar_high = ((u32) addr[4] | ((u32) addr[5] << 8));

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

206

u32 mac_reg = 0;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

2070

if (index < (u32) (hw->mac.rar_entry_count)) {

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

2109

static int e1000_rar_set_pch_lpt(struct e1000_hw *hw, u8 *addr, u32 index)

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

2111

u32 rar_low, rar_high;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

2112

u32 wlock_mac;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

2119

rar_low = ((u32) addr[0] | ((u32) addr[1] << 8) |

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

212

phy_id = (u32)(phy_reg << 16);

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

2120

((u32) addr[2] << 16) | ((u32) addr[3] << 24));

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

2122

rar_high = ((u32) addr[4] | ((u32) addr[5] << 8));

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

2188

u32 mc_addr_count)

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

219

phy_id |= (u32)(phy_reg & PHY_REVISION_MASK);

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

2231

u32 fwsm;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

2259

u32 strap = E1000_READ_REG(hw, E1000_STRAP);

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

2260

u32 freq = (strap & E1000_STRAP_SMT_FREQ_MASK) >>

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

228

hw->phy.revision = (u32)(phy_reg & ~PHY_REVISION_MASK);

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

2300

u32 i, data, cnf_size, cnf_base_addr, sw_cfg_mask;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

2411

ret_val = phy->ops.write_reg_locked(hw, (u32)reg_addr,

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

2517

u32 ctrl_reg = 0;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

2518

u32 ctrl_ext = 0;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

2519

u32 reg = 0;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

2570

u32 mac_reg;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

274

u32 mac_reg;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

2743

u32 mac_reg;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

2778

static u32 e1000_calc_rx_da_crc(u8 mac[])

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

2780

u32 poly = 0xEDB88320; /* Polynomial for 802.3 CRC calculation */

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

2781

u32 i, j, mask, crc;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

2806

u32 mac_reg;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

2827

u32 addr_high, addr_low;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

3043

u32 mac_reg;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

3064

u32 extcnf_ctrl;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

3090

u32 data, loop = E1000_ICH8_LAN_INIT_TIMEOUT;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

318

u32 mac_reg, fwsm = E1000_READ_REG(hw, E1000_FWSM);

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

3257

u32 phy_ctrl;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

3353

u32 phy_ctrl;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

3439

static s32 e1000_valid_nvm_bank_detect_ich8lan(struct e1000_hw *hw, u32 *bank)

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

3441

u32 eecd;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

3443

u32 bank1_offset = nvm->flash_bank_size * sizeof(u16);

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

3444

u32 act_offset = E1000_ICH_NVM_SIG_WORD * 2 + 1;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

3445

u32 nvm_dword = 0;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

3555

u32 act_offset;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

3557

u32 bank = 0;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

3558

u32 dword = 0;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

3648

u32 act_offset;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

3650

u32 bank = 0;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

3789

static s32 e1000_flash_cycle_ich8lan(struct e1000_hw *hw, u32 timeout)

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

3793

u32 i = 0;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

3833

static s32 e1000_read_flash_dword_ich8lan(struct e1000_hw *hw, u32 offset,

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

3834

u32 *data)

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

3856

static s32 e1000_read_flash_word_ich8lan(struct e1000_hw *hw, u32 offset,

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

3878

static s32 e1000_read_flash_byte_ich8lan(struct e1000_hw *hw, u32 offset,

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

3909

static s32 e1000_read_flash_data_ich8lan(struct e1000_hw *hw, u32 offset,

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

3914

u32 flash_linear_addr;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

3915

u32 flash_data = 0;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

3984

static s32 e1000_read_flash_data32_ich8lan(struct e1000_hw *hw, u32 offset,

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

3985

u32 *data)

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

3989

u32 flash_linear_addr;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

4012

hsflctl.hsf_ctrl.fldbcount = sizeof(u32) - 1;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

4018

(u32)hsflctl.regval << 16);

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

4104

u32 i, act_offset, new_bank_offset, old_bank_offset, bank;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

4106

u32 dword = 0;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

4273

u32 i, act_offset, new_bank_offset, old_bank_offset, bank;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

4480

static s32 e1000_write_flash_data_ich8lan(struct e1000_hw *hw, u32 offset,

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

4485

u32 flash_linear_addr;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

4486

u32 flash_data = 0;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

4536

flash_data = (u32)data & 0x00FF;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

4538

flash_data = (u32)data;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

4577

static s32 e1000_write_flash_data32_ich8lan(struct e1000_hw *hw, u32 offset,

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

4578

u32 data)

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

4582

u32 flash_linear_addr;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

4612

hsflctl.hsf_ctrl.fldbcount = sizeof(u32) - 1;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

4666

static s32 e1000_write_flash_byte_ich8lan(struct e1000_hw *hw, u32 offset,

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

4686

u32 offset, u32 dword)

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

4723

u32 offset, u8 byte)

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

4755

static s32 e1000_erase_flash_bank_ich8lan(struct e1000_hw *hw, u32 bank)

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

4760

u32 flash_linear_addr;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

4762

u32 flash_bank_size = nvm->flash_bank_size * 2;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

4811

u32 timeout = ICH_FLASH_ERASE_COMMAND_TIMEOUT;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

4911

const u32 ledctl_on = E1000_LEDCTL_MODE_LINK_UP;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

4912

const u32 ledctl_off = E1000_LEDCTL_MODE_LINK_UP | E1000_PHY_LED0_IVRT;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

5006

u32 ctrl, reg;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

5126

u32 ctrl_ext, txdctl, snoop;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

5184

snoop = (u32) ~(PCIE_NO_SNOOP_ALL);

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

5210

u32 reg;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

5348

u32 ctrl;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

5439

u32 ctrl;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

5504

u32 phy_ctrl;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

5592

u32 reg;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

5687

u32 phy_ctrl;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

5703

u32 fextnvm6 = E1000_READ_REG(hw, E1000_FEXTNVM6);

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

5818

u32 e1000_resume_workarounds_pchlan(struct e1000_hw *hw)

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

5973

u32 i, led;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

6005

u32 i, led;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

6043

u32 bank = 0;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

6044

u32 status;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

653

u32 gfpreg, sector_base_addr, sector_end_addr;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

655

u32 nvm_size;

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

80

static int e1000_rar_set_pch2lan(struct e1000_hw *hw, u8 *addr, u32 index);

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

81

static int e1000_rar_set_pch_lpt(struct e1000_hw *hw, u8 *addr, u32 index);

usr/src/uts/common/io/e1000api/e1000_ich8lan.c

85

u32 mc_addr_count);

usr/src/uts/common/io/e1000api/e1000_ich8lan.h

333

u32 e1000_resume_workarounds_pchlan(struct e1000_hw *hw);

usr/src/uts/common/io/e1000api/e1000_mac.c

1061

u32 txcw;

usr/src/uts/common/io/e1000api/e1000_mac.c

1130

u32 i, status;

usr/src/uts/common/io/e1000api/e1000_mac.c

1178

u32 ctrl;

usr/src/uts/common/io/e1000api/e1000_mac.c

1229

u32 tctl;

usr/src/uts/common/io/e1000api/e1000_mac.c

1252

u32 fcrtl = 0, fcrth = 0;

usr/src/uts/common/io/e1000api/e1000_mac.c

1291

u32 ctrl;

usr/src/uts/common/io/e1000api/e1000_mac.c

130

u8 E1000_UNUSEDARG *h, u32 E1000_UNUSEDARG a)

usr/src/uts/common/io/e1000api/e1000_mac.c

1355

u32 pcs_status_reg, pcs_adv_reg, pcs_lp_ability_reg, pcs_ctrl_reg;

usr/src/uts/common/io/e1000api/e1000_mac.c

141

u32 E1000_UNUSEDARG a, u32 E1000_UNUSEDARG b)

usr/src/uts/common/io/e1000api/e1000_mac.c

152

u8 E1000_UNUSEDARG *h, u32 E1000_UNUSEDARG a)

usr/src/uts/common/io/e1000api/e1000_mac.c

163

u32 E1000_UNUSEDARG a)

usr/src/uts/common/io/e1000api/e1000_mac.c

1662

u32 status;

usr/src/uts/common/io/e1000api/e1000_mac.c

1717

u32 swsm;

usr/src/uts/common/io/e1000api/e1000_mac.c

1768

u32 swsm;

usr/src/uts/common/io/e1000api/e1000_mac.c

181

u32 status = E1000_READ_REG(hw, E1000_STATUS);

usr/src/uts/common/io/e1000api/e1000_mac.c

1841

const u32 ledctl_mask = 0x000000FF;

usr/src/uts/common/io/e1000api/e1000_mac.c

1842

const u32 ledctl_on = E1000_LEDCTL_MODE_LED_ON;

usr/src/uts/common/io/e1000api/e1000_mac.c

1843

const u32 ledctl_off = E1000_LEDCTL_MODE_LED_OFF;

usr/src/uts/common/io/e1000api/e1000_mac.c

1907

u32 ledctl;

usr/src/uts/common/io/e1000api/e1000_mac.c

1953

u32 ledctl_blink = 0;

usr/src/uts/common/io/e1000api/e1000_mac.c

1954

u32 i;

usr/src/uts/common/io/e1000api/e1000_mac.c

1971

u32 mode = (hw->mac.ledctl_mode2 >> i) &

usr/src/uts/common/io/e1000api/e1000_mac.c

1973

u32 led_default = hw->mac.ledctl_default >> i;

usr/src/uts/common/io/e1000api/e1000_mac.c

2000

u32 ctrl;

usr/src/uts/common/io/e1000api/e1000_mac.c

2029

u32 ctrl;

usr/src/uts/common/io/e1000api/e1000_mac.c

2057

void e1000_set_pcie_no_snoop_generic(struct e1000_hw *hw, u32 no_snoop)

usr/src/uts/common/io/e1000api/e1000_mac.c

2059

u32 gcr;

usr/src/uts/common/io/e1000api/e1000_mac.c

2087

u32 ctrl;

usr/src/uts/common/io/e1000api/e1000_mac.c

2229

s32 e1000_write_8bit_ctrl_reg_generic(struct e1000_hw *hw, u32 reg,

usr/src/uts/common/io/e1000api/e1000_mac.c

2230

u32 offset, u8 data)

usr/src/uts/common/io/e1000api/e1000_mac.c

2232

u32 i, regvalue = 0;

usr/src/uts/common/io/e1000api/e1000_mac.c

2237

regvalue = ((u32)data) | (offset << E1000_GEN_CTL_ADDRESS_SHIFT);

usr/src/uts/common/io/e1000api/e1000_mac.c

281

u32 reg;

usr/src/uts/common/io/e1000api/e1000_mac.c

300

u32 status;

usr/src/uts/common/io/e1000api/e1000_mac.c

334

u32 offset;

usr/src/uts/common/io/e1000api/e1000_mac.c

353

void e1000_write_vfta_generic(struct e1000_hw *hw, u32 offset, u32 value)

usr/src/uts/common/io/e1000api/e1000_mac.c

372

u32 i;

usr/src/uts/common/io/e1000api/e1000_mac.c

40

static int e1000_rar_set_generic(struct e1000_hw *hw, u8 *addr, u32 index);

usr/src/uts/common/io/e1000api/e1000_mac.c

402

u32 i;

usr/src/uts/common/io/e1000api/e1000_mac.c

478

static int e1000_rar_set_generic(struct e1000_hw *hw, u8 *addr, u32 index)

usr/src/uts/common/io/e1000api/e1000_mac.c

480

u32 rar_low, rar_high;

usr/src/uts/common/io/e1000api/e1000_mac.c

487

rar_low = ((u32) addr[0] | ((u32) addr[1] << 8) |

usr/src/uts/common/io/e1000api/e1000_mac.c

488

((u32) addr[2] << 16) | ((u32) addr[3] << 24));

usr/src/uts/common/io/e1000api/e1000_mac.c

490

rar_high = ((u32) addr[4] | ((u32) addr[5] << 8));

usr/src/uts/common/io/e1000api/e1000_mac.c

516

u32 e1000_hash_mc_addr_generic(struct e1000_hw *hw, u8 *mc_addr)

usr/src/uts/common/io/e1000api/e1000_mac.c

518

u32 hash_value, hash_mask;

usr/src/uts/common/io/e1000api/e1000_mac.c

588

u8 *mc_addr_list, u32 mc_addr_count)

usr/src/uts/common/io/e1000api/e1000_mac.c

590

u32 hash_value, hash_bit, hash_reg;

usr/src/uts/common/io/e1000api/e1000_mac.c

599

for (i = 0; (u32) i < mc_addr_count; i++) {

usr/src/uts/common/io/e1000api/e1000_mac.c

777

u32 rxcw;

usr/src/uts/common/io/e1000api/e1000_mac.c

778

u32 ctrl;

usr/src/uts/common/io/e1000api/e1000_mac.c

779

u32 status;

usr/src/uts/common/io/e1000api/e1000_mac.c

844

u32 rxcw;

usr/src/uts/common/io/e1000api/e1000_mac.c

845

u32 ctrl;

usr/src/uts/common/io/e1000api/e1000_mac.c

846

u32 status;

usr/src/uts/common/io/e1000api/e1000_mac.h

44

void e1000_null_update_mc(struct e1000_hw *hw, u8 *h, u32 a);

usr/src/uts/common/io/e1000api/e1000_mac.h

45

void e1000_null_write_vfta(struct e1000_hw *hw, u32 a, u32 b);

usr/src/uts/common/io/e1000api/e1000_mac.h

46

int e1000_null_rar_set(struct e1000_hw *hw, u8 *h, u32 a);

usr/src/uts/common/io/e1000api/e1000_mac.h

47

s32 e1000_null_set_obff_timer(struct e1000_hw *hw, u32 a);

usr/src/uts/common/io/e1000api/e1000_mac.h

72

u8 *mc_addr_list, u32 mc_addr_count);

usr/src/uts/common/io/e1000api/e1000_mac.h

79

s32 e1000_write_8bit_ctrl_reg_generic(struct e1000_hw *hw, u32 reg,

usr/src/uts/common/io/e1000api/e1000_mac.h

80

u32 offset, u8 data);

usr/src/uts/common/io/e1000api/e1000_mac.h

82

u32 e1000_hash_mc_addr_generic(struct e1000_hw *hw, u8 *mc_addr);

usr/src/uts/common/io/e1000api/e1000_mac.h

91

void e1000_set_pcie_no_snoop_generic(struct e1000_hw *hw, u32 no_snoop);

usr/src/uts/common/io/e1000api/e1000_mac.h

93

void e1000_write_vfta_generic(struct e1000_hw *hw, u32 offset, u32 value);

usr/src/uts/common/io/e1000api/e1000_manage.c

113

u32 fwsm = E1000_READ_REG(hw, E1000_FWSM);

usr/src/uts/common/io/e1000api/e1000_manage.c

132

u32 *buffer = (u32 *)&hw->mng_cookie;

usr/src/uts/common/io/e1000api/e1000_manage.c

133

u32 offset;

usr/src/uts/common/io/e1000api/e1000_manage.c

204

*((u32 *) hdr + i));

usr/src/uts/common/io/e1000api/e1000_manage.c

228

u32 data = 0;

usr/src/uts/common/io/e1000api/e1000_manage.c

244

for (j = prev_bytes; j < sizeof(u32); j++) {

usr/src/uts/common/io/e1000api/e1000_manage.c

263

for (j = 0; j < sizeof(u32); j++) {

usr/src/uts/common/io/e1000api/e1000_manage.c

272

for (j = 0; j < sizeof(u32); j++) {

usr/src/uts/common/io/e1000api/e1000_manage.c

300

u32 hicr;

usr/src/uts/common/io/e1000api/e1000_manage.c

342

u32 manc;

usr/src/uts/common/io/e1000api/e1000_manage.c

343

u32 fwsm, factps;

usr/src/uts/common/io/e1000api/e1000_manage.c

394

s32 e1000_host_interface_command(struct e1000_hw *hw, u8 *buffer, u32 length)

usr/src/uts/common/io/e1000api/e1000_manage.c

396

u32 hicr, i;

usr/src/uts/common/io/e1000api/e1000_manage.c

431

*((u32 *)buffer + i));

usr/src/uts/common/io/e1000api/e1000_manage.c

44

u8 e1000_calculate_checksum(u8 *buffer, u32 length)

usr/src/uts/common/io/e1000api/e1000_manage.c

451

*((u32 *)buffer + i) = E1000_READ_REG_ARRAY_DWORD(hw,

usr/src/uts/common/io/e1000api/e1000_manage.c

46

u32 i;

usr/src/uts/common/io/e1000api/e1000_manage.c

467

s32 e1000_load_firmware(struct e1000_hw *hw, u8 *buffer, u32 length)

usr/src/uts/common/io/e1000api/e1000_manage.c

469

u32 hicr, hibba, fwsm, icr, i;

usr/src/uts/common/io/e1000api/e1000_manage.c

553

*((u32 *)buffer + i));

usr/src/uts/common/io/e1000api/e1000_manage.c

72

u32 hicr;

usr/src/uts/common/io/e1000api/e1000_manage.h

48

u8 e1000_calculate_checksum(u8 *buffer, u32 length);

usr/src/uts/common/io/e1000api/e1000_manage.h

49

s32 e1000_host_interface_command(struct e1000_hw *hw, u8 *buffer, u32 length);

usr/src/uts/common/io/e1000api/e1000_manage.h

50

s32 e1000_load_firmware(struct e1000_hw *hw, u8 *buffer, u32 length);

usr/src/uts/common/io/e1000api/e1000_mbx.c

246

s32 e1000_read_posted_mbx(struct e1000_hw *hw, u32 *msg, u16 size, u16 mbx_id)

usr/src/uts/common/io/e1000api/e1000_mbx.c

275

s32 e1000_write_posted_mbx(struct e1000_hw *hw, u32 *msg, u16 size, u16 mbx_id)

usr/src/uts/common/io/e1000api/e1000_mbx.c

322

static u32 e1000_read_v2p_mailbox(struct e1000_hw *hw)

usr/src/uts/common/io/e1000api/e1000_mbx.c

324

u32 v2p_mailbox = E1000_READ_REG(hw, E1000_V2PMAILBOX(0));

usr/src/uts/common/io/e1000api/e1000_mbx.c

340

static s32 e1000_check_for_bit_vf(struct e1000_hw *hw, u32 mask)

usr/src/uts/common/io/e1000api/e1000_mbx.c

342

u32 v2p_mailbox = e1000_read_v2p_mailbox(hw);

usr/src/uts/common/io/e1000api/e1000_mbx.c

457

static s32 e1000_write_mbx_vf(struct e1000_hw *hw, u32 *msg, u16 size,

usr/src/uts/common/io/e1000api/e1000_mbx.c

498

static s32 e1000_read_mbx_vf(struct e1000_hw *hw, u32 *msg, u16 size,

usr/src/uts/common/io/e1000api/e1000_mbx.c

54

u32 E1000_UNUSEDARG *msg,

usr/src/uts/common/io/e1000api/e1000_mbx.c

559

static s32 e1000_check_for_bit_pf(struct e1000_hw *hw, u32 mask)

usr/src/uts/common/io/e1000api/e1000_mbx.c

561

u32 mbvficr = E1000_READ_REG(hw, E1000_MBVFICR);

usr/src/uts/common/io/e1000api/e1000_mbx.c

623

u32 vflre = E1000_READ_REG(hw, E1000_VFLRE);

usr/src/uts/common/io/e1000api/e1000_mbx.c

647

u32 p2v_mailbox;

usr/src/uts/common/io/e1000api/e1000_mbx.c

679

static s32 e1000_write_mbx_pf(struct e1000_hw *hw, u32 *msg, u16 size,

usr/src/uts/common/io/e1000api/e1000_mbx.c

72

s32 e1000_read_mbx(struct e1000_hw *hw, u32 *msg, u16 size, u16 mbx_id)

usr/src/uts/common/io/e1000api/e1000_mbx.c

722

static s32 e1000_read_mbx_pf(struct e1000_hw *hw, u32 *msg, u16 size,

usr/src/uts/common/io/e1000api/e1000_mbx.c

98

s32 e1000_write_mbx(struct e1000_hw *hw, u32 *msg, u16 size, u16 mbx_id)

usr/src/uts/common/io/e1000api/e1000_mbx.h

95

s32 e1000_read_mbx(struct e1000_hw *, u32 *, u16, u16);

usr/src/uts/common/io/e1000api/e1000_mbx.h

96

s32 e1000_write_mbx(struct e1000_hw *, u32 *, u16, u16);

usr/src/uts/common/io/e1000api/e1000_mbx.h

97

s32 e1000_read_posted_mbx(struct e1000_hw *, u32 *, u16, u16);

usr/src/uts/common/io/e1000api/e1000_mbx.h

98

s32 e1000_write_posted_mbx(struct e1000_hw *, u32 *, u16, u16);

usr/src/uts/common/io/e1000api/e1000_nvm.c

1016

u32 eeprom_buf_size, struct e1000_pba *pba)

usr/src/uts/common/io/e1000api/e1000_nvm.c

1048

if (eeprom_buf_size > (u32)(pba->word[1] +

usr/src/uts/common/io/e1000api/e1000_nvm.c

1075

u32 eeprom_buf_size, u16 *pba_block_size)

usr/src/uts/common/io/e1000api/e1000_nvm.c

1132

u32 rar_high;

usr/src/uts/common/io/e1000api/e1000_nvm.c

1133

u32 rar_low;

usr/src/uts/common/io/e1000api/e1000_nvm.c

114

static void e1000_raise_eec_clk(struct e1000_hw *hw, u32 *eecd)

usr/src/uts/common/io/e1000api/e1000_nvm.c

1224

u32 ctrl_ext;

usr/src/uts/common/io/e1000api/e1000_nvm.c

129

static void e1000_lower_eec_clk(struct e1000_hw *hw, u32 *eecd)

usr/src/uts/common/io/e1000api/e1000_nvm.c

150

u32 eecd = E1000_READ_REG(hw, E1000_EECD);

usr/src/uts/common/io/e1000api/e1000_nvm.c

151

u32 mask;

usr/src/uts/common/io/e1000api/e1000_nvm.c

196

u32 eecd;

usr/src/uts/common/io/e1000api/e1000_nvm.c

197

u32 i;

usr/src/uts/common/io/e1000api/e1000_nvm.c

233

u32 attempts = 100000;

usr/src/uts/common/io/e1000api/e1000_nvm.c

234

u32 i, reg = 0;

usr/src/uts/common/io/e1000api/e1000_nvm.c

263

u32 eecd = E1000_READ_REG(hw, E1000_EECD);

usr/src/uts/common/io/e1000api/e1000_nvm.c

298

u32 eecd = E1000_READ_REG(hw, E1000_EECD);

usr/src/uts/common/io/e1000api/e1000_nvm.c

338

u32 eecd;

usr/src/uts/common/io/e1000api/e1000_nvm.c

364

u32 eecd;

usr/src/uts/common/io/e1000api/e1000_nvm.c

384

u32 eecd = E1000_READ_REG(hw, E1000_EECD);

usr/src/uts/common/io/e1000api/e1000_nvm.c

443

u32 i = 0;

usr/src/uts/common/io/e1000api/e1000_nvm.c

504

u32 i = 0;

usr/src/uts/common/io/e1000api/e1000_nvm.c

558

u32 i, eerd = 0;

usr/src/uts/common/io/e1000api/e1000_nvm.c

688

u32 eecd;

usr/src/uts/common/io/e1000api/e1000_nvm.c

768

u32 pba_num_size)

usr/src/uts/common/io/e1000api/e1000_nvm.c

851

if (pba_num_size < (((u32)length * 2) - 1)) {

usr/src/uts/common/io/e1000api/e1000_nvm.c

882

s32 e1000_read_pba_length_generic(struct e1000_hw *hw, u32 *pba_num_size)

usr/src/uts/common/io/e1000api/e1000_nvm.c

928

*pba_num_size = ((u32)length * 2) - 1;

usr/src/uts/common/io/e1000api/e1000_nvm.c

947

u32 eeprom_buf_size, u16 max_pba_block_size,

usr/src/uts/common/io/e1000api/e1000_nvm.c

990

if (eeprom_buf_size > (u32)(pba->word[1] +

usr/src/uts/common/io/e1000api/e1000_nvm.h

54

u32 pba_num_size);

usr/src/uts/common/io/e1000api/e1000_nvm.h

55

s32 e1000_read_pba_length_generic(struct e1000_hw *hw, u32 *pba_num_size);

usr/src/uts/common/io/e1000api/e1000_nvm.h

57

u32 eeprom_buf_size, u16 max_pba_block_size,

usr/src/uts/common/io/e1000api/e1000_nvm.h

60

u32 eeprom_buf_size, struct e1000_pba *pba);

usr/src/uts/common/io/e1000api/e1000_nvm.h

62

u32 eeprom_buf_size, u16 *pba_block_size);

usr/src/uts/common/io/e1000api/e1000_phy.c

119

u32 E1000_UNUSEDARG offset, u16 E1000_UNUSEDARG *data)

usr/src/uts/common/io/e1000api/e1000_phy.c

151

u32 E1000_UNUSEDARG offset, u16 E1000_UNUSEDARG data)

usr/src/uts/common/io/e1000api/e1000_phy.c

201

u32 manc;

usr/src/uts/common/io/e1000api/e1000_phy.c

2017

u32 ctrl;

usr/src/uts/common/io/e1000api/e1000_phy.c

2349

s32 e1000_phy_has_link_generic(struct e1000_hw *hw, u32 iterations,

usr/src/uts/common/io/e1000api/e1000_phy.c

235

phy->id = (u32)(phy_id << 16);

usr/src/uts/common/io/e1000api/e1000_phy.c

2350

u32 usec_interval, bool *success)

usr/src/uts/common/io/e1000api/e1000_phy.c

241

phy->id |= (u32)(phy_id & PHY_REVISION_MASK);

usr/src/uts/common/io/e1000api/e1000_phy.c

242

phy->revision = (u32)(phy_id & ~PHY_REVISION_MASK);

usr/src/uts/common/io/e1000api/e1000_phy.c

284

s32 e1000_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data)

usr/src/uts/common/io/e1000api/e1000_phy.c

2855

u32 ctrl;

usr/src/uts/common/io/e1000api/e1000_phy.c

287

u32 i, mdic = 0;

usr/src/uts/common/io/e1000api/e1000_phy.c

2990

enum e1000_phy_type e1000_get_phy_type_from_id(u32 phy_id)

usr/src/uts/common/io/e1000api/e1000_phy.c

3059

u32 phy_addr = 0;

usr/src/uts/common/io/e1000api/e1000_phy.c

3060

u32 i;

usr/src/uts/common/io/e1000api/e1000_phy.c

3093

static u32 e1000_get_phy_addr_for_bm_page(u32 page, u32 reg)

usr/src/uts/common/io/e1000api/e1000_phy.c

3095

u32 phy_addr = 2;

usr/src/uts/common/io/e1000api/e1000_phy.c

3112

s32 e1000_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data)

usr/src/uts/common/io/e1000api/e1000_phy.c

3115

u32 page = offset >> IGP_PAGE_SHIFT;

usr/src/uts/common/io/e1000api/e1000_phy.c

3133

u32 page_shift, page_select;

usr/src/uts/common/io/e1000api/e1000_phy.c

3172

s32 e1000_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data)

usr/src/uts/common/io/e1000api/e1000_phy.c

3175

u32 page = offset >> IGP_PAGE_SHIFT;

usr/src/uts/common/io/e1000api/e1000_phy.c

3193

u32 page_shift, page_select;

usr/src/uts/common/io/e1000api/e1000_phy.c

3231

s32 e1000_read_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 *data)

usr/src/uts/common/io/e1000api/e1000_phy.c

3276

s32 e1000_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data)

usr/src/uts/common/io/e1000api/e1000_phy.c

3429

static s32 e1000_access_phy_wakeup_reg_bm(struct e1000_hw *hw, u32 offset,

usr/src/uts/common/io/e1000api/e1000_phy.c

349

s32 e1000_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data)

usr/src/uts/common/io/e1000api/e1000_phy.c

352

u32 i, mdic = 0;

usr/src/uts/common/io/e1000api/e1000_phy.c

3532

static s32 __e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data,

usr/src/uts/common/io/e1000api/e1000_phy.c

3538

u32 phy_addr = hw->phy.addr = e1000_get_phy_addr_for_hv_page(page);

usr/src/uts/common/io/e1000api/e1000_phy.c

3598

s32 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data)

usr/src/uts/common/io/e1000api/e1000_phy.c

3612

s32 e1000_read_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, u16 *data)

usr/src/uts/common/io/e1000api/e1000_phy.c

3626

s32 e1000_read_phy_reg_page_hv(struct e1000_hw *hw, u32 offset, u16 *data)

usr/src/uts/common/io/e1000api/e1000_phy.c

3641

static s32 __e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data,

usr/src/uts/common/io/e1000api/e1000_phy.c

3647

u32 phy_addr = hw->phy.addr = e1000_get_phy_addr_for_hv_page(page);

usr/src/uts/common/io/e1000api/e1000_phy.c

365

mdic = (((u32)data) |

usr/src/uts/common/io/e1000api/e1000_phy.c

3723

s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data)

usr/src/uts/common/io/e1000api/e1000_phy.c

3737

s32 e1000_write_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, u16 data)

usr/src/uts/common/io/e1000api/e1000_phy.c

3751

s32 e1000_write_phy_reg_page_hv(struct e1000_hw *hw, u32 offset, u16 data)

usr/src/uts/common/io/e1000api/e1000_phy.c

3760

static u32 e1000_get_phy_addr_for_hv_page(u32 page)

usr/src/uts/common/io/e1000api/e1000_phy.c

3762

u32 phy_addr = 2;

usr/src/uts/common/io/e1000api/e1000_phy.c

3782

static s32 e1000_access_phy_debug_regs_hv(struct e1000_hw *hw, u32 offset,

usr/src/uts/common/io/e1000api/e1000_phy.c

3786

u32 addr_reg;

usr/src/uts/common/io/e1000api/e1000_phy.c

3787

u32 data_reg;

usr/src/uts/common/io/e1000api/e1000_phy.c

38

static s32 e1000_access_phy_wakeup_reg_bm(struct e1000_hw *hw, u32 offset,

usr/src/uts/common/io/e1000api/e1000_phy.c

40

static u32 e1000_get_phy_addr_for_hv_page(u32 page);

usr/src/uts/common/io/e1000api/e1000_phy.c

4045

s32 e1000_write_phy_reg_gs40g(struct e1000_hw *hw, u32 offset, u16 data)

usr/src/uts/common/io/e1000api/e1000_phy.c

4077

s32 e1000_read_phy_reg_gs40g(struct e1000_hw *hw, u32 offset, u16 *data)

usr/src/uts/common/io/e1000api/e1000_phy.c

41

static s32 e1000_access_phy_debug_regs_hv(struct e1000_hw *hw, u32 offset,

usr/src/uts/common/io/e1000api/e1000_phy.c

4108

s32 e1000_read_phy_reg_mphy(struct e1000_hw *hw, u32 address, u32 *data)

usr/src/uts/common/io/e1000api/e1000_phy.c

4110

u32 mphy_ctrl = 0;

usr/src/uts/common/io/e1000api/e1000_phy.c

415

s32 e1000_read_phy_reg_i2c(struct e1000_hw *hw, u32 offset, u16 *data)

usr/src/uts/common/io/e1000api/e1000_phy.c

4169

s32 e1000_write_phy_reg_mphy(struct e1000_hw *hw, u32 address, u32 data,

usr/src/uts/common/io/e1000api/e1000_phy.c

4172

u32 mphy_ctrl = 0;

usr/src/uts/common/io/e1000api/e1000_phy.c

418

u32 i, i2ccmd = 0;

usr/src/uts/common/io/e1000api/e1000_phy.c

4234

u32 mphy_ctrl = 0;

usr/src/uts/common/io/e1000api/e1000_phy.c

462

s32 e1000_write_phy_reg_i2c(struct e1000_hw *hw, u32 offset, u16 data)

usr/src/uts/common/io/e1000api/e1000_phy.c

465

u32 i, i2ccmd = 0;

usr/src/uts/common/io/e1000api/e1000_phy.c

525

u32 i = 0;

usr/src/uts/common/io/e1000api/e1000_phy.c

526

u32 i2ccmd = 0;

usr/src/uts/common/io/e1000api/e1000_phy.c

527

u32 data_local = 0;

usr/src/uts/common/io/e1000api/e1000_phy.c

580

u32 i = 0;

usr/src/uts/common/io/e1000api/e1000_phy.c

581

u32 i2ccmd = 0;

usr/src/uts/common/io/e1000api/e1000_phy.c

582

u32 data_local = 0;

usr/src/uts/common/io/e1000api/e1000_phy.c

648

s32 e1000_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data)

usr/src/uts/common/io/e1000api/e1000_phy.c

678

s32 e1000_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data)

usr/src/uts/common/io/e1000api/e1000_phy.c

730

static s32 __e1000_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data,

usr/src/uts/common/io/e1000api/e1000_phy.c

770

s32 e1000_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data)

usr/src/uts/common/io/e1000api/e1000_phy.c

784

s32 e1000_read_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 *data)

usr/src/uts/common/io/e1000api/e1000_phy.c

799

static s32 __e1000_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data,

usr/src/uts/common/io/e1000api/e1000_phy.c

838

s32 e1000_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data)

usr/src/uts/common/io/e1000api/e1000_phy.c

852

s32 e1000_write_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 data)

usr/src/uts/common/io/e1000api/e1000_phy.c

868

static s32 __e1000_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data,

usr/src/uts/common/io/e1000api/e1000_phy.c

871

u32 kmrnctrlsta;

usr/src/uts/common/io/e1000api/e1000_phy.c

912

s32 e1000_read_kmrn_reg_generic(struct e1000_hw *hw, u32 offset, u16 *data)

usr/src/uts/common/io/e1000api/e1000_phy.c

927

s32 e1000_read_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 *data)

usr/src/uts/common/io/e1000api/e1000_phy.c

943

static s32 __e1000_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data,

usr/src/uts/common/io/e1000api/e1000_phy.c

946

u32 kmrnctrlsta;

usr/src/uts/common/io/e1000api/e1000_phy.c

983

s32 e1000_write_kmrn_reg_generic(struct e1000_hw *hw, u32 offset, u16 data)

usr/src/uts/common/io/e1000api/e1000_phy.c

997

s32 e1000_write_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 data)

usr/src/uts/common/io/e1000api/e1000_phy.h

100

s32 e1000_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data);

usr/src/uts/common/io/e1000api/e1000_phy.h

101

s32 e1000_read_phy_reg_i2c(struct e1000_hw *hw, u32 offset, u16 *data);

usr/src/uts/common/io/e1000api/e1000_phy.h

102

s32 e1000_write_phy_reg_i2c(struct e1000_hw *hw, u32 offset, u16 data);

usr/src/uts/common/io/e1000api/e1000_phy.h

105

s32 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data);

usr/src/uts/common/io/e1000api/e1000_phy.h

106

s32 e1000_read_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, u16 *data);

usr/src/uts/common/io/e1000api/e1000_phy.h

107

s32 e1000_read_phy_reg_page_hv(struct e1000_hw *hw, u32 offset, u16 *data);

usr/src/uts/common/io/e1000api/e1000_phy.h

108

s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data);

usr/src/uts/common/io/e1000api/e1000_phy.h

109

s32 e1000_write_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, u16 data);

usr/src/uts/common/io/e1000api/e1000_phy.h

110

s32 e1000_write_phy_reg_page_hv(struct e1000_hw *hw, u32 offset, u16 data);

usr/src/uts/common/io/e1000api/e1000_phy.h

117

s32 e1000_write_phy_reg_gs40g(struct e1000_hw *hw, u32 offset, u16 data);

usr/src/uts/common/io/e1000api/e1000_phy.h

118

s32 e1000_read_phy_reg_gs40g(struct e1000_hw *hw, u32 offset, u16 *data);

usr/src/uts/common/io/e1000api/e1000_phy.h

119

s32 e1000_read_phy_reg_mphy(struct e1000_hw *hw, u32 address, u32 *data);

usr/src/uts/common/io/e1000api/e1000_phy.h

120

s32 e1000_write_phy_reg_mphy(struct e1000_hw *hw, u32 address, u32 data,

usr/src/uts/common/io/e1000api/e1000_phy.h

39

s32 e1000_null_read_reg(struct e1000_hw *hw, u32 offset, u16 *data);

usr/src/uts/common/io/e1000api/e1000_phy.h

42

s32 e1000_null_write_reg(struct e1000_hw *hw, u32 offset, u16 data);

usr/src/uts/common/io/e1000api/e1000_phy.h

73

s32 e1000_read_kmrn_reg_generic(struct e1000_hw *hw, u32 offset, u16 *data);

usr/src/uts/common/io/e1000api/e1000_phy.h

74

s32 e1000_read_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 *data);

usr/src/uts/common/io/e1000api/e1000_phy.h

76

s32 e1000_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data);

usr/src/uts/common/io/e1000api/e1000_phy.h

77

s32 e1000_read_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 *data);

usr/src/uts/common/io/e1000api/e1000_phy.h

78

s32 e1000_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data);

usr/src/uts/common/io/e1000api/e1000_phy.h

81

s32 e1000_write_kmrn_reg_generic(struct e1000_hw *hw, u32 offset, u16 data);

usr/src/uts/common/io/e1000api/e1000_phy.h

82

s32 e1000_write_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 data);

usr/src/uts/common/io/e1000api/e1000_phy.h

83

s32 e1000_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data);

usr/src/uts/common/io/e1000api/e1000_phy.h

84

s32 e1000_write_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 data);

usr/src/uts/common/io/e1000api/e1000_phy.h

85

s32 e1000_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data);

usr/src/uts/common/io/e1000api/e1000_phy.h

86

s32 e1000_phy_has_link_generic(struct e1000_hw *hw, u32 iterations,

usr/src/uts/common/io/e1000api/e1000_phy.h

87

u32 usec_interval, bool *success);

usr/src/uts/common/io/e1000api/e1000_phy.h

89

enum e1000_phy_type e1000_get_phy_type_from_id(u32 phy_id);

usr/src/uts/common/io/e1000api/e1000_phy.h

91

s32 e1000_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data);

usr/src/uts/common/io/e1000api/e1000_phy.h

92

s32 e1000_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data);

usr/src/uts/common/io/e1000api/e1000_phy.h

95

s32 e1000_read_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 *data);

usr/src/uts/common/io/e1000api/e1000_phy.h

96

s32 e1000_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data);

usr/src/uts/common/io/e1000api/e1000_phy.h

99

s32 e1000_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data);

usr/src/uts/common/io/e1000api/e1000_vf.c

261

u32 timeout = E1000_VF_INIT_TIMEOUT;

usr/src/uts/common/io/e1000api/e1000_vf.c

263

u32 ctrl, msgbuf[3];

usr/src/uts/common/io/e1000api/e1000_vf.c

324

u32 E1000_UNUSEDARG index)

usr/src/uts/common/io/e1000api/e1000_vf.c

327

u32 msgbuf[3];

usr/src/uts/common/io/e1000api/e1000_vf.c

357

static u32 e1000_hash_mc_addr_vf(struct e1000_hw *hw, u8 *mc_addr)

usr/src/uts/common/io/e1000api/e1000_vf.c

359

u32 hash_value, hash_mask;

usr/src/uts/common/io/e1000api/e1000_vf.c

381

u32 *msg, u16 size)

usr/src/uts/common/io/e1000api/e1000_vf.c

384

u32 retmsg[E1000_VFMAILBOX_SIZE];

usr/src/uts/common/io/e1000api/e1000_vf.c

401

u8 *mc_addr_list, u32 mc_addr_count)

usr/src/uts/common/io/e1000api/e1000_vf.c

403

u32 msgbuf[E1000_VFMAILBOX_SIZE];

usr/src/uts/common/io/e1000api/e1000_vf.c

405

u32 hash_value;

usr/src/uts/common/io/e1000api/e1000_vf.c

406

u32 i;

usr/src/uts/common/io/e1000api/e1000_vf.c

447

u32 msgbuf[2];

usr/src/uts/common/io/e1000api/e1000_vf.c

464

u32 msgbuf[2];

usr/src/uts/common/io/e1000api/e1000_vf.c

481

u32 msgbuf = E1000_VF_SET_PROMISC;

usr/src/uts/common/io/e1000api/e1000_vf.c

51

static void e1000_update_mc_addr_list_vf(struct e1000_hw *hw, u8 *, u32);

usr/src/uts/common/io/e1000api/e1000_vf.c

52

static int e1000_rar_set_vf(struct e1000_hw *, u8 *, u32);

usr/src/uts/common/io/e1000api/e1000_vf.c

538

u32 in_msg = 0;

usr/src/uts/common/io/e1000api/e1000_vf.h

101

u32 rss; /* RSS Hash */

usr/src/uts/common/io/e1000api/e1000_vf.h

109

u32 status_error; /* ext status/error */

usr/src/uts/common/io/e1000api/e1000_vf.h

123

u32 cmd_type_len;

usr/src/uts/common/io/e1000api/e1000_vf.h

124

u32 olinfo_status;

usr/src/uts/common/io/e1000api/e1000_vf.h

128

u32 nxtseq_seed;

usr/src/uts/common/io/e1000api/e1000_vf.h

129

u32 status;

usr/src/uts/common/io/e1000api/e1000_vf.h

146

u32 vlan_macip_lens;

usr/src/uts/common/io/e1000api/e1000_vf.h

147

u32 seqnum_seed;

usr/src/uts/common/io/e1000api/e1000_vf.h

148

u32 type_tucmd_mlhl;

usr/src/uts/common/io/e1000api/e1000_vf.h

149

u32 mss_l4len_idx;

usr/src/uts/common/io/e1000api/e1000_vf.h

176

u32 last_gprc;

usr/src/uts/common/io/e1000api/e1000_vf.h

177

u32 last_gptc;

usr/src/uts/common/io/e1000api/e1000_vf.h

178

u32 last_gorc;

usr/src/uts/common/io/e1000api/e1000_vf.h

179

u32 last_gotc;

usr/src/uts/common/io/e1000api/e1000_vf.h

180

u32 last_mprc;

usr/src/uts/common/io/e1000api/e1000_vf.h

181

u32 last_gotlbc;

usr/src/uts/common/io/e1000api/e1000_vf.h

182

u32 last_gptlbc;

usr/src/uts/common/io/e1000api/e1000_vf.h

183

u32 last_gorlbc;

usr/src/uts/common/io/e1000api/e1000_vf.h

184

u32 last_gprlbc;

usr/src/uts/common/io/e1000api/e1000_vf.h

206

void (*update_mc_addr_list)(struct e1000_hw *, u8 *, u32);

usr/src/uts/common/io/e1000api/e1000_vf.h

210

void (*write_vfta)(struct e1000_hw *, u32, u32);

usr/src/uts/common/io/e1000api/e1000_vf.h

211

int (*rar_set)(struct e1000_hw *, u8*, u32);

usr/src/uts/common/io/e1000api/e1000_vf.h

230

s32 (*read)(struct e1000_hw *, u32 *, u16, u16);

usr/src/uts/common/io/e1000api/e1000_vf.h

231

s32 (*write)(struct e1000_hw *, u32 *, u16, u16);

usr/src/uts/common/io/e1000api/e1000_vf.h

232

s32 (*read_posted)(struct e1000_hw *, u32 *, u16, u16);

usr/src/uts/common/io/e1000api/e1000_vf.h

233

s32 (*write_posted)(struct e1000_hw *, u32 *, u16, u16);

usr/src/uts/common/io/e1000api/e1000_vf.h

240

u32 msgs_tx;

usr/src/uts/common/io/e1000api/e1000_vf.h

241

u32 msgs_rx;

usr/src/uts/common/io/e1000api/e1000_vf.h

243

u32 acks;

usr/src/uts/common/io/e1000api/e1000_vf.h

244

u32 reqs;

usr/src/uts/common/io/e1000api/e1000_vf.h

245

u32 rsts;

usr/src/uts/common/io/e1000api/e1000_vf.h

251

u32 timeout;

usr/src/uts/common/io/e1000api/e1000_vf.h

252

u32 usec_delay;

usr/src/uts/common/io/e1000api/e1000_vf.h

257

u32 vf_number;

usr/src/uts/common/io/e1000api/e1000_vf.h

258

u32 v2p_mailbox;

usr/src/uts/common/io/e1000api/e1000_vf.h

292

s32 e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value);

usr/src/uts/common/io/e1000api/e1000_vf.h

92

u32 data;

usr/src/uts/common/io/e1000g/e1000_osdep.h

207

#define __le32 u32

usr/src/uts/common/io/e1000g/e1000g_main.c

2024

u32 fext_nvm11, tdlen;

usr/src/uts/common/io/e1000g/e1000g_sw.h

1090

void e1000_update_tx_fifo_head_82547(struct e1000_hw *hw, u32 length);

usr/src/uts/common/io/e1000g/e1000g_workarounds.c

146

e1000_update_tx_fifo_head_82547(struct e1000_hw *hw, u32 length)

usr/src/uts/common/io/e1000g/e1000g_workarounds.c

78

u32 tctl;

usr/src/uts/common/io/i40e/core/i40e_adminq.c

302

u32 reg = 0;

usr/src/uts/common/io/i40e/core/i40e_adminq.c

335

u32 reg = 0;

usr/src/uts/common/io/i40e/core/i40e_adminq.c

721

hw->nvm.oem_ver = ((u32)oem_hi << 16) | oem_lo;

usr/src/uts/common/io/i40e/core/i40e_adminq.c

852

u32 val = 0;

usr/src/uts/common/io/i40e/core/i40e_adminq.c

970

u32 total_delay = 0;

usr/src/uts/common/io/i40e/core/i40e_adminq.h

105

u32 fw_build; /* firmware build number */

usr/src/uts/common/io/i40e/core/i40e_adminq.h

154

if (!((u32)aq_rc < (sizeof(aq_to_posix) / sizeof((aq_to_posix)[0]))))

usr/src/uts/common/io/i40e/core/i40e_adminq.h

65

u32 head;

usr/src/uts/common/io/i40e/core/i40e_adminq.h

66

u32 tail;

usr/src/uts/common/io/i40e/core/i40e_adminq.h

67

u32 len;

usr/src/uts/common/io/i40e/core/i40e_adminq.h

68

u32 bah;

usr/src/uts/common/io/i40e/core/i40e_adminq.h

69

u32 bal;

usr/src/uts/common/io/i40e/core/i40e_adminq.h

98

u32 asq_cmd_timeout; /* send queue cmd write back timeout*/

usr/src/uts/common/io/i40e/core/i40e_alloc.h

57

u64 size, u32 alignment);

usr/src/uts/common/io/i40e/core/i40e_alloc.h

62

u32 size);

usr/src/uts/common/io/i40e/core/i40e_common.c

1088

cmd_data->mac_sal = CPU_TO_LE32(((u32)mac_addr[2] << 24) |

usr/src/uts/common/io/i40e/core/i40e_common.c

1089

((u32)mac_addr[3] << 16) |

usr/src/uts/common/io/i40e/core/i40e_common.c

1090

((u32)mac_addr[4] << 8) |

usr/src/uts/common/io/i40e/core/i40e_common.c

1155

void i40e_pre_tx_queue_cfg(struct i40e_hw *hw, u32 queue, bool enable)

usr/src/uts/common/io/i40e/core/i40e_common.c

1157

u32 abs_queue_idx = hw->func_caps.base_queue + queue;

usr/src/uts/common/io/i40e/core/i40e_common.c

1158

u32 reg_block = 0;

usr/src/uts/common/io/i40e/core/i40e_common.c

1159

u32 reg_val;

usr/src/uts/common/io/i40e/core/i40e_common.c

1187

u32 pba_num_size)

usr/src/uts/common/io/i40e/core/i40e_common.c

1217

if (pba_num_size < (((u32)pba_size * 2) + 1)) {

usr/src/uts/common/io/i40e/core/i40e_common.c

1302

u32 retry_limit)

usr/src/uts/common/io/i40e/core/i40e_common.c

1304

u32 cnt, reg = 0;

usr/src/uts/common/io/i40e/core/i40e_common.c

1329

u32 cnt = 0;

usr/src/uts/common/io/i40e/core/i40e_common.c

1330

u32 cnt1 = 0;

usr/src/uts/common/io/i40e/core/i40e_common.c

1331

u32 reg = 0;

usr/src/uts/common/io/i40e/core/i40e_common.c

1332

u32 grst_del;

usr/src/uts/common/io/i40e/core/i40e_common.c

1378

u32 reg2 = 0;

usr/src/uts/common/io/i40e/core/i40e_common.c

1417

u32 num_queues, base_queue;

usr/src/uts/common/io/i40e/core/i40e_common.c

1418

u32 num_pf_int;

usr/src/uts/common/io/i40e/core/i40e_common.c

1419

u32 num_vf_int;

usr/src/uts/common/io/i40e/core/i40e_common.c

1420

u32 num_vfs;

usr/src/uts/common/io/i40e/core/i40e_common.c

1421

u32 i, j;

usr/src/uts/common/io/i40e/core/i40e_common.c

1422

u32 val;

usr/src/uts/common/io/i40e/core/i40e_common.c

1423

u32 eol = 0x7ff;

usr/src/uts/common/io/i40e/core/i40e_common.c

1471

u32 abs_queue_idx = base_queue + i;

usr/src/uts/common/io/i40e/core/i40e_common.c

1472

u32 reg_block = 0;

usr/src/uts/common/io/i40e/core/i40e_common.c

1520

static u32 i40e_led_is_mine(struct i40e_hw *hw, int idx)

usr/src/uts/common/io/i40e/core/i40e_common.c

1522

u32 gpio_val = 0;

usr/src/uts/common/io/i40e/core/i40e_common.c

1523

u32 port;

usr/src/uts/common/io/i40e/core/i40e_common.c

1564

u32 i40e_led_get(struct i40e_hw *hw)

usr/src/uts/common/io/i40e/core/i40e_common.c

1566

u32 current_mode = 0;

usr/src/uts/common/io/i40e/core/i40e_common.c

1567

u32 mode = 0;

usr/src/uts/common/io/i40e/core/i40e_common.c

1574

u32 gpio_val = i40e_led_is_mine(hw, i);

usr/src/uts/common/io/i40e/core/i40e_common.c

1611

void i40e_led_set(struct i40e_hw *hw, u32 mode, bool blink)

usr/src/uts/common/io/i40e/core/i40e_common.c

1613

u32 current_mode = 0;

usr/src/uts/common/io/i40e/core/i40e_common.c

1625

u32 gpio_val = i40e_led_is_mine(hw, i);

usr/src/uts/common/io/i40e/core/i40e_common.c

1646

u32 pin_func = 0;

usr/src/uts/common/io/i40e/core/i40e_common.c

2791

u32 *fw_build,

usr/src/uts/common/io/i40e/core/i40e_common.c

328

u32 effective_mask = hw->debug_mask & mask;

usr/src/uts/common/io/i40e/core/i40e_common.c

3386

u32 v_opcode, u32 v_retval, u8 *msg, u16 msglen,

usr/src/uts/common/io/i40e/core/i40e_common.c

3421

u32 reg_addr, u64 *reg_val,

usr/src/uts/common/io/i40e/core/i40e_common.c

3456

u32 reg_addr, u64 reg_val,

usr/src/uts/common/io/i40e/core/i40e_common.c

3467

cmd->value_high = CPU_TO_LE32((u32)(reg_val >> 32));

usr/src/uts/common/io/i40e/core/i40e_common.c

3468

cmd->value_low = CPU_TO_LE32((u32)(reg_val & 0xFFFFFFFF));

usr/src/uts/common/io/i40e/core/i40e_common.c

3562

u32 offset, u16 length, void *data,

usr/src/uts/common/io/i40e/core/i40e_common.c

3609

u8 cmd_flags, u32 field_id, void *data,

usr/src/uts/common/io/i40e/core/i40e_common.c

3704

u32 offset, u16 length, bool last_command,

usr/src/uts/common/io/i40e/core/i40e_common.c

3745

u32 cap_count,

usr/src/uts/common/io/i40e/core/i40e_common.c

3749

u32 valid_functions, num_functions;

usr/src/uts/common/io/i40e/core/i40e_common.c

3750

u32 number, logical_id, phys_id;

usr/src/uts/common/io/i40e/core/i40e_common.c

3755

u32 i = 0;

usr/src/uts/common/io/i40e/core/i40e_common.c

4044

u32 port_cfg_reg = I40E_PRTGEN_STATUS + (4 * i);

usr/src/uts/common/io/i40e/core/i40e_common.c

4175

u32 offset, u16 length, void *data,

usr/src/uts/common/io/i40e/core/i40e_common.c

5415

u32 fcoe_cntx_size, fcoe_filt_size;

usr/src/uts/common/io/i40e/core/i40e_common.c

5416

u32 pe_cntx_size, pe_filt_size;

usr/src/uts/common/io/i40e/core/i40e_common.c

5417

u32 fcoe_fmax;

usr/src/uts/common/io/i40e/core/i40e_common.c

5419

u32 val;

usr/src/uts/common/io/i40e/core/i40e_common.c

5430

fcoe_filt_size <<= (u32)settings->fcoe_filt_num;

usr/src/uts/common/io/i40e/core/i40e_common.c

5442

fcoe_cntx_size <<= (u32)settings->fcoe_cntx_num;

usr/src/uts/common/io/i40e/core/i40e_common.c

5462

pe_filt_size <<= (u32)settings->pe_filt_num;

usr/src/uts/common/io/i40e/core/i40e_common.c

5480

pe_cntx_size <<= (u32)settings->pe_cntx_num;

usr/src/uts/common/io/i40e/core/i40e_common.c

5509

u32 hash_lut_size = 0;

usr/src/uts/common/io/i40e/core/i40e_common.c

5510

u32 val;

usr/src/uts/common/io/i40e/core/i40e_common.c

5525

val |= ((u32)settings->pe_filt_num << I40E_PFQF_CTL_0_PEHSIZE_SHIFT) &

usr/src/uts/common/io/i40e/core/i40e_common.c

5529

val |= ((u32)settings->pe_cntx_num << I40E_PFQF_CTL_0_PEDSIZE_SHIFT) &

usr/src/uts/common/io/i40e/core/i40e_common.c

5534

val |= ((u32)settings->fcoe_filt_num <<

usr/src/uts/common/io/i40e/core/i40e_common.c

5539

val |= ((u32)settings->fcoe_cntx_num <<

usr/src/uts/common/io/i40e/core/i40e_common.c

5665

u32 ti;

usr/src/uts/common/io/i40e/core/i40e_common.c

5752

u32 ti;

usr/src/uts/common/io/i40e/core/i40e_common.c

5848

u32 ti;

usr/src/uts/common/io/i40e/core/i40e_common.c

5934

u32 reg_addr0, u32 reg_val0,

usr/src/uts/common/io/i40e/core/i40e_common.c

5935

u32 reg_addr1, u32 reg_val1)

usr/src/uts/common/io/i40e/core/i40e_common.c

5965

u32 addr, u32 dw_count, void *buffer)

usr/src/uts/common/io/i40e/core/i40e_common.c

6007

u32 reg_addr0, u32 *reg_val0,

usr/src/uts/common/io/i40e/core/i40e_common.c

6008

u32 reg_addr1, u32 *reg_val1)

usr/src/uts/common/io/i40e/core/i40e_common.c

6046

u32 addr, u32 dw_count, void *buffer)

usr/src/uts/common/io/i40e/core/i40e_common.c

6237

u8 table_id, u32 start_index, u16 buff_size,

usr/src/uts/common/io/i40e/core/i40e_common.c

6239

u8 *ret_next_table, u32 *ret_next_index,

usr/src/uts/common/io/i40e/core/i40e_common.c

6354

u32 *max_bw, u32 *min_bw,

usr/src/uts/common/io/i40e/core/i40e_common.c

6358

u32 max_bw_addr, min_bw_addr;

usr/src/uts/common/io/i40e/core/i40e_common.c

6429

u32 command = 0;

usr/src/uts/common/io/i40e/core/i40e_common.c

6474

u32 command = 0;

usr/src/uts/common/io/i40e/core/i40e_common.c

6514

u32 command = 0;

usr/src/uts/common/io/i40e/core/i40e_common.c

6588

u32 command = 0;

usr/src/uts/common/io/i40e/core/i40e_common.c

6727

u32 reg_val = rd32(hw, I40E_GLGEN_MDIO_I2C_SEL(port_num));

usr/src/uts/common/io/i40e/core/i40e_common.c

6741

u32 time, u32 interval)

usr/src/uts/common/io/i40e/core/i40e_common.c

6744

u32 i;

usr/src/uts/common/io/i40e/core/i40e_common.c

6813

u32 *reg_val)

usr/src/uts/common/io/i40e/core/i40e_common.c

6842

u32 reg_val)

usr/src/uts/common/io/i40e/core/i40e_common.c

6876

u32 reg_val_aq;

usr/src/uts/common/io/i40e/core/i40e_common.c

6921

u16 led_addr, u32 mode)

usr/src/uts/common/io/i40e/core/i40e_common.c

6924

u32 led_ctl = 0;

usr/src/uts/common/io/i40e/core/i40e_common.c

6925

u32 led_reg = 0;

usr/src/uts/common/io/i40e/core/i40e_common.c

6970

u32 val;

usr/src/uts/common/io/i40e/core/i40e_common.c

7015

u32 *tx_counter, u32 *rx_counter,

usr/src/uts/common/io/i40e/core/i40e_common.c

7025

u32 cmd_status;

usr/src/uts/common/io/i40e/core/i40e_common.c

7060

u32 tx_time_dur, rx_time_dur;

usr/src/uts/common/io/i40e/core/i40e_common.c

7062

u32 cmd_status;

usr/src/uts/common/io/i40e/core/i40e_common.c

7121

u32 tx_counter, rx_counter;

usr/src/uts/common/io/i40e/core/i40e_common.c

7138

(u32)(tx_counter - *tx_offset) :

usr/src/uts/common/io/i40e/core/i40e_common.c

7139

(u32)((tx_counter + BIT_ULL(32)) - *tx_offset);

usr/src/uts/common/io/i40e/core/i40e_common.c

7141

(u32)(rx_counter - *rx_offset) :

usr/src/uts/common/io/i40e/core/i40e_common.c

7142

(u32)((rx_counter + BIT_ULL(32)) - *rx_offset);

usr/src/uts/common/io/i40e/core/i40e_common.c

7159

u32 reg_addr, u32 *reg_val,

usr/src/uts/common/io/i40e/core/i40e_common.c

7187

u32 i40e_read_rx_ctl(struct i40e_hw *hw, u32 reg_addr)

usr/src/uts/common/io/i40e/core/i40e_common.c

7192

u32 val = 0;

usr/src/uts/common/io/i40e/core/i40e_common.c

7225

u32 reg_addr, u32 reg_val,

usr/src/uts/common/io/i40e/core/i40e_common.c

7249

void i40e_write_rx_ctl(struct i40e_hw *hw, u32 reg_addr, u32 reg_val)

usr/src/uts/common/io/i40e/core/i40e_common.c

7318

u32 reg_addr, u32 reg_val,

usr/src/uts/common/io/i40e/core/i40e_common.c

7364

u32 reg_addr, u32 *reg_val,

usr/src/uts/common/io/i40e/core/i40e_common.c

7404

i40e_aq_run_phy_activity(struct i40e_hw *hw, u16 activity_id, u32 dnl_opcode,

usr/src/uts/common/io/i40e/core/i40e_common.c

7405

u32 *cmd_status, u32 *data0, u32 *data1,

usr/src/uts/common/io/i40e/core/i40e_common.c

997

u32 port, ari, func_rid;

usr/src/uts/common/io/i40e/core/i40e_dcb.c

1023

u32 ouisubtype;

usr/src/uts/common/io/i40e/core/i40e_dcb.c

1029

ouisubtype = (u32)((I40E_IEEE_8021QAZ_OUI << I40E_LLDP_TLV_OUI_SHIFT) |

usr/src/uts/common/io/i40e/core/i40e_dcb.c

1098

u32 ouisubtype;

usr/src/uts/common/io/i40e/core/i40e_dcb.c

1104

ouisubtype = (u32)((I40E_IEEE_8021QAZ_OUI << I40E_LLDP_TLV_OUI_SHIFT) |

usr/src/uts/common/io/i40e/core/i40e_dcb.c

1159

u32 ouisubtype;

usr/src/uts/common/io/i40e/core/i40e_dcb.c

1166

ouisubtype = (u32)((I40E_IEEE_8021QAZ_OUI << I40E_LLDP_TLV_OUI_SHIFT) |

usr/src/uts/common/io/i40e/core/i40e_dcb.c

1199

u32 ouisubtype;

usr/src/uts/common/io/i40e/core/i40e_dcb.c

1204

ouisubtype = (u32)((I40E_IEEE_8021QAZ_OUI << I40E_LLDP_TLV_OUI_SHIFT) |

usr/src/uts/common/io/i40e/core/i40e_dcb.c

1348

u8 module, u32 word_offset)

usr/src/uts/common/io/i40e/core/i40e_dcb.c

1350

u32 address, offset = (2 * word_offset);

usr/src/uts/common/io/i40e/core/i40e_dcb.c

1412

u32 mem;

usr/src/uts/common/io/i40e/core/i40e_dcb.c

278

u32 ouisubtype;

usr/src/uts/common/io/i40e/core/i40e_dcb.c

447

u32 ouisubtype;

usr/src/uts/common/io/i40e/core/i40e_dcb.c

48

u32 reg;

usr/src/uts/common/io/i40e/core/i40e_dcb.c

505

u32 ouisubtype;

usr/src/uts/common/io/i40e/core/i40e_dcb.c

506

u32 oui;

usr/src/uts/common/io/i40e/core/i40e_dcb.c

509

oui = (u32)((ouisubtype & I40E_LLDP_TLV_OUI_MASK) >>

usr/src/uts/common/io/i40e/core/i40e_dcb.c

704

u32 status, tlv_status = LE32_TO_CPU(cee_cfg->tlv_status);

usr/src/uts/common/io/i40e/core/i40e_dcb.h

210

u32 defmaxtrafficclasses;

usr/src/uts/common/io/i40e/core/i40e_dcb.h

211

u32 defprioritytcmapping;

usr/src/uts/common/io/i40e/core/i40e_dcb.h

212

u32 deftcbandwidth;

usr/src/uts/common/io/i40e/core/i40e_dcb.h

213

u32 deftsaassignment;

usr/src/uts/common/io/i40e/core/i40e_hmc.c

145

u32 pd_index,

usr/src/uts/common/io/i40e/core/i40e_hmc.c

153

u32 sd_idx, rel_pd_idx;

usr/src/uts/common/io/i40e/core/i40e_hmc.c

226

u32 idx)

usr/src/uts/common/io/i40e/core/i40e_hmc.c

232

u32 sd_idx, rel_pd_idx;

usr/src/uts/common/io/i40e/core/i40e_hmc.c

281

u32 idx)

usr/src/uts/common/io/i40e/core/i40e_hmc.c

310

u32 idx, bool is_pf)

usr/src/uts/common/io/i40e/core/i40e_hmc.c

330

u32 idx)

usr/src/uts/common/io/i40e/core/i40e_hmc.c

359

u32 idx, bool is_pf)

usr/src/uts/common/io/i40e/core/i40e_hmc.c

52

u32 sd_index,

usr/src/uts/common/io/i40e/core/i40e_hmc.h

104

u32 signature;

usr/src/uts/common/io/i40e/core/i40e_hmc.h

132

u32 val1, val2, val3; \

usr/src/uts/common/io/i40e/core/i40e_hmc.h

133

val1 = (u32)(I40E_HI_DWORD(pa)); \

usr/src/uts/common/io/i40e/core/i40e_hmc.h

134

val2 = (u32)(pa) | (I40E_HMC_MAX_BP_COUNT << \

usr/src/uts/common/io/i40e/core/i40e_hmc.h

153

u32 val2, val3; \

usr/src/uts/common/io/i40e/core/i40e_hmc.h

193

*(sd_idx) = (u32)(fpm_addr / I40E_HMC_DIRECT_BP_SIZE); \

usr/src/uts/common/io/i40e/core/i40e_hmc.h

194

*(sd_limit) = (u32)((fpm_limit - 1) / I40E_HMC_DIRECT_BP_SIZE); \

usr/src/uts/common/io/i40e/core/i40e_hmc.h

217

*(pd_index) = (u32)(fpm_adr / I40E_HMC_PAGED_BP_SIZE); \

usr/src/uts/common/io/i40e/core/i40e_hmc.h

218

*(pd_limit) = (u32)((fpm_limit - 1) / I40E_HMC_PAGED_BP_SIZE); \

usr/src/uts/common/io/i40e/core/i40e_hmc.h

224

u32 sd_index,

usr/src/uts/common/io/i40e/core/i40e_hmc.h

230

u32 pd_index,

usr/src/uts/common/io/i40e/core/i40e_hmc.h

234

u32 idx);

usr/src/uts/common/io/i40e/core/i40e_hmc.h

236

u32 idx);

usr/src/uts/common/io/i40e/core/i40e_hmc.h

239

u32 idx, bool is_pf);

usr/src/uts/common/io/i40e/core/i40e_hmc.h

241

u32 idx);

usr/src/uts/common/io/i40e/core/i40e_hmc.h

244

u32 idx, bool is_pf);

usr/src/uts/common/io/i40e/core/i40e_hmc.h

52

u32 max_cnt; /* max count available for this hmc func */

usr/src/uts/common/io/i40e/core/i40e_hmc.h

53

u32 cnt; /* count of objects driver actually wants to create */

usr/src/uts/common/io/i40e/core/i40e_hmc.h

66

u32 sd_pd_index;

usr/src/uts/common/io/i40e/core/i40e_hmc.h

67

u32 ref_cnt;

usr/src/uts/common/io/i40e/core/i40e_hmc.h

72

u32 sd_index;

usr/src/uts/common/io/i40e/core/i40e_hmc.h

82

u32 ref_cnt;

usr/src/uts/common/io/i40e/core/i40e_hmc.h

83

u32 sd_index;

usr/src/uts/common/io/i40e/core/i40e_hmc.h

98

u32 sd_cnt;

usr/src/uts/common/io/i40e/core/i40e_hmc.h

99

u32 ref_cnt;

usr/src/uts/common/io/i40e/core/i40e_lan_hmc.c

1038

u32 dest_dword, mask;

usr/src/uts/common/io/i40e/core/i40e_lan_hmc.c

1053

mask = ~(u32)0;

usr/src/uts/common/io/i40e/core/i40e_lan_hmc.c

107

enum i40e_status_code i40e_init_lan_hmc(struct i40e_hw *hw, u32 txq_num,

usr/src/uts/common/io/i40e/core/i40e_lan_hmc.c

108

u32 rxq_num, u32 fcoe_cntx_num,

usr/src/uts/common/io/i40e/core/i40e_lan_hmc.c

109

u32 fcoe_filt_num)

usr/src/uts/common/io/i40e/core/i40e_lan_hmc.c

114

u32 size_exp;

usr/src/uts/common/io/i40e/core/i40e_lan_hmc.c

1180

i40e_memset(context_bytes, 0, (u32)hw->hmc.hmc_obj[hmc_type].size,

usr/src/uts/common/io/i40e/core/i40e_lan_hmc.c

1237

u32 obj_idx)

usr/src/uts/common/io/i40e/core/i40e_lan_hmc.c

1239

u32 obj_offset_in_sd, obj_offset_in_pd;

usr/src/uts/common/io/i40e/core/i40e_lan_hmc.c

1243

u32 pd_idx, pd_lmt, rel_pd_idx;

usr/src/uts/common/io/i40e/core/i40e_lan_hmc.c

1246

u32 sd_idx, sd_lmt;

usr/src/uts/common/io/i40e/core/i40e_lan_hmc.c

1282

obj_offset_in_pd = (u32)(obj_offset_in_fpm %

usr/src/uts/common/io/i40e/core/i40e_lan_hmc.c

1286

obj_offset_in_sd = (u32)(obj_offset_in_fpm %

usr/src/uts/common/io/i40e/core/i40e_lan_hmc.c

228

hw->hmc.sd_table.sd_cnt = (u32)

usr/src/uts/common/io/i40e/core/i40e_lan_hmc.c

269

u32 idx)

usr/src/uts/common/io/i40e/core/i40e_lan_hmc.c

296

u32 idx)

usr/src/uts/common/io/i40e/core/i40e_lan_hmc.c

319

u32 pd_idx1 = 0, pd_lmt1 = 0;

usr/src/uts/common/io/i40e/core/i40e_lan_hmc.c

320

u32 pd_idx = 0, pd_lmt = 0;

usr/src/uts/common/io/i40e/core/i40e_lan_hmc.c

322

u32 sd_idx, sd_lmt;

usr/src/uts/common/io/i40e/core/i40e_lan_hmc.c

324

u32 i, j;

usr/src/uts/common/io/i40e/core/i40e_lan_hmc.c

523

(u32)((obj->base & I40E_GLHMC_LANTXBASE_FPMLANTXBASE_MASK) / 512));

usr/src/uts/common/io/i40e/core/i40e_lan_hmc.c

529

(u32)((obj->base & I40E_GLHMC_LANRXBASE_FPMLANRXBASE_MASK) / 512));

usr/src/uts/common/io/i40e/core/i40e_lan_hmc.c

535

(u32)((obj->base & I40E_GLHMC_FCOEDDPBASE_FPMFCOEDDPBASE_MASK) / 512));

usr/src/uts/common/io/i40e/core/i40e_lan_hmc.c

541

(u32)((obj->base & I40E_GLHMC_FCOEFBASE_FPMFCOEFBASE_MASK) / 512));

usr/src/uts/common/io/i40e/core/i40e_lan_hmc.c

563

u32 pd_idx, pd_lmt, rel_pd_idx;

usr/src/uts/common/io/i40e/core/i40e_lan_hmc.c

564

u32 sd_idx, sd_lmt;

usr/src/uts/common/io/i40e/core/i40e_lan_hmc.c

565

u32 i, j;

usr/src/uts/common/io/i40e/core/i40e_lan_hmc.c

71

u64 i40e_calculate_l2fpm_size(u32 txq_num, u32 rxq_num,

usr/src/uts/common/io/i40e/core/i40e_lan_hmc.c

72

u32 fcoe_cntx_num, u32 fcoe_filt_num)

usr/src/uts/common/io/i40e/core/i40e_lan_hmc.c

853

u32 src_dword, mask;

usr/src/uts/common/io/i40e/core/i40e_lan_hmc.c

871

mask = ~(u32)0;

usr/src/uts/common/io/i40e/core/i40e_lan_hmc.c

876

src_dword = *(u32 *)from;

usr/src/uts/common/io/i40e/core/i40e_lan_hmc.h

115

u32 rsv[32];

usr/src/uts/common/io/i40e/core/i40e_lan_hmc.h

119

u32 rsv[8];

usr/src/uts/common/io/i40e/core/i40e_lan_hmc.h

157

u32 rsrc_type;

usr/src/uts/common/io/i40e/core/i40e_lan_hmc.h

158

u32 start_idx;

usr/src/uts/common/io/i40e/core/i40e_lan_hmc.h

159

u32 count;

usr/src/uts/common/io/i40e/core/i40e_lan_hmc.h

166

u32 rsrc_type;

usr/src/uts/common/io/i40e/core/i40e_lan_hmc.h

167

u32 start_idx;

usr/src/uts/common/io/i40e/core/i40e_lan_hmc.h

168

u32 count;

usr/src/uts/common/io/i40e/core/i40e_lan_hmc.h

171

enum i40e_status_code i40e_init_lan_hmc(struct i40e_hw *hw, u32 txq_num,

usr/src/uts/common/io/i40e/core/i40e_lan_hmc.h

172

u32 rxq_num, u32 fcoe_cntx_num,

usr/src/uts/common/io/i40e/core/i40e_lan_hmc.h

173

u32 fcoe_filt_num);

usr/src/uts/common/io/i40e/core/i40e_lan_hmc.h

178

u64 i40e_calculate_l2fpm_size(u32 txq_num, u32 rxq_num,

usr/src/uts/common/io/i40e/core/i40e_lan_hmc.h

179

u32 fcoe_cntx_num, u32 fcoe_filt_num);

usr/src/uts/common/io/i40e/core/i40e_lan_hmc.h

67

u32 rxmax; /* bigger than needed, see above for reason */

usr/src/uts/common/io/i40e/core/i40e_lan_hmc.h

99

u32 crc;

usr/src/uts/common/io/i40e/core/i40e_nvm.c

1326

u32 old_asq_status = hw->aq.asq_last_status;

usr/src/uts/common/io/i40e/core/i40e_nvm.c

1327

u32 gtime;

usr/src/uts/common/io/i40e/core/i40e_nvm.c

1396

u32 aq_desc_len = sizeof(struct i40e_aq_desc);

usr/src/uts/common/io/i40e/core/i40e_nvm.c

150

u32 total_delay = 0;

usr/src/uts/common/io/i40e/core/i40e_nvm.c

1528

u32 buff_size = 0;

usr/src/uts/common/io/i40e/core/i40e_nvm.c

1530

u32 aq_desc_len;

usr/src/uts/common/io/i40e/core/i40e_nvm.c

1531

u32 aq_data_len;

usr/src/uts/common/io/i40e/core/i40e_nvm.c

1555

buff_size = max(aq_data_len, (u32)LE16_TO_CPU(aq_desc->datalen));

usr/src/uts/common/io/i40e/core/i40e_nvm.c

1610

u32 aq_total_len;

usr/src/uts/common/io/i40e/core/i40e_nvm.c

1611

u32 aq_desc_len;

usr/src/uts/common/io/i40e/core/i40e_nvm.c

1639

u32 len = aq_desc_len - cmd->offset;

usr/src/uts/common/io/i40e/core/i40e_nvm.c

1679

u32 aq_total_len;

usr/src/uts/common/io/i40e/core/i40e_nvm.c

1680

u32 aq_desc_len;

usr/src/uts/common/io/i40e/core/i40e_nvm.c

180

u32 srctl, wait_cnt;

usr/src/uts/common/io/i40e/core/i40e_nvm.c

210

u32 sr_reg;

usr/src/uts/common/io/i40e/core/i40e_nvm.c

226

sr_reg = ((u32)offset << I40E_GLNVM_SRCTL_ADDR_SHIFT) |

usr/src/uts/common/io/i40e/core/i40e_nvm.c

260

u8 module_pointer, u32 offset,

usr/src/uts/common/io/i40e/core/i40e_nvm.c

51

u32 fla, gens;

usr/src/uts/common/io/i40e/core/i40e_nvm.c

594

u32 offset, u16 words, void *data,

usr/src/uts/common/io/i40e/core/i40e_nvm.c

640

enum i40e_status_code __i40e_write_nvm_word(struct i40e_hw *hw, u32 offset,

usr/src/uts/common/io/i40e/core/i40e_nvm.c

665

u8 module_pointer, u32 offset,

usr/src/uts/common/io/i40e/core/i40e_nvm.c

670

u32 i = 0;

usr/src/uts/common/io/i40e/core/i40e_nvm.c

746

if ((i >= (u32)vpd_module) &&

usr/src/uts/common/io/i40e/core/i40e_nvm.c

747

(i < ((u32)vpd_module +

usr/src/uts/common/io/i40e/core/i40e_nvm.c

752

if ((i >= (u32)pcie_alt_module) &&

usr/src/uts/common/io/i40e/core/i40e_nvm.c

753

(i < ((u32)pcie_alt_module +

usr/src/uts/common/io/i40e/core/i40e_nvm.c

867

static INLINE u8 i40e_nvmupd_get_module(u32 val)

usr/src/uts/common/io/i40e/core/i40e_nvm.c

871

static INLINE u8 i40e_nvmupd_get_transaction(u32 val)

usr/src/uts/common/io/i40e/core/i40e_nvm.c

876

static INLINE u8 i40e_nvmupd_get_preservation_flags(u32 val)

usr/src/uts/common/io/i40e/core/i40e_prototype.h

102

u32 time, u32 interval);

usr/src/uts/common/io/i40e/core/i40e_prototype.h

104

u32 *reg_val);

usr/src/uts/common/io/i40e/core/i40e_prototype.h

106

u32 reg_val);

usr/src/uts/common/io/i40e/core/i40e_prototype.h

109

enum i40e_status_code i40e_get_lpi_counters(struct i40e_hw *hw, u32 *tx_counter,

usr/src/uts/common/io/i40e/core/i40e_prototype.h

110

u32 *rx_counter, bool *is_clear);

usr/src/uts/common/io/i40e/core/i40e_prototype.h

122

u32 *fw_build,

usr/src/uts/common/io/i40e/core/i40e_prototype.h

126

u32 reg_addr, u64 reg_val,

usr/src/uts/common/io/i40e/core/i40e_prototype.h

129

u32 reg_addr, u64 *reg_val,

usr/src/uts/common/io/i40e/core/i40e_prototype.h

238

u32 v_opcode, u32 v_retval, u8 *msg, u16 msglen,

usr/src/uts/common/io/i40e/core/i40e_prototype.h

257

u32 offset, u16 length, void *data,

usr/src/uts/common/io/i40e/core/i40e_prototype.h

261

u32 offset, u16 length, bool last_command,

usr/src/uts/common/io/i40e/core/i40e_prototype.h

264

u8 cmd_flags, u32 field_id, void *data,

usr/src/uts/common/io/i40e/core/i40e_prototype.h

279

u32 offset, u16 length, void *data,

usr/src/uts/common/io/i40e/core/i40e_prototype.h

426

u32 reg_addr0, u32 *reg_val0,

usr/src/uts/common/io/i40e/core/i40e_prototype.h

427

u32 reg_addr1, u32 *reg_val1);

usr/src/uts/common/io/i40e/core/i40e_prototype.h

429

u32 addr, u32 dw_count, void *buffer);

usr/src/uts/common/io/i40e/core/i40e_prototype.h

431

u32 reg_addr0, u32 reg_val0,

usr/src/uts/common/io/i40e/core/i40e_prototype.h

432

u32 reg_addr1, u32 reg_val1);

usr/src/uts/common/io/i40e/core/i40e_prototype.h

434

u32 addr, u32 dw_count, void *buffer);

usr/src/uts/common/io/i40e/core/i40e_prototype.h

450

u32 *max_bw, u32 *min_bw, bool *min_valid, bool *max_valid);

usr/src/uts/common/io/i40e/core/i40e_prototype.h

456

u32 pba_num_size);

usr/src/uts/common/io/i40e/core/i40e_prototype.h

457

void i40e_pre_tx_queue_cfg(struct i40e_hw *hw, u32 queue, bool enable);

usr/src/uts/common/io/i40e/core/i40e_prototype.h

472

u32 offset, u16 words, void *data,

usr/src/uts/common/io/i40e/core/i40e_prototype.h

478

enum i40e_status_code __i40e_write_nvm_word(struct i40e_hw *hw, u32 offset,

usr/src/uts/common/io/i40e/core/i40e_prototype.h

481

u32 offset, u16 words, void *data);

usr/src/uts/common/io/i40e/core/i40e_prototype.h

562

u8 table_id, u32 start_index, u16 buff_size,

usr/src/uts/common/io/i40e/core/i40e_prototype.h

564

u8 *ret_next_table, u32 *ret_next_index,

usr/src/uts/common/io/i40e/core/i40e_prototype.h

569

u32 reg_addr, u32 *reg_val,

usr/src/uts/common/io/i40e/core/i40e_prototype.h

571

u32 i40e_read_rx_ctl(struct i40e_hw *hw, u32 reg_addr);

usr/src/uts/common/io/i40e/core/i40e_prototype.h

573

u32 reg_addr, u32 reg_val,

usr/src/uts/common/io/i40e/core/i40e_prototype.h

575

void i40e_write_rx_ctl(struct i40e_hw *hw, u32 reg_addr, u32 reg_val);

usr/src/uts/common/io/i40e/core/i40e_prototype.h

580

u32 reg_addr, u32 reg_val,

usr/src/uts/common/io/i40e/core/i40e_prototype.h

586

u32 reg_addr, u32 *reg_val,

usr/src/uts/common/io/i40e/core/i40e_prototype.h

596

i40e_aq_run_phy_activity(struct i40e_hw *hw, u16 activity_id, u32 opcode,

usr/src/uts/common/io/i40e/core/i40e_prototype.h

597

u32 *cmd_status, u32 *data0, u32 *data1,

usr/src/uts/common/io/i40e/core/i40e_prototype.h

95

u32 i40e_led_get(struct i40e_hw *hw);

usr/src/uts/common/io/i40e/core/i40e_prototype.h

96

void i40e_led_set(struct i40e_hw *hw, u32 mode, bool blink);

usr/src/uts/common/io/i40e/core/i40e_prototype.h

98

u16 led_addr, u32 mode);

usr/src/uts/common/io/i40e/core/i40e_type.h

1492

u32 fd_atr_status;

usr/src/uts/common/io/i40e/core/i40e_type.h

1493

u32 fd_sb_status;

usr/src/uts/common/io/i40e/core/i40e_type.h

1495

u32 tx_lpi_status;

usr/src/uts/common/io/i40e/core/i40e_type.h

1496

u32 rx_lpi_status;

usr/src/uts/common/io/i40e/core/i40e_type.h

371

u32 switch_mode;

usr/src/uts/common/io/i40e/core/i40e_type.h

386

u32 management_mode;

usr/src/uts/common/io/i40e/core/i40e_type.h

387

u32 mng_protocols_over_mctp;

usr/src/uts/common/io/i40e/core/i40e_type.h

391

u32 npar_enable;

usr/src/uts/common/io/i40e/core/i40e_type.h

392

u32 os2bmc;

usr/src/uts/common/io/i40e/core/i40e_type.h

393

u32 valid_functions;

usr/src/uts/common/io/i40e/core/i40e_type.h

403

u32 flex10_mode;

usr/src/uts/common/io/i40e/core/i40e_type.h

408

u32 flex10_status;

usr/src/uts/common/io/i40e/core/i40e_type.h

421

u32 fd_filters_guaranteed;

usr/src/uts/common/io/i40e/core/i40e_type.h

422

u32 fd_filters_best_effort;

usr/src/uts/common/io/i40e/core/i40e_type.h

424

u32 rss_table_size;

usr/src/uts/common/io/i40e/core/i40e_type.h

425

u32 rss_table_entry_width;

usr/src/uts/common/io/i40e/core/i40e_type.h

428

u32 nvm_image_type;

usr/src/uts/common/io/i40e/core/i40e_type.h

429

u32 num_flow_director_filters;

usr/src/uts/common/io/i40e/core/i40e_type.h

430

u32 num_vfs;

usr/src/uts/common/io/i40e/core/i40e_type.h

431

u32 vf_base_id;

usr/src/uts/common/io/i40e/core/i40e_type.h

432

u32 num_vsis;

usr/src/uts/common/io/i40e/core/i40e_type.h

433

u32 num_rx_qp;

usr/src/uts/common/io/i40e/core/i40e_type.h

434

u32 num_tx_qp;

usr/src/uts/common/io/i40e/core/i40e_type.h

435

u32 base_queue;

usr/src/uts/common/io/i40e/core/i40e_type.h

436

u32 num_msix_vectors;

usr/src/uts/common/io/i40e/core/i40e_type.h

437

u32 num_msix_vectors_vf;

usr/src/uts/common/io/i40e/core/i40e_type.h

438

u32 led_pin_num;

usr/src/uts/common/io/i40e/core/i40e_type.h

439

u32 sdp_pin_num;

usr/src/uts/common/io/i40e/core/i40e_type.h

440

u32 mdio_port_num;

usr/src/uts/common/io/i40e/core/i40e_type.h

441

u32 mdio_port_mode;

usr/src/uts/common/io/i40e/core/i40e_type.h

443

u32 enabled_tcmap;

usr/src/uts/common/io/i40e/core/i40e_type.h

444

u32 maxtc;

usr/src/uts/common/io/i40e/core/i40e_type.h

471

u32 timeout; /* [ms] */

usr/src/uts/common/io/i40e/core/i40e_type.h

475

u32 eetrack; /* NVM data version */

usr/src/uts/common/io/i40e/core/i40e_type.h

476

u32 oem_ver; /* OEM version info */

usr/src/uts/common/io/i40e/core/i40e_type.h

546

u32 command;

usr/src/uts/common/io/i40e/core/i40e_type.h

547

u32 config;

usr/src/uts/common/io/i40e/core/i40e_type.h

548

u32 offset; /* in bytes */

usr/src/uts/common/io/i40e/core/i40e_type.h

549

u32 data_size; /* in bytes */

usr/src/uts/common/io/i40e/core/i40e_type.h

680

u32 numapps;

usr/src/uts/common/io/i40e/core/i40e_type.h

681

u32 tlv_status; /* CEE mode TLV status */

usr/src/uts/common/io/i40e/core/i40e_type.h

774

u32 debug_mask;

usr/src/uts/common/io/i40e/core/i40e_type.h

89

#define I40E_HI_DWORD(x) ((u32)((((x) >> 16) >> 16) & 0xFFFFFFFF))

usr/src/uts/common/io/i40e/core/i40e_type.h

90

#define I40E_LO_DWORD(x) ((u32)((x) & 0xFFFFFFFF))

usr/src/uts/common/io/i40e/core/i40e_type.h

982

u32 ptype:8;

usr/src/uts/common/io/i40e/core/i40e_type.h

983

u32 known:1;

usr/src/uts/common/io/i40e/core/i40e_type.h

984

u32 outer_ip:1;

usr/src/uts/common/io/i40e/core/i40e_type.h

985

u32 outer_ip_ver:1;

usr/src/uts/common/io/i40e/core/i40e_type.h

986

u32 outer_frag:1;

usr/src/uts/common/io/i40e/core/i40e_type.h

987

u32 tunnel_type:3;

usr/src/uts/common/io/i40e/core/i40e_type.h

988

u32 tunnel_end_prot:2;

usr/src/uts/common/io/i40e/core/i40e_type.h

989

u32 tunnel_end_frag:1;

usr/src/uts/common/io/i40e/core/i40e_type.h

990

u32 inner_prot:4;

usr/src/uts/common/io/i40e/core/i40e_type.h

991

u32 payload_layer:3;

usr/src/uts/common/io/i40e/core/virtchnl.h

171

u32 vfid; /* used by PF when sending to VF */

usr/src/uts/common/io/i40e/core/virtchnl.h

195

u32 major;

usr/src/uts/common/io/i40e/core/virtchnl.h

196

u32 minor;

usr/src/uts/common/io/i40e/core/virtchnl.h

272

u32 vf_cap_flags;

usr/src/uts/common/io/i40e/core/virtchnl.h

273

u32 rss_key_size;

usr/src/uts/common/io/i40e/core/virtchnl.h

274

u32 rss_lut_size;

usr/src/uts/common/io/i40e/core/virtchnl.h

309

u32 ring_len; /* number of descriptors, multiple of 32 */

usr/src/uts/common/io/i40e/core/virtchnl.h

312

u32 databuffer_size;

usr/src/uts/common/io/i40e/core/virtchnl.h

313

u32 max_pkt_size;

usr/src/uts/common/io/i40e/core/virtchnl.h

314

u32 pad1;

usr/src/uts/common/io/i40e/core/virtchnl.h

317

u32 pad2;

usr/src/uts/common/io/i40e/core/virtchnl.h

340

u32 pad;

usr/src/uts/common/io/i40e/core/virtchnl.h

397

u32 rx_queues;

usr/src/uts/common/io/i40e/core/virtchnl.h

398

u32 tx_queues;

usr/src/uts/common/io/i40e/core/virtchnl.h

565

u32 v_idx; /* msix_vector */

usr/src/uts/common/io/i40e/core/virtchnl.h

574

u32 num_vectors;

usr/src/uts/common/io/i40e/core/virtchnl.h

608

virtchnl_vc_validate_vf_msg(struct virtchnl_version_info *ver, u32 v_opcode,

usr/src/uts/common/io/i40e/core/virtchnl.h

623

valid_len = sizeof(u32);

usr/src/uts/common/io/i40e/i40e_osdep.c

226

i40e_debug(void *hw, u32 mask, char *fmt, ...)

usr/src/uts/common/io/i40e/i40e_osdep.c

26

i40e_allocate_virt_mem(struct i40e_hw *hw, struct i40e_virt_mem *mem, u32 size)

usr/src/uts/common/io/i40e/i40e_osdep.c

45

enum i40e_memory_type type, u64 size, u32 alignment)

usr/src/uts/common/io/i40e/i40e_osdep.h

101

#define __le32 u32

usr/src/uts/common/io/i40e/i40e_osdep.h

104

#define __be32 u32

usr/src/uts/common/io/i40e/i40e_osdep.h

135

u32 size;

usr/src/uts/common/io/i40e/i40e_osdep.h

184

extern void i40e_debug(void *, u32, char *, ...);

usr/src/uts/common/io/igb/e1000_osdep.h

159

#define __le32 u32

usr/src/uts/common/io/igb/igb_main.c

1414

u32 tx_space, min_tx, min_rx;

usr/src/uts/common/io/igc/core/igc_api.c

241

void igc_write_vfta(struct igc_hw *hw, u32 offset, u32 value)

usr/src/uts/common/io/igc/core/igc_api.c

257

u32 mc_addr_count)

usr/src/uts/common/io/igc/core/igc_api.c

391

int igc_rar_set(struct igc_hw *hw, u8 *addr, u32 index)

usr/src/uts/common/io/igc/core/igc_api.c

422

u32 igc_hash_mc_addr(struct igc_hw *hw, u8 *mc_addr)

usr/src/uts/common/io/igc/core/igc_api.c

451

s32 igc_read_phy_reg(struct igc_hw *hw, u32 offset, u16 *data)

usr/src/uts/common/io/igc/core/igc_api.c

468

s32 igc_write_phy_reg(struct igc_hw *hw, u32 offset, u16 data)

usr/src/uts/common/io/igc/core/igc_api.c

606

s32 igc_read_pba_string(struct igc_hw *hw, u8 *pba_num, u32 pba_num_size)

usr/src/uts/common/io/igc/core/igc_api.h

21

void igc_write_vfta(struct igc_hw *hw, u32 offset, u32 value);

usr/src/uts/common/io/igc/core/igc_api.h

30

int igc_rar_set(struct igc_hw *hw, u8 *addr, u32 index);

usr/src/uts/common/io/igc/core/igc_api.h

31

u32 igc_hash_mc_addr(struct igc_hw *hw, u8 *mc_addr);

usr/src/uts/common/io/igc/core/igc_api.h

33

u32 mc_addr_count);

usr/src/uts/common/io/igc/core/igc_api.h

37

s32 igc_read_phy_reg(struct igc_hw *hw, u32 offset, u16 *data);

usr/src/uts/common/io/igc/core/igc_api.h

38

s32 igc_write_phy_reg(struct igc_hw *hw, u32 offset, u16 data);

usr/src/uts/common/io/igc/core/igc_api.h

46

s32 igc_read_pba_string(struct igc_hw *hw, u8 *pba_num, u32 pba_num_size);

usr/src/uts/common/io/igc/core/igc_base.c

120

u32 rctl, rlpml, rxdctl[4], rfctl, temp_rctl, rx_enabled;

usr/src/uts/common/io/igc/core/igc_hw.h

122

#define __le32 u32

usr/src/uts/common/io/igc/core/igc_hw.h

352

void (*update_mc_addr_list)(struct igc_hw *, u8 *, u32);

usr/src/uts/common/io/igc/core/igc_hw.h

357

void (*write_vfta)(struct igc_hw *, u32, u32);

usr/src/uts/common/io/igc/core/igc_hw.h

359

int (*rar_set)(struct igc_hw *, u8*, u32);

usr/src/uts/common/io/igc/core/igc_hw.h

387

s32 (*read_reg)(struct igc_hw *, u32, u16 *);

usr/src/uts/common/io/igc/core/igc_hw.h

388

s32 (*read_reg_locked)(struct igc_hw *, u32, u16 *);

usr/src/uts/common/io/igc/core/igc_hw.h

389

s32 (*read_reg_page)(struct igc_hw *, u32, u16 *);

usr/src/uts/common/io/igc/core/igc_hw.h

394

s32 (*write_reg)(struct igc_hw *, u32, u16);

usr/src/uts/common/io/igc/core/igc_hw.h

395

s32 (*write_reg_locked)(struct igc_hw *, u32, u16);

usr/src/uts/common/io/igc/core/igc_hw.h

396

s32 (*write_reg_page)(struct igc_hw *, u32, u16);

usr/src/uts/common/io/igc/core/igc_hw.h

429

u32 mc_filter_type;

usr/src/uts/common/io/igc/core/igc_hw.h

441

u32 mta_shadow[MAX_MTA_REG];

usr/src/uts/common/io/igc/core/igc_hw.h

449

u32 max_frame_size;

usr/src/uts/common/io/igc/core/igc_hw.h

458

u32 addr;

usr/src/uts/common/io/igc/core/igc_hw.h

459

u32 id;

usr/src/uts/common/io/igc/core/igc_hw.h

460

u32 reset_delay_us; /* in usec */

usr/src/uts/common/io/igc/core/igc_hw.h

461

u32 revision;

usr/src/uts/common/io/igc/core/igc_hw.h

496

u32 high_water; /* Flow control high-water mark */

usr/src/uts/common/io/igc/core/igc_hw.h

497

u32 low_water; /* Flow control low-water mark */

usr/src/uts/common/io/igc/core/igc_hw.h

509

u32 mtu;

usr/src/uts/common/io/igc/core/igc_hw.h

541

s32 igc_read_pcie_cap_reg(struct igc_hw *hw, u32 reg, u16 *value);

usr/src/uts/common/io/igc/core/igc_hw.h

542

s32 igc_write_pcie_cap_reg(struct igc_hw *hw, u32 reg, u16 *value);

usr/src/uts/common/io/igc/core/igc_hw.h

543

void igc_read_pci_cfg(struct igc_hw *hw, u32 reg, u16 *value);

usr/src/uts/common/io/igc/core/igc_hw.h

544

void igc_write_pci_cfg(struct igc_hw *hw, u32 reg, u16 *value);

usr/src/uts/common/io/igc/core/igc_i225.c

1103

u32 data;

usr/src/uts/common/io/igc/core/igc_i225.c

1131

u32 data;

usr/src/uts/common/io/igc/core/igc_i225.c

1164

u32 ipcnfg, eeer;

usr/src/uts/common/io/igc/core/igc_i225.c

1176

u32 eee_su = IGC_READ_REG(hw, IGC_EEE_SU);

usr/src/uts/common/io/igc/core/igc_i225.c

183

u32 ctrl;

usr/src/uts/common/io/igc/core/igc_i225.c

27

u32 eecd = IGC_READ_REG(hw, IGC_EECD);

usr/src/uts/common/io/igc/core/igc_i225.c

271

u32 swfw_sync;

usr/src/uts/common/io/igc/core/igc_i225.c

272

u32 swmask = mask;

usr/src/uts/common/io/igc/core/igc_i225.c

273

u32 fwmask = mask << 16;

usr/src/uts/common/io/igc/core/igc_i225.c

321

u32 swfw_sync;

usr/src/uts/common/io/igc/core/igc_i225.c

345

u32 phpm_reg;

usr/src/uts/common/io/igc/core/igc_i225.c

347

u32 ctrl;

usr/src/uts/common/io/igc/core/igc_i225.c

372

u32 swsm;

usr/src/uts/common/io/igc/core/igc_i225.c

533

u32 i, k, eewr = 0;

usr/src/uts/common/io/igc/core/igc_i225.c

534

u32 attempts = 100000;

usr/src/uts/common/io/igc/core/igc_i225.c

674

u32 eec = 0;

usr/src/uts/common/io/igc/core/igc_i225.c

694

u32 burst_counter)

usr/src/uts/common/io/igc/core/igc_i225.c

718

s32 igc_write_erase_flash_command_i225(struct igc_hw *hw, u32 opcode,

usr/src/uts/common/io/igc/core/igc_i225.c

719

u32 address)

usr/src/uts/common/io/igc/core/igc_i225.c

721

u32 flswctl = 0;

usr/src/uts/common/io/igc/core/igc_i225.c

767

u32 block_sw_protect = 1;

usr/src/uts/common/io/igc/core/igc_i225.c

769

u32 i, fw_valid_bit;

usr/src/uts/common/io/igc/core/igc_i225.c

772

u32 flup;

usr/src/uts/common/io/igc/core/igc_i225.c

862

u32 i, reg;

usr/src/uts/common/io/igc/core/igc_i225.c

888

u32 tw_system, ltrc, ltrv, ltr_min, ltr_max, scale_min, scale_max;

usr/src/uts/common/io/igc/core/igc_i225.h

19

u32 burst_counter);

usr/src/uts/common/io/igc/core/igc_i225.h

20

s32 igc_write_erase_flash_command_i225(struct igc_hw *hw, u32 opcode,

usr/src/uts/common/io/igc/core/igc_i225.h

21

u32 address);

usr/src/uts/common/io/igc/core/igc_mac.c

1024

u32 ctrl;

usr/src/uts/common/io/igc/core/igc_mac.c

104

u8 IGC_UNUSEDARG *h, u32 IGC_UNUSEDARG a)

usr/src/uts/common/io/igc/core/igc_mac.c

132

u32 offset;

usr/src/uts/common/io/igc/core/igc_mac.c

151

void igc_write_vfta_generic(struct igc_hw *hw, u32 offset, u32 value)

usr/src/uts/common/io/igc/core/igc_mac.c

170

u32 i;

usr/src/uts/common/io/igc/core/igc_mac.c

200

u32 i;

usr/src/uts/common/io/igc/core/igc_mac.c

262

int igc_rar_set_generic(struct igc_hw *hw, u8 *addr, u32 index)

usr/src/uts/common/io/igc/core/igc_mac.c

264

u32 rar_low, rar_high;

usr/src/uts/common/io/igc/core/igc_mac.c

271

rar_low = ((u32) addr[0] | ((u32) addr[1] << 8) |

usr/src/uts/common/io/igc/core/igc_mac.c

272

((u32) addr[2] << 16) | ((u32) addr[3] << 24));

usr/src/uts/common/io/igc/core/igc_mac.c

274

rar_high = ((u32) addr[4] | ((u32) addr[5] << 8));

usr/src/uts/common/io/igc/core/igc_mac.c

300

u32 igc_hash_mc_addr_generic(struct igc_hw *hw, u8 *mc_addr)

usr/src/uts/common/io/igc/core/igc_mac.c

302

u32 hash_value, hash_mask;

usr/src/uts/common/io/igc/core/igc_mac.c

372

u8 *mc_addr_list, u32 mc_addr_count)

usr/src/uts/common/io/igc/core/igc_mac.c

374

u32 hash_value, hash_bit, hash_reg;

usr/src/uts/common/io/igc/core/igc_mac.c

383

for (i = 0; (u32) i < mc_addr_count; i++) {

usr/src/uts/common/io/igc/core/igc_mac.c

582

u32 tctl;

usr/src/uts/common/io/igc/core/igc_mac.c

605

u32 fcrtl = 0, fcrth = 0;

usr/src/uts/common/io/igc/core/igc_mac.c

644

u32 ctrl;

usr/src/uts/common/io/igc/core/igc_mac.c

78

u8 IGC_UNUSEDARG *h, u32 IGC_UNUSEDARG a)

usr/src/uts/common/io/igc/core/igc_mac.c

877

u32 status;

usr/src/uts/common/io/igc/core/igc_mac.c

91

u32 IGC_UNUSEDARG a, u32 IGC_UNUSEDARG b)

usr/src/uts/common/io/igc/core/igc_mac.c

922

u32 swsm;

usr/src/uts/common/io/igc/core/igc_mac.c

973

u32 swsm;

usr/src/uts/common/io/igc/core/igc_mac.h

15

void igc_null_update_mc(struct igc_hw *hw, u8 *h, u32 a);

usr/src/uts/common/io/igc/core/igc_mac.h

16

void igc_null_write_vfta(struct igc_hw *hw, u32 a, u32 b);

usr/src/uts/common/io/igc/core/igc_mac.h

17

int igc_null_rar_set(struct igc_hw *hw, u8 *h, u32 a);

usr/src/uts/common/io/igc/core/igc_mac.h

29

u8 *mc_addr_list, u32 mc_addr_count);

usr/src/uts/common/io/igc/core/igc_mac.h

30

int igc_rar_set_generic(struct igc_hw *hw, u8 *addr, u32 index);

usr/src/uts/common/io/igc/core/igc_mac.h

35

u32 igc_hash_mc_addr_generic(struct igc_hw *hw, u8 *mc_addr);

usr/src/uts/common/io/igc/core/igc_mac.h

43

void igc_set_pcie_no_snoop_generic(struct igc_hw *hw, u32 no_snoop);

usr/src/uts/common/io/igc/core/igc_mac.h

44

void igc_write_vfta_generic(struct igc_hw *hw, u32 offset, u32 value);

usr/src/uts/common/io/igc/core/igc_nvm.c

116

u32 eecd = IGC_READ_REG(hw, IGC_EECD);

usr/src/uts/common/io/igc/core/igc_nvm.c

117

u32 mask;

usr/src/uts/common/io/igc/core/igc_nvm.c

159

u32 eecd;

usr/src/uts/common/io/igc/core/igc_nvm.c

160

u32 i;

usr/src/uts/common/io/igc/core/igc_nvm.c

196

u32 attempts = 100000;

usr/src/uts/common/io/igc/core/igc_nvm.c

197

u32 i, reg = 0;

usr/src/uts/common/io/igc/core/igc_nvm.c

226

u32 eecd = IGC_READ_REG(hw, IGC_EECD);

usr/src/uts/common/io/igc/core/igc_nvm.c

261

u32 eecd = IGC_READ_REG(hw, IGC_EECD);

usr/src/uts/common/io/igc/core/igc_nvm.c

286

u32 eecd;

usr/src/uts/common/io/igc/core/igc_nvm.c

306

u32 eecd;

usr/src/uts/common/io/igc/core/igc_nvm.c

326

u32 eecd = IGC_READ_REG(hw, IGC_EECD);

usr/src/uts/common/io/igc/core/igc_nvm.c

378

u32 i, eerd = 0;

usr/src/uts/common/io/igc/core/igc_nvm.c

501

u32 pba_num_size)

usr/src/uts/common/io/igc/core/igc_nvm.c

578

if (pba_num_size < (((u32)length * 2) - 1)) {

usr/src/uts/common/io/igc/core/igc_nvm.c

615

u32 rar_high;

usr/src/uts/common/io/igc/core/igc_nvm.c

616

u32 rar_low;

usr/src/uts/common/io/igc/core/igc_nvm.c

707

u32 ctrl_ext;

usr/src/uts/common/io/igc/core/igc_nvm.c

80

static void igc_raise_eec_clk(struct igc_hw *hw, u32 *eecd)

usr/src/uts/common/io/igc/core/igc_nvm.c

95

static void igc_lower_eec_clk(struct igc_hw *hw, u32 *eecd)

usr/src/uts/common/io/igc/core/igc_nvm.h

20

u32 pba_num_size);

usr/src/uts/common/io/igc/core/igc_phy.c

113

u32 manc;

usr/src/uts/common/io/igc/core/igc_phy.c

145

phy->id = (u32)(phy_id << 16);

usr/src/uts/common/io/igc/core/igc_phy.c

151

phy->id |= (u32)(phy_id & PHY_REVISION_MASK);

usr/src/uts/common/io/igc/core/igc_phy.c

152

phy->revision = (u32)(phy_id & ~PHY_REVISION_MASK);

usr/src/uts/common/io/igc/core/igc_phy.c

166

s32 igc_read_phy_reg_mdic(struct igc_hw *hw, u32 offset, u16 *data)

usr/src/uts/common/io/igc/core/igc_phy.c

169

u32 i, mdic = 0;

usr/src/uts/common/io/igc/core/igc_phy.c

225

s32 igc_write_phy_reg_mdic(struct igc_hw *hw, u32 offset, u16 data)

usr/src/uts/common/io/igc/core/igc_phy.c

228

u32 i, mdic = 0;

usr/src/uts/common/io/igc/core/igc_phy.c

241

mdic = (((u32)data) |

usr/src/uts/common/io/igc/core/igc_phy.c

593

u32 ctrl;

usr/src/uts/common/io/igc/core/igc_phy.c

62

u32 IGC_UNUSEDARG offset, u16 IGC_UNUSEDARG *data)

usr/src/uts/common/io/igc/core/igc_phy.c

800

s32 igc_phy_has_link_generic(struct igc_hw *hw, u32 iterations,

usr/src/uts/common/io/igc/core/igc_phy.c

801

u32 usec_interval, bool *success)

usr/src/uts/common/io/igc/core/igc_phy.c

856

u32 ctrl, timeout = 10000, phpm = 0;

usr/src/uts/common/io/igc/core/igc_phy.c

943

s32 igc_write_phy_reg_gpy(struct igc_hw *hw, u32 offset, u16 data)

usr/src/uts/common/io/igc/core/igc_phy.c

97

u32 IGC_UNUSEDARG offset, u16 IGC_UNUSEDARG data)

usr/src/uts/common/io/igc/core/igc_phy.c

977

s32 igc_read_phy_reg_gpy(struct igc_hw *hw, u32 offset, u16 *data)

usr/src/uts/common/io/igc/core/igc_phy.h

11

s32 igc_null_read_reg(struct igc_hw *hw, u32 offset, u16 *data);

usr/src/uts/common/io/igc/core/igc_phy.h

14

s32 igc_null_write_reg(struct igc_hw *hw, u32 offset, u16 data);

usr/src/uts/common/io/igc/core/igc_phy.h

24

s32 igc_phy_has_link_generic(struct igc_hw *hw, u32 iterations,

usr/src/uts/common/io/igc/core/igc_phy.h

25

u32 usec_interval, bool *success);

usr/src/uts/common/io/igc/core/igc_phy.h

26

enum igc_phy_type igc_get_phy_type_from_id(u32 phy_id);

usr/src/uts/common/io/igc/core/igc_phy.h

32

s32 igc_read_phy_reg_mdic(struct igc_hw *hw, u32 offset, u16 *data);

usr/src/uts/common/io/igc/core/igc_phy.h

33

s32 igc_write_phy_reg_mdic(struct igc_hw *hw, u32 offset, u16 data);

usr/src/uts/common/io/igc/core/igc_phy.h

39

s32 igc_write_phy_reg_gpy(struct igc_hw *hw, u32 offset, u16 data);

usr/src/uts/common/io/igc/core/igc_phy.h

40

s32 igc_read_phy_reg_gpy(struct igc_hw *hw, u32 offset, u16 *data);

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.c

1004

s32 ixgbe_set_vfta_82598(struct ixgbe_hw *hw, u32 vlan, u32 vind,

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.c

1007

u32 regindex;

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.c

1008

u32 bitindex;

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.c

1009

u32 bits;

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.c

1010

u32 vftabyte;

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.c

1055

u32 offset;

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.c

1056

u32 vlanbyte;

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.c

1079

s32 ixgbe_read_analog_reg8_82598(struct ixgbe_hw *hw, u32 reg, u8 *val)

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.c

1081

u32 atlas_ctl;

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.c

1103

s32 ixgbe_write_analog_reg8_82598(struct ixgbe_hw *hw, u32 reg, u8 val)

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.c

1105

u32 atlas_ctl;

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.c

1134

u32 i;

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.c

1230

u32 autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC);

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.c

1231

u32 pma_pmd_10g = autoc & IXGBE_AUTOC_10G_PMA_PMD_MASK;

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.c

1232

u32 pma_pmd_1g = autoc & IXGBE_AUTOC_1G_PMA_PMD_MASK;

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.c

1364

u32 regval;

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.c

1365

u32 i;

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.c

1395

u32 headroom, int strategy)

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.c

1397

u32 rxpktsize = IXGBE_RXPBSIZE_64KB;

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.c

1434

s32 ixgbe_enable_rx_dma_82598(struct ixgbe_hw *hw, u32 regval)

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.c

256

u32 regval;

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.c

257

u32 i;

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.c

301

u32 autoc = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.c

411

u32 fctrl_reg;

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.c

412

u32 rmcs_reg;

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.c

413

u32 reg;

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.c

414

u32 fcrtl, fcrth;

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.c

415

u32 link_speed = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.c

560

u32 autoc_reg;

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.c

561

u32 links_reg;

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.c

562

u32 i;

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.c

607

u32 timeout;

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.c

64

static s32 ixgbe_clear_vmdq_82598(struct ixgbe_hw *hw, u32 rar, u32 vmdq);

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.c

646

u32 links_reg;

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.c

647

u32 i;

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.c

67

u32 headroom, int strategy);

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.c

738

u32 curr_autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC);

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.c

739

u32 autoc = curr_autoc;

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.c

740

u32 link_mode = autoc & IXGBE_AUTOC_LMS_MASK;

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.c

814

u32 ctrl;

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.c

815

u32 gheccr;

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.c

816

u32 i;

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.c

817

u32 autoc;

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.c

82

u32 gcr = IXGBE_READ_REG(hw, IXGBE_GCR);

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.c

946

s32 ixgbe_set_vmdq_82598(struct ixgbe_hw *hw, u32 rar, u32 vmdq)

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.c

948

u32 rar_high;

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.c

949

u32 rar_entries = hw->mac.num_rar_entries;

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.c

972

static s32 ixgbe_clear_vmdq_82598(struct ixgbe_hw *hw, u32 rar, u32 vmdq)

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.c

974

u32 rar_high;

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.c

975

u32 rar_entries = hw->mac.num_rar_entries;

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.h

38

u32 ixgbe_get_pcie_msix_count_82598(struct ixgbe_hw *hw);

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.h

42

s32 ixgbe_set_vmdq_82598(struct ixgbe_hw *hw, u32 rar, u32 vmdq);

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.h

43

s32 ixgbe_set_vfta_82598(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on,

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.h

45

s32 ixgbe_read_analog_reg8_82598(struct ixgbe_hw *hw, u32 reg, u8 *val);

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.h

46

s32 ixgbe_write_analog_reg8_82598(struct ixgbe_hw *hw, u32 reg, u8 val);

usr/src/uts/common/io/ixgbe/core/ixgbe_82598.h

53

s32 ixgbe_enable_rx_dma_82598(struct ixgbe_hw *hw, u32 regval);

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

1059

u32 ctrl = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

1060

u32 i, autoc, autoc2;

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

1061

u32 curr_lms;

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

120

u32 esdp;

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

1234

static s32 ixgbe_fdir_check_cmd_complete(struct ixgbe_hw *hw, u32 *fdircmd)

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

1256

u32 fdirctrl = IXGBE_READ_REG(hw, IXGBE_FDIRCTRL);

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

1257

u32 fdircmd;

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

1326

static void ixgbe_fdir_enable_82599(struct ixgbe_hw *hw, u32 fdirctrl)

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

1368

s32 ixgbe_init_fdir_signature_82599(struct ixgbe_hw *hw, u32 fdirctrl)

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

1395

s32 ixgbe_init_fdir_perfect_82599(struct ixgbe_hw *hw, u32 fdirctrl,

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

1434

u32 fdirctrl;

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

1470

u32 n = (_n); \

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

1496

u32 ixgbe_atr_compute_sig_hash_82599(union ixgbe_atr_hash_dword input,

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

1499

u32 hi_hash_dword, lo_hash_dword, flow_vm_vlan;

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

1500

u32 sig_hash = 0, bucket_hash = 0, common_hash = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

1570

u32 fdircmd;

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

1598

fdircmd |= (u32)flow_type << IXGBE_FDIRCMD_FLOW_TYPE_SHIFT;

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

1599

fdircmd |= (u32)queue << IXGBE_FDIRCMD_RX_QUEUE_SHIFT;

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

1611

DEBUGOUT2("Tx Queue=%x hash=%x\n", queue, (u32)fdirhashcmd);

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

1618

u32 n = (_n); \

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

1640

u32 hi_hash_dword, lo_hash_dword, flow_vm_vlan;

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

1641

u32 bucket_hash = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

1642

u32 hi_dword = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

1643

u32 i = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

1693

static u32 ixgbe_get_fdirtcpm_82599(union ixgbe_atr_input *input_mask)

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

1695

u32 mask = IXGBE_NTOHS(input_mask->formatted.dst_port);

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

1697

mask |= (u32)IXGBE_NTOHS(input_mask->formatted.src_port);

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

1712

(((u32)(_value) >> 24) | (((u32)(_value) & 0x00FF0000) >> 8) | \

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

1713

(((u32)(_value) & 0x0000FF00) << 8) | ((u32)(_value) << 24))

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

1725

u32 fdirm = IXGBE_FDIRM_DIPv6;

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

1726

u32 fdirtcpm;

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

1727

u32 fdirip6m;

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

1808

fdirip6m = ((u32) 0xFFFFU << IXGBE_FDIRIP6M_DIPM_SHIFT);

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

1904

u32 fdirport, fdirvlan, fdirhash, fdircmd;

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

1905

u32 addr_low, addr_high;

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

1906

u32 cloud_type = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

1932

fdirport |= (u32)IXGBE_NTOHS(input->formatted.src_port);

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

1939

fdirvlan |= (u32)IXGBE_NTOHS(input->formatted.vlan_id);

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

1946

addr_low = ((u32)input->formatted.inner_mac[0] |

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

1947

((u32)input->formatted.inner_mac[1] << 8) |

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

1948

((u32)input->formatted.inner_mac[2] << 16) |

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

1949

((u32)input->formatted.inner_mac[3] << 24));

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

1950

addr_high = ((u32)input->formatted.inner_mac[4] |

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

1951

((u32)input->formatted.inner_mac[5] << 8));

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

1977

fdircmd |= (u32)queue << IXGBE_FDIRCMD_RX_QUEUE_SHIFT;

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

1978

fdircmd |= (u32)input->formatted.vm_pool << IXGBE_FDIRCMD_VT_POOL_SHIFT;

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

1994

u32 fdirhash;

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

1995

u32 fdircmd;

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

2103

s32 ixgbe_read_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 *val)

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

2105

u32 core_ctl;

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

2127

s32 ixgbe_write_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 val)

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

2129

u32 core_ctl;

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

2216

u32 autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC);

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

2217

u32 autoc2 = IXGBE_READ_REG(hw, IXGBE_AUTOC2);

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

2218

u32 pma_pmd_10g_serial = autoc2 & IXGBE_AUTOC2_10G_SERIAL_PMA_PMD_MASK;

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

2219

u32 pma_pmd_10g_parallel = autoc & IXGBE_AUTOC_10G_PMA_PMD_MASK;

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

2220

u32 pma_pmd_1g = autoc & IXGBE_AUTOC_1G_PMA_PMD_MASK;

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

2301

s32 ixgbe_enable_rx_dma_82599(struct ixgbe_hw *hw, u32 regval)

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

250

s32 prot_autoc_read_82599(struct ixgbe_hw *hw, bool *locked, u32 *reg_val)

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

2510

u32 anlp1_reg = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

2511

u32 i, autoc_reg, autoc2_reg;

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

2563

u32 esdp;

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

2621

u32 esdp;

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

279

s32 prot_autoc_write_82599(struct ixgbe_hw *hw, u32 autoc, bool locked)

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

427

u32 autoc = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

612

u32 autoc2_reg;

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

637

u32 autoc_reg;

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

638

u32 links_reg;

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

639

u32 i;

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

704

u32 esdp_reg = IXGBE_READ_REG(hw, IXGBE_ESDP);

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

727

u32 esdp_reg = IXGBE_READ_REG(hw, IXGBE_ESDP);

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

773

u32 esdp_reg = IXGBE_READ_REG(hw, IXGBE_ESDP);

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

808

u32 autoc_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC);

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

918

u32 pma_pmd_1g, link_mode;

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

919

u32 current_autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC); /* holds the value of AUTOC register at this current point in time */

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

920

u32 orig_autoc = 0; /* holds the cached value of AUTOC register */

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

921

u32 autoc = current_autoc; /* Temporary variable used for comparison purposes */

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

922

u32 autoc2 = IXGBE_READ_REG(hw, IXGBE_AUTOC2);

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

923

u32 pma_pmd_10g_serial = autoc2 & IXGBE_AUTOC2_10G_SERIAL_PMA_PMD_MASK;

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

924

u32 links_reg;

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.c

925

u32 i;

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.h

56

s32 ixgbe_read_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 *val);

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.h

57

s32 ixgbe_write_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 val);

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.h

62

s32 ixgbe_enable_rx_dma_82599(struct ixgbe_hw *hw, u32 regval);

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.h

63

s32 prot_autoc_read_82599(struct ixgbe_hw *hw, bool *locked, u32 *reg_val);

usr/src/uts/common/io/ixgbe/core/ixgbe_82599.h

64

s32 prot_autoc_write_82599(struct ixgbe_hw *hw, u32 reg_val, bool locked);

usr/src/uts/common/io/ixgbe/core/ixgbe_api.c

1008

s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)

usr/src/uts/common/io/ixgbe/core/ixgbe_api.c

1032

u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw)

usr/src/uts/common/io/ixgbe/core/ixgbe_api.c

1049

u32 addr_count, ixgbe_mc_addr_itr func)

usr/src/uts/common/io/ixgbe/core/ixgbe_api.c

1070

u32 mc_addr_count, ixgbe_mc_addr_itr func,

usr/src/uts/common/io/ixgbe/core/ixgbe_api.c

1124

s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on,

usr/src/uts/common/io/ixgbe/core/ixgbe_api.c

1144

s32 ixgbe_set_vlvf(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on,

usr/src/uts/common/io/ixgbe/core/ixgbe_api.c

1145

u32 *vfta_delta, u32 vfta, bool vlvf_bypass)

usr/src/uts/common/io/ixgbe/core/ixgbe_api.c

1159

s32 ixgbe_toggle_txdctl(struct ixgbe_hw *hw, u32 vind)

usr/src/uts/common/io/ixgbe/core/ixgbe_api.c

1321

s32 ixgbe_read_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,

usr/src/uts/common/io/ixgbe/core/ixgbe_api.c

1322

u32 device_type, u32 *phy_data)

usr/src/uts/common/io/ixgbe/core/ixgbe_api.c

1337

s32 ixgbe_write_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,

usr/src/uts/common/io/ixgbe/core/ixgbe_api.c

1338

u32 device_type, u32 phy_data)

usr/src/uts/common/io/ixgbe/core/ixgbe_api.c

1372

void ixgbe_mdd_event(struct ixgbe_hw *hw, u32 *vf_bitmap)

usr/src/uts/common/io/ixgbe/core/ixgbe_api.c

1385

void ixgbe_restore_mdd_vf(struct ixgbe_hw *hw, u32 vf)

usr/src/uts/common/io/ixgbe/core/ixgbe_api.c

1441

s32 ixgbe_bypass_rw(struct ixgbe_hw *hw, u32 cmd, u32 *status)

usr/src/uts/common/io/ixgbe/core/ixgbe_api.c

1459

bool ixgbe_bypass_valid_rd(struct ixgbe_hw *hw, u32 in_reg, u32 out_reg)

usr/src/uts/common/io/ixgbe/core/ixgbe_api.c

1477

s32 ixgbe_bypass_set(struct ixgbe_hw *hw, u32 cmd, u32 event, u32 action)

usr/src/uts/common/io/ixgbe/core/ixgbe_api.c

1490

s32 ixgbe_bypass_rd_eep(struct ixgbe_hw *hw, u32 addr, u8 *value)

usr/src/uts/common/io/ixgbe/core/ixgbe_api.c

1504

s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val)

usr/src/uts/common/io/ixgbe/core/ixgbe_api.c

1518

s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val)

usr/src/uts/common/io/ixgbe/core/ixgbe_api.c

1715

s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval)

usr/src/uts/common/io/ixgbe/core/ixgbe_api.c

1753

s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u32 mask)

usr/src/uts/common/io/ixgbe/core/ixgbe_api.c

1767

void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u32 mask)

usr/src/uts/common/io/ixgbe/core/ixgbe_api.c

40

static const u32 ixgbe_mvals_base[IXGBE_MVALS_IDX_LIMIT] = {

usr/src/uts/common/io/ixgbe/core/ixgbe_api.c

44

static const u32 ixgbe_mvals_X540[IXGBE_MVALS_IDX_LIMIT] = {

usr/src/uts/common/io/ixgbe/core/ixgbe_api.c

457

u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw)

usr/src/uts/common/io/ixgbe/core/ixgbe_api.c

468

u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw)

usr/src/uts/common/io/ixgbe/core/ixgbe_api.c

48

static const u32 ixgbe_mvals_X550[IXGBE_MVALS_IDX_LIMIT] = {

usr/src/uts/common/io/ixgbe/core/ixgbe_api.c

496

s32 ixgbe_read_pba_string(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size)

usr/src/uts/common/io/ixgbe/core/ixgbe_api.c

508

s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num)

usr/src/uts/common/io/ixgbe/core/ixgbe_api.c

52

static const u32 ixgbe_mvals_X550EM_x[IXGBE_MVALS_IDX_LIMIT] = {

usr/src/uts/common/io/ixgbe/core/ixgbe_api.c

56

static const u32 ixgbe_mvals_X550EM_a[IXGBE_MVALS_IDX_LIMIT] = {

usr/src/uts/common/io/ixgbe/core/ixgbe_api.c

575

s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,

usr/src/uts/common/io/ixgbe/core/ixgbe_api.c

594

s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,

usr/src/uts/common/io/ixgbe/core/ixgbe_api.c

784

s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index)

usr/src/uts/common/io/ixgbe/core/ixgbe_api.c

797

s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index)

usr/src/uts/common/io/ixgbe/core/ixgbe_api.c

810

s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index)

usr/src/uts/common/io/ixgbe/core/ixgbe_api.c

823

s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index)

usr/src/uts/common/io/ixgbe/core/ixgbe_api.c

941

s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq)

usr/src/uts/common/io/ixgbe/core/ixgbe_api.c

958

s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,

usr/src/uts/common/io/ixgbe/core/ixgbe_api.c

959

u32 enable_addr)

usr/src/uts/common/io/ixgbe/core/ixgbe_api.c

972

s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index)

usr/src/uts/common/io/ixgbe/core/ixgbe_api.c

984

s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)

usr/src/uts/common/io/ixgbe/core/ixgbe_api.c

996

s32 ixgbe_set_vmdq_san_mac(struct ixgbe_hw *hw, u32 vmdq)

usr/src/uts/common/io/ixgbe/core/ixgbe_api.h

112

s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq);

usr/src/uts/common/io/ixgbe/core/ixgbe_api.h

113

s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,

usr/src/uts/common/io/ixgbe/core/ixgbe_api.h

114

u32 enable_addr);

usr/src/uts/common/io/ixgbe/core/ixgbe_api.h

115

s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index);

usr/src/uts/common/io/ixgbe/core/ixgbe_api.h

116

s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq);

usr/src/uts/common/io/ixgbe/core/ixgbe_api.h

117

s32 ixgbe_set_vmdq_san_mac(struct ixgbe_hw *hw, u32 vmdq);

usr/src/uts/common/io/ixgbe/core/ixgbe_api.h

118

s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq);

usr/src/uts/common/io/ixgbe/core/ixgbe_api.h

120

u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw);

usr/src/uts/common/io/ixgbe/core/ixgbe_api.h

122

u32 addr_count, ixgbe_mc_addr_itr func);

usr/src/uts/common/io/ixgbe/core/ixgbe_api.h

124

u32 mc_addr_count, ixgbe_mc_addr_itr func,

usr/src/uts/common/io/ixgbe/core/ixgbe_api.h

126

void ixgbe_add_uc_addr(struct ixgbe_hw *hw, u8 *addr_list, u32 vmdq);

usr/src/uts/common/io/ixgbe/core/ixgbe_api.h

130

s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan,

usr/src/uts/common/io/ixgbe/core/ixgbe_api.h

131

u32 vind, bool vlan_on, bool vlvf_bypass);

usr/src/uts/common/io/ixgbe/core/ixgbe_api.h

132

s32 ixgbe_set_vlvf(struct ixgbe_hw *hw, u32 vlan, u32 vind,

usr/src/uts/common/io/ixgbe/core/ixgbe_api.h

133

bool vlan_on, u32 *vfta_delta, u32 vfta,

usr/src/uts/common/io/ixgbe/core/ixgbe_api.h

135

s32 ixgbe_toggle_txdctl(struct ixgbe_hw *hw, u32 vind);

usr/src/uts/common/io/ixgbe/core/ixgbe_api.h

145

s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val);

usr/src/uts/common/io/ixgbe/core/ixgbe_api.h

146

s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val);

usr/src/uts/common/io/ixgbe/core/ixgbe_api.h

150

s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval);

usr/src/uts/common/io/ixgbe/core/ixgbe_api.h

154

s32 ixgbe_init_fdir_signature_82599(struct ixgbe_hw *hw, u32 fdirctrl);

usr/src/uts/common/io/ixgbe/core/ixgbe_api.h

155

s32 ixgbe_init_fdir_perfect_82599(struct ixgbe_hw *hw, u32 fdirctrl,

usr/src/uts/common/io/ixgbe/core/ixgbe_api.h

177

u32 ixgbe_atr_compute_sig_hash_82599(union ixgbe_atr_hash_dword input,

usr/src/uts/common/io/ixgbe/core/ixgbe_api.h

197

s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u32 mask);

usr/src/uts/common/io/ixgbe/core/ixgbe_api.h

198

void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u32 mask);

usr/src/uts/common/io/ixgbe/core/ixgbe_api.h

203

s32 ixgbe_bypass_rw(struct ixgbe_hw *hw, u32 cmd, u32 *status);

usr/src/uts/common/io/ixgbe/core/ixgbe_api.h

204

s32 ixgbe_bypass_set(struct ixgbe_hw *hw, u32 cmd, u32 event, u32 action);

usr/src/uts/common/io/ixgbe/core/ixgbe_api.h

205

s32 ixgbe_bypass_rd_eep(struct ixgbe_hw *hw, u32 addr, u8 *value);

usr/src/uts/common/io/ixgbe/core/ixgbe_api.h

206

bool ixgbe_bypass_valid_rd(struct ixgbe_hw *hw, u32 in_reg, u32 out_reg);

usr/src/uts/common/io/ixgbe/core/ixgbe_api.h

215

s32 ixgbe_read_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,

usr/src/uts/common/io/ixgbe/core/ixgbe_api.h

216

u32 device_type, u32 *phy_data);

usr/src/uts/common/io/ixgbe/core/ixgbe_api.h

217

s32 ixgbe_write_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,

usr/src/uts/common/io/ixgbe/core/ixgbe_api.h

218

u32 device_type, u32 phy_data);

usr/src/uts/common/io/ixgbe/core/ixgbe_api.h

221

void ixgbe_mdd_event(struct ixgbe_hw *hw, u32 *vf_bitmap);

usr/src/uts/common/io/ixgbe/core/ixgbe_api.h

222

void ixgbe_restore_mdd_vf(struct ixgbe_hw *hw, u32 vf);

usr/src/uts/common/io/ixgbe/core/ixgbe_api.h

229

s32 ixgbe_negotiate_fc(struct ixgbe_hw *hw, u32 adv_reg, u32 lp_reg,

usr/src/uts/common/io/ixgbe/core/ixgbe_api.h

230

u32 adv_sym, u32 adv_asm, u32 lp_sym, u32 lp_asm);

usr/src/uts/common/io/ixgbe/core/ixgbe_api.h

63

u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw);

usr/src/uts/common/io/ixgbe/core/ixgbe_api.h

64

u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw);

usr/src/uts/common/io/ixgbe/core/ixgbe_api.h

66

s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num);

usr/src/uts/common/io/ixgbe/core/ixgbe_api.h

67

s32 ixgbe_read_pba_string(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size);

usr/src/uts/common/io/ixgbe/core/ixgbe_api.h

71

s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,

usr/src/uts/common/io/ixgbe/core/ixgbe_api.h

73

s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,

usr/src/uts/common/io/ixgbe/core/ixgbe_api.h

96

s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index);

usr/src/uts/common/io/ixgbe/core/ixgbe_api.h

97

s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index);

usr/src/uts/common/io/ixgbe/core/ixgbe_api.h

98

s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index);

usr/src/uts/common/io/ixgbe/core/ixgbe_api.h

99

s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index);

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

1089

u32 reg;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

1122

u32 reg_val;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

1175

u32 led_reg, led_mode;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

1211

s32 ixgbe_led_on_generic(struct ixgbe_hw *hw, u32 index)

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

1213

u32 led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

1234

s32 ixgbe_led_off_generic(struct ixgbe_hw *hw, u32 index)

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

1236

u32 led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

1262

u32 eec;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

1619

u32 eerd;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

1621

u32 i;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

1727

u32 eewr;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

1792

s32 ixgbe_poll_eerd_eewr_done(struct ixgbe_hw *hw, u32 ee_reg)

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

1794

u32 i;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

1795

u32 reg;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

1830

u32 eec;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

1831

u32 i;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

1884

u32 timeout = 2000;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

1885

u32 i;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

1886

u32 swsm;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

1973

u32 swsm;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

2032

u32 eec;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

2058

u32 eec;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

2059

u32 mask;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

2060

u32 i;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

2113

u32 eec;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

2114

u32 i;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

2151

static void ixgbe_raise_eeprom_clk(struct ixgbe_hw *hw, u32 *eec)

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

2170

static void ixgbe_lower_eeprom_clk(struct ixgbe_hw *hw, u32 *eec)

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

2190

u32 eec;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

2393

s32 ixgbe_set_rar_generic(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

2394

u32 enable_addr)

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

2396

u32 rar_low, rar_high;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

2397

u32 rar_entries = hw->mac.num_rar_entries;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

2415

rar_low = ((u32)addr[0] |

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

2416

((u32)addr[1] << 8) |

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

2417

((u32)addr[2] << 16) |

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

2418

((u32)addr[3] << 24));

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

242

u32 reg = 0, reg_bp = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

2426

rar_high |= ((u32)addr[4] | ((u32)addr[5] << 8));

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

2444

s32 ixgbe_clear_rar_generic(struct ixgbe_hw *hw, u32 index)

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

2446

u32 rar_high;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

2447

u32 rar_entries = hw->mac.num_rar_entries;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

2485

u32 i;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

2486

u32 rar_entries = hw->mac.num_rar_entries;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

2552

void ixgbe_add_uc_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq)

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

2554

u32 rar_entries = hw->mac.num_rar_entries;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

2555

u32 rar;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

2593

u32 addr_count, ixgbe_mc_addr_itr next)

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

2596

u32 i;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

2597

u32 old_promisc_setting = hw->addr_ctrl.overflow_promisc;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

2598

u32 uc_addr_in_use;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

2599

u32 fctrl;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

2600

u32 vmdq;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

2662

u32 vector = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

2699

u32 vector;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

2700

u32 vector_bit;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

2701

u32 vector_reg;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

2736

u32 mc_addr_count, ixgbe_mc_addr_itr next,

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

2739

u32 i;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

2740

u32 vmdq;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

2822

u32 mflcn_reg, fccfg_reg;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

2823

u32 reg;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

2824

u32 fcrtl, fcrth;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

2959

s32 ixgbe_negotiate_fc(struct ixgbe_hw *hw, u32 adv_reg, u32 lp_reg,

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

2960

u32 adv_sym, u32 adv_asm, u32 lp_sym, u32 lp_asm)

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

3008

u32 pcs_anadv_reg, pcs_lpab_reg, linkstat;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

3045

u32 links2, anlp1_reg, autoc_reg, links;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

3099

return ixgbe_negotiate_fc(hw, (u32)technology_ability_reg,

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

3100

(u32)lp_technology_ability_reg,

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

3182

static u32 ixgbe_pcie_timeout_poll(struct ixgbe_hw *hw)

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

3185

u32 pollcnt;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

3231

u32 i, poll;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

3295

s32 ixgbe_acquire_swfw_sync(struct ixgbe_hw *hw, u32 mask)

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

3297

u32 gssr = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

3298

u32 swmask = mask;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

3299

u32 fwmask = mask << 5;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

3300

u32 timeout = 200;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

3301

u32 i;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

3342

void ixgbe_release_swfw_sync(struct ixgbe_hw *hw, u32 mask)

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

3344

u32 gssr;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

3345

u32 swmask = mask;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

3402

s32 prot_autoc_read_generic(struct ixgbe_hw *hw, bool *locked, u32 *reg_val)

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

3418

s32 prot_autoc_write_generic(struct ixgbe_hw *hw, u32 reg_val, bool locked)

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

3434

u32 secrxreg;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

3453

s32 ixgbe_enable_rx_dma_generic(struct ixgbe_hw *hw, u32 regval)

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

3470

s32 ixgbe_blink_led_start_generic(struct ixgbe_hw *hw, u32 index)

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

3474

u32 autoc_reg = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

3475

u32 led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

3520

s32 ixgbe_blink_led_stop_generic(struct ixgbe_hw *hw, u32 index)

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

3522

u32 autoc_reg = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

3523

u32 led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

3734

s32 ixgbe_insert_mac_addr_generic(struct ixgbe_hw *hw, u8 *addr, u32 vmdq)

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

3736

static const u32 NO_EMPTY_RAR_FOUND = 0xFFFFFFFF;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

3737

u32 first_empty_rar = NO_EMPTY_RAR_FOUND;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

3738

u32 rar;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

3739

u32 rar_low, rar_high;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

3740

u32 addr_low, addr_high;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

3800

s32 ixgbe_clear_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq)

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

3802

u32 mpsar_lo, mpsar_hi;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

3803

u32 rar_entries = hw->mac.num_rar_entries;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

3854

s32 ixgbe_set_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq)

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

3856

u32 mpsar;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

3857

u32 rar_entries = hw->mac.num_rar_entries;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

3891

s32 ixgbe_set_vmdq_san_mac_generic(struct ixgbe_hw *hw, u32 vmdq)

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

3893

u32 rar = hw->mac.san_mac_rar_index;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

3936

s32 ixgbe_find_vlvf_slot(struct ixgbe_hw *hw, u32 vlan, bool vlvf_bypass)

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

3939

u32 bits;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

3986

s32 ixgbe_set_vfta_generic(struct ixgbe_hw *hw, u32 vlan, u32 vind,

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

3989

u32 regidx, vfta_delta, vfta;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

402

u32 ctrl_ext;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

4053

s32 ixgbe_set_vlvf_generic(struct ixgbe_hw *hw, u32 vlan, u32 vind,

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

4054

bool vlan_on, u32 *vfta_delta, u32 vfta,

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

4057

u32 bits;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

4137

u32 offset;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

4160

s32 ixgbe_toggle_txdctl_generic(struct ixgbe_hw *hw, u32 vf_number)

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

4163

u32 offset, reg;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

4246

u32 links_reg, links_orig;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

4247

u32 i;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

4255

u32 sfp_cage_full;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

4473

u32 pfvfspoof;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

4497

u32 pfvfspoof;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

4534

u32 regval;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

4535

u32 i;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

4562

u8 ixgbe_calculate_checksum(u8 *buffer, u32 length)

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

4564

u32 i;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

4592

s32 ixgbe_hic_unlocked(struct ixgbe_hw *hw, u32 *buffer, u32 length,

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

4593

u32 timeout)

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

4595

u32 hicr, i, fwsts;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

4617

if (length % sizeof(u32)) {

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

465

u32 i;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

466

u32 regval;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

4677

s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer,

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

4678

u32 length, u32 timeout, bool return_data)

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

4680

u32 hdr_size = sizeof(struct ixgbe_hic_hdr);

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

4684

u32 bi;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

4685

u32 dword_len;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

4798

ret_val = ixgbe_host_interface_command(hw, (u32 *)&fw_cmd,

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

4824

void ixgbe_set_rxpba_generic(struct ixgbe_hw *hw, int num_pb, u32 headroom,

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

4827

u32 pbsize = hw->mac.rx_pb_size;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

4829

u32 rxpktsize, txpktsize, txpbthresh;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

4889

u32 gcr_ext, hlreg0, i, poll;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

49

static void ixgbe_raise_eeprom_clk(struct ixgbe_hw *hw, u32 *eec);

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

50

static void ixgbe_lower_eeprom_clk(struct ixgbe_hw *hw, u32 *eec);

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

5118

s32 ixgbe_bypass_rw_generic(struct ixgbe_hw *hw, u32 cmd, u32 *status)

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

5121

u32 sck, sdi, sdo, dir_sck, dir_sdi, dir_sdo;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

5122

u32 esdp;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

5231

bool ixgbe_bypass_valid_rd_generic(u32 in_reg, u32 out_reg)

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

5233

u32 mask;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

5287

s32 ixgbe_bypass_set_generic(struct ixgbe_hw *hw, u32 ctrl, u32 event,

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

5288

u32 action)

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

5290

u32 by_ctl = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

5291

u32 cmd, verify;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

5292

u32 count = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

5329

s32 ixgbe_bypass_rd_eep_generic(struct ixgbe_hw *hw, u32 addr, u8 *value)

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

5331

u32 cmd;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

5332

u32 status;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

5574

u32 reg, i;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

5585

u32 pfdtxgswc;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

5586

u32 rxctrl;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

5607

u32 pfdtxgswc;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

5608

u32 rxctrl;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

5629

u32 fwsm;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

5647

u32 fwsm, manc, factps;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

5681

u32 speedcnt = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

5682

u32 i = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

648

u32 pba_num_size)

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

727

if (pba_num_size < (((u32)length * 2) - 1)) {

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

73

u32 eec = IXGBE_READ_REG(hw, IXGBE_EEC_BY_MAC(hw));

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

757

s32 ixgbe_read_pba_num_generic(struct ixgbe_hw *hw, u32 *pba_num)

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

772

*pba_num = (u32)(data << 16);

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

779

*pba_num |= (u32)data;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

797

u32 eeprom_buf_size, u16 max_pba_block_size,

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

840

if (eeprom_buf_size > (u32)(pba->word[1] +

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

866

u32 eeprom_buf_size, struct ixgbe_pba *pba)

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

898

if (eeprom_buf_size > (u32)(pba->word[1] +

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

925

u32 eeprom_buf_size, u16 *pba_block_size)

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

984

u32 rar_high;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.c

985

u32 rar_low;

usr/src/uts/common/io/ixgbe/core/ixgbe_common.h

102

u32 mc_addr_count,

usr/src/uts/common/io/ixgbe/core/ixgbe_common.h

105

u32 addr_count, ixgbe_mc_addr_itr func);

usr/src/uts/common/io/ixgbe/core/ixgbe_common.h

108

s32 ixgbe_enable_rx_dma_generic(struct ixgbe_hw *hw, u32 regval);

usr/src/uts/common/io/ixgbe/core/ixgbe_common.h

118

s32 ixgbe_acquire_swfw_sync(struct ixgbe_hw *hw, u32 mask);

usr/src/uts/common/io/ixgbe/core/ixgbe_common.h

119

void ixgbe_release_swfw_sync(struct ixgbe_hw *hw, u32 mask);

usr/src/uts/common/io/ixgbe/core/ixgbe_common.h

122

s32 prot_autoc_read_generic(struct ixgbe_hw *hw, bool *, u32 *reg_val);

usr/src/uts/common/io/ixgbe/core/ixgbe_common.h

123

s32 prot_autoc_write_generic(struct ixgbe_hw *hw, u32 reg_val, bool locked);

usr/src/uts/common/io/ixgbe/core/ixgbe_common.h

125

s32 ixgbe_blink_led_start_generic(struct ixgbe_hw *hw, u32 index);

usr/src/uts/common/io/ixgbe/core/ixgbe_common.h

126

s32 ixgbe_blink_led_stop_generic(struct ixgbe_hw *hw, u32 index);

usr/src/uts/common/io/ixgbe/core/ixgbe_common.h

131

s32 ixgbe_set_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq);

usr/src/uts/common/io/ixgbe/core/ixgbe_common.h

132

s32 ixgbe_set_vmdq_san_mac_generic(struct ixgbe_hw *hw, u32 vmdq);

usr/src/uts/common/io/ixgbe/core/ixgbe_common.h

133

s32 ixgbe_clear_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq);

usr/src/uts/common/io/ixgbe/core/ixgbe_common.h

134

s32 ixgbe_insert_mac_addr_generic(struct ixgbe_hw *hw, u8 *addr, u32 vmdq);

usr/src/uts/common/io/ixgbe/core/ixgbe_common.h

136

s32 ixgbe_set_vfta_generic(struct ixgbe_hw *hw, u32 vlan,

usr/src/uts/common/io/ixgbe/core/ixgbe_common.h

137

u32 vind, bool vlan_on, bool vlvf_bypass);

usr/src/uts/common/io/ixgbe/core/ixgbe_common.h

138

s32 ixgbe_set_vlvf_generic(struct ixgbe_hw *hw, u32 vlan, u32 vind,

usr/src/uts/common/io/ixgbe/core/ixgbe_common.h

139

bool vlan_on, u32 *vfta_delta, u32 vfta,

usr/src/uts/common/io/ixgbe/core/ixgbe_common.h

142

s32 ixgbe_find_vlvf_slot(struct ixgbe_hw *hw, u32 vlan, bool vlvf_bypass);

usr/src/uts/common/io/ixgbe/core/ixgbe_common.h

143

s32 ixgbe_toggle_txdctl_generic(struct ixgbe_hw *hw, u32 vind);

usr/src/uts/common/io/ixgbe/core/ixgbe_common.h

156

void ixgbe_set_rxpba_generic(struct ixgbe_hw *hw, int num_pb, u32 headroom,

usr/src/uts/common/io/ixgbe/core/ixgbe_common.h

161

u8 ixgbe_calculate_checksum(u8 *buffer, u32 length);

usr/src/uts/common/io/ixgbe/core/ixgbe_common.h

162

s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer,

usr/src/uts/common/io/ixgbe/core/ixgbe_common.h

163

u32 length, u32 timeout, bool return_data);

usr/src/uts/common/io/ixgbe/core/ixgbe_common.h

164

s32 ixgbe_hic_unlocked(struct ixgbe_hw *, u32 *buffer, u32 length, u32 timeout);

usr/src/uts/common/io/ixgbe/core/ixgbe_common.h

167

u32 (*data)[FW_PHY_ACT_DATA_COUNT]);

usr/src/uts/common/io/ixgbe/core/ixgbe_common.h

169

s32 ixgbe_bypass_rw_generic(struct ixgbe_hw *hw, u32 cmd, u32 *status);

usr/src/uts/common/io/ixgbe/core/ixgbe_common.h

170

bool ixgbe_bypass_valid_rd_generic(u32 in_reg, u32 out_reg);

usr/src/uts/common/io/ixgbe/core/ixgbe_common.h

171

s32 ixgbe_bypass_set_generic(struct ixgbe_hw *hw, u32 ctrl, u32 event,

usr/src/uts/common/io/ixgbe/core/ixgbe_common.h

172

u32 action);

usr/src/uts/common/io/ixgbe/core/ixgbe_common.h

173

s32 ixgbe_bypass_rd_eep_generic(struct ixgbe_hw *hw, u32 addr, u8 *value);

usr/src/uts/common/io/ixgbe/core/ixgbe_common.h

41

IXGBE_WRITE_REG(hw, reg, (u32) value); \

usr/src/uts/common/io/ixgbe/core/ixgbe_common.h

42

IXGBE_WRITE_REG(hw, reg + 4, (u32) (value >> 32)); \

usr/src/uts/common/io/ixgbe/core/ixgbe_common.h

57

s32 ixgbe_read_pba_num_generic(struct ixgbe_hw *hw, u32 *pba_num);

usr/src/uts/common/io/ixgbe/core/ixgbe_common.h

59

u32 pba_num_size);

usr/src/uts/common/io/ixgbe/core/ixgbe_common.h

61

u32 eeprom_buf_size, u16 max_pba_block_size,

usr/src/uts/common/io/ixgbe/core/ixgbe_common.h

64

u32 eeprom_buf_size, struct ixgbe_pba *pba);

usr/src/uts/common/io/ixgbe/core/ixgbe_common.h

66

u32 eeprom_buf_size, u16 *pba_block_size);

usr/src/uts/common/io/ixgbe/core/ixgbe_common.h

73

s32 ixgbe_led_on_generic(struct ixgbe_hw *hw, u32 index);

usr/src/uts/common/io/ixgbe/core/ixgbe_common.h

74

s32 ixgbe_led_off_generic(struct ixgbe_hw *hw, u32 index);

usr/src/uts/common/io/ixgbe/core/ixgbe_common.h

95

s32 ixgbe_poll_eerd_eewr_done(struct ixgbe_hw *hw, u32 ee_reg);

usr/src/uts/common/io/ixgbe/core/ixgbe_common.h

97

s32 ixgbe_set_rar_generic(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,

usr/src/uts/common/io/ixgbe/core/ixgbe_common.h

98

u32 enable_addr);

usr/src/uts/common/io/ixgbe/core/ixgbe_common.h

99

s32 ixgbe_clear_rar_generic(struct ixgbe_hw *hw, u32 index);

usr/src/uts/common/io/ixgbe/core/ixgbe_dcb.c

103

u32 min_credit = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_dcb.c

104

u32 credit_refill = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_dcb.c

105

u32 credit_max = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_dcb.c

156

(u32)IXGBE_DCB_MAX_CREDIT_REFILL);

usr/src/uts/common/io/ixgbe/core/ixgbe_dcb.c

96

u32 max_frame_size, u8 direction)

usr/src/uts/common/io/ixgbe/core/ixgbe_dcb.c

99

u32 min_multiplier = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_dcb.h

131

u32 dcb_cfg_version; /* Not used...OS-specific? */

usr/src/uts/common/io/ixgbe/core/ixgbe_dcb.h

132

u32 link_speed; /* For bandwidth allocation validation purpose */

usr/src/uts/common/io/ixgbe/core/ixgbe_dcb.h

144

struct ixgbe_dcb_config *, u32, u8);

usr/src/uts/common/io/ixgbe/core/ixgbe_dcb.h

67

u32 capabilities; /* DCB capabilities */

usr/src/uts/common/io/ixgbe/core/ixgbe_dcb_82598.c

115

u32 reg = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_dcb_82598.c

116

u32 credit_refill = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_dcb_82598.c

117

u32 credit_max = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_dcb_82598.c

174

u32 reg, max_credits;

usr/src/uts/common/io/ixgbe/core/ixgbe_dcb_82598.c

192

reg |= (u32)(refill[i]);

usr/src/uts/common/io/ixgbe/core/ixgbe_dcb_82598.c

193

reg |= (u32)(bwg_id[i]) << IXGBE_TDTQ2TCCR_BWG_SHIFT;

usr/src/uts/common/io/ixgbe/core/ixgbe_dcb_82598.c

221

u32 reg;

usr/src/uts/common/io/ixgbe/core/ixgbe_dcb_82598.c

235

reg |= (u32)(max[i]) << IXGBE_TDPT2TCCR_MCL_SHIFT;

usr/src/uts/common/io/ixgbe/core/ixgbe_dcb_82598.c

236

reg |= (u32)(bwg_id[i]) << IXGBE_TDPT2TCCR_BWG_SHIFT;

usr/src/uts/common/io/ixgbe/core/ixgbe_dcb_82598.c

264

u32 fcrtl, reg;

usr/src/uts/common/io/ixgbe/core/ixgbe_dcb_82598.c

316

u32 reg = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_dcb_82599.c

125

u32 reg = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_dcb_82599.c

126

u32 credit_refill = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_dcb_82599.c

127

u32 credit_max = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_dcb_82599.c

155

reg |= (u32)(bwg_id[i]) << IXGBE_RTRPT4C_BWG_SHIFT;

usr/src/uts/common/io/ixgbe/core/ixgbe_dcb_82599.c

186

u32 reg, max_credits;

usr/src/uts/common/io/ixgbe/core/ixgbe_dcb_82599.c

199

reg |= (u32)(refill[i]);

usr/src/uts/common/io/ixgbe/core/ixgbe_dcb_82599.c

200

reg |= (u32)(bwg_id[i]) << IXGBE_RTTDT2C_BWG_SHIFT;

usr/src/uts/common/io/ixgbe/core/ixgbe_dcb_82599.c

236

u32 reg;

usr/src/uts/common/io/ixgbe/core/ixgbe_dcb_82599.c

263

reg |= (u32)(max[i]) << IXGBE_RTTPT2C_MCL_SHIFT;

usr/src/uts/common/io/ixgbe/core/ixgbe_dcb_82599.c

264

reg |= (u32)(bwg_id[i]) << IXGBE_RTTPT2C_BWG_SHIFT;

usr/src/uts/common/io/ixgbe/core/ixgbe_dcb_82599.c

296

u32 i, j, fcrtl, reg;

usr/src/uts/common/io/ixgbe/core/ixgbe_dcb_82599.c

384

u32 reg = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_dcb_82599.c

510

u32 reg;

usr/src/uts/common/io/ixgbe/core/ixgbe_dcb_82599.c

511

u32 q;

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

1036

void *buf, u32 cap_count)

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

1039

u32 i;

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

1087

u32 *cap_count, enum ixgbe_aci_opc opc)

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

1121

u32 status, cap_count = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

113

u32 hicr = 0, tmp_buf_size = 0, i = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

114

u32 *raw_desc = (u32 *)desc;

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

1159

u32 cap_count = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

117

u32 *tmp_buf = NULL;

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

161

tmp_buf = (u32*)ixgbe_malloc(hw, tmp_buf_size);

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

2028

u32 start_address, u8 *data, u8 data_size)

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

2067

u32 fla;

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

2086

u32 fla;

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

2111

s32 ixgbe_aci_read_nvm(struct ixgbe_hw *hw, u16 module_typeid, u32 offset,

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

2190

u32 offset, u16 length, void *data,

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

2411

static u32 ixgbe_get_flash_bank_offset(struct ixgbe_hw *hw,

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

2418

u32 offset, size;

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

2486

u16 module, u32 offset, u8 *data, u32 length)

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

2489

u32 start;

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

2520

u32 offset, u16 *data)

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

2549

u32 offset, u16 *data)

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

2578

u32 *hdr_len)

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

2581

u32 hdr_len_dword;

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

2617

u32 offset, u16 *data)

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

2619

u32 hdr_len;

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

2759

enum ixgbe_bank_select bank, u32 *srev)

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

2968

static s32 ixgbe_read_sr_pointer(struct ixgbe_hw *hw, u16 offset, u32 *pointer)

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

3001

static s32 ixgbe_read_sr_area_size(struct ixgbe_hw *hw, u16 offset, u32 *size)

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

3028

u32 min_size = 0, max_size = IXGBE_ACI_NVM_MAX_OFFSET + 1;

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

3036

u32 offset = (max_size + min_size) / 2;

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

3037

u32 len = 1;

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

3156

u32 fla, gens_stat, status;

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

3270

u32 bytes = sizeof(u16);

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

3298

u32 bytes = *words * 2, i;

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

3329

s32 ixgbe_read_flat_nvm(struct ixgbe_hw *hw, u32 offset, u32 *length,

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

3332

u32 inlen = *length;

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

3333

u32 bytes_read = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

3346

u32 read_size, sector_offset;

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

3353

read_size = MIN_T(u32,

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

3393

static s32 ixgbe_check_sr_access_params(struct ixgbe_hw *hw, u32 offset,

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

3428

s32 ixgbe_write_sr_word_aci(struct ixgbe_hw *hw, u32 offset, const u16 *data)

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

3455

s32 ixgbe_write_sr_buf_aci(struct ixgbe_hw *hw, u32 offset, u16 words,

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

3461

u32 i;

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

3498

s32 ixgbe_aci_alternate_write(struct ixgbe_hw *hw, u32 reg_addr0,

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

3499

u32 reg_val0, u32 reg_addr1, u32 reg_val1)

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

352

u32 ep_bit_mask;

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

353

u32 fwsts;

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

3533

s32 ixgbe_aci_alternate_read(struct ixgbe_hw *hw, u32 reg_addr0,

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

3534

u32 *reg_val0, u32 reg_addr1, u32 *reg_val1)

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

3635

u16 table_id, u32 start, void *buf,

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

3638

u32 *ret_next_index)

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

3701

if (cmd->offset == (u32)GL_HIDA(i))

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

3705

if (cmd->offset == (u32)GL_HIBA(i))

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

3919

u32 swfw_mask = hw->phy.phy_semaphore_mask;

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

3920

u32 ctrl, i;

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

4175

u32 i;

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

4459

u32 rxctrl;

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

4465

u32 pfdtxgswc;

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

4550

u32 fwsm = IXGBE_READ_REG(hw, GL_MNG_FWSM);

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

4566

u32 fwsm = IXGBE_READ_REG(hw, GL_MNG_FWSM);

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

4582

u32 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM_X550EM_a);

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

4721

memcpy(&hw->phy.id, pcaps.phy_id_oui, sizeof(u32));

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

5083

u32 gens_stat;

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

5198

status = ixgbe_write_sr_word_aci(hw, (u32)offset, &data);

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

5233

status = ixgbe_write_sr_buf_aci(hw, (u32)offset, words, data);

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

528

u32 *timeout)

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

5308

if (i >= (u32)vpd_module &&

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

5309

i < ((u32)vpd_module + E610_SR_VPD_SIZE_WORDS))

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

5312

if (i >= (u32)pcie_alt_module &&

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

5313

i < ((u32)pcie_alt_module + E610_SR_PCIE_ALT_SIZE_WORDS))

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

5384

u32 status;

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

5489

u32 pba_num_size)

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

5516

if (pba_num_size < (((u32)pba_size * 2) + 1)) {

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

602

enum ixgbe_aci_res_access_type access, u32 timeout)

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

605

u32 delay = IXGBE_RES_POLLING_DELAY_MS;

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

606

u32 res_timeout = timeout;

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

607

u32 retry_timeout = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

655

u32 total_delay = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

689

u32 logical_id = IXGBE_LE32_TO_CPU(elem->logical_id);

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

690

u32 phys_id = IXGBE_LE32_TO_CPU(elem->phys_id);

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

691

u32 number = IXGBE_LE32_TO_CPU(elem->number);

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

793

static u8 ixgbe_hweight8(u32 w)

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

811

static u8 ixgbe_hweight32(u32 w)

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

813

u32 bitMask = 0x1, i;

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

840

u32 number = IXGBE_LE32_TO_CPU(cap->number);

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

859

u32 number = IXGBE_LE32_TO_CPU(cap->number);

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

878

u32 number = IXGBE_LE32_TO_CPU(cap->number);

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

897

u32 number = IXGBE_LE32_TO_CPU(cap->number);

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

920

void *buf, u32 cap_count)

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

923

u32 i;

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

971

u32 logical_id = IXGBE_LE32_TO_CPU(cap->logical_id);

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

972

u32 number = IXGBE_LE32_TO_CPU(cap->number);

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.c

991

static u32 ixgbe_get_num_per_func(struct ixgbe_hw *hw, u32 max)

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.h

105

u32 start_address, u8 *data, u8 data_size);

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.h

111

s32 ixgbe_aci_read_nvm(struct ixgbe_hw *hw, u16 module_typeid, u32 offset,

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.h

117

u32 offset, u16 length, void *data,

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.h

146

s32 ixgbe_read_flat_nvm(struct ixgbe_hw *hw, u32 offset, u32 *length,

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.h

149

s32 ixgbe_write_sr_word_aci(struct ixgbe_hw *hw, u32 offset, const u16 *data);

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.h

150

s32 ixgbe_write_sr_buf_aci(struct ixgbe_hw *hw, u32 offset, u16 words, const u16 *data);

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.h

152

s32 ixgbe_aci_alternate_write(struct ixgbe_hw *hw, u32 reg_addr0,

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.h

153

u32 reg_val0, u32 reg_addr1, u32 reg_val1);

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.h

154

s32 ixgbe_aci_alternate_read(struct ixgbe_hw *hw, u32 reg_addr0,

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.h

155

u32 *reg_val0, u32 reg_addr1, u32 *reg_val1);

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.h

161

u16 table_id, u32 start, void *buf,

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.h

164

u32 *ret_next_index);

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.h

222

s32 ixgbe_read_pba_string_E610(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size);

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.h

55

enum ixgbe_aci_res_access_type access, u32 timeout);

usr/src/uts/common/io/ixgbe/core/ixgbe_e610.h

58

u32 *cap_count, enum ixgbe_aci_opc opc);

usr/src/uts/common/io/ixgbe/core/ixgbe_mbx.c

1020

static s32 ixgbe_read_mbx_pf_legacy(struct ixgbe_hw *hw, u32 *msg, u16 size,

usr/src/uts/common/io/ixgbe/core/ixgbe_mbx.c

1057

static s32 ixgbe_read_mbx_pf(struct ixgbe_hw *hw, u32 *msg, u16 size,

usr/src/uts/common/io/ixgbe/core/ixgbe_mbx.c

1060

u32 pf_mailbox;

usr/src/uts/common/io/ixgbe/core/ixgbe_mbx.c

119

s32 ixgbe_write_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id)

usr/src/uts/common/io/ixgbe/core/ixgbe_mbx.c

298

static u32 ixgbe_read_mailbox_vf(struct ixgbe_hw *hw)

usr/src/uts/common/io/ixgbe/core/ixgbe_mbx.c

300

u32 vf_mailbox = IXGBE_READ_REG(hw, IXGBE_VFMAILBOX);

usr/src/uts/common/io/ixgbe/core/ixgbe_mbx.c

310

u32 vf_mailbox = ixgbe_read_mailbox_vf(hw);

usr/src/uts/common/io/ixgbe/core/ixgbe_mbx.c

320

u32 vf_mailbox = ixgbe_read_mailbox_vf(hw);

usr/src/uts/common/io/ixgbe/core/ixgbe_mbx.c

330

u32 vf_mailbox = ixgbe_read_mailbox_vf(hw);

usr/src/uts/common/io/ixgbe/core/ixgbe_mbx.c

347

static s32 ixgbe_check_for_bit_vf(struct ixgbe_hw *hw, u32 mask)

usr/src/uts/common/io/ixgbe/core/ixgbe_mbx.c

349

u32 vf_mailbox = ixgbe_read_mailbox_vf(hw);

usr/src/uts/common/io/ixgbe/core/ixgbe_mbx.c

429

u32 vf_mailbox;

usr/src/uts/common/io/ixgbe/core/ixgbe_mbx.c

480

u32 vf_mailbox;

usr/src/uts/common/io/ixgbe/core/ixgbe_mbx.c

50

s32 ixgbe_read_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id)

usr/src/uts/common/io/ixgbe/core/ixgbe_mbx.c

501

static s32 ixgbe_write_mbx_vf_legacy(struct ixgbe_hw *hw, u32 *msg, u16 size,

usr/src/uts/common/io/ixgbe/core/ixgbe_mbx.c

543

static s32 ixgbe_write_mbx_vf(struct ixgbe_hw *hw, u32 *msg, u16 size,

usr/src/uts/common/io/ixgbe/core/ixgbe_mbx.c

546

u32 vf_mailbox;

usr/src/uts/common/io/ixgbe/core/ixgbe_mbx.c

593

static s32 ixgbe_read_mbx_vf_legacy(struct ixgbe_hw *hw, u32 *msg, u16 size,

usr/src/uts/common/io/ixgbe/core/ixgbe_mbx.c

629

static s32 ixgbe_read_mbx_vf(struct ixgbe_hw *hw, u32 *msg, u16 size,

usr/src/uts/common/io/ixgbe/core/ixgbe_mbx.c

632

u32 vf_mailbox;

usr/src/uts/common/io/ixgbe/core/ixgbe_mbx.c

726

u32 vf_shift = IXGBE_PFMBICR_SHIFT(vf_id);

usr/src/uts/common/io/ixgbe/core/ixgbe_mbx.c

728

u32 pfmbicr;

usr/src/uts/common/io/ixgbe/core/ixgbe_mbx.c

741

u32 vf_shift = IXGBE_PFMBICR_SHIFT(vf_id);

usr/src/uts/common/io/ixgbe/core/ixgbe_mbx.c

743

u32 pfmbicr;

usr/src/uts/common/io/ixgbe/core/ixgbe_mbx.c

754

static s32 ixgbe_check_for_bit_pf(struct ixgbe_hw *hw, u32 mask, s32 index)

usr/src/uts/common/io/ixgbe/core/ixgbe_mbx.c

756

u32 pfmbicr = IXGBE_READ_REG(hw, IXGBE_PFMBICR(index));

usr/src/uts/common/io/ixgbe/core/ixgbe_mbx.c

774

u32 vf_shift = IXGBE_PFMBICR_SHIFT(vf_id);

usr/src/uts/common/io/ixgbe/core/ixgbe_mbx.c

79

s32 ixgbe_poll_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id)

usr/src/uts/common/io/ixgbe/core/ixgbe_mbx.c

795

u32 vf_shift = IXGBE_PFMBICR_SHIFT(vf_id);

usr/src/uts/common/io/ixgbe/core/ixgbe_mbx.c

820

u32 vf_shift = IXGBE_PFVFLRE_SHIFT(vf_id);

usr/src/uts/common/io/ixgbe/core/ixgbe_mbx.c

821

u32 index = IXGBE_PFVFLRE_INDEX(vf_id);

usr/src/uts/common/io/ixgbe/core/ixgbe_mbx.c

823

u32 vflre = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_mbx.c

862

u32 pf_mailbox;

usr/src/uts/common/io/ixgbe/core/ixgbe_mbx.c

908

u32 pf_mailbox;

usr/src/uts/common/io/ixgbe/core/ixgbe_mbx.c

927

static s32 ixgbe_write_mbx_pf_legacy(struct ixgbe_hw *hw, u32 *msg, u16 size,

usr/src/uts/common/io/ixgbe/core/ixgbe_mbx.c

968

static s32 ixgbe_write_mbx_pf(struct ixgbe_hw *hw, u32 *msg, u16 size,

usr/src/uts/common/io/ixgbe/core/ixgbe_mbx.c

971

u32 pf_mailbox;

usr/src/uts/common/io/ixgbe/core/ixgbe_mbx.h

192

s32 ixgbe_read_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id);

usr/src/uts/common/io/ixgbe/core/ixgbe_mbx.h

193

s32 ixgbe_poll_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id);

usr/src/uts/common/io/ixgbe/core/ixgbe_mbx.h

194

s32 ixgbe_write_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id);

usr/src/uts/common/io/ixgbe/core/ixgbe_mbx.h

43

s32 (*read)(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id);

usr/src/uts/common/io/ixgbe/core/ixgbe_mbx.h

44

s32 (*write)(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id);

usr/src/uts/common/io/ixgbe/core/ixgbe_mbx.h

52

u32 msgs_tx;

usr/src/uts/common/io/ixgbe/core/ixgbe_mbx.h

53

u32 msgs_rx;

usr/src/uts/common/io/ixgbe/core/ixgbe_mbx.h

55

u32 acks;

usr/src/uts/common/io/ixgbe/core/ixgbe_mbx.h

56

u32 reqs;

usr/src/uts/common/io/ixgbe/core/ixgbe_mbx.h

57

u32 rsts;

usr/src/uts/common/io/ixgbe/core/ixgbe_mbx.h

68

u32 timeout;

usr/src/uts/common/io/ixgbe/core/ixgbe_mbx.h

69

u32 usec_delay;

usr/src/uts/common/io/ixgbe/core/ixgbe_mbx.h

70

u32 vf_mailbox;

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

112

u32 swfw_mask = hw->phy.phy_semaphore_mask;

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

1150

u32 i;

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

1294

u32 vendor_oui = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

1657

u32 vendor_oui = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

189

u32 swfw_mask = hw->phy.phy_semaphore_mask;

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

2023

u32 max_retry = 10;

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

2024

u32 retry = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

2025

u32 swfw_mask = hw->phy.phy_semaphore_mask;

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

2146

u32 max_retry = 1;

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

2147

u32 retry = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

2148

u32 swfw_mask = hw->phy.phy_semaphore_mask;

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

2246

u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

2281

u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

2282

u32 data_oe_bit = IXGBE_I2C_DATA_OE_N_EN_BY_MAC(hw);

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

2283

u32 clk_oe_bit = IXGBE_I2C_CLK_OE_N_EN_BY_MAC(hw);

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

2284

u32 bb_en_bit = IXGBE_I2C_BB_EN_BY_MAC(hw);

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

2340

u32 i2cctl;

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

2371

u32 data_oe_bit = IXGBE_I2C_DATA_OE_N_EN_BY_MAC(hw);

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

2373

u32 i = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

2374

u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

2375

u32 timeout = 10;

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

2424

u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

2425

u32 data_oe_bit = IXGBE_I2C_DATA_OE_N_EN_BY_MAC(hw);

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

2459

u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

2493

static void ixgbe_raise_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl)

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

2495

u32 clk_oe_bit = IXGBE_I2C_CLK_OE_N_EN_BY_MAC(hw);

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

2496

u32 i = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

2497

u32 timeout = IXGBE_I2C_CLOCK_STRETCHING_TIMEOUT;

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

2498

u32 i2cctl_r = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

2529

static void ixgbe_lower_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl)

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

2552

static s32 ixgbe_set_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl, bool data)

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

2554

u32 data_oe_bit = IXGBE_I2C_DATA_OE_N_EN_BY_MAC(hw);

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

2599

static bool ixgbe_get_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl)

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

2601

u32 data_oe_bit = IXGBE_I2C_DATA_OE_N_EN_BY_MAC(hw);

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

2630

u32 i2cctl;

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

2631

u32 i;

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

2694

u32 status;

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

376

u32 mmngc;

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

400

bool ixgbe_validate_phy_addr(struct ixgbe_hw *hw, u32 phy_addr)

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

426

u32 status;

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

437

hw->phy.id = (u32)(phy_id_high << 16);

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

441

hw->phy.id |= (u32)(phy_id_low & IXGBE_PHY_REVISION_MASK);

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

442

hw->phy.revision = (u32)(phy_id_low & ~IXGBE_PHY_REVISION_MASK);

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

455

enum ixgbe_phy_type ixgbe_get_phy_type_from_id(u32 phy_id)

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

46

static void ixgbe_raise_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl);

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

47

static void ixgbe_lower_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl);

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

48

static s32 ixgbe_set_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl, bool data);

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

49

static bool ixgbe_get_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl);

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

496

u32 i;

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

597

s32 ixgbe_read_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

600

u32 i, data, command;

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

679

s32 ixgbe_read_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr,

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

680

u32 device_type, u16 *phy_data)

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

683

u32 gssr = hw->phy.phy_semaphore_mask;

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

705

s32 ixgbe_write_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr,

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

706

u32 device_type, u16 phy_data)

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

708

u32 i, command;

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

711

IXGBE_WRITE_REG(hw, IXGBE_MSRWD, (u32)phy_data);

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

779

s32 ixgbe_write_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr,

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

780

u32 device_type, u16 phy_data)

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

783

u32 gssr = hw->phy.phy_semaphore_mask;

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

997

u32 time_out;

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.c

998

u32 max_time_out = 10;

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.h

160

bool ixgbe_validate_phy_addr(struct ixgbe_hw *hw, u32 phy_addr);

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.h

161

enum ixgbe_phy_type ixgbe_get_phy_type_from_id(u32 phy_id);

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.h

166

s32 ixgbe_read_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.h

168

s32 ixgbe_write_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.h

170

s32 ixgbe_read_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr,

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.h

171

u32 device_type, u16 *phy_data);

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.h

172

s32 ixgbe_write_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr,

usr/src/uts/common/io/ixgbe/core/ixgbe_phy.h

173

u32 device_type, u16 phy_data);

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

3041

#define __le32 u32

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

3050

#define __be32 u32

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

3304

u32 address;

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

3313

u32 address;

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

3515

typedef u32 ixgbe_autoneg_advertised;

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

3517

typedef u32 ixgbe_link_speed;

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

379

u32 etk_id;

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

3903

u32 num_mc_addrs;

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

3904

u32 rar_used_count;

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

3905

u32 mta_in_use;

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

3906

u32 overflow_promisc;

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

3923

u32 high_water[IXGBE_DCB_MAX_TRAFFIC_CLASS]; /* Flow Ctrl High-water */

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

3924

u32 low_water[IXGBE_DCB_MAX_TRAFFIC_CLASS]; /* Flow Ctrl Low-water */

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4019

u32 *vmdq);

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4031

s32 (*read_pba_string)(struct ixgbe_hw *, u8 *, u32);

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4051

s32 (*read_analog_reg8)(struct ixgbe_hw*, u32, u8*);

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4052

s32 (*write_analog_reg8)(struct ixgbe_hw*, u32, u8);

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4054

s32 (*enable_rx_dma)(struct ixgbe_hw *, u32);

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4057

s32 (*acquire_swfw_sync)(struct ixgbe_hw *, u32);

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4058

void (*release_swfw_sync)(struct ixgbe_hw *, u32);

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4060

s32 (*prot_autoc_read)(struct ixgbe_hw *, bool *, u32 *);

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4061

s32 (*prot_autoc_write)(struct ixgbe_hw *, u32, bool);

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4076

void (*setup_rxpba)(struct ixgbe_hw *, int, u32, int);

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4079

s32 (*led_on)(struct ixgbe_hw *, u32);

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4080

s32 (*led_off)(struct ixgbe_hw *, u32);

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4081

s32 (*blink_led_start)(struct ixgbe_hw *, u32);

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4082

s32 (*blink_led_stop)(struct ixgbe_hw *, u32);

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4086

s32 (*set_rar)(struct ixgbe_hw *, u32, u8 *, u32, u32);

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4087

s32 (*set_uc_addr)(struct ixgbe_hw *, u32, u8 *);

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4088

s32 (*clear_rar)(struct ixgbe_hw *, u32);

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4089

s32 (*insert_mac_addr)(struct ixgbe_hw *, u8 *, u32);

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4090

s32 (*set_vmdq)(struct ixgbe_hw *, u32, u32);

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4091

s32 (*set_vmdq_san_mac)(struct ixgbe_hw *, u32);

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4092

s32 (*clear_vmdq)(struct ixgbe_hw *, u32, u32);

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4094

s32 (*update_uc_addr_list)(struct ixgbe_hw *, u8 *, u32,

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4096

s32 (*update_mc_addr_list)(struct ixgbe_hw *, u8 *, u32,

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4102

s32 (*set_vfta)(struct ixgbe_hw *, u32, u32, bool, bool);

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4103

s32 (*set_vlvf)(struct ixgbe_hw *, u32, u32, bool, u32 *, u32,

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4108

s32 (*toggle_txdctl)(struct ixgbe_hw *hw, u32 vf_index);

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4122

s32 (*bypass_rw) (struct ixgbe_hw *hw, u32 cmd, u32 *status);

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4123

bool (*bypass_valid_rd) (u32 in_reg, u32 out_reg);

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4124

s32 (*bypass_set) (struct ixgbe_hw *hw, u32 cmd, u32 event, u32 action);

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4125

s32 (*bypass_rd_eep) (struct ixgbe_hw *hw, u32 addr, u8 *value);

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4136

s32 (*read_iosf_sb_reg)(struct ixgbe_hw *, u32, u32, u32 *);

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4137

s32 (*write_iosf_sb_reg)(struct ixgbe_hw *, u32, u32, u32);

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4140

void (*mdd_event)(struct ixgbe_hw *hw, u32 *vf_bitmap);

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4141

void (*restore_mdd_vf)(struct ixgbe_hw *hw, u32 vf);

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4154

s32 (*read_reg)(struct ixgbe_hw *, u32, u32, u16 *);

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4155

s32 (*write_reg)(struct ixgbe_hw *, u32, u32, u16);

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4156

s32 (*read_reg_mdi)(struct ixgbe_hw *, u32, u32, u16 *);

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4157

s32 (*write_reg_mdi)(struct ixgbe_hw *, u32, u32, u16);

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4199

u32 semaphore_delay;

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4218

u32 mta_shadow[IXGBE_MAX_MTA];

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4220

u32 mcft_size;

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4221

u32 vft_size;

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4222

u32 num_rar_entries;

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4223

u32 rar_highwater;

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4224

u32 rx_pb_size;

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4225

u32 max_tx_queues;

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4226

u32 max_rx_queues;

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4227

u32 orig_autoc;

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4230

u32 orig_autoc2;

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4240

u32 max_link_up_time;

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4247

u32 addr;

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4248

u32 id;

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4251

u32 revision;

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4253

u32 phy_semaphore_mask;

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4264

u32 nw_mng_if_sel;

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4283

const u32 *mvals;

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4295

u32 fw_rst_cnt;

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4304

u32 fw_build;

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4453

u32 logs;

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

4454

u32 clear_off;

usr/src/uts/common/io/ixgbe/core/ixgbe_type.h

789

u32 link_speed;

usr/src/uts/common/io/ixgbe/core/ixgbe_type_e610.h

2043

u32 switching_mode;

usr/src/uts/common/io/ixgbe/core/ixgbe_type_e610.h

2048

u32 mgmt_mode;

usr/src/uts/common/io/ixgbe/core/ixgbe_type_e610.h

2053

u32 mgmt_protocols_mctp;

usr/src/uts/common/io/ixgbe/core/ixgbe_type_e610.h

2059

u32 os2bmc;

usr/src/uts/common/io/ixgbe/core/ixgbe_type_e610.h

2060

u32 valid_functions;

usr/src/uts/common/io/ixgbe/core/ixgbe_type_e610.h

2062

u32 active_tc_bitmap;

usr/src/uts/common/io/ixgbe/core/ixgbe_type_e610.h

2063

u32 maxtc;

usr/src/uts/common/io/ixgbe/core/ixgbe_type_e610.h

2066

u32 rss_table_size; /* 512 for PFs and 64 for VFs */

usr/src/uts/common/io/ixgbe/core/ixgbe_type_e610.h

2067

u32 rss_table_entry_width; /* RSS Entry width in bits */

usr/src/uts/common/io/ixgbe/core/ixgbe_type_e610.h

2070

u32 num_rxq; /* Number/Total Rx queues */

usr/src/uts/common/io/ixgbe/core/ixgbe_type_e610.h

2071

u32 rxq_first_id; /* First queue ID for Rx queues */

usr/src/uts/common/io/ixgbe/core/ixgbe_type_e610.h

2072

u32 num_txq; /* Number/Total Tx queues */

usr/src/uts/common/io/ixgbe/core/ixgbe_type_e610.h

2073

u32 txq_first_id; /* First queue ID for Tx queues */

usr/src/uts/common/io/ixgbe/core/ixgbe_type_e610.h

2076

u32 num_msix_vectors;

usr/src/uts/common/io/ixgbe/core/ixgbe_type_e610.h

2077

u32 msix_vector_first_id;

usr/src/uts/common/io/ixgbe/core/ixgbe_type_e610.h

2080

u32 max_mtu;

usr/src/uts/common/io/ixgbe/core/ixgbe_type_e610.h

2083

u32 num_wol_proxy_fltr;

usr/src/uts/common/io/ixgbe/core/ixgbe_type_e610.h

2084

u32 wol_proxy_vsi_seid;

usr/src/uts/common/io/ixgbe/core/ixgbe_type_e610.h

2087

u32 led_pin_num;

usr/src/uts/common/io/ixgbe/core/ixgbe_type_e610.h

2088

u32 sdp_pin_num;

usr/src/uts/common/io/ixgbe/core/ixgbe_type_e610.h

2131

u32 ext_topo_dev_img_ver_high[IXGBE_EXT_TOPO_DEV_IMG_COUNT];

usr/src/uts/common/io/ixgbe/core/ixgbe_type_e610.h

2132

u32 ext_topo_dev_img_ver_low[IXGBE_EXT_TOPO_DEV_IMG_COUNT];

usr/src/uts/common/io/ixgbe/core/ixgbe_type_e610.h

2159

u32 num_allocd_vfs; /* Number of allocated VFs */

usr/src/uts/common/io/ixgbe/core/ixgbe_type_e610.h

2160

u32 vf_base_id; /* Logical ID of the first VF */

usr/src/uts/common/io/ixgbe/core/ixgbe_type_e610.h

2161

u32 guar_num_vsi;

usr/src/uts/common/io/ixgbe/core/ixgbe_type_e610.h

2168

u32 num_vfs_exposed; /* Total number of VFs exposed */

usr/src/uts/common/io/ixgbe/core/ixgbe_type_e610.h

2169

u32 num_vsi_allocd_to_host; /* Excluding EMP VSI */

usr/src/uts/common/io/ixgbe/core/ixgbe_type_e610.h

2170

u32 num_flow_director_fltr; /* Number of FD filters available */

usr/src/uts/common/io/ixgbe/core/ixgbe_type_e610.h

2171

u32 num_funcs;

usr/src/uts/common/io/ixgbe/core/ixgbe_type_e610.h

2189

u32 nvm;

usr/src/uts/common/io/ixgbe/core/ixgbe_type_e610.h

2190

u32 orom;

usr/src/uts/common/io/ixgbe/core/ixgbe_type_e610.h

2209

u32 srev; /* Security revision */

usr/src/uts/common/io/ixgbe/core/ixgbe_type_e610.h

2214

u32 eetrack;

usr/src/uts/common/io/ixgbe/core/ixgbe_type_e610.h

2215

u32 srev;

usr/src/uts/common/io/ixgbe/core/ixgbe_type_e610.h

2222

u32 major; /* major high/low */

usr/src/uts/common/io/ixgbe/core/ixgbe_type_e610.h

2223

u32 minor; /* minor high/low */

usr/src/uts/common/io/ixgbe/core/ixgbe_type_e610.h

2224

u32 type; /* type high/low */

usr/src/uts/common/io/ixgbe/core/ixgbe_type_e610.h

2225

u32 rev; /* revision high/low */

usr/src/uts/common/io/ixgbe/core/ixgbe_type_e610.h

2226

u32 hash; /* SHA-1 hash word */

usr/src/uts/common/io/ixgbe/core/ixgbe_type_e610.h

2241

u32 nvm_ptr; /* Pointer to 1st NVM bank */

usr/src/uts/common/io/ixgbe/core/ixgbe_type_e610.h

2242

u32 nvm_size; /* Size of NVM bank */

usr/src/uts/common/io/ixgbe/core/ixgbe_type_e610.h

2243

u32 orom_ptr; /* Pointer to 1st OROM bank */

usr/src/uts/common/io/ixgbe/core/ixgbe_type_e610.h

2244

u32 orom_size; /* Size of OROM bank */

usr/src/uts/common/io/ixgbe/core/ixgbe_type_e610.h

2245

u32 netlist_ptr; /* Pointer to 1st Netlist bank */

usr/src/uts/common/io/ixgbe/core/ixgbe_type_e610.h

2246

u32 netlist_size; /* Size of Netlist bank */

usr/src/uts/common/io/ixgbe/core/ixgbe_type_e610.h

2259

u32 flash_size; /* Size of available flash in bytes */

usr/src/uts/common/io/ixgbe/core/ixgbe_type_e610.h

2268

u32 command; /* NVM command: READ or WRITE */

usr/src/uts/common/io/ixgbe/core/ixgbe_type_e610.h

2269

u32 offset; /* Offset to read/write, in bytes */

usr/src/uts/common/io/ixgbe/core/ixgbe_type_e610.h

2270

u32 data_size; /* Size of data field, in bytes */

usr/src/uts/common/io/ixgbe/core/ixgbe_type_e610.h

2275

u32 regval; /* Storage for register value */

usr/src/uts/common/io/ixgbe/core/ixgbe_type_e610.h

83

#define HI_DWORD(x) ((u32)((((x) >> 16) >> 16) & 0xFFFFFFFF))

usr/src/uts/common/io/ixgbe/core/ixgbe_type_e610.h

84

#define LO_DWORD(x) ((u32)((x) & 0xFFFFFFFF))

usr/src/uts/common/io/ixgbe/core/ixgbe_vf.c

100

u32 vfsrrctl;

usr/src/uts/common/io/ixgbe/core/ixgbe_vf.c

101

u32 vfdca_rxctrl;

usr/src/uts/common/io/ixgbe/core/ixgbe_vf.c

102

u32 vfdca_txctrl;

usr/src/uts/common/io/ixgbe/core/ixgbe_vf.c

180

u32 timeout = IXGBE_VF_INIT_TIMEOUT;

usr/src/uts/common/io/ixgbe/core/ixgbe_vf.c

182

u32 msgbuf[IXGBE_VF_PERMADDR_MSG_LEN];

usr/src/uts/common/io/ixgbe/core/ixgbe_vf.c

254

u32 reg_val;

usr/src/uts/common/io/ixgbe/core/ixgbe_vf.c

303

u32 vector = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_vf.c

329

static s32 ixgbevf_write_msg_read_ack(struct ixgbe_hw *hw, u32 *msg,

usr/src/uts/common/io/ixgbe/core/ixgbe_vf.c

330

u32 *retmsg, u16 size)

usr/src/uts/common/io/ixgbe/core/ixgbe_vf.c

348

s32 ixgbe_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,

usr/src/uts/common/io/ixgbe/core/ixgbe_vf.c

349

u32 enable_addr)

usr/src/uts/common/io/ixgbe/core/ixgbe_vf.c

351

u32 msgbuf[3];

usr/src/uts/common/io/ixgbe/core/ixgbe_vf.c

384

u32 mc_addr_count, ixgbe_mc_addr_itr next,

usr/src/uts/common/io/ixgbe/core/ixgbe_vf.c

387

u32 msgbuf[IXGBE_VFMAILBOX_SIZE];

usr/src/uts/common/io/ixgbe/core/ixgbe_vf.c

389

u32 vector;

usr/src/uts/common/io/ixgbe/core/ixgbe_vf.c

390

u32 cnt, i;

usr/src/uts/common/io/ixgbe/core/ixgbe_vf.c

391

u32 vmdq;

usr/src/uts/common/io/ixgbe/core/ixgbe_vf.c

430

u32 msgbuf[2];

usr/src/uts/common/io/ixgbe/core/ixgbe_vf.c

468

u32 msgbuf[2];

usr/src/uts/common/io/ixgbe/core/ixgbe_vf.c

497

s32 ixgbe_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind,

usr/src/uts/common/io/ixgbe/core/ixgbe_vf.c

500

u32 msgbuf[2];

usr/src/uts/common/io/ixgbe/core/ixgbe_vf.c

522

u32 ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw *hw)

usr/src/uts/common/io/ixgbe/core/ixgbe_vf.c

534

u32 ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw *hw)

usr/src/uts/common/io/ixgbe/core/ixgbe_vf.c

555

s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr)

usr/src/uts/common/io/ixgbe/core/ixgbe_vf.c

557

u32 msgbuf[3], msgbuf_chk;

usr/src/uts/common/io/ixgbe/core/ixgbe_vf.c

615

u32 in_msg = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_vf.c

616

u32 links_reg;

usr/src/uts/common/io/ixgbe/core/ixgbe_vf.c

715

u32 msgbuf[2];

usr/src/uts/common/io/ixgbe/core/ixgbe_vf.c

739

u32 msg[3];

usr/src/uts/common/io/ixgbe/core/ixgbe_vf.c

766

u32 msg[5];

usr/src/uts/common/io/ixgbe/core/ixgbe_vf.h

123

u32 ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw *hw);

usr/src/uts/common/io/ixgbe/core/ixgbe_vf.h

124

u32 ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw *hw);

usr/src/uts/common/io/ixgbe/core/ixgbe_vf.h

130

s32 ixgbe_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,

usr/src/uts/common/io/ixgbe/core/ixgbe_vf.h

131

u32 enable_addr);

usr/src/uts/common/io/ixgbe/core/ixgbe_vf.h

132

s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr);

usr/src/uts/common/io/ixgbe/core/ixgbe_vf.h

134

u32 mc_addr_count, ixgbe_mc_addr_itr,

usr/src/uts/common/io/ixgbe/core/ixgbe_vf.h

138

s32 ixgbe_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind,

usr/src/uts/common/io/ixgbe/core/ixgbe_x540.c

1005

s32 ixgbe_blink_led_start_X540(struct ixgbe_hw *hw, u32 index)

usr/src/uts/common/io/ixgbe/core/ixgbe_x540.c

1007

u32 macc_reg;

usr/src/uts/common/io/ixgbe/core/ixgbe_x540.c

1008

u32 ledctl_reg;

usr/src/uts/common/io/ixgbe/core/ixgbe_x540.c

1046

s32 ixgbe_blink_led_stop_X540(struct ixgbe_hw *hw, u32 index)

usr/src/uts/common/io/ixgbe/core/ixgbe_x540.c

1048

u32 macc_reg;

usr/src/uts/common/io/ixgbe/core/ixgbe_x540.c

1049

u32 ledctl_reg;

usr/src/uts/common/io/ixgbe/core/ixgbe_x540.c

217

u32 ctrl, i;

usr/src/uts/common/io/ixgbe/core/ixgbe_x540.c

218

u32 swfw_mask = hw->phy.phy_semaphore_mask;

usr/src/uts/common/io/ixgbe/core/ixgbe_x540.c

368

u32 eec;

usr/src/uts/common/io/ixgbe/core/ixgbe_x540.c

691

u32 flup;

usr/src/uts/common/io/ixgbe/core/ixgbe_x540.c

738

u32 i;

usr/src/uts/common/io/ixgbe/core/ixgbe_x540.c

739

u32 reg;

usr/src/uts/common/io/ixgbe/core/ixgbe_x540.c

768

s32 ixgbe_acquire_swfw_sync_X540(struct ixgbe_hw *hw, u32 mask)

usr/src/uts/common/io/ixgbe/core/ixgbe_x540.c

770

u32 swmask = mask & IXGBE_GSSR_NVM_PHY_MASK;

usr/src/uts/common/io/ixgbe/core/ixgbe_x540.c

771

u32 fwmask = swmask << 5;

usr/src/uts/common/io/ixgbe/core/ixgbe_x540.c

772

u32 swi2c_mask = mask & IXGBE_GSSR_I2C_MASK;

usr/src/uts/common/io/ixgbe/core/ixgbe_x540.c

773

u32 timeout = 200;

usr/src/uts/common/io/ixgbe/core/ixgbe_x540.c

774

u32 hwmask = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_x540.c

775

u32 swfw_sync;

usr/src/uts/common/io/ixgbe/core/ixgbe_x540.c

776

u32 i;

usr/src/uts/common/io/ixgbe/core/ixgbe_x540.c

840

u32 rmask = IXGBE_GSSR_EEP_SM | IXGBE_GSSR_PHY0_SM |

usr/src/uts/common/io/ixgbe/core/ixgbe_x540.c

865

void ixgbe_release_swfw_sync_X540(struct ixgbe_hw *hw, u32 mask)

usr/src/uts/common/io/ixgbe/core/ixgbe_x540.c

867

u32 swmask = mask & (IXGBE_GSSR_NVM_PHY_MASK | IXGBE_GSSR_SW_MNG_SM);

usr/src/uts/common/io/ixgbe/core/ixgbe_x540.c

868

u32 swfw_sync;

usr/src/uts/common/io/ixgbe/core/ixgbe_x540.c

893

u32 timeout = 2000;

usr/src/uts/common/io/ixgbe/core/ixgbe_x540.c

894

u32 i;

usr/src/uts/common/io/ixgbe/core/ixgbe_x540.c

895

u32 swsm;

usr/src/uts/common/io/ixgbe/core/ixgbe_x540.c

950

u32 swsm;

usr/src/uts/common/io/ixgbe/core/ixgbe_x540.c

976

u32 rmask;

usr/src/uts/common/io/ixgbe/core/ixgbe_x540.h

61

s32 ixgbe_acquire_swfw_sync_X540(struct ixgbe_hw *hw, u32 mask);

usr/src/uts/common/io/ixgbe/core/ixgbe_x540.h

62

void ixgbe_release_swfw_sync_X540(struct ixgbe_hw *hw, u32 mask);

usr/src/uts/common/io/ixgbe/core/ixgbe_x540.h

65

s32 ixgbe_blink_led_start_X540(struct ixgbe_hw *hw, u32 index);

usr/src/uts/common/io/ixgbe/core/ixgbe_x540.h

66

s32 ixgbe_blink_led_stop_X540(struct ixgbe_hw *hw, u32 index);

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

1015

u32 eec;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

1060

IXGBE_WRITE_REG(hw, IXGBE_PFFLPL, (u32)pfflp);

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

1061

IXGBE_WRITE_REG(hw, IXGBE_PFFLPH, (u32)(pfflp >> 32));

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

1076

u32 pfvfspoof;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

1098

static s32 ixgbe_iosf_wait(struct ixgbe_hw *hw, u32 *ctrl)

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

1100

u32 i, command = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

1130

s32 ixgbe_write_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr,

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

1131

u32 device_type, u32 data)

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

1133

u32 gssr = IXGBE_GSSR_PHY1_SM | IXGBE_GSSR_PHY0_SM;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

1134

u32 command, error __unused;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

1176

s32 ixgbe_read_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr,

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

1177

u32 device_type, u32 *data)

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

1179

u32 gssr = IXGBE_GSSR_PHY1_SM | IXGBE_GSSR_PHY0_SM;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

1180

u32 command, error __unused;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

1232

status = ixgbe_host_interface_command(hw, (u32 *)&token_cmd,

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

1270

status = ixgbe_host_interface_command(hw, (u32 *)&token_cmd,

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

1291

u32 reg;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

1314

u32 reg;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

1336

void ixgbe_restore_mdd_vf_X550(struct ixgbe_hw *hw, u32 vf)

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

1338

u32 idx, reg, num_qs, start_q, bitmask;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

1376

void ixgbe_mdd_event_X550(struct ixgbe_hw *hw, u32 *vf_bitmap)

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

1378

u32 wqbr;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

1379

u32 i, j, reg, q, shift, vf, idx;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

1568

u32 link_ctrl;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

1586

u32 flx_mask_st20;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

1617

u32 lval, sval, flx_val;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

1686

u32 lval, sval, flx_val;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

179

u32 retry;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

1902

u32 status;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

1989

u32 status;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

2088

u32 reg_val;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

2141

u32 store[FW_PHY_ACT_DATA_COUNT] = { 0 };

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

2165

u32 store[FW_PHY_ACT_DATA_COUNT] = { 0 };

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

2333

u32 hlreg0;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

2371

u32 ctrl = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

2372

u32 i;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

2374

u32 swfw_mask = hw->phy.phy_semaphore_mask;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

2502

u32 status;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

252

u32 swfw_mask = hw->phy.phy_semaphore_mask;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

2612

u32 reg_val;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

2664

u32 reg_slice, reg_phy_int, slice_offset;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

2764

u32 reg_val;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

2835

u32 reg_val;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

2892

u32 ret;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

2931

u32 status;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

2993

u32 reg_val;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

3062

const u32 mask = IXGBE_GSSR_SW_MNG_SM | IXGBE_GSSR_EEP_SM;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

3084

status = ixgbe_hic_unlocked(hw, (u32 *)&buffer, sizeof(buffer),

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

3107

const u32 mask = IXGBE_GSSR_SW_MNG_SM | IXGBE_GSSR_EEP_SM;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

3109

u32 current_word = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

3112

u32 i;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

3141

status = ixgbe_hic_unlocked(hw, (u32 *)&buffer, sizeof(buffer),

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

3150

u32 reg = IXGBE_FLEX_MNG + (FW_NVM_DATA_OFFSET << 2) +

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

3152

u32 value = IXGBE_READ_REG(hw, reg);

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

3197

status = ixgbe_host_interface_command(hw, (u32 *)&buffer,

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

3255

u32 i = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

328

u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

3295

u32 buffer_size)

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

3331

if (buffer && ((u32)start + (u32)length > buffer_size))

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

3362

s32 ixgbe_calc_checksum_X550(struct ixgbe_hw *hw, u16 *buffer, u32 buffer_size)

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

3560

status = ixgbe_host_interface_command(hw, (u32 *)&buffer,

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

3669

u32 rxctrl, pfdtxgswc;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

3691

status = ixgbe_host_interface_command(hw, (u32 *)&fw_cmd,

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

3719

u32 save_autoneg;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

3861

u32 pause, asm_dir, reg_val;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

3950

u32 link_s1, lp_an_page_low, an_cntl_1;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

400

u32 (*data)[FW_PHY_ACT_DATA_COUNT])

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

4040

u32 info[FW_PHY_ACT_DATA_COUNT] = { 0 };

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

4095

u32 an_cntl = 0;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

4181

u32 esdp;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

42

static s32 ixgbe_acquire_swfw_sync_X550a(struct ixgbe_hw *, u32 mask);

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

420

rc = ixgbe_host_interface_command(hw, (u32 *)&hic.cmd,

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

4201

s32 ixgbe_acquire_swfw_sync_X550em(struct ixgbe_hw *hw, u32 mask)

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

4224

void ixgbe_release_swfw_sync_X550em(struct ixgbe_hw *hw, u32 mask)

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

4241

static s32 ixgbe_acquire_swfw_sync_X550a(struct ixgbe_hw *hw, u32 mask)

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

4243

u32 hmask = mask & ~IXGBE_GSSR_TOKEN_SM;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

4294

static void ixgbe_release_swfw_sync_X550a(struct ixgbe_hw *hw, u32 mask)

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

4296

u32 hmask = mask & ~IXGBE_GSSR_TOKEN_SM;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

43

static void ixgbe_release_swfw_sync_X550a(struct ixgbe_hw *, u32 mask);

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

4318

s32 ixgbe_read_phy_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

4319

u32 device_type, u16 *phy_data)

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

4322

u32 mask = hw->phy.phy_semaphore_mask | IXGBE_GSSR_TOKEN_SM;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

4346

s32 ixgbe_write_phy_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

4347

u32 device_type, u16 phy_data)

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

4350

u32 mask = hw->phy.phy_semaphore_mask | IXGBE_GSSR_TOKEN_SM;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

4379

u32 status;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

4409

u32 i;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

4460

u32 status;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

4516

s32 ixgbe_led_on_t_X550em(struct ixgbe_hw *hw, u32 led_idx)

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

4541

s32 ixgbe_led_off_t_X550em(struct ixgbe_hw *hw, u32 led_idx)

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

459

u32 info[FW_PHY_ACT_DATA_COUNT] = { 0 };

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

4603

ret_val = ixgbe_host_interface_command(hw, (u32 *)&fw_cmd,

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

4630

u32 fwsm;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

514

u32 setup[FW_PHY_ACT_DATA_COUNT] = { 0 };

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

520

static s32 ixgbe_read_phy_reg_x550em(struct ixgbe_hw *hw, u32 reg_addr,

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

521

u32 device_type, u16 *phy_data)

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

527

static s32 ixgbe_write_phy_reg_x550em(struct ixgbe_hw *hw, u32 reg_addr,

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

528

u32 device_type, u16 phy_data)

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

704

u32 setup[FW_PHY_ACT_DATA_COUNT] = { 0 };

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

736

setup[0] |= (u32)(ixgbe_fw_map[i].fw_speed);

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

883

u32 reg, high_pri_tc;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

931

u32 tc, reg, pb_headroom, rx_pb_size, maxframe_size_kb;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.c

986

u32 reg;

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.h

100

s32 ixgbe_read_phy_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.h

101

u32 device_type, u16 *phy_data);

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.h

102

s32 ixgbe_write_phy_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.h

103

u32 device_type, u16 phy_data);

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.h

117

s32 ixgbe_led_on_t_X550em(struct ixgbe_hw *hw, u32 led_idx);

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.h

118

s32 ixgbe_led_off_t_X550em(struct ixgbe_hw *hw, u32 led_idx);

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.h

47

s32 ixgbe_calc_checksum_X550(struct ixgbe_hw *hw, u16 *buffer, u32 buffer_size);

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.h

64

s32 ixgbe_write_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr,

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.h

65

u32 device_type, u32 data);

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.h

66

s32 ixgbe_read_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr,

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.h

67

u32 device_type, u32 *data);

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.h

74

void ixgbe_mdd_event_X550(struct ixgbe_hw *hw, u32 *vf_bitmap);

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.h

75

void ixgbe_restore_mdd_vf_X550(struct ixgbe_hw *hw, u32 vf);

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.h

91

s32 ixgbe_acquire_swfw_sync_X550em(struct ixgbe_hw *hw, u32 mask);

usr/src/uts/common/io/ixgbe/core/ixgbe_x550.h

92

void ixgbe_release_swfw_sync_X550em(struct ixgbe_hw *hw, u32 mask);

usr/src/uts/common/io/ixgbe/ixgbe_main.c

5810

u32 ivar, index;

usr/src/uts/common/io/ixgbe/ixgbe_main.c

5869

u32 ivar, index;

usr/src/uts/common/io/ixgbe/ixgbe_main.c

5923

u32 ivar, index;

usr/src/uts/common/io/ixgbe/ixgbe_osdep.h

156

#define __le32 u32

usr/src/uts/common/io/ixgbe/ixgbe_osdep.h

159

#define __be32 u32

usr/src/uts/common/io/ixgbe/ixgbe_sw.h

261

#define IXGBE_FLAG_DCA_ENABLED (u32)(1)

usr/src/uts/common/io/ixgbe/ixgbe_sw.h

262

#define IXGBE_FLAG_DCA_CAPABLE (u32)(1 << 1)

usr/src/uts/common/io/ixgbe/ixgbe_sw.h

263

#define IXGBE_FLAG_DCB_ENABLED (u32)(1 << 2)

usr/src/uts/common/io/ixgbe/ixgbe_sw.h

264

#define IXGBE_FLAG_DCB_CAPABLE (u32)(1 << 4)

usr/src/uts/common/io/ixgbe/ixgbe_sw.h

265

#define IXGBE_FLAG_RSS_ENABLED (u32)(1 << 4)

usr/src/uts/common/io/ixgbe/ixgbe_sw.h

266

#define IXGBE_FLAG_RSS_CAPABLE (u32)(1 << 5)

usr/src/uts/common/io/ixgbe/ixgbe_sw.h

267

#define IXGBE_FLAG_VMDQ_CAPABLE (u32)(1 << 6)

usr/src/uts/common/io/ixgbe/ixgbe_sw.h

268

#define IXGBE_FLAG_VMDQ_ENABLED (u32)(1 << 7)

usr/src/uts/common/io/ixgbe/ixgbe_sw.h

269

#define IXGBE_FLAG_FAN_FAIL_CAPABLE (u32)(1 << 8)

usr/src/uts/common/io/ixgbe/ixgbe_sw.h

270

#define IXGBE_FLAG_RSC_CAPABLE (u32)(1 << 9)

usr/src/uts/common/io/ixgbe/ixgbe_sw.h

271

#define IXGBE_FLAG_SFP_PLUG_CAPABLE (u32)(1 << 10)

usr/src/uts/common/io/ixgbe/ixgbe_sw.h

272

#define IXGBE_FLAG_TEMP_SENSOR_CAPABLE (u32)(1 << 11)

usr/src/uts/common/io/mac/mac_ndd.c

194

uint32_t u32;

usr/src/uts/common/io/mac/mac_ndd.c

250

value = (uchar_t *)&u32;

usr/src/uts/common/io/mac/mac_ndd.c

265

new_value = u32 = (long)u64;

usr/src/uts/common/io/mac/mac_ndd.c

278

new_value = u32;

usr/src/uts/common/io/mac/mac_ndd.c

336

uint32_t u32;

usr/src/uts/common/io/mac/mac_ndd.c

391

u32 = (uint32_t)new_value;

usr/src/uts/common/io/mac/mac_ndd.c

392

vp = (uchar_t *)&u32;

usr/src/uts/common/io/ntxn/niu.c

240

u32 port_mode = 0;

usr/src/uts/common/io/ntxn/niu.c

483

u32 port_mode = 0;

usr/src/uts/common/io/ntxn/niu.c

554

u32 port_mode = 0;

usr/src/uts/common/io/ntxn/niu.c

56

u32 done = 0;

usr/src/uts/common/io/ntxn/niu.c

78

u32 val;

usr/src/uts/common/io/ntxn/nxhal_nic_interface.h

117

((u32)0xcafe << 16))

usr/src/uts/common/io/ntxn/unm_gem.c

1108

u32 chicken, control, c8c9value = 0xF1000;

usr/src/uts/common/io/ntxn/unm_gem.c

147

u32 val;

usr/src/uts/common/io/ntxn/unm_nic.h

575

u32 *);

usr/src/uts/common/io/ntxn/unm_nic.h

577

u32 *);

usr/src/uts/common/io/ntxn/unm_nic.h

579

u32);

usr/src/uts/common/io/ntxn/unm_nic.h

580

u32 (*unm_nic_pci_read_normalize)(struct unm_adapter_s *, u64);

usr/src/uts/common/io/ntxn/unm_nic.h

693

void unm_nic_pci_write_normalize_128M(unm_adapter *adapter, u64 off, u32 data);

usr/src/uts/common/io/ntxn/unm_nic.h

694

u32 unm_nic_pci_read_normalize_128M(unm_adapter *adapter, u64 off);

usr/src/uts/common/io/ntxn/unm_nic.h

695

int unm_nic_pci_write_immediate_128M(unm_adapter *adapter, u64 off, u32 *data);

usr/src/uts/common/io/ntxn/unm_nic.h

696

int unm_nic_pci_read_immediate_128M(unm_adapter *adapter, u64 off, u32 *data);

usr/src/uts/common/io/ntxn/unm_nic.h

711

void unm_nic_pci_write_normalize_2M(unm_adapter *adapter, u64 off, u32 data);

usr/src/uts/common/io/ntxn/unm_nic.h

712

u32 unm_nic_pci_read_normalize_2M(unm_adapter *adapter, u64 off);

usr/src/uts/common/io/ntxn/unm_nic.h

713

int unm_nic_pci_write_immediate_2M(unm_adapter *adapter, u64 off, u32 *data);

usr/src/uts/common/io/ntxn/unm_nic.h

714

int unm_nic_pci_read_immediate_2M(unm_adapter *adapter, u64 off, u32 *data);

usr/src/uts/common/io/ntxn/unm_nic_ctx.c

116

u32 done = 0, timeout = 0;

usr/src/uts/common/io/ntxn/unm_nic_ctx.c

143

u32 val;

usr/src/uts/common/io/ntxn/unm_nic_ctx.c

150

static u32

usr/src/uts/common/io/ntxn/unm_nic_ctx.c

153

u32 raw_rsp, rsp = NX_CDRP_RSP_OK;

usr/src/uts/common/io/ntxn/unm_nic_ctx.c

172

static u32

usr/src/uts/common/io/ntxn/unm_nic_ctx.c

174

u32 pci_fn, u32 version, u32 arg1, u32 arg2, u32 arg3, u32 cmd)

usr/src/uts/common/io/ntxn/unm_nic_ctx.c

176

u32 rsp;

usr/src/uts/common/io/ntxn/unm_nic_ctx.c

177

u32 signature = 0;

usr/src/uts/common/io/ntxn/unm_nic_ctx.c

178

u32 rcode = NX_RCODE_SUCCESS;

usr/src/uts/common/io/ntxn/unm_nic_ctx.c

226

u32 rcode = NX_RCODE_SUCCESS;

usr/src/uts/common/io/ntxn/unm_nic_ctx.c

260

u32 cap, reg;

usr/src/uts/common/io/ntxn/unm_nic_ctx.c

334

(u32)(phys_addr >> 32),

usr/src/uts/common/io/ntxn/unm_nic_ctx.c

335

(u32)(phys_addr & 0xffffffff),

usr/src/uts/common/io/ntxn/unm_nic_ctx.c

403

u32 temp;

usr/src/uts/common/io/ntxn/unm_nic_ctx.c

455

(u32)(phys_addr >> 32),

usr/src/uts/common/io/ntxn/unm_nic_ctx.c

456

((u32)phys_addr & 0xffffffff),

usr/src/uts/common/io/ntxn/unm_nic_ctx.c

512

u32 crb_rcv_producer[NUM_RCV_DESC_RINGS];

usr/src/uts/common/io/ntxn/unm_nic_ctx.c

513

u32 crb_sts_consumer;

usr/src/uts/common/io/ntxn/unm_nic_hw.c

1796

u32 port_mode = 0;

usr/src/uts/common/io/ntxn/unm_nic_hw.c

1938

u32 port_mode = 0;

usr/src/uts/common/io/ntxn/unm_nic_hw.c

2022

u32 port_mode = 0;

usr/src/uts/common/io/ntxn/unm_nic_hw.c

2179

nx_p3_nic_set_promisc(unm_adapter *adapter, u32 mode)

usr/src/uts/common/io/ntxn/unm_nic_hw.c

456

u32 win_read;

usr/src/uts/common/io/ntxn/unm_nic_hw.c

605

unm_nic_pci_write_normalize_128M(unm_adapter *adapter, u64 off, u32 data)

usr/src/uts/common/io/ntxn/unm_nic_hw.c

613

u32

usr/src/uts/common/io/ntxn/unm_nic_hw.c

623

unm_nic_pci_write_immediate_128M(unm_adapter *adapter, u64 off, u32 *data)

usr/src/uts/common/io/ntxn/unm_nic_hw.c

634

unm_nic_pci_read_immediate_128M(unm_adapter *adapter, u64 off, u32 *data)

usr/src/uts/common/io/ntxn/unm_nic_hw.c

645

unm_nic_pci_write_normalize_2M(unm_adapter *adapter, u64 off, u32 data)

usr/src/uts/common/io/ntxn/unm_nic_hw.c

647

u32 temp = data;

usr/src/uts/common/io/ntxn/unm_nic_hw.c

655

u32

usr/src/uts/common/io/ntxn/unm_nic_hw.c

658

u32 temp;

usr/src/uts/common/io/ntxn/unm_nic_hw.c

669

unm_nic_pci_write_immediate_2M(unm_adapter *adapter, u64 off, u32 *data)

usr/src/uts/common/io/ntxn/unm_nic_hw.c

671

u32 temp = *data;

usr/src/uts/common/io/ntxn/unm_nic_hw.c

682

unm_nic_pci_read_immediate_2M(unm_adapter *adapter, u64 off, u32 *data)

usr/src/uts/common/io/ntxn/unm_nic_hw.c

684

u32 temp;

usr/src/uts/common/io/ntxn/unm_nic_hw.c

998

u32 win_read;

usr/src/uts/common/io/ntxn/unm_nic_init.c

445

u32 val = 0;

usr/src/uts/common/io/ntxn/unm_nic_isr.c

57

u32 portno = adapter->portnum;

usr/src/uts/common/io/ntxn/unm_nic_isr.c

58

u32 val, linkup, qg_linksup = adapter->ahw.linkup;

usr/src/uts/common/io/ntxn/unm_nic_main.c

1233

u32 desc_ctx = desc->u1.s1.type;

usr/src/uts/common/io/ntxn/unm_nic_main.c

1235

u32 pkt_length = desc->u1.s1.totalLength;

usr/src/uts/common/io/ntxn/unm_nic_main.c

1382

u32 last_consumer;

usr/src/uts/common/io/ntxn/unm_nic_main.c

1383

u32 consumer;

usr/src/uts/common/io/ntxn/unm_nic_main.c

1972

data.off, *(u32 *)(uintptr_t)&(data.uabc));

usr/src/uts/common/io/ntxn/unm_nic_main.c

262

temp = our_int & ~((u32)(0x80 << adapter->portnum));

usr/src/uts/common/io/ntxn/unm_nic_main.c

299

u32 temp = 1;

usr/src/uts/common/io/ntxn/unm_nic_main.c

305

u32 mask = 0xfbff;

usr/src/uts/common/io/ntxn/unm_nic_main.c

767

u32 producer = 0;

usr/src/uts/common/io/ntxn/unm_nic_main.c

770

u32 mblen;

usr/src/uts/common/io/ntxn/unm_nic_main.c

886

u32 producer = 0;

usr/src/uts/common/io/ntxn/unm_nic_main.c

887

u32 saved_producer = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/bcm_osal.h

127

void qede_osal_dma_sync(struct ecore_dev *edev, void* addr, u32 size, bool is_post);

usr/src/uts/common/io/qede/579xx/drivers/ecore/bcm_osal.h

133

void qede_osal_pci_write32(struct ecore_hwfn *hwfn, u32 addr, u32 val);

usr/src/uts/common/io/qede/579xx/drivers/ecore/bcm_osal.h

134

void qede_osal_pci_write16(struct ecore_hwfn *hwfn, u32 addr, u16 val);

usr/src/uts/common/io/qede/579xx/drivers/ecore/bcm_osal.h

135

u32 qede_osal_pci_read32(struct ecore_hwfn *hwfn, u32 addr);

usr/src/uts/common/io/qede/579xx/drivers/ecore/bcm_osal.h

136

u32 *qede_osal_reg_addr(struct ecore_hwfn *hwfn, u32 addr);

usr/src/uts/common/io/qede/579xx/drivers/ecore/bcm_osal.h

137

void qede_osal_pci_bar2_write32(struct ecore_hwfn *hwfn, u32 offset, u32 val);

usr/src/uts/common/io/qede/579xx/drivers/ecore/bcm_osal.h

154

void qede_osal_direct_reg_write32(struct ecore_hwfn *hwfn, void *addr, u32 value);

usr/src/uts/common/io/qede/579xx/drivers/ecore/bcm_osal.h

155

u32 qede_osal_direct_reg_read32(struct ecore_hwfn *hwfn, void *addr);

usr/src/uts/common/io/qede/579xx/drivers/ecore/bcm_osal.h

175

static inline u32 osal_ffsl(unsigned long x)

usr/src/uts/common/io/qede/579xx/drivers/ecore/bcm_osal.h

214

static inline u32 osal_ffz(unsigned long word)

usr/src/uts/common/io/qede/579xx/drivers/ecore/bcm_osal.h

222

static inline void OSAL_SET_BIT(u32 nr, unsigned long *addr)

usr/src/uts/common/io/qede/579xx/drivers/ecore/bcm_osal.h

227

static inline void OSAL_CLEAR_BIT(u32 nr, unsigned long *addr)

usr/src/uts/common/io/qede/579xx/drivers/ecore/bcm_osal.h

232

static inline bool OSAL_TEST_BIT(u32 nr, unsigned long *addr)

usr/src/uts/common/io/qede/579xx/drivers/ecore/bcm_osal.h

237

static inline u32 OSAL_FIND_FIRST_ZERO_BIT(unsigned long *addr, u32 limit)

usr/src/uts/common/io/qede/579xx/drivers/ecore/bcm_osal.h

239

u32 i;

usr/src/uts/common/io/qede/579xx/drivers/ecore/bcm_osal.h

240

u32 nwords = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/bcm_osal.h

248

static inline u32 OSAL_FIND_FIRST_BIT(unsigned long *addr, u32 limit)

usr/src/uts/common/io/qede/579xx/drivers/ecore/bcm_osal.h

250

u32 i;

usr/src/uts/common/io/qede/579xx/drivers/ecore/bcm_osal.h

251

u32 nwords = (limit+OSAL_BITS_PER_UL-1)/OSAL_BITS_PER_UL;

usr/src/uts/common/io/qede/579xx/drivers/ecore/bcm_osal.h

327

static inline void OSAL_DCBX_AEN(struct ecore_hwfn *p_hwfn, u32 mib_type)

usr/src/uts/common/io/qede/579xx/drivers/ecore/bcm_osal.h

338

#define OSAL_BE32 u32

usr/src/uts/common/io/qede/579xx/drivers/ecore/bcm_osal.h

427

void qede_osal_pci_read_config_byte(struct ecore_dev *, u32, u8 *);

usr/src/uts/common/io/qede/579xx/drivers/ecore/bcm_osal.h

430

void qede_osal_pci_read_config_word(struct ecore_dev *, u32, u16 *);

usr/src/uts/common/io/qede/579xx/drivers/ecore/bcm_osal.h

433

void qede_osal_pci_read_config_dword(struct ecore_dev *, u32, u32 *);

usr/src/uts/common/io/qede/579xx/drivers/ecore/bcm_osal.h

441

void qede_osal_pci_write_config_word(struct ecore_dev *, u32, u16);

usr/src/uts/common/io/qede/579xx/drivers/ecore/bcm_osal.h

451

u32 qede_osal_bar_size(struct ecore_dev *, u8);

usr/src/uts/common/io/qede/579xx/drivers/ecore/bcm_osal.h

521

u32 LOG2(u32);

usr/src/uts/common/io/qede/579xx/drivers/ecore/bcm_osal.h

624

u32 qede_osal_crc32(u32, u8 *, u64);

usr/src/uts/common/io/qede/579xx/drivers/ecore/documentation/snippets/ptt.h

35

u32 hw_addr,

usr/src/uts/common/io/qede/579xx/drivers/ecore/documentation/snippets/ptt.h

36

u32 val);

usr/src/uts/common/io/qede/579xx/drivers/ecore/documentation/snippets/ptt.h

46

u32 ecore_rd(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/documentation/snippets/ptt.h

48

u32 hw_addr);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore.h

132

static OSAL_INLINE u32 DB_ADDR(u32 cid, u32 DEMS)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore.h

134

u32 db_addr = FIELD_VALUE(DB_LEGACY_ADDR_DEMS, DEMS) |

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore.h

140

static OSAL_INLINE u32 DB_ADDR_VF(u32 cid, u32 DEMS)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore.h

142

u32 db_addr = FIELD_VALUE(DB_LEGACY_ADDR_DEMS, DEMS) |

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore.h

149

((sizeof(type_name) + (u32)(1<<(p_hwfn->p_dev->cache_shift))-1) & \

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore.h

154

#define U64_HI(val) ((u32)(((u64)(val)) >> 32))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore.h

158

#define U64_LO(val) ((u32)(((u64)(val)) & 0xffffffff))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore.h

273

u32 *init_val;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore.h

335

u32 cids;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore.h

336

u32 vf_cids;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore.h

337

u32 tids;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore.h

444

u32 resc_start[ECORE_MAX_RESC];

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore.h

445

u32 resc_num[ECORE_MAX_RESC];

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore.h

446

u32 feat_num[ECORE_MAX_FEATURES];

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore.h

463

u32 concrete_fid;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore.h

466

u32 part_num[4];

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore.h

478

u32 port_mode;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore.h

479

u32 hw_mode;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore.h

504

u32 *p_completion_word;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore.h

512

u32 *p_intermediate_buffer;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore.h

519

u32 default_min_speed; /* When wfq feature is not configured */

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore.h

520

u32 min_speed; /* when feature is configured for any 1 vport */

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore.h

548

u32 pf_rl;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore.h

554

u32 address;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore.h

555

u32 len;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore.h

564

const u32 *arr_data;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore.h

565

u32 init_ops_size;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore.h

579

u32 dp_module;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore.h

634

u32 rdma_prs_search_reg;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore.h

664

u32 dpi_size;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore.h

665

u32 dpi_count;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore.h

666

u32 dpi_start_offset; /* this is used to

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore.h

696

u32 dp_module;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore.h

786

u32 int_mode;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore.h

818

u32 drv_type;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore.h

820

u32 rdma_max_sge;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore.h

821

u32 rdma_max_inline;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore.h

822

u32 rdma_max_srq_sge;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore.h

827

u32 mcp_nvm_resp;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore.h

865

u32 concrete_fid)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore.h

883

int ecore_configure_vport_wfq(struct ecore_dev *p_dev, u16 vp_id, u32 rate);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore.h

886

u32 min_pf_rate);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore.h

908

u16 ecore_get_cm_pq_idx(struct ecore_hwfn *p_hwfn, u32 pq_flags);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_chain.h

100

u32 cons_idx;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_chain.h

122

struct ecore_chain_pbl_u32 u32;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_chain.h

132

u32 capacity;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_chain.h

133

u32 page_cnt;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_chain.h

168

u32 size;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_chain.h

188

((u32) (ELEMS_PER_PAGE(elem_size) - \

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_chain.h

205

static OSAL_INLINE u32 ecore_chain_get_prod_idx_u32(struct ecore_chain *p_chain)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_chain.h

218

static OSAL_INLINE u32 ecore_chain_get_cons_idx_u32(struct ecore_chain *p_chain)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_chain.h

230

#define ECORE_U32_MAX ((u32)~0U)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_chain.h

238

used = (u16)(((u32)ECORE_U16_MAX + 1 +

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_chain.h

239

(u32)(p_chain->u.chain16.prod_idx)) -

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_chain.h

240

(u32)p_chain->u.chain16.cons_idx);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_chain.h

248

static OSAL_INLINE u32

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_chain.h

251

u32 used;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_chain.h

255

used = (u32)(((u64)ECORE_U32_MAX + 1 +

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_chain.h

304

static OSAL_INLINE u32 ecore_chain_get_size(struct ecore_chain *p_chain)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_chain.h

310

static OSAL_INLINE u32 ecore_chain_get_page_cnt(struct ecore_chain *p_chain)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_chain.h

336

u32 page_index = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_chain.h

345

*(u32 *)idx_to_inc += (u16)p_chain->elem_unusable;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_chain.h

356

if (++(*(u32 *)page_to_inc) == p_chain->page_cnt)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_chain.h

357

*(u32 *)page_to_inc = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_chain.h

358

page_index = *(u32 *)page_to_inc;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_chain.h

398

void ecore_chain_return_multi_produced(struct ecore_chain *p_chain, u32 num)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_chain.h

455

p_prod_page_idx = &p_chain->pbl.c.u32.prod_page_idx;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_chain.h

479

static OSAL_INLINE u32 ecore_chain_get_capacity(struct ecore_chain *p_chain)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_chain.h

531

p_cons_page_idx = &p_chain->pbl.c.u32.cons_page_idx;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_chain.h

554

u32 i;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_chain.h

572

u32 reset_val = p_chain->page_cnt - 1;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_chain.h

578

p_chain->pbl.c.u32.prod_page_idx = reset_val;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_chain.h

579

p_chain->pbl.c.u32.cons_page_idx = reset_val;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_chain.h

612

ecore_chain_init_params(struct ecore_chain *p_chain, u32 page_cnt, u8 elem_size,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_chain.h

703

u32 size;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_chain.h

726

u32 size, last_page_idx;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_chain.h

764

u32 prod_idx, void *p_prod_elem)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_chain.h

780

u32 i, page_cnt;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_chain.h

793

u32 buffer_size, u32 *element_indx, u32 stop_indx,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_chain.h

81

u32 prod_page_idx;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_chain.h

82

u32 cons_page_idx;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_chain.h

99

u32 prod_idx;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

1005

u32 ent_num = OSAL_MIN_T(u32, ent_per_page, conn_num);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

1008

u32 j;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

1040

static u32 ecore_cxt_ilt_shadow_size(struct ecore_ilt_client_cfg *ilt_clients)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

1042

u32 size = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

1043

u32 i;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

1056

u32 ilt_size, i;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

1076

u32 start_line_offset)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

1079

u32 lines, line, sz_left, lines_to_skip = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

1100

u32 size;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

1102

size = OSAL_MIN_T(u32, sz_left, p_blk->real_size_in_page);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

1129

u32 size, i, j, k;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

1144

(u32)(size * sizeof(struct ecore_dma_mem)));

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

1155

u32 lines = clients[i].vf_total_lines * k;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

1176

u32 type, vf;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

1193

ecore_cid_map_alloc_single(struct ecore_hwfn *p_hwfn, u32 type,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

1194

u32 cid_start, u32 cid_count,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

1197

u32 size;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

1220

u32 start_cid = 0, vf_start_cid = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

1221

u32 type, vf;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

1258

u32 i;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

1364

u32 len;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

1368

u32 vf;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

144

u32 count;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

1457

u32 page_sz, elems_per_page, block_waste, cxt_size, cdu_params = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

150

u32 cid_count;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

1506

u32 cdu_seg_params, offset;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

1509

static const u32 rt_type_offset_arr[] = {

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

151

u32 cids_per_vf;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

1516

static const u32 rt_type_offset_fl_arr[] = {

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

1591

u32 dq_pf_max_cid = 0, dq_vf_max_cid = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

1664

u32 blk_factor;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

1727

u32 line, rt_offst, i;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

1772

u32 rounded_conn_num, conn_num, conn_max;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

178

u32 reg;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

1781

conn_max = OSAL_MAX_T(u32, conn_num, SRC_MIN_NUM_ELEMS);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

179

u32 val;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

1816

u32 active_seg_mask = 0, tm_offset, rt_reg;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

183

u32 total_size; /* 0 means not active */

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

1835

(sizeof(cfg_word) / sizeof(u32)) *

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

184

u32 real_size_in_page;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

1847

(sizeof(cfg_word) / sizeof(u32)) *

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

185

u32 start_line;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

186

u32 dynamic_line_cnt;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

1869

(sizeof(cfg_word) / sizeof(u32)) *

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

1885

(sizeof(cfg_word) / sizeof(u32)) *

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

1953

u32 *p_cid, u8 vfid)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

1957

u32 rel_cid;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

199

u32 pf_total_lines;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

2002

u32 *p_cid)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

2008

u32 cid, u8 vfid,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

2013

u32 rel_cid;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

203

u32 vf_total_lines;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

2049

void _ecore_cxt_release_cid(struct ecore_hwfn *p_hwfn, u32 cid, u8 vfid)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

2054

u32 rel_cid;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

2078

void ecore_cxt_release_cid(struct ecore_hwfn *p_hwfn, u32 cid)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

2088

u32 conn_cxt_size, hw_p_size, cxts_per_p, line;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

2124

static void ecore_cxt_set_srq_count(struct ecore_hwfn *p_hwfn, u32 num_srqs)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

2131

u32 ecore_cxt_get_srq_count(struct ecore_hwfn *p_hwfn)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

2140

u32 num_tasks)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

2142

u32 num_cons, num_qps, num_srqs;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

2146

num_srqs = OSAL_MIN_T(u32, ECORE_RDMA_MAX_SRQS, p_params->num_srqs);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

2176

num_cons = OSAL_MIN_T(u32, IWARP_MAX_QPS, p_params->num_qps);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

2185

num_qps = OSAL_MIN_T(u32, ROCE_MAX_QPS, p_params->num_qps);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

221

u32 start_cid;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

2214

u32 rdma_tasks)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

2217

u32 core_cids = 1; /* SPQ */

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

222

u32 max_count;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

2301

u32 proto, seg, total_lines, i, shadow_line;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

234

u32 task_type_size[NUM_TASK_TYPES];

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

2353

u32 iid)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

2355

u32 reg_offset, shadow_line, elem_size, hw_p_size, elems_per_p, line;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

239

u32 vf_count;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

2427

u32 elem_i;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

2456

reg_offset, sizeof(ilt_hw_entry) / sizeof(u32),

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

2460

u32 last_cid_allocated = (1 + (iid / elems_per_p)) *

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

248

u32 pf_start_line;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

2496

u32 start_iid, u32 count)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

2498

u32 start_line, end_line, shadow_start_line, shadow_end_line;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

2499

u32 reg_offset, elem_size, hw_p_size, elems_per_p;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

2502

u32 end_iid = start_iid + count;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

2505

u32 i;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

255

u32 t2_num_pages;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

2570

sizeof(ilt_hw_entry) / sizeof(u32),

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

2580

u32 tid,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

2588

u32 proto, seg;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

2589

u32 total_lines;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

2590

u32 tid_size, ilt_idx;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

2591

u32 num_tids_per_block;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

270

u32 srq_count;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

273

u32 arfs_count;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

303

u32 pf_cids;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

304

u32 per_vf_cids;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

310

u32 type;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

320

u32 pf_cids;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

321

u32 per_vf_cids;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

328

u32 i;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

344

u32 pf_cids;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

345

u32 pf_tids[NUM_TASK_PF_SEGMENTS]; /* per segment */

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

346

u32 pf_tids_total;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

347

u32 per_vf_cids;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

348

u32 per_vf_tids;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

414

u32 vf_cids = 0, type, j;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

415

u32 vf_tids = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

444

u32 seg)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

447

u32 i;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

462

u32 cid_count, u32 vf_cid_cnt)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

471

u32 page_sz = p_mgr->clients[ILT_CLI_CDUC].p_size.val;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

472

u32 cxt_size = CONN_CXT_SIZE(p_hwfn);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

473

u32 elems_per_page = ILT_PAGE_IN_BYTES(page_sz) / cxt_size;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

474

u32 align = elems_per_page * DQ_RANGE_ALIGN;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

480

u32 ecore_cxt_get_proto_cid_count(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

482

u32 *vf_cid)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

490

u32 ecore_cxt_get_proto_cid_start(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

496

u32 ecore_cxt_get_proto_tid_count(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

499

u32 cnt = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

512

u32 count,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

528

u32 start_line,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

529

u32 total_size,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

530

u32 elem_size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

532

u32 ilt_size = ILT_PAGE_IN_BYTES(p_cli->p_size.val);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

548

u32 *p_line,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

568

static u32 ecore_ilt_get_dynamic_line_cnt(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

571

u32 cid_count = p_hwfn->p_cxt_mngr->conn_cfg[PROTOCOLID_ROCE].cid_count;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

573

u32 lines_to_skip = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

574

u32 cxts_per_p;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

582

(u32)CONN_CXT_SIZE(p_hwfn);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

607

u32 *line_count)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

610

u32 curr_line, total, i, task_size, line;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

810

u32 local_max = OSAL_MAX_T(u32, total,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

882

u32 ecore_cxt_cfg_ilt_compute_excess(struct ecore_hwfn *p_hwfn, u32 used_lines)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

885

u32 excess_lines, available_lines;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

887

u32 ilt_page_size, elem_size;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

923

u32 i;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

942

u32 conn_num, total_size, ent_per_page, psz, i;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.c

977

u32 size = OSAL_MIN_T(u32, total_size, psz);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.h

166

void ecore_cxt_release_cid(struct ecore_hwfn *p_hwfn, u32 cid);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.h

176

u32 cid, u8 vfid);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.h

189

u32 *p_cid);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.h

204

u32 *p_cid, u8 vfid);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.h

220

u32 iid);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.h

234

u32 start_iid, u32 count);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.h

239

u32 tid,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.h

54

u32 ecore_cxt_get_proto_cid_count(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.h

56

u32 *vf_cid);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.h

58

u32 ecore_cxt_get_proto_tid_count(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.h

61

u32 ecore_cxt_get_proto_cid_start(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.h

63

u32 ecore_cxt_get_srq_count(struct ecore_hwfn *p_hwfn);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.h

73

u32 rdma_tasks);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.h

84

u32 *last_line);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt.h

92

u32 ecore_cxt_cfg_ilt_compute_excess(struct ecore_hwfn *p_hwfn, u32 used_lines);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt_api.h

43

u32 iid;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt_api.h

49

u32 tid_size;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt_api.h

50

u32 num_tids_per_block;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_cxt_api.h

51

u32 waste;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

121

static u32 cond5(const u32 *r, const u32 *imm) {

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

125

static u32 cond7(const u32 *r, const u32 *imm) {

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

129

static u32 cond14(const u32 *r, const u32 *imm) {

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

133

static u32 cond6(const u32 *r, const u32 *imm) {

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

137

static u32 cond9(const u32 *r, const u32 *imm) {

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

141

static u32 cond10(const u32 *r, const u32 *imm) {

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

145

static u32 cond4(const u32 *r, const u32 *imm) {

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

149

static u32 cond0(const u32 *r, const u32 *imm) {

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

153

static u32 cond1(const u32 *r, const u32 *imm) {

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

157

static u32 cond11(const u32 *r, const u32 *imm) {

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

161

static u32 cond12(const u32 *r, const u32 *imm) {

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

165

static u32 cond3(const u32 *r, const u32 *imm) {

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

169

static u32 cond13(const u32 *r, const u32 *imm) {

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

173

static u32 cond8(const u32 *r, const u32 *imm) {

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

1764

static u32 s_app_ver;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

177

static u32 cond2(const u32 *r, const u32 *imm) {

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

1785

static u32 ecore_read_unaligned_dword(u8 *buf)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

1787

u32 dword;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

1797

static u32 ecore_phys_addr_diff(struct dbg_bus_mem_addr *a,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

1806

u32 val)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

1814

static u32 ecore_grc_get_param(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

182

static u32 (*cond_arr[])(const u32 *r, const u32 *imm) = {

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

1929

u32 addr, i, *dest;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

1938

dest = (u32*)&fw_info_location;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

1946

dest = (u32*)fw_info;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

1955

static u32 ecore_dump_str(char *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

1962

return (u32)OSAL_STRLEN(str) + 1;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

1968

static u32 ecore_dump_align(char *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

1970

u32 byte_offset)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

1986

static u32 ecore_dump_str_param(u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

1992

u32 offset = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2014

static u32 ecore_dump_num_param(u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2017

u32 param_val)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2020

u32 offset = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2045

static u32 ecore_dump_fw_ver_param(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2047

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2054

u32 offset = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2096

static u32 ecore_dump_mfw_ver_param(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2098

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2108

u32 public_data_addr, global_section_offsize_addr, global_section_offsize, global_section_addr, mfw_ver;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2134

static u32 ecore_dump_section_hdr(u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2137

u32 num_params)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2145

static u32 ecore_dump_common_global_params(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2147

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2152

u32 offset = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2173

static u32 ecore_dump_last_section(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2174

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2175

u32 offset,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2178

u32 start_offset = offset;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2197

u32 reg_val[MAX_DBG_RESET_REGS] = { 0 };

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2198

u32 i;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2225

u32 dbg_reset_reg_addr, old_reset_reg_val, new_reset_reg_val;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2248

u32 client_mask)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2260

u32 base_addr, sem_filter_params = filter_type;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

228

u32 delay_factor;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2328

u32 block_id;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2358

u32 polling_ms = SEMI_SYNC_FIFO_POLLING_DELAY_MS * s_platform_defs[dev_data->platform_id].delay_factor;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2359

u32 polling_count = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2375

u32 base_addr = storm->sem_fast_mem_addr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

239

u32 sem_fast_mem_addr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

240

u32 sem_frame_mode_addr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

241

u32 sem_slow_enable_addr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2413

u32 data_val,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2414

u32 data_mask,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

242

u32 sem_slow_mode_addr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2423

u32 reg_offset = constraint_id * BYTES_IN_DWORD;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

243

u32 sem_slow_mode1_conf_addr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

244

u32 sem_sync_dbg_empty_addr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2446

static u32 ecore_bus_dump_int_buf_range(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2448

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

245

u32 sem_slow_dbg_empty_addr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2450

u32 start_line,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2451

u32 end_line)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2453

u32 line, reg_addr, i, offset = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

246

u32 cm_ctx_wr_addr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

247

u32 cm_conn_ag_ctx_lid_size;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2470

static u32 ecore_bus_dump_int_buf(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2472

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2475

u32 last_written_line, offset = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

248

u32 cm_conn_ag_ctx_rd_addr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

249

u32 cm_conn_st_ctx_lid_size;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

250

u32 cm_conn_st_ctx_rd_addr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2505

static u32 ecore_bus_dump_pci_buf_range(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2506

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2508

u32 start_line,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2509

u32 end_line)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

251

u32 cm_task_ag_ctx_lid_size;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2512

u32 offset = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2516

u32 *pci_buf_start = (u32*)(osal_uintptr_t)*((u64*)virt_addr_lo);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2517

u32 *pci_buf, line, i;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

252

u32 cm_task_ag_ctx_rd_addr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

253

u32 cm_task_st_ctx_lid_size;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2534

static u32 ecore_bus_dump_pci_buf(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2536

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

254

u32 cm_task_st_ctx_rd_addr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2540

u32 next_wr_byte_offset, next_wr_line_offset;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2542

u32 pci_buf_size_in_lines, offset = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2570

static u32 ecore_bus_dump_data(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2572

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2595

u32 *pci_buf;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2599

pci_buf = (u32*)(osal_uintptr_t)*((u64*)virt_addr_lo);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2614

static u32 ecore_bus_dump_inputs(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2615

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2620

u32 block_id, offset = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

264

u32 storm_id;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

266

u32 dbg_select_addr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2661

static u32 ecore_bus_dump_hdr(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2663

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2668

u32 offset = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

267

u32 dbg_enable_addr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

268

u32 dbg_shift_addr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2684

u32 recorded_dwords = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

269

u32 dbg_force_valid_addr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

270

u32 dbg_force_frame_addr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2806

u32 reg_addr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2825

u32 reg_val[MAX_DBG_RESET_REGS] = { 0 };

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2826

u32 block_id, i;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

283

u32 addr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

284

u32 unreset_val;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2876

u32 block_id;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2908

static u32 ecore_grc_dump_regs_hdr(u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2910

u32 num_reg_entries,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2917

u32 offset = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2934

static u32 ecore_grc_dump_addr_range(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2936

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2938

u32 addr,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2939

u32 len,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2942

u32 byte_addr = DWORDS_TO_BYTES(addr), offset = 0, i;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2956

static u32 ecore_grc_dump_reg_entry_hdr(u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2958

u32 addr,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2959

u32 len)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2970

static u32 ecore_grc_dump_reg_entry(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2972

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2974

u32 addr,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2975

u32 len,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2978

u32 offset = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2993

static u32 ecore_grc_dump_reg_entry_skip(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2995

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2997

u32 addr,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2998

u32 total_len,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

2999

u32 read_len,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3000

u32 skip_len)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3002

u32 offset = 0, reg_offset = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3010

u32 curr_len = OSAL_MIN_T(u32, read_len, total_len - reg_offset);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3017

curr_len = OSAL_MIN_T(u32, skip_len, total_len - skip_len);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

302

u32 default_val[MAX_CHIP_IDS];

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3029

static u32 ecore_grc_dump_regs_entries(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

303

u32 min;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3032

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3035

u32 *num_dumped_reg_entries)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3037

u32 i, offset = 0, input_offset = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

304

u32 max;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

306

u32 exclude_all_preset_val;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

307

u32 crash_preset_val;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3074

static u32 ecore_grc_dump_split_data(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3077

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3081

u32 split_id,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3085

u32 num_dumped_reg_entries, offset;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3103

static u32 ecore_grc_dump_registers(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3105

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3113

u32 offset = 0, input_offset = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3124

u32 split_data_size;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3135

offset += ecore_grc_dump_split_data(p_hwfn, p_ptt, curr_input_regs_arr, dump_buf + offset, dump, block_enable, "eng", (u32)(-1), param_name, param_val);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

314

u32 addr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

315

u32 num_entries[MAX_CHIP_IDS];

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

316

u32 entry_width[MAX_CHIP_IDS];

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3178

static u32 ecore_grc_dump_reset_regs(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3180

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3184

u32 i, offset = 0, num_regs = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3208

static u32 ecore_grc_dump_modified_regs(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3210

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3214

u32 block_id, offset = 0, num_reg_entries = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

322

u32 base_row;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

323

u32 num_rows;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3266

static u32 ecore_grc_dump_special_regs(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3268

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3271

u32 offset = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3296

static u32 ecore_grc_dump_mem_hdr(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3297

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3300

u32 addr,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3301

u32 len,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3302

u32 bit_width,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3309

u32 offset = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

331

u32 addr_reg_addr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

332

u32 data_reg_addr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

333

u32 num_of_blocks[MAX_CHIP_IDS];

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3342

u32 addr_in_bytes = DWORDS_TO_BYTES(addr);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3379

static u32 ecore_grc_dump_mem(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3381

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3384

u32 addr,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3385

u32 len,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3387

u32 bit_width,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3393

u32 offset = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

340

u32 base_addr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3402

static u32 ecore_grc_dump_mem_entries(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3405

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3408

u32 i, offset = 0, input_offset = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3414

u32 num_entries;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

343

u32 tbus_addr_lo_addr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3437

u32 mem_addr, mem_len;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

346

u32 tbus_addr_hi_addr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

349

u32 tbus_data_lo_addr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3491

static u32 ecore_grc_dump_memories(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3493

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3496

u32 offset = 0, input_offset = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3501

u32 split_data_size;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

352

u32 tbus_data_hi_addr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3530

static u32 ecore_grc_dump_ctx_data(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3532

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3535

u32 num_lids,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3536

u32 lid_size,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3537

u32 rd_reg_addr,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3541

u32 i, lid, total_size, offset = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3566

static u32 ecore_grc_dump_ctx(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3568

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3571

u32 offset = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3601

static u32 ecore_grc_dump_iors(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3603

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3607

u32 addr, offset = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3627

static u32 ecore_grc_dump_vfc_cam(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3629

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3633

u32 total_size = VFC_CAM_NUM_ROWS * VFC_CAM_RESP_DWORDS;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3635

u32 cam_addr[VFC_CAM_ADDR_DWORDS] = { 0 };

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3636

u32 cam_cmd[VFC_CAM_CMD_DWORDS] = { 0 };

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3637

u32 row, i, offset = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

364

#define BYTES_IN_DWORD sizeof(u32)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3664

static u32 ecore_grc_dump_vfc_ram(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3666

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3671

u32 total_size = ram_defs->num_rows * VFC_RAM_RESP_DWORDS;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3673

u32 ram_addr[VFC_RAM_ADDR_DWORDS] = { 0 };

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3674

u32 ram_cmd[VFC_RAM_CMD_DWORDS] = { 0 };

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3675

u32 row, i, offset = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3702

static u32 ecore_grc_dump_vfc(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3704

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3709

u32 offset = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3729

static u32 ecore_grc_dump_rss(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3731

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3735

u32 offset = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3739

u32 rss_addr, num_entries, entry_width, total_dwords, i;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3769

static u32 ecore_grc_dump_big_ram(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3771

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3776

u32 total_blocks, ram_size, offset = 0, i;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3804

static u32 ecore_grc_dump_mcp(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3806

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3811

u32 offset = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3842

static u32 ecore_grc_dump_phy(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3844

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3847

u32 offset = 0, tbus_lo_offset, tbus_hi_offset;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3852

u32 addr_lo_addr, addr_hi_addr, data_lo_addr, data_hi_addr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3907

static u32 ecore_grc_dump_static_debug(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3909

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3913

u32 block_id, line_id, offset = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3941

u32 block_dwords;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3966

for (line_id = 0; line_id < (u32)NUM_DBG_LINES(block_desc); line_id++) {

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3993

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

3995

u32 *num_dumped_dwords)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4000

u32 offset = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4134

static u32 ecore_idle_chk_dump_failure(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4136

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4141

u32 *cond_reg_values)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4146

u32 i, next_reg_offset = 0, offset = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4195

u32 block_id;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4213

u32 addr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4246

static u32 ecore_idle_chk_dump_rule_entries(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4248

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4251

u32 num_input_rules,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4252

u32 *num_failing_rules)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4255

u32 cond_reg_values[IDLE_CHK_MAX_ENTRIES_SIZE];

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4256

u32 i, offset = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4268

const u32 *imm_values;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4280

u32 block_id = GET_FIELD(cond_regs[reg_id].data, DBG_IDLE_CHK_COND_REG_BLOCK_ID);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4299

u32 next_reg_offset = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4310

u32 padded_entry_size, addr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4347

static u32 ecore_idle_chk_dump(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4349

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4352

u32 num_failing_rules_offset, offset = 0, input_offset = 0, num_failing_rules = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4366

u32 curr_failing_rules;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4397

u32 image_type,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4398

u32 *nvram_offset_bytes,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4399

u32 *nvram_size_bytes)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4401

u32 ret_mcp_resp, ret_mcp_param, ret_txn_size;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4406

nvm_result = ecore_mcp_nvm_rd_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_NVM_GET_FILE_ATT, image_type, &ret_mcp_resp, &ret_mcp_param, &ret_txn_size, (u32*)&file_att);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4428

u32 nvram_offset_bytes,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4429

u32 nvram_size_bytes,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4430

u32 *ret_buf)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4432

u32 ret_mcp_resp, ret_mcp_param, ret_read_size, bytes_to_copy;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4434

u32 read_offset = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4442

if (ecore_mcp_nvm_rd_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_NVM_READ_NVRAM, (nvram_offset_bytes + read_offset) | (bytes_to_copy << DRV_MB_PARAM_NVM_LEN_SHIFT), &ret_mcp_resp, &ret_mcp_param, &ret_read_size, (u32*)((u8*)ret_buf + read_offset)))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4463

u32 *trace_data_grc_addr,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4464

u32 *trace_data_size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4466

u32 spad_trace_offsize, signature;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4494

u32 trace_data_size_bytes,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4495

u32 *running_bundle_id,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4496

u32 *trace_meta_offset,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4497

u32 *trace_meta_size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4499

u32 spad_trace_offsize, nvram_image_type, running_mfw_addr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4518

u32 nvram_offset_in_bytes,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4519

u32 size_in_bytes,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4520

u32 *buf)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4524

u32 signature;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4558

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4560

u32 *num_dumped_dwords)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4562

u32 trace_meta_offset_bytes = 0, trace_meta_size_bytes = 0, trace_meta_size_dwords = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4563

u32 trace_data_grc_addr, trace_data_size_bytes, trace_data_size_dwords;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4564

u32 running_bundle_id, offset = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4641

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4643

u32 *num_dumped_dwords)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4645

u32 dwords_read, size_param_offset, offset = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4697

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4699

u32 *num_dumped_dwords)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4701

u32 dwords_read, size_param_offset, offset = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4752

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4754

u32 *num_dumped_dwords)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4756

u32 size_param_offset, override_window_dwords, offset = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4794

static u32 ecore_fw_asserts_dump(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4796

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4803

u32 offset = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4812

u32 fw_asserts_section_addr, next_list_idx_addr, next_list_idx, last_list_idx, addr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4860

s_dbg_arrays[buf_id].ptr = (u32*)(bin_ptr + buf_array[buf_id].offset);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4867

enum dbg_status ecore_dbg_set_app_ver(u32 ver)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4877

u32 ecore_dbg_get_fw_func_ver(void)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4970

dev_data->bus.pci_buf.virt_addr.lo = (u32)((u64)(osal_uintptr_t)pci_buf);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4971

dev_data->bus.pci_buf.virt_addr.hi = (u32)((u64)(osal_uintptr_t)pci_buf >> 32);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

4989

u32 dest_addr_lo32,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

5025

ecore_wr(p_hwfn, p_ptt, DBG_REG_ETHERNET_HDR_6, (u32)SRC_MAC_ADDR_LO16 | ((u32)dest_addr_hi16 << 16));

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

5027

ecore_wr(p_hwfn, p_ptt, DBG_REG_ETHERNET_HDR_4, (u32)ETH_TYPE << 16);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

5042

u32 block_id;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

5149

u32 tick_len)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

5228

u32 cid)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

5286

u32 post_cycles,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

5392

u32 data_val,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

5393

u32 data_mask,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

543

const u32 *ptr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

544

u32 size_in_dwords;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

5489

u32 block_id, client_mask = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

5530

u32 block_id;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

554

{ (u32*)dbg_modes_tree_buf, OSAL_ARRAY_SIZE(dbg_modes_tree_buf)},

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

5579

u32 storm_id_mask = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

5630

u32 block_id;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

5729

u32 block_id;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

5840

u32 trigger_state = ecore_rd(p_hwfn, p_ptt, DBG_REG_TRIGGER_STATUS_CUR_STATE);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

5853

u32 *buf_size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

5867

*buf_size = (u32)ecore_bus_dump_hdr(p_hwfn, p_ptt, OSAL_NULL, false);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

5886

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

5887

u32 buf_size_in_dwords,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

5888

u32 *num_dumped_dwords)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

5891

u32 min_buf_size_in_dwords, block_id, offset = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

5924

u32 recorded_dwords = ecore_bus_dump_data(p_hwfn, p_ptt, dump_buf + offset, true);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

5962

u32 val)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

5991

u32 preset_val;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

6016

u32 i;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

6024

u32 *buf_size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

6042

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

6043

u32 buf_size_in_dwords,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

6044

u32 *num_dumped_dwords)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

6046

u32 needed_buf_size_in_dwords;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

6072

u32 *buf_size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

6100

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

6101

u32 buf_size_in_dwords,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

6102

u32 *num_dumped_dwords)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

6104

u32 needed_buf_size_in_dwords;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

6130

u32 *buf_size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

6144

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

6145

u32 buf_size_in_dwords,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

6146

u32 *num_dumped_dwords)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

6148

u32 needed_buf_size_in_dwords;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

6172

u32 *buf_size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

6186

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

6187

u32 buf_size_in_dwords,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

6188

u32 *num_dumped_dwords)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

6190

u32 needed_buf_size_in_dwords;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

6215

u32 *buf_size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

6229

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

6230

u32 buf_size_in_dwords,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

6231

u32 *num_dumped_dwords)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

6233

u32 needed_buf_size_in_dwords;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

6258

u32 *buf_size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

6272

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

6273

u32 buf_size_in_dwords,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

6274

u32 *num_dumped_dwords)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

6276

u32 needed_buf_size_in_dwords;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

6301

u32 *buf_size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

6320

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

6321

u32 buf_size_in_dwords,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

6322

u32 *num_dumped_dwords)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

6324

u32 needed_buf_size_in_dwords;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

6366

u32 sts_addr, sts_val;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

6412

u32 sts_addr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c

6429

u32 reset_reg;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.h

172

u32 dest_addr_lo32,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.h

261

u32 tick_len);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.h

314

u32 cid);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.h

383

u32 post_cycles,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.h

467

u32 data,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.h

468

u32 data_mask,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.h

519

u32 *buf_size);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.h

541

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.h

542

u32 buf_size_in_dwords,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.h

543

u32 *num_dumped_dwords);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.h

559

u32 val);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.h

58

enum dbg_status ecore_dbg_set_app_ver(u32 ver);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.h

583

u32 *buf_size);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.h

601

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.h

602

u32 buf_size_in_dwords,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.h

603

u32 *num_dumped_dwords);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.h

619

u32 *buf_size);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.h

638

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.h

639

u32 buf_size_in_dwords,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.h

640

u32 *num_dumped_dwords);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.h

65

u32 ecore_dbg_get_fw_func_ver(void);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.h

659

u32 *buf_size);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.h

682

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.h

683

u32 buf_size_in_dwords,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.h

684

u32 *num_dumped_dwords);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.h

700

u32 *buf_size);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.h

720

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.h

721

u32 buf_size_in_dwords,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.h

722

u32 *num_dumped_dwords);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.h

738

u32 *buf_size);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.h

758

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.h

759

u32 buf_size_in_dwords,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.h

760

u32 *num_dumped_dwords);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.h

777

u32 *buf_size);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.h

797

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.h

798

u32 buf_size_in_dwords,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.h

799

u32 *num_dumped_dwords);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.h

815

u32 *buf_size);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.h

834

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.h

835

u32 buf_size_in_dwords,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.h

836

u32 *num_dumped_dwords);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_values.h

3580

static const u32 dump_mem[] = {

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_values.h

3950

static const u32 idle_chk_regs[] = {

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_values.h

5690

static const u32 idle_chk_imms[] = {

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_values.h

5714

static const u32 idle_chk_rules[] = {

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_values.h

62

static const u32 dump_reg[] = {

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_values.h

7080

static const u32 attn_reg[] = {

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_values.h

7407

static const u32 attn_block[] = {

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_values.h

7499

static const u32 dbg_bus_lines[] = {

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_values.h

7602

static const u32 dbg_bus_blocks[] = {

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_values_user.h

1099

static const u32 dbg_bus_blocks_user_data[] = {

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_values_user.h

270

static const u32 attn_name_offsets[] = {

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_values_user.h

40

static const u32 idle_chk_rule_parsing_data[] = {

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_values_user.h

977

static const u32 dbg_bus_line_name_offsets[] = {

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx.c

101

static bool ecore_dcbx_default_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx.c

113

static bool ecore_dcbx_iscsi_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx.c

1170

u32 *pfc, struct ecore_dcbx_params *p_params)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx.c

1188

*pfc |= (u32)p_params->pfc.max_tc << DCBX_PFC_CAPS_SHIFT;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx.c

1205

u32 val;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx.c

1224

p_ets->flags |= (u32)p_params->max_ets_tc << DCBX_ETS_MAX_TCS_SHIFT;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx.c

1235

val = (((u32)p_params->ets_pri_tc_tbl[i]) << ((7 - i) * 4));

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx.c

1255

u32 *entry;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx.c

126

static bool ecore_dcbx_fcoe_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx.c

1269

p_app->flags |= (u32)p_params->num_app_entries <<

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx.c

1279

*entry |= ((u32)DCBX_APP_SF_IEEE_ETHTYPE <<

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx.c

1281

*entry |= ((u32)DCBX_APP_SF_ETHTYPE <<

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx.c

1285

*entry |= ((u32)DCBX_APP_SF_IEEE_TCP_PORT <<

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx.c

1287

*entry |= ((u32)DCBX_APP_SF_PORT <<

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx.c

1291

*entry |= ((u32)DCBX_APP_SF_IEEE_UDP_PORT <<

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx.c

1293

*entry |= ((u32)DCBX_APP_SF_PORT <<

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx.c

1297

*entry |= (u32)DCBX_APP_SF_IEEE_TCP_UDP_PORT <<

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx.c

1299

*entry |= ((u32)DCBX_APP_SF_PORT <<

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx.c

1306

*entry |= ((u32)DCBX_APP_SF_ETHTYPE <<

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx.c

1309

*entry |= ((u32)DCBX_APP_SF_PORT <<

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx.c

1313

*entry |= ((u32)p_params->app_entry[i].proto_id <<

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx.c

1316

*entry |= ((u32)(p_params->app_entry[i].prio) <<

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx.c

1362

u32 val;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx.c

1374

val |= (((u32)p_params->dscp.dscp_pri_map[entry]) <<

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx.c

138

static bool ecore_dcbx_roce_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx.c

1395

u32 resp = 0, param = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx.c

150

static bool ecore_dcbx_roce_v2_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx.c

163

static bool ecore_dcbx_iwarp_tlv(struct ecore_hwfn *p_hwfn, u32 app_info_bitmap,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx.c

266

u32 pri_mask, pri = ECORE_MAX_PFC_PRIORITIES;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx.c

267

u32 index = ECORE_MAX_PFC_PRIORITIES - 1;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx.c

294

u32 app_prio_bitmap, u16 id,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx.c

326

struct dcbx_app_priority_entry *p_tbl, u32 pri_tc_tbl,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx.c

405

u32 pri_tc_tbl, flags;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx.c

446

u32 prefix_seq_num, suffix_seq_num;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx.c

543

u32 val;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx.c

591

u32 pfc, struct ecore_dcbx_params *p_params)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx.c

619

u32 bw_map[2], tsa_map[2], pri_map;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx.c

65

((u32)(prio_tc_tbl >> ((7 - prio) * 4)) & 0x7)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx.c

665

u32 pfc, struct ecore_dcbx_params *p_params,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx.c

67

static bool ecore_dcbx_app_ethtype(u32 app_info_bitmap)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx.c

711

u32 flags;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx.c

73

static bool ecore_dcbx_ieee_app_ethtype(u32 app_info_bitmap)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx.c

771

u32 pri_map;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx.c

785

p_dscp->dscp_pri_map[entry] = (u32)(pri_map >>

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx.c

84

static bool ecore_dcbx_app_port(u32 app_info_bitmap)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx.c

90

static bool ecore_dcbx_ieee_app_port(u32 app_info_bitmap, u8 type)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx.h

69

u32 addr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx_api.h

157

u32 err;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx_api.h

186

u32 override_flags;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx_api.h

189

u32 ver_num;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx_api.h

78

u32 peer_chassis_id[ECORE_LLDP_CHASSIS_ID_STAT_LEN];

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx_api.h

79

u32 peer_port_id[ECORE_LLDP_PORT_ID_STAT_LEN];

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx_api.h

82

u32 tx_interval;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx_api.h

83

u32 max_credit;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx_api.h

87

u32 local_chassis_id[ECORE_LLDP_CHASSIS_ID_STAT_LEN];

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dcbx_api.h

88

u32 local_port_id[ECORE_LLDP_PORT_ID_STAT_LEN];

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

1119

u32 command = 0, addr, count = FINAL_CLEANUP_POLL_CNT;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

1246

u32 pl_hv = 1;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

126

u32 dp_module,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

130

u32 i;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

1301

u32 offset = CAU_REG_SB_VAR_MEMORY_RT_OFFSET;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

1332

u32 val, wr_mbs, cache_line_size;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

1352

cache_line_size = OSAL_MIN_T(u32, OSAL_CACHE_LINE_SIZE, wr_mbs);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

1388

u32 concrete_fid;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

1475

u32 addr,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

1485

(u32)((data >> 32) & 0xffffffff),

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

1486

(u32)(data & 0xffffffff));

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

1548

u32 mac_base = NWM_REG_MAC0_K2_E5 + (port << 2) * NWM_REG_MAC0_SIZE;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

1595

u32 xmac_rxctrl = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

1599

ecore_wr(p_hwfn, p_ptt, MISC_REG_RESET_PL_PDA_VAUX + 2*sizeof(u32),

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

1602

ecore_wr(p_hwfn, p_ptt, MISC_REG_RESET_PL_PDA_VAUX + sizeof(u32),

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

1611

ecore_wr(p_hwfn, p_ptt, MISC_REG_RESET_PL_PDA_VAUX + 2 * sizeof(u32),

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

1614

ecore_wr(p_hwfn, p_ptt, MISC_REG_RESET_PL_PDA_VAUX + sizeof(u32),

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

1640

u32 pwm_region_size,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

1641

u32 n_cpus)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

1643

u32 dpi_page_size_1, dpi_page_size_2, dpi_page_size;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

1644

u32 dpi_bit_shift, dpi_count;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

1645

u32 min_dpis;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

1669

dpi_page_size_2 = OSAL_MAX_T(u32, ECORE_WID_SIZE, OSAL_PAGE_SIZE);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

1670

dpi_page_size = OSAL_MAX_T(u32, dpi_page_size_1, dpi_page_size_2);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

1677

min_dpis = OSAL_MAX_T(u32, ECORE_MIN_DPIS, min_dpis);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

1702

u32 pwm_regsize, norm_regsize;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

1703

u32 non_pwm_conn, min_addr_reg1;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

1704

u32 db_bar_size, n_cpus = 1;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

1705

u32 roce_edpm_mode;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

1706

u32 pf_dems_shift;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

1865

u32 val;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

1900

u32 prs_reg;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

1987

u32 val;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

2056

u32 delay_idx = 0, val, set_val = enable ? 1 : 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

2131

u32 load_code, param, drv_mb_param;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

2364

u32 addr, u32 expected_val)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

2366

u32 val = ecore_rd(p_hwfn, p_ptt, addr);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

237

static u32 ecore_get_pq_flags(struct ecore_hwfn *p_hwfn)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

239

u32 flags;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

2573

u32 reg_idx,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

2574

u32 pattern_size,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

2575

u32 crc)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

2578

u32 reg_len = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

2579

u32 reg_crc = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

2658

const u32 wake_buffer_clear_offset =

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

2675

u32 *buf = OSAL_NULL;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

2676

u32 i = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

2677

const u32 reg_wake_buffer_offest =

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

2699

buf = (u32 *)wake_info->wk_buffer;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

2701

for (i = 0; i < (wake_info->wk_pkt_len / sizeof(u32)); i++)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

2703

if ((i*sizeof(u32)) >= sizeof(wake_info->wk_buffer))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

2711

reg_wake_buffer_offest + (i * sizeof(u32)));

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

2785

u32 *feat_num = p_hwfn->hw_info.feat_num;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

2787

u32 non_l2_sbs = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

2798

u32 max_cnqs;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

2801

OSAL_MIN_T(u32,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

2806

max_cnqs = (u32)p_hwfn->pf_params.rdma_pf_params.max_cnqs;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

2811

OSAL_MIN_T(u32,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

2824

OSAL_MIN_T(u32,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

2828

OSAL_MIN_T(u32,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

2836

OSAL_MIN_T(u32, sb_cnt.cnt, RESC_NUM(p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

2841

OSAL_MIN_T(u32, sb_cnt.cnt, RESC_NUM(p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

2892

enum ecore_resources res_id, u32 resc_max_val,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

2893

u32 *p_mcp_resp)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

2918

u32 resc_max_val, mcp_resp;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

294

num_pf_rls = (u16)OSAL_MIN_T(u32, RESC_NUM(p_hwfn, ECORE_RL),

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

295

(u16)OSAL_MIN_T(u32, RESC_NUM(p_hwfn, ECORE_VPORT),

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

2965

u32 *p_resc_num, u32 *p_resc_start)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

3053

u32 dflt_resc_num = 0, dflt_resc_start = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

3054

u32 mcp_resp, *p_resc_num, *p_resc_start;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

313

u32 pq_flags = ecore_get_pq_flags(p_hwfn);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

3158

u32 *resc_start = p_hwfn->hw_info.resc_start;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

3159

u32 *resc_num = p_hwfn->hw_info.resc_num;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

3166

u32 roce_min_ilt_lines = PXP_NUM_ILT_RECORDS_BB / MAX_NUM_PFS_BB;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

323

u32 pq_flags = ecore_get_pq_flags(p_hwfn);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

3241

resc_num[ECORE_ILT] = OSAL_MAX_T(u32,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

3292

u32 nvm_cfg1_offset, mf_mode, addr, generic_cont0, core_cfg, dcbx_mode;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

3293

u32 port_cfg_addr, link_temp, nvm_cfg_addr, device_capabilities;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

3534

u32 reg_function_hide, tmp, eng_mask, low_pfs_mask;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

3607

u32 port_mode;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

3637

u32 port;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

3813

u32 tmp;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4179

u32 size, i;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4217

u32 page_cnt = p_chain->page_cnt, i, pbl_size;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4266

osal_size_t elem_size, u32 page_cnt)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4277

chain_size > ((u32)ECORE_U16_MAX + 1)) ||

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4294

u32 i;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4352

u32 page_cnt = p_chain->page_cnt, size, i;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

438

u8 tc, u32 pq_init_flags)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4414

u32 num_elems, osal_size_t elem_size,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4418

u32 page_cnt;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4519

struct ecore_ptt *p_ptt, u32 high, u32 low,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4520

u32 *p_entry_num)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4522

u32 en;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4529

i * sizeof(u32));

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4534

2 * i * sizeof(u32), low);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4537

(2 * i + 1) * sizeof(u32), high);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4540

i * sizeof(u32), 0);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4543

i * sizeof(u32), 0);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4546

i * sizeof(u32), 1);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4560

u32 high, u32 low, u32 *p_entry_num)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4570

u32 high, low, entry_num;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4602

struct ecore_ptt *p_ptt, u32 high, u32 low,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4603

u32 *p_entry_num)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4611

2 * i * sizeof(u32)) != low)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4615

(2 * i + 1) * sizeof(u32)) != high)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4619

NIG_REG_LLH_FUNC_FILTER_EN_BB_K2 + i * sizeof(u32), 0);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4622

2 * i * sizeof(u32), 0);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4625

(2 * i + 1) * sizeof(u32), 0);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4639

struct ecore_ptt *p_ptt, u32 high, u32 low,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4640

u32 *p_entry_num)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4650

u32 high, low, entry_num;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4684

u32 high, u32 low, u32 *p_entry_num)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4686

u32 en;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

469

u32 pq_flags)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4693

i * sizeof(u32));

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4698

2 * i * sizeof(u32), low);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4701

(2 * i + 1) * sizeof(u32), high);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4704

i * sizeof(u32), 1);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4707

i * sizeof(u32), 1 << type);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4709

NIG_REG_LLH_FUNC_FILTER_EN_BB_K2 + i * sizeof(u32), 1);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4725

u32 high, u32 low, u32 *p_entry_num)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4739

u32 high, low, entry_num;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4826

u32 high, u32 low, u32 *p_entry_num)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4834

i * sizeof(u32)))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4838

i * sizeof(u32)))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4842

i * sizeof(u32)) & (1 << type)))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4846

2 * i * sizeof(u32)) != low)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4850

(2 * i + 1) * sizeof(u32)) != high)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4854

NIG_REG_LLH_FUNC_FILTER_EN_BB_K2 + i * sizeof(u32), 0);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4857

i * sizeof(u32), 0);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4860

i * sizeof(u32), 0);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4863

2 * i * sizeof(u32), 0);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4866

(2 * i + 1) * sizeof(u32), 0);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4882

u32 high, u32 low, u32 *p_entry_num)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4896

u32 high, low, entry_num;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4953

i * sizeof(u32), 0);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4956

2 * i * sizeof(u32), 0);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

4959

(2 * i + 1) * sizeof(u32), 0);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

5000

u32 hw_addr, void *p_eth_qzone,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

505

u32 pq_flags, u16 pq_val)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

5068

u32 address;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

5108

u32 address;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

513

u16 ecore_get_cm_pq_idx(struct ecore_hwfn *p_hwfn, u32 pq_flags)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

5144

u32 min_pf_rate)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

5152

u32 wfq_speed = p_hwfn->qm_info.wfq_data[i].min_speed;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

5163

ecore_init_wfq_default_param(struct ecore_hwfn *p_hwfn, u32 min_pf_rate)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

5174

u32 min_pf_rate)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

5197

u16 vport_id, u32 req_rate,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

5198

u32 min_pf_rate)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

5200

u32 total_req_min_rate = 0, total_left_rate = 0, left_rate_per_vp = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

5207

u32 tmp_speed;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

5281

u16 vp_id, u32 rate)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

5308

u32 min_pf_rate)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

5316

u32 rate;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

5344

int ecore_configure_vport_wfq(struct ecore_dev *p_dev, u16 vp_id, u32 rate)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

5379

u32 min_pf_rate)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

5518

u32 min_rate = p_link->min_pf_rate;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

851

u32 rdma_tasks, excess_tasks;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

852

u32 line_count;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

871

u32 n_eqes, num_cons;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

92

static u32 ecore_hw_bar_size(struct ecore_hwfn *p_hwfn, enum BAR_ID bar_id)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

94

u32 bar_reg = (bar_id == BAR_ID_0 ?

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c

96

u32 val;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev_api.h

244

u32 epoch;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev_api.h

288

u32 reg_idx,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev_api.h

289

u32 pattern_size,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev_api.h

290

u32 crc);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev_api.h

44

u32 wk_info;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev_api.h

449

u32 flags; /* consists of ECORE_DMAE_FLAG_* values */

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev_api.h

45

u32 wk_details;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev_api.h

46

u32 wk_pkt_len;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev_api.h

469

u32 grc_addr,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev_api.h

470

u32 size_in_dwords,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev_api.h

471

u32 flags);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev_api.h

486

u32 grc_addr,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev_api.h

488

u32 size_in_dwords,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev_api.h

489

u32 flags);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev_api.h

507

u32 size_in_dwords,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev_api.h

527

u32 num_elems,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev_api.h

59

u32 dp_module,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_fcoe_api.h

110

u32 cid);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_fcoe_api.h

46

u32 icid;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_fcoe_api.h

47

u32 fw_cid;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_fcoe_api.h

91

u32 fcoe_silent_drop_pkt_cmdq_full_cnt;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_fcoe_api.h

92

u32 fcoe_silent_drop_pkt_rq_full_cnt;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_fcoe_api.h

93

u32 fcoe_silent_drop_pkt_crc_error_cnt;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_fcoe_api.h

94

u32 fcoe_silent_drop_pkt_task_invalid_cnt;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_fcoe_api.h

95

u32 fcoe_silent_drop_total_pkt_cnt;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_gtt_values.h

38

static u32 pxp_global_win[] = {

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

1001

u32 size_in_dwords,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

1002

u32 flags)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

1004

u32 grc_addr_in_dw = grc_addr / sizeof(u32);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

1027

u32 size_in_dwords,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

162

u32 ecore_ptt_get_hw_addr(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

169

static u32 ecore_ptt_config_addr(struct ecore_ptt *p_ptt)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

175

u32 ecore_ptt_get_bar_addr(struct ecore_ptt *p_ptt)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

183

u32 new_hw_addr)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

185

u32 prev_hw_addr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

206

static u32 ecore_set_ptt(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

208

u32 hw_addr)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

210

u32 win_hw_addr = ecore_ptt_get_hw_addr(p_hwfn, p_ptt);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

211

u32 offset;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

246

u32 bar_addr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

264

void ecore_wr(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt, u32 hw_addr,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

265

u32 val)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

268

u32 bar_addr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

288

u32 ecore_rd(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt, u32 hw_addr)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

291

u32 bar_addr, val;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

317

u32 hw_addr,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

321

u32 dw_count, *host_addr, hw_offset;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

323

u32 OSAL_IOMEM *reg_addr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

337

host_addr = (u32 *)((u8 *)addr + done);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

338

reg_addr = (u32 OSAL_IOMEM *)OSAL_REG_ADDR(p_hwfn, hw_offset);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

354

void *dest, u32 hw_addr, osal_size_t n)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

365

u32 hw_addr, void *src, osal_size_t n)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

398

*(u32 *)&p_ptt->pxp.pretend);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

414

*(u32 *)&p_ptt->pxp.pretend);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

431

*(u32 *)&p_ptt->pxp.pretend);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

434

u32 ecore_vfid_to_concrete(struct ecore_hwfn *p_hwfn, u8 vfid)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

436

u32 concrete_fid = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

458

u32 cnt, lock_status, hw_lock_cntr_reg;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

467

MISCS_REG_DRIVER_CONTROL_0_SIZE * sizeof(u32);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

481

ecore_wr(p_hwfn, p_ptt, hw_lock_cntr_reg + sizeof(u32), resource);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

514

u32 lock_status, hw_lock_cntr_reg;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

522

MISCS_REG_DRIVER_CONTROL_0_SIZE * sizeof(u32);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

548

u32 opcode = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

616

static u32 ecore_dmae_idx_to_go_cmd(u8 idx)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

669

u32 data = (i < DMAE_CMD_SIZE_TO_FILL) ?

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

670

*(((u32 *)p_command) + i) : 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

674

(idx_cmd * DMAE_CMD_SIZE * sizeof(u32)) +

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

675

(i * sizeof(u32)), data);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

689

u32 **p_buff = &p_hwfn->dmae_info.p_intermediate_buffer;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

690

u32 **p_comp = &p_hwfn->dmae_info.p_completion_word;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

692

*p_comp = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev, p_addr, sizeof(u32));

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

710

sizeof(u32) * DMAE_MAX_RW_SIZE);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

736

p_phys, sizeof(u32));

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

752

p_phys, sizeof(u32) * DMAE_MAX_RW_SIZE);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

762

u32 wait_cnt_limit = 10000, wait_cnt = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

766

u32 factor = (CHIP_REV_IS_EMUL(p_hwfn->p_dev) ?

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

808

u32 length_dw)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

826

length_dw * sizeof(u32));

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

854

length_dw * sizeof(u32), false);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

868

length_dw * sizeof(u32), true);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

882

length_dw * sizeof(u32));

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

891

u32 size_in_dwords,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

900

u32 offset = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

973

u32 grc_addr,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

974

u32 size_in_dwords,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

975

u32 flags)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

977

u32 grc_addr_in_dw = grc_addr / sizeof(u32);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c

999

u32 grc_addr,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.h

135

u32 ecore_ptt_get_hw_addr(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.h

146

u32 ecore_ptt_get_bar_addr(struct ecore_ptt *p_ptt);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.h

157

u32 new_hw_addr);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.h

180

u32 hw_addr,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.h

181

u32 val);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.h

191

u32 ecore_rd(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.h

193

u32 hw_addr);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.h

208

u32 hw_addr,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.h

223

u32 hw_addr,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.h

271

u32 ecore_vfid_to_concrete(struct ecore_hwfn *p_hwfn, u8 vfid);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw_defs.h

67

u32 ctrl_data;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

1035

u32 pri_tc_mask = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

1069

u32 tc_weight_addr_diff, tc_bound_addr_diff, min_weight = 0xffffffff;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

109

#define QM_RL_INC_VAL(rate) OSAL_MAX_T(u32, (u32)(((rate ? rate : 1000000) * QM_RL_PERIOD * 101) / (8 * 100)), 1)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

1102

u32 byte_weight;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

1134

u32 tc_headroom_blocks, min_pkt_size_blocks, total_blocks;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

1135

u32 active_port_blocks, reg_offset = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

1138

tc_headroom_blocks = (u32)DIV_ROUND_UP(req->headroom_per_tc, BRB_BLOCK_SIZE);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

1139

min_pkt_size_blocks = (u32)DIV_ROUND_UP(req->min_pkt_size, BRB_BLOCK_SIZE);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

1147

active_port_blocks = (u32)(total_blocks / active_ports);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

1150

u32 port_blocks, port_shared_blocks, port_guaranteed_blocks;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

1151

u32 full_xoff_th, full_xon_th, pause_xoff_th, pause_xon_th;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

1152

u32 tc_guaranteed_blocks;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

1156

tc_guaranteed_blocks = (u32)DIV_ROUND_UP(req->guranteed_per_tc, BRB_BLOCK_SIZE);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

1209

struct ecore_ptt *p_ptt, u32 ethType)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

1223

struct ecore_ptt *p_ptt, u32 ethType)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

1253

u32 reg_val;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

1260

ecore_wr(p_hwfn, p_ptt, PRS_REG_OUTPUT_FORMAT_4_0_BB_K2, (u32)PRS_ETH_TUNN_FIC_FORMAT);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

1276

u32 reg_val;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

1284

ecore_wr(p_hwfn, p_ptt, PRS_REG_OUTPUT_FORMAT_4_0_BB_K2, (u32)PRS_ETH_TUNN_FIC_FORMAT);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

1317

u32 reg_val;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

1325

ecore_wr(p_hwfn, p_ptt, PRS_REG_OUTPUT_FORMAT_4_0_BB_K2, (u32)PRS_ETH_TUNN_FIC_FORMAT);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

1346

#define CAM_LINE_SIZE sizeof(u32)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

1348

#define REG_SIZE sizeof(u32)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

1357

u32 i, *ram_line_ptr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

1359

ram_line_ptr = (u32*)&ram_line;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

1383

u32 rfs_cm_hdr_event_id;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

1400

u32 rfs_cm_hdr_event_id, *ram_line_ptr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

1406

ram_line_ptr = (u32*)&ram_line;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

1483

u32 msdm_vf_size_log = MSTORM_VF_ZONE_DEFAULT_SIZE_LOG;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

1484

u32 msdm_vf_offset_mask;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

1504

u32 ecore_get_mstorm_queue_stat_offset(struct ecore_hwfn *p_hwfn, u16 stat_cnt_id, u16 vf_zone_size_mode)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

1506

u32 offset = MSTORM_QUEUE_STAT_OFFSET(stat_cnt_id);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

1519

u32 ecore_get_mstorm_eth_vf_prods_offset(struct ecore_hwfn *p_hwfn, u8 vf_id, u8 vf_queue_id, u16 vf_zone_size_mode)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

1521

u32 offset = MSTORM_ETH_VF_PRODS_OFFSET(vf_id, vf_queue_id);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

1540

u8 region, u32 cid)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

1546

u32 validation_string = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

1547

u32 data_to_crc;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

1595

u16 ctx_size, u8 ctx_type, u32 cid)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

1613

u16 ctx_size, u8 ctx_type, u32 tid)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

1627

void ecore_memset_session_ctx(void *p_ctx_mem, u32 ctx_size, u8 ctx_type)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

1649

void ecore_memset_task_ctx(void *p_ctx_mem, u32 ctx_size, u8 ctx_type)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

1667

u32 ctx_validation;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

233

u32 qm_line_crd;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

237

OVERWRITE_RT_REG(p_hwfn, PBF_CMDQ_LINES_RT_OFFSET(voq), (u32)cmdq_lines);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

307

u32 usable_blocks, pure_lb_blocks, phys_blocks;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

326

pure_lb_blocks = OSAL_MAX_T(u32, BTB_JUMBO_PKT_BLOCKS, pure_lb_blocks / BTB_PURE_LB_FACTOR);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

349

u32 num_pf_cids,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

350

u32 num_vf_cids,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

355

u32 base_mem_addr_4kb,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

360

u32 tx_pq_vf_mask[MAX_QM_TX_QUEUES / QM_PF_QUEUE_GROUP_SIZE] = { 0 };

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

361

u32 num_tx_pq_vf_masks = MAX_QM_TX_QUEUES / QM_PF_QUEUE_GROUP_SIZE;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

363

u32 pq_mem_4kb, vport_pq_mem_4kb, mem_addr_4kb;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

376

STORE_RT_REG(p_hwfn, QM_REG_PQTX2PF_0_RT_OFFSET + pq_group, (u32)(pf_id));

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

384

u32 max_qm_global_rls = MAX_QM_GLOBAL_RLS;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

421

STORE_RT_REG(p_hwfn, QM_REG_TXPQMAP_RT_OFFSET + pq_id, *((u32*)&tx_pq_map));

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

446

u32 num_pf_cids,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

447

u32 num_tids,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

448

u32 base_mem_addr_4kb)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

450

u32 pq_size, pq_mem_4kb, mem_addr_4kb;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

462

STORE_RT_REG(p_hwfn, QM_REG_PQOTHER2PF_0_RT_OFFSET + pq_group, (u32)(pf_id));

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

485

u32 inc_val, crd_reg_offset;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

499

OVERWRITE_RT_REG(p_hwfn, crd_reg_offset + voq * MAX_NUM_PFS_BB, (u32)QM_WFQ_CRD_REG_SIGN_BIT);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

502

STORE_RT_REG(p_hwfn, QM_REG_WFQPFUPPERBOUND_RT_OFFSET + pf_id, QM_WFQ_UPPER_BOUND | (u32)QM_WFQ_CRD_REG_SIGN_BIT);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

513

u32 pf_rl)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

515

u32 inc_val;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

523

STORE_RT_REG(p_hwfn, QM_REG_RLPFCRD_RT_OFFSET + pf_id, (u32)QM_RL_CRD_REG_SIGN_BIT);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

524

STORE_RT_REG(p_hwfn, QM_REG_RLPFUPPERBOUND_RT_OFFSET + pf_id, QM_RL_UPPER_BOUND | (u32)QM_RL_CRD_REG_SIGN_BIT);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

538

u32 inc_val;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

556

STORE_RT_REG(p_hwfn, QM_REG_WFQVPCRD_RT_OFFSET + vport_pq_id, (u32)QM_WFQ_CRD_REG_SIGN_BIT);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

574

u32 inc_val;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

589

STORE_RT_REG(p_hwfn, QM_REG_RLGLBLCRD_RT_OFFSET + vport_id, (u32)QM_RL_CRD_REG_SIGN_BIT);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

590

STORE_RT_REG(p_hwfn, QM_REG_RLGLBLUPPERBOUND_RT_OFFSET + vport_id, QM_RL_UPPER_BOUND | (u32)QM_RL_CRD_REG_SIGN_BIT);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

600

u32 reg_val, i;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

618

u32 cmd_addr,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

619

u32 cmd_data_lsb,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

620

u32 cmd_data_msb)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

637

u32 ecore_qm_pf_mem_size(u8 pf_id,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

638

u32 num_pf_cids,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

639

u32 num_vf_cids,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

640

u32 num_tids,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

658

u32 mask;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

698

u32 num_pf_cids,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

699

u32 num_vf_cids,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

700

u32 num_tids,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

707

u32 pf_rl,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

711

u32 other_mem_size_4kb;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

755

u32 inc_val;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

771

u32 pf_rl)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

773

u32 inc_val;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

781

ecore_wr(p_hwfn, p_ptt, QM_REG_RLPFCRD + pf_id * 4, (u32)QM_RL_CRD_REG_SIGN_BIT);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

793

u32 inc_val;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

815

u32 vport_rl)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

817

u32 inc_val, max_qm_global_rls = MAX_QM_GLOBAL_RLS;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

830

ecore_wr(p_hwfn, p_ptt, QM_REG_RLGLBLCRD + vport_id * 4, (u32)QM_RL_CRD_REG_SIGN_BIT);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

843

u32 cmd_arr[QM_CMD_STRUCT_SIZE(QM_STOP_CMD)] = {0};

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

844

u32 pq_mask = 0, last_pq, pq_id;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

906

u32 min_weight, tc_weight_base_addr, tc_weight_addr_diff;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

907

u32 tc_bound_base_addr, tc_bound_addr_diff;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

948

u32 byte_weight;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.c

968

u32 ctrl, inc_val, reg_offset;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.h

127

u32 num_pf_cids,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.h

128

u32 num_vf_cids,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.h

129

u32 num_tids,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.h

136

u32 pf_rl,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.h

168

u32 pf_rl);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.h

201

u32 vport_rl);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.h

315

u32 ethType);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.h

327

u32 ethType);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.h

460

u32 ecore_get_mstorm_queue_stat_offset(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.h

473

u32 ecore_get_mstorm_eth_vf_prods_offset(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.h

501

u32 cid);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.h

517

u32 tid);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.h

529

u32 ctx_size,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.h

541

u32 ctx_size,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.h

57

u32 ecore_qm_pf_mem_size(u8 pf_id,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.h

58

u32 num_pf_cids,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.h

59

u32 num_vf_cids,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_fw_funcs.h

60

u32 num_tids,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_ops.c

103

u32 *p_init_val = &p_hwfn->rt_data.init_val[rt_offset];

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_ops.c

155

sizeof(u32) * RUNTIME_ARRAY_SIZE);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_ops.c

175

u32 addr, u32 dmae_data_offset,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_ops.c

176

u32 size, const u32 *p_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_ops.c

188

const u32 *data = p_buf + dmae_data_offset;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_ops.c

189

u32 i;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_ops.c

205

u32 addr, u32 fill,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_ops.c

206

u32 fill_count)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_ops.c

208

static u32 zero_buffer[DMAE_MAX_RW_SIZE];

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_ops.c

210

OSAL_MEMSET(zero_buffer, 0, sizeof(u32) * DMAE_MAX_RW_SIZE);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_ops.c

220

u32 addr, u32 fill, u32 fill_count)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_ops.c

222

u32 i;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_ops.c

224

for (i = 0; i < fill_count; i++, addr += sizeof(u32))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_ops.c

235

u32 dmae_array_offset = OSAL_LE32_TO_CPU(cmd->args.array_offset);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_ops.c

236

u32 data = OSAL_LE32_TO_CPU(cmd->data);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_ops.c

237

u32 addr = GET_FIELD(data, INIT_WRITE_OP_ADDRESS) << 2;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_ops.c

239

u32 offset, output_len, input_len, max_size;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_ops.c

243

const u32 *array_data;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_ops.c

245

u32 size;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_ops.c

282

u32 repeats = GET_FIELD(data,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_ops.c

284

u32 i;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_ops.c

318

u32 data = OSAL_LE32_TO_CPU(p_cmd->data);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_ops.c

320

u32 addr = GET_FIELD(data, INIT_WRITE_OP_ADDRESS) << 2;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_ops.c

359

static OSAL_INLINE bool comp_eq(u32 val, u32 expected_val)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_ops.c

364

static OSAL_INLINE bool comp_and(u32 val, u32 expected_val)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_ops.c

369

static OSAL_INLINE bool comp_or(u32 val, u32 expected_val)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_ops.c

379

bool (*comp_check)(u32 val, u32 expected_val);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_ops.c

380

u32 delay = ECORE_INIT_POLL_PERIOD_US, val;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_ops.c

381

u32 data, addr, poll;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_ops.c

463

static u32 ecore_init_cmd_mode(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_ops.c

475

static u32 ecore_init_cmd_phase(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_ops.c

477

u32 phase, u32 phase_id)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_ops.c

479

u32 data = OSAL_LE32_TO_CPU(p_cmd->phase_data);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_ops.c

497

u32 cmd_num, num_init_ops;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_ops.c

516

u32 data = OSAL_LE32_TO_CPU(cmd->raw.op_data);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_ops.c

562

u32 gtt_base;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_ops.c

563

u32 i;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_ops.c

574

u32 val;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_ops.c

612

u32 offset, len;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_ops.c

628

fw->arr_data = (u32 *)(data + offset);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_ops.c

636

fw->arr_data = (u32 *)init_val;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_ops.c

77

u32 rt_offset, u32 val)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_ops.c

84

u32 rt_offset, u32 *p_val,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_ops.c

89

for (i = 0; i < size / sizeof(u32); i++) {

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_ops.c

98

u32 addr,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_ops.h

102

u32 rt_offset,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_ops.h

103

u32 val);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_ops.h

122

u32 rt_offset,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_ops.h

123

u32 *val,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_ops.h

127

ecore_init_store_rt_agg(hwfn, offset, (u32*)&val, sizeof(val))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_values.h

3628

ARRAY_DECL u32 init_val[] = {

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_values.h

40

ARRAY_DECL u32 init_ops[] = {

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_values_zipped.h

3659

ARRAY_DECL u32 init_val[] = {

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_values_zipped.h

40

ARRAY_DECL u32 init_ops[] = {

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

1043

~((u32)deasserted_bits));

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

1062

u32 attn_bits = 0, attn_acks = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

1110

void OSAL_IOMEM *igu_addr, u32 ack_cons)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

1172

u32 tmp_index = sb_info->sb_ack;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

1280

OSAL_MEMSET(sb_info->parity_mask, 0, sizeof(u32) * NUM_ATTN_REGS);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

1344

u32 cau_state;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

1388

u16 igu_sb_id, u32 pi_index,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

139

u32 tmp = ecore_rd(p_hwfn, p_hwfn->p_dpc_ptt, MCP_REG_CPU_STATE);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

1393

u32 sb_offset, pi_offset;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

1410

CAU_REG_PI_MEMORY + pi_offset * sizeof(u32),

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

1411

*((u32 *)&(pi_entry)));

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

1415

*((u32 *)&(pi_entry)));

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

1421

struct ecore_sb_info *p_sb, u32 pi_index,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

175

u32 tmp = ecore_rd(p_hwfn, p_hwfn->p_dpc_ptt, PSWHST_REG_VF_DISABLED_ERROR_VALID);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

1777

u32 igu_pf_conf = IGU_PF_CONF_FUNC_EN | IGU_PF_CONF_ATTN_BIT_EN;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

179

u32 addr, data;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

1836

u32 tmp;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

1883

u32 cmd_ctrl = 0, val = 0, sb_bit = 0, sb_bit_addr = 0, data = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

1884

u32 pxp_addr = IGU_CMD_INT_ACK_BASE + igu_sb_id;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

1885

u32 sleep_cnt = IGU_CLEANUP_SLEEP_LENGTH;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

1916

sb_bit_addr = igu_sb_id / 32 * sizeof(u32);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

1956

u32 val;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

1985

u32 val = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

202

u32 addr, data, length;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

2023

u32 val, rval;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

2138

sizeof(u32) * igu_sb_id);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

2143

sizeof(u32) * igu_sb_id,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

2181

u32 val = ecore_rd(p_hwfn, p_ptt,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

2182

IGU_REG_MAPPING_MEMORY + sizeof(u32) * igu_sb_id);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

2201

u32 min_vf = 0, max_vf = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

2295

u32 val = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

2400

IGU_REG_MAPPING_MEMORY + sizeof(u32) * igu_sb_id,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

2422

u32 igu_pf_conf = IGU_PF_CONF_FUNC_EN;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

2433

u32 intr_status_hi = 0, intr_status_lo = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

265

u32 tmp, tmp2;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

317

u32 tmp;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

322

u32 addr_lo, addr_hi, details;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

345

u32 addr_lo, addr_hi, details;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

373

u32 addr_hi, addr_lo;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

387

u32 addr_hi, addr_lo, details;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

431

u32 reason;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

436

u32 details = ecore_rd(p_hwfn, p_hwfn->p_dpc_ptt,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

455

u32 val = ecore_rd(p_hwfn, p_hwfn->p_dpc_ptt,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

687

u32 parity_mask[NUM_ATTN_REGS];

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

696

u32 mfw_attn_addr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

728

u32 igu_mask;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

757

IGU_CMD_INT_ACK_BASE) << 3), (u32)asserted_bits);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

808

u32 aeu_en_reg,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

810

u32 bitmask)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

844

u32 val;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

845

u32 mask = ~bitmask;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

865

u32 aeu_en_reg, u8 bit_index)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

867

u32 block_id = p_aeu->block_index, mask, val;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

907

u32 aeu_inv_arr[NUM_ATTN_REGS], aeu_mask, aeu_en, en;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

925

u32 parities;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

927

aeu_en = MISC_REG_AEU_ENABLE1_IGU_OUT_0 + i * sizeof(u32);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

956

u32 bits;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

959

i * sizeof(u32) +

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

960

k * sizeof(u32) * NUM_ATTN_REGS;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c

996

u32 flags = p_aeu->flags;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int_api.h

148

int size, u32 *data)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int_api.h

152

int size, u32 *data)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int_api.h

159

DIRECT_REG_WR(p_hwfn, &((u32 OSAL_IOMEM *)addr)[i], data[i]);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int_api.h

165

int size, u32 *data)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int_api.h

171

int size, u32 *data)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int_api.h

200

u32 pi_index,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int_api.h

58

u32 sb_ack; /* Last given ack */

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int_api.h

72

u32 igu_prod;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int_api.h

73

u32 igu_cons;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int_api.h

91

u32 prod = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iov_api.h

143

u32 request_size;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iov_api.h

144

u32 request_offset;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iov_api.h

146

u32 response_size;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iov_api.h

147

u32 response_offset;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iov_api.h

170

u32 cap; /* SR-IOV Capabilities */

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iov_api.h

179

u32 pgsz; /* page size for BAR alignment */

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iov_api.h

182

u32 first_vf_in_pf;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iov_api.h

550

bool ecore_iov_is_valid_vfpf_msg_length(u32 length);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iov_api.h

557

u32 ecore_iov_pfvf_msg_length(void);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iov_api.h

715

int vfid, u32 rate);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iov_api.h

783

static OSAL_INLINE bool ecore_iov_is_valid_vfpf_msg_length(u32 length) {return false;}

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iov_api.h

784

static OSAL_INLINE u32 ecore_iov_pfvf_msg_length(void) {return 0;}

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iov_api.h

798

static OSAL_INLINE enum _ecore_status_t ecore_iov_configure_min_tx_rate(struct ecore_dev *p_dev, int vfid, u32 rate) { return ECORE_INVAL; }

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iov_api.h

96

u32 driver_version;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iscsi_api.h

100

u32 ka_interval;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iscsi_api.h

101

u32 max_rt_time;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iscsi_api.h

102

u32 initial_rcv_wnd;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iscsi_api.h

120

u32 max_seq_size;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iscsi_api.h

121

u32 max_recv_pdu_length;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iscsi_api.h

122

u32 max_send_pdu_length;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iscsi_api.h

123

u32 first_seq_length;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iscsi_api.h

124

u32 exp_stat_sn;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iscsi_api.h

125

u32 stat_sn;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iscsi_api.h

137

u32 iscsi_cmdq_threshold_cnt;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iscsi_api.h

138

u32 iscsi_rq_threshold_cnt;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iscsi_api.h

139

u32 iscsi_immq_threshold_cnt;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iscsi_api.h

174

u32 cid);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iscsi_api.h

50

u32 icid;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iscsi_api.h

51

u32 fw_cid;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iscsi_api.h

56

u32 initial_ack;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iscsi_api.h

74

u32 remote_ip[4];

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iscsi_api.h

75

u32 local_ip[4];

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iscsi_api.h

78

u32 rcv_next;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iscsi_api.h

79

u32 snd_una;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iscsi_api.h

80

u32 snd_next;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iscsi_api.h

81

u32 snd_max;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iscsi_api.h

82

u32 snd_wnd;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iscsi_api.h

83

u32 rcv_wnd;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iscsi_api.h

84

u32 snd_wl1;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iscsi_api.h

85

u32 cwnd;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iscsi_api.h

86

u32 ss_thresh;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iscsi_api.h

89

u32 ts_recent;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iscsi_api.h

90

u32 ts_recent_age;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iscsi_api.h

91

u32 total_rt;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iscsi_api.h

92

u32 ka_timeout_delta;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iscsi_api.h

93

u32 rt_timeout_delta;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iscsi_api.h

98

u32 flow_label;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iscsi_api.h

99

u32 ka_timeout;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_l2.c

123

u32 i;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_l2.c

1515

static u32 ecore_calc_crc32c(u8 *crc32_packet,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_l2.c

1516

u32 crc32_length,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_l2.c

1517

u32 crc32_seed,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_l2.c

1520

u32 byte = 0, bit = 0, crc32_result = crc32_seed;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_l2.c

1544

static u32 ecore_crc32c_le(u32 seed, u8 *mac, u32 len)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_l2.c

1546

u32 packet_buf[2] = {0};

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_l2.c

1554

u32 crc = ecore_crc32c_le(ETH_MULTICAST_BIN_FROM_MAC_SEED,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_l2.c

1612

u32 bit;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_l2.c

1621

u32 *p_bins = (u32 *)bins;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_l2.c

1706

u32 *p_addr, u32 *p_len,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_l2.c

1728

u32 pstats_addr = 0, pstats_len = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_l2.c

1759

u32 tstats_addr, tstats_len;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_l2.c

1784

u32 *p_addr, u32 *p_len,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_l2.c

1806

u32 ustats_addr = 0, ustats_len = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_l2.c

1830

u32 *p_addr, u32 *p_len,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_l2.c

1852

u32 mstats_addr = 0, mstats_len = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_l2.c

2022

u32 i;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_l2.c

2051

u32 addr = 0, len = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_l2.c

224

u16 opaque_fid, u32 cid,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_l2.c

322

u32 cid = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_l2.c

60

u32 queues;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_l2.c

71

u32 i;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_l2.c

711

u32 *p_bins = (u32 *)p_params->bins;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_l2.c

89

p_l2_info->queues = (u32)OSAL_MAX_T(u8, rx, tx);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_l2.c

979

u32 init_prod_val = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_l2.c

987

__internal_ram_wr(p_hwfn, *pp_prod, sizeof(u32),

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_l2.c

988

(u32 *)(&init_prod_val));

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_l2.h

91

u32 cid;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_l2_api.h

104

u32 rss_key[ECORE_RSS_KEY_SIZE];

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_l2_api.h

156

u32 vni;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_l2_api.h

319

u32 concrete_fid;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_ll2.h

120

u32 cid;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_ll2.h

66

u32 opaque_data[2];

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_ll2_api.h

117

u32 opaque_data_0; /* src_mac_addr_hi */

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_ll2_api.h

118

u32 opaque_data_1; /* src_mac_addr_lo */

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_ll2_api.h

121

u32 gid_dst[4];

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_ll2_api.h

155

u32 opaque_data_0,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_ll2_api.h

156

u32 opaque_data_1);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

101

u32 mfw_mb_offsize = ecore_rd(p_hwfn, p_ptt, addr);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

1054

u32 addr = SECTION_OFFSIZE_ADDR(p_hwfn->mcp_info->public_base,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

1056

u32 mfw_path_offsize = ecore_rd(p_hwfn, p_ptt, addr);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

1057

u32 path_addr = SECTION_ADDR(mfw_path_offsize,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

1059

u32 disabled_vfs[VF_MAX_STATIC / 32];

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

1071

sizeof(u32) * i);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

1083

u32 *vfs_to_ack)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

1085

u32 addr = SECTION_OFFSIZE_ADDR(p_hwfn->mcp_info->public_base,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

1087

u32 mfw_func_offsize = ecore_rd(p_hwfn, p_ptt, addr);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

1088

u32 func_addr = SECTION_ADDR(mfw_func_offsize,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

1115

i * sizeof(u32), 0);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

1123

u32 transceiver_state;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

113

u32 length = MFW_DRV_MSG_MAX_DWORDS(p_hwfn->mcp_info->mfw_mb_length);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

1132

transceiver_state, (u32)(p_hwfn->mcp_info->port_addr +

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

1148

u32 eee_status, val;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

115

u32 i;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

1173

u32 status = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

1186

status, (u32)(p_hwfn->mcp_info->port_addr +

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

128

(i << 2) + sizeof(u32));

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

130

((u32 *)p_hwfn->mcp_info->mfw_mb_cur)[i] =

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

1317

u32 cmd;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

1381

u32 ecore_get_process_kill_counter(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

1384

u32 path_offsize_addr, path_offsize, path_addr, proc_kill_cnt;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

1407

u32 proc_kill_cnt;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

1443

u32 hsi_param;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

1514

static u32 ecore_mcp_get_shmem_func(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

1519

u32 addr = SECTION_OFFSIZE_ADDR(p_hwfn->mcp_info->public_base,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

1521

u32 mfw_path_offsize = ecore_rd(p_hwfn, p_ptt, addr);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

1522

u32 func_addr = SECTION_ADDR(mfw_path_offsize, pfid);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

1523

u32 i, size;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

1527

size = OSAL_MIN_T(u32, sizeof(*p_data),

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

1529

for (i = 0; i < size / sizeof(u32); i++)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

1530

((u32 *)p_data)[i] = ecore_rd(p_hwfn, p_ptt,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

155

u32 drv_mb_offsize, mfw_mb_offsize;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

156

u32 mcp_pf_id = MCP_PF_ID(p_hwfn);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

1574

u32 resp = 0, param = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

1596

u32 resp = 0, param = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

1633

u32 cmd;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

1638

u32 mcp_resp;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

1688

u32 epoch)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

1741

u32 addr, global_offsize, global_addr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

1947

OSAL_BE32 val = OSAL_CPU_TO_BE32(((u32 *)info->mfw_mb_cur)[i]);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

1951

info->mfw_mb_addr + sizeof(u32) +

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

1953

sizeof(u32) + i * sizeof(u32), val);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

1970

u32 *p_mfw_ver,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

1971

u32 *p_running_bundle_id)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

1973

u32 global_offsize;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

2015

u32 *p_mbi_ver)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

2017

u32 nvm_cfg_addr, nvm_cfg1_offset, mbi_ver_addr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

2051

u32 *p_media_type)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

209

u32 size;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

2095

(u32) *p_proto);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

2103

u32 resp = 0, param = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

2139

(u32) *p_proto, resp, param);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

2190

(u32)(shmem_info.config & FUNC_MF_CFG_PROTOCOL_MASK));

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

2224

u32 resp = 0, param = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

226

size = MFW_DRV_MSG_MAX_DWORDS(p_info->mfw_mb_length) * sizeof(u32);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

2283

u32 resp = 0, param = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

2345

u32 personalities)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

2364

if ((1 << ((u32)protocol)) & personalities)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

2374

u32 *p_flash_size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

2376

u32 flash_size;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

2420

u32 resp = 0, param = 0, rc_param = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

2454

u32 resp = 0, param = num, rc_param = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

2488

u32 num_words, i;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

2503

p_name = &p_ver->name[i * sizeof(u32)];

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

2504

val = OSAL_CPU_TO_BE32(*(u32 *)p_name);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

2505

*(u32 *)&drv_version.name[i * sizeof(u32)] = val;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

2526

u32 resp = 0, param = 0, cpu_state, cnt = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

2558

u32 cpu_mode, cpu_state;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

257

u32 cmd)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

2585

u32 resp = 0, param = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

2586

u32 drv_mb_param;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

2618

u32 resp = 0, param = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

2619

u32 drv_mb_param;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

2652

u32 addr, size, i;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

2702

u32 resp = 0, param = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

2703

u32 drv_mb_param;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

2705

drv_mb_param = (u32)mtu << DRV_MB_PARAM_OV_MTU_SIZE_SHIFT;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

2720

u32 mfw_mac[2];

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

2753

u32 resp = 0, param = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

2754

u32 drv_mb_param;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

2793

u32 resp = 0, param = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

2794

u32 drv_mb_param;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

2823

u32 resp = 0, param = 0, drv_mb_param;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

2851

u32 mask_parities)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

2854

u32 resp = 0, param = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

2869

enum _ecore_status_t ecore_mcp_nvm_read(struct ecore_dev *p_dev, u32 addr,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

2870

u8 *p_buf, u32 len)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

2873

u32 bytes_left, offset, bytes_to_copy, buf_size;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

2889

bytes_to_copy = OSAL_MIN_T(u32, bytes_left,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

2894

params.nvm_rd.buf = (u32 *)(p_buf + offset);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

292

static void ecore_mcp_mb_unlock(struct ecore_hwfn *p_hwfn, u32 cmd)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

2920

enum _ecore_status_t ecore_mcp_phy_read(struct ecore_dev *p_dev, u32 cmd,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

2921

u32 addr, u8 *p_buf, u32 len)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

2939

params.nvm_rd.buf = (u32 *)p_buf;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

2968

u32 addr)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

2990

u32 addr)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

301

u32 seq = ++p_hwfn->mcp_info->drv_mb_seq;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3014

enum _ecore_status_t ecore_mcp_nvm_write(struct ecore_dev *p_dev, u32 cmd,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3015

u32 addr, u8 *p_buf, u32 len)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

302

u32 delay = CHIP_MCP_RESP_ITER_US;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3021

u32 buf_idx, buf_size;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

303

u32 org_mcp_reset_seq, cnt = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3047

buf_size = OSAL_MIN_T(u32, (len - buf_idx),

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3053

params.nvm_wr.buf = (u32 *)&p_buf[buf_idx];

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3077

enum _ecore_status_t ecore_mcp_phy_write(struct ecore_dev *p_dev, u32 cmd,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3078

u32 addr, u8 *p_buf, u32 len)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3096

params.nvm_wr.buf = (u32 *)p_buf;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3107

u32 addr)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3131

u32 port, u32 addr, u32 offset,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3132

u32 len, u8 *p_buf)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3135

u32 bytes_left, bytes_to_copy, buf_size;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3148

bytes_to_copy = OSAL_MIN_T(u32, bytes_left,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3150

params.nvm_rd.buf = (u32 *)(p_buf + offset);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3176

u32 port, u32 addr, u32 offset,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3177

u32 len, u8 *p_buf)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3180

u32 buf_idx, buf_size;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3190

buf_size = OSAL_MIN_T(u32, (len - buf_idx),

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3201

params.nvm_wr.buf = (u32 *)&p_buf[buf_idx];

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3218

u16 gpio, u32 *gpio_val)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3221

u32 drv_mb_param = 0, rsp;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3242

u32 drv_mb_param = 0, param, rsp;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3261

u16 gpio, u32 *gpio_direction,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3262

u32 *gpio_ctrl)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3264

u32 drv_mb_param = 0, rsp, val = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3288

u32 drv_mb_param = 0, rsp, param;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3310

u32 drv_mb_param, rsp, param;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3330

struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt, u32 *num_images)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3332

u32 drv_mb_param = 0, rsp;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3352

struct bist_nvm_image_att *p_image_att, u32 image_index)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3356

u32 buf_size;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3367

params.nvm_rd.buf = (u32 *)p_image_att;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3387

u32 num_images, i;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3437

u8 *p_buffer, u32 buffer_len)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

347

u32 cpu_mode, cpu_state, cpu_pc_0, cpu_pc_1, cpu_pc_2;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3478

u32 val;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3491

p_temp_info->num_sensors = OSAL_MIN_T(u32, mfw_temp_info.num_of_sensors,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3516

u32 buf_size;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3543

u32 rsp;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3546

0, &rsp, (u32 *)num_events);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3611

u32 cmd;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3613

u32 resc_max_val;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3617

u32 mcp_resp;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3618

u32 mcp_param;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3619

u32 resc_num;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3620

u32 resc_start;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3621

u32 vf_resc_num;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3622

u32 vf_resc_start;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3623

u32 flags;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

364

u32 cmd, u32 param,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

365

u32 *o_mcp_resp, u32 *o_mcp_param)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

367

u32 delay = CHIP_MCP_RESP_ITER_US;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

368

u32 max_retries = ECORE_DRV_MB_MAX_RETRIES;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

369

u32 seq, cnt = 1, actual_mb_seq __unused;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3704

enum ecore_resources res_id, u32 resc_max_val,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3705

u32 *p_mcp_resp)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3728

enum ecore_resources res_id, u32 *p_mcp_resp,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3729

u32 *p_resc_num, u32 *p_resc_start)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3757

u32 mcp_resp, mcp_param;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3787

*(u32 *)(lldp_mac_addr + 2) = lldp_mac.mac_lower;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3812

lldp_mac.mac_lower = *(u32 *)(lldp_mac_addr + 2);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3834

u32 param, u32 *p_mcp_resp,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3835

u32 *p_mcp_param)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3866

u32 param = 0, mcp_resp, mcp_param;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3928

u32 retry_cnt = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

3960

u32 param = 0, mcp_resp, mcp_param;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

4012

u32 resp = 0, param = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

4016

(u32)vlan << DRV_MB_PARAM_FCOE_CVID_SHIFT,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

4033

fabric_name.wwn_upper = *(u32 *)wwn;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

4034

fabric_name.wwn_lower = *(u32 *)(wwn + 4);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

4048

u32 offset, u32 val)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

4052

u32 dword = val;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

4076

u32 mcp_resp;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

4092

u32 mcp_resp, mcp_param, features;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

440

u32 union_data_addr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

490

struct ecore_ptt *p_ptt, u32 cmd, u32 param,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

491

u32 *o_mcp_resp, u32 *o_mcp_param)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

523

u32 cmd,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

524

u32 param,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

525

u32 *o_mcp_resp,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

526

u32 *o_mcp_param,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

527

u32 i_txn_size,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

528

u32 *i_buf)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

550

u32 cmd,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

551

u32 param,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

552

u32 *o_mcp_resp,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

553

u32 *o_mcp_param,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

554

u32 *o_txn_size,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

555

u32 *o_buf)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

584

u32 *p_load_code)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

638

u32 resp = 0, param = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

658

static u32 ecore_get_config_bitmap(void)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

660

u32 config_bitmap = 0x0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

691

u32 drv_ver_0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

692

u32 drv_ver_1;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

693

u32 fw_ver;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

701

u32 load_code;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

702

u32 exist_drv_ver_0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

703

u32 exist_drv_ver_1;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

704

u32 exist_fw_ver;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

718

u32 hsi_ver;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

99

u32 addr = SECTION_OFFSIZE_ADDR(p_hwfn->mcp_info->public_base,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.c

999

u32 wol_param, mcp_resp, mcp_param;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.h

103

u32 cmd;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.h

104

u32 param;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.h

109

u32 mcp_resp;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.h

110

u32 mcp_param;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.h

203

u32 load_code;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.h

262

u32 *vfs_to_ack);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.h

303

u32 cmd,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.h

304

u32 param,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.h

305

u32 *o_mcp_resp,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.h

306

u32 *o_mcp_param,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.h

307

u32 i_txn_size,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.h

308

u32 *i_buf);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.h

328

u32 cmd,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.h

329

u32 param,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.h

330

u32 *o_mcp_resp,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.h

331

u32 *o_mcp_param,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.h

332

u32 *o_txn_size,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.h

333

u32 *o_buf);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.h

389

u32 mask_parities);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.h

407

u32 epoch);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.h

421

u32 valid;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.h

422

u32 epoch;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.h

423

u32 pf;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.h

424

u32 status;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.h

464

enum ecore_resources res_id, u32 resc_max_val,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.h

465

u32 *p_mcp_resp);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.h

481

enum ecore_resources res_id, u32 *p_mcp_resp,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.h

482

u32 *p_resc_num, u32 *p_resc_start);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.h

588

u32 offset, u32 val);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.h

74

u32 public_base;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.h

76

u32 drv_mb_addr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.h

78

u32 mfw_mb_addr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.h

80

u32 port_addr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp.h

99

u32 capabilities;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

1005

enum _ecore_status_t ecore_mcp_phy_read(struct ecore_dev *p_dev, u32 cmd,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

1006

u32 addr, u8 *p_buf, u32 len);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

1018

enum _ecore_status_t ecore_mcp_nvm_read(struct ecore_dev *p_dev, u32 addr,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

1019

u8 *p_buf, u32 len);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

1022

u32 start_addr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

1023

u32 length;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

1055

u8 *p_buffer, u32 buffer_len);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

1072

u32 port, u32 addr, u32 offset,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

1073

u32 len, u8 *p_buf);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

108

u32 partner_adv_speed;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

1090

u32 port, u32 addr, u32 offset,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

1091

u32 len, u8 *p_buf);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

1105

u16 gpio, u32 *gpio_val);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

1135

u16 gpio, u32 *gpio_direction,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

1136

u32 *gpio_ctrl);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

1172

u32 *num_images);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

1187

u32 image_index);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

1233

u32 reason;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

1234

u32 version;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

1235

u32 config;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

1236

u32 epoch;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

1237

u32 num_of_logs;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

1238

u32 valid_logs;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

145

u32 offset;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

146

u32 param;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

147

u32 resp;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

148

u32 cmd;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

152

u32 *buf_size;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

153

u32 *buf;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

157

u32 buf_size;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

158

u32 *buf;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

184

u32 version;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

191

u32 fcs_err;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

199

u32 fcs_err;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

200

u32 login_failure;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

276

u32 num_sensors;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

293

u32 mba_vers[ECORE_MAX_NUM_OF_ROMIMG];

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

340

u32 tcp4_offloads;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

342

u32 tcp6_offloads;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

377

u32 rt_tov;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

379

u32 ra_tov;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

381

u32 ed_tov;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

383

u32 cr_tov;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

389

u32 num_npiv_ids;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

43

u32 advertised_speeds; /* bitmask of DRV_SPEED_CAPABILITY */

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

439

u32 crc_err_src_fcid[5];

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

44

u32 forced_speed; /* In Mb/s */

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

452

u32 flogi_param[4];

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

455

u32 flogi_acc_param[4];

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

458

u32 flogi_rjt;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

461

u32 fdiscs;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

473

u32 plogi_dst_fcid[5];

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

476

u32 plogi_acc_src_fcid[5];

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

485

u32 plogo_src_fcid[5];

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

502

u32 abts_dst_fcid[5];

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

507

u32 rx_rscn_nport[4];

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

551

u32 scsi_rx_chk[5];

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

61

u32 tx_lpi_timer;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

657

u32 *p_mfw_ver,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

658

u32 *p_running_bundle_id);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

671

u32 *p_mbi_ver);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

684

u32 *media_type);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

701

struct ecore_ptt *p_ptt, u32 cmd, u32 param,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

702

u32 *o_mcp_resp, u32 *o_mcp_param);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

75

u32 loopback_mode; /* in PMM_LOOPBACK values */

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

777

u32 personalities);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

791

u32 *p_flash_size);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

80

u32 speed_capabilities;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

815

u32 ecore_get_process_kill_counter(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

82

u32 default_speed; /* In Mb/s */

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

84

u32 eee_lpi_timer;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

90

u32 line_speed; /* In Mb/s */

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

91

u32 min_pf_rate; /* In Mb/s */

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

92

u32 speed; /* In Mb/s */

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

932

u32 addr);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

945

enum _ecore_status_t ecore_mcp_phy_write(struct ecore_dev *p_dev, u32 cmd,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

946

u32 addr, u8 *p_buf, u32 len);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

959

enum _ecore_status_t ecore_mcp_nvm_write(struct ecore_dev *p_dev, u32 cmd,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

960

u32 addr, u8 *p_buf, u32 len);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

971

u32 addr);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_mcp_api.h

982

u32 addr);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_ooo.h

123

u32 cid,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_ooo.h

129

u32 cid,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_ooo.h

135

u32 cid,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_ooo.h

142

u32 cid,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_ooo.h

51

u32 rx_buffer_size;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_ooo.h

69

u32 head_idx;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_ooo.h

70

u32 num_of_cqes;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_ooo.h

80

u32 cur_isles_number;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_ooo.h

81

u32 max_isles_number;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_ooo.h

82

u32 gen_isles_number;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_ooo.h

99

u32 cid);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

102

u32 port, u32 addr, char *p_phy_result_buf)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

1049

u32 port, u32 length,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

122

*(u32 *)data_hi, *(u32 *)data_lo);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

1269

u32 port, char *p_phy_result_buf)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

1272

u32 length = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

132

u32 port, u32 lane, u32 addr, u32 data_lo,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

1329

u32 port, char *p_phy_result_buf)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

133

u32 data_hi, char *p_phy_result_buf)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

1331

u32 transceiver_state;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

1332

u32 addr = SECTION_OFFSIZE_ADDR(p_hwfn->mcp_info->public_base,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

1334

u32 mfw_mb_offsize = ecore_rd(p_hwfn, p_ptt, addr);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

1335

u32 port_addr = SECTION_ADDR(mfw_mb_offsize, port);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

1353

u32 port, char *p_phy_result_buf)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

1356

u32 length = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

1404

u32 port, u8 txdisable,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

1408

u32 length = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

1451

u32 nvm_cfg_addr, nvm_cfg1_offset, port_cfg_addr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

1507

u32 port, char *p_phy_result_buf)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

1510

u32 length = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

1560

u32 port, char *p_phy_result_buf)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

1563

u32 length = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

1613

u32 port, char *p_phy_result_buf)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

165

u32 port, u32 lane, u32 addr, char *p_phy_result_buf)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

1673

u32 param;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

1690

u32 direction, ctrl, length = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

1735

u32 resp_cmd;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

1736

u32 val;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

1760

u32 resp_cmd;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

1761

u32 fw_param;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

1769

sizeof(u32),

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

1770

(u32 *)&val);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

193

*(u32 *)data_hi, *(u32 *)data_lo);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

202

static u32 ecore_phy_get_nvm_cfg1_addr(struct ecore_hwfn *p_hwfn,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

205

u32 nvm_cfg_addr, nvm_cfg1_offset;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

218

u32 nvm_cfg1_addr = ecore_phy_get_nvm_cfg1_addr(p_hwfn, p_ptt);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

219

u32 port_mode, port, max_ports, core_cfg, length = 0;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

322

u32 reg;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

53

struct ecore_ptt *p_ptt, u32 port, u32 lane,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

54

u32 addr, u32 cmd, u8 *buf)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

584

u32 port, char *p_phy_result_buf)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

588

u32 length, reg_id, addr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

603

if (*(u32 *)data_lo != 0) { /* Only non-zero */

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

607

*(u32 *)data_lo,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

61

struct ecore_ptt *p_ptt, u32 port,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

62

u32 lane, u32 addr, u32 data_lo,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

63

u32 data_hi, u32 cmd)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

630

struct ecore_ptt *p_ptt, u32 port,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

633

u32 length, reg_id, addr, data_hi __unused, data_lo;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

662

u32 port, char *p_phy_result_buf)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

666

if (port >= (u32)num_ports) {

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

689

static int ecore_sfp_set_error(enum _ecore_status_t rc, u32 offset,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

709

u32 port, char *p_phy_result_buf)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

712

u32 num_ports = ecore_device_num_ports(p_hwfn->p_dev);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

732

u32 port, u32 addr, u32 offset,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

733

u32 size, char *p_phy_result_buf)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

77

u32 port, u32 addr, u32 data_lo, u32 data_hi,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

770

u32 port, u32 addr, u32 offset, u32 size,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

771

u32 val, char *p_phy_result_buf)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

795

u32 port, u32 addr, u32 offset,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

796

u32 size, char *p_phy_result_buf)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

799

u32 i;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.c

824

u32 port, u32 length,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.h

42

u32 port, u32 lane, u32 addr, u32 cmd, u8 *buf);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.h

44

u32 port, u32 lane, u32 addr, u32 data_lo,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy.h

45

u32 data_hi, u32 cmd);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy_api.h

101

u32 port, u32 lane, u32 addr, char *p_phy_result_buf);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy_api.h

114

u32 port, char *p_phy_result_buf);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy_api.h

143

u32 port, u32 addr, u32 offset, u32 size,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy_api.h

144

u32 val, char *p_phy_result_buf);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy_api.h

160

u32 port, u32 addr, u32 offset, u32 size,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy_api.h

174

u32 port, char *p_phy_result_buf);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy_api.h

188

u32 port, char *p_phy_result_buf);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy_api.h

202

u32 port, char *p_phy_result_buf);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy_api.h

217

u32 port, u8 txdisable,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy_api.h

232

u32 port, char *p_phy_result_buf);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy_api.h

246

u32 port, char *p_phy_result_buf);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy_api.h

260

u32 port, char *p_phy_result_buf);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy_api.h

53

u32 port, u32 addr, u32 data_lo, u32 data_hi,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy_api.h

68

u32 port, u32 addr, char *p_phy_result_buf);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy_api.h

85

u32 port, u32 lane, u32 addr, u32 data_lo,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy_api.h

86

u32 data_hi, char *p_phy_result_buf);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_proto_if.h

103

u32 two_msl_timer;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_proto_if.h

148

u32 min_dpis; /* number of requested DPIs */

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_proto_if.h

149

u32 num_qps; /* number of requested Queue Pairs */

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_proto_if.h

150

u32 num_srqs; /* number of requested SRQ */

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_proto_if.h

60

u32 num_arfs_filters;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce.h

123

u32 buff_size;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce.h

159

u32 rcv_wnd_scale;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce.h

207

u32 last_tid;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce.h

211

u32 num_qps;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce.h

212

u32 num_mrs;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce.h

213

u32 num_srqs;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce.h

238

u32 qpid; /* iwarp: may differ from icid */

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce.h

255

u32 dest_qp;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce.h

261

u32 flow_label; /* ignored in IPv4 */

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce.h

263

u32 ack_timeout;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce.h

276

u32 sq_psn;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce.h

287

u32 rq_psn;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce.h

295

u32 cq_prod;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce.h

349

u32 tcp_cid;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce.h

350

u32 cid;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce.h

378

u32 max_backlog;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce.h

380

u32 ip_addr[4];

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce.h

94

u32 max_count;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

100

u32 vendor_id;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

101

u32 vendor_part_id;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

102

u32 hw_ver;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

116

u32 max_wqe; /* The maximum number of outstanding work

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

119

u32 max_srq_wqe; /* The maximum number of outstanding work

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

132

u32 max_cq;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

133

u32 max_qp;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

134

u32 max_srq; /* Maximum number of SRQs */

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

135

u32 max_mr; /* Maximum number of MRs supported by this device */

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

139

u32 max_cqe;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

140

u32 max_mw; /* The maximum number of memory windows supported */

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

141

u32 max_fmr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

142

u32 max_mr_mw_fmr_pbl;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

144

u32 max_pd; /* The maximum number of protection domains supported */

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

145

u32 max_ah;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

149

u32 dev_caps;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

205

u32 reserved_lkey; /* Value of reserved L_key */

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

206

u32 bad_pkey_counter; /* Bad P_key counter support indicator */

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

228

u32 pkey_bad_counter;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

253

u32 cnp_send_timeout;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

256

u32 rl_bc_rate; /* Byte Counter Limit. */

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

261

u32 dcqcn_k_us; /* Alpha update interval */

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

262

u32 dcqcn_timeout_us;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

278

u32 rcv_wnd_size;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

314

u32 dpi_size;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

321

u32 cq_handle_lo; /* CQ handle to be written in CNQ */

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

322

u32 cq_handle_hi;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

323

u32 cq_size;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

341

u32 cq_size;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

362

u32 qp_handle_lo; /* QP handle to be written in CQE */

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

363

u32 qp_handle_hi;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

364

u32 qp_handle_async_lo; /* QP handle to be written in async event */

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

365

u32 qp_handle_async_hi;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

384

u32 qp_id;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

410

u32 dwords[4];

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

412

u32 ipv4_addr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

417

u32 modify_flags;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

455

u32 dest_qp;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

459

u32 flow_label; /* ignored in IPv4 */

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

466

u32 rq_psn;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

467

u32 sq_psn;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

470

u32 ack_timeout;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

484

u32 rq_psn; /* responder */

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

485

u32 sq_psn; /* requester */

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

488

u32 dest_qp;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

495

u32 flow_label; /* ignored in IPv4 */

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

498

u32 timeout;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

510

u32 itid; /* index only, 18 bit long, lkey = itid << 8 | key */

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

526

u32 fbo;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

556

u32 wqe_limit;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

563

u32 prod; /* CQ producer value on old PBL */

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

564

u32 cons; /* CQ consumer value on old PBL */

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

569

u32 cnq_id;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

570

u32 pbl_page_size_log; /* for the pages that contain the

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

619

u32 *tid);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

640

u32 tid);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

660

u32 tid);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

713

u32 ecore_rdma_get_sb_id(void *p_hwfn, u32 rel_sb_id);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

715

u32 ecore_rdma_query_cau_timer_res(void *p_hwfn);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

755

u32 remote_ip[4];

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

756

u32 local_ip[4];

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

813

u32 max_backlog; /* Max num of pending incoming connection requests */

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_roce_api.h

815

u32 ip_addr[4];

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_selftest.c

125

u32 num_images, i, j, nvm_crc, calc_crc;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_selftest.c

189

val = OSAL_CPU_TO_BE32(*(u32 *)&buf[j]);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_selftest.c

190

*(u32 *)&buf[j] = val;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_selftest.c

196

nvm_crc = *(u32 *)(buf + image_att.len - 4);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_sp_commands.c

60

u32 opaque_cid = p_data->opaque_fid << 16 | p_data->cid;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_sp_commands.h

152

u32 rl_bc_rate; /* Byte Counter Limit */

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_sp_commands.h

157

u32 dcqcn_k_us; /* DCQCN Alpha update interval */

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_sp_commands.h

158

u32 dcqcn_timeuot_us;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_sp_commands.h

159

u32 qcn_timeuot_us;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_sp_commands.h

51

u32 cid;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_spq.c

143

u32 iter_cnt;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_spq.c

334

DOORBELL(p_hwfn, DB_ADDR(p_spq->cid, DQ_DEMS_LEGACY), *(u32 *)&db);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_spq.c

407

u32 addr = GTT_BAR0_MAP_REG_USDM_RAM +

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_spq.c

573

u32 i, capacity;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_spq.c

618

u32 capacity;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_spq.c

666

u32 capacity;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_spq.c

809

u32 ecore_spq_get_cid(struct ecore_hwfn *p_hwfn)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_spq.c

823

u32 keep_reserve)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_spq.h

195

u32 unlimited_pending_count;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_spq.h

196

u32 normal_count;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_spq.h

197

u32 high_count;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_spq.h

198

u32 comp_sent_count;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_spq.h

199

u32 comp_count;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_spq.h

201

u32 cid;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_spq.h

332

u32 ecore_spq_get_cid(struct ecore_hwfn *p_hwfn);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_sriov.h

150

u32 concrete_fid;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_sriov.h

213

u32 mbx_msg_size;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_sriov.h

216

u32 mbx_reply_size;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_sriov.h

219

u32 bulletins_size;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_sriov.h

311

u32 *disabled_vfs);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_sriov.h

348

static OSAL_INLINE u32 ecore_crc32(u32 crc, u8 *ptr, u32 length) {return 0;}

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_sriov.h

349

static OSAL_INLINE bool ecore_iov_mark_vf_flr(struct ecore_hwfn *p_hwfn, u32 *disabled_vfs) {return 0;}

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_sriov.h

85

u32 vf_addr_lo;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_sriov.h

86

u32 vf_addr_hi;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_user_dbg_fw_funcs.h

139

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_user_dbg_fw_funcs.h

140

u32 num_dumped_dwords,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_user_dbg_fw_funcs.h

141

u32 *results_buf_size);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_user_dbg_fw_funcs.h

156

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_user_dbg_fw_funcs.h

157

u32 num_dumped_dwords,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_user_dbg_fw_funcs.h

159

u32 *num_errors,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_user_dbg_fw_funcs.h

160

u32 *num_warnings);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_user_dbg_fw_funcs.h

172

void ecore_dbg_mcp_trace_set_meta_data(u32 *data,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_user_dbg_fw_funcs.h

173

u32 size);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_user_dbg_fw_funcs.h

188

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_user_dbg_fw_funcs.h

189

u32 num_dumped_dwords,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_user_dbg_fw_funcs.h

190

u32 *results_buf_size);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_user_dbg_fw_funcs.h

204

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_user_dbg_fw_funcs.h

205

u32 num_dumped_dwords,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_user_dbg_fw_funcs.h

221

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_user_dbg_fw_funcs.h

222

u32 num_dumped_dwords,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_user_dbg_fw_funcs.h

223

u32 *results_buf_size);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_user_dbg_fw_funcs.h

236

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_user_dbg_fw_funcs.h

237

u32 num_dumped_dwords,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_user_dbg_fw_funcs.h

253

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_user_dbg_fw_funcs.h

254

u32 num_dumped_dwords,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_user_dbg_fw_funcs.h

255

u32 *results_buf_size);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_user_dbg_fw_funcs.h

268

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_user_dbg_fw_funcs.h

269

u32 num_dumped_dwords,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_user_dbg_fw_funcs.h

284

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_user_dbg_fw_funcs.h

285

u32 num_dumped_dwords,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_user_dbg_fw_funcs.h

286

u32 *results_buf_size);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_user_dbg_fw_funcs.h

301

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_user_dbg_fw_funcs.h

302

u32 num_dumped_dwords,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_user_dbg_fw_funcs.h

318

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_user_dbg_fw_funcs.h

319

u32 num_dumped_dwords,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_user_dbg_fw_funcs.h

320

u32 *results_buf_size);

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_user_dbg_fw_funcs.h

333

u32 *dump_buf,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_user_dbg_fw_funcs.h

334

u32 num_dumped_dwords,

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_utils.h

43

#define PTR_LO(x) ((u32)(((osal_uintptr_t)(x)) & 0xffffffff))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_utils.h

44

#define PTR_HI(x) ((u32)((((osal_uintptr_t)(x)) >> 16) >> 16))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_utils.h

46

#define DMA_LO(x) ((u32)(((dma_addr_t)(x)) & 0xffffffff))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_utils.h

47

#define DMA_HI(x) ((u32)(((dma_addr_t)(x)) >> 32))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_vfpf_if.h

137

u32 driver_version;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_vfpf_if.h

148

u32 bulletin_size;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_vfpf_if.h

149

u32 padding;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_vfpf_if.h

166

u32 rss_key[T_ETH_RSS_KEY_SIZE];

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_vfpf_if.h

170

u32 address;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_vfpf_if.h

171

u32 len;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_vfpf_if.h

186

u32 chip_num;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_vfpf_if.h

187

u32 mfw_ver;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_vfpf_if.h

257

u32 bulletin_size;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_vfpf_if.h

258

u32 padding;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_vfpf_if.h

263

u32 offset; /* offset to consumer/producer of queue */

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_vfpf_if.h

308

u32 flags; /* VFPF_QUEUE_FLG_X flags */

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_vfpf_if.h

365

u32 flags;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_vfpf_if.h

382

u32 tpa_mode;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_vfpf_if.h

585

u32 crc;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_vfpf_if.h

587

u32 version;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_vfpf_if.h

610

u32 req_adv_speed;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_vfpf_if.h

611

u32 req_forced_speed;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_vfpf_if.h

612

u32 req_loopback;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_vfpf_if.h

613

u32 padding3;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_vfpf_if.h

630

u32 speed;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_vfpf_if.h

631

u32 partner_adv_speed;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_vfpf_if.h

633

u32 capability_speed;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_vfpf_if.h

643

u32 size;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_vfpf_if.h

88

u32 padding;

usr/src/uts/common/io/qede/579xx/hsi/common_nvm.h

145

u32 get_flash_size(void);

usr/src/uts/common/io/qede/579xx/hsi/common_nvm.h

164

int allocate_nvram_for_image(struct nvm_dir *p_dir, struct image_header *p_image_header, u32 *o_nvm_offset);

usr/src/uts/common/io/qede/579xx/hsi/common_nvm.h

180

int find_room_for_image(u32 image_type,

usr/src/uts/common/io/qede/579xx/hsi/common_nvm.h

181

u32 byte_cnt,

usr/src/uts/common/io/qede/579xx/hsi/common_nvm.h

183

u32 *out_nvm_offset);

usr/src/uts/common/io/qede/579xx/hsi/common_nvm.h

198

int get_active_dir(u32 *o_dir_id, u32 *o_next_mfw);

usr/src/uts/common/io/qede/579xx/hsi/common_nvm.h

229

int nvm_update_dir(struct nvm_dir *p_dir, u32 *dir_id, u32 is_mfw);

usr/src/uts/common/io/qede/579xx/hsi/common_nvm.h

250

u32 nvm_offset,

usr/src/uts/common/io/qede/579xx/hsi/common_nvm.h

265

u32 get_alt_image_type(u32 running_mfw, u32 image_type);

usr/src/uts/common/io/qede/579xx/hsi/common_nvm.h

279

int load_active_nvm_dir(struct nvm_dir *o_dir_p, u32 *o_cur_dir_id);

usr/src/uts/common/io/qede/579xx/hsi/common_nvm.h

298

u32 image_type);

usr/src/uts/common/io/qede/579xx/hsi/common_nvm.h

327

int inner_nvm_write(u32 nvm_flags, u32 nvm_addr, u32 byte_cnt, u32 *p_buf);

usr/src/uts/common/io/qede/579xx/hsi/common_nvm.h

343

u32 requested_type,

usr/src/uts/common/io/qede/579xx/hsi/common_nvm.h

344

u32 *index);

usr/src/uts/common/io/qede/579xx/hsi/common_nvm.h

51

extern void memset32(u32 *ptr, u32 val, u32 byte_cnt);

usr/src/uts/common/io/qede/579xx/hsi/common_nvm.h

52

extern void memcpy32(u32 *ptr, u32 *src, u32 byte_cnt);

usr/src/uts/common/io/qede/579xx/hsi/common_nvm.h

55

extern int nvm_read(u32 nvm_addr, u32 n_bytes, u32 *read_buf);

usr/src/uts/common/io/qede/579xx/hsi/common_nvm.h

56

extern void compute_crc_from_buf(u32 *buf_p, u32 len, u32 *crc_p);

usr/src/uts/common/io/qede/579xx/hsi/common_nvm.h

57

extern int nvm_write(u32 nvm_addr, u32 byte_cnt, u32 *buf);

usr/src/uts/common/io/qede/579xx/hsi/common_nvm.h

58

extern int validate_dir(u32 bundle_id, u32 num_images);

usr/src/uts/common/io/qede/579xx/hsi/common_nvm.h

59

extern void nvm_write_progress_cb(u32 byte_cnt, u32 orig_byte_cnt);

usr/src/uts/common/io/qede/579xx/hsi/common_nvm.h

71

#define PCIR_OFFSET(f) ((u32)((int_ptr_t) &(((pci30_rom_hdr *)0)->f)))

usr/src/uts/common/io/qede/579xx/hsi/mcp/append.h

106

u32 start_addr;

usr/src/uts/common/io/qede/579xx/hsi/mcp/append.h

107

u32 run_addr;

usr/src/uts/common/io/qede/579xx/hsi/mcp/append.h

108

u32 byte_cnt;

usr/src/uts/common/io/qede/579xx/hsi/mcp/append.h

109

u32 image[1]; /* Unbounded */

usr/src/uts/common/io/qede/579xx/hsi/mcp/append.h

116

u32 magic;

usr/src/uts/common/io/qede/579xx/hsi/mcp/append.h

118

u32 version;

usr/src/uts/common/io/qede/579xx/hsi/mcp/append.h

120

u32 num_images;

usr/src/uts/common/io/qede/579xx/hsi/mcp/append.h

121

u32 total_size;

usr/src/uts/common/io/qede/579xx/hsi/mcp/append.h

83

u32 magic;

usr/src/uts/common/io/qede/579xx/hsi/mcp/append.h

85

u32 version;

usr/src/uts/common/io/qede/579xx/hsi/mcp/append.h

90

u32 type;

usr/src/uts/common/io/qede/579xx/hsi/mcp/append.h

91

u32 image_info;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

134

u32 version; /* Version of Codec */

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

164

u32 link_config;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

210

u32 optional_bitmap;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

250

u32 hdr;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

251

u32 num_of_npiv;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

266

u32 optional_bitmap;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

279

u32 optional_bitmap;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

284

u32 lun;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

286

u32 tcp_port;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

288

u32 tcp_port_2;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

289

u32 llmnr_en;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

290

u32 route_adv_en;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

294

u32 optional_bitmap;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

299

u32 auth_meth;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

302

u32 secret_len;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

305

u32 mutual_secret_len;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

309

u32 optional_bitmap;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

320

u32 cvid;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

321

u32 ip_add_type;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

322

u32 dns_via_dhcp;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

323

u32 target_via_dhcp;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

325

u32 head_digest_flag_en;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

326

u32 data_digest_flag_en;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

349

u32 optional_bitmap;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

354

u32 cvid;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

357

u32 num_of_fcoe_targets;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

373

u32 ncsi_scid;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

384

u32 hash;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

385

u32 num;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

395

u32 sig;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

406

u32 size;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

417

u32 crc;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

492

typedef u32 bdn_cfg_state;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

507

u32 optional;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

509

u32 rsv:24,

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

512

u32 rsrv;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

517

u32 optional;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

519

u32 rsv:31,

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

522

u32 rsrv;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

535

u32 optional;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

539

u32 rsv:14,

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

548

u32 rsrv;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

553

u32 optional;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

558

u32 rsv:11,

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

56

typedef u32 bdn_cfg;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

563

u32 rsrv;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

568

u32 optional;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

572

u32 rsv:23,

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

577

u32 rsrv;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

582

u32 optional;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

584

u32 rsv:29,

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

589

u32 rsrv;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

604

u32 optional;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

607

u32 rsv:31,

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

610

u32 rsrv;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

615

u32 optional;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

622

u32 rsrv[2];

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

627

u32 optional;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

645

u32 rsv:2,

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

653

u32 rsrv;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

658

u32 optional;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

660

u32 rsv:31,

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

663

u32 rsrv;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

678

u32 optional;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

691

u32 rsv:21,

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

706

u32 optional;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

710

u32 rsv:21,

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

716

u32 lun;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

724

u32 rsrv;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

728

u32 rsv:2,

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

740

u32 rsrv;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

745

u32 optional;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

753

u32 rsv:4,

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

764

u32 rsrv;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

785

u32 optional;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

787

u32 rsv:24,

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

792

u32 rsrv;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

804

u32 optional;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

806

u32 ncsi_scid:12,

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

808

u32 rsv2;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

820

u32 optional;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

852

u32 optional;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

856

u32 hash;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

857

u32 num_cct:8,

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

867

u32 signature;

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

870

#define BDN_HEAD_SIGN_VALID (((u32)'B' << 16) | ((u32)'D' << 8) | 'N')

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

876

u32 num_port:8,

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

884

u32 rsrv[3];

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

899

u32 rsrv[8];

usr/src/uts/common/io/qede/579xx/hsi/mcp/bdn.h

922

u32 rsrv[4];

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_private.h

106

u32 exp_rom_nvm_addr;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_private.h

117

u32 lldp_counter;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_private.h

119

u32 avs_init_timestamp;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_private.h

121

u32 seconds_since_mcp_reset;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_private.h

123

u32 last_malloc_dir_used_timestamp;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_private.h

126

u32 drv_nvm_state;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_private.h

131

u32 storm_fw_ver;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_private.h

139

u32 resource_max_values[RESOURCE_MAX_NUM];

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_private.h

148

u32 recovery_countdown; /* Counting down 2 seconds, using TMR3 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_private.h

151

u32 drv_load_vars; /* When the seconds_since_mcp_reset gets here */

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_private.h

234

u32 lldp_time_to_send;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_private.h

235

u32 lldp_ttl_expired;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_private.h

236

u32 lldp_sent;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_private.h

250

u32 config; /* Uses same defines as local config plus some more below*/

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_private.h

266

u32 seq_no;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_private.h

267

u32 ack_no;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_private.h

268

u32 received_seq_no;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_private.h

275

u32 config;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_private.h

291

u32 prev_link_change_count;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_private.h

299

u32 net_buffer[MAX_PACKET_SIZE / 4]; /* Buffer to send any packet to network */

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_private.h

302

u32 nig_drain_end_ts;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_private.h

304

u32 nig_drain_tc_end_ts;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_private.h

305

u32 tc_drain_en_bitmap;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_private.h

306

u32 recv_lldp_tlvs[LLDP_MAX_LLDP_AGENTS][MAX_TLV_BUFFER];

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_private.h

313

u32 temperature;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_private.h

365

u32 init_hw_page;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_private.h

366

u32 num_of_msix;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

100

u32 eee_cfg;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

1007

u32 num_of_sensors;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

1008

u32 sensor[MAX_NUM_OF_SENSORS];

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

1013

u32 version;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

1014

u32 config;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

1015

u32 epoc;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

1016

u32 num_of_logs;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

1017

u32 valid_logs;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

1048

u32 size; /* number of allocated resources */

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

1049

u32 offset; /* Offset of the 1st resource */

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

1050

u32 vf_size;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

1051

u32 vf_offset;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

1052

u32 flags;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

1057

u32 wwn_upper;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

1058

u32 wwn_lower;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

1067

u32 drv_ver_0;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

1068

u32 drv_ver_1;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

1069

u32 fw_ver;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

1070

u32 misc0;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

1088

u32 drv_ver_0;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

1089

u32 drv_ver_1;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

1090

u32 fw_ver;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

1091

u32 misc0;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

1102

u32 valid;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

1103

u32 epoch;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

1104

u32 pf;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

1105

u32 status;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

111

u32 link_modes; /* Additional link modes */

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

1120

u32 ack_vf_disabled[VF_MAX_STATIC / 32];

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

1135

u32 dword;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

1145

u32 drv_mb_header;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

117

u32 dynamic_cfg; /* device control channel */

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

122

u32 reserved[1];

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

1300

u32 drv_mb_param;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

1469

u32 fw_mb_header;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

1601

u32 fw_mb_param;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

1620

u32 drv_pulse_mb;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

1634

u32 mcp_pulse_mb;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

1699

u32 sup_msgs; /* Assigend with MFW_DRV_MSG_MAX */

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

1700

u32 msg[MFW_DRV_MSG_MAX_DWORDS(MFW_DRV_MSG_MAX)]; /* Incremented by the MFW */

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

1701

u32 ack[MFW_DRV_MSG_MAX_DWORDS(MFW_DRV_MSG_MAX)]; /* Incremented by the driver */

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

1720

u32 ver;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

1729

u32 init_hw_bitmask[NUM_RUNTIME_DWORDS];

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

1730

u32 init_hw_data[NUM_RUNTIME_DWORDS * 32];

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

1735

u32 num_sections;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

271

u32 config;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

284

u32 local_chassis_id[LLDP_CHASSIS_ID_STAT_LEN];

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

287

u32 local_port_id[LLDP_PORT_ID_STAT_LEN];

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

291

u32 prefix_seq_num;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

292

u32 status; /* TBD */

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

294

u32 peer_chassis_id[LLDP_CHASSIS_ID_STAT_LEN];

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

296

u32 peer_port_id[LLDP_PORT_ID_STAT_LEN];

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

297

u32 suffix_seq_num;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

301

u32 flags;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

315

u32 pri_tc_tbl[1];

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

323

u32 tc_bw_tbl[2];

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

325

u32 tc_tsa_tbl[2];

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

332

u32 entry;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

362

u32 flags;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

385

u32 pfc;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

415

u32 config;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

423

u32 flags;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

428

u32 prefix_seq_num;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

429

u32 flags;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

439

u32 suffix_seq_num;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

445

u32 data[MAX_SYSTEM_LLDP_TLV_DATA];

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

449

u32 flags;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

453

u32 dscp_pri_map[8];

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

469

u32 max_path; /* 32bit is wasty, but this will be used often */

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

470

u32 max_ports; /* (Global) 32bit is wasty, but this will be used often */

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

475

u32 debug_mb_offset;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

476

u32 phymod_dbg_mb_offset;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

479

u32 mfw_ver;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

480

u32 running_bundle_id;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

482

u32 mdump_reason;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

486

u32 ext_phy_upgrade_fw;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

496

u32 data_ptr;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

497

u32 data_size;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

522

u32 aggint;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

523

u32 opgen_addr;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

524

u32 accum_ack; /* 0..15:PF, 16..207:VF, 256..271:IOV_DIS */

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

542

u32 mcp_vf_disabled[VF_MAX_STATIC / 32]; /* 0x003c */

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

544

u32 process_kill; /* Reset on mcp reset, and incremented for eveny process kill event. */

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

56

typedef u32 offsize_t; /* In DWORDS !!! */

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

566

u32 hdr;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

567

u32 num_of_npiv;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

581

u32 validity_map; /* 0x0 (4*2 = 0x8) */

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

601

u32 link_status;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

642

u32 link_status1;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

643

u32 ext_phy_fw_version;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

644

u32 drv_phy_cfg_addr; /* Points to struct eth_phy_cfg (For READ-ONLY) */

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

646

u32 port_stx;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

648

u32 stat_nig_timer;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

653

u32 media_type;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

664

u32 lfa_status;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

681

u32 link_change_count;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

694

u32 fc_npiv_nvram_tbl_addr;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

697

u32 fc_npiv_nvram_tbl_size;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

698

u32 transceiver_data;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

749

u32 wol_info;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

750

u32 wol_pkt_len;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

751

u32 wol_pkt_details;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

754

u32 eee_status;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

764

u32 eee_remote; /* Used for EEE in LLDP */

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

77

u32 speed; /* 0 = autoneg, 1000/10000/20000/25000/40000/50000/100000 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

770

u32 module_info;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

790

u32 iscsi_boot_signature;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

791

u32 iscsi_boot_block_offset;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

794

u32 mtu_size;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

800

u32 c2s_pcp_map_lower;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

805

u32 c2s_pcp_map_upper;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

808

u32 c2s_pcp_map_default;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

81

u32 pause; /* bitmask */

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

810

u32 reserved[4];

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

813

u32 config;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

853

u32 status;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

856

u32 mac_upper; /* MAC */

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

860

u32 mac_lower;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

863

u32 fcoe_wwn_port_name_upper;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

864

u32 fcoe_wwn_port_name_lower;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

866

u32 fcoe_wwn_node_name_upper;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

867

u32 fcoe_wwn_node_name_lower;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

869

u32 ovlan_stag; /* tags */

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

87

u32 adv_speed; /* Default should be the speed_cap_mask */

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

874

u32 pf_allocation; /* vf per pf */

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

876

u32 preserve_data; /* Will be used bt CCM */

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

878

u32 driver_last_activity_ts;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

88

u32 loopback_mode;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

884

u32 drv_ack_vf_disabled[VF_MAX_STATIC / 32]; /* 0x0044 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

886

u32 drv_id;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

929

u32 mac_upper; /* Upper 16 bits are always zeroes */

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

930

u32 mac_lower;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

934

u32 lo;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

935

u32 hi;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

939

u32 nvm_start_addr;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

940

u32 len;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

944

u32 return_code;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

945

u32 image_type; /* Image type */

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

946

u32 nvm_start_addr; /* NVM address of the image */

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

947

u32 len; /* Include CRC */

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

951

#define MCP_DRV_VER_STR_SIZE_DWORD (MCP_DRV_VER_STR_SIZE / sizeof(u32))

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

954

u32 version;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

962

u32 fcs_err;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

963

u32 rserved;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

969

u32 fcs_err;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

970

u32 login_failure;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

988

u32 ocbb_host_addr;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

989

u32 ocsd_host_addr;

usr/src/uts/common/io/qede/579xx/hsi/mcp/mcp_public.h

990

u32 ocsd_req_update_interval;

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1001

u32 tx_rx_eq_10g_ac; /* 0x12C */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1010

u32 tx_rx_eq_1g; /* 0x130 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1019

u32 tx_rx_eq_25g_bt; /* 0x134 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1028

u32 tx_rx_eq_10g_bt; /* 0x138 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1037

u32 generic_cont4; /* 0x13C */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1073

u32 preboot_debug_mode_std; /* 0x140 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1074

u32 preboot_debug_mode_ext; /* 0x144 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1075

u32 reserved[56]; /* 0x148 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

108

u32 engineering_change[3]; /* 0x4 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1080

u32 reserved[1]; /* 0x0 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1085

u32 reserved__m_relocated_to_option_123; /* 0x0 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1086

u32 reserved__m_relocated_to_option_124; /* 0x4 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1087

u32 generic_cont0; /* 0x8 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

109

u32 manufacturing_id; /* 0x10 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

110

u32 serial_number[4]; /* 0x14 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

111

u32 pcie_cfg; /* 0x24 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1157

u32 pcie_cfg; /* 0xC */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1160

u32 features; /* 0x10 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1169

u32 speed_cap_mask; /* 0x14 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1186

u32 link_settings; /* 0x18 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1246

u32 phy_cfg; /* 0x1C */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1278

u32 mgmt_traffic; /* 0x20 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1281

u32 ext_phy; /* 0x24 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1295

u32 mba_cfg1; /* 0x28 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1329

u32 mba_cfg2; /* 0x2C */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1336

u32 vf_cfg; /* 0x30 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1342

u32 led_port_settings; /* 0x3C */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1358

u32 transceiver_00; /* 0x40 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1400

u32 device_ids; /* 0x44 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1409

u32 board_cfg; /* 0x48 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1455

u32 mnm_10g_cap; /* 0x4C */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

147

u32 mgmt_traffic; /* 0x28 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1472

u32 mnm_10g_ctrl; /* 0x50 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1517

u32 mnm_10g_misc; /* 0x54 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1524

u32 mnm_25g_cap; /* 0x58 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1541

u32 mnm_25g_ctrl; /* 0x5C */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1586

u32 mnm_25g_misc; /* 0x60 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1593

u32 mnm_40g_cap; /* 0x64 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1610

u32 mnm_40g_ctrl; /* 0x68 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1655

u32 mnm_40g_misc; /* 0x6C */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1662

u32 mnm_50g_cap; /* 0x70 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1679

u32 mnm_50g_ctrl; /* 0x74 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

170

u32 core_cfg; /* 0x2C */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1724

u32 mnm_50g_misc; /* 0x78 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1731

u32 mnm_100g_cap; /* 0x7C */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1748

u32 mnm_100g_ctrl; /* 0x80 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1793

u32 mnm_100g_misc; /* 0x84 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1800

u32 temperature; /* 0x88 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1805

u32 reserved[115]; /* 0x8C */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1811

u32 rsrv1; /* 0x8 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1816

u32 rsrv2; /* 0xC */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1821

u32 device_id; /* 0x10 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1826

u32 cmn_cfg; /* 0x14 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1847

u32 pci_cfg; /* 0x18 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1911

u32 preboot_generic_cfg; /* 0x2C */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1922

u32 features; /* 0x30 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1930

u32 reserved[7]; /* 0x34 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1952

u32 num_sections;

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

1953

u32 sections_offset[NVM_CFG_SECTION_MAX];

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

210

u32 e_lane_cfg1; /* 0x30 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

227

u32 e_lane_cfg2; /* 0x34 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

294

u32 f_lane_cfg1; /* 0x38 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

311

u32 f_lane_cfg2; /* 0x3C */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

337

u32 mps10_preemphasis; /* 0x40 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

346

u32 mps10_driver_current; /* 0x44 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

355

u32 mps25_preemphasis; /* 0x48 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

364

u32 mps25_driver_current; /* 0x4C */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

373

u32 pci_id; /* 0x50 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

382

u32 pci_subsys_id; /* 0x54 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

387

u32 bar; /* 0x58 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

471

u32 mps10_txfir_main; /* 0x5C */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

480

u32 mps10_txfir_post; /* 0x60 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

489

u32 mps25_txfir_main; /* 0x64 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

498

u32 mps25_txfir_post; /* 0x68 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

507

u32 manufacture_ver; /* 0x6C */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

527

u32 manufacture_time; /* 0x70 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

546

u32 led_global_settings; /* 0x74 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

595

u32 generic_cont1; /* 0x78 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

60

u32 mac_addr_hi;

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

624

u32 mbi_version; /* 0x7C */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

63

u32 mac_addr_lo;

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

668

u32 mbi_date; /* 0x80 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

669

u32 misc_sig; /* 0x84 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

71

u32 generic_cont0; /* 0x0 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

784

u32 device_capabilities; /* 0x88 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

790

u32 power_dissipated; /* 0x8C */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

799

u32 power_consumed; /* 0x90 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

808

u32 efi_version; /* 0x94 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

809

u32 multi_network_modes_capability; /* 0x98 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

819

u32 nvm_cfg_version; /* 0x9C */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

820

u32 nvm_cfg_new_option_seq; /* 0xA0 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

821

u32 nvm_cfg_removed_option_seq; /* 0xA4 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

822

u32 nvm_cfg_updated_value_seq; /* 0xA8 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

823

u32 extended_serial_number[8]; /* 0xAC */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

824

u32 oem1_number[8]; /* 0xCC */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

825

u32 oem2_number[8]; /* 0xEC */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

826

u32 mps25_active_txfir_pre; /* 0x10C */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

835

u32 mps25_active_txfir_main; /* 0x110 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

844

u32 mps25_active_txfir_post; /* 0x114 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

853

u32 features; /* 0x118 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

965

u32 tx_rx_eq_25g_hlpc; /* 0x11C */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

974

u32 tx_rx_eq_25g_llpc; /* 0x120 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

983

u32 tx_rx_eq_25g_ac; /* 0x124 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_cfg.h

992

u32 tx_rx_eq_10g_pc; /* 0x128 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_fcoe_cfg.h

104

u32 rsvd[27]; /* 0x14 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_fcoe_cfg.h

109

u32 id; /* 0x0 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_fcoe_cfg.h

117

u32 rsvd_1[8]; /* 0x4 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_fcoe_cfg.h

123

u32 rsvd[183]; /* 0x524 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_fcoe_cfg.h

129

u32 id; /* 0x0 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_fcoe_cfg.h

57

u32 value[2];

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_fcoe_cfg.h

63

u32 value[2];

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_fcoe_cfg.h

70

u32 ctrl_flags; /* 0x0 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_fcoe_cfg.h

75

u32 retry_count; /* 0x4 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_fcoe_cfg.h

81

u32 rsvd[30]; /* 0x8 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_fcoe_cfg.h

86

u32 fip_vlan; /* 0x0 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_fcoe_cfg.h

93

u32 rsvd[27]; /* 0x14 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_fcoe_cfg.h

98

u32 ctrl_flags; /* 0x0 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_iscsi_cfg.h

109

u32 config; /* 0xD0 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_iscsi_cfg.h

113

u32 rsvd_1[3]; /* 0xD4 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_iscsi_cfg.h

122

u32 value[NVM_ISCSI_CFG_ISCSI_NAME_MAX_PLUS_RESERVED/4];

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_iscsi_cfg.h

130

u32 value[NVM_ISCSI_CFG_CHAP_NAME_MAX_LEN/4];

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_iscsi_cfg.h

138

u32 value[NVM_ISCSI_CFG_CHAP_PWD_MAX_LEN/4];

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_iscsi_cfg.h

145

u32 value[2];

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_iscsi_cfg.h

151

u32 ctrl_flags; /* 0x0 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_iscsi_cfg.h

162

u32 timeout; /* 0x4 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_iscsi_cfg.h

169

u32 rsvd[62]; /* 0x108 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_iscsi_cfg.h

181

u32 generic_cont0; /* 0x328 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_iscsi_cfg.h

186

u32 ctrl_flags;

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_iscsi_cfg.h

190

u32 ip_ver;

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_iscsi_cfg.h

197

u32 rsvd[115]; /* 0x32C */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_iscsi_cfg.h

203

u32 ctrl_flags; /* 0x0 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_iscsi_cfg.h

207

u32 generic_cont0; /* 0x4 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_iscsi_cfg.h

211

u32 ip_ver;

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_iscsi_cfg.h

218

u32 rsvd_1[7]; /* 0x24 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_iscsi_cfg.h

227

u32 rsvd_2[107]; /* 0x254 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_iscsi_cfg.h

232

u32 id; /* 0x0 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_iscsi_cfg.h

240

u32 rsvd_1[5]; /* 0x4 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_iscsi_cfg.h

246

u32 rsvd_2[58]; /* 0x1718 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_iscsi_cfg.h

252

u32 id; /* 0x0 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_iscsi_cfg.h

58

u32 value[NVM_ISCSI_CFG_DHCP_NAME_MAX_LEN/4];

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_iscsi_cfg.h

65

u32 addr;

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_iscsi_cfg.h

72

u32 addr[4];

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_map.h

123

u32 image_type;

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_map.h

181

u32 num_images;

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_map.h

182

u32 rsrv;

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_map.h

188

u32 format_revision;

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_map.h

273

u32 reg_type;

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_map.h

278

u32 bank_num;

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_map.h

279

u32 pf_num;

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_map.h

280

u32 operation;

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_map.h

286

u32 reg_addr;

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_map.h

287

u32 reg_data;

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_map.h

289

u32 reset_type;

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_map.h

300

u32 format_version;

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_map.h

302

u32 no_hw_sets;

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_map.h

48

#define NVM_CRC_SIZE (sizeof(u32))

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_map.h

60

u32 magic_value; /* a pattern not likely to occur randomly */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_map.h

62

u32 sram_start_addr; /* where to locate LIM code (byte addr) */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_map.h

63

u32 code_len; /* boot code length (in dwords) */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_map.h

64

u32 code_start_addr; /* location of code on media (media byte addr) */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_map.h

65

u32 crc; /* 32-bit CRC */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_map.h

72

u32 image_type; /* Image type */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_map.h

73

u32 nvm_start_addr; /* NVM address of the image */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_map.h

74

u32 len; /* Include CRC */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_map.h

75

u32 sram_start_addr; /* Where to load the image on the scratchpad */

usr/src/uts/common/io/qede/579xx/hsi/mcp/nvm_map.h

76

u32 sram_run_addr; /* Relevant in case of MIM only */

usr/src/uts/common/io/qede/579xx/hsi/mcp/spad_layout.h

101

#define SPAD_OFFSET(addr) (((u32)addr - (u32)CPU_SPAD_BASE))

usr/src/uts/common/io/qede/579xx/hsi/mcp/spad_layout.h

105

(u32)((((u32)(_offset) >> 2) << OFFSIZE_OFFSET_SHIFT) | \

usr/src/uts/common/io/qede/579xx/hsi/mcp/spad_layout.h

106

(((u32)(_size) >> 2) << OFFSIZE_SIZE_SHIFT))

usr/src/uts/common/io/qede/579xx/hsi/mcp/spad_layout.h

139

u32 num_sections; /* 0xe20000 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/spad_layout.h

151

u32 running_mfw; /* 0xe20830 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/spad_layout.h

152

#define RUNNING_MFW *((u32*)(STRUCT_OFFSET(running_mfw)))

usr/src/uts/common/io/qede/579xx/hsi/mcp/spad_layout.h

153

u32 build_time; /* 0xe20834 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/spad_layout.h

154

#define MFW_BUILD_TIME *((u32*)(STRUCT_OFFSET(build_time)))

usr/src/uts/common/io/qede/579xx/hsi/mcp/spad_layout.h

155

u32 reset_type; /* 0xe20838 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/spad_layout.h

156

#define RESET_TYPE *((u32*)(STRUCT_OFFSET(reset_type)))

usr/src/uts/common/io/qede/579xx/hsi/mcp/spad_layout.h

157

u32 mfw_secure_mode; /* 0xe2083c */

usr/src/uts/common/io/qede/579xx/hsi/mcp/spad_layout.h

158

#define MFW_SECURE_MODE *((u32*)(STRUCT_OFFSET(mfw_secure_mode)))

usr/src/uts/common/io/qede/579xx/hsi/mcp/spad_layout.h

163

u32 mim_nvm_addr; /* 0xe20844 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/spad_layout.h

164

u32 mim_start_addr; /* 0xe20848 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/spad_layout.h

165

u32 ah_pcie_link_params; /* 0xe20850 Stores PCIe link configuration at start, so they can be used later also for Hot-Reset, without the need to re-reading them from nvm cfg. */

usr/src/uts/common/io/qede/579xx/hsi/mcp/spad_layout.h

174

#define AH_PCIE_LINK_PARAMS *((u32*)(STRUCT_OFFSET(ah_pcie_link_params)))

usr/src/uts/common/io/qede/579xx/hsi/mcp/spad_layout.h

176

u32 flags; /* 0xe20850 */

usr/src/uts/common/io/qede/579xx/hsi/mcp/spad_layout.h

177

#define M_GLOB_FLAGS *((u32*)(STRUCT_OFFSET(flags)))

usr/src/uts/common/io/qede/579xx/hsi/mcp/spad_layout.h

194

u32 rsrv_persist[4]; /* Persist reserved for MFW upgrades */ /* 0xe20854 */

usr/src/uts/common/io/qede/579xx/hsi/mfw_hsi.h

56

u32 signature; /* Help to identify that the trace is valid */

usr/src/uts/common/io/qede/579xx/hsi/mfw_hsi.h

57

u32 size; /* the size of the trace buffer in bytes*/

usr/src/uts/common/io/qede/579xx/hsi/mfw_hsi.h

58

u32 curr_level; /* 2 - all will be written to the buffer

usr/src/uts/common/io/qede/579xx/hsi/mfw_hsi.h

62

u32 modules_mask[2];/* a bit per module, 1 means write it, 0 means mask it */

usr/src/uts/common/io/qede/579xx/hsi/mfw_hsi.h

65

u32 trace_prod; /* The next trace will be written to this offset */

usr/src/uts/common/io/qede/579xx/hsi/mfw_hsi.h

66

u32 trace_oldest; /* The oldest valid trace starts at this offset (usually very close after the current producer) */

usr/src/uts/common/io/qede/579xx/hsi/mfw_trace.h

71

u32 mfw_trace_load_meta_data(const char *input_str,

usr/src/uts/common/io/qede/579xx/hsi/mfw_trace.h

95

u32 mfw_trace_parse_trace(struct mcp_trace *p_trace,

usr/src/uts/common/io/qede/qede.h

1036

qede_bar2_write32_tx_doorbell(qede_tx_ring_t *tx_ring, u32 val);

usr/src/uts/common/io/qede/qede.h

1074

u32 qede_osal_cleanup(qede_t *qede);

usr/src/uts/common/io/qede/qede.h

415

u32 ncookies;

usr/src/uts/common/io/qede/qede.h

416

u32 offset;

usr/src/uts/common/io/qede/qede.h

419

u32 pad;

usr/src/uts/common/io/qede/qede.h

434

u32 index;

usr/src/uts/common/io/qede/qede.h

439

u32 ref_cnt;

usr/src/uts/common/io/qede/qede.h

447

u32 num_entries;

usr/src/uts/common/io/qede/qede.h

458

u32 bufs_per_page;

usr/src/uts/common/io/qede/qede.h

460

u32 inactive;

usr/src/uts/common/io/qede/qede.h

461

u32 buf_upstream;

usr/src/uts/common/io/qede/qede.h

545

u32 loopback_mode;

usr/src/uts/common/io/qede/qede.h

692

u32 loopback_mode;

usr/src/uts/common/io/qede/qede.h

944

u32 supported_caps; /* In SUPPORTED defs */

usr/src/uts/common/io/qede/qede.h

945

u32 advertised_caps; /* In ADVERTISED defs */

usr/src/uts/common/io/qede/qede.h

946

u32 lp_caps; /* In ADVERTISED defs */

usr/src/uts/common/io/qede/qede.h

947

u32 speed; /* In Mb/s */

usr/src/uts/common/io/qede/qede_fp.c

1081

u32 ncookies, total_cookies = 0, max_cookies = 0, index = 0;

usr/src/uts/common/io/qede/qede_fp.c

1084

u32 mblen;

usr/src/uts/common/io/qede/qede_fp.c

1087

u32 hdl_reserved = 0;

usr/src/uts/common/io/qede/qede_fp.c

886

u32 *use_cksum, bool *use_lso, uint16_t *mss)

usr/src/uts/common/io/qede/qede_fp.c

888

u32 pflags;

usr/src/uts/common/io/qede/qede_fp.c

894

u32 pkt_mss = 0;

usr/src/uts/common/io/qede/qede_fp.c

895

u32 lso_flags = 0;

usr/src/uts/common/io/qede/qede_fp.c

977

u32 mblen;

usr/src/uts/common/io/qede/qede_fp.h

119

u32 total_len;

usr/src/uts/common/io/qede/qede_fp.h

120

u32 mblk_no;

usr/src/uts/common/io/qede/qede_fp.h

121

u32 cksum_flags;

usr/src/uts/common/io/qede/qede_fp.h

143

u32 ncookies;

usr/src/uts/common/io/qede/qede_fp.h

144

u32 offset;

usr/src/uts/common/io/qede/qede_fp.h

147

u32 padding;

usr/src/uts/common/io/qede/qede_fp.h

89

(u32 *)&data);

usr/src/uts/common/io/qede/qede_gld.c

1320

qede_ioctl_pcicfg_rd(qede_t *qede, u32 addr, void *data,

usr/src/uts/common/io/qede/qede_gld.c

1323

u32 crb, actual_crb;

usr/src/uts/common/io/qede/qede_gld.c

1367

qede_ioctl_pcicfg_wr(qede_t *qede, u32 addr, void *data,

usr/src/uts/common/io/qede/qede_gld.c

2038

u32 *tx_flags = cap_data;

usr/src/uts/common/io/qede/qede_main.c

1841

u32 ref_cnt, bufs_per_page;

usr/src/uts/common/io/qede/qede_main.c

2021

u32 head;

usr/src/uts/common/io/qede/qede_main.c

2153

u32 buf_upstream = 0, ref_cnt;

usr/src/uts/common/io/qede/qede_main.c

2154

u32 num_entries;

usr/src/uts/common/io/qede/qede_main.c

2215

u32 buf_upstream = 0, ref_cnt;

usr/src/uts/common/io/qede/qede_main.c

2279

u32 bufs_per_page, buf_size;

usr/src/uts/common/io/qede/qede_main.c

2461

static u32

usr/src/uts/common/io/qede/qede_main.c

2464

u32 ret = 0;

usr/src/uts/common/io/qede/qede_main.c

2519

static u32

usr/src/uts/common/io/qede/qede_main.c

2522

u32 ret = DDI_SUCCESS;

usr/src/uts/common/io/qede/qede_main.c

2617

static u32

usr/src/uts/common/io/qede/qede_main.c

2622

u32 ret = DDI_SUCCESS;

usr/src/uts/common/io/qede/qede_main.c

2668

static u32

usr/src/uts/common/io/qede/qede_main.c

2673

u32 ret = DDI_SUCCESS;

usr/src/uts/common/io/qede/qede_main.c

461

u32 dp_level = 0;

usr/src/uts/common/io/qede/qede_main.c

518

qede_bar2_write32_tx_doorbell(qede_tx_ring_t *tx_ring, u32 val)

usr/src/uts/common/io/qede/qede_main.c

521

ddi_put32(tx_ring->doorbell_handle, (u32 *)addr, val);

usr/src/uts/common/io/qede/qede_osal.c

506

u32

usr/src/uts/common/io/qede/qede_osal.c

507

LOG2(u32 v)

usr/src/uts/common/io/qede/qede_osal.c

509

u32 r = 0;

usr/src/uts/common/io/qede/qede_osal.c

526

qede_osal_pci_write32(struct ecore_hwfn *hwfn, u32 offset, u32 val)

usr/src/uts/common/io/qede/qede_osal.c

534

ddi_put32(qede->regs_handle, (u32 *)addr, val);

usr/src/uts/common/io/qede/qede_osal.c

538

qede_osal_pci_write16(struct ecore_hwfn *hwfn, u32 offset, u16 val)

usr/src/uts/common/io/qede/qede_osal.c

549

u32

usr/src/uts/common/io/qede/qede_osal.c

550

qede_osal_pci_read32(struct ecore_hwfn *hwfn, u32 offset)

usr/src/uts/common/io/qede/qede_osal.c

554

u32 val = 0;

usr/src/uts/common/io/qede/qede_osal.c

559

val = ddi_get32(qede->regs_handle, (u32 *)addr);

usr/src/uts/common/io/qede/qede_osal.c

565

qede_osal_pci_bar2_write32(struct ecore_hwfn *hwfn, u32 offset, u32 val)

usr/src/uts/common/io/qede/qede_osal.c

572

ddi_put32(qede->doorbell_handle, (u32 *)addr, val);

usr/src/uts/common/io/qede/qede_osal.c

575

u32

usr/src/uts/common/io/qede/qede_osal.c

581

return (ddi_get32(qede->regs_handle, (u32 *)addr));

usr/src/uts/common/io/qede/qede_osal.c

585

qede_osal_direct_reg_write32(struct ecore_hwfn *hwfn, void *addr, u32 value)

usr/src/uts/common/io/qede/qede_osal.c

590

ddi_put32(qede->regs_handle, (u32 *)addr, value);

usr/src/uts/common/io/qede/qede_osal.c

593

u32 *

usr/src/uts/common/io/qede/qede_osal.c

594

qede_osal_reg_addr(struct ecore_hwfn *hwfn, u32 addr)

usr/src/uts/common/io/qede/qede_osal.c

599

return ((u32 *)(qede->pci_bar0_base + addr));

usr/src/uts/common/io/qede/qede_osal.c

603

qede_osal_pci_read_config_byte(struct ecore_dev *edev, u32 addr, u8 *val)

usr/src/uts/common/io/qede/qede_osal.c

612

qede_osal_pci_read_config_word(struct ecore_dev *edev, u32 addr, u16 *val)

usr/src/uts/common/io/qede/qede_osal.c

620

qede_osal_pci_read_config_dword(struct ecore_dev *edev, u32 addr, u32 *val)

usr/src/uts/common/io/qede/qede_osal.c

653

u32

usr/src/uts/common/io/qede/qede_osal.c

75

qede_osal_dma_sync(struct ecore_dev *edev, void* addr, u32 size, bool is_post)

usr/src/uts/common/io/qede/qede_osal.c

751

qede_osal_pci_write_config_word(struct ecore_dev *dev, u32 addr, u16 pcie_id)

usr/src/uts/common/io/qede/qede_osal.c

760

qede_osal_valloc(struct ecore_dev *dev, u32 size)

usr/src/uts/common/io/qede/qede_osal.c

798

u32

usr/src/uts/common/io/qede/qede_osal.c

800

qede_osal_crc32(u32 crc, u8 *buf, u64 length)

usr/src/uts/common/io/qede/qede_types.h

40

typedef u32 __le32;

usr/src/uts/common/io/xge/drv/xgell.c

2711

u32 mask;

usr/src/uts/common/io/xge/hal/include/xge-debug.h

170

u32 module = XGE_COMPONENT_HAL_STATS;

usr/src/uts/common/io/xge/hal/include/xge-debug.h

189

u32 module = XGE_COMPONENT_HAL_INTERRUPT;

usr/src/uts/common/io/xge/hal/include/xge-debug.h

207

u32 module = XGE_COMPONENT_HAL_QUEUE;

usr/src/uts/common/io/xge/hal/include/xge-debug.h

227

u32 module = XGE_COMPONENT_HAL_MM;

usr/src/uts/common/io/xge/hal/include/xge-debug.h

246

u32 module = XGE_COMPONENT_HAL_CONFIG;

usr/src/uts/common/io/xge/hal/include/xge-debug.h

265

u32 module = XGE_COMPONENT_HAL_FIFO;

usr/src/uts/common/io/xge/hal/include/xge-debug.h

283

u32 module = XGE_COMPONENT_HAL_RING;

usr/src/uts/common/io/xge/hal/include/xge-debug.h

301

u32 module = XGE_COMPONENT_HAL_CHANNEL;

usr/src/uts/common/io/xge/hal/include/xge-debug.h

319

u32 module = XGE_COMPONENT_HAL_DEVICE;

usr/src/uts/common/io/xge/hal/include/xge-debug.h

337

u32 module = XGE_COMPONENT_OSDEP;

usr/src/uts/common/io/xge/hal/include/xge-debug.h

356

u32 module = XGE_COMPONENT_LL;

usr/src/uts/common/io/xge/hal/include/xgehal-channel.h

400

u32 msi_msg;

usr/src/uts/common/io/xge/hal/include/xgehal-channel.h

406

u32 msix_data;

usr/src/uts/common/io/xge/hal/include/xgehal-device.h

217

u32 seq;

usr/src/uts/common/io/xge/hal/include/xgehal-device.h

218

u32 ack_seq;

usr/src/uts/common/io/xge/hal/include/xgehal-device.h

235

u32 saddr;

usr/src/uts/common/io/xge/hal/include/xgehal-device.h

236

u32 daddr;

usr/src/uts/common/io/xge/hal/include/xgehal-device.h

260

u32 tcp_next_seq_num;

usr/src/uts/common/io/xge/hal/include/xgehal-device.h

262

u32 tcp_seq_num;

usr/src/uts/common/io/xge/hal/include/xgehal-device.h

263

u32 tcp_ack_num;

usr/src/uts/common/io/xge/hal/include/xgehal-device.h

272

u32 rth_value;

usr/src/uts/common/io/xge/hal/include/xgehal-device.h

278

u32 frags_len;

usr/src/uts/common/io/xge/hal/include/xgehal-device.h

294

u32 jhash_value;

usr/src/uts/common/io/xge/hal/include/xgehal-device.h

423

void __hal_pio_mem_write32_upper(pci_dev_h pdev, pci_reg_h regh, u32 val,

usr/src/uts/common/io/xge/hal/include/xgehal-device.h

426

void __hal_pio_mem_write32_lower(pci_dev_h pdev, pci_reg_h regh, u32 val,

usr/src/uts/common/io/xge/hal/include/xgehal-device.h

486

u32 itable_size);

usr/src/uts/common/io/xge/hal/include/xgehal-device.h

829

u32 msg_val);

usr/src/uts/common/io/xge/hal/include/xgehal-device.h

847

xge_hal_lro_init(u32 lro_scale, xge_hal_device_t *hldev);

usr/src/uts/common/io/xge/hal/include/xgehal-device.h

850

xge_hal_lro_terminate(u32 lro_scale, xge_hal_device_t *hldev);

usr/src/uts/common/io/xge/hal/include/xgehal-device.h

931

__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL u32

usr/src/uts/common/io/xge/hal/include/xgehal-device.h

941

__hal_header_update_u32(u8 *string, u16 offset, u32 val);

usr/src/uts/common/io/xge/hal/include/xgehal-device.h

974

__hal_append_lro(iplro_t *ip, tcplro_t **tcp, u32 *seg_len, lro_t *lro,

usr/src/uts/common/io/xge/hal/include/xgehal-device.h

979

u32 *seglen, lro_t **p_lro,

usr/src/uts/common/io/xge/hal/include/xgehal-device.h

984

xge_hal_accumulate_large_rx(u8 *buffer, tcplro_t **tcp, u32 *seglen,

usr/src/uts/common/io/xge/hal/include/xgehal-device.h

997

int slot, u32 tcp_seg_len, int ts_off);

usr/src/uts/common/io/xge/hal/include/xgehal-driver.h

252

u32 debug_module_mask;

usr/src/uts/common/io/xge/hal/include/xgehal-driver.h

270

xge_hal_driver_debug_module_mask_set(u32 new_mask)

usr/src/uts/common/io/xge/hal/include/xgehal-mgmt.h

127

int bits, u32 *value);

usr/src/uts/common/io/xge/hal/include/xgehal-mgmt.h

148

xge_hal_mdio_read( xge_hal_device_h devh, u32 mmd_type, u64 addr );

usr/src/uts/common/io/xge/hal/include/xgehal-mgmt.h

151

xge_hal_mdio_write( xge_hal_device_h devh, u32 mmd_type, u64 addr, u32 value );

usr/src/uts/common/io/xge/hal/include/xgehal-mgmt.h

153

u32

usr/src/uts/common/io/xge/hal/include/xgehal-mgmt.h

157

xge_hal_read_eeprom(xge_hal_device_h devh, int off, u32* data);

usr/src/uts/common/io/xge/hal/include/xgehal-mgmt.h

160

xge_hal_write_eeprom(xge_hal_device_h devh, int off, u32 data, int cnt);

usr/src/uts/common/io/xge/hal/include/xgehal-mgmt.h

184

__hal_chk_xpak_counter(xge_hal_device_t *hldev, int type, u32 value);

usr/src/uts/common/io/xge/hal/include/xgehal-mgmt.h

74

u32 transponder_temperature;

usr/src/uts/common/io/xge/hal/include/xgehal-regs.h

1197

u32 base_addr0_lo; // 0x10

usr/src/uts/common/io/xge/hal/include/xgehal-regs.h

1198

u32 base_addr0_hi; // 0x14

usr/src/uts/common/io/xge/hal/include/xgehal-regs.h

1200

u32 base_addr1_lo; // 0x18

usr/src/uts/common/io/xge/hal/include/xgehal-regs.h

1201

u32 base_addr1_hi; // 0x1C

usr/src/uts/common/io/xge/hal/include/xgehal-regs.h

1203

u32 not_Implemented1; // 0x20

usr/src/uts/common/io/xge/hal/include/xgehal-regs.h

1204

u32 not_Implemented2; // 0x24

usr/src/uts/common/io/xge/hal/include/xgehal-regs.h

1206

u32 cardbus_cis_pointer; // 0x28

usr/src/uts/common/io/xge/hal/include/xgehal-regs.h

1211

u32 rom_base; // 0x30

usr/src/uts/common/io/xge/hal/include/xgehal-regs.h

1214

u32 rsvd_38; // 0x38

usr/src/uts/common/io/xge/hal/include/xgehal-regs.h

1224

u32 msi_lower_address; // 0x44

usr/src/uts/common/io/xge/hal/include/xgehal-regs.h

1225

u32 msi_higher_address; // 0x48

usr/src/uts/common/io/xge/hal/include/xgehal-regs.h

1232

u32 vpd_data; // 0x54

usr/src/uts/common/io/xge/hal/include/xgehal-regs.h

1240

u32 pcix_status; // 0x64

usr/src/uts/common/io/xge/hal/include/xgehal-regs.h

1261

u32 base_addr0_lo; // 0x10

usr/src/uts/common/io/xge/hal/include/xgehal-regs.h

1262

u32 base_addr0_hi; // 0x14

usr/src/uts/common/io/xge/hal/include/xgehal-regs.h

1264

u32 base_addr1_lo; // 0x18

usr/src/uts/common/io/xge/hal/include/xgehal-regs.h

1265

u32 base_addr1_hi; // 0x1C

usr/src/uts/common/io/xge/hal/include/xgehal-regs.h

1267

u32 not_Implemented1; // 0x20

usr/src/uts/common/io/xge/hal/include/xgehal-regs.h

1268

u32 not_Implemented2; // 0x24

usr/src/uts/common/io/xge/hal/include/xgehal-regs.h

1270

u32 cardbus_cis_pointer; // 0x28

usr/src/uts/common/io/xge/hal/include/xgehal-regs.h

1275

u32 rom_base; // 0x30

usr/src/uts/common/io/xge/hal/include/xgehal-regs.h

1278

u32 rsvd_38; // 0x38

usr/src/uts/common/io/xge/hal/include/xgehal-regs.h

1288

u32 msi_lower_address; // 0x44

usr/src/uts/common/io/xge/hal/include/xgehal-regs.h

1289

u32 msi_higher_address; // 0x48

usr/src/uts/common/io/xge/hal/include/xgehal-regs.h

1296

u32 vpd_data; // 0x54

usr/src/uts/common/io/xge/hal/include/xgehal-regs.h

1304

u32 pcix_status; // 0x64

usr/src/uts/common/io/xge/hal/include/xgehal-regs.h

1320

u32 base_addr0_lo; // 0x10

usr/src/uts/common/io/xge/hal/include/xgehal-regs.h

1321

u32 base_addr0_hi; // 0x14

usr/src/uts/common/io/xge/hal/include/xgehal-regs.h

1323

u32 base_addr1_lo; // 0x18

usr/src/uts/common/io/xge/hal/include/xgehal-regs.h

1324

u32 base_addr1_hi; // 0x1C

usr/src/uts/common/io/xge/hal/include/xgehal-regs.h

1326

u32 not_Implemented1; // 0x20

usr/src/uts/common/io/xge/hal/include/xgehal-regs.h

1327

u32 not_Implemented2; // 0x24

usr/src/uts/common/io/xge/hal/include/xgehal-regs.h

1329

u32 cardbus_cis_pointer; // 0x28

usr/src/uts/common/io/xge/hal/include/xgehal-regs.h

1334

u32 rom_base; // 0x30

usr/src/uts/common/io/xge/hal/include/xgehal-regs.h

1337

u32 rsvd_38; // 0x38

usr/src/uts/common/io/xge/hal/include/xgehal-regs.h

1347

u32 msi_lower_address; // 0x44

usr/src/uts/common/io/xge/hal/include/xgehal-regs.h

1348

u32 msi_higher_address; // 0x48

usr/src/uts/common/io/xge/hal/include/xgehal-regs.h

1355

u32 vpd_data; // 0x54

usr/src/uts/common/io/xge/hal/include/xgehal-regs.h

1363

u32 pcix_status; // 0x64

usr/src/uts/common/io/xge/hal/include/xgehal-regs.h

358

#define XGE_HAL_I2C_CONTROL_GET_DATA(val) (u32)(val & 0xFFFFFFFF)

usr/src/uts/common/io/xge/hal/include/xgehal-regs.h

388

(u32)((spdm_bir_offset >> 32) & 0x1FFFFFFF)

usr/src/uts/common/io/xge/hal/include/xgehal-ring.h

132

(u32)((Control_2 & vBIT(0xFFFFFFFF,16,32))>>16)

usr/src/uts/common/io/xge/hal/include/xgehal-ring.h

169

u32 host_control;

usr/src/uts/common/io/xge/hal/include/xgehal-ring.h

170

u32 control_3;

usr/src/uts/common/io/xge/hal/include/xgehal-ring.h

172

u32 control_3;

usr/src/uts/common/io/xge/hal/include/xgehal-ring.h

173

u32 host_control;

usr/src/uts/common/io/xge/hal/include/xgehal-ring.h

350

u32 rth_value;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

409

u32 tmac_frms;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

410

u32 tmac_data_octets;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

412

u32 tmac_mcst_frms;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

413

u32 tmac_bcst_frms;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

415

u32 tmac_ttl_octets;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

416

u32 tmac_ucst_frms;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

417

u32 tmac_nucst_frms;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

418

u32 tmac_any_err_frms;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

421

u32 tmac_vld_ip;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

422

u32 tmac_drop_ip;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

423

u32 tmac_icmp;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

424

u32 tmac_rst_tcp;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

426

u32 tmac_udp;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

427

u32 reserved_0;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

430

u32 rmac_vld_frms;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

431

u32 rmac_data_octets;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

434

u32 rmac_vld_mcst_frms;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

435

u32 rmac_vld_bcst_frms;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

436

u32 rmac_in_rng_len_err_frms;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

437

u32 rmac_out_rng_len_err_frms;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

441

u32 rmac_ttl_octets;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

442

u32 rmac_accepted_ucst_frms;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

443

u32 rmac_accepted_nucst_frms;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

444

u32 rmac_discarded_frms;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

445

u32 rmac_drop_events;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

446

u32 reserved_1;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

450

u32 reserved_3;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

451

u32 rmac_usized_frms;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

452

u32 rmac_osized_frms;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

453

u32 rmac_frag_frms;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

454

u32 rmac_jabber_frms;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

455

u32 reserved_4;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

464

u32 reserved_7;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

465

u32 rmac_ip;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

467

u32 rmac_hdr_err_ip;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

468

u32 rmac_drop_ip;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

469

u32 rmac_icmp;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

470

u32 reserved_8;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

472

u32 rmac_udp;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

473

u32 rmac_err_drp_udp;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

491

u32 rmac_pause_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

492

u32 reserved_9;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

495

u32 rmac_accepted_ip;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

496

u32 rmac_err_tcp;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

499

u32 rd_req_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

500

u32 new_rd_req_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

501

u32 new_rd_req_rtry_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

502

u32 rd_rtry_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

503

u32 wr_rtry_rd_ack_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

506

u32 wr_req_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

507

u32 new_wr_req_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

508

u32 new_wr_req_rtry_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

509

u32 wr_rtry_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

510

u32 wr_disc_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

511

u32 rd_rtry_wr_ack_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

514

u32 txp_wr_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

515

u32 txd_rd_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

516

u32 txd_wr_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

517

u32 rxd_rd_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

518

u32 rxd_wr_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

519

u32 txf_rd_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

520

u32 rxf_wr_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

523

u32 tmac_frms_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

524

u32 tmac_data_octets_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

525

u32 tmac_mcst_frms_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

526

u32 tmac_bcst_frms_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

527

u32 tmac_ttl_octets_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

528

u32 tmac_ucst_frms_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

529

u32 tmac_nucst_frms_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

530

u32 tmac_any_err_frms_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

532

u32 tmac_vld_ip_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

533

u32 tmac_drop_ip_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

534

u32 tmac_icmp_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

535

u32 tmac_rst_tcp_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

536

u32 tmac_udp_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

537

u32 tpa_unknown_protocol;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

538

u32 tpa_parse_failure;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

539

u32 reserved_10;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

540

u32 rmac_vld_frms_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

541

u32 rmac_data_octets_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

542

u32 rmac_vld_mcst_frms_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

543

u32 rmac_vld_bcst_frms_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

544

u32 rmac_ttl_octets_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

545

u32 rmac_accepted_ucst_frms_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

546

u32 rmac_accepted_nucst_frms_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

547

u32 rmac_discarded_frms_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

548

u32 rmac_drop_events_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

549

u32 rmac_usized_frms_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

550

u32 rmac_osized_frms_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

551

u32 rmac_frag_frms_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

552

u32 rmac_jabber_frms_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

553

u32 rmac_ip_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

554

u32 rmac_drop_ip_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

555

u32 rmac_icmp_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

556

u32 rmac_udp_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

557

u32 rmac_err_drp_udp_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

558

u32 rmac_pause_cnt_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

559

u32 reserved_11;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

568

u32 rmac_fcs_discard;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

569

u32 rmac_len_discard;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

570

u32 rmac_da_discard;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

571

u32 rmac_pf_discard;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

572

u32 rmac_rts_discard;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

573

u32 rmac_wol_discard;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

574

u32 rmac_red_discard;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

575

u32 rmac_ingm_full_discard;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

576

u32 rmac_accepted_ip_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

577

u32 reserved_12;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

578

u32 link_fault_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

579

u32 reserved_13;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

582

u32 tmac_data_octets;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

583

u32 tmac_frms;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

585

u32 tmac_bcst_frms;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

586

u32 tmac_mcst_frms;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

588

u32 tmac_ucst_frms;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

589

u32 tmac_ttl_octets;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

590

u32 tmac_any_err_frms;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

591

u32 tmac_nucst_frms;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

594

u32 tmac_drop_ip;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

595

u32 tmac_vld_ip;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

596

u32 tmac_rst_tcp;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

597

u32 tmac_icmp;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

599

u32 reserved_0;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

600

u32 tmac_udp;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

603

u32 rmac_data_octets;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

604

u32 rmac_vld_frms;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

607

u32 rmac_vld_bcst_frms;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

608

u32 rmac_vld_mcst_frms;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

609

u32 rmac_out_rng_len_err_frms;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

610

u32 rmac_in_rng_len_err_frms;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

614

u32 rmac_accepted_ucst_frms;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

615

u32 rmac_ttl_octets;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

616

u32 rmac_discarded_frms;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

617

u32 rmac_accepted_nucst_frms;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

618

u32 reserved_1;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

619

u32 rmac_drop_events;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

623

u32 rmac_usized_frms;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

624

u32 reserved_3;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

625

u32 rmac_frag_frms;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

626

u32 rmac_osized_frms;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

627

u32 reserved_4;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

628

u32 rmac_jabber_frms;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

637

u32 rmac_ip;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

638

u32 reserved_7;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

640

u32 rmac_drop_ip;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

641

u32 rmac_hdr_err_ip;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

642

u32 reserved_8;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

643

u32 rmac_icmp;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

645

u32 rmac_err_drp_udp;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

646

u32 rmac_udp;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

664

u32 reserved_9;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

665

u32 rmac_pause_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

668

u32 rmac_err_tcp;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

669

u32 rmac_accepted_ip;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

672

u32 new_rd_req_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

673

u32 rd_req_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

674

u32 rd_rtry_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

675

u32 new_rd_req_rtry_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

678

u32 wr_req_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

679

u32 wr_rtry_rd_ack_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

680

u32 new_wr_req_rtry_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

681

u32 new_wr_req_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

682

u32 wr_disc_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

683

u32 wr_rtry_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

686

u32 txp_wr_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

687

u32 rd_rtry_wr_ack_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

688

u32 txd_wr_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

689

u32 txd_rd_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

690

u32 rxd_wr_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

691

u32 rxd_rd_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

692

u32 rxf_wr_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

693

u32 txf_rd_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

696

u32 tmac_data_octets_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

697

u32 tmac_frms_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

698

u32 tmac_bcst_frms_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

699

u32 tmac_mcst_frms_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

700

u32 tmac_ucst_frms_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

701

u32 tmac_ttl_octets_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

702

u32 tmac_any_err_frms_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

703

u32 tmac_nucst_frms_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

705

u32 tmac_drop_ip_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

706

u32 tmac_vld_ip_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

707

u32 tmac_rst_tcp_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

708

u32 tmac_icmp_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

709

u32 tpa_unknown_protocol;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

710

u32 tmac_udp_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

711

u32 reserved_10;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

712

u32 tpa_parse_failure;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

713

u32 rmac_data_octets_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

714

u32 rmac_vld_frms_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

715

u32 rmac_vld_bcst_frms_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

716

u32 rmac_vld_mcst_frms_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

717

u32 rmac_accepted_ucst_frms_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

718

u32 rmac_ttl_octets_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

719

u32 rmac_discarded_frms_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

720

u32 rmac_accepted_nucst_frms_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

721

u32 rmac_usized_frms_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

722

u32 rmac_drop_events_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

723

u32 rmac_frag_frms_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

724

u32 rmac_osized_frms_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

725

u32 rmac_ip_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

726

u32 rmac_jabber_frms_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

727

u32 rmac_icmp_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

728

u32 rmac_drop_ip_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

729

u32 rmac_err_drp_udp_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

730

u32 rmac_udp_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

731

u32 reserved_11;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

732

u32 rmac_pause_cnt_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

741

u32 rmac_len_discard;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

742

u32 rmac_fcs_discard;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

743

u32 rmac_pf_discard;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

744

u32 rmac_da_discard;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

745

u32 rmac_wol_discard;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

746

u32 rmac_rts_discard;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

747

u32 rmac_ingm_full_discard;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

748

u32 rmac_red_discard;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

749

u32 reserved_12;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

750

u32 rmac_accepted_ip_oflow;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

751

u32 reserved_13;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

752

u32 link_fault_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

804

u32 full_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

805

u32 usage_max;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

806

u32 reserve_free_swaps_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

807

u32 avg_compl_per_intr_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

808

u32 total_compl_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

809

u32 total_posts;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

810

u32 total_posts_many;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

811

u32 total_buffers;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

812

u32 copied_frags;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

813

u32 copied_buffers;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

814

u32 avg_buffers_per_post;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

815

u32 avg_buffer_size;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

816

u32 avg_post_size;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

817

u32 ring_bump_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

818

u32 total_posts_dtrs_many;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

819

u32 total_posts_frags_many;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

820

u32 total_posts_dang_dtrs;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

821

u32 total_posts_dang_frags;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

832

u32 excess_temp;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

833

u32 excess_bias_current;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

834

u32 excess_laser_output;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

835

u32 tick_period;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

893

u32 sm_err_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

894

u32 single_ecc_err_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

895

u32 double_ecc_err_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

896

u32 ecc_err_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

897

u32 parity_err_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

898

u32 serr_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

899

u32 rxd_t_code_err_cnt[16];

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

900

u32 txd_t_code_err_cnt[16];

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

944

u32 rx_traffic_intr_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

945

u32 tx_traffic_intr_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

946

u32 txpic_intr_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

947

u32 txdma_intr_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

948

u32 pfc_err_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

949

u32 tda_err_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

950

u32 pcc_err_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

951

u32 tti_err_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

952

u32 lso_err_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

953

u32 tpa_err_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

954

u32 sm_err_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

955

u32 txmac_intr_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

956

u32 mac_tmac_err_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

957

u32 txxgxs_intr_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

958

u32 xgxs_txgxs_err_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

959

u32 rxpic_intr_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

960

u32 rxdma_intr_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

961

u32 rc_err_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

962

u32 rpa_err_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

963

u32 rda_err_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

964

u32 rti_err_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

965

u32 rxmac_intr_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

966

u32 mac_rmac_err_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

967

u32 rxxgxs_intr_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

968

u32 xgxs_rxgxs_err_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

969

u32 mc_intr_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

970

u32 not_traffic_intr_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

971

u32 not_xge_intr_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

972

u32 traffic_intr_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

973

u32 total_intr_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

974

u32 soft_reset_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

975

u32 rxufca_hi_adjust_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

976

u32 rxufca_lo_adjust_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

977

u32 bimodal_hi_adjust_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

978

u32 bimodal_lo_adjust_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

980

u32 tot_frms_lroised;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

981

u32 tot_lro_sessions;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

982

u32 lro_frm_len_exceed_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

983

u32 lro_sg_exceed_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

984

u32 lro_out_of_seq_pkt_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-stats.h

985

u32 lro_dup_pkt_cnt;

usr/src/uts/common/io/xge/hal/include/xgehal-types.h

40

#define vBIT32(val, loc, sz) (((u32)(val)) << (32-(loc)-(sz)))

usr/src/uts/common/io/xge/hal/include/xgehal-types.h

563

u32 addr;

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device-fp.c

1057

u32 tcp_seg_len;

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device-fp.c

1273

u32 *seg_len,

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device-fp.c

1312

u32 *seglen, lro_t **p_lro,

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device-fp.c

1383

xge_hal_accumulate_large_rx(u8 *buffer, tcplro_t **tcp, u32 *seglen,

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device-fp.c

993

u32 tcp_seg_len, int ts_off)

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

104

__hal_pio_mem_write32_lower(pci_dev_h pdev, pci_reg_h regh, u32 val,

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

1271

(u32)(value>>32), reg);

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

1274

(u32)value, reg);

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

1455

__hal_pio_mem_write32_lower(hldev->pdev, hldev->regh0, (u32)val64,

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

1458

__hal_pio_mem_write32_upper(hldev->pdev, hldev->regh0, (u32)(val64>>32),

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

1461

__hal_pio_mem_write32_upper(hldev->pdev, hldev->regh0, (u32)(val64>>32),

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

1925

u8 is_ipv4, u8 tgt_queue, u32 jhash_value, u16 spdm_entry)

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

2023

u32 spdm_bar_offset;

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

2207

(u32*)&hldev->pci_config_space_bios + i);

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

2280

(u32*)&hldev->pci_config_space + i);

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

2396

u32 pcix_status;

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

3048

(u32)(XGE_HAL_SW_RESET_ALL>>32), (char *)&bar0->sw_reset);

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

3050

u32 val = (u32)(XGE_HAL_SW_RESET_ALL >> 32);

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

3053

val = (((val & (u32)0x000000ffUL) << 24) |

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

3054

((val & (u32)0x0000ff00UL) << 8) |

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

3055

((val & (u32)0x00ff0000UL) >> 8) |

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

3056

((val & (u32)0xff000000UL) >> 24));

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

3073

*((u32*)&hldev->pci_config_space + j));

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

360

(u32)(val64 >> 32), &bar0->mac_cfg);

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

390

(u32)(val64 >> 32), &bar0->mac_cfg);

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

4325

u32 reset_cnt = hldev->stats.sw_dev_info_stats.soft_reset_cnt;

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

453

(u32)(val64 >> 32), (char*)&bar0->mac_cfg);

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

4802

(u32)(val64 >> 32),

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

4841

(u32)(val64 >> 32),

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

5542

*((u32*)&hldev->pci_config_space_bios + j));

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

5594

(u32 *)&vpd_data[index]);

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

5982

static u32

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

5983

__hal_calc_jhash(u8 *msg, u32 length, u32 golden_ratio, u32 init_value)

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

5986

register u32 a,b,c,len;

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

5998

a += (msg[0] + ((u32)msg[1]<<8) + ((u32)msg[2]<<16)

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

5999

+ ((u32)msg[3]<<24));

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

6000

b += (msg[4] + ((u32)msg[5]<<8) + ((u32)msg[6]<<16)

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

6001

+ ((u32)msg[7]<<24));

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

6002

c += (msg[8] + ((u32)msg[9]<<8) + ((u32)msg[10]<<16)

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

6003

+ ((u32)msg[11]<<24));

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

6012

case 11: c+= ((u32)msg[10]<<24);

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

6014

case 10: c+= ((u32)msg[9]<<16);

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

6016

case 9 : c+= ((u32)msg[8]<<8);

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

6019

case 8 : b+= ((u32)msg[7]<<24);

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

6021

case 7 : b+= ((u32)msg[6]<<16);

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

6023

case 6 : b+= ((u32)msg[5]<<8);

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

6027

case 4 : a+= ((u32)msg[3]<<24);

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

6029

case 3 : a+= ((u32)msg[2]<<16);

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

6031

case 2 : a+= ((u32)msg[1]<<8);

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

6077

u32 jhash_value;

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

6078

u32 jhash_init_val;

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

6079

u32 jhash_golden_ratio;

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

6121

u32 mask = vBIT32(0xff,(off*8),8);

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

6156

jhash_golden_ratio = (u32)(val64 >> 32);

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

6157

jhash_init_val = (u32)(val64 & 0xffffffff);

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

6377

u32 temp_src_ip = (u32)(spdm_line_arr[1] >> 32);

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

6378

u32 temp_dst_ip = (u32)(spdm_line_arr[1] & 0xffffffff);

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

6507

xge_hal_channel_msi_set(xge_hal_channel_h channelh, int msi, u32 msi_msg)

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

6559

u32 *bar2 = (u32 *)hldev->bar2;

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

6560

u32 val32;

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

6589

u32 *bar2 = (u32 *)hldev->bar2;

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

6590

u32 val32;

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

6614

u32 *msix_value,

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

6626

(u32)(val64 >> 32), &bar0->xmsi_access);

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

6628

(u32)(val64), &bar0->xmsi_access);

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

6637

*msix_value = (u32)(xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

6699

xge_hal_lro_terminate(u32 lro_scale,

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

6713

xge_hal_lro_init(u32 lro_scale,

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

7046

xge_hal_rts_rth_itable_set(xge_hal_device_t *hldev, u8 *itable, u32 itable_size)

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

7050

u32 idx;

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

7096

u32 entry, nreg, i;

usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c

87

__hal_pio_mem_write32_upper(pci_dev_h pdev, pci_reg_h regh, u32 val, void *addr)

usr/src/uts/common/io/xge/hal/xgehal/xgehal-fifo.c

429

__hal_pio_mem_write32_lower(hldev->pdev, hldev->regh0, (u32)part0,

usr/src/uts/common/io/xge/hal/xgehal/xgehal-fifo.c

432

__hal_pio_mem_write32_upper(hldev->pdev, hldev->regh0, (u32)(part0>>32),

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c

1177

(u32)(val64 >> 32), (char*)&bar0->mac_cfg);

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c

1247

xge_hal_mdio_read( xge_hal_device_h devh, u32 mmd_type, u64 addr )

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c

1300

xge_hal_mdio_write( xge_hal_device_h devh, u32 mmd_type, u64 addr, u32 value )

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c

1372

u32 ret_data = 0;

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c

1558

u32 xge_hal_read_xfp_current_temp(xge_hal_device_h hldev)

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c

1561

u32 actual;

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c

1606

void __hal_chk_xpak_counter(xge_hal_device_t *hldev, int type, u32 value)

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c

577

int value_bits, u32 *value)

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c

705

(u32*)&hldev->pci_config_space + i);

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c

880

xge_hal_read_eeprom(xge_hal_device_h devh, int off, u32* data)

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c

884

u32 exit_cnt = 0;

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c

924

xge_hal_write_eeprom(xge_hal_device_h devh, int off, u32 data, int cnt)

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c

928

u32 exit_cnt = 0;

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmtaux.c

101

offset, XGE_HAL_AUX_SEPA, (u32)(retval>>32), (u32)retval);

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmtaux.c

139

offset, XGE_HAL_AUX_SEPA, (u32)(retval>>32), (u32)retval);

usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmtaux.c

1430

(u32)(retval>>32), (u32)retval);

usr/src/uts/common/io/xge/hal/xgehal/xgehal-ring-fp.c

243

ext_info->rth_value = (u32)rxdp->buffer0_ptr;

usr/src/uts/common/io/xge/hal/xgehal/xgehal-ring.c

175

rxdp_5->host_control = (u32)memblock_index << 16;

usr/src/uts/common/io/xge/hal/xgehal/xgehal-ring.c

177

rxdp_5->host_control |= (u32)(memblock_item_idx *

usr/src/uts/common/io/xge/hal/xgehal/xgehal-ring.c

181

rxdp_5->host_control = (u32)rxd_priv;

usr/src/uts/common/io/xge/hal/xgehal/xgehal-ring.c

571

__hal_pio_mem_write32_upper(hldev->pdev, hldev->regh0, (u32)(val64>>32),

usr/src/uts/common/io/xge/hal/xgehal/xgehal-ring.c

574

__hal_pio_mem_write32_lower(hldev->pdev, hldev->regh0, (u32)val64,

usr/src/uts/common/io/xge/hal/xgehal/xgehal-stats.c

754

hwsta->rmac_vld_mcst_frms_oflow = (u32)(mcst >> 32);

usr/src/uts/common/io/xge/hal/xgehal/xgehal-stats.c

755

hwsta->rmac_vld_mcst_frms = (u32)mcst;

usr/src/uts/common/io/xge/hal/xgehal/xgehal-stats.c

919

(u32)(latest->tmac_ttl_less_fb_octets /

usr/src/uts/common/io/xge/hal/xgehal/xgehal-stats.c

929

(u32)(latest->tmac_ttl_less_fb_octets /

usr/src/uts/common/kiconv/kiconv_ja/kiconv_ja.c

232

uint_t u32, /* UTF-32 to write */

usr/src/uts/common/kiconv/kiconv_ja/kiconv_ja.c

241

if (u32 <= 0x7f) {

usr/src/uts/common/kiconv/kiconv_ja/kiconv_ja.c

242

KICONV_JA_NPUT((uchar_t)(u32));

usr/src/uts/common/kiconv/kiconv_ja/kiconv_ja.c

244

} else if (u32 <= 0x7ff) {

usr/src/uts/common/kiconv/kiconv_ja/kiconv_ja.c

245

KICONV_JA_NPUT((uchar_t)((((u32)>>6) & 0x1f) | 0xc0));

usr/src/uts/common/kiconv/kiconv_ja/kiconv_ja.c

246

KICONV_JA_NPUT((uchar_t)(((u32) & 0x3f) | 0x80));

usr/src/uts/common/kiconv/kiconv_ja/kiconv_ja.c

248

} else if ((u32 >= 0xd800) && (u32 <= 0xdfff)) {

usr/src/uts/common/kiconv/kiconv_ja/kiconv_ja.c

250

} else if (u32 <= 0xffff) {

usr/src/uts/common/kiconv/kiconv_ja/kiconv_ja.c

251

KICONV_JA_NPUT((uchar_t)((((u32)>>12) & 0x0f) | 0xe0));

usr/src/uts/common/kiconv/kiconv_ja/kiconv_ja.c

252

KICONV_JA_NPUT((uchar_t)((((u32)>>6) & 0x3f) | 0x80));

usr/src/uts/common/kiconv/kiconv_ja/kiconv_ja.c

253

KICONV_JA_NPUT((uchar_t)(((u32) & 0x3f) | 0x80));

usr/src/uts/common/kiconv/kiconv_ja/kiconv_ja.c

255

} else if (u32 <= 0x10ffff) {

usr/src/uts/common/kiconv/kiconv_ja/kiconv_ja.c

256

KICONV_JA_NPUT((uchar_t)((((u32)>>18) & 0x07) | 0xf0));

usr/src/uts/common/kiconv/kiconv_ja/kiconv_ja.c

257

KICONV_JA_NPUT((uchar_t)((((u32)>>12) & 0x3f) | 0x80));

usr/src/uts/common/kiconv/kiconv_ja/kiconv_ja.c

258

KICONV_JA_NPUT((uchar_t)((((u32)>>6) & 0x3f) | 0x80));

usr/src/uts/common/kiconv/kiconv_ja/kiconv_ja.c

259

KICONV_JA_NPUT((uchar_t)(((u32) & 0x3f) | 0x80));

usr/src/uts/common/kiconv/kiconv_ja/kiconv_ja.c

326

uint_t u32; /* UTF-32 */

usr/src/uts/common/kiconv/kiconv_ja/kiconv_ja.c

350

u32 = kiconv_ja_jisx0201roman_to_ucs2[ic1];

usr/src/uts/common/kiconv/kiconv_ja/kiconv_ja.c

351

KICONV_JA_PUTU(u32);

usr/src/uts/common/kiconv/kiconv_ja/kiconv_ja.c

357

KICONV_JA_CNV_JISMS_TO_U2(id, u32, ic1, ic2);

usr/src/uts/common/kiconv/kiconv_ja/kiconv_ja.c

358

if (u32 == KICONV_JA_NODEST) {

usr/src/uts/common/kiconv/kiconv_ja/kiconv_ja.c

360

u32 = kiconv_ja_jisx0208_to_ucs2[index];

usr/src/uts/common/kiconv/kiconv_ja/kiconv_ja.c

362

if (u32 == KICONV_JA_REPLACE)

usr/src/uts/common/kiconv/kiconv_ja/kiconv_ja.c

364

KICONV_JA_PUTU(u32);

usr/src/uts/common/kiconv/kiconv_ja/kiconv_ja.c

372

u32 = kiconv_ja_jisx0201kana_to_ucs2[index];

usr/src/uts/common/kiconv/kiconv_ja/kiconv_ja.c

373

KICONV_JA_PUTU(u32);

usr/src/uts/common/kiconv/kiconv_ja/kiconv_ja.c

385

KICONV_JA_CNV_JIS0212MS_TO_U2(id, u32,

usr/src/uts/common/kiconv/kiconv_ja/kiconv_ja.c

387

if (u32 == KICONV_JA_NODEST) {

usr/src/uts/common/kiconv/kiconv_ja/kiconv_ja.c

390

u32 = kiconv_ja_jisx0212_to_ucs2

usr/src/uts/common/kiconv/kiconv_ja/kiconv_ja.c

393

if (u32 == KICONV_JA_REPLACE)

usr/src/uts/common/kiconv/kiconv_ja/kiconv_ja.c

395

KICONV_JA_PUTU(u32);

usr/src/uts/common/kiconv/kiconv_ja/kiconv_ja.c

404

u32 = ic1;

usr/src/uts/common/kiconv/kiconv_ja/kiconv_ja.c

405

KICONV_JA_PUTU(u32);

usr/src/uts/common/kiconv/kiconv_ja/kiconv_ja.c

515

uint_t u32; /* UTF-32 */

usr/src/uts/common/kiconv/kiconv_ja/kiconv_ja.c

545

u32 = kiconv_ja_jisx0201roman_to_ucs2[ic1];

usr/src/uts/common/kiconv/kiconv_ja/kiconv_ja.c

546

KICONV_JA_PUTU(u32);

usr/src/uts/common/kiconv/kiconv_ja/kiconv_ja.c

556

KICONV_JA_CNV_JISMS_TO_U2(id, u32, ic1, ic2);

usr/src/uts/common/kiconv/kiconv_ja/kiconv_ja.c

557

if (u32 == KICONV_JA_NODEST) {

usr/src/uts/common/kiconv/kiconv_ja/kiconv_ja.c

559

u32 = kiconv_ja_jisx0208_to_ucs2[index];

usr/src/uts/common/kiconv/kiconv_ja/kiconv_ja.c

561

if (u32 == KICONV_JA_REPLACE)

usr/src/uts/common/kiconv/kiconv_ja/kiconv_ja.c

563

KICONV_JA_PUTU(u32);

usr/src/uts/common/kiconv/kiconv_ja/kiconv_ja.c

580

u32 = kiconv_ja_jisx0201kana_to_ucs2[index];

usr/src/uts/common/kiconv/kiconv_ja/kiconv_ja.c

581

KICONV_JA_PUTU(u32);

usr/src/uts/common/kiconv/kiconv_ja/kiconv_ja.c

606

KICONV_JA_CNV_JIS0212MS_TO_U2(id, u32,

usr/src/uts/common/kiconv/kiconv_ja/kiconv_ja.c

608

if (u32 == KICONV_JA_NODEST) {

usr/src/uts/common/kiconv/kiconv_ja/kiconv_ja.c

611

u32 = kiconv_ja_jisx0212_to_ucs2

usr/src/uts/common/kiconv/kiconv_ja/kiconv_ja.c

614

if (u32 == KICONV_JA_REPLACE)

usr/src/uts/common/kiconv/kiconv_ja/kiconv_ja.c

616

KICONV_JA_PUTU(u32);

usr/src/uts/common/kiconv/kiconv_ja/kiconv_ja.c

636

u32 = ic1;

usr/src/uts/common/kiconv/kiconv_ja/kiconv_ja.c

637

KICONV_JA_PUTU(u32);

usr/src/uts/common/kiconv/kiconv_ko/kiconv_ko.c

545

uint32_t u32;

usr/src/uts/common/kiconv/kiconv_ko/kiconv_ko.c

547

u32 = (ko_val & 0xFF) + (((ko_val & 0xFF00) == 0xC900) ?

usr/src/uts/common/kiconv/kiconv_ko/kiconv_ko.c

550

udc[1] = (uchar_t)(0x80 | (u32 & 0x00000FC0) >> 6);

usr/src/uts/common/kiconv/kiconv_ko/kiconv_ko.c

551

udc[2] = (uchar_t)(0x80 | (u32 & 0x0000003F));

usr/src/uts/common/kiconv/kiconv_sc/kiconv_sc.c

748

uint32_t u32;

usr/src/uts/common/kiconv/kiconv_sc/kiconv_sc.c

757

u32 = (gbk_val >> 24) * 12600 +

usr/src/uts/common/kiconv/kiconv_sc/kiconv_sc.c

761

u8array[0] = (uchar_t)(0xF0 | ((u32 & 0x1C0000) >> 18));

usr/src/uts/common/kiconv/kiconv_sc/kiconv_sc.c

762

u8array[1] = (uchar_t)(0x80 | ((u32 & 0x03F000) >> 12));

usr/src/uts/common/kiconv/kiconv_sc/kiconv_sc.c

763

u8array[2] = (uchar_t)(0x80 | ((u32 & 0x000FC0) >> 6));

usr/src/uts/common/kiconv/kiconv_sc/kiconv_sc.c

764

u8array[3] = (uchar_t)(0x80 | (u32 & 0x00003F));

usr/src/uts/common/kiconv/kiconv_sc/kiconv_sc.c

809

uint32_t u32;

usr/src/uts/common/kiconv/kiconv_sc/kiconv_sc.c

811

u32 = (((utf8 & 0x07000000) >> 6) | ((utf8 & 0x3F0000) >> 4) |

usr/src/uts/common/kiconv/kiconv_sc/kiconv_sc.c

814

gbkcode = ((u32 / 12600 + 0x90) << 24) |

usr/src/uts/common/kiconv/kiconv_sc/kiconv_sc.c

815

(((u32 % 12600) / 1260 + 0x30) << 16) |

usr/src/uts/common/kiconv/kiconv_sc/kiconv_sc.c

816

(((u32 % 1260) / 10 + 0x81) << 8) | (u32 % 10 + 0x30);

usr/src/uts/common/kiconv/kiconv_tc/kiconv_tc.c

723

uint32_t u32;

usr/src/uts/common/kiconv/kiconv_tc/kiconv_tc.c

769

u32 = get_unicode_from_UDA(plane_no,

usr/src/uts/common/kiconv/kiconv_tc/kiconv_tc.c

776

udc[1] = (uchar_t)(0x80 | (u32 & 0x03F000) >> 12);

usr/src/uts/common/kiconv/kiconv_tc/kiconv_tc.c

777

udc[2] = (uchar_t)(0x80 | (u32 & 0x000FC0) >> 6);

usr/src/uts/common/kiconv/kiconv_tc/kiconv_tc.c

778

udc[3] = (uchar_t)(0x80 | (u32 & 0x00003F));

usr/src/uts/common/os/sunddi.c

311

uint32_t u32;

usr/src/uts/common/os/sunddi.c

336

peekpoke_value.u32 = *(uint32_t *)value_p;

usr/src/uts/common/os/sunddi.c

364

*(uint32_t *)value_p = peekpoke_value.u32;

usr/src/uts/common/sys/epoll.h

30

uint32_t u32;

usr/src/uts/common/sys/kiconv_ja.h

110

#define KICONV_JA_PUTU(u32) \

usr/src/uts/common/sys/kiconv_ja.h

111

if (write_unicode((u32), &op, &oleft, errno) \

usr/src/uts/common/sys/rsm/rsm_common.h

190

uint32_t u32[2];

usr/src/uts/common/sys/scsi/impl/uscsi.h

100

u32->uscsi_cdblen = ucmd->uscsi_cdblen; \

usr/src/uts/common/sys/scsi/impl/uscsi.h

101

u32->uscsi_rqlen = ucmd->uscsi_rqlen; \

usr/src/uts/common/sys/scsi/impl/uscsi.h

102

u32->uscsi_rqstatus = ucmd->uscsi_rqstatus; \

usr/src/uts/common/sys/scsi/impl/uscsi.h

103

u32->uscsi_rqresid = ucmd->uscsi_rqresid; \

usr/src/uts/common/sys/scsi/impl/uscsi.h

104

u32->uscsi_rqbuf = (caddr32_t)(uintptr_t)ucmd->uscsi_rqbuf; \

usr/src/uts/common/sys/scsi/impl/uscsi.h

105

u32->uscsi_path_instance = (uint32_t)ucmd->uscsi_path_instance;

usr/src/uts/common/sys/scsi/impl/uscsi.h

76

#define uscsi_cmd32touscsi_cmd(u32, ucmd) \

usr/src/uts/common/sys/scsi/impl/uscsi.h

77

ucmd->uscsi_flags = u32->uscsi_flags; \

usr/src/uts/common/sys/scsi/impl/uscsi.h

78

ucmd->uscsi_status = u32->uscsi_status; \

usr/src/uts/common/sys/scsi/impl/uscsi.h

79

ucmd->uscsi_timeout = u32->uscsi_timeout; \

usr/src/uts/common/sys/scsi/impl/uscsi.h

80

ucmd->uscsi_cdb = (caddr_t)(uintptr_t)u32->uscsi_cdb; \

usr/src/uts/common/sys/scsi/impl/uscsi.h

81

ucmd->uscsi_bufaddr = (caddr_t)(uintptr_t)u32->uscsi_bufaddr; \

usr/src/uts/common/sys/scsi/impl/uscsi.h

82

ucmd->uscsi_buflen = (size_t)u32->uscsi_buflen; \

usr/src/uts/common/sys/scsi/impl/uscsi.h

83

ucmd->uscsi_resid = (size_t)u32->uscsi_resid; \

usr/src/uts/common/sys/scsi/impl/uscsi.h

84

ucmd->uscsi_cdblen = u32->uscsi_cdblen; \

usr/src/uts/common/sys/scsi/impl/uscsi.h

85

ucmd->uscsi_rqlen = u32->uscsi_rqlen; \

usr/src/uts/common/sys/scsi/impl/uscsi.h

86

ucmd->uscsi_rqstatus = u32->uscsi_rqstatus; \

usr/src/uts/common/sys/scsi/impl/uscsi.h

87

ucmd->uscsi_rqresid = u32->uscsi_rqresid; \

usr/src/uts/common/sys/scsi/impl/uscsi.h

88

ucmd->uscsi_rqbuf = (caddr_t)(uintptr_t)u32->uscsi_rqbuf; \

usr/src/uts/common/sys/scsi/impl/uscsi.h

89

ucmd->uscsi_path_instance = (ulong_t)u32->uscsi_path_instance;

usr/src/uts/common/sys/scsi/impl/uscsi.h

92

#define uscsi_cmdtouscsi_cmd32(ucmd, u32) \

usr/src/uts/common/sys/scsi/impl/uscsi.h

93

u32->uscsi_flags = ucmd->uscsi_flags; \

usr/src/uts/common/sys/scsi/impl/uscsi.h

94

u32->uscsi_status = ucmd->uscsi_status; \

usr/src/uts/common/sys/scsi/impl/uscsi.h

95

u32->uscsi_timeout = ucmd->uscsi_timeout; \

usr/src/uts/common/sys/scsi/impl/uscsi.h

96

u32->uscsi_cdb = (caddr32_t)(uintptr_t)ucmd->uscsi_cdb; \

usr/src/uts/common/sys/scsi/impl/uscsi.h

97

u32->uscsi_bufaddr = (caddr32_t)(uintptr_t)ucmd->uscsi_bufaddr; \

usr/src/uts/common/sys/scsi/impl/uscsi.h

98

u32->uscsi_buflen = (size32_t)ucmd->uscsi_buflen; \

usr/src/uts/common/sys/scsi/impl/uscsi.h

99

u32->uscsi_resid = (size32_t)ucmd->uscsi_resid; \

usr/src/uts/common/sys/scsi/impl/usmp.h

58

#define usmp_cmd32tousmp_cmd(u32, ucmd) \

usr/src/uts/common/sys/scsi/impl/usmp.h

59

ucmd->usmp_req = (caddr_t)(uintptr_t)u32->usmp_req; \

usr/src/uts/common/sys/scsi/impl/usmp.h

60

ucmd->usmp_rsp = (caddr_t)(uintptr_t)u32->usmp_rsp; \

usr/src/uts/common/sys/scsi/impl/usmp.h

61

ucmd->usmp_reqsize = (size_t)u32->usmp_reqsize; \

usr/src/uts/common/sys/scsi/impl/usmp.h

62

ucmd->usmp_rspsize = (size_t)u32->usmp_rspsize; \

usr/src/uts/common/sys/scsi/impl/usmp.h

63

ucmd->usmp_timeout = u32->usmp_timeout;

usr/src/uts/common/sys/scsi/impl/usmp.h

65

#define usmp_cmdtousmp_cmd32(ucmd, u32) \

usr/src/uts/common/sys/scsi/impl/usmp.h

66

u32->usmp_req = (caddr32_t)(uintptr_t)ucmd->usmp_req; \

usr/src/uts/common/sys/scsi/impl/usmp.h

67

u32->usmp_rsp = (caddr32_t)(uintptr_t)ucmd->usmp_rsp; \

usr/src/uts/common/sys/scsi/impl/usmp.h

68

u32->usmp_reqsize = (size32_t)ucmd->usmp_reqsize; \

usr/src/uts/common/sys/scsi/impl/usmp.h

69

u32->usmp_rspsize = (size32_t)ucmd->usmp_rspsize; \

usr/src/uts/common/sys/scsi/impl/usmp.h

70

u32->usmp_timeout = ucmd->usmp_timeout;

usr/src/uts/common/sys/stream.h

355

uint32_t u32;

usr/src/uts/common/sys/stream.h

370

#define db_cksum32 db_struioun.cksum.cksum_val.u32

usr/src/uts/i86pc/io/amd_iommu/amd_iommu_impl.c

1914

s.u32[0] = ptr32[0];

usr/src/uts/i86pc/io/amd_iommu/amd_iommu_impl.c

1915

s.u32[1] = ptr32[1];

usr/src/uts/i86pc/io/amd_iommu/amd_iommu_impl.c

1927

s.u32[0] = ptr32[0];

usr/src/uts/i86pc/io/amd_iommu/amd_iommu_impl.c

1928

s.u32[1] = ptr32[1];

usr/src/uts/i86pc/io/amd_iommu/amd_iommu_impl.h

267

uint32_t u32[2];

usr/src/uts/sun/sys/dada/impl/udcd.h

69

#define udcd_cmd32toudcd_cmd(u32, ucmd) \

usr/src/uts/sun/sys/dada/impl/udcd.h

70

ucmd->udcd_error_reg = u32->udcd_error_reg; \

usr/src/uts/sun/sys/dada/impl/udcd.h

71

ucmd->udcd_status_reg = u32->udcd_status_reg; \

usr/src/uts/sun/sys/dada/impl/udcd.h

72

ucmd->udcd_status = u32->udcd_status; \

usr/src/uts/sun/sys/dada/impl/udcd.h

73

ucmd->udcd_timeout = u32->udcd_timeout; \

usr/src/uts/sun/sys/dada/impl/udcd.h

74

ucmd->udcd_flags = u32->udcd_flags; \

usr/src/uts/sun/sys/dada/impl/udcd.h

75

ucmd->udcd_resid = u32->udcd_resid; \

usr/src/uts/sun/sys/dada/impl/udcd.h

76

ucmd->udcd_buflen = u32->udcd_buflen; \

usr/src/uts/sun/sys/dada/impl/udcd.h

77

ucmd->udcd_bufaddr = (caddr_t)(uintptr_t)u32->udcd_bufaddr; \

usr/src/uts/sun/sys/dada/impl/udcd.h

78

ucmd->udcd_cmd = (struct dcd_cmd *)(uintptr_t)u32->udcd_cmd; \

usr/src/uts/sun/sys/dada/impl/udcd.h

79

ucmd->udcd_reserved = (caddr_t)(uintptr_t)u32->udcd_reserved; \

usr/src/uts/sun/sys/dada/impl/udcd.h

80

ucmd->version_no = u32->version_no;

usr/src/uts/sun/sys/dada/impl/udcd.h

82

#define udcd_cmdtoudcd_cmd32(ucmd, u32) \

usr/src/uts/sun/sys/dada/impl/udcd.h

83

u32->udcd_error_reg = ucmd->udcd_error_reg; \

usr/src/uts/sun/sys/dada/impl/udcd.h

84

u32->udcd_status_reg = ucmd->udcd_status_reg; \

usr/src/uts/sun/sys/dada/impl/udcd.h

85

u32->udcd_status = ucmd->udcd_status; \

usr/src/uts/sun/sys/dada/impl/udcd.h

86

u32->udcd_timeout = ucmd->udcd_timeout; \

usr/src/uts/sun/sys/dada/impl/udcd.h

87

u32->udcd_flags = ucmd->udcd_flags; \

usr/src/uts/sun/sys/dada/impl/udcd.h

88

u32->udcd_resid = ucmd->udcd_resid; \

usr/src/uts/sun/sys/dada/impl/udcd.h

89

u32->udcd_buflen = ucmd->udcd_buflen; \

usr/src/uts/sun/sys/dada/impl/udcd.h

90

u32->udcd_bufaddr = (caddr32_t)(uintptr_t)ucmd->udcd_bufaddr; \

usr/src/uts/sun/sys/dada/impl/udcd.h

91

u32->udcd_cmd = (caddr32_t)(uintptr_t)ucmd->udcd_cmd; \

usr/src/uts/sun/sys/dada/impl/udcd.h

92

u32->udcd_reserved = (caddr32_t)(uintptr_t)ucmd->udcd_reserved; \

usr/src/uts/sun/sys/dada/impl/udcd.h

93

u32->version_no = ucmd->version_no;

usr/src/uts/sun4u/io/pci/pci_tools.c

167

*value_p = (uint64_t)peek_value.u32;

usr/src/uts/sun4u/io/pci/pci_tools.c

206

poke_value.u32 = (uint32_t)value;

usr/src/uts/sun4u/io/pci/pci_tools.c

79

uint32_t u32;

usr/src/uts/sun4u/io/px/px_tools_4u.c

143

*value_p = (uint64_t)peek_value.u32;

usr/src/uts/sun4u/io/px/px_tools_4u.c

182

poke_value.u32 = (uint32_t)value;

usr/src/uts/sun4u/io/px/px_tools_4u.c

80

uint32_t u32;