sys/arm/allwinner/aw_sid.c

287

#define WR4(sc, reg, val) bus_write_4((sc)->res, (reg), (val))

sys/arm/allwinner/aw_thermal.c

375

#define WR4(sc, reg, val) bus_write_4((sc)->res[0], (reg), (val))

sys/arm/allwinner/aw_usb3phy.c

107

#define WR4(res, o, v) bus_write_4(res, (o), (v))

sys/arm/allwinner/aw_usbphy.c

181

#define WR4(res, o, v) bus_write_4(res, (o), (v))

sys/arm/allwinner/if_awg.c

72

#define WR4(sc, reg, val) bus_write_4((sc)->res[_RES_EMAC], (reg), (val))

sys/arm/broadcom/bcm2835/bcm2835_sdhci.c

439

WR4(struct bcm_sdhci_softc *sc, bus_size_t off, uint32_t val)

sys/arm/broadcom/bcm2835/bcm2835_sdhost.c

243

WR4(struct bcm_sdhost_softc *sc, bus_size_t off, uint32_t val)

sys/arm/freescale/imx/imx6_ccm.c

73

WR4(struct ccm_softc *sc, bus_size_t off, uint32_t val)

sys/arm/freescale/imx/imx6_snvs.c

87

WR4(struct snvs_softc *sc, bus_size_t offset, uint32_t value)

sys/arm/freescale/imx/imx6_src.c

64

WR4(struct src_softc *sc, bus_size_t off, uint32_t val)

sys/arm/freescale/imx/imx_epit.c

140

WR4(struct epit_softc *sc, bus_size_t offset, uint32_t value)

sys/arm/freescale/imx/imx_iomux.c

112

WR4(struct iomux_softc *sc, bus_size_t off, uint32_t val)

sys/arm/freescale/imx/imx_spi.c

160

WR4(struct spi_softc *sc, bus_size_t offset, uint32_t value)

sys/arm/mv/clk/armada38x_gateclk.c

54

#define WR4(_sc, addr, val) bus_write_4(_sc->res, addr, val)

sys/arm/mv/clk/armada38x_gen.c

45

#define WR4(_clk, offset, val) \

sys/arm/mv/mv_ap806_clock.c

101

#define WR4(sc, reg, val) SYSCON_WRITE_4((sc)->syscon, (reg), (val))

sys/arm/mv/mv_ap806_gicp.c

79

#define WR4(sc, reg, val) bus_write_4((sc)->res, (reg), (val))

sys/arm/mv/mv_ap806_sei.c

103

#define WR4(sc, reg, val) bus_write_4((sc)->mem_res, (reg), (val))

sys/arm/mv/mv_cp110_clock.c

135

#define WR4(sc, reg, val) SYSCON_WRITE_4((sc)->syscon, (reg), (val))

sys/arm/mv/mv_cp110_icu.c

100

#define WR4(sc, reg, val) bus_write_4((sc)->res, (reg), (val))

sys/arm/mv/mv_thermal.c

123

#define WR4(sc, reg, val) \

sys/arm/mv/mvebu_pinctrl.c

107

#define WR4(sc, reg, val) SYSCON_WRITE_4((sc)->syscon, (reg), (val))

sys/arm/nvidia/drm2/tegra_dc.c

55

#define WR4(_sc, _r, _v) bus_write_4((_sc)->mem_res, 4 * (_r), (_v))

sys/arm/nvidia/drm2/tegra_hdmi.c

58

#define WR4(_sc, _r, _v) bus_write_4((_sc)->mem_res, 4 * (_r), (_v))

sys/arm/nvidia/drm2/tegra_host1x.c

57

#define WR4(_sc, _r, _v) bus_rite_4((_sc)->mem_res, (_r), (_v))

sys/arm/nvidia/tegra124/tegra124_car.h

33

#define WR4(sc, reg, val) CLKDEV_WRITE_4((sc)->clkdev, reg, val)

sys/arm/nvidia/tegra124/tegra124_pmc.c

135

#define WR4(_sc, _r, _v) bus_write_4((_sc)->mem_res, (_r), (_v))

sys/arm/nvidia/tegra124/tegra124_xusbpadctl.c

170

#define WR4(_sc, _r, _v) bus_write_4((_sc)->mem_res, (_r), (_v))

sys/arm/nvidia/tegra_gpio.c

62

#define WR4(_sc, _r, _v) bus_write_4((_sc)->mem_res, (_r), (_v))

sys/arm/nvidia/tegra_i2c.c

191

#define WR4(_sc, _r, _v) bus_write_4((_sc)->mem_res, (_r), (_v))

sys/arm/nvidia/tegra_lic.c

65

#define WR4(_sc, _b, _r, _v) bus_write_4((_sc)->mem_res[_b], (_r), (_v))

sys/arm/nvidia/tegra_mc.c

97

#define WR4(_sc, _r, _v) bus_write_4((_sc)->mem_res, (_r), (_v))

sys/arm/nvidia/tegra_rtc.c

75

#define WR4(_sc, _r, _v) bus_write_4((_sc)->mem_res, (_r), (_v))

sys/arm/nvidia/tegra_soctherm.c

131

#define WR4(_sc, _r, _v) bus_write_4((_sc)->mem_res, (_r), (_v))

sys/arm/nvidia/tegra_usbphy.c

309

#define WR4(sc, offs, val) \

sys/arm/ti/ti_sdhci.c

154

WR4(struct ti_sdhci_softc *sc, bus_size_t off, uint32_t val)

sys/arm/xilinx/uart_dev_cdnc.c

56

#define WR4(bas, reg, value) \

sys/arm/xilinx/zy7_devcfg.c

97

#define WR4(sc, off, val) (bus_write_4((sc)->mem_res, (off), (val)))

sys/arm/xilinx/zy7_gpio.c

181

#define WR4(sc, off, val) bus_write_4((sc)->mem_res, (off), (val))

sys/arm/xilinx/zy7_qspi.c

106

#define WR4(sc, off, val) (bus_write_4((sc)->mem_res, (off), (val)))

sys/arm/xilinx/zy7_slcr.c

74

#define WR4(sc, off, val) (bus_write_4((sc)->mem_res, (off), (val)))

sys/arm/xilinx/zy7_spi.c

93

#define WR4(sc, off, val) (bus_write_4((sc)->mem_res, (off), (val)))

sys/arm64/arm64/cmn600.c

53

#define WR4(sc, r, v) bus_write_4((sc)->sc_res[0], (r), (v))

sys/arm64/broadcom/genet/if_genet.c

81

#define WR4(sc, reg, val) bus_write_4((sc)->res[_RES_MAC], (reg), (val))

sys/arm64/freescale/imx/clk/imx_clk_gate.c

39

#define WR4(_clk, off, val) \

sys/arm64/freescale/imx/clk/imx_clk_mux.c

43

#define WR4(_clk, off, val) \

sys/arm64/nvidia/tegra210/tegra210_car.h

34

#define WR4(sc, reg, val) CLKDEV_WRITE_4((sc)->clkdev, reg, val)

sys/arm64/nvidia/tegra210/tegra210_pmc.c

188

WR4(struct tegra210_pmc_softc *sc, bus_size_t r, uint32_t v)

sys/arm64/nvidia/tegra210/tegra210_xusbpadctl.c

324

#define WR4(_sc, _r, _v) bus_write_4((_sc)->mem_res, (_r), (_v))

sys/arm64/qoriq/clk/qoriq_clk_pll.c

50

#define WR4(_clk, offset, val) \

sys/arm64/qoriq/qoriq_gpio_pic.c

68

#define WR4(sc, off, data) bus_write_4((sc)->base.sc_mem, (off), (data))

sys/arm64/qoriq/qoriq_therm.c

196

WR4(struct qoriq_therm_softc *sc, bus_size_t addr, uint32_t val)

sys/arm64/rockchip/rk_pcie_phy.c

98

#define WR4(sc, reg, mask, val) \

sys/arm64/rockchip/rk_tsadc.c

100

#define WR4(_sc, _r, _v) bus_write_4((_sc)->mem_res, (_r), (_v))

sys/arm64/rockchip/rk_usbphy.c

67

#define WR4(_sc, _r, _v) bus_write_4((_sc)->mem_res, (_r), (_v))

sys/dev/cadence/if_cgem.c

221

#define WR4(sc, off, val) (bus_write_4((sc)->mem_res, (off), (val)))

sys/dev/clk/clk_div.c

39

#define WR4(_clk, off, val) \

sys/dev/clk/clk_gate.c

39

#define WR4(_clk, off, val) \

sys/dev/clk/clk_mux.c

39

#define WR4(_clk, off, val) \

sys/dev/clk/rockchip/rk_clk_fract.c

38

#define WR4(_clk, off, val) \

sys/dev/clk/rockchip/rk_clk_gate.c

39

#define WR4(_clk, off, val) \

sys/dev/clk/rockchip/rk_clk_mux.c

46

#define WR4(_clk, off, val) \

sys/dev/eqos/if_eqos.c

98

#define WR4(sc, o, v) bus_write_4(sc->res[EQOS_RES_MEM], (o), (v))

sys/dev/eqos/if_eqos_fdt.c

84

#define WR4(sc, o, v) bus_write_4(sc->res[EQOS_RES_MEM], (o), (v))

sys/dev/eqos/if_eqos_starfive.c

42

#define WR4(sc, o, v) bus_write_4(sc->base.res[EQOS_RES_MEM], (o), (v))

sys/dev/ffec/if_ffec.c

232

WR4(struct ffec_softc *sc, bus_size_t off, uint32_t val)

sys/dev/hwpmc/pmu_dmc620.c

70

#define WR4(sc, r, v) bus_write_4((sc)->sc_res[0], (r), (v))

sys/dev/mwl/if_mwl.c

279

WR4(struct mwl_softc *sc, bus_size_t off, uint32_t val)

sys/dev/mwl/mwlhal.c

221

WR4(struct mwl_hal_priv *mh, bus_size_t off, uint32_t val)

sys/dev/sdhci/fsl_sdhci.c

197

WR4(struct fsl_sdhci_softc *sc, bus_size_t off, uint32_t val)

sys/dev/sdhci/sdhci.c

89

#define WR4(slot, off, val) SDHCI_WRITE_4((slot)->bus, (slot), (off), (val))

sys/dev/sdhci/sdhci_fsl_fdt.c

57

#define WR4 (sc->write)

sys/riscv/riscv/plic.c

114

#define WR4(sc, reg, val) \

sys/riscv/starfive/jh7110_pcie.c

162

#define WR4(sc, reg, val) bus_write_4((sc)->reg_mem_res, (reg), (val))