crypto/openssh/channels.h

316

int channel_proxy_downstream(struct ssh *, Channel *mc);

games/rogue/object.c

658

short mc, rc, row, col;

games/rogue/object.c

674

mc = mvinch(row, col);

games/rogue/object.c

675

if (((mc < 'A') || (mc > 'Z')) &&

games/rogue/score.c

158

boolean mc;

games/rogue/score.c

161

mc = FALSE;

games/rogue/score.c

168

mc = msg_cleared;

games/rogue/score.c

183

msg_cleared = mc;

games/sail/pl_2.c

79

if (mf->FS && (!mc->rig1 || windspeed == 6))

games/sail/pl_3.c

151

hit += QUAL[index][mc->qual-1];

games/sail/pl_3.c

172

if (((temp = mc->class) >= 5 || temp == 1) && windspeed == 5)

games/sail/pl_3.c

60

crew[0] = mc->crew1;

games/sail/pl_3.c

61

crew[1] = mc->crew2;

games/sail/pl_3.c

62

crew[2] = mc->crew3;

games/sail/pl_3.c

80

guns = mc->gunR;

games/sail/pl_3.c

81

car = mc->carR;

games/sail/pl_3.c

85

guns = mc->gunL;

games/sail/pl_3.c

86

car = mc->carL;

games/sail/pl_4.c

51

rig = mc->rig1;

games/sail/pl_4.c

53

if (windspeed == 6 || (windspeed == 5 && mc->class > 4))

games/sail/pl_4.c

55

if (mc->crew3 && rig) {

games/sail/pl_5.c

165

crew[0] = mc->crew1;

games/sail/pl_5.c

166

crew[1] = mc->crew2;

games/sail/pl_5.c

167

crew[2] = mc->crew3;

games/sail/pl_5.c

65

if (!mc->crew3 || snagged(ms) || !windspeed) {

games/sail/pl_6.c

150

if (!mc->crew3) {

games/sail/pl_6.c

52

struct shipspecs *ptr = mc;

games/sail/pl_7.c

1106

mc = ms->specs;

games/sail/pl_7.c

629

wprintw(stat_w, "Hull %2d\n", mc->hull);

games/sail/pl_7.c

631

mc->crew1, mc->crew2, mc->crew3);

games/sail/pl_7.c

632

wprintw(stat_w, "Guns %2d %2d\n", mc->gunL, mc->gunR);

games/sail/pl_7.c

633

wprintw(stat_w, "Carr %2d %2d\n", mc->carL, mc->carR);

games/sail/pl_7.c

634

wprintw(stat_w, "Rigg %d %d %d ", mc->rig1, mc->rig2, mc->rig3);

games/sail/pl_7.c

635

if (mc->rig4 < 0)

games/sail/pl_7.c

638

wprintw(stat_w, "%d", mc->rig4);

games/sail/pl_7.c

757

mc->class,

games/sail/pl_7.c

758

classname[mc->class],

games/sail/pl_7.c

759

mc->guns,

games/sail/pl_7.c

96

struct shipspecs *mc; /* ms->specs */

games/sail/pl_main.c

116

ms->shipname, mc->guns, classname[mc->class],

games/sail/pl_main.c

117

qualname[mc->qual]);

games/sail/player.h

96

extern struct shipspecs *mc; /* ms->specs */

lib/libcalendar/easter.c

80

int mc[] = {5, 25, 13, 2, 22, 10, 30, 18, 7, 27, 15, 4,

lib/libcalendar/easter.c

89

dt.d = mc[y % 19];

sbin/vinum/list.c

844

struct mc malloced;

sys/bus/u4b/audio/uaudio.c

3035

uaudio_mixer_add_ctl_sub(struct uaudio_softc *sc, struct uaudio_mixer_node *mc)

sys/bus/u4b/audio/uaudio.c

3042

memcpy(p_mc_new, mc, sizeof(*p_mc_new));

sys/bus/u4b/audio/uaudio.c

3070

uaudio_mixer_add_ctl(struct uaudio_softc *sc, struct uaudio_mixer_node *mc)

sys/bus/u4b/audio/uaudio.c

3074

if (mc->class < UAC_NCLASSES) {

sys/bus/u4b/audio/uaudio.c

3076

uac_names[mc->class], mc->ctl);

sys/bus/u4b/audio/uaudio.c

3078

DPRINTF("adding %d\n", mc->ctl);

sys/bus/u4b/audio/uaudio.c

3081

if (mc->type == MIX_ON_OFF) {

sys/bus/u4b/audio/uaudio.c

3082

mc->minval = 0;

sys/bus/u4b/audio/uaudio.c

3083

mc->maxval = 1;

sys/bus/u4b/audio/uaudio.c

3084

} else if (mc->type == MIX_SELECTOR) {

sys/bus/u4b/audio/uaudio.c

3089

mc->minval = uaudio_mixer_get(sc->sc_udev,

sys/bus/u4b/audio/uaudio.c

3090

sc->sc_audio_rev, GET_MIN, mc);

sys/bus/u4b/audio/uaudio.c

3091

mc->maxval = uaudio_mixer_get(sc->sc_udev,

sys/bus/u4b/audio/uaudio.c

3092

sc->sc_audio_rev, GET_MAX, mc);

sys/bus/u4b/audio/uaudio.c

3096

if (mc->maxval < mc->minval) {

sys/bus/u4b/audio/uaudio.c

3097

res = mc->maxval;

sys/bus/u4b/audio/uaudio.c

3098

mc->maxval = mc->minval;

sys/bus/u4b/audio/uaudio.c

3099

mc->minval = res;

sys/bus/u4b/audio/uaudio.c

3103

mc->mul = mc->maxval - mc->minval;

sys/bus/u4b/audio/uaudio.c

3104

if (mc->mul == 0)

sys/bus/u4b/audio/uaudio.c

3105

mc->mul = 1;

sys/bus/u4b/audio/uaudio.c

3109

sc->sc_audio_rev, GET_RES, mc);

sys/bus/u4b/audio/uaudio.c

3114

uaudio_mixer_add_ctl_sub(sc, mc);

sys/bus/u4b/audio/uaudio.c

3120

for (i = 0; i < mc->nchan; i++) {

sys/bus/u4b/audio/uaudio.c

3121

DPRINTF("[mix] wValue=%04x\n", mc->wValue[0]);

sys/bus/u4b/audio/uaudio.c

3125

mc->wIndex, mc->type, mc->ctl,

sys/bus/u4b/audio/uaudio.c

3126

mc->minval, mc->maxval);

sys/bus/u4b/audio/uaudio.c

3141

uint32_t mc; /* matching channels */

sys/bus/u4b/audio/uaudio.c

3180

mc = 0;

sys/bus/u4b/audio/uaudio.c

3189

mc++;

sys/bus/u4b/audio/uaudio.c

3191

if ((mc == chs) && (chs <= MIX_MAX_CHAN)) {

sys/bus/u4b/audio/uaudio.c

3195

mc = 0;

sys/bus/u4b/audio/uaudio.c

3200

MIX(sc).wValue[mc++] = MAKE_WORD(p + c + 1, o + 1);

sys/bus/u4b/audio/uaudio.c

3220

uint32_t mc; /* matching channels */

sys/bus/u4b/audio/uaudio.c

3259

mc = 0;

sys/bus/u4b/audio/uaudio.c

3268

mc++;

sys/bus/u4b/audio/uaudio.c

3270

if ((mc == chs) && (chs <= MIX_MAX_CHAN)) {

sys/bus/u4b/audio/uaudio.c

3274

mc = 0;

sys/bus/u4b/audio/uaudio.c

3279

MIX(sc).wValue[mc++] = MAKE_WORD(p + c + 1, o + 1);

sys/bus/u4b/audio/uaudio.c

5061

uint8_t what, struct uaudio_mixer_node *mc)

sys/bus/u4b/audio/uaudio.c

5068

if (mc->wValue[0] == -1)

sys/bus/u4b/audio/uaudio.c

5082

uint16_t len = MIX_SIZE(mc->type);

sys/bus/u4b/audio/uaudio.c

5089

USETW(req.wValue, mc->wValue[0]);

sys/bus/u4b/audio/uaudio.c

5090

USETW(req.wIndex, mc->wIndex);

sys/bus/u4b/audio/uaudio.c

5125

val = uaudio_mixer_signext(mc->type, val);

sys/bus/u4b/audio/uaudio.c

5137

struct uaudio_mixer_node *mc = sc->sc_mixer_curr;

sys/bus/u4b/audio/uaudio.c

5153

if (mc == NULL) {

sys/bus/u4b/audio/uaudio.c

5154

mc = sc->sc_mixer_root;

sys/bus/u4b/audio/uaudio.c

5155

sc->sc_mixer_curr = mc;

sys/bus/u4b/audio/uaudio.c

5159

while (mc) {

sys/bus/u4b/audio/uaudio.c

5160

while (sc->sc_mixer_chan < mc->nchan) {

sys/bus/u4b/audio/uaudio.c

5166

update = isset(mc->update, chan) &&

sys/bus/u4b/audio/uaudio.c

5167

(mc->wValue[chan] != -1);

sys/bus/u4b/audio/uaudio.c

5169

clrbit(mc->update, chan);

sys/bus/u4b/audio/uaudio.c

5174

USETW(req.wValue, mc->wValue[chan]);

sys/bus/u4b/audio/uaudio.c

5175

USETW(req.wIndex, mc->wIndex);

sys/bus/u4b/audio/uaudio.c

5184

len = MIX_SIZE(mc->type);

sys/bus/u4b/audio/uaudio.c

5189

buf[0] = (mc->wData[chan] & 0xFF);

sys/bus/u4b/audio/uaudio.c

5190

buf[1] = (mc->wData[chan] >> 8) & 0xFF;

sys/bus/u4b/audio/uaudio.c

5205

mc = mc->next;

sys/bus/u4b/audio/uaudio.c

5206

sc->sc_mixer_curr = mc;

sys/bus/u4b/audio/uaudio.c

5282

uaudio_mixer_bsd2value(struct uaudio_mixer_node *mc, int32_t val)

sys/bus/u4b/audio/uaudio.c

5284

if (mc->type == MIX_ON_OFF) {

sys/bus/u4b/audio/uaudio.c

5286

} else if (mc->type == MIX_SELECTOR) {

sys/bus/u4b/audio/uaudio.c

5287

if ((val < mc->minval) ||

sys/bus/u4b/audio/uaudio.c

5288

(val > mc->maxval)) {

sys/bus/u4b/audio/uaudio.c

5289

val = mc->minval;

sys/bus/u4b/audio/uaudio.c

5294

val = (val * mc->mul) / 255;

sys/bus/u4b/audio/uaudio.c

5297

val = val + mc->minval;

sys/bus/u4b/audio/uaudio.c

5300

if (val > mc->maxval)

sys/bus/u4b/audio/uaudio.c

5301

val = mc->maxval;

sys/bus/u4b/audio/uaudio.c

5302

else if (val < mc->minval)

sys/bus/u4b/audio/uaudio.c

5303

val = mc->minval;

sys/bus/u4b/audio/uaudio.c

5307

mc->type, val, mc->minval, mc->maxval, val);

sys/bus/u4b/audio/uaudio.c

5312

uaudio_mixer_ctl_set(struct uaudio_softc *sc, struct uaudio_mixer_node *mc,

sys/bus/u4b/audio/uaudio.c

5315

val = uaudio_mixer_bsd2value(mc, val);

sys/bus/u4b/audio/uaudio.c

5317

mc->update[chan / 8] |= (1 << (chan % 8));

sys/bus/u4b/audio/uaudio.c

5318

mc->wData[chan] = val;

sys/bus/u4b/audio/uaudio.c

5328

struct uaudio_mixer_node *mc;

sys/bus/u4b/audio/uaudio.c

5331

for (mc = sc->sc_mixer_root; mc;

sys/bus/u4b/audio/uaudio.c

5332

mc = mc->next) {

sys/bus/u4b/audio/uaudio.c

5334

if (mc->ctl != SOUND_MIXER_NRDEVICES) {

sys/bus/u4b/audio/uaudio.c

5339

sc->sc_mix_info |= (1 << mc->ctl);

sys/bus/u4b/audio/uaudio.c

5341

if ((mc->ctl == SOUND_MIXER_NRDEVICES) &&

sys/bus/u4b/audio/uaudio.c

5342

(mc->type == MIX_SELECTOR)) {

sys/bus/u4b/audio/uaudio.c

5344

for (i = mc->minval; (i > 0) && (i <= mc->maxval); i++) {

sys/bus/u4b/audio/uaudio.c

5345

if (mc->slctrtype[i - 1] == SOUND_MIXER_NRDEVICES) {

sys/bus/u4b/audio/uaudio.c

5348

sc->sc_recsrc_info |= 1 << mc->slctrtype[i - 1];

sys/bus/u4b/audio/uaudio.c

5394

struct uaudio_mixer_node *mc;

sys/bus/u4b/audio/uaudio.c

5397

for (mc = sc->sc_mixer_root; mc != NULL; mc = mc->next) {

sys/bus/u4b/audio/uaudio.c

5399

if (mc->ctl == type) {

sys/bus/u4b/audio/uaudio.c

5400

for (chan = 0; chan < mc->nchan; chan++) {

sys/bus/u4b/audio/uaudio.c

5401

uaudio_mixer_ctl_set(sc, mc, chan,

sys/bus/u4b/audio/uaudio.c

5412

struct uaudio_mixer_node *mc;

sys/bus/u4b/audio/uaudio.c

5417

for (mc = sc->sc_mixer_root; mc;

sys/bus/u4b/audio/uaudio.c

5418

mc = mc->next) {

sys/bus/u4b/audio/uaudio.c

5420

if ((mc->ctl == SOUND_MIXER_NRDEVICES) &&

sys/bus/u4b/audio/uaudio.c

5421

(mc->type == MIX_SELECTOR)) {

sys/bus/u4b/audio/uaudio.c

5426

for (i = mc->minval; (i > 0) && (i <= mc->maxval); i++) {

sys/bus/u4b/audio/uaudio.c

5427

mask |= (1 << mc->slctrtype[i - 1]);

sys/bus/u4b/audio/uaudio.c

5441

for (i = mc->minval; (i > 0) && (i <= mc->maxval); i++) {

sys/bus/u4b/audio/uaudio.c

5442

if (temp != (1 << mc->slctrtype[i - 1])) {

sys/bus/u4b/audio/uaudio.c

5445

uaudio_mixer_ctl_set(sc, mc, 0, i);

sys/dev/disk/nvme/nvme_ident.h

260

uint8_t mc; /* meta-data capabilities */

sys/dev/drm/amd/amdgpu/amdgpu_gmc.c

115

void amdgpu_gmc_vram_location(struct amdgpu_device *adev, struct amdgpu_gmc *mc,

sys/dev/drm/amd/amdgpu/amdgpu_gmc.c

120

mc->vram_start = base;

sys/dev/drm/amd/amdgpu/amdgpu_gmc.c

121

mc->vram_end = mc->vram_start + mc->mc_vram_size - 1;

sys/dev/drm/amd/amdgpu/amdgpu_gmc.c

122

if (limit && limit < mc->real_vram_size)

sys/dev/drm/amd/amdgpu/amdgpu_gmc.c

123

mc->real_vram_size = limit;

sys/dev/drm/amd/amdgpu/amdgpu_gmc.c

125

if (mc->xgmi.num_physical_nodes == 0) {

sys/dev/drm/amd/amdgpu/amdgpu_gmc.c

126

mc->fb_start = mc->vram_start;

sys/dev/drm/amd/amdgpu/amdgpu_gmc.c

127

mc->fb_end = mc->vram_end;

sys/dev/drm/amd/amdgpu/amdgpu_gmc.c

130

mc->mc_vram_size >> 20, mc->vram_start,

sys/dev/drm/amd/amdgpu/amdgpu_gmc.c

131

mc->vram_end, mc->real_vram_size >> 20);

sys/dev/drm/amd/amdgpu/amdgpu_gmc.c

145

void amdgpu_gmc_gart_location(struct amdgpu_device *adev, struct amdgpu_gmc *mc)

sys/dev/drm/amd/amdgpu/amdgpu_gmc.c

152

mc->gart_size += adev->pm.smu_prv_buffer_size;

sys/dev/drm/amd/amdgpu/amdgpu_gmc.c

157

size_bf = mc->fb_start;

sys/dev/drm/amd/amdgpu/amdgpu_gmc.c

158

size_af = max_mc_address + 1 - ALIGN(mc->fb_end + 1, four_gb);

sys/dev/drm/amd/amdgpu/amdgpu_gmc.c

160

if (mc->gart_size > max(size_bf, size_af)) {

sys/dev/drm/amd/amdgpu/amdgpu_gmc.c

162

mc->gart_size = max(size_bf, size_af);

sys/dev/drm/amd/amdgpu/amdgpu_gmc.c

165

if ((size_bf >= mc->gart_size && size_bf < size_af) ||

sys/dev/drm/amd/amdgpu/amdgpu_gmc.c

166

(size_af < mc->gart_size))

sys/dev/drm/amd/amdgpu/amdgpu_gmc.c

167

mc->gart_start = 0;

sys/dev/drm/amd/amdgpu/amdgpu_gmc.c

169

mc->gart_start = max_mc_address - mc->gart_size + 1;

sys/dev/drm/amd/amdgpu/amdgpu_gmc.c

171

mc->gart_start &= ~(four_gb - 1);

sys/dev/drm/amd/amdgpu/amdgpu_gmc.c

172

mc->gart_end = mc->gart_start + mc->gart_size - 1;

sys/dev/drm/amd/amdgpu/amdgpu_gmc.c

174

mc->gart_size >> 20, mc->gart_start, mc->gart_end);

sys/dev/drm/amd/amdgpu/amdgpu_gmc.c

188

void amdgpu_gmc_agp_location(struct amdgpu_device *adev, struct amdgpu_gmc *mc)

sys/dev/drm/amd/amdgpu/amdgpu_gmc.c

194

if (mc->fb_start > mc->gart_start) {

sys/dev/drm/amd/amdgpu/amdgpu_gmc.c

195

size_bf = (mc->fb_start & sixteen_gb_mask) -

sys/dev/drm/amd/amdgpu/amdgpu_gmc.c

196

ALIGN(mc->gart_end + 1, sixteen_gb);

sys/dev/drm/amd/amdgpu/amdgpu_gmc.c

197

size_af = mc->mc_mask + 1 - ALIGN(mc->fb_end + 1, sixteen_gb);

sys/dev/drm/amd/amdgpu/amdgpu_gmc.c

199

size_bf = mc->fb_start & sixteen_gb_mask;

sys/dev/drm/amd/amdgpu/amdgpu_gmc.c

200

size_af = (mc->gart_start & sixteen_gb_mask) -

sys/dev/drm/amd/amdgpu/amdgpu_gmc.c

201

ALIGN(mc->fb_end + 1, sixteen_gb);

sys/dev/drm/amd/amdgpu/amdgpu_gmc.c

205

mc->agp_start = (mc->fb_start - size_bf) & sixteen_gb_mask;

sys/dev/drm/amd/amdgpu/amdgpu_gmc.c

206

mc->agp_size = size_bf;

sys/dev/drm/amd/amdgpu/amdgpu_gmc.c

208

mc->agp_start = ALIGN(mc->fb_end + 1, sixteen_gb);

sys/dev/drm/amd/amdgpu/amdgpu_gmc.c

209

mc->agp_size = size_af;

sys/dev/drm/amd/amdgpu/amdgpu_gmc.c

212

mc->agp_end = mc->agp_start + mc->agp_size - 1;

sys/dev/drm/amd/amdgpu/amdgpu_gmc.c

214

mc->agp_size >> 20, mc->agp_start, mc->agp_end);

sys/dev/drm/amd/amdgpu/amdgpu_gmc.h

193

void amdgpu_gmc_vram_location(struct amdgpu_device *adev, struct amdgpu_gmc *mc,

sys/dev/drm/amd/amdgpu/amdgpu_gmc.h

196

struct amdgpu_gmc *mc);

sys/dev/drm/amd/amdgpu/amdgpu_gmc.h

198

struct amdgpu_gmc *mc);

sys/dev/drm/amd/amdgpu/amdgpu_ucode.h

170

struct mc_firmware_header_v1_0 mc;

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

240

struct amdgpu_gmc *mc)

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

246

amdgpu_gmc_gart_location(adev, mc);

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

428

struct amdgpu_gmc *mc)

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

437

amdgpu_gmc_gart_location(adev, mc);

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

770

struct amdgpu_gmc *mc)

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

778

amdgpu_gmc_gart_location(adev, mc);

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

780

amdgpu_gmc_agp_location(adev, mc);

sys/dev/drm/radeon/cik.c

3895

radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size);

sys/dev/drm/radeon/cik.c

4134

radeon_ttm_set_active_vram_size(rdev, rdev->mc.real_vram_size);

sys/dev/drm/radeon/cik.c

5321

rdev->mc.vram_start >> 12);

sys/dev/drm/radeon/cik.c

5323

rdev->mc.vram_end >> 12);

sys/dev/drm/radeon/cik.c

5326

tmp = ((rdev->mc.vram_end >> 24) & 0xFFFF) << 16;

sys/dev/drm/radeon/cik.c

5327

tmp |= ((rdev->mc.vram_start >> 24) & 0xFFFF);

sys/dev/drm/radeon/cik.c

5330

WREG32(HDP_NONSURFACE_BASE, (rdev->mc.vram_start >> 8));

sys/dev/drm/radeon/cik.c

5360

rdev->mc.vram_is_ddr = true;

sys/dev/drm/radeon/cik.c

5398

rdev->mc.vram_width = numchan * chansize;

sys/dev/drm/radeon/cik.c

5400

rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0);

sys/dev/drm/radeon/cik.c

5401

rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0);

sys/dev/drm/radeon/cik.c

5403

rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE) * 1024ULL * 1024ULL;

sys/dev/drm/radeon/cik.c

5404

rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE) * 1024ULL * 1024ULL;

sys/dev/drm/radeon/cik.c

5405

rdev->mc.visible_vram_size = rdev->mc.aper_size;

sys/dev/drm/radeon/cik.c

5406

si_vram_gtt_location(rdev, &rdev->mc);

sys/dev/drm/radeon/cik.c

5476

WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12);

sys/dev/drm/radeon/cik.c

5477

WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, rdev->mc.gtt_end >> 12);

sys/dev/drm/radeon/cik.c

5549

(unsigned)(rdev->mc.gtt_size >> 20),

sys/dev/drm/radeon/cik_sdma.c

255

radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size);

sys/dev/drm/radeon/cik_sdma.c

433

radeon_ttm_set_active_vram_size(rdev, rdev->mc.real_vram_size);

sys/dev/drm/radeon/evergreen.c

2420

WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12);

sys/dev/drm/radeon/evergreen.c

2421

WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, rdev->mc.gtt_end >> 12);

sys/dev/drm/radeon/evergreen.c

2431

(unsigned)(rdev->mc.gtt_size >> 20),

sys/dev/drm/radeon/evergreen.c

2752

upper_32_bits(rdev->mc.vram_start));

sys/dev/drm/radeon/evergreen.c

2754

upper_32_bits(rdev->mc.vram_start));

sys/dev/drm/radeon/evergreen.c

2756

(u32)rdev->mc.vram_start);

sys/dev/drm/radeon/evergreen.c

2758

(u32)rdev->mc.vram_start);

sys/dev/drm/radeon/evergreen.c

2762

WREG32(EVERGREEN_VGA_MEMORY_BASE_ADDRESS_HIGH, upper_32_bits(rdev->mc.vram_start));

sys/dev/drm/radeon/evergreen.c

2763

WREG32(EVERGREEN_VGA_MEMORY_BASE_ADDRESS, (u32)rdev->mc.vram_start);

sys/dev/drm/radeon/evergreen.c

2856

if (rdev->mc.vram_start < rdev->mc.gtt_start) {

sys/dev/drm/radeon/evergreen.c

2859

rdev->mc.vram_start >> 12);

sys/dev/drm/radeon/evergreen.c

2861

rdev->mc.gtt_end >> 12);

sys/dev/drm/radeon/evergreen.c

2865

rdev->mc.gtt_start >> 12);

sys/dev/drm/radeon/evergreen.c

2867

rdev->mc.vram_end >> 12);

sys/dev/drm/radeon/evergreen.c

2871

rdev->mc.vram_start >> 12);

sys/dev/drm/radeon/evergreen.c

2873

rdev->mc.vram_end >> 12);

sys/dev/drm/radeon/evergreen.c

2881

tmp |= ((rdev->mc.vram_end >> 20) & 0xF) << 24;

sys/dev/drm/radeon/evergreen.c

2882

tmp |= ((rdev->mc.vram_start >> 20) & 0xF) << 20;

sys/dev/drm/radeon/evergreen.c

2885

tmp = ((rdev->mc.vram_end >> 24) & 0xFFFF) << 16;

sys/dev/drm/radeon/evergreen.c

2886

tmp |= ((rdev->mc.vram_start >> 24) & 0xFFFF);

sys/dev/drm/radeon/evergreen.c

2888

WREG32(HDP_NONSURFACE_BASE, (rdev->mc.vram_start >> 8));

sys/dev/drm/radeon/evergreen.c

2892

WREG32(MC_VM_AGP_TOP, rdev->mc.gtt_end >> 16);

sys/dev/drm/radeon/evergreen.c

2893

WREG32(MC_VM_AGP_BOT, rdev->mc.gtt_start >> 16);

sys/dev/drm/radeon/evergreen.c

2894

WREG32(MC_VM_AGP_BASE, rdev->mc.agp_base >> 22);

sys/dev/drm/radeon/evergreen.c

3698

rdev->mc.vram_is_ddr = true;

sys/dev/drm/radeon/evergreen.c

3728

rdev->mc.vram_width = numchan * chansize;

sys/dev/drm/radeon/evergreen.c

3730

rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0);

sys/dev/drm/radeon/evergreen.c

3731

rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0);

sys/dev/drm/radeon/evergreen.c

3737

rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE);

sys/dev/drm/radeon/evergreen.c

3738

rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE);

sys/dev/drm/radeon/evergreen.c

3741

rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE) * 1024ULL * 1024ULL;

sys/dev/drm/radeon/evergreen.c

3742

rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE) * 1024ULL * 1024ULL;

sys/dev/drm/radeon/evergreen.c

3744

rdev->mc.visible_vram_size = rdev->mc.aper_size;

sys/dev/drm/radeon/evergreen.c

3745

r700_vram_gtt_location(rdev, &rdev->mc);

sys/dev/drm/radeon/ni.c

1315

WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12);

sys/dev/drm/radeon/ni.c

1316

WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, rdev->mc.gtt_end >> 12);

sys/dev/drm/radeon/ni.c

1362

(unsigned)(rdev->mc.gtt_size >> 20),

sys/dev/drm/radeon/ni.c

1477

radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size);

sys/dev/drm/radeon/ni.c

1751

radeon_ttm_set_active_vram_size(rdev, rdev->mc.real_vram_size);

sys/dev/drm/radeon/ni_dma.c

161

radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size);

sys/dev/drm/radeon/ni_dma.c

257

radeon_ttm_set_active_vram_size(rdev, rdev->mc.real_vram_size);

sys/dev/drm/radeon/r100.c

1228

radeon_ttm_set_active_vram_size(rdev, rdev->mc.real_vram_size);

sys/dev/drm/radeon/r100.c

1256

radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size);

sys/dev/drm/radeon/r100.c

2713

rdev->mc.vram_is_ddr = false;

sys/dev/drm/radeon/r100.c

2715

rdev->mc.vram_is_ddr = true;

sys/dev/drm/radeon/r100.c

2717

rdev->mc.vram_is_ddr = true;

sys/dev/drm/radeon/r100.c

2723

rdev->mc.vram_width = 32;

sys/dev/drm/radeon/r100.c

2725

rdev->mc.vram_width = 64;

sys/dev/drm/radeon/r100.c

2728

rdev->mc.vram_width /= 4;

sys/dev/drm/radeon/r100.c

2729

rdev->mc.vram_is_ddr = true;

sys/dev/drm/radeon/r100.c

2734

rdev->mc.vram_width = 128;

sys/dev/drm/radeon/r100.c

2736

rdev->mc.vram_width = 64;

sys/dev/drm/radeon/r100.c

2740

rdev->mc.vram_width = 128;

sys/dev/drm/radeon/r100.c

2787

rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0);

sys/dev/drm/radeon/r100.c

2788

rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0);

sys/dev/drm/radeon/r100.c

2789

rdev->mc.visible_vram_size = r100_get_accessible_vram(rdev);

sys/dev/drm/radeon/r100.c

2791

if (rdev->mc.visible_vram_size > rdev->mc.aper_size)

sys/dev/drm/radeon/r100.c

2792

rdev->mc.visible_vram_size = rdev->mc.aper_size;

sys/dev/drm/radeon/r100.c

2798

rdev->mc.real_vram_size = (((tom >> 16) - (tom & 0xffff) + 1) << 16);

sys/dev/drm/radeon/r100.c

2799

WREG32(RADEON_CONFIG_MEMSIZE, rdev->mc.real_vram_size);

sys/dev/drm/radeon/r100.c

2800

rdev->mc.mc_vram_size = rdev->mc.real_vram_size;

sys/dev/drm/radeon/r100.c

2802

rdev->mc.real_vram_size = RREG32(RADEON_CONFIG_MEMSIZE);

sys/dev/drm/radeon/r100.c

2806

if (rdev->mc.real_vram_size == 0) {

sys/dev/drm/radeon/r100.c

2807

rdev->mc.real_vram_size = 8192 * 1024;

sys/dev/drm/radeon/r100.c

2808

WREG32(RADEON_CONFIG_MEMSIZE, rdev->mc.real_vram_size);

sys/dev/drm/radeon/r100.c

2813

if (rdev->mc.aper_size > config_aper_size)

sys/dev/drm/radeon/r100.c

2814

config_aper_size = rdev->mc.aper_size;

sys/dev/drm/radeon/r100.c

2816

if (config_aper_size > rdev->mc.real_vram_size)

sys/dev/drm/radeon/r100.c

2817

rdev->mc.mc_vram_size = config_aper_size;

sys/dev/drm/radeon/r100.c

2819

rdev->mc.mc_vram_size = rdev->mc.real_vram_size;

sys/dev/drm/radeon/r100.c

2843

base = rdev->mc.aper_base;

sys/dev/drm/radeon/r100.c

2846

radeon_vram_location(rdev, &rdev->mc, base);

sys/dev/drm/radeon/r100.c

2847

rdev->mc.gtt_base_align = 0;

sys/dev/drm/radeon/r100.c

2849

radeon_gtt_location(rdev, &rdev->mc);

sys/dev/drm/radeon/r100.c

3274

temp = (rdev->mc.vram_width / 8) * (rdev->mc.vram_is_ddr ? 2 : 1);

sys/dev/drm/radeon/r100.c

3406

if (rdev->mc.vram_is_ddr)

sys/dev/drm/radeon/r100.c

3411

if (rdev->mc.vram_width == 128)

sys/dev/drm/radeon/r100.c

3420

if (rdev->mc.vram_is_ddr) {

sys/dev/drm/radeon/r100.c

3421

if (rdev->mc.vram_width == 32) {

sys/dev/drm/radeon/r100.c

3448

temp_ff.full = dfixed_const((2 * (cur_size - (rdev->mc.vram_is_ddr + 1))));

sys/dev/drm/radeon/r100.c

3589

temp = (rdev->mc.vram_width * rdev->mc.vram_is_ddr + 1)/128;

sys/dev/drm/radeon/r100.c

3826

WREG32(R_00023C_DISPLAY_BASE_ADDR, rdev->mc.vram_start);

sys/dev/drm/radeon/r100.c

3828

WREG32(R_00033C_CRTC2_DISPLAY_BASE_ADDR, rdev->mc.vram_start);

sys/dev/drm/radeon/r100.c

3864

S_00014C_MC_AGP_START(rdev->mc.gtt_start >> 16) |

sys/dev/drm/radeon/r100.c

3865

S_00014C_MC_AGP_TOP(rdev->mc.gtt_end >> 16));

sys/dev/drm/radeon/r100.c

3866

WREG32(R_000170_AGP_BASE, lower_32_bits(rdev->mc.agp_base));

sys/dev/drm/radeon/r100.c

3869

upper_32_bits(rdev->mc.agp_base) & 0xff);

sys/dev/drm/radeon/r100.c

3881

S_000148_MC_FB_START(rdev->mc.vram_start >> 16) |

sys/dev/drm/radeon/r100.c

3882

S_000148_MC_FB_TOP(rdev->mc.vram_end >> 16));

sys/dev/drm/radeon/r100.c

662

WREG32(RADEON_AIC_LO_ADDR, rdev->mc.gtt_start);

sys/dev/drm/radeon/r100.c

663

WREG32(RADEON_AIC_HI_ADDR, rdev->mc.gtt_end);

sys/dev/drm/radeon/r100.c

670

(unsigned)(rdev->mc.gtt_size >> 20),

sys/dev/drm/radeon/r300.c

1334

S_00014C_MC_AGP_START(rdev->mc.gtt_start >> 16) |

sys/dev/drm/radeon/r300.c

1335

S_00014C_MC_AGP_TOP(rdev->mc.gtt_end >> 16));

sys/dev/drm/radeon/r300.c

1336

WREG32(R_000170_AGP_BASE, lower_32_bits(rdev->mc.agp_base));

sys/dev/drm/radeon/r300.c

1338

upper_32_bits(rdev->mc.agp_base) & 0xff);

sys/dev/drm/radeon/r300.c

1349

S_000148_MC_FB_START(rdev->mc.vram_start >> 16) |

sys/dev/drm/radeon/r300.c

1350

S_000148_MC_FB_TOP(rdev->mc.vram_end >> 16));

sys/dev/drm/radeon/r300.c

159

WREG32_PCIE(RADEON_PCIE_TX_GART_START_LO, rdev->mc.gtt_start);

sys/dev/drm/radeon/r300.c

160

tmp = rdev->mc.gtt_end & ~RADEON_GPU_PAGE_MASK;

sys/dev/drm/radeon/r300.c

167

WREG32_PCIE(RADEON_PCIE_TX_DISCARD_RD_ADDR_LO, rdev->mc.vram_start);

sys/dev/drm/radeon/r300.c

177

(unsigned)(rdev->mc.gtt_size >> 20),

sys/dev/drm/radeon/r300.c

472

rdev->mc.vram_is_ddr = true;

sys/dev/drm/radeon/r300.c

476

case 0: rdev->mc.vram_width = 64; break;

sys/dev/drm/radeon/r300.c

477

case 1: rdev->mc.vram_width = 128; break;

sys/dev/drm/radeon/r300.c

478

case 2: rdev->mc.vram_width = 256; break;

sys/dev/drm/radeon/r300.c

479

default: rdev->mc.vram_width = 128; break;

sys/dev/drm/radeon/r300.c

482

base = rdev->mc.aper_base;

sys/dev/drm/radeon/r300.c

485

radeon_vram_location(rdev, &rdev->mc, base);

sys/dev/drm/radeon/r300.c

486

rdev->mc.gtt_base_align = 0;

sys/dev/drm/radeon/r300.c

488

radeon_gtt_location(rdev, &rdev->mc);

sys/dev/drm/radeon/r520.c

102

rdev->mc.vram_width = 32;

sys/dev/drm/radeon/r520.c

105

rdev->mc.vram_width = 64;

sys/dev/drm/radeon/r520.c

108

rdev->mc.vram_width = 128;

sys/dev/drm/radeon/r520.c

111

rdev->mc.vram_width = 256;

sys/dev/drm/radeon/r520.c

114

rdev->mc.vram_width = 128;

sys/dev/drm/radeon/r520.c

118

rdev->mc.vram_width *= 2;

sys/dev/drm/radeon/r520.c

126

radeon_vram_location(rdev, &rdev->mc, 0);

sys/dev/drm/radeon/r520.c

127

rdev->mc.gtt_base_align = 0;

sys/dev/drm/radeon/r520.c

129

radeon_gtt_location(rdev, &rdev->mc);

sys/dev/drm/radeon/r520.c

144

WREG32(R_0000F8_CONFIG_MEMSIZE, rdev->mc.real_vram_size);

sys/dev/drm/radeon/r520.c

147

S_000004_MC_FB_START(rdev->mc.vram_start >> 16) |

sys/dev/drm/radeon/r520.c

148

S_000004_MC_FB_TOP(rdev->mc.vram_end >> 16));

sys/dev/drm/radeon/r520.c

150

S_000134_HDP_FB_START(rdev->mc.vram_start >> 16));

sys/dev/drm/radeon/r520.c

153

S_000005_MC_AGP_START(rdev->mc.gtt_start >> 16) |

sys/dev/drm/radeon/r520.c

154

S_000005_MC_AGP_TOP(rdev->mc.gtt_end >> 16));

sys/dev/drm/radeon/r520.c

155

WREG32_MC(R_000006_AGP_BASE, lower_32_bits(rdev->mc.agp_base));

sys/dev/drm/radeon/r520.c

157

S_000007_AGP_BASE_ADDR_2(upper_32_bits(rdev->mc.agp_base)));

sys/dev/drm/radeon/r520.c

97

rdev->mc.vram_width = 128;

sys/dev/drm/radeon/r520.c

98

rdev->mc.vram_is_ddr = true;

sys/dev/drm/radeon/r600.c

1085

WREG32(VM_CONTEXT0_INVALIDATION_LOW_ADDR, rdev->mc.gtt_start >> 12);

sys/dev/drm/radeon/r600.c

1086

WREG32(VM_CONTEXT0_INVALIDATION_HIGH_ADDR, (rdev->mc.gtt_end - 1) >> 12);

sys/dev/drm/radeon/r600.c

1159

WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12);

sys/dev/drm/radeon/r600.c

1160

WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, rdev->mc.gtt_end >> 12);

sys/dev/drm/radeon/r600.c

1171

(unsigned)(rdev->mc.gtt_size >> 20),

sys/dev/drm/radeon/r600.c

1317

if (rdev->mc.vram_start < rdev->mc.gtt_start) {

sys/dev/drm/radeon/r600.c

1320

rdev->mc.vram_start >> 12);

sys/dev/drm/radeon/r600.c

1322

rdev->mc.gtt_end >> 12);

sys/dev/drm/radeon/r600.c

1326

rdev->mc.gtt_start >> 12);

sys/dev/drm/radeon/r600.c

1328

rdev->mc.vram_end >> 12);

sys/dev/drm/radeon/r600.c

1331

WREG32(MC_VM_SYSTEM_APERTURE_LOW_ADDR, rdev->mc.vram_start >> 12);

sys/dev/drm/radeon/r600.c

1332

WREG32(MC_VM_SYSTEM_APERTURE_HIGH_ADDR, rdev->mc.vram_end >> 12);

sys/dev/drm/radeon/r600.c

1335

tmp = ((rdev->mc.vram_end >> 24) & 0xFFFF) << 16;

sys/dev/drm/radeon/r600.c

1336

tmp |= ((rdev->mc.vram_start >> 24) & 0xFFFF);

sys/dev/drm/radeon/r600.c

1338

WREG32(HDP_NONSURFACE_BASE, (rdev->mc.vram_start >> 8));

sys/dev/drm/radeon/r600.c

1342

WREG32(MC_VM_AGP_TOP, rdev->mc.gtt_end >> 22);

sys/dev/drm/radeon/r600.c

1343

WREG32(MC_VM_AGP_BOT, rdev->mc.gtt_start >> 22);

sys/dev/drm/radeon/r600.c

1344

WREG32(MC_VM_AGP_BASE, rdev->mc.agp_base >> 22);

sys/dev/drm/radeon/r600.c

1380

static void r600_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc)

sys/dev/drm/radeon/r600.c

1384

if (mc->mc_vram_size > 0xE0000000) {

sys/dev/drm/radeon/r600.c

1387

mc->real_vram_size = 0xE0000000;

sys/dev/drm/radeon/r600.c

1388

mc->mc_vram_size = 0xE0000000;

sys/dev/drm/radeon/r600.c

1391

size_bf = mc->gtt_start;

sys/dev/drm/radeon/r600.c

1392

size_af = mc->mc_mask - mc->gtt_end;

sys/dev/drm/radeon/r600.c

1394

if (mc->mc_vram_size > size_bf) {

sys/dev/drm/radeon/r600.c

1396

mc->real_vram_size = size_bf;

sys/dev/drm/radeon/r600.c

1397

mc->mc_vram_size = size_bf;

sys/dev/drm/radeon/r600.c

1399

mc->vram_start = mc->gtt_start - mc->mc_vram_size;

sys/dev/drm/radeon/r600.c

1401

if (mc->mc_vram_size > size_af) {

sys/dev/drm/radeon/r600.c

1403

mc->real_vram_size = size_af;

sys/dev/drm/radeon/r600.c

1404

mc->mc_vram_size = size_af;

sys/dev/drm/radeon/r600.c

1406

mc->vram_start = mc->gtt_end + 1;

sys/dev/drm/radeon/r600.c

1408

mc->vram_end = mc->vram_start + mc->mc_vram_size - 1;

sys/dev/drm/radeon/r600.c

1410

mc->mc_vram_size >> 20, mc->vram_start,

sys/dev/drm/radeon/r600.c

1411

mc->vram_end, mc->real_vram_size >> 20);

sys/dev/drm/radeon/r600.c

1418

radeon_vram_location(rdev, &rdev->mc, base);

sys/dev/drm/radeon/r600.c

1419

rdev->mc.gtt_base_align = 0;

sys/dev/drm/radeon/r600.c

1420

radeon_gtt_location(rdev, mc);

sys/dev/drm/radeon/r600.c

1432

rdev->mc.vram_is_ddr = true;

sys/dev/drm/radeon/r600.c

1457

rdev->mc.vram_width = numchan * chansize;

sys/dev/drm/radeon/r600.c

1459

rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0);

sys/dev/drm/radeon/r600.c

1460

rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0);

sys/dev/drm/radeon/r600.c

1462

rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE);

sys/dev/drm/radeon/r600.c

1463

rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE);

sys/dev/drm/radeon/r600.c

1464

rdev->mc.visible_vram_size = rdev->mc.aper_size;

sys/dev/drm/radeon/r600.c

1465

r600_vram_gtt_location(rdev, &rdev->mc);

sys/dev/drm/radeon/r600.c

1469

rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev);

sys/dev/drm/radeon/r600.c

1478

if (k8_addr + rdev->mc.visible_vram_size < 0x100000000ULL)

sys/dev/drm/radeon/r600.c

1484

if (rdev->mc.igp_sideport_enabled == false && radeon_fastfb == 1) {

sys/dev/drm/radeon/r600.c

1486

(unsigned long long)rdev->mc.aper_base, k8_addr);

sys/dev/drm/radeon/r600.c

1487

rdev->mc.aper_base = (resource_size_t)k8_addr;

sys/dev/drm/radeon/r600.c

2417

radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size);

sys/dev/drm/radeon/r600.c

2784

radeon_ttm_set_active_vram_size(rdev, rdev->mc.real_vram_size);

sys/dev/drm/radeon/r600_dma.c

102

radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size);

sys/dev/drm/radeon/r600_dma.c

179

radeon_ttm_set_active_vram_size(rdev, rdev->mc.real_vram_size);

sys/dev/drm/radeon/radeon.h

2377

struct radeon_mc mc;

sys/dev/drm/radeon/radeon.h

2838

extern void radeon_vram_location(struct radeon_device *rdev, struct radeon_mc *mc, u64 base);

sys/dev/drm/radeon/radeon.h

2839

extern void radeon_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc);

sys/dev/drm/radeon/radeon_agp.c

244

rdev->mc.agp_base = rdev->ddev->agp->agp_info.ai_aperture_base;

sys/dev/drm/radeon/radeon_agp.c

245

rdev->mc.gtt_size = rdev->ddev->agp->agp_info.ai_aperture_size << 20;

sys/dev/drm/radeon/radeon_agp.c

246

rdev->mc.gtt_start = rdev->mc.agp_base;

sys/dev/drm/radeon/radeon_agp.c

247

rdev->mc.gtt_end = rdev->mc.gtt_start + rdev->mc.gtt_size - 1;

sys/dev/drm/radeon/radeon_agp.c

249

rdev->mc.gtt_size >> 20, rdev->mc.gtt_start, rdev->mc.gtt_end);

sys/dev/drm/radeon/radeon_asic.c

177

rdev->mc.gtt_size = radeon_gart_size * 1024 * 1024;

sys/dev/drm/radeon/radeon_asic.h

472

void r700_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc);

sys/dev/drm/radeon/radeon_asic.h

792

struct radeon_mc *mc);

sys/dev/drm/radeon/radeon_clocks.c

617

if (rdev->mc.vram_width == 64) {

sys/dev/drm/radeon/radeon_device.c

1137

rdev->mc.gtt_size = (uint64_t)radeon_gart_size << 20;

sys/dev/drm/radeon/radeon_device.c

1301

rdev->mc.gtt_size = 512 * 1024 * 1024;

sys/dev/drm/radeon/radeon_device.c

1360

rdev->mc.mc_mask = 0xffffffffffULL; /* 40 bit MC */

sys/dev/drm/radeon/radeon_device.c

1362

rdev->mc.mc_mask = 0xfffffffffULL; /* 36 bit MC */

sys/dev/drm/radeon/radeon_device.c

1364

rdev->mc.mc_mask = 0xffffffffULL; /* 32 bit MC */

sys/dev/drm/radeon/radeon_device.c

1491

__func__, (uintmax_t)rdev->mc.aper_base,

sys/dev/drm/radeon/radeon_device.c

1492

(uintmax_t)rdev->mc.aper_base + rdev->mc.visible_vram_size);

sys/dev/drm/radeon/radeon_device.c

1494

rdev->mc.aper_base,

sys/dev/drm/radeon/radeon_device.c

1495

rdev->mc.aper_base + rdev->mc.visible_vram_size,

sys/dev/drm/radeon/radeon_device.c

1499

"0x%lx-0x%llx (%d).\n", (uintmax_t)rdev->mc.aper_base,

sys/dev/drm/radeon/radeon_device.c

1500

(uintmax_t)rdev->mc.aper_base + rdev->mc.visible_vram_size, r);

sys/dev/drm/radeon/radeon_device.c

1567

rdev->mc.aper_base,

sys/dev/drm/radeon/radeon_device.c

1568

rdev->mc.aper_base + rdev->mc.visible_vram_size);

sys/dev/drm/radeon/radeon_device.c

561

void radeon_vram_location(struct radeon_device *rdev, struct radeon_mc *mc, u64 base)

sys/dev/drm/radeon/radeon_device.c

565

mc->vram_start = base;

sys/dev/drm/radeon/radeon_device.c

566

if (mc->mc_vram_size > (rdev->mc.mc_mask - base + 1)) {

sys/dev/drm/radeon/radeon_device.c

568

mc->real_vram_size = mc->aper_size;

sys/dev/drm/radeon/radeon_device.c

569

mc->mc_vram_size = mc->aper_size;

sys/dev/drm/radeon/radeon_device.c

571

mc->vram_end = mc->vram_start + mc->mc_vram_size - 1;

sys/dev/drm/radeon/radeon_device.c

572

if (rdev->flags & RADEON_IS_AGP && mc->vram_end > mc->gtt_start && mc->vram_start <= mc->gtt_end) {

sys/dev/drm/radeon/radeon_device.c

574

mc->real_vram_size = mc->aper_size;

sys/dev/drm/radeon/radeon_device.c

575

mc->mc_vram_size = mc->aper_size;

sys/dev/drm/radeon/radeon_device.c

577

mc->vram_end = mc->vram_start + mc->mc_vram_size - 1;

sys/dev/drm/radeon/radeon_device.c

578

if (limit && limit < mc->real_vram_size)

sys/dev/drm/radeon/radeon_device.c

579

mc->real_vram_size = limit;

sys/dev/drm/radeon/radeon_device.c

581

mc->mc_vram_size >> 20, mc->vram_start,

sys/dev/drm/radeon/radeon_device.c

582

mc->vram_end, mc->real_vram_size >> 20);

sys/dev/drm/radeon/radeon_device.c

597

void radeon_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc)

sys/dev/drm/radeon/radeon_device.c

601

size_af = ((rdev->mc.mc_mask - mc->vram_end) + mc->gtt_base_align) & ~mc->gtt_base_align;

sys/dev/drm/radeon/radeon_device.c

602

size_bf = mc->vram_start & ~mc->gtt_base_align;

sys/dev/drm/radeon/radeon_device.c

604

if (mc->gtt_size > size_bf) {

sys/dev/drm/radeon/radeon_device.c

606

mc->gtt_size = size_bf;

sys/dev/drm/radeon/radeon_device.c

608

mc->gtt_start = (mc->vram_start & ~mc->gtt_base_align) - mc->gtt_size;

sys/dev/drm/radeon/radeon_device.c

610

if (mc->gtt_size > size_af) {

sys/dev/drm/radeon/radeon_device.c

612

mc->gtt_size = size_af;

sys/dev/drm/radeon/radeon_device.c

614

mc->gtt_start = (mc->vram_end + 1 + mc->gtt_base_align) & ~mc->gtt_base_align;

sys/dev/drm/radeon/radeon_device.c

616

mc->gtt_end = mc->gtt_start + mc->gtt_size - 1;

sys/dev/drm/radeon/radeon_device.c

618

mc->gtt_size >> 20, mc->gtt_start, mc->gtt_end);

sys/dev/drm/radeon/radeon_display.c

1601

rdev->ddev->mode_config.fb_base = rdev->mc.aper_base;

sys/dev/drm/radeon/radeon_fb.c

284

unsigned long tmp = radeon_bo_gpu_offset(rbo) - rdev->mc.vram_start;

sys/dev/drm/radeon/radeon_fb.c

286

info->paddr = rdev->mc.aper_base + tmp;

sys/dev/drm/radeon/radeon_fb.c

294

tmp = radeon_bo_gpu_offset(rbo) - rdev->mc.vram_start;

sys/dev/drm/radeon/radeon_fb.c

295

info->fix.smem_start = rdev->mc.aper_base + tmp;

sys/dev/drm/radeon/radeon_fb.c

304

info->apertures->ranges[0].size = rdev->mc.aper_size;

sys/dev/drm/radeon/radeon_fb.c

315

DRM_INFO("vram apper at 0x%lX\n", (unsigned long)rdev->mc.aper_base);

sys/dev/drm/radeon/radeon_fb.c

368

if (rdev->mc.real_vram_size <= (8*1024*1024))

sys/dev/drm/radeon/radeon_fb.c

371

rdev->mc.real_vram_size <= (32*1024*1024))

sys/dev/drm/radeon/radeon_gart.c

345

rdev->gart.num_cpu_pages = rdev->mc.gtt_size / PAGE_SIZE;

sys/dev/drm/radeon/radeon_gart.c

346

rdev->gart.num_gpu_pages = rdev->mc.gtt_size / RADEON_GPU_PAGE_SIZE;

sys/dev/drm/radeon/radeon_gem.c

231

args->vram_visible = rdev->mc.visible_vram_size;

sys/dev/drm/radeon/radeon_gem.c

233

args->gart_size = rdev->mc.gtt_size;

sys/dev/drm/radeon/radeon_gem.c

65

max_size = rdev->mc.gtt_size - rdev->gart_pin_size;

sys/dev/drm/radeon/radeon_legacy_crtc.c

468

radeon_crtc->legacy_display_base_addr = rdev->mc.vram_start;

sys/dev/drm/radeon/radeon_object.c

106

rbo->rdev->mc.visible_vram_size < rbo->rdev->mc.real_vram_size) {

sys/dev/drm/radeon/radeon_object.c

108

rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT;

sys/dev/drm/radeon/radeon_object.c

171

rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT;

sys/dev/drm/radeon/radeon_object.c

342

domain_start = bo->rdev->mc.vram_start;

sys/dev/drm/radeon/radeon_object.c

344

domain_start = bo->rdev->mc.gtt_start;

sys/dev/drm/radeon/radeon_object.c

361

(!max_offset || max_offset > bo->rdev->mc.visible_vram_size))

sys/dev/drm/radeon/radeon_object.c

363

bo->rdev->mc.visible_vram_size >> PAGE_SHIFT;

sys/dev/drm/radeon/radeon_object.c

422

if (rdev->mc.igp_sideport_enabled == false)

sys/dev/drm/radeon/radeon_object.c

452

arch_io_reserve_memtype_wc(rdev->mc.aper_base,

sys/dev/drm/radeon/radeon_object.c

453

rdev->mc.aper_size);

sys/dev/drm/radeon/radeon_object.c

457

rdev->mc.vram_mtrr = arch_phys_wc_add(rdev->mc.aper_base,

sys/dev/drm/radeon/radeon_object.c

458

rdev->mc.aper_size);

sys/dev/drm/radeon/radeon_object.c

461

rdev->mc.mc_vram_size >> 20,

sys/dev/drm/radeon/radeon_object.c

462

(unsigned long long)rdev->mc.aper_size >> 20);

sys/dev/drm/radeon/radeon_object.c

464

rdev->mc.vram_width, rdev->mc.vram_is_ddr ? 'D' : 'S');

sys/dev/drm/radeon/radeon_object.c

471

arch_phys_wc_del(rdev->mc.vram_mtrr);

sys/dev/drm/radeon/radeon_object.c

473

arch_io_free_memtype_wc(rdev->mc.aper_base, rdev->mc.aper_size);

sys/dev/drm/radeon/radeon_object.c

481

u64 real_vram_size = rdev->mc.real_vram_size;

sys/dev/drm/radeon/radeon_object.c

811

if ((offset + size) <= rdev->mc.visible_vram_size)

sys/dev/drm/radeon/radeon_object.c

820

lpfn = rdev->mc.visible_vram_size >> PAGE_SHIFT;

sys/dev/drm/radeon/radeon_object.c

837

if ((offset + size) > rdev->mc.visible_vram_size)

sys/dev/drm/radeon/radeon_test.c

157

((uintptr_t)gtt_addr - (uintptr_t)rdev->mc.gtt_start +

sys/dev/drm/radeon/radeon_test.c

160

((uintptr_t)vram_addr - (uintptr_t)rdev->mc.vram_start +

sys/dev/drm/radeon/radeon_test.c

208

((uintptr_t)vram_addr - (uintptr_t)rdev->mc.vram_start +

sys/dev/drm/radeon/radeon_test.c

211

((uintptr_t)gtt_addr - (uintptr_t)rdev->mc.gtt_start +

sys/dev/drm/radeon/radeon_test.c

221

(uintmax_t)gtt_addr - rdev->mc.gtt_start);

sys/dev/drm/radeon/radeon_test.c

59

n = rdev->mc.gtt_size - rdev->gart_pin_size;

sys/dev/drm/radeon/radeon_ttm.c

1076

i_size_write(inode, rdev->mc.mc_vram_size);

sys/dev/drm/radeon/radeon_ttm.c

1095

if (*pos >= rdev->mc.mc_vram_size)

sys/dev/drm/radeon/radeon_ttm.c

1128

i_size_write(inode, rdev->mc.gtt_size);

sys/dev/drm/radeon/radeon_ttm.c

143

man->gpu_offset = rdev->mc.gtt_start;

sys/dev/drm/radeon/radeon_ttm.c

165

man->gpu_offset = rdev->mc.vram_start;

sys/dev/drm/radeon/radeon_ttm.c

201

else if (rbo->rdev->mc.visible_vram_size < rbo->rdev->mc.real_vram_size &&

sys/dev/drm/radeon/radeon_ttm.c

202

bo->mem.start < (rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT)) {

sys/dev/drm/radeon/radeon_ttm.c

203

unsigned fpfn = rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT;

sys/dev/drm/radeon/radeon_ttm.c

274

old_start += rdev->mc.vram_start;

sys/dev/drm/radeon/radeon_ttm.c

277

old_start += rdev->mc.gtt_start;

sys/dev/drm/radeon/radeon_ttm.c

285

new_start += rdev->mc.vram_start;

sys/dev/drm/radeon/radeon_ttm.c

288

new_start += rdev->mc.gtt_start;

sys/dev/drm/radeon/radeon_ttm.c

482

mem->bus.base = rdev->mc.agp_base;

sys/dev/drm/radeon/radeon_ttm.c

490

if ((mem->bus.offset + mem->bus.size) > rdev->mc.visible_vram_size)

sys/dev/drm/radeon/radeon_ttm.c

492

mem->bus.base = rdev->mc.aper_base;

sys/dev/drm/radeon/radeon_ttm.c

915

rdev->mc.real_vram_size >> PAGE_SHIFT);

sys/dev/drm/radeon/radeon_ttm.c

921

radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size);

sys/dev/drm/radeon/radeon_ttm.c

939

(unsigned) (rdev->mc.real_vram_size / (1024 * 1024)));

sys/dev/drm/radeon/radeon_ttm.c

941

rdev->mc.gtt_size >> PAGE_SHIFT);

sys/dev/drm/radeon/radeon_ttm.c

947

(unsigned)(rdev->mc.gtt_size / (1024 * 1024)));

sys/dev/drm/radeon/radeon_ucode.h

212

struct mc_firmware_header_v1_0 mc;

sys/dev/drm/radeon/rs400.c

114

switch(rdev->mc.gtt_size / (1024 * 1024)) {

sys/dev/drm/radeon/rs400.c

147

tmp = REG_SET(RS690_MC_AGP_TOP, rdev->mc.gtt_end >> 16);

sys/dev/drm/radeon/rs400.c

148

tmp |= REG_SET(RS690_MC_AGP_START, rdev->mc.gtt_start >> 16);

sys/dev/drm/radeon/rs400.c

186

(unsigned)(rdev->mc.gtt_size >> 20),

sys/dev/drm/radeon/rs400.c

266

rdev->mc.igp_sideport_enabled = radeon_combios_sideport_present(rdev);

sys/dev/drm/radeon/rs400.c

268

rdev->mc.vram_is_ddr = true;

sys/dev/drm/radeon/rs400.c

269

rdev->mc.vram_width = 128;

sys/dev/drm/radeon/rs400.c

272

radeon_vram_location(rdev, &rdev->mc, base);

sys/dev/drm/radeon/rs400.c

273

rdev->mc.gtt_base_align = rdev->mc.gtt_size - 1;

sys/dev/drm/radeon/rs400.c

274

radeon_gtt_location(rdev, &rdev->mc);

sys/dev/drm/radeon/rs400.c

39

switch (rdev->mc.gtt_size/(1024*1024)) {

sys/dev/drm/radeon/rs400.c

394

S_000148_MC_FB_START(rdev->mc.vram_start >> 16) |

sys/dev/drm/radeon/rs400.c

395

S_000148_MC_FB_TOP(rdev->mc.vram_end >> 16));

sys/dev/drm/radeon/rs400.c

50

(unsigned)(rdev->mc.gtt_size >> 20));

sys/dev/drm/radeon/rs400.c

53

rdev->mc.gtt_size = 32 * 1024 * 1024;

sys/dev/drm/radeon/rs400.c

83

switch(rdev->mc.gtt_size / (1024 * 1024)) {

sys/dev/drm/radeon/rs600.c

593

WREG32_MC(R_00013C_MC_PT0_CONTEXT0_FLAT_START_ADDR, rdev->mc.gtt_start);

sys/dev/drm/radeon/rs600.c

594

WREG32_MC(R_00014C_MC_PT0_CONTEXT0_FLAT_END_ADDR, rdev->mc.gtt_end);

sys/dev/drm/radeon/rs600.c

598

WREG32_MC(R_000112_MC_PT0_SYSTEM_APERTURE_LOW_ADDR, rdev->mc.vram_start);

sys/dev/drm/radeon/rs600.c

599

WREG32_MC(R_000114_MC_PT0_SYSTEM_APERTURE_HIGH_ADDR, rdev->mc.vram_end);

sys/dev/drm/radeon/rs600.c

608

(unsigned)(rdev->mc.gtt_size >> 20),

sys/dev/drm/radeon/rs600.c

871

rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0);

sys/dev/drm/radeon/rs600.c

872

rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0);

sys/dev/drm/radeon/rs600.c

873

rdev->mc.vram_is_ddr = true;

sys/dev/drm/radeon/rs600.c

874

rdev->mc.vram_width = 128;

sys/dev/drm/radeon/rs600.c

875

rdev->mc.real_vram_size = RREG32(RADEON_CONFIG_MEMSIZE);

sys/dev/drm/radeon/rs600.c

876

rdev->mc.mc_vram_size = rdev->mc.real_vram_size;

sys/dev/drm/radeon/rs600.c

877

rdev->mc.visible_vram_size = rdev->mc.aper_size;

sys/dev/drm/radeon/rs600.c

878

rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev);

sys/dev/drm/radeon/rs600.c

881

radeon_vram_location(rdev, &rdev->mc, base);

sys/dev/drm/radeon/rs600.c

882

rdev->mc.gtt_base_align = 0;

sys/dev/drm/radeon/rs600.c

883

radeon_gtt_location(rdev, &rdev->mc);

sys/dev/drm/radeon/rs600.c

968

S_000004_MC_FB_START(rdev->mc.vram_start >> 16) |

sys/dev/drm/radeon/rs600.c

969

S_000004_MC_FB_TOP(rdev->mc.vram_end >> 16));

sys/dev/drm/radeon/rs600.c

971

S_000134_HDP_FB_START(rdev->mc.vram_start >> 16));

sys/dev/drm/radeon/rs690.c

155

rdev->mc.vram_is_ddr = true;

sys/dev/drm/radeon/rs690.c

156

rdev->mc.vram_width = 128;

sys/dev/drm/radeon/rs690.c

157

rdev->mc.real_vram_size = RREG32(RADEON_CONFIG_MEMSIZE);

sys/dev/drm/radeon/rs690.c

158

rdev->mc.mc_vram_size = rdev->mc.real_vram_size;

sys/dev/drm/radeon/rs690.c

159

rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0);

sys/dev/drm/radeon/rs690.c

160

rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0);

sys/dev/drm/radeon/rs690.c

161

rdev->mc.visible_vram_size = rdev->mc.aper_size;

sys/dev/drm/radeon/rs690.c

164

rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev);

sys/dev/drm/radeon/rs690.c

169

if (rdev->mc.igp_sideport_enabled &&

sys/dev/drm/radeon/rs690.c

170

(rdev->mc.real_vram_size == (384 * 1024 * 1024))) {

sys/dev/drm/radeon/rs690.c

172

rdev->mc.real_vram_size -= 128 * 1024 * 1024;

sys/dev/drm/radeon/rs690.c

173

rdev->mc.mc_vram_size = rdev->mc.real_vram_size;

sys/dev/drm/radeon/rs690.c

182

if (k8_addr + rdev->mc.visible_vram_size < 0x100000000ULL)

sys/dev/drm/radeon/rs690.c

188

if (rdev->mc.igp_sideport_enabled == false && radeon_fastfb == 1) {

sys/dev/drm/radeon/rs690.c

190

(unsigned long long)rdev->mc.aper_base, k8_addr);

sys/dev/drm/radeon/rs690.c

191

rdev->mc.aper_base = (resource_size_t)k8_addr;

sys/dev/drm/radeon/rs690.c

197

radeon_vram_location(rdev, &rdev->mc, base);

sys/dev/drm/radeon/rs690.c

198

rdev->mc.gtt_base_align = rdev->mc.gtt_size - 1;

sys/dev/drm/radeon/rs690.c

199

radeon_gtt_location(rdev, &rdev->mc);

sys/dev/drm/radeon/rs690.c

365

if (rdev->mc.igp_sideport_enabled) {

sys/dev/drm/radeon/rs690.c

684

S_000100_MC_FB_START(rdev->mc.vram_start >> 16) |

sys/dev/drm/radeon/rs690.c

685

S_000100_MC_FB_TOP(rdev->mc.vram_end >> 16));

sys/dev/drm/radeon/rs690.c

687

S_000134_HDP_FB_START(rdev->mc.vram_start >> 16));

sys/dev/drm/radeon/rv515.c

178

rdev->mc.vram_width = 128;

sys/dev/drm/radeon/rv515.c

179

rdev->mc.vram_is_ddr = true;

sys/dev/drm/radeon/rv515.c

183

rdev->mc.vram_width = 64;

sys/dev/drm/radeon/rv515.c

186

rdev->mc.vram_width = 128;

sys/dev/drm/radeon/rv515.c

189

rdev->mc.vram_width = 128;

sys/dev/drm/radeon/rv515.c

199

radeon_vram_location(rdev, &rdev->mc, 0);

sys/dev/drm/radeon/rv515.c

200

rdev->mc.gtt_base_align = 0;

sys/dev/drm/radeon/rv515.c

202

radeon_gtt_location(rdev, &rdev->mc);

sys/dev/drm/radeon/rv515.c

384

upper_32_bits(rdev->mc.vram_start));

sys/dev/drm/radeon/rv515.c

386

upper_32_bits(rdev->mc.vram_start));

sys/dev/drm/radeon/rv515.c

389

upper_32_bits(rdev->mc.vram_start));

sys/dev/drm/radeon/rv515.c

391

upper_32_bits(rdev->mc.vram_start));

sys/dev/drm/radeon/rv515.c

395

(u32)rdev->mc.vram_start);

sys/dev/drm/radeon/rv515.c

397

(u32)rdev->mc.vram_start);

sys/dev/drm/radeon/rv515.c

399

WREG32(R_000310_VGA_MEMORY_BASE_ADDRESS, (u32)rdev->mc.vram_start);

sys/dev/drm/radeon/rv515.c

475

WREG32(R_0000F8_CONFIG_MEMSIZE, rdev->mc.real_vram_size);

sys/dev/drm/radeon/rv515.c

478

S_000001_MC_FB_START(rdev->mc.vram_start >> 16) |

sys/dev/drm/radeon/rv515.c

479

S_000001_MC_FB_TOP(rdev->mc.vram_end >> 16));

sys/dev/drm/radeon/rv515.c

481

S_000134_HDP_FB_START(rdev->mc.vram_start >> 16));

sys/dev/drm/radeon/rv515.c

484

S_000002_MC_AGP_START(rdev->mc.gtt_start >> 16) |

sys/dev/drm/radeon/rv515.c

485

S_000002_MC_AGP_TOP(rdev->mc.gtt_end >> 16));

sys/dev/drm/radeon/rv515.c

486

WREG32_MC(R_000003_MC_AGP_BASE, lower_32_bits(rdev->mc.agp_base));

sys/dev/drm/radeon/rv515.c

488

S_000004_AGP_BASE_ADDR_2(upper_32_bits(rdev->mc.agp_base)));

sys/dev/drm/radeon/rv770.c

1028

if (rdev->mc.vram_start < rdev->mc.gtt_start) {

sys/dev/drm/radeon/rv770.c

1031

rdev->mc.vram_start >> 12);

sys/dev/drm/radeon/rv770.c

1033

rdev->mc.gtt_end >> 12);

sys/dev/drm/radeon/rv770.c

1037

rdev->mc.gtt_start >> 12);

sys/dev/drm/radeon/rv770.c

1039

rdev->mc.vram_end >> 12);

sys/dev/drm/radeon/rv770.c

1043

rdev->mc.vram_start >> 12);

sys/dev/drm/radeon/rv770.c

1045

rdev->mc.vram_end >> 12);

sys/dev/drm/radeon/rv770.c

1048

tmp = ((rdev->mc.vram_end >> 24) & 0xFFFF) << 16;

sys/dev/drm/radeon/rv770.c

1049

tmp |= ((rdev->mc.vram_start >> 24) & 0xFFFF);

sys/dev/drm/radeon/rv770.c

1051

WREG32(HDP_NONSURFACE_BASE, (rdev->mc.vram_start >> 8));

sys/dev/drm/radeon/rv770.c

1055

WREG32(MC_VM_AGP_TOP, rdev->mc.gtt_end >> 16);

sys/dev/drm/radeon/rv770.c

1056

WREG32(MC_VM_AGP_BOT, rdev->mc.gtt_start >> 16);

sys/dev/drm/radeon/rv770.c

1057

WREG32(MC_VM_AGP_BASE, rdev->mc.agp_base >> 22);

sys/dev/drm/radeon/rv770.c

1079

radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size);

sys/dev/drm/radeon/rv770.c

1599

void r700_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc)

sys/dev/drm/radeon/rv770.c

1603

if (mc->mc_vram_size > 0xE0000000) {

sys/dev/drm/radeon/rv770.c

1606

mc->real_vram_size = 0xE0000000;

sys/dev/drm/radeon/rv770.c

1607

mc->mc_vram_size = 0xE0000000;

sys/dev/drm/radeon/rv770.c

1610

size_bf = mc->gtt_start;

sys/dev/drm/radeon/rv770.c

1611

size_af = mc->mc_mask - mc->gtt_end;

sys/dev/drm/radeon/rv770.c

1613

if (mc->mc_vram_size > size_bf) {

sys/dev/drm/radeon/rv770.c

1615

mc->real_vram_size = size_bf;

sys/dev/drm/radeon/rv770.c

1616

mc->mc_vram_size = size_bf;

sys/dev/drm/radeon/rv770.c

1618

mc->vram_start = mc->gtt_start - mc->mc_vram_size;

sys/dev/drm/radeon/rv770.c

1620

if (mc->mc_vram_size > size_af) {

sys/dev/drm/radeon/rv770.c

1622

mc->real_vram_size = size_af;

sys/dev/drm/radeon/rv770.c

1623

mc->mc_vram_size = size_af;

sys/dev/drm/radeon/rv770.c

1625

mc->vram_start = mc->gtt_end + 1;

sys/dev/drm/radeon/rv770.c

1627

mc->vram_end = mc->vram_start + mc->mc_vram_size - 1;

sys/dev/drm/radeon/rv770.c

1629

mc->mc_vram_size >> 20, mc->vram_start,

sys/dev/drm/radeon/rv770.c

1630

mc->vram_end, mc->real_vram_size >> 20);

sys/dev/drm/radeon/rv770.c

1632

radeon_vram_location(rdev, &rdev->mc, 0);

sys/dev/drm/radeon/rv770.c

1633

rdev->mc.gtt_base_align = 0;

sys/dev/drm/radeon/rv770.c

1634

radeon_gtt_location(rdev, mc);

sys/dev/drm/radeon/rv770.c

1644

rdev->mc.vram_is_ddr = true;

sys/dev/drm/radeon/rv770.c

1669

rdev->mc.vram_width = numchan * chansize;

sys/dev/drm/radeon/rv770.c

1671

rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0);

sys/dev/drm/radeon/rv770.c

1672

rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0);

sys/dev/drm/radeon/rv770.c

1674

rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE);

sys/dev/drm/radeon/rv770.c

1675

rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE);

sys/dev/drm/radeon/rv770.c

1676

rdev->mc.visible_vram_size = rdev->mc.aper_size;

sys/dev/drm/radeon/rv770.c

1677

r700_vram_gtt_location(rdev, &rdev->mc);

sys/dev/drm/radeon/rv770.c

922

WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12);

sys/dev/drm/radeon/rv770.c

923

WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, rdev->mc.gtt_end >> 12);

sys/dev/drm/radeon/rv770.c

934

(unsigned)(rdev->mc.gtt_size >> 20),

sys/dev/drm/radeon/si.c

3456

radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size);

sys/dev/drm/radeon/si.c

3755

radeon_ttm_set_active_vram_size(rdev, rdev->mc.real_vram_size);

sys/dev/drm/radeon/si.c

4152

rdev->mc.vram_start >> 12);

sys/dev/drm/radeon/si.c

4154

rdev->mc.vram_end >> 12);

sys/dev/drm/radeon/si.c

4157

tmp = ((rdev->mc.vram_end >> 24) & 0xFFFF) << 16;

sys/dev/drm/radeon/si.c

4158

tmp |= ((rdev->mc.vram_start >> 24) & 0xFFFF);

sys/dev/drm/radeon/si.c

4161

WREG32(HDP_NONSURFACE_BASE, (rdev->mc.vram_start >> 8));

sys/dev/drm/radeon/si.c

4179

struct radeon_mc *mc)

sys/dev/drm/radeon/si.c

4181

if (mc->mc_vram_size > 0xFFC0000000ULL) {

sys/dev/drm/radeon/si.c

4184

mc->real_vram_size = 0xFFC0000000ULL;

sys/dev/drm/radeon/si.c

4185

mc->mc_vram_size = 0xFFC0000000ULL;

sys/dev/drm/radeon/si.c

4187

radeon_vram_location(rdev, &rdev->mc, 0);

sys/dev/drm/radeon/si.c

4188

rdev->mc.gtt_base_align = 0;

sys/dev/drm/radeon/si.c

4189

radeon_gtt_location(rdev, mc);

sys/dev/drm/radeon/si.c

4198

rdev->mc.vram_is_ddr = true;

sys/dev/drm/radeon/si.c

4238

rdev->mc.vram_width = numchan * chansize;

sys/dev/drm/radeon/si.c

4240

rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0);

sys/dev/drm/radeon/si.c

4241

rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0);

sys/dev/drm/radeon/si.c

4250

rdev->mc.mc_vram_size = tmp * 1024ULL * 1024ULL;

sys/dev/drm/radeon/si.c

4251

rdev->mc.real_vram_size = rdev->mc.mc_vram_size;

sys/dev/drm/radeon/si.c

4252

rdev->mc.visible_vram_size = rdev->mc.aper_size;

sys/dev/drm/radeon/si.c

4253

si_vram_gtt_location(rdev, &rdev->mc);

sys/dev/drm/radeon/si.c

4302

WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12);

sys/dev/drm/radeon/si.c

4303

WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, rdev->mc.gtt_end >> 12);

sys/dev/drm/radeon/si.c

4353

(unsigned)(rdev->mc.gtt_size >> 20),

sys/dev/misc/ecc/ecc_amd8000.c

101

const struct ecc_amd8000_memctrl *mc;

sys/dev/misc/ecc/ecc_amd8000.c

107

for (mc = ecc_memctrls; mc->desc != NULL; ++mc) {

sys/dev/misc/ecc/ecc_amd8000.c

108

if (mc->vid == vid && mc->did == did) {

sys/dev/misc/ecc/ecc_amd8000.c

109

device_set_desc(dev, mc->desc);

sys/dev/misc/ecc/ecc_x3400.c

124

const struct ecc_x3400_memctrl *mc;

sys/dev/misc/ecc/ecc_x3400.c

130

for (mc = ecc_memctrls; mc->desc != NULL; ++mc) {

sys/dev/misc/ecc/ecc_x3400.c

131

if (mc->vid == vid && mc->did == did) {

sys/dev/misc/ecc/ecc_x3400.c

143

device_set_desc(dev, mc->desc);

sys/dev/misc/evdev/evdev_mt.c

254

int *mc = red + m; /* row-wise minimal elements of cs */

sys/dev/misc/evdev/evdev_mt.c

255

int *cs = mc + m; /* the column set */

sys/dev/misc/evdev/evdev_mt.c

262

for (; p < mc; *p++ = 0) {}

sys/dev/misc/evdev/evdev_mt.c

277

for (p = mc; p < cs; *p++ = col) {}

sys/dev/misc/evdev/evdev_mt.c

281

mc[row] -= n;

sys/dev/misc/evdev/evdev_mt.c

284

if (mc[i] >= 0) {

sys/dev/misc/evdev/evdev_mt.c

285

d = p[mc[i]] - cd[mc[i]];

sys/dev/misc/evdev/evdev_mt.c

289

mc[i] = j;

sys/dev/misc/evdev/evdev_mt.c

304

for (j = mc[row]; (r2c[row] = j) != col;) {

sys/dev/misc/evdev/evdev_mt.c

306

j = mc[row] + n;

sys/dev/netif/ti/if_ti.c

1022

struct ti_mc_entry *mc;

sys/dev/netif/ti/if_ti.c

1038

mc = sc->ti_mc_listhead.slh_first;

sys/dev/netif/ti/if_ti.c

1039

ti_del_mcast(sc, &mc->mc_addr);

sys/dev/netif/ti/if_ti.c

1041

kfree(mc, M_DEVBUF);

sys/dev/netif/ti/if_ti.c

1048

mc = kmalloc(sizeof(struct ti_mc_entry), M_DEVBUF, M_INTWAIT);

sys/dev/netif/ti/if_ti.c

1050

&mc->mc_addr, ETHER_ADDR_LEN);

sys/dev/netif/ti/if_ti.c

1051

SLIST_INSERT_HEAD(&sc->ti_mc_listhead, mc, mc_entries);

sys/dev/netif/ti/if_ti.c

1052

ti_add_mcast(sc, &mc->mc_addr);

sys/dev/raid/mlx/mlx.c

102

static int mlx_wait_command(struct mlx_command *mc);

sys/dev/raid/mlx/mlx.c

103

static int mlx_poll_command(struct mlx_command *mc);

sys/dev/raid/mlx/mlx.c

105

static void mlx_completeio(struct mlx_command *mc);

sys/dev/raid/mlx/mlx.c

1050

mlx_periodic_enquiry(struct mlx_command *mc)

sys/dev/raid/mlx/mlx.c

1052

struct mlx_softc *sc = mc->mc_sc;

sys/dev/raid/mlx/mlx.c

1057

if (mc->mc_status != 0) {

sys/dev/raid/mlx/mlx.c

1058

device_printf(sc->mlx_dev, "periodic enquiry failed - %s\n", mlx_diagnose_command(mc));

sys/dev/raid/mlx/mlx.c

1063

switch(mc->mc_mailbox[0]) {

sys/dev/raid/mlx/mlx.c

1070

struct mlx_enquiry *me = (struct mlx_enquiry *)mc->mc_data;

sys/dev/raid/mlx/mlx.c

1071

struct mlx_enquiry_old *meo = (struct mlx_enquiry_old *)mc->mc_data;

sys/dev/raid/mlx/mlx.c

1108

struct mlx_enquiry *me = (struct mlx_enquiry *)mc->mc_data;

sys/dev/raid/mlx/mlx.c

112

static void mlx_releasecmd(struct mlx_command *mc);

sys/dev/raid/mlx/mlx.c

1128

struct mlx_enq_sys_drive *mes = (struct mlx_enq_sys_drive *)mc->mc_data;

sys/dev/raid/mlx/mlx.c

113

static void mlx_freecmd(struct mlx_command *mc);

sys/dev/raid/mlx/mlx.c

1156

device_printf(sc->mlx_dev, "%s: unknown command 0x%x", __func__, mc->mc_mailbox[0]);

sys/dev/raid/mlx/mlx.c

1161

kfree(mc->mc_data, M_DEVBUF);

sys/dev/raid/mlx/mlx.c

1162

mlx_releasecmd(mc);

sys/dev/raid/mlx/mlx.c

1172

struct mlx_command *mc;

sys/dev/raid/mlx/mlx.c

118

static int mlx_getslot(struct mlx_command *mc);

sys/dev/raid/mlx/mlx.c

1180

if ((mc = mlx_alloccmd(sc)) == NULL)

sys/dev/raid/mlx/mlx.c

1189

if (mlx_getslot(mc))

sys/dev/raid/mlx/mlx.c

119

static void mlx_mapcmd(struct mlx_command *mc);

sys/dev/raid/mlx/mlx.c

1193

mc->mc_data = result;

sys/dev/raid/mlx/mlx.c

1194

mc->mc_length = /*sizeof(struct mlx_eventlog_entry)*/1024;

sys/dev/raid/mlx/mlx.c

1195

mlx_mapcmd(mc);

sys/dev/raid/mlx/mlx.c

1198

mlx_make_type3(mc, MLX_CMD_LOGOP, MLX_LOGOP_GET, 1, sc->mlx_lastevent, 0, 0, mc->mc_dataphys, 0);

sys/dev/raid/mlx/mlx.c

1199

mc->mc_complete = mlx_periodic_eventlog_respond;

sys/dev/raid/mlx/mlx.c

120

static void mlx_unmapcmd(struct mlx_command *mc);

sys/dev/raid/mlx/mlx.c

1200

mc->mc_private = mc;

sys/dev/raid/mlx/mlx.c

1203

if ((error = mlx_start(mc)) != 0)

sys/dev/raid/mlx/mlx.c

1209

if (mc != NULL)

sys/dev/raid/mlx/mlx.c

121

static int mlx_start(struct mlx_command *mc);

sys/dev/raid/mlx/mlx.c

1210

mlx_releasecmd(mc);

sys/dev/raid/mlx/mlx.c

1237

mlx_periodic_eventlog_respond(struct mlx_command *mc)

sys/dev/raid/mlx/mlx.c

1239

struct mlx_softc *sc = mc->mc_sc;

sys/dev/raid/mlx/mlx.c

1240

struct mlx_eventlog_entry *el = (struct mlx_eventlog_entry *)mc->mc_data;

sys/dev/raid/mlx/mlx.c

1247

if (mc->mc_status == 0) {

sys/dev/raid/mlx/mlx.c

128

static char *mlx_diagnose_command(struct mlx_command *mc);

sys/dev/raid/mlx/mlx.c

1290

device_printf(sc->mlx_dev, "error reading message log - %s\n", mlx_diagnose_command(mc));

sys/dev/raid/mlx/mlx.c

1296

kfree(mc->mc_data, M_DEVBUF);

sys/dev/raid/mlx/mlx.c

1297

mlx_releasecmd(mc);

sys/dev/raid/mlx/mlx.c

1312

mlx_periodic_rebuild(struct mlx_command *mc)

sys/dev/raid/mlx/mlx.c

1314

struct mlx_softc *sc = mc->mc_sc;

sys/dev/raid/mlx/mlx.c

1315

struct mlx_rebuild_status *mr = (struct mlx_rebuild_status *)mc->mc_data;

sys/dev/raid/mlx/mlx.c

1317

switch(mc->mc_status) {

sys/dev/raid/mlx/mlx.c

1347

kfree(mc->mc_data, M_DEVBUF);

sys/dev/raid/mlx/mlx.c

1348

mlx_releasecmd(mc);

sys/dev/raid/mlx/mlx.c

1364

struct mlx_command *mc;

sys/dev/raid/mlx/mlx.c

1392

if ((mc = mlx_alloccmd(sc)) == NULL)

sys/dev/raid/mlx/mlx.c

1395

mc->mc_flags |= MLX_CMD_PRIORITY;

sys/dev/raid/mlx/mlx.c

1396

if (mlx_getslot(mc))

sys/dev/raid/mlx/mlx.c

1400

mlx_make_type2(mc, command, (failsafe << 4) | i, 0, 0, 0, 0, 0, 0, 0);

sys/dev/raid/mlx/mlx.c

1401

mc->mc_complete = mlx_pause_done;

sys/dev/raid/mlx/mlx.c

1402

mc->mc_private = sc; /* XXX not needed */

sys/dev/raid/mlx/mlx.c

1403

if (mlx_start(mc))

sys/dev/raid/mlx/mlx.c

1411

if (mc != NULL)

sys/dev/raid/mlx/mlx.c

1412

mlx_releasecmd(mc);

sys/dev/raid/mlx/mlx.c

1418

mlx_pause_done(struct mlx_command *mc)

sys/dev/raid/mlx/mlx.c

1420

struct mlx_softc *sc = mc->mc_sc;

sys/dev/raid/mlx/mlx.c

1421

int command = mc->mc_mailbox[0];

sys/dev/raid/mlx/mlx.c

1422

int channel = mc->mc_mailbox[2] & 0xf;

sys/dev/raid/mlx/mlx.c

1424

if (mc->mc_status != 0) {

sys/dev/raid/mlx/mlx.c

1426

command == MLX_CMD_STOPCHANNEL ? "pause" : "resume", mlx_diagnose_command(mc));

sys/dev/raid/mlx/mlx.c

1433

mlx_releasecmd(mc);

sys/dev/raid/mlx/mlx.c

1450

mlx_enquire(struct mlx_softc *sc, int command, size_t bufsize, void (* complete)(struct mlx_command *mc))

sys/dev/raid/mlx/mlx.c

1452

struct mlx_command *mc;

sys/dev/raid/mlx/mlx.c

1461

if ((mc = mlx_alloccmd(sc)) == NULL)

sys/dev/raid/mlx/mlx.c

1466

mc->mc_flags |= MLX_CMD_PRIORITY | MLX_CMD_DATAOUT;

sys/dev/raid/mlx/mlx.c

1467

if (mlx_getslot(mc))

sys/dev/raid/mlx/mlx.c

1471

mc->mc_data = result;

sys/dev/raid/mlx/mlx.c

1472

mc->mc_length = bufsize;

sys/dev/raid/mlx/mlx.c

1473

mlx_mapcmd(mc);

sys/dev/raid/mlx/mlx.c

1476

mlx_make_type2(mc, command, 0, 0, 0, 0, 0, 0, mc->mc_dataphys, 0);

sys/dev/raid/mlx/mlx.c

1480

mc->mc_complete = complete;

sys/dev/raid/mlx/mlx.c

1481

mc->mc_private = mc;

sys/dev/raid/mlx/mlx.c

1482

if ((error = mlx_start(mc)) != 0)

sys/dev/raid/mlx/mlx.c

1486

if ((sc->mlx_state & MLX_STATE_INTEN) ? mlx_wait_command(mc) : mlx_poll_command(mc))

sys/dev/raid/mlx/mlx.c

1490

if (mc->mc_status != 0) {

sys/dev/raid/mlx/mlx.c

1491

device_printf(sc->mlx_dev, "ENQUIRY failed - %s\n", mlx_diagnose_command(mc));

sys/dev/raid/mlx/mlx.c

1498

if ((complete == NULL) && (mc != NULL))

sys/dev/raid/mlx/mlx.c

1499

mlx_releasecmd(mc);

sys/dev/raid/mlx/mlx.c

151

struct mlx_command *mc;

sys/dev/raid/mlx/mlx.c

1518

struct mlx_command *mc;

sys/dev/raid/mlx/mlx.c

1525

if ((mc = mlx_alloccmd(sc)) == NULL)

sys/dev/raid/mlx/mlx.c

1528

if (mlx_getslot(mc))

sys/dev/raid/mlx/mlx.c

1532

mlx_make_type2(mc, MLX_CMD_FLUSH, 0, 0, 0, 0, 0, 0, 0, 0);

sys/dev/raid/mlx/mlx.c

1535

if (mlx_poll_command(mc))

sys/dev/raid/mlx/mlx.c

1539

if (mc->mc_status != 0) {

sys/dev/raid/mlx/mlx.c

1540

device_printf(sc->mlx_dev, "FLUSH failed - %s\n", mlx_diagnose_command(mc));

sys/dev/raid/mlx/mlx.c

1546

if (mc != NULL)

sys/dev/raid/mlx/mlx.c

1547

mlx_releasecmd(mc);

sys/dev/raid/mlx/mlx.c

1560

struct mlx_command *mc;

sys/dev/raid/mlx/mlx.c

1567

if ((mc = mlx_alloccmd(sc)) == NULL)

sys/dev/raid/mlx/mlx.c

1570

if (mlx_getslot(mc))

sys/dev/raid/mlx/mlx.c

1574

mlx_make_type2(mc, MLX_CMD_CHECKASYNC, 0, 0, 0, 0, 0, drive | 0x80, 0, 0);

sys/dev/raid/mlx/mlx.c

1577

if (mlx_wait_command(mc))

sys/dev/raid/mlx/mlx.c

1581

if (mc->mc_status != 0) {

sys/dev/raid/mlx/mlx.c

1582

device_printf(sc->mlx_dev, "CHECK ASYNC failed - %s\n", mlx_diagnose_command(mc));

sys/dev/raid/mlx/mlx.c

1586

error = mc->mc_status;

sys/dev/raid/mlx/mlx.c

1589

if (mc != NULL)

sys/dev/raid/mlx/mlx.c

159

while ((mc = TAILQ_FIRST(&sc->mlx_freecmds)) != NULL) {

sys/dev/raid/mlx/mlx.c

1590

mlx_releasecmd(mc);

sys/dev/raid/mlx/mlx.c

160

TAILQ_REMOVE(&sc->mlx_freecmds, mc, mc_link);

sys/dev/raid/mlx/mlx.c

1603

struct mlx_command *mc;

sys/dev/raid/mlx/mlx.c

161

mlx_freecmd(mc);

sys/dev/raid/mlx/mlx.c

1610

if ((mc = mlx_alloccmd(sc)) == NULL)

sys/dev/raid/mlx/mlx.c

1613

if (mlx_getslot(mc))

sys/dev/raid/mlx/mlx.c

1617

mlx_make_type2(mc, MLX_CMD_REBUILDASYNC, channel, target, 0, 0, 0, 0, 0, 0);

sys/dev/raid/mlx/mlx.c

1620

if (mlx_wait_command(mc))

sys/dev/raid/mlx/mlx.c

1624

if (mc->mc_status != 0) {

sys/dev/raid/mlx/mlx.c

1625

device_printf(sc->mlx_dev, "REBUILD ASYNC failed - %s\n", mlx_diagnose_command(mc));

sys/dev/raid/mlx/mlx.c

1629

error = mc->mc_status;

sys/dev/raid/mlx/mlx.c

1632

if (mc != NULL)

sys/dev/raid/mlx/mlx.c

1633

mlx_releasecmd(mc);

sys/dev/raid/mlx/mlx.c

1643

mlx_wait_command(struct mlx_command *mc)

sys/dev/raid/mlx/mlx.c

1645

struct mlx_softc *sc = mc->mc_sc;

sys/dev/raid/mlx/mlx.c

1650

mc->mc_complete = NULL;

sys/dev/raid/mlx/mlx.c

1651

mc->mc_private = mc; /* wake us when you're done */

sys/dev/raid/mlx/mlx.c

1652

if ((error = mlx_start(mc)) != 0)

sys/dev/raid/mlx/mlx.c

1657

while ((mc->mc_status == MLX_STATUS_BUSY) && (count < 30)) {

sys/dev/raid/mlx/mlx.c

1658

tsleep(mc->mc_private, PCATCH, "mlxwcmd", hz);

sys/dev/raid/mlx/mlx.c

1661

if (mc->mc_status != 0) {

sys/dev/raid/mlx/mlx.c

1662

device_printf(sc->mlx_dev, "command failed - %s\n", mlx_diagnose_command(mc));

sys/dev/raid/mlx/mlx.c

1677

mlx_poll_command(struct mlx_command *mc)

sys/dev/raid/mlx/mlx.c

1679

struct mlx_softc *sc = mc->mc_sc;

sys/dev/raid/mlx/mlx.c

1684

mc->mc_complete = NULL;

sys/dev/raid/mlx/mlx.c

1685

mc->mc_private = NULL; /* we will poll for it */

sys/dev/raid/mlx/mlx.c

1686

if ((error = mlx_start(mc)) != 0)

sys/dev/raid/mlx/mlx.c

1692

mlx_done(mc->mc_sc);

sys/dev/raid/mlx/mlx.c

1694

} while ((mc->mc_status == MLX_STATUS_BUSY) && (count++ < 15000000));

sys/dev/raid/mlx/mlx.c

1695

if (mc->mc_status != MLX_STATUS_BUSY) {

sys/dev/raid/mlx/mlx.c

1697

TAILQ_REMOVE(&sc->mlx_work, mc, mc_link);

sys/dev/raid/mlx/mlx.c

1701

device_printf(sc->mlx_dev, "command failed - %s\n", mlx_diagnose_command(mc));

sys/dev/raid/mlx/mlx.c

1715

struct mlx_command *mc;

sys/dev/raid/mlx/mlx.c

1736

if ((mc = mlx_alloccmd(sc)) == NULL)

sys/dev/raid/mlx/mlx.c

1739

if (mlx_getslot(mc) != 0) {

sys/dev/raid/mlx/mlx.c

1740

mlx_releasecmd(mc);

sys/dev/raid/mlx/mlx.c

1750

mc->mc_complete = mlx_completeio;

sys/dev/raid/mlx/mlx.c

1751

mc->mc_private = bp;

sys/dev/raid/mlx/mlx.c

1752

mc->mc_data = bp->b_data;

sys/dev/raid/mlx/mlx.c

1753

mc->mc_length = bp->b_bcount;

sys/dev/raid/mlx/mlx.c

1755

mc->mc_flags |= MLX_CMD_DATAIN;

sys/dev/raid/mlx/mlx.c

1758

mc->mc_flags |= MLX_CMD_DATAOUT;

sys/dev/raid/mlx/mlx.c

1763

mlx_mapcmd(mc);

sys/dev/raid/mlx/mlx.c

1780

mlx_make_type1(mc, (cmd == MLX_CMD_WRITESG) ? MLX_CMD_WRITESG_OLD : MLX_CMD_READSG_OLD,

sys/dev/raid/mlx/mlx.c

1784

mc->mc_sgphys, /* location of SG list */

sys/dev/raid/mlx/mlx.c

1785

mc->mc_nsgent & 0x3f); /* size of SG list (top 3 bits clear) */

sys/dev/raid/mlx/mlx.c

1787

mlx_make_type5(mc, cmd,

sys/dev/raid/mlx/mlx.c

1791

mc->mc_sgphys, /* location of SG list */

sys/dev/raid/mlx/mlx.c

1792

mc->mc_nsgent & 0x3f); /* size of SG list (top 3 bits clear) */

sys/dev/raid/mlx/mlx.c

1796

if (mlx_start(mc) != 0) {

sys/dev/raid/mlx/mlx.c

1798

mc->mc_status = MLX_STATUS_WEDGED;

sys/dev/raid/mlx/mlx.c

1799

mlx_completeio(mc);

sys/dev/raid/mlx/mlx.c

1811

mlx_completeio(struct mlx_command *mc)

sys/dev/raid/mlx/mlx.c

1813

struct mlx_softc *sc = mc->mc_sc;

sys/dev/raid/mlx/mlx.c

1814

struct bio *bio = (mlx_bio *)mc->mc_private;

sys/dev/raid/mlx/mlx.c

1818

if (mc->mc_status != MLX_STATUS_OK) { /* could be more verbose here? */

sys/dev/raid/mlx/mlx.c

1822

switch(mc->mc_status) {

sys/dev/raid/mlx/mlx.c

1830

device_printf(sc->mlx_dev, "I/O error - %s\n", mlx_diagnose_command(mc));

sys/dev/raid/mlx/mlx.c

1834

device_printf(sc->mlx_dev, " %13D\n", mc->mc_mailbox, " ");

sys/dev/raid/mlx/mlx.c

1839

mlx_releasecmd(mc);

sys/dev/raid/mlx/mlx.c

1853

struct mlx_command *mc;

sys/dev/raid/mlx/mlx.c

1861

mc = NULL;

sys/dev/raid/mlx/mlx.c

1866

if ((mc = mlx_alloccmd(sc)) == NULL)

sys/dev/raid/mlx/mlx.c

1868

bcopy(mu->mu_command, mc->mc_mailbox, sizeof(mc->mc_mailbox));

sys/dev/raid/mlx/mlx.c

1882

if (mlx_getslot(mc))

sys/dev/raid/mlx/mlx.c

1887

mc->mc_data = kbuf;

sys/dev/raid/mlx/mlx.c

1888

mc->mc_length = mu->mu_datasize;

sys/dev/raid/mlx/mlx.c

1889

mlx_mapcmd(mc);

sys/dev/raid/mlx/mlx.c

1898

if (mc->mc_mailbox[0] == MLX_CMD_DIRECT_CDB) {

sys/dev/raid/mlx/mlx.c

1900

dcdb->dcdb_physaddr = mc->mc_dataphys + sizeof(*dcdb);

sys/dev/raid/mlx/mlx.c

1914

mc->mc_mailbox[mu->mu_bufptr ] = mc->mc_dataphys & 0xff;

sys/dev/raid/mlx/mlx.c

1915

mc->mc_mailbox[mu->mu_bufptr + 1] = (mc->mc_dataphys >> 8) & 0xff;

sys/dev/raid/mlx/mlx.c

1916

mc->mc_mailbox[mu->mu_bufptr + 2] = (mc->mc_dataphys >> 16) & 0xff;

sys/dev/raid/mlx/mlx.c

1917

mc->mc_mailbox[mu->mu_bufptr + 3] = (mc->mc_dataphys >> 24) & 0xff;

sys/dev/raid/mlx/mlx.c

1922

if ((error = mlx_wait_command(mc)) != 0)

sys/dev/raid/mlx/mlx.c

1926

mu->mu_status = mc->mc_status;

sys/dev/raid/mlx/mlx.c

1932

mlx_releasecmd(mc);

sys/dev/raid/mlx/mlx.c

1951

mlx_getslot(struct mlx_command *mc)

sys/dev/raid/mlx/mlx.c

1953

struct mlx_softc *sc = mc->mc_sc;

sys/dev/raid/mlx/mlx.c

1966

if (sc->mlx_busycmds >= ((mc->mc_flags & MLX_CMD_PRIORITY) ? limit : limit - 4))

sys/dev/raid/mlx/mlx.c

1981

sc->mlx_busycmd[slot] = mc;

sys/dev/raid/mlx/mlx.c

1991

mc->mc_slot = slot;

sys/dev/raid/mlx/mlx.c

2001

struct mlx_command *mc = (struct mlx_command *)arg;

sys/dev/raid/mlx/mlx.c

2002

struct mlx_softc *sc = mc->mc_sc;

sys/dev/raid/mlx/mlx.c

2013

sg = sc->mlx_sgtable + (mc->mc_slot * MLX_NSEG);

sys/dev/raid/mlx/mlx.c

2016

mc->mc_nsgent = nsegments;

sys/dev/raid/mlx/mlx.c

2017

mc->mc_sgphys = sc->mlx_sgbusaddr + (mc->mc_slot * MLX_NSEG * sizeof(struct mlx_sgentry));

sys/dev/raid/mlx/mlx.c

2018

mc->mc_dataphys = segs[0].ds_addr;

sys/dev/raid/mlx/mlx.c

2028

mlx_mapcmd(struct mlx_command *mc)

sys/dev/raid/mlx/mlx.c

2030

struct mlx_softc *sc = mc->mc_sc;

sys/dev/raid/mlx/mlx.c

2035

if (mc->mc_data != NULL) {

sys/dev/raid/mlx/mlx.c

2038

bus_dmamap_load(sc->mlx_buffer_dmat, mc->mc_dmamap, mc->mc_data, mc->mc_length,

sys/dev/raid/mlx/mlx.c

2039

mlx_setup_dmamap, mc, 0);

sys/dev/raid/mlx/mlx.c

2040

if (mc->mc_flags & MLX_CMD_DATAIN)

sys/dev/raid/mlx/mlx.c

2041

bus_dmamap_sync(sc->mlx_buffer_dmat, mc->mc_dmamap, BUS_DMASYNC_PREREAD);

sys/dev/raid/mlx/mlx.c

2042

if (mc->mc_flags & MLX_CMD_DATAOUT)

sys/dev/raid/mlx/mlx.c

2043

bus_dmamap_sync(sc->mlx_buffer_dmat, mc->mc_dmamap, BUS_DMASYNC_PREWRITE);

sys/dev/raid/mlx/mlx.c

2048

mlx_unmapcmd(struct mlx_command *mc)

sys/dev/raid/mlx/mlx.c

2050

struct mlx_softc *sc = mc->mc_sc;

sys/dev/raid/mlx/mlx.c

2055

if (mc->mc_data != NULL) {

sys/dev/raid/mlx/mlx.c

2057

if (mc->mc_flags & MLX_CMD_DATAIN)

sys/dev/raid/mlx/mlx.c

2058

bus_dmamap_sync(sc->mlx_buffer_dmat, mc->mc_dmamap, BUS_DMASYNC_POSTREAD);

sys/dev/raid/mlx/mlx.c

2059

if (mc->mc_flags & MLX_CMD_DATAOUT)

sys/dev/raid/mlx/mlx.c

2060

bus_dmamap_sync(sc->mlx_buffer_dmat, mc->mc_dmamap, BUS_DMASYNC_POSTWRITE);

sys/dev/raid/mlx/mlx.c

2062

bus_dmamap_unload(sc->mlx_buffer_dmat, mc->mc_dmamap);

sys/dev/raid/mlx/mlx.c

2072

mlx_start(struct mlx_command *mc)

sys/dev/raid/mlx/mlx.c

2074

struct mlx_softc *sc = mc->mc_sc;

sys/dev/raid/mlx/mlx.c

2080

mc->mc_mailbox[0x1] = mc->mc_slot;

sys/dev/raid/mlx/mlx.c

2083

mc->mc_status = MLX_STATUS_BUSY;

sys/dev/raid/mlx/mlx.c

2086

mc->mc_timeout = time_uptime + 60;

sys/dev/raid/mlx/mlx.c

2091

if (sc->mlx_tryqueue(sc, mc)) {

sys/dev/raid/mlx/mlx.c

2094

TAILQ_INSERT_TAIL(&sc->mlx_work, mc, mc_link);

sys/dev/raid/mlx/mlx.c

2107

sc->mlx_busycmd[mc->mc_slot] = NULL;

sys/dev/raid/mlx/mlx.c

2109

mc->mc_status = MLX_STATUS_WEDGED;

sys/dev/raid/mlx/mlx.c

2124

struct mlx_command *mc;

sys/dev/raid/mlx/mlx.c

2139

mc = sc->mlx_busycmd[slot]; /* find command */

sys/dev/raid/mlx/mlx.c

2140

if (mc != NULL) { /* paranoia */

sys/dev/raid/mlx/mlx.c

2141

if (mc->mc_status == MLX_STATUS_BUSY) {

sys/dev/raid/mlx/mlx.c

2142

mc->mc_status = status; /* save status */

sys/dev/raid/mlx/mlx.c

2175

struct mlx_command *mc, *nc;

sys/dev/raid/mlx/mlx.c

2186

mc = TAILQ_FIRST(&sc->mlx_work);

sys/dev/raid/mlx/mlx.c

2187

while (mc != NULL) {

sys/dev/raid/mlx/mlx.c

2188

nc = TAILQ_NEXT(mc, mc_link);

sys/dev/raid/mlx/mlx.c

2191

if (mc->mc_status != MLX_STATUS_BUSY) {

sys/dev/raid/mlx/mlx.c

2194

mlx_unmapcmd(mc);

sys/dev/raid/mlx/mlx.c

2198

if (mc->mc_complete != NULL) {

sys/dev/raid/mlx/mlx.c

2200

TAILQ_REMOVE(&sc->mlx_work, mc, mc_link);

sys/dev/raid/mlx/mlx.c

2201

mc->mc_complete(mc);

sys/dev/raid/mlx/mlx.c

2206

} else if (mc->mc_private != NULL) { /* sleeping caller wants to know about it */

sys/dev/raid/mlx/mlx.c

2209

TAILQ_REMOVE(&sc->mlx_work, mc, mc_link);

sys/dev/raid/mlx/mlx.c

2210

wakeup_one(mc->mc_private);

sys/dev/raid/mlx/mlx.c

2218

mc = nc;

sys/dev/raid/mlx/mlx.c

2248

struct mlx_command *mc;

sys/dev/raid/mlx/mlx.c

2254

if ((mc = TAILQ_FIRST(&sc->mlx_freecmds)) != NULL)

sys/dev/raid/mlx/mlx.c

2255

TAILQ_REMOVE(&sc->mlx_freecmds, mc, mc_link);

sys/dev/raid/mlx/mlx.c

2259

if (mc == NULL) {

sys/dev/raid/mlx/mlx.c

2260

mc = kmalloc(sizeof(*mc), M_DEVBUF, M_INTWAIT | M_ZERO);

sys/dev/raid/mlx/mlx.c

2261

mc->mc_sc = sc;

sys/dev/raid/mlx/mlx.c

2262

error = bus_dmamap_create(sc->mlx_buffer_dmat, 0, &mc->mc_dmamap);

sys/dev/raid/mlx/mlx.c

2264

kfree(mc, M_DEVBUF);

sys/dev/raid/mlx/mlx.c

2268

return(mc);

sys/dev/raid/mlx/mlx.c

2278

mlx_releasecmd(struct mlx_command *mc)

sys/dev/raid/mlx/mlx.c

2283

TAILQ_INSERT_HEAD(&mc->mc_sc->mlx_freecmds, mc, mc_link);

sys/dev/raid/mlx/mlx.c

2291

mlx_freecmd(struct mlx_command *mc)

sys/dev/raid/mlx/mlx.c

2293

struct mlx_softc *sc = mc->mc_sc;

sys/dev/raid/mlx/mlx.c

2296

bus_dmamap_destroy(sc->mlx_buffer_dmat, mc->mc_dmamap);

sys/dev/raid/mlx/mlx.c

2297

kfree(mc, M_DEVBUF);

sys/dev/raid/mlx/mlx.c

2314

mlx_v3_tryqueue(struct mlx_softc *sc, struct mlx_command *mc)

sys/dev/raid/mlx/mlx.c

2324

MLX_V3_PUT_MAILBOX(sc, i, mc->mc_mailbox[i]);

sys/dev/raid/mlx/mlx.c

2433

mlx_v4_tryqueue(struct mlx_softc *sc, struct mlx_command *mc)

sys/dev/raid/mlx/mlx.c

2443

MLX_V4_PUT_MAILBOX(sc, i, mc->mc_mailbox[i]);

sys/dev/raid/mlx/mlx.c

2556

mlx_v5_tryqueue(struct mlx_softc *sc, struct mlx_command *mc)

sys/dev/raid/mlx/mlx.c

2566

MLX_V5_PUT_MAILBOX(sc, i, mc->mc_mailbox[i]);

sys/dev/raid/mlx/mlx.c

2738

mlx_diagnose_command(struct mlx_command *mc)

sys/dev/raid/mlx/mlx.c

2745

if (((mc->mc_mailbox[0] == mlx_messages[i].command) || (mlx_messages[i].command == 0)) &&

sys/dev/raid/mlx/mlx.c

2746

(mc->mc_status == mlx_messages[i].status))

sys/dev/raid/mlx/mlx.c

2749

ksprintf(unkmsg, "unknown response 0x%x for command 0x%x", (int)mc->mc_status, (int)mc->mc_mailbox[0]);

sys/dev/raid/mlx/mlx.c

64

static int mlx_v3_tryqueue(struct mlx_softc *sc, struct mlx_command *mc);

sys/dev/raid/mlx/mlx.c

69

static int mlx_v4_tryqueue(struct mlx_softc *sc, struct mlx_command *mc);

sys/dev/raid/mlx/mlx.c

74

static int mlx_v5_tryqueue(struct mlx_softc *sc, struct mlx_command *mc);

sys/dev/raid/mlx/mlx.c

83

static void mlx_periodic_enquiry(struct mlx_command *mc);

sys/dev/raid/mlx/mlx.c

85

static void mlx_periodic_eventlog_respond(struct mlx_command *mc);

sys/dev/raid/mlx/mlx.c

86

static void mlx_periodic_rebuild(struct mlx_command *mc);

sys/dev/raid/mlx/mlx.c

92

static void mlx_pause_done(struct mlx_command *mc);

sys/dev/raid/mlx/mlx.c

98

void (*complete)(struct mlx_command *mc));

sys/dev/raid/mlx/mlxreg.h

503

mlx_make_type1(struct mlx_command *mc,

sys/dev/raid/mlx/mlxreg.h

511

mc->mc_mailbox[0x0] = code;

sys/dev/raid/mlx/mlxreg.h

512

mc->mc_mailbox[0x2] = f1 & 0xff;

sys/dev/raid/mlx/mlxreg.h

513

mc->mc_mailbox[0x3] = (((f2 >> 24) & 0x3) << 6) | ((f1 >> 8) & 0x3f);

sys/dev/raid/mlx/mlxreg.h

514

mc->mc_mailbox[0x4] = f2 & 0xff;

sys/dev/raid/mlx/mlxreg.h

515

mc->mc_mailbox[0x5] = (f2 >> 8) & 0xff;

sys/dev/raid/mlx/mlxreg.h

516

mc->mc_mailbox[0x6] = (f2 >> 16) & 0xff;

sys/dev/raid/mlx/mlxreg.h

517

mc->mc_mailbox[0x7] = f3;

sys/dev/raid/mlx/mlxreg.h

518

mc->mc_mailbox[0x8] = f4 & 0xff;

sys/dev/raid/mlx/mlxreg.h

519

mc->mc_mailbox[0x9] = (f4 >> 8) & 0xff;

sys/dev/raid/mlx/mlxreg.h

520

mc->mc_mailbox[0xa] = (f4 >> 16) & 0xff;

sys/dev/raid/mlx/mlxreg.h

521

mc->mc_mailbox[0xb] = (f4 >> 24) & 0xff;

sys/dev/raid/mlx/mlxreg.h

522

mc->mc_mailbox[0xc] = f5;

sys/dev/raid/mlx/mlxreg.h

526

mlx_make_type2(struct mlx_command *mc,

sys/dev/raid/mlx/mlxreg.h

537

mc->mc_mailbox[0x0] = code;

sys/dev/raid/mlx/mlxreg.h

538

mc->mc_mailbox[0x2] = f1;

sys/dev/raid/mlx/mlxreg.h

539

mc->mc_mailbox[0x3] = f2;

sys/dev/raid/mlx/mlxreg.h

540

mc->mc_mailbox[0x4] = f3;

sys/dev/raid/mlx/mlxreg.h

541

mc->mc_mailbox[0x5] = f4;

sys/dev/raid/mlx/mlxreg.h

542

mc->mc_mailbox[0x6] = f5;

sys/dev/raid/mlx/mlxreg.h

543

mc->mc_mailbox[0x7] = f6;

sys/dev/raid/mlx/mlxreg.h

544

mc->mc_mailbox[0x8] = f7 & 0xff;

sys/dev/raid/mlx/mlxreg.h

545

mc->mc_mailbox[0x9] = (f7 >> 8) & 0xff;

sys/dev/raid/mlx/mlxreg.h

546

mc->mc_mailbox[0xa] = (f7 >> 16) & 0xff;

sys/dev/raid/mlx/mlxreg.h

547

mc->mc_mailbox[0xb] = (f7 >> 24) & 0xff;

sys/dev/raid/mlx/mlxreg.h

548

mc->mc_mailbox[0xc] = f8;

sys/dev/raid/mlx/mlxreg.h

552

mlx_make_type3(struct mlx_command *mc,

sys/dev/raid/mlx/mlxreg.h

562

mc->mc_mailbox[0x0] = code;

sys/dev/raid/mlx/mlxreg.h

563

mc->mc_mailbox[0x2] = f1;

sys/dev/raid/mlx/mlxreg.h

564

mc->mc_mailbox[0x3] = f2;

sys/dev/raid/mlx/mlxreg.h

565

mc->mc_mailbox[0x4] = f3 & 0xff;

sys/dev/raid/mlx/mlxreg.h

566

mc->mc_mailbox[0x5] = (f3 >> 8) & 0xff;

sys/dev/raid/mlx/mlxreg.h

567

mc->mc_mailbox[0x6] = f4;

sys/dev/raid/mlx/mlxreg.h

568

mc->mc_mailbox[0x7] = f5;

sys/dev/raid/mlx/mlxreg.h

569

mc->mc_mailbox[0x8] = f6 & 0xff;

sys/dev/raid/mlx/mlxreg.h

570

mc->mc_mailbox[0x9] = (f6 >> 8) & 0xff;

sys/dev/raid/mlx/mlxreg.h

571

mc->mc_mailbox[0xa] = (f6 >> 16) & 0xff;

sys/dev/raid/mlx/mlxreg.h

572

mc->mc_mailbox[0xb] = (f6 >> 24) & 0xff;

sys/dev/raid/mlx/mlxreg.h

573

mc->mc_mailbox[0xc] = f7;

sys/dev/raid/mlx/mlxreg.h

577

mlx_make_type4(struct mlx_command *mc,

sys/dev/raid/mlx/mlxreg.h

584

mc->mc_mailbox[0x0] = code;

sys/dev/raid/mlx/mlxreg.h

585

mc->mc_mailbox[0x2] = f1 & 0xff;

sys/dev/raid/mlx/mlxreg.h

586

mc->mc_mailbox[0x3] = (f1 >> 8) & 0xff;

sys/dev/raid/mlx/mlxreg.h

587

mc->mc_mailbox[0x4] = f2 & 0xff;

sys/dev/raid/mlx/mlxreg.h

588

mc->mc_mailbox[0x5] = (f2 >> 8) & 0xff;

sys/dev/raid/mlx/mlxreg.h

589

mc->mc_mailbox[0x6] = (f2 >> 16) & 0xff;

sys/dev/raid/mlx/mlxreg.h

590

mc->mc_mailbox[0x7] = (f2 >> 24) & 0xff;

sys/dev/raid/mlx/mlxreg.h

591

mc->mc_mailbox[0x8] = f3 & 0xff;

sys/dev/raid/mlx/mlxreg.h

592

mc->mc_mailbox[0x9] = (f3 >> 8) & 0xff;

sys/dev/raid/mlx/mlxreg.h

593

mc->mc_mailbox[0xa] = (f3 >> 16) & 0xff;

sys/dev/raid/mlx/mlxreg.h

594

mc->mc_mailbox[0xb] = (f3 >> 24) & 0xff;

sys/dev/raid/mlx/mlxreg.h

595

mc->mc_mailbox[0xc] = f4;

sys/dev/raid/mlx/mlxreg.h

599

mlx_make_type5(struct mlx_command *mc,

sys/dev/raid/mlx/mlxreg.h

607

mc->mc_mailbox[0x0] = code;

sys/dev/raid/mlx/mlxreg.h

608

mc->mc_mailbox[0x2] = f1;

sys/dev/raid/mlx/mlxreg.h

609

mc->mc_mailbox[0x3] = f2;

sys/dev/raid/mlx/mlxreg.h

610

mc->mc_mailbox[0x4] = f3 & 0xff;

sys/dev/raid/mlx/mlxreg.h

611

mc->mc_mailbox[0x5] = (f3 >> 8) & 0xff;

sys/dev/raid/mlx/mlxreg.h

612

mc->mc_mailbox[0x6] = (f3 >> 16) & 0xff;

sys/dev/raid/mlx/mlxreg.h

613

mc->mc_mailbox[0x7] = (f3 >> 24) & 0xff;

sys/dev/raid/mlx/mlxreg.h

614

mc->mc_mailbox[0x8] = f4 & 0xff;

sys/dev/raid/mlx/mlxreg.h

615

mc->mc_mailbox[0x9] = (f4 >> 8) & 0xff;

sys/dev/raid/mlx/mlxreg.h

616

mc->mc_mailbox[0xa] = (f4 >> 16) & 0xff;

sys/dev/raid/mlx/mlxreg.h

617

mc->mc_mailbox[0xb] = (f4 >> 24) & 0xff;

sys/dev/raid/mlx/mlxreg.h

618

mc->mc_mailbox[0xc] = f5;

sys/dev/raid/mlx/mlxvar.h

100

void (* mc_complete)(struct mlx_command *mc); /* completion handler */

sys/dev/raid/mlx/mlxvar.h

172

int (* mlx_tryqueue)(struct mlx_softc *sc, struct mlx_command *mc);

sys/dev/raid/mly/mly.c

107

static void mly_cam_complete(struct mly_command *mc);

sys/dev/raid/mly/mly.c

1088

struct mly_command *mc;

sys/dev/raid/mly/mly.c

1094

mc = NULL;

sys/dev/raid/mly/mly.c

1095

if (mly_alloc_command(sc, &mc)) {

sys/dev/raid/mly/mly.c

1101

mci = &mc->mc_packet->ioctl;

sys/dev/raid/mly/mly.c

1113

mc->mc_data = kmalloc(datasize, M_DEVBUF, M_INTWAIT);

sys/dev/raid/mly/mly.c

1114

mc->mc_flags |= MLY_CMD_DATAIN;

sys/dev/raid/mly/mly.c

1116

mc->mc_data = *data;

sys/dev/raid/mly/mly.c

1117

mc->mc_flags |= MLY_CMD_DATAOUT;

sys/dev/raid/mly/mly.c

1119

mc->mc_length = datasize;

sys/dev/raid/mly/mly.c

1120

mc->mc_packet->generic.data_size = datasize;

sys/dev/raid/mly/mly.c

1124

if ((error = mly_immediate_command(mc)))

sys/dev/raid/mly/mly.c

1128

*status = mc->mc_status;

sys/dev/raid/mly/mly.c

1129

if ((mc->mc_sense > 0) && (sense_buffer != NULL)) {

sys/dev/raid/mly/mly.c

1130

bcopy(mc->mc_packet, sense_buffer, mc->mc_sense);

sys/dev/raid/mly/mly.c

1131

*sense_length = mc->mc_sense;

sys/dev/raid/mly/mly.c

1137

*data = mc->mc_data;

sys/dev/raid/mly/mly.c

1143

if (mc != NULL) {

sys/dev/raid/mly/mly.c

1145

if (error && (mc->mc_data != NULL) && (*data == NULL))

sys/dev/raid/mly/mly.c

1146

kfree(mc->mc_data, M_DEVBUF);

sys/dev/raid/mly/mly.c

1147

mly_release_command(mc);

sys/dev/raid/mly/mly.c

116

static void mly_print_command(struct mly_command *mc);

sys/dev/raid/mly/mly.c

117

static void mly_print_packet(struct mly_command *mc);

sys/dev/raid/mly/mly.c

1187

struct mly_command *mc;

sys/dev/raid/mly/mly.c

1194

if (mly_alloc_command(sc, &mc))

sys/dev/raid/mly/mly.c

1198

mc->mc_data = kmalloc(sizeof(struct mly_event), M_DEVBUF, M_INTWAIT|M_ZERO);

sys/dev/raid/mly/mly.c

1199

mc->mc_length = sizeof(struct mly_event);

sys/dev/raid/mly/mly.c

1200

mc->mc_flags |= MLY_CMD_DATAIN;

sys/dev/raid/mly/mly.c

1201

mc->mc_complete = mly_complete_event;

sys/dev/raid/mly/mly.c

1209

mly_release_command(mc);

sys/dev/raid/mly/mly.c

1222

mci = (struct mly_command_ioctl *)&mc->mc_packet->ioctl;

sys/dev/raid/mly/mly.c

1242

if (mly_start(mc) != 0) {

sys/dev/raid/mly/mly.c

1244

mly_release_command(mc);

sys/dev/raid/mly/mly.c

1252

mly_complete_event(struct mly_command *mc)

sys/dev/raid/mly/mly.c

1254

struct mly_softc *sc = mc->mc_sc;

sys/dev/raid/mly/mly.c

1255

struct mly_event *me = (struct mly_event *)mc->mc_data;

sys/dev/raid/mly/mly.c

1262

if (mc->mc_status == SCSI_STATUS_OK) {

sys/dev/raid/mly/mly.c

1266

mly_release_command(mc);

sys/dev/raid/mly/mly.c

1411

mly_immediate_command(struct mly_command *mc)

sys/dev/raid/mly/mly.c

1413

struct mly_softc *sc = mc->mc_sc;

sys/dev/raid/mly/mly.c

1420

if ((error = mly_start(mc))) {

sys/dev/raid/mly/mly.c

1427

while(!(mc->mc_flags & MLY_CMD_COMPLETE)) {

sys/dev/raid/mly/mly.c

1428

tsleep(mc, 0, "mlywait", 0);

sys/dev/raid/mly/mly.c

1432

while(!(mc->mc_flags & MLY_CMD_COMPLETE)) {

sys/dev/raid/mly/mly.c

1433

mly_done(mc->mc_sc);

sys/dev/raid/mly/mly.c

1448

mly_start(struct mly_command *mc)

sys/dev/raid/mly/mly.c

1450

struct mly_softc *sc = mc->mc_sc;

sys/dev/raid/mly/mly.c

1458

mly_map_command(mc);

sys/dev/raid/mly/mly.c

1459

mc->mc_packet->generic.command_id = mc->mc_slot;

sys/dev/raid/mly/mly.c

1462

mc->mc_timestamp = time_uptime;

sys/dev/raid/mly/mly.c

1478

mc->mc_flags |= MLY_CMD_BUSY;

sys/dev/raid/mly/mly.c

1483

MLY_SET_MBOX(sc, sc->mly_command_mailbox, &mc->mc_packetphys);

sys/dev/raid/mly/mly.c

1495

mc->mc_flags |= MLY_CMD_BUSY;

sys/dev/raid/mly/mly.c

1498

bcopy(mc->mc_packet->mmbox.data, pkt->mmbox.data, sizeof(pkt->mmbox.data));

sys/dev/raid/mly/mly.c

1503

pkt->mmbox.flag = mc->mc_packet->mmbox.flag;

sys/dev/raid/mly/mly.c

1513

mly_enqueue_busy(mc);

sys/dev/raid/mly/mly.c

1524

struct mly_command *mc;

sys/dev/raid/mly/mly.c

1536

mc = &sc->mly_command[slot - MLY_SLOT_START];

sys/dev/raid/mly/mly.c

1537

mc->mc_status = MLY_GET_REG(sc, sc->mly_status_mailbox + 2);

sys/dev/raid/mly/mly.c

1538

mc->mc_sense = MLY_GET_REG(sc, sc->mly_status_mailbox + 3);

sys/dev/raid/mly/mly.c

1539

mc->mc_resid = MLY_GET_REG4(sc, sc->mly_status_mailbox + 4);

sys/dev/raid/mly/mly.c

1540

mly_remove_busy(mc);

sys/dev/raid/mly/mly.c

1541

mc->mc_flags &= ~MLY_CMD_BUSY;

sys/dev/raid/mly/mly.c

1542

mly_enqueue_complete(mc);

sys/dev/raid/mly/mly.c

1565

mc = &sc->mly_command[slot - MLY_SLOT_START];

sys/dev/raid/mly/mly.c

1566

mc->mc_status = sp->status.status;

sys/dev/raid/mly/mly.c

1567

mc->mc_sense = sp->status.sense_length;

sys/dev/raid/mly/mly.c

1568

mc->mc_resid = sp->status.residue;

sys/dev/raid/mly/mly.c

1569

mly_remove_busy(mc);

sys/dev/raid/mly/mly.c

1570

mc->mc_flags &= ~MLY_CMD_BUSY;

sys/dev/raid/mly/mly.c

1571

mly_enqueue_complete(mc);

sys/dev/raid/mly/mly.c

1603

struct mly_command *mc;

sys/dev/raid/mly/mly.c

1604

void (* mc_complete)(struct mly_command *mc);

sys/dev/raid/mly/mly.c

1612

while ((mc = mly_dequeue_complete(sc)) != NULL) {

sys/dev/raid/mly/mly.c

1622

mly_unmap_command(mc);

sys/dev/raid/mly/mly.c

1623

mc_complete = mc->mc_complete;

sys/dev/raid/mly/mly.c

1624

mc->mc_flags |= MLY_CMD_COMPLETE;

sys/dev/raid/mly/mly.c

1630

mc_complete(mc);

sys/dev/raid/mly/mly.c

1632

wakeup(mc);

sys/dev/raid/mly/mly.c

1654

struct mly_command *mc;

sys/dev/raid/mly/mly.c

1658

if ((mc = mly_dequeue_free(sc)) == NULL) {

sys/dev/raid/mly/mly.c

1663

*mcp = mc;

sys/dev/raid/mly/mly.c

1671

mly_release_command(struct mly_command *mc)

sys/dev/raid/mly/mly.c

1679

mc->mc_data = NULL;

sys/dev/raid/mly/mly.c

1680

mc->mc_flags = 0;

sys/dev/raid/mly/mly.c

1681

mc->mc_complete = NULL;

sys/dev/raid/mly/mly.c

1682

mc->mc_private = NULL;

sys/dev/raid/mly/mly.c

1688

mc->mc_packet->generic.sense_buffer_address = mc->mc_packetphys;

sys/dev/raid/mly/mly.c

1689

mc->mc_packet->generic.maximum_sense_size = sizeof(union mly_command_packet);

sys/dev/raid/mly/mly.c

1691

mly_enqueue_free(mc);

sys/dev/raid/mly/mly.c

1718

struct mly_command *mc;

sys/dev/raid/mly/mly.c

1741

mc = &sc->mly_command[i];

sys/dev/raid/mly/mly.c

1742

bzero(mc, sizeof(*mc));

sys/dev/raid/mly/mly.c

1743

mc->mc_sc = sc;

sys/dev/raid/mly/mly.c

1744

mc->mc_slot = MLY_SLOT_START + i;

sys/dev/raid/mly/mly.c

1745

mc->mc_packet = sc->mly_packet + i;

sys/dev/raid/mly/mly.c

1746

mc->mc_packetphys = sc->mly_packetphys + (i * sizeof(union mly_command_packet));

sys/dev/raid/mly/mly.c

1747

if (!bus_dmamap_create(sc->mly_buffer_dmat, 0, &mc->mc_datamap))

sys/dev/raid/mly/mly.c

1748

mly_release_command(mc);

sys/dev/raid/mly/mly.c

1761

struct mly_command *mc;

sys/dev/raid/mly/mly.c

1764

while (mly_alloc_command(sc, &mc) == 0)

sys/dev/raid/mly/mly.c

1765

bus_dmamap_destroy(sc->mly_buffer_dmat, mc->mc_datamap);

sys/dev/raid/mly/mly.c

1783

struct mly_command *mc = (struct mly_command *)arg;

sys/dev/raid/mly/mly.c

1784

struct mly_softc *sc = mc->mc_sc;

sys/dev/raid/mly/mly.c

1785

struct mly_command_generic *gen = &(mc->mc_packet->generic);

sys/dev/raid/mly/mly.c

1796

tabofs = ((mc->mc_slot - MLY_SLOT_START) * MLY_MAX_SGENTRIES);

sys/dev/raid/mly/mly.c

1820

struct mly_command *mc = (struct mly_command *)arg;

sys/dev/raid/mly/mly.c

1826

((segs[0].ds_addr + mc->mc_packet->scsi_large.cdb_length) % PAGE_SIZE))

sys/dev/raid/mly/mly.c

1830

mc->mc_packet->scsi_large.cdb_physaddr = segs[0].ds_addr;

sys/dev/raid/mly/mly.c

1838

mly_map_command(struct mly_command *mc)

sys/dev/raid/mly/mly.c

1840

struct mly_softc *sc = mc->mc_sc;

sys/dev/raid/mly/mly.c

1845

if (mc->mc_flags & MLY_CMD_MAPPED)

sys/dev/raid/mly/mly.c

1849

if (mc->mc_data != NULL) {

sys/dev/raid/mly/mly.c

1850

bus_dmamap_load(sc->mly_buffer_dmat, mc->mc_datamap, mc->mc_data, mc->mc_length,

sys/dev/raid/mly/mly.c

1851

mly_map_command_sg, mc, 0);

sys/dev/raid/mly/mly.c

1853

if (mc->mc_flags & MLY_CMD_DATAIN)

sys/dev/raid/mly/mly.c

1854

bus_dmamap_sync(sc->mly_buffer_dmat, mc->mc_datamap, BUS_DMASYNC_PREREAD);

sys/dev/raid/mly/mly.c

1855

if (mc->mc_flags & MLY_CMD_DATAOUT)

sys/dev/raid/mly/mly.c

1856

bus_dmamap_sync(sc->mly_buffer_dmat, mc->mc_datamap, BUS_DMASYNC_PREWRITE);

sys/dev/raid/mly/mly.c

1858

mc->mc_flags |= MLY_CMD_MAPPED;

sys/dev/raid/mly/mly.c

1865

mly_unmap_command(struct mly_command *mc)

sys/dev/raid/mly/mly.c

1867

struct mly_softc *sc = mc->mc_sc;

sys/dev/raid/mly/mly.c

1871

if (!(mc->mc_flags & MLY_CMD_MAPPED))

sys/dev/raid/mly/mly.c

1875

if (mc->mc_data != NULL) {

sys/dev/raid/mly/mly.c

1876

if (mc->mc_flags & MLY_CMD_DATAIN)

sys/dev/raid/mly/mly.c

1877

bus_dmamap_sync(sc->mly_buffer_dmat, mc->mc_datamap, BUS_DMASYNC_POSTREAD);

sys/dev/raid/mly/mly.c

1878

if (mc->mc_flags & MLY_CMD_DATAOUT)

sys/dev/raid/mly/mly.c

1879

bus_dmamap_sync(sc->mly_buffer_dmat, mc->mc_datamap, BUS_DMASYNC_POSTWRITE);

sys/dev/raid/mly/mly.c

1881

bus_dmamap_unload(sc->mly_buffer_dmat, mc->mc_datamap);

sys/dev/raid/mly/mly.c

1883

mc->mc_flags &= ~MLY_CMD_MAPPED;

sys/dev/raid/mly/mly.c

2176

struct mly_command *mc;

sys/dev/raid/mly/mly.c

2237

if ((error = mly_alloc_command(sc, &mc))) {

sys/dev/raid/mly/mly.c

2247

mc->mc_data = csio->data_ptr;

sys/dev/raid/mly/mly.c

2248

mc->mc_length = csio->dxfer_len;

sys/dev/raid/mly/mly.c

2249

mc->mc_complete = mly_cam_complete;

sys/dev/raid/mly/mly.c

2250

mc->mc_private = csio;

sys/dev/raid/mly/mly.c

2256

ss = &mc->mc_packet->scsi_small;

sys/dev/raid/mly/mly.c

2285

if ((error = mly_start(mc))) {

sys/dev/raid/mly/mly.c

2314

mly_cam_complete(struct mly_command *mc)

sys/dev/raid/mly/mly.c

2316

struct mly_softc *sc = mc->mc_sc;

sys/dev/raid/mly/mly.c

2317

struct ccb_scsiio *csio = (struct ccb_scsiio *)mc->mc_private;

sys/dev/raid/mly/mly.c

2325

csio->scsi_status = mc->mc_status;

sys/dev/raid/mly/mly.c

2326

switch(mc->mc_status) {

sys/dev/raid/mly/mly.c

2354

debug(1, "SCSI_STATUS_CHECK_COND sense %d resid %d", mc->mc_sense, mc->mc_resid);

sys/dev/raid/mly/mly.c

2357

bcopy(mc->mc_packet, &csio->sense_data, mc->mc_sense);

sys/dev/raid/mly/mly.c

2358

csio->sense_len = mc->mc_sense;

sys/dev/raid/mly/mly.c

2360

csio->resid = mc->mc_resid; /* XXX this is a signed value... */

sys/dev/raid/mly/mly.c

2382

mly_release_command(mc);

sys/dev/raid/mly/mly.c

2592

mly_print_command(struct mly_command *mc)

sys/dev/raid/mly/mly.c

2594

struct mly_softc *sc = mc->mc_sc;

sys/dev/raid/mly/mly.c

2596

mly_printf(sc, "COMMAND @ %p\n", mc);

sys/dev/raid/mly/mly.c

2597

mly_printf(sc, " slot %d\n", mc->mc_slot);

sys/dev/raid/mly/mly.c

2598

mly_printf(sc, " status 0x%x\n", mc->mc_status);

sys/dev/raid/mly/mly.c

2599

mly_printf(sc, " sense len %d\n", mc->mc_sense);

sys/dev/raid/mly/mly.c

2600

mly_printf(sc, " resid %d\n", mc->mc_resid);

sys/dev/raid/mly/mly.c

2601

mly_printf(sc, " packet %p/0x%llx\n", mc->mc_packet, mc->mc_packetphys);

sys/dev/raid/mly/mly.c

2602

if (mc->mc_packet != NULL)

sys/dev/raid/mly/mly.c

2603

mly_print_packet(mc);

sys/dev/raid/mly/mly.c

2604

mly_printf(sc, " data %p/%d\n", mc->mc_data, mc->mc_length);

sys/dev/raid/mly/mly.c

2607

mc->mc_flags);

sys/dev/raid/mly/mly.c

2608

mly_printf(sc, " complete %p\n", mc->mc_complete);

sys/dev/raid/mly/mly.c

2609

mly_printf(sc, " private %p\n", mc->mc_private);

sys/dev/raid/mly/mly.c

2616

mly_print_packet(struct mly_command *mc)

sys/dev/raid/mly/mly.c

2618

struct mly_softc *sc = mc->mc_sc;

sys/dev/raid/mly/mly.c

2619

struct mly_command_generic *ge = (struct mly_command_generic *)mc->mc_packet;

sys/dev/raid/mly/mly.c

2620

struct mly_command_scsi_small *ss = (struct mly_command_scsi_small *)mc->mc_packet;

sys/dev/raid/mly/mly.c

2621

struct mly_command_scsi_large *sl = (struct mly_command_scsi_large *)mc->mc_packet;

sys/dev/raid/mly/mly.c

2622

struct mly_command_ioctl *io = (struct mly_command_ioctl *)mc->mc_packet;

sys/dev/raid/mly/mly.c

2879

struct mly_command *mc;

sys/dev/raid/mly/mly.c

2883

if (mly_alloc_command(sc, &mc)) {

sys/dev/raid/mly/mly.c

2889

mc->mc_length = (uc->DataTransferLength >= 0) ? uc->DataTransferLength : -uc->DataTransferLength;

sys/dev/raid/mly/mly.c

2890

if (mc->mc_length > 0)

sys/dev/raid/mly/mly.c

2891

mc->mc_data = kmalloc(mc->mc_length, M_DEVBUF, M_INTWAIT);

sys/dev/raid/mly/mly.c

2893

mc->mc_flags |= MLY_CMD_DATAIN;

sys/dev/raid/mly/mly.c

2894

bzero(mc->mc_data, mc->mc_length);

sys/dev/raid/mly/mly.c

2897

mc->mc_flags |= MLY_CMD_DATAOUT;

sys/dev/raid/mly/mly.c

2898

if ((error = copyin(uc->DataTransferBuffer, mc->mc_data, mc->mc_length)) != 0)

sys/dev/raid/mly/mly.c

2903

bcopy(&uc->CommandMailbox, mc->mc_packet, sizeof(uc->CommandMailbox));

sys/dev/raid/mly/mly.c

2906

mc->mc_complete = NULL;

sys/dev/raid/mly/mly.c

2909

if ((error = mly_start(mc)) != 0)

sys/dev/raid/mly/mly.c

2912

while (!(mc->mc_flags & MLY_CMD_COMPLETE))

sys/dev/raid/mly/mly.c

2913

tsleep(mc, 0, "mlyioctl", 0);

sys/dev/raid/mly/mly.c

2918

if ((error = copyout(mc->mc_data, uc->DataTransferBuffer, mc->mc_length)) != 0)

sys/dev/raid/mly/mly.c

2922

if ((uc->RequestSenseLength > 0) && (mc->mc_sense > 0)) {

sys/dev/raid/mly/mly.c

2923

if ((error = copyout(mc->mc_packet, uc->RequestSenseBuffer,

sys/dev/raid/mly/mly.c

2924

min(uc->RequestSenseLength, mc->mc_sense))) != 0)

sys/dev/raid/mly/mly.c

2929

uc->DataTransferLength = mc->mc_resid;

sys/dev/raid/mly/mly.c

2930

uc->RequestSenseLength = min(uc->RequestSenseLength, mc->mc_sense);

sys/dev/raid/mly/mly.c

2931

uc->CommandStatus = mc->mc_status;

sys/dev/raid/mly/mly.c

2935

if (mc->mc_data != NULL)

sys/dev/raid/mly/mly.c

2936

kfree(mc->mc_data, M_DEVBUF);

sys/dev/raid/mly/mly.c

2937

if (mc != NULL)

sys/dev/raid/mly/mly.c

2938

mly_release_command(mc);

sys/dev/raid/mly/mly.c

2975

struct mly_command *mc;

sys/dev/raid/mly/mly.c

2979

TAILQ_FOREACH(mc, &sc->mly_busy, mc_link) {

sys/dev/raid/mly/mly.c

2980

if ((mc->mc_timestamp < deadline)) {

sys/dev/raid/mly/mly.c

2982

"COMMAND %p TIMEOUT AFTER %d SECONDS\n", mc,

sys/dev/raid/mly/mly.c

2983

(int)(time_uptime - mc->mc_timestamp));

sys/dev/raid/mly/mly.c

75

static void mly_complete_rescan(struct mly_command *mc);

sys/dev/raid/mly/mly.c

819

struct mly_command *mc;

sys/dev/raid/mly/mly.c

829

if (mly_alloc_command(sc, &mc))

sys/dev/raid/mly/mly.c

83

static void mly_complete_event(struct mly_command *mc);

sys/dev/raid/mly/mly.c

833

mc->mc_data = kmalloc(sizeof(union mly_devinfo), M_DEVBUF, M_INTWAIT | M_ZERO);

sys/dev/raid/mly/mly.c

834

mc->mc_flags |= MLY_CMD_DATAIN;

sys/dev/raid/mly/mly.c

835

mc->mc_complete = mly_complete_rescan;

sys/dev/raid/mly/mly.c

840

mci = (struct mly_command_ioctl *)&mc->mc_packet->ioctl;

sys/dev/raid/mly/mly.c

846

mc->mc_length = mci->data_size = sizeof(struct mly_ioctl_getlogdevinfovalid);

sys/dev/raid/mly/mly.c

851

mc->mc_length = mci->data_size = sizeof(struct mly_ioctl_getphysdevinfovalid);

sys/dev/raid/mly/mly.c

863

if (mly_start(mc) != 0) {

sys/dev/raid/mly/mly.c

864

mly_release_command(mc);

sys/dev/raid/mly/mly.c

87

static int mly_immediate_command(struct mly_command *mc);

sys/dev/raid/mly/mly.c

874

mly_complete_rescan(struct mly_command *mc)

sys/dev/raid/mly/mly.c

876

struct mly_softc *sc = mc->mc_sc;

sys/dev/raid/mly/mly.c

88

static int mly_start(struct mly_command *mc);

sys/dev/raid/mly/mly.c

889

mci = (struct mly_command_ioctl *)&mc->mc_packet->ioctl;

sys/dev/raid/mly/mly.c

903

if (mc->mc_status == 0) {

sys/dev/raid/mly/mly.c

904

if (mc->mc_length == sizeof(*ldi)) {

sys/dev/raid/mly/mly.c

905

ldi = (struct mly_ioctl_getlogdevinfovalid *)mc->mc_data;

sys/dev/raid/mly/mly.c

919

} else if (mc->mc_length == sizeof(*pdi)) {

sys/dev/raid/mly/mly.c

920

pdi = (struct mly_ioctl_getphysdevinfovalid *)mc->mc_data;

sys/dev/raid/mly/mly.c

93

static void mly_release_command(struct mly_command *mc);

sys/dev/raid/mly/mly.c

940

kfree(mc->mc_data, M_DEVBUF);

sys/dev/raid/mly/mly.c

941

mly_release_command(mc);

sys/dev/raid/mly/mly.c

97

static void mly_map_command(struct mly_command *mc);

sys/dev/raid/mly/mly.c

98

static void mly_unmap_command(struct mly_command *mc);

sys/dev/raid/mly/mlyvar.h

142

void (* mc_complete)(struct mly_command *mc); /* completion handler */

sys/dev/raid/mly/mlyvar.h

317

mly_enqueue_ ## name (struct mly_command *mc) \

sys/dev/raid/mly/mlyvar.h

320

TAILQ_INSERT_TAIL(&mc->mc_sc->mly_ ## name, mc, mc_link); \

sys/dev/raid/mly/mlyvar.h

321

MLYQ_ADD(mc->mc_sc, index); \

sys/dev/raid/mly/mlyvar.h

325

mly_requeue_ ## name (struct mly_command *mc) \

sys/dev/raid/mly/mlyvar.h

328

TAILQ_INSERT_HEAD(&mc->mc_sc->mly_ ## name, mc, mc_link); \

sys/dev/raid/mly/mlyvar.h

329

MLYQ_ADD(mc->mc_sc, index); \

sys/dev/raid/mly/mlyvar.h

335

struct mly_command *mc; \

sys/dev/raid/mly/mlyvar.h

338

if ((mc = TAILQ_FIRST(&sc->mly_ ## name)) != NULL) { \

sys/dev/raid/mly/mlyvar.h

339

TAILQ_REMOVE(&sc->mly_ ## name, mc, mc_link); \

sys/dev/raid/mly/mlyvar.h

343

return(mc); \

sys/dev/raid/mly/mlyvar.h

346

mly_remove_ ## name (struct mly_command *mc) \

sys/dev/raid/mly/mlyvar.h

349

TAILQ_REMOVE(&mc->mc_sc->mly_ ## name, mc, mc_link); \

sys/dev/raid/mly/mlyvar.h

350

MLYQ_REMOVE(mc->mc_sc, index); \

sys/dev/raid/tws/tws.c

70

int tws_init_connect(struct tws_softc *sc, u_int16_t mc);

sys/dev/raid/tws/tws_cam.c

127

extern int tws_init_connect(struct tws_softc *sc, u_int16_t mc);

sys/dev/raid/tws/tws_hdm.c

61

int tws_init_connect(struct tws_softc *sc, u_int16_t mc);

sys/dev/raid/vinum/vinum.c

54

extern struct mc malloced[];

sys/dev/raid/vinum/vinumio.h

175

#define VINUM_MALLOCINFO _IOWR(L, 80, struct mc)

sys/dev/raid/vinum/vinummemory.c

169

bcopy(&malloced[i + 1], &malloced[i], (malloccount - i) * sizeof(struct mc));

sys/dev/raid/vinum/vinummemory.c

197

struct mc *m = (struct mc *) data;

sys/dev/raid/vinum/vinummemory.c

87

struct mc malloced[MALLOCENTRIES];

sys/dev/raid/vinum/vinummemory.c

92

struct mc freeinfo[FREECOUNT];

sys/dev/raid/vinum/vinumvar.h

657

struct mc *malloced; /* pointer to kernel table */

sys/net/bpf.c

586

struct mbuf *mc = NULL;

sys/net/bpf.c

590

mc = m_dup(bmsg->nm_mbuf, M_NOWAIT);

sys/net/bpf.c

591

if (mc != NULL)

sys/net/bpf.c

592

mc->m_pkthdr.rcvif = ifp;

sys/net/bpf.c

601

if (mc != NULL) {

sys/net/bpf.c

603

mc->m_flags &= ~M_HASH;

sys/net/bpf.c

604

(*ifp->if_input)(ifp, mc, NULL, -1);

sys/net/bpf.c

606

m_freem(mc);

sys/net/bridge/if_bridge.c

2185

struct mbuf *mc;

sys/net/bridge/if_bridge.c

2315

mc = m;

sys/net/bridge/if_bridge.c

2317

mc = m_copypacket(m, M_NOWAIT);

sys/net/bridge/if_bridge.c

2318

if (mc == NULL) {

sys/net/bridge/if_bridge.c

2327

bridge_handoff(sc, dst_if, mc, from_us);

sys/net/bridge/if_bridge.c

2342

mc = m;

sys/net/bridge/if_bridge.c

2344

bridge_handoff(sc, alt_if, mc, from_us);

sys/net/bridge/if_bridge.c

2622

struct mbuf *mc, *mc2;

sys/net/bridge/if_bridge.c

2837

mc = m_dup(m, M_NOWAIT);

sys/net/bridge/if_bridge.c

2838

if (mc == NULL)

sys/net/bridge/if_bridge.c

2849

bridge_forward(sc, mc);

sys/net/bridge/if_bridge.c

3005

struct mbuf *mc;

sys/net/bridge/if_bridge.c

3053

mc = m;

sys/net/bridge/if_bridge.c

3056

mc = m_copypacket(m, M_NOWAIT);

sys/net/bridge/if_bridge.c

3057

if (mc == NULL) {

sys/net/bridge/if_bridge.c

3063

bridge_enqueue(dst_if, mc);

sys/net/bridge/if_bridge.c

3068

mc = m;

sys/net/bridge/if_bridge.c

3070

bridge_enqueue(alt_if, mc);

sys/net/bridge/if_bridge.c

3088

struct mbuf *mc;

sys/net/bridge/if_bridge.c

3205

mc = m;

sys/net/bridge/if_bridge.c

3208

mc = m_copypacket(m, M_NOWAIT);

sys/net/bridge/if_bridge.c

3209

if (mc == NULL) {

sys/net/bridge/if_bridge.c

3227

if (bridge_pfil(&mc, NULL, dst_if, PFIL_OUT) != 0)

sys/net/bridge/if_bridge.c

3229

if (mc == NULL)

sys/net/bridge/if_bridge.c

3232

bridge_handoff(sc, dst_if, mc, from_us);

sys/net/bridge/if_bridge.c

3242

mc = m;

sys/net/bridge/if_bridge.c

3244

bridge_enqueue(alt_if, mc);

sys/net/bridge/if_bridge.c

3262

struct mbuf *mc;

sys/net/bridge/if_bridge.c

3274

mc = m_copypacket(m, M_NOWAIT);

sys/net/bridge/if_bridge.c

3275

if (mc == NULL) {

sys/net/bridge/if_bridge.c

3279

bridge_enqueue(dst_if, mc);

sys/net/lagg/if_lagg.c

1299

struct lagg_mc *mc;

sys/net/lagg/if_lagg.c

1324

mc = kmalloc(sizeof(struct lagg_mc), M_DEVBUF, M_NOWAIT);

sys/net/lagg/if_lagg.c

1325

if (mc == NULL)

sys/net/lagg/if_lagg.c

1327

mc->mc_ifma = rifma;

sys/net/lagg/if_lagg.c

1328

SLIST_INSERT_HEAD(&lp->lp_mc_head, mc, mc_entries);

sys/net/lagg/if_lagg.c

1331

while ((mc = SLIST_FIRST(&lp->lp_mc_head)) != NULL) {

sys/net/lagg/if_lagg.c

1332

SLIST_REMOVE(&lp->lp_mc_head, mc, lagg_mc, mc_entries);

sys/net/lagg/if_lagg.c

1333

if_delmulti(ifp, (struct sockaddr *)mc->mc_ifma);

sys/net/lagg/if_lagg.c

1334

kfree(mc, M_DEVBUF);

sys/net/vlan/if_vlan.c

290

struct vlan_mc_entry *mc = NULL;

sys/net/vlan/if_vlan.c

312

mc = kmalloc(sizeof(struct vlan_mc_entry), M_VLAN, M_WAITOK);

sys/net/vlan/if_vlan.c

314

&mc->mc_addr, ETHER_ADDR_LEN);

sys/net/vlan/if_vlan.c

315

SLIST_INSERT_HEAD(&ifv->vlan_mc_listhead, mc, mc_entries);

sys/net/vlan/if_vlan.c

332

SLIST_FOREACH(mc, &ifv->vlan_mc_listhead, mc_entries) {

sys/net/vlan/if_vlan.c

335

bcopy(&mc->mc_addr, LLADDR(&sdl), ETHER_ADDR_LEN);

sys/net/vlan/if_vlan.c

348

struct vlan_mc_entry *mc;

sys/net/vlan/if_vlan.c

360

while ((mc = SLIST_FIRST(&ifv->vlan_mc_listhead)) != NULL) {

sys/net/vlan/if_vlan.c

361

bcopy(&mc->mc_addr, LLADDR(&sdl), ETHER_ADDR_LEN);

sys/net/vlan/if_vlan.c

365

kfree(mc, M_VLAN);

sys/netgraph7/ng_fec.c

529

struct ng_fec_mc *mc;

sys/netgraph7/ng_fec.c

551

mc = kmalloc(sizeof(struct ng_fec_mc), M_DEVBUF, M_WAITOK | M_NULLOK);

sys/netgraph7/ng_fec.c

552

if (mc == NULL)

sys/netgraph7/ng_fec.c

554

mc->mc_ifma = rifma;

sys/netgraph7/ng_fec.c

555

SLIST_INSERT_HEAD(&p->fec_mc_head, mc, mc_entries);

sys/netgraph7/ng_fec.c

558

while ((mc = SLIST_FIRST(&p->fec_mc_head)) != NULL) {

sys/netgraph7/ng_fec.c

559

SLIST_REMOVE(&p->fec_mc_head, mc, ng_fec_mc, mc_entries);

sys/netgraph7/ng_fec.c

560

if_delmulti_ifma(mc->mc_ifma);

sys/netgraph7/ng_fec.c

561

kfree(mc, M_DEVBUF);

sys/netproto/802_11/wlan/ieee80211_mesh.c

1171

const struct ieee80211_meshcntl *mc)

sys/netproto/802_11/wlan/ieee80211_mesh.c

1192

if (mc->mc_ttl < 1) {

sys/netproto/802_11/wlan/ieee80211_mesh.c

1280

#define MC01(mc) ((const struct ieee80211_meshcntl_ae01 *)mc)

sys/netproto/802_11/wlan/ieee80211_mesh.c

1284

const struct ieee80211_meshcntl_ae10 *mc;

sys/netproto/802_11/wlan/ieee80211_mesh.c

1298

mc = (const struct ieee80211_meshcntl_ae10 *)&b[hdrlen - meshdrlen];

sys/netproto/802_11/wlan/ieee80211_mesh.c

1316

ae = mc->mc_flags & IEEE80211_MESH_AE_MASK;

sys/netproto/802_11/wlan/ieee80211_mesh.c

1323

MC01(mc)->mc_addr4);

sys/netproto/802_11/wlan/ieee80211_mesh.c

1337

IEEE80211_ADDR_COPY(eh->ether_dhost, mc->mc_addr5);

sys/netproto/802_11/wlan/ieee80211_mesh.c

1338

IEEE80211_ADDR_COPY(eh->ether_shost, mc->mc_addr6);

sys/netproto/802_11/wlan/ieee80211_mesh.c

1371

const struct ieee80211_meshcntl *mc)

sys/netproto/802_11/wlan/ieee80211_mesh.c

1373

int ae = mc->mc_flags & 3;

sys/netproto/802_11/wlan/ieee80211_mesh.c

1381

(const struct ieee80211_meshcntl_ae10 *) mc;

sys/netproto/802_11/wlan/ieee80211_mesh.c

1399

struct ieee80211_frame *wh, const struct ieee80211_meshcntl *mc)

sys/netproto/802_11/wlan/ieee80211_mesh.c

1446

mesh_forward(vap, m, mc);

sys/netproto/802_11/wlan/ieee80211_mesh.c

1461

struct ieee80211_frame *wh, const struct ieee80211_meshcntl *mc)

sys/netproto/802_11/wlan/ieee80211_mesh.c

1473

mc10 = (const struct ieee80211_meshcntl_ae10 *)mc;

sys/netproto/802_11/wlan/ieee80211_mesh.c

1536

struct ieee80211_frame *wh, const struct ieee80211_meshcntl *mc)

sys/netproto/802_11/wlan/ieee80211_mesh.c

1538

#define MC01(mc) ((const struct ieee80211_meshcntl_ae01 *)mc)

sys/netproto/802_11/wlan/ieee80211_mesh.c

1544

mesh_forward(vap, m, mc);

sys/netproto/802_11/wlan/ieee80211_mesh.c

1546

if(mc->mc_ttl > 0) {

sys/netproto/802_11/wlan/ieee80211_mesh.c

1547

if (mc->mc_flags & IEEE80211_MESH_AE_01) {

sys/netproto/802_11/wlan/ieee80211_mesh.c

1557

MC01(mc)->mc_addr4, "%s",

sys/netproto/802_11/wlan/ieee80211_mesh.c

1570

#define MC01(mc) ((const struct ieee80211_meshcntl_ae01 *)mc)

sys/netproto/802_11/wlan/ieee80211_mesh.c

1571

#define MC10(mc) ((const struct ieee80211_meshcntl_ae10 *)mc)

sys/netproto/802_11/wlan/ieee80211_mesh.c

1576

const struct ieee80211_meshcntl *mc;

sys/netproto/802_11/wlan/ieee80211_mesh.c

1736

mc = (const struct ieee80211_meshcntl *)

sys/netproto/802_11/wlan/ieee80211_mesh.c

1738

ae = mc->mc_flags & IEEE80211_MESH_AE_MASK;

sys/netproto/802_11/wlan/ieee80211_mesh.c

1755

seq = le32dec(mc->mc_seq);

sys/netproto/802_11/wlan/ieee80211_mesh.c

1759

addr = MC01(mc)->mc_addr4;

sys/netproto/802_11/wlan/ieee80211_mesh.c

1777

mesh_recv_indiv_data_to_me(vap, m, wh, mc);

sys/netproto/802_11/wlan/ieee80211_mesh.c

1779

error = mesh_recv_group_data(vap, m, wh, mc);

sys/netproto/802_11/wlan/ieee80211_mesh.c

1782

wh, mc);

sys/netproto/802_11/wlan/ieee80211_mesh.c

1784

error = mesh_recv_group_data(vap, m, wh, mc);

sys/netproto/802_11/wlan/ieee80211_output.c

1342

#define MC01(mc) ((struct ieee80211_meshcntl_ae01 *)mc)

sys/netproto/802_11/wlan/ieee80211_output.c

1346

struct ieee80211_meshcntl_ae10 *mc;

sys/netproto/802_11/wlan/ieee80211_output.c

1574

mc = (struct ieee80211_meshcntl_ae10 *)

sys/netproto/802_11/wlan/ieee80211_output.c

1579

mc->mc_flags = 0;

sys/netproto/802_11/wlan/ieee80211_output.c

1608

mc->mc_flags = 1;

sys/netproto/802_11/wlan/ieee80211_output.c

1609

IEEE80211_ADDR_COPY(MC01(mc)->mc_addr4,

sys/netproto/802_11/wlan/ieee80211_output.c

1619

mc->mc_flags = IEEE80211_MESH_AE_10;

sys/netproto/802_11/wlan/ieee80211_output.c

1620

IEEE80211_ADDR_COPY(mc->mc_addr5, eh.ether_dhost);

sys/netproto/802_11/wlan/ieee80211_output.c

1621

IEEE80211_ADDR_COPY(mc->mc_addr6, eh.ether_shost);

sys/netproto/802_11/wlan/ieee80211_output.c

1628

mc->mc_ttl = ms->ms_ttl;

sys/netproto/802_11/wlan/ieee80211_output.c

1630

le32enc(mc->mc_seq, ms->ms_seq);

sys/vm/vm_pageout.c

317

vm_page_t mc[BLIST_MAX_ALLOC];

sys/vm/vm_pageout.c

341

mc[page_base] = m;

sys/vm/vm_pageout.c

403

mc[ib] = p;

sys/vm/vm_pageout.c

446

mc[is] = p;

sys/vm/vm_pageout.c

455

return vm_pageout_flush(&mc[ib], is - ib, vmflush_flags);

sys/vm/vm_pageout.c

471

vm_pageout_flush(vm_page_t *mc, int count, int vmflush_flags)

sys/vm/vm_pageout.c

482

KASSERT(mc[i]->valid == VM_PAGE_BITS_ALL,

sys/vm/vm_pageout.c

484

"invalid page", mc[i], i, count));

sys/vm/vm_pageout.c

485

vm_page_io_start(mc[i]);

sys/vm/vm_pageout.c

500

vm_page_protect(mc[i], VM_PROT_NONE);

sys/vm/vm_pageout.c

502

vm_page_protect(mc[i], VM_PROT_READ);

sys/vm/vm_pageout.c

503

vm_page_wakeup(mc[i]);

sys/vm/vm_pageout.c

506

object = mc[0]->object;

sys/vm/vm_pageout.c

509

vm_pager_put_pages(object, mc, count,

sys/vm/vm_pageout.c

515

vm_page_t mt = mc[i];

usr.bin/mail/list.c

117

int tok, beg, mc, star, other, valdot, colmod, colresult;

usr.bin/mail/list.c

124

mc = 0;

usr.bin/mail/list.c

139

mc++;

usr.bin/mail/list.c

233

mc = 0;

usr.bin/mail/list.c

238

mc++;

usr.bin/mail/list.c

240

if (mc == 0) {

usr.bin/mail/list.c

253

if ((np > namelist || colmod != 0) && mc == 0)

usr.bin/mail/list.c

265

for (mc = 0, np = &namelist[0]; *np != NULL; np++)

usr.bin/mail/list.c

268

mc++;

usr.bin/mail/list.c

274

mc++;

usr.bin/mail/list.c

278

if (mc == 0)

usr.bin/mail/list.c

286

mc = 0;

usr.bin/mail/list.c

289

mc++;

usr.bin/mail/list.c

292

if (mc == 0) {

usr.sbin/ifmcstat/ifmcstat.c

269

in6_multientry(struct in6_multi *mc)

usr.sbin/ifmcstat/ifmcstat.c

273

KREAD(mc, &multi, struct in6_multi);

usr.sbin/ifmcstat/ifmcstat.c

280

in6_multilist(struct in6_multi *mc)

usr.sbin/ifmcstat/ifmcstat.c

282

while (mc)

usr.sbin/ifmcstat/ifmcstat.c

283

mc = in6_multientry(mc);