bus_space_read_4
#define OREAD(sc, r) bus_space_read_4((sc)->bst, (sc)->bsh, (r))
value = bus_space_read_4(sc->regs_t, sc->regs_h, reg);
#define EREAD4(sc, a) bus_space_read_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (a))
bus_space_read_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (sc)->sc_offs+(a))
#define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (r)))
#define UREAD4(sc, r) (UBARR(sc), bus_space_read_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (r)))
bus_space_read_4((sc)->sc_io_tag, (sc)->sc_io_hdl, \
static __inline u_int32_t bus_space_read_4(bus_space_tag_t tag,
#define bus_space_read_stream_4(t, h, o) bus_space_read_4((t), (h), (o))
*Value = bus_space_read_4(ACPI_BUS_SPACE_IO, ACPI_BUS_HANDLE, InPort);
counter = bus_space_read_4(acpi_hpet_bst, acpi_hpet_bsh,
val = bus_space_read_4(acpi_hpet_bst, acpi_hpet_bsh, HPET_PERIOD);
val = bus_space_read_4(acpi_hpet_bst, acpi_hpet_bsh,
val = bus_space_read_4(acpi_hpet_bst, acpi_hpet_bsh,
val2 = bus_space_read_4(acpi_hpet_bst, acpi_hpet_bsh,
val = bus_space_read_4(acpi_hpet_bst, acpi_hpet_bsh, HPET_CONFIG);
val = bus_space_read_4(acpi_hpet_bst, acpi_hpet_bsh, HPET_CONFIG);
u1 = bus_space_read_4(acpi_hpet_bst, acpi_hpet_bsh, HPET_MAIN_COUNTER);
u2 = bus_space_read_4(acpi_hpet_bst, acpi_hpet_bsh,
u2 = bus_space_read_4(acpi_hpet_bst, acpi_hpet_bsh, HPET_MAIN_COUNTER);
r = bus_space_read_4(bt, bh, TPM_INTF_CAPABILITIES);
bus_space_read_4(bt, bh, TPM_ID) != 0xffffffff)
bus_space_read_4(sc->sc_bt, sc->sc_bh, TPM_INTERRUPT_ENABLE) &
bus_space_read_4(sc->sc_bt, sc->sc_bh, TPM_INT_STATUS));
r = bus_space_read_4(sc->sc_bt, sc->sc_bh, TPM_INTF_CAPABILITIES);
sc->sc_devid = bus_space_read_4(sc->sc_bt, sc->sc_bh, TPM_ID);
bus_space_read_4(sc->sc_bt, sc->sc_bh, TPM_INTERRUPT_ENABLE) |
bus_space_read_4(sc->sc_bt, sc->sc_bh, TPM_INTERRUPT_ENABLE) |
bus_space_read_4(sc->sc_bt, sc->sc_bh, TPM_INTERRUPT_ENABLE) &
bus_space_read_4(sc->sc_bt, sc->sc_bh, TPM_INTERRUPT_ENABLE) &
r = bus_space_read_4(sc->sc_bt, sc->sc_bh, TPM_INT_STATUS);
bus_space_read_4((adw)->tag, (adw)->bsh, port)
return (bus_space_read_4(sc->sc_iot, sc->sc_ioh, r));
return (bus_space_read_4(ap->ap_sc->sc_iot, ap->ap_ioh, r));
bus_space_read_4((amd)->tag, (amd)->bsh, port)
bus_space_read_4(isp->isp_bus_tag, isp->isp_bus_handle, off)
return (bus_space_read_4(mpt->pci_st, mpt->pci_sh, offset));
return (bus_space_read_4(mpt->pci_pio_st, mpt->pci_pio_sh, offset));
bus_space_read_4(rman_get_bustag((res)), \
#define INL(r) bus_space_read_4(np->bst, np->bsh, offsetof(struct ncr_reg, r))
#define INL_OFF(o) bus_space_read_4(np->bst, np->bsh, o)
bus_space_read_4(np->bst2, np->bsh2, off))
return (bus_space_read_4(sc->iot, sc->ioh, r));
return (bus_space_read_4(sc->sc_iot, sc->sc_ioh, r));
return (bus_space_read_4(ap->ap_sc->sc_iot, ap->ap_ioh, r));
#define trm_reg_read32(reg) bus_space_read_4(pACB->tag, pACB->bsh, reg)
bus_space_read_4((_sc)->ae_mem_bt, (_sc)->ae_mem_bh, (reg))
bus_space_read_4((_sc)->age_mem_bt, (_sc)->age_mem_bh, (reg))
bus_space_read_4(sc->alc_res_btag, sc->alc_res_bhand, (reg))
bus_space_read_4((_sc)->ale_mem_bt, (_sc)->ale_mem_bh, (reg))
val = bus_space_read_4(tag, h, reg);
val = bus_space_read_4(tag, h, reg);
bus_space_read_4(sc->bce_btag, sc->bce_bhandle, reg)
bus_space_read_4(sc->bfe_btag, sc->bfe_bhandle, reg)
bus_space_read_4(sc->bge_btag, sc->bge_bhandle, reg)
bus_space_read_4(sc->bnx_btag, sc->bnx_bhandle, reg)
bus_space_read_4((sc)->siba_mem_bt, (sc)->siba_mem_bh, \
bus_space_read_4((siba)->siba_mem_bt, (siba)->siba_mem_bh, (reg))
bus_space_read_4(sc->dc_btag, sc->dc_bhandle, reg)
bus_space_read_4((sc)->tulip_csrs_bst, \
bus_space_read_4((sc)->sc_mem_bt, (sc)->sc_mem_bh, (reg))
bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg))
bus_space_read_4(((struct e1000_osdep *)(hw)->back)->mem_bus_space_tag, \
bus_space_read_4(((struct e1000_osdep *)(hw)->back)->mem_bus_space_tag, \
bus_space_read_4(((struct e1000_osdep *)(hw)->back)->mem_bus_space_tag, \
bus_space_read_4(((struct e1000_osdep *)(hw)->back)->flash_bus_space_tag, \
bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg))
bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg))
bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg))
return bus_space_read_4(((struct ix_softc *)hw->back)->osdep.mem_bus_space_tag,
retval = bus_space_read_4(sc->osdep.mem_bus_space_tag,
retval = bus_space_read_4(sc->osdep.mem_bus_space_tag,
retval = bus_space_read_4(sc->osdep.mem_bus_space_tag,
bus_space_read_4((_sc)->jme_mem_bt, (_sc)->jme_mem_bh, (reg))
bus_space_read_4(sc->lge_btag, sc->lge_bhandle, reg)
bus_space_read_4((sc)->msk_res_bt, (sc)->msk_res_bh, (reg))
bus_space_read_4((sc)->msk_res_bt, (sc)->msk_res_bh, Y2_CFG_SPC + (reg))
bus_space_read_4(sc->my_btag, sc->my_bhandle, reg)
bus_space_read_4((sc)->sc_memt, (sc)->sc_memh, (reg))
bus_space_read_4(sc->nge_btag, sc->nge_bhandle, reg)
((IS_BE(sc)) ? (bus_space_read_4((sc)->space##_btag, \
: (bus_space_read_4((sc)->devcfg_btag, \
((IS_BE(sc) || IS_SH(sc)) ? (bus_space_read_4((sc)->space##_btag, \
: (bus_space_read_4((sc)->devcfg_btag, \
bus_space_read_4(sc->pcn_btag, sc->pcn_bhandle, reg)
bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg))
bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg))
bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg))
bus_space_read_4(sc->re_btag, sc->re_bhandle, reg)
#define CSR_READ_4(sc, reg) ((sc->prohibit_access_reg)?0xFFFFFFFF:bus_space_read_4(sc->re_btag, sc->re_bhandle, reg))
#define RE_CMAC_READ_4(sc, reg) (sc->prohibit_access_reg)?0xFFFFFFFF:bus_space_read_4(sc->re_cmac_tag, sc->re_cmac_handle, reg))
bus_space_read_4(sc->re_cmac_tag, sc->re_cmac_handle, reg)
bus_space_read_4(sc->rl_btag, sc->rl_bhandle, reg)
bus_space_read_4(sc->sf_btag, sc->sf_bhandle, reg)
bus_space_read_4(sc->sis_btag, sc->sis_bhandle, reg)
bus_space_read_4((sc)->sk_btag, (sc)->sk_bhandle, (reg))
#define SLN_READ_4(adapter, reg) bus_space_read_4(adapter->sln_bustag, adapter->sln_bushandle, reg)
bus_space_read_4(sc->ste_btag, sc->ste_bhandle, reg)
bus_space_read_4((_sc)->sc_btag, (_sc)->sc_bhandle, (reg))
bus_space_read_4(sc->ti_btag, sc->ti_bhandle, reg)
bus_space_read_4(sc->tl_btag, sc->tl_bhandle, reg)
bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg))
bus_space_read_4((sc)->sc_bt, (sc)->sc_bh, reg)
bus_space_read_4(sc->vge_btag, sc->vge_bhandle, reg)
bus_space_read_4(sc->vr_btag, sc->vr_bhandle, reg)
bus_space_read_4(sc->wb_btag, sc->wb_bhandle, reg)
command = bus_space_read_4(sc->wi_localtag, sc->wi_localhandle,
bus_space_read_4((sc)->wi_btag, (sc)->wi_bhandle, \
bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg))
bus_space_read_4(sc->xl_btag, sc->xl_bhandle, reg)
return (bus_space_read_4(sc->bst, sc->bsh, reg));
#define AAC_MEM0_GETREG4(sc, reg) bus_space_read_4(sc->aac_btag0, \
#define AAC_MEM1_GETREG4(sc, reg) bus_space_read_4(sc->aac_btag1, \
#define AMR_QGET_IDB(sc) bus_space_read_4 (sc->amr_btag, sc->amr_bhandle, AMR_QIDB)
#define AMR_QGET_ODB(sc) bus_space_read_4 (sc->amr_btag, sc->amr_bhandle, AMR_QODB)
deviceMapCurrent[target]=bus_space_read_4(acb->btag[0], acb->bhandle[0], devicemap);
deviceMapCurrent[target]=bus_space_read_4(acb->btag[1], acb->bhandle[1], devicemap);
deviceMapCurrent[target]=bus_space_read_4(acb->btag[0], acb->bhandle[0], devicemap);
deviceMapCurrent[target]=bus_space_read_4(acb->btag[0], acb->bhandle[0], devicemap);
deviceMapCurrent[target]=bus_space_read_4(acb->btag[0], acb->bhandle[0], devicemap);
#define CHIP_REG_READ32(s, b, r) bus_space_read_4(acb->btag[b], acb->bhandle[b], offsetof(struct s, r))
#define READ_CHIP_REG32(b, r) bus_space_read_4(acb->btag[b], acb->bhandle[b], r)
bus_space_read_4(sc->ha_frame_btag,
return (bus_space_read_4(sc->ha_i2o_btag, sc->ha_i2o_bhandle,
return (bus_space_read_4(sc->ha_i2o_btag, sc->ha_i2o_bhandle,
return (bus_space_read_4(sc->ha_i2o_btag, sc->ha_i2o_bhandle,
return (bus_space_read_4(sc->ha_i2o_btag, sc->ha_i2o_bhandle,
bus_space_read_4(sc->ciss_regs_btag, sc->ciss_regs_bhandle, ofs)
bus_space_read_4((dpt)->tag, (dpt)->bsh, port)
result = bus_space_read_4(hba->bar0t, hba->bar0h, req32 +
#define BUS_SPACE_RD4_ITL(offset) bus_space_read_4(hba->bar0t,\
#define BUS_SPACE_RD4_MV0(offset) bus_space_read_4(hba->bar0t,\
#define BUS_SPACE_RD4_MV2(offset) bus_space_read_4(hba->bar2t,\
#define BUS_SPACE_RD4_MVFREY2(offset) bus_space_read_4(hba->bar2t,\
temp = bus_space_read_4(hba->bar0t, hba->bar0h, index +
result = bus_space_read_4(hba->bar0t, hba->bar0h, index +
dxfer = bus_space_read_4(hba->bar0t, hba->bar0h,
temp = bus_space_read_4(hba->bar0t,
bus_space_read_4((ida)->tag, (ida)->bsh, port)
if (bus_space_read_4(gdt->sc_dpmemt, gdt->sc_dpmemh, GDT_MPR_IC) !=
protocol = (uint8_t)le32toh(bus_space_read_4(gdt->sc_dpmemt, gdt->sc_dpmemh,
bus_space_read_4(gdt->sc_dpmemt, gdt->sc_dpmemh, GDT_MPR_INFO);
bus_space_read_4(gdt->sc_dpmemt, gdt->sc_dpmemh,
#define ips_read_4(sc,offset) bus_space_read_4(sc->bustag, sc->bushandle, offset)
#define MFI_READ4(sc, reg) bus_space_read_4((sc)->mfi_btag, \
#define MLX_V4_GET_IDBR(sc) bus_space_read_4 (sc->mlx_btag, sc->mlx_bhandle, MLX_V4_IDBR)
#define MLX_V4_GET_ODBR(sc) bus_space_read_4 (sc->mlx_btag, sc->mlx_bhandle, MLX_V4_ODBR)
#define MLY_GET_REG4(sc, reg) bus_space_read_4 (sc->mly_btag, sc->mly_bhandle, reg)
*((u_int32_t *)ptr) = bus_space_read_4(sc->mly_btag, sc->mly_bhandle, mbox); \
*((u_int32_t *)ptr + 1) = bus_space_read_4(sc->mly_btag, sc->mly_bhandle, mbox + 4); \
*((u_int32_t *)ptr + 2) = bus_space_read_4(sc->mly_btag, sc->mly_bhandle, mbox + 8); \
*((u_int32_t *)ptr + 3) = bus_space_read_4(sc->mly_btag, sc->mly_bhandle, mbox + 12); \
return (bus_space_read_4(sc->mpr_btag, sc->mpr_bhandle, offset));
return (bus_space_read_4(sc->mps_btag, sc->mps_bhandle, offset));
return((u_int32_t)bus_space_read_4(bus_tag, bus_handle, offset));
return((TW_UINT32)bus_space_read_4(bus_tag, bus_handle,
return((u_int32_t)bus_space_read_4(bus_tag, bus_handle, offset));
return bus_space_read_4(sc->st, sc->sh, ALS_GCR_DATA);
bus_space_read_4((_sc)->st, (_sc)->sh, _reg)
return bus_space_read_4(au->st[mapno], au->sh[mapno], regno);
return bus_space_read_4(sc->st, sc->sh, regno);
return bus_space_read_4(sc->st, sc->sh, regno);
return bus_space_read_4(sc->st, sc->sh, regno);
return (bus_space_read_4(sc->st, sc->sh, regno));
return bus_space_read_4(sc->cst, sc->csh, regno);
return bus_space_read_4(sc->mtt, sc->mth, regno);
return bus_space_read_4(sc->cst, sc->csh, regno);
return bus_space_read_4(sc->mtt, sc->mth, regno);
return (bus_space_read_4(es->st, es->sh, regno));
return (bus_space_read_4(fm801->st, fm801->sh, regno));
bus_space_read_4((mem)->mem_tag, (mem)->mem_handle, (offset))
bus_space_read_4((sc)->cst, (sc)->csh, (regno))
return (bus_space_read_4(sc->nabmbart, sc->nabmbarh, regno));
return bus_space_read_4(sc->st, sc->sh, regno);
return bus_space_read_4(st, sh, regno);
return bus_space_read_4(st, sh, regno);
return bus_space_read_4(st, sh, regno);
return bus_space_read_4(tr->st, tr->sh, regno);
return (bus_space_read_4(via->st, via->sh, regno));
return bus_space_read_4(via->st, via->sh, regno);
return bus_space_read_4(st, sh, SV_DMA_COUNT) & 0xffffff;
#define INL(bktr,offset) bus_space_read_4((bktr)->memt,(bktr)->memh,(offset))
bus_space_read_4((sc)->btag, (sc)->bhandle, (reg))
bus_space_read_4( \
return (bus_space_read_4(sc->vmx_iot1, sc->vmx_ioh1, r));
return bus_space_read_4(res->pr_bt, res->pr_bh, reg);
bus_space_read_4((r)->r_bustag, (r)->r_bushandle, (o))