lib/libc/asr/asr_utils.c

200

unpack_u16(struct asr_unpack *p, uint16_t *u16)

lib/libc/asr/asr_utils.c

202

if (unpack_data(p, u16, 2) == -1)

lib/libc/asr/asr_utils.c

205

*u16 = ntohs(*u16);

regress/lib/libc/asr/bin/common.c

494

unpack_u16(struct packed *p, uint16_t *u16)

regress/lib/libc/asr/bin/common.c

496

if (unpack_data(p, u16, 2) == -1)

regress/lib/libc/asr/bin/common.c

499

*u16 = ntohs(*u16);

regress/lib/libssl/bytestring/bytestringtest.c

103

uint16_t u16;

regress/lib/libssl/bytestring/bytestringtest.c

115

CHECK(CBS_get_u16(&prefixed, &u16));

regress/lib/libssl/bytestring/bytestringtest.c

116

CHECK(u16 == 0x304);

regress/lib/libssl/bytestring/bytestringtest.c

152

uint16_t u16;

regress/lib/libssl/bytestring/bytestringtest.c

160

CHECK(CBS_peek_u16(&data, &u16));

regress/lib/libssl/bytestring/bytestringtest.c

161

CHECK(u16 == 0x102);

regress/lib/libssl/bytestring/bytestringtest.c

71

uint16_t u16;

regress/lib/libssl/bytestring/bytestringtest.c

80

CHECK(CBS_get_u16(&data, &u16));

regress/lib/libssl/bytestring/bytestringtest.c

81

CHECK(u16 == 0x203);

regress/usr.bin/ssh/unittests/sshbuf/test_sshbuf_getput_fuzz.c

33

uint16_t u16;

regress/usr.bin/ssh/unittests/sshbuf/test_sshbuf_getput_fuzz.c

41

ASSERT_INT_EQ(sshbuf_get_u16(p1, &u16), 0);

regress/usr.sbin/snmpd/agentx.c

2406

uint16_t u16;

regress/usr.sbin/snmpd/agentx.c

2474

uint16_t u16;

regress/usr.sbin/snmpd/agentx.c

2576

uint16_t u16;

regress/usr.sbin/snmpd/agentx.c

2608

memcpy(&u16, buf, sizeof(u16));

regress/usr.sbin/snmpd/agentx.c

2609

nonrep = p16toh(header, u16);

regress/usr.sbin/snmpd/agentx.c

2610

memcpy(&u16, buf + sizeof(u16), sizeof(u16));

regress/usr.sbin/snmpd/agentx.c

2611

maxrep = p16toh(header, u16);

regress/usr.sbin/snmpd/agentx.c

2668

uint16_t u16;

regress/usr.sbin/snmpd/agentx.c

2702

uint16_t u16, type;

regress/usr.sbin/snmpd/agentx.c

2733

memcpy(&u16, buf, sizeof(u16));

regress/usr.sbin/snmpd/agentx.c

2734

if (p16toh(header, u16) != error)

regress/usr.sbin/snmpd/agentx.c

2736

test, p16toh(header, u16), error);

regress/usr.sbin/snmpd/agentx.c

2737

buf += sizeof(u16);

regress/usr.sbin/snmpd/agentx.c

2738

memcpy(&u16, buf, sizeof(u16));

regress/usr.sbin/snmpd/agentx.c

2739

if (p16toh(header, u16) != index)

regress/usr.sbin/snmpd/agentx.c

2741

test, p16toh(header, u16), index);

regress/usr.sbin/snmpd/agentx.c

2742

buf += sizeof(u16);

regress/usr.sbin/snmpd/agentx.c

2755

memcpy(&u16, buf, sizeof(u16));

regress/usr.sbin/snmpd/agentx.c

2756

if (u16 != 0)

regress/usr.sbin/snmpd/agentx.c

2759

buf += sizeof(u16);

regress/usr.sbin/snmpd/agentx.c

2760

len -= sizeof(u16);

sys/dev/ic/qwzvar.h

2124

u16 sec_type;

sys/dev/ic/qwzvar.h

2125

u16 sec_type_grp;

sys/dev/pci/drm/amd/amdgpu/amdgpu_acpi.c

259

size = *(u16 *) info->buffer.pointer;

sys/dev/pci/drm/amd/amdgpu/amdgpu_acpi.c

306

size = *(u16 *) info->buffer.pointer;

sys/dev/pci/drm/amd/amdgpu/amdgpu_acpi.c

382

size = *(u16 *) info->buffer.pointer;

sys/dev/pci/drm/amd/amdgpu/amdgpu_acpi.c

431

size = *(u16 *)info->buffer.pointer;

sys/dev/pci/drm/amd/amdgpu/amdgpu_acpi.c

619

size = *(u16 *) info->buffer.pointer;

sys/dev/pci/drm/amd/amdgpu/amdgpu_acpi.c

744

size = *(u16 *) info->buffer.pointer;

sys/dev/pci/drm/amd/amdgpu/amdgpu_atombios.c

1188

u16 *vddc, u16 *vddci, u16 *mvdd)

sys/dev/pci/drm/amd/amdgpu/amdgpu_atombios.c

1193

u16 data_offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_atombios.c

1221

u16 voltage_id, u16 *voltage)

sys/dev/pci/drm/amd/amdgpu/amdgpu_atombios.c

1264

u16 *voltage,

sys/dev/pci/drm/amd/amdgpu/amdgpu_atombios.c

1265

u16 leakage_idx)

sys/dev/pci/drm/amd/amdgpu/amdgpu_atombios.c

1306

u16 data_offset, size;

sys/dev/pci/drm/amd/amdgpu/amdgpu_atombios.c

1350

u16 data_offset, size;

sys/dev/pci/drm/amd/amdgpu/amdgpu_atombios.c

1386

u16 data_offset, size;

sys/dev/pci/drm/amd/amdgpu/amdgpu_atombios.c

1458

u16 data_offset, size;

sys/dev/pci/drm/amd/amdgpu/amdgpu_atombios.c

1480

((u8 *)reg_block + (2 * sizeof(u16)) +

sys/dev/pci/drm/amd/amdgpu/amdgpu_atombios.c

1491

(u16)(le16_to_cpu(format->usRegIndex));

sys/dev/pci/drm/amd/amdgpu/amdgpu_atombios.c

1549

u16 data_offset, size;

sys/dev/pci/drm/amd/amdgpu/amdgpu_atombios.c

188

u16 data_offset, size;

sys/dev/pci/drm/amd/amdgpu/amdgpu_atombios.c

289

u16 size, data_offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_atombios.c

316

u16 size, data_offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_atombios.c

325

u16 conn_id, connector_object_id;

sys/dev/pci/drm/amd/amdgpu/amdgpu_atombios.c

394

u16 encoder_obj = le16_to_cpu(enc_obj->asObjects[k].usObjectID);

sys/dev/pci/drm/amd/amdgpu/amdgpu_atombios.c

400

u16 caps = 0;

sys/dev/pci/drm/amd/amdgpu/amdgpu_atombios.c

422

u16 router_obj_id = le16_to_cpu(router_obj->asObjects[k].usObjectID);

sys/dev/pci/drm/amd/amdgpu/amdgpu_atombios.c

438

u16 *dst_objs = (u16 *)(num_dst_objs + 1);

sys/dev/pci/drm/amd/amdgpu/amdgpu_atombios.c

774

u16 data_offset, size;

sys/dev/pci/drm/amd/amdgpu/amdgpu_atombios.c

801

u16 data_offset, size;

sys/dev/pci/drm/amd/amdgpu/amdgpu_atombios.c

804

u16 percentage = 0, rate = 0;

sys/dev/pci/drm/amd/amdgpu/amdgpu_atombios.h

107

u16 s1;

sys/dev/pci/drm/amd/amdgpu/amdgpu_atombios.h

121

u16 value;

sys/dev/pci/drm/amd/amdgpu/amdgpu_atombios.h

182

u16 voltage_id, u16 *voltage);

sys/dev/pci/drm/amd/amdgpu/amdgpu_atombios.h

184

u16 *voltage,

sys/dev/pci/drm/amd/amdgpu/amdgpu_atombios.h

185

u16 leakage_idx);

sys/dev/pci/drm/amd/amdgpu/amdgpu_atombios.h

187

u16 *vddc, u16 *vddci, u16 *mvdd);

sys/dev/pci/drm/amd/amdgpu/amdgpu_atomfirmware.c

180

u16 data_offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_atomfirmware.c

303

u16 data_offset, size;

sys/dev/pci/drm/amd/amdgpu/amdgpu_atomfirmware.c

51

u16 data_offset, size;

sys/dev/pci/drm/amd/amdgpu/amdgpu_atomfirmware.c

552

u16 data_offset, size;

sys/dev/pci/drm/amd/amdgpu/amdgpu_atomfirmware.c

661

u16 data_offset, size;

sys/dev/pci/drm/amd/amdgpu/amdgpu_atomfirmware.c

911

u16 data_offset, size;

sys/dev/pci/drm/amd/amdgpu/amdgpu_connectors.c

1353

u16 amdgpu_connector_encoder_get_dp_bridge_encoder_id(struct drm_connector *connector)

sys/dev/pci/drm/amd/amdgpu/amdgpu_connectors.h

29

u16 amdgpu_connector_encoder_get_dp_bridge_encoder_id(struct drm_connector *connector);

sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c

1690

u16 cmd;

sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c

7248

u16 status;

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

1179

u16 num_dies, die_offset, num_ips;

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

1597

u16 offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

1707

u16 offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

1761

u16 offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

1849

u16 offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

720

u16 offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

805

u16 num_ips;

sys/dev/pci/drm/amd/amdgpu/amdgpu_drv.c

1145

static const u16 amdgpu_unsupported_pciidlist[] = {

sys/dev/pci/drm/amd/amdgpu/amdgpu_eeprom.c

108

u16 len;

sys/dev/pci/drm/amd/amdgpu/amdgpu_eeprom.c

185

u16 limit;

sys/dev/pci/drm/amd/amdgpu/amdgpu_eeprom.c

186

u16 ps; /* Partial size */

sys/dev/pci/drm/amd/amdgpu/amdgpu_encoders.c

146

u16 amdgpu_encoder_get_dp_bridge_encoder_id(struct drm_encoder *encoder)

sys/dev/pci/drm/amd/amdgpu/amdgpu_irq.c

253

u16 ctrl;

sys/dev/pci/drm/amd/amdgpu/amdgpu_mode.h

286

u16 caps);

sys/dev/pci/drm/amd/amdgpu/amdgpu_mode.h

551

u16 caps;

sys/dev/pci/drm/amd/amdgpu/amdgpu_mode.h

674

u16 amdgpu_encoder_get_dp_bridge_encoder_id(struct drm_encoder *encoder);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.h

58

u16 ecc_page_threshold;

sys/dev/pci/drm/amd/amdgpu/amdgpu_userq_fence.c

692

u16 num_points, num_fences = 0;

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.h

122

#define AMDGIM_GET_STRUCTURE_RESERVED_SIZE(total, u8, u16, u32, u64) \

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.h

123

(total - (((u8)+3) / 4 + ((u16)+1) / 2 + (u32) + (u64)*2))

sys/dev/pci/drm/amd/amdgpu/amdgpu_vpe.c

62

u16 arg1_value = numerator;

sys/dev/pci/drm/amd/amdgpu/amdgpu_vpe.c

63

u16 arg2_value = denominator;

sys/dev/pci/drm/amd/amdgpu/amdgpu_xcp.h

82

u16 compatible_nps_modes;

sys/dev/pci/drm/amd/amdgpu/aqua_vanjaram.c

279

u16 nps_modes;

sys/dev/pci/drm/amd/amdgpu/aqua_vanjaram.c

343

u16 supp_nps_modes;

sys/dev/pci/drm/amd/amdgpu/atom.c

1624

u16 *mdt = (u16 *)(ctx->bios + ctx->data_table + 4);

sys/dev/pci/drm/amd/amdgpu/atom.c

1644

u16 *mct = (u16 *)(ctx->bios + ctx->cmd_table + 4);

sys/dev/pci/drm/amd/amdgpu/atombios_crtc.c

197

u16 misc = 0;

sys/dev/pci/drm/amd/amdgpu/atombios_dp.c

378

u16 dp_bridge = amdgpu_connector_encoder_get_dp_bridge_encoder_id(connector);

sys/dev/pci/drm/amd/amdgpu/atombios_dp.c

79

args.v2.lpAuxRequest = cpu_to_le16((u16)(0 + 4));

sys/dev/pci/drm/amd/amdgpu/atombios_dp.c

80

args.v2.lpDataOut = cpu_to_le16((u16)(16 + 4));

sys/dev/pci/drm/amd/amdgpu/atombios_i2c.c

47

u16 out = cpu_to_le16(0);

sys/dev/pci/drm/amd/amdgpu/cik.c

1535

u16 tmp16;

sys/dev/pci/drm/amd/amdgpu/cik.c

1573

u16 bridge_cfg, gpu_cfg;

sys/dev/pci/drm/amd/amdgpu/cik.c

1574

u16 bridge_cfg2, gpu_cfg2;

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1339

static const u16 eld_reg_to_type[][2] = {

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

2107

u16 *r, *g, *b;

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

2462

static int dce_v10_0_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

2463

u16 *blue, uint32_t size,

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

3515

u16 caps)

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1315

static const u16 eld_reg_to_type[][2] = {

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

2121

u16 *r, *g, *b;

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

2434

static int dce_v6_0_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

2435

u16 *blue, uint32_t size,

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

3413

u16 caps)

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1308

static const u16 eld_reg_to_type[][2] = {

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

2032

u16 *r, *g, *b;

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

2381

static int dce_v8_0_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

2382

u16 *blue, uint32_t size,

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

3423

u16 caps)

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1360

u16 chip_vendor;

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1361

u16 chip_device;

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1362

u16 subsys_vendor;

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1363

u16 subsys_device;

sys/dev/pci/drm/amd/amdgpu/nbif_v6_3_1.c

318

u16 devctl2;

sys/dev/pci/drm/amd/amdgpu/nbif_v6_3_1.c

348

u16 devctl2, ltr;

sys/dev/pci/drm/amd/amdgpu/nbif_v6_3_1.c

382

pcie_capability_set_word(adev->pdev, PCI_EXP_DEVCTL2, (u16)data);

sys/dev/pci/drm/amd/amdgpu/si.c

2242

u16 tmp16;

sys/dev/pci/drm/amd/amdgpu/si.c

2279

u16 bridge_cfg, gpu_cfg;

sys/dev/pci/drm/amd/amdgpu/si.c

2280

u16 bridge_cfg2, gpu_cfg2;

sys/dev/pci/drm/amd/amdgpu/si.c

2632

u16 v;

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

159

static void smu_v11_0_i2c_set_address(struct i2c_adapter *control, u16 address)

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

269

u16 address, u8 *data,

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

368

u16 address, u8 *data,

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

649

u16 addr, dir;

sys/dev/pci/drm/amd/amdkfd/kfd_crat.c

2065

bdf = *((u16 *)(&gpu->device_handle[0])) << 16 |

sys/dev/pci/drm/amd/amdkfd/kfd_crat.c

2066

*((u16 *)(&gpu->device_handle[2]));

sys/dev/pci/drm/amd/amdkfd/kfd_topology.h

186

u16 physical_handle;

sys/dev/pci/drm/amd/amdkfd/kfd_topology.h

187

u16 error_handle;

sys/dev/pci/drm/amd/amdkfd/kfd_topology.h

188

u16 total_width;

sys/dev/pci/drm/amd/amdkfd/kfd_topology.h

189

u16 data_width;

sys/dev/pci/drm/amd/amdkfd/kfd_topology.h

190

u16 size;

sys/dev/pci/drm/amd/amdkfd/kfd_topology.h

196

u16 type_detail;

sys/dev/pci/drm/amd/amdkfd/kfd_topology.h

197

u16 speed;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12907

u16 min_vfreq;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12908

u16 max_vfreq;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

1693

u16 chip_vendor;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

1694

u16 chip_device;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

1695

u16 subsys_vendor;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

1696

u16 subsys_device;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5835

u16 data_offset;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6929

u16 current_refresh, highest_refresh;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8667

new_mode->vtotal += (u16)target_vtotal_diff;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8668

new_mode->vsync_start += (u16)target_vtotal_diff;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8669

new_mode->vsync_end += (u16)target_vtotal_diff;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.h

429

u16 display_indexes_num;

sys/dev/pci/drm/amd/display/dc/dml/dsc/rc_calc_fpu.c

168

u16 drm_bpp,

sys/dev/pci/drm/amd/display/dc/dml/dsc/rc_calc_fpu.h

84

u16 drm_bpp,

sys/dev/pci/drm/amd/display/dc/dsc/rc_calc.c

46

u16 drm_bpp = pps->bits_per_pixel;

sys/dev/pci/drm/amd/include/amd_acpi.h

104

u16 size; /* structure size in bytes (includes size field) */

sys/dev/pci/drm/amd/include/amd_acpi.h

109

u16 size; /* structure size in bytes (includes size field) */

sys/dev/pci/drm/amd/include/amd_acpi.h

110

u16 dgpu_id; /* client id (bit 2-0: func num, 7-3: dev num, 15-8: bus num) */

sys/dev/pci/drm/amd/include/amd_acpi.h

30

u16 size; /* structure size in bytes (includes size field) */

sys/dev/pci/drm/amd/include/amd_acpi.h

31

u16 version; /* version */

sys/dev/pci/drm/amd/include/amd_acpi.h

37

u16 size; /* structure size in bytes (includes size field) */

sys/dev/pci/drm/amd/include/amd_acpi.h

44

u16 size; /* structure size in bytes (includes size field) */

sys/dev/pci/drm/amd/include/amd_acpi.h

56

u16 size; /* structure size in bytes (includes size field) */

sys/dev/pci/drm/amd/include/amd_acpi.h

68

u16 size; /* structure size in bytes (includes size field) */

sys/dev/pci/drm/amd/include/amd_acpi.h

69

u16 flags; /* all zeroes */

sys/dev/pci/drm/amd/include/amd_acpi.h

87

u16 size; /* structure size in bytes (includes size field) */

sys/dev/pci/drm/amd/include/amd_acpi.h

88

u16 version; /* version */

sys/dev/pci/drm/amd/include/amd_acpi.h

95

u16 size; /* structure size in bytes (includes size field) */

sys/dev/pci/drm/amd/include/amd_acpi.h

96

u16 client_id; /* client id (bit 2-0: func num, 7-3: dev num, 15-8: bus num) */

sys/dev/pci/drm/amd/include/amd_acpi.h

97

u16 valid_flags_mask; /* valid flags mask */

sys/dev/pci/drm/amd/include/amd_acpi.h

98

u16 flags; /* flags */

sys/dev/pci/drm/amd/pm/inc/amdgpu_dpm.h

107

u16 vddc;

sys/dev/pci/drm/amd/pm/inc/amdgpu_dpm.h

108

u16 vddci;

sys/dev/pci/drm/amd/pm/inc/amdgpu_dpm.h

118

u16 v;

sys/dev/pci/drm/amd/pm/inc/amdgpu_dpm.h

128

u16 vddc;

sys/dev/pci/drm/amd/pm/inc/amdgpu_dpm.h

132

u16 vddc1;

sys/dev/pci/drm/amd/pm/inc/amdgpu_dpm.h

133

u16 vddc2;

sys/dev/pci/drm/amd/pm/inc/amdgpu_dpm.h

134

u16 vddc3;

sys/dev/pci/drm/amd/pm/inc/amdgpu_dpm.h

144

u16 voltage;

sys/dev/pci/drm/amd/pm/inc/amdgpu_dpm.h

157

u16 v;

sys/dev/pci/drm/amd/pm/inc/amdgpu_dpm.h

168

u16 v;

sys/dev/pci/drm/amd/pm/inc/amdgpu_dpm.h

178

u16 cpu_core_number;

sys/dev/pci/drm/amd/pm/inc/amdgpu_dpm.h

190

u16 tdp;

sys/dev/pci/drm/amd/pm/inc/amdgpu_dpm.h

191

u16 configurable_tdp;

sys/dev/pci/drm/amd/pm/inc/amdgpu_dpm.h

192

u16 tdc;

sys/dev/pci/drm/amd/pm/inc/amdgpu_dpm.h

193

u16 battery_power_limit;

sys/dev/pci/drm/amd/pm/inc/amdgpu_dpm.h

194

u16 small_power_limit;

sys/dev/pci/drm/amd/pm/inc/amdgpu_dpm.h

195

u16 low_cac_leakage;

sys/dev/pci/drm/amd/pm/inc/amdgpu_dpm.h

196

u16 high_cac_leakage;

sys/dev/pci/drm/amd/pm/inc/amdgpu_dpm.h

197

u16 maximum_power_delivery_limit;

sys/dev/pci/drm/amd/pm/inc/amdgpu_dpm.h

217

u16 vddc_vddci_delta;

sys/dev/pci/drm/amd/pm/inc/amdgpu_dpm.h

218

u16 min_vddc_for_pcie_gen2;

sys/dev/pci/drm/amd/pm/inc/amdgpu_dpm.h

226

u16 t_min;

sys/dev/pci/drm/amd/pm/inc/amdgpu_dpm.h

227

u16 t_med;

sys/dev/pci/drm/amd/pm/inc/amdgpu_dpm.h

228

u16 t_high;

sys/dev/pci/drm/amd/pm/inc/amdgpu_dpm.h

229

u16 pwm_min;

sys/dev/pci/drm/amd/pm/inc/amdgpu_dpm.h

230

u16 pwm_med;

sys/dev/pci/drm/amd/pm/inc/amdgpu_dpm.h

231

u16 pwm_high;

sys/dev/pci/drm/amd/pm/inc/amdgpu_dpm.h

234

u16 t_max;

sys/dev/pci/drm/amd/pm/inc/amdgpu_dpm.h

236

u16 default_max_fan_pwm;

sys/dev/pci/drm/amd/pm/inc/amdgpu_dpm.h

237

u16 default_fan_output_sensitivity;

sys/dev/pci/drm/amd/pm/inc/amdgpu_dpm.h

238

u16 fan_output_sensitivity;

sys/dev/pci/drm/amd/pm/inc/amdgpu_dpm.h

273

u16 tdp_od_limit;

sys/dev/pci/drm/amd/pm/inc/amdgpu_dpm.h

275

u16 load_line_slope;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1410

u16 reg_offset, u32 value)

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1415

(u8 *)&value, sizeof(u16), pi->sram_end);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1419

u16 reg_offset, u32 *value)

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1441

u16 tmp;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1449

sizeof(u16), pi->sram_end);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1458

sizeof(u16), pi->sram_end);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2557

u16 data_offset;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2705

u16 data_offset;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2864

u16 vddc;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2873

vddc = kv_convert_8bit_index_to_voltage(adev, (u16)tmp);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

669

static u16 kv_convert_8bit_index_to_voltage(struct amdgpu_device *adev,

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

670

u16 voltage)

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

675

static u16 kv_convert_2bit_index_to_voltage(struct amdgpu_device *adev,

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

683

return kv_convert_8bit_index_to_voltage(adev, (u16)vid_8bit);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

702

pi->graphics_level[index].AT = cpu_to_be16((u16)at);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.h

124

u16 bootup_nb_voltage_index;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.h

143

u16 high_voltage_t;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.h

156

u16 fps_high_t;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.h

38

u16 vid_2bit;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.h

39

u16 vid_7bit;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.h

49

u16 vid_2bit;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.h

50

u16 rsv;

sys/dev/pci/drm/amd/pm/legacy-dpm/legacy_dpm.c

138

u16 data_offset;

sys/dev/pci/drm/amd/pm/legacy-dpm/legacy_dpm.c

201

u16 data_offset;

sys/dev/pci/drm/amd/pm/legacy-dpm/legacy_dpm.c

655

u16 data_offset;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

1851

u16 value, SISLANDS_SMC_VOLTAGE_VALUE *voltage);

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

1854

u16 *std_voltage);

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

1856

u16 reg_offset, u32 value);

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

1875

u16 v, s32 t, u32 ileakage, u32 *leakage)

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

1903

u16 v,

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

1912

const u32 fixed_kt, u16 v,

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

1932

u16 v,

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

2351

static u16 si_calculate_power_efficiency_ratio(struct amdgpu_device *adev,

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

2352

const u16 prev_std_vddc,

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

2353

const u16 curr_std_vddc)

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

2370

return (u16)pwr_efficiency_ratio;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

2403

u16 prev_std_vddc;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

2404

u16 curr_std_vddc;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

2406

u16 pwr_efficiency_ratio;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

2643

u16 *max, u16 *min)

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

2672

*min = (u16)v0_loadline;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

2680

static u16 si_get_cac_std_voltage_step(u16 max, u16 min)

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

2688

u16 vddc_max, u16 vddc_min, u16 vddc_step,

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

2689

u16 t0, u16 t_step)

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

2697

u16 voltage;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

2720

cpu_to_be16((u16)smc_leakage);

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

2728

u16 vddc_max, u16 vddc_min, u16 vddc_step)

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

2735

u16 voltage;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

2756

cpu_to_be16((u16)smc_leakage);

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

2766

u16 vddc_max, vddc_min, vddc_step;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

2767

u16 t0, t_step;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

3027

static u16 si_get_lower_of_leakage_and_vce_voltage(struct amdgpu_device *adev,

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

3028

u16 vce_voltage)

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

3030

u16 highest_leakage = 0;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

3046

u32 evclk, u32 ecclk, u16 *voltage)

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

3224

static u16 btc_find_voltage(struct atom_voltage_table *table, u16 voltage)

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

3284

u32 clock, u16 max_voltage, u16 *voltage)

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

3294

*voltage = (u16)((table->entries[i].v < max_voltage) ?

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

3331

u16 max_vddc, u16 max_vddci,

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

3332

u16 *vddc, u16 *vddci)

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

3335

u16 new_voltage;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

3418

u16 vddc;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

3453

u16 vddc, vddci, min_vce_voltage = 0;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

3703

u16 reg_offset, u32 *value)

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

3714

u16 reg_offset, u32 value)

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

3754

u16 vddc, count = 0;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

3771

u32 index, u16 *leakage_voltage)

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

4625

u16 value, SISLANDS_SMC_VOLTAGE_VALUE *voltage)

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

4662

u16 *std_voltage)

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

4664

u16 v_index;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

4675

(u16)adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[v_index].v) {

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

4690

(u16)adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[v_index].v) {

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

4712

u16 value, u8 index,

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

4723

u16 voltage, u32 sclk, u32 mclk,

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

4941

u16 std_vddc;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

5059

u16 std_vddc;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

5082

u16 std_vddc;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

5530

u16 std_vddc;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

5950

static bool si_check_s0_mc_reg_index(u16 in_reg, u16 *out_reg)

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

6021

u16 address;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

6245

u16 pcie_speed, max_speed = 0;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

6255

static u16 si_get_current_pcie_speed(struct amdgpu_device *adev)

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

6262

return (u16)speed_cntl;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

6396

u16 leakage_voltage;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

6540

u16 fdo_min, slope1, slope2;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

6559

fdo_min = (u16)tmp64;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

6567

slope1 = (u16)((50 + ((16 * duty100 * pwm_diff1) / t_diff1)) / 100);

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

6568

slope2 = (u16)((50 + ((16 * duty100 * pwm_diff2) / t_diff2)) / 100);

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

6584

fan_table.fdo_max = cpu_to_be16((u16)duty100);

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

7237

u16 leakage_voltage;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

7287

u16 vddc, vddci, mvdd;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

7322

u16 data_offset;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.h

277

u16 valid_flag;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.h

489

u16 vddc;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.h

559

u16 max_vddc;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.h

560

u16 max_vddc_in_table;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.h

561

u16 min_vddc_in_table;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.h

570

u16 acpi_vddc;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.h

591

u16 state_table_start;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.h

592

u16 soft_regs_start;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.h

593

u16 sram_end;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.h

608

u16 vddc;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.h

609

u16 vddci; /* eg+ only */

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.h

622

u16 performance_level_count;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.h

630

u16 valid_flag;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.h

670

u16 acpi_vddci;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.h

681

u16 mc_reg_table_start;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.h

842

u16 arb_table_start;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.h

843

u16 fan_table_start;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.h

844

u16 cac_table_start;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.h

845

u16 spll_table_start;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.h

938

u16 valid_flag;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.h

945

u16 voltage;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.h

946

u16 leakage_index;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.h

951

u16 count;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.h

973

u16 mvdd_bootup_value;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/ppatomctrl.c

1126

u16 *leakage_bin, *vddc_id_buf, *vddc_buf, *vddci_id_buf, *vddci_buf;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/ppatomctrl.c

1144

leakage_bin = (u16 *)((char *)profile + profile->usLeakageBinArrayOffset);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/ppatomctrl.c

1145

vddc_id_buf = (u16 *)((char *)profile + profile->usElbVDDC_IdArrayOffset);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/ppatomctrl.c

1146

vddc_buf = (u16 *)((char *)profile + profile->usElbVDDC_LevelArrayOffset);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/ppatomctrl.c

1161

vddci_id_buf = (u16 *)((char *)profile + profile->usElbVDDCI_IdArrayOffset);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/ppatomctrl.c

1162

vddci_buf = (u16 *)((char *)profile + profile->usElbVDDCI_LevelArrayOffset);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/ppatomctrl.c

141

u16 size;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/ppatomctrl.c

182

u16 size;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/ppatomctrl.c

250

u16 size;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/ppatomctrl.c

532

u16 size;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/ppatomctrl.c

652

u16 size;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/ppatomctrl.c

782

u16 size;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/ppatomctrl.c

814

u16 size;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/ppatomctrl.c

996

u16 size;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/ppatomctrl.h

102

u16 usSsc_fcw1_frac;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/ppatomctrl.h

103

u16 usSsc_fcw1_int;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/ppatomctrl.h

104

u16 usReserved;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/ppatomctrl.h

105

u16 usPcc_fcw_int;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/ppatomctrl.h

106

u16 usSsc_fcw_slew_frac;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/ppatomctrl.h

107

u16 usPcc_fcw_slew_frac;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/ppatomctrl.h

96

u16 usSclk_fcw_frac;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/ppatomctrl.h

97

u16 usSclk_fcw_int;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/process_pptables_v1_0.c

138

u16 size;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

1772

vddgfx = smu8_convert_8Bit_index_to_voltage(hwmgr, (u16)tmp) / 4;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_processpptables.c

50

u16 size;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega12_processpptables.c

47

u16 size;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega20_processpptables.c

49

u16 size;

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.h

44

u16 bapmti_r[SMU7_DTE_ITERATIONS * SMU7_DTE_SOURCES * SMU7_DTE_SINKS];

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.h

45

u16 bapmti_rc[SMU7_DTE_ITERATIONS * SMU7_DTE_SOURCES * SMU7_DTE_SINKS];

sys/dev/pci/drm/amd/pm/swsmu/smu11/arcturus_ppt.c

1640

u16 dir;

sys/dev/pci/drm/amd/pm/swsmu/smu11/navi10_ppt.c

3038

u16 dir;

sys/dev/pci/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c

2544

u16 dir;

sys/dev/pci/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c

1540

u16 dir;

sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c

2730

u16 dir;

sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

2403

u16 dir;

sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

2754

u16 link_width_level;

sys/dev/pci/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c

1986

u16 dir;

sys/dev/pci/drm/amd/pm/swsmu/smu_cmn.c

238

u16 msg,

sys/dev/pci/drm/apple/afk.c

103

u16 size = FIELD_GET(GETBUF_SIZE, message) << BLOCK_SHIFT;

sys/dev/pci/drm/apple/afk.c

104

u16 tag = FIELD_GET(GETBUF_TAG, message);

sys/dev/pci/drm/apple/afk.c

134

u16 base = FIELD_GET(INITRB_OFFSET, message) << BLOCK_SHIFT;

sys/dev/pci/drm/apple/afk.c

135

u16 size = FIELD_GET(INITRB_SIZE, message) << BLOCK_SHIFT;

sys/dev/pci/drm/apple/afk.c

136

u16 tag = FIELD_GET(INITRB_TAG, message);

sys/dev/pci/drm/apple/afk.c

315

u16 tag, void *payload, size_t payload_size)

sys/dev/pci/drm/apple/afk.c

469

u16 subtype = le16_to_cpu(eshdr->type);

sys/dev/pci/drm/apple/afk.c

635

u16 type;

sys/dev/pci/drm/apple/afk.c

694

int afk_send_epic(struct apple_dcp_afkep *ep, u32 channel, u16 tag,

sys/dev/pci/drm/apple/afk.c

847

u16 tag;

sys/dev/pci/drm/apple/afk.c

938

int afk_service_call(struct apple_epic_service *service, u16 group, u32 command,

sys/dev/pci/drm/apple/afk.h

164

u16 bfr_tag;

sys/dev/pci/drm/apple/afk.h

172

u16 qe_seq;

sys/dev/pci/drm/apple/afk.h

183

int afk_send_epic(struct apple_dcp_afkep *ep, u32 channel, u16 tag,

sys/dev/pci/drm/apple/afk.h

189

int afk_service_call(struct apple_epic_service *service, u16 group, u32 command,

sys/dev/pci/drm/apple/afk.h

22

u16 tag;

sys/dev/pci/drm/apple/dcp-internal.h

69

u16 end[DCP_MAX_CALL_DEPTH];

sys/dev/pci/drm/apple/iomfb.c

131

static u16 dcp_packet_start(struct dcp_channel *ch, u8 depth)

sys/dev/pci/drm/apple/iomfb.c

175

u16 offset = dcp_packet_start(ch, depth);

sys/dev/pci/drm/apple/iomfb.c

258

void *data, u32 length, u16 offset)

sys/dev/pci/drm/apple/iomfb.c

317

u16 offset;

sys/dev/pci/drm/apple/iomfb.c

70

static inline u64 dcpep_msg(enum dcp_context_id id, u32 length, u16 offset)

sys/dev/pci/drm/apple/iomfb.h

122

u16 tile_size;

sys/dev/pci/drm/apple/iomfb_template.h

41

u16 unk_2e2;

sys/dev/pci/drm/apple/iomfb_template.h

67

u16 pix_size;

sys/dev/pci/drm/apple/trace.h

112

afk_getbuf, TP_PROTO(struct apple_dcp_afkep *ep, u16 size, u16 tag),

sys/dev/pci/drm/apple/trace.h

116

__field(u8, endpoint) __field(u16, size)

sys/dev/pci/drm/apple/trace.h

117

__field(u16, tag)),

sys/dev/pci/drm/apple/trace.h

188

__field(u16, subtype)

sys/dev/pci/drm/apple/trace.h

189

__field(u16, tag)),

sys/dev/pci/drm/display/drm_dp_helper.c

2447

static const u16 psr_setup_time_us[] = {

sys/dev/pci/drm/display/drm_dp_helper.c

4133

u16 driver_pwm_freq_hz, const u8 edp_dpcd[EDP_DISPLAY_CTL_CAP_SIZE])

sys/dev/pci/drm/display/drm_dp_helper.c

4311

u16 driver_pwm_freq_hz, const u8 edp_dpcd[EDP_DISPLAY_CTL_CAP_SIZE],

sys/dev/pci/drm/display/drm_dp_helper.c

4371

u16 brightness = backlight_get_brightness(bd);

sys/dev/pci/drm/display/drm_dp_mst_topology.c

247

u16 remainder = 0;

sys/dev/pci/drm/display/drm_dsc_helper.c

1220

u16 dsc_bpp,

sys/dev/pci/drm/display/drm_dsc_helper.c

1520

const u16 *bt = cfg->rc_buf_thresh;

sys/dev/pci/drm/display/drm_dsc_helper.c

298

static const u16 drm_dsc_rc_buf_thresh[] = {

sys/dev/pci/drm/display/drm_dsc_helper.c

333

u16 initial_xmit_delay;

sys/dev/pci/drm/display/drm_dsc_helper.c

335

u16 initial_offset;

sys/dev/pci/drm/display/drm_hdmi_cec_helper.c

60

u16 addr)

sys/dev/pci/drm/display/drm_hdmi_cec_notifier_helper.c

23

u16 addr)

sys/dev/pci/drm/drm_color_mgmt.c

278

u16 *red, u16 *green, u16 *blue,

sys/dev/pci/drm/drm_color_mgmt.c

675

u16 r, g, b;

sys/dev/pci/drm/drm_color_mgmt.c

705

u16 r, g, b;

sys/dev/pci/drm/drm_color_mgmt.c

716

static void fill_gamma_888(struct drm_crtc *crtc, unsigned int i, u16 r, u16 g, u16 b,

sys/dev/pci/drm/drm_color_mgmt.c

742

static void fill_gamma_565(struct drm_crtc *crtc, unsigned int i, u16 r, u16 g, u16 b,

sys/dev/pci/drm/drm_color_mgmt.c

771

static void fill_gamma_555(struct drm_crtc *crtc, unsigned int i, u16 r, u16 g, u16 b,

sys/dev/pci/drm/drm_color_mgmt.c

820

static void fill_palette_332(struct drm_crtc *crtc, u16 r, u16 g, u16 b,

sys/dev/pci/drm/drm_color_mgmt.c

857

u16 Y = (i << 8) | i; // relative luminance

sys/dev/pci/drm/drm_connector.c

742

u16 addr;

sys/dev/pci/drm/drm_draw.c

118

u16 color)

sys/dev/pci/drm/drm_draw.c

124

iosys_map_wr(dmap, y * dpitch + x * sizeof(u16), u16, color);

sys/dev/pci/drm/drm_draw.c

66

unsigned int scale, u16 fg16)

sys/dev/pci/drm/drm_draw.c

73

iosys_map_wr(dmap, y * dpitch + x * sizeof(u16), u16, fg16);

sys/dev/pci/drm/drm_draw_internal.h

32

unsigned int scale, u16 fg16);

sys/dev/pci/drm/drm_draw_internal.h

46

u16 color);

sys/dev/pci/drm/drm_edid.c

4798

static int add_3d_struct_modes(struct drm_connector *connector, u16 structure,

sys/dev/pci/drm/drm_edid.c

4866

u16 mask;

sys/dev/pci/drm/drm_edid.c

4867

u16 structure_all;

sys/dev/pci/drm/drm_edid.c

5497

u16 len;

sys/dev/pci/drm/drm_edid.c

6908

u16 hactive = le16_to_cpu(timings->hactive) + 1;

sys/dev/pci/drm/drm_edid.c

6909

u16 vactive = le16_to_cpu(timings->vactive) + 1;

sys/dev/pci/drm/drm_edid.c

7542

u16 w, h;

sys/dev/pci/drm/drm_fb_helper.c

843

u16 red = cmap->red[i];

sys/dev/pci/drm/drm_fb_helper.c

844

u16 green = cmap->green[i];

sys/dev/pci/drm/drm_fb_helper.c

845

u16 blue = cmap->blue[i];

sys/dev/pci/drm/drm_fb_helper.c

871

u16 *r, *g, *b;

sys/dev/pci/drm/drm_fb_helper.c

924

u16 *r = crtc->gamma_store;

sys/dev/pci/drm/drm_fb_helper.c

925

u16 *g = r + crtc->gamma_size;

sys/dev/pci/drm/drm_fb_helper.c

926

u16 *b = g + crtc->gamma_size;

sys/dev/pci/drm/drm_fb_helper.c

959

u16 *r, *g, *b;

sys/dev/pci/drm/drm_format_helper.c

460

u16 *dbuf16 = dbuf;

sys/dev/pci/drm/drm_format_helper.c

461

const u16 *sbuf16 = sbuf;

sys/dev/pci/drm/drm_format_helper.c

462

const u16 *send16 = sbuf16 + pixels;

sys/dev/pci/drm/drm_mipi_dsi.c

1338

int mipi_dsi_dcs_set_column_address(struct mipi_dsi_device *dsi, u16 start,

sys/dev/pci/drm/drm_mipi_dsi.c

1339

u16 end)

sys/dev/pci/drm/drm_mipi_dsi.c

1365

int mipi_dsi_dcs_set_page_address(struct mipi_dsi_device *dsi, u16 start,

sys/dev/pci/drm/drm_mipi_dsi.c

1366

u16 end)

sys/dev/pci/drm/drm_mipi_dsi.c

1442

int mipi_dsi_dcs_set_tear_scanline(struct mipi_dsi_device *dsi, u16 scanline)

sys/dev/pci/drm/drm_mipi_dsi.c

1468

u16 brightness)

sys/dev/pci/drm/drm_mipi_dsi.c

1491

u16 *brightness)

sys/dev/pci/drm/drm_mipi_dsi.c

1517

u16 brightness)

sys/dev/pci/drm/drm_mipi_dsi.c

1540

u16 *brightness)

sys/dev/pci/drm/drm_mipi_dsi.c

1869

u16 brightness)

sys/dev/pci/drm/drm_mipi_dsi.c

1926

u16 start, u16 end)

sys/dev/pci/drm/drm_mipi_dsi.c

1955

u16 start, u16 end)

sys/dev/pci/drm/drm_mipi_dsi.c

1983

u16 scanline)

sys/dev/pci/drm/drm_mipi_dsi.c

650

u16 value)

sys/dev/pci/drm/drm_panic.c

159

static void drm_panic_write_pixel16(void *vaddr, unsigned int offset, u16 color)

sys/dev/pci/drm/drm_panic.c

161

u16 *p = vaddr + offset;

sys/dev/pci/drm/i915/display/dvo_ivch.c

167

static const u16 backup_addresses[] = {

sys/dev/pci/drm/i915/display/dvo_ivch.c

180

u16 width, height;

sys/dev/pci/drm/i915/display/dvo_ivch.c

184

u16 reg_backup[ARRAY_SIZE(backup_addresses)];

sys/dev/pci/drm/i915/display/dvo_ivch.c

194

static bool ivch_read(struct intel_dvo_device *dvo, int addr, u16 *data)

sys/dev/pci/drm/i915/display/dvo_ivch.c

237

static bool ivch_write(struct intel_dvo_device *dvo, int addr, u16 data)

sys/dev/pci/drm/i915/display/dvo_ivch.c

269

u16 temp;

sys/dev/pci/drm/i915/display/dvo_ivch.c

348

u16 vr01, vr30, backlight;

sys/dev/pci/drm/i915/display/dvo_ivch.c

385

u16 vr01;

sys/dev/pci/drm/i915/display/dvo_ivch.c

404

u16 vr40 = 0;

sys/dev/pci/drm/i915/display/dvo_ivch.c

405

u16 vr01 = 0;

sys/dev/pci/drm/i915/display/dvo_ivch.c

406

u16 vr10;

sys/dev/pci/drm/i915/display/dvo_ivch.c

422

u16 x_ratio, y_ratio;

sys/dev/pci/drm/i915/display/dvo_ivch.c

444

u16 val;

sys/dev/pci/drm/i915/display/dvo_ns2501.c

211

u16 pll_b; /* PLL configuration, register B, 1C/1D */

sys/dev/pci/drm/i915/display/dvo_ns2501.c

212

u16 hstart; /* horizontal start, registers C1/C2 */

sys/dev/pci/drm/i915/display/dvo_ns2501.c

213

u16 hstop; /* horizontal total, registers C3/C4 */

sys/dev/pci/drm/i915/display/dvo_ns2501.c

214

u16 vstart; /* vertical start, registers C5/C6 */

sys/dev/pci/drm/i915/display/dvo_ns2501.c

215

u16 vstop; /* vertical total, registers C7/C8 */

sys/dev/pci/drm/i915/display/dvo_ns2501.c

216

u16 vsync; /* manual vertical sync start, 80/81 */

sys/dev/pci/drm/i915/display/dvo_ns2501.c

217

u16 vtotal; /* number of lines generated, 82/83 */

sys/dev/pci/drm/i915/display/dvo_ns2501.c

218

u16 hpos; /* horizontal position + 256, 98/99 */

sys/dev/pci/drm/i915/display/dvo_ns2501.c

219

u16 vpos; /* vertical position, 8e/8f */

sys/dev/pci/drm/i915/display/dvo_ns2501.c

220

u16 voffs; /* vertical output offset, 9c/9d */

sys/dev/pci/drm/i915/display/dvo_ns2501.c

221

u16 hscale; /* horizontal scaling factor, b8/b9 */

sys/dev/pci/drm/i915/display/dvo_ns2501.c

222

u16 vscale; /* vertical scaling factor, 10/11 */

sys/dev/pci/drm/i915/display/i9xx_wm.c

1024

int level, enum plane_id plane_id, u16 value)

sys/dev/pci/drm/i915/display/i9xx_wm.c

1040

int level, u16 value)

sys/dev/pci/drm/i915/display/i9xx_wm.c

1510

static u16 vlv_compute_wm_level(const struct intel_crtc_state *crtc_state,

sys/dev/pci/drm/i915/display/i9xx_wm.c

1653

static u16 vlv_invert_wm_value(u16 wm, u16 fifo_size)

sys/dev/pci/drm/i915/display/i9xx_wm.c

1666

int level, enum plane_id plane_id, u16 value)

sys/dev/pci/drm/i915/display/i9xx_wm.c

2437

u16 pri;

sys/dev/pci/drm/i915/display/i9xx_wm.c

2438

u16 spr;

sys/dev/pci/drm/i915/display/i9xx_wm.c

2439

u16 cur;

sys/dev/pci/drm/i915/display/i9xx_wm.c

2440

u16 fbc;

sys/dev/pci/drm/i915/display/i9xx_wm.c

27

u16 fifo_size;

sys/dev/pci/drm/i915/display/i9xx_wm.c

2718

u16 pri_latency = display->wm.pri_latency[level];

sys/dev/pci/drm/i915/display/i9xx_wm.c

2719

u16 spr_latency = display->wm.spr_latency[level];

sys/dev/pci/drm/i915/display/i9xx_wm.c

2720

u16 cur_latency = display->wm.cur_latency[level];

sys/dev/pci/drm/i915/display/i9xx_wm.c

2744

static void hsw_read_wm_latency(struct intel_display *display, u16 wm[])

sys/dev/pci/drm/i915/display/i9xx_wm.c

2762

static void snb_read_wm_latency(struct intel_display *display, u16 wm[])

sys/dev/pci/drm/i915/display/i9xx_wm.c

2777

static void ilk_read_wm_latency(struct intel_display *display, u16 wm[])

sys/dev/pci/drm/i915/display/i9xx_wm.c

2792

static void intel_fixup_spr_wm_latency(struct intel_display *display, u16 wm[5])

sys/dev/pci/drm/i915/display/i9xx_wm.c

2799

static void intel_fixup_cur_wm_latency(struct intel_display *display, u16 wm[5])

sys/dev/pci/drm/i915/display/i9xx_wm.c

28

u16 max_wm;

sys/dev/pci/drm/i915/display/i9xx_wm.c

2806

static bool ilk_increase_wm_latency(struct intel_display *display, u16 wm[5], u16 min)

sys/dev/pci/drm/i915/display/i9xx_wm.c

2815

wm[level] = max_t(u16, wm[level], DIV_ROUND_UP(min, 5));

sys/dev/pci/drm/i915/display/i9xx_wm.c

44

u16 fsb_freq;

sys/dev/pci/drm/i915/display/i9xx_wm.c

45

u16 mem_freq;

sys/dev/pci/drm/i915/display/i9xx_wm.c

46

u16 display_sr;

sys/dev/pci/drm/i915/display/i9xx_wm.c

47

u16 display_hpll_disable;

sys/dev/pci/drm/i915/display/i9xx_wm.c

48

u16 cursor_sr;

sys/dev/pci/drm/i915/display/i9xx_wm.c

49

u16 cursor_hpll_disable;

sys/dev/pci/drm/i915/display/i9xx_wm.c

967

static u16 g4x_compute_wm(const struct intel_crtc_state *crtc_state,

sys/dev/pci/drm/i915/display/icl_dsi.c

322

u16 hactive = adjusted_mode->crtc_hdisplay;

sys/dev/pci/drm/i915/display/icl_dsi.c

323

u16 dl_buffer_depth;

sys/dev/pci/drm/i915/display/icl_dsi.c

879

u16 htotal, hactive, hsync_start, hsync_end, hsync_size;

sys/dev/pci/drm/i915/display/icl_dsi.c

880

u16 hback_porch;

sys/dev/pci/drm/i915/display/icl_dsi.c

882

u16 vtotal, vactive, vsync_start, vsync_end, vsync_shift;

sys/dev/pci/drm/i915/display/intel_audio.c

908

u16 n;

sys/dev/pci/drm/i915/display/intel_backlight.c

1177

static u16 get_vbt_pwm_freq(struct intel_connector *connector)

sys/dev/pci/drm/i915/display/intel_backlight.c

1180

u16 pwm_freq_hz = connector->panel.vbt.backlight.pwm_freq_hz;

sys/dev/pci/drm/i915/display/intel_backlight.c

1200

u16 pwm_freq_hz = get_vbt_pwm_freq(connector);

sys/dev/pci/drm/i915/display/intel_bios.c

1023

u16 level;

sys/dev/pci/drm/i915/display/intel_bios.c

1060

u16 min_level;

sys/dev/pci/drm/i915/display/intel_bios.c

1771

u16 panel_id, u32 *seq_size)

sys/dev/pci/drm/i915/display/intel_bios.c

1796

current_size = *((const u16 *)(data + index + 1));

sys/dev/pci/drm/i915/display/intel_bios.c

1822

u16 len;

sys/dev/pci/drm/i915/display/intel_bios.c

1836

len = *((const u16 *)(data + index + 2)) + 4;

sys/dev/pci/drm/i915/display/intel_bios.c

1862

u16 len;

sys/dev/pci/drm/i915/display/intel_bios.c

2135

u16 block_size;

sys/dev/pci/drm/i915/display/intel_bios.c

2776

static int child_device_expected_size(u16 version)

sys/dev/pci/drm/i915/display/intel_bios.c

2836

u16 block_size;

sys/dev/pci/drm/i915/display/intel_bios.c

307

const u16 *t = data_block + ptrs->ptr[i].fp_timing.offset +

sys/dev/pci/drm/i915/display/intel_bios.c

3117

BUILD_BUG_ON(sizeof(vbt->vbt_size) != sizeof(u16));

sys/dev/pci/drm/i915/display/intel_bios.c

404

*(u16 *)(ptrs_block + 1) = sizeof(*ptrs);

sys/dev/pci/drm/i915/display/intel_bios.c

90

return *((const u16 *)(block_base + 1));

sys/dev/pci/drm/i915/display/intel_bw.c

1031

u16 old_mask, new_mask;

sys/dev/pci/drm/i915/display/intel_bw.c

1063

u16 old_mask, new_mask;

sys/dev/pci/drm/i915/display/intel_bw.c

1167

u16 psf_points = 0;

sys/dev/pci/drm/i915/display/intel_bw.c

1168

u16 qgv_points = 0;

sys/dev/pci/drm/i915/display/intel_bw.c

122

u16 dclk;

sys/dev/pci/drm/i915/display/intel_bw.c

165

static u16 icl_qgv_points_mask(struct intel_display *display)

sys/dev/pci/drm/i915/display/intel_bw.c

169

u16 qgv_points = 0, psf_points = 0;

sys/dev/pci/drm/i915/display/intel_bw.c

185

static bool is_sagv_enabled(struct intel_display *display, u16 points_mask)

sys/dev/pci/drm/i915/display/intel_bw.c

224

u16 dclk;

sys/dev/pci/drm/i915/display/intel_bw.c

381

u16 dclk = 0;

sys/dev/pci/drm/i915/display/intel_bw.c

391

u16 displayrtids;

sys/dev/pci/drm/i915/display/intel_bw.c

46

u16 qgv_point_peakbw;

sys/dev/pci/drm/i915/display/intel_bw.c

53

u16 qgv_points_mask;

sys/dev/pci/drm/i915/display/intel_bw.c

61

u16 dclk, t_rp, t_rdpre, t_rc, t_ras, t_rcd;

sys/dev/pci/drm/i915/display/intel_bw.c

979

static u16 icl_prepare_qgv_points_mask(struct intel_display *display,

sys/dev/pci/drm/i915/display/intel_cdclk.c

1321

u16 refclk;

sys/dev/pci/drm/i915/display/intel_cdclk.c

1322

u16 waveform;

sys/dev/pci/drm/i915/display/intel_cdclk.c

1545

static int cdclk_squash_divider(u16 waveform)

sys/dev/pci/drm/i915/display/intel_cdclk.c

1550

static int cdclk_divider(int cdclk, int vco, u16 waveform)

sys/dev/pci/drm/i915/display/intel_cdclk.c

1780

u16 waveform;

sys/dev/pci/drm/i915/display/intel_cdclk.c

1907

int cdclk, int vco, u16 waveform)

sys/dev/pci/drm/i915/display/intel_cdclk.c

1927

static u16 cdclk_squash_waveform(struct intel_display *display,

sys/dev/pci/drm/i915/display/intel_cdclk.c

1968

u16 waveform)

sys/dev/pci/drm/i915/display/intel_cdclk.c

2025

u16 old_waveform, new_waveform, mid_waveform;

sys/dev/pci/drm/i915/display/intel_cdclk.c

2107

u16 waveform;

sys/dev/pci/drm/i915/display/intel_cdclk.c

2153

u16 waveform = cdclk_squash_waveform(display, cdclk);

sys/dev/pci/drm/i915/display/intel_cdclk.c

231

u16 hpllcc = 0;

sys/dev/pci/drm/i915/display/intel_cdclk.c

2376

u16 old_waveform;

sys/dev/pci/drm/i915/display/intel_cdclk.c

2377

u16 new_waveform;

sys/dev/pci/drm/i915/display/intel_cdclk.c

2514

u16 cdclk,

sys/dev/pci/drm/i915/display/intel_cdclk.c

273

u16 gcfgc = 0;

sys/dev/pci/drm/i915/display/intel_cdclk.c

297

u16 gcfgc = 0;

sys/dev/pci/drm/i915/display/intel_cdclk.c

397

u16 tmp = 0;

sys/dev/pci/drm/i915/display/intel_cdclk.c

440

u16 gcfgc = 0;

sys/dev/pci/drm/i915/display/intel_cdclk.c

479

u16 tmp = 0;

sys/dev/pci/drm/i915/display/intel_cdclk.c

520

u16 tmp = 0;

sys/dev/pci/drm/i915/display/intel_color.c

1190

u16 val = 0xffff * i / (lut_size - 1);

sys/dev/pci/drm/i915/display/intel_color.c

1200

static u16 lut_limited_range(unsigned int value)

sys/dev/pci/drm/i915/display/intel_color.c

2294

static int i9xx_lut_10_diff(u16 a, u16 b)

sys/dev/pci/drm/i915/display/intel_color.c

599

static u16 ctm_to_twos_complement(u64 coeff, int int_bits, int frac_bits)

sys/dev/pci/drm/i915/display/intel_color.c

834

static u32 _i9xx_lut_10_ldw(u16 a)

sys/dev/pci/drm/i915/display/intel_color.c

847

static u32 _i9xx_lut_10_udw(u16 a, u16 b)

sys/dev/pci/drm/i915/display/intel_color.c

877

u16 red = REG_FIELD_GET(PALETTE_10BIT_RED_LDW_MASK, ldw) |

sys/dev/pci/drm/i915/display/intel_color.c

879

u16 green = REG_FIELD_GET(PALETTE_10BIT_GREEN_LDW_MASK, ldw) |

sys/dev/pci/drm/i915/display/intel_color.c

881

u16 blue = REG_FIELD_GET(PALETTE_10BIT_BLUE_LDW_MASK, ldw) |

sys/dev/pci/drm/i915/display/intel_color.c

932

static u16 i965_lut_11p6_max_pack(u32 val)

sys/dev/pci/drm/i915/display/intel_cx0_phy.c

211

int lane, u16 addr)

sys/dev/pci/drm/i915/display/intel_cx0_phy.c

2215

u16 host_bridge_pci_dev_id = 0;

sys/dev/pci/drm/i915/display/intel_cx0_phy.c

2223

static u16 intel_c20_hdmi_tmds_tx_cgf_1(struct intel_crtc_state *crtc_state)

sys/dev/pci/drm/i915/display/intel_cx0_phy.c

2226

u16 tx_misc;

sys/dev/pci/drm/i915/display/intel_cx0_phy.c

2227

u16 tx_dcc_cal_dac_ctrl_range = 8;

sys/dev/pci/drm/i915/display/intel_cx0_phy.c

2228

u16 tx_term_ctrl = 2;

sys/dev/pci/drm/i915/display/intel_cx0_phy.c

251

int lane, u16 addr)

sys/dev/pci/drm/i915/display/intel_cx0_phy.c

275

u8 lane_mask, u16 addr)

sys/dev/pci/drm/i915/display/intel_cx0_phy.c

283

int lane, u16 addr, u8 data, bool committed)

sys/dev/pci/drm/i915/display/intel_cx0_phy.c

342

int lane, u16 addr, u8 data, bool committed)

sys/dev/pci/drm/i915/display/intel_cx0_phy.c

363

u8 lane_mask, u16 addr, u8 data, bool committed)

sys/dev/pci/drm/i915/display/intel_cx0_phy.c

372

int lane, u16 addr, u16 data)

sys/dev/pci/drm/i915/display/intel_cx0_phy.c

385

static u16 intel_c20_sram_read(struct intel_encoder *encoder,

sys/dev/pci/drm/i915/display/intel_cx0_phy.c

386

int lane, u16 addr)

sys/dev/pci/drm/i915/display/intel_cx0_phy.c

389

u16 val;

sys/dev/pci/drm/i915/display/intel_cx0_phy.c

404

int lane, u16 addr, u8 clear, u8 set, bool committed)

sys/dev/pci/drm/i915/display/intel_cx0_phy.c

416

u8 lane_mask, u16 addr, u8 clear, u8 set, bool committed)

sys/dev/pci/drm/i915/display/intel_display.c

2514

intel_link_compute_m_n(u16 bits_per_pixel_x16, int nlanes,

sys/dev/pci/drm/i915/display/intel_display.c

4150

static u16 hsw_linetime_wm(const struct intel_crtc_state *crtc_state)

sys/dev/pci/drm/i915/display/intel_display.c

4165

static u16 hsw_ips_linetime_wm(const struct intel_crtc_state *crtc_state,

sys/dev/pci/drm/i915/display/intel_display.c

4181

static u16 skl_linetime_wm(const struct intel_crtc_state *crtc_state)

sys/dev/pci/drm/i915/display/intel_display.h

399

void intel_link_compute_m_n(u16 bpp, int nlanes,

sys/dev/pci/drm/i915/display/intel_display_core.h

216

u16 version;

sys/dev/pci/drm/i915/display/intel_display_core.h

253

u16 pri_latency[5];

sys/dev/pci/drm/i915/display/intel_display_core.h

255

u16 spr_latency[5];

sys/dev/pci/drm/i915/display/intel_display_core.h

257

u16 cur_latency[5];

sys/dev/pci/drm/i915/display/intel_display_core.h

263

u16 skl_latency[8];

sys/dev/pci/drm/i915/display/intel_display_core.h

484

u16 linetime[I915_MAX_PIPES];

sys/dev/pci/drm/i915/display/intel_display_core.h

533

u16 saveGCDGMBUS;

sys/dev/pci/drm/i915/display/intel_display_device.c

1003

static const u16 tgl_uy_ids[] = {

sys/dev/pci/drm/i915/display/intel_display_device.c

1083

static const u16 adls_rpls_ids[] = {

sys/dev/pci/drm/i915/display/intel_display_device.c

1178

static const u16 adlp_adln_ids[] = {

sys/dev/pci/drm/i915/display/intel_display_device.c

1183

static const u16 adlp_rplu_ids[] = {

sys/dev/pci/drm/i915/display/intel_display_device.c

1188

static const u16 adlp_rplp_ids[] = {

sys/dev/pci/drm/i915/display/intel_display_device.c

1243

static const u16 dg2_g10_ids[] = {

sys/dev/pci/drm/i915/display/intel_display_device.c

1248

static const u16 dg2_g11_ids[] = {

sys/dev/pci/drm/i915/display/intel_display_device.c

1253

static const u16 dg2_g12_ids[] = {

sys/dev/pci/drm/i915/display/intel_display_device.c

1377

static const u16 mtl_u_ids[] = {

sys/dev/pci/drm/i915/display/intel_display_device.c

1408

static const u16 wcl_ids[] = {

sys/dev/pci/drm/i915/display/intel_display_device.c

1502

u16 ver;

sys/dev/pci/drm/i915/display/intel_display_device.c

1503

u16 rel;

sys/dev/pci/drm/i915/display/intel_display_device.c

1591

const u16 *id;

sys/dev/pci/drm/i915/display/intel_display_device.c

42

const u16 *pciidlist;

sys/dev/pci/drm/i915/display/intel_display_device.c

541

static const u16 hsw_ult_ids[] = {

sys/dev/pci/drm/i915/display/intel_display_device.c

548

static const u16 hsw_ulx_ids[] = {

sys/dev/pci/drm/i915/display/intel_display_device.c

591

static const u16 bdw_ult_ids[] = {

sys/dev/pci/drm/i915/display/intel_display_device.c

599

static const u16 bdw_ulx_ids[] = {

sys/dev/pci/drm/i915/display/intel_display_device.c

687

static const u16 skl_ult_ids[] = {

sys/dev/pci/drm/i915/display/intel_display_device.c

694

static const u16 skl_ulx_ids[] = {

sys/dev/pci/drm/i915/display/intel_display_device.c

724

static const u16 kbl_ult_ids[] = {

sys/dev/pci/drm/i915/display/intel_display_device.c

731

static const u16 kbl_ulx_ids[] = {

sys/dev/pci/drm/i915/display/intel_display_device.c

765

static const u16 cfl_ult_ids[] = {

sys/dev/pci/drm/i915/display/intel_display_device.c

774

static const u16 cfl_ulx_ids[] = {

sys/dev/pci/drm/i915/display/intel_display_device.c

795

static const u16 cml_ult_ids[] = {

sys/dev/pci/drm/i915/display/intel_display_device.c

911

static const u16 icl_port_f_ids[] = {

sys/dev/pci/drm/i915/display/intel_display_device.h

256

u16 ver;

sys/dev/pci/drm/i915/display/intel_display_device.h

257

u16 rel;

sys/dev/pci/drm/i915/display/intel_display_device.h

258

u16 step; /* hardware */

sys/dev/pci/drm/i915/display/intel_display_device.h

266

u16 port_mask;

sys/dev/pci/drm/i915/display/intel_display_device.h

287

u16 size; /* in blocks */

sys/dev/pci/drm/i915/display/intel_display_power_well.h

105

u16 fixed_enable_delay:1;

sys/dev/pci/drm/i915/display/intel_display_power_well.h

107

u16 has_vga:1;

sys/dev/pci/drm/i915/display/intel_display_power_well.h

108

u16 has_fuses:1;

sys/dev/pci/drm/i915/display/intel_display_power_well.h

113

u16 is_tc_tbt:1;

sys/dev/pci/drm/i915/display/intel_display_power_well.h

115

u16 enable_timeout;

sys/dev/pci/drm/i915/display/intel_display_power_well.h

98

u16 irq_pipe_mask:4;

sys/dev/pci/drm/i915/display/intel_display_power_well.h

99

u16 always_on:1;

sys/dev/pci/drm/i915/display/intel_display_types.h

1128

u16 su_y_granularity;

sys/dev/pci/drm/i915/display/intel_display_types.h

1275

u16 compressed_bpp_x16;

sys/dev/pci/drm/i915/display/intel_display_types.h

1284

u16 linetime;

sys/dev/pci/drm/i915/display/intel_display_types.h

1285

u16 ips_linetime;

sys/dev/pci/drm/i915/display/intel_display_types.h

1323

u16 flipline, vmin, vmax, guardband;

sys/dev/pci/drm/i915/display/intel_display_types.h

1407

u16 vmax_vblank_start;

sys/dev/pci/drm/i915/display/intel_display_types.h

1582

u16 hdisplay, vdisplay;

sys/dev/pci/drm/i915/display/intel_display_types.h

167

u16 cloneable;

sys/dev/pci/drm/i915/display/intel_display_types.h

1678

u16 su_w_granularity;

sys/dev/pci/drm/i915/display/intel_display_types.h

1679

u16 su_y_granularity;

sys/dev/pci/drm/i915/display/intel_display_types.h

314

u16 power_up; /* eDP: T1+T3, LVDS: T1+T2 */

sys/dev/pci/drm/i915/display/intel_display_types.h

315

u16 backlight_on; /* eDP: T8, LVDS: T5 */

sys/dev/pci/drm/i915/display/intel_display_types.h

316

u16 backlight_off; /* eDP: T9, LVDS: T6/TX */

sys/dev/pci/drm/i915/display/intel_display_types.h

317

u16 power_down; /* eDP: T10, LVDS: T3 */

sys/dev/pci/drm/i915/display/intel_display_types.h

318

u16 power_cycle; /* eDP: T11+T12, LVDS: T7+T4 */

sys/dev/pci/drm/i915/display/intel_display_types.h

366

u16 pwm_freq_hz;

sys/dev/pci/drm/i915/display/intel_display_types.h

367

u16 brightness_precision_bits;

sys/dev/pci/drm/i915/display/intel_display_types.h

368

u16 hdr_dpcd_refresh_timeout;

sys/dev/pci/drm/i915/display/intel_display_types.h

378

u16 panel_id;

sys/dev/pci/drm/i915/display/intel_display_types.h

381

u16 bl_ports;

sys/dev/pci/drm/i915/display/intel_display_types.h

382

u16 cabc_ports;

sys/dev/pci/drm/i915/display/intel_display_types.h

634

u16 alpha;

sys/dev/pci/drm/i915/display/intel_display_types.h

635

u16 pixel_blend_mode;

sys/dev/pci/drm/i915/display/intel_display_types.h

796

u16 min_ddb_alloc;

sys/dev/pci/drm/i915/display/intel_display_types.h

797

u16 blocks;

sys/dev/pci/drm/i915/display/intel_display_types.h

836

u16 plane[I915_MAX_PLANES];

sys/dev/pci/drm/i915/display/intel_display_types.h

901

u16 plane_min_ddb[I915_MAX_PLANES];

sys/dev/pci/drm/i915/display/intel_display_types.h

902

u16 plane_interim_ddb[I915_MAX_PLANES];

sys/dev/pci/drm/i915/display/intel_display_types.h

944

u16 coeff[9];

sys/dev/pci/drm/i915/display/intel_display_types.h

945

u16 preoff[3];

sys/dev/pci/drm/i915/display/intel_display_types.h

946

u16 postoff[3];

sys/dev/pci/drm/i915/display/intel_dmc.c

339

u16 dmcc_ver;

sys/dev/pci/drm/i915/display/intel_dp.c

1423

u16 dsc_max_compressed_bpp = 0;

sys/dev/pci/drm/i915/display/intel_dp.c

2029

u16 intel_dp_dsc_max_sink_compressed_bppx16(const struct intel_connector *connector,

sys/dev/pci/drm/i915/display/intel_dp.c

2033

u16 max_bppx16 = drm_edp_dsc_sink_output_bpp(connector->dp.dsc_dpcd);

sys/dev/pci/drm/i915/display/intel_dp.c

957

u16 intel_dp_dsc_get_max_compressed_bpp(struct intel_display *display,

sys/dev/pci/drm/i915/display/intel_dp.h

139

u16 intel_dp_dsc_get_max_compressed_bpp(struct intel_display *display,

sys/dev/pci/drm/i915/display/intel_dp_mst.c

1463

u16 dsc_max_compressed_bpp = 0;

sys/dev/pci/drm/i915/display/intel_dpll_mgr.h

259

u16 tx[3];

sys/dev/pci/drm/i915/display/intel_dpll_mgr.h

260

u16 cmn[4];

sys/dev/pci/drm/i915/display/intel_dpll_mgr.h

262

u16 mplla[10];

sys/dev/pci/drm/i915/display/intel_dpll_mgr.h

263

u16 mpllb[11];

sys/dev/pci/drm/i915/display/intel_dsi.h

102

u16 hs_tx_timeout;

sys/dev/pci/drm/i915/display/intel_dsi.h

103

u16 lp_rx_timeout;

sys/dev/pci/drm/i915/display/intel_dsi.h

104

u16 turn_arnd_val;

sys/dev/pci/drm/i915/display/intel_dsi.h

105

u16 rst_timer_val;

sys/dev/pci/drm/i915/display/intel_dsi.h

106

u16 hs_to_lp_count;

sys/dev/pci/drm/i915/display/intel_dsi.h

107

u16 clk_lp_to_hs_count;

sys/dev/pci/drm/i915/display/intel_dsi.h

108

u16 clk_hs_to_lp_count;

sys/dev/pci/drm/i915/display/intel_dsi.h

110

u16 init_count;

sys/dev/pci/drm/i915/display/intel_dsi.h

112

u16 burst_mode_ratio;

sys/dev/pci/drm/i915/display/intel_dsi.h

115

u16 backlight_off_delay;

sys/dev/pci/drm/i915/display/intel_dsi.h

116

u16 backlight_on_delay;

sys/dev/pci/drm/i915/display/intel_dsi.h

117

u16 panel_on_delay;

sys/dev/pci/drm/i915/display/intel_dsi.h

118

u16 panel_off_delay;

sys/dev/pci/drm/i915/display/intel_dsi.h

119

u16 panel_pwr_cycle_delay;

sys/dev/pci/drm/i915/display/intel_dsi.h

157

static inline u16 intel_dsi_encoder_ports(struct intel_encoder *encoder)

sys/dev/pci/drm/i915/display/intel_dsi.h

56

u16 ports; /* VLV DSI */

sys/dev/pci/drm/i915/display/intel_dsi.h

57

u16 phys; /* ICL DSI */

sys/dev/pci/drm/i915/display/intel_dsi.h

64

u16 operation_mode;

sys/dev/pci/drm/i915/display/intel_dsi.h

99

u16 lp_byte_clk;

sys/dev/pci/drm/i915/display/intel_dsi_vbt.c

111

u16 len;

sys/dev/pci/drm/i915/display/intel_dsi_vbt.c

119

len = *((u16 *) data);

sys/dev/pci/drm/i915/display/intel_dsi_vbt.c

472

const u16 target_addr)

sys/dev/pci/drm/i915/display/intel_dsi_vbt.c

488

const u16 target_addr)

sys/dev/pci/drm/i915/display/intel_dsi_vbt.c

503

u16 target_addr = *(u16 *)(data + 3);

sys/dev/pci/drm/i915/display/intel_dsi_vbt.c

562

u16 i2c_address;

sys/dev/pci/drm/i915/display/intel_dsi_vbt.c

60

u16 target_addr;

sys/dev/pci/drm/i915/display/intel_dsi_vbt.c

770

bool intel_dsi_vbt_init(struct intel_dsi *intel_dsi, u16 panel_id)

sys/dev/pci/drm/i915/display/intel_dsi_vbt.c

777

u16 burst_mode_ratio;

sys/dev/pci/drm/i915/display/intel_dsi_vbt.h

14

bool intel_dsi_vbt_init(struct intel_dsi *intel_dsi, u16 panel_id);

sys/dev/pci/drm/i915/display/intel_dsi_vbt_defs.h

103

u16 dsi_usage:1;

sys/dev/pci/drm/i915/display/intel_dsi_vbt_defs.h

104

u16 rsvd4:15;

sys/dev/pci/drm/i915/display/intel_dsi_vbt_defs.h

123

u16 dphy_param_valid:1;

sys/dev/pci/drm/i915/display/intel_dsi_vbt_defs.h

124

u16 eot_pkt_disabled:1;

sys/dev/pci/drm/i915/display/intel_dsi_vbt_defs.h

125

u16 enable_clk_stop:1;

sys/dev/pci/drm/i915/display/intel_dsi_vbt_defs.h

126

u16 blanking_packets_during_bllp:1; /* 219+ */

sys/dev/pci/drm/i915/display/intel_dsi_vbt_defs.h

127

u16 lp_clock_during_lpm:1; /* 219+ */

sys/dev/pci/drm/i915/display/intel_dsi_vbt_defs.h

128

u16 rsvd7:11;

sys/dev/pci/drm/i915/display/intel_dsi_vbt_defs.h

164

u16 tclk_prepare_clkzero;

sys/dev/pci/drm/i915/display/intel_dsi_vbt_defs.h

170

u16 ths_prepare_hszero;

sys/dev/pci/drm/i915/display/intel_dsi_vbt_defs.h

190

u16 panel_on_delay;

sys/dev/pci/drm/i915/display/intel_dsi_vbt_defs.h

191

u16 bl_enable_delay;

sys/dev/pci/drm/i915/display/intel_dsi_vbt_defs.h

192

u16 bl_disable_delay;

sys/dev/pci/drm/i915/display/intel_dsi_vbt_defs.h

193

u16 panel_off_delay;

sys/dev/pci/drm/i915/display/intel_dsi_vbt_defs.h

194

u16 panel_power_cycle_delay;

sys/dev/pci/drm/i915/display/intel_dsi_vbt_defs.h

47

u16 panel_id;

sys/dev/pci/drm/i915/display/intel_dsi_vbt_defs.h

88

u16 dual_link:2;

sys/dev/pci/drm/i915/display/intel_dsi_vbt_defs.h

89

u16 lane_cnt:2;

sys/dev/pci/drm/i915/display/intel_dsi_vbt_defs.h

90

u16 pixel_overlap:3;

sys/dev/pci/drm/i915/display/intel_dsi_vbt_defs.h

91

u16 rgb_flip:1;

sys/dev/pci/drm/i915/display/intel_dsi_vbt_defs.h

95

u16 dl_dcs_cabc_ports:2;

sys/dev/pci/drm/i915/display/intel_dsi_vbt_defs.h

96

u16 dl_dcs_backlight_ports:2;

sys/dev/pci/drm/i915/display/intel_dsi_vbt_defs.h

97

u16 port_sync:1; /* 219-230 */

sys/dev/pci/drm/i915/display/intel_dsi_vbt_defs.h

98

u16 rsvd3:3;

sys/dev/pci/drm/i915/display/intel_fbc.c

240

static u16 intel_fbc_override_cfb_stride(const struct intel_plane_state *plane_state)

sys/dev/pci/drm/i915/display/intel_fbc.c

91

u16 override_cfb_stride;

sys/dev/pci/drm/i915/display/intel_fbc.c

92

u16 interval;

sys/dev/pci/drm/i915/display/intel_hdmi.c

1613

u16 timeout;

sys/dev/pci/drm/i915/display/intel_lspcon.c

362

u16 reg;

sys/dev/pci/drm/i915/display/intel_lspcon.c

441

u16 reg;

sys/dev/pci/drm/i915/display/intel_lspcon.c

616

u16 reg = LSPCON_MCA_AVI_IF_CTRL;

sys/dev/pci/drm/i915/display/intel_lspcon.c

631

u16 reg = LSPCON_PARADE_AVI_IF_CTRL;

sys/dev/pci/drm/i915/display/intel_opregion.c

124

u16 bclm[20]; /* backlight level duty cycle mapping table */

sys/dev/pci/drm/i915/display/intel_opregion.c

314

u16 swsci_val;

sys/dev/pci/drm/i915/display/intel_overlay.c

179

u16 Y_VCOEFS[N_VERT_Y_TAPS * N_PHASES]; /* 0x200 */

sys/dev/pci/drm/i915/display/intel_overlay.c

180

u16 RESERVEDD[0x100 / 2 - N_VERT_Y_TAPS * N_PHASES];

sys/dev/pci/drm/i915/display/intel_overlay.c

181

u16 Y_HCOEFS[N_HORIZ_Y_TAPS * N_PHASES]; /* 0x300 */

sys/dev/pci/drm/i915/display/intel_overlay.c

182

u16 RESERVEDE[0x200 / 2 - N_HORIZ_Y_TAPS * N_PHASES];

sys/dev/pci/drm/i915/display/intel_overlay.c

183

u16 UV_VCOEFS[N_VERT_UV_TAPS * N_PHASES]; /* 0x500 */

sys/dev/pci/drm/i915/display/intel_overlay.c

184

u16 RESERVEDF[0x100 / 2 - N_VERT_UV_TAPS * N_PHASES];

sys/dev/pci/drm/i915/display/intel_overlay.c

185

u16 UV_HCOEFS[N_HORIZ_UV_TAPS * N_PHASES]; /* 0x600 */

sys/dev/pci/drm/i915/display/intel_overlay.c

186

u16 RESERVEDG[0x100 / 2 - N_HORIZ_UV_TAPS * N_PHASES];

sys/dev/pci/drm/i915/display/intel_overlay.c

577

static const u16 y_static_hcoeffs[N_PHASES][N_HORIZ_Y_TAPS] = {

sys/dev/pci/drm/i915/display/intel_overlay.c

597

static const u16 uv_static_hcoeffs[N_PHASES][N_HORIZ_UV_TAPS] = {

sys/dev/pci/drm/i915/display/intel_pch_refclk.c

346

static const u16 sscdivintphase[] = {

sys/dev/pci/drm/i915/display/intel_pmdemand.c

22

u16 qclk_gv_bw;

sys/dev/pci/drm/i915/display/intel_pmdemand.c

254

min_t(u16, hweight16(pmdemand_state->active_combo_phys_mask),

sys/dev/pci/drm/i915/display/intel_pmdemand.c

30

u16 cdclk_freq_mhz;

sys/dev/pci/drm/i915/display/intel_pmdemand.c

32

u16 ddiclk_max;

sys/dev/pci/drm/i915/display/intel_pmdemand.c

376

min_t(u16, new_pmdemand_state->params.active_phys + 1, 7);

sys/dev/pci/drm/i915/display/intel_pmdemand.c

43

u16 active_combo_phys_mask;

sys/dev/pci/drm/i915/display/intel_pps.c

1509

vbt->power_cycle = max_t(u16, vbt->power_cycle, msecs_to_pps_units(1300));

sys/dev/pci/drm/i915/display/intel_psr.c

1275

u16 y_granularity = 0;

sys/dev/pci/drm/i915/display/intel_psr.c

2574

u16 y_alignment;

sys/dev/pci/drm/i915/display/intel_psr.c

535

u16 w;

sys/dev/pci/drm/i915/display/intel_sbi.c

16

static int intel_sbi_rw(struct intel_display *display, u16 reg,

sys/dev/pci/drm/i915/display/intel_sbi.c

66

u32 intel_sbi_read(struct intel_display *display, u16 reg,

sys/dev/pci/drm/i915/display/intel_sbi.c

76

void intel_sbi_write(struct intel_display *display, u16 reg, u32 value,

sys/dev/pci/drm/i915/display/intel_sbi.h

22

u32 intel_sbi_read(struct intel_display *display, u16 reg,

sys/dev/pci/drm/i915/display/intel_sbi.h

24

void intel_sbi_write(struct intel_display *display, u16 reg, u32 value,

sys/dev/pci/drm/i915/display/intel_sdvo.c

120

u16 hotplug_active;

sys/dev/pci/drm/i915/display/intel_sdvo.c

132

u16 output_flag;

sys/dev/pci/drm/i915/display/intel_sdvo.c

1472

u16 val;

sys/dev/pci/drm/i915/display/intel_sdvo.c

1660

u16 active_outputs = 0;

sys/dev/pci/drm/i915/display/intel_sdvo.c

1690

u16 active_outputs = 0;

sys/dev/pci/drm/i915/display/intel_sdvo.c

2029

static u16 intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)

sys/dev/pci/drm/i915/display/intel_sdvo.c

2032

u16 hotplug;

sys/dev/pci/drm/i915/display/intel_sdvo.c

2143

u16 response;

sys/dev/pci/drm/i915/display/intel_sdvo.c

2568

u16 mask = 0;

sys/dev/pci/drm/i915/display/intel_sdvo.c

2796

intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, u16 type)

sys/dev/pci/drm/i915/display/intel_sdvo.c

2849

intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, u16 type)

sys/dev/pci/drm/i915/display/intel_sdvo.c

2889

intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, u16 type)

sys/dev/pci/drm/i915/display/intel_sdvo.c

2921

intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, u16 type)

sys/dev/pci/drm/i915/display/intel_sdvo.c

2979

static u16 intel_sdvo_filter_output_flags(u16 flags)

sys/dev/pci/drm/i915/display/intel_sdvo.c

2996

static bool intel_sdvo_output_init(struct intel_sdvo *sdvo, u16 type)

sys/dev/pci/drm/i915/display/intel_sdvo.c

3014

static const u16 probe_order[] = {

sys/dev/pci/drm/i915/display/intel_sdvo.c

3026

u16 flags;

sys/dev/pci/drm/i915/display/intel_sdvo.c

3039

u16 type = flags & probe_order[i];

sys/dev/pci/drm/i915/display/intel_sdvo.c

3140

u16 response, data_value[2];

sys/dev/pci/drm/i915/display/intel_sdvo.c

3249

u16 response, data_value[2];

sys/dev/pci/drm/i915/display/intel_sdvo.c

3264

u16 response;

sys/dev/pci/drm/i915/display/intel_sdvo.c

685

u16 outputs)

sys/dev/pci/drm/i915/display/intel_sdvo.c

693

u16 *outputs)

sys/dev/pci/drm/i915/display/intel_sdvo.c

743

u16 outputs)

sys/dev/pci/drm/i915/display/intel_sdvo.c

831

u16 width, height;

sys/dev/pci/drm/i915/display/intel_sdvo.c

832

u16 h_blank_len, h_sync_len, v_blank_len, v_sync_len;

sys/dev/pci/drm/i915/display/intel_sdvo.c

833

u16 h_sync_offset, v_sync_offset;

sys/dev/pci/drm/i915/display/intel_sdvo_regs.h

106

u16 min; /* pixel clock, in 10kHz units */

sys/dev/pci/drm/i915/display/intel_sdvo_regs.h

107

u16 max; /* pixel clock, in 10kHz units */

sys/dev/pci/drm/i915/display/intel_sdvo_regs.h

111

u16 clock;

sys/dev/pci/drm/i915/display/intel_sdvo_regs.h

112

u16 width;

sys/dev/pci/drm/i915/display/intel_sdvo_regs.h

113

u16 height;

sys/dev/pci/drm/i915/display/intel_sdvo_regs.h

191

u16 in0, in1;

sys/dev/pci/drm/i915/display/intel_sdvo_regs.h

224

u16 interrupt_status;

sys/dev/pci/drm/i915/display/intel_sdvo_regs.h

579

u16 trip_low;

sys/dev/pci/drm/i915/display/intel_sdvo_regs.h

580

u16 trip_high;

sys/dev/pci/drm/i915/display/intel_sdvo_regs.h

581

u16 value;

sys/dev/pci/drm/i915/display/intel_sdvo_regs.h

585

u16 trip_low;

sys/dev/pci/drm/i915/display/intel_sdvo_regs.h

586

u16 trip_high;

sys/dev/pci/drm/i915/display/intel_sdvo_regs.h

637

u16 max_value;

sys/dev/pci/drm/i915/display/intel_sdvo_regs.h

638

u16 default_value;

sys/dev/pci/drm/i915/display/intel_sdvo_regs.h

67

u16 output_flags;

sys/dev/pci/drm/i915/display/intel_sdvo_regs.h

679

u16 value;

sys/dev/pci/drm/i915/display/intel_sdvo_regs.h

78

u16 clock; /* pixel clock, in 10kHz units */

sys/dev/pci/drm/i915/display/intel_sprite.c

1086

u16 gamma[8];

sys/dev/pci/drm/i915/display/intel_sprite.c

1102

static void ilk_sprite_linear_gamma(u16 gamma[17])

sys/dev/pci/drm/i915/display/intel_sprite.c

1116

u16 gamma[17];

sys/dev/pci/drm/i915/display/intel_sprite.c

349

u16 gamma[8];

sys/dev/pci/drm/i915/display/intel_sprite.c

57

static void i9xx_plane_linear_gamma(u16 gamma[8])

sys/dev/pci/drm/i915/display/intel_sprite.c

735

u16 gamma[18])

sys/dev/pci/drm/i915/display/intel_sprite.c

764

u16 gamma[18];

sys/dev/pci/drm/i915/display/intel_tv.c

1754

u16 w, h;

sys/dev/pci/drm/i915/display/intel_tv.c

320

u16 refresh; /* in millihertz (for precision) */

sys/dev/pci/drm/i915/display/intel_tv.c

323

u16 hblank_start, hblank_end, htotal;

sys/dev/pci/drm/i915/display/intel_tv.c

329

u16 nbr_end;

sys/dev/pci/drm/i915/display/intel_tv.c

333

u16 vburst_end_f1;

sys/dev/pci/drm/i915/display/intel_tv.c

335

u16 vburst_end_f2;

sys/dev/pci/drm/i915/display/intel_tv.c

337

u16 vburst_end_f3;

sys/dev/pci/drm/i915/display/intel_tv.c

339

u16 vburst_end_f4;

sys/dev/pci/drm/i915/display/intel_tv.c

343

u16 dda2_size, dda3_size;

sys/dev/pci/drm/i915/display/intel_tv.c

345

u16 dda2_inc, dda3_inc;

sys/dev/pci/drm/i915/display/intel_tv.c

64

u16 blank, black;

sys/dev/pci/drm/i915/display/intel_tv.c

69

u16 ry, gy, by, ay;

sys/dev/pci/drm/i915/display/intel_tv.c

70

u16 ru, gu, bu, au;

sys/dev/pci/drm/i915/display/intel_tv.c

71

u16 rv, gv, bv, av;

sys/dev/pci/drm/i915/display/intel_tv.c

883

u16 top, bottom;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

100

u16 header_size;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1008

u16 t0; /* power on */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1009

u16 t1; /* backlight on */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

101

u16 vbt_size;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1010

u16 t2; /* backlight off */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1011

u16 t3; /* power off */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1012

u16 t4; /* power cycle */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1024

u16 underscan_overscan_hdtv_component:2;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1025

u16 rsvd1:10;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1026

u16 underscan_overscan_hdtv_dvi:2;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1027

u16 add_modes_to_avoid_overscan_issue:1;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1028

u16 d_connector_support:1;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1036

u16 t1_t3;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1037

u16 t8;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1038

u16 t9;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1039

u16 t10;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1040

u16 t11_t12;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1070

u16 pwm_on_to_backlight_enable;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1071

u16 backlight_disable_to_pwm_off;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1096

u16 edp_s3d_feature; /* 162+ */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1097

u16 edp_t3_optimization; /* 165+ */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1099

u16 fast_link_training; /* 182+ */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1100

u16 dpcd_600h_write_required; /* 185+ */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1102

u16 full_link_params_provided; /* 199+ */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1104

u16 apical_enable; /* 203+ */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1106

u16 edp_fast_link_training_rate[16]; /* 224+ */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1107

u16 edp_max_port_link_rate[16]; /* 244+ */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1108

u16 edp_dsc_disable; /* 251+ */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1109

u16 t6_delay_support; /* 260+ */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1110

u16 link_idle_time[16]; /* 260+ */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1130

u16 num_entries;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1159

u16 display_select;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1163

u16 num_entries;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

117

u16 version;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1178

u16 display_select;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

118

u16 header_size;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

119

u16 bdb_size;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1206

u16 ssc_bits;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1207

u16 ssc_freq;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1208

u16 ssc_ddt;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1210

u16 panel_color_depth;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1216

u16 lcdvcc_s0_enable; /* 200+ */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1225

u16 offset; /* offsets are from start of bdb */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1248

u16 x_res;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1249

u16 y_res;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1260

u16 terminator;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1287

u16 scaling_enable; /* 187+ */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1291

u16 dual_lfp_port_sync_enable; /* 231+ */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1292

u16 gpu_dithering_for_banding_artifacts; /* 245+ */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1307

u16 pwm_freq_hz;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1319

u16 level;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1320

u16 reserved;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1331

u16 hdr_dpcd_refresh_timeout[16]; /* 239+ */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1347

u16 backlight_adjust;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1348

u16 lux;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1381

u16 dpst; /* 228-256 */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1382

u16 psr; /* 228+ */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1383

u16 drrs; /* 228+ */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1384

u16 lace_support; /* 228+ */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1385

u16 adt; /* 228+ */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1386

u16 dmrrs; /* 228+ */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1387

u16 adb; /* 228+ */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1388

u16 lace_enabled_status; /* 228+ */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1390

u16 hobl; /* 232+ */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1391

u16 vrr_feature_enabled; /* 233+ */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1392

u16 elp; /* 247-256 */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1393

u16 opst; /* 247-256 */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1395

u16 apd; /* 253-256 */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1396

u16 pixoptix; /* 253-256 */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1399

u16 xpst_support; /* 257+ */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1400

u16 tcon_based_backlight_optimization; /* 257+ */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1402

u16 tcon_backlight_xpst_coexistence; /* 257+ */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1454

u16 min_luminance; /* 211+ */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1455

u16 max_luminance; /* 211+ */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1456

u16 one_percent_max_luminance; /* 211+ */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1470

u16 panel_identifier;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1471

u16 bridge_revision;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1479

u16 port_info;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1481

u16 reserved3:2;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1482

u16 num_lanes:2;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1483

u16 reserved4:12;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1485

u16 virtual_channel_num:2;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1486

u16 video_transfer_mode:2;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1487

u16 reserved5:12;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1491

u16 power_conservation;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1597

u16 slice_height;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1601

u16 entry_size;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1621

u16 hactive;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1622

u16 hblank;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1623

u16 hfront_porch;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1624

u16 hsync;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1625

u16 vactive;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1626

u16 vblank;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1627

u16 vfront_porch;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1628

u16 vsync;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1629

u16 width_mm;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1630

u16 height_mm;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1641

u16 gdtd_size;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1657

u16 num_entries; /* ???-216 */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1661

u16 primary_display;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1662

u16 secondary_display;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1666

u16 num_entries; /* 217+ */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

44

u16 mfg_name;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

45

u16 product_code;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

475

u16 handle;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

476

u16 device_type; /* See DEVICE_TYPE_* above */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

492

u16 dtd_buf_ptr; /* 161+ */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

509

u16 addin_offset;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

514

u16 edid_ptr;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

553

u16 extended_type;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

56

u16 clock; /**< In 10khz */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

560

u16 dp_gpio_pin_num; /* 195+ */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

604

u16 num_entries; /* ALM only */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

605

u16 list[]; /* ALM only */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

614

u16 mode_list_length;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

622

u16 x_res;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

623

u16 y_res;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

630

u16 page_size;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

636

u16 hdisplay;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

637

u16 htotal;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

638

u16 hblank_start;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

639

u16 hblank_end;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

640

u16 hsync_start;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

641

u16 hsync_end;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

642

u16 vdisplay;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

643

u16 vtotal;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

644

u16 vblank_start;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

645

u16 vblank_end;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

646

u16 vsync_start;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

647

u16 vsync_end;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

666

u16 mode_flag;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

677

u16 table_id;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

722

u16 tp1_wakeup_time; /* 165+ */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

723

u16 tp2_tp3_wakeup_time; /* 165+ */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

738

u16 x_res;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

739

u16 y_res;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

741

u16 refresh_rate;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

743

u16 panel_flags;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

776

u16 boot_mode_x;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

777

u16 boot_mode_y;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

782

u16 enable_lfp_primary:1;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

783

u16 selective_mode_pruning:1;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

784

u16 dual_frequency:1;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

785

u16 render_clock_freq:1; /* 0: high freq; 1: low freq */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

786

u16 nt_clone_support:1;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

787

u16 power_scheme_ui:1; /* 0: CUI; 1: 3rd party */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

788

u16 sprite_display_assign:1; /* 0: secondary; 1: primary */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

789

u16 cui_aspect_scaling:1;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

790

u16 preserve_aspect_ratio:1;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

791

u16 sdvo_device_power_down:1;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

792

u16 crt_hotplug:1;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

793

u16 lvds_config:2;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

794

u16 tv_hotplug:1;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

795

u16 hdmi_config:2;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

803

u16 legacy_crt_max_x;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

804

u16 legacy_crt_max_y;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

816

u16 rmpm_enabled:1; /* 159+ */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

817

u16 s2ddt_enabled:1; /* 159+ */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

818

u16 dpst_enabled:1; /* 159-227 */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

819

u16 bltclt_enabled:1; /* 159+ */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

820

u16 adb_enabled:1; /* 159-227 */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

821

u16 drrs_enabled:1; /* 159-227 */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

822

u16 grs_enabled:1; /* 159+ */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

823

u16 gpmt_enabled:1; /* 159+ */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

824

u16 tbt_enabled:1; /* 159+ */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

825

u16 psr_enabled:1; /* 165-227 */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

826

u16 ips_enabled:1; /* 165+ */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

827

u16 dfps_enabled:1; /* 165+ */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

828

u16 dmrrs_enabled:1; /* 174-227 */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

829

u16 adt_enabled:1; /* ???-228 */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

830

u16 hpd_wake:1; /* 201-240 */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

831

u16 pc_feature_valid:1; /* 159+ */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

839

u16 hotkey_persistent_algorithm:1;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

840

u16 lid_switch_persistent_algorithm:1;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

841

u16 power_management_persistent_algorithm:1;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

842

u16 hotkey_persistent_on_mds_twin:1;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

843

u16 hotkey_persistent_on_refresh_rate:1;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

844

u16 hotkey_persistent_on_restore_pipe:1;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

845

u16 hotkey_persistent_on_mode:1;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

846

u16 edid_persistent_on_mode:1;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

847

u16 dvo_hotplug_persistent_on_mode:1;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

848

u16 docking_persistent_algorithm:1;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

849

u16 rsvd:6;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

883

u16 num_entries;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

908

u16 rotation_flags_2;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

938

u16 x_res;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

939

u16 y_res;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

943

u16 display_flags_2; /* 217+ */

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

957

u16 mfg_name;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

958

u16 product_code;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

976

u16 als_low_trip;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

977

u16 als_high_trip;

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

99

u16 version;

sys/dev/pci/drm/i915/display/intel_vdsc.c

276

u16 compressed_bpp = fxp_q4_to_int(pipe_config->dsc.compressed_bpp_x16);

sys/dev/pci/drm/i915/display/intel_wm.c

143

const char *name, const u16 wm[])

sys/dev/pci/drm/i915/display/intel_wm.c

180

static void wm_latency_show(struct seq_file *m, const u16 wm[8])

sys/dev/pci/drm/i915/display/intel_wm.c

212

const u16 *latencies;

sys/dev/pci/drm/i915/display/intel_wm.c

227

const u16 *latencies;

sys/dev/pci/drm/i915/display/intel_wm.c

242

const u16 *latencies;

sys/dev/pci/drm/i915/display/intel_wm.c

287

size_t len, loff_t *offp, u16 wm[8])

sys/dev/pci/drm/i915/display/intel_wm.c

291

u16 new[8] = {};

sys/dev/pci/drm/i915/display/intel_wm.c

325

u16 *latencies;

sys/dev/pci/drm/i915/display/intel_wm.c

340

u16 *latencies;

sys/dev/pci/drm/i915/display/intel_wm.c

355

u16 *latencies;

sys/dev/pci/drm/i915/display/intel_wm.h

32

const char *name, const u16 wm[]);

sys/dev/pci/drm/i915/display/intel_wm_types.h

27

u16 plane[I915_MAX_PLANES];

sys/dev/pci/drm/i915/display/intel_wm_types.h

28

u16 fbc;

sys/dev/pci/drm/i915/display/intel_wm_types.h

32

u16 plane;

sys/dev/pci/drm/i915/display/intel_wm_types.h

33

u16 cursor;

sys/dev/pci/drm/i915/display/intel_wm_types.h

34

u16 fbc;

sys/dev/pci/drm/i915/display/intel_wm_types.h

59

u16 start, end; /* in number of blocks, 'end' is exclusive */

sys/dev/pci/drm/i915/display/intel_wm_types.h

62

static inline u16 skl_ddb_entry_size(const struct skl_ddb_entry *entry)

sys/dev/pci/drm/i915/display/skl_scaler.c

58

static u16 skl_scaler_calc_phase(int sub, int scale, bool chroma_cosited)

sys/dev/pci/drm/i915/display/skl_scaler.c

61

u16 trip = 0;

sys/dev/pci/drm/i915/display/skl_scaler.c

644

static u16 glk_nearest_filter_coef(int t)

sys/dev/pci/drm/i915/display/skl_scaler.c

748

u16 uv_rgb_hphase, uv_rgb_vphase;

sys/dev/pci/drm/i915/display/skl_scaler.c

817

u16 y_hphase, uv_rgb_hphase;

sys/dev/pci/drm/i915/display/skl_scaler.c

818

u16 y_vphase, uv_rgb_vphase;

sys/dev/pci/drm/i915/display/skl_universal_plane.c

691

static const u16 input_csc_matrix[][9] = {

sys/dev/pci/drm/i915/display/skl_universal_plane.c

729

const u16 *csc = input_csc_matrix[plane_state->hw.color_encoding];

sys/dev/pci/drm/i915/display/skl_universal_plane.c

795

static u32 xe3_plane_min_ddb_reg_val(const u16 *min_ddb,

sys/dev/pci/drm/i915/display/skl_universal_plane.c

796

const u16 *interim_ddb)

sys/dev/pci/drm/i915/display/skl_universal_plane.c

840

const u16 *min_ddb = &crtc_state->wm.skl.plane_min_ddb[plane_id];

sys/dev/pci/drm/i915/display/skl_universal_plane.c

841

const u16 *interim_ddb =

sys/dev/pci/drm/i915/display/skl_watermark.c

1380

u16 start, size;

sys/dev/pci/drm/i915/display/skl_watermark.c

1389

u16 size, extra = 0;

sys/dev/pci/drm/i915/display/skl_watermark.c

1392

extra = min_t(u16, iter->size,

sys/dev/pci/drm/i915/display/skl_watermark.c

1423

u16 cursor_size;

sys/dev/pci/drm/i915/display/skl_watermark.c

1506

u16 *min_ddb = &crtc_state->wm.skl.plane_min_ddb[plane_id];

sys/dev/pci/drm/i915/display/skl_watermark.c

1507

u16 *interim_ddb =

sys/dev/pci/drm/i915/display/skl_watermark.c

1573

u16 *interim_ddb =

sys/dev/pci/drm/i915/display/skl_watermark.c

1981

u16 trans_min, trans_amount, trans_y_tile_min;

sys/dev/pci/drm/i915/display/skl_watermark.c

1982

u16 wm0_blocks, trans_offset, blocks;

sys/dev/pci/drm/i915/display/skl_watermark.c

2022

(u16)mul_round_up_u32_fixed16(2, wp->y_tile_minimum);

sys/dev/pci/drm/i915/display/skl_watermark.c

2035

trans_wm->min_ddb_alloc = max_t(u16, wm0->min_ddb_alloc, blocks + 1);

sys/dev/pci/drm/i915/display/skl_watermark.c

3092

u16 *min_ddb =

sys/dev/pci/drm/i915/display/skl_watermark.c

3094

u16 *interim_ddb =

sys/dev/pci/drm/i915/display/skl_watermark.c

3179

u16 wm[], int num_levels, int read_latency)

sys/dev/pci/drm/i915/display/skl_watermark.c

3221

static void mtl_read_wm_latency(struct intel_display *display, u16 wm[])

sys/dev/pci/drm/i915/display/skl_watermark.c

3241

static void skl_read_wm_latency(struct intel_display *display, u16 wm[])

sys/dev/pci/drm/i915/display/skl_watermark.c

3838

u16 min_ddb[I915_MAX_PLANES];

sys/dev/pci/drm/i915/display/skl_watermark.c

3839

u16 interim_ddb[I915_MAX_PLANES];

sys/dev/pci/drm/i915/display/skl_watermark.c

395

static u16 skl_ddb_entry_init(struct skl_ddb_entry *entry,

sys/dev/pci/drm/i915/display/skl_watermark.c

396

u16 start, u16 end)

sys/dev/pci/drm/i915/display/skl_watermark.c

675

u16 *min_ddb, u16 *interim_ddb)

sys/dev/pci/drm/i915/display/skl_watermark.c

706

u16 *min_ddb, u16 *interim_ddb)

sys/dev/pci/drm/i915/display/vlv_dsi.c

1022

u16 hactive, hfp, hsync, hbp, vfp, vsync, vbp;

sys/dev/pci/drm/i915/display/vlv_dsi.c

1023

u16 hfp_sw, hsync_sw, hbp_sw;

sys/dev/pci/drm/i915/display/vlv_dsi.c

1024

u16 crtc_htotal_sw, crtc_hsync_start_sw, crtc_hsync_end_sw,

sys/dev/pci/drm/i915/display/vlv_dsi.c

1202

static u16 txclkesc(u32 divider, unsigned int us)

sys/dev/pci/drm/i915/display/vlv_dsi.c

1224

u16 hactive, hfp, hsync, hbp, vfp, vsync, vbp;

sys/dev/pci/drm/i915/display/vlv_dsi.c

1313

u16 mode_hdisplay;

sys/dev/pci/drm/i915/display/vlv_dsi.c

57

static u16 txbyteclkhs(u16 pixels, int bpp, int lane_count,

sys/dev/pci/drm/i915/display/vlv_dsi.c

58

u16 burst_mode_ratio)

sys/dev/pci/drm/i915/display/vlv_dsi.c

65

static u16 pixels_from_txbyteclkhs(u16 clk_hs, int bpp, int lane_count,

sys/dev/pci/drm/i915/display/vlv_dsi.c

66

u16 burst_mode_ratio)

sys/dev/pci/drm/i915/display/vlv_dsi_pll.c

41

static const u16 lfsr_converts[] = {

sys/dev/pci/drm/i915/gem/i915_gem_busy.c

13

static __always_inline u32 __busy_read_flag(u16 id)

sys/dev/pci/drm/i915/gem/i915_gem_busy.c

15

if (id == (u16)I915_ENGINE_CLASS_INVALID)

sys/dev/pci/drm/i915/gem/i915_gem_busy.c

22

static __always_inline u32 __busy_write_id(u16 id)

sys/dev/pci/drm/i915/gem/i915_gem_busy.c

33

if (id == (u16)I915_ENGINE_CLASS_INVALID)

sys/dev/pci/drm/i915/gem/i915_gem_busy.c

40

__busy_set_if_active(struct dma_fence *fence, u32 (*flag)(u16 id))

sys/dev/pci/drm/i915/gem/i915_gem_busy.c

91

BUILD_BUG_ON(!typecheck(u16, rq->engine->uabi_class));

sys/dev/pci/drm/i915/gem/i915_gem_context.c

415

u16 num_siblings, idx;

sys/dev/pci/drm/i915/gem/i915_gem_context.c

503

u16 idx, num_bonds;

sys/dev/pci/drm/i915/gem/i915_gem_context.c

597

u16 slot, width, num_siblings;

sys/dev/pci/drm/i915/gem/i915_gem_context.c

786

if (ci.engine_class == (u16)I915_ENGINE_CLASS_INVALID &&

sys/dev/pci/drm/i915/gem/i915_gem_context.c

787

ci.engine_instance == (u16)I915_ENGINE_CLASS_INVALID_NONE)

sys/dev/pci/drm/i915/gem/i915_gem_object_types.h

574

u16 read_domains;

sys/dev/pci/drm/i915/gem/i915_gem_object_types.h

579

u16 write_domain;

sys/dev/pci/drm/i915/gem/i915_gem_shmem.c

855

u16 type, u16 instance)

sys/dev/pci/drm/i915/gem/i915_gem_stolen.c

1042

i915_gem_stolen_smem_setup(struct drm_i915_private *i915, u16 type,

sys/dev/pci/drm/i915/gem/i915_gem_stolen.c

1043

u16 instance)

sys/dev/pci/drm/i915/gem/i915_gem_stolen.c

902

u16 ggc, gms;

sys/dev/pci/drm/i915/gem/i915_gem_stolen.c

924

i915_gem_stolen_lmem_setup(struct drm_i915_private *i915, u16 type,

sys/dev/pci/drm/i915/gem/i915_gem_stolen.c

925

u16 instance)

sys/dev/pci/drm/i915/gem/i915_gem_stolen.h

27

i915_gem_stolen_smem_setup(struct drm_i915_private *i915, u16 type,

sys/dev/pci/drm/i915/gem/i915_gem_stolen.h

28

u16 instance);

sys/dev/pci/drm/i915/gem/i915_gem_stolen.h

30

i915_gem_stolen_lmem_setup(struct drm_i915_private *i915, u16 type,

sys/dev/pci/drm/i915/gem/i915_gem_stolen.h

31

u16 instance);

sys/dev/pci/drm/i915/gem/i915_gem_ttm.c

1579

u16 type, u16 instance)

sys/dev/pci/drm/i915/gt/gen8_ppgtt.c

526

u16 index, max, nent, i;

sys/dev/pci/drm/i915/gt/gen8_ppgtt.c

632

u16 index;

sys/dev/pci/drm/i915/gt/gen8_ppgtt.c

719

u16 i;

sys/dev/pci/drm/i915/gt/intel_context_types.h

230

u16 id;

sys/dev/pci/drm/i915/gt/intel_context_types.h

291

u16 wqi_head;

sys/dev/pci/drm/i915/gt/intel_context_types.h

293

u16 wqi_tail;

sys/dev/pci/drm/i915/gt/intel_engine_cs.c

391

static void nop_irq_handler(struct intel_engine_cs *engine, u16 iir)

sys/dev/pci/drm/i915/gt/intel_engine_cs.c

730

unsigned int logical_vdbox, u16 vdbox_mask)

sys/dev/pci/drm/i915/gt/intel_engine_cs.c

761

u16 vdbox_mask;

sys/dev/pci/drm/i915/gt/intel_engine_cs.c

762

u16 vebox_mask;

sys/dev/pci/drm/i915/gt/intel_engine_types.h

389

u16 uabi_class;

sys/dev/pci/drm/i915/gt/intel_engine_types.h

390

u16 uabi_instance;

sys/dev/pci/drm/i915/gt/intel_engine_types.h

512

void (*irq_handler)(struct intel_engine_cs *engine, u16 iir);

sys/dev/pci/drm/i915/gt/intel_engine_user.c

241

static void engine_rename(struct intel_engine_cs *engine, const char *name, u16 instance)

sys/dev/pci/drm/i915/gt/intel_engine_user.c

252

u16 name_instance, other_instance = 0;

sys/dev/pci/drm/i915/gt/intel_engine_user.c

44

#define I915_NO_UABI_CLASS ((u16)(-1))

sys/dev/pci/drm/i915/gt/intel_engine_user.c

46

static const u16 uabi_classes[] = {

sys/dev/pci/drm/i915/gt/intel_execlists_submission.c

2487

static void execlists_irq_handler(struct intel_engine_cs *engine, u16 iir)

sys/dev/pci/drm/i915/gt/intel_ggtt.c

1177

static unsigned int gen6_get_total_gtt_size(u16 snb_gmch_ctl)

sys/dev/pci/drm/i915/gt/intel_ggtt.c

1184

static unsigned int gen8_get_total_gtt_size(u16 bdw_gmch_ctl)

sys/dev/pci/drm/i915/gt/intel_ggtt.c

1200

static unsigned int chv_get_total_gtt_size(u16 gmch_ctrl)

sys/dev/pci/drm/i915/gt/intel_ggtt.c

1375

u16 snb_gmch_ctl;

sys/dev/pci/drm/i915/gt/intel_ggtt.c

1578

u16 snb_gmch_ctl;

sys/dev/pci/drm/i915/gt/intel_gt_irq.c

124

const u16 intr = GEN11_INTR_ENGINE_INTR(identity);

sys/dev/pci/drm/i915/gt/intel_gt_irq.c

21

static void guc_irq_handler(struct intel_guc *guc, u16 iir)

sys/dev/pci/drm/i915/gt/intel_gt_irq.c

66

const u16 iir)

sys/dev/pci/drm/i915/gt/intel_gt_irq.h

44

static inline void intel_engine_cs_irq(struct intel_engine_cs *engine, u16 iir)

sys/dev/pci/drm/i915/gt/intel_gt_irq.h

53

u16 iir))

sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c

211

u16 crstandvid;

sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c

351

u16 rgvswctl = intel_uncore_read16(uncore, MEMSWCTL);

sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c

352

u16 rgvstat = intel_uncore_read16(uncore, MEMSTAT_ILK);

sys/dev/pci/drm/i915/gt/intel_mocs.c

18

u16 l3cc_value;

sys/dev/pci/drm/i915/gt/intel_mocs.c

19

u16 used;

sys/dev/pci/drm/i915/gt/intel_mocs.c

592

static u16 get_entry_l3cc(const struct drm_i915_mocs_table *table,

sys/dev/pci/drm/i915/gt/intel_mocs.c

600

static u32 l3cc_combine(u16 low, u16 high)

sys/dev/pci/drm/i915/gt/intel_ring_submission.c

1117

static void irq_handler(struct intel_engine_cs *engine, u16 iir)

sys/dev/pci/drm/i915/gt/intel_rps.c

267

u16 i;

sys/dev/pci/drm/i915/gt/intel_rps.c

268

u16 t;

sys/dev/pci/drm/i915/gt/intel_rps.c

269

u16 m;

sys/dev/pci/drm/i915/gt/intel_rps.c

270

u16 c;

sys/dev/pci/drm/i915/gt/intel_rps.c

443

u16 rgvswctl;

sys/dev/pci/drm/i915/gt/intel_rps.c

634

u16 rgvswctl;

sys/dev/pci/drm/i915/gt/intel_rps_types.h

95

u16 gpll_ref_freq; /* vlv/chv GPLL reference frequency */

sys/dev/pci/drm/i915/gt/intel_sseu.c

107

u16 mask = sseu_get_eus(sseu, s, ss);

sys/dev/pci/drm/i915/gt/intel_sseu.c

151

u32 ss_en, u16 eu_en)

sys/dev/pci/drm/i915/gt/intel_sseu.c

168

u16 eu_en)

sys/dev/pci/drm/i915/gt/intel_sseu.c

212

u16 eu_en = 0;

sys/dev/pci/drm/i915/gt/intel_sseu.c

257

u16 eu_en = 0;

sys/dev/pci/drm/i915/gt/intel_sseu.c

47

static u16 sseu_get_eus(const struct sseu_dev_info *sseu, int slice,

sys/dev/pci/drm/i915/gt/intel_sseu.c

59

u16 eu_mask)

sys/dev/pci/drm/i915/gt/intel_sseu.c

70

static u16 compute_eu_total(const struct sseu_dev_info *sseu)

sys/dev/pci/drm/i915/gt/intel_sseu.c

816

u16 enabled_eus = sseu_get_eus(sseu, s, ss);

sys/dev/pci/drm/i915/gt/intel_sseu.c

830

u16 enabled_eus = sseu_get_eus(sseu, 0, dss);

sys/dev/pci/drm/i915/gt/intel_sseu.c

871

u16 intel_slicemask_from_xehp_dssmask(intel_sseu_ss_mask_t dss_mask,

sys/dev/pci/drm/i915/gt/intel_sseu.h

171

u16 intel_slicemask_from_xehp_dssmask(intel_sseu_ss_mask_t dss_mask, int dss_per_slice);

sys/dev/pci/drm/i915/gt/intel_sseu.h

74

u16 hsw[GEN_MAX_HSW_SLICES][GEN_MAX_SS_PER_HSW_SLICE];

sys/dev/pci/drm/i915/gt/intel_sseu.h

75

u16 xehp[I915_MAX_SS_FUSE_BITS];

sys/dev/pci/drm/i915/gt/intel_sseu.h

78

u16 eu_total;

sys/dev/pci/drm/i915/gt/uc/intel_gsc_binary_headers.h

12

u16 major;

sys/dev/pci/drm/i915/gt/uc/intel_gsc_binary_headers.h

13

u16 minor;

sys/dev/pci/drm/i915/gt/uc/intel_gsc_binary_headers.h

14

u16 hotfix;

sys/dev/pci/drm/i915/gt/uc/intel_gsc_binary_headers.h

15

u16 build;

sys/dev/pci/drm/i915/gt/uc/intel_gsc_binary_headers.h

27

u16 size;

sys/dev/pci/drm/i915/gt/uc/intel_gsc_binary_headers.h

53

u16 descriptor_count; /* num of entries after the header */

sys/dev/pci/drm/i915/gt/uc/intel_gsc_fw.c

381

u16 proj_major;

sys/dev/pci/drm/i915/gt/uc/intel_gsc_fw.c

382

u16 compat_major;

sys/dev/pci/drm/i915/gt/uc/intel_gsc_fw.c

383

u16 compat_minor;

sys/dev/pci/drm/i915/gt/uc/intel_gsc_fw.c

384

u16 reserved[5];

sys/dev/pci/drm/i915/gt/uc/intel_gsc_uc_heci_cmd_submit.h

33

u16 header_version;

sys/dev/pci/drm/i915/gt/uc/intel_guc.c

858

static int __guc_action_self_cfg(struct intel_guc *guc, u16 key, u16 len, u64 value)

sys/dev/pci/drm/i915/gt/uc/intel_guc.c

887

static int __guc_self_cfg(struct intel_guc *guc, u16 key, u16 len, u64 value)

sys/dev/pci/drm/i915/gt/uc/intel_guc.c

897

int intel_guc_self_cfg32(struct intel_guc *guc, u16 key, u32 value)

sys/dev/pci/drm/i915/gt/uc/intel_guc.c

902

int intel_guc_self_cfg64(struct intel_guc *guc, u16 key, u64 value)

sys/dev/pci/drm/i915/gt/uc/intel_guc.h

444

int intel_guc_self_cfg32(struct intel_guc *guc, u16 key, u32 value);

sys/dev/pci/drm/i915/gt/uc/intel_guc.h

445

int intel_guc_self_cfg64(struct intel_guc *guc, u16 key, u64 value);

sys/dev/pci/drm/i915/gt/uc/intel_guc_capture.c

413

struct guc_mmio_reg *ptr, u16 num_entries)

sys/dev/pci/drm/i915/gt/uc/intel_guc_ct.h

78

u16 last_fence; /* last fence used to send request */

sys/dev/pci/drm/i915/gt/uc/intel_guc_ct.h

88

u16 fence;

sys/dev/pci/drm/i915/gt/uc/intel_guc_ct.h

89

u16 action;

sys/dev/pci/drm/i915/gt/uc/intel_guc_fwif.h

386

u16 count;

sys/dev/pci/drm/i915/gt/uc/intel_guc_fwif.h

387

u16 reserved;

sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c

1065

static void cs_irq_handler(struct intel_engine_cs *engine, u16 iir)

sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c

2679

static void __guc_context_policy_start_klv(struct context_policy *policy, u16 guc_id)

sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c

3068

u16 guc_id)

sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c

3109

static u16 prep_context_pending_disable(struct intel_context *ce)

sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c

3127

u16 guc_id;

sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c

3234

u16 guc_id,

sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c

3278

u16 guc_id;

sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c

3315

u16 guc_id;

sys/dev/pci/drm/i915/gvt/cfg_space.c

325

u16 *gmch_ctl;

sys/dev/pci/drm/i915/gvt/cfg_space.c

339

gmch_ctl = (u16 *)(vgpu_cfg_space(vgpu) + INTEL_GVT_PCI_GMCH_CONTROL);

sys/dev/pci/drm/i915/gvt/cfg_space.c

98

pwr = (pci_power_t __force)(*(u16*)(&vgpu_cfg_space(vgpu)[off])

sys/dev/pci/drm/i915/gvt/cmd_parser.c

439

u16 devices;

sys/dev/pci/drm/i915/gvt/cmd_parser.c

449

u16 addr_bitmap;

sys/dev/pci/drm/i915/gvt/firmware.c

160

id = *(u16 *)(mem + PCI_VENDOR_ID);

sys/dev/pci/drm/i915/gvt/firmware.c

163

id = *(u16 *)(mem + PCI_DEVICE_ID);

sys/dev/pci/drm/i915/gvt/gvt.h

265

u16 *mmio_attribute;

sys/dev/pci/drm/i915/gvt/handlers.c

125

u16 flags, u32 addr_mask, u32 ro_mask, u32 device,

sys/dev/pci/drm/i915/gvt/interrupt.c

428

u16 control, data;

sys/dev/pci/drm/i915/gvt/interrupt.c

431

control = *(u16 *)(vgpu_cfg_space(vgpu) + MSI_CAP_CONTROL(offset));

sys/dev/pci/drm/i915/gvt/interrupt.c

433

data = *(u16 *)(vgpu_cfg_space(vgpu) + MSI_CAP_DATA(offset));

sys/dev/pci/drm/i915/gvt/kvmgt.c

442

size_t count, u16 offset, bool is_write)

sys/dev/pci/drm/i915/gvt/kvmgt.c

494

size_t count, u16 offset, bool is_write)

sys/dev/pci/drm/i915/gvt/kvmgt.c

902

u16 val;

sys/dev/pci/drm/i915/gvt/kvmgt.c

977

u16 val;

sys/dev/pci/drm/i915/gvt/opregion.c

112

u16 device_class_ext;

sys/dev/pci/drm/i915/gvt/opregion.c

61

u16 size; /* data size */

sys/dev/pci/drm/i915/gvt/opregion.c

69

u16 handle;

sys/dev/pci/drm/i915/gvt/opregion.c

70

u16 device_type;

sys/dev/pci/drm/i915/gvt/opregion.c

71

u16 device_class;

sys/dev/pci/drm/i915/gvt/opregion.c

77

u16 dtd_buf_ptr; /* 161 */

sys/dev/pci/drm/i915/gvt/opregion.c

91

u16 edid_ptr;

sys/dev/pci/drm/i915/gvt/scheduler.c

951

u16 wrap_count;

sys/dev/pci/drm/i915/i915_gpu_error.h

182

u16 last_fence;

sys/dev/pci/drm/i915/i915_gtt_view_types.h

16

u16 width;

sys/dev/pci/drm/i915/i915_gtt_view_types.h

17

u16 height;

sys/dev/pci/drm/i915/i915_gtt_view_types.h

18

u16 src_stride;

sys/dev/pci/drm/i915/i915_gtt_view_types.h

19

u16 dst_stride;

sys/dev/pci/drm/i915/i915_pci.c

890

static bool device_id_in_list(u16 device_id, const char *devices, bool negative)

sys/dev/pci/drm/i915/i915_pci.c

909

u16 val;

sys/dev/pci/drm/i915/i915_pci.c

928

static bool id_forced(u16 device_id)

sys/dev/pci/drm/i915/i915_pci.c

933

static bool id_blocked(u16 device_id)

sys/dev/pci/drm/i915/i915_pvinfo.h

63

u16 version_major;

sys/dev/pci/drm/i915/i915_pvinfo.h

64

u16 version_minor;

sys/dev/pci/drm/i915/i915_reg_defs.h

102

((u16)((((typeof(__mask))(__val) << __bf_shf(__mask)) & (__mask)) + \

sys/dev/pci/drm/i915/i915_vgpu.c

67

u16 version_major;

sys/dev/pci/drm/i915/i915_vma_types.h

102

BUILD_BUG_ON(sizeof(struct intel_rotation_info) != 2 * sizeof(u32) + 8 * sizeof(u16));

sys/dev/pci/drm/i915/i915_vma_types.h

104

BUILD_BUG_ON(sizeof(struct intel_remapped_info) != 5 * sizeof(u32) + 16 * sizeof(u16));

sys/dev/pci/drm/i915/intel_device_info.c

129

static const u16 subplatform_ult_ids[] = {

sys/dev/pci/drm/i915/intel_device_info.c

152

static const u16 subplatform_ulx_ids[] = {

sys/dev/pci/drm/i915/intel_device_info.c

167

static const u16 subplatform_portf_ids[] = {

sys/dev/pci/drm/i915/intel_device_info.c

171

static const u16 subplatform_uy_ids[] = {

sys/dev/pci/drm/i915/intel_device_info.c

175

static const u16 subplatform_n_ids[] = {

sys/dev/pci/drm/i915/intel_device_info.c

179

static const u16 subplatform_rpl_ids[] = {

sys/dev/pci/drm/i915/intel_device_info.c

185

static const u16 subplatform_rplu_ids[] = {

sys/dev/pci/drm/i915/intel_device_info.c

189

static const u16 subplatform_g10_ids[] = {

sys/dev/pci/drm/i915/intel_device_info.c

194

static const u16 subplatform_g11_ids[] = {

sys/dev/pci/drm/i915/intel_device_info.c

199

static const u16 subplatform_g12_ids[] = {

sys/dev/pci/drm/i915/intel_device_info.c

203

static const u16 subplatform_dg2_d_ids[] = {

sys/dev/pci/drm/i915/intel_device_info.c

207

static const u16 subplatform_arl_h_ids[] = {

sys/dev/pci/drm/i915/intel_device_info.c

211

static const u16 subplatform_arl_u_ids[] = {

sys/dev/pci/drm/i915/intel_device_info.c

215

static const u16 subplatform_arl_s_ids[] = {

sys/dev/pci/drm/i915/intel_device_info.c

219

static bool find_devid(u16 id, const u16 *p, unsigned int num)

sys/dev/pci/drm/i915/intel_device_info.c

235

u16 devid = INTEL_DEVID(i915);

sys/dev/pci/drm/i915/intel_device_info.c

415

u16 device_id,

sys/dev/pci/drm/i915/intel_device_info.h

212

u16 device_id;

sys/dev/pci/drm/i915/intel_device_info.h

256

void intel_device_info_driver_create(struct drm_i915_private *i915, u16 device_id,

sys/dev/pci/drm/i915/intel_memory_region.c

15

u16 class;

sys/dev/pci/drm/i915/intel_memory_region.c

150

u16 class, u16 instance)

sys/dev/pci/drm/i915/intel_memory_region.c

16

u16 instance;

sys/dev/pci/drm/i915/intel_memory_region.c

257

u16 type,

sys/dev/pci/drm/i915/intel_memory_region.c

258

u16 instance,

sys/dev/pci/drm/i915/intel_memory_region.c

350

u16 type, instance;

sys/dev/pci/drm/i915/intel_memory_region.h

101

u16 type,

sys/dev/pci/drm/i915/intel_memory_region.h

102

u16 instance,

sys/dev/pci/drm/i915/intel_memory_region.h

130

u16 type, u16 instance);

sys/dev/pci/drm/i915/intel_memory_region.h

133

u16 type, u16 instance);

sys/dev/pci/drm/i915/intel_memory_region.h

71

u16 type;

sys/dev/pci/drm/i915/intel_memory_region.h

72

u16 instance;

sys/dev/pci/drm/i915/intel_memory_region.h

92

u16 class, u16 instance);

sys/dev/pci/drm/i915/intel_uncore.h

104

u16 (*mmio_readw)(struct intel_uncore *uncore,

sys/dev/pci/drm/i915/intel_uncore.h

114

i915_reg_t r, u16 val, bool trace);

sys/dev/pci/drm/i915/pxp/intel_pxp_irq.c

25

void intel_pxp_irq_handler(struct intel_pxp *pxp, u16 iir)

sys/dev/pci/drm/i915/pxp/intel_pxp_irq.h

25

void intel_pxp_irq_handler(struct intel_pxp *pxp, u16 iir);

sys/dev/pci/drm/i915/pxp/intel_pxp_irq.h

27

static inline void intel_pxp_irq_handler(struct intel_pxp *pxp, u16 iir)

sys/dev/pci/drm/i915/soc/intel_dram.c

212

u16 fsb;

sys/dev/pci/drm/i915/soc/intel_dram.c

22

u16 size;

sys/dev/pci/drm/i915/soc/intel_dram.c

269

static int skl_get_dimm_size(u16 val)

sys/dev/pci/drm/i915/soc/intel_dram.c

274

static int skl_get_dimm_width(u16 val)

sys/dev/pci/drm/i915/soc/intel_dram.c

291

static int skl_get_dimm_ranks(u16 val)

sys/dev/pci/drm/i915/soc/intel_dram.c

302

static int icl_get_dimm_size(u16 val)

sys/dev/pci/drm/i915/soc/intel_dram.c

307

static int icl_get_dimm_width(u16 val)

sys/dev/pci/drm/i915/soc/intel_dram.c

324

static int icl_get_dimm_ranks(u16 val)

sys/dev/pci/drm/i915/soc/intel_dram.c

344

int channel, char dimm_name, u16 val)

sys/dev/pci/drm/i915/soc/intel_dram.c

85

u16 ddrpll;

sys/dev/pci/drm/i915/soc/intel_gmch.c

186

u16 gmch_ctrl;

sys/dev/pci/drm/i915/soc/intel_rom.c

130

u16 intel_rom_read16(struct intel_rom *rom, loff_t offset)

sys/dev/pci/drm/i915/soc/intel_rom.c

30

u16 (*read16)(struct intel_rom *rom, loff_t offset);

sys/dev/pci/drm/i915/soc/intel_rom.c

43

static u16 spi_read16(struct intel_rom *rom, loff_t offset)

sys/dev/pci/drm/i915/soc/intel_rom.c

78

static u16 pci_read16(struct intel_rom *rom, loff_t offset)

sys/dev/pci/drm/i915/soc/intel_rom.h

18

u16 intel_rom_read16(struct intel_rom *rom, loff_t offset);

sys/dev/pci/drm/include/drm/display/drm_dp_helper.h

214

static inline u16

sys/dev/pci/drm/include/drm/display/drm_dp_helper.h

865

u16 driver_pwm_freq_hz, const u8 edp_dpcd[EDP_DISPLAY_CTL_CAP_SIZE],

sys/dev/pci/drm/include/drm/display/drm_dp_helper.h

893

void drm_dp_cec_attach(struct drm_dp_aux *aux, u16 source_physical_address);

sys/dev/pci/drm/include/drm/display/drm_dp_helper.h

912

u16 source_physical_address)

sys/dev/pci/drm/include/drm/display/drm_dp_mst_helper.h

347

u16 pbn;

sys/dev/pci/drm/include/drm/display/drm_dp_mst_helper.h

354

u16 allocated_pbn;

sys/dev/pci/drm/include/drm/display/drm_dp_mst_helper.h

419

u16 full_payload_bw_number;

sys/dev/pci/drm/include/drm/display/drm_dp_mst_helper.h

420

u16 avail_payload_bw_number;

sys/dev/pci/drm/include/drm/display/drm_dp_mst_helper.h

436

u16 available_pbn;

sys/dev/pci/drm/include/drm/display/drm_dp_mst_helper.h

441

u16 allocated_pbn;

sys/dev/pci/drm/include/drm/display/drm_dsc.h

107

u16 pic_width;

sys/dev/pci/drm/include/drm/display/drm_dsc.h

111

u16 pic_height;

sys/dev/pci/drm/include/drm/display/drm_dsc.h

126

u16 bits_per_pixel;

sys/dev/pci/drm/include/drm/display/drm_dsc.h

146

u16 initial_xmit_delay;

sys/dev/pci/drm/include/drm/display/drm_dsc.h

153

u16 initial_dec_delay;

sys/dev/pci/drm/include/drm/display/drm_dsc.h

169

u16 initial_offset;

sys/dev/pci/drm/include/drm/display/drm_dsc.h

173

u16 rc_buf_thresh[DSC_NUM_BUF_RANGES - 1];

sys/dev/pci/drm/include/drm/display/drm_dsc.h

183

u16 rc_model_size;

sys/dev/pci/drm/include/drm/display/drm_dsc.h

201

u16 scale_decrement_interval;

sys/dev/pci/drm/include/drm/display/drm_dsc.h

207

u16 scale_increment_interval;

sys/dev/pci/drm/include/drm/display/drm_dsc.h

211

u16 nfl_bpg_offset;

sys/dev/pci/drm/include/drm/display/drm_dsc.h

215

u16 slice_bpg_offset;

sys/dev/pci/drm/include/drm/display/drm_dsc.h

219

u16 final_offset;

sys/dev/pci/drm/include/drm/display/drm_dsc.h

233

u16 slice_chunk_size;

sys/dev/pci/drm/include/drm/display/drm_dsc.h

237

u16 rc_bits;

sys/dev/pci/drm/include/drm/display/drm_dsc.h

264

u16 nsl_bpg_offset;

sys/dev/pci/drm/include/drm/display/drm_dsc.h

269

u16 second_line_offset_adj;

sys/dev/pci/drm/include/drm/display/drm_dsc.h

95

u16 slice_width;

sys/dev/pci/drm/include/drm/display/drm_dsc.h

99

u16 slice_height;

sys/dev/pci/drm/include/drm/drm_color_mgmt.h

126

typedef void (*drm_crtc_set_lut_func)(struct drm_crtc *, unsigned int, u16, u16, u16);

sys/dev/pci/drm/include/drm/drm_connector.h

1221

void (*phys_addr_set)(struct drm_connector *connector, u16 addr);

sys/dev/pci/drm/include/drm/drm_connector.h

421

u16 min_vfreq;

sys/dev/pci/drm/include/drm/drm_connector.h

422

u16 max_vfreq;

sys/dev/pci/drm/include/drm/drm_connector.h

863

u16 source_physical_address;

sys/dev/pci/drm/include/drm/drm_crtc.h

493

int (*gamma_set)(struct drm_crtc *crtc, u16 *r, u16 *g, u16 *b,

sys/dev/pci/drm/include/drm/drm_edid.h

385

static inline const char *drm_edid_decode_mfg_id(u16 mfg_id, char vend[4])

sys/dev/pci/drm/include/drm/drm_edid.h

432

static inline void drm_edid_decode_panel_id(u32 panel_id, char vend[4], u16 *product_id)

sys/dev/pci/drm/include/drm/drm_edid.h

434

*product_id = (u16)(panel_id & 0xffff);

sys/dev/pci/drm/include/drm/drm_gpusvm.h

122

u16 migrate_devmem : 1;

sys/dev/pci/drm/include/drm/drm_gpusvm.h

124

u16 unmapped : 1;

sys/dev/pci/drm/include/drm/drm_gpusvm.h

125

u16 partial_unmap : 1;

sys/dev/pci/drm/include/drm/drm_gpusvm.h

126

u16 has_devmem_pages : 1;

sys/dev/pci/drm/include/drm/drm_gpusvm.h

127

u16 has_dma_mapping : 1;

sys/dev/pci/drm/include/drm/drm_gpusvm.h

129

u16 __flags;

sys/dev/pci/drm/include/drm/drm_mipi_dsi.h

81

int mipi_dsi_set_maximum_return_packet_size(struct mipi_dsi_device *, u16);

sys/dev/pci/drm/include/drm/drm_modes.h

259

u16 hdisplay;

sys/dev/pci/drm/include/drm/drm_modes.h

260

u16 hsync_start;

sys/dev/pci/drm/include/drm/drm_modes.h

261

u16 hsync_end;

sys/dev/pci/drm/include/drm/drm_modes.h

262

u16 htotal;

sys/dev/pci/drm/include/drm/drm_modes.h

263

u16 hskew;

sys/dev/pci/drm/include/drm/drm_modes.h

264

u16 vdisplay;

sys/dev/pci/drm/include/drm/drm_modes.h

265

u16 vsync_start;

sys/dev/pci/drm/include/drm/drm_modes.h

266

u16 vsync_end;

sys/dev/pci/drm/include/drm/drm_modes.h

267

u16 vtotal;

sys/dev/pci/drm/include/drm/drm_modes.h

268

u16 vscan;

sys/dev/pci/drm/include/drm/drm_modes.h

321

u16 crtc_hdisplay;

sys/dev/pci/drm/include/drm/drm_modes.h

322

u16 crtc_hblank_start;

sys/dev/pci/drm/include/drm/drm_modes.h

323

u16 crtc_hblank_end;

sys/dev/pci/drm/include/drm/drm_modes.h

324

u16 crtc_hsync_start;

sys/dev/pci/drm/include/drm/drm_modes.h

325

u16 crtc_hsync_end;

sys/dev/pci/drm/include/drm/drm_modes.h

326

u16 crtc_htotal;

sys/dev/pci/drm/include/drm/drm_modes.h

327

u16 crtc_hskew;

sys/dev/pci/drm/include/drm/drm_modes.h

328

u16 crtc_vdisplay;

sys/dev/pci/drm/include/drm/drm_modes.h

329

u16 crtc_vblank_start;

sys/dev/pci/drm/include/drm/drm_modes.h

330

u16 crtc_vblank_end;

sys/dev/pci/drm/include/drm/drm_modes.h

331

u16 crtc_vsync_start;

sys/dev/pci/drm/include/drm/drm_modes.h

332

u16 crtc_vsync_end;

sys/dev/pci/drm/include/drm/drm_modes.h

333

u16 crtc_vtotal;

sys/dev/pci/drm/include/drm/drm_modes.h

341

u16 width_mm;

sys/dev/pci/drm/include/drm/drm_modes.h

349

u16 height_mm;

sys/dev/pci/drm/include/drm/drm_plane.h

131

u16 alpha;

sys/dev/pci/drm/include/drm/drm_utils.h

20

u16 min_brightness;

sys/dev/pci/drm/include/linux/bits.h

106

((u16)(GENMASK(__high, __low) + \

sys/dev/pci/drm/include/linux/bits.h

91

((u16)(BIT(__n) + \

sys/dev/pci/drm/include/linux/hdmi.h

209

u16 x, y;

sys/dev/pci/drm/include/linux/hdmi.h

212

u16 x, y;

sys/dev/pci/drm/include/linux/hdmi.h

214

u16 max_display_mastering_luminance;

sys/dev/pci/drm/include/linux/hdmi.h

215

u16 min_display_mastering_luminance;

sys/dev/pci/drm/include/linux/hdmi.h

216

u16 max_cll;

sys/dev/pci/drm/include/linux/hdmi.h

217

u16 max_fall;

sys/dev/pci/drm/include/linux/io.h

107

static inline u16

sys/dev/pci/drm/include/linux/io.h

141

iowrite16(u16 val, volatile void __iomem *addr)

sys/dev/pci/drm/include/linux/io.h

51

static inline u16

sys/dev/pci/drm/include/linux/io.h

85

iowrite16(u16 val, volatile void __iomem *addr)

sys/dev/pci/drm/include/linux/pci.h

150

pci_read_config_word(struct pci_dev *pdev, int reg, u16 *val)

sys/dev/pci/drm/include/linux/pci.h

177

pci_write_config_word(struct pci_dev *pdev, int reg, u16 val)

sys/dev/pci/drm/include/linux/pci.h

202

int reg, u16 *val)

sys/dev/pci/drm/include/linux/pci.h

294

pcie_capability_read_word(struct pci_dev *pdev, int off, u16 *val)

sys/dev/pci/drm/include/linux/pci.h

307

pcie_capability_write_word(struct pci_dev *pdev, int off, u16 val)

sys/dev/pci/drm/include/linux/pci.h

318

pcie_capability_set_word(struct pci_dev *pdev, int off, u16 val)

sys/dev/pci/drm/include/linux/pci.h

320

u16 r;

sys/dev/pci/drm/include/linux/pci.h

328

pcie_capability_clear_word(struct pci_dev *pdev, int off, u16 c)

sys/dev/pci/drm/include/linux/pci.h

330

u16 r;

sys/dev/pci/drm/include/linux/pci.h

338

pcie_capability_clear_and_set_word(struct pci_dev *pdev, int off, u16 c, u16 s)

sys/dev/pci/drm/include/linux/pci.h

340

u16 r;

sys/dev/pci/drm/include/linux/pci.h

524

static inline u16

sys/dev/pci/drm/radeon/atom.c

1386

u16 *mdt = (u16 *)(ctx->bios + ctx->data_table + 4);

sys/dev/pci/drm/radeon/atom.c

1406

u16 *mct = (u16 *)(ctx->bios + ctx->cmd_table + 4);

sys/dev/pci/drm/radeon/atombios_crtc.c

310

u16 misc = 0;

sys/dev/pci/drm/radeon/atombios_crtc.c

357

u16 misc = 0;

sys/dev/pci/drm/radeon/atombios_dp.c

107

args.v1.lpAuxRequest = cpu_to_le16((u16)(0 + 4));

sys/dev/pci/drm/radeon/atombios_dp.c

108

args.v1.lpDataOut = cpu_to_le16((u16)(16 + 4));

sys/dev/pci/drm/radeon/atombios_dp.c

412

u16 dp_bridge = radeon_connector_encoder_get_dp_bridge_encoder_id(connector);

sys/dev/pci/drm/radeon/atombios_encoders.c

2661

u16 caps)

sys/dev/pci/drm/radeon/atombios_i2c.c

45

u16 out = cpu_to_le16(0);

sys/dev/pci/drm/radeon/btc_dpm.c

1162

u32 clock, u16 max_voltage, u16 *voltage)

sys/dev/pci/drm/radeon/btc_dpm.c

1172

*voltage = (u16)((table->entries[i].v < max_voltage) ?

sys/dev/pci/drm/radeon/btc_dpm.c

1266

static u16 btc_find_voltage(struct atom_voltage_table *table, u16 voltage)

sys/dev/pci/drm/radeon/btc_dpm.c

1279

u16 max_vddc, u16 max_vddci,

sys/dev/pci/drm/radeon/btc_dpm.c

1280

u16 *vddc, u16 *vddci)

sys/dev/pci/drm/radeon/btc_dpm.c

1283

u16 new_voltage;

sys/dev/pci/drm/radeon/btc_dpm.c

1825

static bool btc_check_s0_mc_reg_index(u16 in_reg, u16 *out_reg)

sys/dev/pci/drm/radeon/btc_dpm.c

1951

u16 address;

sys/dev/pci/drm/radeon/btc_dpm.c

2072

u16 vddc, vddci;

sys/dev/pci/drm/radeon/btc_dpm.h

51

u32 clock, u16 max_voltage, u16 *voltage);

sys/dev/pci/drm/radeon/btc_dpm.h

55

u16 max_vddc, u16 max_vddci,

sys/dev/pci/drm/radeon/btc_dpm.h

56

u16 *vddc, u16 *vddci);

sys/dev/pci/drm/radeon/ci_dpm.c

1252

u16 reg_offset, u32 *value)

sys/dev/pci/drm/radeon/ci_dpm.c

1263

u16 reg_offset, u32 value)

sys/dev/pci/drm/radeon/ci_dpm.c

1278

u16 tmp;

sys/dev/pci/drm/radeon/ci_dpm.c

1311

u16 leakage_id, virtual_voltage_id;

sys/dev/pci/drm/radeon/ci_dpm.c

1312

u16 vddc, vddci;

sys/dev/pci/drm/radeon/ci_dpm.c

154

u16 *std_voltage_hi_sidd, u16 *std_voltage_lo_sidd);

sys/dev/pci/drm/radeon/ci_dpm.c

2286

u16 *std_voltage_hi_sidd, u16 *std_voltage_lo_sidd)

sys/dev/pci/drm/radeon/ci_dpm.c

2288

u16 v_index, idx;

sys/dev/pci/drm/radeon/ci_dpm.c

241

static u8 ci_convert_to_vid(u16 vddc)

sys/dev/pci/drm/radeon/ci_dpm.c

2661

(u16)rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[count].v * VOLTAGE_SCALE;

sys/dev/pci/drm/radeon/ci_dpm.c

269

hi_vid[i] = ci_convert_to_vid((u16)rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].leakage);

sys/dev/pci/drm/radeon/ci_dpm.c

2875

memory_level->ActivityLevel = (u16)pi->mclk_activity_target;

sys/dev/pci/drm/radeon/ci_dpm.c

3049

cpu_to_be16((u16)pi->mclk_activity_target);

sys/dev/pci/drm/radeon/ci_dpm.c

307

u16 tdc_limit;

sys/dev/pci/drm/radeon/ci_dpm.c

3082

u16 ulv_voltage = rdev->pm.dpm.backbias_response_time;

sys/dev/pci/drm/radeon/ci_dpm.c

3173

u16 sclk_activity_level_t,

sys/dev/pci/drm/radeon/ci_dpm.c

3249

(u16)pi->activity_target[i],

sys/dev/pci/drm/radeon/ci_dpm.c

3606

table->TemperatureLimitHigh = (u16)((pi->thermal_temp_setting.temperature_high *

sys/dev/pci/drm/radeon/ci_dpm.c

3608

table->TemperatureLimitLow = (u16)((pi->thermal_temp_setting.temperature_low *

sys/dev/pci/drm/radeon/ci_dpm.c

388

u16 hi_sidd, lo_sidd;

sys/dev/pci/drm/radeon/ci_dpm.c

410

const u16 *def1;

sys/dev/pci/drm/radeon/ci_dpm.c

411

const u16 *def2;

sys/dev/pci/drm/radeon/ci_dpm.c

424

dpm_table->PPM_PkgPwrLimit = cpu_to_be16((u16)ppm->dgpu_tdp * 256 / 1000);

sys/dev/pci/drm/radeon/ci_dpm.c

425

dpm_table->PPM_TemperatureLimit = cpu_to_be16((u16)ppm->tj_max * 256);

sys/dev/pci/drm/radeon/ci_dpm.c

4357

static bool ci_check_s0_mc_reg_index(u16 in_reg, u16 *out_reg)

sys/dev/pci/drm/radeon/ci_dpm.c

4448

u16 address;

sys/dev/pci/drm/radeon/ci_dpm.c

4752

u16 pcie_speed, max_speed = 0;

sys/dev/pci/drm/radeon/ci_dpm.c

4763

static u16 ci_get_current_pcie_speed(struct radeon_device *rdev)

sys/dev/pci/drm/radeon/ci_dpm.c

4770

return (u16)speed_cntl;

sys/dev/pci/drm/radeon/ci_dpm.c

4904

static void ci_patch_with_vddc_leakage(struct radeon_device *rdev, u16 *vddc)

sys/dev/pci/drm/radeon/ci_dpm.c

4918

static void ci_patch_with_vddci_leakage(struct radeon_device *rdev, u16 *vddci)

sys/dev/pci/drm/radeon/ci_dpm.c

4991

ci_patch_with_vddc_leakage(rdev, (u16 *)&table->vddc);

sys/dev/pci/drm/radeon/ci_dpm.c

4992

ci_patch_with_vddci_leakage(rdev, (u16 *)&table->vddci);

sys/dev/pci/drm/radeon/ci_dpm.c

5499

u16 data_offset;

sys/dev/pci/drm/radeon/ci_dpm.c

5596

u16 data_offset;

sys/dev/pci/drm/radeon/ci_dpm.c

5634

u16 data_offset, size;

sys/dev/pci/drm/radeon/ci_dpm.c

933

u16 fdo_min, slope1, slope2;

sys/dev/pci/drm/radeon/ci_dpm.c

952

fdo_min = (u16)tmp64;

sys/dev/pci/drm/radeon/ci_dpm.c

960

slope1 = (u16)((50 + ((16 * duty100 * pwm_diff1) / t_diff1)) / 100);

sys/dev/pci/drm/radeon/ci_dpm.c

961

slope2 = (u16)((50 + ((16 * duty100 * pwm_diff2) / t_diff2)) / 100);

sys/dev/pci/drm/radeon/ci_dpm.c

985

fan_table.FdoMax = cpu_to_be16((u16)duty100);

sys/dev/pci/drm/radeon/ci_dpm.h

100

u16 count;

sys/dev/pci/drm/radeon/ci_dpm.h

101

u16 leakage_id[CISLANDS_MAX_LEAKAGE_COUNT];

sys/dev/pci/drm/radeon/ci_dpm.h

102

u16 actual_voltage[CISLANDS_MAX_LEAKAGE_COUNT];

sys/dev/pci/drm/radeon/ci_dpm.h

116

u16 mvdd_bootup_value;

sys/dev/pci/drm/radeon/ci_dpm.h

117

u16 vddc_bootup_value;

sys/dev/pci/drm/radeon/ci_dpm.h

118

u16 vddci_bootup_value;

sys/dev/pci/drm/radeon/ci_dpm.h

121

u16 pcie_gen_bootup_value;

sys/dev/pci/drm/radeon/ci_dpm.h

122

u16 pcie_lane_bootup_value;

sys/dev/pci/drm/radeon/ci_dpm.h

150

u16 max;

sys/dev/pci/drm/radeon/ci_dpm.h

151

u16 min;

sys/dev/pci/drm/radeon/ci_dpm.h

183

u16 bapmti_r[SMU7_DTE_ITERATIONS * SMU7_DTE_SOURCES * SMU7_DTE_SINKS];

sys/dev/pci/drm/radeon/ci_dpm.h

184

u16 bapmti_rc[SMU7_DTE_ITERATIONS * SMU7_DTE_SOURCES * SMU7_DTE_SINKS];

sys/dev/pci/drm/radeon/ci_dpm.h

199

u16 acpi_vddc;

sys/dev/pci/drm/radeon/ci_dpm.h

200

u16 acpi_vddci;

sys/dev/pci/drm/radeon/ci_dpm.h

205

u16 max_vddc_in_pp_table;

sys/dev/pci/drm/radeon/ci_dpm.h

206

u16 min_vddc_in_pp_table;

sys/dev/pci/drm/radeon/ci_dpm.h

207

u16 max_vddci_in_pp_table;

sys/dev/pci/drm/radeon/ci_dpm.h

208

u16 min_vddci_in_pp_table;

sys/dev/pci/drm/radeon/ci_dpm.h

43

u16 pcie_lane;

sys/dev/pci/drm/radeon/ci_dpm.h

47

u16 performance_level_count;

sys/dev/pci/drm/radeon/ci_dpm.h

85

u16 valid_flag;

sys/dev/pci/drm/radeon/cik.c

9508

u16 tmp16;

sys/dev/pci/drm/radeon/cik.c

9553

u16 bridge_cfg, gpu_cfg;

sys/dev/pci/drm/radeon/cik.c

9554

u16 bridge_cfg2, gpu_cfg2;

sys/dev/pci/drm/radeon/cypress_dpm.c

1708

pi->state_table_start = (u16)tmp;

sys/dev/pci/drm/radeon/cypress_dpm.c

1717

pi->soft_regs_start = (u16)tmp;

sys/dev/pci/drm/radeon/cypress_dpm.c

1726

eg_pi->mc_reg_table_start = (u16)tmp;

sys/dev/pci/drm/radeon/cypress_dpm.c

404

u16 value, RV770_SMC_VOLTAGE_VALUE *voltage)

sys/dev/pci/drm/radeon/cypress_dpm.c

873

u16 address = pi->state_table_start +

sys/dev/pci/drm/radeon/cypress_dpm.c

893

u16 address;

sys/dev/pci/drm/radeon/cypress_dpm.c

898

(u16)offsetof(SMC_Evergreen_MCRegisters, data[2]);

sys/dev/pci/drm/radeon/cypress_dpm.h

37

u16 valid_flag;

sys/dev/pci/drm/radeon/cypress_dpm.h

79

u16 acpi_vddci;

sys/dev/pci/drm/radeon/cypress_dpm.h

90

u16 mc_reg_table_start;

sys/dev/pci/drm/radeon/dce3_1_afmt.c

72

static const u16 eld_reg_to_type[][2] = {

sys/dev/pci/drm/radeon/dce6_afmt.c

211

static const u16 eld_reg_to_type[][2] = {

sys/dev/pci/drm/radeon/evergreen.c

1281

u16 v;

sys/dev/pci/drm/radeon/evergreen_hdmi.c

162

static const u16 eld_reg_to_type[][2] = {

sys/dev/pci/drm/radeon/kv_dpm.c

1185

u16 tmp;

sys/dev/pci/drm/radeon/kv_dpm.c

1193

sizeof(u16), pi->sram_end);

sys/dev/pci/drm/radeon/kv_dpm.c

1202

sizeof(u16), pi->sram_end);

sys/dev/pci/drm/radeon/kv_dpm.c

2292

u16 data_offset;

sys/dev/pci/drm/radeon/kv_dpm.c

2440

u16 data_offset;

sys/dev/pci/drm/radeon/kv_dpm.c

2605

u16 vddc;

sys/dev/pci/drm/radeon/kv_dpm.c

2613

vddc = kv_convert_8bit_index_to_voltage(rdev, (u16)tmp);

sys/dev/pci/drm/radeon/kv_dpm.c

439

static u16 kv_convert_8bit_index_to_voltage(struct radeon_device *rdev,

sys/dev/pci/drm/radeon/kv_dpm.c

440

u16 voltage)

sys/dev/pci/drm/radeon/kv_dpm.c

445

static u16 kv_convert_2bit_index_to_voltage(struct radeon_device *rdev,

sys/dev/pci/drm/radeon/kv_dpm.c

453

return kv_convert_8bit_index_to_voltage(rdev, (u16)vid_8bit);

sys/dev/pci/drm/radeon/kv_dpm.c

472

pi->graphics_level[index].AT = cpu_to_be16((u16)at);

sys/dev/pci/drm/radeon/kv_dpm.h

117

u16 high_voltage_t;

sys/dev/pci/drm/radeon/kv_dpm.h

130

u16 fps_high_t;

sys/dev/pci/drm/radeon/kv_dpm.h

98

u16 bootup_nb_voltage_index;

sys/dev/pci/drm/radeon/ni_dpm.c

1113

pi->state_table_start = (u16)tmp;

sys/dev/pci/drm/radeon/ni_dpm.c

1123

pi->soft_regs_start = (u16)tmp;

sys/dev/pci/drm/radeon/ni_dpm.c

1133

eg_pi->mc_reg_table_start = (u16)tmp;

sys/dev/pci/drm/radeon/ni_dpm.c

1143

ni_pi->fan_table_start = (u16)tmp;

sys/dev/pci/drm/radeon/ni_dpm.c

1153

ni_pi->arb_table_start = (u16)tmp;

sys/dev/pci/drm/radeon/ni_dpm.c

1163

ni_pi->cac_table_start = (u16)tmp;

sys/dev/pci/drm/radeon/ni_dpm.c

1173

ni_pi->spll_table_start = (u16)tmp;

sys/dev/pci/drm/radeon/ni_dpm.c

1301

u16 value,

sys/dev/pci/drm/radeon/ni_dpm.c

1344

u16 *std_voltage)

sys/dev/pci/drm/radeon/ni_dpm.c

1356

u16 value, u8 index,

sys/dev/pci/drm/radeon/ni_dpm.c

1393

u16 std_vddc_med;

sys/dev/pci/drm/radeon/ni_dpm.c

1394

u16 std_vddc_high;

sys/dev/pci/drm/radeon/ni_dpm.c

1493

(u16)(pi->state_table_start + offsetof(NISLANDS_SMC_STATETABLE, dpm2Params) +

sys/dev/pci/drm/radeon/ni_dpm.c

1651

(u16)(ni_pi->arb_table_start +

sys/dev/pci/drm/radeon/ni_dpm.c

1655

(u16)sizeof(SMC_NIslands_MCArbDramTimingRegisterSet),

sys/dev/pci/drm/radeon/ni_dpm.c

1732

u16 std_vddc;

sys/dev/pci/drm/radeon/ni_dpm.c

1818

u16 std_vddc;

sys/dev/pci/drm/radeon/ni_dpm.c

1842

u16 std_vddc;

sys/dev/pci/drm/radeon/ni_dpm.c

2322

u16 std_vddc;

sys/dev/pci/drm/radeon/ni_dpm.c

2691

u16 address = pi->state_table_start +

sys/dev/pci/drm/radeon/ni_dpm.c

2771

static bool ni_check_s0_mc_reg_index(u16 in_reg, u16 *out_reg)

sys/dev/pci/drm/radeon/ni_dpm.c

2840

u16 address;

sys/dev/pci/drm/radeon/ni_dpm.c

3034

u16 address;

sys/dev/pci/drm/radeon/ni_dpm.c

3041

(u16)offsetof(SMC_NIslands_MCRegisters, data[NISLANDS_MCREGISTERTABLE_FIRST_DRIVERSTATE_SLOT]);

sys/dev/pci/drm/radeon/ni_dpm.c

3968

u16 vddc, vddci, mvdd;

sys/dev/pci/drm/radeon/ni_dpm.c

3994

u16 data_offset;

sys/dev/pci/drm/radeon/ni_dpm.c

741

u16 v, s32 t,

sys/dev/pci/drm/radeon/ni_dpm.c

763

u16 v,

sys/dev/pci/drm/radeon/ni_dpm.c

792

u16 vddci;

sys/dev/pci/drm/radeon/ni_dpm.h

169

u16 performance_level_count;

sys/dev/pci/drm/radeon/ni_dpm.h

191

u16 arb_table_start;

sys/dev/pci/drm/radeon/ni_dpm.h

192

u16 fan_table_start;

sys/dev/pci/drm/radeon/ni_dpm.h

193

u16 cac_table_start;

sys/dev/pci/drm/radeon/ni_dpm.h

194

u16 spll_table_start;

sys/dev/pci/drm/radeon/ni_dpm.h

55

u16 valid_flag;

sys/dev/pci/drm/radeon/r600.c

4490

u16 link_cntl2;

sys/dev/pci/drm/radeon/r600_dpm.c

1337

u16 r600_get_pcie_lane_support(struct radeon_device *rdev,

sys/dev/pci/drm/radeon/r600_dpm.c

1338

u16 asic_lanes,

sys/dev/pci/drm/radeon/r600_dpm.c

1339

u16 default_lanes)

sys/dev/pci/drm/radeon/r600_dpm.c

848

u16 data_offset;

sys/dev/pci/drm/radeon/r600_dpm.c

878

u16 data_offset;

sys/dev/pci/drm/radeon/r600_dpm.h

232

u16 r600_get_pcie_lane_support(struct radeon_device *rdev,

sys/dev/pci/drm/radeon/r600_dpm.h

233

u16 asic_lanes,

sys/dev/pci/drm/radeon/r600_dpm.h

234

u16 default_lanes);

sys/dev/pci/drm/radeon/radeon.h

1279

u16 voltage;

sys/dev/pci/drm/radeon/radeon.h

1281

u16 vddci;

sys/dev/pci/drm/radeon/radeon.h

1384

u16 vddc;

sys/dev/pci/drm/radeon/radeon.h

1385

u16 vddci;

sys/dev/pci/drm/radeon/radeon.h

1395

u16 v;

sys/dev/pci/drm/radeon/radeon.h

1405

u16 vddc;

sys/dev/pci/drm/radeon/radeon.h

1409

u16 vddc1;

sys/dev/pci/drm/radeon/radeon.h

1410

u16 vddc2;

sys/dev/pci/drm/radeon/radeon.h

1411

u16 vddc3;

sys/dev/pci/drm/radeon/radeon.h

1421

u16 voltage;

sys/dev/pci/drm/radeon/radeon.h

1434

u16 v;

sys/dev/pci/drm/radeon/radeon.h

1445

u16 v;

sys/dev/pci/drm/radeon/radeon.h

1455

u16 cpu_core_number;

sys/dev/pci/drm/radeon/radeon.h

1467

u16 tdp;

sys/dev/pci/drm/radeon/radeon.h

1468

u16 configurable_tdp;

sys/dev/pci/drm/radeon/radeon.h

1469

u16 tdc;

sys/dev/pci/drm/radeon/radeon.h

1470

u16 battery_power_limit;

sys/dev/pci/drm/radeon/radeon.h

1471

u16 small_power_limit;

sys/dev/pci/drm/radeon/radeon.h

1472

u16 low_cac_leakage;

sys/dev/pci/drm/radeon/radeon.h

1473

u16 high_cac_leakage;

sys/dev/pci/drm/radeon/radeon.h

1474

u16 maximum_power_delivery_limit;

sys/dev/pci/drm/radeon/radeon.h

1493

u16 vddc_vddci_delta;

sys/dev/pci/drm/radeon/radeon.h

1494

u16 min_vddc_for_pcie_gen2;

sys/dev/pci/drm/radeon/radeon.h

1502

u16 t_min;

sys/dev/pci/drm/radeon/radeon.h

1503

u16 t_med;

sys/dev/pci/drm/radeon/radeon.h

1504

u16 t_high;

sys/dev/pci/drm/radeon/radeon.h

1505

u16 pwm_min;

sys/dev/pci/drm/radeon/radeon.h

1506

u16 pwm_med;

sys/dev/pci/drm/radeon/radeon.h

1507

u16 pwm_high;

sys/dev/pci/drm/radeon/radeon.h

1510

u16 t_max;

sys/dev/pci/drm/radeon/radeon.h

1512

u16 default_max_fan_pwm;

sys/dev/pci/drm/radeon/radeon.h

1513

u16 default_fan_output_sensitivity;

sys/dev/pci/drm/radeon/radeon.h

1514

u16 fan_output_sensitivity;

sys/dev/pci/drm/radeon/radeon.h

1576

u16 tdp_od_limit;

sys/dev/pci/drm/radeon/radeon.h

1578

u16 load_line_slope;

sys/dev/pci/drm/radeon/radeon.h

1627

u16 current_vddc;

sys/dev/pci/drm/radeon/radeon.h

1628

u16 current_vddci;

sys/dev/pci/drm/radeon/radeon.h

1631

u16 default_vddc;

sys/dev/pci/drm/radeon/radeon.h

1632

u16 default_vddci;

sys/dev/pci/drm/radeon/radeon.h

1995

u16 (*get_current_vddc)(struct radeon_device *rdev);

sys/dev/pci/drm/radeon/radeon.h

313

void radeon_atom_set_voltage(struct radeon_device *rdev, u16 voltage_level, u8 voltage_type);

sys/dev/pci/drm/radeon/radeon.h

315

u16 voltage_level, u8 voltage_type,

sys/dev/pci/drm/radeon/radeon.h

320

u8 voltage_type, u16 *voltage_step);

sys/dev/pci/drm/radeon/radeon.h

322

u16 voltage_id, u16 *voltage);

sys/dev/pci/drm/radeon/radeon.h

324

u16 *voltage,

sys/dev/pci/drm/radeon/radeon.h

325

u16 leakage_idx);

sys/dev/pci/drm/radeon/radeon.h

327

u16 *leakage_id);

sys/dev/pci/drm/radeon/radeon.h

329

u16 *vddc, u16 *vddci,

sys/dev/pci/drm/radeon/radeon.h

330

u16 virtual_voltage_id,

sys/dev/pci/drm/radeon/radeon.h

331

u16 vbios_voltage_id);

sys/dev/pci/drm/radeon/radeon.h

333

u16 virtual_voltage_id,

sys/dev/pci/drm/radeon/radeon.h

334

u16 *voltage);

sys/dev/pci/drm/radeon/radeon.h

337

u16 nominal_voltage,

sys/dev/pci/drm/radeon/radeon.h

338

u16 *true_voltage);

sys/dev/pci/drm/radeon/radeon.h

340

u8 voltage_type, u16 *min_voltage);

sys/dev/pci/drm/radeon/radeon.h

342

u8 voltage_type, u16 *max_voltage);

sys/dev/pci/drm/radeon/radeon.h

364

u16 voltage_id, u16 *voltage);

sys/dev/pci/drm/radeon/radeon_acpi.c

223

size = *(u16 *) info->buffer.pointer;

sys/dev/pci/drm/radeon/radeon_acpi.c

270

size = *(u16 *) info->buffer.pointer;

sys/dev/pci/drm/radeon/radeon_acpi.c

329

size = *(u16 *)info->buffer.pointer;

sys/dev/pci/drm/radeon/radeon_acpi.c

50

u16 size; /* structure size in bytes (includes size field) */

sys/dev/pci/drm/radeon/radeon_acpi.c

51

u16 version; /* version */

sys/dev/pci/drm/radeon/radeon_acpi.c

517

size = *(u16 *) info->buffer.pointer;

sys/dev/pci/drm/radeon/radeon_acpi.c

57

u16 size; /* structure size in bytes (includes size field) */

sys/dev/pci/drm/radeon/radeon_acpi.c

639

size = *(u16 *) info->buffer.pointer;

sys/dev/pci/drm/radeon/radeon_acpi.c

64

u16 size; /* structure size in bytes (includes size field) */

sys/dev/pci/drm/radeon/radeon_acpi.c

81

u16 size; /* structure size in bytes (includes size field) */

sys/dev/pci/drm/radeon/radeon_acpi.c

82

u16 version; /* version */

sys/dev/pci/drm/radeon/radeon_acpi.c

89

u16 size; /* structure size in bytes (includes size field) */

sys/dev/pci/drm/radeon/radeon_acpi.c

90

u16 client_id; /* client id (bit 2-0: func num, 7-3: dev num, 15-8: bus num) */

sys/dev/pci/drm/radeon/radeon_acpi.c

91

u16 valid_flags_mask; /* valid flags mask */

sys/dev/pci/drm/radeon/radeon_acpi.c

92

u16 flags; /* flags */

sys/dev/pci/drm/radeon/radeon_acpi.c

98

u16 size; /* structure size in bytes (includes size field) */

sys/dev/pci/drm/radeon/radeon_asic.h

597

u16 sumo_dpm_get_current_vddc(struct radeon_device *rdev);

sys/dev/pci/drm/radeon/radeon_atombios.c

1118

u16 data_offset;

sys/dev/pci/drm/radeon/radeon_atombios.c

1305

u16 data_offset;

sys/dev/pci/drm/radeon/radeon_atombios.c

1427

u16 data_offset, size;

sys/dev/pci/drm/radeon/radeon_atombios.c

1430

u16 percentage = 0, rate = 0;

sys/dev/pci/drm/radeon/radeon_atombios.c

1802

u16 data_offset, misc;

sys/dev/pci/drm/radeon/radeon_atombios.c

206

u16 data_offset, size;

sys/dev/pci/drm/radeon/radeon_atombios.c

2094

u16 data_offset;

sys/dev/pci/drm/radeon/radeon_atombios.c

2383

u16 *vddc, u16 *vddci, u16 *mvdd)

sys/dev/pci/drm/radeon/radeon_atombios.c

2388

u16 data_offset;

sys/dev/pci/drm/radeon/radeon_atombios.c

2415

u16 vddc, vddci, mvdd;

sys/dev/pci/drm/radeon/radeon_atombios.c

2460

u16 max_vddci = 0;

sys/dev/pci/drm/radeon/radeon_atombios.c

2488

u16 vddc;

sys/dev/pci/drm/radeon/radeon_atombios.c

2591

u16 data_offset;

sys/dev/pci/drm/radeon/radeon_atombios.c

2684

u16 data_offset;

sys/dev/pci/drm/radeon/radeon_atombios.c

2771

u16 data_offset;

sys/dev/pci/drm/radeon/radeon_atombios.c

3113

void radeon_atom_set_voltage(struct radeon_device *rdev, u16 voltage_level, u8 voltage_type)

sys/dev/pci/drm/radeon/radeon_atombios.c

3151

u16 voltage_id, u16 *voltage)

sys/dev/pci/drm/radeon/radeon_atombios.c

3190

u16 *voltage,

sys/dev/pci/drm/radeon/radeon_atombios.c

3191

u16 leakage_idx)

sys/dev/pci/drm/radeon/radeon_atombios.c

3197

u16 *leakage_id)

sys/dev/pci/drm/radeon/radeon_atombios.c

3226

u16 *vddc, u16 *vddci,

sys/dev/pci/drm/radeon/radeon_atombios.c

3227

u16 virtual_voltage_id,

sys/dev/pci/drm/radeon/radeon_atombios.c

3228

u16 vbios_voltage_id)

sys/dev/pci/drm/radeon/radeon_atombios.c

3232

u16 data_offset, size;

sys/dev/pci/drm/radeon/radeon_atombios.c

3235

u16 *leakage_bin, *vddc_id_buf, *vddc_buf, *vddci_id_buf, *vddci_buf;

sys/dev/pci/drm/radeon/radeon_atombios.c

3255

leakage_bin = (u16 *)

sys/dev/pci/drm/radeon/radeon_atombios.c

3258

vddc_id_buf = (u16 *)

sys/dev/pci/drm/radeon/radeon_atombios.c

3261

vddc_buf = (u16 *)

sys/dev/pci/drm/radeon/radeon_atombios.c

3264

vddci_id_buf = (u16 *)

sys/dev/pci/drm/radeon/radeon_atombios.c

3267

vddci_buf = (u16 *)

sys/dev/pci/drm/radeon/radeon_atombios.c

3317

u16 virtual_voltage_id,

sys/dev/pci/drm/radeon/radeon_atombios.c

3318

u16 *voltage)

sys/dev/pci/drm/radeon/radeon_atombios.c

3348

u16 voltage_level, u8 voltage_type,

sys/dev/pci/drm/radeon/radeon_atombios.c

3455

u16 data_offset, size;

sys/dev/pci/drm/radeon/radeon_atombios.c

3514

u16 data_offset, size;

sys/dev/pci/drm/radeon/radeon_atombios.c

3553

u8 voltage_type, u16 *max_voltage)

sys/dev/pci/drm/radeon/radeon_atombios.c

3557

u16 data_offset, size;

sys/dev/pci/drm/radeon/radeon_atombios.c

3612

u8 voltage_type, u16 *min_voltage)

sys/dev/pci/drm/radeon/radeon_atombios.c

3616

u16 data_offset, size;

sys/dev/pci/drm/radeon/radeon_atombios.c

3662

u8 voltage_type, u16 *voltage_step)

sys/dev/pci/drm/radeon/radeon_atombios.c

3666

u16 data_offset, size;

sys/dev/pci/drm/radeon/radeon_atombios.c

3704

u16 nominal_voltage,

sys/dev/pci/drm/radeon/radeon_atombios.c

3705

u16 *true_voltage)

sys/dev/pci/drm/radeon/radeon_atombios.c

3707

u16 min_voltage, max_voltage, voltage_step;

sys/dev/pci/drm/radeon/radeon_atombios.c

3734

u16 data_offset, size;

sys/dev/pci/drm/radeon/radeon_atombios.c

3834

u16 data_offset, size;

sys/dev/pci/drm/radeon/radeon_atombios.c

3924

u16 data_offset, size;

sys/dev/pci/drm/radeon/radeon_atombios.c

3998

u16 data_offset, size;

sys/dev/pci/drm/radeon/radeon_atombios.c

4020

((u8 *)reg_block + (2 * sizeof(u16)) +

sys/dev/pci/drm/radeon/radeon_atombios.c

4031

(u16)(le16_to_cpu(format->usRegIndex));

sys/dev/pci/drm/radeon/radeon_atombios.c

527

u16 size, data_offset;

sys/dev/pci/drm/radeon/radeon_atombios.c

536

u16 igp_lane_info, conn_id, connector_object_id;

sys/dev/pci/drm/radeon/radeon_atombios.c

653

u16 encoder_obj = le16_to_cpu(enc_obj->asObjects[k].usObjectID);

sys/dev/pci/drm/radeon/radeon_atombios.c

659

u16 caps = 0;

sys/dev/pci/drm/radeon/radeon_atombios.c

684

u16 router_obj_id = le16_to_cpu(router_obj->asObjects[k].usObjectID);

sys/dev/pci/drm/radeon/radeon_atombios.c

700

u16 *dst_objs = (u16 *)(num_dst_objs + 1);

sys/dev/pci/drm/radeon/radeon_atombios.h

40

uint32_t supported_device, u16 caps);

sys/dev/pci/drm/radeon/radeon_combios.c

1195

lvds->panel_vcc_delay = min_t(u16, lvds->panel_vcc_delay, 2000);

sys/dev/pci/drm/radeon/radeon_combios.c

2634

u16 offset, misc, misc2 = 0;

sys/dev/pci/drm/radeon/radeon_combios.c

2762

u16 voltage_table_offset = RBIOS16(offset + 0x5 + 0xc);

sys/dev/pci/drm/radeon/radeon_combios.c

640

u16 offset;

sys/dev/pci/drm/radeon/radeon_combios.c

809

u16 igp_info;

sys/dev/pci/drm/radeon/radeon_connectors.c

1573

u16 radeon_connector_encoder_get_dp_bridge_encoder_id(struct drm_connector *connector)

sys/dev/pci/drm/radeon/radeon_display.c

126

u16 *r, *g, *b;

sys/dev/pci/drm/radeon/radeon_display.c

198

u16 *r, *g, *b;

sys/dev/pci/drm/radeon/radeon_display.c

239

static int radeon_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,

sys/dev/pci/drm/radeon/radeon_display.c

240

u16 *blue, uint32_t size,

sys/dev/pci/drm/radeon/radeon_display.c

54

u16 *r, *g, *b;

sys/dev/pci/drm/radeon/radeon_display.c

92

u16 *r, *g, *b;

sys/dev/pci/drm/radeon/radeon_encoders.c

302

u16 radeon_encoder_get_dp_bridge_encoder_id(struct drm_encoder *encoder)

sys/dev/pci/drm/radeon/radeon_legacy_tv.c

430

u16 p1, p2, h_inc;

sys/dev/pci/drm/radeon/radeon_legacy_tv.c

463

p1 = (u16)((int)p1 + h_offset);

sys/dev/pci/drm/radeon/radeon_legacy_tv.c

464

p2 = (u16)((int)p2 - h_offset);

sys/dev/pci/drm/radeon/radeon_legacy_tv.c

509

h_inc = (u16)((int)(const_ptr->hor_resolution * 4096 * NTSC_TV_CLOCK_T) /

sys/dev/pci/drm/radeon/radeon_legacy_tv.c

512

h_inc = (u16)((int)(const_ptr->hor_resolution * 4096 * PAL_TV_CLOCK_T) /

sys/dev/pci/drm/radeon/radeon_mode.h

273

u16 firmware_flags;

sys/dev/pci/drm/radeon/radeon_mode.h

460

u16 caps;

sys/dev/pci/drm/radeon/radeon_mode.h

625

u16 s1;

sys/dev/pci/drm/radeon/radeon_mode.h

639

u16 value;

sys/dev/pci/drm/radeon/radeon_mode.h

685

u16 *vddc, u16 *vddci, u16 *mvdd);

sys/dev/pci/drm/radeon/radeon_mode.h

703

extern u16 radeon_encoder_get_dp_bridge_encoder_id(struct drm_encoder *encoder);

sys/dev/pci/drm/radeon/radeon_mode.h

704

extern u16 radeon_connector_encoder_get_dp_bridge_encoder_id(struct drm_connector *connector);

sys/dev/pci/drm/radeon/radeon_pm.c

757

u16 vddc = 0;

sys/dev/pci/drm/radeon/rs780_dpm.c

378

static void rs780_force_voltage(struct radeon_device *rdev, u16 voltage)

sys/dev/pci/drm/radeon/rs780_dpm.c

798

u16 data_offset;

sys/dev/pci/drm/radeon/rs780_dpm.c

852

u16 data_offset;

sys/dev/pci/drm/radeon/rs780_dpm.h

41

u16 max_voltage;

sys/dev/pci/drm/radeon/rs780_dpm.h

42

u16 min_voltage;

sys/dev/pci/drm/radeon/rs780_dpm.h

43

u16 boot_voltage;

sys/dev/pci/drm/radeon/rs780_dpm.h

44

u16 inter_voltage_low;

sys/dev/pci/drm/radeon/rs780_dpm.h

45

u16 inter_voltage_high;

sys/dev/pci/drm/radeon/rs780_dpm.h

46

u16 num_of_cycles_in_period;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1204

u16 safe_voltage;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1273

u16 initial_voltage,

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1274

u16 target_voltage)

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1276

u16 current_voltage;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1277

u16 true_target_voltage;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1278

u16 voltage_step;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1822

u16 vddc;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1864

u16 vddc, vddci, mvdd;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1881

u16 data_offset;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

702

u32 entry, u16 voltage)

sys/dev/pci/drm/radeon/rv6xx_dpm.h

39

u16 vddc[R600_PM_NUMBER_OF_VOLTAGE_LEVELS];

sys/dev/pci/drm/radeon/rv6xx_dpm.h

81

u16 vddc;

sys/dev/pci/drm/radeon/rv740_dpm.c

104

data_rate = (u16)(memory_clock * factor / 1000);

sys/dev/pci/drm/radeon/rv740_dpm.c

68

u16 min;

sys/dev/pci/drm/radeon/rv740_dpm.c

69

u16 max;

sys/dev/pci/drm/radeon/rv740_dpm.c

97

u16 data_rate;

sys/dev/pci/drm/radeon/rv770.c

2023

u16 link_cntl2;

sys/dev/pci/drm/radeon/rv770_dpm.c

1236

u16 min, max, step;

sys/dev/pci/drm/radeon/rv770_dpm.c

1253

pi->vddc_table[i].vddc = (u16)(min + i * step);

sys/dev/pci/drm/radeon/rv770_dpm.c

1387

u16 address = pi->state_table_start +

sys/dev/pci/drm/radeon/rv770_dpm.c

1694

u16 vddc;

sys/dev/pci/drm/radeon/rv770_dpm.c

2251

u16 vddc, vddci, mvdd;

sys/dev/pci/drm/radeon/rv770_dpm.c

2277

u16 data_offset;

sys/dev/pci/drm/radeon/rv770_dpm.c

237

u16 reg_offset, u32 *value)

sys/dev/pci/drm/radeon/rv770_dpm.c

248

u16 reg_offset, u32 value)

sys/dev/pci/drm/radeon/rv770_dpm.c

567

int rv770_populate_vddc_value(struct radeon_device *rdev, u16 vddc,

sys/dev/pci/drm/radeon/rv770_dpm.h

103

u16 max_vddc;

sys/dev/pci/drm/radeon/rv770_dpm.h

104

u16 max_vddc_in_table;

sys/dev/pci/drm/radeon/rv770_dpm.h

105

u16 min_vddc_in_table;

sys/dev/pci/drm/radeon/rv770_dpm.h

114

u16 acpi_vddc;

sys/dev/pci/drm/radeon/rv770_dpm.h

135

u16 state_table_start;

sys/dev/pci/drm/radeon/rv770_dpm.h

136

u16 soft_regs_start;

sys/dev/pci/drm/radeon/rv770_dpm.h

137

u16 sram_end;

sys/dev/pci/drm/radeon/rv770_dpm.h

145

u16 vddc;

sys/dev/pci/drm/radeon/rv770_dpm.h

146

u16 vddci; /* eg+ only */

sys/dev/pci/drm/radeon/rv770_dpm.h

218

int rv770_populate_vddc_value(struct radeon_device *rdev, u16 vddc,

sys/dev/pci/drm/radeon/rv770_dpm.h

283

u16 reg_offset, u32 value);

sys/dev/pci/drm/radeon/rv770_dpm.h

66

u16 vddc;

sys/dev/pci/drm/radeon/rv770_smc.c

266

u16 smc_address, u16 limit)

sys/dev/pci/drm/radeon/rv770_smc.c

284

u16 smc_start_address, const u8 *src,

sys/dev/pci/drm/radeon/rv770_smc.c

285

u16 byte_count, u16 limit)

sys/dev/pci/drm/radeon/rv770_smc.c

289

u16 addr;

sys/dev/pci/drm/radeon/rv770_smc.c

455

static void rv770_clear_smc_sram(struct radeon_device *rdev, u16 limit)

sys/dev/pci/drm/radeon/rv770_smc.c

458

u16 i;

sys/dev/pci/drm/radeon/rv770_smc.c

469

u16 limit)

sys/dev/pci/drm/radeon/rv770_smc.c

473

u16 int_vect_start_address;

sys/dev/pci/drm/radeon/rv770_smc.c

474

u16 int_vect_size;

sys/dev/pci/drm/radeon/rv770_smc.c

476

u16 ucode_start_address;

sys/dev/pci/drm/radeon/rv770_smc.c

477

u16 ucode_size;

sys/dev/pci/drm/radeon/rv770_smc.c

592

u16 smc_address, u32 *value, u16 limit)

sys/dev/pci/drm/radeon/rv770_smc.c

607

u16 smc_address, u32 value, u16 limit)

sys/dev/pci/drm/radeon/rv770_smc.h

182

u16 smc_start_address, const u8 *src,

sys/dev/pci/drm/radeon/rv770_smc.h

183

u16 byte_count, u16 limit);

sys/dev/pci/drm/radeon/rv770_smc.h

192

u16 smc_address, u32 *value, u16 limit);

sys/dev/pci/drm/radeon/rv770_smc.h

194

u16 smc_address, u32 value, u16 limit);

sys/dev/pci/drm/radeon/rv770_smc.h

196

u16 limit);

sys/dev/pci/drm/radeon/si.c

7072

u16 tmp16;

sys/dev/pci/drm/radeon/si.c

7117

u16 bridge_cfg, gpu_cfg;

sys/dev/pci/drm/radeon/si.c

7118

u16 bridge_cfg2, gpu_cfg2;

sys/dev/pci/drm/radeon/si_dpm.c

1683

u16 value, SISLANDS_SMC_VOLTAGE_VALUE *voltage);

sys/dev/pci/drm/radeon/si_dpm.c

1686

u16 *std_voltage);

sys/dev/pci/drm/radeon/si_dpm.c

1688

u16 reg_offset, u32 value);

sys/dev/pci/drm/radeon/si_dpm.c

1707

u16 v, s32 t, u32 ileakage, u32 *leakage)

sys/dev/pci/drm/radeon/si_dpm.c

1735

u16 v,

sys/dev/pci/drm/radeon/si_dpm.c

1744

const u32 fixed_kt, u16 v,

sys/dev/pci/drm/radeon/si_dpm.c

1764

u16 v,

sys/dev/pci/drm/radeon/si_dpm.c

2188

static u16 si_calculate_power_efficiency_ratio(struct radeon_device *rdev,

sys/dev/pci/drm/radeon/si_dpm.c

2189

const u16 prev_std_vddc,

sys/dev/pci/drm/radeon/si_dpm.c

2190

const u16 curr_std_vddc)

sys/dev/pci/drm/radeon/si_dpm.c

2207

return (u16)pwr_efficiency_ratio;

sys/dev/pci/drm/radeon/si_dpm.c

2233

u16 prev_std_vddc;

sys/dev/pci/drm/radeon/si_dpm.c

2234

u16 curr_std_vddc;

sys/dev/pci/drm/radeon/si_dpm.c

2236

u16 pwr_efficiency_ratio;

sys/dev/pci/drm/radeon/si_dpm.c

2469

u16 *max, u16 *min)

sys/dev/pci/drm/radeon/si_dpm.c

2499

*min = (u16)v0_loadline;

sys/dev/pci/drm/radeon/si_dpm.c

2507

static u16 si_get_cac_std_voltage_step(u16 max, u16 min)

sys/dev/pci/drm/radeon/si_dpm.c

2515

u16 vddc_max, u16 vddc_min, u16 vddc_step,

sys/dev/pci/drm/radeon/si_dpm.c

2516

u16 t0, u16 t_step)

sys/dev/pci/drm/radeon/si_dpm.c

2524

u16 voltage;

sys/dev/pci/drm/radeon/si_dpm.c

2547

cpu_to_be16((u16)smc_leakage);

sys/dev/pci/drm/radeon/si_dpm.c

2555

u16 vddc_max, u16 vddc_min, u16 vddc_step)

sys/dev/pci/drm/radeon/si_dpm.c

2562

u16 voltage;

sys/dev/pci/drm/radeon/si_dpm.c

2583

cpu_to_be16((u16)smc_leakage);

sys/dev/pci/drm/radeon/si_dpm.c

2593

u16 vddc_max, vddc_min, vddc_step;

sys/dev/pci/drm/radeon/si_dpm.c

2594

u16 t0, t_step;

sys/dev/pci/drm/radeon/si_dpm.c

2852

static u16 si_get_lower_of_leakage_and_vce_voltage(struct radeon_device *rdev,

sys/dev/pci/drm/radeon/si_dpm.c

2853

u16 vce_voltage)

sys/dev/pci/drm/radeon/si_dpm.c

2855

u16 highest_leakage = 0;

sys/dev/pci/drm/radeon/si_dpm.c

2871

u32 evclk, u32 ecclk, u16 *voltage)

sys/dev/pci/drm/radeon/si_dpm.c

2910

u16 vddc, vddci, min_vce_voltage = 0;

sys/dev/pci/drm/radeon/si_dpm.c

3128

u16 reg_offset, u32 *value)

sys/dev/pci/drm/radeon/si_dpm.c

3139

u16 reg_offset, u32 value)

sys/dev/pci/drm/radeon/si_dpm.c

3179

u16 vddc, count = 0;

sys/dev/pci/drm/radeon/si_dpm.c

3196

u32 index, u16 *leakage_voltage)

sys/dev/pci/drm/radeon/si_dpm.c

4055

u16 value, SISLANDS_SMC_VOLTAGE_VALUE *voltage)

sys/dev/pci/drm/radeon/si_dpm.c

4092

u16 *std_voltage)

sys/dev/pci/drm/radeon/si_dpm.c

4094

u16 v_index;

sys/dev/pci/drm/radeon/si_dpm.c

4105

(u16)rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[v_index].v) {

sys/dev/pci/drm/radeon/si_dpm.c

4120

(u16)rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[v_index].v) {

sys/dev/pci/drm/radeon/si_dpm.c

4142

u16 value, u8 index,

sys/dev/pci/drm/radeon/si_dpm.c

4153

u16 voltage, u32 sclk, u32 mclk,

sys/dev/pci/drm/radeon/si_dpm.c

4367

u16 std_vddc;

sys/dev/pci/drm/radeon/si_dpm.c

4459

u16 std_vddc;

sys/dev/pci/drm/radeon/si_dpm.c

4482

u16 std_vddc;

sys/dev/pci/drm/radeon/si_dpm.c

4930

u16 std_vddc;

sys/dev/pci/drm/radeon/si_dpm.c

5369

static bool si_check_s0_mc_reg_index(u16 in_reg, u16 *out_reg)

sys/dev/pci/drm/radeon/si_dpm.c

5441

u16 address;

sys/dev/pci/drm/radeon/si_dpm.c

5667

u16 pcie_speed, max_speed = 0;

sys/dev/pci/drm/radeon/si_dpm.c

5677

static u16 si_get_current_pcie_speed(struct radeon_device *rdev)

sys/dev/pci/drm/radeon/si_dpm.c

5684

return (u16)speed_cntl;

sys/dev/pci/drm/radeon/si_dpm.c

5818

u16 leakage_voltage;

sys/dev/pci/drm/radeon/si_dpm.c

5979

u16 fdo_min, slope1, slope2;

sys/dev/pci/drm/radeon/si_dpm.c

5998

fdo_min = (u16)tmp64;

sys/dev/pci/drm/radeon/si_dpm.c

6006

slope1 = (u16)((50 + ((16 * duty100 * pwm_diff1) / t_diff1)) / 100);

sys/dev/pci/drm/radeon/si_dpm.c

6007

slope2 = (u16)((50 + ((16 * duty100 * pwm_diff2) / t_diff2)) / 100);

sys/dev/pci/drm/radeon/si_dpm.c

6031

fan_table.fdo_max = cpu_to_be16((u16)duty100);

sys/dev/pci/drm/radeon/si_dpm.c

6683

u16 leakage_voltage;

sys/dev/pci/drm/radeon/si_dpm.c

6733

u16 vddc, vddci, mvdd;

sys/dev/pci/drm/radeon/si_dpm.c

6763

u16 data_offset;

sys/dev/pci/drm/radeon/si_dpm.h

110

u16 valid_flag;

sys/dev/pci/drm/radeon/si_dpm.h

121

u16 voltage;

sys/dev/pci/drm/radeon/si_dpm.h

122

u16 leakage_index;

sys/dev/pci/drm/radeon/si_dpm.h

129

u16 count;

sys/dev/pci/drm/radeon/si_dpm.h

152

u16 mvdd_bootup_value;

sys/dev/pci/drm/radeon/sumo_dpm.c

1462

u16 data_offset;

sys/dev/pci/drm/radeon/sumo_dpm.c

1558

static u16 sumo_convert_voltage_index_to_value(struct radeon_device *rdev,

sys/dev/pci/drm/radeon/sumo_dpm.c

1664

u16 data_offset;

sys/dev/pci/drm/radeon/sumo_dpm.c

1870

u16 sumo_dpm_get_current_vddc(struct radeon_device *rdev)

sys/dev/pci/drm/radeon/sumo_dpm.h

61

u16 vid_2bit;

sys/dev/pci/drm/radeon/sumo_dpm.h

62

u16 vid_7bit;

sys/dev/pci/drm/radeon/sumo_dpm.h

72

u16 vid_2bit;

sys/dev/pci/drm/radeon/sumo_dpm.h

73

u16 rsv;

sys/dev/pci/drm/radeon/sumo_dpm.h

85

u16 bootup_nb_voltage_index;

sys/dev/pci/drm/radeon/trinity_dpm.c

1260

static u16 trinity_convert_voltage_index_to_value(struct radeon_device *rdev,

sys/dev/pci/drm/radeon/trinity_dpm.c

1457

u32 evclk, u32 ecclk, u16 *voltage)

sys/dev/pci/drm/radeon/trinity_dpm.c

1497

u16 min_vce_voltage;

sys/dev/pci/drm/radeon/trinity_dpm.c

1693

u16 data_offset;

sys/dev/pci/drm/radeon/trinity_dpm.c

1807

u16 data_offset;

sys/dev/pci/drm/radeon/trinity_dpm.h

83

u16 nbp_voltage_index[TRINITY_NUM_NBPSTATES];

sys/dev/pci/drm/radeon/trinity_dpm.h

84

u16 bootup_nb_voltage_index;

sys/dev/pci/if_ice.c

16531

u16 meta_init_size = sizeof(struct ice_meta_init_section);

sys/dev/pci/if_ice.c

16555

u16 i;

sys/dev/pci/if_ice.c

16561

ice_bitmap_from_array32(entry, arr, (u16)ICE_META_INIT_BITS);

sys/dev/pci/if_icevar.h

815

#define ICE_INVALID_MIRROR_VSI ((u16)-1)

sys/dev/pci/if_mwx.c

4602

u16 capab = le16_to_cpu(mgmt->u.action.u.addba_req.capab);

sys/dev/pci/if_mwx.c

4608

u16 control = le16_to_cpu(bar->control);

sys/dev/pci/if_mwx.c

4655

u16 seqno = le16_to_cpu(hdr->seq_ctrl);

sys/dev/pci/igc_defines.h

1272

(u16)(((invm_dword) & 0xFFFF0000) >> 16)

sys/dev/usb/dwc2/dwc2_core.h

1118

u16 frame_number;

sys/dev/usb/dwc2/dwc2_core.h

1194

u16 periodic_usecs;

sys/dev/usb/dwc2/dwc2_core.h

1197

u16 periodic_qh_count;

sys/dev/usb/dwc2/dwc2_core.h

1200

u16 last_frame_num;

sys/dev/usb/dwc2/dwc2_core.h

1204

u16 *frame_num_array;

sys/dev/usb/dwc2/dwc2_core.h

1205

u16 *last_frame_num_array;

sys/dev/usb/dwc2/dwc2_core.h

1366

void dwc2_read_packet(struct dwc2_hsotg *hsotg, u8 *dest, u16 bytes);

sys/dev/usb/dwc2/dwc2_core.h

1527

int dwc2_port_suspend(struct dwc2_hsotg *hsotg, u16 windex);

sys/dev/usb/dwc2/dwc2_core.h

1556

static inline int dwc2_port_suspend(struct dwc2_hsotg *hsotg, u16 windex)

sys/dev/usb/dwc2/dwc2_core.h

187

u16 interval;

sys/dev/usb/dwc2/dwc2_core.h

264

u16 otg_rev;

sys/dev/usb/dwc2/dwc2_core.h

535

u16 max_packet_count;

sys/dev/usb/dwc2/dwc2_core.h

541

u16 sof_cnt_wkup_alert;

sys/dev/usb/dwc2/dwc2_core.h

552

u16 host_rx_fifo_size;

sys/dev/usb/dwc2/dwc2_core.h

553

u16 host_nperio_tx_fifo_size;

sys/dev/usb/dwc2/dwc2_core.h

554

u16 host_perio_tx_fifo_size;

sys/dev/usb/dwc2/dwc2_hcd.c

1023

u16 fifo_space;

sys/dev/usb/dwc2/dwc2_hcd.c

1024

u16 frame_number;

sys/dev/usb/dwc2/dwc2_hcd.c

1025

u16 wire_frame;

sys/dev/usb/dwc2/dwc2_hcd.c

1252

u16 max_hc_pkt_count = hsotg->params.max_packet_count;

sys/dev/usb/dwc2/dwc2_hcd.c

1255

u16 num_packets = 0;

sys/dev/usb/dwc2/dwc2_hcd.c

2864

u16 fifo_dwords_avail)

sys/dev/usb/dwc2/dwc2_hcd.c

3348

int dwc2_port_suspend(struct dwc2_hsotg *hsotg, u16 windex)

sys/dev/usb/dwc2/dwc2_hcd.c

3459

int dwc2_hcd_hub_control(struct dwc2_hsotg *hsotg, u16 typereq,

sys/dev/usb/dwc2/dwc2_hcd.c

3460

u16 wvalue, u16 windex, char *buf, u16 wlength)

sys/dev/usb/dwc2/dwc2_hcd.c

3935

u16 maxp, u16 maxp_mult)

sys/dev/usb/dwc2/dwc2_hcd.c

4190

STATIC void dwc2_allocate_bus_bandwidth(struct dwc2_hsotg *hsotg, u16 bw,

sys/dev/usb/dwc2/dwc2_hcd.c

4195

STATIC void dwc2_free_bus_bandwidth(struct dwc2_hsotg *hsotg, u16 bw,

sys/dev/usb/dwc2/dwc2_hcd.c

423

void dwc2_read_packet(struct dwc2_hsotg *hsotg, u8 *dest, u16 bytes)

sys/dev/usb/dwc2/dwc2_hcd.c

5067

static int _dwc2_hcd_hub_control(struct usb_hcd *hcd, u16 typereq, u16 wvalue,

sys/dev/usb/dwc2/dwc2_hcd.c

5068

u16 windex, char *buf, u16 wlength)

sys/dev/usb/dwc2/dwc2_hcd.h

144

u16 start_pkt_count;

sys/dev/usb/dwc2/dwc2_hcd.h

162

u16 ntd;

sys/dev/usb/dwc2/dwc2_hcd.h

178

u16 maxp;

sys/dev/usb/dwc2/dwc2_hcd.h

179

u16 maxp_mult;

sys/dev/usb/dwc2/dwc2_hcd.h

206

u16 interval;

sys/dev/usb/dwc2/dwc2_hcd.h

260

u16 duration_us;

sys/dev/usb/dwc2/dwc2_hcd.h

350

u16 maxp;

sys/dev/usb/dwc2/dwc2_hcd.h

351

u16 maxp_mult;

sys/dev/usb/dwc2/dwc2_hcd.h

358

u16 host_us;

sys/dev/usb/dwc2/dwc2_hcd.h

359

u16 device_us;

sys/dev/usb/dwc2/dwc2_hcd.h

360

u16 host_interval;

sys/dev/usb/dwc2/dwc2_hcd.h

361

u16 device_interval;

sys/dev/usb/dwc2/dwc2_hcd.h

362

u16 next_active_frame;

sys/dev/usb/dwc2/dwc2_hcd.h

363

u16 start_active_frame;

sys/dev/usb/dwc2/dwc2_hcd.h

367

u16 ntd;

sys/dev/usb/dwc2/dwc2_hcd.h

446

u16 isoc_frame_index;

sys/dev/usb/dwc2/dwc2_hcd.h

447

u16 isoc_split_offset;

sys/dev/usb/dwc2/dwc2_hcd.h

448

u16 isoc_td_last;

sys/dev/usb/dwc2/dwc2_hcd.h

449

u16 isoc_td_first;

sys/dev/usb/dwc2/dwc2_hcd.h

453

u16 isoc_frame_index_last;

sys/dev/usb/dwc2/dwc2_hcd.h

454

u16 num_naks;

sys/dev/usb/dwc2/dwc2_hcd.h

520

static inline u16 dwc2_hcd_get_maxp(struct dwc2_hcd_pipe_info *pipe)

sys/dev/usb/dwc2/dwc2_hcd.h

525

static inline u16 dwc2_hcd_get_maxp_mult(struct dwc2_hcd_pipe_info *pipe)

sys/dev/usb/dwc2/dwc2_hcd.h

651

static inline bool dwc2_frame_idx_num_gt(u16 fr_idx1, u16 fr_idx2)

sys/dev/usb/dwc2/dwc2_hcd.h

653

u16 diff = fr_idx1 - fr_idx2;

sys/dev/usb/dwc2/dwc2_hcd.h

654

u16 sign = diff & (FRLISTEN_64_SIZE >> 1);

sys/dev/usb/dwc2/dwc2_hcd.h

664

static inline int dwc2_frame_num_le(u16 frame1, u16 frame2)

sys/dev/usb/dwc2/dwc2_hcd.h

674

static inline int dwc2_frame_num_gt(u16 frame1, u16 frame2)

sys/dev/usb/dwc2/dwc2_hcd.h

684

static inline u16 dwc2_frame_num_inc(u16 frame, u16 inc)

sys/dev/usb/dwc2/dwc2_hcd.h

689

static inline u16 dwc2_frame_num_dec(u16 frame, u16 dec)

sys/dev/usb/dwc2/dwc2_hcd.h

694

static inline u16 dwc2_full_frame_num(u16 frame)

sys/dev/usb/dwc2/dwc2_hcd.h

699

static inline u16 dwc2_micro_frame_num(u16 frame)

sys/dev/usb/dwc2/dwc2_hcd.h

762

static inline u16 dwc2_hcd_get_ep_bandwidth(struct dwc2_hsotg *hsotg,

sys/dev/usb/dwc2/dwc2_hcd.h

837

int dwc2_hcd_hub_control(struct dwc2_hsotg *, u16, u16, u16, char *, u16);

sys/dev/usb/dwc2/dwc2_hcd.h

839

u8, u8, u8, u8, u16, u16);

sys/dev/usb/dwc2/dwc2_hcd.h

844

void dwc2_allocate_bus_bandwidth(struct dwc2_hsotg *, u16, struct usbd_xfer *);

sys/dev/usb/dwc2/dwc2_hcdddma.c

1033

u16 cur_idx;

sys/dev/usb/dwc2/dwc2_hcdddma.c

1078

u16 remain = 0;

sys/dev/usb/dwc2/dwc2_hcdddma.c

246

u16 i, j, inc;

sys/dev/usb/dwc2/dwc2_hcdddma.c

425

STATIC u8 dwc2_frame_to_desc_idx(struct dwc2_qh *qh, u16 frame_idx)

sys/dev/usb/dwc2/dwc2_hcdddma.c

438

STATIC u16 dwc2_calc_starting_frame(struct dwc2_hsotg *hsotg,

sys/dev/usb/dwc2/dwc2_hcdddma.c

439

struct dwc2_qh *qh, u16 *skip_frames)

sys/dev/usb/dwc2/dwc2_hcdddma.c

441

u16 frame;

sys/dev/usb/dwc2/dwc2_hcdddma.c

500

STATIC u16 dwc2_recalc_initial_desc_idx(struct dwc2_hsotg *hsotg,

sys/dev/usb/dwc2/dwc2_hcdddma.c

503

u16 frame, fr_idx, fr_idx_tmp, skip_frames;

sys/dev/usb/dwc2/dwc2_hcdddma.c

554

u16 idx)

sys/dev/usb/dwc2/dwc2_hcdddma.c

590

struct dwc2_qh *qh, u16 skip_frames)

sys/dev/usb/dwc2/dwc2_hcdddma.c

594

u16 idx, inc, n_desc = 0, ntd_max = 0;

sys/dev/usb/dwc2/dwc2_hcdddma.c

595

u16 cur_idx;

sys/dev/usb/dwc2/dwc2_hcdddma.c

596

u16 next_idx;

sys/dev/usb/dwc2/dwc2_hcdddma.c

61

STATIC u16 dwc2_frame_list_idx(u16 frame)

sys/dev/usb/dwc2/dwc2_hcdddma.c

66

STATIC u16 dwc2_desclist_idx_inc(u16 idx, u16 inc, u8 speed)

sys/dev/usb/dwc2/dwc2_hcdddma.c

73

STATIC u16 dwc2_desclist_idx_dec(u16 idx, u16 inc, u8 speed)

sys/dev/usb/dwc2/dwc2_hcdddma.c

80

STATIC u16 dwc2_max_desc_num(struct dwc2_qh *qh)

sys/dev/usb/dwc2/dwc2_hcdddma.c

854

u16 skip_frames = 0;

sys/dev/usb/dwc2/dwc2_hcdddma.c

87

STATIC u16 dwc2_frame_incr_val(struct dwc2_qh *qh)

sys/dev/usb/dwc2/dwc2_hcdddma.c

898

struct dwc2_qh *qh, u16 idx)

sys/dev/usb/dwc2/dwc2_hcdddma.c

902

u16 remain = 0;

sys/dev/usb/dwc2/dwc2_hcdddma.c

971

u16 idx;

sys/dev/usb/dwc2/dwc2_hcdintr.c

70

u16 curr_frame_number = hsotg->frame_number;

sys/dev/usb/dwc2/dwc2_hcdintr.c

71

u16 expected = dwc2_frame_num_inc(hsotg->last_frame_num, 1);

sys/dev/usb/dwc2/dwc2_hcdqueue.c

1097

u16 frame_number;

sys/dev/usb/dwc2/dwc2_hcdqueue.c

1098

u16 earliest_frame;

sys/dev/usb/dwc2/dwc2_hcdqueue.c

1099

u16 next_active_frame;

sys/dev/usb/dwc2/dwc2_hcdqueue.c

1100

u16 relative_frame;

sys/dev/usb/dwc2/dwc2_hcdqueue.c

1101

u16 interval;

sys/dev/usb/dwc2/dwc2_hcdqueue.c

1832

struct dwc2_qh *qh, u16 frame_number)

sys/dev/usb/dwc2/dwc2_hcdqueue.c

1834

u16 old_frame = qh->next_active_frame;

sys/dev/usb/dwc2/dwc2_hcdqueue.c

1835

u16 prev_frame_number = dwc2_frame_num_dec(frame_number, 1);

sys/dev/usb/dwc2/dwc2_hcdqueue.c

1837

u16 incr;

sys/dev/usb/dwc2/dwc2_hcdqueue.c

1895

struct dwc2_qh *qh, u16 frame_number)

sys/dev/usb/dwc2/dwc2_hcdqueue.c

1898

u16 interval = qh->host_interval;

sys/dev/usb/dwc2/dwc2_hcdqueue.c

1899

u16 prev_frame_number = dwc2_frame_num_dec(frame_number, 1);

sys/dev/usb/dwc2/dwc2_hcdqueue.c

1943

u16 ideal_start = qh->start_active_frame;

sys/dev/usb/dwc2/dwc2_hcdqueue.c

1989

u16 old_frame = qh->next_active_frame;

sys/dev/usb/dwc2/dwc2_hcdqueue.c

1991

u16 frame_number;

usr.sbin/bgpctl/bgpctl.c

1051

uint16_t as2, u16;

usr.sbin/bgpctl/bgpctl.c

1068

u16 = ext;

usr.sbin/bgpctl/bgpctl.c

1070

log_ext_subtype(type, subtype), inet_ntoa(ip), u16);

usr.sbin/bgpctl/bgpctl.c

1075

u16 = ext;

usr.sbin/bgpctl/bgpctl.c

1077

log_ext_subtype(type, subtype), log_as(as4), u16);

usr.sbin/bgpctl/parser.c

1510

uint16_t u16;

usr.sbin/bgpctl/parser.c

1526

u16 = htons(val);

usr.sbin/bgpctl/parser.c

1527

data = &u16;

usr.sbin/bgpd/parse.y

5853

uint16_t u16;

usr.sbin/bgpd/parse.y

5866

u16 = htons(val);

usr.sbin/bgpd/parse.y

5867

data = &u16;

usr.sbin/bgpd/util.c

181

uint16_t u16;

usr.sbin/bgpd/util.c

187

u16 = (rd >> 32) & 0xffff;

usr.sbin/bgpd/util.c

188

snprintf(buf, sizeof(buf), "rd %hu:%u", u16, u32);

usr.sbin/bgpd/util.c

192

u16 = rd & 0xffff;

usr.sbin/bgpd/util.c

193

snprintf(buf, sizeof(buf), "rd %s:%hu", log_as(u32), u16);

usr.sbin/bgpd/util.c

197

u16 = rd & 0xffff;

usr.sbin/bgpd/util.c

199

snprintf(buf, sizeof(buf), "rd %s:%hu", inet_ntoa(addr), u16);

usr.sbin/lldp/lldp.c

968

uint16_t u16;

usr.sbin/lldp/lldp.c

970

if (len < sizeof(u16)) {

usr.sbin/lldp/lldp.c

975

u16 = pdu_u16(bytes);

usr.sbin/lldp/lldp.c

976

fprintf(scratch, "%u", u16);

usr.sbin/lldpd/pdu.c

27

uint16_t u16;

usr.sbin/lldpd/pdu.c

29

u16 = (uint16_t)buf[0] << 8;

usr.sbin/lldpd/pdu.c

30

u16 |= (uint16_t)buf[1];

usr.sbin/lldpd/pdu.c

32

return (u16);

usr.sbin/smtpd/unpack_dns.c

244

unpack_u16(struct unpack *p, uint16_t *u16)

usr.sbin/smtpd/unpack_dns.c

246

if (unpack_data(p, u16, 2) == -1)

usr.sbin/smtpd/unpack_dns.c

249

*u16 = ntohs(*u16);