bin/dd/args.c

144

cfunc = ddflags & C_BLOCK ? block : unblock;

bin/dd/args.c

152

cfunc = block;

bin/dd/dd.c

337

else if (cfunc == block)

bin/dd/extern.h

39

void block(void);

bin/ksh/c_ksh.c

560

struct block *l;

bin/ksh/c_sh.c

34

struct block *l = genv->loc;

bin/ksh/c_sh.c

615

struct block *l = genv->loc;

bin/ksh/edit.c

502

struct block *l;

bin/ksh/exec.c

743

struct block *l;

bin/ksh/main.c

149

struct block *l;

bin/ksh/sh.h

77

struct block *loc; /* local variables and functions */

bin/ksh/syn.c

103

t = block(c == LOGAND? TAND: TOR, t, p, NULL);

bin/ksh/syn.c

130

p = block(c == '&' ? TASYNC : TCOPROC,

bin/ksh/syn.c

137

t = tl = block(TLIST, t, p, NULL);

bin/ksh/syn.c

139

tl = tl->right = block(TLIST, tl->right, p, NULL);

bin/ksh/syn.c

188

return (block(type, t, NULL, NULL));

bin/ksh/syn.c

32

static struct op *block(int, struct op *, struct op *, char **);

bin/ksh/syn.c

363

t = block(TBANG, NULL, t, NULL);

bin/ksh/syn.c

378

t = block(TTIME, t, NULL, NULL);

bin/ksh/syn.c

83

t = tl = block(TPIPE, t, p, NULL);

bin/ksh/syn.c

85

tl = tl->right = block(TPIPE, tl->right, p, NULL);

bin/ksh/table.h

125

struct block *next; /* enclosing block */

bin/ksh/var.c

171

struct block *l = genv->loc;

bin/ksh/var.c

254

struct block *l = genv->loc;

bin/ksh/var.c

272

struct block *ll = l;

bin/ksh/var.c

48

struct block *l;

bin/ksh/var.c

51

l = alloc(sizeof(struct block), ATEMP);

bin/ksh/var.c

74

struct block *l = genv->loc;

bin/ksh/var.c

848

struct block *l;

bin/ksh/var.c

858

struct block *l2;

lib/libc/hash/md5.c

161

MD5Transform(u_int32_t state[4], const u_int8_t block[MD5_BLOCK_LENGTH])

lib/libc/hash/md5.c

166

memcpy(in, block, sizeof(in));

lib/libc/hash/md5.c

170

(u_int32_t)(block[a * 4 + 0]) |

lib/libc/hash/md5.c

171

(u_int32_t)(block[a * 4 + 1]) << 8 |

lib/libc/hash/md5.c

172

(u_int32_t)(block[a * 4 + 2]) << 16 |

lib/libc/hash/md5.c

173

(u_int32_t)(block[a * 4 + 3]) << 24);

lib/libc/hash/rmd160.c

168

RMD160Transform(u_int32_t state[5], const u_int8_t block[RMD160_BLOCK_LENGTH])

lib/libc/hash/rmd160.c

173

memcpy(x, block, RMD160_BLOCK_LENGTH);

lib/libc/hash/rmd160.c

179

(u_int32_t)(block[i*4 + 0]) |

lib/libc/hash/rmd160.c

180

(u_int32_t)(block[i*4 + 1]) << 8 |

lib/libc/hash/rmd160.c

181

(u_int32_t)(block[i*4 + 2]) << 16 |

lib/libc/hash/rmd160.c

182

(u_int32_t)(block[i*4 + 3]) << 24);

lib/libc/hash/sha1.c

28

# define blk0(i) (block->l[i] = (rol(block->l[i],24)&0xFF00FF00) \

lib/libc/hash/sha1.c

29

|(rol(block->l[i],8)&0x00FF00FF))

lib/libc/hash/sha1.c

31

# define blk0(i) block->l[i]

lib/libc/hash/sha1.c

33

#define blk(i) (block->l[i&15] = rol(block->l[(i+13)&15]^block->l[(i+8)&15] \

lib/libc/hash/sha1.c

34

^block->l[(i+2)&15]^block->l[i&15],1))

lib/libc/hash/sha1.c

58

CHAR64LONG16 *block = (CHAR64LONG16 *)workspace;

lib/libc/hash/sha1.c

60

(void)memcpy(block, buffer, SHA1_BLOCK_LENGTH);

lib/libcbor/src/cbor/common.h

63

#define _CBOR_TEST_DISABLE_ASSERT(block) \

lib/libcbor/src/cbor/common.h

66

block _cbor_enable_assert = true; \

lib/libcbor/src/cbor/common.h

73

#define _CBOR_TEST_DISABLE_ASSERT(block) \

lib/libcbor/src/cbor/common.h

75

block \

lib/libcrypto/mlkem/mlkem_internal.c

454

uint8_t block[168];

lib/libcrypto/mlkem/mlkem_internal.c

456

shake_out(keccak_ctx, block, sizeof(block));

lib/libcrypto/mlkem/mlkem_internal.c

457

for (i = 0; i < sizeof(block) && done < DEGREE; i += 3) {

lib/libcrypto/mlkem/mlkem_internal.c

458

uint16_t d1 = block[i] + 256 * (block[i + 1] % 16);

lib/libcrypto/mlkem/mlkem_internal.c

459

uint16_t d2 = block[i + 1] / 16 + 16 * block[i + 2];

lib/libcrypto/modes/cbc128.c

101

(*block)(out, out, key);

lib/libcrypto/modes/cbc128.c

116

unsigned char ivec[16], block128_f block)

lib/libcrypto/modes/cbc128.c

131

(*block)(in, out, key);

lib/libcrypto/modes/cbc128.c

144

(*block)(in, out, key);

lib/libcrypto/modes/cbc128.c

160

(*block)(in, tmp.c, key);

lib/libcrypto/modes/cbc128.c

176

(*block)(in, tmp.c, key);

lib/libcrypto/modes/cbc128.c

190

(*block)(in, tmp.c, key);

lib/libcrypto/modes/cbc128.c

68

unsigned char ivec[16], block128_f block)

lib/libcrypto/modes/cbc128.c

78

(*block)(out, out, key);

lib/libcrypto/modes/cbc128.c

89

(*block)(out, out, key);

lib/libcrypto/modes/ccm128.c

109

block128_f block = ctx->block;

lib/libcrypto/modes/ccm128.c

115

(*block)(ctx->nonce.c, ctx->cmac.c, ctx->key),

lib/libcrypto/modes/ccm128.c

148

(*block)(ctx->cmac.c, ctx->cmac.c, ctx->key),

lib/libcrypto/modes/ccm128.c

184

block128_f block = ctx->block;

lib/libcrypto/modes/ccm128.c

192

(*block)(ctx->nonce.c, ctx->cmac.c, key),

lib/libcrypto/modes/ccm128.c

225

(*block)(ctx->cmac.c, ctx->cmac.c, key);

lib/libcrypto/modes/ccm128.c

226

(*block)(ctx->nonce.c, scratch.c, key);

lib/libcrypto/modes/ccm128.c

244

(*block)(ctx->cmac.c, ctx->cmac.c, key);

lib/libcrypto/modes/ccm128.c

245

(*block)(ctx->nonce.c, scratch.c, key);

lib/libcrypto/modes/ccm128.c

253

(*block)(ctx->nonce.c, scratch.c, key);

lib/libcrypto/modes/ccm128.c

271

block128_f block = ctx->block;

lib/libcrypto/modes/ccm128.c

279

(*block)(ctx->nonce.c, ctx->cmac.c, key);

lib/libcrypto/modes/ccm128.c

300

(*block)(ctx->nonce.c, scratch.c, key);

lib/libcrypto/modes/ccm128.c

313

(*block)(ctx->cmac.c, ctx->cmac.c, key);

lib/libcrypto/modes/ccm128.c

321

(*block)(ctx->nonce.c, scratch.c, key);

lib/libcrypto/modes/ccm128.c

324

(*block)(ctx->cmac.c, ctx->cmac.c, key);

lib/libcrypto/modes/ccm128.c

330

(*block)(ctx->nonce.c, scratch.c, key);

lib/libcrypto/modes/ccm128.c

363

block128_f block = ctx->block;

lib/libcrypto/modes/ccm128.c

371

(*block)(ctx->nonce.c, ctx->cmac.c, key),

lib/libcrypto/modes/ccm128.c

403

(*block)(ctx->cmac.c, ctx->cmac.c, key);

lib/libcrypto/modes/ccm128.c

404

(*block)(ctx->nonce.c, scratch.c, key);

lib/libcrypto/modes/ccm128.c

412

(*block)(ctx->nonce.c, scratch.c, key);

lib/libcrypto/modes/ccm128.c

430

block128_f block = ctx->block;

lib/libcrypto/modes/ccm128.c

438

(*block)(ctx->nonce.c, ctx->cmac.c, key);

lib/libcrypto/modes/ccm128.c

463

(*block)(ctx->nonce.c, scratch.c, key);

lib/libcrypto/modes/ccm128.c

466

(*block)(ctx->cmac.c, ctx->cmac.c, key);

lib/libcrypto/modes/ccm128.c

472

(*block)(ctx->nonce.c, scratch.c, key);

lib/libcrypto/modes/ccm128.c

61

unsigned int M, unsigned int L, void *key, block128_f block)

lib/libcrypto/modes/ccm128.c

66

ctx->block = block;

lib/libcrypto/modes/cfb128.c

111

(*block)(ivec, ivec, key);

lib/libcrypto/modes/cfb128.c

134

(*block)(ivec, ivec, key);

lib/libcrypto/modes/cfb128.c

147

(*block)(ivec, ivec, key);

lib/libcrypto/modes/cfb128.c

162

(*block)(ivec, ivec, key);

lib/libcrypto/modes/cfb128.c

180

block128_f block)

lib/libcrypto/modes/cfb128.c

191

(*block)(ivec, ivec, key);

lib/libcrypto/modes/cfb128.c

217

int enc, block128_f block)

lib/libcrypto/modes/cfb128.c

225

cfbr_encrypt_block(c, d, 1, key, ivec, enc, block);

lib/libcrypto/modes/cfb128.c

236

int enc, block128_f block)

lib/libcrypto/modes/cfb128.c

241

cfbr_encrypt_block(&in[n], &out[n], 8, key, ivec, enc, block);

lib/libcrypto/modes/cfb128.c

66

int enc, block128_f block)

lib/libcrypto/modes/cfb128.c

87

(*block)(ivec, ivec, key);

lib/libcrypto/modes/cfb128.c

99

(*block)(ivec, ivec, key);

lib/libcrypto/modes/ctr128.c

116

unsigned int *num, block128_f block)

lib/libcrypto/modes/ctr128.c

137

(*block)(ivec, ecount_buf, key);

lib/libcrypto/modes/ctr128.c

149

(*block)(ivec, ecount_buf, key);

lib/libcrypto/modes/ctr128.c

162

(*block)(ivec, ecount_buf, key);

lib/libcrypto/modes/gcm128.c

220

CRYPTO_gcm128_init(GCM128_CONTEXT *ctx, void *key, block128_f block)

lib/libcrypto/modes/gcm128.c

223

ctx->block = block;

lib/libcrypto/modes/gcm128.c

226

(*block)(ctx->H.c, ctx->H.c, key);

lib/libcrypto/modes/gcm128.c

237

CRYPTO_gcm128_new(void *key, block128_f block)

lib/libcrypto/modes/gcm128.c

244

CRYPTO_gcm128_init(ctx, key, block);

lib/libcrypto/modes/gcm128.c

299

(*ctx->block)(ctx->Yi.c, ctx->EK0.c, ctx->key);

lib/libcrypto/modes/gcm128.c

373

ctx->block(ctx->Yi.c, ctx->EKi.c, ctx->key);

lib/libcrypto/modes/gcm128.c

414

ctx->block(ctx->Yi.c, ctx->EKi.c, ctx->key);

lib/libcrypto/modes/gcm128.c

475

ctx->block(ctx->Yi.c, ctx->EKi.c, ctx->key);

lib/libcrypto/modes/gcm128.c

536

ctx->block(ctx->Yi.c, ctx->EKi.c, ctx->key);

lib/libcrypto/modes/modes.h

33

unsigned char ivec[16], block128_f block);

lib/libcrypto/modes/modes.h

36

unsigned char ivec[16], block128_f block);

lib/libcrypto/modes/modes.h

41

unsigned int *num, block128_f block);

lib/libcrypto/modes/modes.h

51

block128_f block);

lib/libcrypto/modes/modes.h

56

int enc, block128_f block);

lib/libcrypto/modes/modes.h

60

int enc, block128_f block);

lib/libcrypto/modes/modes.h

64

int enc, block128_f block);

lib/libcrypto/modes/modes.h

68

GCM128_CONTEXT *CRYPTO_gcm128_new(void *key, block128_f block);

lib/libcrypto/modes/modes.h

69

void CRYPTO_gcm128_init(GCM128_CONTEXT *ctx, void *key, block128_f block);

lib/libcrypto/modes/modes.h

94

unsigned int M, unsigned int L, void *key, block128_f block);

lib/libcrypto/modes/modes_local.h

47

block128_f block;

lib/libcrypto/modes/modes_local.h

62

block128_f block;

lib/libcrypto/modes/ofb128.c

109

(*block)(ivec, ivec, key);

lib/libcrypto/modes/ofb128.c

66

block128_f block)

lib/libcrypto/modes/ofb128.c

86

(*block)(ivec, ivec, key);

lib/libcrypto/modes/ofb128.c

97

(*block)(ivec, ivec, key);

lib/libexpat/lib/xmlparse.c

349

struct block *next;

lib/libkvm/kvm_arm.c

118

int block;

lib/libkvm/kvm_arm.c

120

for (block = 0; block < NPHYS_RAM_SEGS; block++, mp++) {

lib/libkvm/kvm_arm64.c

118

int block;

lib/libkvm/kvm_arm64.c

120

for (block = 0; block < NPHYS_RAM_SEGS; block++, mp++) {

lib/libkvm/kvm_riscv64.c

118

int block;

lib/libkvm/kvm_riscv64.c

120

for (block = 0; block < NPHYS_RAM_SEGS; block++, mp++) {

lib/libpcap/gencode.c

1005

static struct block *

lib/libpcap/gencode.c

1009

struct block *b0, *b1;

lib/libpcap/gencode.c

1056

static struct block *

lib/libpcap/gencode.c

1059

struct block *b0, *b1;

lib/libpcap/gencode.c

1090

static struct block *

lib/libpcap/gencode.c

1093

struct block *b0, *b1;

lib/libpcap/gencode.c

1147

static struct block *

lib/libpcap/gencode.c

1150

struct block *b0, *b1, *b2, *tmp;

lib/libpcap/gencode.c

1215

static struct block *

lib/libpcap/gencode.c

1218

struct block *b0, *b1;

lib/libpcap/gencode.c

123

static __inline struct block *new_block(int);

lib/libpcap/gencode.c

125

static struct block *gen_retblk(int);

lib/libpcap/gencode.c

128

static void backpatch(struct block *, struct block *);

lib/libpcap/gencode.c

129

static void merge(struct block *, struct block *);

lib/libpcap/gencode.c

130

static struct block *gen_cmp(u_int, u_int, bpf_int32);

lib/libpcap/gencode.c

1303

static struct block *

lib/libpcap/gencode.c

131

static struct block *gen_cmp_gt(u_int, u_int, bpf_int32);

lib/libpcap/gencode.c

132

static struct block *gen_cmp_nl(u_int, u_int, bpf_int32);

lib/libpcap/gencode.c

133

static struct block *gen_mcmp(u_int, u_int, bpf_int32, bpf_u_int32);

lib/libpcap/gencode.c

134

static struct block *gen_mcmp_nl(u_int, u_int, bpf_int32, bpf_u_int32);

lib/libpcap/gencode.c

135

static struct block *gen_bcmp(u_int, u_int, const u_char *);

lib/libpcap/gencode.c

136

static struct block *gen_uncond(int);

lib/libpcap/gencode.c

137

static __inline struct block *gen_true(void);

lib/libpcap/gencode.c

138

static __inline struct block *gen_false(void);

lib/libpcap/gencode.c

1380

static struct block *

lib/libpcap/gencode.c

1383

struct block *b0, *b1, *tmp;

lib/libpcap/gencode.c

139

static struct block *gen_linktype(int);

lib/libpcap/gencode.c

140

static struct block *gen_hostop(bpf_u_int32, bpf_u_int32, int, int, u_int, u_int);

lib/libpcap/gencode.c

1416

struct block *

lib/libpcap/gencode.c

1419

struct block *b0 = NULL, *b1;

lib/libpcap/gencode.c

142

static struct block *gen_hostop6(struct in6_addr *, struct in6_addr *, int, int, u_int, u_int);

lib/libpcap/gencode.c

144

static struct block *gen_ehostop(const u_char *, int);

lib/libpcap/gencode.c

145

static struct block *gen_fhostop(const u_char *, int);

lib/libpcap/gencode.c

146

static struct block *gen_dnhostop(bpf_u_int32, int, u_int);

lib/libpcap/gencode.c

147

static struct block *gen_p80211_hostop(const u_char *, int);

lib/libpcap/gencode.c

148

static struct block *gen_p80211_addr(int, u_int, const u_char *);

lib/libpcap/gencode.c

149

static struct block *gen_host(bpf_u_int32, bpf_u_int32, int, int);

lib/libpcap/gencode.c

151

static struct block *gen_host6(struct in6_addr *, struct in6_addr *, int, int);

lib/libpcap/gencode.c

154

static struct block *gen_gateway(const u_char *, bpf_u_int32 **, int, int);

lib/libpcap/gencode.c

1554

static struct block *

lib/libpcap/gencode.c

1558

struct block *b;

lib/libpcap/gencode.c

156

static struct block *gen_ipfrag(void);

lib/libpcap/gencode.c

157

static struct block *gen_portatom(int, bpf_int32);

lib/libpcap/gencode.c

159

static struct block *gen_portatom6(int, bpf_int32);

lib/libpcap/gencode.c

161

struct block *gen_portop(int, int, int);

lib/libpcap/gencode.c

162

static struct block *gen_port(int, int, int);

lib/libpcap/gencode.c

1630

static struct block *

lib/libpcap/gencode.c

1634

struct block *b;

lib/libpcap/gencode.c

164

struct block *gen_portop6(int, int, int);

lib/libpcap/gencode.c

165

static struct block *gen_port6(int, int, int);

lib/libpcap/gencode.c

1650

static struct block *

lib/libpcap/gencode.c

1657

struct block *

lib/libpcap/gencode.c

1660

struct block *b0, *b1, *tmp;

lib/libpcap/gencode.c

168

static struct block *gen_protochain(int, int, int);

lib/libpcap/gencode.c

169

static struct block *gen_proto(int, int, int);

lib/libpcap/gencode.c

1697

static struct block *

lib/libpcap/gencode.c

1700

struct block *b0, *b1, *tmp;

lib/libpcap/gencode.c

172

static struct block *gen_len(int, int);

lib/libpcap/gencode.c

1725

struct block *

lib/libpcap/gencode.c

1728

struct block *b0, *b1, *tmp;

lib/libpcap/gencode.c

1763

static struct block *

lib/libpcap/gencode.c

1766

struct block *b0, *b1, *tmp;

lib/libpcap/gencode.c

1822

static struct block *

lib/libpcap/gencode.c

1825

struct block *b0, *b;

lib/libpcap/gencode.c

2116

static struct block *

lib/libpcap/gencode.c

2119

struct block *b0, *b1;

lib/libpcap/gencode.c

2235

struct block *

lib/libpcap/gencode.c

2252

struct block *b, *tmp;

lib/libpcap/gencode.c

231

static __inline struct block *

lib/libpcap/gencode.c

234

struct block *p;

lib/libpcap/gencode.c

236

p = (struct block *)newchunk(sizeof(*p));

lib/libpcap/gencode.c

2395

struct block *b;

lib/libpcap/gencode.c

2439

struct block *

lib/libpcap/gencode.c

2477

struct block *

lib/libpcap/gencode.c

2531

struct block *b;

lib/libpcap/gencode.c

254

static struct block *

lib/libpcap/gencode.c

2560

struct block *

lib/libpcap/gencode.c

2566

struct block *b;

lib/libpcap/gencode.c

257

struct block *b = new_block(BPF_RET|BPF_K);

lib/libpcap/gencode.c

2615

struct block *

lib/libpcap/gencode.c

2667

struct block *b;

lib/libpcap/gencode.c

2767

struct block *

lib/libpcap/gencode.c

2771

struct block *b, *tmp;

lib/libpcap/gencode.c

2940

static struct block *

lib/libpcap/gencode.c

2944

struct block *b;

lib/libpcap/gencode.c

2954

struct block *

lib/libpcap/gencode.c

2960

struct block *

lib/libpcap/gencode.c

2963

struct block *b;

lib/libpcap/gencode.c

2971

struct block *

lib/libpcap/gencode.c

2974

struct block *b;

lib/libpcap/gencode.c

3011

struct block *

lib/libpcap/gencode.c

3015

struct block *b0, *b1, *b2;

lib/libpcap/gencode.c

3052

struct block *

lib/libpcap/gencode.c

3055

struct block *b0, *b1;

lib/libpcap/gencode.c

3108

struct block *

lib/libpcap/gencode.c

3111

struct block *b0;

lib/libpcap/gencode.c

3142

struct block *

lib/libpcap/gencode.c

3145

struct block *b0;

lib/libpcap/gencode.c

3166

struct block *

lib/libpcap/gencode.c

3169

struct block *b0;

lib/libpcap/gencode.c

3187

struct block *

lib/libpcap/gencode.c

3190

struct block *b0;

lib/libpcap/gencode.c

3205

struct block *

lib/libpcap/gencode.c

3208

struct block *b0;

lib/libpcap/gencode.c

3221

struct block *

lib/libpcap/gencode.c

3224

struct block *b0;

lib/libpcap/gencode.c

3238

struct block *

lib/libpcap/gencode.c

3241

struct block *b0;

lib/libpcap/gencode.c

3255

struct block *

lib/libpcap/gencode.c

3258

struct block *b0;

lib/libpcap/gencode.c

3276

static struct block *

lib/libpcap/gencode.c

3279

struct block *b0, *b1;

lib/libpcap/gencode.c

3306

struct block *

lib/libpcap/gencode.c

3317

struct block *

lib/libpcap/gencode.c

3320

struct block *b0;

lib/libpcap/gencode.c

3331

struct block *b1;

lib/libpcap/gencode.c

3347

struct block *

lib/libpcap/gencode.c

3350

struct block *b0;

lib/libpcap/gencode.c

3391

struct block *b1;

lib/libpcap/gencode.c

3401

struct block *

lib/libpcap/gencode.c

3404

struct block *b0;

lib/libpcap/gencode.c

3422

struct block *

lib/libpcap/gencode.c

3425

struct block *b0;

lib/libpcap/gencode.c

3444

static struct block *

lib/libpcap/gencode.c

3447

struct block *b0, *b1, *b2, *b3, *b4;

lib/libpcap/gencode.c

3544

static struct block *

lib/libpcap/gencode.c

3547

struct block *b0, *b1;

lib/libpcap/gencode.c

384

backpatch(struct block *list, struct block *target)

lib/libpcap/gencode.c

386

struct block *next;

lib/libpcap/gencode.c

405

merge(struct block *b0, struct block *b1)

lib/libpcap/gencode.c

407

struct block **p = &b0;

lib/libpcap/gencode.c

418

finish_parse(struct block *p)

lib/libpcap/gencode.c

443

gen_and(struct block *b0, struct block *b1)

lib/libpcap/gencode.c

454

gen_or(struct block *b0, struct block *b1)

lib/libpcap/gencode.c

464

gen_not(struct block *b)

lib/libpcap/gencode.c

469

static struct block *

lib/libpcap/gencode.c

473

struct block *b;

lib/libpcap/gencode.c

485

static struct block *

lib/libpcap/gencode.c

489

struct block *b;

lib/libpcap/gencode.c

501

static struct block *

lib/libpcap/gencode.c

504

struct block *b = gen_cmp(offset, size, v);

lib/libpcap/gencode.c

516

static struct block *

lib/libpcap/gencode.c

519

struct block *b = gen_cmp_nl(offset, size, v);

lib/libpcap/gencode.c

530

static struct block *

lib/libpcap/gencode.c

533

struct block *b, *tmp;

lib/libpcap/gencode.c

624

static struct block *

lib/libpcap/gencode.c

628

struct block *b;

lib/libpcap/gencode.c

784

static struct block *

lib/libpcap/gencode.c

787

struct block *b;

lib/libpcap/gencode.c

798

static __inline struct block *

lib/libpcap/gencode.c

804

static __inline struct block *

lib/libpcap/gencode.c

810

static struct block *

lib/libpcap/gencode.c

813

struct block *b0, *b1;

lib/libpcap/gencode.c

964

static struct block *

lib/libpcap/gencode.c

968

struct block *b0, *b1;

lib/libpcap/gencode.c

98

static struct block *root;

lib/libpcap/gencode.h

113

struct block *succ;

lib/libpcap/gencode.h

114

struct block *pred;

lib/libpcap/gencode.h

130

struct block *head;

lib/libpcap/gencode.h

131

struct block *link; /* link field used by optimizer */

lib/libpcap/gencode.h

143

struct block *b; /* protocol checks */

lib/libpcap/gencode.h

162

void gen_and(struct block *, struct block *);

lib/libpcap/gencode.h

163

void gen_or(struct block *, struct block *);

lib/libpcap/gencode.h

164

void gen_not(struct block *);

lib/libpcap/gencode.h

166

struct block *gen_scode(const char *, struct qual);

lib/libpcap/gencode.h

167

struct block *gen_ecode(const u_char *, struct qual);

lib/libpcap/gencode.h

168

struct block *gen_mcode(const char *, const char *, int, struct qual);

lib/libpcap/gencode.h

170

struct block *gen_mcode6(const char *, const char *, int, struct qual);

lib/libpcap/gencode.h

172

struct block *gen_ncode(const char *, bpf_u_int32, struct qual);

lib/libpcap/gencode.h

173

struct block *gen_proto_abbrev(int);

lib/libpcap/gencode.h

174

struct block *gen_relation(int, struct arth *, struct arth *, int);

lib/libpcap/gencode.h

175

struct block *gen_less(int);

lib/libpcap/gencode.h

176

struct block *gen_greater(int);

lib/libpcap/gencode.h

177

struct block *gen_byteop(int, int, int);

lib/libpcap/gencode.h

178

struct block *gen_broadcast(int);

lib/libpcap/gencode.h

179

struct block *gen_multicast(int);

lib/libpcap/gencode.h

180

struct block *gen_inbound(int);

lib/libpcap/gencode.h

181

struct block *gen_sample(int);

lib/libpcap/gencode.h

183

struct block *gen_vlan(int);

lib/libpcap/gencode.h

184

struct block *gen_mpls(int);

lib/libpcap/gencode.h

186

struct block *gen_pf_ifname(char *);

lib/libpcap/gencode.h

187

struct block *gen_pf_rnr(int);

lib/libpcap/gencode.h

188

struct block *gen_pf_srnr(int);

lib/libpcap/gencode.h

189

struct block *gen_pf_ruleset(char *);

lib/libpcap/gencode.h

190

struct block *gen_pf_reason(int);

lib/libpcap/gencode.h

191

struct block *gen_pf_action(int);

lib/libpcap/gencode.h

193

struct block *gen_p80211_type(int, int);

lib/libpcap/gencode.h

194

struct block *gen_p80211_fcdir(int);

lib/libpcap/gencode.h

196

void bpf_optimize(struct block **);

lib/libpcap/gencode.h

200

void finish_parse(struct block *);

lib/libpcap/gencode.h

203

struct bpf_insn *icode_to_fcode(struct block *, int *);

lib/libpcap/grammar.y

88

struct block *b;

lib/libpcap/grammar.y

90

struct block *rblk;

lib/libpcap/optimize.c

100

static int use_conflict(struct block *, struct block *);

lib/libpcap/optimize.c

102

static void or_pullup(struct block *);

lib/libpcap/optimize.c

103

static void and_pullup(struct block *);

lib/libpcap/optimize.c

104

static void opt_blks(struct block *, int);

lib/libpcap/optimize.c

105

static __inline void link_inedge(struct edge *, struct block *);

lib/libpcap/optimize.c

1051

opt_deadstores(struct block *b)

lib/libpcap/optimize.c

106

static void find_inedges(struct block *);

lib/libpcap/optimize.c

107

static void opt_root(struct block **);

lib/libpcap/optimize.c

1071

opt_blk(struct block *b, int do_stmts)

lib/libpcap/optimize.c

108

static void opt_loop(struct block *, int);

lib/libpcap/optimize.c

111

static void opt_not(struct block *);

lib/libpcap/optimize.c

112

static void opt_peep(struct block *);

lib/libpcap/optimize.c

1142

use_conflict(struct block *b, struct block *succ)

lib/libpcap/optimize.c

115

static void opt_deadstores(struct block *);

lib/libpcap/optimize.c

1157

static struct block *

lib/libpcap/optimize.c

1158

fold_edge(struct block *child, struct edge *ep)

lib/libpcap/optimize.c

116

static void opt_blk(struct block *, int);

lib/libpcap/optimize.c

117

static int use_conflict(struct block *, struct block *);

lib/libpcap/optimize.c

119

static struct block *fold_edge(struct block *, struct edge *);

lib/libpcap/optimize.c

120

static __inline int eq_blk(struct block *, struct block *);

lib/libpcap/optimize.c

1205

struct block *target;

lib/libpcap/optimize.c

122

static int count_blocks(struct block *);

lib/libpcap/optimize.c

123

static void number_blks_r(struct block *);

lib/libpcap/optimize.c

124

static int count_stmts(struct block *);

lib/libpcap/optimize.c

125

static int convert_code_r(struct block *);

lib/libpcap/optimize.c

1257

or_pullup(struct block *b)

lib/libpcap/optimize.c

1260

struct block *pull;

lib/libpcap/optimize.c

1261

struct block **diffp, **samep;

lib/libpcap/optimize.c

127

static void opt_dump(struct block *);

lib/libpcap/optimize.c

131

struct block **blocks;

lib/libpcap/optimize.c

1349

and_pullup(struct block *b)

lib/libpcap/optimize.c

1352

struct block *pull;

lib/libpcap/optimize.c

1353

struct block **diffp, **samep;

lib/libpcap/optimize.c

141

struct block **levels;

lib/libpcap/optimize.c

1440

opt_blks(struct block *root, int do_stmts)

lib/libpcap/optimize.c

1443

struct block *p;

lib/libpcap/optimize.c

1473

link_inedge(struct edge *parent, struct block *child)

lib/libpcap/optimize.c

1480

find_inedges(struct block *root)

lib/libpcap/optimize.c

1483

struct block *b;

lib/libpcap/optimize.c

1501

opt_root(struct block **b)

lib/libpcap/optimize.c

1525

opt_loop(struct block *root, int do_stmts)

lib/libpcap/optimize.c

1552

bpf_optimize(struct block **rootp)

lib/libpcap/optimize.c

1554

struct block *root;

lib/libpcap/optimize.c

1567

make_marks(struct block *p)

lib/libpcap/optimize.c

1583

mark_code(struct block *p)

lib/libpcap/optimize.c

1613

eq_blk(struct block *b0, struct block *b1)

lib/libpcap/optimize.c

1624

intern_blocks(struct block *root)

lib/libpcap/optimize.c

1626

struct block *p;

lib/libpcap/optimize.c

1697

count_blocks(struct block *p)

lib/libpcap/optimize.c

1710

number_blks_r(struct block *p)

lib/libpcap/optimize.c

1731

count_stmts(struct block *p)

lib/libpcap/optimize.c

1748

opt_init(struct block *root)

lib/libpcap/optimize.c

1829

struct block *b = blocks[i];

lib/libpcap/optimize.c

1876

convert_code_r(struct block *p)

lib/libpcap/optimize.c

202

find_levels_r(struct block *b)

lib/libpcap/optimize.c

2034

icode_to_fcode(struct block *root, int *lenp)

lib/libpcap/optimize.c

2065

opt_dump(struct block *root)

lib/libpcap/optimize.c

230

find_levels(struct block *root)

lib/libpcap/optimize.c

242

find_dom(struct block *root)

lib/libpcap/optimize.c

245

struct block *b;

lib/libpcap/optimize.c

286

find_edom(struct block *root)

lib/libpcap/optimize.c

290

struct block *b;

lib/libpcap/optimize.c

315

find_closure(struct block *root)

lib/libpcap/optimize.c

318

struct block *b;

lib/libpcap/optimize.c

415

compute_local_ud(struct block *b)

lib/libpcap/optimize.c

458

find_ud(struct block *root)

lib/libpcap/optimize.c

461

struct block *p;

lib/libpcap/optimize.c

626

opt_not(struct block *b)

lib/libpcap/optimize.c

628

struct block *tmp = JT(b);

lib/libpcap/optimize.c

635

opt_peep(struct block *b)

lib/libpcap/optimize.c

75

static void opt_init(struct block *);

lib/libpcap/optimize.c

751

struct block *t = JT(b);

lib/libpcap/optimize.c

78

static void make_marks(struct block *);

lib/libpcap/optimize.c

780

struct block *t = JT(b);

lib/libpcap/optimize.c

79

static void mark_code(struct block *);

lib/libpcap/optimize.c

81

static void intern_blocks(struct block *);

lib/libpcap/optimize.c

85

static void find_levels_r(struct block *);

lib/libpcap/optimize.c

87

static void find_levels(struct block *);

lib/libpcap/optimize.c

88

static void find_dom(struct block *);

lib/libpcap/optimize.c

90

static void find_edom(struct block *);

lib/libpcap/optimize.c

91

static void find_closure(struct block *);

lib/libpcap/optimize.c

94

static void compute_local_ud(struct block *);

lib/libpcap/optimize.c

95

static void find_ud(struct block *);

lib/libpcap/optimize.c

99

static void opt_blk(struct block *, int);

lib/libssl/s3_cbc.c

395

void (*md_transform)(void *ctx, const unsigned char *block);

lib/libssl/s3_cbc.c

421

md_transform = (void(*)(void *ctx, const unsigned char *block)) MD5_Transform;

lib/libssl/s3_cbc.c

428

md_transform = (void(*)(void *ctx, const unsigned char *block)) SHA1_Transform;

lib/libssl/s3_cbc.c

434

md_transform = (void(*)(void *ctx, const unsigned char *block)) SHA256_Transform;

lib/libssl/s3_cbc.c

440

md_transform = (void(*)(void *ctx, const unsigned char *block)) SHA256_Transform;

lib/libssl/s3_cbc.c

446

md_transform = (void(*)(void *ctx, const unsigned char *block)) SHA512_Transform;

lib/libssl/s3_cbc.c

454

md_transform = (void(*)(void *ctx, const unsigned char *block)) SHA512_Transform;

lib/libssl/s3_cbc.c

565

unsigned char block[MAX_HASH_BLOCK_SIZE];

lib/libssl/s3_cbc.c

598

block[j] = b;

lib/libssl/s3_cbc.c

601

md_transform(md_state.c, block);

lib/libssl/s3_cbc.c

602

md_final_raw(md_state.c, block);

lib/libssl/s3_cbc.c

605

mac_out[j] |= block[j]&is_block_b;

lib/libz/zutil.h

108

void _Cdecl farfree( void *block );

libexec/tradcpp/utils.c

101

bothdr = block;

libexec/tradcpp/utils.c

114

#define placeheaders(block, len) ((void)(len), (block))

libexec/tradcpp/utils.c

71

placeheaders(void *block, size_t len)

libexec/tradcpp/utils.c

78

bothdr = block;

libexec/tradcpp/utils.c

80

bothdr->self = block;

libexec/tradcpp/utils.c

90

checkheaders(void *block, size_t len)

libexec/tradcpp/utils.c

95

if (block == NULL) {

libexec/tradcpp/utils.c

97

return block;

regress/lib/libcrypto/sm4/sm4test.c

100

if (memcmp(block, input, SM4_BLOCK_SIZE) != 0) {

regress/lib/libcrypto/sm4/sm4test.c

102

hexdump(stderr, "Got", block, SM4_BLOCK_SIZE);

regress/lib/libcrypto/sm4/sm4test.c

42

uint8_t block[SM4_BLOCK_SIZE];

regress/lib/libcrypto/sm4/sm4test.c

76

memcpy(block, input, SM4_BLOCK_SIZE);

regress/lib/libcrypto/sm4/sm4test.c

78

SM4_encrypt(block, block, &key);

regress/lib/libcrypto/sm4/sm4test.c

80

if (memcmp(block, expected, SM4_BLOCK_SIZE) != 0) {

regress/lib/libcrypto/sm4/sm4test.c

82

hexdump(stderr, "Got", block, SM4_BLOCK_SIZE);

regress/lib/libcrypto/sm4/sm4test.c

88

SM4_encrypt(block, block, &key);

regress/lib/libcrypto/sm4/sm4test.c

90

if (memcmp(block, expected_iter, SM4_BLOCK_SIZE) != 0) {

regress/lib/libcrypto/sm4/sm4test.c

92

hexdump(stderr, "Got", block, SM4_BLOCK_SIZE);

regress/lib/libcrypto/sm4/sm4test.c

98

SM4_decrypt(block, block, &key);

regress/lib/libcrypto/x509/rfc3779/rfc3779.c

843

addr_block_add_ipv4_addr(IPAddrBlocks *block, enum choice_type type,

regress/lib/libcrypto/x509/rfc3779/rfc3779.c

853

return X509v3_addr_add_prefix(block, IANA_AFI_IPV4, safi,

regress/lib/libcrypto/x509/rfc3779/rfc3779.c

858

return X509v3_addr_add_range(block, IANA_AFI_IPV4, safi,

regress/lib/libcrypto/x509/rfc3779/rfc3779.c

861

return X509v3_addr_add_inherit(block, IANA_AFI_IPV4, safi);

regress/lib/libcrypto/x509/rfc3779/rfc3779.c

869

addr_block_add_ipv6_addr(IPAddrBlocks *block, enum choice_type type,

regress/lib/libcrypto/x509/rfc3779/rfc3779.c

879

return X509v3_addr_add_prefix(block, IANA_AFI_IPV6, safi,

regress/lib/libcrypto/x509/rfc3779/rfc3779.c

884

return X509v3_addr_add_range(block, IANA_AFI_IPV6, safi,

regress/lib/libcrypto/x509/rfc3779/rfc3779.c

887

return X509v3_addr_add_inherit(block, IANA_AFI_IPV6, safi);

regress/lib/libcrypto/x509/rfc3779/rfc3779.c

895

addr_block_add_addrs(IPAddrBlocks *block, const struct ip_addr_block addrs[])

regress/lib/libcrypto/x509/rfc3779/rfc3779.c

904

if (!addr_block_add_ipv4_addr(block, addr->type,

regress/lib/libcrypto/x509/rfc3779/rfc3779.c

909

if (!addr_block_add_ipv6_addr(block, addr->type,

regress/sys/crypto/aesctr/aesctr.c

167

u_int8_t block[AESCTR_BLOCKSIZE];

regress/sys/crypto/aesctr/aesctr.c

177

bcopy(in, block, AESCTR_BLOCKSIZE);

regress/sys/crypto/aesctr/aesctr.c

179

aes_ctr_crypt(&ctx, block);

regress/sys/crypto/aesctr/aesctr.c

180

bcopy(block, out, AESCTR_BLOCKSIZE);

regress/sys/crypto/aesxts/aes_xts.c

1752

u_int8_t block[AES_XTS_BLOCKSIZE];

regress/sys/crypto/aesxts/aes_xts.c

1762

bcopy(in, block, AES_XTS_BLOCKSIZE);

regress/sys/crypto/aesxts/aes_xts.c

1765

aes_xts_encrypt((caddr_t)&ctx, block);

regress/sys/crypto/aesxts/aes_xts.c

1767

aes_xts_decrypt((caddr_t)&ctx, block);

regress/sys/crypto/aesxts/aes_xts.c

1768

bcopy(block, out, AES_XTS_BLOCKSIZE);

regress/sys/crypto/enc/des3.c

60

u_int8_t block[8], iv[8], iv2[8], *ivp = iv, *nivp;

regress/sys/crypto/enc/des3.c

70

bcopy(in, block, 8);

regress/sys/crypto/enc/des3.c

74

block[j] ^= ivp[j];

regress/sys/crypto/enc/des3.c

75

des3_encrypt(ctx, block);

regress/sys/crypto/enc/des3.c

76

memcpy(ivp, block, 8);

regress/sys/crypto/enc/des3.c

79

memcpy(nivp, block, 8);

regress/sys/crypto/enc/des3.c

80

des3_decrypt(ctx, block);

regress/sys/crypto/enc/des3.c

82

block[j] ^= ivp[j];

regress/sys/crypto/enc/des3.c

85

bcopy(block, out, 8);

regress/sys/kern/sysvshm/shmtest.c

291

void *block;

regress/sys/kern/sysvshm/shmtest.c

305

block = mmap(NULL, pgsize, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_ANON,

regress/sys/kern/sysvshm/shmtest.c

307

if (block == MAP_FAILED)

regress/sys/kern/sysvshm/shmtest.c

313

if ((shm_buf = shmat(shmid, block, 0)) != (void *) -1)

regress/sys/kern/sysvshm/shmtest.c

319

if (munmap(block, pgsize) == -1)

regress/sys/kern/sysvshm/shmtest.c

321

if ((shm_buf = shmat(shmid, block, 0)) == (void *) -1)

regress/sys/kern/sysvshm/shmtest.c

324

if (shm_buf != block)

regress/sys/kern/sysvshm/shmtest.c

326

shm_buf, block);

sbin/fsck_msdos/boot.c

101

boot->RootDirEnts = block[17] + (block[18] << 8);

sbin/fsck_msdos/boot.c

102

boot->Sectors = block[19] + (block[20] << 8);

sbin/fsck_msdos/boot.c

103

boot->Media = block[21];

sbin/fsck_msdos/boot.c

104

boot->FATsmall = block[22] + (block[23] << 8);

sbin/fsck_msdos/boot.c

105

boot->SecPerTrack = block[24] + (block[25] << 8);

sbin/fsck_msdos/boot.c

106

boot->Heads = block[26] + (block[27] << 8);

sbin/fsck_msdos/boot.c

107

boot->HiddenSecs = block[28] + (block[29] << 8) + (block[30] << 16) + (block[31] << 24);

sbin/fsck_msdos/boot.c

108

boot->HugeSectors = block[32] + (block[33] << 8) + (block[34] << 16) + (block[35] << 24);

sbin/fsck_msdos/boot.c

114

boot->FATsecs = block[36] + (block[37] << 8)

sbin/fsck_msdos/boot.c

115

+ (block[38] << 16) + (block[39] << 24);

sbin/fsck_msdos/boot.c

116

if (block[40] & 0x80)

sbin/fsck_msdos/boot.c

117

boot->ValidFat = block[40] & 0x0f;

sbin/fsck_msdos/boot.c

120

if (block[42] || block[43]) {

sbin/fsck_msdos/boot.c

123

block[43], block[42]);

sbin/fsck_msdos/boot.c

126

boot->RootCl = block[44] + (block[45] << 8)

sbin/fsck_msdos/boot.c

127

+ (block[46] << 16) + (block[47] << 24);

sbin/fsck_msdos/boot.c

128

boot->FSInfo = block[48] + (block[49] << 8);

sbin/fsck_msdos/boot.c

129

boot->Backup = block[50] + (block[51] << 8);

sbin/fsck_msdos/boot.c

227

if (memcmp(block + 11, backup + 11, 79)) {

sbin/fsck_msdos/boot.c

293

free(block);

sbin/fsck_msdos/boot.c

298

free(block);

sbin/fsck_msdos/boot.c

43

u_char *block = NULL;

sbin/fsck_msdos/boot.c

59

block = malloc(secsize);

sbin/fsck_msdos/boot.c

60

if (block == NULL) {

sbin/fsck_msdos/boot.c

70

n = read(dosfs, block, secsize);

sbin/fsck_msdos/boot.c

76

if (block[510] != 0x55 || block[511] != 0xaa) {

sbin/fsck_msdos/boot.c

78

block[511], block[510]);

sbin/fsck_msdos/boot.c

85

boot->BytesPerSec = block[11] + (block[12] << 8);

sbin/fsck_msdos/boot.c

90

boot->SecPerClust = block[13];

sbin/fsck_msdos/boot.c

95

boot->ResSectors = block[14] + (block[15] << 8);

sbin/fsck_msdos/boot.c

96

boot->FATs = block[16];

sbin/growfs/growfs.c

2018

updclst(int block)

sbin/growfs/growfs.c

2028

setbit(cg_clustersfree(&acg), block);

sbin/growfs/growfs.c

2037

for (block--; lcs < sblock.fs_contigsumsize; block--, lcs++) {

sbin/growfs/growfs.c

2038

if (isclr(cg_clustersfree(&acg), block))

sbin/growfs/growfs.c

569

cond_bl_upd(daddr_t *block, struct gfs_bpp *field, int fsi, int fso,

sbin/growfs/growfs.c

578

src = *block;

sbin/growfs/growfs.c

586

*block = dst + fragnum;

sbin/growfs/growfs.c

852

int block;

sbin/growfs/growfs.c

924

for (block = howmany(d % sblock.fs_fpg, sblock.fs_frag),

sbin/growfs/growfs.c

926

block++, lcs++) {

sbin/growfs/growfs.c

927

if (isclr(cg_clustersfree(&acg), block))

sbin/pfctl/pfctl_optimize.c

1307

struct superblock *block = NULL;

sbin/pfctl/pfctl_optimize.c

1314

if (block == NULL || !superblock_inclusive(block, por)) {

sbin/pfctl/pfctl_optimize.c

1315

if ((block = calloc(1, sizeof(*block))) == NULL) {

sbin/pfctl/pfctl_optimize.c

1319

TAILQ_INIT(&block->sb_rules);

sbin/pfctl/pfctl_optimize.c

1321

TAILQ_INIT(&block->sb_skipsteps[i]);

sbin/pfctl/pfctl_optimize.c

1322

TAILQ_INSERT_TAIL(superblocks, block, sb_entry);

sbin/pfctl/pfctl_optimize.c

1324

TAILQ_INSERT_TAIL(&block->sb_rules, por, por_entry);

sbin/pfctl/pfctl_optimize.c

1377

superblock_inclusive(struct superblock *block, struct pf_opt_rule *por)

sbin/pfctl/pfctl_optimize.c

1411

interface_group(TAILQ_FIRST(&block->sb_rules)->por_rule.ifname)) {

sbin/pfctl/pfctl_optimize.c

1413

TAILQ_FIRST(&block->sb_rules)->por_rule.ifname) != 0)

sbin/pfctl/pfctl_optimize.c

1417

comparable_rule(&a, &TAILQ_FIRST(&block->sb_rules)->por_rule, NOMERGE);

sbin/pfctl/pfctl_optimize.c

1597

superblock_free(struct pfctl *pf, struct superblock *block)

sbin/pfctl/pfctl_optimize.c

1600

while ((por = TAILQ_FIRST(&block->sb_rules))) {

sbin/pfctl/pfctl_optimize.c

1601

TAILQ_REMOVE(&block->sb_rules, por, por_entry);

sbin/pfctl/pfctl_optimize.c

1606

if (block->sb_profiled_block)

sbin/pfctl/pfctl_optimize.c

1607

superblock_free(pf, block->sb_profiled_block);

sbin/pfctl/pfctl_optimize.c

1608

free(block);

sbin/pfctl/pfctl_optimize.c

268

struct superblock *block;

sbin/pfctl/pfctl_optimize.c

307

TAILQ_FOREACH(block, &superblocks, sb_entry) {

sbin/pfctl/pfctl_optimize.c

308

if (optimize_superblock(pf, block))

sbin/pfctl/pfctl_optimize.c

313

while ((block = TAILQ_FIRST(&superblocks))) {

sbin/pfctl/pfctl_optimize.c

314

TAILQ_REMOVE(&superblocks, block, sb_entry);

sbin/pfctl/pfctl_optimize.c

316

while ((por = TAILQ_FIRST(&block->sb_rules))) {

sbin/pfctl/pfctl_optimize.c

317

TAILQ_REMOVE(&block->sb_rules, por, por_entry);

sbin/pfctl/pfctl_optimize.c

327

superblock_free(pf, block);

sbin/pfctl/pfctl_optimize.c

339

while ((block = TAILQ_FIRST(&superblocks))) {

sbin/pfctl/pfctl_optimize.c

340

TAILQ_REMOVE(&superblocks, block, sb_entry);

sbin/pfctl/pfctl_optimize.c

341

superblock_free(pf, block);

sbin/pfctl/pfctl_optimize.c

351

optimize_superblock(struct pfctl *pf, struct superblock *block)

sbin/pfctl/pfctl_optimize.c

388

if (!TAILQ_NEXT(TAILQ_FIRST(&block->sb_rules), por_entry))

sbin/pfctl/pfctl_optimize.c

393

TAILQ_FOREACH(por, &block->sb_rules, por_entry) {

sbin/pfctl/pfctl_optimize.c

401

if (remove_identical_rules(pf, block))

sbin/pfctl/pfctl_optimize.c

403

if (combine_rules(pf, block))

sbin/pfctl/pfctl_optimize.c

406

TAILQ_FIRST(&block->sb_rules)->por_rule.quick &&

sbin/pfctl/pfctl_optimize.c

407

block->sb_profiled_block) {

sbin/pfctl/pfctl_optimize.c

408

if (block_feedback(pf, block))

sbin/pfctl/pfctl_optimize.c

410

} else if (reorder_rules(pf, block, 0)) {

sbin/pfctl/pfctl_optimize.c

432

remove_identical_rules(struct pfctl *pf, struct superblock *block)

sbin/pfctl/pfctl_optimize.c

437

for (por1 = TAILQ_FIRST(&block->sb_rules); por1; por1 = por_next) {

sbin/pfctl/pfctl_optimize.c

451

TAILQ_REMOVE(&block->sb_rules, por2, por_entry);

sbin/pfctl/pfctl_optimize.c

458

TAILQ_REMOVE(&block->sb_rules, por1, por_entry);

sbin/pfctl/pfctl_optimize.c

474

combine_rules(struct pfctl *pf, struct superblock *block)

sbin/pfctl/pfctl_optimize.c

480

TAILQ_FOREACH(p1, &block->sb_rules, por_entry) {

sbin/pfctl/pfctl_optimize.c

506

TAILQ_REMOVE(&block->sb_rules, p2,

sbin/pfctl/pfctl_optimize.c

529

TAILQ_REMOVE(&block->sb_rules, p2,

sbin/pfctl/pfctl_optimize.c

545

for (p1 = TAILQ_FIRST(&block->sb_rules); p1; p1 = por_next) {

sbin/pfctl/pfctl_optimize.c

553

TAILQ_REMOVE(&block->sb_rules, p1, por_entry);

sbin/pfctl/pfctl_optimize.c

585

TAILQ_REMOVE(&block->sb_rules, p1, por_entry);

sbin/pfctl/pfctl_optimize.c

622

reorder_rules(struct pfctl *pf, struct superblock *block, int depth)

sbin/pfctl/pfctl_optimize.c

635

TAILQ_FOREACH(por, &block->sb_rules, por_entry) {

sbin/pfctl/pfctl_optimize.c

636

TAILQ_FOREACH(skiplist, &block->sb_skipsteps[i],

sbin/pfctl/pfctl_optimize.c

646

TAILQ_INSERT_TAIL(&block->sb_skipsteps[i],

sbin/pfctl/pfctl_optimize.c

649

skip_append(block, i, skiplist, por);

sbin/pfctl/pfctl_optimize.c

653

TAILQ_FOREACH(por, &block->sb_rules, por_entry)

sbin/pfctl/pfctl_optimize.c

663

skiplist = TAILQ_FIRST(&block->sb_skipsteps[i]);

sbin/pfctl/pfctl_optimize.c

690

TAILQ_CONCAT(&head, &block->sb_rules, por_entry);

sbin/pfctl/pfctl_optimize.c

699

skiplist = TAILQ_FIRST(&block->sb_skipsteps[i]);

sbin/pfctl/pfctl_optimize.c

711

TAILQ_CONCAT(&block->sb_rules, &head, por_entry);

sbin/pfctl/pfctl_optimize.c

718

skiplist = TAILQ_FIRST(&block->sb_skipsteps[

sbin/pfctl/pfctl_optimize.c

722

largest, TAILQ_FIRST(&TAILQ_FIRST(&block->

sbin/pfctl/pfctl_optimize.c

725

TAILQ_REMOVE(&block->sb_skipsteps[largest_list],

sbin/pfctl/pfctl_optimize.c

743

TAILQ_INSERT_BEFORE(block, newblock, sb_entry);

sbin/pfctl/pfctl_optimize.c

749

newblock = block;

sbin/pfctl/pfctl_optimize.c

760

remove_from_skipsteps(&block->sb_skipsteps[

sbin/pfctl/pfctl_optimize.c

761

largest_list], block, por, skiplist);

sbin/pfctl/pfctl_optimize.c

764

if (newblock != block)

sbin/pfctl/pfctl_optimize.c

772

while ((skiplist = TAILQ_FIRST(&block->sb_skipsteps[i]))) {

sbin/pfctl/pfctl_optimize.c

773

TAILQ_REMOVE(&block->sb_skipsteps[i], skiplist,

sbin/pfctl/pfctl_optimize.c

788

block_feedback(struct pfctl *pf, struct superblock *block)

sbin/pfctl/pfctl_optimize.c

799

TAILQ_FOREACH(por1, &block->sb_profiled_block->sb_rules, por_entry) {

sbin/pfctl/pfctl_optimize.c

801

TAILQ_FOREACH(por2, &block->sb_rules, por_entry) {

sbin/pfctl/pfctl_optimize.c

813

superblock_free(pf, block->sb_profiled_block);

sbin/pfctl/pfctl_optimize.c

814

block->sb_profiled_block = NULL;

sbin/pfctl/pfctl_optimize.c

822

TAILQ_CONCAT(&queue, &block->sb_rules, por_entry);

sbin/pfctl/pfctl_optimize.c

827

TAILQ_FOREACH(por2, &block->sb_rules, por_entry) {

sbin/pfctl/pfctl_optimize.c

834

TAILQ_INSERT_TAIL(&block->sb_rules, por1, por_entry);

sbin/pfctl/pfctl_optimize.c

848

struct superblock *block, *blockcur;

sbin/pfctl/pfctl_optimize.c

894

block = TAILQ_FIRST(superblocks);

sbin/pfctl/pfctl_optimize.c

896

while (block && blockcur) {

sbin/pfctl/pfctl_optimize.c

897

comparable_rule(&a, &TAILQ_FIRST(&block->sb_rules)->por_rule,

sbin/pfctl/pfctl_optimize.c

903

block->sb_profiled_block = blockcur;

sbin/pfctl/pfctl_optimize.c

906

TAILQ_FIRST(&block->sb_rules)->por_rule.nr,

sbin/pfctl/pfctl_optimize.c

910

block = TAILQ_NEXT(block, sb_entry);

sbin/pfctl/pfctl_optimize.c

918

block = TAILQ_NEXT(blockcur, sb_entry);

sbin/pfctl/pfctl_optimize.c

920

blockcur = block;

sbin/pfctl/pfctl_optimize.c

969

remove_from_skipsteps(struct skiplist *head, struct superblock *block,

sbin/pfctl/pfctl_optimize.c

977

sk = TAILQ_FIRST(&block->sb_skipsteps[i]);

sbin/unwind/libunbound/sldns/str2wire.c

2010

int block;

sbin/unwind/libunbound/sldns/str2wire.c

2045

for(block = 0; block <= (int)maxtype/256; block++) {

sbin/unwind/libunbound/sldns/str2wire.c

2047

if(!window_in_use[block])

sbin/unwind/libunbound/sldns/str2wire.c

2050

if(typebits[block*32+i] != 0)

sbin/unwind/libunbound/sldns/str2wire.c

2057

rd[used+0] = (uint8_t)block;

sbin/unwind/libunbound/sldns/str2wire.c

2060

rd[used+2+i] = typebits[block*32+i];

sys/arch/arm/arm/stubs.c

102

for (block = 0; block < bootconfig.dramblocks; block++) {

sys/arch/arm/arm/stubs.c

103

cpu_kcore_hdr.ram_segs[block].start =

sys/arch/arm/arm/stubs.c

104

bootconfig.dram[block].address;

sys/arch/arm/arm/stubs.c

105

cpu_kcore_hdr.ram_segs[block].size =

sys/arch/arm/arm/stubs.c

106

ptoa(bootconfig.dram[block].pages);

sys/arch/arm/arm/stubs.c

128

int block;

sys/arch/arm/arm/stubs.c

184

for (block = 0; block < bootconfig.dramblocks && error == 0; ++block) {

sys/arch/arm/arm/stubs.c

185

addr = bootconfig.dram[block].address;

sys/arch/arm/arm/stubs.c

186

for (;addr < (bootconfig.dram[block].address

sys/arch/arm/arm/stubs.c

187

+ (bootconfig.dram[block].pages * PAGE_SIZE));

sys/arch/arm/arm/stubs.c

82

int nblks, block;

sys/arch/arm64/dev/aplaudio.c

405

aplaudio_round_blocksize(void *cookie, int block)

sys/arch/arm64/dev/aplaudio.c

412

return hwif->round_blocksize(dai->dd_cookie, block);

sys/arch/arm64/dev/aplaudio.c

414

return block;

sys/arch/armv7/exynos/ec_commands.h

566

uint8_t block[EC_VBNV_BLOCK_SIZE];

sys/arch/armv7/exynos/ec_commands.h

570

uint8_t block[EC_VBNV_BLOCK_SIZE];

sys/arch/macppc/dev/adb.c

685

ADBDataBlock block;

sys/arch/macppc/dev/adb.c

733

if (-1 == get_adb_info(&block, ADB_CMDADDR(cmd)))

sys/arch/macppc/dev/adb.c

745

adbInbound[adbInTail].compRout = (void *)block.dbServiceRtPtr;

sys/arch/macppc/dev/adb.c

746

adbInbound[adbInTail].compData = (void *)block.dbDataAreaAddr;

sys/arch/octeon/dev/octcrypto.c

335

uint64_t block[ndwords(HMAC_MAX_BLOCK_LEN)];

sys/arch/octeon/dev/octcrypto.c

430

bptr = (char *)block;

sys/arch/octeon/dev/octcrypto.c

441

hmac->transform(block, hmac->blocklen);

sys/arch/octeon/dev/octcrypto.c

448

hmac->transform(block, hmac->blocklen);

sys/arch/octeon/dev/octcrypto.c

453

explicit_bzero(block, hmac->blocklen);

sys/arch/octeon/dev/octcrypto.c

680

uint64_t block[ndwords(AESCTR_BLOCKSIZE)];

sys/arch/octeon/dev/octcrypto.c

804

block[0] = htobe64(aadlen * 8);

sys/arch/octeon/dev/octcrypto.c

805

block[1] = htobe64(crde->crd_len * 8);

sys/arch/octeon/dev/octcrypto.c

806

octcrypto_ghash_update(block, GMAC_BLOCK_LEN);

sys/arch/octeon/dev/octcrypto.c

809

block[0] = icb[0];

sys/arch/octeon/dev/octcrypto.c

810

block[1] = icb[1];

sys/arch/octeon/dev/octcrypto.c

811

octcrypto_aes_enc(block);

sys/arch/octeon/dev/octcrypto.c

812

tag[0] ^= block[0];

sys/arch/octeon/dev/octcrypto.c

813

tag[1] ^= block[1];

sys/arch/octeon/dev/octcrypto.c

853

uint64_t block[ndwords(HMAC_MAX_BLOCK_LEN)];

sys/arch/octeon/dev/octcrypto.c

854

uint8_t *bptr = (uint8_t *)block;

sys/arch/octeon/dev/octcrypto.c

867

memset(block, 0, hmac->blocklen);

sys/arch/octeon/dev/octcrypto.c

871

memcpy(block, buf + len - left, left);

sys/arch/octeon/dev/octcrypto.c

875

hmac->transform(block, hmac->blocklen);

sys/arch/octeon/dev/octcrypto.c

876

memset(block, 0, hmac->blocklen);

sys/arch/octeon/dev/octcrypto.c

882

block[7] = htole64((64 + len) * 8);

sys/arch/octeon/dev/octcrypto.c

886

block[7] = htobe64((64 + len) * 8);

sys/arch/octeon/dev/octcrypto.c

890

block[15] = htobe64((128 + len) * 8);

sys/arch/octeon/dev/octcrypto.c

894

hmac->transform(block, hmac->blocklen);

sys/arch/octeon/dev/octcrypto.c

900

memset(block, 0, hmac->blocklen);

sys/arch/octeon/dev/octcrypto.c

901

hmac->get_iv(block);

sys/arch/octeon/dev/octcrypto.c

906

block[2] = htobe64(1ULL << 63);

sys/arch/octeon/dev/octcrypto.c

907

block[7] = htole64((64 + 16) * 8);

sys/arch/octeon/dev/octcrypto.c

910

block[2] |= htobe64(1ULL << 31);

sys/arch/octeon/dev/octcrypto.c

911

block[7] = htobe64((64 + 20) * 8);

sys/arch/octeon/dev/octcrypto.c

914

block[4] = htobe64(1ULL << 63);

sys/arch/octeon/dev/octcrypto.c

915

block[7] = htobe64((64 + 32) * 8);

sys/arch/octeon/dev/octcrypto.c

922

block[6] = htobe64(1ULL << 63);

sys/arch/octeon/dev/octcrypto.c

923

block[7] = 0; /* truncation */

sys/arch/octeon/dev/octcrypto.c

924

block[15] = htobe64((128 + 48) * 8);

sys/arch/octeon/dev/octcrypto.c

927

block[8] = htobe64(1ULL << 63);

sys/arch/octeon/dev/octcrypto.c

928

block[15] = htobe64((128 + 64) * 8);

sys/arch/octeon/dev/octcrypto.c

932

hmac->transform(block, hmac->blocklen);

sys/arch/octeon/dev/octcrypto.c

938

explicit_bzero(block, sizeof(block));

sys/arch/octeon/octeon/machdep.c

1081

struct octeon_bootmem_block *block;

sys/arch/octeon/octeon/machdep.c

1086

block = pa_to_block(pa);

sys/arch/octeon/octeon/machdep.c

1087

printf("free 0x%lx - 0x%lx\n", pa, pa + (size_t)block->size);

sys/arch/octeon/octeon/machdep.c

1088

pa = block->next;

sys/arch/octeon/octeon/machdep.c

1100

struct octeon_bootmem_block *block, *next, nblock;

sys/arch/octeon/octeon/machdep.c

1113

block = pa_to_block(memdesc->head_addr);

sys/arch/octeon/octeon/machdep.c

1114

if (block->size < size)

sys/arch/octeon/octeon/machdep.c

1116

if (size_trunc(block->size) == size) {

sys/arch/octeon/octeon/machdep.c

1117

memdesc->head_addr = block->next;

sys/arch/octeon/octeon/machdep.c

1119

KASSERT(block->size > size);

sys/arch/octeon/octeon/machdep.c

1120

nblock.next = block->next;

sys/arch/octeon/octeon/machdep.c

1121

nblock.size = block->size - size;

sys/arch/octeon/octeon/machdep.c

1131

block = pa_to_block(bpa);

sys/arch/octeon/octeon/machdep.c

1132

while (block->next != 0 && block->next < pa) {

sys/arch/octeon/octeon/machdep.c

1133

bpa = block->next;

sys/arch/octeon/octeon/machdep.c

1134

block = pa_to_block(bpa);

sys/arch/octeon/octeon/machdep.c

1141

if (block->next == pa) {

sys/arch/octeon/octeon/machdep.c

1142

next = pa_to_block(block->next);

sys/arch/octeon/octeon/machdep.c

1146

block->next = next->next;

sys/arch/octeon/octeon/machdep.c

1152

block->next += size;

sys/arch/octeon/octeon/machdep.c

1153

*pa_to_block(block->next) = nblock;

sys/arch/octeon/octeon/machdep.c

1157

KASSERT(block->next == 0 || block->next > pa);

sys/arch/octeon/octeon/machdep.c

1159

if (bpa + block->size < pa + size)

sys/arch/octeon/octeon/machdep.c

1161

if (bpa + size_trunc(block->size) == pa + size) {

sys/arch/octeon/octeon/machdep.c

1162

block->size = pa - bpa;

sys/arch/octeon/octeon/machdep.c

1164

KASSERT(bpa + block->size > pa + size);

sys/arch/octeon/octeon/machdep.c

1165

nblock.next = block->next;

sys/arch/octeon/octeon/machdep.c

1166

nblock.size = block->size - (pa - bpa) - size;

sys/arch/octeon/octeon/machdep.c

1168

block->next = pa + size;

sys/arch/octeon/octeon/machdep.c

1169

block->size = pa - bpa;

sys/arch/octeon/octeon/machdep.c

1170

*pa_to_block(block->next) = nblock;

sys/arch/octeon/octeon/machdep.c

1185

struct octeon_bootmem_block *block, *next, *prev;

sys/arch/octeon/octeon/machdep.c

1195

block = pa_to_block(pa);

sys/arch/octeon/octeon/machdep.c

1196

block->next = 0;

sys/arch/octeon/octeon/machdep.c

1197

block->size = size;

sys/arch/octeon/octeon/machdep.c

1204

block = pa_to_block(pa);

sys/arch/octeon/octeon/machdep.c

1206

block->next = memdesc->head_addr;

sys/arch/octeon/octeon/machdep.c

1207

block->size = size;

sys/arch/octeon/octeon/machdep.c

1211

block->next = next->next;

sys/arch/octeon/octeon/machdep.c

1212

block->size = next->size + size;

sys/arch/octeon/octeon/machdep.c

1257

block = pa_to_block(pa);

sys/arch/octeon/octeon/machdep.c

1259

block->next = prev->next;

sys/arch/octeon/octeon/machdep.c

1260

block->size = size;

sys/arch/octeon/octeon/machdep.c

1264

block->next = next->next;

sys/arch/octeon/octeon/machdep.c

1265

block->size = next->size + size;

sys/arch/octeon/octeon/machdep.c

195

struct octeon_bootmem_block *block;

sys/arch/octeon/octeon/machdep.c

217

for (i = 0; i < MAXMEMSEGS && blockaddr != 0; blockaddr = block->next) {

sys/arch/octeon/octeon/machdep.c

218

block = pa_to_block(blockaddr);

sys/arch/octeon/octeon/machdep.c

220

(paddr_t)(blockaddr + block->size));

sys/arch/octeon/octeon/machdep.c

236

lp = atop(trunc_page(blockaddr + block->size));

sys/arch/sparc64/dev/fd.c

1402

daddr_t block;

sys/arch/sparc64/dev/fd.c

1404

block = (fd->sc_cylin * type->heads + head) *

sys/arch/sparc64/dev/fd.c

1406

if (block != fd->sc_blkno) {

sys/arch/sparc64/dev/fd.c

1408

(long long)block, (long long)fd->sc_blkno);

sys/crypto/blake2s.c

108

memcpy(m, block, BLAKE2S_BLOCK_SIZE);

sys/crypto/blake2s.c

159

block += BLAKE2S_BLOCK_SIZE;

sys/crypto/blake2s.c

84

uint8_t block[BLAKE2S_BLOCK_SIZE] = { 0 };

sys/crypto/blake2s.c

91

memcpy(block, key, keylen);

sys/crypto/blake2s.c

92

blake2s_update(state, block, BLAKE2S_BLOCK_SIZE);

sys/crypto/blake2s.c

93

explicit_bzero(block, BLAKE2S_BLOCK_SIZE);

sys/crypto/blake2s.c

97

const uint8_t *block, size_t nblocks,

sys/crypto/chachapoly.c

38

chacha_keysetup((chacha_ctx *)&ctx->block, key, CHACHA20_KEYSIZE * 8);

sys/crypto/chachapoly.c

47

chacha_ivsetup((chacha_ctx *)ctx->block, iv, ctx->nonce);

sys/crypto/chachapoly.c

55

chacha_encrypt_bytes((chacha_ctx *)ctx->block, data, data,

sys/crypto/chachapoly.h

28

uint8_t block[CHACHA20_BLOCK_LEN];

sys/crypto/md5.c

145

MD5Transform(u_int32_t state[4], const u_int8_t block[MD5_BLOCK_LENGTH])

sys/crypto/md5.c

150

memcpy(in, block, sizeof(in));

sys/crypto/md5.c

154

(u_int32_t)(block[a * 4 + 0]) |

sys/crypto/md5.c

155

(u_int32_t)(block[a * 4 + 1]) << 8 |

sys/crypto/md5.c

156

(u_int32_t)(block[a * 4 + 2]) << 16 |

sys/crypto/md5.c

157

(u_int32_t)(block[a * 4 + 3]) << 24);

sys/crypto/rmd160.c

157

RMD160Transform(u_int32_t state[5], const u_char block[64])

sys/crypto/rmd160.c

162

memcpy(x, block, 64);

sys/crypto/rmd160.c

168

(u_int32_t)(block[i*4 + 0]) |

sys/crypto/rmd160.c

169

(u_int32_t)(block[i*4 + 1]) << 8 |

sys/crypto/rmd160.c

170

(u_int32_t)(block[i*4 + 2]) << 16 |

sys/crypto/rmd160.c

171

(u_int32_t)(block[i*4 + 3]) << 24);

sys/crypto/sha1.c

32

#define blk0(i) (block->l[i] = (rol(block->l[i],24)&0xFF00FF00) \

sys/crypto/sha1.c

33

|(rol(block->l[i],8)&0x00FF00FF))

sys/crypto/sha1.c

35

#define blk0(i) block->l[i]

sys/crypto/sha1.c

37

#define blk(i) (block->l[i&15] = rol(block->l[(i+13)&15]^block->l[(i+8)&15] \

sys/crypto/sha1.c

38

^block->l[(i+2)&15]^block->l[i&15],1))

sys/crypto/sha1.c

57

CHAR64LONG16* block;

sys/crypto/sha1.c

61

block = (CHAR64LONG16 *)workspace;

sys/crypto/sha1.c

62

memcpy(block, buffer, SHA1_BLOCK_LENGTH);

sys/crypto/sha1.c

64

block = (CHAR64LONG16 *)buffer;

sys/crypto/xform.c

491

u_int8_t block[AES_XTS_BLOCKSIZE];

sys/crypto/xform.c

495

block[i] = data[i] ^ ctx->tweak[i];

sys/crypto/xform.c

498

rijndael_encrypt(&ctx->key1, block, data);

sys/crypto/xform.c

500

rijndael_decrypt(&ctx->key1, block, data);

sys/crypto/xform.c

513

explicit_bzero(block, sizeof(block));

sys/dev/fdt/graphaudio.c

369

graphaudio_round_blocksize(void *cookie, int block)

sys/dev/fdt/graphaudio.c

376

return hwif->round_blocksize(dai->dd_cookie, block);

sys/dev/fdt/graphaudio.c

378

return block;

sys/dev/fdt/simpleaudio.c

409

simpleaudio_round_blocksize(void *cookie, int block)

sys/dev/fdt/simpleaudio.c

416

return hwif->round_blocksize(dai->dd_cookie, block);

sys/dev/fdt/simpleaudio.c

418

return block;

sys/dev/ic/dwhdmi.c

269

uint8_t block, operation, val;

sys/dev/ic/dwhdmi.c

293

block = *(const uint8_t *)cmdbuf;

sys/dev/ic/dwhdmi.c

294

operation = block ? HDMI_I2CM_OPERATION_RD_EXT : HDMI_I2CM_OPERATION_RD;

sys/dev/ic/dwhdmi.c

295

off = (block & 1) ? 128 : 0;

sys/dev/ic/dwhdmi.c

297

dwhdmi_write(sc, HDMI_I2CM_SEGPTR, block >> 1);

sys/dev/ic/z8530tty.c

1197

zshwiflow(struct tty *tp, int block)

sys/dev/ic/z8530tty.c

1207

if (block) {

sys/dev/isa/fd.c

757

{int block;

sys/dev/isa/fd.c

758

block = (fd->sc_cylin * type->heads + head) * type->sectrac + sec;

sys/dev/isa/fd.c

759

if (block != fd->sc_blkno) {

sys/dev/isa/fd.c

760

panic("fdintr: block %d != blkno %llu", block, fd->sc_blkno);

sys/dev/pci/autri.c

902

autri_round_blocksize(void *addr, int block)

sys/dev/pci/autri.c

904

return ((block + 3) & -4);

sys/dev/pci/cmpci.c

804

cmpci_round_blocksize(void *handle, int block)

sys/dev/pci/cmpci.c

806

return ((block + 3) & -4);

sys/dev/pci/drm/amd/amdgpu/amdgpu.h

1503

#define RREG32_AUDIO_ENDPT(block, reg) adev->audio_endpt_rreg(adev, (block), (reg))

sys/dev/pci/drm/amd/amdgpu/amdgpu.h

1504

#define WREG32_AUDIO_ENDPT(block, reg, v) adev->audio_endpt_wreg(adev, (block), (reg), (v))

sys/dev/pci/drm/amd/amdgpu/amdgpu.h

822

enum amd_hw_ip_block_type block,

sys/dev/pci/drm/amd/amdgpu/amdgpu.h

825

enum amd_hw_ip_block_type block,

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd.c

751

enum amdgpu_ras_block block, uint16_t pasid,

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd.c

754

amdgpu_umc_pasid_poison_handler(adev, block, pasid, pasid_fn, data, reset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd.c

758

enum amdgpu_ras_block block, uint32_t reset)

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd.c

760

amdgpu_umc_pasid_poison_handler(adev, block, 0, NULL, NULL, reset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd.h

342

enum amdgpu_ras_block block, uint32_t reset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd.h

345

enum amdgpu_ras_block block, uint16_t pasid,

sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c

1395

uint32_t block, uint32_t reg)

sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c

1399

reg, block);

sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c

1416

uint32_t block,

sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c

1421

reg, block, v);

sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c

185

enum amd_ip_block_type block)

sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c

187

return (adev->init_lvl->hwini_ip_block_mask & (1U << block)) != 0;

sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c

3999

struct amdgpu_ip_block *block;

sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c

4001

block = &adev->ip_blocks[i];

sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c

4002

block->status.hw = false;

sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c

4006

if (block->version->type != ip_order[j] ||

sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c

4007

!block->status.valid)

sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c

4010

r = block->version->funcs->hw_init(&adev->ip_blocks[i]);

sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c

4013

block->version->funcs->name);

sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c

4016

block->status.hw = true;

sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c

4025

struct amdgpu_ip_block *block;

sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c

4041

block = amdgpu_device_ip_get_ip_block(adev, ip_order[i]);

sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c

4043

if (!block)

sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c

4046

if (block->status.valid && !block->status.hw) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c

4047

if (block->version->type == AMD_IP_BLOCK_TYPE_SMC) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c

4048

r = amdgpu_ip_block_resume(block);

sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c

4050

r = block->version->funcs->hw_init(block);

sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c

4055

block->version->funcs->name);

sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c

4058

block->status.hw = true;

sys/dev/pci/drm/amd/amdgpu/amdgpu_gfx.c

928

if (amdgpu_ras_is_supported(adev, ras_block->block)) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_gfx.c

978

ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__GFX;

sys/dev/pci/drm/amd/amdgpu/amdgpu_hdp.c

44

ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__HDP;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ip.c

28

enum amd_hw_ip_block_type block,

sys/dev/pci/drm/amd/amdgpu/amdgpu_ip.c

33

switch (block) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_ip.c

38

dev_inst = adev->ip_map.dev_inst[block][inst];

sys/dev/pci/drm/amd/amdgpu/amdgpu_ip.c

51

enum amd_hw_ip_block_type block,

sys/dev/pci/drm/amd/amdgpu/amdgpu_ip.c

59

dev_inst = amdgpu_logical_to_dev_inst(adev, block, log_inst);

sys/dev/pci/drm/amd/amdgpu/amdgpu_jpeg.c

296

if (amdgpu_ras_is_supported(adev, ras_block->block)) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_jpeg.c

331

ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__JPEG;

sys/dev/pci/drm/amd/amdgpu/amdgpu_mca.c

102

ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__MCA;

sys/dev/pci/drm/amd/amdgpu/amdgpu_mca.c

127

ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__MCA;

sys/dev/pci/drm/amd/amdgpu/amdgpu_mca.c

152

ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__MCA;

sys/dev/pci/drm/amd/amdgpu/amdgpu_mmhub.c

41

ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__MMHUB;

sys/dev/pci/drm/amd/amdgpu/amdgpu_nbio.c

42

ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__PCIE_BIF;

sys/dev/pci/drm/amd/amdgpu/amdgpu_nbio.c

74

if (amdgpu_ras_is_supported(adev, ras_block->block)) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

1007

.block = i,

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

102

if (ras_block->block >= AMDGPU_RAS_BLOCK_COUNT ||

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

103

ras_block->block >= ARRAY_SIZE(ras_block_string))

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

1030

.block = AMDGPU_RAS_BLOCK__MCA,

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

1053

enum amdgpu_ras_block block)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

1058

if (block_obj->ras_comm.block == block)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

106

if (ras_block->block == AMDGPU_RAS_BLOCK__MCA)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

1065

enum amdgpu_ras_block block, uint32_t sub_block_index)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

1070

if (block >= AMDGPU_RAS_BLOCK__LAST)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

1081

if (obj->ras_block_match(obj, block, sub_block_index) == 0)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

1084

if (amdgpu_ras_block_match_default(obj, block) == 0)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

109

return ras_block_string[ras_block->block];

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

1368

head.block = blk;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

1439

enum amdgpu_ras_block blk = info ? info->head.block : AMDGPU_RAS_BLOCK_COUNT;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

1452

if (info->head.block == AMDGPU_RAS_BLOCK__UMC) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

1455

block_obj = amdgpu_ras_get_ras_block(adev, info->head.block, 0);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

1465

if ((info->head.block == AMDGPU_RAS_BLOCK__SDMA) ||

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

1466

(info->head.block == AMDGPU_RAS_BLOCK__GFX) ||

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

1467

(info->head.block == AMDGPU_RAS_BLOCK__MMHUB)) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

1561

enum amdgpu_ras_block block)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

1563

struct amdgpu_ras_block_object *block_obj = amdgpu_ras_get_ras_block(adev, block, 0);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

1569

ras_block_str(block));

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

1573

if (!amdgpu_ras_is_supported(adev, block) ||

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

1593

enum amdgpu_ras_block block)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

1595

struct amdgpu_ras_block_object *block_obj = amdgpu_ras_get_ras_block(adev, block, 0);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

1597

if (amdgpu_ras_reset_error_count(adev, block) == -EOPNOTSUPP)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

1600

if ((block == AMDGPU_RAS_BLOCK__GFX) ||

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

1601

(block == AMDGPU_RAS_BLOCK__MMHUB)) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

1615

.block_id = amdgpu_ras_block_to_ta(info->head.block),

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

1623

info->head.block,

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

1641

info->head.block != AMDGPU_RAS_BLOCK__GFX) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

1648

if (info->head.block == AMDGPU_RAS_BLOCK__GFX)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

1697

if (amdgpu_ras_reset_error_status(adev, query_info->head.block))

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

1950

if (amdgpu_sriov_vf(adev) && !amdgpu_virt_ras_telemetry_block_en(adev, head->block))

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

2144

if (amdgpu_ras_is_supported(adev, obj->head.block) &&

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

2287

amdgpu_ras_get_ras_block(adev, obj->head.block, 0);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

2300

amdgpu_ras_set_err_poison(adev, block_obj->ras_comm.block);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

2316

amdgpu_umc_poison_handler(adev, obj->head.block, 0);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

2412

if (obj->head.block == AMDGPU_RAS_BLOCK__UMC)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

2417

if (obj->head.block == AMDGPU_RAS_BLOCK__UMC)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

2563

if (info.head.block == AMDGPU_RAS_BLOCK__PCIE_BIF)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

2572

if ((info.head.block == AMDGPU_RAS_BLOCK__UMC) &&

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

2585

if (amdgpu_ras_reset_error_status(adev, info.head.block))

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

2600

if ((info->head.block != AMDGPU_RAS_BLOCK__GFX) &&

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

2601

(info->head.block != AMDGPU_RAS_BLOCK__MMHUB))

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

2605

info->head.block,

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

289

if (amdgpu_ras_reset_error_status(obj->adev, info.head.block))

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

3322

enum amdgpu_ras_block block, uint16_t pasid,

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

3330

poison_msg.block = block;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

3451

info.head.block = AMDGPU_RAS_BLOCK__UMC;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

393

data->head.block = block_id;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

4274

if (amdgpu_ras_reset_error_status(adev, ras_block->block) != 0)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

4301

if (!amdgpu_ras_is_supported(adev, ras_block->block)) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

4419

if (!amdgpu_ras_is_supported(adev, obj->head.block)) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

4478

if (!amdgpu_ras_is_supported(adev, obj->ras_comm.block))

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

448

switch (data->head.block) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

4526

if (amdgpu_ras_is_supported(adev, obj->ras_comm.block) &&

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

4597

enum amdgpu_ras_block block)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

4603

set_bit(block, &ras->ras_err_state);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

4606

bool amdgpu_ras_is_err_state(struct amdgpu_device *adev, int block)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

4612

if (block == AMDGPU_RAS_BLOCK__ANY)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

4615

return test_bit(block, &ras->ras_err_state) ||

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

4861

unsigned int block)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

4866

if (block >= AMDGPU_RAS_BLOCK_COUNT)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

4869

ret = ras && (adev->ras_enabled & (1 << block));

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

4878

(block == AMDGPU_RAS_BLOCK__GFX ||

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

4879

block == AMDGPU_RAS_BLOCK__SDMA ||

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

4880

block == AMDGPU_RAS_BLOCK__VCN ||

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

4881

block == AMDGPU_RAS_BLOCK__JPEG) &&

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

4882

(amdgpu_ras_mask & (1 << block)) &&

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

4884

amdgpu_ras_get_ras_block(adev, block, 0))

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

5477

struct drm_buddy_block *block;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

5493

list_for_each_entry(block, &vres->blocks, link) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

5500

region->start = amdgpu_vram_mgr_block_start(block);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

5501

region->size = amdgpu_vram_mgr_block_size(block);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

582

if (!amdgpu_ras_is_supported(adev, data.head.block))

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

594

if (data.head.block == AMDGPU_RAS_BLOCK__UMC)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

710

if (amdgpu_ras_reset_error_status(obj->adev, info.head.block))

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

714

if (info.head.block == AMDGPU_RAS_BLOCK__UMC)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

750

if (head->block >= AMDGPU_RAS_BLOCK_COUNT)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

753

if (head->block == AMDGPU_RAS_BLOCK__MCA) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

759

obj = &con->objs[head->block];

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

788

if (head->block >= AMDGPU_RAS_BLOCK_COUNT)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

791

if (head->block == AMDGPU_RAS_BLOCK__MCA) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

797

obj = &con->objs[head->block];

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

817

return adev->ras_hw_enabled & BIT(head->block);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

825

return con->features & BIT(head->block);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

856

con->features |= BIT(head->block);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

859

con->features &= ~BIT(head->block);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

881

if (head->block != AMDGPU_RAS_BLOCK__GFX &&

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

886

if (head->block == AMDGPU_RAS_BLOCK__GFX &&

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

895

.block_id = amdgpu_ras_block_to_ta(head->block),

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

900

.block_id = amdgpu_ras_block_to_ta(head->block),

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

961

if (head->block == AMDGPU_RAS_BLOCK__GFX)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

962

con->features |= BIT(head->block);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

967

if (adev->ras_enabled && head->block == AMDGPU_RAS_BLOCK__GFX)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

968

con->features &= ~BIT(head->block);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.h

1007

enum amdgpu_ras_block block, uint16_t pasid,

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.h

414

enum amdgpu_ras_block block;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.h

470

enum amdgpu_ras_block block;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.h

738

enum amdgpu_ras_block block, uint32_t sub_block_index);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.h

790

amdgpu_ras_block_to_ta(enum amdgpu_ras_block block) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.h

791

switch (block) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.h

833

WARN_ONCE(1, "RAS ERROR: unexpected block id %d\n", block);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.h

887

enum amdgpu_ras_block block);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.h

889

enum amdgpu_ras_block block);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.h

932

int amdgpu_ras_is_supported(struct amdgpu_device *adev, unsigned int block);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.h

993

enum amdgpu_ras_block block);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.h

995

bool amdgpu_ras_is_err_state(struct amdgpu_device *adev, int block);

sys/dev/pci/drm/amd/amdgpu/amdgpu_res_cursor.h

128

struct drm_buddy_block *block;

sys/dev/pci/drm/amd/amdgpu/amdgpu_res_cursor.h

146

block = cur->node;

sys/dev/pci/drm/amd/amdgpu/amdgpu_res_cursor.h

148

next = block->link.next;

sys/dev/pci/drm/amd/amdgpu/amdgpu_res_cursor.h

149

block = list_entry(next, struct drm_buddy_block, link);

sys/dev/pci/drm/amd/amdgpu/amdgpu_res_cursor.h

151

cur->node = block;

sys/dev/pci/drm/amd/amdgpu/amdgpu_res_cursor.h

152

cur->start = amdgpu_vram_mgr_block_start(block);

sys/dev/pci/drm/amd/amdgpu/amdgpu_res_cursor.h

153

cur->size = min(amdgpu_vram_mgr_block_size(block), cur->remaining);

sys/dev/pci/drm/amd/amdgpu/amdgpu_res_cursor.h

178

struct drm_buddy_block *block;

sys/dev/pci/drm/amd/amdgpu/amdgpu_res_cursor.h

182

block = cur->node;

sys/dev/pci/drm/amd/amdgpu/amdgpu_res_cursor.h

184

if (!amdgpu_vram_mgr_is_cleared(block))

sys/dev/pci/drm/amd/amdgpu/amdgpu_res_cursor.h

58

struct drm_buddy_block *block;

sys/dev/pci/drm/amd/amdgpu/amdgpu_res_cursor.h

73

block = list_first_entry_or_null(head,

sys/dev/pci/drm/amd/amdgpu/amdgpu_res_cursor.h

76

if (!block)

sys/dev/pci/drm/amd/amdgpu/amdgpu_res_cursor.h

79

while (start >= amdgpu_vram_mgr_block_size(block)) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_res_cursor.h

80

start -= amdgpu_vram_mgr_block_size(block);

sys/dev/pci/drm/amd/amdgpu/amdgpu_res_cursor.h

82

next = block->link.next;

sys/dev/pci/drm/amd/amdgpu/amdgpu_res_cursor.h

84

block = list_entry(next, struct drm_buddy_block, link);

sys/dev/pci/drm/amd/amdgpu/amdgpu_res_cursor.h

87

cur->start = amdgpu_vram_mgr_block_start(block) + start;

sys/dev/pci/drm/amd/amdgpu/amdgpu_res_cursor.h

88

cur->size = min(amdgpu_vram_mgr_block_size(block) - start, size);

sys/dev/pci/drm/amd/amdgpu/amdgpu_res_cursor.h

90

cur->node = block;

sys/dev/pci/drm/amd/amdgpu/amdgpu_sdma.c

102

if (amdgpu_ras_is_supported(adev, ras_block->block)) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_sdma.c

332

ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__SDMA;

sys/dev/pci/drm/amd/amdgpu/amdgpu_umc.c

209

enum amdgpu_ras_block block, uint16_t pasid,

sys/dev/pci/drm/amd/amdgpu/amdgpu_umc.c

230

.block = AMDGPU_RAS_BLOCK__UMC,

sys/dev/pci/drm/amd/amdgpu/amdgpu_umc.c

252

block, pasid, pasid_fn, data, reset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_umc.c

261

adev->virt.ops->ras_poison_handler(adev, block);

sys/dev/pci/drm/amd/amdgpu/amdgpu_umc.c

271

enum amdgpu_ras_block block, uint32_t reset)

sys/dev/pci/drm/amd/amdgpu/amdgpu_umc.c

274

block, 0, NULL, NULL, reset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_umc.c

303

ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__UMC;

sys/dev/pci/drm/amd/amdgpu/amdgpu_umc.c

327

if (amdgpu_ras_is_supported(adev, ras_block->block)) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_umc.h

155

enum amdgpu_ras_block block, uint32_t reset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_umc.h

157

enum amdgpu_ras_block block, uint16_t pasid,

sys/dev/pci/drm/amd/amdgpu/amdgpu_vcn.c

1277

adev->virt.ops->ras_poison_handler(adev, ras_if->block);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vcn.c

1294

if (amdgpu_ras_is_supported(adev, ras_block->block)) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_vcn.c

1329

ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__VCN;

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

1253

amdgpu_ras_block_to_sriov(struct amdgpu_device *adev, enum amdgpu_ras_block block) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

1254

switch (block) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

1295

block);

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

1350

int amdgpu_virt_req_ras_err_count(struct amdgpu_device *adev, enum amdgpu_ras_block block,

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

1355

sriov_block = amdgpu_ras_block_to_sriov(adev, block);

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

1367

err_data->ue_count = adev->virt.count_cache.block[sriov_block].ue_count;

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

1368

err_data->ce_count = adev->virt.count_cache.block[sriov_block].ce_count;

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

1369

err_data->de_count = adev->virt.count_cache.block[sriov_block].de_count;

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

1484

enum amdgpu_ras_block block)

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

1488

sriov_block = amdgpu_ras_block_to_sriov(adev, block);

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.h

465

int amdgpu_virt_req_ras_err_count(struct amdgpu_device *adev, enum amdgpu_ras_block block,

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.h

470

enum amdgpu_ras_block block);

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.h

96

enum amdgpu_ras_block block);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vram_mgr.c

261

struct drm_buddy_block *block)

sys/dev/pci/drm/amd/amdgpu/amdgpu_vram_mgr.c

263

u64 start = amdgpu_vram_mgr_block_start(block);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vram_mgr.c

264

u64 end = start + amdgpu_vram_mgr_block_size(block);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vram_mgr.c

286

struct drm_buddy_block *block;

sys/dev/pci/drm/amd/amdgpu/amdgpu_vram_mgr.c

295

list_for_each_entry(block, &vres->blocks, link)

sys/dev/pci/drm/amd/amdgpu/amdgpu_vram_mgr.c

296

usage += amdgpu_vram_mgr_vis_size(adev, block);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vram_mgr.c

308

struct drm_buddy_block *block;

sys/dev/pci/drm/amd/amdgpu/amdgpu_vram_mgr.c

317

block = amdgpu_vram_mgr_first_block(&rsv->allocated);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vram_mgr.c

318

if (!block)

sys/dev/pci/drm/amd/amdgpu/amdgpu_vram_mgr.c

324

vis_usage = amdgpu_vram_mgr_vis_size(adev, block);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vram_mgr.c

410

struct drm_buddy_block *block;

sys/dev/pci/drm/amd/amdgpu/amdgpu_vram_mgr.c

416

list_for_each_entry(block, &vres->blocks, link) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_vram_mgr.c

417

start = amdgpu_vram_mgr_block_start(block);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vram_mgr.c

418

size = amdgpu_vram_mgr_block_size(block);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vram_mgr.c

458

struct drm_buddy_block *block;

sys/dev/pci/drm/amd/amdgpu/amdgpu_vram_mgr.c

598

list_for_each_entry(block, &vres->blocks, link) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_vram_mgr.c

601

start = amdgpu_vram_mgr_block_start(block) +

sys/dev/pci/drm/amd/amdgpu/amdgpu_vram_mgr.c

602

amdgpu_vram_mgr_block_size(block);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vram_mgr.c

611

vis_usage += amdgpu_vram_mgr_vis_size(adev, block);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vram_mgr.c

63

struct drm_buddy_block *block;

sys/dev/pci/drm/amd/amdgpu/amdgpu_vram_mgr.c

651

struct drm_buddy_block *block;

sys/dev/pci/drm/amd/amdgpu/amdgpu_vram_mgr.c

659

list_for_each_entry(block, &vres->blocks, link)

sys/dev/pci/drm/amd/amdgpu/amdgpu_vram_mgr.c

66

block = amdgpu_vram_mgr_first_block(head);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vram_mgr.c

660

vis_usage += amdgpu_vram_mgr_vis_size(adev, block);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vram_mgr.c

67

if (!block)

sys/dev/pci/drm/amd/amdgpu/amdgpu_vram_mgr.c

70

while (head != block->link.next) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_vram_mgr.c

71

start = amdgpu_vram_mgr_block_start(block);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vram_mgr.c

72

size = amdgpu_vram_mgr_block_size(block);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vram_mgr.c

74

block = list_entry(block->link.next, struct drm_buddy_block, link);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vram_mgr.c

75

if (start + size != amdgpu_vram_mgr_block_start(block))

sys/dev/pci/drm/amd/amdgpu/amdgpu_vram_mgr.c

835

struct drm_buddy_block *block;

sys/dev/pci/drm/amd/amdgpu/amdgpu_vram_mgr.c

838

list_for_each_entry(block, &mgr->blocks, link) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_vram_mgr.c

84

struct drm_buddy_block *block;

sys/dev/pci/drm/amd/amdgpu/amdgpu_vram_mgr.c

840

amdgpu_vram_mgr_block_start(block) >> PAGE_SHIFT;

sys/dev/pci/drm/amd/amdgpu/amdgpu_vram_mgr.c

842

(amdgpu_vram_mgr_block_size(block) >> PAGE_SHIFT);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vram_mgr.c

868

struct drm_buddy_block *block;

sys/dev/pci/drm/amd/amdgpu/amdgpu_vram_mgr.c

87

list_for_each_entry(block, head, link)

sys/dev/pci/drm/amd/amdgpu/amdgpu_vram_mgr.c

871

list_for_each_entry(block, &mgr->blocks, link) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_vram_mgr.c

873

amdgpu_vram_mgr_block_start(block) >> PAGE_SHIFT;

sys/dev/pci/drm/amd/amdgpu/amdgpu_vram_mgr.c

875

(amdgpu_vram_mgr_block_size(block) >> PAGE_SHIFT);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vram_mgr.c

88

size += amdgpu_vram_mgr_block_size(block);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vram_mgr.h

60

static inline u64 amdgpu_vram_mgr_block_start(struct drm_buddy_block *block)

sys/dev/pci/drm/amd/amdgpu/amdgpu_vram_mgr.h

62

return drm_buddy_block_offset(block);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vram_mgr.h

65

static inline u64 amdgpu_vram_mgr_block_size(struct drm_buddy_block *block)

sys/dev/pci/drm/amd/amdgpu/amdgpu_vram_mgr.h

67

return (u64)PAGE_SIZE << drm_buddy_block_order(block);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vram_mgr.h

70

static inline bool amdgpu_vram_mgr_is_cleared(struct drm_buddy_block *block)

sys/dev/pci/drm/amd/amdgpu/amdgpu_vram_mgr.h

72

return drm_buddy_block_is_clear(block);

sys/dev/pci/drm/amd/amdgpu/amdgpu_xgmi.c

1661

ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__XGMI_WAFL;

sys/dev/pci/drm/amd/amdgpu/amdgv_sriovmsg.h

397

} block[RAS_TELEMETRY_GPU_BLOCK_COUNT];

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0_3.c

72

adev->virt.ops->ras_poison_handler(adev, ras_if->block);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6764

block_info.block_id = amdgpu_ras_block_to_ta(info->head.block);

sys/dev/pci/drm/amd/amdgpu/gmc_v6_0.c

619

char block[5] = { mc_client >> 24, (mc_client >> 16) & 0xff,

sys/dev/pci/drm/amd/amdgpu/gmc_v6_0.c

629

"write" : "read", block, mc_client, mc_id);

sys/dev/pci/drm/amd/amdgpu/gmc_v7_0.c

775

char block[5] = { mc_client >> 24, (mc_client >> 16) & 0xff,

sys/dev/pci/drm/amd/amdgpu/gmc_v7_0.c

786

"write" : "read", block, mc_client, mc_id);

sys/dev/pci/drm/amd/amdgpu/gmc_v8_0.c

1009

char block[5] = { mc_client >> 24, (mc_client >> 16) & 0xff,

sys/dev/pci/drm/amd/amdgpu/gmc_v8_0.c

1020

"write" : "read", block, mc_client, mc_id);

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

1456

if (amdgpu_ras_is_supported(adev, ras_block->block) &&

sys/dev/pci/drm/amd/amdgpu/jpeg_v5_0_1.c

1076

if (amdgpu_ras_is_supported(adev, ras_block->block) &&

sys/dev/pci/drm/amd/amdgpu/mca_v3_0.c

41

enum amdgpu_ras_block block, uint32_t sub_block_index)

sys/dev/pci/drm/amd/amdgpu/mca_v3_0.c

46

if ((block_obj->ras_comm.block == block) &&

sys/dev/pci/drm/amd/amdgpu/mxgpu_ai.c

459

enum amdgpu_ras_block block)

sys/dev/pci/drm/amd/amdgpu/mxgpu_nv.c

524

enum amdgpu_ras_block block)

sys/dev/pci/drm/amd/amdgpu/mxgpu_nv.c

531

IDH_RAS_POISON, block, 0, 0);

sys/dev/pci/drm/amd/amdgpu/nbio_v7_4.c

662

.block = AMDGPU_RAS_BLOCK__PCIE_BIF,

sys/dev/pci/drm/amd/amdgpu/nbio_v7_9.c

684

.block = AMDGPU_RAS_BLOCK__PCIE_BIF,

sys/dev/pci/drm/amd/amdgpu/soc15.c

1340

amdgpu_ras_is_supported(adev, adev->nbio.ras_if->block)) {

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_3.c

2074

if (amdgpu_ras_is_supported(adev, ras_block->block) &&

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_1.c

1704

if (amdgpu_ras_is_supported(adev, ras_block->block) &&

sys/dev/pci/drm/amd/amdkfd/kfd_int_process_v11.c

219

enum amdgpu_ras_block block = 0;

sys/dev/pci/drm/amd/amdkfd/kfd_int_process_v11.c

240

block = AMDGPU_RAS_BLOCK__GFX;

sys/dev/pci/drm/amd/amdkfd/kfd_int_process_v11.c

246

block = AMDGPU_RAS_BLOCK__GFX;

sys/dev/pci/drm/amd/amdkfd/kfd_int_process_v11.c

255

amdgpu_amdkfd_ras_poison_consumption_handler(dev->adev, block, reset);

sys/dev/pci/drm/amd/amdkfd/kfd_int_process_v9.c

147

enum amdgpu_ras_block block = 0;

sys/dev/pci/drm/amd/amdkfd/kfd_int_process_v9.c

169

block = AMDGPU_RAS_BLOCK__GFX;

sys/dev/pci/drm/amd/amdkfd/kfd_int_process_v9.c

191

block = AMDGPU_RAS_BLOCK__MMHUB;

sys/dev/pci/drm/amd/amdkfd/kfd_int_process_v9.c

199

block = AMDGPU_RAS_BLOCK__SDMA;

sys/dev/pci/drm/amd/amdkfd/kfd_int_process_v9.c

237

block, pasid, NULL, NULL, reset);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

932

dm_helpers_probe_acpi_edid(void *data, u8 *buf, unsigned int block, size_t len)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

938

unsigned short start = block * EDID_LENGTH;

sys/dev/pci/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c

39

#define SRI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c

40

.reg_name = mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/clk_mgr/dce112/dce112_clk_mgr.c

41

#define SRI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/clk_mgr/dce112/dce112_clk_mgr.c

42

.reg_name = mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c

64

#define CLK_SRI(reg_name, block, inst)\

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c

65

.reg_name = mm ## block ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

115

#define CLK_SR_DCN321(reg_name, block, inst)\

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

116

.reg_name = mm ## block ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

57

#define CLK_SR_DCN401(reg_name, block, inst)\

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

58

.reg_name = mm ## block ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/dccg/dcn20/dcn20_dccg.h

57

#define DCCG_SFII(block, reg_name, field_prefix, field_name, inst, post_fix)\

sys/dev/pci/drm/amd/display/dc/dccg/dcn20/dcn20_dccg.h

58

.field_prefix ## _ ## field_name[inst] = block ## inst ## _ ## reg_name ## __ ## field_prefix ## inst ## _ ## field_name ## post_fix

sys/dev/pci/drm/amd/display/dc/dccg/dcn314/dcn314_dccg.h

32

#define DCCG_SFII(block, reg_name, field_prefix, field_name, inst, post_fix)\

sys/dev/pci/drm/amd/display/dc/dccg/dcn314/dcn314_dccg.h

33

.field_prefix ## _ ## field_name[inst] = block ## inst ## _ ## reg_name ## __ ## field_prefix ## inst ## _ ## field_name ## post_fix

sys/dev/pci/drm/amd/display/dc/dccg/dcn32/dcn32_dccg.h

31

#define DCCG_SFII(block, reg_name, field_prefix, field_name, inst, post_fix)\

sys/dev/pci/drm/amd/display/dc/dccg/dcn32/dcn32_dccg.h

32

.field_prefix ## _ ## field_name[inst] = block ## inst ## _ ## reg_name ## __ ## field_prefix ## inst ## _ ## field_name ## post_fix

sys/dev/pci/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.h

30

#define DCCG_SFII(block, reg_name, field_prefix, field_name, inst, post_fix)\

sys/dev/pci/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.h

31

.field_prefix ## _ ## field_name[inst] = block ## inst ## _ ## reg_name ## __ ## field_prefix ## inst ## _ ## field_name ## post_fix

sys/dev/pci/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.h

31

#define DCCG_SFII(block, reg_name, field_prefix, field_name, inst, post_fix)\

sys/dev/pci/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.h

32

.field_prefix ## _ ## field_name[inst] = block ## inst ## _ ## reg_name ## __ ## field_prefix ## inst ## _ ## field_name ## post_fix

sys/dev/pci/drm/amd/display/dc/dce/dce_panel_cntl.h

32

#define DCE_PANEL_CNTL_SR(reg_name, block)\

sys/dev/pci/drm/amd/display/dc/dce/dce_panel_cntl.h

33

.reg_name = mm ## block ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/dce/dce_panel_cntl.h

45

#define DCN_PANEL_CNTL_SR(reg_name, block)\

sys/dev/pci/drm/amd/display/dc/dce/dce_panel_cntl.h

46

.reg_name = BASE(mm ## block ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/dce/dce_panel_cntl.h

47

mm ## block ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/dcn10/dcn10_dwb.h

38

#define SRI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/dcn10/dcn10_dwb.h

39

.reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/dcn10/dcn10_dwb.h

40

mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/dcn10/dcn10_dwb.h

43

#define SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/dcn10/dcn10_dwb.h

44

.reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/dcn10/dcn10_dwb.h

45

mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/dm_services.h

165

#define get_reg_field_value_soc15(reg_value, block, reg_num, reg_name, reg_field)\

sys/dev/pci/drm/amd/display/dc/dm_services.h

168

block ## reg_num ## _ ## reg_name ## __ ## reg_field ## _MASK,\

sys/dev/pci/drm/amd/display/dc/dm_services.h

169

block ## reg_num ## _ ## reg_name ## __ ## reg_field ## __SHIFT)

sys/dev/pci/drm/amd/display/dc/dm_services.h

171

#define set_reg_field_value_soc15(reg_value, value, block, reg_num, reg_name, reg_field)\

sys/dev/pci/drm/amd/display/dc/dm_services.h

175

block ## reg_num ## _ ## reg_name ## __ ## reg_field ## _MASK,\

sys/dev/pci/drm/amd/display/dc/dm_services.h

176

block ## reg_num ## _ ## reg_name ## __ ## reg_field ## __SHIFT)

sys/dev/pci/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c

48

#define REGI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c

49

mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c

63

#define REGI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c

64

BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c

65

mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

54

#define REGI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

55

BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

56

mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c

60

#define REGI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c

61

BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c

62

mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

54

#define REGI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

55

BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

56

mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c

65

#define REGI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c

66

BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c

67

mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c

63

#define REGI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c

64

BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c

65

mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/gpio/dcn30/hw_factory_dcn30.c

74

#define REGI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/gpio/dcn30/hw_factory_dcn30.c

75

BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/gpio/dcn30/hw_factory_dcn30.c

76

mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/gpio/dcn315/hw_factory_dcn315.c

69

#define REGI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/gpio/dcn315/hw_factory_dcn315.c

70

BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/gpio/dcn315/hw_factory_dcn315.c

71

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/gpio/dcn32/hw_factory_dcn32.c

65

#define REGI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/gpio/dcn32/hw_factory_dcn32.c

66

BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/gpio/dcn32/hw_factory_dcn32.c

67

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/gpio/dcn401/hw_factory_dcn401.c

45

#define REGI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/gpio/dcn401/hw_factory_dcn401.c

46

BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/gpio/dcn401/hw_factory_dcn401.c

47

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/inc/hw/clk_mgr_internal.h

84

#define CLK_SRI(reg_name, block, inst)\

sys/dev/pci/drm/amd/display/dc/inc/hw/clk_mgr_internal.h

85

.reg_name = CLK_BASE(mm ## block ## _ ## inst ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/inc/hw/clk_mgr_internal.h

86

mm ## block ## _ ## inst ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/irq/dce120/irq_service_dce120.c

71

#define SRI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/irq/dce120/irq_service_dce120.c

72

BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/irq/dce120/irq_service_dce120.c

73

mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/irq/dce120/irq_service_dce120.c

76

#define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\

sys/dev/pci/drm/amd/display/dc/irq/dce120/irq_service_dce120.c

77

.enable_reg = SRI(reg1, block, reg_num),\

sys/dev/pci/drm/amd/display/dc/irq/dce120/irq_service_dce120.c

79

block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\

sys/dev/pci/drm/amd/display/dc/irq/dce120/irq_service_dce120.c

81

block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\

sys/dev/pci/drm/amd/display/dc/irq/dce120/irq_service_dce120.c

82

~block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK \

sys/dev/pci/drm/amd/display/dc/irq/dce120/irq_service_dce120.c

84

.ack_reg = SRI(reg2, block, reg_num),\

sys/dev/pci/drm/amd/display/dc/irq/dce120/irq_service_dce120.c

86

block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\

sys/dev/pci/drm/amd/display/dc/irq/dce120/irq_service_dce120.c

88

block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \

sys/dev/pci/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c

168

#define SRI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c

169

BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c

170

mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c

173

#define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\

sys/dev/pci/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c

174

.enable_reg = SRI(reg1, block, reg_num),\

sys/dev/pci/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c

176

block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\

sys/dev/pci/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c

178

block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\

sys/dev/pci/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c

179

~block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK \

sys/dev/pci/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c

181

.ack_reg = SRI(reg2, block, reg_num),\

sys/dev/pci/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c

183

block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\

sys/dev/pci/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c

185

block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \

sys/dev/pci/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c

171

#define SRI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c

172

BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c

173

mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c

176

#define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\

sys/dev/pci/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c

177

.enable_reg = SRI(reg1, block, reg_num),\

sys/dev/pci/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c

179

block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\

sys/dev/pci/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c

181

block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\

sys/dev/pci/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c

182

~block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK \

sys/dev/pci/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c

184

.ack_reg = SRI(reg2, block, reg_num),\

sys/dev/pci/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c

186

block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\

sys/dev/pci/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c

188

block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \

sys/dev/pci/drm/amd/display/dc/irq/dcn201/irq_service_dcn201.c

121

#define SRI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/irq/dcn201/irq_service_dcn201.c

122

BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/irq/dcn201/irq_service_dcn201.c

123

mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/irq/dcn201/irq_service_dcn201.c

125

#define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\

sys/dev/pci/drm/amd/display/dc/irq/dcn201/irq_service_dcn201.c

126

.enable_reg = SRI(reg1, block, reg_num),\

sys/dev/pci/drm/amd/display/dc/irq/dcn201/irq_service_dcn201.c

128

block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\

sys/dev/pci/drm/amd/display/dc/irq/dcn201/irq_service_dcn201.c

130

block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\

sys/dev/pci/drm/amd/display/dc/irq/dcn201/irq_service_dcn201.c

131

~block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK \

sys/dev/pci/drm/amd/display/dc/irq/dcn201/irq_service_dcn201.c

133

.ack_reg = SRI(reg2, block, reg_num),\

sys/dev/pci/drm/amd/display/dc/irq/dcn201/irq_service_dcn201.c

135

block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\

sys/dev/pci/drm/amd/display/dc/irq/dcn201/irq_service_dcn201.c

137

block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \

sys/dev/pci/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c

178

#define SRI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c

179

BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c

180

mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c

186

#define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\

sys/dev/pci/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c

187

.enable_reg = SRI(reg1, block, reg_num),\

sys/dev/pci/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c

189

block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\

sys/dev/pci/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c

191

block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\

sys/dev/pci/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c

192

~block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK \

sys/dev/pci/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c

194

.ack_reg = SRI(reg2, block, reg_num),\

sys/dev/pci/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c

196

block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\

sys/dev/pci/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c

198

block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \

sys/dev/pci/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c

187

#define SRI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c

188

BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c

189

mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c

195

#define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\

sys/dev/pci/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c

196

.enable_reg = SRI(reg1, block, reg_num),\

sys/dev/pci/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c

198

block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\

sys/dev/pci/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c

200

block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\

sys/dev/pci/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c

201

~block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK \

sys/dev/pci/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c

203

.ack_reg = SRI(reg2, block, reg_num),\

sys/dev/pci/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c

205

block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\

sys/dev/pci/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c

207

block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \

sys/dev/pci/drm/amd/display/dc/irq/dcn302/irq_service_dcn302.c

170

#define SRI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/irq/dcn302/irq_service_dcn302.c

171

BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/irq/dcn302/irq_service_dcn302.c

172

mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/irq/dcn302/irq_service_dcn302.c

178

#define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\

sys/dev/pci/drm/amd/display/dc/irq/dcn302/irq_service_dcn302.c

179

.enable_reg = SRI(reg1, block, reg_num),\

sys/dev/pci/drm/amd/display/dc/irq/dcn302/irq_service_dcn302.c

180

.enable_mask = block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\

sys/dev/pci/drm/amd/display/dc/irq/dcn302/irq_service_dcn302.c

182

block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\

sys/dev/pci/drm/amd/display/dc/irq/dcn302/irq_service_dcn302.c

183

~block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK \

sys/dev/pci/drm/amd/display/dc/irq/dcn302/irq_service_dcn302.c

185

.ack_reg = SRI(reg2, block, reg_num),\

sys/dev/pci/drm/amd/display/dc/irq/dcn302/irq_service_dcn302.c

186

.ack_mask = block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\

sys/dev/pci/drm/amd/display/dc/irq/dcn302/irq_service_dcn302.c

187

.ack_value = block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \

sys/dev/pci/drm/amd/display/dc/irq/dcn303/irq_service_dcn303.c

116

#define SRI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/irq/dcn303/irq_service_dcn303.c

117

BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/irq/dcn303/irq_service_dcn303.c

118

mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/irq/dcn303/irq_service_dcn303.c

121

#define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\

sys/dev/pci/drm/amd/display/dc/irq/dcn303/irq_service_dcn303.c

122

.enable_reg = SRI(reg1, block, reg_num),\

sys/dev/pci/drm/amd/display/dc/irq/dcn303/irq_service_dcn303.c

123

.enable_mask = block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\

sys/dev/pci/drm/amd/display/dc/irq/dcn303/irq_service_dcn303.c

125

block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\

sys/dev/pci/drm/amd/display/dc/irq/dcn303/irq_service_dcn303.c

126

~block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK \

sys/dev/pci/drm/amd/display/dc/irq/dcn303/irq_service_dcn303.c

128

.ack_reg = SRI(reg2, block, reg_num),\

sys/dev/pci/drm/amd/display/dc/irq/dcn303/irq_service_dcn303.c

129

.ack_mask = block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\

sys/dev/pci/drm/amd/display/dc/irq/dcn303/irq_service_dcn303.c

130

.ack_value = block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \

sys/dev/pci/drm/amd/display/dc/irq/dcn31/irq_service_dcn31.c

173

#define SRI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/irq/dcn31/irq_service_dcn31.c

174

BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/irq/dcn31/irq_service_dcn31.c

175

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/irq/dcn31/irq_service_dcn31.c

181

#define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\

sys/dev/pci/drm/amd/display/dc/irq/dcn31/irq_service_dcn31.c

182

.enable_reg = SRI(reg1, block, reg_num),\

sys/dev/pci/drm/amd/display/dc/irq/dcn31/irq_service_dcn31.c

184

block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\

sys/dev/pci/drm/amd/display/dc/irq/dcn31/irq_service_dcn31.c

186

block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\

sys/dev/pci/drm/amd/display/dc/irq/dcn31/irq_service_dcn31.c

187

~block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK \

sys/dev/pci/drm/amd/display/dc/irq/dcn31/irq_service_dcn31.c

189

.ack_reg = SRI(reg2, block, reg_num),\

sys/dev/pci/drm/amd/display/dc/irq/dcn31/irq_service_dcn31.c

191

block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\

sys/dev/pci/drm/amd/display/dc/irq/dcn31/irq_service_dcn31.c

193

block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \

sys/dev/pci/drm/amd/display/dc/irq/dcn314/irq_service_dcn314.c

175

#define SRI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/irq/dcn314/irq_service_dcn314.c

176

(BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/irq/dcn314/irq_service_dcn314.c

177

reg ## block ## id ## _ ## reg_name)

sys/dev/pci/drm/amd/display/dc/irq/dcn314/irq_service_dcn314.c

183

#define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\

sys/dev/pci/drm/amd/display/dc/irq/dcn314/irq_service_dcn314.c

184

.enable_reg = SRI(reg1, block, reg_num),\

sys/dev/pci/drm/amd/display/dc/irq/dcn314/irq_service_dcn314.c

186

block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\

sys/dev/pci/drm/amd/display/dc/irq/dcn314/irq_service_dcn314.c

188

block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\

sys/dev/pci/drm/amd/display/dc/irq/dcn314/irq_service_dcn314.c

189

~block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK \

sys/dev/pci/drm/amd/display/dc/irq/dcn314/irq_service_dcn314.c

191

.ack_reg = SRI(reg2, block, reg_num),\

sys/dev/pci/drm/amd/display/dc/irq/dcn314/irq_service_dcn314.c

193

block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\

sys/dev/pci/drm/amd/display/dc/irq/dcn314/irq_service_dcn314.c

195

block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \

sys/dev/pci/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c

180

#define SRI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c

181

BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c

182

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c

188

#define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\

sys/dev/pci/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c

189

.enable_reg = SRI(reg1, block, reg_num),\

sys/dev/pci/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c

191

block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\

sys/dev/pci/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c

193

block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\

sys/dev/pci/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c

194

~block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK \

sys/dev/pci/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c

196

.ack_reg = SRI(reg2, block, reg_num),\

sys/dev/pci/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c

198

block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\

sys/dev/pci/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c

200

block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \

sys/dev/pci/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.c

184

#define SRI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.c

185

BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.c

186

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.c

192

#define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\

sys/dev/pci/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.c

193

.enable_reg = SRI(reg1, block, reg_num),\

sys/dev/pci/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.c

195

block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\

sys/dev/pci/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.c

197

block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\

sys/dev/pci/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.c

198

~block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK \

sys/dev/pci/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.c

200

.ack_reg = SRI(reg2, block, reg_num),\

sys/dev/pci/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.c

202

block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\

sys/dev/pci/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.c

204

block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \

sys/dev/pci/drm/amd/display/dc/irq/dcn35/irq_service_dcn35.c

172

#define SRI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/irq/dcn35/irq_service_dcn35.c

173

BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/irq/dcn35/irq_service_dcn35.c

174

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/irq/dcn35/irq_service_dcn35.c

180

#define IRQ_REG_ENTRY(base, block, reg_num, reg1, mask1, reg2, mask2)\

sys/dev/pci/drm/amd/display/dc/irq/dcn35/irq_service_dcn35.c

181

REG_STRUCT[base + reg_num].enable_reg = SRI(reg1, block, reg_num),\

sys/dev/pci/drm/amd/display/dc/irq/dcn35/irq_service_dcn35.c

183

block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\

sys/dev/pci/drm/amd/display/dc/irq/dcn35/irq_service_dcn35.c

185

block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\

sys/dev/pci/drm/amd/display/dc/irq/dcn35/irq_service_dcn35.c

187

~block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK, \

sys/dev/pci/drm/amd/display/dc/irq/dcn35/irq_service_dcn35.c

188

REG_STRUCT[base + reg_num].ack_reg = SRI(reg2, block, reg_num),\

sys/dev/pci/drm/amd/display/dc/irq/dcn35/irq_service_dcn35.c

190

block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\

sys/dev/pci/drm/amd/display/dc/irq/dcn35/irq_service_dcn35.c

192

block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \

sys/dev/pci/drm/amd/display/dc/irq/dcn351/irq_service_dcn351.c

151

#define SRI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/irq/dcn351/irq_service_dcn351.c

152

BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/irq/dcn351/irq_service_dcn351.c

153

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/irq/dcn351/irq_service_dcn351.c

159

#define IRQ_REG_ENTRY(base, block, reg_num, reg1, mask1, reg2, mask2)\

sys/dev/pci/drm/amd/display/dc/irq/dcn351/irq_service_dcn351.c

160

REG_STRUCT[base + reg_num].enable_reg = SRI(reg1, block, reg_num),\

sys/dev/pci/drm/amd/display/dc/irq/dcn351/irq_service_dcn351.c

162

block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\

sys/dev/pci/drm/amd/display/dc/irq/dcn351/irq_service_dcn351.c

164

block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\

sys/dev/pci/drm/amd/display/dc/irq/dcn351/irq_service_dcn351.c

166

~block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK, \

sys/dev/pci/drm/amd/display/dc/irq/dcn351/irq_service_dcn351.c

167

REG_STRUCT[base + reg_num].ack_reg = SRI(reg2, block, reg_num),\

sys/dev/pci/drm/amd/display/dc/irq/dcn351/irq_service_dcn351.c

169

block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\

sys/dev/pci/drm/amd/display/dc/irq/dcn351/irq_service_dcn351.c

171

block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \

sys/dev/pci/drm/amd/display/dc/irq/dcn36/irq_service_dcn36.c

150

#define SRI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/irq/dcn36/irq_service_dcn36.c

151

BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/irq/dcn36/irq_service_dcn36.c

152

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/irq/dcn36/irq_service_dcn36.c

158

#define IRQ_REG_ENTRY(base, block, reg_num, reg1, mask1, reg2, mask2)\

sys/dev/pci/drm/amd/display/dc/irq/dcn36/irq_service_dcn36.c

159

REG_STRUCT[base + reg_num].enable_reg = SRI(reg1, block, reg_num),\

sys/dev/pci/drm/amd/display/dc/irq/dcn36/irq_service_dcn36.c

161

block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\

sys/dev/pci/drm/amd/display/dc/irq/dcn36/irq_service_dcn36.c

163

block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\

sys/dev/pci/drm/amd/display/dc/irq/dcn36/irq_service_dcn36.c

165

~block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK, \

sys/dev/pci/drm/amd/display/dc/irq/dcn36/irq_service_dcn36.c

166

REG_STRUCT[base + reg_num].ack_reg = SRI(reg2, block, reg_num),\

sys/dev/pci/drm/amd/display/dc/irq/dcn36/irq_service_dcn36.c

168

block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\

sys/dev/pci/drm/amd/display/dc/irq/dcn36/irq_service_dcn36.c

170

block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \

sys/dev/pci/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c

164

#define SRI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c

165

BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c

166

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c

172

#define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\

sys/dev/pci/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c

173

.enable_reg = SRI(reg1, block, reg_num),\

sys/dev/pci/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c

175

block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\

sys/dev/pci/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c

177

block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\

sys/dev/pci/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c

178

~block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK \

sys/dev/pci/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c

180

.ack_reg = SRI(reg2, block, reg_num),\

sys/dev/pci/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c

182

block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\

sys/dev/pci/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c

184

block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

38

#define SRII_MPC_RMU(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

39

.RMU##_##reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

40

mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dce100/dce100_resource.c

140

#define SRI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dce100/dce100_resource.c

141

.reg_name = mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dce100/dce100_resource.c

492

#define SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dce100/dce100_resource.c

493

.reg_name[id] = mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

148

#define SRI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

149

.reg_name = mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

540

#define SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

541

.reg_name[id] = mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dce112/dce112_resource.c

149

#define SRI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dce112/dce112_resource.c

150

.reg_name = mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dce112/dce112_resource.c

521

#define SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dce112/dce112_resource.c

522

.reg_name[id] = mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dce120/dce120_resource.c

141

#define SRI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dce120/dce120_resource.c

142

.reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dce120/dce120_resource.c

143

mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dce120/dce120_resource.c

780

#define SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dce120/dce120_resource.c

781

.reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dce120/dce120_resource.c

782

mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dce60/dce60_resource.c

157

#define SRI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dce60/dce60_resource.c

158

.reg_name = mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dce60/dce60_resource.c

608

#define SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dce60/dce60_resource.c

609

.reg_name[id] = mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dce80/dce80_resource.c

156

#define SRI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dce80/dce80_resource.c

157

.reg_name = mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dce80/dce80_resource.c

614

#define SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dce80/dce80_resource.c

615

.reg_name[id] = mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

116

#define SRI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

117

.reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

118

mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

121

#define SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

122

.reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

123

mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

125

#define VUPDATE_SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

126

.reg_name[id] = BASE(mm ## reg_name ## 0 ## _ ## block ## id ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

127

mm ## reg_name ## 0 ## _ ## block ## id

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

132

#define SRI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

133

.reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

134

mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

136

#define SRI2_DWB(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

142

#define SF_DWB2(reg_name, block, id, field_name, post_fix) \

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

145

#define SRIR(var_name, reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

146

.var_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

147

mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

149

#define SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

150

.reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

151

mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

153

#define DCCG_SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

154

.block ## _ ## reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

155

mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

157

#define VUPDATE_SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

158

.reg_name[id] = BASE(mm ## reg_name ## _ ## block ## id ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

159

mm ## reg_name ## _ ## block ## id

sys/dev/pci/drm/amd/display/dc/resource/dcn201/dcn201_resource.c

255

#define SRI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn201/dcn201_resource.c

256

.reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn201/dcn201_resource.c

257

mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn201/dcn201_resource.c

259

#define SRIR(var_name, reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn201/dcn201_resource.c

260

.var_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn201/dcn201_resource.c

261

mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn201/dcn201_resource.c

263

#define SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn201/dcn201_resource.c

264

.reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn201/dcn201_resource.c

265

mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn201/dcn201_resource.c

267

#define SRI_IX(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn201/dcn201_resource.c

268

.reg_name = ix ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn201/dcn201_resource.c

270

#define DCCG_SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn201/dcn201_resource.c

271

.block ## _ ## reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn201/dcn201_resource.c

272

mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn201/dcn201_resource.c

274

#define VUPDATE_SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn201/dcn201_resource.c

275

.reg_name[id] = BASE(mm ## reg_name ## _ ## block ## id ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn201/dcn201_resource.c

276

mm ## reg_name ## _ ## block ## id

sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

105

#define SRI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

106

.reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

107

mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

109

#define SRIR(var_name, reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

110

.var_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

111

mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

113

#define SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

114

.reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

115

mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

117

#define DCCG_SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

118

.block ## _ ## reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

119

mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

121

#define VUPDATE_SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

122

.reg_name[id] = BASE(mm ## reg_name ## _ ## block ## id ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

123

mm ## reg_name ## _ ## block ## id

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

121

#define SRI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

122

.reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

123

mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

125

#define SRI2(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

129

#define SRIR(var_name, reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

130

.var_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

131

mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

133

#define SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

134

.reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

135

mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

137

#define SRII_MPC_RMU(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

138

.RMU##_##reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

139

mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

141

#define SRII_DWB(reg_name, temp_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

142

.reg_name[id] = BASE(mm ## block ## id ## _ ## temp_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

143

mm ## block ## id ## _ ## temp_name

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

145

#define SF_DWB2(reg_name, block, id, field_name, post_fix) \

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

148

#define DCCG_SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

149

.block ## _ ## reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

150

mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

152

#define VUPDATE_SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

153

.reg_name[id] = BASE(mm ## reg_name ## _ ## block ## id ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

154

mm ## reg_name ## _ ## block ## id

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

185

#define CLK_SRI(reg_name, block, inst)\

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

186

.reg_name = CLK_BASE(mm ## block ## _ ## inst ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

187

mm ## block ## _ ## inst ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

120

#define SRI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

121

.reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

122

mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

124

#define SRI2(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

128

#define SRIR(var_name, reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

129

.var_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

130

mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

132

#define SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

133

.reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

134

mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

141

#define SRII_MPC_RMU(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

142

.RMU##_##reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

143

mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

145

#define SRII_DWB(reg_name, temp_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

146

.reg_name[id] = BASE(mm ## block ## id ## _ ## temp_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

147

mm ## block ## id ## _ ## temp_name

sys/dev/pci/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

149

#define SF_DWB2(reg_name, block, id, field_name, post_fix) \

sys/dev/pci/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

152

#define DCCG_SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

153

.block ## _ ## reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

154

mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

156

#define VUPDATE_SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

157

.reg_name[id] = BASE(mm ## reg_name ## _ ## block ## id ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

158

mm ## reg_name ## _ ## block ## id

sys/dev/pci/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

189

#define CLK_SRI(reg_name, block, inst)\

sys/dev/pci/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

190

.reg_name = CLK_BASE(mm ## block ## _ ## inst ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

191

mm ## block ## _ ## inst ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

182

#define SRI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

183

.reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

185

#define SRI2(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

188

#define SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

189

.reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

190

mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

192

#define DCCG_SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

193

.block ## _ ## reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

194

mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

196

#define VUPDATE_SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

197

.reg_name[id] = BASE(mm ## reg_name ## _ ## block ## id ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

198

mm ## reg_name ## _ ## block ## id

sys/dev/pci/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

200

#define SRII_DWB(reg_name, temp_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

201

.reg_name[id] = BASE(mm ## block ## id ## _ ## temp_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

202

mm ## block ## id ## _ ## temp_name

sys/dev/pci/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

204

#define SF_DWB2(reg_name, block, id, field_name, post_fix) \

sys/dev/pci/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

207

#define SRII_MPC_RMU(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

208

.RMU##_##reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

209

mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

178

#define SRI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

179

.reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

181

#define SRI2(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

184

#define SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

185

.reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

186

mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

188

#define DCCG_SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

189

.block ## _ ## reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

190

mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

192

#define VUPDATE_SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

193

.reg_name[id] = BASE(mm ## reg_name ## _ ## block ## id ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

194

mm ## reg_name ## _ ## block ## id

sys/dev/pci/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

196

#define SRII_DWB(reg_name, temp_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

197

.reg_name[id] = BASE(mm ## block ## id ## _ ## temp_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

198

mm ## block ## id ## _ ## temp_name

sys/dev/pci/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

200

#define SF_DWB2(reg_name, block, id, field_name, post_fix) \

sys/dev/pci/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

203

#define SRII_MPC_RMU(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

204

.RMU##_##reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

205

mm ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

132

#define SRI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

133

.reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

134

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

136

#define SRI2(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

140

#define SRIR(var_name, reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

141

.var_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

142

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

144

#define SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

145

.reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

146

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

148

#define SRII_MPC_RMU(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

149

.RMU##_##reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

150

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

152

#define SRII_DWB(reg_name, temp_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

153

.reg_name[id] = BASE(reg ## block ## id ## _ ## temp_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

154

reg ## block ## id ## _ ## temp_name

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

156

#define SF_DWB2(reg_name, block, id, field_name, post_fix) \

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

159

#define DCCG_SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

160

.block ## _ ## reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

161

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

163

#define VUPDATE_SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

164

.reg_name[id] = BASE(reg ## reg_name ## _ ## block ## id ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

165

reg ## reg_name ## _ ## block ## id

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

196

#define CLK_SRI(reg_name, block, inst)\

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

197

.reg_name = CLK_BASE(reg ## block ## _ ## inst ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

198

reg ## block ## _ ## inst ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

149

#define SRI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

150

.reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

151

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

153

#define SRI2(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

157

#define SRIR(var_name, reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

158

.var_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

159

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

161

#define SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

162

.reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

163

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

165

#define SRII_MPC_RMU(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

166

.RMU##_##reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

167

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

169

#define SRII_DWB(reg_name, temp_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

170

.reg_name[id] = BASE(reg ## block ## id ## _ ## temp_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

171

reg ## block ## id ## _ ## temp_name

sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

173

#define SF_DWB2(reg_name, block, id, field_name, post_fix) \

sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

176

#define DCCG_SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

177

.block ## _ ## reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

178

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

180

#define VUPDATE_SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

181

.reg_name[id] = BASE(reg ## reg_name ## _ ## block ## id ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

182

reg ## reg_name ## _ ## block ## id

sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

213

#define CLK_SRI(reg_name, block, inst)\

sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

214

.reg_name = CLK_BASE(reg ## block ## _ ## inst ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

215

reg ## block ## _ ## inst ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

166

#define SRI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

167

.reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

168

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

170

#define SRI2(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

174

#define SRIR(var_name, reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

175

.var_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

176

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

178

#define SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

179

.reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

180

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

182

#define SRII_MPC_RMU(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

183

.RMU##_##reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

184

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

186

#define SRII_DWB(reg_name, temp_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

187

.reg_name[id] = BASE(reg ## block ## id ## _ ## temp_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

188

reg ## block ## id ## _ ## temp_name

sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

190

#define SF_DWB2(reg_name, block, id, field_name, post_fix) \

sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

193

#define DCCG_SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

194

.block ## _ ## reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

195

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

197

#define VUPDATE_SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

198

.reg_name[id] = BASE(reg ## reg_name ## _ ## block ## id ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

199

reg ## reg_name ## _ ## block ## id

sys/dev/pci/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

152

#define SRI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

153

.reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

154

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

156

#define SRI2(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

160

#define SRIR(var_name, reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

161

.var_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

162

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

164

#define SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

165

.reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

166

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

168

#define SRII_MPC_RMU(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

169

.RMU##_##reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

170

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

172

#define SRII_DWB(reg_name, temp_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

173

.reg_name[id] = BASE(reg ## block ## id ## _ ## temp_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

174

reg ## block ## id ## _ ## temp_name

sys/dev/pci/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

176

#define SF_DWB2(reg_name, block, id, field_name, post_fix) \

sys/dev/pci/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

179

#define DCCG_SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

180

.block ## _ ## reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

181

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

183

#define VUPDATE_SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

184

.reg_name[id] = BASE(reg ## reg_name ## _ ## block ## id ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

185

reg ## reg_name ## _ ## block ## id

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

126

#define SRI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

127

REG_STRUCT.reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

128

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

130

#define SRI_ARR(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

131

REG_STRUCT[id].reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

132

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

137

#define SRI_ARR_I2C(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

138

REG_STRUCT[id-1].reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

139

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

141

#define SRI_ARR_ALPHABET(reg_name, block, index, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

142

REG_STRUCT[index].reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

143

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

145

#define SRI2(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

148

#define SRI2_ARR(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

152

#define SRIR(var_name, reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

153

.var_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

154

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

156

#define SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

157

REG_STRUCT.reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

158

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

160

#define SRII_ARR_2(reg_name, block, id, inst)\

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

161

REG_STRUCT[inst].reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

162

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

164

#define SRII_MPC_RMU(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

165

.RMU##_##reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

166

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

168

#define SRII_DWB(reg_name, temp_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

169

REG_STRUCT.reg_name[id] = BASE(reg ## block ## id ## _ ## temp_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

170

reg ## block ## id ## _ ## temp_name

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

172

#define SF_DWB2(reg_name, block, id, field_name, post_fix) \

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

175

#define DCCG_SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

176

REG_STRUCT.block ## _ ## reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

177

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

179

#define VUPDATE_SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

180

REG_STRUCT.reg_name[id] = BASE(reg ## reg_name ## _ ## block ## id ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

181

reg ## reg_name ## _ ## block ## id

sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

126

#define SRI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

127

REG_STRUCT.reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

128

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

130

#define SRI_ARR(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

131

REG_STRUCT[id].reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

132

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

137

#define SRI_ARR_I2C(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

138

REG_STRUCT[id-1].reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

139

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

141

#define SRI_ARR_ALPHABET(reg_name, block, index, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

142

REG_STRUCT[index].reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

143

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

145

#define SRI2(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

148

#define SRI2_ARR(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

152

#define SRIR(var_name, reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

153

.var_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

154

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

156

#define SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

157

REG_STRUCT.reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

158

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

160

#define SRII_ARR_2(reg_name, block, id, inst)\

sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

161

REG_STRUCT[inst].reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

162

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

164

#define SRII_MPC_RMU(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

165

.RMU##_##reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

166

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

168

#define SRII_DWB(reg_name, temp_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

169

REG_STRUCT.reg_name[id] = BASE(reg ## block ## id ## _ ## temp_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

170

reg ## block ## id ## _ ## temp_name

sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

172

#define DCCG_SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

173

REG_STRUCT.block ## _ ## reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

174

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

176

#define SF_DWB2(reg_name, block, id, field_name, post_fix) \

sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

179

#define VUPDATE_SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

180

REG_STRUCT.reg_name[id] = BASE(reg ## reg_name ## _ ## block ## id ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

181

reg ## reg_name ## _ ## block ## id

sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

141

#define SRI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

142

REG_STRUCT.reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

143

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

145

#define SRI_ARR(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

146

REG_STRUCT[id].reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

147

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

152

#define SRI_ARR_I2C(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

153

REG_STRUCT[id-1].reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

154

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

156

#define SRI_ARR_ALPHABET(reg_name, block, index, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

157

REG_STRUCT[index].reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

158

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

160

#define SRI2(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

164

#define SRI2_ARR(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

168

#define SRIR(var_name, reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

169

.var_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

170

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

172

#define SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

173

REG_STRUCT.reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

174

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

176

#define SRII_ARR_2(reg_name, block, id, inst)\

sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

177

REG_STRUCT[inst].reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

178

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

180

#define SRII_MPC_RMU(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

181

.RMU##_##reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

182

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

184

#define SRII_DWB(reg_name, temp_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

185

REG_STRUCT.reg_name[id] = BASE(reg ## block ## id ## _ ## temp_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

186

reg ## block ## id ## _ ## temp_name

sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

188

#define SF_DWB2(reg_name, block, id, field_name, post_fix) \

sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

191

#define DCCG_SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

192

REG_STRUCT.block ## _ ## reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

193

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

195

#define VUPDATE_SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

196

REG_STRUCT.reg_name[id] = BASE(reg ## reg_name ## _ ## block ## id ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

197

reg ## reg_name ## _ ## block ## id

sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

121

#define SRI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

122

REG_STRUCT.reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

123

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

125

#define SRI_ARR(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

126

REG_STRUCT[id].reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

127

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

132

#define SRI_ARR_I2C(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

133

REG_STRUCT[id-1].reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

134

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

136

#define SRI_ARR_ALPHABET(reg_name, block, index, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

137

REG_STRUCT[index].reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

138

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

140

#define SRI2(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

144

#define SRI2_ARR(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

148

#define SRIR(var_name, reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

149

.var_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

150

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

152

#define SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

153

REG_STRUCT.reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

154

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

156

#define SRII_ARR_2(reg_name, block, id, inst)\

sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

157

REG_STRUCT[inst].reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

158

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

160

#define SRII_MPC_RMU(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

161

.RMU##_##reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

162

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

164

#define SRII_DWB(reg_name, temp_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

165

REG_STRUCT.reg_name[id] = BASE(reg ## block ## id ## _ ## temp_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

166

reg ## block ## id ## _ ## temp_name

sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

168

#define SF_DWB2(reg_name, block, id, field_name, post_fix) \

sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

171

#define DCCG_SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

172

REG_STRUCT.block ## _ ## reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

173

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

175

#define VUPDATE_SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

176

REG_STRUCT.reg_name[id] = BASE(reg ## reg_name ## _ ## block ## id ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

177

reg ## reg_name ## _ ## block ## id

sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

126

#define SRI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

127

REG_STRUCT.reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

128

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

130

#define SRI_ARR(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

131

REG_STRUCT[id].reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

132

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

137

#define SRI_ARR_I2C(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

138

REG_STRUCT[id-1].reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

139

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

141

#define SRI_ARR_ALPHABET(reg_name, block, index, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

142

REG_STRUCT[index].reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

143

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

145

#define SRI2(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

149

#define SRI2_ARR(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

153

#define SRIR(var_name, reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

154

.var_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

155

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

157

#define SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

158

REG_STRUCT.reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

159

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

161

#define SRII_ARR_2(reg_name, block, id, inst)\

sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

162

REG_STRUCT[inst].reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

163

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

165

#define SRII_MPC_RMU(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

166

.RMU##_##reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

167

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

169

#define SRII_DWB(reg_name, temp_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

170

REG_STRUCT.reg_name[id] = BASE(reg ## block ## id ## _ ## temp_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

171

reg ## block ## id ## _ ## temp_name

sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

173

#define SF_DWB2(reg_name, block, id, field_name, post_fix) \

sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

176

#define DCCG_SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

177

REG_STRUCT.block ## _ ## reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

178

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

180

#define VUPDATE_SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

181

REG_STRUCT.reg_name[id] = BASE(reg ## reg_name ## _ ## block ## id ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

182

reg ## reg_name ## _ ## block ## id

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

107

#define SRI(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

108

REG_STRUCT.reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

109

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

111

#define SRI_ARR(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

112

REG_STRUCT[id].reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

113

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

118

#define SRI_ARR_US(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

119

REG_STRUCT[id].reg_name = BASE(reg ## block ## id ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

120

reg ## block ## id ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

124

#define SRI_ARR_I2C(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

125

REG_STRUCT[id-1].reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

126

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

128

#define SRI_ARR_ALPHABET(reg_name, block, index, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

129

REG_STRUCT[index].reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

130

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

132

#define SRI2(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

135

#define SRI2_ARR(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

139

#define SRIR(var_name, reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

140

.var_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

141

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

143

#define SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

144

REG_STRUCT.reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

145

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

147

#define SRII_ARR_2(reg_name, block, id, inst)\

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

148

REG_STRUCT[inst].reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

149

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

151

#define SRII_MPC_RMU(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

152

.RMU##_##reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

153

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

155

#define SRII_DWB(reg_name, temp_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

156

REG_STRUCT.reg_name[id] = BASE(reg ## block ## id ## _ ## temp_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

157

reg ## block ## id ## _ ## temp_name

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

159

#define DCCG_SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

160

REG_STRUCT.block ## _ ## reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

161

reg ## block ## id ## _ ## reg_name

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

163

#define SF_DWB2(reg_name, block, id, field_name, post_fix) \

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

166

#define VUPDATE_SRII(reg_name, block, id)\

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

167

REG_STRUCT.reg_name[id] = BASE(reg ## reg_name ## _ ## block ## id ## _BASE_IDX) + \

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

168

reg ## reg_name ## _ ## block ## id

sys/dev/pci/drm/amd/include/kgd_pp_interface.h

344

#define PP_CG_MSG_ID(group, block, support, state) \

sys/dev/pci/drm/amd/include/kgd_pp_interface.h

345

((group) << PP_GROUP_SHIFT | (block) << PP_BLOCK_SHIFT | \

sys/dev/pci/drm/drm_buddy.c

1011

struct drm_buddy_block *block;

sys/dev/pci/drm/drm_buddy.c

1020

block = list_first_entry(blocks,

sys/dev/pci/drm/drm_buddy.c

1024

block_start = drm_buddy_block_offset(block);

sys/dev/pci/drm/drm_buddy.c

1025

block_end = block_start + drm_buddy_block_size(mm, block);

sys/dev/pci/drm/drm_buddy.c

1027

if (WARN_ON(!drm_buddy_block_is_allocated(block)))

sys/dev/pci/drm/drm_buddy.c

103

struct drm_buddy_block *block,

sys/dev/pci/drm/drm_buddy.c

1030

if (new_size > drm_buddy_block_size(mm, block))

sys/dev/pci/drm/drm_buddy.c

1036

if (new_size == drm_buddy_block_size(mm, block))

sys/dev/pci/drm/drm_buddy.c

1053

list_del(&block->link);

sys/dev/pci/drm/drm_buddy.c

1054

mark_free(mm, block);

sys/dev/pci/drm/drm_buddy.c

1055

mm->avail += drm_buddy_block_size(mm, block);

sys/dev/pci/drm/drm_buddy.c

1056

if (drm_buddy_block_is_clear(block))

sys/dev/pci/drm/drm_buddy.c

1057

mm->clear_avail += drm_buddy_block_size(mm, block);

sys/dev/pci/drm/drm_buddy.c

106

rb_add(&block->rb,

sys/dev/pci/drm/drm_buddy.c

1060

parent = block->parent;

sys/dev/pci/drm/drm_buddy.c

1061

block->parent = NULL;

sys/dev/pci/drm/drm_buddy.c

1063

list_add(&block->tmp_link, &dfs);

sys/dev/pci/drm/drm_buddy.c

1066

mark_allocated(mm, block);

sys/dev/pci/drm/drm_buddy.c

1067

mm->avail -= drm_buddy_block_size(mm, block);

sys/dev/pci/drm/drm_buddy.c

1068

if (drm_buddy_block_is_clear(block))

sys/dev/pci/drm/drm_buddy.c

1069

mm->clear_avail -= drm_buddy_block_size(mm, block);

sys/dev/pci/drm/drm_buddy.c

107

&mm->free_trees[tree][drm_buddy_block_order(block)],

sys/dev/pci/drm/drm_buddy.c

1070

list_add(&block->link, blocks);

sys/dev/pci/drm/drm_buddy.c

1073

block->parent = parent;

sys/dev/pci/drm/drm_buddy.c

1119

struct drm_buddy_block *block = NULL;

sys/dev/pci/drm/drm_buddy.c

112

struct drm_buddy_block *block)

sys/dev/pci/drm/drm_buddy.c

114

unsigned int order = drm_buddy_block_order(block);

sys/dev/pci/drm/drm_buddy.c

118

tree = get_block_tree(block);

sys/dev/pci/drm/drm_buddy.c

1183

block = __drm_buddy_alloc_blocks(mm, start,

sys/dev/pci/drm/drm_buddy.c

1187

if (!IS_ERR(block))

sys/dev/pci/drm/drm_buddy.c

1194

block = __drm_buddy_alloc_blocks(mm, start,

sys/dev/pci/drm/drm_buddy.c

1198

if (!IS_ERR(block)) {

sys/dev/pci/drm/drm_buddy.c

121

rb_erase(&block->rb, root);

sys/dev/pci/drm/drm_buddy.c

1219

mark_allocated(mm, block);

sys/dev/pci/drm/drm_buddy.c

122

RB_CLEAR_NODE(&block->rb);

sys/dev/pci/drm/drm_buddy.c

1220

mm->avail -= drm_buddy_block_size(mm, block);

sys/dev/pci/drm/drm_buddy.c

1221

if (drm_buddy_block_is_clear(block))

sys/dev/pci/drm/drm_buddy.c

1222

mm->clear_avail -= drm_buddy_block_size(mm, block);

sys/dev/pci/drm/drm_buddy.c

1223

kmemleak_update_trace(block);

sys/dev/pci/drm/drm_buddy.c

1224

list_add_tail(&block->link, &allocated);

sys/dev/pci/drm/drm_buddy.c

1243

block = list_last_entry(&allocated, typeof(*block), link);

sys/dev/pci/drm/drm_buddy.c

1244

list_move(&block->link, &temp);

sys/dev/pci/drm/drm_buddy.c

1246

trim_size = drm_buddy_block_size(mm, block) -

sys/dev/pci/drm/drm_buddy.c

125

static void clear_reset(struct drm_buddy_block *block)

sys/dev/pci/drm/drm_buddy.c

127

block->header &= ~DRM_BUDDY_HEADER_CLEAR;

sys/dev/pci/drm/drm_buddy.c

1276

struct drm_buddy_block *block,

sys/dev/pci/drm/drm_buddy.c

1279

u64 start = drm_buddy_block_offset(block);

sys/dev/pci/drm/drm_buddy.c

1280

u64 size = drm_buddy_block_size(mm, block);

sys/dev/pci/drm/drm_buddy.c

130

static void mark_cleared(struct drm_buddy_block *block)

sys/dev/pci/drm/drm_buddy.c

1300

struct drm_buddy_block *block, *tmp;

sys/dev/pci/drm/drm_buddy.c

1308

rbtree_postorder_for_each_entry_safe(block, tmp, root, rb) {

sys/dev/pci/drm/drm_buddy.c

1309

BUG_ON(!drm_buddy_block_is_free(block));

sys/dev/pci/drm/drm_buddy.c

132

block->header |= DRM_BUDDY_HEADER_CLEAR;

sys/dev/pci/drm/drm_buddy.c

136

struct drm_buddy_block *block)

sys/dev/pci/drm/drm_buddy.c

138

block->header &= ~DRM_BUDDY_HEADER_STATE;

sys/dev/pci/drm/drm_buddy.c

139

block->header |= DRM_BUDDY_ALLOCATED;

sys/dev/pci/drm/drm_buddy.c

141

rbtree_remove(mm, block);

sys/dev/pci/drm/drm_buddy.c

145

struct drm_buddy_block *block)

sys/dev/pci/drm/drm_buddy.c

149

block->header &= ~DRM_BUDDY_HEADER_STATE;

sys/dev/pci/drm/drm_buddy.c

150

block->header |= DRM_BUDDY_FREE;

sys/dev/pci/drm/drm_buddy.c

152

tree = get_block_tree(block);

sys/dev/pci/drm/drm_buddy.c

153

rbtree_insert(mm, block, tree);

sys/dev/pci/drm/drm_buddy.c

157

struct drm_buddy_block *block)

sys/dev/pci/drm/drm_buddy.c

159

block->header &= ~DRM_BUDDY_HEADER_STATE;

sys/dev/pci/drm/drm_buddy.c

160

block->header |= DRM_BUDDY_SPLIT;

sys/dev/pci/drm/drm_buddy.c

162

rbtree_remove(mm, block);

sys/dev/pci/drm/drm_buddy.c

176

__get_buddy(struct drm_buddy_block *block)

sys/dev/pci/drm/drm_buddy.c

180

parent = block->parent;

sys/dev/pci/drm/drm_buddy.c

184

if (parent->left == block)

sys/dev/pci/drm/drm_buddy.c

191

struct drm_buddy_block *block,

sys/dev/pci/drm/drm_buddy.c

197

while ((parent = block->parent)) {

sys/dev/pci/drm/drm_buddy.c

200

buddy = __get_buddy(block);

sys/dev/pci/drm/drm_buddy.c

210

if (drm_buddy_block_is_clear(block) !=

sys/dev/pci/drm/drm_buddy.c

214

if (drm_buddy_block_is_clear(block))

sys/dev/pci/drm/drm_buddy.c

222

drm_block_free(mm, block);

sys/dev/pci/drm/drm_buddy.c

225

block = parent;

sys/dev/pci/drm/drm_buddy.c

228

order = drm_buddy_block_order(block);

sys/dev/pci/drm/drm_buddy.c

229

mark_free(mm, block);

sys/dev/pci/drm/drm_buddy.c

253

struct drm_buddy_block *block, *buddy;

sys/dev/pci/drm/drm_buddy.c

256

block = rbtree_get_free_block(iter);

sys/dev/pci/drm/drm_buddy.c

259

if (!block || !block->parent)

sys/dev/pci/drm/drm_buddy.c

262

block_start = drm_buddy_block_offset(block);

sys/dev/pci/drm/drm_buddy.c

263

block_end = block_start + drm_buddy_block_size(mm, block) - 1;

sys/dev/pci/drm/drm_buddy.c

268

buddy = __get_buddy(block);

sys/dev/pci/drm/drm_buddy.c

272

WARN_ON(drm_buddy_block_is_clear(block) ==

sys/dev/pci/drm/drm_buddy.c

282

rbtree_remove(mm, block);

sys/dev/pci/drm/drm_buddy.c

283

if (drm_buddy_block_is_clear(block))

sys/dev/pci/drm/drm_buddy.c

284

mm->clear_avail -= drm_buddy_block_size(mm, block);

sys/dev/pci/drm/drm_buddy.c

286

order = __drm_buddy_free(mm, block, true);

sys/dev/pci/drm/drm_buddy.c

33

struct drm_buddy_block *block;

sys/dev/pci/drm/drm_buddy.c

38

block = kmem_cache_zalloc(slab_blocks, GFP_KERNEL);

sys/dev/pci/drm/drm_buddy.c

40

block = pool_get(&slab_blocks, PR_WAITOK | PR_ZERO);

sys/dev/pci/drm/drm_buddy.c

42

if (!block)

sys/dev/pci/drm/drm_buddy.c

438

struct drm_buddy_block *block)

sys/dev/pci/drm/drm_buddy.c

440

unsigned int block_order = drm_buddy_block_order(block) - 1;

sys/dev/pci/drm/drm_buddy.c

441

u64 offset = drm_buddy_block_offset(block);

sys/dev/pci/drm/drm_buddy.c

443

BUG_ON(!drm_buddy_block_is_free(block));

sys/dev/pci/drm/drm_buddy.c

444

BUG_ON(!drm_buddy_block_order(block));

sys/dev/pci/drm/drm_buddy.c

446

block->left = drm_block_alloc(mm, block, block_order, offset);

sys/dev/pci/drm/drm_buddy.c

447

if (!block->left)

sys/dev/pci/drm/drm_buddy.c

45

block->header = offset;

sys/dev/pci/drm/drm_buddy.c

450

block->right = drm_block_alloc(mm, block, block_order,

sys/dev/pci/drm/drm_buddy.c

452

if (!block->right) {

sys/dev/pci/drm/drm_buddy.c

453

drm_block_free(mm, block->left);

sys/dev/pci/drm/drm_buddy.c

457

mark_split(mm, block);

sys/dev/pci/drm/drm_buddy.c

459

if (drm_buddy_block_is_clear(block)) {

sys/dev/pci/drm/drm_buddy.c

46

block->header |= order;

sys/dev/pci/drm/drm_buddy.c

460

mark_cleared(block->left);

sys/dev/pci/drm/drm_buddy.c

461

mark_cleared(block->right);

sys/dev/pci/drm/drm_buddy.c

462

clear_reset(block);

sys/dev/pci/drm/drm_buddy.c

465

mark_free(mm, block->left);

sys/dev/pci/drm/drm_buddy.c

466

mark_free(mm, block->right);

sys/dev/pci/drm/drm_buddy.c

47

block->parent = parent;

sys/dev/pci/drm/drm_buddy.c

482

drm_get_buddy(struct drm_buddy_block *block)

sys/dev/pci/drm/drm_buddy.c

484

return __get_buddy(block);

sys/dev/pci/drm/drm_buddy.c

49

RB_CLEAR_NODE(&block->rb);

sys/dev/pci/drm/drm_buddy.c

51

BUG_ON(block->header & DRM_BUDDY_HEADER_UNUSED);

sys/dev/pci/drm/drm_buddy.c

519

struct drm_buddy_block *block, *tmp;

sys/dev/pci/drm/drm_buddy.c

52

return block;

sys/dev/pci/drm/drm_buddy.c

521

rbtree_postorder_for_each_entry_safe(block, tmp, root, rb) {

sys/dev/pci/drm/drm_buddy.c

522

rbtree_remove(mm, block);

sys/dev/pci/drm/drm_buddy.c

524

mark_cleared(block);

sys/dev/pci/drm/drm_buddy.c

525

mm->clear_avail += drm_buddy_block_size(mm, block);

sys/dev/pci/drm/drm_buddy.c

527

clear_reset(block);

sys/dev/pci/drm/drm_buddy.c

528

mm->clear_avail -= drm_buddy_block_size(mm, block);

sys/dev/pci/drm/drm_buddy.c

531

rbtree_insert(mm, block, dst_tree);

sys/dev/pci/drm/drm_buddy.c

544

struct drm_buddy_block *block)

sys/dev/pci/drm/drm_buddy.c

546

BUG_ON(!drm_buddy_block_is_allocated(block));

sys/dev/pci/drm/drm_buddy.c

547

mm->avail += drm_buddy_block_size(mm, block);

sys/dev/pci/drm/drm_buddy.c

548

if (drm_buddy_block_is_clear(block))

sys/dev/pci/drm/drm_buddy.c

549

mm->clear_avail += drm_buddy_block_size(mm, block);

sys/dev/pci/drm/drm_buddy.c

551

__drm_buddy_free(mm, block, false);

sys/dev/pci/drm/drm_buddy.c

56

struct drm_buddy_block *block)

sys/dev/pci/drm/drm_buddy.c

560

struct drm_buddy_block *block, *on;

sys/dev/pci/drm/drm_buddy.c

564

list_for_each_entry_safe(block, on, objects, link) {

sys/dev/pci/drm/drm_buddy.c

566

mark_cleared(block);

sys/dev/pci/drm/drm_buddy.c

568

clear_reset(block);

sys/dev/pci/drm/drm_buddy.c

569

drm_buddy_free_block(mm, block);

sys/dev/pci/drm/drm_buddy.c

59

kmem_cache_free(slab_blocks, block);

sys/dev/pci/drm/drm_buddy.c

603

static bool block_incompatible(struct drm_buddy_block *block, unsigned int flags)

sys/dev/pci/drm/drm_buddy.c

607

return needs_clear != drm_buddy_block_is_clear(block);

sys/dev/pci/drm/drm_buddy.c

61

pool_put(&slab_blocks, block);

sys/dev/pci/drm/drm_buddy.c

618

struct drm_buddy_block *block;

sys/dev/pci/drm/drm_buddy.c

633

block = list_first_entry_or_null(&dfs,

sys/dev/pci/drm/drm_buddy.c

636

if (!block)

sys/dev/pci/drm/drm_buddy.c

639

list_del(&block->tmp_link);

sys/dev/pci/drm/drm_buddy.c

641

if (drm_buddy_block_order(block) < order)

sys/dev/pci/drm/drm_buddy.c

644

block_start = drm_buddy_block_offset(block);

sys/dev/pci/drm/drm_buddy.c

645

block_end = block_start + drm_buddy_block_size(mm, block) - 1;

sys/dev/pci/drm/drm_buddy.c

650

if (drm_buddy_block_is_allocated(block))

sys/dev/pci/drm/drm_buddy.c

66

get_block_tree(struct drm_buddy_block *block)

sys/dev/pci/drm/drm_buddy.c

662

if (!fallback && block_incompatible(block, flags))

sys/dev/pci/drm/drm_buddy.c

666

order == drm_buddy_block_order(block)) {

sys/dev/pci/drm/drm_buddy.c

670

if (drm_buddy_block_is_free(block))

sys/dev/pci/drm/drm_buddy.c

671

return block;

sys/dev/pci/drm/drm_buddy.c

676

if (!drm_buddy_block_is_split(block)) {

sys/dev/pci/drm/drm_buddy.c

677

err = split_block(mm, block);

sys/dev/pci/drm/drm_buddy.c

68

return drm_buddy_block_is_clear(block) ?

sys/dev/pci/drm/drm_buddy.c

682

list_add(&block->right->tmp_link, &dfs);

sys/dev/pci/drm/drm_buddy.c

683

list_add(&block->left->tmp_link, &dfs);

sys/dev/pci/drm/drm_buddy.c

694

buddy = __get_buddy(block);

sys/dev/pci/drm/drm_buddy.c

696

(drm_buddy_block_is_free(block) &&

sys/dev/pci/drm/drm_buddy.c

698

__drm_buddy_free(mm, block, false);

sys/dev/pci/drm/drm_buddy.c

708

struct drm_buddy_block *block;

sys/dev/pci/drm/drm_buddy.c

711

block = __alloc_range_bias(mm, start, end, order,

sys/dev/pci/drm/drm_buddy.c

713

if (IS_ERR(block))

sys/dev/pci/drm/drm_buddy.c

717

return block;

sys/dev/pci/drm/drm_buddy.c

725

struct drm_buddy_block *max_block = NULL, *block = NULL;

sys/dev/pci/drm/drm_buddy.c

731

block = rbtree_last_free_block(root);

sys/dev/pci/drm/drm_buddy.c

732

if (!block)

sys/dev/pci/drm/drm_buddy.c

736

max_block = block;

sys/dev/pci/drm/drm_buddy.c

740

if (drm_buddy_block_offset(block) >

sys/dev/pci/drm/drm_buddy.c

742

max_block = block;

sys/dev/pci/drm/drm_buddy.c

754

struct drm_buddy_block *block = NULL;

sys/dev/pci/drm/drm_buddy.c

764

block = get_maxblock(mm, order, tree);

sys/dev/pci/drm/drm_buddy.c

765

if (block)

sys/dev/pci/drm/drm_buddy.c

767

tmp = drm_buddy_block_order(block);

sys/dev/pci/drm/drm_buddy.c

772

block = rbtree_last_free_block(root);

sys/dev/pci/drm/drm_buddy.c

773

if (block)

sys/dev/pci/drm/drm_buddy.c

778

if (!block) {

sys/dev/pci/drm/drm_buddy.c

785

block = rbtree_last_free_block(root);

sys/dev/pci/drm/drm_buddy.c

786

if (block)

sys/dev/pci/drm/drm_buddy.c

790

if (!block)

sys/dev/pci/drm/drm_buddy.c

794

BUG_ON(!drm_buddy_block_is_free(block));

sys/dev/pci/drm/drm_buddy.c

797

err = split_block(mm, block);

sys/dev/pci/drm/drm_buddy.c

801

block = block->right;

sys/dev/pci/drm/drm_buddy.c

804

return block;

sys/dev/pci/drm/drm_buddy.c

808

__drm_buddy_free(mm, block, false);

sys/dev/pci/drm/drm_buddy.c

818

struct drm_buddy_block *block;

sys/dev/pci/drm/drm_buddy.c

831

block = list_first_entry_or_null(dfs,

sys/dev/pci/drm/drm_buddy.c

834

if (!block)

sys/dev/pci/drm/drm_buddy.c

837

list_del(&block->tmp_link);

sys/dev/pci/drm/drm_buddy.c

839

block_start = drm_buddy_block_offset(block);

sys/dev/pci/drm/drm_buddy.c

840

block_end = block_start + drm_buddy_block_size(mm, block) - 1;

sys/dev/pci/drm/drm_buddy.c

845

if (drm_buddy_block_is_allocated(block)) {

sys/dev/pci/drm/drm_buddy.c

851

if (drm_buddy_block_is_free(block)) {

sys/dev/pci/drm/drm_buddy.c

852

mark_allocated(mm, block);

sys/dev/pci/drm/drm_buddy.c

853

total_allocated += drm_buddy_block_size(mm, block);

sys/dev/pci/drm/drm_buddy.c

854

mm->avail -= drm_buddy_block_size(mm, block);

sys/dev/pci/drm/drm_buddy.c

855

if (drm_buddy_block_is_clear(block))

sys/dev/pci/drm/drm_buddy.c

856

mm->clear_avail -= drm_buddy_block_size(mm, block);

sys/dev/pci/drm/drm_buddy.c

857

list_add_tail(&block->link, &allocated);

sys/dev/pci/drm/drm_buddy.c

865

if (!drm_buddy_block_is_split(block)) {

sys/dev/pci/drm/drm_buddy.c

866

err = split_block(mm, block);

sys/dev/pci/drm/drm_buddy.c

871

list_add(&block->right->tmp_link, dfs);

sys/dev/pci/drm/drm_buddy.c

872

list_add(&block->left->tmp_link, dfs);

sys/dev/pci/drm/drm_buddy.c

89

static bool drm_buddy_block_offset_less(const struct drm_buddy_block *block,

sys/dev/pci/drm/drm_buddy.c

890

buddy = __get_buddy(block);

sys/dev/pci/drm/drm_buddy.c

892

(drm_buddy_block_is_free(block) &&

sys/dev/pci/drm/drm_buddy.c

894

__drm_buddy_free(mm, block, false);

sys/dev/pci/drm/drm_buddy.c

92

return drm_buddy_block_offset(block) < drm_buddy_block_offset(node);

sys/dev/pci/drm/drm_buddy.c

929

struct drm_buddy_block *block;

sys/dev/pci/drm/drm_buddy.c

95

static bool rbtree_block_offset_less(struct rb_node *block,

sys/dev/pci/drm/drm_buddy.c

952

block = rbtree_get_free_block(iter);

sys/dev/pci/drm/drm_buddy.c

955

rhs_offset = drm_buddy_block_offset(block);

sys/dev/pci/drm/drm_buddy.c

966

lhs_offset = drm_buddy_block_offset(block) - lhs_size;

sys/dev/pci/drm/drm_buddy.c

98

return drm_buddy_block_offset_less(rbtree_get_free_block(block),

sys/dev/pci/drm/drm_displayid.c

117

const struct displayid_block *block;

sys/dev/pci/drm/drm_displayid.c

122

block = (const struct displayid_block *)&iter->section[iter->idx];

sys/dev/pci/drm/drm_displayid.c

124

if (iter->idx + sizeof(*block) <= iter->length &&

sys/dev/pci/drm/drm_displayid.c

125

iter->idx + sizeof(*block) + block->num_bytes <= iter->length)

sys/dev/pci/drm/drm_displayid.c

126

return block;

sys/dev/pci/drm/drm_displayid.c

134

const struct displayid_block *block;

sys/dev/pci/drm/drm_displayid.c

141

block = displayid_iter_block(iter);

sys/dev/pci/drm/drm_displayid.c

142

if (WARN_ON(!block)) {

sys/dev/pci/drm/drm_displayid.c

149

iter->idx += sizeof(*block) + block->num_bytes;

sys/dev/pci/drm/drm_displayid.c

151

block = displayid_iter_block(iter);

sys/dev/pci/drm/drm_displayid.c

152

if (block)

sys/dev/pci/drm/drm_displayid.c

153

return block;

sys/dev/pci/drm/drm_displayid.c

180

block = displayid_iter_block(iter);

sys/dev/pci/drm/drm_displayid.c

181

if (block)

sys/dev/pci/drm/drm_displayid.c

182

return block;

sys/dev/pci/drm/drm_edid.c

1746

const void *block = NULL;

sys/dev/pci/drm/drm_edid.c

1752

block = drm_edid_block_data(iter->drm_edid, iter->index++);

sys/dev/pci/drm/drm_edid.c

1754

return block;

sys/dev/pci/drm/drm_edid.c

1803

const u8 *block = _block;

sys/dev/pci/drm/drm_edid.c

1808

csum += block[i];

sys/dev/pci/drm/drm_edid.c

1817

const struct edid *block = _block;

sys/dev/pci/drm/drm_edid.c

1819

return block->checksum;

sys/dev/pci/drm/drm_edid.c

1824

const u8 *block = _block;

sys/dev/pci/drm/drm_edid.c

1826

return block[0];

sys/dev/pci/drm/drm_edid.c

1869

const struct edid *block = _block;

sys/dev/pci/drm/drm_edid.c

1871

if (!block)

sys/dev/pci/drm/drm_edid.c

1875

int score = drm_edid_header_is_valid(block);

sys/dev/pci/drm/drm_edid.c

1878

if (edid_block_is_zero(block))

sys/dev/pci/drm/drm_edid.c

1888

if (edid_block_compute_checksum(block) != edid_block_get_checksum(block)) {

sys/dev/pci/drm/drm_edid.c

1889

if (edid_block_is_zero(block))

sys/dev/pci/drm/drm_edid.c

1896

if (block->version != 1)

sys/dev/pci/drm/drm_edid.c

1910

static bool edid_block_valid(const void *block, bool base)

sys/dev/pci/drm/drm_edid.c

1912

return edid_block_status_valid(edid_block_check(block, base),

sys/dev/pci/drm/drm_edid.c

1913

edid_block_tag(block));

sys/dev/pci/drm/drm_edid.c

1917

const struct edid *block,

sys/dev/pci/drm/drm_edid.c

1942

if (edid_block_status_valid(status, edid_block_tag(block))) {

sys/dev/pci/drm/drm_edid.c

1944

block_num, edid_block_tag(block),

sys/dev/pci/drm/drm_edid.c

1945

edid_block_compute_checksum(block));

sys/dev/pci/drm/drm_edid.c

1948

block_num, edid_block_tag(block),

sys/dev/pci/drm/drm_edid.c

1949

edid_block_compute_checksum(block));

sys/dev/pci/drm/drm_edid.c

1954

block->version);

sys/dev/pci/drm/drm_edid.c

1963

static void edid_block_dump(const char *level, const void *block, int block_num)

sys/dev/pci/drm/drm_edid.c

1968

status = edid_block_check(block, block_num == 0);

sys/dev/pci/drm/drm_edid.c

1971

else if (!edid_block_status_valid(status, edid_block_tag(block)))

sys/dev/pci/drm/drm_edid.c

1977

block, EDID_LENGTH, false);

sys/dev/pci/drm/drm_edid.c

1987

struct edid *block = _block;

sys/dev/pci/drm/drm_edid.c

1992

if (WARN_ON(!block))

sys/dev/pci/drm/drm_edid.c

1995

status = edid_block_check(block, is_base_block);

sys/dev/pci/drm/drm_edid.c

1998

edid_header_fix(block);

sys/dev/pci/drm/drm_edid.c

2001

status = edid_block_check(block, is_base_block);

sys/dev/pci/drm/drm_edid.c

2018

edid_block_status_print(status, block, block_num);

sys/dev/pci/drm/drm_edid.c

2021

valid = edid_block_status_valid(status, edid_block_tag(block));

sys/dev/pci/drm/drm_edid.c

2025

edid_block_dump(KERN_NOTICE, block, block_num);

sys/dev/pci/drm/drm_edid.c

2047

void *block = (void *)edid_block_data(edid, i);

sys/dev/pci/drm/drm_edid.c

2049

if (!drm_edid_block_valid(block, i, true, NULL))

sys/dev/pci/drm/drm_edid.c

2077

const void *block = drm_edid_block_data(drm_edid, i);

sys/dev/pci/drm/drm_edid.c

2079

if (!edid_block_valid(block, i == 0))

sys/dev/pci/drm/drm_edid.c

2150

drm_do_probe_ddc_edid(void *data, u8 *buf, unsigned int block, size_t len)

sys/dev/pci/drm/drm_edid.c

2153

unsigned char start = block * EDID_LENGTH;

sys/dev/pci/drm/drm_edid.c

2154

unsigned char segment = block >> 1;

sys/dev/pci/drm/drm_edid.c

2338

typedef int read_block_fn(void *context, u8 *buf, unsigned int block, size_t len);

sys/dev/pci/drm/drm_edid.c

2340

static enum edid_block_status edid_block_read(void *block, unsigned int block_num,

sys/dev/pci/drm/drm_edid.c

2349

if (read_block(context, block, block_num, EDID_LENGTH))

sys/dev/pci/drm/drm_edid.c

2352

status = edid_block_check(block, is_base_block);

sys/dev/pci/drm/drm_edid.c

2354

edid_header_fix(block);

sys/dev/pci/drm/drm_edid.c

2357

status = edid_block_check(block, is_base_block);

sys/dev/pci/drm/drm_edid.c

2362

if (edid_block_status_valid(status, edid_block_tag(block)))

sys/dev/pci/drm/drm_edid.c

2437

void *block = (void *)edid_block_data(edid, i);

sys/dev/pci/drm/drm_edid.c

2439

status = edid_block_read(block, i, read_block, context);

sys/dev/pci/drm/drm_edid.c

2441

edid_block_status_print(status, block, i);

sys/dev/pci/drm/drm_edid.c

2443

if (!edid_block_status_valid(status, edid_block_tag(block))) {

sys/dev/pci/drm/drm_edid.c

4238

const struct displayid_block *block;

sys/dev/pci/drm/drm_edid.c

4259

displayid_iter_for_each(block, &iter) {

sys/dev/pci/drm/drm_edid.c

4260

if (block->tag == DATA_BLOCK_CTA) {

sys/dev/pci/drm/drm_edid.c

5145

const struct displayid_block *block;

sys/dev/pci/drm/drm_edid.c

5147

displayid_iter_for_each(block, &iter->displayid_iter) {

sys/dev/pci/drm/drm_edid.c

5148

if (block->tag != DATA_BLOCK_CTA)

sys/dev/pci/drm/drm_edid.c

5155

iter->index = sizeof(*block);

sys/dev/pci/drm/drm_edid.c

5156

iter->end = iter->index + block->num_bytes;

sys/dev/pci/drm/drm_edid.c

5158

return block;

sys/dev/pci/drm/drm_edid.c

6572

const struct displayid_block *block)

sys/dev/pci/drm/drm_edid.c

6575

(struct displayid_vesa_vendor_specific_block *)block;

sys/dev/pci/drm/drm_edid.c

6578

if (block->num_bytes < 3) {

sys/dev/pci/drm/drm_edid.c

6581

connector->base.id, connector->name, block->num_bytes);

sys/dev/pci/drm/drm_edid.c

6588

if (sizeof(*vesa) != sizeof(*block) + block->num_bytes) {

sys/dev/pci/drm/drm_edid.c

6634

const struct displayid_block *block;

sys/dev/pci/drm/drm_edid.c

6638

displayid_iter_for_each(block, &iter) {

sys/dev/pci/drm/drm_edid.c

6639

if (block->tag == DATA_BLOCK_2_VENDOR_SPECIFIC)

sys/dev/pci/drm/drm_edid.c

6640

drm_parse_vesa_mso_data(connector, block);

sys/dev/pci/drm/drm_edid.c

6691

const struct displayid_block *block;

sys/dev/pci/drm/drm_edid.c

6695

displayid_iter_for_each(block, &iter) {

sys/dev/pci/drm/drm_edid.c

6877

const struct displayid_block *block)

sys/dev/pci/drm/drm_edid.c

6879

struct displayid_detailed_timing_block *det = (struct displayid_detailed_timing_block *)block;

sys/dev/pci/drm/drm_edid.c

6884

bool type_7 = block->tag == DATA_BLOCK_2_TYPE_7_DETAILED_TIMING;

sys/dev/pci/drm/drm_edid.c

6886

if (block->num_bytes % 20)

sys/dev/pci/drm/drm_edid.c

6889

num_timings = block->num_bytes / 20;

sys/dev/pci/drm/drm_edid.c

6933

const struct displayid_block *block)

sys/dev/pci/drm/drm_edid.c

6935

const struct displayid_formula_timing_block *formula_block = (struct displayid_formula_timing_block *)block;

sys/dev/pci/drm/drm_edid.c

6939

bool type_10 = block->tag == DATA_BLOCK_2_TYPE_10_FORMULA_TIMING;

sys/dev/pci/drm/drm_edid.c

6946

if (block->num_bytes % timing_size)

sys/dev/pci/drm/drm_edid.c

6949

num_timings = block->num_bytes / timing_size;

sys/dev/pci/drm/drm_edid.c

6966

const struct displayid_block *block;

sys/dev/pci/drm/drm_edid.c

6971

displayid_iter_for_each(block, &iter) {

sys/dev/pci/drm/drm_edid.c

6972

if (block->tag == DATA_BLOCK_TYPE_1_DETAILED_TIMING ||

sys/dev/pci/drm/drm_edid.c

6973

block->tag == DATA_BLOCK_2_TYPE_7_DETAILED_TIMING)

sys/dev/pci/drm/drm_edid.c

6974

num_modes += add_displayid_detailed_1_modes(connector, block);

sys/dev/pci/drm/drm_edid.c

6975

else if (block->tag == DATA_BLOCK_2_TYPE_9_FORMULA_TIMING ||

sys/dev/pci/drm/drm_edid.c

6976

block->tag == DATA_BLOCK_2_TYPE_10_FORMULA_TIMING)

sys/dev/pci/drm/drm_edid.c

6977

num_modes += add_displayid_formula_modes(connector, block);

sys/dev/pci/drm/drm_edid.c

7539

const struct displayid_block *block)

sys/dev/pci/drm/drm_edid.c

7541

const struct displayid_tiled_block *tile = (struct displayid_tiled_block *)block;

sys/dev/pci/drm/drm_edid.c

7594

const struct displayid_block *block)

sys/dev/pci/drm/drm_edid.c

7597

block->tag == DATA_BLOCK_TILED_DISPLAY) ||

sys/dev/pci/drm/drm_edid.c

7599

block->tag == DATA_BLOCK_2_TILED_DISPLAY_TOPOLOGY);

sys/dev/pci/drm/drm_edid.c

7605

const struct displayid_block *block;

sys/dev/pci/drm/drm_edid.c

7611

displayid_iter_for_each(block, &iter) {

sys/dev/pci/drm/drm_edid.c

7612

if (displayid_is_tiled_block(&iter, block))

sys/dev/pci/drm/drm_edid.c

7613

drm_parse_tiled_block(connector, block);

sys/dev/pci/drm/i915/display/intel_bios.c

136

const void *block;

sys/dev/pci/drm/i915/display/intel_bios.c

138

block = find_raw_section(bdb, section_id);

sys/dev/pci/drm/i915/display/intel_bios.c

139

if (!block)

sys/dev/pci/drm/i915/display/intel_bios.c

142

return block - bdb;

sys/dev/pci/drm/i915/display/intel_bios.c

372

const void *block;

sys/dev/pci/drm/i915/display/intel_bios.c

386

block = find_raw_section(bdb, BDB_LFP_DATA);

sys/dev/pci/drm/i915/display/intel_bios.c

387

if (!block)

sys/dev/pci/drm/i915/display/intel_bios.c

392

block_size = get_blocksize(block);

sys/dev/pci/drm/i915/display/intel_bios.c

443

offset = block - bdb;

sys/dev/pci/drm/i915/display/intel_bios.c

464

const void *block;

sys/dev/pci/drm/i915/display/intel_bios.c

467

block = find_raw_section(bdb, section_id);

sys/dev/pci/drm/i915/display/intel_bios.c

470

if (!block && section_id == BDB_LFP_DATA_PTRS) {

sys/dev/pci/drm/i915/display/intel_bios.c

473

block = temp_block + 3;

sys/dev/pci/drm/i915/display/intel_bios.c

475

if (!block)

sys/dev/pci/drm/i915/display/intel_bios.c

481

block_size = get_blocksize(block);

sys/dev/pci/drm/i915/display/intel_bios.c

487

if (section_id == BDB_MIPI_SEQUENCE && *(const u8 *)block >= 3)

sys/dev/pci/drm/i915/display/intel_bios.c

498

memcpy(entry->data, block - 3, block_size + 3);

sys/dev/pci/drm/i915/display/intel_display_power_well.c

1776

tgl_tc_cold_request(struct intel_display *display, bool block)

sys/dev/pci/drm/i915/display/intel_display_power_well.c

1785

if (block)

sys/dev/pci/drm/i915/display/intel_display_power_well.c

1796

if (block &&

sys/dev/pci/drm/i915/display/intel_display_power_well.c

1810

drm_err(display->drm, "TC cold %sblock failed\n", block ? "" : "un");

sys/dev/pci/drm/i915/display/intel_display_power_well.c

1813

block ? "" : "un");

sys/dev/pci/drm/i915/display/intel_dmc.c

850

bool block)

sys/dev/pci/drm/i915/display/intel_dmc.c

853

PIPEDMC_BLOCK_PKGC_SW_BLOCK_PKGC_ALWAYS, block ?

sys/dev/pci/drm/i915/display/intel_dmc.h

26

bool block);

sys/dev/pci/drm/i915/display/intel_dp_test.c

200

const struct edid *block = drm_edid_raw(intel_connector->detect_edid);

sys/dev/pci/drm/i915/display/intel_dp_test.c

203

block += block->extensions;

sys/dev/pci/drm/i915/display/intel_dp_test.c

206

block->checksum) <= 0)

sys/dev/pci/drm/i915/gvt/handlers.c

2827

struct gvt_mmio_block *block = gvt->mmio.mmio_block;

sys/dev/pci/drm/i915/gvt/handlers.c

2831

for (i = 0; i < num; i++, block++) {

sys/dev/pci/drm/i915/gvt/handlers.c

2832

if (offset >= i915_mmio_reg_offset(block->offset) &&

sys/dev/pci/drm/i915/gvt/handlers.c

2833

offset < i915_mmio_reg_offset(block->offset) + block->size)

sys/dev/pci/drm/i915/gvt/handlers.c

2834

return block;

sys/dev/pci/drm/i915/gvt/handlers.c

2907

struct gvt_mmio_block *block = gvt->mmio.mmio_block;

sys/dev/pci/drm/i915/gvt/handlers.c

2910

ret = krealloc(block,

sys/dev/pci/drm/i915/gvt/handlers.c

2911

(gvt->mmio.num_mmio_block + 1) * sizeof(*block),

sys/dev/pci/drm/i915/gvt/handlers.c

2916

gvt->mmio.mmio_block = block = ret;

sys/dev/pci/drm/i915/gvt/handlers.c

2918

block += gvt->mmio.num_mmio_block;

sys/dev/pci/drm/i915/gvt/handlers.c

2920

memset(block, 0, sizeof(*block));

sys/dev/pci/drm/i915/gvt/handlers.c

2922

block->offset = _MMIO(offset);

sys/dev/pci/drm/i915/gvt/handlers.c

2923

block->size = size;

sys/dev/pci/drm/i915/gvt/handlers.c

2952

struct gvt_mmio_block *block;

sys/dev/pci/drm/i915/gvt/handlers.c

2954

block = find_mmio_block(gvt, VGT_PVINFO_PAGE);

sys/dev/pci/drm/i915/gvt/handlers.c

2955

if (!block) {

sys/dev/pci/drm/i915/gvt/handlers.c

2961

block->read = pvinfo_mmio_read;

sys/dev/pci/drm/i915/gvt/handlers.c

2962

block->write = pvinfo_mmio_write;

sys/dev/pci/drm/i915/gvt/handlers.c

3045

struct gvt_mmio_block *block = gvt->mmio.mmio_block;

sys/dev/pci/drm/i915/gvt/handlers.c

3055

for (i = 0; i < gvt->mmio.num_mmio_block; i++, block++) {

sys/dev/pci/drm/i915/gvt/handlers.c

3057

if (i915_mmio_reg_offset(block->offset) == VGT_PVINFO_PAGE)

sys/dev/pci/drm/i915/gvt/handlers.c

3060

for (j = 0; j < block->size; j += 4) {

sys/dev/pci/drm/i915/gvt/handlers.c

3061

ret = handler(gvt, i915_mmio_reg_offset(block->offset) + j, data);

sys/dev/pci/drm/i915/i915_scatterlist.c

172

struct drm_buddy_block *block;

sys/dev/pci/drm/i915/i915_scatterlist.c

202

list_for_each_entry(block, blocks, link) {

sys/dev/pci/drm/i915/i915_scatterlist.c

205

block_size = min_t(u64, size, drm_buddy_block_size(mm, block));

sys/dev/pci/drm/i915/i915_scatterlist.c

206

offset = drm_buddy_block_offset(block);

sys/dev/pci/drm/i915/i915_ttm_buddy_manager.c

104

struct drm_buddy_block *block;

sys/dev/pci/drm/i915/i915_ttm_buddy_manager.c

106

list_for_each_entry(block, &bman_res->blocks, link) {

sys/dev/pci/drm/i915/i915_ttm_buddy_manager.c

108

drm_buddy_block_offset(block) >> PAGE_SHIFT;

sys/dev/pci/drm/i915/i915_ttm_buddy_manager.c

112

(drm_buddy_block_size(mm, block) >> PAGE_SHIFT);

sys/dev/pci/drm/i915/i915_ttm_buddy_manager.c

160

struct drm_buddy_block *block;

sys/dev/pci/drm/i915/i915_ttm_buddy_manager.c

177

list_for_each_entry(block, &bman_res->blocks, link) {

sys/dev/pci/drm/i915/i915_ttm_buddy_manager.c

179

drm_buddy_block_offset(block) >> PAGE_SHIFT;

sys/dev/pci/drm/i915/i915_ttm_buddy_manager.c

181

(drm_buddy_block_size(mm, block) >> PAGE_SHIFT);

sys/dev/pci/drm/i915/i915_ttm_buddy_manager.c

198

struct drm_buddy_block *block;

sys/dev/pci/drm/i915/i915_ttm_buddy_manager.c

210

list_for_each_entry(block, &bman_res->blocks, link) {

sys/dev/pci/drm/i915/i915_ttm_buddy_manager.c

212

drm_buddy_block_offset(block) >> PAGE_SHIFT;

sys/dev/pci/drm/i915/i915_ttm_buddy_manager.c

214

(drm_buddy_block_size(mm, block) >> PAGE_SHIFT);

sys/dev/pci/drm/i915/i915_ttm_buddy_manager.c

227

struct drm_buddy_block *block;

sys/dev/pci/drm/i915/i915_ttm_buddy_manager.c

242

list_for_each_entry(block, &bman->reserved, link)

sys/dev/pci/drm/i915/i915_ttm_buddy_manager.c

243

drm_buddy_block_print(&bman->mm, block, printer);

sys/dev/pci/drm/i915/selftests/intel_memory_region.c

450

struct drm_buddy_block *block;

sys/dev/pci/drm/i915/selftests/intel_memory_region.c

489

list_for_each_entry(block, blocks, link) {

sys/dev/pci/drm/i915/selftests/intel_memory_region.c

490

if (drm_buddy_block_size(mm, block) > size)

sys/dev/pci/drm/i915/selftests/intel_memory_region.c

491

size = drm_buddy_block_size(mm, block);

sys/dev/pci/drm/i915/selftests/intel_memory_region.c

531

struct drm_buddy_block *block;

sys/dev/pci/drm/i915/selftests/intel_memory_region.c

535

list_for_each_entry(block, &bman_res->blocks, link) {

sys/dev/pci/drm/i915/selftests/intel_memory_region.c

536

u64 start = drm_buddy_block_offset(block);

sys/dev/pci/drm/i915/selftests/intel_memory_region.c

537

u64 end = start + drm_buddy_block_size(mm, block);

sys/dev/pci/drm/include/drm/drm_buddy.h

101

return block->header & DRM_BUDDY_HEADER_ORDER;

sys/dev/pci/drm/include/drm/drm_buddy.h

105

drm_buddy_block_state(struct drm_buddy_block *block)

sys/dev/pci/drm/include/drm/drm_buddy.h

107

return block->header & DRM_BUDDY_HEADER_STATE;

sys/dev/pci/drm/include/drm/drm_buddy.h

111

drm_buddy_block_is_allocated(struct drm_buddy_block *block)

sys/dev/pci/drm/include/drm/drm_buddy.h

113

return drm_buddy_block_state(block) == DRM_BUDDY_ALLOCATED;

sys/dev/pci/drm/include/drm/drm_buddy.h

117

drm_buddy_block_is_clear(struct drm_buddy_block *block)

sys/dev/pci/drm/include/drm/drm_buddy.h

119

return block->header & DRM_BUDDY_HEADER_CLEAR;

sys/dev/pci/drm/include/drm/drm_buddy.h

123

drm_buddy_block_is_free(struct drm_buddy_block *block)

sys/dev/pci/drm/include/drm/drm_buddy.h

125

return drm_buddy_block_state(block) == DRM_BUDDY_FREE;

sys/dev/pci/drm/include/drm/drm_buddy.h

129

drm_buddy_block_is_split(struct drm_buddy_block *block)

sys/dev/pci/drm/include/drm/drm_buddy.h

131

return drm_buddy_block_state(block) == DRM_BUDDY_SPLIT;

sys/dev/pci/drm/include/drm/drm_buddy.h

136

struct drm_buddy_block *block)

sys/dev/pci/drm/include/drm/drm_buddy.h

138

return mm->chunk_size << drm_buddy_block_order(block);

sys/dev/pci/drm/include/drm/drm_buddy.h

146

drm_get_buddy(struct drm_buddy_block *block);

sys/dev/pci/drm/include/drm/drm_buddy.h

161

void drm_buddy_free_block(struct drm_buddy *mm, struct drm_buddy_block *block);

sys/dev/pci/drm/include/drm/drm_buddy.h

169

struct drm_buddy_block *block,

sys/dev/pci/drm/include/drm/drm_buddy.h

93

drm_buddy_block_offset(const struct drm_buddy_block *block)

sys/dev/pci/drm/include/drm/drm_buddy.h

95

return block->header & DRM_BUDDY_HEADER_OFFSET;

sys/dev/pci/drm/include/drm/drm_buddy.h

99

drm_buddy_block_order(struct drm_buddy_block *block)

sys/dev/pci/drm/include/drm/drm_edid.h

476

int (*read_block)(void *context, u8 *buf, unsigned int block, size_t len),

sys/dev/pci/drm/radeon/cik.c

5657

char block[5] = { mc_client >> 24, (mc_client >> 16) & 0xff,

sys/dev/pci/drm/radeon/cik.c

5668

block, mc_client, mc_id);

sys/dev/pci/drm/radeon/cik.c

6279

u32 block, bool enable)

sys/dev/pci/drm/radeon/cik.c

6282

if (block & RADEON_CG_BLOCK_GFX) {

sys/dev/pci/drm/radeon/cik.c

6295

if (block & RADEON_CG_BLOCK_MC) {

sys/dev/pci/drm/radeon/cik.c

6302

if (block & RADEON_CG_BLOCK_SDMA) {

sys/dev/pci/drm/radeon/cik.c

6307

if (block & RADEON_CG_BLOCK_BIF) {

sys/dev/pci/drm/radeon/cik.c

6311

if (block & RADEON_CG_BLOCK_UVD) {

sys/dev/pci/drm/radeon/cik.c

6316

if (block & RADEON_CG_BLOCK_HDP) {

sys/dev/pci/drm/radeon/cik.c

6321

if (block & RADEON_CG_BLOCK_VCE) {

sys/dev/pci/drm/radeon/cik.h

31

void cik_update_cg(struct radeon_device *rdev, u32 block, bool enable);

sys/dev/pci/drm/radeon/kv_dpm.c

65

u32 block, bool enable);

sys/dev/pci/drm/radeon/ni.c

2511

char *block;

sys/dev/pci/drm/radeon/ni.c

2522

block = "CB";

sys/dev/pci/drm/radeon/ni.c

2532

block = "CB_FMASK";

sys/dev/pci/drm/radeon/ni.c

2542

block = "CB_CMASK";

sys/dev/pci/drm/radeon/ni.c

2552

block = "CB_IMMED";

sys/dev/pci/drm/radeon/ni.c

2562

block = "DB";

sys/dev/pci/drm/radeon/ni.c

2572

block = "DB_HTILE";

sys/dev/pci/drm/radeon/ni.c

2582

block = "SX";

sys/dev/pci/drm/radeon/ni.c

2592

block = "DB_STEN";

sys/dev/pci/drm/radeon/ni.c

2602

block = "TC_TFETCH";

sys/dev/pci/drm/radeon/ni.c

2612

block = "TC_VFETCH";

sys/dev/pci/drm/radeon/ni.c

2622

block = "VC";

sys/dev/pci/drm/radeon/ni.c

2625

block = "CP";

sys/dev/pci/drm/radeon/ni.c

2629

block = "SH";

sys/dev/pci/drm/radeon/ni.c

2632

block = "VGT";

sys/dev/pci/drm/radeon/ni.c

2635

block = "IH";

sys/dev/pci/drm/radeon/ni.c

2638

block = "RLC";

sys/dev/pci/drm/radeon/ni.c

2641

block = "DMA";

sys/dev/pci/drm/radeon/ni.c

2644

block = "HDP";

sys/dev/pci/drm/radeon/ni.c

2647

block = "unknown";

sys/dev/pci/drm/radeon/ni.c

2654

block, mc_id);

sys/dev/pci/drm/radeon/radeon.h

782

void radeon_irq_kms_enable_afmt(struct radeon_device *rdev, int block);

sys/dev/pci/drm/radeon/radeon.h

783

void radeon_irq_kms_disable_afmt(struct radeon_device *rdev, int block);

sys/dev/pci/drm/radeon/radeon_audio.h

32

#define RREG32_ENDPOINT(block, reg) \

sys/dev/pci/drm/radeon/radeon_audio.h

33

radeon_audio_endpoint_rreg(rdev, (block), (reg))

sys/dev/pci/drm/radeon/radeon_audio.h

34

#define WREG32_ENDPOINT(block, reg, v) \

sys/dev/pci/drm/radeon/radeon_audio.h

35

radeon_audio_endpoint_wreg(rdev, (block), (reg), (v))

sys/dev/pci/drm/radeon/radeon_irq_kms.c

509

void radeon_irq_kms_enable_afmt(struct radeon_device *rdev, int block)

sys/dev/pci/drm/radeon/radeon_irq_kms.c

517

rdev->irq.afmt[block] = true;

sys/dev/pci/drm/radeon/radeon_irq_kms.c

531

void radeon_irq_kms_disable_afmt(struct radeon_device *rdev, int block)

sys/dev/pci/drm/radeon/radeon_irq_kms.c

539

rdev->irq.afmt[block] = false;

sys/dev/pci/drm/radeon/si.c

4807

char *block;

sys/dev/pci/drm/radeon/si.c

4819

block = "CB";

sys/dev/pci/drm/radeon/si.c

4829

block = "CB_FMASK";

sys/dev/pci/drm/radeon/si.c

4839

block = "CB_CMASK";

sys/dev/pci/drm/radeon/si.c

4849

block = "CB_IMMED";

sys/dev/pci/drm/radeon/si.c

4859

block = "DB";

sys/dev/pci/drm/radeon/si.c

4869

block = "DB_HTILE";

sys/dev/pci/drm/radeon/si.c

4879

block = "DB_STEN";

sys/dev/pci/drm/radeon/si.c

4893

block = "TC";

sys/dev/pci/drm/radeon/si.c

4897

block = "CP";

sys/dev/pci/drm/radeon/si.c

4903

block = "SH";

sys/dev/pci/drm/radeon/si.c

4907

block = "VGT";

sys/dev/pci/drm/radeon/si.c

4910

block = "IH";

sys/dev/pci/drm/radeon/si.c

4914

block = "RLC";

sys/dev/pci/drm/radeon/si.c

4918

block = "DMA0";

sys/dev/pci/drm/radeon/si.c

4921

block = "DMA1";

sys/dev/pci/drm/radeon/si.c

4925

block = "HDP";

sys/dev/pci/drm/radeon/si.c

4928

block = "unknown";

sys/dev/pci/drm/radeon/si.c

4941

block = "CB";

sys/dev/pci/drm/radeon/si.c

4951

block = "CB_FMASK";

sys/dev/pci/drm/radeon/si.c

4961

block = "CB_CMASK";

sys/dev/pci/drm/radeon/si.c

4971

block = "CB_IMMED";

sys/dev/pci/drm/radeon/si.c

4981

block = "DB";

sys/dev/pci/drm/radeon/si.c

4991

block = "DB_HTILE";

sys/dev/pci/drm/radeon/si.c

5001

block = "DB_STEN";

sys/dev/pci/drm/radeon/si.c

5011

block = "TC";

sys/dev/pci/drm/radeon/si.c

5015

block = "CP";

sys/dev/pci/drm/radeon/si.c

5021

block = "SH";

sys/dev/pci/drm/radeon/si.c

5024

block = "VGT";

sys/dev/pci/drm/radeon/si.c

5027

block = "IH";

sys/dev/pci/drm/radeon/si.c

5031

block = "RLC";

sys/dev/pci/drm/radeon/si.c

5035

block = "DMA0";

sys/dev/pci/drm/radeon/si.c

5038

block = "DMA1";

sys/dev/pci/drm/radeon/si.c

5042

block = "HDP";

sys/dev/pci/drm/radeon/si.c

5045

block = "unknown";

sys/dev/pci/drm/radeon/si.c

5053

block, mc_id);

sys/dev/pci/drm/radeon/si.c

5598

u32 block, bool enable)

sys/dev/pci/drm/radeon/si.c

5600

if (block & RADEON_CG_BLOCK_GFX) {

sys/dev/pci/drm/radeon/si.c

5613

if (block & RADEON_CG_BLOCK_MC) {

sys/dev/pci/drm/radeon/si.c

5618

if (block & RADEON_CG_BLOCK_SDMA) {

sys/dev/pci/drm/radeon/si.c

5622

if (block & RADEON_CG_BLOCK_BIF) {

sys/dev/pci/drm/radeon/si.c

5626

if (block & RADEON_CG_BLOCK_UVD) {

sys/dev/pci/drm/radeon/si.c

5632

if (block & RADEON_CG_BLOCK_HDP) {

sys/dev/pci/if_nep.c

1009

block = NULL;

sys/dev/pci/if_nep.c

1013

block = sc->sc_rb[i].nb_block;

sys/dev/pci/if_nep.c

1017

if (block == NULL) {

sys/dev/pci/if_nep.c

1029

MEXTADD(m, block + off, PAGE_SIZE, M_EXTWR,

sys/dev/pci/if_nep.c

1030

nep_mextfree_idx, block);

sys/dev/pci/if_nep.c

1982

void *block;

sys/dev/pci/if_nep.c

1993

block = pool_get(nep_block_pool, PR_NOWAIT);

sys/dev/pci/if_nep.c

1994

if (block == NULL)

sys/dev/pci/if_nep.c

1996

err = bus_dmamap_load(sc->sc_dmat, rb->nb_map, block,

sys/dev/pci/if_nep.c

1999

pool_put(nep_block_pool, block);

sys/dev/pci/if_nep.c

2002

rb->nb_block = block;

sys/dev/pci/if_nep.c

987

char *block;

sys/dev/usb/ehci.c

3466

if (page_offs >= xfer->dmabuf.block->size)

sys/dev/usb/if_atu.c

1012

sc->atu_dev.dv_xname, block, block_size));

sys/dev/usb/if_atu.c

1014

0x0802, block, block_size, ptr);

sys/dev/usb/if_atu.c

1023

block++;

sys/dev/usb/if_atu.c

1029

block, 0, NULL);

sys/dev/usb/if_atu.c

854

int block_size, block = 0, err, i;

sys/dev/usb/if_atu.c

895

while (block >= 0 && state > 0) {

sys/dev/usb/if_atu.c

919

sc->atu_dev.dv_xname, block));

sys/dev/usb/if_atu.c

921

err = atu_usb_request(sc, DFU_DNLOAD, block++, 0,

sys/dev/usb/if_atu.c

933

block = -1;

sys/dev/usb/if_atu.c

986

int block_size, block = 0, err, i;

sys/dev/usb/if_upgt.c

860

int offset, block, len;

sys/dev/usb/if_upgt.c

863

block = UPGT_EEPROM_BLOCK_SIZE;

sys/dev/usb/if_upgt.c

866

sc->sc_dev.dv_xname, offset, block);

sys/dev/usb/if_upgt.c

882

sizeof(struct upgt_lmac_header)) + block);

sys/dev/usb/if_upgt.c

889

eeprom->len = htole16(block);

sys/dev/usb/if_upgt.c

891

len = sizeof(*mem) + sizeof(*eeprom) + block;

sys/dev/usb/if_upgt.c

909

offset += block;

sys/dev/usb/if_upgt.c

910

if (UPGT_EEPROM_SIZE - offset < block)

sys/dev/usb/if_upgt.c

911

block = UPGT_EEPROM_SIZE - offset;

sys/dev/usb/udl.c

1122

uint32_t off, block;

sys/dev/usb/udl.c

1131

block = UDL_CMD_MAX_PIXEL_COUNT;

sys/dev/usb/udl.c

1133

block = width_cur;

sys/dev/usb/udl.c

1137

for (j = 0; j < (block * 2); j += 2) {

sys/dev/usb/udl.c

1143

r = (sc->udl_fb_buf_write)(sc, buf, x_cur, y, block);

sys/dev/usb/udl.c

1147

off += block * 2;

sys/dev/usb/udl.c

1148

x_cur += block;

sys/dev/usb/udl.c

1149

width_cur -= block;

sys/dev/usb/udl.c

2159

uint32_t off, block;

sys/dev/usb/udl.c

2166

block = UDL_CMD_MAX_PIXEL_COUNT;

sys/dev/usb/udl.c

2168

block = width;

sys/dev/usb/udl.c

2170

r = udl_fb_off_write(sc, rgb16, off, block);

sys/dev/usb/udl.c

2174

off += block;

sys/dev/usb/udl.c

2175

width -= block;

sys/dev/usb/udl.c

2233

uint32_t src_off, dst_off, block;

sys/dev/usb/udl.c

2241

block = UDL_CMD_MAX_PIXEL_COUNT;

sys/dev/usb/udl.c

2243

block = width;

sys/dev/usb/udl.c

2245

r = udl_fb_off_copy(sc, src_off, dst_off, block);

sys/dev/usb/udl.c

2249

src_off += block;

sys/dev/usb/udl.c

2250

dst_off += block;

sys/dev/usb/udl.c

2251

width -= block;

sys/dev/usb/udl.c

2348

uint32_t off, block;

sys/dev/usb/udl.c

2355

block = UDL_CMD_MAX_PIXEL_COUNT;

sys/dev/usb/udl.c

2357

block = width;

sys/dev/usb/udl.c

2359

r = udl_fb_off_write_comp(sc, rgb16, off, block);

sys/dev/usb/udl.c

2363

off += block;

sys/dev/usb/udl.c

2364

width -= block;

sys/dev/usb/udl.c

2444

uint32_t src_off, dst_off, block;

sys/dev/usb/udl.c

2452

block = UDL_CMD_MAX_PIXEL_COUNT;

sys/dev/usb/udl.c

2454

block = width;

sys/dev/usb/udl.c

2456

r = udl_fb_off_copy_comp(sc, src_off, dst_off, block);

sys/dev/usb/udl.c

2460

src_off += block;

sys/dev/usb/udl.c

2461

dst_off += block;

sys/dev/usb/udl.c

2462

width -= block;

sys/dev/usb/usb_mem.c

201

err = usb_block_allocmem(tag, size, align, &p->block, flags);

sys/dev/usb/usb_mem.c

203

p->block->frags = NULL;

sys/dev/usb/usb_mem.c

212

if (f->block->tag == tag && f->block->flags == flags)

sys/dev/usb/usb_mem.c

231

f->block = b;

sys/dev/usb/usb_mem.c

237

p->block = f->block;

sys/dev/usb/usb_mem.c

251

if (p->block->frags == NULL) {

sys/dev/usb/usb_mem.c

253

usb_block_freemem(p->block);

sys/dev/usb/usb_mem.c

257

f = &p->block->frags[p->offs / USB_MEM_SMALL];

sys/dev/usb/usb_mem.c

260

DPRINTFN(5, ("%s: frag=%p block=%p\n", __func__, f, f->block));

sys/dev/usb/usb_mem.c

266

bus_dmamap_sync(p->block->tag, p->block->map, p->offs + offset,

sys/dev/usb/usb_mem.c

67

struct usb_dma_block *block;

sys/dev/usb/usb_mem.h

50

#define DMAADDR(dma, o) ((dma)->block->map->dm_segs[0].ds_addr + (dma)->offs + (o))

sys/dev/usb/usb_mem.h

52

((void *)((char *)((dma)->block->kaddr + (dma)->offs) + (o)))

sys/dev/usb/usbdivar.h

48

struct usb_dma_block *block;

sys/kern/tty_pty.c

516

goto block;

sys/kern/tty_pty.c

519

goto block;

sys/kern/tty_pty.c

565

goto block;

sys/kern/tty_pty.c

576

block:

sys/kern/vfs_lockf.c

325

struct lockf *block;

sys/kern/vfs_lockf.c

341

block = lf_getblock(TAILQ_FIRST(&lock->lf_state->ls_locks),

sys/kern/vfs_lockf.c

343

if (block == NULL)

sys/kern/vfs_lockf.c

375

lock->lf_blk = block;

sys/kern/vfs_lockf.c

377

LFPRINT(("lf_setlock: blocking on", block), DEBUG_SETLOCK);

sys/kern/vfs_lockf.c

378

TAILQ_INSERT_TAIL(&block->lf_blkhd, lock, lf_block);

sys/kern/vfs_lockf.c

405

block = TAILQ_FIRST(&lock->lf_state->ls_locks);

sys/kern/vfs_lockf.c

409

ovcase = lf_findoverlap(block, lock, SELF, &overlap);

sys/kern/vfs_lockf.c

411

block = TAILQ_NEXT(overlap, lf_entry);

sys/kern/vfs_lockf.c

589

struct lockf *block, *lf;

sys/kern/vfs_lockf.c

596

if ((block = lf_getblock(lf, lock)) != NULL) {

sys/kern/vfs_lockf.c

597

fl->l_type = block->lf_type;

sys/kern/vfs_lockf.c

599

fl->l_start = block->lf_start;

sys/kern/vfs_lockf.c

600

if (block->lf_end == -1)

sys/kern/vfs_lockf.c

603

fl->l_len = block->lf_end - block->lf_start + 1;

sys/kern/vfs_lockf.c

604

fl->l_pid = block->lf_pid;

sys/kern/vfs_lockf.c

836

struct lockf *block, *lf, *pending;

sys/kern/vfs_lockf.c

839

for (; (block = lf_getblock(lf, lock)) != NULL;

sys/kern/vfs_lockf.c

840

lf = TAILQ_NEXT(block, lf_entry)) {

sys/kern/vfs_lockf.c

841

if ((block->lf_flags & F_POSIX) == 0)

sys/kern/vfs_lockf.c

848

if (pending->lf_pid == block->lf_pid &&

sys/kern/vfs_lockf.c

864

struct lockf *block;

sys/kern/vfs_lockf.c

882

block = TAILQ_FIRST(&lock->lf_blkhd);

sys/kern/vfs_lockf.c

883

if (block)

sys/kern/vfs_lockf.c

885

TAILQ_FOREACH(block, &lock->lf_blkhd, lf_block)

sys/kern/vfs_lockf.c

886

printf(" %p,", block);

sys/lib/libsa/aes_xts.c

49

u_int8_t block[AES_XTS_BLOCKSIZE];

sys/lib/libsa/aes_xts.c

53

block[i] = data[i] ^ ctx->tweak[i];

sys/lib/libsa/aes_xts.c

56

rijndael_encrypt(&ctx->key1, block, data);

sys/lib/libsa/aes_xts.c

58

rijndael_decrypt(&ctx->key1, block, data);

sys/lib/libsa/aes_xts.c

71

explicit_bzero(block, sizeof(block));

sys/lib/libsa/cd9660.c

182

bno = isonum_732(pp->block) + isonum_711(pp->extlen);

sys/lib/libsa/cd9660.c

203

bno = isonum_732(pp->block) + isonum_711(pp->extlen);

sys/lib/libsa/cd9660.c

60

char block [ISODCL( 3, 6)]; /* 732 */

sys/lib/libsa/sha1.c

31

#define blk0(i) (block->l[i] = (rol(block->l[i],24)&0xFF00FF00) \

sys/lib/libsa/sha1.c

32

|(rol(block->l[i],8)&0x00FF00FF))

sys/lib/libsa/sha1.c

34

#define blk0(i) block->l[i]

sys/lib/libsa/sha1.c

36

#define blk(i) (block->l[i&15] = rol(block->l[(i+13)&15]^block->l[(i+8)&15] \

sys/lib/libsa/sha1.c

37

^block->l[(i+2)&15]^block->l[i&15],1))

sys/lib/libsa/sha1.c

56

CHAR64LONG16* block;

sys/lib/libsa/sha1.c

60

block = (CHAR64LONG16 *)workspace;

sys/lib/libsa/sha1.c

61

bcopy(buffer, block, SHA1_BLOCK_LENGTH);

sys/lib/libsa/sha1.c

63

block = (CHAR64LONG16 *)buffer;

sys/lib/libz/zutil.h

121

void _Cdecl farfree( void *block );

sys/scsi/scsi_all.h

392

/* 4*/ u_int8_t block[3];

sys/scsi/scsi_base.c

2534

_3btol(usense->block));

sys/sys/videoio.h

5729

u_int8_t block;

sys/ufs/ufs/ufs_dirhash.c

703

int block;

sys/ufs/ufs/ufs_dirhash.c

716

block = offset / DIRBLKSIZ;

sys/ufs/ufs/ufs_dirhash.c

717

if (block >= dh->dh_nblk) {

sys/ufs/ufs/ufs_dirhash.c

723

dh->dh_dirblks = block + 1;

sys/ufs/ufs/ufs_dirhash.c

726

dh->dh_blkfree[block] = DIRBLKSIZ / DIRALIGN;

sys/ufs/ufs/ufs_dirhash.c

728

dh->dh_firstfree[DH_NFSTATS] = block;

sys/ufs/ufs/ufs_dirhash.c

739

int block, i;

sys/ufs/ufs/ufs_dirhash.c

752

block = howmany(offset, DIRBLKSIZ);

sys/ufs/ufs/ufs_dirhash.c

759

if (block < dh->dh_nblk / 8 && dh->dh_narrays > 1) {

sys/ufs/ufs/ufs_dirhash.c

770

if (dh->dh_firstfree[DH_NFSTATS] >= block)

sys/ufs/ufs/ufs_dirhash.c

772

for (i = block; i < dh->dh_dirblks; i++)

sys/ufs/ufs/ufs_dirhash.c

776

if (dh->dh_firstfree[i] >= block)

sys/ufs/ufs/ufs_dirhash.c

778

dh->dh_dirblks = block;

sys/ufs/ufs/ufs_dirhash.c

796

int block, ffslot, i, nfree;

sys/ufs/ufs/ufs_dirhash.c

809

block = offset / DIRBLKSIZ;

sys/ufs/ufs/ufs_dirhash.c

810

if ((offset & (DIRBLKSIZ - 1)) != 0 || block >= dh->dh_dirblks)

sys/ufs/ufs/ufs_dirhash.c

842

if (dh->dh_blkfree[block] * DIRALIGN != nfree)

sys/ufs/ufs/ufs_dirhash.c

847

if (dh->dh_firstfree[i] == block && i != ffslot)

sys/ufs/ufs/ufs_dirhash.c

874

int block, i, nfidx, ofidx;

sys/ufs/ufs/ufs_dirhash.c

877

block = offset / DIRBLKSIZ;

sys/ufs/ufs/ufs_dirhash.c

878

DIRHASH_ASSERT(block < dh->dh_nblk && block < dh->dh_dirblks,

sys/ufs/ufs/ufs_dirhash.c

880

ofidx = BLKFREE2IDX(dh->dh_blkfree[block]);

sys/ufs/ufs/ufs_dirhash.c

881

dh->dh_blkfree[block] = (int)dh->dh_blkfree[block] + (diff / DIRALIGN);

sys/ufs/ufs/ufs_dirhash.c

882

nfidx = BLKFREE2IDX(dh->dh_blkfree[block]);

sys/ufs/ufs/ufs_dirhash.c

887

if (dh->dh_firstfree[ofidx] == block) {

sys/ufs/ufs/ufs_dirhash.c

888

for (i = block + 1; i < dh->dh_dirblks; i++)

sys/ufs/ufs/ufs_dirhash.c

895

if (dh->dh_firstfree[nfidx] > block ||

sys/ufs/ufs/ufs_dirhash.c

897

dh->dh_firstfree[nfidx] = block;

sys/uvm/uvm_swap.c

1773

u_int64_t block;

sys/uvm/uvm_swap.c

1777

block = startblk;

sys/uvm/uvm_swap.c

1786

swap_encrypt(key, src, dst, block, PAGE_SIZE);

sys/uvm/uvm_swap.c

1787

block += btodb(PAGE_SIZE);

sys/uvm/uvm_swap.c

1877

u_int64_t block = startblk;

sys/uvm/uvm_swap.c

1894

swap_decrypt(key, data, dst, block, PAGE_SIZE);

sys/uvm/uvm_swap.c

1903

block += btodb(PAGE_SIZE);

sys/uvm/uvm_swap_encrypt.c

114

swap_encrypt(struct swap_key *key, caddr_t src, caddr_t dst, u_int64_t block,

sys/uvm/uvm_swap_encrypt.c

129

iv[0] = block >> 32; iv[1] = block; iv[2] = ~iv[0]; iv[3] = ~iv[1];

sys/uvm/uvm_swap_encrypt.c

159

swap_decrypt(struct swap_key *key, caddr_t src, caddr_t dst, u_int64_t block,

sys/uvm/uvm_swap_encrypt.c

174

iv[0] = block >> 32; iv[1] = block; iv[2] = ~iv[0]; iv[3] = ~iv[1];

usr.bin/cdio/cdio.c

1306

int block;

usr.bin/cdio/cdio.c

1312

block = e->addr.lba;

usr.bin/cdio/cdio.c

1313

lba2msf(block, &m, &s, &f);

usr.bin/cdio/cdio.c

1321

int block;

usr.bin/cdio/cdio.c

1328

block = e->addr.lba;

usr.bin/cdio/cdio.c

1329

lba2msf(block, &m, &s, &f);

usr.bin/cdio/cdio.c

1337

int block, next, len;

usr.bin/cdio/cdio.c

1346

block = msf2lba(e->addr.msf.minute, e->addr.msf.second,

usr.bin/cdio/cdio.c

1349

block = e->addr.lba;

usr.bin/cdio/cdio.c

1351

lba2msf(block, &m, &s, &f);

usr.bin/cdio/cdio.c

1359

printf(" - %6d - -\n", block);

usr.bin/cdio/cdio.c

1370

len = next - block;

usr.bin/cdio/cdio.c

1377

printf("%2d:%02d.%02d %6d %6d %5s\n", m, s, f, block, len,

usr.bin/cvs/diff3.c

794

char block[BUFSIZ+1];

usr.bin/cvs/diff3.c

805

r = fread(block, 1, j, fp[2]);

usr.bin/cvs/diff3.c

813

block[j] = '\0';

usr.bin/cvs/diff3.c

814

diff_output("%s", block);

usr.bin/diff3/diff3prog.c

551

char block[BUFSIZ];

usr.bin/diff3/diff3prog.c

562

r = fread(block, 1, j, fp[2]);

usr.bin/diff3/diff3prog.c

570

(void)fwrite(block, 1, j, stdout);

usr.bin/dig/lib/dns/message.c

104

#define msgblock_get(block, type) \

usr.bin/dig/lib/dns/message.c

105

((type *)msgblock_internalget(block, sizeof(type)))

usr.bin/dig/lib/dns/message.c

121

dns_msgblock_t *block;

usr.bin/dig/lib/dns/message.c

126

block = malloc(length);

usr.bin/dig/lib/dns/message.c

127

if (block == NULL)

usr.bin/dig/lib/dns/message.c

130

block->count = count;

usr.bin/dig/lib/dns/message.c

131

block->remaining = count;

usr.bin/dig/lib/dns/message.c

133

ISC_LINK_INIT(block, link);

usr.bin/dig/lib/dns/message.c

135

return (block);

usr.bin/dig/lib/dns/message.c

143

msgblock_internalget(dns_msgblock_t *block, unsigned int sizeof_type) {

usr.bin/dig/lib/dns/message.c

146

if (block == NULL || block->remaining == 0)

usr.bin/dig/lib/dns/message.c

149

block->remaining--;

usr.bin/dig/lib/dns/message.c

151

ptr = (((unsigned char *)block)

usr.bin/dig/lib/dns/message.c

153

+ (sizeof_type * block->remaining));

usr.bin/dig/lib/dns/message.c

159

msgblock_reset(dns_msgblock_t *block) {

usr.bin/dig/lib/dns/message.c

160

block->remaining = block->count;

usr.bin/less/ch.c

158

if (ch_block == bp->block && ch_offset < bp->datasize)

usr.bin/less/ch.c

170

if (bp->block == ch_block) {

usr.bin/less/ch.c

188

bufnode_buf(ch_buftail)->block != -1) {

usr.bin/less/ch.c

208

bp->block = ch_block;

usr.bin/less/ch.c

383

BLOCKNUM block;

usr.bin/less/ch.c

387

for (block = 0; block < nblocks; block++) {

usr.bin/less/ch.c

391

if (bp->block == block) {

usr.bin/less/ch.c

409

buffered(BLOCKNUM block)

usr.bin/less/ch.c

415

h = BUFHASH(block);

usr.bin/less/ch.c

418

if (bp->block == block)

usr.bin/less/ch.c

44

BLOCKNUM block;

usr.bin/less/ch.c

514

if (bufnode_buf(bn)->block < bufnode_buf(firstbn)->block)

usr.bin/less/ch.c

517

ch_block = bufnode_buf(firstbn)->block;

usr.bin/less/ch.c

62

BLOCKNUM block;

usr.bin/less/ch.c

631

bufnode_buf(bn)->block = -1;

usr.bin/less/ch.c

674

bp->block = -1;

usr.bin/less/ch.c

70

#define ch_block thisfile->block

usr.bin/less/ch.c

752

thisfile->block = 0;

usr.bin/mail/def.h

100

#define positionof(block, offset) ((off_t)(block) * 4096 + (offset))

usr.bin/mandoc/out.c

189

dp->block == 0 ? 0 :

usr.bin/mandoc/tbl.h

98

int block; /* T{ text block T} */

usr.bin/mandoc/tbl_data.c

222

dat->block = 1;

usr.bin/mandoc/tbl_data.c

99

dat->block = 0;

usr.bin/mandoc/tree.c

523

putchar(dp->block ? '{' : '[');

usr.bin/mandoc/tree.c

526

putchar(dp->block ? '}' : ']');

usr.bin/pr/pr.c

855

sigset_t block, oblock;

usr.bin/pr/pr.c

864

sigemptyset(&block);

usr.bin/pr/pr.c

865

sigaddset(&block, SIGINT);

usr.bin/pr/pr.c

866

sigprocmask(SIG_BLOCK, &block, &oblock);

usr.bin/rcs/diff3.c

889

char block[BUFSIZ+1];

usr.bin/rcs/diff3.c

900

r = fread(block, 1, j, fp[2]);

usr.bin/rcs/diff3.c

908

block[j] = '\0';

usr.bin/rcs/diff3.c

909

diff_output("%s", block);

usr.bin/rdist/child.c

219

waitproc(int *statval, int block)

usr.bin/rdist/child.c

226

(block) ? "blocking" : "nonblocking", activechildren);

usr.bin/rdist/child.c

228

pid = waitpid(-1, &status, (block) ? 0 : WNOHANG);

usr.bin/telnet/telnet.c

1785

Scheduler(int block) /* should we block in the select ? */

usr.bin/telnet/telnet.c

1821

returnValue = process_rings(netin, netout, netex, ttyin, ttyout, !block);

usr.bin/tftp/tftp.c

137

uint16_t block = 0;

usr.bin/tftp/tftp.c

160

dp->th_block = htons(block);

usr.bin/tftp/tftp.c

239

if (ap->th_block == block)

usr.bin/tftp/tftp.c

245

if (ap->th_block == (block - 1))

usr.bin/tftp/tftp.c

256

block++;

usr.bin/tftp/tftp.c

284

uint16_t block;

usr.bin/tftp/tftp.c

292

block = 1;

usr.bin/tftp/tftp.c

306

ap->th_block = htons(block);

usr.bin/tftp/tftp.c

308

block++;

usr.bin/tftp/tftp.c

374

block = 0;

usr.bin/tftp/tftp.c

387

if (dp->th_block == block)

usr.bin/tftp/tftp.c

393

if (dp->th_block == (block - 1))

usr.bin/tftp/tftp.c

411

ap->th_block = htons(block);

usr.sbin/btrace/bt_parse.y

133

%type <v.stmt> action stmt stmtblck stmtlist block

usr.sbin/btrace/bt_parse.y

251

stmtblck: IF '(' expr ')' block { $$ = bt_new($3, $5, NULL); }

usr.sbin/btrace/bt_parse.y

252

| IF '(' expr ')' block ELSE block { $$ = bt_new($3, $5, $7); }

usr.sbin/btrace/bt_parse.y

253

| IF '(' expr ')' block ELSE stmtblck { $$ = bt_new($3, $5, $7); }

usr.sbin/btrace/bt_parse.y

262

block : action

usr.sbin/httpd/parse.y

1176

filter : block RETURN NUMBER optstring {

usr.sbin/httpd/parse.y

1196

| block DROP {

usr.sbin/httpd/parse.y

1200

| block {

usr.sbin/httpd/parse.y

1210

block : BLOCK {

usr.sbin/nsd/configparser.y

250

| blocks block ;

usr.sbin/nsd/configparser.y

252

block:

usr.sbin/nsd/ixfr.c

112

void* ret = pcomp->block + pcomp->alloc_now;

usr.sbin/nsd/ixfr.c

66

uint8_t block[sizeof(struct rrcompress_entry)*1024];

usr.sbin/nsd/ixfr.c

86

pcomp->alloc_max = sizeof(pcomp->block);

usr.sbin/nsd/region-allocator.c

451

region_recycle(region_type *region, void *block, size_t size)

usr.sbin/nsd/region-allocator.c

455

if(!block || !region->recycle_bin)

usr.sbin/nsd/region-allocator.c

464

struct recycle_elem* elem = (struct recycle_elem*)block;

usr.sbin/nsd/region-allocator.c

491

l = (struct large_elem*)((char*)block-sizeof(struct large_elem));

usr.sbin/nsd/region-allocator.h

141

void region_recycle(region_type *region, void *block, size_t size);

usr.sbin/nsd/simdzone/src/generic/name.h

101

if (unlikely(block.backslashes & mask)) {

usr.sbin/nsd/simdzone/src/generic/name.h

103

block.backslashes &= -block.backslashes;

usr.sbin/nsd/simdzone/src/generic/name.h

104

mask = block.backslashes - 1;

usr.sbin/nsd/simdzone/src/generic/name.h

105

block.dots &= mask;

usr.sbin/nsd/simdzone/src/generic/name.h

116

block.dots &= mask;

usr.sbin/nsd/simdzone/src/generic/name.h

124

if (unlikely(block.dots & ((block.dots >> 1) | carry)))

usr.sbin/nsd/simdzone/src/generic/name.h

126

carry = block.dots >> (count - 1);

usr.sbin/nsd/simdzone/src/generic/name.h

128

if (likely(block.dots)) {

usr.sbin/nsd/simdzone/src/generic/name.h

129

count = trailing_zeroes(block.dots) + base;

usr.sbin/nsd/simdzone/src/generic/name.h

130

block.dots = clear_lowest_bit(block.dots);

usr.sbin/nsd/simdzone/src/generic/name.h

136

while (block.dots) {

usr.sbin/nsd/simdzone/src/generic/name.h

137

count = trailing_zeroes(block.dots) + base;

usr.sbin/nsd/simdzone/src/generic/name.h

138

block.dots = clear_lowest_bit(block.dots);

usr.sbin/nsd/simdzone/src/generic/name.h

20

name_block_t *block, const char *text, uint8_t *wire)

usr.sbin/nsd/simdzone/src/generic/name.h

25

block->backslashes = simd_find_8x32(&input, '\\');

usr.sbin/nsd/simdzone/src/generic/name.h

26

block->dots = simd_find_8x32(&input, '.');

usr.sbin/nsd/simdzone/src/generic/name.h

39

name_block_t block;

usr.sbin/nsd/simdzone/src/generic/name.h

46

copy_name_block(&block, text, wire);

usr.sbin/nsd/simdzone/src/generic/name.h

55

if (unlikely(block.backslashes & mask))

usr.sbin/nsd/simdzone/src/generic/name.h

59

if (unlikely(block.dots & 1llu))

usr.sbin/nsd/simdzone/src/generic/name.h

63

block.dots &= mask;

usr.sbin/nsd/simdzone/src/generic/name.h

64

carry = (block.dots >> (length - 1));

usr.sbin/nsd/simdzone/src/generic/name.h

67

if (unlikely(block.dots & (block.dots >> 1)))

usr.sbin/nsd/simdzone/src/generic/name.h

70

if (likely(block.dots)) {

usr.sbin/nsd/simdzone/src/generic/name.h

71

count = trailing_zeroes(block.dots);

usr.sbin/nsd/simdzone/src/generic/name.h

72

block.dots = clear_lowest_bit(block.dots);

usr.sbin/nsd/simdzone/src/generic/name.h

75

while (block.dots) {

usr.sbin/nsd/simdzone/src/generic/name.h

76

count = trailing_zeroes(block.dots);

usr.sbin/nsd/simdzone/src/generic/name.h

77

block.dots = clear_lowest_bit(block.dots);

usr.sbin/nsd/simdzone/src/generic/name.h

93

copy_name_block(&block, text, wire);

usr.sbin/nsd/simdzone/src/generic/nsec.h

43

const uint8_t block = bit / 8;

usr.sbin/nsd/simdzone/src/generic/nsec.h

49

windows[window] |= 1 << block;

usr.sbin/nsd/simdzone/src/generic/nsec.h

50

bitmap[window][2 + block] |= (1 << (7 - bit % 8));

usr.sbin/nsd/simdzone/src/generic/nxt.h

34

uint8_t block = (uint8_t)(code / 8), highest_block = block;

usr.sbin/nsd/simdzone/src/generic/nxt.h

36

memset(rdata->octets, 0, block + 1);

usr.sbin/nsd/simdzone/src/generic/nxt.h

37

rdata->octets[block] = (uint8_t)(1 << (7 - bit));

usr.sbin/nsd/simdzone/src/generic/nxt.h

44

block = (uint8_t)(code / 8);

usr.sbin/nsd/simdzone/src/generic/nxt.h

45

if (block > highest_block) {

usr.sbin/nsd/simdzone/src/generic/nxt.h

46

memset(&rdata->octets[highest_block+1], 0, block - highest_block);

usr.sbin/nsd/simdzone/src/generic/nxt.h

47

highest_block = block;

usr.sbin/nsd/simdzone/src/generic/nxt.h

49

rdata->octets[block] |= 1 << (7 - bit);

usr.sbin/nsd/simdzone/src/generic/scanner.h

127

typedef struct block block_t;

usr.sbin/nsd/simdzone/src/generic/scanner.h

144

static really_inline void scan(parser_t *parser, block_t *block)

usr.sbin/nsd/simdzone/src/generic/scanner.h

149

block->newline = simd_find_8x64(&block->input, '\n');

usr.sbin/nsd/simdzone/src/generic/scanner.h

150

block->backslash = simd_find_8x64(&block->input, '\\');

usr.sbin/nsd/simdzone/src/generic/scanner.h

151

block->escaped = find_escaped(

usr.sbin/nsd/simdzone/src/generic/scanner.h

152

block->backslash, &parser->file->state.is_escaped);

usr.sbin/nsd/simdzone/src/generic/scanner.h

154

block->comment = 0;

usr.sbin/nsd/simdzone/src/generic/scanner.h

155

block->quoted = simd_find_8x64(&block->input, '"') & ~block->escaped;

usr.sbin/nsd/simdzone/src/generic/scanner.h

156

block->semicolon = simd_find_8x64(&block->input, ';') & ~block->escaped;

usr.sbin/nsd/simdzone/src/generic/scanner.h

158

block->in_quoted = parser->file->state.in_quoted;

usr.sbin/nsd/simdzone/src/generic/scanner.h

159

block->in_comment = parser->file->state.in_comment;

usr.sbin/nsd/simdzone/src/generic/scanner.h

161

if (block->in_comment || block->semicolon) {

usr.sbin/nsd/simdzone/src/generic/scanner.h

163

block->quoted,

usr.sbin/nsd/simdzone/src/generic/scanner.h

164

block->semicolon,

usr.sbin/nsd/simdzone/src/generic/scanner.h

165

block->newline,

usr.sbin/nsd/simdzone/src/generic/scanner.h

166

block->in_quoted,

usr.sbin/nsd/simdzone/src/generic/scanner.h

167

block->in_comment,

usr.sbin/nsd/simdzone/src/generic/scanner.h

168

&block->quoted,

usr.sbin/nsd/simdzone/src/generic/scanner.h

169

&block->comment);

usr.sbin/nsd/simdzone/src/generic/scanner.h

171

block->in_quoted ^= prefix_xor(block->quoted);

usr.sbin/nsd/simdzone/src/generic/scanner.h

172

parser->file->state.in_quoted = (uint64_t)((int64_t)block->in_quoted >> 63);

usr.sbin/nsd/simdzone/src/generic/scanner.h

173

block->in_comment ^= prefix_xor(block->comment);

usr.sbin/nsd/simdzone/src/generic/scanner.h

174

parser->file->state.in_comment = (uint64_t)((int64_t)block->in_comment >> 63);

usr.sbin/nsd/simdzone/src/generic/scanner.h

176

block->in_quoted ^= prefix_xor(block->quoted);

usr.sbin/nsd/simdzone/src/generic/scanner.h

177

parser->file->state.in_quoted = (uint64_t)((int64_t)block->in_quoted >> 63);

usr.sbin/nsd/simdzone/src/generic/scanner.h

180

block->blank =

usr.sbin/nsd/simdzone/src/generic/scanner.h

181

simd_find_any_8x64(&block->input, blank) & ~(block->escaped | block->in_quoted | block->in_comment);

usr.sbin/nsd/simdzone/src/generic/scanner.h

182

block->special =

usr.sbin/nsd/simdzone/src/generic/scanner.h

183

simd_find_any_8x64(&block->input, special) & ~(block->escaped | block->in_quoted | block->in_comment);

usr.sbin/nsd/simdzone/src/generic/scanner.h

185

block->contiguous =

usr.sbin/nsd/simdzone/src/generic/scanner.h

186

~(block->blank | block->special | block->quoted) & ~(block->in_quoted | block->in_comment);

usr.sbin/nsd/simdzone/src/generic/scanner.h

187

block->follows_contiguous =

usr.sbin/nsd/simdzone/src/generic/scanner.h

188

follows(block->contiguous, &parser->file->state.follows_contiguous);

usr.sbin/nsd/simdzone/src/generic/scanner.h

191

static really_inline void write_indexes(parser_t *parser, const block_t *block, uint64_t clear)

usr.sbin/nsd/simdzone/src/generic/scanner.h

193

uint64_t fields = (block->contiguous & ~block->follows_contiguous) |

usr.sbin/nsd/simdzone/src/generic/scanner.h

194

(block->quoted & block->in_quoted) |

usr.sbin/nsd/simdzone/src/generic/scanner.h

195

(block->special);

usr.sbin/nsd/simdzone/src/generic/scanner.h

201

uint64_t delimiters = (~block->contiguous & block->follows_contiguous) |

usr.sbin/nsd/simdzone/src/generic/scanner.h

202

(block->quoted & ~block->in_quoted);

usr.sbin/nsd/simdzone/src/generic/scanner.h

222

uint64_t newlines = block->newline & (block->contiguous | block->in_quoted);

usr.sbin/nsd/simdzone/src/generic/scanner.h

237

if (field & block->newline) {

usr.sbin/nsd/simdzone/src/generic/scanner.h

292

block_t block = { 0 };

usr.sbin/nsd/simdzone/src/generic/scanner.h

304

simd_loadu_8x64(&block.input, (const uint8_t *)data);

usr.sbin/nsd/simdzone/src/generic/scanner.h

305

scan(parser, &block);

usr.sbin/nsd/simdzone/src/generic/scanner.h

306

write_indexes(parser, &block, 0);

usr.sbin/nsd/simdzone/src/generic/scanner.h

326

simd_loadu_8x64(&block.input, buffer);

usr.sbin/nsd/simdzone/src/generic/scanner.h

327

scan(parser, &block);

usr.sbin/nsd/simdzone/src/generic/scanner.h

328

block.contiguous &= ~clear;

usr.sbin/nsd/simdzone/src/generic/scanner.h

329

write_indexes(parser, &block, clear);

usr.sbin/nsd/simdzone/src/generic/scanner.h

335

return (uint64_t)((int64_t)(block.contiguous | block.in_quoted) >> 63) != 0;

usr.sbin/nsd/simdzone/src/generic/text.h

38

string_block_t *block, const char *text, uint8_t *wire)

usr.sbin/nsd/simdzone/src/generic/text.h

43

block->backslashes = simd_find_8x32(&input, '\\');

usr.sbin/nsd/simdzone/src/generic/text.h

55

string_block_t block;

usr.sbin/nsd/simdzone/src/generic/text.h

57

copy_string_block(&block, text, octets);

usr.sbin/nsd/simdzone/src/generic/text.h

65

if (unlikely(block.backslashes & mask))

usr.sbin/nsd/simdzone/src/generic/text.h

76

copy_string_block(&block, text, wire);

usr.sbin/nsd/simdzone/src/generic/text.h

83

if (unlikely(block.backslashes & mask)) {

usr.sbin/nsd/simdzone/src/generic/text.h

85

block.backslashes &= -block.backslashes;

usr.sbin/nsd/simdzone/src/generic/text.h

86

mask = block.backslashes - 1;

usr.sbin/rpc.lockd/lockd_lock.c

313

if (lckarg->block) {

usr.sbin/rpc.lockd/lockd_lock.c

340

retval = do_lock(newfl, lckarg->block);

usr.sbin/rpc.lockd/lockd_lock.c

503

do_lock(struct file_lock *fl, int block)

usr.sbin/rpc.lockd/lockd_lock.c

534

fl->client.exclusive ? " (exclusive)":"", block ? " (block)":"",

usr.sbin/rpc.lockd/lockd_lock.c

542

if (error != 0 && errno == EAGAIN && block) {

usr.sbin/rpc.lockd/lockd_lock.c

733

sigset_t block;

usr.sbin/rpc.lockd/lockd_lock.c

735

sigemptyset(&block);

usr.sbin/rpc.lockd/lockd_lock.c

736

sigaddset(&block, SIGCHLD);

usr.sbin/rpc.lockd/lockd_lock.c

738

if (sigprocmask(SIG_BLOCK, &block, NULL) == -1) {

usr.sbin/rpc.lockd/lockd_lock.c

746

sigset_t block;

usr.sbin/rpc.lockd/lockd_lock.c

748

sigemptyset(&block);

usr.sbin/rpc.lockd/lockd_lock.c

749

sigaddset(&block, SIGCHLD);

usr.sbin/rpc.lockd/lockd_lock.c

751

if (sigprocmask(SIG_UNBLOCK, &block, NULL) == -1) {

usr.sbin/rpc.lockd/procs.c

388

arg4.block = arg->block;

usr.sbin/rpc.lockd/procs.c

411

arg4.block = arg->block;

usr.sbin/rpc.lockd/test.c

305

arg.block = 0;

usr.sbin/smtpd/mta.c

179

struct mta_block *block;

usr.sbin/smtpd/mta.c

441

SPLAY_FOREACH(block, mta_block_tree, &blocks) {

usr.sbin/smtpd/mta.c

443

mta_source_to_text(block->source),

usr.sbin/smtpd/mta.c

444

block->domain ? block->domain : "*");

usr.sbin/tftpd/tftpd.c

1143

client->block = 1;

usr.sbin/tftpd/tftpd.c

1158

dp->th_block = htons(client->block);

usr.sbin/tftpd/tftpd.c

1235

if (ap->th_block != client->block) {

usr.sbin/tftpd/tftpd.c

1241

if (ap->th_block != (client->block - 1))

usr.sbin/tftpd/tftpd.c

1253

client->block++;

usr.sbin/tftpd/tftpd.c

1298

ap->th_block = htons(client->block);

usr.sbin/tftpd/tftpd.c

1315

client->block++;

usr.sbin/tftpd/tftpd.c

1366

if (dp->th_block != client->block) {

usr.sbin/tftpd/tftpd.c

1372

if (dp->th_block != (client->block - 1))

usr.sbin/tftpd/tftpd.c

1447

if (dp->th_block != client->block)

usr.sbin/tftpd/tftpd.c

146

u_int16_t block;

usr.sbin/tftpd/tftpd.c

1550

client->block = 1;

usr.sbin/unbound/sldns/str2wire.c

2010

int block;

usr.sbin/unbound/sldns/str2wire.c

2045

for(block = 0; block <= (int)maxtype/256; block++) {

usr.sbin/unbound/sldns/str2wire.c

2047

if(!window_in_use[block])

usr.sbin/unbound/sldns/str2wire.c

2050

if(typebits[block*32+i] != 0)

usr.sbin/unbound/sldns/str2wire.c

2057

rd[used+0] = (uint8_t)block;

usr.sbin/unbound/sldns/str2wire.c

2060

rd[used+2+i] = typebits[block*32+i];

usr.sbin/vmd/vioscsi.c

348

vioscsi_start_read(struct virtio_dev *dev, off_t block, size_t n_blocks)

usr.sbin/vmd/vioscsi.c

365

info->offset = block * VIOSCSI_BLOCK_SIZE_CDROM;