#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: magma.c,v 1.64 2021/08/07 16:19:15 thorpej Exp $");
#if 0
#define MAGMA_DEBUG
#endif
#include "magma.h"
#if NMAGMA > 0
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/proc.h>
#include <sys/device.h>
#include <sys/file.h>
#include <sys/ioctl.h>
#include <sys/malloc.h>
#include <sys/tty.h>
#include <sys/time.h>
#include <sys/kernel.h>
#include <sys/syslog.h>
#include <sys/conf.h>
#include <sys/errno.h>
#include <sys/kauth.h>
#include <sys/intr.h>
#include <sys/bus.h>
#include <machine/autoconf.h>
#include <dev/sbus/sbusvar.h>
#include <dev/ic/cd1400reg.h>
#include <dev/ic/cd1190reg.h>
#include <dev/sbus/mbppio.h>
#include <dev/sbus/magmareg.h>
#include "ioconf.h"
static struct magma_board_info supported_cards[] = {
{
"MAGMA_Sp", "MAGMA,4_Sp", "Magma 4 Sp", 4, 0,
1, 0xa000, 0xc000, 0xe000, { 0x8000, 0, 0, 0 },
0, { 0, 0 }
},
{
"MAGMA_Sp", "MAGMA,8_Sp", "Magma 8 Sp", 8, 0,
2, 0xa000, 0xc000, 0xe000, { 0x4000, 0x6000, 0, 0 },
0, { 0, 0 }
},
{
"MAGMA_Sp", "MAGMA,_8HS_Sp", "Magma Fast 8 Sp", 8, 0,
2, 0x2000, 0x4000, 0x6000, { 0x8000, 0xa000, 0, 0 },
0, { 0, 0 }
},
{
"MAGMA_Sp", "MAGMA,_8SP_422", "Magma 8 Sp - 422", 8, 0,
2, 0x2000, 0x4000, 0x6000, { 0x8000, 0xa000, 0, 0 },
0, { 0, 0 }
},
{
"MAGMA_Sp", "MAGMA,12_Sp", "Magma 12 Sp", 12, 0,
3, 0xa000, 0xc000, 0xe000, { 0x2000, 0x4000, 0x6000, 0 },
0, { 0, 0 }
},
{
"MAGMA_Sp", "MAGMA,16_Sp", "Magma 16 Sp", 16, 0,
4, 0xd000, 0xe000, 0xf000, { 0x8000, 0x9000, 0xa000, 0xb000 },
0, { 0, 0 }
},
{
"MAGMA_Sp", "MAGMA,16_Sp_2", "Magma 16 Sp", 16, 0,
4, 0x2000, 0x4000, 0x6000, { 0x8000, 0xa000, 0xc000, 0xe000 },
0, { 0, 0 }
},
{
"MAGMA_Sp", "MAGMA,16HS_Sp", "Magma Fast 16 Sp", 16, 0,
4, 0x2000, 0x4000, 0x6000, { 0x8000, 0xa000, 0xc000, 0xe000 },
0, { 0, 0 }
},
{
"MAGMA_Sp", "MAGMA,21_Sp", "Magma LC 2+1 Sp", 2, 1,
1, 0xa000, 0xc000, 0xe000, { 0x8000, 0, 0, 0 },
0, { 0, 0 }
},
{
"MAGMA_Sp", "MAGMA,21HS_Sp", "Magma 2+1 Sp", 2, 1,
1, 0xa000, 0xc000, 0xe000, { 0x4000, 0, 0, 0 },
1, { 0x6000, 0 }
},
{
"MAGMA_Sp", "MAGMA,41_Sp", "Magma 4+1 Sp", 4, 1,
1, 0xa000, 0xc000, 0xe000, { 0x4000, 0, 0, 0 },
1, { 0x6000, 0 }
},
{
"MAGMA_Sp", "MAGMA,82_Sp", "Magma 8+2 Sp", 8, 2,
2, 0xd000, 0xe000, 0xf000, { 0x8000, 0x9000, 0, 0 },
2, { 0xa000, 0xb000 }
},
{
"MAGMA_Sp", "MAGMA,P1_Sp", "Magma P1 Sp", 0, 1,
0, 0, 0, 0, { 0, 0, 0, 0 },
1, { 0x8000, 0 }
},
{
"MAGMA_Sp", "MAGMA,P2_Sp", "Magma P2 Sp", 0, 2,
0, 0, 0, 0, { 0, 0, 0, 0 },
2, { 0x4000, 0x8000 }
},
{
"MAGMA 2+1HS Sp", "", "Magma 2+1HS Sp", 2, 0,
1, 0xa000, 0xc000, 0xe000, { 0x4000, 0, 0, 0 },
1, { 0x8000, 0 }
},
{
NULL, NULL, NULL, 0, 0,
0, 0, 0, 0, { 0, 0, 0, 0 },
0, { 0, 0 }
}
};
CFATTACH_DECL_NEW(magma, sizeof(struct magma_softc),
magma_match, magma_attach, NULL, NULL);
CFATTACH_DECL_NEW(mtty, sizeof(struct mtty_softc),
mtty_match, mtty_attach, NULL, NULL);
CFATTACH_DECL_NEW(mbpp, sizeof(struct mbpp_softc),
mbpp_match, mbpp_attach, NULL, NULL);
dev_type_open(mttyopen);
dev_type_close(mttyclose);
dev_type_read(mttyread);
dev_type_write(mttywrite);
dev_type_ioctl(mttyioctl);
dev_type_stop(mttystop);
dev_type_tty(mttytty);
dev_type_poll(mttypoll);
const struct cdevsw mtty_cdevsw = {
.d_open = mttyopen,
.d_close = mttyclose,
.d_read = mttyread,
.d_write = mttywrite,
.d_ioctl = mttyioctl,
.d_stop = mttystop,
.d_tty = mttytty,
.d_poll = mttypoll,
.d_mmap = nommap,
.d_kqfilter = ttykqfilter,
.d_discard = nodiscard,
.d_flag = D_TTY
};
dev_type_open(mbppopen);
dev_type_close(mbppclose);
dev_type_read(mbpp_rw);
dev_type_ioctl(mbppioctl);
const struct cdevsw mbpp_cdevsw = {
.d_open = mbppopen,
.d_close = mbppclose,
.d_read = mbpp_rw,
.d_write = mbpp_rw,
.d_ioctl = mbppioctl,
.d_stop = nostop,
.d_tty = notty,
.d_poll = nopoll,
.d_mmap = nommap,
.d_kqfilter = nokqfilter,
.d_discard = nodiscard,
.d_flag = D_OTHER
};
int
cd1400_compute_baud(speed_t speed, int clock, int *cor, int *bpr)
{
int c, co, br;
if( speed < 50 || speed > 150000 )
return(1);
for( c = 0, co = 8 ; co <= 2048 ; co <<= 2, c++ ) {
br = ((clock * 1000000) + (co * speed) / 2) / (co * speed);
if( br < 0x100 ) {
*bpr = br;
*cor = c;
return(0);
}
}
return(1);
}
inline void
cd1400_write_ccr(struct cd1400 *cd, u_char cmd)
{
while( cd1400_read_reg(cd, CD1400_CCR) )
;
cd1400_write_reg(cd, CD1400_CCR, cmd);
}
inline u_char
cd1400_read_reg(struct cd1400 *cd, int reg)
{
return(cd->cd_reg[reg]);
}
inline void
cd1400_write_reg(struct cd1400 *cd, int reg, u_char value)
{
cd->cd_reg[reg] = value;
}
void
cd1400_enable_transmitter(struct cd1400 *cd, int channel)
{
int s, srer;
s = spltty();
cd1400_write_reg(cd, CD1400_CAR, channel);
srer = cd1400_read_reg(cd, CD1400_SRER);
SET(srer, CD1400_SRER_TXRDY);
cd1400_write_reg(cd, CD1400_SRER, srer);
splx(s);
}
int
magma_match(device_t parent, cfdata_t cf, void *aux)
{
struct sbus_attach_args *sa = aux;
struct magma_board_info *card;
for (card = supported_cards; ; card++) {
if (card->mb_sbusname == NULL)
return (0);
if (strcmp(sa->sa_name, card->mb_sbusname) == 0)
break;
}
dprintf(("magma: matched `%s'\n", sa->sa_name));
dprintf(("magma: magma_prom `%s'\n",
prom_getpropstring(sa->sa_node, "magma_prom")));
dprintf(("magma: intlevels `%s'\n",
prom_getpropstring(sa->sa_node, "intlevels")));
dprintf(("magma: chiprev `%s'\n",
prom_getpropstring(sa->sa_node, "chiprev")));
dprintf(("magma: clock `%s'\n",
prom_getpropstring(sa->sa_node, "clock")));
return (1);
}
void
magma_attach(device_t parent, device_t self, void *aux)
{
struct sbus_attach_args *sa = aux;
struct magma_softc *sc = device_private(self);
struct magma_board_info *card;
bus_space_handle_t bh;
char *magma_prom, *clockstr;
int cd_clock;
int node, chip;
sc->ms_dev = self;
node = sa->sa_node;
magma_prom = prom_getpropstring(node, "magma_prom");
for (card = supported_cards; card->mb_name != NULL; card++) {
if (strcmp(sa->sa_name, card->mb_sbusname) != 0)
continue;
if (strcmp(magma_prom, card->mb_name) == 0)
break;
}
if( card->mb_name == NULL ) {
printf(": %s (unsupported)\n", magma_prom);
return;
}
dprintf((" addr %p", sc));
printf(": %s\n", card->mb_realname);
sc->ms_board = card;
sc->ms_ncd1400 = card->mb_ncd1400;
sc->ms_ncd1190 = card->mb_ncd1190;
if (sbus_bus_map(sa->sa_bustag,
sa->sa_slot, sa->sa_offset, sa->sa_size,
BUS_SPACE_MAP_LINEAR, &bh) != 0) {
aprint_error("%s @ sbus: cannot map registers\n",
device_xname(self));
return;
}
sc->ms_svcackr = (char *)bus_space_vaddr(sa->sa_bustag, bh)
+ card->mb_svcackr;
sc->ms_svcackt = (char *)bus_space_vaddr(sa->sa_bustag, bh)
+ card->mb_svcackt;
sc->ms_svcackm = (char *)bus_space_vaddr(sa->sa_bustag, bh)
+ card->mb_svcackm;
clockstr = prom_getpropstring(node, "clock");
if (*clockstr == '\0')
cd_clock = 25;
else {
cd_clock = 0;
while (*clockstr != '\0')
cd_clock = (cd_clock * 10) + (*clockstr++ - '0');
}
for( chip = 0 ; chip < card->mb_ncd1400 ; chip++ ) {
struct cd1400 *cd = &sc->ms_cd1400[chip];
cd->cd_clock = cd_clock;
cd->cd_reg = (char *)bus_space_vaddr(sa->sa_bustag, bh) +
card->mb_cd1400[chip];
cd->cd_chiprev = cd1400_read_reg(cd, CD1400_GFRCR);
dprintf(("%s attach CD1400 %d addr %p rev %x clock %dMHz\n",
device_xname(sc->ms_dev), chip,
cd->cd_reg, cd->cd_chiprev, cd->cd_clock));
cd1400_write_reg(cd, CD1400_GFRCR, 0x00);
cd1400_write_ccr(cd, CD1400_CCR_CMDRESET | CD1400_CCR_FULLRESET);
while( cd1400_read_reg(cd, CD1400_GFRCR) != cd->cd_chiprev )
;
cd1400_write_reg(cd, CD1400_PPR,
((cd->cd_clock * 1000000 / CD1400_PPR_PRESCALER + 500) / 1000));
if( card->mb_npar && card->mb_ncd1190 == 0 ) {
cd1400_write_reg(cd, CD1400_GCR, CD1400_GCR_PARALLEL);
cd->cd_parmode = 1;
}
}
for( chip = 0 ; chip < card->mb_ncd1190 ; chip++ ) {
struct cd1190 *cd = &sc->ms_cd1190[chip];
cd->cd_reg = (char *)bus_space_vaddr(sa->sa_bustag, bh) +
card->mb_cd1190[chip];
printf("%s: CD1190 %d addr %p (unsupported)\n",
device_xname(self), chip, cd->cd_reg);
}
(void)config_found(self, mtty_match, NULL, CFARGS_NONE);
(void)config_found(self, mbpp_match, NULL, CFARGS_NONE);
if (sa->sa_nintr == 0)
return;
(void)bus_intr_establish(sa->sa_bustag, sa->sa_pri, IPL_SERIAL,
magma_hard, sc);
sc->ms_sicookie = softint_establish(SOFTINT_SERIAL, magma_soft, sc);
if (sc->ms_sicookie == NULL) {
aprint_normal("\n");
aprint_error_dev(sc->ms_dev, "cannot establish soft int handler\n");
return;
}
evcnt_attach_dynamic(&sc->ms_intrcnt, EVCNT_TYPE_INTR, NULL,
device_xname(sc->ms_dev), "intr");
}
int
magma_hard(void *arg)
{
struct magma_softc *sc = arg;
struct cd1400 *cd;
int chip, status = 0;
int serviced = 0;
int needsoftint = 0;
for( chip = 0 ; chip < sc->ms_ncd1400 ; chip++ )
status |= cd1400_read_reg(&sc->ms_cd1400[chip], CD1400_SVRR);
if( ISSET(status, CD1400_SVRR_RXRDY) ) {
u_char rivr = *sc->ms_svcackr;
int port = rivr >> 4;
if( rivr & (1<<3) ) {
struct mbpp_port *mbpp;
int n_chars;
mbpp = &sc->ms_mbpp->ms_port[port];
cd = mbpp->mp_cd1400;
n_chars = cd1400_read_reg(cd, CD1400_RDCR);
while (n_chars--) {
if( mbpp->mp_cnt == 0 ) {
SET(mbpp->mp_flags, MBPPF_WAKEUP);
needsoftint = 1;
break;
}
*mbpp->mp_ptr = cd1400_read_reg(cd,CD1400_RDSR);
mbpp->mp_ptr++;
mbpp->mp_cnt--;
}
} else {
struct mtty_port *mtty;
u_char *ptr, n_chars, line_stat;
mtty = &sc->ms_mtty->ms_port[port];
cd = mtty->mp_cd1400;
if( ISSET(rivr, CD1400_RIVR_EXCEPTION) ) {
line_stat = cd1400_read_reg(cd, CD1400_RDSR);
n_chars = 1;
} else {
line_stat = 0;
n_chars = cd1400_read_reg(cd, CD1400_RDCR);
}
ptr = mtty->mp_rput;
while( n_chars-- ) {
*ptr++ = line_stat;
*ptr++ = cd1400_read_reg(cd, CD1400_RDSR);
if( ptr == mtty->mp_rend ) ptr = mtty->mp_rbuf;
if( ptr == mtty->mp_rget ) {
if( ptr == mtty->mp_rbuf )
ptr = mtty->mp_rend;
ptr -= 2;
SET(mtty->mp_flags, MTTYF_RING_OVERFLOW);
break;
}
}
mtty->mp_rput = ptr;
needsoftint = 1;
}
cd1400_write_reg(cd, CD1400_EOSRR, 0);
serviced = 1;
}
if( ISSET(status, CD1400_SVRR_MDMCH) ) {
u_char mivr = *sc->ms_svcackm;
int port = mivr >> 4;
struct mtty_port *mtty;
int carrier;
u_char msvr;
mtty = &sc->ms_mtty->ms_port[port];
cd = mtty->mp_cd1400;
msvr = cd1400_read_reg(cd, CD1400_MSVR2);
carrier = ISSET(msvr, cd->cd_parmode ? CD1400_MSVR2_DSR : CD1400_MSVR2_CD);
if( mtty->mp_carrier != carrier ) {
SET(mtty->mp_flags, MTTYF_CARRIER_CHANGED);
mtty->mp_carrier = carrier;
needsoftint = 1;
}
cd1400_write_reg(cd, CD1400_EOSRR, 0);
serviced = 1;
}
if( ISSET(status, CD1400_SVRR_TXRDY) ) {
u_char tivr = *sc->ms_svcackt;
int port = tivr >> 4;
if( tivr & (1<<3) ) {
struct mbpp_port *mbpp;
mbpp = &sc->ms_mbpp->ms_port[port];
cd = mbpp->mp_cd1400;
if( mbpp->mp_cnt ) {
int count = 0;
while (mbpp->mp_cnt &&
count++ < CD1400_PAR_FIFO_SIZE) {
cd1400_write_reg(cd, CD1400_TDR,
*mbpp->mp_ptr);
mbpp->mp_ptr++;
mbpp->mp_cnt--;
}
} else {
cd1400_write_reg(cd, CD1400_SRER, 0);
SET(mbpp->mp_flags, MBPPF_WAKEUP);
needsoftint = 1;
}
} else {
struct mtty_port *mtty;
mtty = &sc->ms_mtty->ms_port[port];
cd = mtty->mp_cd1400;
if( !ISSET(mtty->mp_flags, MTTYF_STOP) ) {
int count = 0;
if( ISSET(mtty->mp_flags, MTTYF_SET_BREAK) ) {
cd1400_write_reg(cd, CD1400_TDR, 0);
cd1400_write_reg(cd, CD1400_TDR, 0x81);
CLR(mtty->mp_flags, MTTYF_SET_BREAK);
count += 2;
}
if( ISSET(mtty->mp_flags, MTTYF_CLR_BREAK) ) {
cd1400_write_reg(cd, CD1400_TDR, 0);
cd1400_write_reg(cd, CD1400_TDR, 0x83);
CLR(mtty->mp_flags, MTTYF_CLR_BREAK);
count += 2;
}
while( mtty->mp_txc > 0 && count < CD1400_TX_FIFO_SIZE - 1 ) {
u_char ch;
ch = *mtty->mp_txp;
mtty->mp_txc--;
mtty->mp_txp++;
if( ch == 0 ) {
cd1400_write_reg(cd, CD1400_TDR, ch);
count++;
}
cd1400_write_reg(cd, CD1400_TDR, ch);
count++;
}
}
if( mtty->mp_txc == 0 || ISSET(mtty->mp_flags, MTTYF_STOP) ) {
register int srer;
srer = cd1400_read_reg(cd, CD1400_SRER);
CLR(srer, CD1400_SRER_TXRDY);
cd1400_write_reg(cd, CD1400_SRER, srer);
CLR(mtty->mp_flags, MTTYF_STOP);
SET(mtty->mp_flags, MTTYF_DONE);
needsoftint = 1;
}
}
cd1400_write_reg(cd, CD1400_EOSRR, 0);
serviced = 1;
}
if (needsoftint)
softint_schedule(sc->ms_sicookie);
return(serviced);
}
void
magma_soft(void *arg)
{
struct magma_softc *sc = arg;
struct mtty_softc *mtty = sc->ms_mtty;
struct mbpp_softc *mbpp = sc->ms_mbpp;
int port;
int s, flags;
if (mtty == NULL)
goto chkbpp;
for( port = 0 ; port < mtty->ms_nports ; port++ ) {
struct mtty_port *mp = &mtty->ms_port[port];
struct tty *tp = mp->mp_tty;
if( !ISSET(tp->t_state, TS_ISOPEN) )
continue;
while( mp->mp_rget != mp->mp_rput ) {
u_char stat;
int data;
stat = mp->mp_rget[0];
data = mp->mp_rget[1];
mp->mp_rget = ((mp->mp_rget + 2) == mp->mp_rend)
? mp->mp_rbuf : (mp->mp_rget + 2);
if( stat & (CD1400_RDSR_BREAK | CD1400_RDSR_FE) )
data |= TTY_FE;
if( stat & CD1400_RDSR_PE )
data |= TTY_PE;
if( stat & CD1400_RDSR_OE )
log(LOG_WARNING, "%s%x: fifo overflow\n",
device_xname(mtty->ms_dev), port);
(*tp->t_linesw->l_rint)(data, tp);
}
s = splserial();
flags = mp->mp_flags;
CLR(mp->mp_flags, MTTYF_DONE | MTTYF_CARRIER_CHANGED | MTTYF_RING_OVERFLOW);
splx(s);
if( ISSET(flags, MTTYF_CARRIER_CHANGED) ) {
dprintf(("%s%x: cd %s\n", device_xname(mtty->ms_dev),
port, mp->mp_carrier ? "on" : "off"));
(*tp->t_linesw->l_modem)(tp, mp->mp_carrier);
}
if( ISSET(flags, MTTYF_RING_OVERFLOW) ) {
log(LOG_WARNING, "%s%x: ring buffer overflow\n",
device_xname(mtty->ms_dev), port);
}
if( ISSET(flags, MTTYF_DONE) ) {
ndflush(&tp->t_outq, mp->mp_txp - tp->t_outq.c_cf);
CLR(tp->t_state, TS_BUSY);
(*tp->t_linesw->l_start)(tp);
}
}
chkbpp:
if (mbpp == NULL)
return;
for( port = 0 ; port < mbpp->ms_nports ; port++ ) {
struct mbpp_port *mp = &mbpp->ms_port[port];
if( !ISSET(mp->mp_flags, MBPPF_OPEN) )
continue;
s = splserial();
flags = mp->mp_flags;
CLR(mp->mp_flags, MBPPF_WAKEUP);
splx(s);
if( ISSET(flags, MBPPF_WAKEUP) ) {
wakeup(mp);
}
}
}
int
mtty_match(device_t parent, cfdata_t cf, void *args)
{
struct magma_softc *sc = device_private(parent);
return( args == mtty_match && sc->ms_board->mb_nser && sc->ms_mtty == NULL );
}
void
mtty_attach(device_t parent, device_t self, void *args)
{
struct magma_softc *sc = device_private(parent);
struct mtty_softc *ms = device_private(self);
int port, chip, chan;
sc->ms_dev = self;
sc->ms_mtty = ms;
dprintf((" addr %p", ms));
for( port = 0, chip = 0, chan = 0 ; port < sc->ms_board->mb_nser ; port++ ) {
struct mtty_port *mp = &ms->ms_port[port];
struct tty *tp;
mp->mp_cd1400 = &sc->ms_cd1400[chip];
if (mp->mp_cd1400->cd_parmode && chan == 0)
chan = 1;
mp->mp_channel = chan;
tp = tty_alloc();
if (tp == NULL) {
break;
}
tty_attach(tp);
tp->t_oproc = mtty_start;
tp->t_param = mtty_param;
mp->mp_tty = tp;
mp->mp_rbuf = malloc(MTTY_RBUF_SIZE, M_DEVBUF, M_WAITOK);
mp->mp_rend = mp->mp_rbuf + MTTY_RBUF_SIZE;
chan = (chan + 1) % CD1400_NO_OF_CHANNELS;
if (chan == 0)
chip++;
}
ms->ms_nports = port;
printf(": %d tty%s\n", port, port == 1 ? "" : "s");
}
int
mttyopen(dev_t dev, int flags, int mode, struct lwp *l)
{
int card = MAGMA_CARD(dev);
int port = MAGMA_PORT(dev);
struct mtty_softc *ms;
struct mtty_port *mp;
struct tty *tp;
struct cd1400 *cd;
int error, s;
if ((ms = device_lookup_private(&mtty_cd, card)) == NULL
|| port >= ms->ms_nports )
return(ENXIO);
mp = &ms->ms_port[port];
tp = mp->mp_tty;
tp->t_dev = dev;
if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp))
return (EBUSY);
s = spltty();
if( !ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
ttychars(tp);
tp->t_iflag = TTYDEF_IFLAG;
tp->t_oflag = TTYDEF_OFLAG;
tp->t_cflag = TTYDEF_CFLAG;
if( ISSET(mp->mp_openflags, TIOCFLAG_CLOCAL) )
SET(tp->t_cflag, CLOCAL);
if( ISSET(mp->mp_openflags, TIOCFLAG_CRTSCTS) )
SET(tp->t_cflag, CRTSCTS);
if( ISSET(mp->mp_openflags, TIOCFLAG_MDMBUF) )
SET(tp->t_cflag, MDMBUF);
tp->t_lflag = TTYDEF_LFLAG;
tp->t_ispeed = tp->t_ospeed = TTYDEF_SPEED;
mp->mp_rput = mp->mp_rget = mp->mp_rbuf;
cd = mp->mp_cd1400;
cd1400_write_reg(cd, CD1400_CAR, mp->mp_channel);
cd1400_write_ccr(cd, CD1400_CCR_CMDRESET);
cd1400_write_reg(cd, CD1400_LIVR, port << 4 );
(void)mtty_param(tp, &tp->t_termios);
ttsetwater(tp);
cd1400_write_reg(cd, CD1400_SRER,
CD1400_SRER_RXDATA | CD1400_SRER_MDMCH);
if( ISSET(mp->mp_openflags, TIOCFLAG_SOFTCAR) ||
mp->mp_carrier )
SET(tp->t_state, TS_CARR_ON);
else
CLR(tp->t_state, TS_CARR_ON);
}
splx(s);
error = ttyopen(tp, MTTY_DIALOUT(dev), ISSET(flags, O_NONBLOCK));
if (error != 0)
goto bad;
error = (*tp->t_linesw->l_open)(dev, tp);
if (error != 0)
goto bad;
bad:
if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
}
return (error);
}
int
mttyclose(dev_t dev, int flag, int mode, struct lwp *l)
{
struct mtty_softc *ms = device_lookup_private(&mtty_cd,
MAGMA_CARD(dev));
struct mtty_port *mp = &ms->ms_port[MAGMA_PORT(dev)];
struct tty *tp = mp->mp_tty;
int s;
(*tp->t_linesw->l_close)(tp, flag);
ttyclose(tp);
s = spltty();
if( ISSET(tp->t_cflag, HUPCL) || !ISSET(tp->t_state, TS_ISOPEN) ) {
(void)mtty_modem_control(mp, 0, DMSET);
}
splx(s);
return(0);
}
int
mttyread(dev_t dev, struct uio *uio, int flags)
{
struct mtty_softc *ms = device_lookup_private(&mtty_cd,
MAGMA_CARD(dev));
struct mtty_port *mp = &ms->ms_port[MAGMA_PORT(dev)];
struct tty *tp = mp->mp_tty;
return( (*tp->t_linesw->l_read)(tp, uio, flags) );
}
int
mttywrite(dev_t dev, struct uio *uio, int flags)
{
struct mtty_softc *ms = device_lookup_private(&mtty_cd,
MAGMA_CARD(dev));
struct mtty_port *mp = &ms->ms_port[MAGMA_PORT(dev)];
struct tty *tp = mp->mp_tty;
return( (*tp->t_linesw->l_write)(tp, uio, flags) );
}
int
mttypoll(dev_t dev, int events, struct lwp *l)
{
struct mtty_softc *ms = device_lookup_private(&mtty_cd,
MAGMA_CARD(dev));
struct mtty_port *mp = &ms->ms_port[MAGMA_PORT(dev)];
struct tty *tp = mp->mp_tty;
return ((*tp->t_linesw->l_poll)(tp, events, l));
}
struct tty *
mttytty(dev_t dev)
{
struct mtty_softc *ms = device_lookup_private(&mtty_cd,
MAGMA_CARD(dev));
struct mtty_port *mp = &ms->ms_port[MAGMA_PORT(dev)];
return(mp->mp_tty);
}
int
mttyioctl(dev_t dev, u_long cmd, void *data, int flags, struct lwp *l)
{
struct mtty_softc *ms = device_lookup_private(&mtty_cd,
MAGMA_CARD(dev));
struct mtty_port *mp = &ms->ms_port[MAGMA_PORT(dev)];
struct tty *tp = mp->mp_tty;
int error;
error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flags, l);
if( error != EPASSTHROUGH ) return(error);
error = ttioctl(tp, cmd, data, flags, l);
if( error != EPASSTHROUGH ) return(error);
error = 0;
switch(cmd) {
case TIOCSBRK:
SET(mp->mp_flags, MTTYF_SET_BREAK);
cd1400_enable_transmitter(mp->mp_cd1400, mp->mp_channel);
break;
case TIOCCBRK:
SET(mp->mp_flags, MTTYF_CLR_BREAK);
cd1400_enable_transmitter(mp->mp_cd1400, mp->mp_channel);
break;
case TIOCSDTR:
mtty_modem_control(mp, TIOCM_DTR, DMBIS);
break;
case TIOCCDTR:
mtty_modem_control(mp, TIOCM_DTR, DMBIC);
break;
case TIOCMSET:
mtty_modem_control(mp, *((int *)data), DMSET);
break;
case TIOCMBIS:
mtty_modem_control(mp, *((int *)data), DMBIS);
break;
case TIOCMBIC:
mtty_modem_control(mp, *((int *)data), DMBIC);
break;
case TIOCMGET:
*((int *)data) = mtty_modem_control(mp, 0, DMGET);
break;
case TIOCGFLAGS:
*((int *)data) = mp->mp_openflags;
break;
case TIOCSFLAGS:
if (kauth_authorize_device_tty(l->l_cred,
KAUTH_DEVICE_TTY_PRIVSET, tp))
error = EPERM;
else
mp->mp_openflags = *((int *)data) &
(TIOCFLAG_SOFTCAR | TIOCFLAG_CLOCAL |
TIOCFLAG_CRTSCTS | TIOCFLAG_MDMBUF);
break;
default:
error = EPASSTHROUGH;
}
return(error);
}
void
mttystop(struct tty *tp, int flags)
{
struct mtty_softc *ms = device_lookup_private(&mtty_cd,
MAGMA_CARD(tp->t_dev));
struct mtty_port *mp = &ms->ms_port[MAGMA_PORT(tp->t_dev)];
int s;
s = spltty();
if( ISSET(tp->t_state, TS_BUSY) ) {
if( !ISSET(tp->t_state, TS_TTSTOP) )
SET(tp->t_state, TS_FLUSH);
SET(mp->mp_flags, MTTYF_STOP);
}
splx(s);
}
void
mtty_start(struct tty *tp)
{
struct mtty_softc *ms = device_lookup_private(&mtty_cd,
MAGMA_CARD(tp->t_dev));
struct mtty_port *mp = &ms->ms_port[MAGMA_PORT(tp->t_dev)];
int s;
s = spltty();
if( !ISSET(tp->t_state, TS_TTSTOP | TS_TIMEOUT | TS_BUSY) ) {
if (ttypull(tp)) {
mp->mp_txc = ndqb(&tp->t_outq, 0);
mp->mp_txp = tp->t_outq.c_cf;
SET(tp->t_state, TS_BUSY);
cd1400_enable_transmitter(mp->mp_cd1400, mp->mp_channel);
}
}
splx(s);
}
int
mtty_modem_control(struct mtty_port *mp, int bits, int howto)
{
struct cd1400 *cd = mp->mp_cd1400;
struct tty *tp = mp->mp_tty;
int s, msvr;
s = spltty();
cd1400_write_reg(cd, CD1400_CAR, mp->mp_channel);
switch(howto) {
case DMGET:
bits = 0;
bits |= TIOCM_LE;
msvr = cd1400_read_reg(cd, CD1400_MSVR1);
if( msvr & CD1400_MSVR1_RTS ) bits |= TIOCM_DTR;
msvr = cd1400_read_reg(cd, CD1400_MSVR2);
if( msvr & CD1400_MSVR2_DTR ) bits |= TIOCM_RTS;
if( msvr & CD1400_MSVR2_CTS ) bits |= TIOCM_CTS;
if( msvr & CD1400_MSVR2_RI ) bits |= TIOCM_RI;
if( msvr & CD1400_MSVR2_DSR ) bits |= (cd->cd_parmode ? TIOCM_CD : TIOCM_DSR);
if( msvr & CD1400_MSVR2_CD ) bits |= (cd->cd_parmode ? 0 : TIOCM_CD);
break;
case DMSET:
if( !ISSET(tp->t_cflag, CRTSCTS) )
cd1400_write_reg(cd, CD1400_MSVR2, ((bits & TIOCM_RTS) ? CD1400_MSVR2_DTR : 0));
cd1400_write_reg(cd, CD1400_MSVR1, ((bits & TIOCM_DTR) ? CD1400_MSVR1_RTS : 0));
break;
case DMBIS:
if( (bits & TIOCM_RTS) && !ISSET(tp->t_cflag, CRTSCTS) )
cd1400_write_reg(cd, CD1400_MSVR2, CD1400_MSVR2_DTR);
if( bits & TIOCM_DTR )
cd1400_write_reg(cd, CD1400_MSVR1, CD1400_MSVR1_RTS);
break;
case DMBIC:
if( (bits & TIOCM_RTS) && !ISSET(tp->t_cflag, CRTSCTS) )
cd1400_write_reg(cd, CD1400_MSVR2, 0);
if( bits & TIOCM_DTR )
cd1400_write_reg(cd, CD1400_MSVR1, 0);
break;
}
splx(s);
return(bits);
}
int
mtty_param(struct tty *tp, struct termios *t)
{
struct mtty_softc *ms = device_lookup_private(&mtty_cd,
MAGMA_CARD(tp->t_dev));
struct mtty_port *mp = &ms->ms_port[MAGMA_PORT(tp->t_dev)];
struct cd1400 *cd = mp->mp_cd1400;
int rbpr, tbpr, rcor, tcor;
u_char mcor1 = 0, mcor2 = 0;
int s, opt;
if( t->c_ospeed && cd1400_compute_baud(t->c_ospeed, cd->cd_clock, &tcor, &tbpr) )
return(EINVAL);
if( t->c_ispeed && cd1400_compute_baud(t->c_ispeed, cd->cd_clock, &rcor, &rbpr) )
return(EINVAL);
s = spltty();
(void)mtty_modem_control(mp, TIOCM_DTR, (t->c_ospeed == 0 ? DMBIC : DMBIS));
if( t->c_ospeed ) {
cd1400_write_reg(cd, CD1400_TCOR, tcor);
cd1400_write_reg(cd, CD1400_TBPR, tbpr);
}
if( t->c_ispeed ) {
cd1400_write_reg(cd, CD1400_RCOR, rcor);
cd1400_write_reg(cd, CD1400_RBPR, rbpr);
}
opt = CD1400_CCR_CMDCHANCTL | CD1400_CCR_XMTEN | CD1400_CCR_RCVEN;
cd1400_write_ccr(cd, opt);
opt = 0;
if( ISSET(t->c_cflag, PARENB) )
opt |= (ISSET(t->c_cflag, PARODD) ? CD1400_COR1_PARODD : CD1400_COR1_PARNORMAL);
if( !ISSET(t->c_iflag, INPCK) )
opt |= CD1400_COR1_NOINPCK;
if( ISSET(t->c_cflag, CSTOPB) )
opt |= CD1400_COR1_STOP2;
switch( t->c_cflag & CSIZE ) {
case CS5:
opt |= CD1400_COR1_CS5;
break;
case CS6:
opt |= CD1400_COR1_CS6;
break;
case CS7:
opt |= CD1400_COR1_CS7;
break;
default:
opt |= CD1400_COR1_CS8;
break;
}
cd1400_write_reg(cd, CD1400_COR1, opt);
opt = CD1400_COR2_ETC;
if( ISSET(t->c_cflag, CRTSCTS) ) opt |= CD1400_COR2_CCTS_OFLOW;
cd1400_write_reg(cd, CD1400_COR2, opt);
cd1400_write_reg(cd, CD1400_COR3, MTTY_RX_FIFO_THRESHOLD);
cd1400_write_ccr(cd, CD1400_CCR_CMDCORCHG | CD1400_CCR_COR1 | CD1400_CCR_COR2 | CD1400_CCR_COR3);
cd1400_write_reg(cd, CD1400_COR4, CD1400_COR4_PFO_EXCEPTION);
cd1400_write_reg(cd, CD1400_COR5, 0);
if( ISSET(t->c_cflag, CRTSCTS) )
mcor1 = MTTY_RX_DTR_THRESHOLD;
if( cd->cd_parmode ) {
SET(mcor1, CD1400_MCOR1_DSRzd);
SET(mcor2, CD1400_MCOR2_DSRod);
} else {
SET(mcor1, CD1400_MCOR1_CDzd);
SET(mcor2, CD1400_MCOR2_CDod);
}
cd1400_write_reg(cd, CD1400_MCOR1, mcor1);
cd1400_write_reg(cd, CD1400_MCOR2, mcor2);
cd1400_write_reg(cd, CD1400_RTPR, 2);
splx(s);
return(0);
}
int
mbpp_match(device_t parent, cfdata_t cf, void *args)
{
struct magma_softc *sc = device_private(parent);
return( args == mbpp_match && sc->ms_board->mb_npar && sc->ms_mbpp == NULL );
}
void
mbpp_attach(device_t parent, device_t dev, void *args)
{
struct magma_softc *sc = device_private(parent);
struct mbpp_softc *ms = device_private(dev);
struct mbpp_port *mp;
int port;
sc->ms_mbpp = ms;
dprintf((" addr %p", ms));
for( port = 0 ; port < sc->ms_board->mb_npar ; port++ ) {
mp = &ms->ms_port[port];
callout_init(&mp->mp_timeout_ch, 0);
callout_init(&mp->mp_start_ch, 0);
if( sc->ms_ncd1190 )
mp->mp_cd1190 = &sc->ms_cd1190[port];
else
mp->mp_cd1400 = &sc->ms_cd1400[0];
}
ms->ms_nports = port;
printf(": %d port%s\n", port, port == 1 ? "" : "s");
}
int
mbppopen(dev_t dev, int flags, int mode, struct lwp *l)
{
int card = MAGMA_CARD(dev);
int port = MAGMA_PORT(dev);
struct mbpp_softc *ms;
struct mbpp_port *mp;
int s;
if ((ms = device_lookup_private(&mbpp_cd, card)) == NULL
|| port >= ms->ms_nports )
return(ENXIO);
mp = &ms->ms_port[port];
s = spltty();
if( ISSET(mp->mp_flags, MBPPF_OPEN) ) {
splx(s);
return(EBUSY);
}
SET(mp->mp_flags, MBPPF_OPEN);
splx(s);
mp->mp_burst = MBPP_BURST;
mp->mp_timeout = mbpp_mstohz(MBPP_TIMEOUT);
mp->mp_delay = mbpp_mstohz(MBPP_DELAY);
if( mp->mp_cd1400 ) {
struct cd1400 *cd = mp->mp_cd1400;
s = spltty();
cd1400_write_reg(cd, CD1400_CAR, 0);
cd1400_write_ccr(cd, CD1400_CCR_CMDRESET);
cd1400_write_reg(cd, CD1400_LIVR, (1<<3));
splx(s);
} else {
mp->mp_flags = 0;
return (ENXIO);
}
return (0);
}
int
mbppclose(dev_t dev, int flag, int mode, struct lwp *l)
{
struct mbpp_softc *ms = device_lookup_private(&mbpp_cd,
MAGMA_CARD(dev));
struct mbpp_port *mp = &ms->ms_port[MAGMA_PORT(dev)];
mp->mp_flags = 0;
return(0);
}
int
mbppioctl(dev_t dev, u_long cmd, void *data, int flags, struct lwp *l)
{
struct mbpp_softc *ms = device_lookup_private(&mbpp_cd,
MAGMA_CARD(dev));
struct mbpp_port *mp = &ms->ms_port[MAGMA_PORT(dev)];
struct mbpp_param *bp;
int error = 0;
int s;
switch(cmd) {
case MBPPIOCSPARAM:
bp = (struct mbpp_param *)data;
if( bp->bp_burst < MBPP_BURST_MIN || bp->bp_burst > MBPP_BURST_MAX ||
bp->bp_delay < MBPP_DELAY_MIN || bp->bp_delay > MBPP_DELAY_MIN ) {
error = EINVAL;
} else {
mp->mp_burst = bp->bp_burst;
mp->mp_timeout = mbpp_mstohz(bp->bp_timeout);
mp->mp_delay = mbpp_mstohz(bp->bp_delay);
}
break;
case MBPPIOCGPARAM:
bp = (struct mbpp_param *)data;
bp->bp_burst = mp->mp_burst;
bp->bp_timeout = mbpp_hztoms(mp->mp_timeout);
bp->bp_delay = mbpp_hztoms(mp->mp_delay);
break;
case MBPPIOCGSTAT:
s = spltty();
cd1400_write_reg(mp->mp_cd1400, CD1400_CAR, 0);
*(int *)data = cd1400_read_reg(mp->mp_cd1400, CD1400_PSVR);
splx(s);
break;
default:
error = ENOTTY;
}
return(error);
}
int
mbpp_rw(dev_t dev, struct uio *uio, int flag)
{
int card = MAGMA_CARD(dev);
int port = MAGMA_PORT(dev);
struct mbpp_softc *ms = device_lookup_private(&mbpp_cd, card);
struct mbpp_port *mp = &ms->ms_port[port];
char *buffer, *ptr;
int buflen, cnt, len;
int s, error = 0;
int gotdata = 0;
if( uio->uio_resid == 0 )
return(0);
buflen = uimin(uio->uio_resid, mp->mp_burst);
buffer = malloc(buflen, M_DEVBUF, M_WAITOK);
if( buffer == NULL )
return(ENOMEM);
SET(mp->mp_flags, MBPPF_UIO);
if( mp->mp_timeout > 0 ) {
SET(mp->mp_flags, MBPPF_TIMEOUT);
callout_reset(&mp->mp_timeout_ch, mp->mp_timeout,
mbpp_timeout, mp);
}
len = cnt = 0;
while( uio->uio_resid > 0 ) {
len = uimin(buflen, uio->uio_resid);
ptr = buffer;
if( uio->uio_rw == UIO_WRITE ) {
error = uiomove(ptr, len, uio);
if( error ) break;
}
again:
if( !ISSET(mp->mp_flags, MBPPF_UIO) )
break;
if( uio->uio_rw == UIO_WRITE ) {
cnt = mbpp_send(mp, ptr, len);
} else {
cnt = mbpp_recv(mp, ptr, len);
}
if( uio->uio_rw == UIO_READ ) {
if( cnt ) {
error = uiomove(ptr, cnt, uio);
if( error ) break;
gotdata++;
}
else if( gotdata )
break;
}
if( !ISSET(mp->mp_flags, MBPPF_UIO) )
break;
if( mp->mp_delay > 0 ) {
s = splsoftclock();
SET(mp->mp_flags, MBPPF_DELAY);
callout_reset(&mp->mp_start_ch, mp->mp_delay,
mbpp_start, mp);
error = tsleep(mp, PCATCH | PZERO, "mbppdelay", 0);
splx(s);
if( error ) break;
}
if( uio->uio_rw == UIO_WRITE && cnt != len ) {
ptr += cnt;
len -= cnt;
cnt = 0;
goto again;
}
}
s = splsoftclock();
if( ISSET(mp->mp_flags, MBPPF_TIMEOUT) ) {
callout_stop(&mp->mp_timeout_ch);
CLR(mp->mp_flags, MBPPF_TIMEOUT);
}
if( ISSET(mp->mp_flags, MBPPF_DELAY) ) {
callout_stop(&mp->mp_start_ch);
CLR(mp->mp_flags, MBPPF_DELAY);
}
splx(s);
if( uio->uio_rw == UIO_WRITE && cnt != len ) {
uio->uio_resid += (len - cnt);
}
free(buffer, M_DEVBUF);
return(error);
}
void
mbpp_timeout(void *arg)
{
struct mbpp_port *mp = arg;
CLR(mp->mp_flags, MBPPF_UIO | MBPPF_TIMEOUT);
wakeup(mp);
}
void
mbpp_start(void *arg)
{
struct mbpp_port *mp = arg;
CLR(mp->mp_flags, MBPPF_DELAY);
wakeup(mp);
}
int
mbpp_send(struct mbpp_port *mp, void *ptr, int len)
{
int s;
struct cd1400 *cd = mp->mp_cd1400;
mp->mp_ptr = ptr;
mp->mp_cnt = len;
s = spltty();
if( cd ) {
cd1400_write_reg(cd, CD1400_CAR, 0);
cd1400_write_reg(cd, CD1400_TBPR, 10);
cd1400_write_ccr(cd, CD1400_CCR_CMDCHANCTL | CD1400_CCR_XMTEN);
cd1400_write_reg(cd, CD1400_SRER, CD1400_SRER_TXRDY);
}
tsleep(mp, PCATCH | PZERO, "mbpp_send", 0);
if( cd ) {
cd1400_write_reg(cd, CD1400_CAR, 0);
cd1400_write_reg(cd, CD1400_SRER, 0);
cd1400_write_ccr(cd, CD1400_CCR_CMDCHANCTL | CD1400_CCR_XMTDIS);
cd1400_write_ccr(cd, CD1400_CCR_CMDRESET | CD1400_CCR_FTF);
}
splx(s);
return(len - mp->mp_cnt);
}
int
mbpp_recv(struct mbpp_port *mp, void *ptr, int len)
{
int s;
struct cd1400 *cd = mp->mp_cd1400;
mp->mp_ptr = ptr;
mp->mp_cnt = len;
s = spltty();
if( cd ) {
int rcor, rbpr;
cd1400_write_reg(cd, CD1400_CAR, 0);
if (cd1400_compute_baud(100000, cd->cd_clock, &rcor, &rbpr)) {
splx(s);
return 0;
}
cd1400_write_reg(cd, CD1400_RCOR, rcor);
cd1400_write_reg(cd, CD1400_RBPR, rbpr);
cd1400_write_reg(cd, CD1400_COR3, MBPP_RX_FIFO_THRESHOLD);
cd1400_write_ccr(cd, CD1400_CCR_CMDCORCHG | CD1400_CCR_COR3);
cd1400_write_ccr(cd, CD1400_CCR_CMDCHANCTL | CD1400_CCR_RCVEN);
cd1400_write_reg(cd, CD1400_SRER, CD1400_SRER_RXDATA);
}
tsleep(mp, PCATCH | PZERO, "mbpp_recv", 0);
if( cd ) {
cd1400_write_reg(cd, CD1400_CAR, 0);
cd1400_write_reg(cd, CD1400_SRER, 0);
cd1400_write_ccr(cd, CD1400_CCR_CMDCHANCTL | CD1400_CCR_RCVDIS);
}
splx(s);
return(len - mp->mp_cnt);
}
int
mbpp_hztoms(int h)
{
int m = h;
if( m > 0 )
m = m * 1000 / hz;
return(m);
}
int
mbpp_mstohz(int m)
{
int h = m;
if( h > 0 ) {
h = h * hz / 1000;
if( h == 0 )
h = 1000 / hz;
}
return(h);
}
#endif