MIPS_PHYS_TO_KSEG0
*kvap = (void *)MIPS_PHYS_TO_KSEG0(segs[0]._ds_paddr);
*bshp = MIPS_PHYS_TO_KSEG0(MIPS_KSEG1_TO_PHYS(bsh));
MIPS_PHYS_TO_KSEG0(start) :
MIPS_PHYS_TO_KSEG0(addr + offset), minlen);
*kvap = (void *)MIPS_PHYS_TO_KSEG0(segs[0].ds_addr);
*bshp = MIPS_PHYS_TO_KSEG0(bpa);
*(uint64_t *)MIPS_PHYS_TO_KSEG0(0x800) = (intptr_t)octeon_reset_vector;
arg = (char *)MIPS_PHYS_TO_KSEG0(octeon_btdesc.obt_argv[i]);
#define YAMON_FUNC(ofs) ((intptr_t)*(int32_t *)(MIPS_PHYS_TO_KSEG0(ofs)))
#define CFE_TO_KERNEL_PTR(x) MIPS_PHYS_TO_KSEG0(MIPS_KSEG0_TO_PHYS(x))
*kvap = (void *)MIPS_PHYS_TO_KSEG0(segs[0].ds_addr);
memset((void *)MIPS_PHYS_TO_KSEG0(start), 0, size);
MIPS_PHYS_TO_KSEG0(map->bdm.dm_segs[i].ds_addr
*kvap = (void *)MIPS_PHYS_TO_KSEG0(segs[0].ds_addr);
return cacheable ? MIPS_PHYS_TO_KSEG0(bpa) : MIPS_PHYS_TO_KSEG1(bpa);
#define PG_VADDR(pg) MIPS_PHYS_TO_KSEG0(VM_PAGE_TO_PHYS(pg))
*kernend = (void *)MIPS_PHYS_TO_KSEG0(fb_end);
if (memcmp(page, (void *)MIPS_PHYS_TO_KSEG0(0), 128) == 0)
vbufaddr = MIPS_PHYS_TO_KSEG0(bufaddr);
addr = MIPS_PHYS_TO_KSEG0(word3 & PIP_WQE_WORD3_ADDR);
cmdptr = (uint64_t *)MIPS_PHYS_TO_KSEG0(sc->sc_cmdptr.cmdptr);
gbuf = (uint64_t *)(uintptr_t)MIPS_PHYS_TO_KSEG0(gaddr);
return (uint64_t *)MIPS_PHYS_TO_KSEG0(addr);
void **nmi_vector = (void *)MIPS_PHYS_TO_KSEG0(0x800 + 32*ci->ci_cpuid);
#define MIPS_UTLB_MISS_EXC_VEC MIPS_PHYS_TO_KSEG0(0)
#define MIPS1_GEN_EXC_VEC MIPS_PHYS_TO_KSEG0(0x0080)
#define MIPS3_XTLB_MISS_EXC_VEC MIPS_PHYS_TO_KSEG0(0x0080)
#define MIPS3_CACHE_ERR_EXC_VEC MIPS_PHYS_TO_KSEG0(0x0100)
#define MIPS3_GEN_EXC_VEC MIPS_PHYS_TO_KSEG0(0x0180)
#define MIPS3_INTR_EXC_VEC MIPS_PHYS_TO_KSEG0(0x0200)
*kvap = (void *)MIPS_PHYS_TO_KSEG0(segs[0].ds_addr);
MIPS_PHYS_TO_KSEG0(curaddr);
kva = (void *)MIPS_PHYS_TO_KSEG0(segs->ds_addr);
*hp = (intptr_t)MIPS_PHYS_TO_KSEG0(addr);
*hp = (intptr_t)MIPS_PHYS_TO_KSEG0(addr);
*bshp = MIPS_PHYS_TO_KSEG0(mbst.mbst_sys_start +
va = MIPS_PHYS_TO_KSEG0(va & mci->mci_pdcache_way_mask);
va = MIPS_PHYS_TO_KSEG0(0);
va = MIPS_PHYS_TO_KSEG0(va & mci->mci_sdcache_way_mask);
va = MIPS_PHYS_TO_KSEG0(0);
va = MIPS_PHYS_TO_KSEG0(va & mci->mci_picache_way_mask);
va = MIPS_PHYS_TO_KSEG0(0);
va = MIPS_PHYS_TO_KSEG0(va & way_mask);
va = MIPS_PHYS_TO_KSEG0(va & way_mask);
va = MIPS_PHYS_TO_KSEG0(va & way_mask);
va = MIPS_PHYS_TO_KSEG0(orig_va & mci->mci_picache_way_mask);
vaddr_t va = MIPS_PHYS_TO_KSEG0(0);
va = MIPS_PHYS_TO_KSEG0(va & mci->mci_pdcache_way_mask);
vaddr_t va = MIPS_PHYS_TO_KSEG0(0);
va = MIPS_PHYS_TO_KSEG0(va & mci->mci_sdcache_way_mask);
vaddr_t va = MIPS_PHYS_TO_KSEG0(0);
vaddr_t va = MIPS_PHYS_TO_KSEG0(0);
vaddr_t va = MIPS_PHYS_TO_KSEG0(0);
mips_intern_sdcache_wbinv_range_index(MIPS_PHYS_TO_KSEG0(0),
mips_intern_icache_sync_range_index(MIPS_PHYS_TO_KSEG0(0),
va = MIPS_PHYS_TO_KSEG0(va & mips_cache_info.mci_picache_way_mask);
mips_intern_pdcache_wbinv_range_index(MIPS_PHYS_TO_KSEG0(0),
va = MIPS_PHYS_TO_KSEG0(va & way_mask);
va = MIPS_PHYS_TO_KSEG0(va & way_mask);
r5k_sdcache_wbinv_range(MIPS_PHYS_TO_KSEG0(0), mips_cache_info.mci_sdcache_size);
va = MIPS_PHYS_TO_KSEG0(va & (mips_cache_info.mci_sdcache_size - 1));
tx3920_icache_do_inv_16(MIPS_PHYS_TO_KSEG0(0),
MIPS_PHYS_TO_KSEG0(mips_cache_info.mci_picache_size));
vaddr_t va = MIPS_PHYS_TO_KSEG0(0);
vaddr_t va = MIPS_PHYS_TO_KSEG0(0);
tx3900_icache_do_inv_index_16(MIPS_PHYS_TO_KSEG0(0),
MIPS_PHYS_TO_KSEG0(mips_cache_info.mci_picache_size));
va = MIPS_PHYS_TO_KSEG0(0);
eva = MIPS_PHYS_TO_KSEG0(mips_cache_info.mci_picache_size);
vaddr_t va = MIPS_PHYS_TO_KSEG0(0);
const vaddr_t va = MIPS_PHYS_TO_KSEG0(pa);
maddr_va = (void *)MIPS_PHYS_TO_KSEG0(maddr);
msgbufaddr = (void *) MIPS_PHYS_TO_KSEG0(ptoa(end));
*vap = MIPS_PHYS_TO_KSEG0(pa);
if (v < MIPS_PHYS_TO_KSEG0(pmap_limits.avail_end +
return MIPS_PHYS_TO_KSEG0(pa);
CTASSERT((intptr_t)MIPS_PHYS_TO_KSEG0(0x1000) < 0);
CTASSERT(MIPS_KSEG0_P(MIPS_PHYS_TO_KSEG0(0)));
va = MIPS_PHYS_TO_KSEG0(pa);
MIPS_PHYS_TO_KSEG0(pte_to_paddr(entry) + (va & PGOFSET)),
mips_icache_sync_range(MIPS_PHYS_TO_KSEG0(VM_PAGE_TO_PHYS(pg)),
MIPS_PHYS_TO_KSEG0(pa);
regval = mips3_ld((void *)MIPS_PHYS_TO_KSEG0(A_SCD_SYSTEM_CFG));
MIPS_PHYS_TO_KSEG0(addr + offset), minlen);
*kvap = (void *)MIPS_PHYS_TO_KSEG0(segs[0].ds_addr);
*bshp = MIPS_PHYS_TO_KSEG0(MIPS_KSEG1_TO_PHYS(bsh));
p = (uint16_t *)MIPS_PHYS_TO_KSEG0(ptr + (resid << 1));
mips_dcache_wbinv_range(MIPS_PHYS_TO_KSEG0(pa), PAGE_SIZE);
mips_dcache_wbinv_range_index(MIPS_PHYS_TO_KSEG0(pa),
mips_dcache_wbinv_range_index(MIPS_PHYS_TO_KSEG0(pa),
MIPS_PHYS_TO_KSEG0(addr + offset), minlen);
*kvap = (void *)MIPS_PHYS_TO_KSEG0(segs[0].ds_addr);
*bshp = MIPS_PHYS_TO_KSEG0(bpa);
#define PG_VADDR(pg) MIPS_PHYS_TO_KSEG0(VM_PAGE_TO_PHYS(pg))
*kvap = (void *)MIPS_PHYS_TO_KSEG0(segs[0].ds_addr);
#define SIFBIOS_ENTRY_PTR MIPS_PHYS_TO_KSEG0(0x00001000)
MIPS_PHYS_TO_KSEG0(addr + offset), minlen);
MIPS_PHYS_TO_KSEG0(addr + offset), minlen);
*kvap = (void *)MIPS_PHYS_TO_KSEG0(segs[0].ds_addr);
*bshp = MIPS_PHYS_TO_KSEG0(bpa);
memcpy((void *)MIPS_PHYS_TO_KSEG0(ptr), sdr, scr << 1);
MIPS_PHYS_TO_KSEG0(addr + offset), minlen);
#define ARCS_VECTOR MIPS_PHYS_TO_KSEG0(0x00001000)