Symbol: MIPS_INT_MASK_3
sys/arch/algor/algor/algor_intr.c
142
MIPS_INT_MASK_3|MIPS_INT_MASK_4)) {
sys/arch/algor/algor/algor_intr.c
79
|MIPS_INT_MASK_2|MIPS_INT_MASK_3,
sys/arch/algor/algor/algor_p4032_intr.c
446
if (ipending & MIPS_INT_MASK_3) {
sys/arch/algor/algor/algor_p6032_intr.c
380
if (ipending & MIPS_INT_MASK_3) {
sys/arch/arc/arc/c_magnum.c
98
| MIPS_INT_MASK_3,
sys/arch/arc/arc/c_nec_jazz.c
118
out32(RD94_SYS_EXT_IMASK, cpu_int_mask & (~MIPS_INT_MASK_3 >> 10));
sys/arch/arc/arc/c_nec_jazz.c
59
MIPS_INT_MASK_3,
sys/arch/arc/arc/c_nec_jazz.c
74
return MIPS_INT_MASK_3; /* Keep clock interrupts enabled */
sys/arch/cobalt/cobalt/interrupt.c
445
if (pending & MIPS_INT_MASK_3) {
sys/arch/emips/include/intr.h
52
#define MIPS_SPL3 (MIPS_INT_MASK_3|MIPS_SOFT_INT_MASK_0|MIPS_SOFT_INT_MASK_1)
sys/arch/emips/include/intr.h
55
#define MIPS_SPL_0_1_3 (MIPS_INT_MASK_3|MIPS_SPL_0_1)
sys/arch/emips/include/intr.h
56
#define MIPS_SPL_0_1_2_3 (MIPS_INT_MASK_3|MIPS_SPL_0_1_2)
sys/arch/evbmips/gdium/gdium_intr.c
152
MIPS_INT_MASK_3 |
sys/arch/evbmips/gdium/gdium_intr.c
159
MIPS_INT_MASK_3 |
sys/arch/evbmips/ingenic/intr.c
73
MIPS_INT_MASK_3 |
sys/arch/evbmips/ingenic/intr.c
81
MIPS_INT_MASK_3 |
sys/arch/evbmips/loongson/generic2e_machdep.c
153
.isa_mips_intr = MIPS_INT_MASK_3,
sys/arch/evbmips/loongson/loongson_intr.c
82
MIPS_INT_MASK_3 |
sys/arch/evbmips/loongson/loongson_intr.c
89
MIPS_INT_MASK_3 |
sys/arch/evbmips/malta/malta_intr.c
252
if (ipending & (MIPS_INT_MASK_1 | MIPS_INT_MASK_3)) {
sys/arch/evbmips/malta/malta_intr.c
255
if (ipending & MIPS_INT_MASK_3)
sys/arch/ews4800mips/ews4800mips/tr2_intr.c
191
if (ipending & MIPS_INT_MASK_3) { /* VME */
sys/arch/ews4800mips/ews4800mips/tr2a_intr.c
226
if ((ipending & MIPS_INT_MASK_3) && (intc_cause & INTC_INT3)) {
sys/arch/mips/alchemy/au_icu.c
106
MIPS_INT_MASK_3,
sys/arch/mips/atheros/ar5312.c
375
| MIPS_INT_MASK_3,
sys/arch/mips/atheros/ar7100.c
84
MIPS_INT_MASK_3, /* GMAC1 */
sys/arch/mips/atheros/ar7100.c
89
MIPS_INT_MASK_3 | /* GMAC1 */
sys/arch/mips/atheros/ar9344.c
376
MIPS_INT_MASK_3 | /* GMAC1 */
sys/arch/mipsco/mipsco/mips_3x30.c
57
#define INT_MASK_FPU MIPS_INT_MASK_3
sys/arch/mipsco/mipsco/mips_3x30.c
67
#define MIPS_INT_MASK_SPL3 (MIPS_INT_MASK_3|MIPS_INT_MASK_SPL2)
sys/arch/newsmips/newsmips/news3400.c
59
#define INT_MASK_FPU MIPS_INT_MASK_3
sys/arch/newsmips/newsmips/news4000.c
117
if (ipending & MIPS_INT_MASK_3) {
sys/arch/newsmips/newsmips/news5000.c
159
if (ipending & MIPS_INT_MASK_3) {
sys/arch/pmax/include/intr.h
47
#define MIPS_SPL3 (MIPS_INT_MASK_3|MIPS_SOFT_INT_MASK)
sys/arch/pmax/include/intr.h
50
#define MIPS_SPL_0_1_3 (MIPS_INT_MASK_3|MIPS_SPL_0_1)
sys/arch/pmax/include/intr.h
51
#define MIPS_SPL_0_1_2_3 (MIPS_INT_MASK_3|MIPS_SPL_0_1_2)
sys/arch/pmax/pmax/dec_3100.c
138
mc_cpuspeed(MIPS_PHYS_TO_KSEG1(KN01_SYS_CLOCK), MIPS_INT_MASK_3);
sys/arch/pmax/pmax/dec_3100.c
201
if (ipending & MIPS_INT_MASK_3) {
sys/arch/pmax/pmax/dec_3max.c
302
if (ipending & MIPS_INT_MASK_3) {
sys/arch/pmax/pmax/dec_3maxplus.c
387
if (ipending & MIPS_INT_MASK_3) {
sys/arch/pmax/pmax/dec_3min.c
158
mc_cpuspeed(ioasic_base+IOASIC_SLOT_8_START, MIPS_INT_MASK_3);
sys/arch/pmax/pmax/dec_3min.c
328
if (ipending & MIPS_INT_MASK_3) {
sys/arch/pmax/pmax/dec_5100.c
194
if (ipending & MIPS_INT_MASK_3) {
sys/arch/pmax/pmax/dec_maxine.c
126
[IPL_VM] = MIPS_SOFT_INT_MASK | MIPS_INT_MASK_3,
sys/arch/pmax/pmax/dec_maxine.c
356
if (ipending & MIPS_INT_MASK_3) {
sys/arch/pmax/pmax/interrupt.c
97
MIPS_INT_MASK_3|MIPS_INT_MASK_4)) {
sys/arch/sgimips/sgimips/cpu.c
132
if (pending & MIPS_INT_MASK_3) {
sys/arch/sgimips/sgimips/machdep.c
145
[IPL_SCHED] = MIPS_INT_MASK_4|MIPS_INT_MASK_3|MIPS_INT_MASK_2|