Symbol: inb
regress/sys/arch/i386/ioperm/ioperm.c
78
inb(PORT);
regress/sys/arch/i386/iopl/iopl.c
79
inb(PORT);
sys/arch/arc/arc/p_dti_tyne.c
141
inb(arc_bus_io.bs_vbase + 0x3cf) | 0xc);
sys/arch/arc/include/isa_machdep.h
47
#define isa_inb(x) inb(arc_bus_io.bs_vbase + (x) - arc_bus_io.bs_start)
sys/arch/arc/jazz/jazzio.c
220
while ((vector = inb(jazzio_conf->jc_iointr_status_reg)) != 0) {
sys/arch/arm/footbridge/isa/isa_machdep.c
355
outb(0x4d0, (inb(0x4d0) & ~(1 << irq))
sys/arch/arm/footbridge/isa/isa_machdep.c
359
outb(0x4d1, (inb(0x4d1) & ~(1 << irq))
sys/arch/bebox/include/isa_machdep.h
43
#define isa_inb(x) inb(PREP_BUS_SPACE_IO + (x))
sys/arch/bebox/stand/boot/boot.h
52
u_char inb(int);
sys/arch/bebox/stand/boot/fd.c
402
while (((status = inb(FDC_STATUS(ctlr))) & (RQM | DIO))
sys/arch/bebox/stand/boot/fd.c
424
while ((status = inb(FDC_STATUS(ctlr)) & (RQM | DIO))
sys/arch/bebox/stand/boot/fd.c
437
if (data) *data = (u_char)inb(FDC_DATA(ctlr));
sys/arch/bebox/stand/boot/fd.c
690
data = inb(irc_no ? INT2_CTL0 : INT_CTL0);
sys/arch/bebox/stand/boot/fd.c
764
return ((inb(DMA_SR) & 0x0f) == (1 << chan));
sys/arch/bebox/stand/boot/kbd.c
156
while ((inb(KBSTATP) & KBINRDY) == 0)
sys/arch/bebox/stand/boot/kbd.c
158
dt = inb(KBDATAP);
sys/arch/bebox/stand/boot/kbd.c
177
while (inb(KBSTATP) & KBOUTRDY)
sys/arch/bebox/stand/boot/kbd.c
180
while ((inb(KBSTATP) & KBINRDY) == 0) /* wait input ready */
sys/arch/bebox/stand/boot/kbd.c
182
if ((c = inb(KBDATAP)) != 0x55) {
sys/arch/bebox/stand/boot/kbd.c
186
while (inb(KBSTATP) & KBOUTRDY)
sys/arch/bebox/stand/boot/kbd.c
189
while (inb(KBSTATP) & KBOUTRDY)
sys/arch/bebox/stand/boot/kbd.c
194
while (inb(KBSTATP) & KBOUTRDY)
sys/arch/bebox/stand/boot/kbd.c
211
return ((inb(KBSTATP) & KBINRDY) != 0);
sys/arch/bebox/stand/boot/kbd.c
90
if ((inb(KBSTATP) & KBINRDY) == 0)
sys/arch/bebox/stand/boot/kbd.c
92
} else while ((inb(KBSTATP) & KBINRDY) == 0)
sys/arch/bebox/stand/boot/kbd.c
95
dt = inb(KBDATAP);
sys/arch/bebox/stand/boot/vga.c
409
outb(0x3C5, inb(0x3C5) & ~0x20);
sys/arch/bebox/stand/boot/vga.c
418
outb(0x3C5, inb(0x3C5) | 0x20);
sys/arch/bebox/stand/boot/vreset.c
451
if ((inb(0x3CF) & 0x01) == 0)
sys/arch/bebox/stand/boot/vreset.c
551
(void)inb(0x3da); /* reset attr. address toggle */
sys/arch/bebox/stand/boot/vreset.c
591
i = inb(0x3C7);
sys/arch/bebox/stand/boot/vreset.c
593
i = inb(0x3C7);
sys/arch/bebox/stand/boot/vreset.c
612
i = inb(0x3DA); /* Reset Attr toggle */
sys/arch/bebox/stand/boot/vreset.c
651
outb(0x3D5, inb(0x3D5)|0x01);
sys/arch/bebox/stand/boot/vreset.c
653
outb(0x3D5, inb(0x3D5)&~0x52);
sys/arch/bebox/stand/boot/vreset.c
655
outb(0x3D5, inb(0x3D5)&~0x30);
sys/arch/bebox/stand/boot/vreset.c
661
outb(0x3D5, inb(0x3D5)&~0x4B);
sys/arch/bebox/stand/boot/vreset.c
678
outb(0x3D5, inb(0x3D5)&~0x10);
sys/arch/bebox/stand/boot/wdvar.h
53
#define WDC_READ_REG(chp, reg) inb((chp)->c_cmdreg[(reg)])
sys/arch/bebox/stand/boot/wdvar.h
55
#define WDC_READ_CTLREG(chp, reg) inb((chp)->c_ctlbase)
sys/arch/i386/mca/mca_machdep.c
168
data = inb(MCA_POS_REG(reg));
sys/arch/i386/mca/mca_machdep.c
244
if ((inb(MCA_POS_REG(5)) & MCA_POS5_CHCK) == 0) {
sys/arch/i386/mca/mca_machdep.c
247
if((inb(MCA_POS_REG(5)) & MCA_POS5_CHCK_STAT) == 0)
sys/arch/i386/mca/mca_machdep.c
249
slot+1, inb(MCA_POS_REG(6)),
sys/arch/i386/mca/mca_machdep.c
250
inb(MCA_POS_REG(7)));
sys/arch/i386/mca/mca_machdep.c
329
outb(PORT_DISKLED, inb(PORT_DISKLED) | DISKLED_ON);
sys/arch/i386/mca/mca_machdep.c
338
outb(PORT_DISKLED, inb(PORT_DISKLED) & ~DISKLED_ON);
sys/arch/i386/stand/efiboot/eficpufunc.h
37
uint8_t inb(uint32_t);
sys/arch/i386/stand/lib/comio_direct.c
123
while (!ISSET(stat = inb(combase + com_lsr), LSR_RXRDY))
sys/arch/i386/stand/lib/comio_direct.c
125
c = inb(combase + com_data);
sys/arch/i386/stand/lib/comio_direct.c
126
inb(combase + com_iir);
sys/arch/i386/stand/lib/comio_direct.c
160
while (!ISSET(stat = inb(combase + com_lsr), LSR_TXRDY)
sys/arch/i386/stand/lib/comio_direct.c
167
while (!ISSET(stat = inb(combase + com_lsr), LSR_TXRDY)
sys/arch/i386/stand/lib/comio_direct.c
172
inb(combase + com_iir);
sys/arch/i386/stand/lib/comio_direct.c
191
rate = inb(combase + com_dlbl) | inb(combase + com_dlbh) << 8;
sys/arch/i386/stand/lib/comio_direct.c
224
if (ISSET(inb(combase + com_lsr), LSR_RXRDY)) {
sys/arch/i386/stand/lib/comio_direct.c
227
int c = inb(combase + com_data);
sys/arch/i386/stand/lib/comio_direct.c
228
inb(combase + com_iir);
sys/arch/i386/stand/lib/cpufunc.h
37
u_int8_t inb(unsigned);
sys/arch/i386/stand/lib/gatea20.c
57
(inb(K_STATUS) == 0xff && inb(K_RDWR) == 0xff)) {
sys/arch/i386/stand/lib/gatea20.c
60
data = inb(0x92);
sys/arch/i386/stand/lib/gatea20.c
63
while (inb(K_STATUS) & K_IBUF_FUL);
sys/arch/i386/stand/lib/gatea20.c
65
while (inb(K_STATUS) & K_OBUF_FUL)
sys/arch/i386/stand/lib/gatea20.c
66
(void)inb(K_RDWR);
sys/arch/i386/stand/lib/gatea20.c
70
while (inb(K_STATUS) & K_IBUF_FUL);
sys/arch/i386/stand/lib/gatea20.c
74
while (inb(K_STATUS) & K_IBUF_FUL);
sys/arch/i386/stand/lib/gatea20.c
76
while (inb(K_STATUS) & K_OBUF_FUL)
sys/arch/i386/stand/lib/gatea20.c
77
(void)inb(K_RDWR);
sys/arch/ia64/include/acpi_machdep.h
6
#define acpi_md_OsIn8(x) inb((x))
sys/arch/ia64/include/bus.h
180
((t) == IA64_BUS_SPACE_IO ? (inb((h) + (o))) :\
sys/arch/ia64/include/bus.h
295
*__dst++ = inb(__port); \
sys/arch/ia64/include/bus.h
316
*__dst++ = inb(__port); \
sys/arch/ia64/include/bus.h
337
*__dst++ = inb(__port); \
sys/arch/ia64/include/bus.h
826
outb(addr2, inb(addr1));
sys/arch/ia64/include/bus.h
831
outb(addr2, inb(addr1));
sys/arch/ia64/include/cpufunc.h
113
*buf++ = inb(port);
sys/arch/ibmnws/include/isa_machdep.h
43
#define isa_inb(x) inb(PREP_BUS_SPACE_IO + (x))
sys/arch/mvmeppc/include/isa_machdep.h
38
#define isa_inb(x) inb(PREP_BUS_SPACE_IO + (x))
sys/arch/mvmeppc/mvmeppc/platform_160x.c
119
dsr = inb(0x80000804);
sys/arch/mvmeppc/mvmeppc/platform_160x.c
160
outb(0x80000092, inb(0x80000092) | 1);
sys/arch/mvmeppc/mvmeppc/platform_160x.c
173
pbid[i] = inb(0x80000077);
sys/arch/powerpc/include/pio.h
167
#define in8(a) inb(a)
sys/arch/powerpc/include/pio.h
178
#define in8rb(a) inb(a)
sys/arch/powerpc/pic/pic_prepivr.c
129
(void)inb(pic->pic_cookie);
sys/arch/powerpc/pic/pic_prepivr.c
140
irq = inb(pic->pic_cookie);
sys/arch/prep/include/isa_machdep.h
43
#define isa_inb(x) inb(PREP_BUS_SPACE_IO + (x))
sys/arch/prep/prep/platform.c
114
reg = inb(PREP_BUS_SPACE_IO + 0x92);
sys/arch/prep/prep/platform.c
117
reg = inb(PREP_BUS_SPACE_IO + 0x92);
sys/arch/prep/prep/platform.c
90
l2ctrl = inb(PREP_BUS_SPACE_IO + 0x81c);
sys/arch/prep/prep/platform.c
92
(void)inb(PREP_BUS_SPACE_IO + 0x80c);
sys/arch/prep/stand/boot/boot.h
42
u_char inb(int);
sys/arch/prep/stand/boot/kbd.c
156
while ((inb(KBSTATP) & KBINRDY) == 0)
sys/arch/prep/stand/boot/kbd.c
158
dt = inb(KBDATAP);
sys/arch/prep/stand/boot/kbd.c
177
while (inb(KBSTATP) & KBOUTRDY)
sys/arch/prep/stand/boot/kbd.c
180
while ((inb(KBSTATP) & KBINRDY) == 0) /* wait input ready */
sys/arch/prep/stand/boot/kbd.c
182
if ((c = inb(KBDATAP)) != 0x55) {
sys/arch/prep/stand/boot/kbd.c
186
while (inb(KBSTATP) & KBOUTRDY)
sys/arch/prep/stand/boot/kbd.c
189
while (inb(KBSTATP) & KBOUTRDY)
sys/arch/prep/stand/boot/kbd.c
194
while (inb(KBSTATP) & KBOUTRDY)
sys/arch/prep/stand/boot/kbd.c
90
if ((inb(KBSTATP) & KBINRDY) == 0)
sys/arch/prep/stand/boot/kbd.c
92
} else while ((inb(KBSTATP) & KBINRDY) == 0)
sys/arch/prep/stand/boot/kbd.c
95
dt = inb(KBDATAP);
sys/arch/prep/stand/boot/vga.c
411
outb(0x3C5, inb(0x3C5) & ~0x20);
sys/arch/prep/stand/boot/vga.c
420
outb(0x3C5, inb(0x3C5) | 0x20);
sys/arch/prep/stand/boot/vreset.c
168
if ((inb(VGA_GR_DATA) & 0x01) == 0)
sys/arch/prep/stand/boot/vreset.c
189
outb(VGA_GR_DATA, inb(VGA_GR_DATA) & ~0x30);
sys/arch/prep/stand/boot/vreset.c
192
outb(VGA_GR_DATA, inb(VGA_GR_DATA) & ~0x01);
sys/arch/prep/stand/boot/vreset.c
194
if (!(inb(0xd01) & 0x03)) {
sys/arch/prep/stand/boot/vreset.c
196
outb(VGA_CR_DATA, inb(VGA_CR_DATA) & ~0x90);
sys/arch/prep/stand/boot/vreset.c
198
outb(VGA_CR_DATA, inb(VGA_CR_DATA) | 0x04);
sys/arch/prep/stand/boot/vreset.c
238
(void)inb(0x3da); /* reset attr addr toggle */
sys/arch/prep/stand/boot/vreset.c
278
inb(0x3C7);
sys/arch/prep/stand/boot/vreset.c
280
inb(0x3C7);
sys/arch/prep/stand/boot/vreset.c
296
inb(0x3DA); /* Reset Attr toggle */
sys/arch/prep/stand/boot/vreset.c
324
s3_devid = inb(VGA_CR_DATA) << 8;
sys/arch/prep/stand/boot/vreset.c
326
s3_devid |= inb(VGA_CR_DATA);
sys/arch/prep/stand/boot/vreset.c
341
outb(VGA_CR_DATA, inb(0x3D5)|0x01);
sys/arch/prep/stand/boot/vreset.c
343
outb(VGA_CR_DATA, inb(0x3D5)&~0x52);
sys/arch/prep/stand/boot/vreset.c
345
outb(VGA_CR_DATA, inb(0x3D5)&~0x30);
sys/arch/prep/stand/boot/vreset.c
351
outb(VGA_CR_DATA, inb(0x3D5)&~0x4B);
sys/arch/prep/stand/boot/vreset.c
368
outb(VGA_CR_DATA, inb(0x3D5)&~0x10);
sys/arch/rs6000/mca/mca_machdep.c
139
data = inb(RS6000_BUS_SPACE_IO + MCA_POS_REG(reg) + (slot<<16));
sys/arch/rs6000/mca/mca_machdep.c
205
if ((inb(MCA_POS_REG(5)) & MCA_POS5_CHCK) == 0) {
sys/arch/rs6000/mca/mca_machdep.c
208
if((inb(MCA_POS_REG(5)) & MCA_POS5_CHCK_STAT) == 0)
sys/arch/rs6000/mca/mca_machdep.c
210
slot+1, inb(MCA_POS_REG(6)),
sys/arch/rs6000/mca/mca_machdep.c
211
inb(MCA_POS_REG(7)));
sys/arch/rs6000/mca/mca_machdep.c
248
outb(PORT_DISKLED, inb(PORT_DISKLED) | DISKLED_ON);
sys/arch/rs6000/mca/mca_machdep.c
257
outb(PORT_DISKLED, inb(PORT_DISKLED) & ~DISKLED_ON);
sys/arch/rs6000/rs6000/mainbus.c
104
inb(0xc0400100 + 1 + (slot<<16)),
sys/arch/rs6000/rs6000/mainbus.c
105
inb(0xc0400100 + 0 + (slot<<16)));
sys/arch/rs6000/stand/boot/boot.h
43
u_char inb(int);
sys/arch/sandpoint/include/isa_machdep.h
38
#define isa_inb(x) inb(SANDPOINT_BUS_SPACE_IO + (x))
sys/arch/shark/isa/clock.c
201
return (inb(IO_RTC+1));
sys/arch/shark/isa/clock.c
393
lo = inb(IO_TIMER1 + TIMER_CNTR0);
sys/arch/shark/isa/clock.c
394
hi = inb(IO_TIMER1 + TIMER_CNTR0);
sys/arch/shark/shark/hat.c
102
inb(ATSR_REG1_REG) & ~((REG1_M_TMR2EN) | (REG1_M_SPKREN)));
sys/arch/shark/shark/hat.c
152
inb(ATSR_REG1_REG) | (REG1_M_TMR2EN) | (REG1_M_SPKREN));
sys/arch/x68k/stand/boot/dp8390.c
50
#define NIC_GET(reg) inb(WE_IOBASE + (reg) * 2)
sys/arch/x68k/stand/boot/ne.c
71
#define NIC_INB(x) inb(NIC_PORT(x))
sys/arch/x68k/stand/boot/ne.c
85
#define ASIC_INB(x) inb(ASIC_PORT(x))
sys/arch/x86/include/acpi_machdep.h
51
#define acpi_md_OsIn8(x) inb((x))
sys/arch/x86/include/i8259.h
119
#define MASKDELAY pushl %eax ; inb $0x84,%al ; popl %eax
sys/arch/x86/include/pio.h
39
uint8_t inb(unsigned);
sys/arch/x86/isa/clock.c
238
v1 = inb(IO_TIMER1+TIMER_CNTR0);
sys/arch/x86/isa/clock.c
239
v1 |= inb(IO_TIMER1+TIMER_CNTR0) << 8;
sys/arch/x86/isa/clock.c
240
v2 = inb(IO_TIMER1+TIMER_CNTR0);
sys/arch/x86/isa/clock.c
241
v2 |= inb(IO_TIMER1+TIMER_CNTR0) << 8;
sys/arch/x86/isa/clock.c
242
v3 = inb(IO_TIMER1+TIMER_CNTR0);
sys/arch/x86/isa/clock.c
243
v3 |= inb(IO_TIMER1+TIMER_CNTR0) << 8;
sys/arch/x86/isa/clock.c
391
outb(0x61, inb(0x61) | 0x80);
sys/arch/x86/isa/clock.c
411
rdval = inb(IO_TIMER1+TIMER_CNTR0);
sys/arch/x86/isa/clock.c
412
rdval |= (inb(IO_TIMER1+TIMER_CNTR0) << 8);
sys/arch/x86/isa/clock.c
442
rdval = inb(IO_TIMER1+TIMER_CNTR0);
sys/arch/x86/isa/clock.c
443
rdval |= (inb(IO_TIMER1+TIMER_CNTR0) << 8);
sys/arch/x86/isa/rtc.c
165
return (inb(IO_RTC+1));
sys/arch/x86/pci/pci_machdep.c
887
if (inb(PCI_MODE2_ENABLE_REG) != 0 ||
sys/arch/x86/pci/pci_machdep.c
888
inb(PCI_MODE2_FORWARD_REG) != 0)
sys/arch/x86/x86/bus_space.c
777
outb(addr2, inb(addr1));
sys/arch/x86/x86/bus_space.c
782
outb(addr2, inb(addr1));
sys/arch/x86/x86/identcpu.c
390
return inb(0x23);
sys/arch/x86/x86/intr.c
295
log(LOG_CRIT, "NMI port 61 %x, port 70 %x\n", inb(0x61), inb(0x70));
sys/arch/x86/x86/mpbios.c
1259
mp_busses[bus_id].mb_data = inb(ELCR0) | (inb(ELCR1) << 8);
sys/arch/x86/x86/mpbios.c
981
level_inv = ((uint16_t)inb(ELCR1) << 8) | inb(ELCR0);
sys/arch/x86/x86/vga_post.c
81
return inb(port);
sys/arch/x86/x86/x86_machdep.c
1256
b = inb(0x92);
sys/dev/i2o/dpti.c
375
i = inb(0x71);
sys/dev/i2o/dpti.c
379
j = inb (0x71);
sys/dev/i2o/dpti.c
386
j = inb (0x71);
sys/dev/i2o/dpti.c
395
j = inb(0x71);
sys/dev/i2o/dpti.c
398
j |= inb(0x71);
sys/dev/i2o/dpti.c
405
j = inb(0x71);
sys/dev/i2o/dpti.c
408
j |= inb(0x71);
sys/dev/ic/dpt.c
1214
i = inb(0x71);
sys/dev/ic/dpt.c
1218
j = inb (0x71);
sys/dev/ic/dpt.c
1225
j = inb (0x71);
sys/dev/ic/dpt.c
1234
j = inb(0x71);
sys/dev/ic/dpt.c
1237
j |= inb(0x71);
sys/dev/ic/dpt.c
1244
j = inb(0x71);
sys/dev/ic/dpt.c
1247
j |= inb(0x71);
sys/dev/isa/pas.c
165
#define pasread(p) inb((p))
sys/dev/isa/pas.c
351
t = inb(INTERRUPT_MASK);
sys/dev/isapnp/isapnpvar.h
55
# define ISAPNP_READ_DATA(sc) inb(sc->sc_read_port)
usr.bin/mail/mime_codecs.c
84
mime_iconv(iconv_t cd, const char **inb, size_t *inbleft, char **outb, size_t *outbleft)
usr.bin/mail/mime_codecs.c
88
while ((sz = iconv(cd, __UNCONST(inb), inbleft, outb, outbleft))
usr.bin/mail/mime_codecs.c
99
(*inb)++;
usr.bin/tcopy/tcopy.c
237
char *inb;
usr.bin/tcopy/tcopy.c
239
inb = getspace(maxblk);
usr.bin/tcopy/tcopy.c
242
if ((inn = read(inp, inb, inmaxblk)) == -1) {
usr.bin/tcopy/tcopy.c
245
inn = read(inp, inb, inmaxblk);
usr.bin/tcopy/tcopy.c
272
free(inb);
usr.bin/tcopy/tcopy.c
276
if (memcmp(inb, outb, inn)) {
usr.bin/tcopy/tcopy.c
285
free(inb);