PCI_COMMAND_PARITY_ENABLE
PCI_COMMAND_PARITY_ENABLE | PCI_COMMAND_SERR_ENABLE |
PCI_COMMAND_PARITY_ENABLE | PCI_COMMAND_SERR_ENABLE;
PCI_COMMAND_PARITY_ENABLE | PCI_COMMAND_SERR_ENABLE;
PCI_COMMAND_PARITY_ENABLE | PCI_COMMAND_SERR_ENABLE;
PCI_COMMAND_PARITY_ENABLE | PCI_COMMAND_SERR_ENABLE;
PCI_COMMAND_PARITY_ENABLE);
data |= PCI_COMMAND_PARITY_ENABLE;
if (data & PCI_COMMAND_PARITY_ENABLE)
PCI_COMMAND_PARITY_ENABLE|PCI_COMMAND_SERR_ENABLE);
PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_PARITY_ENABLE);
| PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_PARITY_ENABLE);
| PCI_COMMAND_IO_ENABLE | PCI_COMMAND_PARITY_ENABLE);
csr |= PCI_COMMAND_PARITY_ENABLE;
csr |= PCI_COMMAND_PARITY_ENABLE;
PCI_COMMAND_PARITY_ENABLE |
PCI_COMMAND_PARITY_ENABLE |
~(PCI_COMMAND_PARITY_ENABLE|PCI_COMMAND_SERR_ENABLE);
if ( (command & PCI_COMMAND_PARITY_ENABLE) == 0) {
command &= ~PCI_COMMAND_PARITY_ENABLE;
PCI_COMMAND_PARITY_ENABLE |
command |= PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_PARITY_ENABLE;
data |= PCI_COMMAND_PARITY_ENABLE | PCI_COMMAND_SERR_ENABLE;
csr |= PCI_COMMAND_PARITY_ENABLE;
onoff("Parity error checking", rval, PCI_COMMAND_PARITY_ENABLE);
cmd |= PCI_COMMAND_PARITY_ENABLE;