arch/arm/mach-artpec/board-artpec6.c

49

arm_smccc_smc(SECURE_OP_L2C_WRITEREG, reg, val, 0,

arch/arm/mach-at91/sam_secure.c

24

arm_smccc_smc(SAM_SIP_SMC_STD_CALL_VAL(fn), arg0, arg1, 0, 0, 0, 0, 0,

arch/arm/mach-omap2/omap-secure.c

93

arm_smccc_smc(OMAP_SIP_SMC_STD_CALL_VAL(fn), arg,

arch/arm64/include/asm/rsi_cmds.h

31

arm_smccc_smc(SMC_RSI_ABI_VERSION, req, 0, 0, 0, 0, 0, 0, &res);

arch/arm64/include/asm/rsi_cmds.h

45

arm_smccc_smc(SMC_RSI_REALM_CONFIG, virt_to_phys(cfg),

arch/arm64/include/asm/rsi_cmds.h

57

arm_smccc_smc(SMC_RSI_IPA_STATE_GET,

arch/arm64/include/asm/rsi_cmds.h

79

arm_smccc_smc(SMC_RSI_IPA_STATE_SET, start, end, state,

drivers/char/hw_random/cn10k-rng.c

74

arm_smccc_smc(PLAT_OCTEONTX_RESET_RNG_EBG_HEALTH_STATE, 0, 0, 0, 0, 0, 0, 0, &res);

drivers/char/hw_random/exynos-trng.c

109

arm_smccc_smc(SMC_CMD_RANDOM, HWRNG_GET_DATA, 0, 0, 0, 0, 0, 0,

drivers/char/hw_random/exynos-trng.c

172

arm_smccc_smc(SMC_CMD_RANDOM, HWRNG_INIT, 0, 0, 0, 0, 0, 0, &res);

drivers/char/hw_random/exynos-trng.c

264

arm_smccc_smc(SMC_CMD_RANDOM, HWRNG_EXIT, 0, 0, 0, 0, 0, 0,

drivers/char/hw_random/exynos-trng.c

278

arm_smccc_smc(SMC_CMD_RANDOM, HWRNG_EXIT, 0, 0, 0, 0, 0, 0,

drivers/char/hw_random/exynos-trng.c

303

arm_smccc_smc(SMC_CMD_RANDOM, HWRNG_RESUME, 0, 0, 0, 0, 0, 0,

drivers/char/hw_random/exynos-trng.c

308

arm_smccc_smc(SMC_CMD_RANDOM, HWRNG_INIT, 0, 0, 0, 0, 0, 0,

drivers/char/tpm/tpm_crb.c

424

arm_smccc_smc(func_id, 0, 0, 0, 0, 0, 0, 0, &res);

drivers/clk/imx/clk-scu.c

297

arm_smccc_smc(IMX_SIP_CPUFREQ, IMX_SIP_SET_CPUFREQ,

drivers/clk/rockchip/clk-ddr.c

37

arm_smccc_smc(ROCKCHIP_SIP_DRAM_FREQ, drate, 0,

drivers/clk/rockchip/clk-ddr.c

51

arm_smccc_smc(ROCKCHIP_SIP_DRAM_FREQ, 0, 0,

drivers/clk/rockchip/clk-ddr.c

63

arm_smccc_smc(ROCKCHIP_SIP_DRAM_FREQ, req->rate, 0,

drivers/devfreq/imx8m-ddrc.c

113

arm_smccc_smc(IMX_SIP_DDR_DVFS, target_freq, online_cpus,

drivers/devfreq/imx8m-ddrc.c

290

arm_smccc_smc(IMX_SIP_DDR_DVFS, IMX_SIP_DDR_DVFS_GET_FREQ_COUNT,

drivers/devfreq/imx8m-ddrc.c

300

arm_smccc_smc(IMX_SIP_DDR_DVFS, IMX_SIP_DDR_DVFS_GET_FREQ_INFO,

drivers/devfreq/rk3399_dmc.c

160

arm_smccc_smc(ROCKCHIP_SIP_DRAM_FREQ, odt_pd_arg0, odt_pd_arg1,

drivers/devfreq/rk3399_dmc.c

403

arm_smccc_smc(ROCKCHIP_SIP_DRAM_FREQ, 0, 0,

drivers/edac/altera_edac.c

1096

arm_smccc_smc(INTEL_SIP_SMC_REG_READ, sdram_ecc_addr,

drivers/edac/altera_edac.c

2103

arm_smccc_smc(INTEL_SIP_SMC_ECC_DBE, dberror, 0, 0, 0, 0,

drivers/edac/bluefield_edac.c

109

arm_smccc_smc(MLXBF_READ_REG_32, sreg_tbl, (uintptr_t)addr,

drivers/edac/bluefield_edac.c

127

arm_smccc_smc(MLXBF_WRITE_REG_32, sreg_tbl, data, (uintptr_t)addr,

drivers/edac/bluefield_edac.c

409

arm_smccc_smc(MLXBF_SIP_SVC_VERSION, 0, 0, 0, 0, 0, 0, 0, &res);

drivers/edac/bluefield_edac.c

99

arm_smccc_smc(smc_op, smc_arg, 0, 0, 0, 0, 0, 0, &res);

drivers/firmware/arm_sdei.c

843

arm_smccc_smc(function_id, arg0, arg1, arg2, arg3, arg4, 0, 0, res);

drivers/firmware/meson/meson_sm.c

76

arm_smccc_smc(cmd, arg0, arg1, arg2, arg3, arg4, 0, 0, &res);

drivers/firmware/psci/psci.c

130

arm_smccc_smc(function_id, arg0, arg1, arg2, 0, 0, 0, 0, &res);

drivers/firmware/qcom/qcom_scm-legacy.c

114

arm_smccc_smc(smc->args[0], smc->args[1], smc->args[2],

drivers/firmware/qcom/qcom_scm-legacy.c

234

arm_smccc_smc(SCM_LEGACY_ATOMIC_ID(desc->svc, desc->cmd, arglen),

drivers/firmware/stratix10-svc.c

990

arm_smccc_smc(a0, a1, a2, a3, a4, a5, a6, a7, res);

drivers/firmware/xilinx/zynqmp.c

158

arm_smccc_smc(args[0], args[1], args[2], args[3], args[4], args[5], args[6], args[7], &res);

drivers/firmware/xilinx/zynqmp.c

581

arm_smccc_smc(args[0], args[1], args[2], args[3], args[4], args[5], args[6], args[7], &res);

drivers/gpu/drm/mediatek/mtk_dp.c

1335

arm_smccc_smc(MTK_DP_SIP_CONTROL_AARCH32,

drivers/gpu/drm/mediatek/mtk_hdmi.c

68

arm_smccc_smc(MTK_SIP_SET_AUTHORIZED_SECURE_REG, 0x14000904,

drivers/iommu/mtk_iommu.c

629

arm_smccc_smc(MTK_SIP_KERNEL_IOMMU_CONTROL,

drivers/mailbox/zynqmp-ipi-mailbox.c

160

arm_smccc_smc(a0, a1, a2, a3, 0, 0, 0, 0, res);

drivers/memory/mtk-smi.c

269

arm_smccc_smc(MTK_SIP_KERNEL_IOMMU_CONTROL, IOMMU_ATF_CMD_CONFIG_SMI_LARB,

drivers/mfd/altera-sysmgr.c

47

arm_smccc_smc(INTEL_SIP_SMC_REG_WRITE, sysmgr_base + reg,

drivers/mfd/altera-sysmgr.c

69

arm_smccc_smc(INTEL_SIP_SMC_REG_READ, sysmgr_base + reg,

drivers/mmc/host/dw_mmc-bluefield.c

45

arm_smccc_smc(BLUEFIELD_SMC_SET_EMMC_RST_N, 0, 0, 0, 0, 0, 0, 0,

drivers/mmc/host/sdhci-of-dwcmshc.c

1674

arm_smccc_smc(BLUEFIELD_SMC_SET_EMMC_RST_N, 0, 0, 0, 0, 0, 0, 0, &res);

drivers/nvmem/imx-ocotp-scu.c

214

arm_smccc_smc(IMX_SIP_OTP_WRITE, index, *buf, 0, 0, 0, 0, 0, &res);

drivers/nvmem/stm32-romem.c

61

arm_smccc_smc(STM32_SMC_BSEC, op, otp, data, 0, 0, 0, 0, &res);

drivers/pci/hotplug/acpiphp_ampere_altra.c

54

arm_smccc_smc(HANDLE_OPEN, led_service_id[0], led_service_id[1],

drivers/pci/hotplug/acpiphp_ampere_altra.c

62

arm_smccc_smc(REQUEST, LED_CMD, led_status(status), LED_ATTENTION,

drivers/pci/hotplug/acpiphp_ampere_altra.c

68

arm_smccc_smc(HANDLE_CLOSE, handle, 0, 0, 0, 0, 0, 0, &res);

drivers/phy/marvell/phy-mvebu-cp110-comphy.c

282

arm_smccc_smc(function, phys, lane, mode, 0, 0, 0, 0, &res);

drivers/platform/mellanox/mlxbf-bootctl.c

1040

arm_smccc_smc(MLXBF_BOOTCTL_SIP_SVC_UID, 0, 0, 0, 0, 0, 0, 0, &res);

drivers/platform/mellanox/mlxbf-bootctl.c

143

arm_smccc_smc(smc_op, smc_arg, 0, 0, 0, 0, 0, 0, &res);

drivers/platform/mellanox/mlxbf-bootctl.c

461

arm_smccc_smc(MLNX_HANDLE_GET_ICM_INFO, 0, 0, 0, 0,

drivers/platform/mellanox/mlxbf-bootctl.c

487

arm_smccc_smc(MLNX_HANDLE_SET_ICM_INFO, icm_data, 0, 0, 0, 0, 0, 0, &res);

drivers/platform/mellanox/mlxbf-bootctl.c

500

arm_smccc_smc(MLNX_HANDLE_GET_RTC_LOW_BATT, 0, 0, 0, 0,

drivers/platform/mellanox/mlxbf-bootctl.c

526

arm_smccc_smc(MLNX_HANDLE_OS_UP, 0, 0, 0, 0, 0, 0, 0, &res);

drivers/platform/mellanox/mlxbf-bootctl.c

539

arm_smccc_smc(MLXBF_BOOTCTL_GET_MFG_INFO, MLNX_MFG_TYPE_OOB_MAC, 0, 0, 0,

drivers/platform/mellanox/mlxbf-bootctl.c

575

arm_smccc_smc(MLXBF_BOOTCTL_SET_MFG_INFO, MLNX_MFG_TYPE_OOB_MAC,

drivers/platform/mellanox/mlxbf-bootctl.c

591

arm_smccc_smc(MLXBF_BOOTCTL_GET_MFG_INFO,

drivers/platform/mellanox/mlxbf-bootctl.c

620

arm_smccc_smc(MLXBF_BOOTCTL_SET_MFG_INFO,

drivers/platform/mellanox/mlxbf-bootctl.c

642

arm_smccc_smc(MLXBF_BOOTCTL_GET_MFG_INFO,

drivers/platform/mellanox/mlxbf-bootctl.c

671

arm_smccc_smc(MLXBF_BOOTCTL_SET_MFG_INFO,

drivers/platform/mellanox/mlxbf-bootctl.c

693

arm_smccc_smc(MLXBF_BOOTCTL_GET_MFG_INFO,

drivers/platform/mellanox/mlxbf-bootctl.c

722

arm_smccc_smc(MLXBF_BOOTCTL_SET_MFG_INFO,

drivers/platform/mellanox/mlxbf-bootctl.c

744

arm_smccc_smc(MLXBF_BOOTCTL_GET_MFG_INFO,

drivers/platform/mellanox/mlxbf-bootctl.c

773

arm_smccc_smc(MLXBF_BOOTCTL_SET_MFG_INFO,

drivers/platform/mellanox/mlxbf-bootctl.c

795

arm_smccc_smc(MLXBF_BOOTCTL_GET_MFG_INFO,

drivers/platform/mellanox/mlxbf-bootctl.c

824

arm_smccc_smc(MLXBF_BOOTCTL_SET_MFG_INFO,

drivers/platform/mellanox/mlxbf-bootctl.c

846

arm_smccc_smc(MLXBF_BOOTCTL_GET_MFG_INFO,

drivers/platform/mellanox/mlxbf-bootctl.c

875

arm_smccc_smc(MLXBF_BOOTCTL_SET_MFG_INFO,

drivers/platform/mellanox/mlxbf-bootctl.c

904

arm_smccc_smc(MLXBF_BOOTCTL_LOCK_MFG_INFO, 0, 0, 0, 0, 0, 0, 0, &res);

drivers/platform/mellanox/mlxbf-pmc.c

1011

arm_smccc_smc(command, pmc->sreg_tbl_perf, (uintptr_t)addr, 0, 0, 0, 0,

drivers/platform/mellanox/mlxbf-pmc.c

1065

arm_smccc_smc(command, pmc->sreg_tbl_perf, value, (uintptr_t)addr, 0, 0,

drivers/platform/mellanox/mlxbf-pmc.c

2273

arm_smccc_smc(MLXBF_PMC_SIP_SVC_UID, 0, 0, 0, 0, 0, 0, 0, &res);

drivers/platform/mellanox/mlxbf-pmc.c

2296

arm_smccc_smc(MLXBF_PMC_SIP_SVC_VERSION, 0, 0, 0, 0, 0, 0, 0,

drivers/pmdomain/mediatek/mtk-pm-domains.c

132

arm_smccc_smc(MTK_SIP_KERNEL_HWCCF_CONTROL, cmd, 0, 0, 0, 0, 0, 0, &res);

drivers/pmdomain/rockchip/pm-domains.c

626

arm_smccc_smc(ROCKCHIP_SIP_SUSPEND_MODE, ROCKCHIP_SLEEP_PD_CONFIG,

drivers/remoteproc/imx_dsp_rproc.c

253

arm_smccc_smc(IMX8ULP_SIP_HIFI_XRDC, 0, 0, 0, 0, 0, 0, 0, &res);

drivers/remoteproc/imx_rproc.c

319

arm_smccc_smc(IMX_SIP_RPROC, IMX_SIP_RPROC_START, 0, 0, 0, 0, 0, 0, &res);

drivers/remoteproc/imx_rproc.c

409

arm_smccc_smc(IMX_SIP_RPROC, IMX_SIP_RPROC_STOP, 0, 0, 0, 0, 0, 0, &res);

drivers/remoteproc/imx_rproc.c

982

arm_smccc_smc(IMX_SIP_RPROC, IMX_SIP_RPROC_STARTED, 0, 0, 0, 0, 0, 0, &res);

drivers/remoteproc/stm32_rproc.c

426

arm_smccc_smc(STM32_SMC_RCC, STM32_SMC_REG_WRITE,

drivers/rtc/rtc-imx-sc.c

69

arm_smccc_smc(IMX_SIP_SRTC, IMX_SIP_SRTC_SET_TIME,

drivers/soc/imx/soc-imx8m.c

49

arm_smccc_smc(IMX_SIP_GET_SOC_INFO, 0, 0, 0, 0, 0, 0, 0, &res);

drivers/soc/imx/soc-imx9.c

46

arm_smccc_smc(IMX_SIP_GET_SOC_INFO, 0, 0, 0, 0, 0, 0, 0, &res);

drivers/soc/mediatek/mtk-dvfsrc.c

672

arm_smccc_smc(MTK_SIP_DVFSRC_VCOREFS_CONTROL, MTK_SIP_DVFSRC_INIT,

drivers/soc/mediatek/mtk-dvfsrc.c

695

arm_smccc_smc(MTK_SIP_DVFSRC_VCOREFS_CONTROL, MTK_SIP_DVFSRC_START,

drivers/soc/samsung/gs101-pmu.c

348

arm_smccc_smc(TENSOR_SMC_PMU_SEC_REG, pmu_base + reg,

drivers/soc/samsung/gs101-pmu.c

365

arm_smccc_smc(TENSOR_SMC_PMU_SEC_REG, pmu_base + reg,

drivers/soc/tegra/ari-tegra186.c

31

arm_smccc_smc(SMC_SIP_INVOKE_MCE | MCE_SMC_READ_MCA,

drivers/soc/tegra/pmc.c

509

arm_smccc_smc(TEGRA_SMC_PMC, TEGRA_SMC_PMC_READ, offset, 0, 0,

drivers/soc/tegra/pmc.c

532

arm_smccc_smc(TEGRA_SMC_PMC, TEGRA_SMC_PMC_WRITE, offset,

drivers/tee/optee/smc_abi.c

1474

arm_smccc_smc(a0, a1, a2, a3, a4, a5, a6, a7, res);

drivers/thermal/renesas/rzg3e_thermal.c

374

arm_smccc_smc(RZ_SIP_SVC_GET_SYSTSU, OTP_TSU_REG_ADR_TEMPLO,

drivers/thermal/renesas/rzg3e_thermal.c

378

arm_smccc_smc(RZ_SIP_SVC_GET_SYSTSU, OTP_TSU_REG_ADR_TEMPHI,

drivers/ufs/host/ufs-exynos.c

1318

arm_smccc_smc(SMC_CMD_FMP_SECURITY, 0, SMU_EMBEDDED, CFG_DESCTYPE_3,

drivers/ufs/host/ufs-exynos.c

1332

arm_smccc_smc(SMC_CMD_SMU, SMU_INIT, SMU_EMBEDDED, 0, 0, 0, 0, 0, &res);

drivers/ufs/host/ufs-exynos.c

1371

arm_smccc_smc(SMC_CMD_FMP_SECURITY, 0, SMU_EMBEDDED, CFG_DESCTYPE_3,

drivers/ufs/host/ufs-exynos.c

1377

arm_smccc_smc(SMC_CMD_FMP_SMU_RESUME, 0, SMU_EMBEDDED, 0, 0, 0, 0, 0,

drivers/ufs/host/ufs-mediatek-sip.h

58

arm_smccc_smc(MTK_SIP_UFS_CONTROL,

drivers/ufs/host/ufs-sprd.c

241

arm_smccc_smc(SPRD_SIP_SVC_STORAGE_UFS_CRYPTO_ENABLE,

drivers/usb/host/ohci-at91.c

329

arm_smccc_smc(ohci_at91->suspend_smc_id, set, 0, 0, 0, 0, 0, 0, &res);

drivers/watchdog/arm_smc_wdt.c

42

arm_smccc_smc((u32)(uintptr_t)watchdog_get_drvdata(wdd), call, arg, 0,

drivers/watchdog/imx_sc_wdt.c

111

arm_smccc_smc(IMX_SIP_TIMER, IMX_SIP_TIMER_SET_TIMEOUT_WDOG,

drivers/watchdog/imx_sc_wdt.c

127

arm_smccc_smc(IMX_SIP_TIMER, IMX_SIP_TIMER_SET_PRETIME_WDOG,

drivers/watchdog/imx_sc_wdt.c

53

arm_smccc_smc(IMX_SIP_TIMER, IMX_SIP_TIMER_PING_WDOG,

drivers/watchdog/imx_sc_wdt.c

63

arm_smccc_smc(IMX_SIP_TIMER, IMX_SIP_TIMER_START_WDOG,

drivers/watchdog/imx_sc_wdt.c

72

arm_smccc_smc(IMX_SIP_TIMER, IMX_SIP_TIMER_STOP_WDOG,

drivers/watchdog/imx_sc_wdt.c

82

arm_smccc_smc(IMX_SIP_TIMER, IMX_SIP_TIMER_START_WDOG,

drivers/watchdog/imx_sc_wdt.c

89

arm_smccc_smc(IMX_SIP_TIMER, IMX_SIP_TIMER_SET_WDOG_ACT,

drivers/watchdog/imx_sc_wdt.c

99

arm_smccc_smc(IMX_SIP_TIMER, IMX_SIP_TIMER_STOP_WDOG,

drivers/watchdog/keembay_wdt.c

149

arm_smccc_smc(WDT_INT_CLEAR_SMC, WDT_TO_INT_MASK, 0, 0, 0, 0, 0, 0, &res);

drivers/watchdog/keembay_wdt.c

163

arm_smccc_smc(WDT_INT_CLEAR_SMC, WDT_TH_INT_MASK, 0, 0, 0, 0, 0, 0, &res);

sound/soc/mediatek/mt8188/mt8188-afe-pcm.c

3034

arm_smccc_smc(MTK_SIP_AUDIO_CONTROL,

sound/soc/sof/imx/imx8.c

231

arm_smccc_smc(FSL_SIP_HIFI_XRDC, 0, 0, 0, 0, 0, 0, 0, &smc_res);