PCI_CAPABILITY_LIST
case PCI_CAPABILITY_LIST:
case PCI_CAPABILITY_LIST:
case PCI_CAPABILITY_LIST:
case PCI_CAPABILITY_LIST:
case PCI_CAPABILITY_LIST:
int pos = PCI_CAPABILITY_LIST;
return PCI_CAPABILITY_LIST;
for (pos = readb(devbase + PCI_CAPABILITY_LIST); pos != 0;
for (pos = readb(devbase + PCI_CAPABILITY_LIST); pos != 0;
grpci2_cfg_r8(priv, TGT, 0, PCI_CAPABILITY_LIST, &capptr);
pos = __uml_vfio_cfgspace_read(dev, PCI_CAPABILITY_LIST, sizeof(pos));
pos = read_pci_config_byte(bus, slot, func, PCI_CAPABILITY_LIST);
bcma_extpci_read_config(pc, dev, func, PCI_CAPABILITY_LIST, &cap_ptr,
pci_read_config_byte(dev, PCI_CAPABILITY_LIST, &mcapndx);
pos = readb(info->lba_regs + PCI_CAPABILITY_LIST);
offset = FIELD_GET(PCI_RCRB_CAP_LIST_ID_MASK, readw(addr + PCI_CAPABILITY_LIST));
next = vgpu_cfg_space(vgpu)[PCI_CAPABILITY_LIST];
return PCI_FIND_NEXT_CAP(cdns_pcie_read_cfg, PCI_CAPABILITY_LIST,
return PCI_FIND_NEXT_CAP(dw_pcie_ep_read_cfg, PCI_CAPABILITY_LIST,
return PCI_FIND_NEXT_CAP(dw_pcie_read_cfg, PCI_CAPABILITY_LIST, cap,
cap_pos = PCI_FIND_NEXT_CAP(dw_pcie_read_cfg, PCI_CAPABILITY_LIST, cap,
if (pre_pos == PCI_CAPABILITY_LIST)
dw_pcie_writeb_dbi(pci, PCI_CAPABILITY_LIST, next_pos);
PCI_CAPABILITY_LIST) {
where + size <= PCI_CAPABILITY_LIST) {
[PCI_CAPABILITY_LIST / 4] = {
return PCI_CAPABILITY_LIST;
pos = read_pci_config_byte(num, slot, func, PCI_CAPABILITY_LIST);
ret = pci_read_config_byte(pdev, PCI_CAPABILITY_LIST, &pos);
octep_pci_caps_read(oct_hw, &pos, 1, PCI_CAPABILITY_LIST);
ret = pci_read_config_byte(pdev, PCI_CAPABILITY_LIST, &pos);
prev = &vdev->vconfig[PCI_CAPABILITY_LIST];
p_setb(perm, PCI_CAPABILITY_LIST, (u8)ALL_VIRT, NO_WRITE);
mdev_state->vconfig[PCI_CAPABILITY_LIST] = MDPY_VENDORCAP_OFFSET;