drivers/net/ethernet/marvell/octeontx2/af/cn20k/api.h
20
int cn20k_rvu_mbox_init(struct rvu *rvu, int type, int num);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/api.h
21
int cn20k_rvu_get_mbox_regions(struct rvu *rvu, void **mbox_addr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/api.h
23
void cn20k_free_mbox_memory(struct rvu *rvu);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/api.h
24
int cn20k_register_afpf_mbox_intr(struct rvu *rvu);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/api.h
25
int cn20k_register_afvf_mbox_intr(struct rvu *rvu, int pf_vec_start);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/api.h
26
void cn20k_rvu_enable_mbox_intr(struct rvu *rvu);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/api.h
27
void cn20k_rvu_unregister_interrupts(struct rvu *rvu);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/api.h
30
void cn20k_rvu_enable_afvf_intr(struct rvu *rvu, int vfs);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/api.h
31
void cn20k_rvu_disable_afvf_intr(struct rvu *rvu, int vfs);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.c
186
struct rvu *rvu;
drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.c
192
rvu = s->private;
drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.c
193
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.c
203
if (npc_mcam_idx_2_key_type(rvu, mcam_idx, &key_type))
drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.c
212
stats = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.c
250
struct rvu *rvu;
drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.c
256
rvu = s->private;
drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.c
270
rc = npc_mcam_idx_2_subbank_idx(rvu, mcam_idx,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.c
292
struct rvu *rvu;
drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.c
297
rvu = s->private;
drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.c
307
rc = npc_cn20k_dft_rules_idx_get(rvu, pcifunc, &ptr[0],
drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.c
388
int npc_cn20k_debugfs_init(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.c
392
debugfs_create_file("mcam_layout", 0444, rvu->rvu_dbg.npc,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.c
395
debugfs_create_file("mcam_default", 0444, rvu->rvu_dbg.npc,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.c
396
rvu, &npc_mcam_default_fops);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.c
398
debugfs_create_file("vidx2idx", 0444, rvu->rvu_dbg.npc,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.c
401
dstats = devm_kzalloc(rvu->dev, sizeof(*dstats), GFP_KERNEL);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.c
405
debugfs_create_file("dstats", 0444, rvu->rvu_dbg.npc, rvu,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.c
408
debugfs_create_file("mismatch", 0444, rvu->rvu_dbg.npc, rvu,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.c
411
debugfs_create_file("idx2vidx", 0444, rvu->rvu_dbg.npc,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.c
414
debugfs_create_file("defrag", 0444, rvu->rvu_dbg.npc,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.c
420
void npc_cn20k_debugfs_deinit(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.c
422
debugfs_remove_recursive(rvu->rvu_dbg.npc);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.h
19
int npc_cn20k_debugfs_init(struct rvu *rvu);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.h
20
void npc_cn20k_debugfs_deinit(struct rvu *rvu);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
105
struct rvu *rvu = rvu_irq_data->rvu;
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
109
intr = rvu_read64(rvu, BLKADDR_RVUM, rvu_irq_data->intr_status);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
110
rvu_write64(rvu, BLKADDR_RVUM, rvu_irq_data->intr_status, intr);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
113
trace_otx2_msg_interrupt(rvu->pdev, "PF(s) to AF", intr);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
118
rvu_irq_data->rvu_queue_work_hdlr(&rvu->afpf_wq_info,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
125
void cn20k_rvu_enable_mbox_intr(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
127
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
130
rvu_write64(rvu, BLKADDR_RVUM,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
133
rvu_write64(rvu, BLKADDR_RVUM,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
136
rvu_write64(rvu, BLKADDR_RVUM,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
139
rvu_write64(rvu, BLKADDR_RVUM,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
143
rvu_write64(rvu, BLKADDR_RVUM, RVU_MBOX_AF_PFAF_INT_ENA_W1S(0),
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
146
rvu_write64(rvu, BLKADDR_RVUM, RVU_MBOX_AF_PFAF_INT_ENA_W1S(1),
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
149
rvu_write64(rvu, BLKADDR_RVUM, RVU_MBOX_AF_PFAF1_INT_ENA_W1S(0),
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
152
rvu_write64(rvu, BLKADDR_RVUM, RVU_MBOX_AF_PFAF1_INT_ENA_W1S(1),
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
156
void cn20k_rvu_unregister_interrupts(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
158
rvu_write64(rvu, BLKADDR_RVUM, RVU_MBOX_AF_PFAF_INT_ENA_W1C(0),
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
159
INTR_MASK(rvu->hw->total_pfs) & ~1ULL);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
161
rvu_write64(rvu, BLKADDR_RVUM, RVU_MBOX_AF_PFAF_INT_ENA_W1C(1),
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
162
INTR_MASK(rvu->hw->total_pfs - 64));
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
164
rvu_write64(rvu, BLKADDR_RVUM, RVU_MBOX_AF_PFAF1_INT_ENA_W1C(0),
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
165
INTR_MASK(rvu->hw->total_pfs) & ~1ULL);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
167
rvu_write64(rvu, BLKADDR_RVUM, RVU_MBOX_AF_PFAF1_INT_ENA_W1C(1),
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
168
INTR_MASK(rvu->hw->total_pfs - 64));
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
171
int cn20k_register_afpf_mbox_intr(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
177
irq_data = devm_kcalloc(rvu->dev, 4,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
19
struct rvu *rvu = rvu_irq_data->rvu;
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
213
irq_data[vec].rvu = rvu;
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
216
sprintf(&rvu->irq_name[intr_vec * NAME_SIZE],
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
219
ret = request_irq(pci_irq_vector(rvu->pdev, intr_vec),
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
220
rvu->ng_rvu->rvu_mbox_ops->pf_intr_handler, 0,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
221
&rvu->irq_name[intr_vec * NAME_SIZE],
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
226
rvu->irq_allocated[intr_vec] = true;
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
232
int cn20k_rvu_get_mbox_regions(struct rvu *rvu, void **mbox_addr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
243
bar = (u64)phys_to_virt((u64)rvu->ng_rvu->vf_mbox_addr->base);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
257
bar = (u64)phys_to_virt((u64)rvu->ng_rvu->pf_mbox_addr->base);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
26
intr = rvupf_read64(rvu, rvu_irq_data->intr_status);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
268
static int rvu_alloc_mbox_memory(struct rvu *rvu, int type,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
27
rvupf_write64(rvu, rvu_irq_data->intr_status, intr);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
288
err = qmem_alloc(rvu->dev, &mbox_addr, ndevs, mbox_size);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
294
rvu->ng_rvu->pf_mbox_addr = mbox_addr;
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
297
rvu_write64(rvu, BLKADDR_RVUM, RVU_MBOX_AF_PFX_ADDR(pf),
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
30
trace_otx2_msg_interrupt(rvu->pdev, "VF(s) to AF", intr);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
303
rvu->ng_rvu->vf_mbox_addr = mbox_addr;
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
304
rvupf_write64(rvu, RVU_PF_VF_MBOX_ADDR, (u64)mbox_addr->iova);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
318
int cn20k_rvu_mbox_init(struct rvu *rvu, int type, int ndevs)
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
32
rvu_irq_data->afvf_queue_work_hdlr(&rvu->afvf_wq_info, rvu_irq_data->start,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
322
if (!is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
325
rvu->ng_rvu->rvu_mbox_ops = &cn20k_mbox_ops;
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
328
rvu_write64(rvu, BLKADDR_RVUM, RVU_MBOX_PF_VF_CFG, ilog2(MBOX_SIZE));
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
331
rvu_write64(rvu, BLKADDR_RVUM,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
335
return rvu_alloc_mbox_memory(rvu, type, ndevs, MBOX_SIZE);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
338
void cn20k_free_mbox_memory(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
340
if (!is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
343
qmem_free(rvu->dev, rvu->ng_rvu->pf_mbox_addr);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
344
qmem_free(rvu->dev, rvu->ng_rvu->vf_mbox_addr);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
347
void cn20k_rvu_disable_afvf_intr(struct rvu *rvu, int vfs)
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
349
rvupf_write64(rvu, RVU_MBOX_PF_VFPF_INT_ENA_W1CX(0), INTR_MASK(vfs));
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
350
rvupf_write64(rvu, RVU_MBOX_PF_VFPF1_INT_ENA_W1CX(0), INTR_MASK(vfs));
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
351
rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1CX(0), INTR_MASK(vfs));
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
352
rvupf_write64(rvu, RVU_PF_VFME_INT_ENA_W1CX(0), INTR_MASK(vfs));
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
357
rvupf_write64(rvu, RVU_MBOX_PF_VFPF_INT_ENA_W1CX(1), INTR_MASK(vfs - 64));
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
358
rvupf_write64(rvu, RVU_MBOX_PF_VFPF1_INT_ENA_W1CX(1), INTR_MASK(vfs - 64));
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
359
rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1CX(1), INTR_MASK(vfs - 64));
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
360
rvupf_write64(rvu, RVU_PF_VFME_INT_ENA_W1CX(1), INTR_MASK(vfs - 64));
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
363
void cn20k_rvu_enable_afvf_intr(struct rvu *rvu, int vfs)
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
368
rvupf_write64(rvu, RVU_MBOX_PF_VFPF_INTX(0), INTR_MASK(vfs));
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
369
rvupf_write64(rvu, RVU_MBOX_PF_VFPF_INT_ENA_W1SX(0), INTR_MASK(vfs));
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
370
rvupf_write64(rvu, RVU_MBOX_PF_VFPF1_INTX(0), INTR_MASK(vfs));
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
371
rvupf_write64(rvu, RVU_MBOX_PF_VFPF1_INT_ENA_W1SX(0), INTR_MASK(vfs));
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
374
rvupf_write64(rvu, RVU_PF_VFFLR_INTX(0), INTR_MASK(vfs));
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
375
rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1SX(0), INTR_MASK(vfs));
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
38
int cn20k_register_afvf_mbox_intr(struct rvu *rvu, int pf_vec_start)
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
381
rvupf_write64(rvu, RVU_MBOX_PF_VFPF_INTX(1), INTR_MASK(vfs - 64));
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
382
rvupf_write64(rvu, RVU_MBOX_PF_VFPF_INT_ENA_W1SX(1), INTR_MASK(vfs - 64));
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
383
rvupf_write64(rvu, RVU_MBOX_PF_VFPF1_INTX(1), INTR_MASK(vfs - 64));
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
384
rvupf_write64(rvu, RVU_MBOX_PF_VFPF1_INT_ENA_W1SX(1), INTR_MASK(vfs - 64));
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
386
rvupf_write64(rvu, RVU_PF_VFFLR_INTX(1), INTR_MASK(vfs - 64));
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
387
rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1SX(1), INTR_MASK(vfs - 64));
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
388
rvupf_write64(rvu, RVU_PF_VFME_INT_ENA_W1SX(1), INTR_MASK(vfs - 64));
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
391
int rvu_alloc_cint_qint_mem(struct rvu *rvu, struct rvu_pfvf *pfvf,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
397
if (is_rvu_otx2(rvu) || is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
401
cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_NIXX_CFG(0) |
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
406
ctx_cfg = rvu_read64(rvu, blkaddr, NIX_AF_CONST3);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
408
cfg = rvu_read64(rvu, blkaddr, NIX_AF_CONST2);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
411
err = qmem_alloc(rvu->dev, &pfvf->cq_ints_ctx, qints, hwctx_size);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
415
rvu_write64(rvu, blkaddr, NIX_AF_LFX_CINTS_BASE(nixlf),
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
419
cfg = rvu_read64(rvu, blkaddr, NIX_AF_CONST2);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
422
err = qmem_alloc(rvu->dev, &pfvf->nix_qints_ctx, qints, hwctx_size);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
426
rvu_write64(rvu, blkaddr, NIX_AF_LFX_QINTS_BASE(nixlf),
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
429
rvu_write64(rvu, BLKADDR_NIX0, RVU_AF_BAR2_SEL, RVU_AF_BAR2_PFID);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
430
rvu_write64(rvu, BLKADDR_NIX0,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
433
err = rvu_poll_reg(rvu, BLKADDR_NIX0,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
436
rvu->altaf_ready = false;
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
438
rvu->altaf_ready = true;
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
45
irq_data = devm_kcalloc(rvu->dev, 4,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
82
irq_data[vec].rvu = rvu;
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
84
sprintf(&rvu->irq_name[offset * NAME_SIZE], "RVUAF VFAF%d Mbox%d",
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
86
err = request_irq(pci_irq_vector(rvu->pdev, offset),
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
87
rvu->ng_rvu->rvu_mbox_ops->afvf_intr_handler, 0,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
88
&rvu->irq_name[offset * NAME_SIZE],
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
91
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
95
rvu->irq_allocated[offset] = true;
drivers/net/ethernet/marvell/octeontx2/af/cn20k/nix.c
14
int rvu_mbox_handler_nix_cn20k_aq_enq(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/nix.c
18
return rvu_nix_aq_enq_inst(rvu, (struct nix_aq_enq_req *)req,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npa.c
14
int rvu_mbox_handler_npa_cn20k_aq_enq(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npa.c
18
return rvu_npa_aq_enq_inst(rvu, (struct npa_aq_enq_req *)req,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1016
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1019
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1025
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1028
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1033
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1036
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1041
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1044
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1049
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1052
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1057
static void npc_cn20k_config_kw_x4(struct rvu *rvu, struct npc_mcam *mcam,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1065
npc_cn20k_config_kw_x2(rvu, mcam, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1071
int npc_cn20k_config_mcam_entry(struct rvu *rvu, int blkaddr, int index,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1075
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1085
if (npc_mcam_idx_2_key_type(rvu, index, &kw_type))
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1089
if (npc_cn20k_enable_mcam_entry(rvu, blkaddr, index, false))
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1100
npc_clear_x2_entry(rvu, blkaddr, bank, mcam_idx);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1101
npc_cn20k_config_kw_x2(rvu, mcam, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1105
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1111
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1117
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1123
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1129
npc_clear_x2_entry(rvu, blkaddr, 0, mcam_idx);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1130
npc_clear_x2_entry(rvu, blkaddr, 1, mcam_idx);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1132
npc_cn20k_config_kw_x4(rvu, mcam, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1137
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1143
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1149
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1155
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1163
if (npc_cn20k_enable_mcam_entry(rvu, blkaddr, index, enable))
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1169
int npc_cn20k_copy_mcam_entry(struct rvu *rvu, int blkaddr, u16 src, u16 dest)
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1171
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1183
if (npc_mcam_idx_2_key_type(rvu, src, &src_kwtype))
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1186
if (npc_mcam_idx_2_key_type(rvu, dest, &dest_kwtype))
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1202
cfg = rvu_read64(rvu, blkaddr, sreg + (i * 8));
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1203
rvu_write64(rvu, blkaddr, dreg + (i * 8), cfg);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1210
cfg = rvu_read64(rvu, blkaddr, soff);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1214
rvu_write64(rvu, blkaddr, doff, cfg);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1218
cfg = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1220
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1236
int npc_cn20k_read_mcam_entry(struct rvu *rvu, int blkaddr, u16 index,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1240
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1248
if (npc_mcam_idx_2_key_type(rvu, index, &kw_type))
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1254
cfg = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1258
cfg = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1262
cfg = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1266
cfg = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1271
bank_cfg = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1276
cam1 = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1280
cam0 = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1286
cam1 = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1290
cam0 = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1296
cam1 = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1300
cam0 = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1306
cam1 = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1310
cam0 = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1319
cam1 = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1323
cam0 = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1329
cam1 = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1333
cam0 = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1339
cam1 = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1343
cam0 = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1349
cam1 = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1353
cam0 = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1363
int rvu_mbox_handler_npc_cn20k_mcam_write_entry(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1367
struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, req->hdr.pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1368
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1375
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1384
if (!is_npc_interface_valid(rvu, req->intf)) {
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1398
rc = npc_cn20k_config_mcam_entry(rvu, blkaddr, req->entry, nix_intf,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1407
int rvu_mbox_handler_npc_cn20k_mcam_read_entry(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1411
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1417
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1426
rc = npc_cn20k_read_mcam_entry(rvu, blkaddr, req->entry,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1434
int rvu_mbox_handler_npc_cn20k_mcam_alloc_and_write_entry(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1438
struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, req->hdr.pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1442
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1448
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1452
if (!is_npc_interface_valid(rvu, req->intf))
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1463
rc = rvu_mbox_handler_npc_mcam_alloc_entry(rvu,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1481
rc = npc_cn20k_config_mcam_entry(rvu, blkaddr, entry, nix_intf,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1490
err = rvu_mbox_handler_npc_mcam_free_entry(rvu, &free_req, &free_rsp);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1492
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1502
static int rvu_npc_get_base_steer_rule_type(struct rvu *rvu, u16 pcifunc)
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1504
if (is_lbk_vf(rvu, pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1510
int rvu_mbox_handler_npc_cn20k_read_base_steer_rule(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1514
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1521
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1527
pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1540
rc = nix_get_nixlf(rvu, pcifunc, &nixlf, NULL);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1546
rl_type = rvu_npc_get_base_steer_rule_type(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1557
rc = npc_cn20k_read_mcam_entry(rvu, blkaddr, index,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1625
npc_cn20k_update_action_entries_n_flags(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1640
int npc_cn20k_apply_custom_kpu(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1643
const struct npc_cn20k_kpu_profile_fwdata *fw = rvu->kpu_fwdata;
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1654
if (rvu->kpu_fwdata_sz < hdr_sz) {
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1655
dev_warn(rvu->dev, "Invalid KPU profile size\n");
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1660
dev_warn(rvu->dev, "Invalid KPU profile signature %llx\n",
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1668
dev_warn(rvu->dev, "Not supported Major version: %d > %d\n",
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1677
dev_warn(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1689
if (fw->kpus > rvu->hw->npc_kpus) {
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1690
dev_warn(rvu->dev, "Not enough KPUs: %d > %d\n", fw->kpus,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1691
rvu->hw->npc_kpus);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1697
dev_warn(rvu->dev, "Not enough KPUs: %d > %zu\n", fw->kpus,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1704
dev_warn(rvu->dev, "Invalid MKEX profile signature:%llx\n",
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1717
dev_warn(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1725
if (rvu->kpu_fwdata_sz < hdr_sz + offset) {
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1726
dev_warn(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1742
int npc_mcam_idx_2_key_type(struct rvu *rvu, u16 mcam_idx, u8 *key_type)
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1749
dev_err(rvu->dev, "%s: bad params\n",
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1764
dev_err(rvu->dev, "%s: invalid subbank %d\n",
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1776
static int npc_subbank_idx_2_mcam_idx(struct rvu *rvu, struct npc_subbank *sb,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1786
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1797
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1815
int npc_mcam_idx_2_subbank_idx(struct rvu *rvu, u16 mcam_idx,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1823
dev_err(rvu->dev, "%s: Invalid mcam idx %u\n",
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1838
dev_err(rvu->dev, "%s: invalid subbank %d\n",
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1857
static int __npc_subbank_contig_alloc(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1881
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1887
dev_dbg(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1918
dev_dbg(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1924
static int __npc_subbank_non_contig_alloc(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1946
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1986
dev_dbg(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
1993
static void __npc_subbank_sboff_2_off(struct rvu *rvu, struct npc_subbank *sb,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2006
static bool __npc_subbank_mark_slot(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2016
__npc_subbank_sboff_2_off(rvu, sb, sb_off, &bmap, &off);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2018
dev_dbg(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2041
static int __npc_subbank_mark_free(struct rvu *rvu, struct npc_subbank *sb)
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2052
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2064
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2068
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2074
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2075
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2082
static int __npc_subbank_mark_used(struct rvu *rvu, struct npc_subbank *sb,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2098
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2107
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2113
static bool __npc_subbank_free(struct rvu *rvu, struct npc_subbank *sb,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2120
deleted = __npc_subbank_mark_slot(rvu, sb, sb_off, false);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2124
__npc_subbank_sboff_2_off(rvu, sb, sb_off, &bmap, &off);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2138
rc = __npc_subbank_mark_free(rvu, sb);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2140
dev_err(rvu->dev, "%s: Error to free subbank\n", __func__);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2147
npc_subbank_free(struct rvu *rvu, struct npc_subbank *sb, u16 sb_off)
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2152
deleted = __npc_subbank_free(rvu, sb, sb_off);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2158
static int __npc_subbank_alloc(struct rvu *rvu, struct npc_subbank *sb,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2177
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2203
dev_err(rvu->dev, "%s: Wrong ref_enty(%d) or limit(%d)\n",
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2211
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2223
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2235
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2246
dev_err(rvu->dev, "%s: Less number of entries\n",
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2263
dev_dbg(rvu->dev, "%s: subbank key_type mismatch\n", __func__);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2286
dev_dbg(rvu->dev, "%s: subbank is full\n", __func__);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2294
dev_dbg(rvu->dev, "%s: no space for entry\n", __func__);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2308
rc = __npc_subbank_contig_alloc(rvu, sb, key_type,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2320
rc = __npc_subbank_non_contig_alloc(rvu, sb, key_type,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2332
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2334
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2340
rc = __npc_subbank_mark_used(rvu, sb, key_type);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2342
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2349
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2355
rc = npc_subbank_idx_2_mcam_idx(rvu, sb, save[i],
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2358
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2366
ret = __npc_subbank_mark_slot(rvu, sb, save[i], true);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2368
dev_err(rvu->dev, "%s: Error to mark mcam_idx %u\n",
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2379
__npc_subbank_mark_slot(rvu, sb, save[j], false);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2382
__npc_subbank_mark_free(rvu, sb);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2390
npc_subbank_alloc(struct rvu *rvu, struct npc_subbank *sb,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2398
rc = __npc_subbank_alloc(rvu, sb, key_type, ref, limit, prio,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2407
npc_del_from_pf_maps(struct rvu *rvu, u16 mcam_idx)
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2414
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2423
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2433
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2442
npc_add_to_pf_maps(struct rvu *rvu, u16 mcam_idx, int pcifunc)
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2447
dev_dbg(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2456
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2464
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2478
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2511
static void npc_subbank_iter_down(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2545
static void npc_subbank_iter_up(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2587
npc_subbank_iter(struct rvu *rvu, int key_type,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2593
npc_subbank_iter_up(rvu, ref, limit,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2597
npc_subbank_iter_down(rvu, ref, limit,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2619
static int npc_idx_free(struct rvu *rvu, u16 *mcam_idx, int count,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2630
rc = npc_mcam_idx_2_subbank_idx(rvu, npc_vidx2idx(mcam_idx[i]),
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2633
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2649
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2655
rc = npc_mcam_idx_2_subbank_idx(rvu, midx,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2658
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2664
ret = npc_subbank_free(rvu, sb, sb_off);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2666
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2675
rc = npc_del_from_pf_maps(rvu, midx);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2683
rc = npc_vidx_maps_del_entry(rvu, vidx, NULL);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2691
static int npc_multi_subbank_ref_alloc(struct rvu *rvu, int key_type,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2705
rc = npc_mcam_idx_2_subbank_idx(rvu, ref,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2716
rc = npc_idx_free(rvu, mcam_idx,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2729
rc = __npc_subbank_mark_used(rvu, sb,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2733
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2741
__npc_subbank_sboff_2_off(rvu, sb, sb_off, &bmap, &off);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2748
rc = npc_idx_free(rvu, mcam_idx,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2773
rc = npc_mcam_idx_2_subbank_idx(rvu, ref,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2781
rc = npc_idx_free(rvu, mcam_idx, cnt, false);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2793
rc = __npc_subbank_mark_used(rvu, sb, key_type);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2796
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2803
__npc_subbank_sboff_2_off(rvu, sb, sb_off, &bmap, &off);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2808
rc = npc_idx_free(rvu, mcam_idx, cnt, false);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2829
rc = npc_idx_free(rvu, mcam_idx, cnt, false);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2831
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2838
static int npc_subbank_free_cnt(struct rvu *rvu, struct npc_subbank *sb,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2855
static int npc_subbank_ref_alloc(struct rvu *rvu, int key_type,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2873
rc = npc_subbank_iter(rvu, key_type, ref, limit, prio,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2876
dev_dbg(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2885
rc = npc_mcam_idx_2_subbank_idx(rvu, r, &sb1,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2890
dev_dbg(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2896
dev_dbg(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2903
rc = npc_mcam_idx_2_subbank_idx(rvu, l, &sb2,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2908
dev_dbg(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2914
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2921
npc_subbank_free_cnt(rvu, sb1, key_type) < count) {
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2922
dev_dbg(rvu->dev, "%s: less count =%d\n",
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2924
npc_subbank_free_cnt(rvu, sb1, key_type));
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
293
static int npc_vidx_maps_del_entry(struct rvu *rvu, u16 vidx, u16 *old_midx)
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2930
rc = npc_subbank_alloc(rvu, sb1, key_type,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2938
dev_dbg(rvu->dev, "%s: Allocated tot=%d alloc_cnt=%d\n",
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2945
dev_dbg(rvu->dev, "%s: Error to allocate\n",
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2950
rc = npc_idx_free(rvu, mcam_idx, tot, false);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2952
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2973
static bool npc_subbank_restrict_usage(struct rvu *rvu, int index)
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
2988
static int npc_subbank_noref_alloc(struct rvu *rvu, int key_type, bool contig,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
299
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3008
if (npc_subbank_restrict_usage(rvu, idx))
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3017
if (contig && npc_subbank_free_cnt(rvu, sb, key_type) < count)
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3024
rc = npc_subbank_alloc(rvu, sb, key_type,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3036
dev_dbg(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3050
rc = npc_subbank_alloc(rvu, sb, key_type,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3059
dev_dbg(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3075
if (npc_subbank_restrict_usage(rvu, idx))
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3083
rc = npc_subbank_alloc(rvu, sb, key_type,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
309
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3092
dev_dbg(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3106
rc = npc_subbank_alloc(rvu, sb,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3114
dev_dbg(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3132
if (contig && npc_subbank_free_cnt(rvu, sb, key_type) < count)
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3139
rc = npc_subbank_alloc(rvu, sb, key_type,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3151
dev_dbg(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3165
rc = npc_subbank_alloc(rvu, sb, key_type,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
317
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3174
dev_dbg(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3184
npc_idx_free(rvu, mcam_idx, tot, false);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3186
dev_dbg(rvu->dev, "%s: non-contig allocation fails\n",
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3192
int npc_cn20k_idx_free(struct rvu *rvu, u16 *mcam_idx, int count)
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3194
return npc_idx_free(rvu, mcam_idx, count, true);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3197
int npc_cn20k_ref_idx_alloc(struct rvu *rvu, int pcifunc, int key_type,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3213
rc = npc_subbank_ref_alloc(rvu, key_type, ref, limit,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3227
rc = npc_subbank_noref_alloc(rvu, key_type, contig,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3236
rc = npc_multi_subbank_ref_alloc(rvu, key_type,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3242
rc = npc_multi_subbank_ref_alloc(rvu, key_type,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3256
dev_err(rvu->dev, "%s: Wrong ref_enty(%d) or limit(%d)\n",
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3264
dev_err(rvu->dev, "%s: Wrong ref_enty(%d) or limit(%d)\n",
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3272
rc = npc_subbank_ref_alloc(rvu, key_type, ref, limit,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3278
rc = npc_multi_subbank_ref_alloc(rvu, key_type,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3288
rc = npc_add_to_pf_maps(rvu, mcam_idx[i], pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
329
static int npc_vidx_maps_modify(struct rvu *rvu, u16 vidx, u16 new_midx)
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3295
rc = npc_vidx_maps_add_entry(rvu, mcam_idx[i], pcifunc, &vidx);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3297
npc_del_from_pf_maps(rvu, mcam_idx[i]);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3308
npc_del_from_pf_maps(rvu, npc_vidx2idx(mcam_idx[j]));
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3313
npc_vidx_maps_del_entry(rvu, mcam_idx[j], NULL);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3320
void npc_cn20k_subbank_calc_free(struct rvu *rvu, int *x2_free,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3355
rvu_mbox_handler_npc_cn20k_get_fcnt(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3359
npc_cn20k_subbank_calc_free(rvu, &rsp->free_x2,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
336
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3365
rvu_mbox_handler_npc_cn20k_get_kex_cfg(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3392
memcpy(rsp->mkex_pfl_name, rvu->mkex_pfl_name, MKEX_NAME_LEN);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3426
static int npc_subbanks_srch_order_init(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3438
dev_dbg(rvu->dev, "%s: sb->idx=%u sb->arr_idx=%u\n",
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
344
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3444
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3456
static void npc_subbank_init(struct rvu *rvu, struct npc_subbank *sb, int idx)
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3470
static int npc_pcifunc_map_create(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3477
for (pf = 0; pf < rvu->hw->total_pfs; pf++) {
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3478
cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(pf));
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
355
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3577
static int npc_defrag_alloc_free_slots(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3591
rc = __npc_subbank_alloc(rvu, sb,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3602
rc = __npc_subbank_alloc(rvu, sb,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3613
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3624
err = npc_mcam_idx_2_subbank_idx(rvu, save[i],
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3627
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
363
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3633
deleted = __npc_subbank_free(rvu, sb, sb_off);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3635
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3645
static int npc_defrag_add_2_show_list(struct rvu *rvu, u16 old_midx,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3667
int npc_defrag_move_vdx_to_free(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3673
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3685
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3693
dev_dbg(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3698
rc = npc_defrag_add_2_show_list(rvu, old_midx, new_midx, vidx);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3700
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3705
rc = npc_vidx_maps_modify(rvu, vidx, new_midx);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3711
stats = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3719
if (npc_cn20k_enable_mcam_entry(rvu, blkaddr, old_midx, false)) {
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3720
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3726
if (npc_cn20k_copy_mcam_entry(rvu, blkaddr, old_midx, new_midx)) {
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3727
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
373
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3733
if (npc_cn20k_enable_mcam_entry(rvu, blkaddr, new_midx, true)) {
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3734
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3742
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3747
rc = npc_mcam_idx_2_subbank_idx(rvu, old_midx,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3750
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3756
deleted = __npc_subbank_free(rvu, sb, sb_off);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3758
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3769
rc = npc_del_from_pf_maps(rvu, old_midx);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3771
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3778
rc = npc_add_to_pf_maps(rvu, new_midx, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3780
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3820
static int npc_defrag_process(struct rvu *rvu, struct list_head *lh)
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
385
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3867
dev_dbg(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3882
rc = npc_defrag_alloc_free_slots(rvu, f, cnt, save);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3891
rc = npc_defrag_move_vdx_to_free(rvu, f, v, cnt, save);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
391
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3949
int npc_cn20k_search_order_set(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3952
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3965
dev_err(rvu->dev, "Number of entries(%u) != %u\n",
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
399
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
3990
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
406
static int npc_vidx_maps_add_entry(struct rvu *rvu, u16 mcam_idx, int pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4068
int npc_cn20k_defrag(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4070
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4133
rc = npc_mcam_idx_2_subbank_idx(rvu, midx,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4136
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4161
rc = npc_defrag_process(rvu, &x2lh);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4165
rc = npc_defrag_process(rvu, &x4lh);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4178
int rvu_mbox_handler_npc_defrag(struct rvu *rvu, struct msg_req *req,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4181
return npc_cn20k_defrag(rvu);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4184
int npc_cn20k_dft_rules_idx_get(struct rvu *rvu, u16 pcifunc, u16 *bcast,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
420
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4203
if (is_lbk_vf(rvu, pcifunc)) {
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4263
int rvu_mbox_handler_npc_get_pfl_info(struct rvu *rvu, struct msg_req *req,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4266
if (!is_cn20k(rvu->pdev)) {
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4267
dev_err(rvu->dev, "Mbox support is only for cn20k\n");
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4276
int rvu_mbox_handler_npc_get_num_kws(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4287
if (!is_cn20k(rvu->pdev)) {
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4288
dev_err(rvu->dev, "Mbox support is only for cn20k\n");
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
429
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4294
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4296
dev_err(rvu->dev, "%s: NPC block not implemented\n", __func__);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4303
npc_update_flow(rvu, &mdata, fl->features, &fl->packet,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4321
int rvu_mbox_handler_npc_get_dft_rl_idxs(struct rvu *rvu, struct msg_req *req,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4328
if (!is_cn20k(rvu->pdev)) {
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4329
dev_err(rvu->dev, "Mbox support is only for cn20k\n");
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4335
rc = npc_cn20k_dft_rules_idx_get(rvu, pcifunc, &bcast, &mcast,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4347
bool npc_is_cgx_or_lbk(struct rvu *rvu, u16 pcifunc)
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4349
return is_pf_cgxmapped(rvu, rvu_get_pf(rvu->pdev, pcifunc)) ||
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4350
is_lbk_vf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4353
void npc_cn20k_dft_rules_free(struct rvu *rvu, u16 pcifunc)
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4355
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4365
if (!npc_is_cgx_or_lbk(rvu, pcifunc)) {
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4366
dev_dbg(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4372
rc = npc_cn20k_dft_rules_idx_get(rvu, pcifunc, &ptr[0], &ptr[1],
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4378
if (is_lbk_vf(rvu, pcifunc)) {
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4382
dev_dbg(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4396
dev_dbg(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4410
dev_dbg(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4417
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4427
npc_cn20k_enable_mcam_entry(rvu, blkaddr, ptr[i], false);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4431
rc = npc_cn20k_idx_free(rvu, &ptr[i], 1);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4456
int npc_cn20k_dft_rules_alloc(struct rvu *rvu, u16 pcifunc)
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
446
static void npc_config_kpmcam(struct rvu *rvu, int blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4471
if (!npc_is_cgx_or_lbk(rvu, pcifunc)) {
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4472
dev_dbg(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4479
ret = npc_cn20k_dft_rules_idx_get(rvu, pcifunc, &b, &m, &p, &u);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4481
dev_dbg(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4484
dev_dbg(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4500
pf = rvu_get_pf(rvu->pdev, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4504
ret = npc_cn20k_dft_rules_idx_get(rvu, pf_pcifunc, NULL,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4517
pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4533
ret = rvu_mbox_handler_npc_mcam_alloc_entry(rvu, &req, &rsp);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4548
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4571
ret = rvu_mbox_handler_npc_mcam_alloc_entry(rvu, &req, &rsp);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4573
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4587
if (is_lbk_vf(rvu, pcifunc)) {
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4592
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4609
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4627
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
463
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4645
ret = rvu_mbox_handler_npc_mcam_free_entry(rvu, &free_req, &free_rsp);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4647
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
465
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4654
static int npc_priv_init(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4656
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4665
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4667
dev_err(rvu->dev, "%s: NPC block not implemented\n",
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4672
npc_const1 = rvu_read64(rvu, blkaddr, NPC_AF_CONST1);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4674
npc_const2 = rvu_read64(rvu, blkaddr, NPC_AF_CONST2);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4678
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4685
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4692
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
470
npc_config_kpmaction(struct rvu *rvu, int blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4700
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4708
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4724
cfg = rvu_read64(rvu, blkaddr, NPC_AF_INTFX_KEX_CFG(0));
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4727
dev_info(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4752
npc_subbank_init(rvu, sb, i);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4754
ret = npc_subbanks_srch_order_init(rvu);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4759
npc_priv->pf_cnt = npc_pcifunc_map_create(rvu);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4796
void npc_cn20k_deinit(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4827
static int npc_setup_mcam_section(struct rvu *rvu, int key_type)
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4831
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4833
dev_err(rvu->dev, "%s: NPC block not implemented\n", __func__);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4838
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4844
int npc_cn20k_init(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4848
err = npc_priv_init(rvu);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4850
dev_err(rvu->dev, "%s: Error to init\n",
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4855
err = npc_setup_mcam_section(rvu, NPC_MCAM_KEY_X2);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4857
dev_err(rvu->dev, "%s: mcam section configuration failure\n",
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
4865
npc_cn20k_deinit(rvu);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
489
rvu_write64(rvu, blkaddr, reg, *(u64 *)&action1);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
514
rvu_write64(rvu, blkaddr, reg, *(u64 *)&action0);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
518
npc_program_single_kpm_profile(struct rvu *rvu, int blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
526
num_cam_entries = npc_get_num_kpu_cam_entries(rvu, profile);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
527
num_action_entries = npc_get_num_kpu_action_entries(rvu, profile);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
530
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
538
max_entries = rvu->hw->npc_kpu_entries / 2;
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
543
npc_config_kpmcam(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
544
npc_get_kpu_cam_nth_entry(rvu, profile, idx),
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
551
npc_config_kpmaction(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
552
npc_get_kpu_action_nth_entry(rvu, profile, idx),
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
557
npc_enable_kpm_entry(struct rvu *rvu, int blkaddr, int kpm, int num_entries)
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
563
if (!rvu->kpu.custom)
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
565
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
569
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
572
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
575
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
583
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
587
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
590
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
598
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
602
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
610
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
615
static void npc_program_kpm_profile(struct rvu *rvu, int blkaddr, int num_kpms)
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
622
profile1 = &rvu->kpu.kpu[idx];
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
623
pfl1_num_cam_entries = npc_get_num_kpu_cam_entries(rvu, profile1);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
624
npc_program_single_kpm_profile(rvu, blkaddr, idx, 0, profile1);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
625
profile2 = &rvu->kpu.kpu[idx + KPU_OFFSET];
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
626
pfl2_num_cam_entries = npc_get_num_kpu_cam_entries(rvu, profile2);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
628
npc_program_single_kpm_profile(rvu, blkaddr, idx,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
632
npc_enable_kpm_entry(rvu, blkaddr, idx, total_cam_entries);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
633
rvu_write64(rvu, blkaddr, NPC_AF_KPMX_PASS2_OFFSET(idx),
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
636
rvu_write64(rvu, blkaddr, NPC_AF_KPUX_CFG(idx), 0x01);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
637
rvu_write64(rvu, blkaddr, NPC_AF_KPUX_CFG(idx + KPU_OFFSET),
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
642
void npc_cn20k_parser_profile_init(struct rvu *rvu, int blkaddr)
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
645
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
650
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
652
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
654
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
656
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
661
rvu_write64(rvu, blkaddr, NPC_AF_KPUX_CFG(idx), 0x00);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
664
npc_load_kpu_profile(rvu);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
667
rvu_write64(rvu, blkaddr, NPC_AF_KPM_PASS2_CFG, 0x76543210);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
673
num_pkinds = rvu->kpu.pkinds;
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
678
act = npc_get_ikpu_nth_entry(rvu, idx);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
682
npc_config_kpmaction(rvu, blkaddr, act,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
687
npc_program_kpm_profile(rvu, blkaddr, hw->npc_kpms);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
695
static void npc_program_mkex_rx(struct rvu *rvu, int blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
699
u8 num_extr = rvu->hw->npc_kex_extr;
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
706
rvu_write64(rvu, blkaddr, NPC_AF_INTFX_KEX_CFG(intf),
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
711
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
724
static void npc_program_mkex_tx(struct rvu *rvu, int blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
728
u8 num_extr = rvu->hw->npc_kex_extr;
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
735
rvu_write64(rvu, blkaddr, NPC_AF_INTFX_KEX_CFG(intf),
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
740
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
753
static void npc_program_mkex_profile(struct rvu *rvu, int blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
756
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
760
npc_program_mkex_rx(rvu, blkaddr, mkex_extr, intf);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
761
npc_program_mkex_tx(rvu, blkaddr, mkex_extr, intf);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
765
npc_program_mkex_hash(rvu, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
768
void npc_cn20k_load_mkex_profile(struct rvu *rvu, int blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
772
struct device *dev = &rvu->pdev->dev;
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
778
if (rvu->kpu_fwdata_sz ||
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
783
ret = npc_fwdb_prfl_img_map(rvu, &mkex_prfl_addr, &prfl_sz);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
795
rvu->kpu.mcam_kex_prfl.mkex_extr = mcam_kex_extr;
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
803
rvu->kpu.mcam_kex_prfl.mkex_extr = npc_mkex_extr_default_get();
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
806
dev_info(rvu->dev, "Using %s mkex profile\n",
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
807
rvu->kpu.mcam_kex_prfl.mkex_extr->name);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
809
npc_program_mkex_profile(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
810
rvu->kpu.mcam_kex_prfl.mkex_extr);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
816
npc_cn20k_enable_mcam_entry(struct rvu *rvu, int blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
819
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
828
if (npc_mcam_idx_2_key_type(rvu, index, &kw_type))
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
832
cfg = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
838
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
848
cfg = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
854
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
869
npc_clear_x2_entry(struct rvu *rvu, int blkaddr, int bank, int index)
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
871
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
874
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
878
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
880
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
883
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
885
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
888
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
890
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
893
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
895
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
899
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
904
npc_cn20k_clear_mcam_entry(struct rvu *rvu, int blkaddr, int mcam_idx)
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
906
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
911
if (npc_mcam_idx_2_key_type(rvu, mcam_idx, &kw_type))
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
917
npc_clear_x2_entry(rvu, blkaddr, bank, index);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
925
npc_clear_x2_entry(rvu, blkaddr, bank, index);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
975
static void npc_cn20k_config_kw_x2(struct rvu *rvu, struct npc_mcam *mcam,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
996
kex_cfg = rvu_read64(rvu, blkaddr, NPC_AF_INTFX_KEX_CFG(intf));
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.h
29
rvu_write64(rvu, BLKADDR_NPC, \
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.h
299
struct rvu;
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.h
302
int npc_cn20k_init(struct rvu *rvu);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.h
303
void npc_cn20k_deinit(struct rvu *rvu);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.h
305
void npc_cn20k_subbank_calc_free(struct rvu *rvu, int *x2_free,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.h
308
int npc_cn20k_ref_idx_alloc(struct rvu *rvu, int pcifunc, int key_type,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.h
311
int npc_cn20k_idx_free(struct rvu *rvu, u16 *mcam_idx, int count);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.h
312
void npc_cn20k_parser_profile_init(struct rvu *rvu, int blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.h
314
void npc_cn20k_load_mkex_profile(struct rvu *rvu, int blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.h
316
int npc_cn20k_apply_custom_kpu(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.h
320
npc_cn20k_update_action_entries_n_flags(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.h
323
int npc_cn20k_dft_rules_alloc(struct rvu *rvu, u16 pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.h
324
void npc_cn20k_dft_rules_free(struct rvu *rvu, u16 pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.h
326
int npc_cn20k_dft_rules_idx_get(struct rvu *rvu, u16 pcifunc, u16 *bcast,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.h
329
int npc_cn20k_config_mcam_entry(struct rvu *rvu, int blkaddr, int index,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.h
33
rvu_read64(rvu, BLKADDR_NPC, NPC_AF_INTFX_KEX_CFG(intf))
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.h
332
int npc_cn20k_enable_mcam_entry(struct rvu *rvu, int blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.h
334
int npc_cn20k_copy_mcam_entry(struct rvu *rvu, int blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.h
336
int npc_cn20k_read_mcam_entry(struct rvu *rvu, int blkaddr, u16 index,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.h
339
int npc_cn20k_clear_mcam_entry(struct rvu *rvu, int blkaddr, int index);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.h
340
int npc_mcam_idx_2_key_type(struct rvu *rvu, u16 mcam_idx, u8 *key_type);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.h
343
int npc_cn20k_defrag(struct rvu *rvu);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.h
344
bool npc_is_cgx_or_lbk(struct rvu *rvu, u16 pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.h
345
int npc_mcam_idx_2_subbank_idx(struct rvu *rvu, u16 mcam_idx,
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.h
349
int npc_cn20k_search_order_set(struct rvu *rvu, u64 narr[MAX_NUM_SUB_BANKS],
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.h
36
rvu_read64(rvu, BLKADDR_NPC, \
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.h
40
rvu_write64(rvu, BLKADDR_NPC, \
drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.h
44
rvu_read64(rvu, BLKADDR_NPC, \
drivers/net/ethernet/marvell/octeontx2/af/mcs.h
150
void *rvu;
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
100
pfvf = &mcs->pf[rvu_get_pf(rvu->pdev, pcifunc)];
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
113
spin_lock(&rvu->mcs_intrq_lock);
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
114
list_add_tail(&qentry->node, &rvu->mcs_intrq_head);
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
115
spin_unlock(&rvu->mcs_intrq_lock);
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
116
queue_work(rvu->mcs_intr_wq, &rvu->mcs_intr_work);
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
121
static int mcs_notify_pfvf(struct mcs_intr_event *event, struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
126
pf = rvu_get_pf(rvu->pdev, event->pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
128
mutex_lock(&rvu->mbox_lock);
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
130
req = otx2_mbox_alloc_msg_mcs_intr_notify(rvu, pf);
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
132
mutex_unlock(&rvu->mbox_lock);
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
142
otx2_mbox_wait_for_zero(&rvu->afpf_wq_info.mbox_up, pf);
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
144
otx2_mbox_msg_send_up(&rvu->afpf_wq_info.mbox_up, pf);
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
146
otx2_mbox_wait_for_rsp(&rvu->afpf_wq_info.mbox_up, pf);
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
148
mutex_unlock(&rvu->mbox_lock);
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
155
struct rvu *rvu = container_of(work, struct rvu, mcs_intr_work);
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
161
spin_lock_irqsave(&rvu->mcs_intrq_lock, flags);
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
162
qentry = list_first_entry_or_null(&rvu->mcs_intrq_head,
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
168
spin_unlock_irqrestore(&rvu->mcs_intrq_lock, flags);
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
174
mcs_notify_pfvf(event, rvu);
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
179
int rvu_mbox_handler_mcs_intr_cfg(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
187
if (req->mcs_id >= rvu->mcs_blk_cnt)
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
19
*otx2_mbox_alloc_msg_ ## _fn_name(struct rvu *rvu, int devid) \
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
194
pfvf = &mcs->vf[rvu_get_hwvf(rvu, pcifunc)];
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
196
pfvf = &mcs->pf[rvu_get_pf(rvu->pdev, pcifunc)];
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
204
int rvu_mbox_handler_mcs_get_hw_info(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
210
if (!rvu->mcs_blk_cnt)
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
215
rsp->num_mcs_blks = rvu->mcs_blk_cnt;
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
223
int rvu_mbox_handler_mcs_port_reset(struct rvu *rvu, struct mcs_port_reset_req *req,
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
228
if (req->mcs_id >= rvu->mcs_blk_cnt)
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
238
int rvu_mbox_handler_mcs_clear_stats(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
24
&rvu->afpf_wq_info.mbox_up, devid, sizeof(struct _req_type), \
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
245
if (req->mcs_id >= rvu->mcs_blk_cnt)
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
260
int rvu_mbox_handler_mcs_get_flowid_stats(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
266
if (req->mcs_id >= rvu->mcs_blk_cnt)
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
291
int rvu_mbox_handler_mcs_get_secy_stats(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
296
if (req->mcs_id >= rvu->mcs_blk_cnt)
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
319
int rvu_mbox_handler_mcs_get_sc_stats(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
325
if (req->mcs_id >= rvu->mcs_blk_cnt)
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
343
int rvu_mbox_handler_mcs_get_sa_stats(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
349
if (req->mcs_id >= rvu->mcs_blk_cnt)
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
36
void rvu_mcs_ptp_cfg(struct rvu *rvu, u8 rpm_id, u8 lmac_id, bool ena)
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
367
int rvu_mbox_handler_mcs_get_port_stats(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
373
if (req->mcs_id >= rvu->mcs_blk_cnt)
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
391
int rvu_mbox_handler_mcs_set_active_lmac(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
397
if (req->mcs_id >= rvu->mcs_blk_cnt)
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
409
int rvu_mbox_handler_mcs_port_cfg_set(struct rvu *rvu, struct mcs_port_cfg_set_req *req,
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
414
if (req->mcs_id >= rvu->mcs_blk_cnt)
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
42
if (!rvu->mcs_blk_cnt)
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
427
int rvu_mbox_handler_mcs_port_cfg_get(struct rvu *rvu, struct mcs_port_cfg_get_req *req,
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
432
if (req->mcs_id >= rvu->mcs_blk_cnt)
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
445
int rvu_mbox_handler_mcs_custom_tag_cfg_get(struct rvu *rvu, struct mcs_custom_tag_cfg_get_req *req,
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
450
if (req->mcs_id >= rvu->mcs_blk_cnt)
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
460
int rvu_mcs_flr_handler(struct rvu *rvu, u16 pcifunc)
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
466
if (rvu->mcs_blk_cnt > 1) {
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
467
for (mcs_id = 0; mcs_id < rvu->mcs_blk_cnt; mcs_id++) {
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
481
int rvu_mbox_handler_mcs_flowid_ena_entry(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
487
if (req->mcs_id >= rvu->mcs_blk_cnt)
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
495
int rvu_mbox_handler_mcs_pn_table_write(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
501
if (req->mcs_id >= rvu->mcs_blk_cnt)
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
509
int rvu_mbox_handler_mcs_set_pn_threshold(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
51
if (rvu->mcs_blk_cnt > 1) {
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
515
if (req->mcs_id >= rvu->mcs_blk_cnt)
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
525
int rvu_mbox_handler_mcs_rx_sc_sa_map_write(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
531
if (req->mcs_id >= rvu->mcs_blk_cnt)
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
539
int rvu_mbox_handler_mcs_tx_sc_sa_map_write(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
545
if (req->mcs_id >= rvu->mcs_blk_cnt)
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
555
int rvu_mbox_handler_mcs_sa_plcy_write(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
562
if (req->mcs_id >= rvu->mcs_blk_cnt)
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
573
int rvu_mbox_handler_mcs_rx_sc_cam_write(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
579
if (req->mcs_id >= rvu->mcs_blk_cnt)
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
587
int rvu_mbox_handler_mcs_secy_plcy_write(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
592
if (req->mcs_id >= rvu->mcs_blk_cnt)
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
602
int rvu_mbox_handler_mcs_flowid_entry_write(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
609
if (req->mcs_id >= rvu->mcs_blk_cnt)
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
629
int rvu_mbox_handler_mcs_free_resources(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
63
port = (rpm_id * rvu->hw->lmac_per_cgx) + lmac_id;
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
638
if (req->mcs_id >= rvu->mcs_blk_cnt)
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
648
mutex_lock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
675
mutex_unlock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
679
int rvu_mbox_handler_mcs_alloc_resources(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
688
if (req->mcs_id >= rvu->mcs_blk_cnt)
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
698
mutex_lock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
72
int rvu_mbox_handler_mcs_set_lmac_mode(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
756
dev_err(rvu->dev, "Failed to allocate the mcs resources for PCIFUNC:%d\n", pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
757
mutex_unlock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
761
int rvu_mbox_handler_mcs_alloc_ctrl_pkt_rule(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
771
if (req->mcs_id >= rvu->mcs_blk_cnt)
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
778
mutex_lock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
78
if (req->mcs_id >= rvu->mcs_blk_cnt)
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
808
mutex_unlock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
812
dev_err(rvu->dev, "Failed to allocate the mcs ctrl pkt rule for PCIFUNC:%d\n",
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
814
mutex_unlock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
818
int rvu_mbox_handler_mcs_free_ctrl_pkt_rule(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
825
if (req->mcs_id >= rvu->mcs_blk_cnt)
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
830
mutex_lock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
834
mutex_unlock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
839
int rvu_mbox_handler_mcs_ctrl_pkt_rule_write(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
846
if (req->mcs_id >= rvu->mcs_blk_cnt)
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
856
static void rvu_mcs_set_lmac_bmap(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
863
cgx = port / rvu->hw->lmac_per_cgx;
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
864
lmac = port % rvu->hw->lmac_per_cgx;
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
865
if (!is_lmac_valid(rvu_cgx_pdata(cgx, rvu), lmac))
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
872
int rvu_mcs_init(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
874
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
878
rvu->mcs_blk_cnt = mcs_get_blkcnt();
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
880
if (!rvu->mcs_blk_cnt)
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
884
if (rvu->mcs_blk_cnt == 1) {
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
889
rvu_mcs_set_lmac_bmap(rvu);
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
893
for (mcs_id = 0; mcs_id < rvu->mcs_blk_cnt; mcs_id++) {
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
899
mcs->rvu = rvu;
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
914
INIT_LIST_HEAD(&rvu->mcs_intrq_head);
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
915
INIT_WORK(&rvu->mcs_intr_work, mcs_intr_handler_task);
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
916
rvu->mcs_intr_wq = alloc_workqueue("mcs_intr_wq", WQ_PERCPU, 0);
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
917
if (!rvu->mcs_intr_wq) {
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
918
dev_err(rvu->dev, "mcs alloc workqueue failed\n");
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
925
void rvu_mcs_exit(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
927
if (!rvu->mcs_intr_wq)
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
93
struct rvu *rvu = mcs->rvu;
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
930
destroy_workqueue(rvu->mcs_intr_wq);
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
931
rvu->mcs_intr_wq = NULL;
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
98
pfvf = &mcs->vf[rvu_get_hwvf(rvu, pcifunc)];
drivers/net/ethernet/marvell/octeontx2/af/npc.h
14
rvu_write64(rvu, blkaddr, \
drivers/net/ethernet/marvell/octeontx2/af/npc.h
18
rvu_write64(rvu, blkaddr, \
drivers/net/ethernet/marvell/octeontx2/af/ptp.c
101
struct ptp *ptp = rvu->ptp;
drivers/net/ethernet/marvell/octeontx2/af/ptp.c
103
if (is_rvu_otx2(rvu))
drivers/net/ethernet/marvell/octeontx2/af/ptp.c
367
void ptp_start(struct rvu *rvu, u64 sclk, u32 ext_clk_freq, u32 extts)
drivers/net/ethernet/marvell/octeontx2/af/ptp.c
369
struct ptp *ptp = rvu->ptp;
drivers/net/ethernet/marvell/octeontx2/af/ptp.c
388
if (is_tstmp_atomic_update_supported(rvu)) {
drivers/net/ethernet/marvell/octeontx2/af/ptp.c
619
int rvu_mbox_handler_ptp_op(struct rvu *rvu, struct ptp_req *req,
drivers/net/ethernet/marvell/octeontx2/af/ptp.c
631
if (!rvu->ptp)
drivers/net/ethernet/marvell/octeontx2/af/ptp.c
636
err = ptp_adjfine(rvu->ptp, req->scaled_ppm);
drivers/net/ethernet/marvell/octeontx2/af/ptp.c
639
err = ptp_get_clock(rvu->ptp, &rsp->clk);
drivers/net/ethernet/marvell/octeontx2/af/ptp.c
642
err = ptp_get_tstmp(rvu->ptp, &rsp->clk);
drivers/net/ethernet/marvell/octeontx2/af/ptp.c
645
err = ptp_set_thresh(rvu->ptp, req->thresh);
drivers/net/ethernet/marvell/octeontx2/af/ptp.c
648
err = ptp_pps_on(rvu->ptp, req->pps_on, req->period);
drivers/net/ethernet/marvell/octeontx2/af/ptp.c
651
ptp_atomic_adjtime(rvu->ptp, req->delta);
drivers/net/ethernet/marvell/octeontx2/af/ptp.c
654
ptp_atomic_update(rvu->ptp, (u64)req->clk);
drivers/net/ethernet/marvell/octeontx2/af/ptp.c
664
int rvu_mbox_handler_ptp_get_cap(struct rvu *rvu, struct msg_req *req,
drivers/net/ethernet/marvell/octeontx2/af/ptp.c
667
if (!rvu->ptp)
drivers/net/ethernet/marvell/octeontx2/af/ptp.c
670
if (is_tstmp_atomic_update_supported(rvu))
drivers/net/ethernet/marvell/octeontx2/af/ptp.c
99
static bool is_tstmp_atomic_update_supported(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/ptp.h
26
struct rvu;
drivers/net/ethernet/marvell/octeontx2/af/ptp.h
29
void ptp_start(struct rvu *rvu, u64 sclk, u32 ext_clk_freq, u32 extts);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1000
err = rvu_setup_nix_hw_resource(rvu, BLKADDR_NIX1);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1002
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1011
cfg = rvu_read64(rvu, BLKADDR_SSO, SSO_AF_CONST);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1023
block->rvu = rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1027
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1048
block->rvu = rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1052
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
106
reg = rvu->afreg_base + ((block << 28) | offset);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1062
cfg = rvu_read64(rvu, BLKADDR_TIM, TIM_AF_CONST);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1074
block->rvu = rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1078
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1084
err = rvu_setup_cpt_hw_resource(rvu, BLKADDR_CPT0);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1086
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1090
err = rvu_setup_cpt_hw_resource(rvu, BLKADDR_CPT1);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1092
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1098
rvu->pf = devm_kcalloc(rvu->dev, hw->total_pfs,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1100
if (!rvu->pf) {
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1101
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1106
rvu->hwvf = devm_kcalloc(rvu->dev, hw->total_vfs,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1108
if (!rvu->hwvf) {
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1109
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1114
mutex_init(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1116
rvu_fwdata_init(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1118
err = rvu_setup_msix_resources(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1120
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1131
block->fn_map = devm_kcalloc(rvu->dev, block->lf.max,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1141
rvu_scan_block(rvu, block);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1144
err = rvu_set_channels_base(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1148
err = rvu_npc_init(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1150
dev_err(rvu->dev, "%s: Failed to initialize npc\n", __func__);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1154
err = rvu_cgx_init(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1156
dev_err(rvu->dev, "%s: Failed to initialize cgx\n", __func__);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1160
err = rvu_npc_exact_init(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1162
dev_err(rvu->dev, "failed to initialize exact match table\n");
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1167
rvu_setup_pfvf_macaddress(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1169
err = rvu_npa_init(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1171
dev_err(rvu->dev, "%s: Failed to initialize npa\n", __func__);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1175
rvu_get_lbk_bufsize(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1177
err = rvu_nix_init(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1179
dev_err(rvu->dev, "%s: Failed to initialize nix\n", __func__);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1183
err = rvu_sdp_init(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1185
dev_err(rvu->dev, "%s: Failed to initialize sdp\n", __func__);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1189
rvu_program_channels(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1190
cgx_start_linkup(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1192
rvu_block_bcast_xon(rvu, BLKADDR_NIX0);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1193
rvu_block_bcast_xon(rvu, BLKADDR_NIX1);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1195
err = rvu_mcs_init(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1197
dev_err(rvu->dev, "%s: Failed to initialize mcs\n", __func__);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1201
err = rvu_cpt_init(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1203
dev_err(rvu->dev, "%s: Failed to initialize cpt\n", __func__);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1210
rvu_mcs_exit(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1212
rvu_nix_freemem(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1214
rvu_npa_freemem(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1216
rvu_cgx_exit(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1218
rvu_npc_freemem(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1219
rvu_fwdata_exit(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1221
rvu_reset_msix(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1226
void rvu_aq_free(struct rvu *rvu, struct admin_queue *aq)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1231
qmem_free(rvu->dev, aq->inst);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1232
qmem_free(rvu->dev, aq->res);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1233
devm_kfree(rvu->dev, aq);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1236
int rvu_aq_alloc(struct rvu *rvu, struct admin_queue **ad_queue,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1242
*ad_queue = devm_kzalloc(rvu->dev, sizeof(*aq), GFP_KERNEL);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1248
err = qmem_alloc(rvu->dev, &aq->inst, qsize, inst_size);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1250
devm_kfree(rvu->dev, aq);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1255
err = qmem_alloc(rvu->dev, &aq->res, qsize, res_size);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1257
rvu_aq_free(rvu, aq);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1265
int rvu_mbox_handler_ready(struct rvu *rvu, struct msg_req *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1268
if (rvu->fwdata) {
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1269
rsp->rclk_freq = rvu->fwdata->rclk;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1270
rsp->sclk_freq = rvu->fwdata->sclk;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1321
bool is_pffunc_map_valid(struct rvu *rvu, u16 pcifunc, int blktype)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1325
if (!is_pf_func_valid(rvu, pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1328
pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1337
static int rvu_lookup_rsrc(struct rvu *rvu, struct rvu_block *block,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1343
rvu_write64(rvu, block->addr, block->lookup_reg, val);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1346
while (rvu_read64(rvu, block->addr, block->lookup_reg) & (1ULL << 13))
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1349
val = rvu_read64(rvu, block->addr, block->lookup_reg);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1358
int rvu_get_blkaddr_from_slot(struct rvu *rvu, int blktype, u16 pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1361
struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1375
block = &rvu->hw->block[blkaddr];
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1378
if (!is_block_implemented(rvu->hw, blkaddr))
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1412
static void rvu_detach_block(struct rvu *rvu, int pcifunc, int blktype)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1414
struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1415
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1420
blkaddr = rvu_get_blkaddr(rvu, blktype, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1431
lf = rvu_lookup_rsrc(rvu, block, pcifunc, slot);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1437
rvu_npc_clear_ucast_entry(rvu, pcifunc, lf);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1440
rvu_write64(rvu, blkaddr, block->lfcfg_reg |
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1444
rvu_update_rsrc_map(rvu, pfvf, block,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1451
rvu_clear_msix_offset(rvu, pfvf, block, lf);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1455
static int rvu_detach_rsrcs(struct rvu *rvu, struct rsrc_detach *detach,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1458
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1463
mutex_lock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1499
npc_cn20k_dft_rules_free(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1501
rvu_detach_block(rvu, pcifunc, block->type);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1504
mutex_unlock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1508
int rvu_mbox_handler_detach_resources(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1512
return rvu_detach_rsrcs(rvu, detach, detach->hdr.pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1515
int rvu_get_nix_blkaddr(struct rvu *rvu, u16 pcifunc)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1517
struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1521
pf = rvu_get_pfvf(rvu, pcifunc & ~RVU_PFVF_FUNC_MASK);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1524
if (is_pf_cgxmapped(rvu, rvu_get_pf(rvu->pdev, pcifunc))) {
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1526
} else if (is_lbk_vf(rvu, pcifunc)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1533
if (!is_block_implemented(rvu->hw, BLKADDR_NIX1))
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1538
if (is_sdp_pfvf(rvu, pcifunc) && pf->sdp_info->node_id == 1)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1558
static int rvu_get_attach_blkaddr(struct rvu *rvu, int blktype,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1565
blkaddr = rvu_get_nix_blkaddr(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1569
return rvu_get_blkaddr(rvu, blktype, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1576
return rvu_get_blkaddr(rvu, blktype, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1579
if (is_block_implemented(rvu->hw, blkaddr))
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1585
static int rvu_attach_block(struct rvu *rvu, int pcifunc, int blktype,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1588
struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1589
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1598
blkaddr = rvu_get_attach_blkaddr(rvu, blktype, pcifunc, attach);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1613
rvu_write64(rvu, blkaddr, block->lfcfg_reg |
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1615
rvu_update_rsrc_map(rvu, pfvf, block,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1619
rvu_set_msix_offset(rvu, pfvf, block, lf);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1625
static int rvu_check_rsrc_availability(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1628
struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1630
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1640
dev_err(&rvu->pdev->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1648
blkaddr = rvu_get_attach_blkaddr(rvu, BLKTYPE_NIX,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1657
dev_err(&rvu->pdev->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1667
dev_err(&rvu->pdev->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1683
dev_err(&rvu->pdev->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1698
dev_err(&rvu->pdev->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1711
blkaddr = rvu_get_attach_blkaddr(rvu, BLKTYPE_CPT,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1717
dev_err(&rvu->pdev->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1732
dev_info(rvu->dev, "Request for %s failed\n", block->name);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1736
static bool rvu_attach_from_same_block(struct rvu *rvu, int blktype,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1741
blkaddr = rvu_get_attach_blkaddr(rvu, blktype,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1746
num_lfs = rvu_get_rsrc_mapcount(rvu_get_pfvf(rvu, attach->hdr.pcifunc),
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1752
int rvu_mbox_handler_attach_resources(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1761
err = rvu_detach_rsrcs(rvu, NULL, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1766
mutex_lock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1769
err = rvu_check_rsrc_availability(rvu, attach, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1775
err = rvu_attach_block(rvu, pcifunc, BLKTYPE_NPA, 1, attach);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1781
err = rvu_attach_block(rvu, pcifunc, BLKTYPE_NIX, 1, attach);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1785
if (is_cn20k(rvu->pdev)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1786
err = npc_cn20k_dft_rules_alloc(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1799
rvu_detach_block(rvu, pcifunc, BLKTYPE_SSO);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1800
err = rvu_attach_block(rvu, pcifunc, BLKTYPE_SSO,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1808
rvu_detach_block(rvu, pcifunc, BLKTYPE_SSOW);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1809
err = rvu_attach_block(rvu, pcifunc, BLKTYPE_SSOW,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1817
rvu_detach_block(rvu, pcifunc, BLKTYPE_TIM);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1818
err = rvu_attach_block(rvu, pcifunc, BLKTYPE_TIM,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1826
rvu_attach_from_same_block(rvu, BLKTYPE_CPT, attach))
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1827
rvu_detach_block(rvu, pcifunc, BLKTYPE_CPT);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1828
err = rvu_attach_block(rvu, pcifunc, BLKTYPE_CPT,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1834
mutex_unlock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1839
rvu_detach_block(rvu, pcifunc, BLKTYPE_TIM);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1843
rvu_detach_block(rvu, pcifunc, BLKTYPE_SSOW);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1847
rvu_detach_block(rvu, pcifunc, BLKTYPE_SSO);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1850
if (is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1851
npc_cn20k_dft_rules_free(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1855
rvu_detach_block(rvu, pcifunc, BLKTYPE_NIX);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1859
rvu_detach_block(rvu, pcifunc, BLKTYPE_NPA);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1862
mutex_unlock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1866
static u16 rvu_get_msix_offset(struct rvu *rvu, struct rvu_pfvf *pfvf,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1881
static void rvu_set_msix_offset(struct rvu *rvu, struct rvu_pfvf *pfvf,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1887
cfg = rvu_read64(rvu, block->addr, block->msixcfg_reg |
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1898
rvu_write64(rvu, block->addr, block->msixcfg_reg |
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1906
static void rvu_clear_msix_offset(struct rvu *rvu, struct rvu_pfvf *pfvf,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1912
cfg = rvu_read64(rvu, block->addr, block->msixcfg_reg |
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1917
rvu_write64(rvu, block->addr, block->msixcfg_reg |
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1920
offset = rvu_get_msix_offset(rvu, pfvf, block->addr, lf);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1930
int rvu_mbox_handler_msix_offset(struct rvu *rvu, struct msg_req *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1933
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1938
pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1943
lf = rvu_get_lf(rvu, &hw->block[BLKADDR_NPA], pcifunc, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1944
rsp->npa_msixoff = rvu_get_msix_offset(rvu, pfvf, BLKADDR_NPA, lf);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1947
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1951
lf = rvu_get_lf(rvu, &hw->block[blkaddr], pcifunc, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1952
rsp->nix_msixoff = rvu_get_msix_offset(rvu, pfvf, blkaddr, lf);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1957
lf = rvu_get_lf(rvu, &hw->block[BLKADDR_SSO], pcifunc, slot);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1959
rvu_get_msix_offset(rvu, pfvf, BLKADDR_SSO, lf);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1964
lf = rvu_get_lf(rvu, &hw->block[BLKADDR_SSOW], pcifunc, slot);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1966
rvu_get_msix_offset(rvu, pfvf, BLKADDR_SSOW, lf);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1971
lf = rvu_get_lf(rvu, &hw->block[BLKADDR_TIM], pcifunc, slot);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1973
rvu_get_msix_offset(rvu, pfvf, BLKADDR_TIM, lf);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1978
lf = rvu_get_lf(rvu, &hw->block[BLKADDR_CPT0], pcifunc, slot);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1980
rvu_get_msix_offset(rvu, pfvf, BLKADDR_CPT0, lf);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1985
lf = rvu_get_lf(rvu, &hw->block[BLKADDR_CPT1], pcifunc, slot);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1987
rvu_get_msix_offset(rvu, pfvf, BLKADDR_CPT1, lf);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1993
int rvu_mbox_handler_free_rsrc_cnt(struct rvu *rvu, struct msg_req *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
1996
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2001
mutex_lock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2027
if (rvu->hw->cap.nix_fixed_txschq_mapping) {
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2033
if (!is_block_implemented(rvu->hw, BLKADDR_NIX1))
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2057
if (!is_block_implemented(rvu->hw, BLKADDR_NIX1))
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2081
mutex_unlock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2086
int rvu_mbox_handler_vf_flr(struct rvu *rvu, struct msg_req *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2094
cfg = rvu_read64(rvu, BLKADDR_RVUM,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2095
RVU_PRIV_PFX_CFG(rvu_get_pf(rvu->pdev, pcifunc)));
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2099
__rvu_flr_handler(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2106
int rvu_ndc_sync(struct rvu *rvu, int lfblkaddr, int lfidx, u64 lfoffset)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2109
rvu_write64(rvu, lfblkaddr, lfoffset, BIT_ULL(12) | lfidx);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2110
return rvu_poll_reg(rvu, lfblkaddr, lfoffset, BIT_ULL(12), true);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2113
int rvu_mbox_handler_get_hw_cap(struct rvu *rvu, struct msg_req *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2116
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2122
if (rvu->mcs_blk_cnt)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2128
int rvu_mbox_handler_set_vf_perm(struct rvu *rvu, struct set_vf_perm *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2131
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2138
if ((pcifunc & RVU_PFVF_FUNC_MASK) || is_lbk_vf(rvu, pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2142
pfvf = rvu_get_pfvf(rvu, target);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2151
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, target);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2154
nixlf = rvu_get_lf(rvu, &hw->block[blkaddr],
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2158
npc_enadis_default_mce_entry(rvu, target, nixlf,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2161
npc_enadis_default_mce_entry(rvu, target, nixlf,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2170
int rvu_mbox_handler_ndc_sync_op(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2174
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2180
lfblkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPA, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2184
lfidx = rvu_get_lf(rvu, &hw->block[lfblkaddr], pcifunc, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2189
err = rvu_ndc_sync(rvu, lfblkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2192
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2200
lfblkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2204
lfidx = rvu_get_lf(rvu, &hw->block[lfblkaddr], pcifunc, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2210
err = rvu_ndc_sync(rvu, lfblkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2213
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2219
err = rvu_ndc_sync(rvu, lfblkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2222
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2229
static void rvu_notify_altaf(struct rvu *rvu, u16 pcifunc, u64 op)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2233
if (!rvu->fwdata)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2237
pf = rvu_get_pf(rvu->pdev, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2238
set_bit(pf, rvu->fwdata->altaf_intr_info.flr_pf_bmap);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2248
set_bit(vf, rvu->fwdata->altaf_intr_info.flr_vf_bmap);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2252
rvu_write64(rvu, BLKADDR_NIX0, AF_BAR2_ALIASX(0, NIX_GINT_INT_W1S), op);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2259
struct rvu *rvu = pci_get_drvdata(mbox->pdev);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
226
int rvu_get_lf(struct rvu *rvu, struct rvu_block *block, u16 pcifunc, u16 slot)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2288
err = rvu_mbox_handler_ ## _fn_name(rvu, \
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2309
struct rvu *rvu = mwork->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
231
mutex_lock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2319
mw = &rvu->afpf_wq_info;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2322
mw = &rvu->afvf_wq_info;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2339
if (req_hdr->sig && rvu->altaf_ready &&
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2340
!(is_rvu_otx2(rvu) || is_cn20k(rvu->pdev))) {
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2342
rvu_write64(rvu, BLKADDR_NIX0, RVU_AF_BAR2_SEL,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2345
rvu_write64(rvu, BLKADDR_NIX0,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2349
rvu_write64(rvu, BLKADDR_NIX0,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
235
mutex_unlock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2362
msg->pcifunc &= rvu_pcifunc_pf_mask(rvu->pdev);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2363
msg->pcifunc |= rvu_make_pcifunc(rvu->pdev, devid, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2379
dev_warn(rvu->dev, "Error %d when processing message %s (0x%x) from PF%d:VF%d\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2381
msg->id, rvu_get_pf(rvu->pdev, msg->pcifunc),
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2384
dev_warn(rvu->dev, "Error %d when processing message %s (0x%x) from PF%d\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2401
struct rvu *rvu = mwork->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2403
mutex_lock(&rvu->mbox_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2405
mutex_unlock(&rvu->mbox_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
241
mutex_unlock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2417
struct rvu *rvu = mwork->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2427
mw = &rvu->afpf_wq_info;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2430
mw = &rvu->afvf_wq_info;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2442
dev_warn(rvu->dev, "mbox up handler: num_msgs = 0\n");
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2452
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2458
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2469
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2497
static int rvu_get_mbox_regions(struct rvu *rvu, void __iomem **mbox_addr,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2500
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2508
if (is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2509
return cn20k_rvu_get_mbox_regions(rvu, (void *)mbox_addr,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2522
bar4 = rvu_read64(rvu, BLKADDR_RVUM,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2527
bar4 = rvupf_read64(rvu, RVU_PF_VF_BAR4_ADDR);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
254
int rvu_get_blkaddr(struct rvu *rvu, int blktype, u16 pcifunc)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2546
bar4 = rvu_read64(rvu, BLKADDR_RVUM,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2549
bar4 = rvu_read64(rvu, BLKADDR_RVUM,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2570
static int rvu_mbox_init(struct rvu *rvu, struct mbox_wq_info *mw,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2601
cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(i));
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2607
rvu->ng_rvu = ng_rvu_mbox;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2609
rvu->ng_rvu->rvu_mbox_ops = &rvu_mbox_ops;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2611
err = cn20k_rvu_mbox_init(rvu, type, num);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2615
mutex_init(&rvu->mbox_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2628
reg_base = rvu->afreg_base;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2629
err = rvu_get_mbox_regions(rvu, mbox_regions, num, TYPE_AFPF, pf_bmap);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2637
reg_base = rvu->pfreg_base;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2638
err = rvu_get_mbox_regions(rvu, mbox_regions, num, TYPE_AFVF, pf_bmap);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2655
mw->mbox_wrk = devm_kcalloc(rvu->dev, num,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2662
mw->mbox_wrk_up = devm_kcalloc(rvu->dev, num,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2669
err = otx2_mbox_regions_init(&mw->mbox, mbox_regions, rvu->pdev,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2674
err = otx2_mbox_regions_init(&mw->mbox_up, mbox_regions, rvu->pdev,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2684
mwork->rvu = rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2688
mwork->rvu = rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2705
cn20k_free_mbox_memory(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2707
kfree(rvu->ng_rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2777
struct rvu *rvu = (struct rvu *)rvu_irq;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2780
intr = rvu_read64(rvu, BLKADDR_RVUM, RVU_AF_PFAF_MBOX_INT);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2782
rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFAF_MBOX_INT, intr);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2784
trace_otx2_msg_interrupt(rvu->pdev, "PF(s) to AF", intr);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2789
rvu_queue_work(&rvu->afpf_wq_info, 0, rvu->hw->total_pfs, intr);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2796
struct rvu *rvu = (struct rvu *)rvu_irq;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2797
int vfs = rvu->vfs;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2805
intr = rvupf_read64(rvu, RVU_PF_VFPF_MBOX_INTX(1));
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2806
rvupf_write64(rvu, RVU_PF_VFPF_MBOX_INTX(1), intr);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2808
rvu_queue_work(&rvu->afvf_wq_info, 64, vfs, intr);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2812
intr = rvupf_read64(rvu, RVU_PF_VFPF_MBOX_INTX(0));
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2813
rvupf_write64(rvu, RVU_PF_VFPF_MBOX_INTX(0), intr);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2815
trace_otx2_msg_interrupt(rvu->pdev, "VF(s) to AF", intr);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2817
rvu_queue_work(&rvu->afvf_wq_info, 0, vfs, intr);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2822
static void rvu_enable_mbox_intr(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2824
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2826
if (is_cn20k(rvu->pdev)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2827
cn20k_rvu_enable_mbox_intr(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2832
rvu_write64(rvu, BLKADDR_RVUM,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2836
rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFAF_MBOX_INT_ENA_W1S,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2840
static void rvu_blklf_teardown(struct rvu *rvu, u16 pcifunc, u8 blkaddr)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2846
block = &rvu->hw->block[blkaddr];
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2847
num_lfs = rvu_get_rsrc_mapcount(rvu_get_pfvf(rvu, pcifunc),
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2850
if (block->addr == BLKADDR_TIM && rvu->altaf_ready) {
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2851
rvu_notify_altaf(rvu, pcifunc, ALTAF_FLR);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2856
rvu->altaf_ready)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2862
lf = rvu_get_lf(rvu, block, pcifunc, slot);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2868
rvu_nix_lf_teardown(rvu, pcifunc, block->addr, lf);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2870
rvu_npa_lf_teardown(rvu, pcifunc, lf);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2873
rvu_cpt_lf_teardown(rvu, pcifunc, block->addr, lf,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2876
err = rvu_lf_reset(rvu, block, lf);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2878
dev_err(rvu->dev, "Failed to reset blkaddr %d LF%d\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2884
static void __rvu_flr_handler(struct rvu *rvu, u16 pcifunc)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2886
if (rvu_npc_exact_has_match_table(rvu))
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2887
rvu_npc_exact_reset(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2889
mutex_lock(&rvu->flr_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2897
rvu_nix_flr_free_bpids(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2900
rvu_nix_mcast_flr_free_entries(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2902
rvu_blklf_teardown(rvu, pcifunc, BLKADDR_NIX0);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2903
rvu_blklf_teardown(rvu, pcifunc, BLKADDR_NIX1);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2904
rvu_blklf_teardown(rvu, pcifunc, BLKADDR_CPT0);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2905
rvu_blklf_teardown(rvu, pcifunc, BLKADDR_CPT1);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2906
rvu_blklf_teardown(rvu, pcifunc, BLKADDR_TIM);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2907
rvu_blklf_teardown(rvu, pcifunc, BLKADDR_SSOW);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2908
rvu_blklf_teardown(rvu, pcifunc, BLKADDR_SSO);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2909
rvu_blklf_teardown(rvu, pcifunc, BLKADDR_NPA);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2910
rvu_reset_lmt_map_tbl(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2911
rvu_detach_rsrcs(rvu, NULL, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2916
rvu_npc_free_mcam_entries(rvu, pcifunc, -1);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2917
rvu_mac_reset(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2919
if (rvu->mcs_blk_cnt)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2920
rvu_mcs_flr_handler(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2922
mutex_unlock(&rvu->flr_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2925
static void rvu_afvf_flr_handler(struct rvu *rvu, int vf)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2930
__rvu_flr_handler(rvu, vf + 1);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2938
rvupf_write64(rvu, RVU_PF_VFTRPENDX(reg), BIT_ULL(vf));
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2939
rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1SX(reg), BIT_ULL(vf));
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2945
struct rvu *rvu = flrwork->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
295
devnum = rvu_get_hwvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2950
pf = flrwork - rvu->flr_wrk;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2951
if (pf >= rvu->hw->total_pfs) {
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2952
rvu_afvf_flr_handler(rvu, pf - rvu->hw->total_pfs);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2956
cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(pf));
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2958
pcifunc = rvu_make_pcifunc(rvu->pdev, pf, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2961
__rvu_flr_handler(rvu, (pcifunc | (vf + 1)));
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2963
__rvu_flr_handler(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2966
rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFTRPEND, BIT_ULL(pf));
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2969
rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFFLR_INT_ENA_W1S, BIT_ULL(pf));
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2972
static void rvu_afvf_queue_flr_work(struct rvu *rvu, int start_vf, int numvfs)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
298
devnum = rvu_get_pf(rvu->pdev, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2980
intr = rvupf_read64(rvu, RVU_PF_VFFLR_INTX(reg));
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2988
rvupf_write64(rvu, RVU_PF_VFFLR_INTX(reg), BIT_ULL(vf));
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2989
rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1CX(reg), BIT_ULL(vf));
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2991
dev = vf + start_vf + rvu->hw->total_pfs;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2992
queue_work(rvu->flr_wq, &rvu->flr_wrk[dev].work);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
2998
struct rvu *rvu = (struct rvu *)rvu_irq;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
30
static void rvu_set_msix_offset(struct rvu *rvu, struct rvu_pfvf *pfvf,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3002
intr = rvu_read64(rvu, BLKADDR_RVUM, RVU_AF_PFFLR_INT);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3006
for (pf = 0; pf < rvu->hw->total_pfs; pf++) {
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3009
rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFFLR_INT,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3012
rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFFLR_INT_ENA_W1C,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3015
queue_work(rvu->flr_wq, &rvu->flr_wrk[pf].work);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3020
rvu_afvf_queue_flr_work(rvu, 0, 64);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3021
if (rvu->vfs > 64)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3022
rvu_afvf_queue_flr_work(rvu, 64, rvu->vfs - 64);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3027
static void rvu_me_handle_vfset(struct rvu *rvu, int idx, u64 intr)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3037
rvupf_write64(rvu, RVU_PF_VFTRPENDX(idx), BIT_ULL(vf));
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3039
rvupf_write64(rvu, RVU_PF_VFME_INTX(idx), BIT_ULL(vf));
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3047
struct rvu *rvu = (struct rvu *)rvu_irq;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3051
intr = rvu_read64(rvu, BLKADDR_RVUM, RVU_AF_PFME_INT);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3054
intr = rvupf_read64(rvu, RVU_PF_VFME_INTX(vfset));
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3056
rvu_me_handle_vfset(rvu, vfset, intr);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3065
struct rvu *rvu = (struct rvu *)rvu_irq;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3069
intr = rvu_read64(rvu, BLKADDR_RVUM, RVU_AF_PFME_INT);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
307
cfg = rvu_read64(rvu, BLKADDR_RVUM, reg | (devnum << 16));
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3074
for (pf = 0; pf < rvu->hw->total_pfs; pf++) {
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3077
rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFTRPEND,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3080
rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFME_INT,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3088
static void rvu_unregister_interrupts(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3092
rvu_cpt_unregister_interrupts(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3094
if (!is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3096
rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFAF_MBOX_INT_ENA_W1C,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3097
INTR_MASK(rvu->hw->total_pfs) & ~1ULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3099
cn20k_rvu_unregister_interrupts(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3102
rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFFLR_INT_ENA_W1C,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3103
INTR_MASK(rvu->hw->total_pfs) & ~1ULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3106
rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFME_INT_ENA_W1C,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3107
INTR_MASK(rvu->hw->total_pfs) & ~1ULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3109
for (irq = 0; irq < rvu->num_vec; irq++) {
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3110
if (rvu->irq_allocated[irq]) {
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3111
free_irq(pci_irq_vector(rvu->pdev, irq), rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3112
rvu->irq_allocated[irq] = false;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3116
pci_free_irq_vectors(rvu->pdev);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3117
rvu->num_vec = 0;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3120
static int rvu_afvf_msix_vectors_num_ok(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3122
struct rvu_pfvf *pfvf = &rvu->pf[0];
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3125
pfvf = &rvu->pf[0];
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3126
offset = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_INT_CFG(0)) & 0x3ff;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3132
if (is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3140
static int rvu_register_interrupts(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3144
rvu->num_vec = pci_msix_vec_count(rvu->pdev);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3146
rvu->irq_name = devm_kcalloc(rvu->dev, rvu->num_vec,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3148
if (!rvu->irq_name)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
315
cfg = rvu_read64(rvu, BLKADDR_RVUM, reg | (devnum << 16));
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3151
rvu->irq_allocated = devm_kcalloc(rvu->dev, rvu->num_vec,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3153
if (!rvu->irq_allocated)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3157
ret = pci_alloc_irq_vectors(rvu->pdev, rvu->num_vec,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3158
rvu->num_vec, PCI_IRQ_MSIX);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3160
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3162
rvu->num_vec, ret);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3166
if (!is_cn20k(rvu->pdev)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3168
sprintf(&rvu->irq_name[RVU_AF_INT_VEC_MBOX * NAME_SIZE],
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3171
(rvu->pdev, RVU_AF_INT_VEC_MBOX),
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3172
rvu->ng_rvu->rvu_mbox_ops->pf_intr_handler, 0,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3173
&rvu->irq_name[RVU_AF_INT_VEC_MBOX *
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3174
NAME_SIZE], rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3176
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3181
rvu->irq_allocated[RVU_AF_INT_VEC_MBOX] = true;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3183
ret = cn20k_register_afpf_mbox_intr(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3185
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3192
rvu_enable_mbox_intr(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3195
sprintf(&rvu->irq_name[RVU_AF_INT_VEC_PFFLR * NAME_SIZE],
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3197
ret = request_irq(pci_irq_vector(rvu->pdev, RVU_AF_INT_VEC_PFFLR),
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3199
&rvu->irq_name[RVU_AF_INT_VEC_PFFLR * NAME_SIZE],
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
32
static void rvu_clear_msix_offset(struct rvu *rvu, struct rvu_pfvf *pfvf,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3200
rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3202
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3206
rvu->irq_allocated[RVU_AF_INT_VEC_PFFLR] = true;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3209
rvu_write64(rvu, BLKADDR_RVUM,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3210
RVU_AF_PFFLR_INT, INTR_MASK(rvu->hw->total_pfs));
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3212
rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFFLR_INT_ENA_W1S,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3213
INTR_MASK(rvu->hw->total_pfs) & ~1ULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3216
sprintf(&rvu->irq_name[RVU_AF_INT_VEC_PFME * NAME_SIZE],
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3218
ret = request_irq(pci_irq_vector(rvu->pdev, RVU_AF_INT_VEC_PFME),
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3220
&rvu->irq_name[RVU_AF_INT_VEC_PFME * NAME_SIZE],
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3221
rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3223
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3226
rvu->irq_allocated[RVU_AF_INT_VEC_PFME] = true;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3229
rvu_write64(rvu, BLKADDR_RVUM,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
323
cfg = rvu_read64(rvu, BLKADDR_RVUM, reg | (devnum << 16));
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3230
RVU_AF_PFTRPEND, INTR_MASK(rvu->hw->total_pfs));
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3232
rvu_write64(rvu, BLKADDR_RVUM,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3233
RVU_AF_PFME_INT, INTR_MASK(rvu->hw->total_pfs));
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3235
rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFME_INT_ENA_W1S,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3236
INTR_MASK(rvu->hw->total_pfs) & ~1ULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3238
if (!rvu_afvf_msix_vectors_num_ok(rvu))
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3242
pf_vec_start = rvu_read64(rvu, BLKADDR_RVUM,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3244
if (!is_cn20k(rvu->pdev)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3247
sprintf(&rvu->irq_name[offset * NAME_SIZE], "RVUAFVF Mbox0");
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3248
ret = request_irq(pci_irq_vector(rvu->pdev, offset),
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3249
rvu->ng_rvu->rvu_mbox_ops->afvf_intr_handler, 0,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3250
&rvu->irq_name[offset * NAME_SIZE],
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3251
rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3253
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3256
rvu->irq_allocated[offset] = true;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3262
sprintf(&rvu->irq_name[offset * NAME_SIZE], "RVUAFVF Mbox1");
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3263
ret = request_irq(pci_irq_vector(rvu->pdev, offset),
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3264
rvu->ng_rvu->rvu_mbox_ops->afvf_intr_handler, 0,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3265
&rvu->irq_name[offset * NAME_SIZE],
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3266
rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3268
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3271
rvu->irq_allocated[offset] = true;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3273
ret = cn20k_register_afvf_mbox_intr(rvu, pf_vec_start);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3275
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3281
sprintf(&rvu->irq_name[offset * NAME_SIZE], "RVUAFVF FLR0");
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3282
ret = request_irq(pci_irq_vector(rvu->pdev, offset),
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3284
&rvu->irq_name[offset * NAME_SIZE], rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3286
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3290
rvu->irq_allocated[offset] = true;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3293
sprintf(&rvu->irq_name[offset * NAME_SIZE], "RVUAFVF FLR1");
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3294
ret = request_irq(pci_irq_vector(rvu->pdev, offset),
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3296
&rvu->irq_name[offset * NAME_SIZE], rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3298
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3302
rvu->irq_allocated[offset] = true;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3306
sprintf(&rvu->irq_name[offset * NAME_SIZE], "RVUAFVF ME0");
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3307
ret = request_irq(pci_irq_vector(rvu->pdev, offset),
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3309
&rvu->irq_name[offset * NAME_SIZE], rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
331
cfg = rvu_read64(rvu, BLKADDR_RVUM, reg | (devnum << 16));
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3311
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3315
rvu->irq_allocated[offset] = true;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3318
sprintf(&rvu->irq_name[offset * NAME_SIZE], "RVUAFVF ME1");
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3319
ret = request_irq(pci_irq_vector(rvu->pdev, offset),
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3321
&rvu->irq_name[offset * NAME_SIZE], rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3323
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3327
rvu->irq_allocated[offset] = true;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3329
ret = rvu_cpt_register_interrupts(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3333
for (i = 0; i < rvu->num_vec; i++) {
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3334
if (strstr(&rvu->irq_name[i * NAME_SIZE], "Mbox") ||
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3335
strstr(&rvu->irq_name[i * NAME_SIZE], "FLR"))
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3336
irq_set_affinity(pci_irq_vector(rvu->pdev, i),
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3343
rvu_unregister_interrupts(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3347
static void rvu_flr_wq_destroy(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3349
if (rvu->flr_wq) {
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3350
destroy_workqueue(rvu->flr_wq);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3351
rvu->flr_wq = NULL;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3355
static int rvu_flr_init(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3362
for (pf = 0; pf < rvu->hw->total_pfs; pf++) {
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3363
cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(pf));
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3364
rvu_write64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(pf),
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3368
rvu->flr_wq = alloc_workqueue("rvu_afpf_flr",
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
337
if (is_block_implemented(rvu->hw, blkaddr))
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3370
if (!rvu->flr_wq)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3373
num_devs = rvu->hw->total_pfs + pci_sriov_get_totalvfs(rvu->pdev);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3374
rvu->flr_wrk = devm_kcalloc(rvu->dev, num_devs,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3376
if (!rvu->flr_wrk) {
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3377
destroy_workqueue(rvu->flr_wq);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3382
rvu->flr_wrk[dev].rvu = rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3383
INIT_WORK(&rvu->flr_wrk[dev].work, rvu_flr_handler);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3386
mutex_init(&rvu->flr_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3391
static void rvu_disable_afvf_intr(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3393
int vfs = rvu->vfs;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3395
if (is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3396
return cn20k_rvu_disable_afvf_intr(rvu, vfs);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3398
rvupf_write64(rvu, RVU_PF_VFPF_MBOX_INT_ENA_W1CX(0), INTR_MASK(vfs));
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3399
rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1CX(0), INTR_MASK(vfs));
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
34
static void __rvu_flr_handler(struct rvu *rvu, u16 pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3400
rvupf_write64(rvu, RVU_PF_VFME_INT_ENA_W1CX(0), INTR_MASK(vfs));
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3404
rvupf_write64(rvu, RVU_PF_VFPF_MBOX_INT_ENA_W1CX(1),
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3406
rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1CX(1), INTR_MASK(vfs - 64));
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3407
rvupf_write64(rvu, RVU_PF_VFME_INT_ENA_W1CX(1), INTR_MASK(vfs - 64));
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3410
static void rvu_enable_afvf_intr(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3412
int vfs = rvu->vfs;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3414
if (is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3415
return cn20k_rvu_enable_afvf_intr(rvu, vfs);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
342
static void rvu_update_rsrc_map(struct rvu *rvu, struct rvu_pfvf *pfvf,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3421
rvupf_write64(rvu, RVU_PF_VFPF_MBOX_INTX(0), INTR_MASK(vfs));
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3422
rvupf_write64(rvu, RVU_PF_VFPF_MBOX_INT_ENA_W1SX(0), INTR_MASK(vfs));
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3425
rvupf_write64(rvu, RVU_PF_VFFLR_INTX(0), INTR_MASK(vfs));
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3426
rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1SX(0), INTR_MASK(vfs));
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3427
rvupf_write64(rvu, RVU_PF_VFME_INT_ENA_W1SX(0), INTR_MASK(vfs));
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3433
rvupf_write64(rvu, RVU_PF_VFPF_MBOX_INTX(1), INTR_MASK(vfs - 64));
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3434
rvupf_write64(rvu, RVU_PF_VFPF_MBOX_INT_ENA_W1SX(1),
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3437
rvupf_write64(rvu, RVU_PF_VFFLR_INTX(1), INTR_MASK(vfs - 64));
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3438
rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1SX(1), INTR_MASK(vfs - 64));
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3439
rvupf_write64(rvu, RVU_PF_VFME_INT_ENA_W1SX(1), INTR_MASK(vfs - 64));
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3466
static int rvu_enable_sriov(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3468
struct pci_dev *pdev = rvu->pdev;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3472
if (!rvu_afvf_msix_vectors_num_ok(rvu)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3482
pci_read_config_word(pdev, pos + PCI_SRIOV_VF_DID, &rvu->vf_devid);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3507
rvu->vfs = vfs;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3509
err = rvu_mbox_init(rvu, &rvu->afvf_wq_info, TYPE_AFVF, vfs,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
351
dev_err(&rvu->pdev->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3514
rvu_enable_afvf_intr(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3520
rvu_disable_afvf_intr(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3521
rvu_mbox_destroy(&rvu->afvf_wq_info);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3528
static void rvu_disable_sriov(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3530
rvu_disable_afvf_intr(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3531
rvu_mbox_destroy(&rvu->afvf_wq_info);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3532
pci_disable_sriov(rvu->pdev);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3535
static void rvu_update_module_params(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3539
strscpy(rvu->mkex_pfl_name,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3541
strscpy(rvu->kpu_pfl_name,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3550
struct rvu *rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3558
rvu = devm_kzalloc(dev, sizeof(*rvu), GFP_KERNEL);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3559
if (!rvu) {
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3564
rvu->hw = devm_kzalloc(dev, sizeof(struct rvu_hwinfo), GFP_KERNEL);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3565
if (!rvu->hw) {
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3566
devm_kfree(dev, rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3571
pci_set_drvdata(pdev, rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3572
rvu->pdev = pdev;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3573
rvu->dev = &pdev->dev;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3595
rvu->ptp = ptp_get();
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3596
if (IS_ERR(rvu->ptp)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3597
err = PTR_ERR(rvu->ptp);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
36
static int rvu_mbox_init(struct rvu *rvu, struct mbox_wq_info *mw,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
360
devnum = rvu_get_hwvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3600
rvu->ptp = NULL;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3604
rvu->afreg_base = pcim_iomap(pdev, PCI_AF_REG_BAR_NUM, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3605
rvu->pfreg_base = pcim_iomap(pdev, PCI_PF_REG_BAR_NUM, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3606
if (!rvu->afreg_base || !rvu->pfreg_base) {
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3613
rvu_update_module_params(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3616
rvu_check_block_implemented(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3618
rvu_reset_all_blocks(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3620
rvu_setup_hw_capabilities(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3622
err = rvu_setup_hw_resources(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3627
err = rvu_mbox_init(rvu, &rvu->afpf_wq_info, TYPE_AFPF,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3628
rvu->hw->total_pfs, rvu_afpf_mbox_handler,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
363
devnum = rvu_get_pf(rvu->pdev, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3635
err = rvu_flr_init(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3641
err = rvu_register_interrupts(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3647
err = rvu_register_dl(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3653
rvu_setup_rvum_blk_revid(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3656
err = rvu_enable_sriov(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3663
rvu_dbg_init(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3665
mutex_init(&rvu->rswitch.switch_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3667
if (rvu->fwdata)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3668
ptp_start(rvu, rvu->fwdata->sclk, rvu->fwdata->ptp_ext_clk_rate,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3669
rvu->fwdata->ptp_ext_tstamp);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3672
rvu_alloc_cint_qint_mem(rvu, &rvu->pf[RVU_AFPF], BLKADDR_NIX0,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3673
(rvu->hw->block[BLKADDR_NIX0].lf.max));
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3676
rvu_unregister_dl(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3678
rvu_unregister_interrupts(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3680
rvu_flr_wq_destroy(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3682
rvu_mbox_destroy(&rvu->afpf_wq_info);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3684
rvu_cgx_exit(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3685
rvu_fwdata_exit(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3686
rvu_mcs_exit(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3687
rvu_reset_all_blocks(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3688
rvu_free_hw_resources(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3689
rvu_clear_rvum_blk_revid(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3691
ptp_put(rvu->ptp);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3698
devm_kfree(&pdev->dev, rvu->hw);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3699
devm_kfree(dev, rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3706
struct rvu *rvu = pci_get_drvdata(pdev);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3708
rvu_dbg_exit(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3709
rvu_unregister_dl(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3710
rvu_unregister_interrupts(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3711
rvu_flr_wq_destroy(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3712
rvu_cgx_exit(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3713
rvu_fwdata_exit(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3714
rvu_mcs_exit(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3715
rvu_mbox_destroy(&rvu->afpf_wq_info);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3716
rvu_disable_sriov(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3717
rvu_reset_all_blocks(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3718
rvu_free_hw_resources(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3719
rvu_clear_rvum_blk_revid(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3720
ptp_put(rvu->ptp);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3725
devm_kfree(&pdev->dev, rvu->hw);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3726
if (is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3727
cn20k_free_mbox_memory(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3728
kfree(rvu->ng_rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3729
devm_kfree(&pdev->dev, rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3735
struct rvu *rvu = pci_get_drvdata(pdev);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3737
if (!rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
3740
rvu_clear_rvum_blk_revid(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
401
rvu_write64(rvu, BLKADDR_RVUM, reg | (devnum << 16), num_lfs);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
404
void rvu_get_pf_numvfs(struct rvu *rvu, int pf, int *numvfs, int *hwvf)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
409
cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(pf));
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
416
int rvu_get_hwvf(struct rvu *rvu, int pcifunc)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
421
pf = rvu_get_pf(rvu->pdev, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
425
cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(pf));
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
430
struct rvu_pfvf *rvu_get_pfvf(struct rvu *rvu, int pcifunc)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
434
return &rvu->hwvf[rvu_get_hwvf(rvu, pcifunc)];
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
436
return &rvu->pf[rvu_get_pf(rvu->pdev, pcifunc)];
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
439
bool is_pf_func_valid(struct rvu *rvu, u16 pcifunc)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
444
pf = rvu_get_pf(rvu->pdev, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
445
if (pf >= rvu->hw->total_pfs)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
453
cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(pf));
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
472
static void rvu_check_block_implemented(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
474
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
482
cfg = rvupf_read64(rvu, RVU_PF_BLOCK_ADDRX_DISC(blkid));
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
488
static void rvu_setup_rvum_blk_revid(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
490
rvu_write64(rvu, BLKADDR_RVUM,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
495
static void rvu_clear_rvum_blk_revid(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
497
rvu_write64(rvu, BLKADDR_RVUM,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
501
int rvu_lf_reset(struct rvu *rvu, struct rvu_block *block, int lf)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
508
rvu_write64(rvu, block->addr, block->lfreset_reg, lf | BIT_ULL(12));
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
509
err = rvu_poll_reg(rvu, block->addr, block->lfreset_reg, BIT_ULL(12),
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
514
static void rvu_block_reset(struct rvu *rvu, int blkaddr, u64 rst_reg)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
516
struct rvu_block *block = &rvu->hw->block[blkaddr];
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
522
rvu_write64(rvu, blkaddr, rst_reg, BIT_ULL(0));
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
523
err = rvu_poll_reg(rvu, blkaddr, rst_reg, BIT_ULL(63), true);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
525
dev_err(rvu->dev, "HW block:%d reset timeout retrying again\n", blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
526
while (rvu_poll_reg(rvu, blkaddr, rst_reg, BIT_ULL(63), true) == -EBUSY)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
531
static void rvu_reset_all_blocks(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
534
rvu_block_reset(rvu, BLKADDR_NPA, NPA_AF_BLK_RST);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
535
rvu_block_reset(rvu, BLKADDR_NIX0, NIX_AF_BLK_RST);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
536
rvu_block_reset(rvu, BLKADDR_NIX1, NIX_AF_BLK_RST);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
537
rvu_block_reset(rvu, BLKADDR_NPC, NPC_AF_BLK_RST);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
538
rvu_block_reset(rvu, BLKADDR_SSO, SSO_AF_BLK_RST);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
539
rvu_block_reset(rvu, BLKADDR_TIM, TIM_AF_BLK_RST);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
540
rvu_block_reset(rvu, BLKADDR_CPT0, CPT_AF_BLK_RST);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
541
rvu_block_reset(rvu, BLKADDR_CPT1, CPT_AF_BLK_RST);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
542
rvu_block_reset(rvu, BLKADDR_NDC_NIX0_RX, NDC_AF_BLK_RST);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
543
rvu_block_reset(rvu, BLKADDR_NDC_NIX0_TX, NDC_AF_BLK_RST);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
544
rvu_block_reset(rvu, BLKADDR_NDC_NIX1_RX, NDC_AF_BLK_RST);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
545
rvu_block_reset(rvu, BLKADDR_NDC_NIX1_TX, NDC_AF_BLK_RST);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
546
rvu_block_reset(rvu, BLKADDR_NDC_NPA0, NDC_AF_BLK_RST);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
549
static void rvu_scan_block(struct rvu *rvu, struct rvu_block *block)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
556
cfg = rvu_read64(rvu, block->addr,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
565
pfvf = rvu_get_pfvf(rvu, (cfg >> 8) & 0xFFFF);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
566
rvu_update_rsrc_map(rvu, pfvf, block,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
570
rvu_set_msix_offset(rvu, pfvf, block, lf);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
574
static void rvu_check_min_msix_vec(struct rvu *rvu, int nvecs, int pf, int vf)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
582
dev_warn(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
596
dev_warn(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
601
static int rvu_setup_msix_resources(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
604
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
612
cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(pf));
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
617
rvu_get_pf_numvfs(rvu, pf, &numvfs, &hwvf);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
619
pfvf = &rvu->pf[pf];
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
62
static void rvu_setup_hw_capabilities(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
621
cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_MSIX_CFG(pf));
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
623
rvu_check_min_msix_vec(rvu, pfvf->msix.max, pf, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
631
pfvf->msix_lfmap = devm_kcalloc(rvu->dev, pfvf->msix.max,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
64
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
646
cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_INT_CFG(pf));
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
650
rvu_write64(rvu, BLKADDR_RVUM,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
655
pfvf = &rvu->hwvf[hwvf + vf];
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
657
cfg = rvu_read64(rvu, BLKADDR_RVUM,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
660
rvu_check_min_msix_vec(rvu, pfvf->msix.max, pf, vf + 1);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
668
devm_kcalloc(rvu->dev, pfvf->msix.max,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
677
cfg = rvu_read64(rvu, BLKADDR_RVUM,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
682
rvu_write64(rvu, BLKADDR_RVUM,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
692
cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_CONST);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
694
if (rvu->fwdata && rvu->fwdata->msixtr_base)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
695
phy_addr = rvu->fwdata->msixtr_base;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
697
phy_addr = rvu_read64(rvu, BLKADDR_RVUM, RVU_AF_MSIXTR_BASE);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
699
iova = dma_map_resource(rvu->dev, phy_addr,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
703
if (dma_mapping_error(rvu->dev, iova))
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
706
rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_MSIXTR_BASE, (u64)iova);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
707
rvu->msix_base_iova = iova;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
708
rvu->msixtr_base_phy = phy_addr;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
710
if (is_rvu_otx2(rvu) || is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
713
if (!rvu->fwdata)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
716
altaf_intr_data = &rvu->fwdata->altaf_intr_info;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
718
iova = dma_map_resource(rvu->dev, altaf_intr_data->gint_paddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
722
if (dma_mapping_error(rvu->dev, iova))
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
731
dma_unmap_resource(rvu->dev, phy_addr, max_msix * PCI_MSIX_ENTRY_SIZE,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
736
static void rvu_reset_msix(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
739
rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_MSIXTR_BASE,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
74
hw->rvu = rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
740
rvu->msixtr_base_phy);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
743
static void rvu_free_hw_resources(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
745
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
751
rvu_npa_freemem(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
752
rvu_npc_freemem(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
753
rvu_nix_freemem(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
76
if (is_rvu_pre_96xx_C0(rvu)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
763
pfvf = &rvu->pf[id];
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
768
pfvf = &rvu->hwvf[id];
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
773
if (!rvu->msix_base_iova)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
775
cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_CONST);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
777
dma_unmap_resource(rvu->dev, rvu->msix_base_iova,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
781
rvu_reset_msix(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
782
mutex_destroy(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
785
pfvf = &rvu->pf[RVU_AFPF];
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
786
qmem_free(rvu->dev, pfvf->nix_qints_ctx);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
787
qmem_free(rvu->dev, pfvf->cq_ints_ctx);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
790
static void rvu_setup_pfvf_macaddress(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
792
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
802
if (!is_pf_cgxmapped(rvu, pf))
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
805
pfvf = &rvu->pf[pf];
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
806
if (rvu->fwdata && pf < PF_MACNUM_MAX) {
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
807
mac = &rvu->fwdata->pf_macs[pf];
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
819
rvu_get_pf_numvfs(rvu, pf, &numvfs, &hwvf);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
821
pfvf = &rvu->hwvf[hwvf];
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
822
if (rvu->fwdata && hwvf < VF_MACNUM_MAX) {
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
823
mac = &rvu->fwdata->vf_macs[hwvf];
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
83
if (is_rvu_96xx_A0(rvu) || is_rvu_95xx_A0(rvu))
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
836
static int rvu_fwdata_init(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
847
rvu->fwdata = ioremap_wc(fwdbase, sizeof(struct rvu_fwdata));
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
848
if (!rvu->fwdata)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
850
if (!is_rvu_fwdata_valid(rvu)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
851
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
853
iounmap(rvu->fwdata);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
854
rvu->fwdata = NULL;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
859
dev_info(rvu->dev, "Unable to fetch 'fwdata' from firmware\n");
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
86
if (!is_rvu_pre_96xx_C0(rvu))
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
863
static void rvu_fwdata_exit(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
865
if (rvu->fwdata)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
866
iounmap(rvu->fwdata);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
869
static int rvu_setup_nix_hw_resource(struct rvu *rvu, int blkaddr)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
871
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
881
cfg = rvu_read64(rvu, blkaddr, NIX_AF_CONST2);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
89
if (!is_rvu_otx2(rvu))
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
892
block->rvu = rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
894
rvu->nix_blkaddr[blkid] = blkaddr;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
898
static int rvu_setup_cpt_hw_resource(struct rvu *rvu, int blkaddr)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
900
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
910
cfg = rvu_read64(rvu, blkaddr, CPT_AF_CONSTANTS0);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
92
if (is_rvu_npc_hash_extract_en(rvu))
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
922
block->rvu = rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
927
static void rvu_get_lbk_bufsize(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
945
rvu->hw->lbk_bufsize = FIELD_GET(LBK_CONST_BUF_SIZE, lbk_const);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
952
static int rvu_setup_hw_resources(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
954
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
960
cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_CONST);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
965
if (!is_rvu_otx2(rvu))
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
966
rvu_apr_block_cn10k_init(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
972
cfg = rvu_read64(rvu, BLKADDR_NPA, NPA_AF_CONST);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
983
block->rvu = rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
987
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
99
int rvu_poll_reg(struct rvu *rvu, u64 block, u64 offset, u64 mask, bool zero)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
993
err = rvu_setup_nix_hw_resource(rvu, BLKADDR_NIX0);
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
995
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1000
void *rvu_cgx_pdata(u8 cgx_id, struct rvu *rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1001
int rvu_cgx_config_rxtx(struct rvu *rvu, u16 pcifunc, bool start);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1002
void rvu_cgx_enadis_rx_bp(struct rvu *rvu, int pf, bool enable);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1003
int rvu_cgx_start_stop_io(struct rvu *rvu, u16 pcifunc, bool start);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1004
int rvu_cgx_nix_cuml_stats(struct rvu *rvu, void *cgxd, int lmac_id, int index,
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1006
void rvu_cgx_disable_dmac_entries(struct rvu *rvu, u16 pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1009
int rvu_npa_init(struct rvu *rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1010
void rvu_npa_freemem(struct rvu *rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1011
void rvu_npa_lf_teardown(struct rvu *rvu, u16 pcifunc, int npalf);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1012
int rvu_npa_aq_enq_inst(struct rvu *rvu, struct npa_aq_enq_req *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1016
bool is_nixlf_attached(struct rvu *rvu, u16 pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1017
int rvu_nix_init(struct rvu *rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1018
int rvu_nix_reserve_mark_format(struct rvu *rvu, struct nix_hw *nix_hw,
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1020
void rvu_nix_freemem(struct rvu *rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1021
int rvu_get_nixlf_count(struct rvu *rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1022
void rvu_nix_lf_teardown(struct rvu *rvu, u16 pcifunc, int blkaddr, int npalf);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1023
int nix_get_nixlf(struct rvu *rvu, u16 pcifunc, int *nixlf, int *nix_blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1024
int nix_update_mce_list(struct rvu *rvu, u16 pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1027
void nix_get_mce_list(struct rvu *rvu, u16 pcifunc, int type,
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1030
int rvu_get_next_nix_blkaddr(struct rvu *rvu, int blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1032
int nix_get_struct_ptrs(struct rvu *rvu, u16 pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1034
int rvu_nix_setup_ratelimit_aggr(struct rvu *rvu, u16 pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1036
int nix_aq_context_read(struct rvu *rvu, struct nix_hw *nix_hw,
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1040
int rvu_get_nix_blkaddr(struct rvu *rvu, u16 pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1044
void rvu_nix_tx_tl2_cfg(struct rvu *rvu, int blkaddr, u16 pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1046
void rvu_nix_mcast_flr_free_entries(struct rvu *rvu, u16 pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1047
int rvu_nix_mcast_get_mce_index(struct rvu *rvu, u16 pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1049
int rvu_nix_mcast_update_mcam_entry(struct rvu *rvu, u16 pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1051
void rvu_nix_flr_free_bpids(struct rvu *rvu, u16 pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1052
int rvu_alloc_cint_qint_mem(struct rvu *rvu, struct rvu_pfvf *pfvf,
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1054
void rvu_block_bcast_xon(struct rvu *rvu, int blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1055
int rvu_nix_aq_enq_inst(struct rvu *rvu, struct nix_aq_enq_req *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1059
void rvu_npc_freemem(struct rvu *rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1060
int rvu_npc_get_pkind(struct rvu *rvu, u16 pf);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1061
void rvu_npc_set_pkind(struct rvu *rvu, int pkind, struct rvu_pfvf *pfvf);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1062
int npc_config_ts_kpuaction(struct rvu *rvu, int pf, u16 pcifunc, bool en);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1063
void rvu_npc_install_ucast_entry(struct rvu *rvu, u16 pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1065
void rvu_npc_install_promisc_entry(struct rvu *rvu, u16 pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1067
void rvu_npc_enable_promisc_entry(struct rvu *rvu, u16 pcifunc, int nixlf,
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1069
void rvu_npc_install_bcast_match_entry(struct rvu *rvu, u16 pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1071
void rvu_npc_install_allmulti_entry(struct rvu *rvu, u16 pcifunc, int nixlf,
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1073
void rvu_npc_enable_allmulti_entry(struct rvu *rvu, u16 pcifunc, int nixlf,
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1076
void npc_enadis_default_mce_entry(struct rvu *rvu, u16 pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1078
void rvu_npc_disable_mcam_entries(struct rvu *rvu, u16 pcifunc, int nixlf);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1079
bool rvu_npc_enable_mcam_by_entry_index(struct rvu *rvu, int entry, int intf, bool enable);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1080
void rvu_npc_free_mcam_entries(struct rvu *rvu, u16 pcifunc, int nixlf);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1081
void rvu_npc_disable_default_entries(struct rvu *rvu, u16 pcifunc, int nixlf);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1082
void rvu_npc_enable_default_entries(struct rvu *rvu, u16 pcifunc, int nixlf);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1083
void rvu_npc_update_flowkey_alg_idx(struct rvu *rvu, u16 pcifunc, int nixlf,
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1085
void __rvu_mcam_remove_counter_from_rule(struct rvu *rvu, u16 pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1087
void __rvu_mcam_add_counter_to_rule(struct rvu *rvu, u16 pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1090
void rvu_npc_get_mcam_entry_alloc_info(struct rvu *rvu, u16 pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1093
void rvu_npc_get_mcam_counter_alloc_info(struct rvu *rvu, u16 pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1096
void rvu_npc_clear_ucast_entry(struct rvu *rvu, int pcifunc, int nixlf);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1100
bool is_npc_interface_valid(struct rvu *rvu, u8 intf);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1101
int rvu_npc_get_tx_nibble_cfg(struct rvu *rvu, u64 nibble_ena);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1102
int npc_flow_steering_init(struct rvu *rvu, int blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1105
void npc_mcam_enable_flows(struct rvu *rvu, u16 target);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1106
void npc_mcam_disable_flows(struct rvu *rvu, u16 target);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1107
void npc_enable_mcam_entry(struct rvu *rvu, struct npc_mcam *mcam,
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1109
u64 npc_get_mcam_action(struct rvu *rvu, struct npc_mcam *mcam,
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1111
void npc_set_mcam_action(struct rvu *rvu, struct npc_mcam *mcam,
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1113
void npc_read_mcam_entry(struct rvu *rvu, struct npc_mcam *mcam,
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1116
int npc_config_cntr_default_entries(struct rvu *rvu, bool enable);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1117
bool is_cgx_config_permitted(struct rvu *rvu, u16 pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1118
bool rvu_cgx_check_permission_and_set_pkind(struct rvu *rvu, u16 pcifunc, int pkind);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1119
bool rvu_cgx_is_pkind_config_permitted(struct rvu *rvu, u16 pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1120
bool is_mac_feature_supported(struct rvu *rvu, int pf, int feature);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1121
u32 rvu_cgx_get_fifolen(struct rvu *rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1122
void *rvu_first_cgx_pdata(struct rvu *rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1123
int cgxlmac_to_pf(struct rvu *rvu, int cgx_id, int lmac_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1125
int rvu_cgx_tx_enable(struct rvu *rvu, u16 pcifunc, bool enable);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1126
int rvu_cgx_prio_flow_ctrl_cfg(struct rvu *rvu, u16 pcifunc, u8 tx_pause, u8 rx_pause,
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1128
int rvu_cgx_cfg_pause_frm(struct rvu *rvu, u16 pcifunc, u8 tx_pause, u8 rx_pause);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1129
void rvu_mac_reset(struct rvu *rvu, u16 pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1130
u32 rvu_cgx_get_lmac_fifolen(struct rvu *rvu, int cgx, int lmac);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1131
void cgx_start_linkup(struct rvu *rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1134
bool is_mcam_entry_enabled(struct rvu *rvu, struct npc_mcam *mcam, int blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1136
int rvu_npc_init(struct rvu *rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1137
int npc_install_mcam_drop_rule(struct rvu *rvu, int mcam_idx, u16 *counter_idx,
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1140
void npc_mcam_rsrcs_reserve(struct rvu *rvu, int blkaddr, int entry_idx);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1141
bool npc_is_feature_supported(struct rvu *rvu, u64 features, u8 intf);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1142
int npc_mcam_rsrcs_init(struct rvu *rvu, int blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1143
void npc_mcam_rsrcs_deinit(struct rvu *rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1146
int rvu_cpt_register_interrupts(struct rvu *rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1147
void rvu_cpt_unregister_interrupts(struct rvu *rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1148
int rvu_cpt_lf_teardown(struct rvu *rvu, u16 pcifunc, int blkaddr, int lf,
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1150
int rvu_cpt_ctx_flush(struct rvu *rvu, u16 pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1151
int rvu_cpt_init(struct rvu *rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1152
u32 rvu_get_cpt_chan_mask(struct rvu *rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1158
int rvu_set_channels_base(struct rvu *rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1159
void rvu_program_channels(struct rvu *rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1162
void rvu_nix_block_cn10k_init(struct rvu *rvu, struct nix_hw *nix_hw);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1165
void rvu_reset_lmt_map_tbl(struct rvu *rvu, u16 pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1166
void rvu_apr_block_cn10k_init(struct rvu *rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1169
void rvu_dbg_init(struct rvu *rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1170
void rvu_dbg_exit(struct rvu *rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1172
static inline void rvu_dbg_init(struct rvu *rvu) {}
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1173
static inline void rvu_dbg_exit(struct rvu *rvu) {}
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1176
int rvu_ndc_fix_locked_cacheline(struct rvu *rvu, int blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1179
void rvu_switch_enable(struct rvu *rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
118
struct rvu *rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1180
void rvu_switch_disable(struct rvu *rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1181
void rvu_switch_update_rules(struct rvu *rvu, u16 pcifunc, bool ena);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1182
void rvu_switch_enable_lbk_link(struct rvu *rvu, u16 pcifunc, bool ena);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1184
int rvu_npc_set_parse_mode(struct rvu *rvu, u16 pcifunc, u64 mode, u8 dir,
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1187
int rvu_get_hwvf(struct rvu *rvu, int pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1190
int rvu_mcs_init(struct rvu *rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1191
int rvu_mcs_flr_handler(struct rvu *rvu, u16 pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1192
void rvu_mcs_ptp_cfg(struct rvu *rvu, u8 rpm_id, u8 lmac_id, bool ena);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1193
void rvu_mcs_exit(struct rvu *rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1196
int rvu_rep_pf_init(struct rvu *rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1197
int rvu_rep_install_mcam_rules(struct rvu *rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1198
void rvu_rep_update_rules(struct rvu *rvu, u16 pcifunc, bool ena);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
1199
int rvu_rep_notify_pfvf_state(struct rvu *rvu, u16 pcifunc, bool enable);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
144
struct rvu *rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
398
struct rvu *rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
464
struct rvu *rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
486
struct rvu *rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
682
static inline void rvu_write64(struct rvu *rvu, u64 block, u64 offset, u64 val)
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
684
writeq(val, rvu->afreg_base + ((block << 28) | offset));
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
687
static inline u64 rvu_read64(struct rvu *rvu, u64 block, u64 offset)
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
689
return readq(rvu->afreg_base + ((block << 28) | offset));
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
692
static inline void rvupf_write64(struct rvu *rvu, u64 offset, u64 val)
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
694
writeq(val, rvu->pfreg_base + offset);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
697
static inline u64 rvupf_read64(struct rvu *rvu, u64 offset)
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
699
return readq(rvu->pfreg_base + offset);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
702
static inline void rvu_bar2_sel_write64(struct rvu *rvu, u64 block, u64 offset, u64 val)
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
707
rvu_write64(rvu, block, offset, val);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
708
rvu_read64(rvu, block, offset);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
714
static inline bool is_rvu_pre_96xx_C0(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
716
struct pci_dev *pdev = rvu->pdev;
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
723
static inline bool is_rvu_96xx_A0(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
725
struct pci_dev *pdev = rvu->pdev;
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
730
static inline bool is_rvu_96xx_B0(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
732
struct pci_dev *pdev = rvu->pdev;
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
737
static inline bool is_rvu_95xx_A0(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
739
struct pci_dev *pdev = rvu->pdev;
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
755
static inline bool is_rvu_otx2(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
757
struct pci_dev *pdev = rvu->pdev;
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
766
static inline bool is_cnf10ka_a0(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
768
struct pci_dev *pdev = rvu->pdev;
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
776
static inline bool is_cn10ka_a0(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
778
struct pci_dev *pdev = rvu->pdev;
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
786
static inline bool is_cn10ka_a1(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
788
struct pci_dev *pdev = rvu->pdev;
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
796
static inline bool is_cn10kb(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
798
struct pci_dev *pdev = rvu->pdev;
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
819
static inline bool is_rvu_npc_hash_extract_en(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
823
npc_const3 = rvu_read64(rvu, BLKADDR_NPC, NPC_AF_CONST3);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
830
static inline u16 rvu_nix_chan_cgx(struct rvu *rvu, u8 cgxid,
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
833
u64 nix_const = rvu_read64(rvu, BLKADDR_NIX0, NIX_AF_CONST);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
835
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
840
return rvu->hw->cgx_chan_base +
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
844
static inline u16 rvu_nix_chan_lbk(struct rvu *rvu, u8 lbkid,
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
847
u64 nix_const = rvu_read64(rvu, BLKADDR_NIX0, NIX_AF_CONST);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
849
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
854
return rvu->hw->lbk_chan_base + lbkid * lbk_chans + chan;
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
857
static inline u16 rvu_nix_chan_sdp(struct rvu *rvu, u8 chan)
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
859
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
867
static inline u16 rvu_nix_chan_cpt(struct rvu *rvu, u8 chan)
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
869
return rvu->hw->cpt_chan_base + chan;
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
872
static inline bool is_rvu_supports_nix1(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
874
struct pci_dev *pdev = rvu->pdev;
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
88
struct rvu *rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
886
static inline bool is_lbk_vf(struct rvu *rvu, u16 pcifunc)
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
889
(rvu->vf_devid == RVU_LBK_VF_DEVID));
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
903
static inline bool is_rvu_fwdata_valid(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
905
return (rvu->fwdata->header_magic == RVU_FWDATA_HEADER_MAGIC) &&
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
906
(rvu->fwdata->version == RVU_FWDATA_VERSION);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
919
struct rvu_pfvf *rvu_get_pfvf(struct rvu *rvu, int pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
920
void rvu_get_pf_numvfs(struct rvu *rvu, int pf, int *numvfs, int *hwvf);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
922
bool is_pf_func_valid(struct rvu *rvu, u16 pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
923
bool is_pffunc_map_valid(struct rvu *rvu, u16 pcifunc, int blktype);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
924
int rvu_get_lf(struct rvu *rvu, struct rvu_block *block, u16 pcifunc, u16 slot);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
925
int rvu_lf_reset(struct rvu *rvu, struct rvu_block *block, int lf);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
926
int rvu_get_blkaddr(struct rvu *rvu, int blktype, u16 pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
927
int rvu_poll_reg(struct rvu *rvu, u64 block, u64 offset, u64 mask, bool zero);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
929
int rvu_ndc_sync(struct rvu *rvu, int lfblkid, int lfidx, u64 lfoffset);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
930
int rvu_get_blkaddr_from_slot(struct rvu *rvu, int blktype, u16 pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
942
int rvu_aq_alloc(struct rvu *rvu, struct admin_queue **ad_queue,
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
944
void rvu_aq_free(struct rvu *rvu, struct admin_queue *aq);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
947
int rvu_sdp_init(struct rvu *rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
948
bool is_sdp_pfvf(struct rvu *rvu, u16 pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
949
bool is_sdp_pf(struct rvu *rvu, u16 pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
950
bool is_sdp_vf(struct rvu *rvu, u16 pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
952
static inline bool is_rep_dev(struct rvu *rvu, u16 pcifunc)
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
954
if (rvu->rep_pcifunc && rvu->rep_pcifunc == pcifunc)
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
971
static inline bool is_pf_cgxmapped(struct rvu *rvu, u8 pf)
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
973
return (pf >= PF_CGXMAP_BASE && pf <= rvu->cgx_mapped_pfs) &&
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
974
!is_sdp_pf(rvu, rvu_make_pcifunc(rvu->pdev, pf, 0));
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
983
static inline bool is_cgx_vf(struct rvu *rvu, u16 pcifunc)
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
986
is_pf_cgxmapped(rvu, rvu_get_pf(rvu->pdev, pcifunc)));
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
990
int rvu_mbox_handler_ ## fn_name(struct rvu *, struct req *, struct rsp *);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
998
int rvu_cgx_init(struct rvu *rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
999
int rvu_cgx_exit(struct rvu *rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1001
int rvu_cgx_cfg_pause_frm(struct rvu *rvu, u16 pcifunc, u8 tx_pause, u8 rx_pause)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1003
int pf = rvu_get_pf(rvu->pdev, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1009
if (!is_mac_feature_supported(rvu, pf, RVU_LMAC_FEAT_FC))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1015
if (!is_pf_cgxmapped(rvu, pf))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1018
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1019
cgxd = rvu_cgx_pdata(cgx_id, rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1024
dev_warn(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1029
mutex_lock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1032
mutex_unlock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1035
mutex_unlock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1040
int rvu_mbox_handler_cgx_cfg_pause_frm(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1044
int pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1053
if (!is_pf_cgxmapped(rvu, pf))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1056
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1057
cgxd = rvu_cgx_pdata(cgx_id, rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1061
err = rvu_cgx_cfg_pause_frm(rvu, req->hdr.pcifunc, req->tx_pause, req->rx_pause);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1068
int rvu_mbox_handler_cgx_get_phy_fec_stats(struct rvu *rvu, struct msg_req *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1071
int pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1074
if (!is_pf_cgxmapped(rvu, pf))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1077
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1078
return cgx_get_phy_fec_stats(rvu_cgx_pdata(cgx_id, rvu), lmac_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
108
static void rvu_map_cgx_nix_block(struct rvu *rvu, int pf,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1084
int rvu_cgx_nix_cuml_stats(struct rvu *rvu, void *cgxd, int lmac_id,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1094
if (!cgxd || !rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1097
pf = cgxlmac_to_pf(rvu, cgx_get_cgxid(cgxd), lmac_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1104
pcifunc = rvu_make_pcifunc(rvu->pdev, pf, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1105
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1108
block = &rvu->hw->block[blkaddr];
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
111
struct rvu_pfvf *pfvf = &rvu->pf[pf];
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1116
*stat += rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1119
*stat += rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1126
int rvu_cgx_start_stop_io(struct rvu *rvu, u16 pcifunc, bool start)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1131
if (!is_pf_cgxmapped(rvu, rvu_get_pf(rvu->pdev, pcifunc)))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1134
parent_pf = &rvu->pf[rvu_get_pf(rvu->pdev, pcifunc)];
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1135
pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1137
mutex_lock(&rvu->cgx_cfg_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1156
err = rvu_cgx_config_rxtx(rvu, pcifunc & ~RVU_PFVF_FUNC_MASK,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1159
dev_err(rvu->dev, "Unable to %s CGX\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1169
mutex_unlock(&rvu->cgx_cfg_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
117
if (is_rvu_supports_nix1(rvu) && p2x == CMR_P2X_SEL_NIX1)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1173
int rvu_mbox_handler_cgx_set_fec_param(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1177
int pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1180
if (!is_pf_cgxmapped(rvu, pf))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1185
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1190
int rvu_mbox_handler_cgx_get_aux_link_info(struct rvu *rvu, struct msg_req *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1193
int pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1196
if (!rvu->fwdata)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1199
if (!is_pf_cgxmapped(rvu, pf))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1202
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1204
if (rvu->hw->lmac_per_cgx == CGX_LMACS_USX)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1206
&rvu->fwdata->cgx_fw_data_usx[cgx_id][lmac_id],
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
121
static int rvu_map_cgx_lmac_pf(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1210
&rvu->fwdata->cgx_fw_data[cgx_id][lmac_id],
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1216
int rvu_mbox_handler_cgx_set_link_mode(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1220
int pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1225
if (!rvu->fwdata)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1228
if (!is_cgx_config_permitted(rvu, req->hdr.pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
123
struct npc_pkind *pkind = &rvu->hw->pkind;
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1231
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_idx, &lmac);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1232
cgxd = rvu_cgx_pdata(cgx_idx, rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1233
if (rvu->hw->lmac_per_cgx == CGX_LMACS_USX)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1234
linkmodes = &rvu->fwdata->cgx_fw_data_usx[cgx_idx][lmac];
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1236
linkmodes = &rvu->fwdata->cgx_fw_data[cgx_idx][lmac];
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
124
int cgx_cnt_max = rvu->cgx_cnt_max;
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1243
int rvu_mbox_handler_cgx_mac_addr_reset(struct rvu *rvu, struct cgx_mac_addr_reset_req *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1246
int pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1249
if (!is_cgx_config_permitted(rvu, req->hdr.pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1252
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1254
if (rvu_npc_exact_has_match_table(rvu))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1255
return rvu_npc_exact_mac_addr_reset(rvu, req, rsp);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1260
int rvu_mbox_handler_cgx_mac_addr_update(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1264
int pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1267
if (!is_cgx_config_permitted(rvu, req->hdr.pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1270
if (rvu_npc_exact_has_match_table(rvu))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1271
return rvu_npc_exact_mac_addr_update(rvu, req, rsp);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1273
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1277
int rvu_cgx_prio_flow_ctrl_cfg(struct rvu *rvu, u16 pcifunc, u8 tx_pause,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1280
int pf = rvu_get_pf(rvu->pdev, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1289
if (!is_pf_cgxmapped(rvu, pf))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1292
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1293
cgxd = rvu_cgx_pdata(cgx_id, rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1298
dev_warn(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1303
mutex_lock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1306
mutex_unlock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1309
mutex_unlock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1314
int rvu_mbox_handler_cgx_prio_flow_ctrl_cfg(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1318
int pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1327
if (!is_pf_cgxmapped(rvu, pf))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1330
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1331
cgxd = rvu_cgx_pdata(cgx_id, rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1334
err = rvu_cgx_prio_flow_ctrl_cfg(rvu, req->hdr.pcifunc, req->tx_pause,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
134
if (cgx_cnt_max > 0xF || rvu->hw->lmac_per_cgx > 0xF)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1341
void rvu_mac_reset(struct rvu *rvu, u16 pcifunc)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1343
int pf = rvu_get_pf(rvu->pdev, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1348
if (!is_pf_cgxmapped(rvu, pf))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1351
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx, &lmac);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1352
cgxd = rvu_cgx_pdata(cgx, rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1356
dev_err(rvu->dev, "Failed to reset MAC\n");
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1366
bool rvu_cgx_is_pkind_config_permitted(struct rvu *rvu, u16 pcifunc)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1372
pf = rvu_get_pf(rvu->pdev, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1377
if (!is_pf_cgxmapped(rvu, pf))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1380
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1381
cgxd = rvu_cgx_pdata(cgx_id, rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1398
bool rvu_cgx_check_permission_and_set_pkind(struct rvu *rvu, u16 pcifunc, int pkind)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1404
pf = rvu_get_pf(rvu->pdev, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1406
if (!is_pf_cgxmapped(rvu, pf))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1409
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
141
size = (cgx_cnt_max * rvu->hw->lmac_per_cgx + 1) * sizeof(u8);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1410
cgxd = rvu_cgx_pdata(cgx_id, rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
142
rvu->pf2cgxlmac_map = devm_kmalloc(rvu->dev, size, GFP_KERNEL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
1429
cgx_set_pkind(rvu_cgx_pdata(cgx_id, rvu), lmac_id, pkind);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
143
if (!rvu->pf2cgxlmac_map)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
147
memset(rvu->pf2cgxlmac_map, 0xFF, size);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
150
rvu->cgxlmac2pf_map =
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
151
devm_kzalloc(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
152
cgx_cnt_max * rvu->hw->lmac_per_cgx * sizeof(u64),
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
154
if (!rvu->cgxlmac2pf_map)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
157
rvu->cgx_mapped_pfs = 0;
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
159
if (!rvu_cgx_pdata(cgx, rvu))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
161
lmac_bmap = cgx_get_lmac_bmap(rvu_cgx_pdata(cgx, rvu));
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
162
for_each_set_bit(iter, &lmac_bmap, rvu->hw->lmac_per_cgx) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
165
lmac = cgx_get_lmacid(rvu_cgx_pdata(cgx, rvu),
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
167
rvu->pf2cgxlmac_map[pf] = cgxlmac_id_to_bmap(cgx, lmac);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
168
rvu->cgxlmac2pf_map[CGX_OFFSET(cgx) + lmac] = 1 << pf;
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
171
rvu_map_cgx_nix_block(rvu, pf, cgx, lmac);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
172
rvu->cgx_mapped_pfs++;
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
173
rvu_get_pf_numvfs(rvu, pf, &numvfs, &hwvfs);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
174
rvu->cgx_mapped_vfs += numvfs;
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
181
static int rvu_cgx_send_link_info(int cgx_id, int lmac_id, struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
192
spin_lock_irqsave(&rvu->cgx_evq_lock, flags);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
193
err = cgx_get_link_info(rvu_cgx_pdata(cgx_id, rvu), lmac_id,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
201
list_add_tail(&qentry->evq_node, &rvu->cgx_evq_head);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
203
spin_unlock_irqrestore(&rvu->cgx_evq_lock, flags);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
206
queue_work(rvu->cgx_evh_wq, &rvu->cgx_evh_work);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
215
struct rvu *rvu = data;
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
222
spin_lock(&rvu->cgx_evq_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
223
list_add_tail(&qentry->evq_node, &rvu->cgx_evq_head);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
224
spin_unlock(&rvu->cgx_evq_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
227
queue_work(rvu->cgx_evh_wq, &rvu->cgx_evh_work);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
232
static void cgx_notify_pfs(struct cgx_link_event *event, struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
240
pfmap = cgxlmac_to_pfmap(rvu, event->cgx_id, event->lmac_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
242
dev_err(rvu->dev, "CGX port%d:%d not mapped with PF\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
249
rvu->cgx_cnt_max * rvu->hw->lmac_per_cgx);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
253
if (!test_bit(pfid, &rvu->pf_notify_bmap)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
254
dev_info(rvu->dev, "cgx %d: lmac %d Link status %s\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
26
*otx2_mbox_alloc_msg_ ## _fn_name(struct rvu *rvu, int devid) \
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
260
mutex_lock(&rvu->mbox_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
263
msg = otx2_mbox_alloc_msg_cgx_link_event(rvu, pfid);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
265
mutex_unlock(&rvu->mbox_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
271
otx2_mbox_wait_for_zero(&rvu->afpf_wq_info.mbox_up, pfid);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
273
otx2_mbox_msg_send_up(&rvu->afpf_wq_info.mbox_up, pfid);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
275
otx2_mbox_wait_for_rsp(&rvu->afpf_wq_info.mbox_up, pfid);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
277
mutex_unlock(&rvu->mbox_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
283
struct rvu *rvu = container_of(work, struct rvu, cgx_evh_work);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
290
spin_lock_irqsave(&rvu->cgx_evq_lock, flags);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
291
qentry = list_first_entry_or_null(&rvu->cgx_evq_head,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
296
spin_unlock_irqrestore(&rvu->cgx_evq_lock, flags);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
303
cgx_notify_pfs(event, rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
308
static int cgx_lmac_event_handler_init(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
31
&rvu->afpf_wq_info.mbox_up, devid, sizeof(struct _req_type), \
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
315
spin_lock_init(&rvu->cgx_evq_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
316
INIT_LIST_HEAD(&rvu->cgx_evq_head);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
317
INIT_WORK(&rvu->cgx_evh_work, cgx_evhandler_task);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
318
rvu->cgx_evh_wq = alloc_workqueue("rvu_evh_wq", WQ_PERCPU, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
319
if (!rvu->cgx_evh_wq) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
320
dev_err(rvu->dev, "alloc workqueue failed");
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
325
cb.data = rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
327
for (cgx = 0; cgx <= rvu->cgx_cnt_max; cgx++) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
328
cgxd = rvu_cgx_pdata(cgx, rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
332
for_each_set_bit(lmac, &lmac_bmap, rvu->hw->lmac_per_cgx) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
335
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
344
static void rvu_cgx_wq_destroy(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
346
if (rvu->cgx_evh_wq) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
347
destroy_workqueue(rvu->cgx_evh_wq);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
348
rvu->cgx_evh_wq = NULL;
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
352
int rvu_cgx_init(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
361
rvu->cgx_cnt_max = cgx_get_cgxcnt_max();
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
362
if (!rvu->cgx_cnt_max) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
363
dev_info(rvu->dev, "No CGX devices found!\n");
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
367
rvu->cgx_idmap = devm_kzalloc(rvu->dev, rvu->cgx_cnt_max *
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
369
if (!rvu->cgx_idmap)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
37
trace_otx2_msg_alloc(rvu->pdev, _id, sizeof(*req), 0); \
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
373
for (cgx = 0; cgx < rvu->cgx_cnt_max; cgx++)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
374
rvu->cgx_idmap[cgx] = cgx_get_pdata(cgx);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
377
err = rvu_map_cgx_lmac_pf(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
382
for (cgx = 0; cgx < rvu->cgx_cnt_max; cgx++) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
383
cgxd = rvu_cgx_pdata(cgx, rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
391
err = cgx_lmac_event_handler_init(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
395
mutex_init(&rvu->cgx_cfg_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
400
void cgx_start_linkup(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
408
for (cgx = 0; cgx <= rvu->cgx_cnt_max; cgx++) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
409
cgxd = rvu_cgx_pdata(cgx, rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
414
for_each_set_bit(lmac, &lmac_bmap, rvu->hw->lmac_per_cgx)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
419
for (cgx = 0; cgx <= rvu->cgx_cnt_max; cgx++) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
420
cgxd = rvu_cgx_pdata(cgx, rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
425
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
431
int rvu_cgx_exit(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
437
for (cgx = 0; cgx <= rvu->cgx_cnt_max; cgx++) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
438
cgxd = rvu_cgx_pdata(cgx, rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
44
bool is_mac_feature_supported(struct rvu *rvu, int pf, int feature)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
442
for_each_set_bit(lmac, &lmac_bmap, rvu->hw->lmac_per_cgx)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
449
rvu_cgx_wq_destroy(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
457
inline bool is_cgx_config_permitted(struct rvu *rvu, u16 pcifunc)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
460
!is_pf_cgxmapped(rvu, rvu_get_pf(rvu->pdev, pcifunc)))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
465
void rvu_cgx_enadis_rx_bp(struct rvu *rvu, int pf, bool enable)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
471
if (!is_pf_cgxmapped(rvu, pf))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
474
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
475
cgxd = rvu_cgx_pdata(cgx_id, rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
485
int rvu_cgx_config_rxtx(struct rvu *rvu, u16 pcifunc, bool start)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
487
int pf = rvu_get_pf(rvu->pdev, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
49
if (!is_pf_cgxmapped(rvu, pf))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
492
if (!is_cgx_config_permitted(rvu, pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
495
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
496
cgxd = rvu_cgx_pdata(cgx_id, rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
502
int rvu_cgx_tx_enable(struct rvu *rvu, u16 pcifunc, bool enable)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
504
int pf = rvu_get_pf(rvu->pdev, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
509
if (!is_cgx_config_permitted(rvu, pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
512
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
513
cgxd = rvu_cgx_pdata(cgx_id, rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
52
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
527
void rvu_cgx_disable_dmac_entries(struct rvu *rvu, u16 pcifunc)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
529
int pf = rvu_get_pf(rvu->pdev, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
53
cgxd = rvu_cgx_pdata(cgx_id, rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
536
if (!is_cgx_config_permitted(rvu, pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
539
if (rvu_npc_exact_has_match_table(rvu)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
540
rvu_npc_exact_reset(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
544
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
563
int rvu_mbox_handler_cgx_start_rxtx(struct rvu *rvu, struct msg_req *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
566
rvu_cgx_config_rxtx(rvu, req->hdr.pcifunc, true);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
570
int rvu_mbox_handler_cgx_stop_rxtx(struct rvu *rvu, struct msg_req *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
573
rvu_cgx_config_rxtx(rvu, req->hdr.pcifunc, false);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
577
static int rvu_lmac_get_stats(struct rvu *rvu, struct msg_req *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
58
#define CGX_OFFSET(x) ((x) * rvu->hw->lmac_per_cgx)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
580
int pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
587
if (!is_cgx_config_permitted(rvu, req->hdr.pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
590
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_idx, &lmac);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
591
cgxd = rvu_cgx_pdata(cgx_idx, rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
60
static u64 cgxlmac_to_pfmap(struct rvu *rvu, u8 cgx_id, u8 lmac_id)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
62
return rvu->cgxlmac2pf_map[CGX_OFFSET(cgx_id) + lmac_id];
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
621
int rvu_mbox_handler_cgx_stats(struct rvu *rvu, struct msg_req *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
624
return rvu_lmac_get_stats(rvu, req, (void *)rsp);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
627
int rvu_mbox_handler_rpm_stats(struct rvu *rvu, struct msg_req *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
630
return rvu_lmac_get_stats(rvu, req, (void *)rsp);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
633
int rvu_mbox_handler_cgx_stats_rst(struct rvu *rvu, struct msg_req *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
636
int pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
642
if (!is_cgx_config_permitted(rvu, req->hdr.pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
645
parent_pf = &rvu->pf[pf];
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
65
int cgxlmac_to_pf(struct rvu *rvu, int cgx_id, int lmac_id)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
651
dev_info(rvu->dev, "CGX busy, could not reset statistics\n");
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
655
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_idx, &lmac);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
656
cgxd = rvu_cgx_pdata(cgx_idx, rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
662
int rvu_mbox_handler_cgx_fec_stats(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
666
int pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
671
if (!is_cgx_config_permitted(rvu, req->hdr.pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
673
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_idx, &lmac);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
675
cgxd = rvu_cgx_pdata(cgx_idx, rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
680
int rvu_mbox_handler_cgx_mac_addr_set(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
684
int pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
688
if (!is_pf_cgxmapped(rvu, pf))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
69
pfmap = cgxlmac_to_pfmap(rvu, cgx_id, lmac_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
691
if (rvu_npc_exact_has_match_table(rvu))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
692
return rvu_npc_exact_mac_addr_set(rvu, req, rsp);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
694
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
696
pfvf = &rvu->pf[pf];
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
703
int rvu_mbox_handler_cgx_mac_addr_add(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
707
int pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
711
if (!is_cgx_config_permitted(rvu, req->hdr.pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
714
if (rvu_npc_exact_has_match_table(rvu))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
715
return rvu_npc_exact_mac_addr_add(rvu, req, rsp);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
717
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
727
int rvu_mbox_handler_cgx_mac_addr_del(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
731
int pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
734
if (!is_cgx_config_permitted(rvu, req->hdr.pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
737
if (rvu_npc_exact_has_match_table(rvu))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
738
return rvu_npc_exact_mac_addr_del(rvu, req, rsp);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
740
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
744
int rvu_mbox_handler_cgx_mac_max_entries_get(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
749
int pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
756
if (!is_cgx_config_permitted(rvu, req->hdr.pcifunc)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
76
rvu->cgx_cnt_max * rvu->hw->lmac_per_cgx);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
761
if (rvu_npc_exact_has_match_table(rvu)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
762
rsp->max_dmac_filters = rvu_npc_exact_get_max_entries(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
766
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
771
int rvu_mbox_handler_cgx_mac_addr_get(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
775
struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, req->hdr.pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
777
if (!is_pf_cgxmapped(rvu, rvu_get_pf(rvu->pdev, req->hdr.pcifunc)))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
784
int rvu_mbox_handler_cgx_promisc_enable(struct rvu *rvu, struct msg_req *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
788
int pf = rvu_get_pf(rvu->pdev, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
791
if (!is_cgx_config_permitted(rvu, req->hdr.pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
795
if (rvu_npc_exact_has_match_table(rvu))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
796
return rvu_npc_exact_promisc_enable(rvu, req->hdr.pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
798
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
804
int rvu_mbox_handler_cgx_promisc_disable(struct rvu *rvu, struct msg_req *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
807
int pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
810
if (!is_cgx_config_permitted(rvu, req->hdr.pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
814
if (rvu_npc_exact_has_match_table(rvu))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
815
return rvu_npc_exact_promisc_disable(rvu, req->hdr.pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
817
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
823
static int rvu_cgx_ptp_rx_cfg(struct rvu *rvu, u16 pcifunc, bool enable)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
825
struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
826
int pf = rvu_get_pf(rvu->pdev, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
831
if (!is_mac_feature_supported(rvu, pf, RVU_LMAC_FEAT_PTP))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
837
if (!is_pf_cgxmapped(rvu, pf))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
84
void *rvu_cgx_pdata(u8 cgx_id, struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
840
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
841
cgxd = rvu_cgx_pdata(cgx_id, rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
849
if (npc_config_ts_kpuaction(rvu, pf, pcifunc, enable))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
855
rvu_mcs_ptp_cfg(rvu, cgx_id, lmac_id, enable);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
859
int rvu_mbox_handler_cgx_ptp_rx_enable(struct rvu *rvu, struct msg_req *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
86
if (cgx_id >= rvu->cgx_cnt_max)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
862
if (!is_pf_cgxmapped(rvu, rvu_get_pf(rvu->pdev, req->hdr.pcifunc)))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
865
return rvu_cgx_ptp_rx_cfg(rvu, req->hdr.pcifunc, true);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
868
int rvu_mbox_handler_cgx_ptp_rx_disable(struct rvu *rvu, struct msg_req *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
871
return rvu_cgx_ptp_rx_cfg(rvu, req->hdr.pcifunc, false);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
874
static int rvu_cgx_config_linkevents(struct rvu *rvu, u16 pcifunc, bool en)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
876
int pf = rvu_get_pf(rvu->pdev, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
879
if (!is_cgx_config_permitted(rvu, pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
882
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
885
set_bit(pf, &rvu->pf_notify_bmap);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
887
rvu_cgx_send_link_info(cgx_id, lmac_id, rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
889
clear_bit(pf, &rvu->pf_notify_bmap);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
89
return rvu->cgx_idmap[cgx_id];
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
895
int rvu_mbox_handler_cgx_start_linkevents(struct rvu *rvu, struct msg_req *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
898
rvu_cgx_config_linkevents(rvu, req->hdr.pcifunc, true);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
902
int rvu_mbox_handler_cgx_stop_linkevents(struct rvu *rvu, struct msg_req *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
905
rvu_cgx_config_linkevents(rvu, req->hdr.pcifunc, false);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
909
int rvu_mbox_handler_cgx_get_linkinfo(struct rvu *rvu, struct msg_req *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
915
pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
917
if (!is_pf_cgxmapped(rvu, pf))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
920
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
922
err = cgx_get_link_info(rvu_cgx_pdata(cgx_id, rvu), lmac_id,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
927
int rvu_mbox_handler_cgx_features_get(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
93
void *rvu_first_cgx_pdata(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
931
int pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
935
if (!is_pf_cgxmapped(rvu, pf))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
938
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_idx, &lmac);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
939
cgxd = rvu_cgx_pdata(cgx_idx, rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
945
u32 rvu_cgx_get_fifolen(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
947
void *cgxd = rvu_first_cgx_pdata(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
955
u32 rvu_cgx_get_lmac_fifolen(struct rvu *rvu, int cgx, int lmac)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
960
cgxd = rvu_cgx_pdata(cgx, rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
971
static int rvu_cgx_config_intlbk(struct rvu *rvu, u16 pcifunc, bool en)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
973
int pf = rvu_get_pf(rvu->pdev, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
977
if (!is_cgx_config_permitted(rvu, pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
98
for (; first_enabled_cgx < rvu->cgx_cnt_max; first_enabled_cgx++) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
980
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
981
mac_ops = get_mac_ops(rvu_cgx_pdata(cgx_id, rvu));
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
983
return mac_ops->mac_lmac_intl_lbk(rvu_cgx_pdata(cgx_id, rvu),
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
987
int rvu_mbox_handler_cgx_intlbk_enable(struct rvu *rvu, struct msg_req *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
99
cgxd = rvu_cgx_pdata(first_enabled_cgx, rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
990
rvu_cgx_config_intlbk(rvu, req->hdr.pcifunc, true);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
994
int rvu_mbox_handler_cgx_intlbk_disable(struct rvu *rvu, struct msg_req *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
997
rvu_cgx_config_intlbk(rvu, req->hdr.pcifunc, false);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
105
pa = rvu_read64(rvu, BLKADDR_RVUM, RVU_AF_SMMU_TLN_FLIT0) >> 18;
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
109
mutex_unlock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
113
static int rvu_update_lmtaddr(struct rvu *rvu, u16 pcifunc, u64 lmt_addr)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
115
struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
121
tbl_idx = rvu_get_lmtst_tbl_index(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
122
err = lmtst_map_table_ops(rvu, tbl_idx, &val, LMT_TBL_OP_READ);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
124
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
138
err = lmtst_map_table_ops(rvu, tbl_idx, &lmt_addr, LMT_TBL_OP_WRITE);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
140
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
148
int rvu_mbox_handler_lmtst_tbl_setup(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
152
struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, req->hdr.pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
163
err = rvu_get_lmtaddr(rvu, req->hdr.pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
169
err = rvu_update_lmtaddr(rvu, req->hdr.pcifunc, lmt_addr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
185
(!is_pf_func_valid(rvu, req->base_pcifunc) ||
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
186
rvu_get_pf(rvu->pdev, req->hdr.pcifunc) !=
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
187
rvu_get_pf(rvu->pdev, req->base_pcifunc)))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
193
pri_tbl_idx = rvu_get_lmtst_tbl_index(rvu, req->base_pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
196
err = lmtst_map_table_ops(rvu, pri_tbl_idx, &val,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
199
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
208
err = rvu_update_lmtaddr(rvu, req->hdr.pcifunc, val);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
218
tbl_idx = rvu_get_lmtst_tbl_index(rvu, req->hdr.pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
219
err = lmtst_map_table_ops(rvu, tbl_idx + LMT_MAP_TBL_W1_OFF,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
222
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
23
static int lmtst_map_table_ops(struct rvu *rvu, u32 index, u64 *val,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
248
err = lmtst_map_table_ops(rvu, tbl_idx + LMT_MAP_TBL_W1_OFF,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
251
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
263
void rvu_reset_lmt_map_tbl(struct rvu *rvu, u16 pcifunc)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
265
struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
269
if (is_rvu_otx2(rvu))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
274
tbl_idx = rvu_get_lmtst_tbl_index(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
279
err = lmtst_map_table_ops(rvu, tbl_idx,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
283
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
292
err = lmtst_map_table_ops(rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
297
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
30
tbl_base = rvu_read64(rvu, BLKADDR_APR, APR_AF_LMT_MAP_BASE);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
305
int rvu_set_channels_base(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
309
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
31
cfg = rvu_read64(rvu, BLKADDR_APR, APR_AF_LMT_CFG);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
313
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
317
nix_const = rvu_read64(rvu, blkaddr, NIX_AF_CONST);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
318
nix_const1 = rvu_read64(rvu, blkaddr, NIX_AF_CONST1);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
366
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
37
dev_err(rvu->dev, "Failed to setup lmt map table mapping!!\n");
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
376
static void __rvu_lbk_set_chans(struct rvu *rvu, void __iomem *base,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
379
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
392
static void rvu_lbk_set_channels(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
431
__rvu_lbk_set_chans(rvu, base, LBK_LINK_CFG_X2P,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
433
__rvu_lbk_set_chans(rvu, base, LBK_LINK_CFG_P2X,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
436
__rvu_lbk_set_chans(rvu, base, LBK_LINK_CFG_X2P,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
438
__rvu_lbk_set_chans(rvu, base, LBK_LINK_CFG_P2X,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
443
__rvu_lbk_set_chans(rvu, base, LBK_LINK_CFG_X2P,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
445
__rvu_lbk_set_chans(rvu, base, LBK_LINK_CFG_P2X,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
448
__rvu_lbk_set_chans(rvu, base, LBK_LINK_CFG_X2P,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
450
__rvu_lbk_set_chans(rvu, base, LBK_LINK_CFG_P2X,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
460
static void __rvu_nix_set_channels(struct rvu *rvu, int blkaddr)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
462
u64 nix_const1 = rvu_read64(rvu, blkaddr, NIX_AF_CONST1);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
463
u64 nix_const = rvu_read64(rvu, blkaddr, NIX_AF_CONST);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
465
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
477
cfg = rvu_read64(rvu, blkaddr, NIX_AF_LINKX_CFG(nix_link));
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
481
rvu_write64(rvu, blkaddr, NIX_AF_LINKX_CFG(nix_link), cfg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
487
cfg = rvu_read64(rvu, blkaddr, NIX_AF_LINKX_CFG(nix_link));
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
491
rvu_write64(rvu, blkaddr, NIX_AF_LINKX_CFG(nix_link), cfg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
497
cfg = rvu_read64(rvu, blkaddr, NIX_AF_LINKX_CFG(nix_link));
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
501
rvu_write64(rvu, blkaddr, NIX_AF_LINKX_CFG(nix_link), cfg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
507
cfg = rvu_read64(rvu, blkaddr, NIX_AF_LINKX_CFG(nix_link));
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
511
rvu_write64(rvu, blkaddr, NIX_AF_LINKX_CFG(nix_link), cfg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
516
static void rvu_nix_set_channels(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
520
blkaddr = rvu_get_next_nix_blkaddr(rvu, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
522
__rvu_nix_set_channels(rvu, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
523
blkaddr = rvu_get_next_nix_blkaddr(rvu, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
542
static void rvu_rpm_set_channels(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
544
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
548
for (cgx = 0; cgx < rvu->cgx_cnt_max; cgx++) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
556
void rvu_program_channels(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
558
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
563
rvu_nix_set_channels(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
564
rvu_lbk_set_channels(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
565
rvu_rpm_set_channels(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
568
void rvu_nix_block_cn10k_init(struct rvu *rvu, struct nix_hw *nix_hw)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
57
rvu_write64(rvu, BLKADDR_APR, APR_AF_LMT_CTL, BIT_ULL(0));
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
576
rvu_write64(rvu, blkaddr, NIX_AF_VWQE_TIMER, 0x3FULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
58
rvu_read64(rvu, BLKADDR_APR, APR_AF_LMT_CTL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
581
cfg = rvu_read64(rvu, blkaddr, NIX_AF_CFG);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
583
rvu_write64(rvu, blkaddr, NIX_AF_CFG, cfg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
586
void rvu_apr_block_cn10k_init(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
59
rvu_write64(rvu, BLKADDR_APR, APR_AF_LMT_CTL, 0x00);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
590
reg = rvu_read64(rvu, BLKADDR_APR, APR_AF_LMT_CFG);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
592
rvu_write64(rvu, BLKADDR_APR, APR_AF_LMT_CFG, reg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
67
static u32 rvu_get_lmtst_tbl_index(struct rvu *rvu, u16 pcifunc)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
69
return ((rvu_get_pf(rvu->pdev, pcifunc) * LMT_MAX_VFS) +
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
73
static int rvu_get_lmtaddr(struct rvu *rvu, u16 pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
80
dev_err(rvu->dev, "%s Requested Null address for transulation\n", __func__);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
84
mutex_lock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
85
rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_SMMU_ADDR_REQ, iova);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
86
pf = rvu_get_pf(rvu->pdev, pcifunc) & RVU_OTX2_PFVF_PF_MASK;
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
89
rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_SMMU_TXN_REQ, val);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
91
err = rvu_poll_reg(rvu, BLKADDR_RVUM, RVU_AF_SMMU_ADDR_RSP_STS, BIT_ULL(0), false);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
93
dev_err(rvu->dev, "%s LMTLINE iova transulation failed\n", __func__);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
96
val = rvu_read64(rvu, BLKADDR_RVUM, RVU_AF_SMMU_ADDR_RSP_STS);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
98
dev_err(rvu->dev, "%s LMTLINE iova transulation failed err:%llx\n", __func__, val);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1000
spin_lock_irqsave(&rvu->cpt_intr_lock, flags);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1007
spin_unlock_irqrestore(&rvu->cpt_intr_lock, flags);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1012
static void cpt_rxc_teardown(struct rvu *rvu, int blkaddr)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1015
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1031
cpt_rxc_time_cfg(rvu, &req, blkaddr, &prev);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1034
reg = rvu_read64(rvu, blkaddr, CPT_AF_RXC_ACTIVE_STS);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1043
dev_warn(rvu->dev, "Poll for RXC active count hits hard loop counter\n");
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1047
reg = rvu_read64(rvu, blkaddr, CPT_AF_RXC_ZOMBIE_STS);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1056
dev_warn(rvu->dev, "Poll for RXC zombie count hits hard loop counter\n");
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1059
cpt_rxc_time_cfg(rvu, &prev, blkaddr, NULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
106
grp = rvu_read64(rvu, blkaddr, CPT_AF_EXEX_CTL2(eng)) & 0xFF;
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1069
static void cpt_lf_disable_iqueue(struct rvu *rvu, int blkaddr, int slot)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1077
rvu_write64(rvu, blkaddr, CPT_AF_BAR2_ALIASX(slot, CPT_LF_CTL), 0x0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1079
inprog = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
108
rvu_write64(rvu, blkaddr, CPT_AF_EXEX_CTL2(eng), 0x0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1082
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1085
qsize = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1088
inst_ptr = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
109
val = rvu_read64(rvu, blkaddr, CPT_AF_EXEX_CTL(eng));
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1098
dev_warn(rvu->dev, "TIMEOUT: CPT poll on pending instructions\n");
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
110
rvu_write64(rvu, blkaddr, CPT_AF_EXEX_CTL(eng), val & ~1ULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1103
inprog = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1116
dev_warn(rvu->dev, "TIMEOUT: CPT poll on inflight count\n");
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
112
rvu_write64(rvu, blkaddr, CPT_AF_EXEX_CTL2(eng), grp);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1121
int rvu_cpt_lf_teardown(struct rvu *rvu, u16 pcifunc, int blkaddr, int lf, int slot)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1125
if (is_cpt_pf(rvu, pcifunc) || is_cpt_vf(rvu, pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1126
cpt_rxc_teardown(rvu, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1128
mutex_lock(&rvu->alias_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
113
rvu_write64(rvu, blkaddr, CPT_AF_EXEX_CTL(eng), val | 1ULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1131
rvu_bar2_sel_write64(rvu, blkaddr, CPT_AF_BAR2_SEL, reg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1133
cpt_lf_disable_iqueue(rvu, blkaddr, slot);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1135
rvu_bar2_sel_write64(rvu, blkaddr, CPT_AF_BAR2_SEL, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1136
mutex_unlock(&rvu->alias_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1144
static int cpt_inline_inb_lf_cmd_send(struct rvu *rvu, int blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1147
int cpt_pf_num = rvu->cpt_pf_num;
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
115
spin_lock(&rvu->cpt_intr_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1160
res_daddr = dma_map_single(rvu->dev, res, CPT_RES_LEN,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1162
if (dma_mapping_error(rvu->dev, res_daddr)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1163
dev_err(rvu->dev, "DMA mapping failed for CPT result\n");
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
117
val = rvu_read64(rvu, blkaddr, CPT_AF_EXEX_STS(eng));
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1171
otx2_mbox_alloc_msg_rsp(&rvu->afpf_wq_info.mbox_up,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1199
rvu_write64(rvu, nix_blkaddr, NIX_AF_RX_CPTX_CREDIT(cpt_idx),
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1202
otx2_mbox_msg_send(&rvu->afpf_wq_info.mbox_up, cpt_pf_num);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1203
rc = otx2_mbox_wait_for_rsp(&rvu->afpf_wq_info.mbox_up, cpt_pf_num);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1205
dev_warn(rvu->dev, "notification to pf %d failed\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
121
spin_unlock(&rvu->cpt_intr_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1217
dev_warn(rvu->dev, "Poll for result hits hard loop counter\n");
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1220
dma_unmap_single(rvu->dev, res_daddr, CPT_RES_LEN, DMA_BIDIRECTIONAL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
123
rvu_write64(rvu, blkaddr, CPT_AF_FLTX_INT(vec), reg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1230
int rvu_cpt_ctx_flush(struct rvu *rvu, u16 pcifunc)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1238
nix_blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1242
if (is_rvu_otx2(rvu))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1250
rc = cpt_inline_inb_lf_cmd_send(rvu, blkaddr, nix_blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1255
cpt_rxc_teardown(rvu, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1257
reg = rvu_read64(rvu, blkaddr, CPT_AF_CONSTANTS0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1260
mutex_lock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1262
num_lfs = rvu_get_rsrc_mapcount(rvu_get_pfvf(rvu, pcifunc),
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1265
dev_warn(rvu->dev, "CPT LF is not configured\n");
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1271
rvu_bar2_sel_write64(rvu, blkaddr, CPT_AF_BAR2_SEL, reg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1274
cam_data = rvu_read64(rvu, blkaddr, CPT_AF_CTX_CAM_DATA(i));
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1279
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1284
rvu_bar2_sel_write64(rvu, blkaddr, CPT_AF_BAR2_SEL, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1287
mutex_unlock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1294
int rvu_cpt_init(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1296
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1300
rvu->cpt_pf_num = get_cpt_pf_num(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1301
if (is_block_implemented(rvu->hw, BLKADDR_CPT0) && !is_rvu_otx2(rvu) &&
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1302
!is_cn10kb(rvu))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1305
if (hw->cap.cpt_rxc && !is_cn10ka_a0(rvu) && !is_cn10ka_a1(rvu)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1309
reg_val = rvu_read64(rvu, BLKADDR_CPT0, CPT_AF_RXC_CFG1);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1313
rvu_write64(rvu, BLKADDR_CPT0, CPT_AF_RXC_CFG1, reg_val);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
1316
spin_lock_init(&rvu->cpt_intr_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
146
struct rvu *rvu = block->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
150
reg = rvu_read64(rvu, blkaddr, CPT_AF_RVU_INT);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
151
dev_err_ratelimited(rvu->dev, "Received CPTAF RVU irq : 0x%llx", reg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
153
rvu_write64(rvu, blkaddr, CPT_AF_RVU_INT, reg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
160
struct rvu *rvu = block->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
164
reg = rvu_read64(rvu, blkaddr, CPT_AF_RAS_INT);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
165
dev_err_ratelimited(rvu->dev, "Received CPTAF RAS irq : 0x%llx", reg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
167
rvu_write64(rvu, blkaddr, CPT_AF_RAS_INT, reg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
175
struct rvu *rvu = block->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
178
ret = request_irq(pci_irq_vector(rvu->pdev, irq_offs), handler, 0,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
181
dev_err(rvu->dev, "RVUAF: %s irq registration failed", name);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
185
WARN_ON(rvu->irq_allocated[irq_offs]);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
186
rvu->irq_allocated[irq_offs] = true;
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
192
struct rvu *rvu = block->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
198
max_engs = cpt_max_engines_get(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
199
flt_vecs = cpt_10k_flt_nvecs_get(rvu, max_engs);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
205
rvu_write64(rvu, blkaddr, CPT_AF_FLTX_INT_ENA_W1C(i),
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
209
rvu_write64(rvu, blkaddr, CPT_AF_RVU_INT_ENA_W1C, 0x1);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
210
rvu_write64(rvu, blkaddr, CPT_AF_RAS_INT_ENA_W1C, 0x1);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
214
if (rvu->irq_allocated[off + i]) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
215
free_irq(pci_irq_vector(rvu->pdev, off + i), block);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
216
rvu->irq_allocated[off + i] = false;
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
220
static void cpt_unregister_interrupts(struct rvu *rvu, int blkaddr)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
222
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
226
if (!is_block_implemented(rvu->hw, blkaddr))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
228
offs = rvu_read64(rvu, blkaddr, CPT_PRIV_AF_INT_CFG) & 0x7FF;
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
230
dev_warn(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
235
if (!is_rvu_otx2(rvu))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
240
rvu_write64(rvu, blkaddr, CPT_AF_FLTX_INT_ENA_W1C(i), ~0ULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
241
rvu_write64(rvu, blkaddr, CPT_AF_RVU_INT_ENA_W1C, 0x1);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
242
rvu_write64(rvu, blkaddr, CPT_AF_RAS_INT_ENA_W1C, 0x1);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
245
if (rvu->irq_allocated[offs + i]) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
246
free_irq(pci_irq_vector(rvu->pdev, offs + i), block);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
247
rvu->irq_allocated[offs + i] = false;
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
251
void rvu_cpt_unregister_interrupts(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
253
cpt_unregister_interrupts(rvu, BLKADDR_CPT0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
254
cpt_unregister_interrupts(rvu, BLKADDR_CPT1);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
260
struct rvu *rvu = block->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
267
max_engs = cpt_max_engines_get(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
268
flt_vecs = cpt_10k_flt_nvecs_get(rvu, max_engs);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
271
sprintf(&rvu->irq_name[(off + i) * NAME_SIZE], "CPTAF FLT%d", i);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
285
flt_fn, &rvu->irq_name[(off + i) * NAME_SIZE]);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
291
rvu_write64(rvu, blkaddr, CPT_AF_FLTX_INT_ENA_W1S(i),
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
303
rvu_write64(rvu, blkaddr, CPT_AF_RVU_INT_ENA_W1S, 0x1);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
310
rvu_write64(rvu, blkaddr, CPT_AF_RAS_INT_ENA_W1S, 0x1);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
314
rvu_cpt_unregister_interrupts(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
318
static int cpt_register_interrupts(struct rvu *rvu, int blkaddr)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
320
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
325
if (!is_block_implemented(rvu->hw, blkaddr))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
329
offs = rvu_read64(rvu, blkaddr, CPT_PRIV_AF_INT_CFG) & 0x7FF;
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
331
dev_warn(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
336
if (!is_rvu_otx2(rvu))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
340
sprintf(&rvu->irq_name[(offs + i) * NAME_SIZE], "CPTAF FLT%d", i);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
35
reg = rvu_read64(rvu, blkaddr, CPT_AF_EXEX_STS(e)); \
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
350
flt_fn, &rvu->irq_name[(offs + i) * NAME_SIZE]);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
353
rvu_write64(rvu, blkaddr, CPT_AF_FLTX_INT_ENA_W1S(i), ~0ULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
361
rvu_write64(rvu, blkaddr, CPT_AF_RVU_INT_ENA_W1S, 0x1);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
368
rvu_write64(rvu, blkaddr, CPT_AF_RAS_INT_ENA_W1S, 0x1);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
372
rvu_cpt_unregister_interrupts(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
376
int rvu_cpt_register_interrupts(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
380
ret = cpt_register_interrupts(rvu, BLKADDR_CPT0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
384
return cpt_register_interrupts(rvu, BLKADDR_CPT1);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
387
static int get_cpt_pf_num(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
392
domain_nr = pci_domain_nr(rvu->pdev->bus);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
393
for (i = 0; i < rvu->hw->total_pfs; i++) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
409
static bool is_cpt_pf(struct rvu *rvu, u16 pcifunc)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
411
int cpt_pf_num = rvu->cpt_pf_num;
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
413
if (rvu_get_pf(rvu->pdev, pcifunc) != cpt_pf_num)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
421
static bool is_cpt_vf(struct rvu *rvu, u16 pcifunc)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
423
int cpt_pf_num = rvu->cpt_pf_num;
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
425
if (rvu_get_pf(rvu->pdev, pcifunc) != cpt_pf_num)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
444
int rvu_mbox_handler_cpt_lf_alloc(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
461
block = &rvu->hw->block[blkaddr];
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
462
num_lfs = rvu_get_rsrc_mapcount(rvu_get_pfvf(rvu, pcifunc),
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
472
if (!is_pffunc_map_valid(rvu, req->nix_pf_func, BLKTYPE_NIX))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
481
if (!is_pffunc_map_valid(rvu, req->sso_pf_func, BLKTYPE_SSO))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
486
cptlf = rvu_get_lf(rvu, block, pcifunc, slot);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
492
if (!is_rvu_otx2(rvu)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
499
rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf), val);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
50
static u16 cpt_max_engines_get(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
504
val = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf));
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
508
rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf), val);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
514
static int cpt_lf_free(struct rvu *rvu, struct msg_req *req, int blkaddr)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
520
block = &rvu->hw->block[blkaddr];
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
521
num_lfs = rvu_get_rsrc_mapcount(rvu_get_pfvf(rvu, pcifunc),
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
527
cptlf = rvu_get_lf(rvu, block, pcifunc, slot);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
532
rvu_cpt_lf_teardown(rvu, pcifunc, blkaddr, cptlf, slot);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
535
err = rvu_lf_reset(rvu, block, cptlf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
537
dev_err(rvu->dev, "Failed to reset blkaddr %d LF%d\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
545
int rvu_mbox_handler_cpt_lf_free(struct rvu *rvu, struct msg_req *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
55
reg = rvu_read64(rvu, BLKADDR_CPT0, CPT_AF_CONSTANTS1);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
550
ret = cpt_lf_free(rvu, req, BLKADDR_CPT0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
554
if (is_block_implemented(rvu->hw, BLKADDR_CPT1))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
555
ret = cpt_lf_free(rvu, req, BLKADDR_CPT1);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
560
static int cpt_inline_ipsec_cfg_inbound(struct rvu *rvu, int blkaddr, u8 cptlf,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
567
val = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf));
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
576
if (sso_pf_func && !is_pffunc_map_valid(rvu, sso_pf_func, BLKTYPE_SSO))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
587
rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf), val);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
591
val = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf));
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
594
rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf), val);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
598
rvu_write64(rvu, blkaddr, CPT_AF_ECO, 0x1);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
603
if (!is_rvu_otx2(rvu)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
605
val |= (u64)rvu->hw->cpt_chan_base;
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
607
rvu_write64(rvu, blkaddr, CPT_AF_X2PX_LINK_CFG(0), val);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
608
rvu_write64(rvu, blkaddr, CPT_AF_X2PX_LINK_CFG(1), val);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
614
static int cpt_inline_ipsec_cfg_outbound(struct rvu *rvu, int blkaddr, u8 cptlf,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
622
val = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf));
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
632
if (nix_pf_func && !is_pffunc_map_valid(rvu, nix_pf_func, BLKTYPE_NIX))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
640
rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf), val);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
644
val = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf));
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
646
rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf), val);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
648
nix_blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, nix_pf_func);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
651
val = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf));
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
653
rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf), val);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
659
int rvu_mbox_handler_cpt_inline_ipsec_cfg(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
66
static int cpt_10k_flt_nvecs_get(struct rvu *rvu, u16 max_engs)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
668
blkaddr = rvu_get_blkaddr_from_slot(rvu, BLKTYPE_CPT, pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
673
block = &rvu->hw->block[blkaddr];
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
675
cptlf = rvu_get_lf(rvu, block, pcifunc, actual_slot);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
681
ret = cpt_inline_ipsec_cfg_inbound(rvu, blkaddr, cptlf, req);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
685
ret = cpt_inline_ipsec_cfg_outbound(rvu, blkaddr, cptlf, req);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
695
static bool validate_and_update_reg_offset(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
715
block = &rvu->hw->block[blkaddr];
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
716
pfvf = rvu_get_pfvf(rvu, req->hdr.pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
723
lf = rvu_get_lf(rvu, &rvu->hw->block[blkaddr],
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
73
dev_warn_once(rvu->dev, "flt_vecs:%d exceeds the max vectors:%d\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
763
int rvu_mbox_handler_cpt_rd_wr_register(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
775
if (!is_cpt_pf(rvu, req->hdr.pcifunc) &&
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
776
!is_cpt_vf(rvu, req->hdr.pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
779
if (!validate_and_update_reg_offset(rvu, req, &offset))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
787
rvu_write64(rvu, blkaddr, offset, req->val);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
789
rsp->val = rvu_read64(rvu, blkaddr, offset);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
794
static void get_ctx_pc(struct rvu *rvu, struct cpt_sts_rsp *rsp, int blkaddr)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
796
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
798
if (is_rvu_otx2(rvu))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
801
rsp->ctx_mis_pc = rvu_read64(rvu, blkaddr, CPT_AF_CTX_MIS_PC);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
802
rsp->ctx_hit_pc = rvu_read64(rvu, blkaddr, CPT_AF_CTX_HIT_PC);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
803
rsp->ctx_aop_pc = rvu_read64(rvu, blkaddr, CPT_AF_CTX_AOP_PC);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
804
rsp->ctx_aop_lat_pc = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
806
rsp->ctx_ifetch_pc = rvu_read64(rvu, blkaddr, CPT_AF_CTX_IFETCH_PC);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
807
rsp->ctx_ifetch_lat_pc = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
809
rsp->ctx_ffetch_pc = rvu_read64(rvu, blkaddr, CPT_AF_CTX_FFETCH_PC);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
810
rsp->ctx_ffetch_lat_pc = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
812
rsp->ctx_wback_pc = rvu_read64(rvu, blkaddr, CPT_AF_CTX_FFETCH_PC);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
813
rsp->ctx_wback_lat_pc = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
815
rsp->ctx_psh_pc = rvu_read64(rvu, blkaddr, CPT_AF_CTX_FFETCH_PC);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
816
rsp->ctx_psh_lat_pc = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
818
rsp->ctx_err = rvu_read64(rvu, blkaddr, CPT_AF_CTX_ERR);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
819
rsp->ctx_enc_id = rvu_read64(rvu, blkaddr, CPT_AF_CTX_ENC_ID);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
820
rsp->ctx_flush_timer = rvu_read64(rvu, blkaddr, CPT_AF_CTX_FLUSH_TIMER);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
821
rsp->x2p_link_cfg0 = rvu_read64(rvu, blkaddr, CPT_AF_X2PX_LINK_CFG(0));
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
822
rsp->x2p_link_cfg1 = rvu_read64(rvu, blkaddr, CPT_AF_X2PX_LINK_CFG(1));
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
826
rsp->rxc_time = rvu_read64(rvu, blkaddr, CPT_AF_RXC_TIME);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
827
rsp->rxc_time_cfg = rvu_read64(rvu, blkaddr, CPT_AF_RXC_TIME_CFG);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
828
rsp->rxc_active_sts = rvu_read64(rvu, blkaddr, CPT_AF_RXC_ACTIVE_STS);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
829
rsp->rxc_zombie_sts = rvu_read64(rvu, blkaddr, CPT_AF_RXC_ZOMBIE_STS);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
830
rsp->rxc_dfrg = rvu_read64(rvu, blkaddr, CPT_AF_RXC_DFRG);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
833
static void get_eng_sts(struct rvu *rvu, struct cpt_sts_rsp *rsp, int blkaddr)
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
839
reg = rvu_read64(rvu, blkaddr, CPT_AF_CONSTANTS1);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
84
struct rvu *rvu = block->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
858
int rvu_mbox_handler_cpt_sts(struct rvu *rvu, struct cpt_sts_req *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
868
if (!is_cpt_pf(rvu, req->hdr.pcifunc) &&
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
869
!is_cpt_vf(rvu, req->hdr.pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
872
get_ctx_pc(rvu, rsp, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
875
get_eng_sts(rvu, rsp, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
878
rsp->inst_req_pc = rvu_read64(rvu, blkaddr, CPT_AF_INST_REQ_PC);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
879
rsp->inst_lat_pc = rvu_read64(rvu, blkaddr, CPT_AF_INST_LATENCY_PC);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
880
rsp->rd_req_pc = rvu_read64(rvu, blkaddr, CPT_AF_RD_REQ_PC);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
881
rsp->rd_lat_pc = rvu_read64(rvu, blkaddr, CPT_AF_RD_LATENCY_PC);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
882
rsp->rd_uc_pc = rvu_read64(rvu, blkaddr, CPT_AF_RD_UC_PC);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
883
rsp->active_cycles_pc = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
885
rsp->exe_err_info = rvu_read64(rvu, blkaddr, CPT_AF_EXE_ERR_INFO);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
886
rsp->cptclk_cnt = rvu_read64(rvu, blkaddr, CPT_AF_CPTCLK_CNT);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
887
rsp->diag = rvu_read64(rvu, blkaddr, CPT_AF_DIAG);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
899
static void cpt_rxc_time_cfg(struct rvu *rvu, struct cpt_rxc_time_cfg_req *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
90
reg = rvu_read64(rvu, blkaddr, CPT_AF_FLTX_INT(vec));
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
906
dfrg_reg = rvu_read64(rvu, blkaddr, CPT_AF_RXC_DFRG);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
91
dev_err_ratelimited(rvu->dev, "Received CPTAF FLT%d irq : 0x%llx", vec, reg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
912
save->step = rvu_read64(rvu, blkaddr, CPT_AF_RXC_TIME_CFG);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
920
rvu_write64(rvu, blkaddr, CPT_AF_RXC_TIME_CFG, req->step);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
921
rvu_write64(rvu, blkaddr, CPT_AF_RXC_DFRG, dfrg_reg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
924
int rvu_mbox_handler_cpt_rxc_time_cfg(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
935
if (!is_cpt_pf(rvu, req->hdr.pcifunc) &&
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
936
!is_cpt_vf(rvu, req->hdr.pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
939
cpt_rxc_time_cfg(rvu, req, blkaddr, NULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
944
int rvu_mbox_handler_cpt_ctx_cache_sync(struct rvu *rvu, struct msg_req *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
947
return rvu_cpt_ctx_flush(rvu, req->hdr.pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
950
int rvu_mbox_handler_cpt_lf_reset(struct rvu *rvu, struct cpt_lf_rst_req *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
959
blkaddr = rvu_get_blkaddr_from_slot(rvu, BLKTYPE_CPT, pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
964
block = &rvu->hw->block[blkaddr];
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
966
cptlf = rvu_get_lf(rvu, block, pcifunc, actual_slot);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
969
ctl = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf));
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
970
ctl2 = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf));
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
972
ret = rvu_lf_reset(rvu, block, cptlf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
974
dev_err(rvu->dev, "Failed to reset blkaddr %d LF%d\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
977
rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf), ctl);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
978
rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf), ctl2);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
983
int rvu_mbox_handler_cpt_flt_eng_info(struct rvu *rvu, struct cpt_flt_eng_info_req *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
996
block = &rvu->hw->block[blkaddr];
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
997
max_engs = cpt_max_engines_get(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
998
flt_vecs = cpt_10k_flt_nvecs_get(rvu, max_engs);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1000
qsize_id = rvu->rvu_dbg.npa_qsize_id;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1005
qsize_id = rvu->rvu_dbg.nix_qsize_id;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1018
if (!rvu_dbg_is_valid_lf(rvu, blkaddr, qsize_id, &pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1021
pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1034
struct rvu *rvu = seqfile->private;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1056
dev_info(rvu->dev, "Use echo <%s-lf > qsize\n", blk_string);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1065
if (!rvu_dbg_is_valid_lf(rvu, blkaddr, lf, &pcifunc)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1070
rvu->rvu_dbg.npa_qsize_id = lf;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1072
rvu->rvu_dbg.nix_qsize_id = lf;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1098
struct rvu *rvu = m->private;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1100
if (is_cn20k(rvu->pdev)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1124
if (!is_rvu_otx2(rvu))
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1143
if (!is_rvu_otx2(rvu))
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1151
struct rvu *rvu = m->private;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1153
if (is_cn20k(rvu->pdev)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1178
if (!is_rvu_otx2(rvu))
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1195
if (!is_rvu_otx2(rvu))
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1208
struct rvu *rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1211
rvu = m->private;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1215
npalf = rvu->rvu_dbg.npa_aura_ctx.lf;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1216
id = rvu->rvu_dbg.npa_aura_ctx.id;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1217
all = rvu->rvu_dbg.npa_aura_ctx.all;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1221
npalf = rvu->rvu_dbg.npa_pool_ctx.lf;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1222
id = rvu->rvu_dbg.npa_pool_ctx.id;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1223
all = rvu->rvu_dbg.npa_pool_ctx.all;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1229
if (!rvu_dbg_is_valid_lf(rvu, BLKADDR_NPA, npalf, &pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1232
pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1275
rc = rvu_npa_aq_enq_inst(rvu, &aq_req, &rsp);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1285
static int write_npa_ctx(struct rvu *rvu, bool all,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1292
if (!rvu_dbg_is_valid_lf(rvu, BLKADDR_NPA, npalf, &pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1295
pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1299
dev_warn(rvu->dev, "Aura context is not initialized\n");
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1305
dev_warn(rvu->dev, "Pool context is not initialized\n");
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1312
dev_warn(rvu->dev, "Invalid %s, valid range is 0-%d\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1320
rvu->rvu_dbg.npa_aura_ctx.lf = npalf;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1321
rvu->rvu_dbg.npa_aura_ctx.id = id;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1322
rvu->rvu_dbg.npa_aura_ctx.all = all;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1326
rvu->rvu_dbg.npa_pool_ctx.lf = npalf;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1327
rvu->rvu_dbg.npa_pool_ctx.id = id;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1328
rvu->rvu_dbg.npa_pool_ctx.all = all;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1381
struct rvu *rvu = seqfp->private;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1394
dev_info(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1399
ret = write_npa_ctx(rvu, all, npalf, id, ctype);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1441
struct rvu *rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1445
rvu = s->private;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1448
rvu = nix_hw->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1452
req = rvu_read64(rvu, blk_addr, NDC_AF_PORTX_RTX_RWX_REQ_PC
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1454
lat = rvu_read64(rvu, blk_addr, NDC_AF_PORTX_RTX_RWX_LAT_PC
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1456
out_req = rvu_read64(rvu, blk_addr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1459
cant_alloc = rvu_read64(rvu, blk_addr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1494
struct rvu *rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1499
rvu = s->private;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1502
rvu = nix_hw->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1505
ndc_af_const = rvu_read64(rvu, blk_addr, NDC_AF_CONST);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1510
(u64)rvu_read64(rvu, blk_addr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1513
(u64)rvu_read64(rvu, blk_addr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1655
struct rvu *rvu = nix_hw->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1666
cfg = rvu_read64(rvu, blkaddr, NIX_AF_MDQX_PARENT(schq));
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1669
cfg = rvu_read64(rvu, blkaddr, NIX_AF_TL4X_PARENT(p1));
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1672
cfg = rvu_read64(rvu, blkaddr, NIX_AF_TL3X_PARENT(p2));
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1675
cfg = rvu_read64(rvu, blkaddr, NIX_AF_TL2X_PARENT(p3));
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1687
struct rvu *rvu = nix_hw->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1693
nixlf = rvu->rvu_dbg.nix_tm_ctx.lf;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1694
id = rvu->rvu_dbg.nix_tm_ctx.id;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1696
if (!rvu_dbg_is_valid_lf(rvu, nix_hw->blkaddr, nixlf, &pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1699
pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1714
rc = rvu_mbox_handler_nix_aq_enq(rvu, &aq_req, &rsp);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1732
struct rvu *rvu = nix_hw->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1742
if (!rvu_dbg_is_valid_lf(rvu, nix_hw->blkaddr, nixlf, &pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1745
pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1747
dev_warn(rvu->dev, "SQ context is not initialized\n");
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1751
rvu->rvu_dbg.nix_tm_ctx.lf = nixlf;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1760
struct rvu *rvu = nix_hw->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1764
hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1768
rvu_read64(rvu, blkaddr, NIX_AF_SMQX_CFG(schq)));
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1770
rvu_read64(rvu, blkaddr, NIX_AF_SMQX_STATUS(schq)));
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1772
rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1775
rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1778
rvu_read64(rvu, blkaddr, NIX_AF_MDQX_SHAPE(schq)));
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1780
rvu_read64(rvu, blkaddr, NIX_AF_MDQX_CIR(schq)));
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1782
rvu_read64(rvu, blkaddr, NIX_AF_MDQX_PIR(schq)));
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1784
rvu_read64(rvu, blkaddr, NIX_AF_MDQX_SW_XOFF(schq)));
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1786
rvu_read64(rvu, blkaddr, NIX_AF_MDQX_PARENT(schq)));
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1792
rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1795
rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1798
rvu_read64(rvu, blkaddr, NIX_AF_TL4X_SHAPE(schq)));
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1800
rvu_read64(rvu, blkaddr, NIX_AF_TL4X_CIR(schq)));
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1802
rvu_read64(rvu, blkaddr, NIX_AF_TL4X_PIR(schq)));
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1804
rvu_read64(rvu, blkaddr, NIX_AF_TL4X_SW_XOFF(schq)));
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1806
rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1809
rvu_read64(rvu, blkaddr, NIX_AF_TL4X_PARENT(schq)));
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1811
rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1814
rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1821
rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1824
rvu_read64(rvu, blkaddr, NIX_AF_TL3X_SHAPE(schq)));
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1826
rvu_read64(rvu, blkaddr, NIX_AF_TL3X_CIR(schq)));
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1828
rvu_read64(rvu, blkaddr, NIX_AF_TL3X_PIR(schq)));
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1830
rvu_read64(rvu, blkaddr, NIX_AF_TL3X_SW_XOFF(schq)));
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1832
rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1835
rvu_read64(rvu, blkaddr, NIX_AF_TL3X_PARENT(schq)));
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1837
rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1840
rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1843
link_level = rvu_read64(rvu, blkaddr, NIX_AF_PSE_CHANNEL_LEVEL)
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1848
schq, rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1854
rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1862
rvu_read64(rvu, blkaddr, NIX_AF_TL2X_SHAPE(schq)));
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1864
rvu_read64(rvu, blkaddr, NIX_AF_TL2X_CIR(schq)));
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1866
rvu_read64(rvu, blkaddr, NIX_AF_TL2X_PIR(schq)));
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1868
rvu_read64(rvu, blkaddr, NIX_AF_TL2X_SW_XOFF(schq)));
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1870
rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1873
rvu_read64(rvu, blkaddr, NIX_AF_TL2X_PARENT(schq)));
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1875
rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1878
rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1881
link_level = rvu_read64(rvu, blkaddr, NIX_AF_PSE_CHANNEL_LEVEL)
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1886
schq, rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1891
schq, link, rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1900
rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1903
rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1906
rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1909
rvu_read64(rvu, blkaddr, NIX_AF_TL1X_SHAPE(schq)));
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1911
rvu_read64(rvu, blkaddr, NIX_AF_TL1X_CIR(schq)));
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1913
rvu_read64(rvu, blkaddr, NIX_AF_TL1X_SW_XOFF(schq)));
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1915
rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1918
rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1921
rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1925
rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1928
rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1931
rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1934
rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1937
rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1940
rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1943
rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1946
rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1956
struct rvu *rvu = nix_hw->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1962
nixlf = rvu->rvu_dbg.nix_tm_ctx.lf;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1964
if (!rvu_dbg_is_valid_lf(rvu, nix_hw->blkaddr, nixlf, &pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1989
struct rvu *rvu = nix_hw->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
1999
if (!rvu_dbg_is_valid_lf(rvu, nix_hw->blkaddr, nixlf, &pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2002
pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2004
dev_warn(rvu->dev, "SQ context is not initialized\n");
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2008
rvu->rvu_dbg.nix_tm_ctx.lf = nixlf;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2019
struct rvu *rvu = nix_hw->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2021
if (is_cn20k(rvu->pdev)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2026
if (!is_rvu_otx2(rvu)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2174
struct rvu *rvu = nix_hw->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2176
if (!is_rvu_otx2(rvu)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2243
struct rvu *rvu = nix_hw->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2245
if (is_cn20k(rvu->pdev)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2260
if (!is_rvu_otx2(rvu)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2282
if (!is_rvu_otx2(rvu)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2298
struct rvu *rvu = nix_hw->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2309
nixlf = rvu->rvu_dbg.nix_cq_ctx.lf;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2310
id = rvu->rvu_dbg.nix_cq_ctx.id;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2311
all = rvu->rvu_dbg.nix_cq_ctx.all;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2315
nixlf = rvu->rvu_dbg.nix_sq_ctx.lf;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2316
id = rvu->rvu_dbg.nix_sq_ctx.id;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2317
all = rvu->rvu_dbg.nix_sq_ctx.all;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2321
nixlf = rvu->rvu_dbg.nix_rq_ctx.lf;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2322
id = rvu->rvu_dbg.nix_rq_ctx.id;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2323
all = rvu->rvu_dbg.nix_rq_ctx.all;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2330
if (!rvu_dbg_is_valid_lf(rvu, nix_hw->blkaddr, nixlf, &pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2333
pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2371
rc = rvu_mbox_handler_nix_aq_enq(rvu, &aq_req, &rsp);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2381
static int write_nix_queue_ctx(struct rvu *rvu, bool all, int nixlf,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2390
if (!rvu_dbg_is_valid_lf(rvu, nix_hw->blkaddr, nixlf, &pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2393
pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2397
dev_warn(rvu->dev, "SQ context is not initialized\n");
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2403
dev_warn(rvu->dev, "RQ context is not initialized\n");
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2409
dev_warn(rvu->dev, "CQ context is not initialized\n");
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2416
dev_warn(rvu->dev, "Invalid %s_ctx valid range 0-%d\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2422
rvu->rvu_dbg.nix_cq_ctx.lf = nixlf;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2423
rvu->rvu_dbg.nix_cq_ctx.id = id;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2424
rvu->rvu_dbg.nix_cq_ctx.all = all;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2428
rvu->rvu_dbg.nix_sq_ctx.lf = nixlf;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2429
rvu->rvu_dbg.nix_sq_ctx.id = id;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2430
rvu->rvu_dbg.nix_sq_ctx.all = all;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2434
rvu->rvu_dbg.nix_rq_ctx.lf = nixlf;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2435
rvu->rvu_dbg.nix_rq_ctx.id = id;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2436
rvu->rvu_dbg.nix_rq_ctx.all = all;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2451
struct rvu *rvu = nix_hw->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2481
dev_info(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2486
ret = write_nix_queue_ctx(rvu, all, nixlf, id, ctype,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2669
struct rvu *rvu = nix_hw->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2695
rc = nix_aq_context_read(rvu, nix_hw, &aq_req, &aq_rsp,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2699
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2708
rvu_get_pf(rvu->pdev, pcifunc));
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2711
rvu_get_pf(rvu->pdev, pcifunc),
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2752
static void rvu_dbg_nix_init(struct rvu *rvu, int blkaddr)
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2756
if (!is_block_implemented(rvu->hw, blkaddr))
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2760
rvu->rvu_dbg.nix = debugfs_create_dir("nix", rvu->rvu_dbg.root);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2761
nix_hw = &rvu->hw->nix[0];
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2763
rvu->rvu_dbg.nix = debugfs_create_dir("nix1",
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2764
rvu->rvu_dbg.root);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2765
nix_hw = &rvu->hw->nix[1];
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2768
debugfs_create_file("tm_tree", 0600, rvu->rvu_dbg.nix, nix_hw,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2770
debugfs_create_file("tm_topo", 0600, rvu->rvu_dbg.nix, nix_hw,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2772
debugfs_create_file("sq_ctx", 0600, rvu->rvu_dbg.nix, nix_hw,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2774
debugfs_create_file("rq_ctx", 0600, rvu->rvu_dbg.nix, nix_hw,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2776
debugfs_create_file("cq_ctx", 0600, rvu->rvu_dbg.nix, nix_hw,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2778
debugfs_create_file("ndc_tx_cache", 0600, rvu->rvu_dbg.nix, nix_hw,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2780
debugfs_create_file("ndc_rx_cache", 0600, rvu->rvu_dbg.nix, nix_hw,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2782
debugfs_create_file("ndc_tx_hits_miss", 0600, rvu->rvu_dbg.nix, nix_hw,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2784
debugfs_create_file("ndc_rx_hits_miss", 0600, rvu->rvu_dbg.nix, nix_hw,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2786
debugfs_create_file_aux_num("qsize", 0600, rvu->rvu_dbg.nix, rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2788
debugfs_create_file("ingress_policer_ctx", 0600, rvu->rvu_dbg.nix, nix_hw,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2790
debugfs_create_file("ingress_policer_rsrc", 0600, rvu->rvu_dbg.nix, nix_hw,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2794
static void rvu_dbg_npa_init(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2796
rvu->rvu_dbg.npa = debugfs_create_dir("npa", rvu->rvu_dbg.root);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2798
debugfs_create_file("qsize", 0600, rvu->rvu_dbg.npa, rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2800
debugfs_create_file("aura_ctx", 0600, rvu->rvu_dbg.npa, rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2802
debugfs_create_file("pool_ctx", 0600, rvu->rvu_dbg.npa, rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2805
if (is_cn20k(rvu->pdev)) /* NDC not appliable for cn20k */
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2807
debugfs_create_file("ndc_cache", 0600, rvu->rvu_dbg.npa, rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2809
debugfs_create_file("ndc_hits_miss", 0600, rvu->rvu_dbg.npa, rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2817
struct rvu *rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2824
err = rvu_cgx_nix_cuml_stats(rvu, cgxd, lmac_id, (idx), \
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2834
err = rvu_cgx_nix_cuml_stats(rvu, cgxd, lmac_id, (idx), \
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2845
struct rvu *rvu = dctx->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2914
if (is_rvu_otx2(rvu))
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2931
if (is_rvu_otx2(rvu))
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2958
struct rvu *rvu = dctx->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
2967
pf = cgxlmac_to_pf(rvu, cgx_get_cgxid(cgxd), lmac_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3015
struct rvu *rvu = dctx->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3020
if (!rvu->fwdata)
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3025
if (rvu->hw->lmac_per_cgx == CGX_LMACS_USX)
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3026
fwdata = &rvu->fwdata->cgx_fw_data_usx[cgx_id][lmac_id];
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3028
fwdata = &rvu->fwdata->cgx_fw_data[cgx_id][lmac_id];
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3098
static void rvu_dbg_cgx_init(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3110
mac_ops = get_mac_ops(rvu_first_cgx_pdata(rvu));
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3114
rvu->rvu_dbg.cgx_root = debugfs_create_dir(mac_ops->name,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3115
rvu->rvu_dbg.root);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3118
cgx = rvu_cgx_pdata(i, rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3124
rvu->rvu_dbg.cgx = debugfs_create_dir(dname,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3125
rvu->rvu_dbg.cgx_root);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3127
ctx = devm_kzalloc(rvu->dev, sizeof(*ctx), GFP_KERNEL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3131
ctx->rvu = rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3134
for_each_set_bit(lmac_id, &lmac_bmap, rvu->hw->lmac_per_cgx) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3137
rvu->rvu_dbg.lmac =
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3138
debugfs_create_dir(dname, rvu->rvu_dbg.cgx);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3140
debugfs_create_file_aux_num("stats", 0600, rvu->rvu_dbg.lmac,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3143
rvu->rvu_dbg.lmac, ctx, lmac_id,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3146
rvu->rvu_dbg.lmac, ctx,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3156
struct rvu *rvu = s->private;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3160
rvu_npc_get_mcam_entry_alloc_info(rvu, pcifunc, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3162
rvu_npc_get_mcam_counter_alloc_info(rvu, pcifunc, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3169
rvu_get_pf(rvu->pdev, pcifunc));
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3172
rvu_get_pf(rvu->pdev, pcifunc),
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3187
struct rvu *rvu = filp->private;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3195
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3199
mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3200
counters = rvu->hw->npc_counters;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3204
if (is_cn20k(rvu->pdev)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3210
npc_cn20k_subbank_calc_free(rvu, &x2_free, &x4_free, &sb_free);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3217
cfg = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3224
cfg = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3254
for (pf = 0; pf < rvu->hw->total_pfs; pf++) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3255
pcifunc = rvu_make_pcifunc(rvu->pdev, pf, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3258
cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(pf));
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3261
pcifunc = rvu_make_pcifunc(rvu->pdev, pf, (vf + 1));
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3275
struct rvu *rvu = filp->private;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3279
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3283
mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3287
rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3516
struct rvu *rvu = s->private;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3524
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3528
mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3532
pf = rvu_get_pf(rvu->pdev, iter->owner);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3550
pf = rvu_get_pf(rvu->pdev, target);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3564
enabled = is_mcam_entry_enabled(rvu, mcam, blkaddr, iter->entry);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3566
if (is_cn20k(rvu->pdev)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3571
hits = rvu_read64(rvu, blkaddr, off);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3580
hits = rvu_read64(rvu, blkaddr, NPC_AF_MATCH_STATX(iter->cntr));
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3595
struct rvu *rvu = s->private;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3600
table = rvu->hw->table;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3680
struct rvu *rvu = s->private;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3683
table = rvu->hw->table;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3687
rvu->hw->cap.npc_exact_match_enabled ? "enabled" : "disable");
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3688
if (!rvu->hw->cap.npc_exact_match_enabled)
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3717
struct rvu *rvu = s->private;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3724
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3725
table = rvu->hw->table;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3727
field = &rvu->hw->mcam.rx_key_fields[NPC_CHAN];
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3733
pcifunc = rvu_npc_exact_drop_rule_to_pcifunc(rvu, i);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3734
cfg = rvu_read64(rvu, blkaddr, NPC_AF_MCAMEX_BANKX_CFG(i, 0));
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3737
cam1 = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3742
if (is_cn20k(rvu->pdev)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3745
i, rvu_read64(rvu, blkaddr, off), chan, str);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3749
i, rvu_read64(rvu, blkaddr, off),
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3760
static void rvu_dbg_npc_init(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3762
rvu->rvu_dbg.npc = debugfs_create_dir("npc", rvu->rvu_dbg.root);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3764
debugfs_create_file("mcam_info", 0444, rvu->rvu_dbg.npc, rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3766
debugfs_create_file("mcam_rules", 0444, rvu->rvu_dbg.npc, rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3769
debugfs_create_file("rx_miss_act_stats", 0444, rvu->rvu_dbg.npc, rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3772
if (is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3773
npc_cn20k_debugfs_init(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3775
if (!rvu->hw->cap.npc_exact_match_enabled)
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3778
debugfs_create_file("exact_entries", 0444, rvu->rvu_dbg.npc, rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3781
debugfs_create_file("exact_info", 0444, rvu->rvu_dbg.npc, rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3784
debugfs_create_file("exact_drop_cnt", 0444, rvu->rvu_dbg.npc, rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3795
struct rvu *rvu = ctx->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3799
reg = rvu_read64(rvu, blkaddr, CPT_AF_CONSTANTS1);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3822
reg = rvu_read64(rvu, blkaddr, CPT_AF_EXEX_STS(e));
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3860
struct rvu *rvu = ctx->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3865
reg = rvu_read64(rvu, blkaddr, CPT_AF_CONSTANTS1);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3874
reg = rvu_read64(rvu, blkaddr, CPT_AF_EXEX_CTL2(e));
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3877
reg = rvu_read64(rvu, blkaddr, CPT_AF_EXEX_ACTIVE(e));
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3880
reg = rvu_read64(rvu, blkaddr, CPT_AF_EXEX_CTL(e));
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3894
struct rvu *rvu = ctx->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3900
hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3907
reg = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL(lf));
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3909
reg = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL2(lf));
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3911
reg = rvu_read64(rvu, blkaddr, CPT_AF_LFX_PTR_CTL(lf));
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3913
reg = rvu_read64(rvu, blkaddr, block->lfcfg_reg |
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3926
struct rvu *rvu = ctx->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3930
reg0 = rvu_read64(rvu, blkaddr, CPT_AF_FLTX_INT(0));
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3931
reg1 = rvu_read64(rvu, blkaddr, CPT_AF_FLTX_INT(1));
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3933
reg0 = rvu_read64(rvu, blkaddr, CPT_AF_PSNX_EXE(0));
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3934
reg1 = rvu_read64(rvu, blkaddr, CPT_AF_PSNX_EXE(1));
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3936
reg0 = rvu_read64(rvu, blkaddr, CPT_AF_PSNX_LF(0));
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3938
reg0 = rvu_read64(rvu, blkaddr, CPT_AF_RVU_INT);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3940
reg0 = rvu_read64(rvu, blkaddr, CPT_AF_RAS_INT);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3942
reg0 = rvu_read64(rvu, blkaddr, CPT_AF_EXE_ERR_INFO);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3953
struct rvu *rvu = ctx->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3957
reg = rvu_read64(rvu, blkaddr, CPT_AF_INST_REQ_PC);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3959
reg = rvu_read64(rvu, blkaddr, CPT_AF_INST_LATENCY_PC);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3961
reg = rvu_read64(rvu, blkaddr, CPT_AF_RD_REQ_PC);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3963
reg = rvu_read64(rvu, blkaddr, CPT_AF_RD_LATENCY_PC);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3965
reg = rvu_read64(rvu, blkaddr, CPT_AF_RD_UC_PC);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3967
reg = rvu_read64(rvu, blkaddr, CPT_AF_ACTIVE_CYCLES_PC);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3969
reg = rvu_read64(rvu, blkaddr, CPT_AF_CPTCLK_CNT);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3977
static void rvu_dbg_cpt_init(struct rvu *rvu, int blkaddr)
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3981
if (!is_block_implemented(rvu->hw, blkaddr))
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3985
rvu->rvu_dbg.cpt = debugfs_create_dir("cpt", rvu->rvu_dbg.root);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3986
ctx = &rvu->rvu_dbg.cpt_ctx[0];
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3988
ctx->rvu = rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3990
rvu->rvu_dbg.cpt = debugfs_create_dir("cpt1",
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3991
rvu->rvu_dbg.root);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3992
ctx = &rvu->rvu_dbg.cpt_ctx[1];
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3994
ctx->rvu = rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3997
debugfs_create_file("cpt_pc", 0600, rvu->rvu_dbg.cpt, ctx,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
3999
debugfs_create_file("cpt_ae_sts", 0600, rvu->rvu_dbg.cpt, ctx,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
4001
debugfs_create_file("cpt_se_sts", 0600, rvu->rvu_dbg.cpt, ctx,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
4003
debugfs_create_file("cpt_ie_sts", 0600, rvu->rvu_dbg.cpt, ctx,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
4005
debugfs_create_file("cpt_engines_info", 0600, rvu->rvu_dbg.cpt, ctx,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
4007
debugfs_create_file("cpt_lfs_info", 0600, rvu->rvu_dbg.cpt, ctx,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
4009
debugfs_create_file("cpt_err_info", 0600, rvu->rvu_dbg.cpt, ctx,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
4013
static const char *rvu_get_dbg_dir_name(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
4015
if (is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
4018
if (!is_rvu_otx2(rvu))
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
4024
void rvu_dbg_init(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
4026
rvu->rvu_dbg.root = debugfs_create_dir(rvu_get_dbg_dir_name(rvu), NULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
4028
debugfs_create_file("rsrc_alloc", 0444, rvu->rvu_dbg.root, rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
4031
if (!is_rvu_otx2(rvu))
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
4032
debugfs_create_file("lmtst_map_table", 0444, rvu->rvu_dbg.root,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
4033
rvu, &rvu_dbg_lmtst_map_table_fops);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
4035
debugfs_create_file("rvu_fwdata", 0444, rvu->rvu_dbg.root, rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
4041
if (is_rvu_otx2(rvu))
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
4042
debugfs_create_file("rvu_pf_cgx_map", 0444, rvu->rvu_dbg.root,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
4043
rvu, &rvu_dbg_rvu_pf_cgx_map_fops);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
4045
debugfs_create_file("rvu_pf_rpm_map", 0444, rvu->rvu_dbg.root,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
4046
rvu, &rvu_dbg_rvu_pf_cgx_map_fops);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
4049
rvu_dbg_npa_init(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
4050
rvu_dbg_nix_init(rvu, BLKADDR_NIX0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
4052
rvu_dbg_nix_init(rvu, BLKADDR_NIX1);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
4053
rvu_dbg_cgx_init(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
4054
rvu_dbg_npc_init(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
4055
rvu_dbg_cpt_init(rvu, BLKADDR_CPT0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
4056
rvu_dbg_cpt_init(rvu, BLKADDR_CPT1);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
4057
rvu_dbg_mcs_init(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
4060
void rvu_dbg_exit(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
4062
debugfs_remove_recursive(rvu->rvu_dbg.root);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
497
static void rvu_dbg_mcs_init(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
503
if (!rvu->mcs_blk_cnt)
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
506
rvu->rvu_dbg.mcs_root = debugfs_create_dir("mcs", rvu->rvu_dbg.root);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
508
for (i = 0; i < rvu->mcs_blk_cnt; i++) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
512
rvu->rvu_dbg.mcs = debugfs_create_dir(dname,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
513
rvu->rvu_dbg.mcs_root);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
515
rvu->rvu_dbg.mcs_rx = debugfs_create_dir("rx_stats", rvu->rvu_dbg.mcs);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
517
debugfs_create_file("flowid", 0600, rvu->rvu_dbg.mcs_rx, mcs,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
520
debugfs_create_file("secy", 0600, rvu->rvu_dbg.mcs_rx, mcs,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
523
debugfs_create_file("sc", 0600, rvu->rvu_dbg.mcs_rx, mcs,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
526
debugfs_create_file("sa", 0600, rvu->rvu_dbg.mcs_rx, mcs,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
529
debugfs_create_file("port", 0600, rvu->rvu_dbg.mcs_rx, mcs,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
532
rvu->rvu_dbg.mcs_tx = debugfs_create_dir("tx_stats", rvu->rvu_dbg.mcs);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
534
debugfs_create_file("flowid", 0600, rvu->rvu_dbg.mcs_tx, mcs,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
537
debugfs_create_file("secy", 0600, rvu->rvu_dbg.mcs_tx, mcs,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
540
debugfs_create_file("sc", 0600, rvu->rvu_dbg.mcs_tx, mcs,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
543
debugfs_create_file("sa", 0600, rvu->rvu_dbg.mcs_tx, mcs,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
546
debugfs_create_file("port", 0600, rvu->rvu_dbg.mcs_tx, mcs,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
557
struct rvu *rvu = filp->private_data;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
576
tbl_base = rvu_read64(rvu, BLKADDR_APR, APR_AF_LMT_MAP_BASE);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
577
val = rvu_read64(rvu, BLKADDR_APR, APR_AF_LMT_CFG);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
584
dev_err(rvu->dev, "Failed to setup lmt map table mapping!!\n");
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
600
for (pf = 0; pf < rvu->hw->total_pfs; pf++) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
615
rvu_get_pf_numvfs(rvu, pf, &num_vfs, &hw_vfs);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
683
static int get_max_column_width(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
694
for (pf = 0; pf < rvu->hw->total_pfs; pf++) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
695
for (vf = 0; vf <= rvu->hw->total_vfs; vf++) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
696
pcifunc = rvu_make_pcifunc(rvu->pdev, pf, vf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
701
block = rvu->hw->block[index];
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
722
struct rvu *rvu = filp->private_data;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
740
lf_str_size = get_max_column_width(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
750
if (strlen(rvu->hw->block[index].name)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
753
rvu->hw->block[index].name);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
763
for (pf = 0; pf < rvu->hw->total_pfs; pf++) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
764
for (vf = 0; vf <= rvu->hw->total_vfs; vf++) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
767
pcifunc = rvu_make_pcifunc(rvu->pdev, pf, vf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
784
block = rvu->hw->block[index];
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
825
struct rvu *rvu = filp->private;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
834
mac_ops = get_mac_ops(rvu_first_cgx_pdata(rvu));
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
840
for (pf = 0; pf < rvu->hw->total_pfs; pf++) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
841
if (!is_pf_cgxmapped(rvu, pf))
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
850
pcifunc = rvu_make_pcifunc(rvu->pdev, pf, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
851
pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
858
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
863
rvu_nix_chan_cgx(rvu, cgx_id, lmac_id, 0));
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
877
struct rvu *rvu = s->private;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
882
if (!rvu->fwdata)
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
885
fwdata = rvu->fwdata;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
940
static bool rvu_dbg_is_valid_lf(struct rvu *rvu, int blkaddr, int lf,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
946
hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
950
dev_warn(rvu->dev, "Invalid LF: valid range: 0-%d\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
957
dev_warn(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
992
struct rvu *rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
997
rvu = s->private;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
100
rvu = rvu_dl->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1003
rvu_write64(rvu, blkaddr, NPA_AF_ERR_INT_ENA_W1S, ~0ULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
101
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1012
struct rvu *rvu = devlink_health_reporter_priv(reporter);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1013
struct rvu_devlink *rvu_dl = rvu->rvu_dl;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1025
struct rvu *rvu = devlink_health_reporter_priv(reporter);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1029
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPA, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1034
rvu_write64(rvu, blkaddr, NPA_AF_RAS_ENA_W1S, ~0ULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1050
struct rvu *rvu = rvu_dl->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
106
intr = rvu_read64(rvu, blkaddr, NIX_AF_GEN_INT);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1065
rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1067
dev_warn(rvu->dev, "Failed to create hw_npa_intr reporter, err=%ld\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1075
rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1077
dev_warn(rvu->dev, "Failed to create hw_npa_gen reporter, err=%ld\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1085
rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1087
dev_warn(rvu->dev, "Failed to create hw_npa_err reporter, err=%ld\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1095
rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1097
dev_warn(rvu->dev, "Failed to create hw_npa_ras reporter, err=%ld\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
110
rvu_write64(rvu, blkaddr, NIX_AF_GEN_INT, intr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
111
rvu_write64(rvu, blkaddr, NIX_AF_GEN_INT_ENA_W1C, ~0ULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1116
struct rvu *rvu = rvu_dl->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1121
dev_warn(rvu->dev, "Failed to create npa reporter, err =%d\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1125
rvu_npa_register_interrupts(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1133
struct rvu *rvu = rvu_dl->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1151
rvu_npa_unregister_interrupts(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1156
static int rvu_health_reporters_create(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1161
rvu_dl = rvu->rvu_dl;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1169
static void rvu_health_reporters_destroy(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1173
if (!rvu->rvu_dl)
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1176
rvu_dl = rvu->rvu_dl;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1187
struct rvu *rvu = rvu_dl->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1192
if (!rvu->hw->cap.nix_common_dwrr_mtu) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1205
nix_hw = get_nix_hw(rvu->hw, BLKADDR_NIX0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1226
struct rvu *rvu = rvu_dl->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1230
rvu_write64(rvu, BLKADDR_NIX0,
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1231
nix_get_dwrr_mtu_reg(rvu->hw, SMQ_LINK_TYPE_RPM), dwrr_mtu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1241
struct rvu *rvu = rvu_dl->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1244
if (!rvu->hw->cap.nix_common_dwrr_mtu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1247
dwrr_mtu = rvu_read64(rvu, BLKADDR_NIX0,
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1248
nix_get_dwrr_mtu_reg(rvu->hw, SMQ_LINK_TYPE_RPM));
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1270
struct rvu *rvu = rvu_dl->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1273
enabled = is_cn20k(rvu->pdev);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1286
struct rvu *rvu = rvu_dl->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1291
if (npc_cn20k_defrag(rvu)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1292
dev_err(rvu->dev, "Defrag process failed\n");
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1303
struct rvu *rvu = rvu_dl->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
131
struct rvu *rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1318
if (is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1331
struct rvu *rvu = rvu_dl->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1334
enabled = rvu_npc_exact_has_match_table(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1347
struct rvu *rvu = rvu_dl->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1349
rvu_npc_exact_disable_feature(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
135
rvu = rvu_dl->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1359
struct rvu *rvu = rvu_dl->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
136
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1374
if (rvu_npc_exact_can_disable_feature(rvu))
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1387
struct rvu *rvu = rvu_dl->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1391
mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1403
struct rvu *rvu = rvu_dl->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1408
mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
141
intr = rvu_read64(rvu, blkaddr, NIX_AF_ERR_INT);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1422
struct rvu *rvu = rvu_dl->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1435
mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
145
rvu_write64(rvu, blkaddr, NIX_AF_ERR_INT, intr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1450
struct rvu *rvu = rvu_dl->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1452
ctx->val.vbool = rvu->def_rule_cntr_en;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
146
rvu_write64(rvu, blkaddr, NIX_AF_ERR_INT_ENA_W1C, ~0ULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1462
struct rvu *rvu = rvu_dl->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1465
err = npc_config_cntr_default_entries(rvu, ctx->val.vbool);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1467
rvu->def_rule_cntr_en = ctx->val.vbool;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1477
struct rvu *rvu = rvu_dl->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1479
ctx->val.vu16 = (u16)rvu_get_nixlf_count(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1489
struct rvu *rvu = rvu_dl->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1493
npc_mcam_rsrcs_deinit(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1494
blkaddr = rvu_get_next_nix_blkaddr(rvu, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1496
block = &rvu->hw->block[blkaddr];
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1498
blkaddr = rvu_get_next_nix_blkaddr(rvu, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1501
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1502
npc_mcam_rsrcs_init(rvu, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1512
struct rvu *rvu = rvu_dl->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1519
cfg = rvu_read64(rvu, BLKADDR_NIX0, NIX_AF_CONST2);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1521
cfg = rvu_read64(rvu, BLKADDR_NIX1, NIX_AF_CONST2);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1529
blkaddr = rvu_get_next_nix_blkaddr(rvu, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1531
block = &rvu->hw->block[blkaddr];
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1540
blkaddr = rvu_get_next_nix_blkaddr(rvu, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1596
struct rvu *rvu = rvu_dl->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1599
if (rvu->rep_mode)
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1602
rswitch = &rvu->rswitch;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1612
struct rvu *rvu = rvu_dl->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1615
rswitch = &rvu->rswitch;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1623
rvu_switch_enable(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1625
rvu_switch_disable(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1639
struct rvu *rvu = rvu_dl->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1641
return npc_cn20k_search_order_set(rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
166
struct rvu *rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1667
struct rvu *rvu = rvu_dl->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1675
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1690
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
170
rvu = rvu_dl->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
171
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1719
int rvu_register_dl(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1726
rvu->dev);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1728
dev_warn(rvu->dev, "devlink_alloc failed\n");
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1734
rvu_dl->rvu = rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1735
rvu->rvu_dl = rvu_dl;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1737
err = rvu_health_reporters_create(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1739
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1746
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1751
if (is_cn20k(rvu->pdev)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1755
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
176
intr = rvu_read64(rvu, blkaddr, NIX_AF_ERR_INT);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1763
if (!rvu_npc_exact_has_match_table(rvu))
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1769
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1780
if (is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1788
rvu_health_reporters_destroy(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1793
void rvu_unregister_dl(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1795
struct rvu_devlink *rvu_dl = rvu->rvu_dl;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
180
rvu_write64(rvu, blkaddr, NIX_AF_RAS, intr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1802
if (is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1807
if (rvu_npc_exact_has_match_table(rvu))
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
181
rvu_write64(rvu, blkaddr, NIX_AF_RAS_ENA_W1C, ~0ULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
1811
rvu_health_reporters_destroy(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
187
static void rvu_nix_unregister_interrupts(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
189
struct rvu_devlink *rvu_dl = rvu->rvu_dl;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
192
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
196
offs = rvu_read64(rvu, blkaddr, NIX_PRIV_AF_INT_CFG) & 0x3ff;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
200
rvu_write64(rvu, blkaddr, NIX_AF_RVU_INT_ENA_W1C, ~0ULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
201
rvu_write64(rvu, blkaddr, NIX_AF_GEN_INT_ENA_W1C, ~0ULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
202
rvu_write64(rvu, blkaddr, NIX_AF_ERR_INT_ENA_W1C, ~0ULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
203
rvu_write64(rvu, blkaddr, NIX_AF_RAS_ENA_W1C, ~0ULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
205
if (rvu->irq_allocated[offs + NIX_AF_INT_VEC_RVU]) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
206
free_irq(pci_irq_vector(rvu->pdev, offs + NIX_AF_INT_VEC_RVU),
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
208
rvu->irq_allocated[offs + NIX_AF_INT_VEC_RVU] = false;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
212
if (rvu->irq_allocated[offs + i]) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
213
free_irq(pci_irq_vector(rvu->pdev, offs + i), rvu_dl);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
214
rvu->irq_allocated[offs + i] = false;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
218
static int rvu_nix_register_interrupts(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
223
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
228
base = rvu_read64(rvu, blkaddr, NIX_PRIV_AF_INT_CFG) & 0x3ff;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
230
dev_warn(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
236
rc = rvu_common_request_irq(rvu, base + NIX_AF_INT_VEC_RVU,
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
241
rvu_write64(rvu, blkaddr, NIX_AF_RVU_INT_ENA_W1S, ~0ULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
244
rc = rvu_common_request_irq(rvu, base + NIX_AF_INT_VEC_GEN,
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
249
rvu_write64(rvu, blkaddr, NIX_AF_GEN_INT_ENA_W1S, ~0ULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
252
rc = rvu_common_request_irq(rvu, base + NIX_AF_INT_VEC_AF_ERR,
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
257
rvu_write64(rvu, blkaddr, NIX_AF_ERR_INT_ENA_W1S, ~0ULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
260
rc = rvu_common_request_irq(rvu, base + NIX_AF_INT_VEC_POISON,
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
265
rvu_write64(rvu, blkaddr, NIX_AF_RAS_ENA_W1S, ~0ULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
269
rvu_nix_unregister_interrupts(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
30
static bool rvu_common_request_irq(struct rvu *rvu, int offset,
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
33
struct rvu_devlink *rvu_dl = rvu->rvu_dl;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
36
sprintf(&rvu->irq_name[offset * NAME_SIZE], "%s", name);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
365
struct rvu *rvu = devlink_health_reporter_priv(reporter);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
366
struct rvu_devlink *rvu_dl = rvu->rvu_dl;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
37
rc = request_irq(pci_irq_vector(rvu->pdev, offset), fn, 0,
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
378
struct rvu *rvu = devlink_health_reporter_priv(reporter);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
38
&rvu->irq_name[offset * NAME_SIZE], rvu_dl);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
382
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
387
rvu_write64(rvu, blkaddr, NIX_AF_RVU_INT_ENA_W1S, ~0ULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
396
struct rvu *rvu = devlink_health_reporter_priv(reporter);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
397
struct rvu_devlink *rvu_dl = rvu->rvu_dl;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
40
dev_warn(rvu->dev, "Failed to register %s irq\n", name);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
409
struct rvu *rvu = devlink_health_reporter_priv(reporter);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
413
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
418
rvu_write64(rvu, blkaddr, NIX_AF_GEN_INT_ENA_W1S, ~0ULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
42
rvu->irq_allocated[offset] = true;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
427
struct rvu *rvu = devlink_health_reporter_priv(reporter);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
428
struct rvu_devlink *rvu_dl = rvu->rvu_dl;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
44
return rvu->irq_allocated[offset];
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
440
struct rvu *rvu = devlink_health_reporter_priv(reporter);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
444
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
449
rvu_write64(rvu, blkaddr, NIX_AF_ERR_INT_ENA_W1S, ~0ULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
458
struct rvu *rvu = devlink_health_reporter_priv(reporter);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
459
struct rvu_devlink *rvu_dl = rvu->rvu_dl;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
471
struct rvu *rvu = devlink_health_reporter_priv(reporter);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
475
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
480
rvu_write64(rvu, blkaddr, NIX_AF_RAS_ENA_W1S, ~0ULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
496
struct rvu *rvu = rvu_dl->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
511
rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
513
dev_warn(rvu->dev, "Failed to create hw_nix_intr reporter, err=%ld\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
521
rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
523
dev_warn(rvu->dev, "Failed to create hw_nix_gen reporter, err=%ld\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
531
rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
533
dev_warn(rvu->dev, "Failed to create hw_nix_err reporter, err=%ld\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
541
rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
543
dev_warn(rvu->dev, "Failed to create hw_nix_ras reporter, err=%ld\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
562
struct rvu *rvu = rvu_dl->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
567
dev_warn(rvu->dev, "Failed to create nix reporter, err =%d\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
571
rvu_nix_register_interrupts(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
579
struct rvu *rvu = rvu_dl->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
597
rvu_nix_unregister_interrupts(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
61
struct rvu *rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
616
struct rvu *rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
620
rvu = rvu_dl->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
621
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPA, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
626
intr = rvu_read64(rvu, blkaddr, NPA_AF_RVU_INT);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
630
rvu_write64(rvu, blkaddr, NPA_AF_RVU_INT, intr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
631
rvu_write64(rvu, blkaddr, NPA_AF_RVU_INT_ENA_W1C, ~0ULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
65
rvu = rvu_dl->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
651
struct rvu *rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
655
rvu = rvu_dl->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
656
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPA, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
66
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
661
intr = rvu_read64(rvu, blkaddr, NPA_AF_GEN_INT);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
665
rvu_write64(rvu, blkaddr, NPA_AF_GEN_INT, intr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
666
rvu_write64(rvu, blkaddr, NPA_AF_GEN_INT_ENA_W1C, ~0ULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
686
struct rvu *rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
690
rvu = rvu_dl->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
691
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPA, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
695
intr = rvu_read64(rvu, blkaddr, NPA_AF_ERR_INT);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
699
rvu_write64(rvu, blkaddr, NPA_AF_ERR_INT, intr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
700
rvu_write64(rvu, blkaddr, NPA_AF_ERR_INT_ENA_W1C, ~0ULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
71
intr = rvu_read64(rvu, blkaddr, NIX_AF_RVU_INT);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
720
struct rvu *rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
724
rvu = rvu_dl->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
725
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPA, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
730
intr = rvu_read64(rvu, blkaddr, NPA_AF_RAS);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
734
rvu_write64(rvu, blkaddr, NPA_AF_RAS, intr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
735
rvu_write64(rvu, blkaddr, NPA_AF_RAS_ENA_W1C, ~0ULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
741
static void rvu_npa_unregister_interrupts(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
743
struct rvu_devlink *rvu_dl = rvu->rvu_dl;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
747
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPA, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
75
rvu_write64(rvu, blkaddr, NIX_AF_RVU_INT, intr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
751
reg = rvu_read64(rvu, blkaddr, NPA_PRIV_AF_INT_CFG);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
754
rvu_write64(rvu, blkaddr, NPA_AF_RVU_INT_ENA_W1C, ~0ULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
755
rvu_write64(rvu, blkaddr, NPA_AF_GEN_INT_ENA_W1C, ~0ULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
756
rvu_write64(rvu, blkaddr, NPA_AF_ERR_INT_ENA_W1C, ~0ULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
757
rvu_write64(rvu, blkaddr, NPA_AF_RAS_ENA_W1C, ~0ULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
76
rvu_write64(rvu, blkaddr, NIX_AF_RVU_INT_ENA_W1C, ~0ULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
760
if (rvu->irq_allocated[offs + i]) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
761
free_irq(pci_irq_vector(rvu->pdev, offs + i), rvu_dl);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
762
rvu->irq_allocated[offs + i] = false;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
766
static int rvu_npa_register_interrupts(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
771
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPA, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
776
base = rvu_read64(rvu, blkaddr, NPA_PRIV_AF_INT_CFG) & 0x3ff;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
778
dev_warn(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
784
rc = rvu_common_request_irq(rvu, base + NPA_AF_INT_VEC_RVU,
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
789
rvu_write64(rvu, blkaddr, NPA_AF_RVU_INT_ENA_W1S, ~0ULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
792
rc = rvu_common_request_irq(rvu, base + NPA_AF_INT_VEC_GEN,
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
797
rvu_write64(rvu, blkaddr, NPA_AF_GEN_INT_ENA_W1S, ~0ULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
800
rc = rvu_common_request_irq(rvu, base + NPA_AF_INT_VEC_AF_ERR,
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
805
rvu_write64(rvu, blkaddr, NPA_AF_ERR_INT_ENA_W1S, ~0ULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
808
rc = rvu_common_request_irq(rvu, base + NPA_AF_INT_VEC_POISON,
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
813
rvu_write64(rvu, blkaddr, NPA_AF_RAS_ENA_W1S, ~0ULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
817
rvu_npa_unregister_interrupts(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
919
struct rvu *rvu = devlink_health_reporter_priv(reporter);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
920
struct rvu_devlink *rvu_dl = rvu->rvu_dl;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
932
struct rvu *rvu = devlink_health_reporter_priv(reporter);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
936
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPA, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
941
rvu_write64(rvu, blkaddr, NPA_AF_RVU_INT_ENA_W1S, ~0ULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
950
struct rvu *rvu = devlink_health_reporter_priv(reporter);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
951
struct rvu_devlink *rvu_dl = rvu->rvu_dl;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
96
struct rvu *rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
963
struct rvu *rvu = devlink_health_reporter_priv(reporter);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
967
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPA, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
972
rvu_write64(rvu, blkaddr, NPA_AF_GEN_INT_ENA_W1S, ~0ULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
981
struct rvu *rvu = devlink_health_reporter_priv(reporter);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
982
struct rvu_devlink *rvu_dl = rvu->rvu_dl;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
994
struct rvu *rvu = devlink_health_reporter_priv(reporter);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c
998
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPA, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.h
72
struct rvu *rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.h
79
int rvu_register_dl(struct rvu *rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.h
80
void rvu_unregister_dl(struct rvu *rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1008
ret = rvu_ndc_fix_locked_cacheline(rvu, BLKADDR_NDC_NIX0_RX);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1009
ret |= rvu_ndc_fix_locked_cacheline(rvu, BLKADDR_NDC_NIX0_TX);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
101
if (rvu->nix_blkaddr[i] == blkaddr)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1010
ret |= rvu_ndc_fix_locked_cacheline(rvu, BLKADDR_NDC_NIX1_RX);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1011
ret |= rvu_ndc_fix_locked_cacheline(rvu, BLKADDR_NDC_NIX1_TX);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1013
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
102
return rvu->nix_blkaddr[i + 1];
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1023
static void nix_get_aq_req_smq(struct rvu *rvu, struct nix_aq_enq_req *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1028
if (is_cn20k(rvu->pdev)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1034
if (!is_rvu_otx2(rvu)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1044
static int rvu_nix_blk_aq_enq_inst(struct rvu *rvu, struct nix_hw *nix_hw,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1048
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1064
dev_warn(rvu->dev, "%s: NIX AQ not initialized\n", __func__);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1068
pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1069
nixlf = rvu_get_lf(rvu, block, pcifunc, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
109
bool is_nixlf_attached(struct rvu *rvu, u16 pcifunc)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1096
cfg = rvu_read64(rvu, blkaddr, NIX_AF_LFX_RSS_CFG(nixlf));
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1102
cfg = rvu_read64(rvu, blkaddr, NIX_AF_RX_MCAST_CFG);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
111
struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1127
nix_get_aq_req_smq(rvu, req, &smq, &smq_mask);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1133
if (!is_valid_txschq(rvu, blkaddr, NIX_TXSCH_LVL_SMQ,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
114
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
120
int rvu_get_nixlf_count(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1207
rc = nix_aq_enqueue_wait(rvu, block, &inst);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
125
blkaddr = rvu_get_next_nix_blkaddr(rvu, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
127
block = &rvu->hw->block[blkaddr];
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1281
static int rvu_nix_verify_aq_ctx(struct rvu *rvu, struct nix_hw *nix_hw,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
129
blkaddr = rvu_get_next_nix_blkaddr(rvu, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1291
rc = nix_aq_context_read(rvu, nix_hw, &aq_req, &aq_rsp,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1294
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1338
int rvu_nix_aq_enq_inst(struct rvu *rvu, struct nix_aq_enq_req *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
134
int nix_get_nixlf(struct rvu *rvu, u16 pcifunc, int *nixlf, int *nix_blkaddr)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1345
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, req->hdr.pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1349
nix_hw = get_nix_hw(rvu->hw, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1354
err = rvu_nix_blk_aq_enq_inst(rvu, nix_hw, req, rsp);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
136
struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1361
err = rvu_nix_verify_aq_ctx(rvu, nix_hw, req, NIX_AQ_CTYPE_CQ);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
137
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1388
static int nix_lf_hwctx_disable(struct rvu *rvu, struct hwctx_disable_req *req)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1390
struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, req->hdr.pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
140
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1430
rc = rvu_nix_aq_enq_inst(rvu, &aq_req, NULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1433
dev_err(rvu->dev, "Failed to disable %s:%d context\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
144
*nixlf = rvu_get_lf(rvu, &hw->block[blkaddr], pcifunc, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1442
static int nix_lf_hwctx_lockdown(struct rvu *rvu, struct nix_aq_enq_req *req)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1459
err = rvu_nix_aq_enq_inst(rvu, &lock_ctx_req, NULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1461
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1468
int rvu_mbox_handler_nix_aq_enq(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1474
err = rvu_nix_aq_enq_inst(rvu, req, rsp);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1476
err = nix_lf_hwctx_lockdown(rvu, req);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1481
int rvu_mbox_handler_nix_aq_enq(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1485
return rvu_nix_aq_enq_inst(rvu, req, rsp);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1489
int rvu_mbox_handler_nix_cn10k_aq_enq(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1493
return rvu_nix_aq_enq_inst(rvu, (struct nix_aq_enq_req *)req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1497
int rvu_mbox_handler_nix_hwctx_disable(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1501
return nix_lf_hwctx_disable(rvu, req);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1504
int rvu_mbox_handler_nix_lf_alloc(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1510
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1526
pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1527
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1532
nixlf = rvu_get_lf(rvu, block, pcifunc, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
154
int nix_get_struct_ptrs(struct rvu *rvu, u16 pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1541
if (!is_pffunc_map_valid(rvu, req->npa_func, BLKTYPE_NPA))
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1550
if (!is_pffunc_map_valid(rvu, req->sso_func, BLKTYPE_SSO))
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1568
rc = rvu_lf_reset(rvu, block, nixlf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1570
dev_err(rvu->dev, "Failed to reset NIX%d LF%d\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1575
ctx_cfg = rvu_read64(rvu, blkaddr, NIX_AF_CONST3);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1579
rc = qmem_alloc(rvu->dev, &pfvf->rq_ctx, req->rq_cnt, hwctx_size);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1589
rvu_write64(rvu, blkaddr, NIX_AF_LFX_RQS_BASE(nixlf),
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
159
pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1594
rvu_write64(rvu, blkaddr, NIX_AF_LFX_RQS_CFG(nixlf), cfg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1598
rc = qmem_alloc(rvu->dev, &pfvf->sq_ctx, req->sq_cnt, hwctx_size);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
160
*blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1608
rvu_write64(rvu, blkaddr, NIX_AF_LFX_SQS_BASE(nixlf),
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1612
rvu_write64(rvu, blkaddr, NIX_AF_LFX_SQS_CFG(nixlf), cfg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1616
rc = qmem_alloc(rvu->dev, &pfvf->cq_ctx, req->cq_cnt, hwctx_size);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1626
rvu_write64(rvu, blkaddr, NIX_AF_LFX_CQS_BASE(nixlf),
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1630
rvu_write64(rvu, blkaddr, NIX_AF_LFX_CQS_CFG(nixlf), cfg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1634
rc = nixlf_rss_ctx_init(rvu, blkaddr, pfvf, nixlf, req->rss_sz,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
164
*nix_hw = get_nix_hw(rvu->hw, *blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1641
cfg = rvu_read64(rvu, blkaddr, NIX_AF_CONST2);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1644
rc = qmem_alloc(rvu->dev, &pfvf->cq_ints_ctx, qints, hwctx_size);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1648
rvu_write64(rvu, blkaddr, NIX_AF_LFX_CINTS_BASE(nixlf),
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1651
rvu_write64(rvu, blkaddr, NIX_AF_LFX_CINTS_CFG(nixlf),
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1655
cfg = rvu_read64(rvu, blkaddr, NIX_AF_CONST2);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1658
rc = qmem_alloc(rvu->dev, &pfvf->nix_qints_ctx, qints, hwctx_size);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1662
rvu_write64(rvu, blkaddr, NIX_AF_LFX_QINTS_BASE(nixlf),
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1664
rvu_write64(rvu, blkaddr, NIX_AF_LFX_QINTS_CFG(nixlf),
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1672
rvu_write64(rvu, blkaddr, NIX_AF_LFX_TX_CFG(nixlf), cfg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1675
rvu_write64(rvu, blkaddr, NIX_AF_LFX_TX_CFG2(nixlf), BIT_ULL(0));
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1684
rvu_write64(rvu, blkaddr, NIX_AF_LFX_CFG(nixlf), cfg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1687
rvu_write64(rvu, blkaddr, NIX_AF_LFX_RX_CFG(nixlf), req->rx_cfg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1691
pf = rvu_get_pf(rvu->pdev, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1694
if (is_pf_cgxmapped(rvu, pf) && is_vf(pcifunc)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1695
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1696
cgxd = rvu_cgx_pdata(cgx_id, rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1698
if (rvu_cgx_is_pkind_config_permitted(rvu, pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1699
rvu_write64(rvu, blkaddr, NIX_AF_LFX_TX_PARSE_CFG(nixlf), cfg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1702
rvu_write64(rvu, blkaddr, NIX_AF_LFX_TX_PARSE_CFG(nixlf), cfg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1705
if (is_rep_dev(rvu, pcifunc)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1711
intf = is_lbk_vf(rvu, pcifunc) ? NIX_INTF_TYPE_LBK : NIX_INTF_TYPE_CGX;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1712
if (is_sdp_pfvf(rvu, pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1715
if (is_cn20k(rvu->pdev)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1716
rc = npc_cn20k_dft_rules_idx_get(rvu, pcifunc, &bcast, &mcast,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1719
rc = npc_cn20k_dft_rules_alloc(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1727
rc = nix_interface_init(rvu, pcifunc, intf, nixlf, rsp,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1733
rvu_npc_disable_default_entries(rvu, pcifunc, nixlf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1736
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1743
if (is_cn20k(rvu->pdev) && rules_created)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1744
npc_cn20k_dft_rules_free(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1747
nix_ctx_free(rvu, pfvf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1754
cfg = rvu_read64(rvu, blkaddr, NIX_AF_SQ_CONST);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1763
cfg = rvu_read64(rvu, blkaddr, NIX_AF_CONST1);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1767
cfg = rvu_read64(rvu, blkaddr, NIX_AF_CONST2);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1777
int rvu_mbox_handler_nix_lf_free(struct rvu *rvu, struct nix_lf_free_req *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1780
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1786
pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1787
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1792
nixlf = rvu_get_lf(rvu, block, pcifunc, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1796
if (is_rep_dev(rvu, pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1800
rvu_npc_disable_mcam_entries(rvu, pcifunc, nixlf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1802
rvu_npc_free_mcam_entries(rvu, pcifunc, nixlf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1806
nix_free_tx_vtag_entries(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1808
nix_interface_deinit(rvu, pcifunc, nixlf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1812
err = rvu_lf_reset(rvu, block, nixlf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1814
dev_err(rvu->dev, "Failed to reset NIX%d LF%d\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1819
nix_ctx_free(rvu, pfvf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1821
if (is_cn20k(rvu->pdev) && !(req->flags & NIX_LF_DONT_FREE_DFT_IDXS))
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1822
npc_cn20k_dft_rules_free(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1827
int rvu_mbox_handler_nix_mark_format_cfg(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1837
pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1838
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1842
nix_hw = get_nix_hw(rvu->hw, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1851
rc = rvu_nix_reserve_mark_format(rvu, nix_hw, blkaddr, cfg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1853
dev_err(rvu->dev, "No mark_format_ctl for (pf:%d, vf:%d)",
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1854
rvu_get_pf(rvu->pdev, pcifunc),
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1865
handle_txschq_shaper_update(struct rvu *rvu, int blkaddr, int nixlf,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1917
oldval = rvu_read64(rvu, blkaddr, reg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1919
rvu_write64(rvu, blkaddr, reg, regval);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1925
rvu_write64(rvu, blkaddr, sw_xoff, 1);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1926
rvu_write64(rvu, blkaddr, reg, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1928
rvu_write64(rvu, blkaddr, sw_xoff, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1933
rvu_write64(rvu, blkaddr, sw_xoff, 1);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1939
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1945
dbgval = rvu_read64(rvu, blkaddr, md_debug0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1948
rvu_write64(rvu, blkaddr, reg, regval);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1950
rvu_write64(rvu, blkaddr, sw_xoff, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1954
static void nix_reset_tx_schedule(struct rvu *rvu, int blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1984
rvu_write64(rvu, blkaddr, tlx_parent, 0x0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1987
rvu_write64(rvu, blkaddr, tlx_schedule, 0x0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1993
static void nix_reset_tx_shaping(struct rvu *rvu, int blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
1996
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2026
handle_txschq_shaper_update(rvu, blkaddr, nixlf,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2029
handle_txschq_shaper_update(rvu, blkaddr, nixlf,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2036
cfg = rvu_read64(rvu, blkaddr, cir_reg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2037
rvu_write64(rvu, blkaddr, cir_reg, cfg & ~BIT_ULL(0));
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2041
cfg = rvu_read64(rvu, blkaddr, pir_reg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2042
rvu_write64(rvu, blkaddr, pir_reg, cfg & ~BIT_ULL(0));
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2045
static void nix_reset_tx_linkcfg(struct rvu *rvu, int blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2048
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2057
rvu_write64(rvu, blkaddr, NIX_AF_TL4X_SDP_LINK_CFG(schq), 0x00);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2059
link_level = rvu_read64(rvu, blkaddr, NIX_AF_PSE_CHANNEL_LEVEL) & 0x01 ?
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2066
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
207
struct rvu *rvu = hw->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2070
static void nix_clear_tx_xoff(struct rvu *rvu, int blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2073
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
209
nix_blkaddr = rvu_get_next_nix_blkaddr(rvu, nix_blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
21
static void nix_free_tx_vtag_entries(struct rvu *rvu, u16 pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2101
rvu_write64(rvu, blkaddr, reg, 0x0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2104
static int nix_get_tx_link(struct rvu *rvu, u16 pcifunc)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2106
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2107
int pf = rvu_get_pf(rvu->pdev, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2110
if (is_lbk_vf(rvu, pcifunc)) {/* LBK links */
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2112
} else if (is_pf_cgxmapped(rvu, pf)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2113
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2121
static void nix_get_txschq_range(struct rvu *rvu, u16 pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2124
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2125
int pf = rvu_get_pf(rvu->pdev, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2128
if (is_lbk_vf(rvu, pcifunc) || is_rep_dev(rvu, pcifunc)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
213
nix_blkaddr = rvu_get_next_nix_blkaddr(rvu, nix_blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2131
} else if (is_pf_cgxmapped(rvu, pf)) { /* CGX links */
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2141
static int nix_check_txschq_alloc_req(struct rvu *rvu, int lvl, u16 pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2145
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2156
link = nix_get_tx_link(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2167
nix_get_txschq_range(rvu, pcifunc, link, &start, &end);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2190
static void nix_txsch_alloc(struct rvu *rvu, struct nix_txsch *txsch,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2194
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
22
static int rvu_nix_get_bpid(struct rvu *rvu, struct nix_bp_cfg_req *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2274
int rvu_mbox_handler_nix_txsch_alloc(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2278
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2288
rc = nix_get_nixlf(rvu, pcifunc, &nixlf, &blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2292
nix_hw = get_nix_hw(rvu->hw, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2296
mutex_lock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2302
rc = nix_check_txschq_alloc_req(rvu, lvl, pcifunc, nix_hw, req);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2318
link = nix_get_tx_link(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2324
nix_get_txschq_range(rvu, pcifunc, link, &start, &end);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2330
nix_txsch_alloc(rvu, txsch, rsp, lvl, start, end);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2338
nix_reset_tx_linkcfg(rvu, blkaddr, lvl, schq);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2339
nix_reset_tx_shaping(rvu, blkaddr, nixlf, lvl, schq);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2340
nix_reset_tx_schedule(rvu, blkaddr, lvl, schq);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2348
nix_reset_tx_linkcfg(rvu, blkaddr, lvl, schq);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2349
nix_reset_tx_shaping(rvu, blkaddr, nixlf, lvl, schq);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2350
nix_reset_tx_schedule(rvu, blkaddr, lvl, schq);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2356
rsp->link_cfg_lvl = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2363
mutex_unlock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2367
static void nix_smq_flush_fill_ctx(struct rvu *rvu, int blkaddr, int smq,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
24
static int nix_update_mce_rule(struct rvu *rvu, u16 pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2404
smq_tree_ctx->cir_val = rvu_read64(rvu, blkaddr, smq_tree_ctx->cir_off);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2406
smq_tree_ctx->pir_val = rvu_read64(rvu, blkaddr, smq_tree_ctx->pir_off);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2410
regval = rvu_read64(rvu, blkaddr, parent_off);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2416
static void nix_smq_flush_enadis_xoff(struct rvu *rvu, int blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2424
nix_hw = get_nix_hw(rvu->hw, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2446
rvu_write64(rvu, blkaddr, regoff, 0x1);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2448
rvu_write64(rvu, blkaddr, regoff, 0x0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2452
static void nix_smq_flush_enadis_rate(struct rvu *rvu, int blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2467
rvu_write64(rvu, blkaddr, cir_off, cir_val);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2469
rvu_write64(rvu, blkaddr, pir_off, pir_val);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2471
rvu_write64(rvu, blkaddr, cir_off, 0x0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2473
rvu_write64(rvu, blkaddr, pir_off, 0x0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2478
static int nix_smq_flush(struct rvu *rvu, int blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2483
int pf = rvu_get_pf(rvu->pdev, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2489
if (!is_rvu_otx2(rvu)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2491
cfg = rvu_read64(rvu, blkaddr, NIX_AF_MDQX_IN_MD_COUNT(smq));
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2497
if (is_pf_cgxmapped(rvu, pf)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2498
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2499
restore_tx_en = !rvu_cgx_config_tx(rvu_cgx_pdata(cgx_id, rvu),
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2507
nix_smq_flush_fill_ctx(rvu, blkaddr, smq, smq_flush_ctx);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2508
nix_smq_flush_enadis_xoff(rvu, blkaddr, smq_flush_ctx, true);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2509
nix_smq_flush_enadis_rate(rvu, blkaddr, smq_flush_ctx, false);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2514
rvu_cgx_enadis_rx_bp(rvu, pf, false);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2516
link_level = rvu_read64(rvu, blkaddr, NIX_AF_PSE_CHANNEL_LEVEL) & 0x01 ?
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2522
cfg = rvu_read64(rvu, blkaddr, NIX_AF_SMQX_CFG(smq));
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2524
rvu_write64(rvu, blkaddr, NIX_AF_SMQX_CFG(smq), cfg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2527
for (i = 0; i < (rvu->hw->cgx_links + rvu->hw->lbk_links); i++) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2528
cfg = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2534
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2539
cfg = rvu_read64(rvu, blkaddr, NIX_AF_SMQX_CFG(smq));
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2541
rvu_write64(rvu, blkaddr, NIX_AF_SMQX_CFG(smq), cfg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2544
err = rvu_poll_reg(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2547
dev_info(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2552
for (i = 0; i < (rvu->hw->cgx_links + rvu->hw->lbk_links); i++) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2555
cfg = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2558
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2563
nix_smq_flush_enadis_rate(rvu, blkaddr, smq_flush_ctx, true);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2564
nix_smq_flush_enadis_xoff(rvu, blkaddr, smq_flush_ctx, false);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2567
rvu_cgx_enadis_rx_bp(rvu, pf, true);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2570
rvu_cgx_config_tx(rvu_cgx_pdata(cgx_id, rvu), lmac_id, false);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2574
static int nix_txschq_free(struct rvu *rvu, u16 pcifunc)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2577
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2582
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2586
nix_hw = get_nix_hw(rvu->hw, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2590
nixlf = rvu_get_lf(rvu, &hw->block[blkaddr], pcifunc, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2595
mutex_lock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
26
static int nix_setup_ipolicers(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2605
nix_reset_tx_linkcfg(rvu, blkaddr, lvl, schq);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2606
nix_clear_tx_xoff(rvu, blkaddr, lvl, schq);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2607
nix_reset_tx_shaping(rvu, blkaddr, nixlf, lvl, schq);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2610
nix_clear_tx_xoff(rvu, blkaddr, NIX_TXSCH_LVL_TL1,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2611
nix_get_tx_link(rvu, pcifunc));
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2618
schq = nix_get_tx_link(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2631
nix_smq_flush(rvu, blkaddr, schq, pcifunc, nixlf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2646
nix_reset_tx_schedule(rvu, blkaddr, lvl, schq);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2651
mutex_unlock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2653
err = rvu_ndc_sync(rvu, blkaddr, nixlf, NIX_AF_NDC_TX_SYNC);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2655
dev_err(rvu->dev, "NDC-TX sync failed for NIXLF %d\n", nixlf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2660
static int nix_txschq_free_one(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2663
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2671
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2675
nix_hw = get_nix_hw(rvu->hw, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2679
nixlf = rvu_get_lf(rvu, &hw->block[blkaddr], pcifunc, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2691
mutex_lock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2702
nix_clear_tx_xoff(rvu, blkaddr, lvl, schq);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2704
nix_reset_tx_linkcfg(rvu, blkaddr, lvl, schq);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2705
nix_reset_tx_shaping(rvu, blkaddr, nixlf, lvl, schq);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2711
nix_smq_flush(rvu, blkaddr, schq, pcifunc, nixlf)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2716
nix_reset_tx_schedule(rvu, blkaddr, lvl, schq);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
272
static void nix_rx_sync(struct rvu *rvu, int blkaddr)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2721
mutex_unlock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2724
mutex_unlock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2728
int rvu_mbox_handler_nix_txsch_free(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2733
return nix_txschq_free(rvu, req->hdr.pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2735
return nix_txschq_free_one(rvu, req);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2738
static bool is_txschq_hierarchy_valid(struct rvu *rvu, u16 pcifunc, int blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2749
if (!is_valid_txschq(rvu, blkaddr, lvl, pcifunc, schq))
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2755
!is_valid_txschq(rvu, blkaddr, NIX_TXSCH_LVL_TL4, pcifunc, parent))
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2760
!is_valid_txschq(rvu, blkaddr, NIX_TXSCH_LVL_TL3, pcifunc, parent))
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2765
!is_valid_txschq(rvu, blkaddr, NIX_TXSCH_LVL_TL2, pcifunc, parent))
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
277
rvu_write64(rvu, blkaddr, NIX_AF_RX_SW_SYNC, BIT_ULL(0));
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2770
!is_valid_txschq(rvu, blkaddr, NIX_TXSCH_LVL_TL1, pcifunc, parent))
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
278
err = rvu_poll_reg(rvu, blkaddr, NIX_AF_RX_SW_SYNC, BIT_ULL(0), true);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
28
static void nix_ipolicer_freemem(struct rvu *rvu, struct nix_hw *nix_hw);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
280
dev_err(rvu->dev, "SYNC1: NIX RX software sync failed\n");
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2817
static void nix_tl1_default_cfg(struct rvu *rvu, struct nix_hw *nix_hw,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2823
schq = nix_get_tx_link(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2828
rvu_write64(rvu, blkaddr, NIX_AF_TL1X_TOPOLOGY(schq),
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2834
if (!rvu->hw->cap.nix_common_dwrr_mtu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2835
rvu_write64(rvu, blkaddr, NIX_AF_TL1X_SCHEDULE(schq),
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2838
rvu_write64(rvu, blkaddr, NIX_AF_TL1X_SCHEDULE(schq),
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2841
rvu_write64(rvu, blkaddr, NIX_AF_TL1X_CIR(schq), 0x00);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2850
static int nix_txschq_cfg_read(struct rvu *rvu, struct nix_hw *nix_hw,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2863
!is_valid_txschq(rvu, blkaddr, req->lvl, pcifunc, schq))
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2865
rsp->regval[idx] = rvu_read64(rvu, blkaddr, reg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2872
void rvu_nix_tx_tl2_cfg(struct rvu *rvu, int blkaddr, u16 pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2875
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2877
u8 pf = rvu_get_pf(rvu->pdev, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
288
rvu_write64(rvu, blkaddr, NIX_AF_RX_SW_SYNC, BIT_ULL(0));
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2881
if (!is_pf_cgxmapped(rvu, pf) && !is_rep_dev(rvu, pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
289
err = rvu_poll_reg(rvu, blkaddr, NIX_AF_RX_SW_SYNC, BIT_ULL(0), true);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2895
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2902
int rvu_mbox_handler_nix_txschq_cfg(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2907
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
291
dev_err(rvu->dev, "SYNC2: NIX RX software sync failed\n");
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2919
err = nix_get_nixlf(rvu, pcifunc, &nixlf, &blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2923
nix_hw = get_nix_hw(rvu->hw, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2928
return nix_txschq_cfg_read(rvu, nix_hw, blkaddr, req, rsp);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2935
mutex_lock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2937
nix_tl1_default_cfg(rvu, nix_hw, pcifunc, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2938
mutex_unlock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
294
static bool is_valid_txschq(struct rvu *rvu, int blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2949
if (!is_txschq_hierarchy_valid(rvu, pcifunc, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2957
val = rvu_read64(rvu, blkaddr, reg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2962
handle_txschq_shaper_update(rvu, blkaddr, nixlf,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2968
nixlf = rvu_get_lf(rvu, &hw->block[blkaddr],
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
297
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2986
mutex_lock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2989
mutex_unlock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
2998
nix_smq_flush(rvu, blkaddr, schq, pcifunc, nixlf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3001
rvu_write64(rvu, blkaddr, reg, regval);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3007
static int nix_rx_vtag_cfg(struct rvu *rvu, int nixlf, int blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
302
nix_hw = get_nix_hw(rvu->hw, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3025
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3030
static int nix_tx_vtag_free(struct rvu *rvu, int blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3033
struct nix_hw *nix_hw = get_nix_hw(rvu->hw, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3043
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3045
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3054
static void nix_free_tx_vtag_entries(struct rvu *rvu, u16 pcifunc)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3060
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3064
nix_hw = get_nix_hw(rvu->hw, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3074
nix_tx_vtag_free(rvu, blkaddr, pcifunc, index);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3079
static int nix_tx_vtag_alloc(struct rvu *rvu, int blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3082
struct nix_hw *nix_hw = get_nix_hw(rvu->hw, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
31
static int nix_free_all_bandprof(struct rvu *rvu, u16 pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3104
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3106
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
311
mutex_lock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3112
static int nix_tx_vtag_decfg(struct rvu *rvu, int blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3115
struct nix_hw *nix_hw = get_nix_hw(rvu->hw, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
313
mutex_unlock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3134
err = nix_tx_vtag_free(rvu, blkaddr, pcifunc, idx0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3140
err = nix_tx_vtag_free(rvu, blkaddr, pcifunc, idx1);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3147
static int nix_tx_vtag_cfg(struct rvu *rvu, int blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3151
struct nix_hw *nix_hw = get_nix_hw(rvu->hw, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3161
nix_tx_vtag_alloc(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
317
if ((nix_get_tx_link(rvu, map_func) !=
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3172
nix_tx_vtag_alloc(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
318
nix_get_tx_link(rvu, pcifunc)) &&
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3185
nix_tx_vtag_free(rvu, blkaddr, pcifunc, rsp->vtag0_idx);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
319
(rvu_get_pf(rvu->pdev, map_func) !=
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3190
int rvu_mbox_handler_nix_vtag_cfg(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3197
err = nix_get_nixlf(rvu, pcifunc, &nixlf, &blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
32
static void nix_clear_ratelimit_aggr(struct rvu *rvu, struct nix_hw *nix_hw,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
320
rvu_get_pf(rvu->pdev, pcifunc)))
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3203
err = nix_rx_vtag_cfg(rvu, nixlf, blkaddr, req);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3213
return nix_tx_vtag_cfg(rvu, blkaddr, req, rsp);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3216
return nix_tx_vtag_decfg(rvu, blkaddr, req);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3222
static int nix_blk_setup_mce(struct rvu *rvu, struct nix_hw *nix_hw,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3244
err = rvu_nix_blk_aq_enq_inst(rvu, nix_hw, &aq_req, NULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3246
dev_err(rvu->dev, "Failed to setup Bcast MCE for PF%d:VF%d\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3247
rvu_get_pf(rvu->pdev, pcifunc),
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3274
static int nix_update_ingress_mce_list_hw(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3296
err = nix_blk_setup_mce(rvu, nix_hw, idx - 1, NIX_AQ_INSTOP_WRITE,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3310
err = nix_blk_setup_mce(rvu, nix_hw, idx, NIX_AQ_INSTOP_WRITE,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
332
static int nix_interface_init(struct rvu *rvu, u16 pcifunc, int type, int nixlf,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3324
static void nix_update_egress_mce_list_hw(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3349
rvu_write64(rvu, nix_hw->blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
335
struct rvu_pfvf *parent_pf, *pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3363
rvu_write64(rvu, nix_hw->blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
337
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3371
static int nix_del_mce_list_entry(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3403
return nix_update_ingress_mce_list_hw(rvu, nix_hw, elem);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3405
nix_update_egress_mce_list_hw(rvu, nix_hw, elem);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3409
static int nix_add_mce_list_entry(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3439
return nix_update_ingress_mce_list_hw(rvu, nix_hw, elem);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
344
pf = rvu_get_pf(rvu->pdev, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3441
nix_update_egress_mce_list_hw(rvu, nix_hw, elem);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
345
if (!is_pf_cgxmapped(rvu, pf) && type != NIX_INTF_TYPE_LBK &&
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3496
int nix_update_mce_list(struct rvu *rvu, u16 pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
35
static int nix_get_tx_link(struct rvu *rvu, u16 pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3501
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
351
pfvf->cgx_lmac = rvu->pf2cgxlmac_map[pf];
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3513
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3516
rvu_get_pf(rvu->pdev, pcifunc));
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3520
err = nix_get_struct_ptrs(rvu, pcifunc, &nix_hw, &blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3533
npc_blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3534
npc_enable_mcam_entry(rvu, mcam, npc_blkaddr, mcam_index, false);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
354
pkind = rvu_npc_get_pkind(rvu, pf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3547
err = nix_blk_setup_mce(rvu, nix_hw, idx, NIX_AQ_INSTOP_WRITE,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
356
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3561
void nix_get_mce_list(struct rvu *rvu, u16 pcifunc, int type,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3564
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3568
!is_pf_cgxmapped(rvu, rvu_get_pf(rvu->pdev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3576
pfvf = rvu_get_pfvf(rvu, pcifunc & ~RVU_PFVF_FUNC_MASK);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3593
static int nix_update_mce_rule(struct rvu *rvu, u16 pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3597
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3598
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
360
pfvf->rx_chan_base = rvu_nix_chan_cgx(rvu, cgx_id, lmac_id, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3603
if (is_lbk_vf(rvu, pcifunc) || is_sdp_pfvf(rvu, pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3609
pf = rvu_get_pf(rvu->pdev, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3610
if (!is_pf_cgxmapped(rvu, pf))
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3613
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3617
nixlf = rvu_get_lf(rvu, &hw->block[blkaddr], pcifunc, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3621
nix_get_mce_list(rvu, pcifunc, type, &mce_list, &mce_idx);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3629
err = nix_update_mce_list(rvu, pcifunc, mce_list,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3644
static int nix_setup_mce_tables(struct rvu *rvu, struct nix_hw *nix_hw)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3653
for (pf = 1; pf < (rvu->cgx_mapped_pfs + 1); pf++) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3654
cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(pf));
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
366
if (rvu_cgx_check_permission_and_set_pkind(rvu, pcifunc, pkind))
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3661
pfvf = &rvu->pf[pf];
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
367
rvu_npc_set_pkind(rvu, pkind, pfvf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3681
pcifunc = rvu_make_pcifunc(rvu->pdev, pf, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3688
err = nix_blk_setup_mce(rvu, nix_hw,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3696
err = nix_blk_setup_mce(rvu, nix_hw,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3704
err = nix_blk_setup_mce(rvu, nix_hw,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3715
static int nix_setup_mcast(struct rvu *rvu, struct nix_hw *nix_hw, int blkaddr)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3718
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3721
size = (rvu_read64(rvu, blkaddr, NIX_AF_CONST3) >> 16) & 0x0F;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3739
err = qmem_alloc(rvu->dev, &mcast->mce_ctx,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3747
rvu_write64(rvu, blkaddr, NIX_AF_RX_MCAST_BASE,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3751
rvu_write64(rvu, blkaddr, NIX_AF_RX_MCAST_CFG,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3755
size = rvu_read64(rvu, blkaddr, NIX_AF_MC_MIRROR_CONST) & 0xFFFF;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3756
err = qmem_alloc(rvu->dev, &mcast->mcast_buf,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3764
rvu_write64(rvu, blkaddr, NIX_AF_RX_MCAST_BUF_BASE,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3770
rvu_write64(rvu, blkaddr, NIX_AF_RX_MCAST_BUF_CFG,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3778
return nix_setup_mce_tables(rvu, nix_hw);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3781
static int nix_setup_txvlan(struct rvu *rvu, struct nix_hw *nix_hw)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
379
if (rvu->hw->lbk_links > 1)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3793
vlan->entry2pfvf_map = devm_kcalloc(rvu->dev, vlan->rsrc.max,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3806
static int nix_setup_txschq(struct rvu *rvu, struct nix_hw *nix_hw, int blkaddr)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3835
cfg = rvu_read64(rvu, blkaddr, reg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3844
txsch->pfvf_map = devm_kcalloc(rvu->dev, txsch->schq.max,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3853
if (rvu->hw->cap.nix_common_dwrr_mtu ||
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3854
rvu->hw->cap.nix_multiple_dwrr_mtu) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3855
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3856
nix_get_dwrr_mtu_reg(rvu->hw, SMQ_LINK_TYPE_RPM),
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3858
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3859
nix_get_dwrr_mtu_reg(rvu->hw, SMQ_LINK_TYPE_LBK),
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3861
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3862
nix_get_dwrr_mtu_reg(rvu->hw, SMQ_LINK_TYPE_SDP),
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3869
int rvu_nix_reserve_mark_format(struct rvu *rvu, struct nix_hw *nix_hw,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3881
rvu_write64(rvu, blkaddr, NIX_AF_MARK_FORMATX_CTL(fmt_idx), cfg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3887
static int nix_af_mark_format_setup(struct rvu *rvu, struct nix_hw *nix_hw,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3904
total = (rvu_read64(rvu, blkaddr, NIX_AF_PSE_CONST) & 0xFF00) >> 8;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3906
nix_hw->mark_format.cfg = devm_kcalloc(rvu->dev, total, sizeof(u32),
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3911
rc = rvu_nix_reserve_mark_format(rvu, nix_hw, blkaddr, cfgs[i]);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3913
dev_err(rvu->dev, "Err %d in setup mark format %d\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3920
static void rvu_get_lbk_link_max_frs(struct rvu *rvu, u16 *max_mtu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3923
if (rvu->hw->lbk_bufsize == 0x12000)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3929
static void rvu_get_lmac_link_max_frs(struct rvu *rvu, u16 *max_mtu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3931
int fifo_size = rvu_cgx_get_fifolen(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3942
int rvu_mbox_handler_nix_get_hw_info(struct rvu *rvu, struct msg_req *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3949
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3953
if (is_lbk_vf(rvu, pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3954
rvu_get_lbk_link_max_frs(rvu, &rsp->max_mtu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3956
rvu_get_lmac_link_max_frs(rvu, &rsp->max_mtu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3960
if (!rvu->hw->cap.nix_common_dwrr_mtu &&
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3961
!rvu->hw->cap.nix_multiple_dwrr_mtu) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3970
dwrr_mtu = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3971
nix_get_dwrr_mtu_reg(rvu->hw, SMQ_LINK_TYPE_RPM));
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3974
dwrr_mtu = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3975
nix_get_dwrr_mtu_reg(rvu->hw, SMQ_LINK_TYPE_SDP));
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3978
dwrr_mtu = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3979
nix_get_dwrr_mtu_reg(rvu->hw, SMQ_LINK_TYPE_LBK));
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3985
int rvu_mbox_handler_nix_stats_rst(struct rvu *rvu, struct msg_req *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3992
err = nix_get_nixlf(rvu, pcifunc, &nixlf, &blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
3997
stats = rvu_read64(rvu, blkaddr, NIX_AF_CONST1);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4001
rvu_write64(rvu, blkaddr, NIX_AF_LFX_TX_STATX(nixlf, i), 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4005
rvu_write64(rvu, blkaddr, NIX_AF_LFX_RX_STATX(nixlf, i), 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
405
pfvf->rx_chan_base = rvu_nix_chan_lbk(rvu, lbkid, vf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
407
rvu_nix_chan_lbk(rvu, lbkid, vf - 1) :
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
408
rvu_nix_chan_lbk(rvu, lbkid, vf + 1);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
413
rvu_npc_set_pkind(rvu, NPC_RX_LBK_PKIND, pfvf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
414
rvu_npc_install_promisc_entry(rvu, pcifunc, nixlf,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
421
parent_pf = &rvu->pf[rvu_get_pf(rvu->pdev, pcifunc)];
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
424
dev_err(rvu->dev, "Invalid sdp_info pointer\n");
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
428
req_chan_base = rvu_nix_chan_sdp(rvu, 0) + sdp_info->pf_srn +
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
435
if (req_chan_base < rvu_nix_chan_sdp(rvu, 0) ||
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4355
static int reserve_flowkey_alg_idx(struct rvu *rvu, int blkaddr, u32 flow_cfg)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
436
req_chan_end > rvu_nix_chan_sdp(rvu, 255)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4361
hw = get_nix_hw(rvu->hw, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
437
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4376
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4388
int rvu_mbox_handler_nix_rss_flowkey_cfg(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4397
err = nix_get_nixlf(rvu, pcifunc, &nixlf, &blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4401
nix_hw = get_nix_hw(rvu->hw, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4408
alg_idx = reserve_flowkey_alg_idx(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4414
rvu_npc_update_flowkey_alg_idx(rvu, pcifunc, nixlf, req->group,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4419
static int nix_rx_flowkey_alg_cfg(struct rvu *rvu, int blkaddr)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4427
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
443
req_chan_base = rvu_nix_chan_sdp(rvu, 0) + sdp_info->pf_srn;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4434
rc = reserve_flowkey_alg_idx(rvu, blkaddr, flowkey_cfg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4441
rc = reserve_flowkey_alg_idx(rvu, blkaddr, flowkey_cfg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4447
rc = reserve_flowkey_alg_idx(rvu, blkaddr, flowkey_cfg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4453
rc = reserve_flowkey_alg_idx(rvu, blkaddr, flowkey_cfg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4460
rc = reserve_flowkey_alg_idx(rvu, blkaddr, flowkey_cfg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4467
rc = reserve_flowkey_alg_idx(rvu, blkaddr, flowkey_cfg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4474
rc = reserve_flowkey_alg_idx(rvu, blkaddr, flowkey_cfg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4481
rc = reserve_flowkey_alg_idx(rvu, blkaddr, flowkey_cfg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4488
int rvu_mbox_handler_nix_set_mac_addr(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4497
err = nix_get_nixlf(rvu, pcifunc, &nixlf, &blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4501
pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4506
dev_warn(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4513
rvu_npc_install_ucast_entry(rvu, pcifunc, nixlf,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4522
int rvu_mbox_handler_nix_get_mac_addr(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4529
if (!is_nixlf_attached(rvu, pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
453
rvu_npc_install_promisc_entry(rvu, pcifunc, nixlf,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4532
pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4539
int rvu_mbox_handler_nix_set_rx_mode(struct rvu *rvu, struct nix_rx_mode *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4547
pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4552
nix_rx_multicast = rvu->hw->cap.nix_rx_multicast & pfvf->use_mce_list;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4556
dev_warn_ratelimited(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4566
err = nix_get_nixlf(rvu, pcifunc, &nixlf, NULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4572
err = nix_update_mce_rule(rvu, pcifunc, NIXLF_ALLMULTI_ENTRY,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4575
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4582
err = nix_update_mce_rule(rvu, pcifunc, NIXLF_PROMISC_ENTRY,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4585
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4594
rvu_npc_install_allmulti_entry(rvu, pcifunc, nixlf,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4598
rvu_npc_enable_allmulti_entry(rvu, pcifunc, nixlf, false);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4603
rvu_npc_install_promisc_entry(rvu, pcifunc, nixlf,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4608
rvu_npc_enable_promisc_entry(rvu, pcifunc, nixlf, false);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4613
static void nix_find_link_frs(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4616
int pf = rvu_get_pf(rvu->pdev, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
462
rvu_npc_install_ucast_entry(rvu, pcifunc, nixlf,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4623
pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4632
rvu_get_pf_numvfs(rvu, pf, &numvfs, &hwvf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4636
pfvf = &rvu->hwvf[hwvf + vf];
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4645
pfvf = &rvu->pf[pf];
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4658
int rvu_mbox_handler_nix_set_hw_frs(struct rvu *rvu, struct nix_frs_cfg *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
466
err = nix_update_mce_rule(rvu, pcifunc, NIXLF_BCAST_ENTRY, true);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4661
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4663
int pf = rvu_get_pf(rvu->pdev, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4671
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4675
nix_hw = get_nix_hw(rvu->hw, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4679
if (is_lbk_vf(rvu, pcifunc) || is_rep_dev(rvu, pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
468
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4680
rvu_get_lbk_link_max_frs(rvu, &max_mtu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4682
rvu_get_lmac_link_max_frs(rvu, &max_mtu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4699
if (is_pf_cgxmapped(rvu, pf)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4701
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx, &lmac);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4705
pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4707
} else if (is_rep_dev(rvu, pcifunc)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4715
nix_find_link_frs(rvu, req, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4717
cfg = rvu_read64(rvu, blkaddr, NIX_AF_RX_LINKX_CFG(link));
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4721
rvu_write64(rvu, blkaddr, NIX_AF_RX_LINKX_CFG(link), cfg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4726
int rvu_mbox_handler_nix_set_rx_cfg(struct rvu *rvu, struct nix_rx_cfg *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4732
err = nix_get_nixlf(rvu, req->hdr.pcifunc, &nixlf, &blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4736
cfg = rvu_read64(rvu, blkaddr, NIX_AF_LFX_RX_CFG(nixlf));
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
474
rvu_npc_install_bcast_match_entry(rvu, pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4758
rvu_write64(rvu, blkaddr, NIX_AF_LFX_RX_CFG(nixlf), cfg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4763
static u64 rvu_get_lbk_link_credits(struct rvu *rvu, u16 lbk_max_frs)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4768
static void nix_link_config(struct rvu *rvu, int blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4771
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4779
rvu_get_lbk_link_max_frs(rvu, &lbk_max_frs);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4780
rvu_get_lmac_link_max_frs(rvu, &lmac_max_frs);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4783
rvu_write64(rvu, blkaddr, NIX_AF_SDP_LINK_CREDIT, SDP_LINK_CREDIT);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4792
rvu_write64(rvu, blkaddr, NIX_AF_RX_LINKX_CFG(link),
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4797
rvu_write64(rvu, blkaddr, NIX_AF_RX_LINKX_CFG(link),
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4802
rvu_write64(rvu, blkaddr, NIX_AF_RX_LINKX_CFG(link),
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4816
lmac_cnt = cgx_get_lmac_cnt(rvu_cgx_pdata(cgx, rvu));
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4823
lmac_bmap = cgx_get_lmac_bmap(rvu_cgx_pdata(cgx, rvu));
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4824
for_each_set_bit(iter, &lmac_bmap, rvu->hw->lmac_per_cgx) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4825
lmac_fifo_len = rvu_cgx_get_lmac_fifolen(rvu, cgx, iter);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4827
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
483
static void nix_interface_deinit(struct rvu *rvu, u16 pcifunc, u8 nixlf)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4839
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4847
tx_credits = rvu_get_lbk_link_credits(rvu, lbk_max_frs);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
485
struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4851
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4856
static int nix_calibrate_x2p(struct rvu *rvu, int blkaddr)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4862
rvu_write64(rvu, blkaddr, NIX_AF_CFG,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4863
rvu_read64(rvu, blkaddr, NIX_AF_CFG) | BIT_ULL(9));
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4865
err = rvu_poll_reg(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4868
dev_err(rvu->dev, "NIX X2P bus calibration failed\n");
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4872
status = rvu_read64(rvu, blkaddr, NIX_AF_STATUS);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4874
for (idx = 0; idx < rvu->cgx_cnt_max; idx++) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4876
if (!rvu_cgx_pdata(idx, rvu) ||
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4879
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4886
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4892
rvu_write64(rvu, blkaddr, NIX_AF_CFG,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4893
rvu_read64(rvu, blkaddr, NIX_AF_CFG) & ~BIT_ULL(9));
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4895
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4902
static int nix_aq_init(struct rvu *rvu, struct rvu_block *block)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4908
cfg = rvu_read64(rvu, block->addr, NIX_AF_CFG);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4911
rvu_write64(rvu, block->addr, NIX_AF_CFG, cfg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4914
rvu_write64(rvu, block->addr, NIX_AF_CFG, cfg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4918
cfg = rvu_read64(rvu, block->addr, NIX_AF_NDC_CFG);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
492
err = nix_update_mce_rule(rvu, pcifunc, NIXLF_BCAST_ENTRY, false);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4924
rvu_write64(rvu, block->addr, NIX_AF_NDC_CFG, cfg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4930
err = rvu_aq_alloc(rvu, &block->aq,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4936
rvu_write64(rvu, block->addr, NIX_AF_AQ_CFG, AQ_SIZE);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4937
rvu_write64(rvu, block->addr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
494
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4942
static void rvu_nix_setup_capabilities(struct rvu *rvu, int blkaddr)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4944
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4947
hw_const = rvu_read64(rvu, blkaddr, NIX_AF_CONST1);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4967
static int rvu_nix_block_init(struct rvu *rvu, struct nix_hw *nix_hw)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4970
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4978
if (is_rvu_96xx_B0(rvu)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4983
rvu_write64(rvu, blkaddr, NIX_AF_CFG,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4984
rvu_read64(rvu, blkaddr, NIX_AF_CFG) | 0x40ULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4988
rvu_write64(rvu, blkaddr, NIX_AF_PSE_CHANNEL_LEVEL, 0x01);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
4996
cfg = rvu_read64(rvu, blkaddr, NIX_AF_SQM_DBG_CTL_STATUS);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
500
rvu_npc_disable_mcam_entries(rvu, pcifunc, nixlf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5002
rvu_write64(rvu, blkaddr, NIX_AF_SQM_DBG_CTL_STATUS, cfg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5004
ltdefs = rvu->kpu.lt_def;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5006
err = nix_calibrate_x2p(rvu, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5011
rvu_nix_setup_capabilities(rvu, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5014
err = nix_aq_init(rvu, block);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5019
rvu_write64(rvu, blkaddr, NIX_AF_CINT_DELAY, 0x0ULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5021
cfg = rvu_read64(rvu, blkaddr, NIX_AF_SEB_CFG);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5025
if (!is_rvu_otx2(rvu))
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5028
rvu_write64(rvu, blkaddr, NIX_AF_SEB_CFG, cfg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
503
rvu_cgx_disable_dmac_entries(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5030
if (!is_rvu_otx2(rvu))
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5031
rvu_nix_block_cn10k_init(rvu, nix_hw);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5034
err = nix_setup_txschq(rvu, nix_hw, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5038
err = nix_setup_ipolicers(rvu, nix_hw, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5042
err = nix_af_mark_format_setup(rvu, nix_hw, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5046
err = nix_setup_mcast(rvu, nix_hw, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5050
err = nix_setup_txvlan(rvu, nix_hw);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5054
err = nix_setup_bpids(rvu, nix_hw, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5059
nix_setup_lso(rvu, nix_hw, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5065
rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_OL2,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5068
rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_OIP4,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5071
rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_IIP4,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5074
rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_OIP6,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5077
rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_IIP6,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
508
static int nix_setup_bpids(struct rvu *rvu, struct nix_hw *hw, int blkaddr)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5080
rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_OTCP,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5083
rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_ITCP,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5086
rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_OUDP,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5089
rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_IUDP,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5092
rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_OSCTP,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5095
rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_ISCTP,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5099
if (!is_rvu_otx2(rvu)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5103
rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_CST_APAD0,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5108
rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_CST_APAD1,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5119
rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_ET(0),
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5125
rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_ET(1),
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5133
err = nix_rx_flowkey_alg_cfg(rvu, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
514
cfg = rvu_read64(rvu, blkaddr, NIX_AF_CONST1);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5143
nix_link_config(rvu, blkaddr, nix_hw);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5146
rvu_write64(rvu, blkaddr, NIX_AF_RX_CFG, BIT_ULL(0));
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5151
int rvu_nix_init(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5153
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5158
hw->nix = devm_kcalloc(rvu->dev, MAX_NIX_BLKS, sizeof(struct nix_hw),
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5163
blkaddr = rvu_get_next_nix_blkaddr(rvu, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5166
nix_hw->rvu = rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5168
err = rvu_nix_block_init(rvu, nix_hw);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5171
blkaddr = rvu_get_next_nix_blkaddr(rvu, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5178
static void rvu_nix_block_freemem(struct rvu *rvu, int blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
518
bp->cgx_bpid_cnt = rvu->hw->cgx_links * NIX_BPIDS_PER_LMAC;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5187
rvu_aq_free(rvu, block->aq);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5189
if (is_block_implemented(rvu->hw, blkaddr)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
519
bp->sdp_bpid_cnt = rvu->hw->sdp_links * FIELD_GET(NIX_CONST_SDP_CHANS, cfg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5190
nix_hw = get_nix_hw(rvu->hw, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5201
nix_ipolicer_freemem(rvu, nix_hw);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5208
qmem_free(rvu->dev, mcast->mce_ctx);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5209
qmem_free(rvu->dev, mcast->mcast_buf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5214
void rvu_nix_freemem(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5216
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5220
blkaddr = rvu_get_next_nix_blkaddr(rvu, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5223
rvu_nix_block_freemem(rvu, blkaddr, block);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5224
blkaddr = rvu_get_next_nix_blkaddr(rvu, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5228
static void nix_mcast_update_action(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5231
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5236
npc_blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5238
*(u64 *)&rx_action = npc_get_mcam_action(rvu, mcam,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5242
npc_set_mcam_action(rvu, mcam, npc_blkaddr, elem->mcam_index,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5245
*(u64 *)&tx_action = npc_get_mcam_action(rvu, mcam,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5249
npc_set_mcam_action(rvu, mcam, npc_blkaddr, elem->mcam_index,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5254
static void nix_mcast_update_mce_entry(struct rvu *rvu, u16 pcifunc, u8 is_active)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5261
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5262
nix_hw = get_nix_hw(rvu->hw, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
528
bp->fn_map = devm_kcalloc(rvu->dev, bp->bpids.max,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5286
nix_update_ingress_mce_list_hw(rvu, nix_hw, elem);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5288
nix_update_egress_mce_list_hw(rvu, nix_hw, elem);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5291
nix_mcast_update_action(rvu, elem);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5296
int rvu_mbox_handler_nix_lf_start_rx(struct rvu *rvu, struct msg_req *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5303
err = nix_get_nixlf(rvu, pcifunc, &nixlf, NULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5308
nix_mcast_update_mce_entry(rvu, pcifunc, 1);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5310
rvu_npc_enable_default_entries(rvu, pcifunc, nixlf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5312
npc_mcam_enable_flows(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5314
pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5317
rvu_switch_update_rules(rvu, pcifunc, true);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5319
pf = rvu_get_pf(rvu->pdev, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5320
if (is_pf_cgxmapped(rvu, pf) && rvu->rep_mode)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5321
rvu_rep_notify_pfvf_state(rvu, pcifunc, true);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5323
return rvu_cgx_start_stop_io(rvu, pcifunc, true);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5326
int rvu_mbox_handler_nix_lf_stop_rx(struct rvu *rvu, struct msg_req *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
533
bp->intf_map = devm_kcalloc(rvu->dev, bp->bpids.max,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5333
err = nix_get_nixlf(rvu, pcifunc, &nixlf, NULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5337
rvu_npc_disable_mcam_entries(rvu, pcifunc, nixlf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5339
nix_mcast_update_mce_entry(rvu, pcifunc, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5341
pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5344
err = rvu_cgx_start_stop_io(rvu, pcifunc, false);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5348
rvu_switch_update_rules(rvu, pcifunc, false);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5349
rvu_cgx_tx_enable(rvu, pcifunc, true);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5351
pf = rvu_get_pf(rvu->pdev, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5352
if (is_pf_cgxmapped(rvu, pf) && rvu->rep_mode)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5353
rvu_rep_notify_pfvf_state(rvu, pcifunc, false);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5359
void rvu_nix_lf_teardown(struct rvu *rvu, u16 pcifunc, int blkaddr, int nixlf)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5361
struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5363
int pf = rvu_get_pf(rvu->pdev, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5373
rvu_npc_disable_mcam_entries(rvu, pcifunc, nixlf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5374
rvu_npc_free_mcam_entries(rvu, pcifunc, nixlf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5375
nix_interface_deinit(rvu, pcifunc, nixlf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5376
nix_rx_sync(rvu, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5377
nix_txschq_free(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
538
bp->ref_cnt = devm_kcalloc(rvu->dev, bp->bpids.max,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5381
if (is_pf_cgxmapped(rvu, pf) && rvu->rep_mode)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5382
rvu_rep_notify_pfvf_state(rvu, pcifunc, false);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5384
rvu_cgx_start_stop_io(rvu, pcifunc, false);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5388
err = nix_lf_hwctx_disable(rvu, &ctx_req);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5390
dev_err(rvu->dev, "SQ ctx disable failed\n");
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5395
err = nix_lf_hwctx_disable(rvu, &ctx_req);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5397
dev_err(rvu->dev, "RQ ctx disable failed\n");
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5402
err = nix_lf_hwctx_disable(rvu, &ctx_req);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5404
dev_err(rvu->dev, "CQ ctx disable failed\n");
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5408
rvu_npc_set_parse_mode(rvu, pcifunc, OTX2_PRIV_FLAGS_DEFAULT,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5413
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5414
cgxd = rvu_cgx_pdata(cgx_id, rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5418
if (npc_config_ts_kpuaction(rvu, pf, pcifunc, false))
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5419
dev_err(rvu->dev, "NPC config for PTP failed\n");
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5424
rvu_cgx_prio_flow_ctrl_cfg(rvu, pcifunc, 0, 0, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5427
rvu_cgx_cfg_pause_frm(rvu, pcifunc, 0, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5429
nix_ctx_free(rvu, pfvf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5431
nix_free_all_bandprof(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5433
sa_base = rvu_read64(rvu, blkaddr, NIX_AF_LFX_RX_IPSEC_SA_BASE(nixlf));
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5435
err = rvu_cpt_ctx_flush(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5437
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5444
static int rvu_nix_lf_ptp_tx_cfg(struct rvu *rvu, u16 pcifunc, bool enable)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5446
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5452
pf = rvu_get_pf(rvu->pdev, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5453
if (!is_mac_feature_supported(rvu, pf, RVU_LMAC_FEAT_PTP))
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5456
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5461
nixlf = rvu_get_lf(rvu, block, pcifunc, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5465
cfg = rvu_read64(rvu, blkaddr, NIX_AF_LFX_TX_CFG(nixlf));
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5472
rvu_write64(rvu, blkaddr, NIX_AF_LFX_TX_CFG(nixlf), cfg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5477
int rvu_mbox_handler_nix_lf_ptp_tx_enable(struct rvu *rvu, struct msg_req *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5480
return rvu_nix_lf_ptp_tx_cfg(rvu, req->hdr.pcifunc, true);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5483
int rvu_mbox_handler_nix_lf_ptp_tx_disable(struct rvu *rvu, struct msg_req *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5486
return rvu_nix_lf_ptp_tx_cfg(rvu, req->hdr.pcifunc, false);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5489
int rvu_mbox_handler_nix_lso_format_cfg(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5499
pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5500
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5504
nix_hw = get_nix_hw(rvu->hw, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
551
void rvu_nix_flr_free_bpids(struct rvu *rvu, u16 pcifunc)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5511
reg = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5533
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5553
static void nix_inline_ipsec_cfg(struct rvu *rvu, struct nix_inline_ipsec_cfg *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5563
if (!is_rvu_otx2(rvu))
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
557
if (!is_lbk_vf(rvu, pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5572
rvu_write64(rvu, blkaddr, NIX_AF_RX_IPSEC_GEN_CFG, val);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5579
if (!is_rvu_otx2(rvu)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5585
rvu_write64(rvu, blkaddr, NIX_AF_RX_CPTX_INST_QSEL(cpt_idx),
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5589
val = rvu_read64(rvu, blkaddr, NIX_AF_RX_CPTX_CREDIT(cpt_idx));
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5591
rvu_write64(rvu, blkaddr, NIX_AF_RX_CPTX_CREDIT(cpt_idx),
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5597
rvu_write64(rvu, blkaddr, NIX_AF_RX_CPTX_CREDIT(cpt_idx), val);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5599
rvu_write64(rvu, blkaddr, NIX_AF_RX_IPSEC_GEN_CFG, 0x0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
560
err = nix_get_struct_ptrs(rvu, pcifunc, &nix_hw, &blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5600
rvu_write64(rvu, blkaddr, NIX_AF_RX_CPTX_INST_QSEL(cpt_idx),
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5602
val = rvu_read64(rvu, blkaddr, NIX_AF_RX_CPTX_CREDIT(cpt_idx));
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5604
rvu_write64(rvu, blkaddr, NIX_AF_RX_CPTX_CREDIT(cpt_idx),
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5609
int rvu_mbox_handler_nix_inline_ipsec_cfg(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5613
if (!is_block_implemented(rvu->hw, BLKADDR_CPT0))
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5616
nix_inline_ipsec_cfg(rvu, req, BLKADDR_NIX0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5617
if (is_block_implemented(rvu->hw, BLKADDR_CPT1))
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5618
nix_inline_ipsec_cfg(rvu, req, BLKADDR_NIX1);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5623
int rvu_mbox_handler_nix_read_inline_ipsec_cfg(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5630
if (!is_block_implemented(rvu->hw, BLKADDR_CPT0))
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5633
val = rvu_read64(rvu, BLKADDR_NIX0, NIX_AF_RX_IPSEC_GEN_CFG);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5639
val = rvu_read64(rvu, BLKADDR_NIX0, NIX_AF_RX_CPTX_CREDIT(0));
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5647
int rvu_mbox_handler_nix_inline_ipsec_lf_cfg(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5654
if (!is_block_implemented(rvu->hw, BLKADDR_CPT0))
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5657
err = nix_get_nixlf(rvu, req->hdr.pcifunc, &lf, &blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
566
mutex_lock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5671
rvu_write64(rvu, blkaddr, NIX_AF_LFX_RX_IPSEC_CFG0(lf), val);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5676
rvu_write64(rvu, blkaddr, NIX_AF_LFX_RX_IPSEC_CFG1(lf), val);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5679
rvu_write64(rvu, blkaddr, NIX_AF_LFX_RX_IPSEC_SA_BASE(lf),
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5682
rvu_write64(rvu, blkaddr, NIX_AF_LFX_RX_IPSEC_CFG0(lf), 0x0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5683
rvu_write64(rvu, blkaddr, NIX_AF_LFX_RX_IPSEC_CFG1(lf), 0x0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5684
rvu_write64(rvu, blkaddr, NIX_AF_LFX_RX_IPSEC_SA_BASE(lf),
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5701
static void nix_config_rx_pkt_policer_precolor(struct rvu *rvu, int blkaddr)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5706
memcpy(ltdefs, rvu->kpu.lt_def, sizeof(struct npc_lt_def_cfg));
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5713
rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_VLAN0_PCP_DEI,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5717
rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_VLAN1_PCP_DEI,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5723
rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_OIP4_DSCP,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5727
rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_IIP4_DSCP,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5733
rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_OIP6_DSCP,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5737
rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_IIP6_DSCP,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5743
static int nix_init_policer_context(struct rvu *rvu, struct nix_hw *nix_hw,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5756
rc = rvu_nix_blk_aq_enq_inst(rvu, nix_hw,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5759
dev_err(rvu->dev, "Failed to INIT bandwidth profile layer %d profile %d\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
576
mutex_unlock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5764
static int nix_setup_ipolicers(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5767
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5772
cfg = rvu_read64(rvu, blkaddr, NIX_AF_CONST);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5779
nix_hw->ipolicer = devm_kcalloc(rvu->dev, BAND_PROF_NUM_LAYERS,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5784
cfg = rvu_read64(rvu, blkaddr, NIX_AF_PL_CONST);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5807
ipolicer->pfvf_map = devm_kcalloc(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5813
ipolicer->match_id = devm_kcalloc(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5829
err = nix_init_policer_context(rvu, nix_hw,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5842
ipolicer->ref_count = devm_kcalloc(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5850
rvu_write64(rvu, blkaddr, NIX_AF_PL_TS, 19);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5852
nix_config_rx_pkt_policer_precolor(rvu, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5857
static void nix_ipolicer_freemem(struct rvu *rvu, struct nix_hw *nix_hw)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5862
if (!rvu->hw->cap.ipolicer)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
587
static int nix_bp_disable(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5924
int rvu_mbox_handler_nix_bandprof_alloc(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5933
if (!rvu->hw->cap.ipolicer)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5936
err = nix_get_struct_ptrs(rvu, pcifunc, &nix_hw, &blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5940
mutex_lock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5961
mutex_unlock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5965
static int nix_free_all_bandprof(struct rvu *rvu, u16 pcifunc)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5971
if (!rvu->hw->cap.ipolicer)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5974
err = nix_get_struct_ptrs(rvu, pcifunc, &nix_hw, &blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5978
mutex_lock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5992
nix_clear_ratelimit_aggr(rvu, nix_hw, prof_idx);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
5999
mutex_unlock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
600
pf = rvu_get_pf(rvu->pdev, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6003
int rvu_mbox_handler_nix_bandprof_free(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
601
type = is_lbk_vf(rvu, pcifunc) ? NIX_INTF_TYPE_LBK : NIX_INTF_TYPE_CGX;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6013
return nix_free_all_bandprof(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6015
if (!rvu->hw->cap.ipolicer)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6018
err = nix_get_struct_ptrs(rvu, pcifunc, &nix_hw, &blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
602
if (!is_pf_cgxmapped(rvu, pf) && type != NIX_INTF_TYPE_LBK)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6022
mutex_lock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6042
nix_clear_ratelimit_aggr(rvu, nix_hw, prof_idx);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6049
mutex_unlock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
605
if (is_sdp_pfvf(rvu, pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6053
int nix_aq_context_read(struct rvu *rvu, struct nix_hw *nix_hw,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6064
return rvu_nix_blk_aq_enq_inst(rvu, nix_hw,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6069
static int nix_ipolicer_map_leaf_midprofs(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
608
if (cpt_link && !rvu->hw->cpt_links)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6088
return rvu_nix_blk_aq_enq_inst(rvu, nix_hw,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6095
int rvu_nix_setup_ratelimit_aggr(struct rvu *rvu, u16 pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6105
if (!rvu->hw->cap.ipolicer)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6108
rc = nix_get_struct_ptrs(rvu, pcifunc, &nix_hw, &blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
611
pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6113
rc = nix_aq_context_read(rvu, nix_hw, &aq_req, &aq_rsp, pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6116
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
612
err = nix_get_struct_ptrs(rvu, pcifunc, &nix_hw, &blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6149
rc = nix_aq_context_read(rvu, nix_hw, &aq_req, &aq_rsp, 0x00,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6152
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6169
rc = nix_ipolicer_map_leaf_midprofs(rvu, nix_hw,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6173
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6179
mutex_lock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6181
mutex_unlock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6188
mutex_lock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6191
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6193
mutex_unlock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6196
mutex_unlock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
620
cfg = rvu_read64(rvu, blkaddr, NIX_AF_RX_CHANX_CFG(chan_v));
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6201
rc = nix_aq_context_read(rvu, nix_hw, &aq_req, &aq_rsp, 0x00,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6204
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
621
rvu_write64(rvu, blkaddr, NIX_AF_RX_CHANX_CFG(chan_v),
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6221
rc = rvu_nix_blk_aq_enq_inst(rvu, nix_hw,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6224
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6231
rc = nix_ipolicer_map_leaf_midprofs(rvu, nix_hw,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6235
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6241
mutex_lock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6243
mutex_unlock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6245
rc = nix_ipolicer_map_leaf_midprofs(rvu, nix_hw,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6249
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6256
mutex_lock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6258
mutex_unlock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
626
mutex_lock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6265
static void nix_clear_ratelimit_aggr(struct rvu *rvu, struct nix_hw *nix_hw,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6274
mutex_unlock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6276
rc = nix_aq_context_read(rvu, nix_hw, &aq_req, &aq_rsp, 0x00,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6279
mutex_lock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6281
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6301
int rvu_mbox_handler_nix_bandprof_get_hwinfo(struct rvu *rvu, struct msg_req *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6309
if (!rvu->hw->cap.ipolicer)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6312
err = nix_get_struct_ptrs(rvu, req->hdr.pcifunc, &nix_hw, &blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6317
mutex_lock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6325
mutex_unlock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6328
tu = rvu_read64(rvu, blkaddr, NIX_AF_PL_TS) & GENMASK_ULL(9, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
634
mutex_unlock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6353
int rvu_nix_mcast_get_mce_index(struct rvu *rvu, u16 pcifunc, u32 mcast_grp_idx)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6360
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6361
nix_hw = get_nix_hw(rvu->hw, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6377
void rvu_nix_mcast_flr_free_entries(struct rvu *rvu, u16 pcifunc)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6387
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6388
nix_hw = get_nix_hw(rvu->hw, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
640
int rvu_mbox_handler_nix_bp_disable(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6408
rvu_mbox_handler_nix_mcast_grp_destroy(rvu, &dreq, NULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6424
rvu_mbox_handler_nix_mcast_grp_update(rvu, &ureq, &ursp);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6432
int rvu_nix_mcast_update_mcam_entry(struct rvu *rvu, u16 pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
644
return nix_bp_disable(rvu, req, rsp, false);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6440
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6441
nix_hw = get_nix_hw(rvu->hw, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6457
int rvu_mbox_handler_nix_mcast_grp_create(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6466
err = nix_get_struct_ptrs(rvu, req->hdr.pcifunc, &nix_hw, &blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
647
int rvu_mbox_handler_nix_cpt_bp_disable(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6491
int rvu_mbox_handler_nix_mcast_grp_destroy(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6503
err = nix_get_struct_ptrs(rvu, req->hdr.pcifunc, &nix_hw, &blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
651
return nix_bp_disable(rvu, req, rsp, true);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6535
rvu_mbox_handler_npc_delete_flow(rvu, &uninstall_req, &uninstall_rsp);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
654
static int rvu_nix_get_bpid(struct rvu *rvu, struct nix_bp_cfg_req *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6555
int rvu_mbox_handler_nix_mcast_grp_update(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6560
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6572
err = nix_get_struct_ptrs(rvu, req->hdr.pcifunc, &nix_hw, &blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
658
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6600
rvu_mbox_handler_nix_mcast_grp_destroy(rvu, &dreq, NULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6609
npc_blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6611
npc_enable_mcam_entry(rvu, mcam, npc_blkaddr, elem->mcam_index, false);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6624
npc_enable_mcam_entry(rvu, mcam, npc_blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6631
ret = nix_add_mce_list_entry(rvu, nix_hw, elem, req);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
664
pfvf = rvu_get_pfvf(rvu, req->hdr.pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6640
npc_enable_mcam_entry(rvu, mcam, npc_blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6648
npc_enable_mcam_entry(rvu, mcam, npc_blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6657
ret = nix_del_mce_list_entry(rvu, nix_hw, elem, req);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
666
err = nix_get_struct_ptrs(rvu, req->hdr.pcifunc, &nix_hw, &blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6662
npc_enable_mcam_entry(rvu, mcam,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6677
nix_mcast_update_action(rvu, elem);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6678
npc_enable_mcam_entry(rvu, mcam, npc_blkaddr, elem->mcam_index, true);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6696
void rvu_block_bcast_xon(struct rvu *rvu, int blkaddr)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6698
struct rvu_block *block = &rvu->hw->block[blkaddr];
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6701
if (!block->implemented || is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6704
cfg = rvu_read64(rvu, blkaddr, NIX_AF_RX_CHANX_CFG(0));
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
6705
rvu_write64(rvu, blkaddr, NIX_AF_RX_CHANX_CFG(0), cfg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
699
mutex_lock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
702
mutex_unlock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
708
mutex_unlock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
733
static int nix_bp_enable(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
746
pf = rvu_get_pf(rvu->pdev, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
747
type = is_lbk_vf(rvu, pcifunc) ? NIX_INTF_TYPE_LBK : NIX_INTF_TYPE_CGX;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
748
if (is_sdp_pfvf(rvu, pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
752
if (!is_pf_cgxmapped(rvu, pf) && type != NIX_INTF_TYPE_LBK &&
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
756
if (cpt_link && !rvu->hw->cpt_links)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
759
pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
760
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
762
bpid_base = rvu_nix_get_bpid(rvu, req, type, chan_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
768
dev_warn(rvu->dev, "Fail to enable backpressure\n");
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
774
cfg = rvu_read64(rvu, blkaddr, NIX_AF_RX_CHANX_CFG(chan_v));
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
776
rvu_write64(rvu, blkaddr, NIX_AF_RX_CHANX_CFG(chan_v),
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
779
bpid = rvu_nix_get_bpid(rvu, req, type, chan_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
794
int rvu_mbox_handler_nix_bp_enable(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
798
return nix_bp_enable(rvu, req, rsp, false);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
801
int rvu_mbox_handler_nix_cpt_bp_enable(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
805
return nix_bp_enable(rvu, req, rsp, true);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
808
static void nix_setup_lso_tso_l3(struct rvu *rvu, int blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
819
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
832
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
837
static void nix_setup_lso_tso_l4(struct rvu *rvu, int blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
847
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
856
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
861
static void nix_setup_lso(struct rvu *rvu, struct nix_hw *nix_hw, int blkaddr)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
866
cfg = (rvu_read64(rvu, blkaddr, NIX_AF_CONST1) >> 48) & 0xFF;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
870
cfg = rvu_read64(rvu, blkaddr, NIX_AF_LSO_CFG);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
876
rvu_write64(rvu, blkaddr, NIX_AF_LSO_CFG, cfg | BIT_ULL(63));
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
883
nix_setup_lso_tso_l3(rvu, blkaddr, idx, true, &fidx);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
884
nix_setup_lso_tso_l4(rvu, blkaddr, idx, &fidx);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
888
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
896
nix_setup_lso_tso_l3(rvu, blkaddr, idx, false, &fidx);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
897
nix_setup_lso_tso_l4(rvu, blkaddr, idx, &fidx);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
901
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
907
static void nix_ctx_free(struct rvu *rvu, struct rvu_pfvf *pfvf)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
913
qmem_free(rvu->dev, pfvf->rq_ctx);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
915
qmem_free(rvu->dev, pfvf->sq_ctx);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
917
qmem_free(rvu->dev, pfvf->cq_ctx);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
919
qmem_free(rvu->dev, pfvf->rss_ctx);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
92
int rvu_get_next_nix_blkaddr(struct rvu *rvu, int blkaddr)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
921
qmem_free(rvu->dev, pfvf->nix_qints_ctx);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
923
qmem_free(rvu->dev, pfvf->cq_ints_ctx);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
936
static int nixlf_rss_ctx_init(struct rvu *rvu, int blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
950
err = qmem_alloc(rvu->dev, &pfvf->rss_ctx, num_indices, hwctx_size);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
954
rvu_write64(rvu, blkaddr, NIX_AF_LFX_RSS_BASE(nixlf),
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
964
rvu_write64(rvu, blkaddr, NIX_AF_LFX_RSS_CFG(nixlf), val);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
967
rvu_write64(rvu, blkaddr, NIX_AF_LFX_RSS_GRPX(nixlf, grp),
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
972
static int nix_aq_enqueue_wait(struct rvu *rvu, struct rvu_block *block,
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
98
return rvu->nix_blkaddr[blkaddr];
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
984
reg = rvu_read64(rvu, block->addr, NIX_AF_AQ_STATUS);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
994
rvu_write64(rvu, block->addr, NIX_AF_AQ_DOOR, 1);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
15
static int npa_aq_enqueue_wait(struct rvu *rvu, struct rvu_block *block,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
158
rc = npa_aq_enqueue_wait(rvu, block, &inst);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
210
static int npa_lf_hwctx_disable(struct rvu *rvu, struct hwctx_disable_req *req)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
212
struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, req->hdr.pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
245
rc = rvu_npa_aq_enq_inst(rvu, &aq_req, NULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
248
dev_err(rvu->dev, "Failed to disable %s:%d context\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
258
static int npa_lf_hwctx_lockdown(struct rvu *rvu, struct npa_aq_enq_req *req)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
26
reg = rvu_read64(rvu, block->addr, NPA_AF_AQ_STATUS);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
271
err = rvu_npa_aq_enq_inst(rvu, &lock_ctx_req, NULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
273
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
281
int rvu_mbox_handler_npa_aq_enq(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
287
err = rvu_npa_aq_enq_inst(rvu, req, rsp);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
289
err = npa_lf_hwctx_lockdown(rvu, req);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
294
int rvu_mbox_handler_npa_aq_enq(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
298
return rvu_npa_aq_enq_inst(rvu, req, rsp);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
302
int rvu_mbox_handler_npa_hwctx_disable(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
306
return npa_lf_hwctx_disable(rvu, req);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
309
static void npa_ctx_free(struct rvu *rvu, struct rvu_pfvf *pfvf)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
314
qmem_free(rvu->dev, pfvf->aura_ctx);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
320
qmem_free(rvu->dev, pfvf->pool_ctx);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
323
qmem_free(rvu->dev, pfvf->npa_qints_ctx);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
327
int rvu_mbox_handler_npa_lf_alloc(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
332
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
346
pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
347
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPA, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
352
npalf = rvu_get_lf(rvu, block, pcifunc, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
357
err = rvu_lf_reset(rvu, block, npalf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
359
dev_err(rvu->dev, "Failed to reset NPALF%d\n", npalf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
36
rvu_write64(rvu, block->addr, NPA_AF_AQ_DOOR, 1);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
363
ctx_cfg = rvu_read64(rvu, blkaddr, NPA_AF_CONST1);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
367
err = qmem_alloc(rvu->dev, &pfvf->aura_ctx,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
379
err = qmem_alloc(rvu->dev, &pfvf->pool_ctx, req->nr_pools, hwctx_size);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
389
cfg = rvu_read64(rvu, blkaddr, NPA_AF_CONST);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
394
err = qmem_alloc(rvu->dev, &pfvf->npa_qints_ctx, qints, hwctx_size);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
398
cfg = rvu_read64(rvu, blkaddr, NPA_AF_LFX_AURAS_CFG(npalf));
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
404
rvu_write64(rvu, blkaddr, NPA_AF_LFX_AURAS_CFG(npalf), cfg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
407
rvu_write64(rvu, blkaddr, NPA_AF_LFX_LOC_AURAS_BASE(npalf),
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
411
rvu_write64(rvu, blkaddr, NPA_AF_LFX_QINTS_CFG(npalf),
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
413
rvu_write64(rvu, blkaddr, NPA_AF_LFX_QINTS_BASE(npalf),
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
419
npa_ctx_free(rvu, pfvf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
424
cfg = rvu_read64(rvu, blkaddr, NPA_AF_CONST);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
428
if (!is_rvu_otx2(rvu)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
429
cfg = rvu_read64(rvu, block->addr, NPA_AF_BATCH_CTL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
435
int rvu_mbox_handler_npa_lf_free(struct rvu *rvu, struct msg_req *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
438
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
445
pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
446
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPA, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
451
npalf = rvu_get_lf(rvu, block, pcifunc, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
456
err = rvu_lf_reset(rvu, block, npalf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
458
dev_err(rvu->dev, "Failed to reset NPALF%d\n", npalf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
462
npa_ctx_free(rvu, pfvf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
467
static void npa_aq_ndc_config(struct rvu *rvu, struct rvu_block *block)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
471
if (is_cn20k(rvu->pdev)) /* NDC not applicable to cn20k */
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
475
cfg = rvu_read64(rvu, block->addr, NPA_AF_NDC_CFG);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
481
rvu_write64(rvu, block->addr, NPA_AF_NDC_CFG, cfg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
484
static int npa_aq_init(struct rvu *rvu, struct rvu_block *block)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
490
cfg = rvu_read64(rvu, block->addr, NPA_AF_GEN_CFG);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
493
rvu_write64(rvu, block->addr, NPA_AF_GEN_CFG, cfg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
496
rvu_write64(rvu, block->addr, NPA_AF_GEN_CFG, cfg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
499
npa_aq_ndc_config(rvu, block);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
50
if (rvu_ndc_fix_locked_cacheline(rvu, BLKADDR_NDC_NPA0))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
502
if (!is_rvu_otx2(rvu)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
503
cfg = rvu_read64(rvu, block->addr, NPA_AF_BATCH_CTL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
506
rvu_write64(rvu, block->addr, NPA_AF_BATCH_CTL, cfg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
51
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
512
err = rvu_aq_alloc(rvu, &block->aq,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
518
rvu_write64(rvu, block->addr, NPA_AF_AQ_CFG, AQ_SIZE);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
519
rvu_write64(rvu, block->addr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
524
int rvu_npa_init(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
526
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
529
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPA, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
534
return npa_aq_init(rvu, &hw->block[blkaddr]);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
537
void rvu_npa_freemem(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
539
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
543
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPA, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
548
rvu_aq_free(rvu, block->aq);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
551
void rvu_npa_lf_teardown(struct rvu *rvu, u16 pcifunc, int npalf)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
553
struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
559
npa_lf_hwctx_disable(rvu, &ctx_req);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
563
npa_lf_hwctx_disable(rvu, &ctx_req);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
565
npa_ctx_free(rvu, pfvf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
575
int rvu_ndc_fix_locked_cacheline(struct rvu *rvu, int blkaddr)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
580
if (is_cn20k(rvu->pdev)) /* NDC not applicable to cn20k */
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
584
reg = rvu_read64(rvu, blkaddr, NDC_AF_CAMS_RD_INTERVAL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
585
rvu_write64(rvu, blkaddr, NDC_AF_CAMS_RD_INTERVAL, reg & GENMASK_ULL(62, 0));
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
588
err = rvu_poll_reg(rvu, blkaddr, NDC_AF_CAMS_RD_INTERVAL, GENMASK_ULL(47, 32), true);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
590
dev_err(rvu->dev, "Timed out while polling for NDC CAM busy bits.\n");
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
594
ndc_af_const = rvu_read64(rvu, blkaddr, NDC_AF_CONST);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
603
reg = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
606
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
61
int rvu_npa_aq_enq_inst(struct rvu *rvu, struct npa_aq_enq_req *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
64
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
74
pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
78
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPA, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
85
dev_warn(rvu->dev, "%s: NPA AQ not initialized\n", __func__);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c
89
npalf = rvu_get_lf(rvu, block, pcifunc, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1003
if (is_lbk_vf(rvu, pcifunc) || is_sdp_vf(rvu, pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1006
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1013
pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1018
if (!npc_is_feature_supported(rvu, BIT_ULL(NPC_DMAC), pfvf->nix_rx_intf) &&
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1019
!npc_is_feature_supported(rvu, BIT_ULL(NPC_LXMB), pfvf->nix_rx_intf))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1025
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
103
pkind = rvu_npc_get_pkind(rvu, pf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1037
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1043
if (is_mcam_entry_enabled(rvu, mcam, blkaddr, ucast_idx))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1044
*(u64 *)&action = npc_get_mcam_action(rvu, mcam,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
105
dev_err(rvu->dev, "%s: pkind not mapped\n", __func__);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1066
req.chan_mask = rvu_get_cpt_chan_mask(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1077
if (is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1080
rvu_mbox_handler_npc_install_flow(rvu, &req, &rsp);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1083
void rvu_npc_enable_allmulti_entry(struct rvu *rvu, u16 pcifunc, int nixlf,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1086
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1089
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
109
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1099
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1105
npc_enable_mcam_entry(rvu, mcam, blkaddr, index, enable);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1108
static void npc_update_vf_flow_entry(struct rvu *rvu, struct npc_mcam *mcam,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
111
dev_err(rvu->dev, "%s: NPC block not implemented\n", __func__);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1135
enable = is_mcam_entry_enabled(rvu, mcam, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1138
npc_enable_mcam_entry(rvu, mcam, blkaddr, actindex,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1142
if (is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1143
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1149
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
115
val = rvu_read64(rvu, blkaddr, NPC_AF_PKINDX_ACTION0(pkind));
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1154
npc_enable_mcam_entry(rvu, mcam, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1160
static void npc_update_rx_action_with_alg_idx(struct rvu *rvu, struct nix_rx_action action,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1165
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1166
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1170
if (!is_mcam_entry_enabled(rvu, mcam, blkaddr, mcam_index))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1178
if (is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1186
*(u64 *)&action = rvu_read64(rvu, blkaddr, reg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1190
rvu_write64(rvu, blkaddr, reg, *(u64 *)&action);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1193
void rvu_npc_update_flowkey_alg_idx(struct rvu *rvu, u16 pcifunc, int nixlf,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1196
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1202
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
121
rvu_write64(rvu, blkaddr, NPC_AF_PKINDX_ACTION0(pkind), val);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1218
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1227
if (is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1232
*(u64 *)&action = rvu_read64(rvu, blkaddr, reg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1242
rvu_write64(rvu, blkaddr, reg, *(u64 *)&action);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1245
npc_update_vf_flow_entry(rvu, mcam, blkaddr, pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1249
pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1257
npc_update_vf_flow_entry(rvu, mcam, blkaddr, pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1267
npc_update_rx_action_with_alg_idx(rvu, action, pfvf, index,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1276
npc_update_rx_action_with_alg_idx(rvu, action, pfvf, index,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1281
void npc_enadis_default_mce_entry(struct rvu *rvu, u16 pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1284
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1285
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1292
if (is_lbk_vf(rvu, pcifunc) || is_sdp_pfvf(rvu, pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1296
if (is_cn20k(rvu->pdev) &&
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1297
npc_cn20k_dft_rules_idx_get(rvu, pcifunc, &ptr[0], &ptr[1],
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
130
struct rvu *rvu = hw->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1301
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1308
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1316
npc_enable_mcam_entry(rvu, mcam, blkaddr, index, enable);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1321
pfvf = rvu_get_pfvf(rvu, pcifunc & ~RVU_PFVF_FUNC_MASK);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1326
nix_get_mce_list(rvu, pcifunc, type, &mce_list, &mce_idx);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1328
nix_update_mce_list(rvu, pcifunc, mce_list,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1331
npc_enable_mcam_entry(rvu, mcam, blkaddr, index, enable);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1334
static void npc_enadis_default_entries(struct rvu *rvu, u16 pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1337
struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1338
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1343
if (is_cn20k(rvu->pdev) &&
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1344
npc_cn20k_dft_rules_idx_get(rvu, pcifunc, &ptr[0], &ptr[1],
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1348
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
135
pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1353
if (npc_is_feature_supported(rvu, BIT_ULL(NPC_DMAC),
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1358
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1363
npc_enable_mcam_entry(rvu, mcam, blkaddr, index, enable);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1369
if ((pcifunc & RVU_PFVF_FUNC_MASK) && !rvu->hw->cap.nix_rx_multicast)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1373
npc_enadis_default_mce_entry(rvu, pcifunc, nixlf,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1377
void rvu_npc_disable_default_entries(struct rvu *rvu, u16 pcifunc, int nixlf)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1382
npc_enadis_default_entries(rvu, pcifunc, nixlf, false);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1385
npc_enadis_default_mce_entry(rvu, pcifunc, nixlf,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1387
npc_enadis_default_mce_entry(rvu, pcifunc, nixlf,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
139
blkaddr = rvu_get_next_nix_blkaddr(rvu, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1391
bool rvu_npc_enable_mcam_by_entry_index(struct rvu *rvu, int entry, int intf, bool enable)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1393
int blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1394
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1409
npc_enable_mcam_entry(rvu, mcam, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1419
void rvu_npc_enable_default_entries(struct rvu *rvu, u16 pcifunc, int nixlf)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1427
npc_enadis_default_entries(rvu, pcifunc, nixlf, true);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
143
block = &rvu->hw->block[blkaddr];
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1430
void rvu_npc_disable_mcam_entries(struct rvu *rvu, u16 pcifunc, int nixlf)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1432
struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1433
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1437
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1448
npc_enable_mcam_entry(rvu, mcam, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
145
blkaddr = rvu_get_next_nix_blkaddr(rvu, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1462
npc_mcam_disable_flows(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1464
rvu_npc_disable_default_entries(rvu, pcifunc, nixlf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1467
void rvu_npc_free_mcam_entries(struct rvu *rvu, u16 pcifunc, int nixlf)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1469
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1473
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1480
npc_mcam_free_all_entries(rvu, mcam, blkaddr, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1483
npc_mcam_free_all_counters(rvu, mcam, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1495
rvu_npc_disable_default_entries(rvu, pcifunc, nixlf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1498
static void npc_program_mkex_rx(struct rvu *rvu, int blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1507
rvu_write64(rvu, blkaddr, NPC_AF_INTFX_KEX_CFG(intf),
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1528
static void npc_program_mkex_tx(struct rvu *rvu, int blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1537
rvu_write64(rvu, blkaddr, NPC_AF_INTFX_KEX_CFG(intf),
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
155
struct rvu *rvu = hw->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1558
static void npc_program_mkex_profile(struct rvu *rvu, int blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1561
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1566
rvu_write64(rvu, blkaddr, NPC_AF_KEX_LDATAX_FLAGS_CFG(ld),
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1570
npc_program_mkex_rx(rvu, blkaddr, mkex, intf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1571
npc_program_mkex_tx(rvu, blkaddr, mkex, intf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1575
npc_program_mkex_hash(rvu, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1578
int npc_fwdb_prfl_img_map(struct rvu *rvu, void __iomem **prfl_img_addr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1583
if (!rvu->fwdata)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1586
prfl_addr = rvu->fwdata->mcam_addr;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1587
prfl_sz = rvu->fwdata->mcam_sz;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1604
static void npc_load_mkex_profile(struct rvu *rvu, int blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1607
struct device *dev = &rvu->pdev->dev;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
161
if (is_cn20k(rvu->pdev)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1614
if (rvu->kpu_fwdata_sz ||
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1619
ret = npc_fwdb_prfl_img_map(rvu, &mkex_prfl_addr, &prfl_sz);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
162
rc = npc_cn20k_dft_rules_idx_get(rvu, pcifunc, &bcast, &mcast,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1633
if (!is_rvu_96xx_B0(rvu) ||
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1635
rvu->kpu.mcam_kex_prfl.mkex = mcam_kex;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1645
dev_info(rvu->dev, "Using %s mkex profile\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1646
rvu->kpu.mcam_kex_prfl.mkex->name);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1648
npc_program_mkex_profile(rvu, blkaddr, rvu->kpu.mcam_kex_prfl.mkex);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1653
void npc_config_kpuaction(struct rvu *rvu, int blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
167
if (is_lbk_vf(rvu, pcifunc)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1672
rvu_write64(rvu, blkaddr, reg, *(u64 *)&action1);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1692
rvu_write64(rvu, blkaddr, reg, *(u64 *)&action0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1695
static void npc_config_kpucam(struct rvu *rvu, int blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1700
struct npc_kpu_profile_adapter *profile = &rvu->kpu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1724
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1726
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
173
if (is_cgx_vf(rvu, pcifunc)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1736
npc_get_ikpu_nth_entry(struct rvu *rvu, int n)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1738
struct npc_kpu_profile_adapter *profile = &rvu->kpu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1747
npc_get_num_kpu_cam_entries(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1750
struct npc_kpu_profile_adapter *profile = &rvu->kpu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1759
npc_get_kpu_cam_nth_entry(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1762
struct npc_kpu_profile_adapter *profile = &rvu->kpu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1771
npc_get_num_kpu_action_entries(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1774
struct npc_kpu_profile_adapter *profile = &rvu->kpu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1783
npc_get_kpu_action_nth_entry(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1787
struct npc_kpu_profile_adapter *profile = &rvu->kpu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1795
static void npc_program_kpu_profile(struct rvu *rvu, int blkaddr, int kpu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1802
num_cam_entries = npc_get_num_kpu_cam_entries(rvu, profile);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1803
num_action_entries = npc_get_num_kpu_action_entries(rvu, profile);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1806
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1811
max_entries = rvu->hw->npc_kpu_entries;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1815
kpu, rvu->hw->npc_kpu_entries, num_cam_entries);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1820
npc_config_kpucam(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1821
(void *)npc_get_kpu_cam_nth_entry(rvu, profile, entry),
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1827
npc_config_kpuaction(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1828
(void *)npc_get_kpu_action_nth_entry(rvu, profile, entry),
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1835
if (!rvu->kpu.custom)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1837
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1840
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1846
rvu_write64(rvu, blkaddr, NPC_AF_KPUX_CFG(kpu), 0x01);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1849
static void npc_prepare_default_kpu(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1862
if (!is_cn20k(rvu->pdev)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1873
npc_cn20k_update_action_entries_n_flags(rvu, profile);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1876
static int npc_alloc_kpu_cam2_n_action2(struct rvu *rvu, int kpu_num,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1879
struct npc_kpu_profile_adapter *adapter = &rvu->kpu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1884
kpu->cam2 = devm_kcalloc(rvu->dev, num_entries,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1889
kpu->action2 = devm_kcalloc(rvu->dev, num_entries,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1897
static int npc_apply_custom_kpu_from_fw(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1907
fw = rvu->kpu_fwdata;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1910
if (rvu->kpu_fwdata_sz < hdr_sz + offset) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1911
dev_warn(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1919
dev_warn(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1926
dev_warn(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1934
if (rvu->kpu_fwdata_sz < hdr_sz + offset) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1935
dev_warn(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1949
static int npc_apply_custom_kpu_from_fs(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1959
fw = rvu->kpu_fwdata;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1962
profile->ikpu2 = devm_kcalloc(rvu->dev, 1,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1970
if (rvu->kpu_fwdata_sz < hdr_sz + sizeof(ikpu_action_entries))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1980
if (rvu->kpu_fwdata_sz < hdr_sz + offset + sizeof(*fw_kpu)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1981
dev_warn(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1989
dev_warn(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1994
entries = min_t(int, fw_kpu->entries, rvu->hw->npc_kpu_entries);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
1995
dev_info(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2002
if (rvu->kpu_fwdata_sz < hdr_sz + offset) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2003
dev_warn(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2011
ret = npc_alloc_kpu_cam2_n_action2(rvu, kpu, entries);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2013
dev_warn(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2028
static int npc_apply_custom_kpu(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
203
pf = rvu_get_pf(rvu->pdev, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2036
if (is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2037
return npc_cn20k_apply_custom_kpu(rvu, profile);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2039
if (rvu->kpu_fwdata_sz < hdr_sz) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2040
dev_warn(rvu->dev, "Invalid KPU profile size\n");
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2044
fw = rvu->kpu_fwdata;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2046
dev_warn(rvu->dev, "Invalid KPU profile signature %llx\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2053
dev_warn(rvu->dev, "Not supported Major version: %d > %d\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2061
dev_warn(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2072
if (fw->kpus > rvu->hw->npc_kpus) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2073
dev_warn(rvu->dev, "Not enough KPUs: %d > %d\n", fw->kpus,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2074
rvu->hw->npc_kpus);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2083
dev_warn(rvu->dev, "Not enough KPUs: %d > %zu\n", fw->kpus,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2090
sfw = devm_kcalloc(rvu->dev, 1, sizeof(*sfw), GFP_KERNEL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2102
return from_fs ? npc_apply_custom_kpu_from_fs(rvu, profile) :
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2103
npc_apply_custom_kpu_from_fw(rvu, profile);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2106
static int npc_load_kpu_prfl_img(struct rvu *rvu, void __iomem *prfl_addr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2115
dev_info(rvu->dev, "Loading KPU profile from firmware db: %s\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2117
rvu->kpu_fwdata = kpu_data;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2118
rvu->kpu_fwdata_sz = prfl_sz;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2119
rvu->kpu_prfl_addr = prfl_addr;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2126
static int npc_fwdb_detect_load_prfl_img(struct rvu *rvu, uint64_t prfl_sz,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2134
img_data = (struct npc_coalesced_kpu_prfl __force *)rvu->kpu_prfl_addr;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2138
rc = npc_load_kpu_prfl_img(rvu, rvu->kpu_prfl_addr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2150
kpu_prfl_addr = (void __iomem *)((uintptr_t)rvu->kpu_prfl_addr +
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2152
rc = npc_load_kpu_prfl_img(rvu, kpu_prfl_addr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2164
static int npc_load_kpu_profile_fwdb(struct rvu *rvu, const char *kpu_profile)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2170
ret = npc_fwdb_prfl_img_map(rvu, &rvu->kpu_prfl_addr, &prfl_sz);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2175
ret = npc_fwdb_detect_load_prfl_img(rvu, prfl_sz, kpu_profile);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2180
if (rvu->kpu_prfl_addr) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2181
iounmap(rvu->kpu_prfl_addr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2182
rvu->kpu_prfl_addr = NULL;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2183
rvu->kpu_fwdata_sz = 0;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2184
rvu->kpu_fwdata = NULL;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2191
static int npc_load_kpu_profile_from_fw(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2193
struct npc_kpu_profile_adapter *profile = &rvu->kpu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2194
const char *kpu_profile = rvu->kpu_pfl_name;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2198
if (npc_load_kpu_profile_fwdb(rvu, kpu_profile))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2202
if (!rvu->kpu_fwdata_sz ||
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2203
npc_apply_custom_kpu(rvu, profile, false, &fw_kpus)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2207
if (rvu->kpu_fwdata || rvu->kpu_fwdata_sz) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2209
if (rvu->kpu_prfl_addr) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2210
iounmap(rvu->kpu_prfl_addr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2211
rvu->kpu_prfl_addr = NULL;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2213
kfree(rvu->kpu_fwdata);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2215
rvu->kpu_fwdata = NULL;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2216
rvu->kpu_fwdata_sz = 0;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2219
dev_warn(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2222
kfree(rvu->kpu_fwdata);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2223
rvu->kpu_fwdata = NULL;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2227
dev_info(rvu->dev, "Using custom profile '%.32s', version %d.%d.%d\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2235
static int npc_load_kpu_profile_from_fs(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2237
struct npc_kpu_profile_adapter *profile = &rvu->kpu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2238
const char *kpu_profile = rvu->kpu_pfl_name;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2244
dev_err(rvu->dev, "kpu profile name is too big\n");
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2250
if (request_firmware_direct(&fw, path, rvu->dev))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2253
dev_info(rvu->dev, "Loading KPU profile from filesystem: %s\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2256
rvu->kpu_fwdata = fw->data;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2257
rvu->kpu_fwdata_sz = fw->size;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2259
ret = npc_apply_custom_kpu(rvu, profile, true, &fw_kpus);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
226
struct rvu *rvu = hw->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2261
rvu->kpu_fwdata = NULL;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2264
rvu->kpu_fwdata_sz = 0;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2265
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2273
rvu->kpu.kpus = fw_kpus;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2279
void npc_load_kpu_profile(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
228
if (is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2281
struct npc_kpu_profile_adapter *profile = &rvu->kpu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2282
const char *kpu_profile = rvu->kpu_pfl_name;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2286
npc_prepare_default_kpu(rvu, profile);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2303
if (!is_cn20k(rvu->pdev)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2304
if (!npc_load_kpu_profile_from_fs(rvu))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2309
npc_prepare_default_kpu(rvu, profile);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2310
if (!npc_load_kpu_profile_from_fw(rvu))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2313
npc_prepare_default_kpu(rvu, profile);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2316
static void npc_parser_profile_init(struct rvu *rvu, int blkaddr)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2318
struct npc_kpu_profile_adapter *profile = &rvu->kpu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2319
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2324
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2326
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2328
rvu_write64(rvu, blkaddr, NPC_AF_KPUX_CFG(idx), 0x00);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2332
npc_load_kpu_profile(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2338
num_pkinds = rvu->kpu.pkinds;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2342
npc_config_kpuaction(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2343
npc_get_ikpu_nth_entry(rvu, idx),
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2347
num_kpus = rvu->kpu.kpus;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2351
npc_program_kpu_profile(rvu, blkaddr, idx, &rvu->kpu.kpu[idx]);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2354
rvu_write64(rvu, blkaddr, NPC_AF_PKINDX_TYPE(54), 0x03);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2355
rvu_write64(rvu, blkaddr, NPC_AF_PKINDX_TYPE(58), 0x03);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2359
void npc_mcam_rsrcs_deinit(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2361
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2373
int npc_mcam_rsrcs_init(struct rvu *rvu, int blkaddr)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2375
int nixlf_count = rvu_get_nixlf_count(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2376
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
238
bool is_mcam_entry_enabled(struct rvu *rvu, struct npc_mcam *mcam,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2382
cfg = (rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2387
if (is_cn20k(rvu->pdev)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2417
((rvu->hw->total_pfs - 1) * RSVD_MCAM_ENTRIES_PER_PF);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2419
dev_warn(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2428
if (!is_cn20k(rvu->pdev)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
245
if (is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2455
if (!is_cn20k(rvu->pdev)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
246
cfg = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
250
cfg = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2527
static void rvu_npc_hw_init(struct rvu *rvu, int blkaddr)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2529
struct npc_pkind *pkind = &rvu->hw->pkind;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2530
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2531
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2535
npc_const = rvu_read64(rvu, blkaddr, NPC_AF_CONST);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2536
npc_const1 = rvu_read64(rvu, blkaddr, NPC_AF_CONST1);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2538
npc_const2 = rvu_read64(rvu, blkaddr, NPC_AF_CONST2);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2548
if (is_cn20k(rvu->pdev)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
256
void npc_enable_mcam_entry(struct rvu *rvu, struct npc_mcam *mcam,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2585
static void rvu_npc_setup_interfaces(struct rvu *rvu, int blkaddr)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2588
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2589
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2595
mkex_extr = rvu->kpu.mcam_kex_prfl.mkex_extr;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2596
mkex = rvu->kpu.mcam_kex_prfl.mkex;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2598
if (is_cn20k(rvu->pdev)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2615
nibble_ena = rvu_npc_get_tx_nibble_cfg(rvu, nibble_ena);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
262
if (is_cn20k(rvu->pdev)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2628
rvu_write64(rvu, blkaddr, NPC_AF_INTFX_KEX_CFG(intf),
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
263
if (npc_cn20k_enable_mcam_entry(rvu, blkaddr, index, enable))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2631
if (is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
264
dev_err(rvu->dev, "Error to %s mcam %u entry\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2640
rvu_write64(rvu, blkaddr, reg, NIX_RX_ACTIONOP_DROP);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2642
if (is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2648
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2660
rvu_write64(rvu, blkaddr, NPC_AF_INTFX_KEX_CFG(intf),
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2663
if (is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2671
rvu_write64(rvu, blkaddr, reg, NIX_TX_ACTIONOP_UCAST_DEFAULT);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2675
int rvu_npc_init(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2677
struct npc_kpu_profile_adapter *kpu = &rvu->kpu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2678
struct npc_pkind *pkind = &rvu->hw->pkind;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2679
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2682
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2684
dev_err(rvu->dev, "%s: NPC block not implemented\n", __func__);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2688
rvu_npc_hw_init(rvu, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2693
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2706
pkind->pfchan_map = devm_kcalloc(rvu->dev, pkind->rsrc.max,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
271
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2712
if (is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2713
npc_cn20k_parser_profile_init(rvu, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2715
npc_parser_profile_init(rvu, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2718
rvu_write64(rvu, blkaddr, NPC_AF_PCK_DEF_OL2,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2721
rvu_write64(rvu, blkaddr, NPC_AF_PCK_DEF_OIP4,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2726
rvu_write64(rvu, blkaddr, NPC_AF_PCK_DEF_IIP4,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2737
rvu_write64(rvu, blkaddr, NPC_AF_PCK_CFG,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2738
rvu_read64(rvu, blkaddr, NPC_AF_PCK_CFG) |
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2742
rvu_npc_setup_interfaces(rvu, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2744
npc_config_secret_key(rvu, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2746
if (is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2747
npc_cn20k_load_mkex_profile(rvu, blkaddr, rvu->mkex_pfl_name);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2749
npc_load_mkex_profile(rvu, blkaddr, rvu->mkex_pfl_name);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2751
err = npc_mcam_rsrcs_init(rvu, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2755
err = npc_flow_steering_init(rvu, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2757
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2759
if (is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2760
npc_cn20k_load_mkex_profile(rvu, blkaddr, def_pfl_name);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2762
npc_load_mkex_profile(rvu, blkaddr, def_pfl_name);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2765
if (is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2766
return npc_cn20k_init(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
277
static void npc_clear_mcam_entry(struct rvu *rvu, struct npc_mcam *mcam,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2771
void rvu_npc_freemem(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2773
struct npc_pkind *pkind = &rvu->hw->pkind;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2774
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2777
npc_mcam_rsrcs_deinit(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2778
if (rvu->kpu_prfl_addr)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2779
iounmap(rvu->kpu_prfl_addr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2781
kfree(rvu->kpu_fwdata);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2784
if (is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2785
npc_cn20k_deinit(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2788
void rvu_npc_get_mcam_entry_alloc_info(struct rvu *rvu, u16 pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2792
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2801
if (is_mcam_entry_enabled(rvu, mcam, blkaddr, entry))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2807
void rvu_npc_get_mcam_counter_alloc_info(struct rvu *rvu, u16 pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2811
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
283
if (is_cn20k(rvu->pdev)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
284
if (npc_cn20k_clear_mcam_entry(rvu, blkaddr, index))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
285
dev_err(rvu->dev, "%s Failed to clear mcam %u\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2859
static void npc_map_mcam_entry_and_cntr(struct rvu *rvu, struct npc_mcam *mcam,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2864
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2870
if (is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2874
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2879
static void npc_unmap_mcam_entry_and_cntr(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2890
if (is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2894
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
292
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2930
static void npc_mcam_free_all_entries(struct rvu *rvu, struct npc_mcam *mcam,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2938
npc_cn20k_dft_rules_idx_get(rvu, pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
294
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2951
if (is_cn20k(rvu->pdev)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2961
npc_enable_mcam_entry(rvu, mcam, blkaddr, index, false);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
297
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2973
npc_unmap_mcam_entry_and_cntr(rvu, mcam,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2977
if (!is_cn20k(rvu->pdev) || cn20k_dft_rl)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2980
rc = npc_cn20k_idx_free(rvu, &index, 1);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2982
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
2988
static void npc_mcam_free_all_counters(struct rvu *rvu, struct npc_mcam *mcam,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
299
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
302
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
304
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3133
struct rvu *rvu = hw->rvu;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3141
if (!is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3165
ret = npc_cn20k_ref_idx_alloc(rvu, pcifunc, req->kw_type,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3391
void npc_mcam_rsrcs_reserve(struct rvu *rvu, int blkaddr, int entry_idx)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3393
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3398
int npc_config_cntr_default_entries(struct rvu *rvu, bool enable)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3400
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3406
if (is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3409
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3415
if (!is_mcam_entry_enabled(rvu, mcam, blkaddr, rule->entry))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3420
__rvu_mcam_add_counter_to_rule(rvu, rule->owner,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3423
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3428
npc_map_mcam_entry_and_cntr(rvu, mcam, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3431
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3437
__rvu_mcam_remove_counter_from_rule(rvu, rule->owner,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3445
int rvu_mbox_handler_npc_mcam_alloc_entry(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3449
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3453
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3478
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3485
if (!is_pffunc_af(pcifunc) && !is_nixlf_attached(rvu, pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3491
int rvu_mbox_handler_npc_mcam_free_entry(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3495
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3502
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3507
if (!is_pffunc_af(pcifunc) && !is_nixlf_attached(rvu, pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3522
npc_enable_mcam_entry(rvu, mcam, blkaddr, req->entry, false);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3527
npc_unmap_mcam_entry_and_cntr(rvu, mcam, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3530
if (is_cn20k(rvu->pdev)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3531
rc = npc_cn20k_idx_free(rvu, &req->entry, 1);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3533
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3542
npc_mcam_free_all_entries(rvu, mcam, blkaddr, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3548
int rvu_mbox_handler_npc_mcam_read_entry(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3552
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3556
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3563
npc_read_mcam_entry(rvu, mcam, blkaddr, req->entry,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3572
int rvu_mbox_handler_npc_mcam_write_entry(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3576
struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, req->hdr.pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3577
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3582
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3591
if (!is_cn20k(rvu->pdev)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
36
static void npc_mcam_free_all_entries(struct rvu *rvu, struct npc_mcam *mcam,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3600
if (!is_npc_interface_valid(rvu, req->intf)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3614
npc_config_mcam_entry(rvu, mcam, blkaddr, req->entry, nix_intf,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3618
npc_map_mcam_entry_and_cntr(rvu, mcam, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3627
int rvu_mbox_handler_npc_mcam_ena_entry(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3631
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3637
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3647
npc_enable_mcam_entry(rvu, mcam, blkaddr, req->entry, true);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3652
int rvu_mbox_handler_npc_mcam_dis_entry(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3656
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3662
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3672
npc_enable_mcam_entry(rvu, mcam, blkaddr, req->entry, false);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3677
int rvu_mbox_handler_npc_mcam_shift_entry(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3681
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3687
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3717
npc_enable_mcam_entry(rvu, mcam, blkaddr, new_entry, false);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3720
if (npc_copy_mcam_entry(rvu, mcam, blkaddr, old_entry, new_entry)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3728
npc_unmap_mcam_entry_and_cntr(rvu, mcam, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3730
npc_map_mcam_entry_and_cntr(rvu, mcam, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3735
npc_enable_mcam_entry(rvu, mcam, blkaddr, new_entry, true);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3736
npc_enable_mcam_entry(rvu, mcam, blkaddr, old_entry, false);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3750
static int __npc_mcam_alloc_counter(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3754
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3759
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3764
if (!is_pffunc_af(pcifunc) && !is_nixlf_attached(rvu, pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
38
static void npc_mcam_free_all_counters(struct rvu *rvu, struct npc_mcam *mcam,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3810
int rvu_mbox_handler_npc_mcam_alloc_counter(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3814
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3818
if (is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3823
err = __npc_mcam_alloc_counter(rvu, req, rsp);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3829
static int __npc_mcam_free_counter(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3833
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3837
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3858
npc_unmap_mcam_entry_and_cntr(rvu, mcam, blkaddr, index,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3865
int rvu_mbox_handler_npc_mcam_free_counter(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3868
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3872
if (is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3877
err = __npc_mcam_free_counter(rvu, req, rsp);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3884
void __rvu_mcam_remove_counter_from_rule(struct rvu *rvu, u16 pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3896
__npc_mcam_free_counter(rvu, &free_req, &free_rsp);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3900
void __rvu_mcam_add_counter_to_rule(struct rvu *rvu, u16 pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3916
err = __npc_mcam_alloc_counter(rvu, &cntr_req, &cntr_rsp);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3926
int rvu_mbox_handler_npc_mcam_unmap_counter(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3929
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3934
if (is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3937
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3951
npc_unmap_mcam_entry_and_cntr(rvu, mcam, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3962
npc_unmap_mcam_entry_and_cntr(rvu, mcam, blkaddr, index,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3970
int rvu_mbox_handler_npc_mcam_clear_counter(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3973
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3976
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3983
if (is_cn20k(rvu->pdev)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3986
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
3997
rvu_write64(rvu, blkaddr, NPC_AF_MATCH_STATX(req->cntr), 0x00);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4002
int rvu_mbox_handler_npc_mcam_counter_stats(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4006
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4010
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4017
if (is_cn20k(rvu->pdev)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4020
regval = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4033
rsp->stat = rvu_read64(rvu, blkaddr, NPC_AF_MATCH_STATX(req->cntr));
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4039
int rvu_mbox_handler_npc_mcam_alloc_and_write_entry(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4043
struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, req->hdr.pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4048
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4054
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4058
if (!is_npc_interface_valid(rvu, req->intf))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4068
rc = rvu_mbox_handler_npc_mcam_alloc_entry(rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4086
rc = rvu_mbox_handler_npc_mcam_alloc_counter(rvu, &cntr_req, &cntr_rsp);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4106
npc_config_mcam_entry(rvu, mcam, blkaddr, entry, nix_intf,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4110
npc_map_mcam_entry_and_cntr(rvu, mcam, blkaddr, entry, cntr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4120
rvu_read64(rvu, BLKADDR_NPC, NPC_AF_INTFX_KEX_CFG(intf))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4123
rvu_read64(rvu, BLKADDR_NPC, NPC_AF_KEX_LDATAX_FLAGS_CFG(ld))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4126
rvu_read64(rvu, BLKADDR_NPC, \
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4130
rvu_read64(rvu, BLKADDR_NPC, \
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4133
int rvu_mbox_handler_npc_get_kex_cfg(struct rvu *rvu, struct msg_req *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4161
memcpy(rsp->mkex_pfl_name, rvu->mkex_pfl_name, MKEX_NAME_LEN);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4166
npc_set_var_len_offset_pkind(struct rvu *rvu, u16 pcifunc, u64 pkind,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4183
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4185
dev_err(rvu->dev, "%s: NPC block not implemented\n", __func__);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4188
val = rvu_read64(rvu, blkaddr, NPC_AF_PKINDX_ACTION0(pkind));
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4194
rvu_write64(rvu, blkaddr, NPC_AF_PKINDX_ACTION0(pkind), val);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4198
int rvu_npc_set_parse_mode(struct rvu *rvu, u16 pcifunc, u64 mode, u8 dir,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4203
struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4204
int pf = rvu_get_pf(rvu->pdev, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4211
rxpkind = rvu_npc_get_pkind(rvu, pf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4217
rc = npc_set_var_len_offset_pkind(rvu, pcifunc, pkind,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4230
if (!is_cgx_config_permitted(rvu, pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4232
if (!rvu_cgx_check_permission_and_set_pkind(rvu, pcifunc, rxpkind))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4238
rc = nix_get_nixlf(rvu, pcifunc, &nixlf, &blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4242
if (is_pf_cgxmapped(rvu, pf) && is_vf(pcifunc)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4243
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4245
cgxd = rvu_cgx_pdata(cgx_id, rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4247
if (rvu_cgx_is_pkind_config_permitted(rvu, pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4248
rvu_write64(rvu, blkaddr, NIX_AF_LFX_TX_PARSE_CFG(nixlf),
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4252
rvu_write64(rvu, blkaddr, NIX_AF_LFX_TX_PARSE_CFG(nixlf),
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4261
int rvu_mbox_handler_npc_set_pkind(struct rvu *rvu, struct npc_set_pkind *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4264
return rvu_npc_set_parse_mode(rvu, req->hdr.pcifunc, req->mode,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4269
int rvu_mbox_handler_npc_read_base_steer_rule(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4273
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4279
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4285
pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4298
rc = nix_get_nixlf(rvu, pcifunc, &nixlf, NULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4314
npc_read_mcam_entry(rvu, mcam, blkaddr, index, &rsp->entry, &intf,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4321
int rvu_mbox_handler_npc_mcam_entry_stats(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4325
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4331
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4342
if (is_cn20k(rvu->pdev)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4343
regval = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4353
regval = rvu_read64(rvu, blkaddr, NPC_AF_MCAMEX_BANKX_STAT_ACT(index,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4356
if (!(regval & rvu->hw->npc_stat_ena)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4365
rsp->stat = rvu_read64(rvu, blkaddr, NPC_AF_MATCH_STATX(cntr));
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4373
void rvu_npc_clear_ucast_entry(struct rvu *rvu, int pcifunc, int nixlf)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4375
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4379
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4390
npc_enable_mcam_entry(rvu, mcam, blkaddr, ucast_idx, false);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4392
npc_set_mcam_action(rvu, mcam, blkaddr, ucast_idx, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
4394
npc_clear_mcam_entry(rvu, mcam, blkaddr, ucast_idx);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
440
static u64 npc_get_default_entry_action(struct rvu *rvu, struct npc_mcam *mcam,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
447
if (nix_get_nixlf(rvu, pf_func, &nixlf, NULL)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
448
dev_err(rvu->dev, "%s: nixlf not attached to pcifunc:0x%x\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
458
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
468
if (is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
473
return rvu_read64(rvu, blkaddr, reg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
476
static void npc_fixup_vf_rule(struct rvu *rvu, struct npc_mcam *mcam,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
488
if (is_pffunc_af(owner) || is_lbk_vf(rvu, target_func) ||
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
494
pfvf = rvu_get_pfvf(rvu, target_func);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
498
if (!(is_nixlf_attached(rvu, target_func) &&
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
51
bool is_npc_interface_valid(struct rvu *rvu, u8 intf)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
513
rx_action = npc_get_default_entry_action(rvu, mcam, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
519
static void npc_config_mcam_entry(struct rvu *rvu, struct npc_mcam *mcam,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
53
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
534
npc_enable_mcam_entry(rvu, mcam, blkaddr, actindex, false);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
537
npc_clear_mcam_entry(rvu, mcam, blkaddr, actindex);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
556
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
559
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
565
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
567
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
571
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
573
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
579
npc_fixup_vf_rule(rvu, mcam, blkaddr, actindex, entry, &enable);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
58
int rvu_npc_get_tx_nibble_cfg(struct rvu *rvu, u64 nibble_ena)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
582
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
586
rvu_write64(rvu, blkaddr, NPC_AF_MCAMEX_BANKX_TAG_ACT(index, actbank),
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
591
npc_enable_mcam_entry(rvu, mcam, blkaddr, actindex, true);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
594
void npc_read_mcam_entry(struct rvu *rvu, struct npc_mcam *mcam,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
606
cam1 = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
608
cam0 = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
612
cam1 = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
614
cam0 = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
619
entry->action = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
622
rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
624
*intf = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
626
*ena = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
63
if (is_rvu_96xx_B0(rvu))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
630
static int npc_copy_mcam_entry(struct rvu *rvu, struct npc_mcam *mcam,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
638
if (is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
639
return npc_cn20k_copy_mcam_entry(rvu, blkaddr, src, dest);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
649
cfg = rvu_read64(rvu, blkaddr, sreg + (i * 8));
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
650
rvu_write64(rvu, blkaddr, dreg + (i * 8), cfg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
655
cfg = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
657
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
661
cfg = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
663
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
667
cfg = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
669
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
674
u64 npc_get_mcam_action(struct rvu *rvu, struct npc_mcam *mcam,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
68
void rvu_npc_set_pkind(struct rvu *rvu, int pkind, struct rvu_pfvf *pfvf)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
682
if (is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
686
return rvu_read64(rvu, blkaddr, reg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
689
void npc_set_mcam_action(struct rvu *rvu, struct npc_mcam *mcam,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
697
if (is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
702
return rvu_write64(rvu, blkaddr, reg, cfg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
705
u32 rvu_get_cpt_chan_mask(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
712
if (!is_rvu_otx2(rvu))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
718
void rvu_npc_install_ucast_entry(struct rvu *rvu, u16 pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
721
struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
724
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
729
if (is_lbk_vf(rvu, pcifunc) || is_sdp_vf(rvu, pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
73
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
732
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
739
if (!npc_is_feature_supported(rvu, BIT_ULL(NPC_DMAC), pfvf->nix_rx_intf))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
745
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
754
if (is_mcam_entry_enabled(rvu, mcam, blkaddr, index)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
755
*(u64 *)&action = npc_get_mcam_action(rvu, mcam,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
767
req.chan_mask = rvu_get_cpt_chan_mask(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
776
if (is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
779
rvu_mbox_handler_npc_install_flow(rvu, &req, &rsp);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
782
void rvu_npc_install_promisc_entry(struct rvu *rvu, u16 pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
785
struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
788
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
789
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
79
rvu_write64(rvu, blkaddr, NPC_AF_PKINDX_CPI_DEFX(pkind, 0), val);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
795
if (!hw->cap.nix_rx_multicast && is_cgx_vf(rvu, pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
798
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
808
if (is_cgx_vf(rvu, pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
814
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
82
int rvu_npc_get_pkind(struct rvu *rvu, u16 pf)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
825
if (is_lbk_vf(rvu, pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
831
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
837
if (is_mcam_entry_enabled(rvu, mcam, blkaddr, ucast_idx))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
838
*(u64 *)&action = npc_get_mcam_action(rvu, mcam,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
84
struct npc_pkind *pkind = &rvu->hw->pkind;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
850
is_pf_cgxmapped(rvu, rvu_get_pf(rvu->pdev, pcifunc))) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
853
pfvf = rvu_get_pfvf(rvu, pcifunc & ~RVU_PFVF_FUNC_MASK);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
862
req.chan_mask = rvu_get_cpt_chan_mask(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
866
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
885
if (is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
888
rvu_mbox_handler_npc_install_flow(rvu, &req, &rsp);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
891
void rvu_npc_enable_promisc_entry(struct rvu *rvu, u16 pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
894
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
897
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
908
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
914
npc_enable_mcam_entry(rvu, mcam, blkaddr, index, enable);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
917
void rvu_npc_install_bcast_match_entry(struct rvu *rvu, u16 pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
923
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
924
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
927
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
932
if (is_lbk_vf(rvu, pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
943
pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
948
if (!npc_is_feature_supported(rvu, BIT_ULL(NPC_DMAC), pfvf->nix_rx_intf) &&
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
949
!npc_is_feature_supported(rvu, BIT_ULL(NPC_LXMB), pfvf->nix_rx_intf))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
955
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
98
int npc_config_ts_kpuaction(struct rvu *rvu, int pf, u16 pcifunc, bool enable)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
982
if (is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
985
rvu_mbox_handler_npc_install_flow(rvu, &req, &rsp);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
988
void rvu_npc_install_allmulti_entry(struct rvu *rvu, u16 pcifunc, int nixlf,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
993
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
994
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.h
12
void npc_load_kpu_profile(struct rvu *rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.h
13
void npc_config_kpuaction(struct rvu *rvu, int blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.h
16
int npc_fwdb_prfl_img_map(struct rvu *rvu, void __iomem **prfl_img_addr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.h
23
npc_get_ikpu_nth_entry(struct rvu *rvu, int n);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.h
26
npc_get_num_kpu_cam_entries(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.h
29
npc_get_kpu_cam_nth_entry(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.h
33
npc_get_num_kpu_action_entries(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.h
36
npc_get_kpu_action_nth_entry(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1025
npc_update_entry(rvu, NPC_SIP_IPV6, mdata, val_lo, val_hi,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1039
npc_update_entry(rvu, NPC_DIP_IPV6, mdata, val_lo, val_hi,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1046
static void npc_update_vlan_features(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1056
npc_update_entry(rvu, NPC_LB, mdata,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1062
npc_update_entry(rvu, NPC_LB, mdata, NPC_LT_LB_CTAG, 0,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1065
npc_update_entry(rvu, NPC_LB, mdata, NPC_LT_LB_STAG_QINQ, 0,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1069
void npc_update_flow(struct rvu *rvu, struct mcam_entry_mdata *mdata,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1087
npc_update_entry(rvu, NPC_LD, mdata, NPC_LT_LD_TCP,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1090
npc_update_entry(rvu, NPC_LD, mdata, NPC_LT_LD_UDP,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1093
npc_update_entry(rvu, NPC_LD, mdata, NPC_LT_LD_SCTP,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1096
npc_update_entry(rvu, NPC_LD, mdata, NPC_LT_LD_ICMP,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1099
npc_update_entry(rvu, NPC_LD, mdata, NPC_LT_LD_ICMP6,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1104
npc_update_entry(rvu, NPC_LD, mdata, NPC_LT_LD_AH,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1108
npc_update_entry(rvu, NPC_LE, mdata, NPC_LT_LE_ESP,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1113
npc_update_entry(rvu, NPC_LXMB, mdata, output->lxmb, 0,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1119
npc_update_entry(rvu, (field), mdata, (val_lo), (val_hi), \
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1207
npc_update_ipv6_flow(rvu, mdata, features, pkt, mask, output, intf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1208
npc_update_vlan_features(rvu, mdata, features, intf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1210
npc_update_field_hash(rvu, intf, mdata, blkaddr, features,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1247
static void rvu_mcam_remove_counter_from_rule(struct rvu *rvu, u16 pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1250
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1253
if (is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1258
__rvu_mcam_remove_counter_from_rule(rvu, pcifunc, rule);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1263
static void rvu_mcam_add_counter_to_rule(struct rvu *rvu, u16 pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1267
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1271
__rvu_mcam_add_counter_to_rule(rvu, pcifunc, rule, rsp);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1276
static int npc_mcast_update_action_index(struct rvu *rvu, struct npc_install_flow_req *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1289
mce_index = rvu_nix_mcast_get_mce_index(rvu, req->hdr.pcifunc, req->index);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1303
npc_populate_mcam_mdata(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1308
if (is_cn20k(rvu->pdev)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1323
static int npc_update_rx_entry(struct rvu *rvu, struct rvu_pfvf *pfvf,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1328
struct rvu_switch *rswitch = &rvu->rswitch;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1335
npc_update_entry(rvu, NPC_CHAN, mdata, req->channel, 0, req->chan_mask,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1343
ret = npc_mcast_update_action_index(rvu, req, action.op, (void *)&action);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1384
static int npc_update_tx_entry(struct rvu *rvu, struct rvu_pfvf *pfvf,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1398
npc_update_entry(rvu, NPC_PF_FUNC, mdata, (__force u16)htons(target),
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1405
ret = npc_mcast_update_action_index(rvu, req, action.op, (void *)&action);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1428
static int npc_install_flow(struct rvu *rvu, int blkaddr, u16 target,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1438
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1457
npc_populate_mcam_mdata(rvu, &mdata, cn20k_entry, entry);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1459
npc_update_flow(rvu, &mdata, features, &req->packet, &req->mask, &dummy,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1463
err = npc_update_rx_entry(rvu, pfvf, &mdata, req, target,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1468
err = npc_update_tx_entry(rvu, pfvf, &mdata, req, target);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
148
static bool npc_is_field_present(struct rvu *rvu, enum key_fields type, u8 intf)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1482
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1488
enable = is_mcam_entry_enabled(rvu, mcam, blkaddr, entry_index);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1496
npc_update_flow(rvu, &mdata, missing_features,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
150
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1513
if (!is_cn20k(rvu->pdev)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1518
rvu_mcam_add_counter_to_rule(rvu, owner, rule, rsp);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1524
rvu_mcam_remove_counter_from_rule(rvu, owner, rule);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1537
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1563
if (is_cn20k(rvu->pdev)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1584
if (is_cn20k(rvu->pdev)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1609
if (is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1610
err = rvu_mbox_handler_npc_cn20k_mcam_write_entry(rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1614
err = rvu_mbox_handler_npc_mcam_write_entry(rvu, &write_req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1618
rvu_mcam_remove_counter_from_rule(rvu, owner, rule);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1639
return rvu_nix_setup_ratelimit_aggr(rvu, req->hdr.pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1643
return rvu_nix_mcast_update_mcam_entry(rvu, req->hdr.pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1650
rvu_npc_free_entry_for_flow_install(struct rvu *rvu, u16 pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1662
rc = rvu_mbox_handler_npc_mcam_free_entry(rvu, &free_req, &rsp);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1667
rvu_npc_alloc_entry_for_flow_install(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
167
static void npc_set_layer_mdata(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1681
if (!is_cn20k(rvu->pdev)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1695
rc = rvu_mbox_handler_npc_get_num_kws(rvu, &kws_req, &kws_rsp);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1703
rvu_mbox_handler_npc_get_pfl_info(rvu, &req, &rsp);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1705
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1721
rc = rvu_mbox_handler_npc_mcam_alloc_entry(rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1732
int rvu_mbox_handler_npc_install_flow(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1737
bool from_rep_dev = !!is_rep_dev(rvu, req->hdr.pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1738
struct rvu_switch *rswitch = &rvu->rswitch;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1747
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1749
dev_err(rvu->dev, "%s: NPC block not implemented\n", __func__);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1753
if (!is_npc_interface_valid(rvu, req->intf))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1756
err = rvu_npc_alloc_entry_for_flow_install(rvu, req, &req->entry,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1759
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1771
if (npc_check_field(rvu, blkaddr, NPC_DMAC, req->intf))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1777
dev_warn(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
178
if (is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1780
rvu_npc_free_entry_for_flow_install(rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1787
if (!npc_is_field_present(rvu, NPC_LXMB, req->intf)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1788
dev_warn(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1791
rvu_npc_free_entry_for_flow_install(rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1805
rvu_npc_free_entry_for_flow_install(rvu, req->hdr.pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1833
req->chan_mask = rvu_get_cpt_chan_mask(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1835
err = npc_check_unsupported_flows(rvu, req->features, req->intf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1837
rvu_npc_free_entry_for_flow_install(rvu, req->hdr.pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1842
pfvf = rvu_get_pfvf(rvu, target);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1858
err = nix_get_nixlf(rvu, target, &nixlf, NULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1860
rvu_npc_free_entry_for_flow_install(rvu, req->hdr.pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1866
if (!(is_nixlf_attached(rvu, target) &&
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1879
rvu_npc_free_entry_for_flow_install(rvu, req->hdr.pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1889
rvu_npc_free_entry_for_flow_install(rvu, req->hdr.pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1895
err = npc_install_flow(rvu, blkaddr, target, nixlf, pfvf,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1898
rvu_npc_free_entry_for_flow_install(rvu, req->hdr.pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1908
static int npc_delete_flow(struct rvu *rvu, struct rvu_npc_mcam_rule *rule,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1918
rvu_mcam_remove_counter_from_rule(rvu, pcifunc, rule);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1926
return rvu_mbox_handler_npc_mcam_dis_entry(rvu, &dis_req, &dis_rsp);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1929
int rvu_mbox_handler_npc_delete_flow(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1933
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1957
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1959
rsp->cntr_val = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1973
if (npc_delete_flow(rvu, iter, pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1974
dev_err(rvu->dev, "rule deletion failed for entry:%u",
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1981
static int npc_update_dmac_value(struct rvu *rvu, int npcblkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1988
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
1997
npc_populate_mcam_mdata(rvu, &mdata, cn20k_entry, entry);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
2001
if (is_cn20k(rvu->pdev)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
2002
if (npc_cn20k_read_mcam_entry(rvu, npcblkaddr, rule->entry,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
2007
npc_read_mcam_entry(rvu, mcam, npcblkaddr, rule->entry,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
2011
npc_update_entry(rvu, NPC_DMAC, &mdata,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
2016
if (is_cn20k(rvu->pdev)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
2020
err = rvu_mbox_handler_npc_cn20k_mcam_write_entry(rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
2027
err = rvu_mbox_handler_npc_mcam_write_entry(rvu, &write_req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
2035
void npc_mcam_enable_flows(struct rvu *rvu, u16 target)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
2037
struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, target);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
2039
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
2044
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
2055
npc_enable_mcam_entry(rvu, mcam, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
2062
if (npc_update_dmac_value(rvu, blkaddr, rule, pfvf))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
2063
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
2075
rvu_write64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
2080
npc_enable_mcam_entry(rvu, mcam, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
2089
npc_enable_mcam_entry(rvu, mcam, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
2095
void npc_mcam_disable_flows(struct rvu *rvu, u16 target)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
2097
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
2100
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
2108
npc_enable_mcam_entry(rvu, mcam, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
2117
int npc_install_mcam_drop_rule(struct rvu *rvu, int mcam_idx, u16 *counter_idx,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
212
static bool npc_check_overlap(struct rvu *rvu, int blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
2125
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
2133
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
2135
dev_err(rvu->dev, "%s: NPC block not implemented\n", __func__);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
2140
if (!rvu_npc_exact_has_match_table(rvu)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
2141
dev_info(rvu->dev, "%s: No support for exact match feature\n", __func__);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
2146
enabled = is_mcam_entry_enabled(rvu, mcam, blkaddr, mcam_idx);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
2148
dev_err(rvu->dev, "%s: failed to add single drop on non hit rule at %d th index\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
215
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
2168
npc_mcam_rsrcs_reserve(rvu, blkaddr, mcam_idx);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
2170
if (!is_cn20k(rvu->pdev)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
2175
err = rvu_mbox_handler_npc_mcam_alloc_counter(rvu, &cntr_req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
2178
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
2186
npc_populate_mcam_mdata(rvu, &mdata,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
2191
npc_update_entry(rvu, NPC_EXACT_RESULT, &mdata, exact_val, 0,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
2193
npc_update_entry(rvu, NPC_CHAN, &mdata, chan_val, 0,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
2195
npc_update_entry(rvu, NPC_LXMB, &mdata, bcast_mcast_val, 0,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
2198
if (is_cn20k(rvu->pdev)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
2202
err = rvu_mbox_handler_npc_cn20k_mcam_write_entry(rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
2206
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
2220
err = rvu_mbox_handler_npc_mcam_write_entry(rvu, &req, &rsp);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
2222
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
2228
dev_dbg(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
2234
npc_enable_mcam_entry(rvu, mcam, blkaddr, mcam_idx, false);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
2239
int rvu_mbox_handler_npc_get_field_status(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
2245
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
2249
if (!is_npc_interface_valid(rvu, req->intf))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
2252
if (npc_check_field(rvu, blkaddr, req->field, req->intf))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
232
if (is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
238
cfg = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
244
npc_set_layer_mdata(rvu, mcam, NPC_UNKNOWN,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
253
npc_set_kw_masks(rvu, mcam, NPC_UNKNOWN,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
267
for (extr = 0 ; extr < rvu->hw->npc_kex_extr; extr++) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
277
npc_set_layer_mdata(rvu, mcam, NPC_UNKNOWN, cfg,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
286
npc_set_kw_masks(rvu, mcam, NPC_UNKNOWN, nr_bits,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
300
static bool npc_check_field(struct rvu *rvu, int blkaddr, enum key_fields type,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
303
if (!npc_is_field_present(rvu, type, intf) ||
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
304
npc_check_overlap(rvu, blkaddr, type, 0, intf))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
309
static void npc_scan_exact_result(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
326
npc_set_kw_masks(rvu, mcam, type, nr_bits, kwi, offset, intf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
329
static void npc_cn20k_scan_parse_result(struct rvu *rvu, struct npc_mcam *mcam,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
378
npc_set_kw_masks(rvu, mcam, type, nr_bits, kwi, offset, intf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
381
static void npc_scan_parse_result(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
390
if (is_cn20k(rvu->pdev)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
391
npc_cn20k_scan_parse_result(rvu, mcam, bit_number,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
438
npc_set_kw_masks(rvu, mcam, type, nr_bits, kwi, offset, intf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
441
static void npc_handle_multi_layer_fields(struct rvu *rvu, int blkaddr, u8 intf)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
443
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
462
if (is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
489
dev_err(rvu->dev, "mkex: Ethertype is not extracted.\n");
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
505
dev_err(rvu->dev, "mkex: Etype pos is different for untagged and tagged pkts.\n");
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
514
dev_err(rvu->dev, "mkex: Etype pos is different for untagged and double tagged pkts.\n");
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
523
dev_err(rvu->dev, "mkex: Etype pos is different for tagged and double tagged pkts.\n");
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
532
if (npc_check_overlap(rvu, blkaddr, NPC_ETYPE, start_lid, intf)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
533
dev_err(rvu->dev, "mkex: Ethertype is overwritten by higher layers.\n");
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
540
dev_err(rvu->dev, "mkex: Outer vlan tci is not extracted.\n");
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
554
dev_err(rvu->dev, "mkex: Out vlan tci pos is different for tagged and double tagged pkts.\n");
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
562
if (npc_check_overlap(rvu, blkaddr, NPC_OUTER_VID, start_lid, intf)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
563
dev_err(rvu->dev, "mkex: Outer vlan tci is overwritten by higher layers.\n");
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
577
static void npc_scan_ldata(struct rvu *rvu, int blkaddr, u8 lid,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
580
struct npc_mcam_kex_hash *mkex_hash = rvu->kpu.mkex_hash;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
581
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
587
if (is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
614
npc_set_layer_mdata(rvu, mcam, (name), cfg, lid, lt, \
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
619
npc_set_kw_masks(rvu, mcam, (name), (hlen) * 8, \
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
62
bool npc_is_feature_supported(struct rvu *rvu, u64 features, u8 intf)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
634
if (rvu->hw->cap.npc_hash_extract) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
64
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
683
static void npc_set_features(struct rvu *rvu, int blkaddr, u8 intf)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
685
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
694
if (npc_check_field(rvu, blkaddr, hdr, intf))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
707
if (!npc_check_field(rvu, blkaddr, NPC_LD, intf))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
717
if (npc_check_field(rvu, blkaddr, NPC_LD, intf)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
724
if (npc_check_field(rvu, blkaddr, NPC_LE, intf))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
729
if (!npc_check_field(rvu, blkaddr, NPC_LB, intf))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
733
if (npc_is_field_present(rvu, NPC_IPSEC_SPI, intf) &&
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
738
if (npc_check_field(rvu, blkaddr, NPC_LB, intf))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
743
if (npc_check_field(rvu, blkaddr, NPC_LXMB, intf))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
747
if (npc_check_field(rvu, blkaddr, hdr, intf))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
756
static int npc_scan_kex(struct rvu *rvu, int blkaddr, u8 intf)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
758
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
769
cfg = rvu_read64(rvu, blkaddr, NPC_AF_INTFX_KEX_CFG(intf));
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
770
if (is_cn20k(rvu->pdev)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
774
npc_scan_parse_result(rvu, mcam, bitnr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
782
npc_scan_parse_result(rvu, mcam, bitnr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
795
npc_scan_exact_result(rvu, mcam, bitnr, key_nibble, intf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
799
if (is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
806
cfg = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
811
npc_scan_ldata(rvu, blkaddr, lid, lt, cfg,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
820
for (extr = 0 ; extr < rvu->hw->npc_kex_extr; extr++) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
826
npc_scan_ldata(rvu, blkaddr, lid, lt, cfg,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
833
static int npc_scan_verify_kex(struct rvu *rvu, int blkaddr)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
837
err = npc_scan_kex(rvu, blkaddr, NIX_INTF_RX);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
841
err = npc_scan_kex(rvu, blkaddr, NIX_INTF_TX);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
846
if (!npc_is_field_present(rvu, NPC_CHAN, NIX_INTF_RX)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
847
dev_err(rvu->dev, "Channel not present in Key\n");
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
851
if (npc_check_overlap(rvu, blkaddr, NPC_CHAN, 0, NIX_INTF_RX)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
852
dev_err(rvu->dev, "Channel cannot be overwritten\n");
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
856
npc_set_features(rvu, blkaddr, NIX_INTF_TX);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
857
npc_set_features(rvu, blkaddr, NIX_INTF_RX);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
858
npc_handle_multi_layer_fields(rvu, blkaddr, NIX_INTF_TX);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
859
npc_handle_multi_layer_fields(rvu, blkaddr, NIX_INTF_RX);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
86
static void npc_set_kw_masks(struct rvu *rvu, struct npc_mcam *mcam, u8 type,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
864
int npc_flow_steering_init(struct rvu *rvu, int blkaddr)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
866
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
870
return npc_scan_verify_kex(rvu, blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
873
static int npc_check_unsupported_flows(struct rvu *rvu, u64 features, u8 intf)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
875
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
885
dev_warn(rvu->dev, "Unsupported flow(s):\n");
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
887
dev_warn(rvu->dev, "%s ", npc_get_field_name(bit));
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
905
void npc_update_entry(struct rvu *rvu, enum key_fields type,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
911
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
925
if (is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
93
if (is_cn20k(rvu->pdev)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
998
static void npc_update_ipv6_flow(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.h
17
void npc_update_entry(struct rvu *rvu, enum key_fields type,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.h
21
void npc_update_flow(struct rvu *rvu, struct mcam_entry_mdata *mdata,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.h
28
npc_populate_mcam_mdata(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1001
dev_dbg(rvu->dev, "%s: inserted in 4 ways hash table ways=%d, index=%d\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1006
dev_dbg(rvu->dev, "%s: failed to insert in 4 ways hash table\n", __func__);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1010
err = rvu_npc_exact_alloc_cam_table_entry(rvu, index);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1013
dev_dbg(rvu->dev, "%s: inserted in fully associative hash table index=%u\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1018
dev_err(rvu->dev, "%s: failed to insert in fully associative hash table\n", __func__);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
103
static u64 npc_update_use_hash(struct rvu *rvu, int blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1031
static bool rvu_npc_exact_save_drop_rule_chan_and_mask(struct rvu *rvu, int drop_mcam_idx,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1037
table = rvu->hw->table;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1073
static bool rvu_npc_exact_calc_drop_rule_chan_and_mask(struct rvu *rvu, u8 intf_type,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1083
chan_val = rvu_nix_chan_cgx(rvu, cgx_id, lmac_id, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
109
cfg = rvu_read64(rvu, blkaddr, NPC_AF_INTFX_LIDX_LTX_LDX_CFG(intf, lid, lt, ld));
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1104
u16 rvu_npc_exact_drop_rule_to_pcifunc(struct rvu *rvu, u32 drop_rule_idx)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1109
table = rvu->hw->table;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1121
dev_err(rvu->dev, "%s: drop mcam rule index (%d) >= NPC_MCAM_DROP_RULE_MAX\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1138
static bool rvu_npc_exact_get_drop_rule_info(struct rvu *rvu, u8 intf_type, u8 cgx_id,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1147
table = rvu->hw->table;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1150
dev_err(rvu->dev, "%s: No drop rule for LBK/SDP mode\n", __func__);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1154
rc = rvu_npc_exact_calc_drop_rule_chan_and_mask(rvu, intf_type, cgx_id,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1178
dev_err(rvu->dev, "%s: drop mcam rule index (%d) >= NPC_MCAM_DROP_RULE_MAX\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1183
dev_err(rvu->dev, "%s: Could not retrieve for cgx=%d, lmac=%d\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1200
static u16 __rvu_npc_exact_cmd_rules_cnt_update(struct rvu *rvu, int drop_mcam_idx,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1207
table = rvu->hw->table;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
122
static void npc_program_mkex_hash_rx(struct rvu *rvu, int blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
125
struct npc_mcam_kex_hash *mkex_hash = rvu->kpu.mkex_hash;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1250
static int rvu_npc_exact_del_table_entry_by_id(struct rvu *rvu, u32 seq_id)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1259
table = rvu->hw->table;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1264
entry = __rvu_npc_exact_find_entry_by_seq_id(rvu, seq_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1266
dev_dbg(rvu->dev, "%s: failed to find entry for id=%d\n", __func__, seq_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
128
if (is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1280
rc = rvu_npc_exact_get_drop_rule_info(rvu, NIX_INTF_TYPE_CGX, entry->cgx_id,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1283
dev_dbg(rvu->dev, "%s: failed to retrieve drop info for id=0x%x\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1290
__rvu_npc_exact_cmd_rules_cnt_update(rvu, drop_mcam_idx, -1, &disable_cam);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1294
rvu_npc_enable_mcam_by_entry_index(rvu, drop_mcam_idx, NIX_INTF_RX, false);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1295
dev_dbg(rvu->dev, "%s: Disabling mcam idx %d\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1301
rvu_npc_exact_dealloc_table_entry(rvu, entry->opc_type, entry->ways, entry->index);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1303
rvu_npc_exact_free_id(rvu, seq_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1305
dev_dbg(rvu->dev, "%s: delete entry success for id=0x%x, mca=%pM\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1329
static int rvu_npc_exact_add_table_entry(struct rvu *rvu, u8 cgx_id, u8 lmac_id, u8 *mac,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1333
int blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1345
err = rvu_npc_exact_alloc_table_entry(rvu, mac, chan, ctype, &index, &ways, &opc_type);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1347
dev_err(rvu->dev, "%s: Could not alloc in exact match table\n", __func__);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1352
mdata = rvu_exact_prepare_table_entry(rvu, true, ctype, chan, mac);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1355
rvu_npc_exact_cam_table_write(rvu, blkaddr, index, mdata);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1357
rvu_npc_exact_mem_table_write(rvu, blkaddr, ways, index, mdata);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1360
err = rvu_npc_exact_add_to_list(rvu, opc_type, ways, index, cgx_id, lmac_id,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1363
rvu_npc_exact_dealloc_table_entry(rvu, opc_type, ways, index);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1364
dev_err(rvu->dev, "%s: could not add to exact match table\n", __func__);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1368
rc = rvu_npc_exact_get_drop_rule_info(rvu, NIX_INTF_TYPE_CGX, cgx_id, lmac_id,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1371
rvu_npc_exact_dealloc_table_entry(rvu, opc_type, ways, index);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1372
dev_dbg(rvu->dev, "%s: failed to get drop rule info cgx=%d lmac=%d\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1378
__rvu_npc_exact_cmd_rules_cnt_update(rvu, drop_mcam_idx, 1, &enable_cam);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1382
rvu_npc_enable_mcam_by_entry_index(rvu, drop_mcam_idx, NIX_INTF_RX, true);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1383
dev_dbg(rvu->dev, "%s: Enabling mcam idx %d\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1387
dev_dbg(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1407
static int rvu_npc_exact_update_table_entry(struct rvu *rvu, u8 cgx_id, u8 lmac_id,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1410
int blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1416
table = rvu->hw->table;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1421
entry = __rvu_npc_exact_find_entry_by_seq_id(rvu, *seq_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1424
dev_dbg(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1434
hash_index = rvu_exact_calculate_hash(rvu, entry->chan, entry->ctype,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1438
dev_dbg(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
144
cfg = npc_update_use_hash(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1446
mdata = rvu_exact_prepare_table_entry(rvu, true, entry->ctype, entry->chan, new_mac);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1449
rvu_npc_exact_mem_table_write(rvu, blkaddr, entry->ways, entry->index, mdata);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1451
rvu_npc_exact_cam_table_write(rvu, blkaddr, entry->index, mdata);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1457
dev_dbg(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1461
dev_dbg(rvu->dev, "%s: Successfully updated entry (old mac=%pM new_mac=%pM\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1478
int rvu_npc_exact_promisc_disable(struct rvu *rvu, u16 pcifunc)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1481
int pf = rvu_get_pf(rvu->pdev, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1487
table = rvu->hw->table;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1489
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1490
rc = rvu_npc_exact_get_drop_rule_info(rvu, NIX_INTF_TYPE_CGX, cgx_id, lmac_id,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1493
dev_dbg(rvu->dev, "%s: failed to get drop rule info cgx=%d lmac=%d\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1503
dev_dbg(rvu->dev, "%s: Err Already promisc mode disabled (cgx=%d lmac=%d)\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1511
rvu_npc_enable_mcam_by_entry_index(rvu, drop_mcam_idx, NIX_INTF_RX,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1514
dev_dbg(rvu->dev, "%s: disabled promisc mode (cgx=%d lmac=%d)\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1525
int rvu_npc_exact_promisc_enable(struct rvu *rvu, u16 pcifunc)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1528
int pf = rvu_get_pf(rvu->pdev, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1534
table = rvu->hw->table;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1536
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1537
rc = rvu_npc_exact_get_drop_rule_info(rvu, NIX_INTF_TYPE_CGX, cgx_id, lmac_id,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1540
dev_dbg(rvu->dev, "%s: failed to get drop rule info cgx=%d lmac=%d\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1550
dev_dbg(rvu->dev, "%s: Already in promisc mode (cgx=%d lmac=%d)\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1558
rvu_npc_enable_mcam_by_entry_index(rvu, drop_mcam_idx, NIX_INTF_RX,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1561
dev_dbg(rvu->dev, "%s: Enabled promisc mode (cgx=%d lmac=%d)\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1573
int rvu_npc_exact_mac_addr_reset(struct rvu *rvu, struct cgx_mac_addr_reset_req *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1576
int pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1582
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1584
pfvf = rvu_get_pfvf(rvu, req->hdr.pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1586
rc = rvu_npc_exact_del_table_entry_by_id(rvu, seq_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1589
dev_err(rvu->dev, "%s MAC (%pM) del PF=%d failed\n", __func__, pfvf->mac_addr, pf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1593
dev_dbg(rvu->dev, "%s MAC (%pM) del PF=%d success (seq_id=%u)\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1605
int rvu_npc_exact_mac_addr_update(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1609
int pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1618
if (!is_cgx_config_permitted(rvu, req->hdr.pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1621
dev_dbg(rvu->dev, "%s: Update request for seq_id=%d, mac=%pM\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1624
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1626
pfvf = rvu_get_pfvf(rvu, req->hdr.pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1628
table = rvu->hw->table;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1633
entry = __rvu_npc_exact_find_entry_by_seq_id(rvu, req->index);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1635
dev_err(rvu->dev, "%s: failed to find entry for id=0x%x\n", __func__, req->index);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1644
rc = rvu_npc_exact_update_table_entry(rvu, cgx_id, lmac_id, old_mac,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1648
dev_dbg(rvu->dev, "%s mac:%pM (pfvf:%pM default:%pM) update to PF=%d success\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
165
static void npc_program_mkex_hash_tx(struct rvu *rvu, int blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1655
rc = rvu_npc_exact_del_table_entry_by_id(rvu, req->index);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1658
dev_dbg(rvu->dev, "%s MAC (%pM) del PF=%d failed\n", __func__,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1662
rc = rvu_npc_exact_add_table_entry(rvu, cgx_id, lmac_id, req->mac_addr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1666
dev_err(rvu->dev, "%s MAC (%pM) add PF=%d failed\n", __func__,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1672
dev_dbg(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
168
struct npc_mcam_kex_hash *mkex_hash = rvu->kpu.mkex_hash;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1687
int rvu_npc_exact_mac_addr_add(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1691
int pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1697
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1698
pfvf = rvu_get_pfvf(rvu, req->hdr.pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1700
rc = rvu_npc_exact_add_table_entry(rvu, cgx_id, lmac_id, req->mac_addr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1706
dev_dbg(rvu->dev, "%s MAC (%pM) add to PF=%d success (seq_id=%u)\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
171
if (is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1711
dev_err(rvu->dev, "%s MAC (%pM) add to PF=%d failed\n", __func__,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1723
int rvu_npc_exact_mac_addr_del(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1727
int pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1730
rc = rvu_npc_exact_del_table_entry_by_id(rvu, req->index);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1732
dev_dbg(rvu->dev, "%s del to PF=%d success (seq_id=%u)\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1737
dev_err(rvu->dev, "%s del to PF=%d failed (seq_id=%u)\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1749
int rvu_npc_exact_mac_addr_set(struct rvu *rvu, struct cgx_mac_addr_set_or_get *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1752
int pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1759
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1761
pfvf = &rvu->pf[pf];
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1766
rc = rvu_npc_exact_update_table_entry(rvu, cgx_id, lmac_id, pfvf->mac_addr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1772
dev_dbg(rvu->dev, "%s MAC (%pM) update to PF=%d success\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1778
rc = rvu_npc_exact_del_table_entry_by_id(rvu, req->index);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1780
dev_dbg(rvu->dev, "%s MAC (%pM) del PF=%d failed\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1785
rc = nix_get_nixlf(rvu, req->hdr.pcifunc, &nixlf, NULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1787
mcam_idx = npc_get_nixlf_mcam_index(&rvu->hw->mcam, req->hdr.pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1791
rc = rvu_npc_exact_add_table_entry(rvu, cgx_id, lmac_id, req->mac_addr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1795
dev_err(rvu->dev, "%s MAC (%pM) add PF=%d failed\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1803
dev_dbg(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1814
bool rvu_npc_exact_can_disable_feature(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1816
struct npc_exact_table *table = rvu->hw->table;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1819
if (!rvu->hw->cap.npc_exact_match_enabled)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1833
void rvu_npc_exact_disable_feature(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1835
rvu->hw->cap.npc_exact_match_enabled = false;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1843
void rvu_npc_exact_reset(struct rvu *rvu, u16 pcifunc)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1845
struct npc_exact_table *table = rvu->hw->table;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1855
dev_dbg(rvu->dev, "%s: resetting pcifun=%d seq_id=%u\n", __func__,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1859
rvu_npc_exact_del_table_entry_by_id(rvu, seq_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
187
cfg = npc_update_use_hash(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1873
int rvu_npc_exact_init(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1890
if (is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1896
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1898
dev_err(rvu->dev, "%s: NPC block not implemented\n", __func__);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1903
npc_const3 = rvu_read64(rvu, blkaddr, NPC_AF_CONST3);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1908
cfg = rvu_read64(rvu, blkaddr, NPC_AF_INTFX_KEX_CFG(NIX_INTF_RX));
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1913
rvu->hw->cap.npc_exact_match_enabled = true;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1919
dev_dbg(rvu->dev, "%s: Memory allocation for table success\n", __func__);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1920
rvu->hw->table = table;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1927
dev_dbg(rvu->dev, "%s: NPC exact match 4way_2k table(ways=%d, depth=%d)\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1934
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1943
table->mem_table.bmap = devm_bitmap_zalloc(rvu->dev, table_size,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1948
dev_dbg(rvu->dev, "%s: Allocated bitmap for 4way 2K entry table\n", __func__);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1951
table->cam_table.bmap = devm_bitmap_zalloc(rvu->dev, 32, GFP_KERNEL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1956
dev_dbg(rvu->dev, "%s: Allocated bitmap for 32 entry cam\n", __func__);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1959
table->id_bmap = devm_bitmap_zalloc(rvu->dev, table->tot_ids,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1965
dev_dbg(rvu->dev, "%s: Allocated bitmap for id map (total=%d)\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1980
rvu_exact_config_secret_key(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1981
rvu_exact_config_search_key(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1983
rvu_exact_config_table_mask(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
1984
rvu_exact_config_result_ctrl(rvu, table->mem_table.depth);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
2001
max_lmac_cnt = rvu->cgx_cnt_max * rvu->hw->lmac_per_cgx +
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
2005
if (rvu->pf2cgxlmac_map[i] == 0xFF)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
2008
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[i], &cgx_id, &lmac_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
2010
rc = rvu_npc_exact_calc_drop_rule_chan_and_mask(rvu, NIX_INTF_TYPE_CGX, cgx_id,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
2013
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
2020
pcifunc = RVU_PFFUNC(rvu->pdev, i, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
2022
dev_dbg(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
2026
rc = rvu_npc_exact_save_drop_rule_chan_and_mask(rvu, table->num_drop_rules,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
2029
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
2035
err = npc_install_mcam_drop_rule(rvu, *drop_mcam_idx,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
2041
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
2050
dev_info(rvu->dev, "initialized exact match table successfully\n");
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
206
void npc_config_secret_key(struct rvu *rvu, int blkaddr)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
208
struct hw_cap *hwcap = &rvu->hw->cap;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
209
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
216
rvu_write64(rvu, blkaddr, NPC_AF_INTFX_SECRET_KEY0(intf),
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
218
rvu_write64(rvu, blkaddr, NPC_AF_INTFX_SECRET_KEY1(intf),
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
220
rvu_write64(rvu, blkaddr, NPC_AF_INTFX_SECRET_KEY2(intf),
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
225
void npc_program_mkex_hash(struct rvu *rvu, int blkaddr)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
227
struct npc_mcam_kex_hash *mh = rvu->kpu.mkex_hash;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
228
struct hw_cap *hwcap = &rvu->hw->cap;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
230
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
233
if (is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
256
cfg = rvu_read64(rvu, blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
279
npc_program_mkex_hash_rx(rvu, blkaddr, intf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
280
npc_program_mkex_hash_tx(rvu, blkaddr, intf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
284
void npc_update_field_hash(struct rvu *rvu, u8 intf,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
293
struct npc_mcam_kex_hash *mkex_hash = rvu->kpu.mkex_hash;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
301
if (is_cn20k(rvu->pdev))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
304
if (!rvu->hw->cap.npc_hash_extract) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
305
dev_dbg(rvu->dev, "%s: Field hash extract feature is not supported\n", __func__);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
310
rvu_mbox_handler_npc_get_field_hash_info(rvu, &req, &rsp);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
313
cfg = rvu_read64(rvu, blkaddr, NPC_AF_INTFX_HASHX_CFG(intf, hash_idx));
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
343
npc_update_entry(rvu, NPC_SIP_IPV6, mdata, field_hash,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
360
npc_update_entry(rvu, NPC_DIP_IPV6, mdata,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
372
int rvu_mbox_handler_npc_get_field_hash_info(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
380
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
382
dev_err(rvu->dev, "%s: NPC block not implemented\n", __func__);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
386
secret_key[0] = rvu_read64(rvu, blkaddr, NPC_AF_INTFX_SECRET_KEY0(intf));
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
387
secret_key[1] = rvu_read64(rvu, blkaddr, NPC_AF_INTFX_SECRET_KEY1(intf));
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
388
secret_key[2] = rvu_read64(rvu, blkaddr, NPC_AF_INTFX_SECRET_KEY2(intf));
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
439
static u32 rvu_exact_calculate_hash(struct rvu *rvu, u16 chan, u16 ctype, u8 *mac,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
442
struct npc_exact_table *table = rvu->hw->table;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
457
dev_dbg(rvu->dev, "%s: ldata=0x%llx hash_key0=0x%llx hash_key2=0x%llx\n", __func__,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
463
dev_dbg(rvu->dev, "%s: hash=%x\n", __func__, hash);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
478
static int rvu_npc_exact_alloc_mem_table_entry(struct rvu *rvu, u8 *way,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
484
table = rvu->hw->table;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
496
dev_dbg(rvu->dev, "%s: mem table entry alloc success (way=%d index=%d)\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
505
dev_dbg(rvu->dev, "%s: No space in 4 way exact way, weight=%u\n", __func__,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
515
static void rvu_npc_exact_free_id(struct rvu *rvu, u32 seq_id)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
519
table = rvu->hw->table;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
523
dev_dbg(rvu->dev, "%s: freed id %d\n", __func__, seq_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
532
static bool rvu_npc_exact_alloc_id(struct rvu *rvu, u32 *seq_id)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
537
table = rvu->hw->table;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
543
dev_err(rvu->dev, "%s: No space in id bitmap (%d)\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
554
dev_dbg(rvu->dev, "%s: Allocated id (%d)\n", __func__, *seq_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
565
static int rvu_npc_exact_alloc_cam_table_entry(struct rvu *rvu, int *index)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
570
table = rvu->hw->table;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
576
dev_info(rvu->dev, "%s: No space in exact cam table, weight=%u\n", __func__,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
586
dev_dbg(rvu->dev, "%s: cam table entry alloc success (index=%d)\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
600
static u64 rvu_exact_prepare_table_entry(struct rvu *rvu, bool enable,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
625
static void rvu_exact_config_secret_key(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
629
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
630
rvu_write64(rvu, blkaddr, NPC_AF_INTFX_EXACT_SECRET0(NIX_INTF_RX),
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
633
rvu_write64(rvu, blkaddr, NPC_AF_INTFX_EXACT_SECRET1(NIX_INTF_RX),
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
636
rvu_write64(rvu, blkaddr, NPC_AF_INTFX_EXACT_SECRET2(NIX_INTF_RX),
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
644
static void rvu_exact_config_search_key(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
649
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
672
rvu_write64(rvu, blkaddr, NPC_AF_INTFX_EXACT_CFG(NIX_INTF_RX), reg_val);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
682
static void rvu_exact_config_result_ctrl(struct rvu *rvu, uint32_t depth)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
687
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
690
rvu->hw->table->mem_table.hash_mask = (depth - 1);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
694
rvu->hw->table->mem_table.hash_offset = 0;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
698
rvu_write64(rvu, blkaddr, NPC_AF_INTFX_EXACT_RESULT_CTL(NIX_INTF_RX), reg);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
706
static void rvu_exact_config_table_mask(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
711
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
723
rvu->hw->table->mem_table.mask = mask;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
726
rvu_write64(rvu, blkaddr, NPC_AF_INTFX_EXACT_MASK(NIX_INTF_RX), mask);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
734
u32 rvu_npc_exact_get_max_entries(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
738
table = rvu->hw->table;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
747
bool rvu_npc_exact_has_match_table(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
749
return rvu->hw->cap.npc_exact_match_enabled;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
761
__rvu_npc_exact_find_entry_by_seq_id(struct rvu *rvu, u32 seq_id)
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
763
struct npc_exact_table *table = rvu->hw->table;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
797
static int rvu_npc_exact_add_to_list(struct rvu *rvu, enum npc_exact_opc_type opc_type, u8 ways,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
802
struct npc_exact_table *table = rvu->hw->table;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
807
if (!rvu_npc_exact_alloc_id(rvu, seq_id)) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
808
dev_err(rvu->dev, "%s: Generate seq id failed\n", __func__);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
814
rvu_npc_exact_free_id(rvu, *seq_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
815
dev_err(rvu->dev, "%s: Memory allocation failed\n", __func__);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
834
rvu_npc_exact_free_id(rvu, *seq_id);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
836
dev_err(rvu->dev, "%s: Unknown opc type%d\n", __func__, opc_type);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
885
static void rvu_npc_exact_mem_table_write(struct rvu *rvu, int blkaddr, u8 ways,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
888
rvu_write64(rvu, blkaddr, NPC_AF_EXACT_MEM_ENTRY(ways, index), mdata);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
898
static void rvu_npc_exact_cam_table_write(struct rvu *rvu, int blkaddr,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
901
rvu_write64(rvu, blkaddr, NPC_AF_EXACT_CAM_ENTRY(index), mdata);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
912
static int rvu_npc_exact_dealloc_table_entry(struct rvu *rvu, enum npc_exact_opc_type opc_type,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
915
int blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
921
u64 null_mdata = rvu_exact_prepare_table_entry(rvu, false, 0, 0, null_dmac);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
923
table = rvu->hw->table;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
934
dev_err(rvu->dev, "%s: Trying to free an unused entry ways=%d index=%d\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
939
rvu_npc_exact_cam_table_write(rvu, blkaddr, index, null_mdata);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
948
dev_err(rvu->dev, "%s: Trying to free an unused entry index=%d\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
953
rvu_npc_exact_mem_table_write(rvu, blkaddr, ways, index, null_mdata);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
959
dev_err(rvu->dev, "%s: invalid opc type %d", __func__, opc_type);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
965
dev_dbg(rvu->dev, "%s: Successfully deleted entry (index=%d, ways=%d opc_type=%d\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
986
static int rvu_npc_exact_alloc_table_entry(struct rvu *rvu, char *mac, u16 chan, u8 ctype,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
993
table = rvu->hw->table;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
996
hash = rvu_exact_calculate_hash(rvu, chan, ctype, mac, table->mem_table.mask,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c
998
err = rvu_npc_exact_alloc_mem_table_entry(rvu, ways, index, hash);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h
208
bool rvu_npc_exact_has_match_table(struct rvu *rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h
209
u32 rvu_npc_exact_get_max_entries(struct rvu *rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h
210
int rvu_npc_exact_init(struct rvu *rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h
211
int rvu_npc_exact_mac_addr_reset(struct rvu *rvu, struct cgx_mac_addr_reset_req *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h
214
int rvu_npc_exact_mac_addr_update(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h
218
int rvu_npc_exact_mac_addr_add(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h
222
int rvu_npc_exact_mac_addr_del(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h
226
int rvu_npc_exact_mac_addr_set(struct rvu *rvu, struct cgx_mac_addr_set_or_get *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h
229
void rvu_npc_exact_reset(struct rvu *rvu, u16 pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h
231
bool rvu_npc_exact_can_disable_feature(struct rvu *rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h
232
void rvu_npc_exact_disable_feature(struct rvu *rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h
233
void rvu_npc_exact_reset(struct rvu *rvu, u16 pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h
234
u16 rvu_npc_exact_drop_rule_to_pcifunc(struct rvu *rvu, u32 drop_rule_idx);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h
235
int rvu_npc_exact_promisc_disable(struct rvu *rvu, u16 pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h
236
int rvu_npc_exact_promisc_enable(struct rvu *rvu, u16 pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h
27
rvu_write64(rvu, blkaddr, \
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h
31
rvu_write64(rvu, blkaddr, \
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h
35
rvu_read64(rvu, blkaddr, NPC_AF_INTFX_HASHX_RESULT_CTRL(intf, ld))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h
38
rvu_read64(rvu, blkaddr, NPC_AF_INTFX_HASHX_MASKX(intf, ld, mask_idx))
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h
41
rvu_write64(rvu, blkaddr, \
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h
55
void npc_update_field_hash(struct rvu *rvu, u8 intf,
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h
63
void npc_config_secret_key(struct rvu *rvu, int blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h
64
void npc_program_mkex_hash(struct rvu *rvu, int blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.h
643
if (rvu->hw->npc_ext_set) \
drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.h
651
if (rvu->hw->npc_ext_set) \
drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.h
659
if (rvu->hw->npc_ext_set) \
drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.h
667
if (rvu->hw->npc_ext_set) \
drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.h
675
if (rvu->hw->npc_ext_set) \
drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.h
683
if (rvu->hw->npc_ext_set) \
drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.h
691
if (rvu->hw->npc_ext_set) \
drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.h
699
if (rvu->hw->npc_ext_set) \
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
105
if (!is_pf_func_valid(rvu, req->pcifunc))
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
113
spin_lock(&rvu->rep_evtq_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
114
list_add_tail(&qentry->node, &rvu->rep_evtq_head);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
115
spin_unlock(&rvu->rep_evtq_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
116
queue_work(rvu->rep_evt_wq, &rvu->rep_evt_work);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
120
int rvu_rep_notify_pfvf_state(struct rvu *rvu, u16 pcifunc, bool enable)
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
125
if (!is_pf_cgxmapped(rvu, rvu_get_pf(rvu->pdev, pcifunc)))
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
128
pf = rvu_get_pf(rvu->pdev, rvu->rep_pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
130
mutex_lock(&rvu->mbox_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
131
req = otx2_mbox_alloc_msg_rep_event_up_notify(rvu, pf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
133
mutex_unlock(&rvu->mbox_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
137
req->hdr.pcifunc = rvu->rep_pcifunc;
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
142
otx2_mbox_wait_for_zero(&rvu->afpf_wq_info.mbox_up, pf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
143
otx2_mbox_msg_send_up(&rvu->afpf_wq_info.mbox_up, pf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
145
mutex_unlock(&rvu->mbox_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
150
rvu_read64(rvu, blkaddr, NIX_AF_LFX_RX_STATX(nixlf, reg))
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
153
rvu_read64(rvu, blkaddr, NIX_AF_LFX_TX_STATX(nixlf, reg))
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
155
int rvu_mbox_handler_nix_lf_stats(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
164
err = nix_get_nixlf(rvu, pcifunc, &nixlf, &blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
170
return rvu_mbox_handler_nix_stats_rst(rvu, &rst_req, &rst_rsp);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
19
*otx2_mbox_alloc_msg_ ## _fn_name(struct rvu *rvu, int devid) \
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
192
static u16 rvu_rep_get_vlan_id(struct rvu *rvu, u16 pcifunc)
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
196
for (id = 0; id < rvu->rep_cnt; id++)
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
197
if (rvu->rep2pfvf_map[id] == pcifunc)
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
202
static int rvu_rep_tx_vlan_cfg(struct rvu *rvu, u16 pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
217
err = rvu_mbox_handler_nix_vtag_cfg(rvu, &req, &rsp);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
219
dev_err(rvu->dev, "Tx vlan config failed\n");
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
226
static int rvu_rep_rx_vlan_cfg(struct rvu *rvu, u16 pcifunc)
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
239
return rvu_mbox_handler_nix_vtag_cfg(rvu, &req, &rsp);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
24
&rvu->afpf_wq_info.mbox_up, devid, sizeof(struct _req_type), \
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
242
static int rvu_rep_install_rx_rule(struct rvu *rvu, u16 pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
250
pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
253
rep_id = rvu_rep_get_vlan_id(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
256
req.vf = rvu->rep_pcifunc;
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
265
rvu_rep_rx_vlan_cfg(rvu, req.vf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
280
return rvu_mbox_handler_npc_install_flow(rvu, &req, &rsp);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
283
static int rvu_rep_install_tx_rule(struct rvu *rvu, u16 pcifunc, u16 entry,
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
293
pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
294
vlan_tci = rvu_rep_get_vlan_id(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
298
err = rvu_rep_tx_vlan_cfg(rvu, pcifunc, vlan_tci, &vidx);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
307
req.vf = rvu->rep_pcifunc;
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
319
return rvu_mbox_handler_npc_install_flow(rvu, &req, &rsp);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
322
int rvu_rep_install_mcam_rules(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
324
struct rvu_switch *rswitch = &rvu->rswitch;
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
326
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
333
if (!is_pf_cgxmapped(rvu, pf))
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
336
pcifunc = rvu_make_pcifunc(rvu->pdev, pf, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
337
rvu_get_nix_blkaddr(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
340
err = rvu_rep_install_rx_rule(rvu, pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
346
err = rvu_rep_install_tx_rule(rvu, pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
354
rvu_get_pf_numvfs(rvu, pf, &numvfs, NULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
356
pcifunc = rvu_make_pcifunc(rvu->pdev, pf, vf + 1);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
357
rvu_get_nix_blkaddr(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
36
static int rvu_rep_up_notify(struct rvu *rvu, struct rep_event *event)
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
360
err = nix_get_nixlf(rvu, pcifunc, &nixlf, NULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
365
err = rvu_rep_install_rx_rule(rvu, pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
372
err = rvu_rep_install_tx_rule(rvu, pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
38
struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, event->pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
384
spin_lock_init(&rvu->rep_evtq_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
385
INIT_LIST_HEAD(&rvu->rep_evtq_head);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
386
INIT_WORK(&rvu->rep_evt_work, rvu_rep_wq_handler);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
387
rvu->rep_evt_wq = alloc_workqueue("rep_evt_wq", WQ_PERCPU, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
388
if (!rvu->rep_evt_wq) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
389
dev_err(rvu->dev, "REP workqueue allocation failed\n");
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
395
void rvu_rep_update_rules(struct rvu *rvu, u16 pcifunc, bool ena)
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
397
struct rvu_switch *rswitch = &rvu->rswitch;
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
398
struct npc_mcam *mcam = &rvu->hw->mcam;
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
406
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
411
rvu_switch_enable_lbk_link(rvu, pcifunc, ena);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
415
npc_enable_mcam_entry(rvu, mcam, blkaddr, entry, ena);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
42
pf = rvu_get_pf(rvu->pdev, event->pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
420
int rvu_rep_pf_init(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
422
u16 pcifunc = rvu->rep_pcifunc;
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
425
pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
427
rvu_switch_enable_lbk_link(rvu, pcifunc, true);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
428
rvu_rep_rx_vlan_cfg(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
432
int rvu_mbox_handler_esw_cfg(struct rvu *rvu, struct esw_cfg_req *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
435
if (req->hdr.pcifunc != rvu->rep_pcifunc)
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
438
rvu->rep_mode = req->ena;
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
440
if (!rvu->rep_mode)
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
441
rvu_npc_free_mcam_entries(rvu, req->hdr.pcifunc, -1);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
446
int rvu_mbox_handler_get_rep_cnt(struct rvu *rvu, struct msg_req *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
452
rvu->rep_pcifunc = req->hdr.pcifunc;
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
453
rsp->rep_cnt = rvu->cgx_mapped_pfs + rvu->cgx_mapped_vfs;
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
454
rvu->rep_cnt = rsp->rep_cnt;
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
456
rvu->rep2pfvf_map = devm_kzalloc(rvu->dev, rvu->rep_cnt *
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
458
if (!rvu->rep2pfvf_map)
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
461
for (pf = 0; pf < rvu->hw->total_pfs; pf++) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
462
if (!is_pf_cgxmapped(rvu, pf))
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
464
pcifunc = rvu_make_pcifunc(rvu->pdev, pf, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
465
rvu->rep2pfvf_map[rep] = pcifunc;
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
468
rvu_get_pf_numvfs(rvu, pf, &numvfs, &hwvf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
47
mutex_lock(&rvu->mbox_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
470
rvu->rep2pfvf_map[rep] = pcifunc |
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
472
rsp->rep_pf_map[rep] = rvu->rep2pfvf_map[rep];
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
48
msg = otx2_mbox_alloc_msg_rep_event_up_notify(rvu, pf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
50
mutex_unlock(&rvu->mbox_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
59
otx2_mbox_wait_for_zero(&rvu->afpf_wq_info.mbox_up, pf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
61
otx2_mbox_msg_send_up(&rvu->afpf_wq_info.mbox_up, pf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
63
otx2_mbox_wait_for_rsp(&rvu->afpf_wq_info.mbox_up, pf);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
65
mutex_unlock(&rvu->mbox_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
71
struct rvu *rvu = container_of(work, struct rvu, rep_evt_work);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
77
spin_lock_irqsave(&rvu->rep_evtq_lock, flags);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
78
qentry = list_first_entry_or_null(&rvu->rep_evtq_head,
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
84
spin_unlock_irqrestore(&rvu->rep_evtq_lock, flags);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
90
rvu_rep_up_notify(rvu, event);
drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c
95
int rvu_mbox_handler_rep_event_notify(struct rvu *rvu, struct rep_event *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c
100
dev_info(rvu->dev, "AF: SDP%d max_vfs %d num_pf_rings %d pf_srn %d\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c
107
rvu_mbox_handler_get_sdp_chan_info(struct rvu *rvu, struct msg_req *req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c
110
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c
117
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c
119
rsp->num_chan = rvu_read64(rvu, blkaddr, NIX_AF_CONST1) & 0xFFFUL;
drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c
20
bool is_sdp_pfvf(struct rvu *rvu, u16 pcifunc)
drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c
22
u16 pf = rvu_get_pf(rvu->pdev, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c
37
bool is_sdp_pf(struct rvu *rvu, u16 pcifunc)
drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c
39
return (is_sdp_pfvf(rvu, pcifunc) &&
drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c
44
bool is_sdp_vf(struct rvu *rvu, u16 pcifunc)
drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c
47
return (rvu->vf_devid == RVU_SDP_VF_DEVID);
drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c
49
return (is_sdp_pfvf(rvu, pcifunc) &&
drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c
53
int rvu_sdp_init(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c
59
if (rvu->fwdata && rvu->fwdata->channel_data.valid) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c
61
pfvf = &rvu->pf[sdp_pf_num[0]];
drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c
62
pfvf->sdp_info = &rvu->fwdata->channel_data.info;
drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c
72
pfvf = &rvu->pf[sdp_pf_num[i]];
drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c
74
pfvf->sdp_info = devm_kzalloc(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c
82
dev_info(rvu->dev, "SDP PF number:%d\n", sdp_pf_num[i]);
drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c
93
rvu_mbox_handler_set_sdp_chan_info(struct rvu *rvu,
drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c
97
struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, req->hdr.pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
103
rvu_get_nix_blkaddr(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
11
void rvu_switch_enable_lbk_link(struct rvu *rvu, u16 pcifunc, bool enable)
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
111
err = rvu_switch_install_rx_rule(rvu, pcifunc, 0x0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
113
dev_err(rvu->dev, "RX rule for PF%d failed(%d)\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
118
err = rvu_switch_install_tx_rule(rvu, pcifunc, start + entry);
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
120
dev_err(rvu->dev, "TX rule for PF%d failed(%d)\n",
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
127
rvu_get_pf_numvfs(rvu, pf, &numvfs, NULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
129
pcifunc = rvu_make_pcifunc(rvu->pdev, pf, (vf + 1));
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
13
struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
130
rvu_get_nix_blkaddr(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
132
err = rvu_switch_install_rx_rule(rvu, pcifunc, 0x0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
134
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
140
err = rvu_switch_install_tx_rule(rvu, pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
143
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
156
void rvu_switch_enable(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
16
nix_hw = get_nix_hw(rvu->hw, pfvf->nix_blkaddr);
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
163
struct rvu_switch *rswitch = &rvu->rswitch;
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
168
alloc_req.count = rvu->cgx_mapped_pfs + rvu->cgx_mapped_vfs;
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
169
if (rvu->rep_mode)
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
171
ret = rvu_mbox_handler_npc_mcam_alloc_entry(rvu, &alloc_req,
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
174
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
18
rvu_nix_tx_tl2_cfg(rvu, pfvf->nix_blkaddr, pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
180
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
194
if (rvu->rep_mode) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
195
rvu_rep_pf_init(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
196
ret = rvu_rep_install_mcam_rules(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
198
ret = rvu_switch_install_rules(rvu);
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
208
rvu_mbox_handler_npc_delete_flow(rvu, &uninstall_req, &uninstall_rsp);
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
212
rvu_mbox_handler_npc_mcam_free_entry(rvu, &free_req, &rsp);
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
217
void rvu_switch_disable(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
22
static int rvu_switch_install_rx_rule(struct rvu *rvu, u16 pcifunc,
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
222
struct rvu_switch *rswitch = &rvu->rswitch;
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
223
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
232
if (rvu->rep_mode)
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
236
if (!is_pf_cgxmapped(rvu, pf))
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
239
pcifunc = rvu_make_pcifunc(rvu->pdev, pf, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
240
err = rvu_switch_install_rx_rule(rvu, pcifunc, 0xFFF);
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
242
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
247
rvu_switch_enable_lbk_link(rvu, pcifunc, false);
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
249
rvu_get_pf_numvfs(rvu, pf, &numvfs, NULL);
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
251
pcifunc = rvu_make_pcifunc(rvu->pdev, pf, (vf + 1));
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
252
err = rvu_switch_install_rx_rule(rvu, pcifunc, 0xFFF);
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
254
dev_err(rvu->dev,
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
258
rvu_switch_enable_lbk_link(rvu, pcifunc, false);
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
266
rvu_mbox_handler_npc_delete_flow(rvu, &uninstall_req, &uninstall_rsp);
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
267
rvu_mbox_handler_npc_mcam_free_entry(rvu, &free_req, &rsp);
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
272
void rvu_switch_update_rules(struct rvu *rvu, u16 pcifunc, bool ena)
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
274
struct rvu_switch *rswitch = &rvu->rswitch;
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
278
if (rvu->rep_mode)
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
279
return rvu_rep_update_rules(rvu, pcifunc, ena);
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
29
pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
292
rvu_switch_install_tx_rule(rvu, pcifunc, rswitch->start_entry + entry);
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
293
rvu_switch_install_rx_rule(rvu, pcifunc, 0x0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
48
return rvu_mbox_handler_npc_install_flow(rvu, &req, &rsp);
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
51
static int rvu_switch_install_tx_rule(struct rvu *rvu, u16 pcifunc, u16 entry)
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
58
pfvf = rvu_get_pfvf(rvu, pcifunc);
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
66
rvu_switch_enable_lbk_link(rvu, pcifunc, true);
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
80
return rvu_mbox_handler_npc_install_flow(rvu, &req, &rsp);
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
83
static int rvu_switch_install_rules(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
85
struct rvu_switch *rswitch = &rvu->rswitch;
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
87
struct rvu_hwinfo *hw = rvu->hw;
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
93
if (!is_pf_cgxmapped(rvu, pf))
drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c
96
pcifunc = rvu_make_pcifunc(rvu->pdev, pf, 0);
drivers/net/ethernet/marvell/octeontx2/af/rvu_trace.h
9
#define TRACE_SYSTEM rvu
