arch/x86/entry/calling.h
311
rdmsr
arch/x86/events/intel/p4.c
1376
rdmsr(MSR_IA32_MISC_ENABLE, low, high);
arch/x86/hyperv/hv_apic.c
67
rdmsr(HV_X64_MSR_EOI, reg_val, hi);
arch/x86/hyperv/hv_apic.c
71
rdmsr(HV_X64_MSR_TPR, reg_val, hi);
arch/x86/include/asm/msr.h
274
rdmsr(msr_no, *l, *h);
arch/x86/kernel/apic/apic.c
1190
rdmsr(MSR_IA32_APICBASE, l, h);
arch/x86/kernel/apic/apic.c
1972
rdmsr(MSR_IA32_APICBASE, l, h);
arch/x86/kernel/apic/apic.c
1995
rdmsr(MSR_IA32_APICBASE, l, h);
arch/x86/kernel/apic/apic.c
2472
rdmsr(MSR_IA32_APICBASE, l, h);
arch/x86/kernel/cpu/amd.c
161
rdmsr(MSR_K6_WHCR, l, h);
arch/x86/kernel/cpu/amd.c
182
rdmsr(MSR_K6_WHCR, l, h);
arch/x86/kernel/cpu/amd.c
229
rdmsr(MSR_K7_CLK_CTL, l, h);
arch/x86/kernel/cpu/centaur.c
171
rdmsr(MSR_IDT_FCR1, lo, hi);
arch/x86/kernel/cpu/centaur.c
32
rdmsr(MSR_VIA_FCR, lo, hi);
arch/x86/kernel/cpu/centaur.c
40
rdmsr(MSR_VIA_RNG, lo, hi);
arch/x86/kernel/cpu/centaur.c
54
rdmsr(MSR_VIA_FCR, lo, hi);
arch/x86/kernel/cpu/common.c
348
rdmsr(MSR_IA32_BBL_CR_CTL, lo, hi);
arch/x86/kernel/cpu/feat_ctl.c
42
rdmsr(MSR_IA32_VMX_PROCBASED_CTLS, ign, supported);
arch/x86/kernel/cpu/feat_ctl.c
53
rdmsr(MSR_IA32_VMX_PINBASED_CTLS, ign, supported);
arch/x86/kernel/cpu/intel.c
555
rdmsr(MSR_IA32_MISC_ENABLE, l1, l2);
arch/x86/kernel/cpu/mce/amd.c
439
rdmsr(tr->b->address, lo, hi);
arch/x86/kernel/cpu/mce/p5.c
29
rdmsr(MSR_IA32_P5_MC_ADDR, loaddr, hi);
arch/x86/kernel/cpu/mce/p5.c
30
rdmsr(MSR_IA32_P5_MC_TYPE, lotype, hi);
arch/x86/kernel/cpu/mce/p5.c
58
rdmsr(MSR_IA32_P5_MC_ADDR, l, h);
arch/x86/kernel/cpu/mce/p5.c
59
rdmsr(MSR_IA32_P5_MC_TYPE, l, h);
arch/x86/kernel/cpu/mce/winchip.c
33
rdmsr(MSR_IDT_FCR1, lo, hi);
arch/x86/kernel/cpu/mtrr/amd.c
15
rdmsr(MSR_K6_UWCCR, low, high);
arch/x86/kernel/cpu/mtrr/amd.c
67
rdmsr(MSR_K6_UWCCR, regs[0], regs[1]);
arch/x86/kernel/cpu/mtrr/cleanup.c
672
rdmsr(MSR_MTRRdefType, def, dummy);
arch/x86/kernel/cpu/mtrr/cleanup.c
872
rdmsr(MSR_MTRRdefType, def, dummy);
arch/x86/kernel/cpu/mtrr/generic.c
1061
rdmsr(MSR_MTRRcap, config, dummy);
arch/x86/kernel/cpu/mtrr/generic.c
115
rdmsr(MSR_AMD64_SYSCFG, lo, hi);
arch/x86/kernel/cpu/mtrr/generic.c
560
rdmsr(MTRRphysBase_MSR(index), vr->base_lo, vr->base_hi);
arch/x86/kernel/cpu/mtrr/generic.c
561
rdmsr(MTRRphysMask_MSR(index), vr->mask_lo, vr->mask_hi);
arch/x86/kernel/cpu/mtrr/generic.c
585
rdmsr(MSR_MTRRfix64K_00000, p[0], p[1]);
arch/x86/kernel/cpu/mtrr/generic.c
588
rdmsr(MSR_MTRRfix16K_80000 + i, p[2 + i * 2], p[3 + i * 2]);
arch/x86/kernel/cpu/mtrr/generic.c
590
rdmsr(MSR_MTRRfix4K_C0000 + i, p[6 + i * 2], p[7 + i * 2]);
arch/x86/kernel/cpu/mtrr/generic.c
697
rdmsr(MSR_MTRRcap, lo, dummy);
arch/x86/kernel/cpu/mtrr/generic.c
705
rdmsr(MSR_MTRRdefType, lo, dummy);
arch/x86/kernel/cpu/mtrr/generic.c
713
rdmsr(MSR_K8_TOP_MEM2, low, high);
arch/x86/kernel/cpu/mtrr/generic.c
770
rdmsr(msr, lo, hi);
arch/x86/kernel/cpu/mtrr/generic.c
819
rdmsr(MTRRphysMask_MSR(reg), mask_lo, mask_hi);
arch/x86/kernel/cpu/mtrr/generic.c
829
rdmsr(MTRRphysBase_MSR(reg), base_lo, base_hi);
arch/x86/kernel/cpu/mtrr/generic.c
890
rdmsr(MTRRphysBase_MSR(index), lo, hi);
arch/x86/kernel/cpu/mtrr/generic.c
898
rdmsr(MTRRphysMask_MSR(index), lo, hi);
arch/x86/kernel/cpu/mtrr/generic.c
951
rdmsr(MSR_MTRRdefType, deftype_lo, deftype_hi);
arch/x86/kernel/cpu/mtrr/mtrr.c
574
rdmsr(MSR_MTRRcap, config, dummy);
arch/x86/kernel/cpu/resctrl/pseudo_lock.c
253
rdmsr(MSR_MISC_FEATURE_CONTROL, saved_low, saved_high);
arch/x86/kernel/cpu/resctrl/pseudo_lock.c
349
rdmsr(MSR_MISC_FEATURE_CONTROL, saved_low, saved_high);
arch/x86/kernel/cpu/transmeta.c
86
rdmsr(0x80860004, cap_mask, uk);
arch/x86/kernel/cpu/zhaoxin.c
31
rdmsr(MSR_ZHAOXIN_FCR57, lo, hi);
arch/x86/kernel/cpu/zhaoxin.c
40
rdmsr(MSR_ZHAOXIN_FCR57, lo, hi);
arch/x86/kernel/process.c
982
rdmsr(MSR_K8_INT_PENDING_MSG, lo, hi);
arch/x86/kernel/tsc_msr.c
181
rdmsr(MSR_PLATFORM_INFO, lo, hi);
arch/x86/kernel/tsc_msr.c
184
rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
arch/x86/kernel/tsc_msr.c
189
rdmsr(MSR_FSB_FREQ, lo, hi);
arch/x86/kvm/emulate.c
4381
II(ImplicitOps | Priv, em_rdmsr, rdmsr),
arch/x86/kvm/vmx/vmx.c
2692
rdmsr(msr, vmx_msr_low, vmx_msr_high);
arch/x86/kvm/vmx/vmx.c
4556
rdmsr(MSR_IA32_SYSENTER_CS, low32, high32);
arch/x86/kvm/vmx/vmx.c
4572
rdmsr(MSR_IA32_CR_PAT, low32, high32);
arch/x86/lib/msr-smp.c
18
rdmsr(rv->msr_no, reg->l, reg->h);
arch/x86/platform/olpc/olpc-xo1-sci.c
318
rdmsr(0x51400020, lo, hi);
drivers/acpi/processor_perflib.c
298
rdmsr(MSR_AMD_PSTATE_DEF_BASE + index, lo, hi);
drivers/ata/pata_cs5535.c
113
rdmsr(ATAC_CH0D0_DMA + 2 * adev->devno, reg, dummy);
drivers/ata/pata_cs5535.c
135
rdmsr(ATAC_CH0D0_DMA + 2 * adev->devno, reg, dummy);
drivers/ata/pata_cs5536.c
91
rdmsr(MSR_IDE_CFG + reg, *val, dummy);
drivers/char/agp/nvidia-agp.c
77
rdmsr(IORR_BASE0 + 2 * iorr_addr, base_lo, base_hi);
drivers/char/agp/nvidia-agp.c
78
rdmsr(IORR_MASK0 + 2 * iorr_addr, mask_lo, mask_hi);
drivers/char/agp/nvidia-agp.c
99
rdmsr(SYSCFG, sys_lo, sys_hi);
drivers/char/hw_random/via-rng.c
153
rdmsr(MSR_VIA_RNG, lo, hi);
drivers/char/hw_random/via-rng.c
177
rdmsr(MSR_VIA_RNG, lo, hi);
drivers/cpufreq/acpi-cpufreq.c
251
rdmsr(MSR_IA32_PERF_CTL, val, dummy);
drivers/cpufreq/acpi-cpufreq.c
259
rdmsr(MSR_IA32_PERF_CTL, lo, hi);
drivers/cpufreq/acpi-cpufreq.c
268
rdmsr(MSR_AMD_PERF_CTL, val, dummy);
drivers/cpufreq/e_powersaver.c
102
rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
drivers/cpufreq/e_powersaver.c
114
rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
drivers/cpufreq/e_powersaver.c
118
rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
drivers/cpufreq/e_powersaver.c
130
rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
drivers/cpufreq/e_powersaver.c
142
rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
drivers/cpufreq/e_powersaver.c
198
rdmsr(0x1153, lo, hi);
drivers/cpufreq/e_powersaver.c
203
rdmsr(0x1154, lo, hi);
drivers/cpufreq/e_powersaver.c
240
rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
drivers/cpufreq/longhaul.c
123
rdmsr(MSR_IA32_EBL_CR_POWERON, lo, hi);
drivers/cpufreq/longhaul.c
838
rdmsr(MSR_VIA_LONGHAUL, lo, hi);
drivers/cpufreq/longrun.c
107
rdmsr(MSR_TMTA_LONGRUN_CTRL, msr_lo, msr_hi);
drivers/cpufreq/longrun.c
180
rdmsr(MSR_TMTA_LRTI_READOUT, msr_lo, msr_hi);
drivers/cpufreq/longrun.c
182
rdmsr(MSR_TMTA_LRTI_VOLT_MHZ, msr_lo, msr_hi);
drivers/cpufreq/longrun.c
187
rdmsr(MSR_TMTA_LRTI_VOLT_MHZ, msr_lo, msr_hi);
drivers/cpufreq/longrun.c
204
rdmsr(MSR_TMTA_LONGRUN_CTRL, msr_lo, msr_hi);
drivers/cpufreq/longrun.c
39
rdmsr(MSR_TMTA_LONGRUN_FLAGS, msr_lo, msr_hi);
drivers/cpufreq/longrun.c
46
rdmsr(MSR_TMTA_LONGRUN_CTRL, msr_lo, msr_hi);
drivers/cpufreq/longrun.c
95
rdmsr(MSR_TMTA_LONGRUN_FLAGS, msr_lo, msr_hi);
drivers/cpufreq/powernow-k8.c
109
rdmsr(MSR_FIDVID_STATUS, lo, hi);
drivers/cpufreq/powernow-k8.c
136
rdmsr(MSR_FIDVID_STATUS, lo, hi);
drivers/cpufreq/powernow-k8.c
294
rdmsr(MSR_FIDVID_STATUS, lo, maxvid);
drivers/cpufreq/powernow-k8.c
91
rdmsr(MSR_FIDVID_STATUS, lo, hi);
drivers/cpufreq/speedstep-centrino.c
381
rdmsr(MSR_IA32_MISC_ENABLE, l, h);
drivers/cpufreq/speedstep-centrino.c
389
rdmsr(MSR_IA32_MISC_ENABLE, l, h);
drivers/cpufreq/speedstep-lib.c
112
rdmsr(MSR_IA32_EBL_CR_POWERON, msr_lo, msr_tmp);
drivers/cpufreq/speedstep-lib.c
135
rdmsr(MSR_FSB_FREQ, msr_lo, msr_tmp);
drivers/cpufreq/speedstep-lib.c
160
rdmsr(MSR_IA32_EBL_CR_POWERON, msr_lo, msr_tmp);
drivers/cpufreq/speedstep-lib.c
189
rdmsr(0x2c, msr_lo, msr_hi);
drivers/cpufreq/speedstep-lib.c
345
rdmsr(MSR_IA32_EBL_CR_POWERON, msr_lo, msr_hi);
drivers/cpufreq/speedstep-lib.c
358
rdmsr(MSR_IA32_PLATFORM_ID, msr_lo, msr_hi);
drivers/cpufreq/speedstep-lib.c
75
rdmsr(MSR_IA32_EBL_CR_POWERON, msr_lo, msr_tmp);
drivers/gpio/gpio-cs5535.c
155
rdmsr(MSR_PIC_ZSEL_HIGH, lo, hi);
drivers/hwmon/hwmon-vid.c
245
rdmsr(0x198, dummy, vid);
drivers/hwmon/hwmon-vid.c
248
rdmsr(0x1154, brand, dummy);
drivers/misc/cs5535-mfgpt.c
116
rdmsr(MSR_PIC_ZSEL_LOW, zsel, dummy);
drivers/misc/cs5535-mfgpt.c
130
rdmsr(MSR_PIC_IRQM_LPC, lpc, dummy);
drivers/misc/cs5535-mfgpt.c
85
rdmsr(msr, value, dummy);
drivers/thermal/intel/therm_throt.c
731
rdmsr(MSR_IA32_MISC_ENABLE, l, h);
drivers/thermal/intel/therm_throt.c
757
rdmsr(MSR_THERM2_CTL, l, h);
drivers/thermal/intel/therm_throt.c
771
rdmsr(MSR_IA32_THERM_INTERRUPT, l, h);
drivers/thermal/intel/therm_throt.c
785
rdmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h);
drivers/thermal/intel/therm_throt.c
802
rdmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h);
drivers/thermal/intel/therm_throt.c
808
rdmsr(MSR_IA32_MISC_ENABLE, l, h);
drivers/thermal/intel/x86_pkg_temp_thermal.c
191
rdmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h);
drivers/thermal/intel/x86_pkg_temp_thermal.c
207
rdmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h);
drivers/thermal/intel/x86_pkg_temp_thermal.c
360
rdmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT, zonedev->msr_pkg_therm_low,
drivers/video/fbdev/geode/display_gx.c
29
rdmsr(MSR_GLIU_P2D_RO0, lo, hi);
drivers/video/fbdev/geode/lxfb_ops.c
130
rdmsr(MSR_GLCP_DOTPLL, dotpll_lo, dotpll_hi);
drivers/video/fbdev/geode/lxfb_ops.c
148
rdmsr(MSR_GLCP_DOTPLL, dotpll_lo, dotpll_hi);
drivers/video/fbdev/geode/lxfb_ops.c
319
rdmsr(MSR_GLIU_P2D_RO0, lo, hi);
include/linux/cs5535.h
54
rdmsr(MSR_PIC_ZSEL_HIGH, lo, hi);
tools/power/cpupower/debug/i386/centrino-decode.c
80
err = rdmsr(cpu, MSR_IA32_PERF_STATUS, &lo, &hi);
tools/testing/selftests/kvm/include/x86/apic.h
84
return rdmsr(MSR_IA32_APICBASE) & MSR_IA32_APICBASE_BSP;
tools/testing/selftests/kvm/include/x86/apic.h
99
return rdmsr(APIC_BASE_MSR + (reg >> 4));
tools/testing/selftests/kvm/include/x86/processor.h
1327
BUILD_READ_U64_SAFE_HELPERS(rdmsr)
tools/testing/selftests/kvm/include/x86/vmx.h
495
return rdmsr(MSR_IA32_VMX_BASIC);
tools/testing/selftests/kvm/lib/x86/apic.c
11
rdmsr(MSR_IA32_APICBASE) &
tools/testing/selftests/kvm/lib/x86/apic.c
17
uint64_t val = rdmsr(MSR_IA32_APICBASE);
tools/testing/selftests/kvm/lib/x86/apic.c
23
rdmsr(MSR_IA32_APICBASE) | MSR_IA32_APICBASE_ENABLE);
tools/testing/selftests/kvm/lib/x86/apic.c
39
wrmsr(MSR_IA32_APICBASE, rdmsr(MSR_IA32_APICBASE) |
tools/testing/selftests/kvm/lib/x86/svm.c
111
save->efer = rdmsr(MSR_EFER);
tools/testing/selftests/kvm/lib/x86/svm.c
118
save->g_pat = rdmsr(MSR_IA32_CR_PAT);
tools/testing/selftests/kvm/lib/x86/svm.c
119
save->dbgctl = rdmsr(MSR_IA32_DEBUGCTLMSR);
tools/testing/selftests/kvm/lib/x86/svm.c
96
efer = rdmsr(MSR_EFER);
tools/testing/selftests/kvm/lib/x86/vmx.c
139
cr0 &= rdmsr(MSR_IA32_VMX_CR0_FIXED1);
tools/testing/selftests/kvm/lib/x86/vmx.c
140
cr0 |= rdmsr(MSR_IA32_VMX_CR0_FIXED0);
tools/testing/selftests/kvm/lib/x86/vmx.c
144
cr4 &= rdmsr(MSR_IA32_VMX_CR4_FIXED1);
tools/testing/selftests/kvm/lib/x86/vmx.c
145
cr4 |= rdmsr(MSR_IA32_VMX_CR4_FIXED0);
tools/testing/selftests/kvm/lib/x86/vmx.c
158
feature_control = rdmsr(MSR_IA32_FEAT_CTL);
tools/testing/selftests/kvm/lib/x86/vmx.c
190
return rdmsr(MSR_IA32_VMX_EPT_VPID_CAP) & mask;
tools/testing/selftests/kvm/lib/x86/vmx.c
208
vmwrite(PIN_BASED_VM_EXEC_CONTROL, rdmsr(MSR_IA32_VMX_TRUE_PINBASED_CTLS));
tools/testing/selftests/kvm/lib/x86/vmx.c
225
rdmsr(MSR_IA32_VMX_TRUE_PROCBASED_CTLS) | CPU_BASED_ACTIVATE_SECONDARY_CONTROLS);
tools/testing/selftests/kvm/lib/x86/vmx.c
227
vmwrite(CPU_BASED_VM_EXEC_CONTROL, rdmsr(MSR_IA32_VMX_TRUE_PROCBASED_CTLS));
tools/testing/selftests/kvm/lib/x86/vmx.c
235
vmwrite(VM_EXIT_CONTROLS, rdmsr(MSR_IA32_VMX_EXIT_CTLS) |
tools/testing/selftests/kvm/lib/x86/vmx.c
239
vmwrite(VM_ENTRY_CONTROLS, rdmsr(MSR_IA32_VMX_ENTRY_CTLS) |
tools/testing/selftests/kvm/lib/x86/vmx.c
273
vmwrite(HOST_IA32_PAT, rdmsr(MSR_IA32_CR_PAT));
tools/testing/selftests/kvm/lib/x86/vmx.c
275
vmwrite(HOST_IA32_EFER, rdmsr(MSR_EFER));
tools/testing/selftests/kvm/lib/x86/vmx.c
278
rdmsr(MSR_CORE_PERF_GLOBAL_CTRL));
tools/testing/selftests/kvm/lib/x86/vmx.c
280
vmwrite(HOST_IA32_SYSENTER_CS, rdmsr(MSR_IA32_SYSENTER_CS));
tools/testing/selftests/kvm/lib/x86/vmx.c
285
vmwrite(HOST_FS_BASE, rdmsr(MSR_FS_BASE));
tools/testing/selftests/kvm/lib/x86/vmx.c
286
vmwrite(HOST_GS_BASE, rdmsr(MSR_GS_BASE));
tools/testing/selftests/kvm/lib/x86/vmx.c
291
vmwrite(HOST_IA32_SYSENTER_ESP, rdmsr(MSR_IA32_SYSENTER_ESP));
tools/testing/selftests/kvm/lib/x86/vmx.c
292
vmwrite(HOST_IA32_SYSENTER_EIP, rdmsr(MSR_IA32_SYSENTER_EIP));
tools/testing/selftests/kvm/steal_time.c
47
GUEST_ASSERT_EQ(rdmsr(MSR_KVM_STEAL_TIME), ((uint64_t)st_gva[cpu] | KVM_MSR_ENABLED));
tools/testing/selftests/kvm/x86/amx_test.c
161
GUEST_ASSERT(rdmsr(MSR_IA32_XFD) == 0);
tools/testing/selftests/kvm/x86/amx_test.c
203
GUEST_ASSERT(rdmsr(MSR_IA32_XFD) == XFEATURE_MASK_XTILE_DATA);
tools/testing/selftests/kvm/x86/amx_test.c
214
GUEST_ASSERT(rdmsr(MSR_IA32_XFD_ERR) == XFEATURE_MASK_XTILE_DATA);
tools/testing/selftests/kvm/x86/amx_test.c
215
GUEST_ASSERT(rdmsr(MSR_IA32_XFD) == XFEATURE_MASK_XTILE_DATA);
tools/testing/selftests/kvm/x86/amx_test.c
217
GUEST_ASSERT(rdmsr(MSR_IA32_XFD_ERR) == XFEATURE_MASK_XTILE_DATA);
tools/testing/selftests/kvm/x86/amx_test.c
218
GUEST_ASSERT(rdmsr(MSR_IA32_XFD) == XFEATURE_MASK_XTILE_DATA);
tools/testing/selftests/kvm/x86/aperfmperf_test.c
54
GUEST_SYNC2(rdmsr(MSR_IA32_APERF), rdmsr(MSR_IA32_MPERF));
tools/testing/selftests/kvm/x86/hyperv_clock.c
56
tsc_freq = rdmsr(HV_X64_MSR_TSC_FREQUENCY);
tools/testing/selftests/kvm/x86/hyperv_clock.c
61
t1 = rdmsr(HV_X64_MSR_TIME_REF_COUNT);
tools/testing/selftests/kvm/x86/hyperv_clock.c
65
t2 = rdmsr(HV_X64_MSR_TIME_REF_COUNT);
tools/testing/selftests/kvm/x86/hyperv_clock.c
90
r1 = rdmsr(HV_X64_MSR_TIME_REF_COUNT);
tools/testing/selftests/kvm/x86/hyperv_clock.c
97
r2 = rdmsr(HV_X64_MSR_TIME_REF_COUNT);
tools/testing/selftests/kvm/x86/hyperv_ipi.c
61
vcpu_id = rdmsr(HV_X64_MSR_VP_INDEX);
tools/testing/selftests/kvm/x86/hyperv_ipi.c
74
u32 vcpu_id = rdmsr(HV_X64_MSR_VP_INDEX);
tools/testing/selftests/kvm/x86/hyperv_tlb_flush.c
74
u32 vcpu_id = rdmsr(HV_X64_MSR_VP_INDEX);
tools/testing/selftests/kvm/x86/monitor_mwait_test.c
46
u64 val = rdmsr(MSR_IA32_MISC_ENABLE) & ~MSR_IA32_MISC_ENABLE_MWAIT;
tools/testing/selftests/kvm/x86/nested_tsc_adjust_test.c
60
adjust = rdmsr(MSR_IA32_TSC_ADJUST);
tools/testing/selftests/kvm/x86/nested_tsc_scaling_test.c
66
tsc_start = rdmsr(MSR_IA32_TSC);
tools/testing/selftests/kvm/x86/nested_tsc_scaling_test.c
68
tsc_end = rdmsr(MSR_IA32_TSC);
tools/testing/selftests/kvm/x86/nested_vmsave_vmload_test.c
52
GUEST_ASSERT_EQ(rdmsr(MSR_KERNEL_GS_BASE), 0xbbbb);
tools/testing/selftests/kvm/x86/platform_info_test.c
30
msr_platform_info = rdmsr(MSR_PLATFORM_INFO);
tools/testing/selftests/kvm/x86/pmu_counters_test.c
281
rdmsr(MSR_IA32_PERF_CAPABILITIES) & PMU_CAP_FW_WRITES)
tools/testing/selftests/kvm/x86/pmu_counters_test.c
480
uint64_t global_ctrl = rdmsr(MSR_CORE_PERF_GLOBAL_CTRL);
tools/testing/selftests/kvm/x86/pmu_counters_test.c
489
rdmsr(MSR_IA32_PERF_CAPABILITIES) & PMU_CAP_FW_WRITES)
tools/testing/selftests/kvm/x86/pmu_counters_test.c
557
val = rdmsr(MSR_CORE_PERF_FIXED_CTR0 + i);
tools/testing/selftests/kvm/x86/pmu_event_filter_test.c
100
pmc_results.instructions_retired = rdmsr(msr_base + 1) - insn_retired;
tools/testing/selftests/kvm/x86/pmu_event_filter_test.c
423
const uint64_t loads = rdmsr(msr_base + 0);
tools/testing/selftests/kvm/x86/pmu_event_filter_test.c
424
const uint64_t stores = rdmsr(msr_base + 1);
tools/testing/selftests/kvm/x86/pmu_event_filter_test.c
425
const uint64_t loads_stores = rdmsr(msr_base + 2);
tools/testing/selftests/kvm/x86/pmu_event_filter_test.c
434
pmc_results.loads = rdmsr(msr_base + 0) - loads;
tools/testing/selftests/kvm/x86/pmu_event_filter_test.c
435
pmc_results.stores = rdmsr(msr_base + 1) - stores;
tools/testing/selftests/kvm/x86/pmu_event_filter_test.c
436
pmc_results.loads_stores = rdmsr(msr_base + 2) - loads_stores;
tools/testing/selftests/kvm/x86/pmu_event_filter_test.c
743
GUEST_SYNC(rdmsr(MSR_CORE_PERF_FIXED_CTR0 + idx));
tools/testing/selftests/kvm/x86/pmu_event_filter_test.c
80
uint64_t v = rdmsr(msr) ^ bits_to_flip;
tools/testing/selftests/kvm/x86/pmu_event_filter_test.c
83
if (rdmsr(msr) != v)
tools/testing/selftests/kvm/x86/pmu_event_filter_test.c
88
if (rdmsr(msr) != v)
tools/testing/selftests/kvm/x86/pmu_event_filter_test.c
94
const uint64_t branches_retired = rdmsr(msr_base + 0);
tools/testing/selftests/kvm/x86/pmu_event_filter_test.c
95
const uint64_t insn_retired = rdmsr(msr_base + 1);
tools/testing/selftests/kvm/x86/pmu_event_filter_test.c
99
pmc_results.branches_retired = rdmsr(msr_base + 0) - branches_retired;
tools/testing/selftests/kvm/x86/sev_smoke_test.c
18
uint64_t val = rdmsr(msr);
tools/testing/selftests/kvm/x86/sev_smoke_test.c
21
GUEST_ASSERT(val == rdmsr(msr));
tools/testing/selftests/kvm/x86/sev_smoke_test.c
45
uint64_t sev_msr = rdmsr(MSR_AMD64_SEV);
tools/testing/selftests/kvm/x86/sev_smoke_test.c
60
GUEST_ASSERT(rdmsr(MSR_AMD64_SEV) & MSR_AMD64_SEV_ENABLED);
tools/testing/selftests/kvm/x86/sev_smoke_test.c
61
GUEST_ASSERT(rdmsr(MSR_AMD64_SEV) & MSR_AMD64_SEV_ES_ENABLED);
tools/testing/selftests/kvm/x86/sev_smoke_test.c
76
GUEST_ASSERT(rdmsr(MSR_AMD64_SEV) & MSR_AMD64_SEV_ENABLED);
tools/testing/selftests/kvm/x86/smm_test.c
68
uint64_t apicbase = rdmsr(MSR_IA32_APICBASE);
tools/testing/selftests/kvm/x86/tsc_msrs_test.c
16
#define rounded_rdmsr(x) ROUND(rdmsr(x))
tools/testing/selftests/kvm/x86/ucna_injection_test.c
103
ucna_addr2 = rdmsr(MSR_IA32_MCx_ADDR(UCNA_BANK));
tools/testing/selftests/kvm/x86/ucna_injection_test.c
109
uint64_t ctl2 = rdmsr(MSR_IA32_MCx_CTL2(UCNA_BANK));
tools/testing/selftests/kvm/x86/ucna_injection_test.c
117
uint64_t ctl2 = rdmsr(MSR_IA32_MCx_CTL2(UCNA_BANK));
tools/testing/selftests/kvm/x86/ucna_injection_test.c
126
i_ucna_addr = rdmsr(MSR_IA32_MCx_ADDR(UCNA_BANK));
tools/testing/selftests/kvm/x86/ucna_injection_test.c
71
uint64_t msr = rdmsr(MSR_IA32_APICBASE);
tools/testing/selftests/kvm/x86/ucna_injection_test.c
85
ctl2 = rdmsr(MSR_IA32_MCx_CTL2(UCNA_BANK));
tools/testing/selftests/kvm/x86/ucna_injection_test.c
94
ucna_addr = rdmsr(MSR_IA32_MCx_ADDR(UCNA_BANK));
tools/testing/selftests/kvm/x86/ucna_injection_test.c
97
ctl2 = rdmsr(MSR_IA32_MCx_CTL2(UCNA_BANK));
tools/testing/selftests/kvm/x86/userspace_msr_exit_test.c
296
GUEST_ASSERT(rdmsr(MSR_SYSCALL_MASK) == MSR_SYSCALL_MASK);
tools/testing/selftests/kvm/x86/userspace_msr_exit_test.c
297
GUEST_ASSERT(rdmsr(MSR_GS_BASE) == MSR_GS_BASE);
tools/testing/selftests/kvm/x86/userspace_msr_exit_test.c
299
GUEST_ASSERT(rdmsr(MSR_SYSCALL_MASK) != MSR_SYSCALL_MASK);
tools/testing/selftests/kvm/x86/userspace_msr_exit_test.c
300
GUEST_ASSERT(rdmsr(MSR_GS_BASE) != MSR_GS_BASE);
tools/testing/selftests/kvm/x86/userspace_msr_exit_test.c
307
rdmsr(MSR_IA32_POWER_CTL);
tools/testing/selftests/kvm/x86/userspace_msr_exit_test.c
310
GUEST_ASSERT(rdmsr(0xdeadbeef) == 0xdeadbeef);
tools/testing/selftests/kvm/x86/vmx_apicv_updates_test.c
70
GUEST_ASSERT(rdmsr(MSR_IA32_APICBASE) & MSR_IA32_APICBASE_EXTD);
tools/testing/selftests/kvm/x86/vmx_apicv_updates_test.c
97
GUEST_ASSERT(!(rdmsr(MSR_IA32_APICBASE) & MSR_IA32_APICBASE_EXTD));
tools/testing/selftests/kvm/x86/vmx_nested_la57_state_test.c
39
GUEST_ASSERT(rdmsr(MSR_GS_BASE) == LA57_GS_BASE);
tools/testing/selftests/kvm/x86/vmx_preemption_timer_test.c
110
vmx_pt_rate = rdmsr(MSR_IA32_VMX_MISC) & 0x1F;
tools/testing/selftests/kvm/x86/vmx_preemption_timer_test.c
86
basic.val = rdmsr(MSR_IA32_VMX_BASIC);
tools/testing/selftests/kvm/x86/vmx_preemption_timer_test.c
87
ctrl_pin_rev.val = rdmsr(basic.ctrl ? MSR_IA32_VMX_TRUE_PINBASED_CTLS
tools/testing/selftests/kvm/x86/vmx_preemption_timer_test.c
89
ctrl_exit_rev.val = rdmsr(basic.ctrl ? MSR_IA32_VMX_TRUE_EXIT_CTLS
tools/testing/selftests/kvm/x86/xapic_ipi_test.c
83
uint64_t msr = rdmsr(MSR_IA32_APICBASE);