drivers/gpu/drm/adp/adp_drv.c

131

static int adp_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/adp/adp_drv.c

137

new_plane_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/adp/adp_drv.c

153

static void adp_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/adp/adp_drv.c

160

struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/adp/adp_drv.c

163

if (!plane || !new_state)

drivers/gpu/drm/adp/adp_drv.c

169

adp = to_adp(plane->dev);

drivers/gpu/drm/adp/adp_drv.c

195

static void adp_plane_atomic_disable(struct drm_plane *plane,

drivers/gpu/drm/adp/adp_drv.c

198

struct adp_drv_private *adp = to_adp(plane->dev);

drivers/gpu/drm/adp/adp_drv.c

229

struct drm_plane *plane;

drivers/gpu/drm/adp/adp_drv.c

231

plane = __drmm_universal_plane_alloc(drm, sizeof(struct drm_plane), 0,

drivers/gpu/drm/adp/adp_drv.c

235

if (IS_ERR(plane)) {

drivers/gpu/drm/adp/adp_drv.c

237

return plane;

drivers/gpu/drm/adp/adp_drv.c

240

drm_plane_helper_add(plane, &adp_plane_helper_funcs);

drivers/gpu/drm/adp/adp_drv.c

241

return plane;

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

1006

static int amdgpu_display_verify_plane(struct amdgpu_framebuffer *rfb, int plane,

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

1012

((plane && plane < format->num_planes) ? format->hsub : 1);

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

1014

((plane && plane < format->num_planes) ? format->vsub : 1);

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

1015

unsigned int cpp = plane < format->num_planes ? format->cpp[plane] : 1;

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

1021

if (rfb->base.pitches[plane] % block_pitch) {

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

1024

rfb->base.pitches[plane], plane, block_pitch);

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

1027

if (rfb->base.pitches[plane] < min_pitch) {

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

1030

rfb->base.pitches[plane], plane, min_pitch);

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

1035

if (rfb->base.offsets[plane] % block_size) {

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

1038

rfb->base.offsets[plane], plane, block_size);

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

1042

size = rfb->base.offsets[plane] +

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

1043

(uint64_t)rfb->base.pitches[plane] / block_pitch *

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

1049

rfb->base.obj[0]->size, size, plane);

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

1864

int amdgpu_display_get_scanout_buffer(struct drm_plane *plane,

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

1870

if (drm_drv_uses_atomic_modeset(plane->dev))

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

1871

fb = plane->state->fb;

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

1873

fb = plane->fb;

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

1895

drm_warn(plane->dev, "amdgpu panic, framebuffer not in VRAM\n");

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

1900

drm_warn(plane->dev, "amdgpu panic, pixel format is not 32bits\n");

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

1909

drm_warn(plane->dev, "amdgpu bo map failed, panic won't be displayed\n");

drivers/gpu/drm/amd/amdgpu/amdgpu_display.h

55

int amdgpu_display_get_scanout_buffer(struct drm_plane *plane,

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

152

static void amdgpu_vkms_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

158

static int amdgpu_vkms_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

162

plane);

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

188

static int amdgpu_vkms_prepare_fb(struct drm_plane *plane,

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

223

if (plane->type != DRM_PLANE_TYPE_CURSOR)

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

258

static void amdgpu_vkms_cleanup_fb(struct drm_plane *plane,

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

297

struct drm_plane *plane;

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

300

plane = kzalloc_obj(*plane);

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

301

if (!plane)

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

304

ret = drm_universal_plane_init(dev, plane, 1 << index,

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

310

kfree(plane);

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

314

drm_plane_helper_add(plane, &amdgpu_vkms_primary_helper_funcs);

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

316

return plane;

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2671

static void dce_v10_0_panic_flush(struct drm_plane *plane)

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2678

if (!plane->fb)

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2681

fb = plane->fb;

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2682

amdgpu_crtc = to_amdgpu_crtc(plane->crtc);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2638

static void dce_v6_0_panic_flush(struct drm_plane *plane)

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2645

if (!plane->fb)

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2648

fb = plane->fb;

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2649

amdgpu_crtc = to_amdgpu_crtc(plane->crtc);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2597

static void dce_v8_0_panic_flush(struct drm_plane *plane)

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2604

if (!plane->fb)

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2607

fb = plane->fb;

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2608

amdgpu_crtc = to_amdgpu_crtc(plane->crtc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10134

struct drm_plane *plane;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10142

for_each_old_plane_in_state(state, plane, old_plane_state, i)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10143

if (plane->type == DRM_PLANE_TYPE_CURSOR)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10144

amdgpu_dm_plane_handle_cursor_update(plane, old_plane_state);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10154

static void amdgpu_dm_update_cursor(struct drm_plane *plane,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10158

struct amdgpu_device *adev = drm_to_adev(plane->dev);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10159

struct amdgpu_framebuffer *afb = to_amdgpu_framebuffer(plane->state->fb);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10160

struct drm_crtc *crtc = afb ? plane->state->crtc : old_plane_state->crtc;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10168

if (!plane->state->fb && !old_plane_state->fb)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10171

drm_dbg_atomic(plane->dev, "crtc_id=%d with size %d to %d\n",

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10172

amdgpu_crtc->crtc_id, plane->state->crtc_w,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10173

plane->state->crtc_h);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10175

ret = amdgpu_dm_plane_get_cursor_position(plane, crtc, &position);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10189

amdgpu_crtc->cursor_width = plane->state->crtc_w;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10190

amdgpu_crtc->cursor_height = plane->state->crtc_h;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10195

attributes.width = plane->state->crtc_w;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10196

attributes.height = plane->state->crtc_h;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10296

struct drm_plane *plane;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10354

for_each_oldnew_plane_in_state(state, plane, old_plane_state, new_plane_state, i) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10364

if (plane->type == DRM_PLANE_TYPE_CURSOR &&

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10370

amdgpu_dm_update_cursor(plane, old_plane_state, &bundle->stream_update);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10421

new_plane_state->plane->index,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10429

fill_dc_dirty_rects(plane, old_plane_state,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10469

plane->base.id, plane->name);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10489

if (plane == pcrtc->primary)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11763

struct drm_plane *plane = disconnected_acrtc->base.primary;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11799

plane_state = drm_atomic_get_plane_state(state, plane);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12281

struct drm_plane *plane,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12289

struct amdgpu_device *adev = drm_to_adev(plane->dev);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12336

if (plane->type == DRM_PLANE_TYPE_CURSOR &&

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12513

struct drm_plane *plane,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12522

drm_atomic_plane_disabling(plane->state, new_plane_state))

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12573

struct drm_plane *plane,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12600

if (plane->type == DRM_PLANE_TYPE_CURSOR && update_native_cursor) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12601

ret = dm_check_native_cursor_state(new_plane_crtc, plane,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12609

needs_reset = should_reset_plane(state, plane, old_plane_state,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12628

plane->base.id, old_plane_crtc->base.id);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12653

if (drm_atomic_plane_disabling(plane->state, new_plane_state))

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12681

plane->base.id, new_plane_crtc->base.id);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12719

dm_new_crtc_state->mpo_requested |= (plane->type == DRM_PLANE_TYPE_OVERLAY);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12731

if (enable && ret == -EINVAL && plane->type == DRM_PLANE_TYPE_CURSOR) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12732

ret = dm_check_native_cursor_state(new_plane_crtc, plane,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12786

struct drm_plane *plane;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12794

for_each_new_plane_in_state(state, plane, new_plane_state, i) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12798

plane->base.id >= prev_id))

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12804

plane->base.id > highest_id)) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12806

highest_id = plane->base.id;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12822

#define for_each_oldnew_plane_in_descending_zpos(__state, plane, old_plane_state, new_plane_state) \

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12825

for_each_if(((plane) = __i->ptr, \

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12826

(void)(plane) /* Only to avoid unused-but-set-variable warning */, \

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12890

struct drm_plane *plane,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12900

if (cstate->colorop->plane != plane)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12935

struct drm_plane *plane;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12966

for_each_oldnew_plane_in_state(state, plane, old_plane_state, plane_state, i) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12970

if ((drm_plane_mask(plane) & crtc_state->plane_mask) == 0)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12973

if (plane->type == DRM_PLANE_TYPE_CURSOR)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12990

if (dm_plane_color_pipeline_active(state, plane, true) !=

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12991

dm_plane_color_pipeline_active(state, plane, false)) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

13022

for_each_oldnew_plane_in_descending_zpos(state, plane, old_plane_state, plane_state) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

13025

if ((drm_plane_mask(plane) & crtc_state->plane_mask) == 0 ||

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

13026

plane->type == DRM_PLANE_TYPE_CURSOR)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

13036

if (dm_plane_color_pipeline_active(state, plane, false)) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

13077

struct drm_plane *plane;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

13080

drm_for_each_plane_mask(plane, dev, crtc_state->plane_mask) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

13081

new_plane_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

13082

old_plane_state = drm_atomic_get_old_plane_state(state, plane);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

13130

struct drm_plane *plane;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

13228

for_each_oldnew_plane_in_state(state, plane, old_plane_state, new_plane_state, i) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

13229

if (plane->type == DRM_PLANE_TYPE_CURSOR)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

13242

drm_for_each_plane_mask(plane, state->dev, crtc->state->plane_mask) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

13243

if (plane->type == DRM_PLANE_TYPE_CURSOR)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

13247

drm_atomic_get_plane_state(state, plane);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

13302

for_each_oldnew_plane_in_descending_zpos(state, plane, old_plane_state, new_plane_state) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

13304

ret = dm_update_plane_state(dc, state, plane,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

13343

for_each_oldnew_plane_in_descending_zpos(state, plane, old_plane_state, new_plane_state) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

13344

ret = dm_update_plane_state(dc, state, plane,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3440

struct drm_plane *plane;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3469

for_each_new_plane_in_state(dm->cached_state, plane, new_plane_state, i) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5619

struct drm_plane *plane;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5623

plane = kzalloc_obj(struct drm_plane);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5624

if (!plane) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5628

plane->type = plane_type;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5640

ret = amdgpu_dm_plane_init(dm, plane, possible_crtcs, plane_cap);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5644

kfree(plane);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5649

mode_info->planes[plane_id] = plane;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5709

const struct dc_plane_cap *plane;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5738

plane = &dm->dc->caps.planes[i];

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5741

DRM_PLANE_TYPE_PRIMARY, plane)) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5757

struct dc_plane_cap *plane = &dm->dc->caps.planes[i];

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5763

if (plane->type != DC_PLANE_TYPE_DCN_UNIVERSAL)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5766

if (!plane->pixel_format_support.argb8888)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5773

DRM_PLANE_TYPE_OVERLAY, plane)) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6559

static inline void fill_dc_dirty_rect(struct drm_plane *plane,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6572

drm_dbg(plane->dev,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6574

plane->base.id, width, height);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6576

drm_dbg(plane->dev,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6578

plane->base.id, x, y, width, height);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6609

static void fill_dc_dirty_rects(struct drm_plane *plane,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6630

if (plane->type == DRM_PLANE_TYPE_CURSOR)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6650

fill_dc_dirty_rect(new_plane_state->plane,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6673

drm_dbg(plane->dev,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6675

new_plane_state->plane->base.id,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6684

fill_dc_dirty_rect(new_plane_state->plane, &dirty_rects[i],

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6691

fill_dc_dirty_rect(new_plane_state->plane, &dirty_rects[i],

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6700

fill_dc_dirty_rect(new_plane_state->plane,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6705

fill_dc_dirty_rect(new_plane_state->plane, &dirty_rects[i],

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6716

fill_dc_dirty_rect(new_plane_state->plane, &dirty_rects[0], 0, 0,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1885

drm_dbg_kms(plane_state->plane->dev,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1887

plane_state->plane->index);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1900

drm_dbg_kms(plane_state->plane->dev,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1902

plane_state->plane->index);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1915

struct drm_device *dev = plane_state->plane->dev;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c

100

ret = drm_plane_colorop_mult_init(dev, ops[i], plane, &dm_colorop_funcs,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c

116

ret = drm_plane_colorop_ctm_3x4_init(dev, ops[i], plane,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c

134

ret = drm_plane_colorop_curve_1d_init(dev, ops[i], plane, &dm_colorop_funcs,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c

151

ret = drm_plane_colorop_curve_1d_lut_init(dev, ops[i], plane,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c

170

ret = drm_plane_colorop_3dlut_init(dev, ops[i], plane,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c

189

ret = drm_plane_colorop_curve_1d_init(dev, ops[i], plane, &dm_colorop_funcs,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c

206

ret = drm_plane_colorop_curve_1d_lut_init(dev, ops[i], plane, &dm_colorop_funcs,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c

229

int amdgpu_dm_initialize_default_pipeline(struct drm_plane *plane, struct drm_prop_enum_list *list)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c

231

struct drm_device *dev = plane->dev;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c

236

return amdgpu_dm_build_default_pipeline(dev, plane, hw_3d_lut, list);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c

67

amdgpu_dm_build_default_pipeline(struct drm_device *dev, struct drm_plane *plane,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c

83

ret = drm_plane_colorop_curve_1d_init(dev, ops[i], plane, &dm_colorop_funcs,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.h

34

int amdgpu_dm_initialize_default_pipeline(struct drm_plane *plane, struct drm_prop_enum_list *list);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.h

37

int amdgpu_dm_build_default_pipeline(struct drm_device *dev, struct drm_plane *plane,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

577

struct drm_plane *plane;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

580

drm_for_each_plane_mask(plane, state->dev, new_crtc_state->plane_mask) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

584

if (plane->type == DRM_PLANE_TYPE_CURSOR)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

587

new_plane_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

728

struct drm_plane *plane,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

750

plane,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.h

52

struct drm_plane *plane,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1024

static void amdgpu_dm_plane_helper_cleanup_fb(struct drm_plane *plane,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1103

if (state->plane->type != DRM_PLANE_TYPE_CURSOR) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1201

if (state->plane && state->plane->dev && state->fb) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1202

amdgpu_dm_plane_get_min_max_dc_plane_scaling(state->plane->dev, state->fb,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1229

static int amdgpu_dm_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1233

plane);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1234

struct amdgpu_device *adev = drm_to_adev(plane->dev);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1260

drm_dbg_atomic(plane->dev,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1262

plane->base.id, plane->name);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1276

static int amdgpu_dm_plane_atomic_async_check(struct drm_plane *plane,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1284

if (plane->type != DRM_PLANE_TYPE_OVERLAY)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1286

} else if (plane->type != DRM_PLANE_TYPE_CURSOR) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1290

new_plane_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1300

int amdgpu_dm_plane_get_cursor_position(struct drm_plane *plane, struct drm_crtc *crtc,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1304

struct amdgpu_device *adev = drm_to_adev(plane->dev);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1308

if (!crtc || !plane->state->fb)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1311

if ((plane->state->crtc_w > amdgpu_crtc->max_cursor_width) ||

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1312

(plane->state->crtc_h > amdgpu_crtc->max_cursor_height)) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1315

plane->state->crtc_w,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1316

plane->state->crtc_h);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1320

x = plane->state->crtc_x;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1321

y = plane->state->crtc_y;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1347

void amdgpu_dm_plane_handle_cursor_update(struct drm_plane *plane,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1350

struct amdgpu_device *adev = drm_to_adev(plane->dev);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1351

struct amdgpu_framebuffer *afb = to_amdgpu_framebuffer(plane->state->fb);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1352

struct drm_crtc *crtc = afb ? plane->state->crtc : old_plane_state->crtc;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1360

if (!plane->state->fb && !old_plane_state->fb)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1363

drm_dbg_atomic(plane->dev, "crtc_id=%d with size %d to %d\n",

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1364

amdgpu_crtc->crtc_id, plane->state->crtc_w,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1365

plane->state->crtc_h);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1367

ret = amdgpu_dm_plane_get_cursor_position(plane, crtc, &position);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1390

amdgpu_crtc->cursor_width = plane->state->crtc_w;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1391

amdgpu_crtc->cursor_height = plane->state->crtc_h;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1396

attributes.width = plane->state->crtc_w;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1397

attributes.height = plane->state->crtc_h;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1433

static void amdgpu_dm_plane_atomic_async_update(struct drm_plane *plane,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1437

plane);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1439

drm_atomic_get_old_plane_state(state, plane);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1443

swap(plane->state->fb, new_state->fb);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1445

plane->state->src_x = new_state->src_x;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1446

plane->state->src_y = new_state->src_y;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1447

plane->state->src_w = new_state->src_w;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1448

plane->state->src_h = new_state->src_h;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1449

plane->state->crtc_x = new_state->crtc_x;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1450

plane->state->crtc_y = new_state->crtc_y;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1451

plane->state->crtc_w = new_state->crtc_w;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1452

plane->state->crtc_h = new_state->crtc_h;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1454

amdgpu_dm_plane_handle_cursor_update(plane, old_state);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1457

static void amdgpu_dm_plane_panic_flush(struct drm_plane *plane)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1459

struct dm_plane_state *dm_plane_state = to_dm_plane_state(plane->state);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1460

struct drm_framebuffer *fb = plane->state->fb;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1489

static void amdgpu_dm_plane_drm_plane_reset(struct drm_plane *plane)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1493

if (plane->state)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1494

plane->funcs->atomic_destroy_state(plane, plane->state);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1502

__drm_atomic_helper_plane_reset(plane, &amdgpu_state->base);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1509

static struct drm_plane_state *amdgpu_dm_plane_drm_plane_duplicate_state(struct drm_plane *plane)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1513

old_dm_plane_state = to_dm_plane_state(plane->state);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1518

__drm_atomic_helper_plane_duplicate_state(plane, &dm_plane_state->base);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1549

static bool amdgpu_dm_plane_format_mod_supported(struct drm_plane *plane,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1553

struct amdgpu_device *adev = drm_to_adev(plane->dev);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1571

for (i = 0; i < plane->modifier_count; i++) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1572

if (modifier == plane->modifiers[i])

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1575

if (i == plane->modifier_count)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1611

static void amdgpu_dm_plane_drm_plane_destroy_state(struct drm_plane *plane,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1630

drm_atomic_helper_plane_destroy_state(plane, state);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1636

struct drm_plane *plane)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1645

drm_object_attach_property(&plane->base,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1648

drm_object_attach_property(&plane->base,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1651

drm_object_attach_property(&plane->base,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1656

drm_object_attach_property(&plane->base,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1662

drm_object_attach_property(&plane->base,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1666

drm_object_attach_property(&plane->base,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1668

drm_object_attach_property(&plane->base,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1671

drm_object_attach_property(&plane->base,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1674

drm_object_attach_property(&plane->base,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1676

drm_object_attach_property(&plane->base,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1682

drm_object_attach_property(&plane->base,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1684

drm_object_attach_property(&plane->base,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1687

drm_object_attach_property(&plane->base,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1694

dm_atomic_plane_set_property(struct drm_plane *plane,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1700

struct amdgpu_device *adev = drm_to_adev(plane->dev);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1705

ret = drm_property_replace_blob_from_id(plane->dev,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1723

ret = drm_property_replace_blob_from_id(plane->dev,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1731

ret = drm_property_replace_blob_from_id(plane->dev,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1744

ret = drm_property_replace_blob_from_id(plane->dev,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1752

ret = drm_property_replace_blob_from_id(plane->dev,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1765

drm_dbg_atomic(plane->dev,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1767

plane->base.id, plane->name,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1776

dm_atomic_plane_get_property(struct drm_plane *plane,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1782

struct amdgpu_device *adev = drm_to_adev(plane->dev);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1819

dm_plane_init_colorops(struct drm_plane *plane)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1822

struct drm_device *dev = plane->dev;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1829

if (plane->type == DRM_PLANE_TYPE_CURSOR)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1834

ret = amdgpu_dm_initialize_default_pipeline(plane, &pipelines[len]);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1836

drm_err(plane->dev, "Failed to create color pipeline for plane %d: %d\n",

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1837

plane->base.id, ret);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1843

drm_plane_create_color_pipeline_property(plane, pipelines, len);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1870

struct drm_plane *plane,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1881

num_formats = amdgpu_dm_plane_get_plane_formats(plane, plane_cap, formats,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1884

res = amdgpu_dm_plane_get_plane_modifiers(dm->adev, plane->type, &modifiers);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1891

res = drm_universal_plane_init(adev_to_drm(dm->adev), plane, possible_crtcs,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1893

modifiers, plane->type, NULL);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1898

if (plane->type == DRM_PLANE_TYPE_OVERLAY &&

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1904

drm_plane_create_alpha_property(plane);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1905

drm_plane_create_blend_mode_property(plane, blend_caps);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1908

if (plane->type == DRM_PLANE_TYPE_PRIMARY) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1913

drm_plane_create_zpos_immutable_property(plane, primary_zpos);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1914

} else if (plane->type == DRM_PLANE_TYPE_OVERLAY) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1919

unsigned int zpos = primary_zpos + 1 + drm_plane_index(plane);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1921

drm_plane_create_zpos_property(plane, zpos, 0, 254);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1922

} else if (plane->type == DRM_PLANE_TYPE_CURSOR) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1923

drm_plane_create_zpos_immutable_property(plane, 255);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1926

if ((plane->type == DRM_PLANE_TYPE_PRIMARY ||

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1927

plane->type == DRM_PLANE_TYPE_OVERLAY) &&

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1933

plane,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1947

plane->type != DRM_PLANE_TYPE_CURSOR)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1948

drm_plane_create_rotation_property(plane, DRM_MODE_ROTATE_0,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1952

plane->type != DRM_PLANE_TYPE_CURSOR)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1953

drm_plane_enable_fb_damage_clips(plane);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1955

if (plane->type == DRM_PLANE_TYPE_PRIMARY)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1956

drm_plane_helper_add(plane, &dm_primary_plane_helper_funcs);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1958

drm_plane_helper_add(plane, &dm_plane_helper_funcs);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1961

dm_atomic_plane_attach_color_mgmt_properties(dm, plane);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1963

res = dm_plane_init_colorops(plane);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1969

if (plane->funcs->reset)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1970

plane->funcs->reset(plane);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

781

static int amdgpu_dm_plane_get_plane_formats(const struct drm_plane *plane,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

793

if (plane->type == DRM_PLANE_TYPE_PRIMARY ||

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

794

(plane_cap && plane_cap->type == DC_PLANE_TYPE_DCN_UNIVERSAL && plane->type != DRM_PLANE_TYPE_CURSOR)) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

813

switch (plane->type) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

926

static int amdgpu_dm_plane_helper_prepare_fb(struct drm_plane *plane,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

961

if (plane->type != DRM_PLANE_TYPE_CURSOR)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

980

r = drm_gem_plane_helper_prepare_fb(plane, new_state);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

998

dm_plane_state_old = to_dm_plane_state(plane->state);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.h

32

int amdgpu_dm_plane_get_cursor_position(struct drm_plane *plane, struct drm_crtc *crtc,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.h

35

void amdgpu_dm_plane_handle_cursor_update(struct drm_plane *plane,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.h

57

struct drm_plane *plane,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

258

__entry->plane_id = state->plane->base.id;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

259

__entry->plane_type = state->plane->type;

drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_colorop_test.c

155

struct drm_plane *plane;

drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_colorop_test.c

173

plane = drm_kunit_helper_create_primary_plane(test, drm,

drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_colorop_test.c

175

KUNIT_ASSERT_NOT_ERR_OR_NULL(test, plane);

drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_colorop_test.c

184

ret = amdgpu_dm_build_default_pipeline(drm, plane, true, &list);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

1160

plane->flip_immediate && stream_status->mall_stream_config.type == SUBVP_MAIN;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

740

struct dc_plane_state *plane = pipe_ctx->plane_state;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

750

if (!plane || !stream)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

763

plane->flip_immediate && stream_status->mall_stream_config.type == SUBVP_MAIN;

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2089

int resource_get_dpp_pipes_for_plane(const struct dc_plane_state *plane,

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2098

if (pipe->plane_state == plane && pipe->prev_odm_pipe == NULL) {

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2100

pipe->top_pipe->plane_state != plane)

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2112

while (pipe && pipe->plane_state == plane) {

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2613

const struct dc_plane_state *plane,

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2623

if (pipe->plane_state == plane)

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

3679

const struct dc_plane_state *plane,

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

3688

dpp_pipe_count = resource_get_dpp_pipes_for_plane(plane,

drivers/gpu/drm/amd/display/dc/dc.h

2122

uint32_t dc_get_opp_for_plane(struct dc *dc, struct dc_plane_state *plane);

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1122

struct dc_plane_state *plane;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1149

struct pipe_ctx *dpp_pipe, struct dc_plane_state *plane, int diff)

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1155

if (table->mpc_combines[i].plane == plane &&

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1164

table->mpc_combines[i].plane = plane;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1285

table->mpc_combines[i].plane,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

10321

dml_print("DML::%s: pipe_idx=%d UseMALLForPStateChange=%0d\n", __func__, pipe_idx, mode_lib->ms.cache_display_cfg.plane.UseMALLForPStateChange[plane_idx]);

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

10322

return (mode_lib->ms.cache_display_cfg.plane.UseMALLForPStateChange[plane_idx] == dml_use_mall_pstate_change_phantom_pipe);

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6339

CalculatePrefetchSchedule_params->DPP_RECOUT_WIDTH = (dml_uint_t)(mode_lib->ms.SwathWidthYThisState[k] / mode_lib->ms.cache_display_cfg.plane.HRatio[k]);

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6342

CalculatePrefetchSchedule_params->GPUVMPageTableLevels = mode_lib->ms.cache_display_cfg.plane.GPUVMMaxPageTableLevels;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6343

CalculatePrefetchSchedule_params->GPUVMEnable = mode_lib->ms.cache_display_cfg.plane.GPUVMEnable;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6344

CalculatePrefetchSchedule_params->HostVMEnable = mode_lib->ms.cache_display_cfg.plane.HostVMEnable;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6345

CalculatePrefetchSchedule_params->HostVMMaxNonCachedPageTableLevels = mode_lib->ms.cache_display_cfg.plane.HostVMMaxPageTableLevels;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6347

CalculatePrefetchSchedule_params->DynamicMetadataEnable = mode_lib->ms.cache_display_cfg.plane.DynamicMetadataEnable[k];

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6349

CalculatePrefetchSchedule_params->DynamicMetadataLinesBeforeActiveRequired = mode_lib->ms.cache_display_cfg.plane.DynamicMetadataLinesBeforeActiveRequired[k];

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6350

CalculatePrefetchSchedule_params->DynamicMetadataTransmittedBytes = mode_lib->ms.cache_display_cfg.plane.DynamicMetadataTransmittedBytes[k];

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6422

mode_lib->ms.cache_display_cfg.plane.HostVMEnable,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6428

if (mode_lib->ms.cache_display_cfg.plane.GPUVMEnable && mode_lib->ms.cache_display_cfg.plane.HostVMEnable)

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6440

mode_lib->ms.cache_display_cfg.plane.GPUVMEnable,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6441

mode_lib->ms.cache_display_cfg.plane.HostVMEnable,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6447

mode_lib->ms.cache_display_cfg.plane.HostVMMaxPageTableLevels);

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6465

mode_lib->ms.cache_display_cfg.plane.UseMALLForPStateChange[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6479

myPipe->ScalerEnabled = mode_lib->ms.cache_display_cfg.plane.ScalerEnabled[k];

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6480

myPipe->SourceScan = mode_lib->ms.cache_display_cfg.plane.SourceScan[k];

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6486

myPipe->NumberOfCursors = mode_lib->ms.cache_display_cfg.plane.NumberOfCursors[k];

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6529

mode_lib->ms.cache_display_cfg.plane.UseMALLForPStateChange[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6537

mode_lib->ms.cache_display_cfg.plane.CursorWidth[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6538

mode_lib->ms.cache_display_cfg.plane.CursorBPP[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6551

mode_lib->ms.cursor_bw_pre[k] = mode_lib->ms.cache_display_cfg.plane.NumberOfCursors[k] * mode_lib->ms.cache_display_cfg.plane.CursorWidth[k] *

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6552

mode_lib->ms.cache_display_cfg.plane.CursorBPP[k] / 8.0 / (mode_lib->ms.cache_display_cfg.timing.HTotal[k] /

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6560

mode_lib->ms.cache_display_cfg.plane.UseMALLForPStateChange,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6655

mode_lib->ms.cache_display_cfg.plane.GPUVMMaxPageTableLevels,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6656

mode_lib->ms.cache_display_cfg.plane.HostVMEnable,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6657

mode_lib->ms.cache_display_cfg.plane.HostVMMaxPageTableLevels,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6658

mode_lib->ms.cache_display_cfg.plane.GPUVMEnable,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6667

mode_lib->ms.cache_display_cfg.plane.VRatio[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6668

mode_lib->ms.cache_display_cfg.plane.VRatioChroma[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6687

mode_lib->ms.cache_display_cfg.plane.UseMALLForPStateChange,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6758

CalculateWatermarks_params->UseMALLForPStateChange = mode_lib->ms.cache_display_cfg.plane.UseMALLForPStateChange;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6780

CalculateWatermarks_params->LBBitPerPixel = mode_lib->ms.cache_display_cfg.plane.LBBitPerPixel;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6783

CalculateWatermarks_params->HRatio = mode_lib->ms.cache_display_cfg.plane.HRatio;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6784

CalculateWatermarks_params->HRatioChroma = mode_lib->ms.cache_display_cfg.plane.HRatioChroma;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6785

CalculateWatermarks_params->VTaps = mode_lib->ms.cache_display_cfg.plane.VTaps;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6786

CalculateWatermarks_params->VTapsChroma = mode_lib->ms.cache_display_cfg.plane.VTapsChroma;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6787

CalculateWatermarks_params->VRatio = mode_lib->ms.cache_display_cfg.plane.VRatio;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6788

CalculateWatermarks_params->VRatioChroma = mode_lib->ms.cache_display_cfg.plane.VRatioChroma;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6793

CalculateWatermarks_params->BlendingAndTiming = mode_lib->ms.cache_display_cfg.plane.BlendingAndTiming;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6834

CalculateVMRowAndSwath_params->UseMALLForStaticScreen = mode_lib->ms.cache_display_cfg.plane.UseMALLForStaticScreen;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6835

CalculateVMRowAndSwath_params->UseMALLForPStateChange = mode_lib->ms.cache_display_cfg.plane.UseMALLForPStateChange;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6839

CalculateVMRowAndSwath_params->GPUVMEnable = mode_lib->ms.cache_display_cfg.plane.GPUVMEnable;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6840

CalculateVMRowAndSwath_params->HostVMEnable = mode_lib->ms.cache_display_cfg.plane.HostVMEnable;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6841

CalculateVMRowAndSwath_params->HostVMMaxNonCachedPageTableLevels = mode_lib->ms.cache_display_cfg.plane.HostVMMaxPageTableLevels;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6842

CalculateVMRowAndSwath_params->GPUVMMaxPageTableLevels = mode_lib->ms.cache_display_cfg.plane.GPUVMMaxPageTableLevels;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6843

CalculateVMRowAndSwath_params->GPUVMMinPageSizeKBytes = mode_lib->ms.cache_display_cfg.plane.GPUVMMinPageSizeKBytes;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6845

CalculateVMRowAndSwath_params->PTEBufferModeOverrideEn = mode_lib->ms.cache_display_cfg.plane.PTEBufferModeOverrideEn;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6846

CalculateVMRowAndSwath_params->PTEBufferModeOverrideVal = mode_lib->ms.cache_display_cfg.plane.PTEBufferMode;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6927

if (mode_lib->ms.cache_display_cfg.plane.ScalerEnabled[k] == false

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6935

|| mode_lib->ms.cache_display_cfg.plane.HRatio[k] != 1.0

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6936

|| mode_lib->ms.cache_display_cfg.plane.HTaps[k] != 1.0

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6937

|| mode_lib->ms.cache_display_cfg.plane.VRatio[k] != 1.0

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6938

|| mode_lib->ms.cache_display_cfg.plane.VTaps[k] != 1.0)) {

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6940

} else if (mode_lib->ms.cache_display_cfg.plane.VTaps[k] < 1.0 || mode_lib->ms.cache_display_cfg.plane.VTaps[k] > 8.0

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6941

|| mode_lib->ms.cache_display_cfg.plane.HTaps[k] < 1.0 || mode_lib->ms.cache_display_cfg.plane.HTaps[k] > 8.0

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6942

|| (mode_lib->ms.cache_display_cfg.plane.HTaps[k] > 1.0 && (mode_lib->ms.cache_display_cfg.plane.HTaps[k] % 2) == 1)

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6943

|| mode_lib->ms.cache_display_cfg.plane.HRatio[k] > mode_lib->ms.ip.max_hscl_ratio

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6944

|| mode_lib->ms.cache_display_cfg.plane.VRatio[k] > mode_lib->ms.ip.max_vscl_ratio

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6945

|| mode_lib->ms.cache_display_cfg.plane.HRatio[k] > mode_lib->ms.cache_display_cfg.plane.HTaps[k]

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6946

|| mode_lib->ms.cache_display_cfg.plane.VRatio[k] > mode_lib->ms.cache_display_cfg.plane.VTaps[k]

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6953

&& (mode_lib->ms.cache_display_cfg.plane.VTapsChroma[k] < 1 || mode_lib->ms.cache_display_cfg.plane.VTapsChroma[k] > 8 || mode_lib->ms.cache_display_cfg.plane.HTapsChroma[k] < 1 || mode_lib->ms.cache_display_cfg.plane.HTapsChroma[k] > 8 ||

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6954

(mode_lib->ms.cache_display_cfg.plane.HTapsChroma[k] > 1 && mode_lib->ms.cache_display_cfg.plane.HTapsChroma[k] % 2 == 1) ||

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6955

mode_lib->ms.cache_display_cfg.plane.HRatioChroma[k] > mode_lib->ms.ip.max_hscl_ratio ||

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6956

mode_lib->ms.cache_display_cfg.plane.VRatioChroma[k] > mode_lib->ms.ip.max_vscl_ratio ||

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6957

mode_lib->ms.cache_display_cfg.plane.HRatioChroma[k] > mode_lib->ms.cache_display_cfg.plane.HTapsChroma[k] ||

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6958

mode_lib->ms.cache_display_cfg.plane.VRatioChroma[k] > mode_lib->ms.cache_display_cfg.plane.VTapsChroma[k]))) {

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6966

if (mode_lib->ms.cache_display_cfg.surface.SurfaceTiling[k] == dml_sw_linear && (!(!dml_is_vertical_rotation(mode_lib->ms.cache_display_cfg.plane.SourceScan[k])) || mode_lib->ms.cache_display_cfg.surface.DCCEnable[k] == true)) {

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6993

if (!dml_is_vertical_rotation(mode_lib->ms.cache_display_cfg.plane.SourceScan[k])) {

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6994

mode_lib->ms.SwathWidthYSingleDPP[k] = mode_lib->ms.cache_display_cfg.plane.ViewportWidth[k];

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6995

mode_lib->ms.SwathWidthCSingleDPP[k] = mode_lib->ms.cache_display_cfg.plane.ViewportWidthChroma[k];

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6997

mode_lib->ms.SwathWidthYSingleDPP[k] = mode_lib->ms.cache_display_cfg.plane.ViewportHeight[k];

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6998

mode_lib->ms.SwathWidthCSingleDPP[k] = mode_lib->ms.cache_display_cfg.plane.ViewportHeightChroma[k];

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7002

mode_lib->ms.ReadBandwidthLuma[k] = mode_lib->ms.SwathWidthYSingleDPP[k] * dml_ceil(mode_lib->ms.BytePerPixelInDETY[k], 1.0) / (mode_lib->ms.cache_display_cfg.timing.HTotal[k] / mode_lib->ms.cache_display_cfg.timing.PixelClock[k]) * mode_lib->ms.cache_display_cfg.plane.VRatio[k];

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7003

mode_lib->ms.ReadBandwidthChroma[k] = mode_lib->ms.SwathWidthYSingleDPP[k] / 2 * dml_ceil(mode_lib->ms.BytePerPixelInDETC[k], 2.0) / (mode_lib->ms.cache_display_cfg.timing.HTotal[k] / mode_lib->ms.cache_display_cfg.timing.PixelClock[k]) * mode_lib->ms.cache_display_cfg.plane.VRatio[k] / 2.0;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7069

mode_lib->ms.cache_display_cfg.plane.HRatio[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7070

mode_lib->ms.cache_display_cfg.plane.HRatioChroma[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7071

mode_lib->ms.cache_display_cfg.plane.VRatio[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7072

mode_lib->ms.cache_display_cfg.plane.VRatioChroma[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7077

mode_lib->ms.cache_display_cfg.plane.HTaps[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7078

mode_lib->ms.cache_display_cfg.plane.HTapsChroma[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7079

mode_lib->ms.cache_display_cfg.plane.VTaps[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7080

mode_lib->ms.cache_display_cfg.plane.VTapsChroma[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7090

} else if (!dml_is_vertical_rotation(mode_lib->ms.cache_display_cfg.plane.SourceScan[k]) && mode_lib->ms.BytePerPixelC[k] > 0 && mode_lib->ms.cache_display_cfg.surface.SourcePixelFormat[k] != dml_rgbe_alpha) {

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7092

} else if (dml_is_vertical_rotation(mode_lib->ms.cache_display_cfg.plane.SourceScan[k]) && mode_lib->ms.BytePerPixelC[k] > 0 && mode_lib->ms.cache_display_cfg.surface.SourcePixelFormat[k] != dml_rgbe_alpha) {

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7096

} else if (dml_is_vertical_rotation(mode_lib->ms.cache_display_cfg.plane.SourceScan[k]) && mode_lib->ms.BytePerPixelY[k] == 8 && mode_lib->ms.cache_display_cfg.surface.DCCEnable[k] == true) {

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7107

mode_lib->ms.MaximumSwathWidthInLineBufferLuma = mode_lib->ms.ip.line_buffer_size_bits * dml_max(mode_lib->ms.cache_display_cfg.plane.HRatio[k], 1.0) / mode_lib->ms.cache_display_cfg.plane.LBBitPerPixel[k] /

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7108

(mode_lib->ms.cache_display_cfg.plane.VTaps[k] + dml_max(dml_ceil(mode_lib->ms.cache_display_cfg.plane.VRatio[k], 1.0) - 2, 0.0));

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7114

* dml_max(mode_lib->ms.cache_display_cfg.plane.HRatioChroma[k], 1.0)

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7115

/ mode_lib->ms.cache_display_cfg.plane.LBBitPerPixel[k]

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7116

/ (mode_lib->ms.cache_display_cfg.plane.VTapsChroma[k]

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7117

+ dml_max(dml_ceil(mode_lib->ms.cache_display_cfg.plane.VRatioChroma[k], 1.0) - 2, 0.0));

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7125

if (mode_lib->ms.cache_display_cfg.plane.BlendingAndTiming[k] == k &&

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7147

CalculateSwathAndDETConfiguration_params->DETSizeOverride = mode_lib->ms.cache_display_cfg.plane.DETSizeOverride;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7148

CalculateSwathAndDETConfiguration_params->UseMALLForPStateChange = mode_lib->ms.cache_display_cfg.plane.UseMALLForPStateChange;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7165

CalculateSwathAndDETConfiguration_params->SourceScan = mode_lib->ms.cache_display_cfg.plane.SourceScan;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7166

CalculateSwathAndDETConfiguration_params->ViewportStationary = mode_lib->ms.cache_display_cfg.plane.ViewportStationary;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7169

CalculateSwathAndDETConfiguration_params->ViewportWidth = mode_lib->ms.cache_display_cfg.plane.ViewportWidth;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7170

CalculateSwathAndDETConfiguration_params->ViewportHeight = mode_lib->ms.cache_display_cfg.plane.ViewportHeight;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7171

CalculateSwathAndDETConfiguration_params->ViewportXStart = mode_lib->ms.cache_display_cfg.plane.ViewportXStart;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7172

CalculateSwathAndDETConfiguration_params->ViewportYStart = mode_lib->ms.cache_display_cfg.plane.ViewportYStart;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7173

CalculateSwathAndDETConfiguration_params->ViewportXStartC = mode_lib->ms.cache_display_cfg.plane.ViewportXStartC;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7174

CalculateSwathAndDETConfiguration_params->ViewportYStartC = mode_lib->ms.cache_display_cfg.plane.ViewportYStartC;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7184

CalculateSwathAndDETConfiguration_params->BlendingAndTiming = mode_lib->ms.cache_display_cfg.plane.BlendingAndTiming;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7190

CalculateSwathAndDETConfiguration_params->HRatio = mode_lib->ms.cache_display_cfg.plane.HRatio;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7191

CalculateSwathAndDETConfiguration_params->HRatioChroma = mode_lib->ms.cache_display_cfg.plane.HRatioChroma;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7278

(mode_lib->ms.cache_display_cfg.plane.BlendingAndTiming[k] == k),

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7435

if (mode_lib->ms.cache_display_cfg.plane.BlendingAndTiming[k] == k) {

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7482

mode_lib->ms.cache_display_cfg.plane.BlendingAndTiming[k] == k && (mode_lib->ms.cache_display_cfg.output.OutputEncoder[k] == dml_dp || mode_lib->ms.cache_display_cfg.output.OutputEncoder[k] == dml_dp2p0 || mode_lib->ms.cache_display_cfg.output.OutputEncoder[k] == dml_edp ||

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7499

if (mode_lib->ms.cache_display_cfg.plane.BlendingAndTiming[k] == k && (mode_lib->ms.cache_display_cfg.output.OutputEncoder[k] == dml_dp || mode_lib->ms.cache_display_cfg.output.OutputEncoder[k] == dml_dp2p0 || mode_lib->ms.cache_display_cfg.output.OutputEncoder[k] == dml_edp ||

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7546

if (mode_lib->ms.cache_display_cfg.plane.BlendingAndTiming[k] == k &&

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7565

if (mode_lib->ms.cache_display_cfg.plane.BlendingAndTiming[k] == k && mode_lib->ms.ODMModePerState[k] == dml_odm_mode_combine_2to1 && mode_lib->ms.cache_display_cfg.output.OutputEncoder[k] == dml_hdmi) {

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7568

if (mode_lib->ms.cache_display_cfg.plane.BlendingAndTiming[k] == k && mode_lib->ms.ODMModePerState[k] == dml_odm_mode_combine_4to1 && (mode_lib->ms.cache_display_cfg.output.OutputEncoder[k] == dml_dp ||

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7576

if (mode_lib->ms.cache_display_cfg.plane.BlendingAndTiming[k] == k) {

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7670

if (mode_lib->ms.cache_display_cfg.plane.BlendingAndTiming[k] == m && mode_lib->ms.RequiresDSC[m] == true) {

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7686

CalculateSwathAndDETConfiguration_params->DETSizeOverride = mode_lib->ms.cache_display_cfg.plane.DETSizeOverride;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7687

CalculateSwathAndDETConfiguration_params->UseMALLForPStateChange = mode_lib->ms.cache_display_cfg.plane.UseMALLForPStateChange;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7704

CalculateSwathAndDETConfiguration_params->SourceScan = mode_lib->ms.cache_display_cfg.plane.SourceScan;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7705

CalculateSwathAndDETConfiguration_params->ViewportStationary = mode_lib->ms.cache_display_cfg.plane.ViewportStationary;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7708

CalculateSwathAndDETConfiguration_params->ViewportWidth = mode_lib->ms.cache_display_cfg.plane.ViewportWidth;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7709

CalculateSwathAndDETConfiguration_params->ViewportHeight = mode_lib->ms.cache_display_cfg.plane.ViewportHeight;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7710

CalculateSwathAndDETConfiguration_params->ViewportXStart = mode_lib->ms.cache_display_cfg.plane.ViewportXStart;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7711

CalculateSwathAndDETConfiguration_params->ViewportYStart = mode_lib->ms.cache_display_cfg.plane.ViewportYStart;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7712

CalculateSwathAndDETConfiguration_params->ViewportXStartC = mode_lib->ms.cache_display_cfg.plane.ViewportXStartC;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7713

CalculateSwathAndDETConfiguration_params->ViewportYStartC = mode_lib->ms.cache_display_cfg.plane.ViewportYStartC;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7723

CalculateSwathAndDETConfiguration_params->BlendingAndTiming = mode_lib->ms.cache_display_cfg.plane.BlendingAndTiming;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7729

CalculateSwathAndDETConfiguration_params->HRatio = mode_lib->ms.cache_display_cfg.plane.HRatio;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7730

CalculateSwathAndDETConfiguration_params->HRatioChroma = mode_lib->ms.cache_display_cfg.plane.HRatioChroma;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7767

mode_lib->ms.cursor_bw[k] = mode_lib->ms.cache_display_cfg.plane.NumberOfCursors[k] * mode_lib->ms.cache_display_cfg.plane.CursorWidth[k] * mode_lib->ms.cache_display_cfg.plane.CursorBPP[k] / 8.0 / (mode_lib->ms.cache_display_cfg.timing.HTotal[k] / mode_lib->ms.cache_display_cfg.timing.PixelClock[k]) * mode_lib->ms.cache_display_cfg.plane.VRatio[k];

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7773

mode_lib->ms.cache_display_cfg.plane.UseMALLForStaticScreen,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7775

mode_lib->ms.cache_display_cfg.plane.ViewportStationary,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7776

mode_lib->ms.cache_display_cfg.plane.ViewportXStart,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7777

mode_lib->ms.cache_display_cfg.plane.ViewportYStart,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7778

mode_lib->ms.cache_display_cfg.plane.ViewportXStartC,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7779

mode_lib->ms.cache_display_cfg.plane.ViewportYStartC,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7780

mode_lib->ms.cache_display_cfg.plane.ViewportWidth,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7781

mode_lib->ms.cache_display_cfg.plane.ViewportHeight,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7783

mode_lib->ms.cache_display_cfg.plane.ViewportWidthChroma,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7784

mode_lib->ms.cache_display_cfg.plane.ViewportHeightChroma,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7828

s->SurfParameters[k].SourceScan = mode_lib->ms.cache_display_cfg.plane.SourceScan[k];

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7829

s->SurfParameters[k].ViewportHeight = mode_lib->ms.cache_display_cfg.plane.ViewportHeight[k];

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7830

s->SurfParameters[k].ViewportHeightChroma = mode_lib->ms.cache_display_cfg.plane.ViewportHeightChroma[k];

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7847

s->SurfParameters[k].VRatio = mode_lib->ms.cache_display_cfg.plane.VRatio[k];

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7848

s->SurfParameters[k].VRatioChroma = mode_lib->ms.cache_display_cfg.plane.VRatioChroma[k];

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7849

s->SurfParameters[k].VTaps = mode_lib->ms.cache_display_cfg.plane.VTaps[k];

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7850

s->SurfParameters[k].VTapsChroma = mode_lib->ms.cache_display_cfg.plane.VTapsChroma[k];

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7855

s->SurfParameters[k].ViewportStationary = mode_lib->ms.cache_display_cfg.plane.ViewportStationary[k];

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7856

s->SurfParameters[k].ViewportXStart = mode_lib->ms.cache_display_cfg.plane.ViewportXStart[k];

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7857

s->SurfParameters[k].ViewportYStart = mode_lib->ms.cache_display_cfg.plane.ViewportYStart[k];

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7858

s->SurfParameters[k].ViewportXStartC = mode_lib->ms.cache_display_cfg.plane.ViewportXStartC[k];

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7859

s->SurfParameters[k].ViewportYStartC = mode_lib->ms.cache_display_cfg.plane.ViewportYStartC[k];

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7860

s->SurfParameters[k].FORCE_ONE_ROW_FOR_FRAME = mode_lib->ms.cache_display_cfg.plane.ForceOneRowForFrame[k];

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7914

mode_lib->ms.cache_display_cfg.plane.UseMALLForPStateChange[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7922

mode_lib->ms.cache_display_cfg.plane.CursorWidth[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7923

mode_lib->ms.cache_display_cfg.plane.CursorBPP[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7924

mode_lib->ms.cache_display_cfg.plane.VRatio[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7925

mode_lib->ms.cache_display_cfg.plane.VRatioChroma[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7941

mode_lib->ms.cache_display_cfg.plane.VRatio,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7942

mode_lib->ms.cache_display_cfg.plane.VRatioChroma,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7946

mode_lib->ms.cache_display_cfg.plane.HRatio,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7947

mode_lib->ms.cache_display_cfg.plane.HRatioChroma,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7963

if (mode_lib->ms.cache_display_cfg.plane.BlendingAndTiming[k] == k) {

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7978

if (mode_lib->ms.cache_display_cfg.plane.BlendingAndTiming[m] == k && mode_lib->ms.cache_display_cfg.writeback.WritebackEnable[m] == true) {

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7995

if (mode_lib->ms.cache_display_cfg.plane.BlendingAndTiming[k] == m) {

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8042

mode_lib->ms.support.ImmediateFlipOrHostVMAndPStateWithMALLFullFrameOrPhantomPipe || ((mode_lib->ms.cache_display_cfg.plane.HostVMEnable == true || mode_lib->ms.policy.ImmediateFlipRequirement[k] != dml_immediate_flip_not_required) &&

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8043

(mode_lib->ms.cache_display_cfg.plane.UseMALLForPStateChange[k] == dml_use_mall_pstate_change_full_frame || mode_lib->ms.cache_display_cfg.plane.UseMALLForPStateChange[k] == dml_use_mall_pstate_change_phantom_pipe));

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8049

((mode_lib->ms.cache_display_cfg.plane.UseMALLForStaticScreen[k] == dml_use_mall_static_screen_enable || mode_lib->ms.cache_display_cfg.plane.UseMALLForStaticScreen[k] == dml_use_mall_static_screen_optimize) && (mode_lib->ms.cache_display_cfg.plane.UseMALLForPStateChange[k] == dml_use_mall_pstate_change_phantom_pipe)) ||

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8050

((mode_lib->ms.cache_display_cfg.plane.UseMALLForStaticScreen[k] == dml_use_mall_static_screen_disable || mode_lib->ms.cache_display_cfg.plane.UseMALLForStaticScreen[k] == dml_use_mall_static_screen_optimize) && (mode_lib->ms.cache_display_cfg.plane.UseMALLForPStateChange[k] == dml_use_mall_pstate_change_full_frame));

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8058

if (mode_lib->ms.cache_display_cfg.plane.UseMALLForPStateChange[k] == dml_use_mall_pstate_change_full_frame)

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8060

if (mode_lib->ms.cache_display_cfg.plane.UseMALLForPStateChange[k] == dml_use_mall_pstate_change_sub_viewport) {

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8065

if (mode_lib->ms.cache_display_cfg.plane.UseMALLForPStateChange[k] == dml_use_mall_pstate_change_phantom_pipe)

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8072

UseMinimumDCFCLK_params->UseMALLForPStateChange = mode_lib->ms.cache_display_cfg.plane.UseMALLForPStateChange;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8085

UseMinimumDCFCLK_params->GPUVMEnable = mode_lib->ms.cache_display_cfg.plane.GPUVMEnable;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8086

UseMinimumDCFCLK_params->GPUVMMaxPageTableLevels = mode_lib->ms.cache_display_cfg.plane.GPUVMMaxPageTableLevels;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8087

UseMinimumDCFCLK_params->HostVMEnable = mode_lib->ms.cache_display_cfg.plane.HostVMEnable;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8090

UseMinimumDCFCLK_params->HostVMMaxNonCachedPageTableLevels = mode_lib->ms.cache_display_cfg.plane.HostVMMaxPageTableLevels;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8098

UseMinimumDCFCLK_params->DynamicMetadataTransmittedBytes = mode_lib->ms.cache_display_cfg.plane.DynamicMetadataTransmittedBytes;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8099

UseMinimumDCFCLK_params->DynamicMetadataLinesBeforeActiveRequired = mode_lib->ms.cache_display_cfg.plane.DynamicMetadataLinesBeforeActiveRequired;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8121

UseMinimumDCFCLK_params->DynamicMetadataEnable = mode_lib->ms.cache_display_cfg.plane.DynamicMetadataEnable;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8134

mode_lib->ms.cache_display_cfg.plane.HostVMEnable, mode_lib->ms.DCFCLKState[j], mode_lib->ms.state.fabricclk_mhz,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8137

mode_lib->ms.cache_display_cfg.plane.HostVMEnable,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8162

((mode_lib->ms.state.use_ideal_dram_bw_strobe && !mode_lib->ms.cache_display_cfg.plane.HostVMEnable) ?

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8181

if (mode_lib->ms.cache_display_cfg.plane.CursorWidth[k] > 0.0) {

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8182

if (mode_lib->ms.cache_display_cfg.plane.CursorBPP[k] == 64 && mode_lib->ms.ip.cursor_64bpp_support == false) {

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8223

if (mode_lib->ms.cache_display_cfg.plane.ViewportWidth[k] > mode_lib->ms.cache_display_cfg.surface.SurfaceWidthY[k] || mode_lib->ms.cache_display_cfg.plane.ViewportHeight[k] > mode_lib->ms.cache_display_cfg.surface.SurfaceHeightY[k]) {

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8227

if (mode_lib->ms.cache_display_cfg.plane.ViewportWidthChroma[k] > mode_lib->ms.cache_display_cfg.surface.SurfaceWidthC[k] || mode_lib->ms.cache_display_cfg.plane.ViewportHeightChroma[k] > mode_lib->ms.cache_display_cfg.surface.SurfaceHeightC[k]) {

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8296

&& ((mode_lib->ms.cache_display_cfg.plane.HostVMEnable == false && !s->ImmediateFlipRequiredFinal) || mode_lib->ms.support.ImmediateFlipSupportedForState[j])

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8362

if (mode_lib->ms.cache_display_cfg.plane.BlendingAndTiming[k] == k) {

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8399

mode_lib->ms.cache_display_cfg.plane.HostVMEnable,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8480

if (mode_lib->ms.cache_display_cfg.plane.BlendingAndTiming[k] == k) {

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8502

mode_lib->ms.cache_display_cfg.plane.HRatio[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8503

mode_lib->ms.cache_display_cfg.plane.HRatioChroma[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8504

mode_lib->ms.cache_display_cfg.plane.VRatio[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8505

mode_lib->ms.cache_display_cfg.plane.VRatioChroma[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8510

mode_lib->ms.cache_display_cfg.plane.HTaps[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8511

mode_lib->ms.cache_display_cfg.plane.HTapsChroma[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8512

mode_lib->ms.cache_display_cfg.plane.VTaps[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8513

mode_lib->ms.cache_display_cfg.plane.VTapsChroma[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8568

mode_lib->ms.cache_display_cfg.plane.SourceScan,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8569

mode_lib->ms.cache_display_cfg.plane.ViewportStationary,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8570

mode_lib->ms.cache_display_cfg.plane.ViewportWidth,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8571

mode_lib->ms.cache_display_cfg.plane.ViewportHeight,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8572

mode_lib->ms.cache_display_cfg.plane.ViewportXStart,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8573

mode_lib->ms.cache_display_cfg.plane.ViewportYStart,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8574

mode_lib->ms.cache_display_cfg.plane.ViewportXStartC,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8575

mode_lib->ms.cache_display_cfg.plane.ViewportYStartC,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8587

mode_lib->ms.cache_display_cfg.plane.BlendingAndTiming,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8589

mode_lib->ms.cache_display_cfg.plane.HRatio,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8603

locals->ReadBandwidthSurfaceLuma[k] = locals->SwathWidthSingleDPPY[k] * locals->BytePerPixelY[k] / (mode_lib->ms.cache_display_cfg.timing.HTotal[k] / mode_lib->ms.cache_display_cfg.timing.PixelClock[k]) * mode_lib->ms.cache_display_cfg.plane.VRatio[k];

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8604

locals->ReadBandwidthSurfaceChroma[k] = locals->SwathWidthSingleDPPC[k] * locals->BytePerPixelC[k] / (mode_lib->ms.cache_display_cfg.timing.HTotal[k] / mode_lib->ms.cache_display_cfg.timing.PixelClock[k]) * mode_lib->ms.cache_display_cfg.plane.VRatioChroma[k];

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8609

CalculateSwathAndDETConfiguration_params->DETSizeOverride = mode_lib->ms.cache_display_cfg.plane.DETSizeOverride;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8610

CalculateSwathAndDETConfiguration_params->UseMALLForPStateChange = mode_lib->ms.cache_display_cfg.plane.UseMALLForPStateChange;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8627

CalculateSwathAndDETConfiguration_params->SourceScan = mode_lib->ms.cache_display_cfg.plane.SourceScan;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8628

CalculateSwathAndDETConfiguration_params->ViewportStationary = mode_lib->ms.cache_display_cfg.plane.ViewportStationary;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8631

CalculateSwathAndDETConfiguration_params->ViewportWidth = mode_lib->ms.cache_display_cfg.plane.ViewportWidth;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8632

CalculateSwathAndDETConfiguration_params->ViewportHeight = mode_lib->ms.cache_display_cfg.plane.ViewportHeight;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8633

CalculateSwathAndDETConfiguration_params->ViewportXStart = mode_lib->ms.cache_display_cfg.plane.ViewportXStart;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8634

CalculateSwathAndDETConfiguration_params->ViewportYStart = mode_lib->ms.cache_display_cfg.plane.ViewportYStart;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8635

CalculateSwathAndDETConfiguration_params->ViewportXStartC = mode_lib->ms.cache_display_cfg.plane.ViewportXStartC;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8636

CalculateSwathAndDETConfiguration_params->ViewportYStartC = mode_lib->ms.cache_display_cfg.plane.ViewportYStartC;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8646

CalculateSwathAndDETConfiguration_params->BlendingAndTiming = mode_lib->ms.cache_display_cfg.plane.BlendingAndTiming;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8652

CalculateSwathAndDETConfiguration_params->HRatio = mode_lib->ms.cache_display_cfg.plane.HRatio;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8653

CalculateSwathAndDETConfiguration_params->HRatioChroma = mode_lib->ms.cache_display_cfg.plane.HRatioChroma;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8681

mode_lib->ms.cache_display_cfg.plane.VRatio,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8682

mode_lib->ms.cache_display_cfg.plane.VRatioChroma,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8686

mode_lib->ms.cache_display_cfg.plane.HRatio,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8687

mode_lib->ms.cache_display_cfg.plane.HRatioChroma,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8701

if ((mode_lib->ms.cache_display_cfg.plane.BlendingAndTiming[k] != k) || !mode_lib->ms.cache_display_cfg.hw.DSCEnabled[k]) {

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8738

if (j != k && mode_lib->ms.cache_display_cfg.plane.BlendingAndTiming[k] == j && mode_lib->ms.cache_display_cfg.hw.DSCEnabled[j])

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8745

mode_lib->ms.cache_display_cfg.plane.UseMALLForStaticScreen,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8747

mode_lib->ms.cache_display_cfg.plane.ViewportStationary,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8748

mode_lib->ms.cache_display_cfg.plane.ViewportXStart,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8749

mode_lib->ms.cache_display_cfg.plane.ViewportYStart,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8750

mode_lib->ms.cache_display_cfg.plane.ViewportXStartC,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8751

mode_lib->ms.cache_display_cfg.plane.ViewportYStartC,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8752

mode_lib->ms.cache_display_cfg.plane.ViewportWidth,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8753

mode_lib->ms.cache_display_cfg.plane.ViewportHeight,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8755

mode_lib->ms.cache_display_cfg.plane.ViewportWidthChroma,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8756

mode_lib->ms.cache_display_cfg.plane.ViewportHeightChroma,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8778

s->SurfaceParameters[k].SourceScan = mode_lib->ms.cache_display_cfg.plane.SourceScan[k];

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8779

s->SurfaceParameters[k].ViewportHeight = mode_lib->ms.cache_display_cfg.plane.ViewportHeight[k];

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8780

s->SurfaceParameters[k].ViewportHeightChroma = mode_lib->ms.cache_display_cfg.plane.ViewportHeightChroma[k];

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8797

s->SurfaceParameters[k].VRatio = mode_lib->ms.cache_display_cfg.plane.VRatio[k];

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8798

s->SurfaceParameters[k].VRatioChroma = mode_lib->ms.cache_display_cfg.plane.VRatioChroma[k];

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8799

s->SurfaceParameters[k].VTaps = mode_lib->ms.cache_display_cfg.plane.VTaps[k];

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8800

s->SurfaceParameters[k].VTapsChroma = mode_lib->ms.cache_display_cfg.plane.VTapsChroma[k];

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8805

s->SurfaceParameters[k].ViewportStationary = mode_lib->ms.cache_display_cfg.plane.ViewportStationary[k];

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8806

s->SurfaceParameters[k].ViewportXStart = mode_lib->ms.cache_display_cfg.plane.ViewportXStart[k];

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8807

s->SurfaceParameters[k].ViewportYStart = mode_lib->ms.cache_display_cfg.plane.ViewportYStart[k];

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8808

s->SurfaceParameters[k].ViewportXStartC = mode_lib->ms.cache_display_cfg.plane.ViewportXStartC[k];

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8809

s->SurfaceParameters[k].ViewportYStartC = mode_lib->ms.cache_display_cfg.plane.ViewportYStartC[k];

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8810

s->SurfaceParameters[k].FORCE_ONE_ROW_FOR_FRAME = mode_lib->ms.cache_display_cfg.plane.ForceOneRowForFrame[k];

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8821

CalculateVMRowAndSwath_params->UseMALLForStaticScreen = mode_lib->ms.cache_display_cfg.plane.UseMALLForStaticScreen;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8822

CalculateVMRowAndSwath_params->UseMALLForPStateChange = mode_lib->ms.cache_display_cfg.plane.UseMALLForPStateChange;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8826

CalculateVMRowAndSwath_params->GPUVMEnable = mode_lib->ms.cache_display_cfg.plane.GPUVMEnable;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8827

CalculateVMRowAndSwath_params->HostVMEnable = mode_lib->ms.cache_display_cfg.plane.HostVMEnable;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8828

CalculateVMRowAndSwath_params->HostVMMaxNonCachedPageTableLevels = mode_lib->ms.cache_display_cfg.plane.HostVMMaxPageTableLevels;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8829

CalculateVMRowAndSwath_params->GPUVMMaxPageTableLevels = mode_lib->ms.cache_display_cfg.plane.GPUVMMaxPageTableLevels;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8830

CalculateVMRowAndSwath_params->GPUVMMinPageSizeKBytes = mode_lib->ms.cache_display_cfg.plane.GPUVMMinPageSizeKBytes;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8832

CalculateVMRowAndSwath_params->PTEBufferModeOverrideEn = mode_lib->ms.cache_display_cfg.plane.PTEBufferModeOverrideEn;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8833

CalculateVMRowAndSwath_params->PTEBufferModeOverrideVal = mode_lib->ms.cache_display_cfg.plane.PTEBufferMode;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8889

mode_lib->ms.cache_display_cfg.plane.HostVMEnable,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8911

if (mode_lib->ms.cache_display_cfg.plane.GPUVMEnable && mode_lib->ms.cache_display_cfg.plane.HostVMEnable)

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8931

mode_lib->ms.cache_display_cfg.plane.GPUVMEnable,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8932

mode_lib->ms.cache_display_cfg.plane.HostVMEnable,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8938

mode_lib->ms.cache_display_cfg.plane.HostVMMaxPageTableLevels);

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8943

if (mode_lib->ms.cache_display_cfg.plane.BlendingAndTiming[k] == k) {

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8959

if (mode_lib->ms.cache_display_cfg.plane.BlendingAndTiming[j] == k

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8981

if (mode_lib->ms.cache_display_cfg.plane.BlendingAndTiming[k] == j)

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8993

CalculateUrgentBurstFactor(mode_lib->ms.cache_display_cfg.plane.UseMALLForPStateChange[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9001

mode_lib->ms.cache_display_cfg.plane.CursorWidth[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9002

mode_lib->ms.cache_display_cfg.plane.CursorBPP[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9003

mode_lib->ms.cache_display_cfg.plane.VRatio[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9004

mode_lib->ms.cache_display_cfg.plane.VRatioChroma[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9016

locals->cursor_bw[k] = mode_lib->ms.cache_display_cfg.plane.NumberOfCursors[k] * mode_lib->ms.cache_display_cfg.plane.CursorWidth[k] * mode_lib->ms.cache_display_cfg.plane.CursorBPP[k] / 8.0 /

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9017

((dml_float_t) mode_lib->ms.cache_display_cfg.timing.HTotal[k] / mode_lib->ms.cache_display_cfg.timing.PixelClock[k]) * mode_lib->ms.cache_display_cfg.plane.VRatio[k];

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9071

mode_lib->ms.cache_display_cfg.plane.UseMALLForPStateChange[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9085

myPipe->ScalerEnabled = mode_lib->ms.cache_display_cfg.plane.ScalerEnabled[k];

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9086

myPipe->SourceScan = mode_lib->ms.cache_display_cfg.plane.SourceScan[k];

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9092

myPipe->NumberOfCursors = mode_lib->ms.cache_display_cfg.plane.NumberOfCursors[k];

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9118

CalculatePrefetchSchedule_params->DPP_RECOUT_WIDTH = (dml_uint_t)(locals->SwathWidthY[k] / mode_lib->ms.cache_display_cfg.plane.HRatio[k]);

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9123

CalculatePrefetchSchedule_params->GPUVMPageTableLevels = mode_lib->ms.cache_display_cfg.plane.GPUVMMaxPageTableLevels;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9124

CalculatePrefetchSchedule_params->GPUVMEnable = mode_lib->ms.cache_display_cfg.plane.GPUVMEnable;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9125

CalculatePrefetchSchedule_params->HostVMEnable = mode_lib->ms.cache_display_cfg.plane.HostVMEnable;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9126

CalculatePrefetchSchedule_params->HostVMMaxNonCachedPageTableLevels = mode_lib->ms.cache_display_cfg.plane.HostVMMaxPageTableLevels;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9128

CalculatePrefetchSchedule_params->DynamicMetadataEnable = mode_lib->ms.cache_display_cfg.plane.DynamicMetadataEnable[k];

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9130

CalculatePrefetchSchedule_params->DynamicMetadataLinesBeforeActiveRequired = mode_lib->ms.cache_display_cfg.plane.DynamicMetadataLinesBeforeActiveRequired[k];

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9131

CalculatePrefetchSchedule_params->DynamicMetadataTransmittedBytes = mode_lib->ms.cache_display_cfg.plane.DynamicMetadataTransmittedBytes[k];

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9181

mode_lib->ms.cache_display_cfg.plane.UseMALLForPStateChange[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9189

mode_lib->ms.cache_display_cfg.plane.CursorWidth[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9190

mode_lib->ms.cache_display_cfg.plane.CursorBPP[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9203

locals->cursor_bw_pre[k] = mode_lib->ms.cache_display_cfg.plane.NumberOfCursors[k] * mode_lib->ms.cache_display_cfg.plane.CursorWidth[k] * mode_lib->ms.cache_display_cfg.plane.CursorBPP[k] / 8.0 / (mode_lib->ms.cache_display_cfg.timing.HTotal[k] / mode_lib->ms.cache_display_cfg.timing.PixelClock[k]) * locals->VRatioPrefetchY[k];

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9213

dml_print("DML::%s: k=%0u VRatioY=%f\n", __func__, k, mode_lib->ms.cache_display_cfg.plane.VRatio[k]);

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9257

mode_lib->ms.cache_display_cfg.plane.UseMALLForPStateChange,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9287

mode_lib->ms.cache_display_cfg.plane.UseMALLForPStateChange,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9371

mode_lib->ms.cache_display_cfg.plane.GPUVMMaxPageTableLevels,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9372

mode_lib->ms.cache_display_cfg.plane.HostVMEnable,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9373

mode_lib->ms.cache_display_cfg.plane.HostVMMaxPageTableLevels,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9374

mode_lib->ms.cache_display_cfg.plane.GPUVMEnable,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9383

mode_lib->ms.cache_display_cfg.plane.VRatio[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9384

mode_lib->ms.cache_display_cfg.plane.VRatioChroma[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9402

mode_lib->ms.cache_display_cfg.plane.UseMALLForPStateChange,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9430

mode_lib->ms.cache_display_cfg.plane.UseMALLForPStateChange,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9474

((!mode_lib->ms.support.ImmediateFlipSupport && !mode_lib->ms.cache_display_cfg.plane.HostVMEnable && !s->ImmediateFlipRequirementFinal) ||

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9481

dml_print("DML::%s: HostVMEnable = %u\n", __func__, mode_lib->ms.cache_display_cfg.plane.HostVMEnable);

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9531

CalculateWatermarks_params->UseMALLForPStateChange = mode_lib->ms.cache_display_cfg.plane.UseMALLForPStateChange;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9553

CalculateWatermarks_params->LBBitPerPixel = mode_lib->ms.cache_display_cfg.plane.LBBitPerPixel;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9556

CalculateWatermarks_params->HRatio = mode_lib->ms.cache_display_cfg.plane.HRatio;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9557

CalculateWatermarks_params->HRatioChroma = mode_lib->ms.cache_display_cfg.plane.HRatioChroma;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9558

CalculateWatermarks_params->VTaps = mode_lib->ms.cache_display_cfg.plane.VTaps;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9559

CalculateWatermarks_params->VTapsChroma = mode_lib->ms.cache_display_cfg.plane.VTapsChroma;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9560

CalculateWatermarks_params->VRatio = mode_lib->ms.cache_display_cfg.plane.VRatio;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9561

CalculateWatermarks_params->VRatioChroma = mode_lib->ms.cache_display_cfg.plane.VRatioChroma;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9566

CalculateWatermarks_params->BlendingAndTiming = mode_lib->ms.cache_display_cfg.plane.BlendingAndTiming;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9616

mode_lib->ms.cache_display_cfg.plane.VRatio,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9617

mode_lib->ms.cache_display_cfg.plane.VRatioChroma,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9623

mode_lib->ms.cache_display_cfg.plane.HRatio,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9624

mode_lib->ms.cache_display_cfg.plane.HRatioChroma,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9630

mode_lib->ms.cache_display_cfg.plane.SourceScan,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9631

mode_lib->ms.cache_display_cfg.plane.NumberOfCursors,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9632

mode_lib->ms.cache_display_cfg.plane.CursorWidth,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9633

mode_lib->ms.cache_display_cfg.plane.CursorBPP,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9654

mode_lib->ms.cache_display_cfg.plane.GPUVMEnable,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9658

mode_lib->ms.cache_display_cfg.plane.VRatio,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9659

mode_lib->ms.cache_display_cfg.plane.VRatioChroma,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9666

mode_lib->ms.cache_display_cfg.plane.SourceScan,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9707

mode_lib->ms.cache_display_cfg.plane.GPUVMEnable,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9708

mode_lib->ms.cache_display_cfg.plane.GPUVMMaxPageTableLevels,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9749

if (!mode_lib->ms.cache_display_cfg.plane.DynamicMetadataEnable[k])

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9774

mode_lib->ms.cache_display_cfg.plane.SourceScan[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9800

if (mode_lib->ms.cache_display_cfg.plane.DynamicMetadataEnable[k] && mode_lib->ms.ip.dynamic_metadata_vm_enabled) {

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9879

if (mode_lib->ms.cache_display_cfg.plane.UseMALLForPStateChange[k] != dml_use_mall_pstate_change_phantom_pipe) {

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9886

CalculateStutterEfficiency_params->UseMALLForPStateChange = mode_lib->ms.cache_display_cfg.plane.UseMALLForPStateChange;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9901

CalculateStutterEfficiency_params->BlendingAndTiming = mode_lib->ms.cache_display_cfg.plane.BlendingAndTiming;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9921

CalculateStutterEfficiency_params->VRatio = mode_lib->ms.cache_display_cfg.plane.VRatio;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9922

CalculateStutterEfficiency_params->SourceScan = mode_lib->ms.cache_display_cfg.plane.SourceScan;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9958

mode_lib->ms.cache_display_cfg.plane.UseMALLForPStateChange,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9973

mode_lib->ms.cache_display_cfg.plane.BlendingAndTiming,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9993

mode_lib->ms.cache_display_cfg.plane.VRatio,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9994

mode_lib->ms.cache_display_cfg.plane.SourceScan,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core_structs.h

678

struct dml_plane_cfg_st plane;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_util.c

412

dml_print("DML: MODE SUPPORT: Host VM or Immediate Flip Supported : %s\n", ((mode_lib->ms.cache_display_cfg.plane.HostVMEnable == false && !mode_lib->scratch.dml_core_mode_support_locals.ImmediateFlipRequiredFinal) || mode_lib->ms.support.ImmediateFlipSupportedForState[j]) ? "Supported" : "NOT Supported");

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_util.c

554

void dml_print_dml_display_cfg_plane(const struct dml_plane_cfg_st *plane, dml_uint_t num_plane)

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_util.c

556

(void)plane;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_util.c

558

dml_print("DML: plane_cfg: GPUVMEnable = %d\n", plane->GPUVMEnable);

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_util.c

559

dml_print("DML: plane_cfg: HostVMEnable = %d\n", plane->HostVMEnable);

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_util.c

560

dml_print("DML: plane_cfg: GPUVMMaxPageTableLevels = %d\n", plane->GPUVMMaxPageTableLevels);

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_util.c

561

dml_print("DML: plane_cfg: HostVMMaxPageTableLevels = %d\n", plane->HostVMMaxPageTableLevels);

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_util.c

564

dml_print("DML: plane_cfg: plane=%d, GPUVMMinPageSizeKBytes = %d\n", i, plane->GPUVMMinPageSizeKBytes[i]);

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_util.c

565

dml_print("DML: plane_cfg: plane=%d, ForceOneRowForFrame = %d\n", i, plane->ForceOneRowForFrame[i]);

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_util.c

566

dml_print("DML: plane_cfg: plane=%d, PTEBufferModeOverrideEn = %d\n", i, plane->PTEBufferModeOverrideEn[i]);

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_util.c

567

dml_print("DML: plane_cfg: plane=%d, PTEBufferMode = %d\n", i, plane->PTEBufferMode[i]);

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_util.c

568

dml_print("DML: plane_cfg: plane=%d, DETSizeOverride = %d\n", i, plane->DETSizeOverride[i]);

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_util.c

569

dml_print("DML: plane_cfg: plane=%d, UseMALLForStaticScreen = %d\n", i, plane->UseMALLForStaticScreen[i]);

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_util.c

570

dml_print("DML: plane_cfg: plane=%d, UseMALLForPStateChange = %d\n", i, plane->UseMALLForPStateChange[i]);

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_util.c

571

dml_print("DML: plane_cfg: plane=%d, BlendingAndTiming = %d\n", i, plane->BlendingAndTiming[i]);

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_util.c

572

dml_print("DML: plane_cfg: plane=%d, ViewportWidth = %d\n", i, plane->ViewportWidth[i]);

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_util.c

573

dml_print("DML: plane_cfg: plane=%d, ViewportHeight = %d\n", i, plane->ViewportHeight[i]);

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_util.c

574

dml_print("DML: plane_cfg: plane=%d, ViewportWidthChroma = %d\n", i, plane->ViewportWidthChroma[i]);

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_util.c

575

dml_print("DML: plane_cfg: plane=%d, ViewportHeightChroma = %d\n", i, plane->ViewportHeightChroma[i]);

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_util.c

576

dml_print("DML: plane_cfg: plane=%d, ViewportXStart = %d\n", i, plane->ViewportXStart[i]);

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_util.c

577

dml_print("DML: plane_cfg: plane=%d, ViewportXStartC = %d\n", i, plane->ViewportXStartC[i]);

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_util.c

578

dml_print("DML: plane_cfg: plane=%d, ViewportYStart = %d\n", i, plane->ViewportYStart[i]);

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_util.c

579

dml_print("DML: plane_cfg: plane=%d, ViewportYStartC = %d\n", i, plane->ViewportYStartC[i]);

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_util.c

580

dml_print("DML: plane_cfg: plane=%d, ViewportStationary = %d\n", i, plane->ViewportStationary[i]);

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_util.c

581

dml_print("DML: plane_cfg: plane=%d, ScalerEnabled = %d\n", i, plane->ScalerEnabled[i]);

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_util.c

582

dml_print("DML: plane_cfg: plane=%d, HRatio = %3.2f\n", i, plane->HRatio[i]);

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_util.c

583

dml_print("DML: plane_cfg: plane=%d, VRatio = %3.2f\n", i, plane->VRatio[i]);

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_util.c

584

dml_print("DML: plane_cfg: plane=%d, HRatioChroma = %3.2f\n", i, plane->HRatioChroma[i]);

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_util.c

585

dml_print("DML: plane_cfg: plane=%d, VRatioChroma = %3.2f\n", i, plane->VRatioChroma[i]);

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_util.c

586

dml_print("DML: plane_cfg: plane=%d, HTaps = %d\n", i, plane->HTaps[i]);

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_util.c

587

dml_print("DML: plane_cfg: plane=%d, VTaps = %d\n", i, plane->VTaps[i]);

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_util.c

588

dml_print("DML: plane_cfg: plane=%d, HTapsChroma = %d\n", i, plane->HTapsChroma[i]);

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_util.c

589

dml_print("DML: plane_cfg: plane=%d, VTapsChroma = %d\n", i, plane->VTapsChroma[i]);

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_util.c

590

dml_print("DML: plane_cfg: plane=%d, LBBitPerPixel = %d\n", i, plane->LBBitPerPixel[i]);

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_util.c

591

dml_print("DML: plane_cfg: plane=%d, SourceScan = %d\n", i, plane->SourceScan[i]);

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_util.c

592

dml_print("DML: plane_cfg: plane=%d, ScalerRecoutWidth = %d\n", i, plane->ScalerRecoutWidth[i]);

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_util.c

593

dml_print("DML: plane_cfg: plane=%d, NumberOfCursors = %d\n", i, plane->NumberOfCursors[i]);

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_util.c

594

dml_print("DML: plane_cfg: plane=%d, CursorWidth = %d\n", i, plane->CursorWidth[i]);

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_util.c

595

dml_print("DML: plane_cfg: plane=%d, CursorBPP = %d\n", i, plane->CursorBPP[i]);

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_util.c

597

dml_print("DML: plane_cfg: plane=%d, DynamicMetadataEnable = %d\n", i, plane->DynamicMetadataEnable[i]);

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_util.c

598

dml_print("DML: plane_cfg: plane=%d, DynamicMetadataLinesBeforeActiveRequired = %d\n", i, plane->DynamicMetadataLinesBeforeActiveRequired[i]);

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_util.c

599

dml_print("DML: plane_cfg: plane=%d, DynamicMetadataTransmittedBytes = %d\n", i, plane->DynamicMetadataTransmittedBytes[i]);

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_util.c

750

if (display_cfg->plane.ViewportWidth[k] > 0)

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_util.h

61

__DML_DLL_EXPORT__ void dml_print_dml_display_cfg_plane(const struct dml_plane_cfg_st *plane, dml_uint_t num_plane);

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

402

static void populate_dml21_dummy_plane_cfg(struct dml2_plane_parameters *plane,

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

418

plane->cursor.cursor_bpp = 32;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

420

plane->cursor.cursor_width = 256;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

421

plane->cursor.num_cursors = 1;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

423

plane->composition.viewport.plane0.width = width;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

424

plane->composition.viewport.plane0.height = height;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

425

plane->composition.viewport.plane1.width = 0;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

426

plane->composition.viewport.plane1.height = 0;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

428

plane->composition.viewport.stationary = false;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

429

plane->composition.viewport.plane0.x_start = 0;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

430

plane->composition.viewport.plane0.y_start = 0;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

431

plane->composition.viewport.plane1.x_start = 0;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

432

plane->composition.viewport.plane1.y_start = 0;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

434

plane->composition.scaler_info.enabled = false;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

435

plane->composition.rotation_angle = dml2_rotation_0;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

436

plane->composition.scaler_info.plane0.h_ratio = 1.0;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

437

plane->composition.scaler_info.plane0.v_ratio = 1.0;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

438

plane->composition.scaler_info.plane1.h_ratio = 0;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

439

plane->composition.scaler_info.plane1.v_ratio = 0;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

440

plane->composition.scaler_info.plane0.h_taps = 1;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

441

plane->composition.scaler_info.plane0.v_taps = 1;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

442

plane->composition.scaler_info.plane1.h_taps = 0;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

443

plane->composition.scaler_info.plane1.v_taps = 0;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

444

plane->composition.scaler_info.rect_out_width = width;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

445

plane->pixel_format = dml2_444_32;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

447

plane->dynamic_meta_data.enable = false;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

448

plane->overrides.gpuvm_min_page_size_kbytes = soc_bb->gpuvm_min_page_size_kbytes;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

449

plane->overrides.hostvm_min_page_size_kbytes = soc_bb->hostvm_min_page_size_kbytes;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

519

struct dml2_plane_parameters *plane, const struct dc_plane_state *plane_state,

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

525

plane->cursor.cursor_bpp = 32;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

526

plane->cursor.cursor_width = 256;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

527

plane->cursor.num_cursors = 1;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

532

plane->pixel_format = dml2_420_8;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

536

plane->pixel_format = dml2_420_10;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

542

plane->pixel_format = dml2_444_64;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

546

plane->pixel_format = dml2_444_16;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

549

plane->pixel_format = dml2_444_8;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

552

plane->pixel_format = dml2_rgbe_alpha;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

555

plane->pixel_format = dml2_444_32;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

559

plane->composition.viewport.plane0.height = scaler_data->viewport.height;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

560

plane->composition.viewport.plane0.width = scaler_data->viewport.width;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

561

plane->composition.viewport.plane1.height = scaler_data->viewport_c.height;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

562

plane->composition.viewport.plane1.width = scaler_data->viewport_c.width;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

563

plane->composition.viewport.plane0.x_start = scaler_data->viewport.x;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

564

plane->composition.viewport.plane0.y_start = scaler_data->viewport.y;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

565

plane->composition.viewport.plane1.x_start = scaler_data->viewport_c.x;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

566

plane->composition.viewport.plane1.y_start = scaler_data->viewport_c.y;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

567

plane->composition.viewport.stationary = false;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

568

plane->composition.scaler_info.enabled = scaler_data->ratios.horz.value != dc_fixpt_one.value ||

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

577

plane->composition.scaler_info.enabled = false;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

579

(plane->composition.scaler_info.enabled == false)) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

585

plane->composition.scaler_info.enabled = true;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

591

plane->composition.scaler_info.enabled = true;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

594

if (plane->composition.scaler_info.enabled == false) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

595

plane->composition.scaler_info.plane0.h_ratio = 1.0;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

596

plane->composition.scaler_info.plane0.v_ratio = 1.0;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

597

plane->composition.scaler_info.plane1.h_ratio = 1.0;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

598

plane->composition.scaler_info.plane1.v_ratio = 1.0;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

600

plane->composition.scaler_info.plane0.h_ratio = (double)scaler_data->ratios.horz.value / (1ULL << 32);

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

601

plane->composition.scaler_info.plane0.v_ratio = (double)scaler_data->ratios.vert.value / (1ULL << 32);

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

602

plane->composition.scaler_info.plane1.h_ratio = (double)scaler_data->ratios.horz_c.value / (1ULL << 32);

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

603

plane->composition.scaler_info.plane1.v_ratio = (double)scaler_data->ratios.vert_c.value / (1ULL << 32);

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

607

plane->composition.scaler_info.plane0.h_taps = 1;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

608

plane->composition.scaler_info.plane1.h_taps = 1;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

610

plane->composition.scaler_info.plane0.h_taps = scaler_data->taps.h_taps;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

611

plane->composition.scaler_info.plane1.h_taps = scaler_data->taps.h_taps_c;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

614

plane->composition.scaler_info.plane0.v_taps = 1;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

615

plane->composition.scaler_info.plane1.v_taps = 1;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

617

plane->composition.scaler_info.plane0.v_taps = scaler_data->taps.v_taps;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

618

plane->composition.scaler_info.plane1.v_taps = scaler_data->taps.v_taps_c;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

621

plane->composition.viewport.stationary = false;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

625

plane->tdlut.setup_for_tdlut = true;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

630

plane->tdlut.tdlut_addressing_mode = dml2_tdlut_sw_linear;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

633

plane->tdlut.tdlut_addressing_mode = dml2_tdlut_simple_linear;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

639

plane->tdlut.tdlut_width_mode = dml2_tdlut_width_17_cube;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

642

plane->tdlut.tdlut_width_mode = dml2_tdlut_width_33_cube;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

656

plane->tdlut.setup_for_tdlut = true;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

661

plane->tdlut.tdlut_addressing_mode = dml2_tdlut_sw_linear;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

664

plane->tdlut.tdlut_addressing_mode = dml2_tdlut_simple_linear;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

670

plane->tdlut.tdlut_width_mode = dml2_tdlut_width_17_cube;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

673

plane->tdlut.tdlut_width_mode = dml2_tdlut_width_33_cube;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

687

plane->tdlut.setup_for_tdlut |= dml_ctx->config.force_tdlut_enable;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

689

plane->dynamic_meta_data.enable = false;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

690

plane->dynamic_meta_data.lines_before_active_required = 0;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

691

plane->dynamic_meta_data.transmitted_bytes = 0;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

693

plane->composition.scaler_info.rect_out_width = plane_state->dst_rect.width;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

694

plane->composition.rotation_angle = (enum dml2_rotation_angle) plane_state->rotation;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

695

plane->stream_index = stream_index;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

697

plane->overrides.gpuvm_min_page_size_kbytes = soc_bb->gpuvm_min_page_size_kbytes;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

698

plane->overrides.hostvm_min_page_size_kbytes = soc_bb->hostvm_min_page_size_kbytes;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

701

plane->immediate_flip = true;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

703

plane->composition.rect_out_height_spans_vactive =

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

709

static bool dml21_wrapper_get_plane_id(const struct dc_state *context, unsigned int stream_id, const struct dc_plane_state *plane, unsigned int *plane_id)

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

719

if (context->stream_status[i].plane_states[j] == plane) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

746

const struct dc_plane_state *plane, const struct dc_state *context)

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

752

if (!dml21_wrapper_get_plane_id(context, stream_id, plane, &plane_id)) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.h

27

unsigned int map_plane_to_dml21_display_cfg(const struct dml2_context *dml_ctx, unsigned int stream_id, const struct dc_plane_state *plane, const struct dc_state *context);

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_utils.c

36

bool dml21_get_plane_id(const struct dc_state *state, const struct dc_plane_state *plane, unsigned int *plane_id)

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_utils.c

45

if (state->stream_status[i].plane_states[j] == plane) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_utils.h

21

bool dml21_get_plane_id(const struct dc_state *state, const struct dc_plane_state *plane, unsigned int *plane_id);

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_pmo/dml2_pmo_dcn42.c

101

plane = &display_config->display_config.plane_descriptors[plane_index];

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_pmo/dml2_pmo_dcn42.c

104

plane->overrides.legacy_svp_config = dml2_svp_mode_override_auto;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_pmo/dml2_pmo_dcn42.c

107

plane->overrides.reserved_vblank_time_ns = 0;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_pmo/dml2_pmo_dcn42.c

110

plane->overrides.uclk_pstate_change_strategy = dml2_uclk_pstate_change_strategy_auto;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_pmo/dml2_pmo_dcn42.c

76

struct dml2_plane_parameters *plane;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_pmo/dml2_pmo_dcn42.c

80

plane = &display_config->display_config.plane_descriptors[plane_index];

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_pmo/dml2_pmo_dcn42.c

82

plane->overrides.reserved_vblank_time_ns = (long)math_max2(pmo->soc_bb->power_management_parameters.dram_clk_change_blackout_us * 1000.0,

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_pmo/dml2_pmo_dcn42.c

83

plane->overrides.reserved_vblank_time_ns);

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_pmo/dml2_pmo_dcn42.c

94

struct dml2_plane_parameters *plane;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c

1970

struct dml2_plane_parameters *plane;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c

1977

plane = &display_config->display_config.plane_descriptors[plane_index];

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c

1980

plane->overrides.legacy_svp_config = dml2_svp_mode_override_auto;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c

1983

plane->overrides.reserved_vblank_time_ns = 0;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c

1986

plane->overrides.uclk_pstate_change_strategy = dml2_uclk_pstate_change_strategy_auto;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c

1999

struct dml2_plane_parameters *plane;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c

2003

plane = &display_config->display_config.plane_descriptors[plane_index];

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c

2005

plane->overrides.uclk_pstate_change_strategy = dml2_uclk_pstate_change_strategy_force_drr;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c

2063

struct dml2_plane_parameters *plane;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c

2067

plane = &display_config->display_config.plane_descriptors[plane_index];

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c

2069

plane->overrides.reserved_vblank_time_ns = (long)math_max2(pmo->soc_bb->power_management_parameters.dram_clk_change_blackout_us * 1000.0,

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c

2070

plane->overrides.reserved_vblank_time_ns);

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c

2082

struct dml2_plane_parameters *plane;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c

2086

plane = &display_config->display_config.plane_descriptors[plane_index];

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c

2088

plane->overrides.reserved_vblank_time_ns = (long)(pmo->soc_bb->power_management_parameters.dram_clk_change_blackout_us * 1000);

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_top/dml2_top_soc15.c

526

const struct dml2_plane_parameters *plane;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_top/dml2_top_soc15.c

537

plane = &params->display_cfg->plane_descriptors[plane_index];

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_top/dml2_top_soc15.c

538

stream = &params->display_cfg->stream_descriptors[plane->stream_index];

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_top/dml2_top_soc15.c

540

num_dpps = odm_combine_factor = params->cfg_support_info->stream_support_info[plane->stream_index].odms_used;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_top/dml2_top_soc15.c

548

max_per_pipe_vp_p0 = plane->surface.plane0.width;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_top/dml2_top_soc15.c

549

temp = (unsigned int)math_ceil(plane->composition.scaler_info.plane0.h_ratio * stream->timing.h_active / odm_combine_factor);

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_top/dml2_top_soc15.c

554

max_per_pipe_vp_p1 = plane->surface.plane1.width;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_top/dml2_top_soc15.c

555

temp = (unsigned int)math_ceil(plane->composition.scaler_info.plane1.h_ratio * stream->timing.h_active / odm_combine_factor);

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_top/dml2_top_soc15.c

560

max_per_pipe_vp_p0 = plane->surface.plane0.width / mpc_combine_factor;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_top/dml2_top_soc15.c

561

max_per_pipe_vp_p1 = plane->surface.plane1.width / mpc_combine_factor;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_top/dml2_top_soc15.c

586

scaling_transform = plane->composition.scaling_transform;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_top/dml2_top_soc15.c

593

if (plane->composition.viewport.stationary) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_top/dml2_top_soc15.c

594

calculate_h_split_for_scaling_transform(plane->surface.plane0.width,

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_top/dml2_top_soc15.c

604

if (plane->composition.viewport.stationary) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_top/dml2_top_soc15.c

605

calculate_h_split_for_scaling_transform(plane->surface.plane1.width,

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

571

const struct dc_plane_state *plane,

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

577

(void)plane;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

58

static bool get_plane_id(struct dml2_context *dml2, const struct dc_state *state, const struct dc_plane_state *plane,

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

653

const struct dc_plane_state *plane,

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

668

if (!get_plane_id(ctx, state, plane, stream->stream_id, plane_index, &plane_id)) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

70

if (state->stream_status[i].plane_states[j] == plane &&

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

715

const struct dc_plane_state *plane, const struct dc_plane_pipe_pool *pool, unsigned int stream_id, int plane_index)

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

721

if (state->res_ctx.pipe_ctx[i].plane_state == plane &&

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

769

static void map_pipes_for_plane(struct dml2_context *ctx, struct dc_state *state, const struct dc_stream_state *stream, const struct dc_plane_state *plane,

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

777

if (!get_plane_id(ctx, state, plane, stream->stream_id, plane_index, &plane_id)) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

782

master_pipe = assign_pipes_to_plane(ctx, state, stream, plane, scratch->odm_info.odm_factor,

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

789

plane,

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

803

free_unused_pipes_for_plane(ctx, state, plane, &scratch->pipe_pool, stream->stream_id, plane_index);

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

924

const struct dc_plane_state *plane)

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

928

if (ctx->config.callbacks.get_dpp_pipes_for_plane(plane, &state->res_ctx, dpp_pipes) <= 0)

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.c

1158

static bool get_plane_id(struct dml2_context *dml2, const struct dc_state *context, const struct dc_plane_state *plane,

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.c

1170

if (context->stream_status[i].plane_states[j] == plane &&

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.c

1182

static unsigned int map_plane_to_dml_display_cfg(const struct dml2_context *dml2, const struct dc_plane_state *plane,

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.c

1190

if (!get_plane_id(context->bw_ctx.dml2, context, plane, stream_id, plane_index, &plane_id)) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.c

1318

dml_dispcfg->plane.GPUVMEnable = dml2->v20.dml_core_ctx.ip.gpuvm_enable;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.c

1319

dml_dispcfg->plane.GPUVMMaxPageTableLevels = dml2->v20.dml_core_ctx.ip.gpuvm_max_page_table_levels;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.c

1320

dml_dispcfg->plane.HostVMEnable = dml2->v20.dml_core_ctx.ip.hostvm_enable;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.c

1321

dml_dispcfg->plane.HostVMMaxPageTableLevels = dml2->v20.dml_core_ctx.ip.hostvm_max_page_table_levels;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.c

1370

populate_dummy_dml_plane_cfg(&dml_dispcfg->plane, disp_cfg_plane_location,

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.c

1373

dml_dispcfg->plane.BlendingAndTiming[disp_cfg_plane_location] = disp_cfg_stream_location;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.c

1388

&dml_dispcfg->plane, disp_cfg_plane_location,

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.c

1393

dml_dispcfg->plane.UseMALLForPStateChange[disp_cfg_plane_location] = dml_use_mall_pstate_change_sub_viewport;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.c

1394

dml_dispcfg->plane.UseMALLForStaticScreen[disp_cfg_plane_location] = dml_use_mall_static_screen_optimize;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.c

1396

dml_dispcfg->plane.UseMALLForPStateChange[disp_cfg_plane_location] = dml_use_mall_pstate_change_phantom_pipe;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.c

1397

dml_dispcfg->plane.UseMALLForStaticScreen[disp_cfg_plane_location] = dml_use_mall_static_screen_disable;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.c

1400

dml_dispcfg->plane.UseMALLForPStateChange[disp_cfg_plane_location] = dml_use_mall_pstate_change_disable;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.c

1401

dml_dispcfg->plane.UseMALLForStaticScreen[disp_cfg_plane_location] = dml_use_mall_static_screen_optimize;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.c

1404

dml_dispcfg->plane.BlendingAndTiming[disp_cfg_plane_location] = disp_cfg_stream_location;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.c

1425

dml_dispcfg->plane.UseMALLForPStateChange[disp_cfg_plane_location] = dml_use_mall_pstate_change_sub_viewport;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.c

1427

dml_dispcfg->plane.UseMALLForPStateChange[disp_cfg_plane_location] = dml_use_mall_pstate_change_phantom_pipe;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_utils.c

218

static bool get_plane_id(struct dml2_context *dml2, const struct dc_state *state, const struct dc_plane_state *plane,

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_utils.c

230

if (state->stream_status[i].plane_states[j] == plane &&

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_utils.c

477

if (plane_index + 1 < dml_dispcfg->num_surfaces && dml_dispcfg->plane.BlendingAndTiming[plane_index] != dml_dispcfg->plane.BlendingAndTiming[plane_index + 1])

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_utils.c

498

dml_dispcfg->plane.DETSizeOverride[plane_index] = max_det_size / in_ctx->config.dcn_pipe_count;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_utils.c

500

dml_dispcfg->plane.DETSizeOverride[plane_index] = ((max_det_size / num_of_streams) / num_of_planes_per_stream[stream_index] / in_ctx->det_helper_scratch.dpps_per_surface[plane_index]);

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_utils.c

505

if (dml_dispcfg->plane.DETSizeOverride[plane_index] % in_ctx->config.det_segment_size != 0) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_utils.c

506

dml_dispcfg->plane.DETSizeOverride[plane_index] = dml_dispcfg->plane.DETSizeOverride[plane_index] & ~0x3F;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_utils.c

509

if (plane_index + 1 < dml_dispcfg->num_surfaces && dml_dispcfg->plane.BlendingAndTiming[plane_index] != dml_dispcfg->plane.BlendingAndTiming[plane_index + 1])

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_wrapper.h

101

int (*get_dpp_pipes_for_plane)(const struct dc_plane_state *plane,

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_wrapper.h

137

struct dc_plane_state *plane);

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_wrapper.h

88

const struct dc_plane_state *plane,

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_wrapper_fpu.c

127

if (p->cur_display_config->plane.BlendingAndTiming[i] > largest_blend_and_timing)

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_wrapper_fpu.c

128

largest_blend_and_timing = p->cur_display_config->plane.BlendingAndTiming[i];

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_wrapper_fpu.c

245

planes_per_timing[display_cfg->plane.BlendingAndTiming[i]]++;

drivers/gpu/drm/amd/display/dc/dml2_0/dml_display_rq_dlg_calc.c

205

struct dml_plane_cfg_st *plane = &mode_lib->ms.cache_display_cfg.plane;

drivers/gpu/drm/amd/display/dc/dml2_0/dml_display_rq_dlg_calc.c

208

dml_uint_t num_cursors = plane->NumberOfCursors[plane_idx];

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

1001

if (stream && plane) {

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

1003

plane->address.grph.cursor_cache_addr.quad_part;

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

1019

plane->format <= SURFACE_PIXEL_FORMAT_GRPH_ABGR16161616F &&

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

1020

plane->format >= SURFACE_PIXEL_FORMAT_GRPH_ARGB8888 &&

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

1021

plane->address.page_table_base.quad_part == 0 &&

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

1023

dc->hwss.does_plane_fit_in_mall(dc, plane->plane_size.surface_pitch,

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

1024

plane->plane_size.surface_size.height, plane->format,

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

1111

(plane->address.grph.cursor_cache_addr.quad_part + 2047) & ~2047;

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

967

struct dc_plane_state *plane = NULL;

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

996

plane = (stream ? dc->current_state->stream_status[0].plane_states[0] : NULL);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

998

if (!stream || !plane)

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

266

struct dc_plane_state *plane = NULL;

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

307

plane = dc->current_state->stream_status[i].plane_states[j];

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

309

if (plane->address.type == PLN_ADDR_TYPE_GRPH_STEREO ||

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

310

plane->address.tmz_surface) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1352

struct dc_plane_state *plane = NULL;

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1389

plane = dc->current_state->stream_status[i].plane_states[j];

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1391

if (plane->address.type == PLN_ADDR_TYPE_GRPH_STEREO ||

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1392

plane->address.tmz_surface) {

drivers/gpu/drm/amd/display/dc/inc/resource.h

379

const struct dc_plane_state *plane,

drivers/gpu/drm/amd/display/dc/inc/resource.h

416

int resource_get_dpp_pipes_for_plane(const struct dc_plane_state *plane,

drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c

1069

struct dc_plane_state *plane =

drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c

1073

if (plane->format >= SURFACE_PIXEL_FORMAT_VIDEO_BEGIN) {

drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c

1075

if ((plane->src_rect.width > 1920 ||

drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c

1076

plane->src_rect.height > 1080))

drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1211

struct dc_plane_state *plane =

drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1215

if (plane->format >= SURFACE_PIXEL_FORMAT_VIDEO_BEGIN) {

drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1217

if (plane->src_rect.width > plane->dst_rect.width ||

drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1218

plane->src_rect.height > plane->dst_rect.height)

drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1221

if (plane->src_rect.width >= 3840)

drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1225

if (plane->src_rect.width >= 3840)

drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1227

if (!plane->dcc.enable)

drivers/gpu/drm/amd/display/modules/freesync/freesync.c

1146

const struct dc_plane_state *plane,

drivers/gpu/drm/amd/display/modules/freesync/freesync.c

1163

plane->time.prev_update_time_in_us;

drivers/gpu/drm/amd/display/modules/inc/mod_freesync.h

130

const struct dc_plane_state *plane,

drivers/gpu/drm/arm/display/komeda/d71/d71_component.c

220

struct drm_plane_state *plane_st = state->plane->state;

drivers/gpu/drm/arm/display/komeda/d71/d71_component.c

364

state->plane);

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

601

struct drm_plane *plane;

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

603

drm_for_each_plane(plane, &kms->base) {

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

604

if (plane->type != DRM_PLANE_TYPE_PRIMARY)

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

607

kplane = to_kplane(plane);

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

610

return plane;

drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c

245

komeda_fb_get_pixel_addr(struct komeda_fb *kfb, int x, int y, int plane)

drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c

251

if (plane >= fb->format->num_planes) {

drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c

256

obj = drm_fb_dma_get_gem_obj(fb, plane);

drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c

258

offset = fb->offsets[plane];

drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c

260

block_w = drm_format_info_block_width(fb->format, plane);

drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c

261

block_sz = fb->format->char_per_block[plane];

drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c

262

plane_x = x / (plane ? fb->format->hsub : 1);

drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c

263

plane_y = y / (plane ? fb->format->vsub : 1);

drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c

266

+ plane_y * fb->pitches[plane];

drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.h

45

komeda_fb_get_pixel_addr(struct komeda_fb *kfb, int x, int y, int plane);

drivers/gpu/drm/arm/display/komeda/komeda_kms.c

138

struct drm_plane *a = node->base.plane;

drivers/gpu/drm/arm/display/komeda/komeda_kms.c

139

struct drm_plane *b = new->base.plane;

drivers/gpu/drm/arm/display/komeda/komeda_kms.c

161

struct drm_plane *plane;

drivers/gpu/drm/arm/display/komeda/komeda_kms.c

172

drm_for_each_plane_mask(plane, crtc->dev, crtc_st->plane_mask) {

drivers/gpu/drm/arm/display/komeda/komeda_kms.c

173

plane_st = drm_atomic_get_plane_state(state, plane);

drivers/gpu/drm/arm/display/komeda/komeda_kms.c

187

plane = plane_st->plane;

drivers/gpu/drm/arm/display/komeda/komeda_kms.c

200

plane->base.id, plane->name,

drivers/gpu/drm/arm/display/komeda/komeda_kms.c

204

if (has_bit(drm_plane_index(plane), kcrtc->slave_planes)) {

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h

176

struct drm_plane *plane;

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

1090

struct drm_plane *plane = kplane_st->base.plane;

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

1101

plane->base.id, plane->name,

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

1123

err = komeda_merger_validate(pipe->merger, plane, kcrtc_st,

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

354

plane_st->state, plane_st->plane, plane_st->crtc);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

887

struct drm_plane *plane = kplane_st->base.plane;

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

892

layer->base.name, plane->base.id, plane->name,

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

900

err = komeda_scaler_validate(plane, kcrtc_st, dflow);

drivers/gpu/drm/arm/display/komeda/komeda_plane.c

118

komeda_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/arm/display/komeda/komeda_plane.c

128

static void komeda_plane_destroy(struct drm_plane *plane)

drivers/gpu/drm/arm/display/komeda/komeda_plane.c

130

drm_plane_cleanup(plane);

drivers/gpu/drm/arm/display/komeda/komeda_plane.c

132

kfree(to_kplane(plane));

drivers/gpu/drm/arm/display/komeda/komeda_plane.c

135

static void komeda_plane_reset(struct drm_plane *plane)

drivers/gpu/drm/arm/display/komeda/komeda_plane.c

139

if (plane->state)

drivers/gpu/drm/arm/display/komeda/komeda_plane.c

140

__drm_atomic_helper_plane_destroy_state(plane->state);

drivers/gpu/drm/arm/display/komeda/komeda_plane.c

142

kfree(plane->state);

drivers/gpu/drm/arm/display/komeda/komeda_plane.c

143

plane->state = NULL;

drivers/gpu/drm/arm/display/komeda/komeda_plane.c

147

__drm_atomic_helper_plane_reset(plane, &state->base);

drivers/gpu/drm/arm/display/komeda/komeda_plane.c

151

komeda_plane_atomic_duplicate_state(struct drm_plane *plane)

drivers/gpu/drm/arm/display/komeda/komeda_plane.c

155

if (WARN_ON(!plane->state))

drivers/gpu/drm/arm/display/komeda/komeda_plane.c

162

__drm_atomic_helper_plane_duplicate_state(plane, &new->base);

drivers/gpu/drm/arm/display/komeda/komeda_plane.c

168

komeda_plane_atomic_destroy_state(struct drm_plane *plane,

drivers/gpu/drm/arm/display/komeda/komeda_plane.c

176

komeda_plane_format_mod_supported(struct drm_plane *plane,

drivers/gpu/drm/arm/display/komeda/komeda_plane.c

179

struct komeda_dev *mdev = plane->dev->dev_private;

drivers/gpu/drm/arm/display/komeda/komeda_plane.c

180

struct komeda_plane *kplane = to_kplane(plane);

drivers/gpu/drm/arm/display/komeda/komeda_plane.c

20

struct komeda_plane *kplane = to_kplane(st->plane);

drivers/gpu/drm/arm/display/komeda/komeda_plane.c

218

struct drm_plane *plane)

drivers/gpu/drm/arm/display/komeda/komeda_plane.c

227

kcrtc->slave_planes |= BIT(drm_plane_index(plane));

drivers/gpu/drm/arm/display/komeda/komeda_plane.c

246

struct drm_plane *plane;

drivers/gpu/drm/arm/display/komeda/komeda_plane.c

254

plane = &kplane->base;

drivers/gpu/drm/arm/display/komeda/komeda_plane.c

264

err = drm_universal_plane_init(&kms->base, plane,

drivers/gpu/drm/arm/display/komeda/komeda_plane.c

278

drm_plane_helper_add(plane, &komeda_plane_helper_funcs);

drivers/gpu/drm/arm/display/komeda/komeda_plane.c

280

err = drm_plane_create_rotation_property(plane, DRM_MODE_ROTATE_0,

drivers/gpu/drm/arm/display/komeda/komeda_plane.c

285

err = drm_plane_create_alpha_property(plane);

drivers/gpu/drm/arm/display/komeda/komeda_plane.c

289

err = drm_plane_create_blend_mode_property(plane,

drivers/gpu/drm/arm/display/komeda/komeda_plane.c

296

err = drm_plane_create_color_properties(plane,

drivers/gpu/drm/arm/display/komeda/komeda_plane.c

307

err = drm_plane_create_zpos_property(plane, layer->base.id, 0, 8);

drivers/gpu/drm/arm/display/komeda/komeda_plane.c

311

komeda_set_crtc_plane_mask(kms, c->pipeline, plane);

drivers/gpu/drm/arm/display/komeda/komeda_plane.c

315

komeda_plane_destroy(plane);

drivers/gpu/drm/arm/display/komeda/komeda_plane.c

32

st->plane->name, st->normalized_zpos,

drivers/gpu/drm/arm/display/komeda/komeda_plane.c

71

komeda_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/arm/display/komeda/komeda_plane.c

75

plane);

drivers/gpu/drm/arm/display/komeda/komeda_plane.c

76

struct komeda_plane *kplane = to_kplane(plane);

drivers/gpu/drm/arm/hdlcd_crtc.c

238

static int hdlcd_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/arm/hdlcd_crtc.c

242

plane);

drivers/gpu/drm/arm/hdlcd_crtc.c

269

static void hdlcd_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/arm/hdlcd_crtc.c

273

plane);

drivers/gpu/drm/arm/hdlcd_crtc.c

285

hdlcd = drm_to_hdlcd_priv(plane->dev);

drivers/gpu/drm/arm/hdlcd_crtc.c

308

struct drm_plane *plane = NULL;

drivers/gpu/drm/arm/hdlcd_crtc.c

314

plane = drmm_universal_plane_alloc(drm, struct drm_plane, dev, 0xff,

drivers/gpu/drm/arm/hdlcd_crtc.c

318

if (IS_ERR(plane))

drivers/gpu/drm/arm/hdlcd_crtc.c

319

return plane;

drivers/gpu/drm/arm/hdlcd_crtc.c

321

drm_plane_helper_add(plane, &hdlcd_plane_helper_funcs);

drivers/gpu/drm/arm/hdlcd_crtc.c

322

hdlcd->plane = plane;

drivers/gpu/drm/arm/hdlcd_crtc.c

324

return plane;

drivers/gpu/drm/arm/hdlcd_drv.h

14

struct drm_plane *plane;

drivers/gpu/drm/arm/malidp_crtc.c

253

struct drm_plane *plane;

drivers/gpu/drm/arm/malidp_crtc.c

270

drm_atomic_crtc_state_for_each_plane_state(plane, pstate, state) {

drivers/gpu/drm/arm/malidp_crtc.c

271

struct malidp_plane *mp = to_malidp_plane(plane);

drivers/gpu/drm/arm/malidp_crtc.c

343

struct drm_plane *plane;

drivers/gpu/drm/arm/malidp_crtc.c

375

drm_atomic_crtc_state_for_each_plane_state(plane, pstate, crtc_state) {

drivers/gpu/drm/arm/malidp_crtc.c

391

drm_atomic_crtc_state_for_each_plane_state(plane, pstate, crtc_state) {

drivers/gpu/drm/arm/malidp_crtc.c

392

struct malidp_plane *mp = to_malidp_plane(plane);

drivers/gpu/drm/arm/malidp_crtc.c

524

struct drm_plane *primary = NULL, *plane;

drivers/gpu/drm/arm/malidp_crtc.c

533

drm_for_each_plane(plane, drm) {

drivers/gpu/drm/arm/malidp_crtc.c

534

if (plane->type == DRM_PLANE_TYPE_PRIMARY) {

drivers/gpu/drm/arm/malidp_crtc.c

535

primary = plane;

drivers/gpu/drm/arm/malidp_planes.c

1000

drm_plane_create_rotation_property(&plane->base, DRM_MODE_ROTATE_0, flags);

drivers/gpu/drm/arm/malidp_planes.c

1002

plane->layer->base + MALIDP_LAYER_COMPOSE);

drivers/gpu/drm/arm/malidp_planes.c

101

m_state = to_malidp_plane_state(plane->state);

drivers/gpu/drm/arm/malidp_planes.c

1010

ret = drm_plane_create_color_properties(&plane->base,

drivers/gpu/drm/arm/malidp_planes.c

1019

malidp_de_set_color_encoding(plane, enc, range);

drivers/gpu/drm/arm/malidp_planes.c

102

__drm_atomic_helper_plane_duplicate_state(plane, &state->base);

drivers/gpu/drm/arm/malidp_planes.c

113

static void malidp_destroy_plane_state(struct drm_plane *plane,

drivers/gpu/drm/arm/malidp_planes.c

246

static bool malidp_format_mod_supported_per_plane(struct drm_plane *plane,

drivers/gpu/drm/arm/malidp_planes.c

249

return malidp_format_mod_supported(plane->dev, format, modifier);

drivers/gpu/drm/arm/malidp_planes.c

492

static int malidp_de_plane_check(struct drm_plane *plane,

drivers/gpu/drm/arm/malidp_planes.c

496

plane);

drivers/gpu/drm/arm/malidp_planes.c

497

struct malidp_plane *mp = to_malidp_plane(plane);

drivers/gpu/drm/arm/malidp_planes.c

672

static void malidp_de_set_color_encoding(struct malidp_plane *plane,

drivers/gpu/drm/arm/malidp_planes.c

680

malidp_hw_write(plane->hwdev, malidp_yuv2rgb_coeffs[enc][range][i],

drivers/gpu/drm/arm/malidp_planes.c

681

plane->layer->base + plane->layer->yuv2rgb_offset +

drivers/gpu/drm/arm/malidp_planes.c

710

struct drm_plane *plane = &mp->base;

drivers/gpu/drm/arm/malidp_planes.c

723

dma_addr = drm_fb_dma_get_gem_addr(fb, plane->state,

drivers/gpu/drm/arm/malidp_planes.c

739

static void malidp_de_set_plane_afbc(struct drm_plane *plane)

drivers/gpu/drm/arm/malidp_planes.c

743

struct drm_framebuffer *fb = plane->state->fb;

drivers/gpu/drm/arm/malidp_planes.c

745

mp = to_malidp_plane(plane);

drivers/gpu/drm/arm/malidp_planes.c

757

src_w = plane->state->src_w >> 16;

drivers/gpu/drm/arm/malidp_planes.c

758

src_h = plane->state->src_h >> 16;

drivers/gpu/drm/arm/malidp_planes.c

759

src_x = plane->state->src_x >> 16;

drivers/gpu/drm/arm/malidp_planes.c

76

static void malidp_plane_reset(struct drm_plane *plane)

drivers/gpu/drm/arm/malidp_planes.c

760

src_y = plane->state->src_y >> 16;

drivers/gpu/drm/arm/malidp_planes.c

78

struct malidp_plane_state *state = to_malidp_plane_state(plane->state);

drivers/gpu/drm/arm/malidp_planes.c

781

static void malidp_de_plane_update(struct drm_plane *plane,

drivers/gpu/drm/arm/malidp_planes.c

785

plane);

drivers/gpu/drm/arm/malidp_planes.c

787

struct malidp_plane_state *ms = to_malidp_plane_state(plane->state);

drivers/gpu/drm/arm/malidp_planes.c

789

plane);

drivers/gpu/drm/arm/malidp_planes.c

794

struct drm_framebuffer *fb = plane->state->fb;

drivers/gpu/drm/arm/malidp_planes.c

796

mp = to_malidp_plane(plane);

drivers/gpu/drm/arm/malidp_planes.c

826

if ((plane->state->color_encoding != old_state->color_encoding) ||

drivers/gpu/drm/arm/malidp_planes.c

827

(plane->state->color_range != old_state->color_range))

drivers/gpu/drm/arm/malidp_planes.c

828

malidp_de_set_color_encoding(mp, plane->state->color_encoding,

drivers/gpu/drm/arm/malidp_planes.c

829

plane->state->color_range);

drivers/gpu/drm/arm/malidp_planes.c

83

plane->state = NULL;

drivers/gpu/drm/arm/malidp_planes.c

853

malidp_de_set_plane_afbc(plane);

drivers/gpu/drm/arm/malidp_planes.c

86

__drm_atomic_helper_plane_reset(plane, &state->base);

drivers/gpu/drm/arm/malidp_planes.c

861

val |= ilog2(plane->state->rotation & DRM_MODE_ROTATE_MASK) <<

drivers/gpu/drm/arm/malidp_planes.c

90

drm_plane_state *malidp_duplicate_plane_state(struct drm_plane *plane)

drivers/gpu/drm/arm/malidp_planes.c

902

static void malidp_de_plane_disable(struct drm_plane *plane,

drivers/gpu/drm/arm/malidp_planes.c

905

struct malidp_plane *mp = to_malidp_plane(plane);

drivers/gpu/drm/arm/malidp_planes.c

927

struct malidp_plane *plane = NULL;

drivers/gpu/drm/arm/malidp_planes.c

94

if (!plane->state)

drivers/gpu/drm/arm/malidp_planes.c

978

plane = drmm_universal_plane_alloc(drm, struct malidp_plane, base,

drivers/gpu/drm/arm/malidp_planes.c

982

if (IS_ERR(plane)) {

drivers/gpu/drm/arm/malidp_planes.c

983

ret = PTR_ERR(plane);

drivers/gpu/drm/arm/malidp_planes.c

987

drm_plane_helper_add(&plane->base,

drivers/gpu/drm/arm/malidp_planes.c

989

plane->hwdev = malidp->dev;

drivers/gpu/drm/arm/malidp_planes.c

990

plane->layer = &map->layers[i];

drivers/gpu/drm/arm/malidp_planes.c

992

drm_plane_create_alpha_property(&plane->base);

drivers/gpu/drm/arm/malidp_planes.c

993

drm_plane_create_blend_mode_property(&plane->base, blend_caps);

drivers/gpu/drm/armada/armada_overlay.c

222

static void armada_drm_overlay_plane_atomic_disable(struct drm_plane *plane,

drivers/gpu/drm/armada/armada_overlay.c

226

plane);

drivers/gpu/drm/armada/armada_overlay.c

231

DRM_DEBUG_KMS("[PLANE:%d:%s]\n", plane->base.id, plane->name);

drivers/gpu/drm/armada/armada_overlay.c

237

plane->base.id, plane->name,

drivers/gpu/drm/armada/armada_overlay.c

259

armada_overlay_plane_update(struct drm_plane *plane, struct drm_crtc *crtc,

drivers/gpu/drm/armada/armada_overlay.c

269

trace_armada_ovl_plane_update(plane, crtc, fb,

drivers/gpu/drm/armada/armada_overlay.c

273

state = drm_atomic_commit_alloc(plane->dev);

drivers/gpu/drm/armada/armada_overlay.c

278

plane_state = drm_atomic_get_plane_state(state, plane);

drivers/gpu/drm/armada/armada_overlay.c

304

static void armada_overlay_reset(struct drm_plane *plane)

drivers/gpu/drm/armada/armada_overlay.c

308

if (plane->state)

drivers/gpu/drm/armada/armada_overlay.c

309

__drm_atomic_helper_plane_destroy_state(plane->state);

drivers/gpu/drm/armada/armada_overlay.c

310

kfree(plane->state);

drivers/gpu/drm/armada/armada_overlay.c

311

plane->state = NULL;

drivers/gpu/drm/armada/armada_overlay.c

324

__drm_atomic_helper_plane_reset(plane, &state->base.base);

drivers/gpu/drm/armada/armada_overlay.c

331

armada_overlay_duplicate_state(struct drm_plane *plane)

drivers/gpu/drm/armada/armada_overlay.c

335

if (WARN_ON(!plane->state))

drivers/gpu/drm/armada/armada_overlay.c

338

state = kmemdup(plane->state, sizeof(*state), GFP_KERNEL);

drivers/gpu/drm/armada/armada_overlay.c

340

__drm_atomic_helper_plane_duplicate_state(plane,

drivers/gpu/drm/armada/armada_overlay.c

345

static int armada_overlay_set_property(struct drm_plane *plane,

drivers/gpu/drm/armada/armada_overlay.c

349

struct armada_private *priv = drm_to_armada_dev(plane->dev);

drivers/gpu/drm/armada/armada_overlay.c

413

static int armada_overlay_get_property(struct drm_plane *plane,

drivers/gpu/drm/armada/armada_overlay.c

417

struct armada_private *priv = drm_to_armada_dev(plane->dev);

drivers/gpu/drm/armada/armada_overlay.c

71

static void armada_drm_overlay_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/armada/armada_overlay.c

75

plane);

drivers/gpu/drm/armada/armada_overlay.c

77

plane);

drivers/gpu/drm/armada/armada_overlay.c

83

DRM_DEBUG_KMS("[PLANE:%d:%s]\n", plane->base.id, plane->name);

drivers/gpu/drm/armada/armada_overlay.c

89

plane->base.id, plane->name,

drivers/gpu/drm/armada/armada_plane.c

132

static void armada_drm_primary_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/armada/armada_plane.c

136

plane);

drivers/gpu/drm/armada/armada_plane.c

138

plane);

drivers/gpu/drm/armada/armada_plane.c

144

DRM_DEBUG_KMS("[PLANE:%d:%s]\n", plane->base.id, plane->name);

drivers/gpu/drm/armada/armada_plane.c

150

plane->base.id, plane->name,

drivers/gpu/drm/armada/armada_plane.c

222

static void armada_drm_primary_plane_atomic_disable(struct drm_plane *plane,

drivers/gpu/drm/armada/armada_plane.c

226

plane);

drivers/gpu/drm/armada/armada_plane.c

231

DRM_DEBUG_KMS("[PLANE:%d:%s]\n", plane->base.id, plane->name);

drivers/gpu/drm/armada/armada_plane.c

237

plane->base.id, plane->name,

drivers/gpu/drm/armada/armada_plane.c

259

void armada_plane_reset(struct drm_plane *plane)

drivers/gpu/drm/armada/armada_plane.c

262

if (plane->state)

drivers/gpu/drm/armada/armada_plane.c

263

__drm_atomic_helper_plane_destroy_state(plane->state);

drivers/gpu/drm/armada/armada_plane.c

264

kfree(plane->state);

drivers/gpu/drm/armada/armada_plane.c

267

__drm_atomic_helper_plane_reset(plane, &st->base);

drivers/gpu/drm/armada/armada_plane.c

270

struct drm_plane_state *armada_plane_duplicate_state(struct drm_plane *plane)

drivers/gpu/drm/armada/armada_plane.c

274

if (WARN_ON(!plane->state))

drivers/gpu/drm/armada/armada_plane.c

277

st = kmemdup(plane->state, sizeof(*st), GFP_KERNEL);

drivers/gpu/drm/armada/armada_plane.c

279

__drm_atomic_helper_plane_duplicate_state(plane, &st->base);

drivers/gpu/drm/armada/armada_plane.c

82

int armada_drm_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/armada/armada_plane.c

86

plane);

drivers/gpu/drm/armada/armada_plane.h

24

void armada_drm_plane_cleanup_fb(struct drm_plane *plane,

drivers/gpu/drm/armada/armada_plane.h

26

int armada_drm_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/armada/armada_plane.h

28

void armada_plane_reset(struct drm_plane *plane);

drivers/gpu/drm/armada/armada_plane.h

29

struct drm_plane_state *armada_plane_duplicate_state(struct drm_plane *plane);

drivers/gpu/drm/armada/armada_plane.h

30

void armada_plane_destroy_state(struct drm_plane *plane,

drivers/gpu/drm/armada/armada_trace.h

31

TP_PROTO(struct drm_plane *plane, struct drm_crtc *crtc,

drivers/gpu/drm/armada/armada_trace.h

35

TP_ARGS(plane, crtc, fb, crtc_x, crtc_y, crtc_w, crtc_h, src_x, src_y, src_w, src_h),

drivers/gpu/drm/armada/armada_trace.h

37

__field(struct drm_plane *, plane)

drivers/gpu/drm/armada/armada_trace.h

50

__entry->plane = plane;

drivers/gpu/drm/armada/armada_trace.h

63

__entry->plane, __entry->crtc, __entry->fb,

drivers/gpu/drm/armada/armada_trace.h

71

TP_PROTO(struct drm_crtc *crtc, struct drm_plane *plane),

drivers/gpu/drm/armada/armada_trace.h

72

TP_ARGS(crtc, plane),

drivers/gpu/drm/armada/armada_trace.h

74

__field(struct drm_plane *, plane)

drivers/gpu/drm/armada/armada_trace.h

78

__entry->plane = plane;

drivers/gpu/drm/armada/armada_trace.h

82

__entry->plane, __entry->crtc)

drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c

168

struct drm_framebuffer *fb = pipe->plane.state->fb;

drivers/gpu/drm/ast/ast_cursor.c

166

static int ast_cursor_plane_helper_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/ast/ast_cursor.c

169

struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/ast/ast_cursor.c

246

static void ast_cursor_plane_helper_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/ast/ast_cursor.c

249

struct ast_cursor_plane *ast_cursor_plane = to_ast_cursor_plane(plane);

drivers/gpu/drm/ast/ast_cursor.c

250

struct ast_plane *ast_plane = to_ast_plane(plane);

drivers/gpu/drm/ast/ast_cursor.c

251

struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/ast/ast_cursor.c

254

struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane);

drivers/gpu/drm/ast/ast_cursor.c

255

struct ast_device *ast = to_ast_device(plane->dev);

drivers/gpu/drm/ast/ast_cursor.c

311

static void ast_cursor_plane_helper_atomic_disable(struct drm_plane *plane,

drivers/gpu/drm/ast/ast_cursor.c

314

struct ast_device *ast = to_ast_device(plane->dev);

drivers/gpu/drm/ast/ast_drv.h

131

static inline struct ast_plane *to_ast_plane(struct drm_plane *plane)

drivers/gpu/drm/ast/ast_drv.h

133

return container_of(plane, struct ast_plane, base);

drivers/gpu/drm/ast/ast_drv.h

142

static inline struct ast_cursor_plane *to_ast_cursor_plane(struct drm_plane *plane)

drivers/gpu/drm/ast/ast_drv.h

144

return container_of(to_ast_plane(plane), struct ast_cursor_plane, base);

drivers/gpu/drm/ast/ast_mode.c

481

struct drm_plane *plane = &ast_plane->base;

drivers/gpu/drm/ast/ast_mode.c

486

return drm_universal_plane_init(dev, plane, possible_crtcs, funcs,

drivers/gpu/drm/ast/ast_mode.c

509

static int ast_primary_plane_helper_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/ast/ast_mode.c

512

struct drm_device *dev = plane->dev;

drivers/gpu/drm/ast/ast_mode.c

513

struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/ast/ast_mode.c

557

static void ast_primary_plane_helper_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/ast/ast_mode.c

560

struct drm_device *dev = plane->dev;

drivers/gpu/drm/ast/ast_mode.c

562

struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/ast/ast_mode.c

565

struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane);

drivers/gpu/drm/ast/ast_mode.c

567

struct ast_plane *ast_plane = to_ast_plane(plane);

drivers/gpu/drm/ast/ast_mode.c

601

static void ast_primary_plane_helper_atomic_enable(struct drm_plane *plane,

drivers/gpu/drm/ast/ast_mode.c

604

struct ast_device *ast = to_ast_device(plane->dev);

drivers/gpu/drm/ast/ast_mode.c

605

struct ast_plane *ast_plane = to_ast_plane(plane);

drivers/gpu/drm/ast/ast_mode.c

616

static void ast_primary_plane_helper_atomic_disable(struct drm_plane *plane,

drivers/gpu/drm/ast/ast_mode.c

625

static int ast_primary_plane_helper_get_scanout_buffer(struct drm_plane *plane,

drivers/gpu/drm/ast/ast_mode.c

628

struct ast_plane *ast_plane = to_ast_plane(plane);

drivers/gpu/drm/ast/ast_mode.c

630

if (plane->state && plane->state->fb) {

drivers/gpu/drm/ast/ast_mode.c

631

sb->format = plane->state->fb->format;

drivers/gpu/drm/ast/ast_mode.c

632

sb->width = plane->state->fb->width;

drivers/gpu/drm/ast/ast_mode.c

633

sb->height = plane->state->fb->height;

drivers/gpu/drm/ast/ast_mode.c

634

sb->pitch[0] = plane->state->fb->pitches[0];

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h

377

void (*plane_setup_scaler)(struct atmel_hlcdc_plane *plane,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h

379

void (*lcdc_update_buffers)(struct atmel_hlcdc_plane *plane,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h

382

void (*lcdc_atomic_disable)(struct atmel_hlcdc_plane *plane,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h

384

void (*lcdc_update_general_settings)(struct atmel_hlcdc_plane *plane,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h

386

void (*lcdc_atomic_update)(struct atmel_hlcdc_plane *plane,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h

388

void (*lcdc_csc_init)(struct atmel_hlcdc_plane *plane,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h

390

void (*lcdc_irq_dbg)(struct atmel_hlcdc_plane *plane,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h

490

void atmel_hlcdc_plane_irq(struct atmel_hlcdc_plane *plane);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

1004

atmel_hlcdc_layer_write_cfg(&plane->layer,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

1013

static int atmel_hlcdc_plane_init_properties(struct atmel_hlcdc_plane *plane)

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

1015

const struct atmel_hlcdc_layer_desc *desc = plane->layer.desc;

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

1016

struct atmel_hlcdc_dc *dc = plane->base.dev->dev_private;

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

1022

ret = drm_plane_create_alpha_property(&plane->base);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

1030

ret = drm_plane_create_rotation_property(&plane->base,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

1041

dc->desc->ops->lcdc_csc_init(plane, desc);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

1046

static void atmel_hlcdc_irq_dbg(struct atmel_hlcdc_plane *plane,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

1049

u32 isr = atmel_hlcdc_layer_read_reg(&plane->layer, ATMEL_HLCDC_LAYER_ISR);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

1059

drm_dbg(plane->base.dev, "overrun on plane %s\n",

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

1063

static void atmel_xlcdc_irq_dbg(struct atmel_hlcdc_plane *plane,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

1066

u32 isr = atmel_hlcdc_layer_read_reg(&plane->layer, ATMEL_XLCDC_LAYER_ISR);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

1076

drm_dbg(plane->base.dev, "overrun on plane %s\n",

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

1080

void atmel_hlcdc_plane_irq(struct atmel_hlcdc_plane *plane)

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

1082

const struct atmel_hlcdc_layer_desc *desc = plane->layer.desc;

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

1083

struct atmel_hlcdc_dc *dc = plane->base.dev->dev_private;

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

1085

dc->desc->ops->lcdc_irq_dbg(plane, desc);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

1190

struct atmel_hlcdc_plane *plane = drm_plane_to_atmel_hlcdc_plane(p);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

1208

if (plane->layer.desc->layout.csc)

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

1209

dc->desc->ops->lcdc_csc_init(plane, plane->layer.desc);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

1224

struct atmel_hlcdc_plane *plane;

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

1235

plane = drmm_universal_plane_alloc(dev, struct atmel_hlcdc_plane, base, 0,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

1238

if (IS_ERR(plane))

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

1239

return PTR_ERR(plane);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

1241

atmel_hlcdc_layer_init(&plane->layer, desc, dc->hlcdc->regmap);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

1243

drm_plane_helper_add(&plane->base,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

1247

ret = atmel_hlcdc_plane_init_properties(plane);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

1251

dc->layers[desc->id] = &plane->layer;

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

273

atmel_hlcdc_plane_scaler_set_phicoeff(struct atmel_hlcdc_plane *plane,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

280

atmel_hlcdc_layer_write_cfg(&plane->layer, cfg_offs + i,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

285

void atmel_hlcdc_plane_setup_scaler(struct atmel_hlcdc_plane *plane,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

288

const struct atmel_hlcdc_layer_desc *desc = plane->layer.desc;

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

295

atmel_hlcdc_layer_write_cfg(&plane->layer,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

309

atmel_hlcdc_plane_scaler_set_phicoeff(plane,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

316

atmel_hlcdc_plane_scaler_set_phicoeff(plane,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

327

atmel_hlcdc_layer_write_cfg(&plane->layer, desc->layout.scaler_config,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

334

void atmel_xlcdc_plane_setup_scaler(struct atmel_hlcdc_plane *plane,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

337

const struct atmel_hlcdc_layer_desc *desc = plane->layer.desc;

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

344

atmel_hlcdc_layer_write_cfg(&plane->layer,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

355

atmel_hlcdc_layer_write_cfg(&plane->layer, desc->layout.scaler_config,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

361

atmel_hlcdc_layer_write_cfg(&plane->layer, desc->layout.scaler_config + 1,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

363

atmel_hlcdc_layer_write_cfg(&plane->layer, desc->layout.scaler_config + 3,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

397

atmel_hlcdc_layer_write_cfg(&plane->layer, desc->layout.scaler_config + 2,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

399

atmel_hlcdc_layer_write_cfg(&plane->layer, desc->layout.scaler_config + 4,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

404

atmel_hlcdc_plane_update_pos_and_size(struct atmel_hlcdc_plane *plane,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

407

const struct atmel_hlcdc_layer_desc *desc = plane->layer.desc;

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

408

struct atmel_hlcdc_dc *dc = plane->base.dev->dev_private;

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

411

atmel_hlcdc_layer_write_cfg(&plane->layer, desc->layout.size,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

416

atmel_hlcdc_layer_write_cfg(&plane->layer,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

422

atmel_hlcdc_layer_write_cfg(&plane->layer, desc->layout.pos,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

426

dc->desc->ops->plane_setup_scaler(plane, state);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

430

void atmel_hlcdc_plane_update_general_settings(struct atmel_hlcdc_plane *plane,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

434

const struct atmel_hlcdc_layer_desc *desc = plane->layer.desc;

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

444

atmel_hlcdc_layer_write_cfg(&plane->layer, ATMEL_HLCDC_LAYER_DMA_CFG,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

449

if (plane->base.type != DRM_PLANE_TYPE_PRIMARY) {

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

463

atmel_hlcdc_layer_write_cfg(&plane->layer, desc->layout.general_config,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

468

void atmel_xlcdc_plane_update_general_settings(struct atmel_hlcdc_plane *plane,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

471

const struct atmel_hlcdc_layer_desc *desc = plane->layer.desc;

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

475

atmel_hlcdc_layer_write_cfg(&plane->layer, ATMEL_XLCDC_LAYER_DMA_CFG,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

480

if (plane->base.type != DRM_PLANE_TYPE_PRIMARY) {

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

497

atmel_hlcdc_layer_write_cfg(&plane->layer, desc->layout.general_config,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

501

static void atmel_hlcdc_plane_update_format(struct atmel_hlcdc_plane *plane,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

517

atmel_hlcdc_layer_write_cfg(&plane->layer,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

521

static void atmel_hlcdc_plane_update_clut(struct atmel_hlcdc_plane *plane,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

541

atmel_hlcdc_layer_write_clut(&plane->layer, idx, val);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

545

static void atmel_hlcdc_update_buffers(struct atmel_hlcdc_plane *plane,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

549

atmel_hlcdc_layer_write_reg(&plane->layer,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

556

atmel_hlcdc_layer_write_reg(&plane->layer,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

559

atmel_hlcdc_layer_write_reg(&plane->layer,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

562

atmel_hlcdc_layer_write_reg(&plane->layer,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

567

static void atmel_xlcdc_update_buffers(struct atmel_hlcdc_plane *plane,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

571

atmel_hlcdc_layer_write_reg(&plane->layer,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

576

static void atmel_hlcdc_plane_update_buffers(struct atmel_hlcdc_plane *plane,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

579

const struct atmel_hlcdc_layer_desc *desc = plane->layer.desc;

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

580

struct atmel_hlcdc_dc *dc = plane->base.dev->dev_private;

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

586

sr = atmel_hlcdc_layer_read_reg(&plane->layer, ATMEL_HLCDC_LAYER_CHSR);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

593

dc->desc->ops->lcdc_update_buffers(plane, state, sr, i);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

596

atmel_hlcdc_layer_write_cfg(&plane->layer,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

601

atmel_hlcdc_layer_write_cfg(&plane->layer,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

610

struct drm_plane *plane;

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

612

drm_atomic_crtc_state_for_each_plane(plane, c_state) {

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

618

plane_s = drm_atomic_get_plane_state(c_state->state, plane);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

702

atmel_hlcdc_plane_update_disc_area(struct atmel_hlcdc_plane *plane,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

707

layout = &plane->layer.desc->layout;

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

711

atmel_hlcdc_layer_write_cfg(&plane->layer, layout->disc_pos,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

715

atmel_hlcdc_layer_write_cfg(&plane->layer, layout->disc_size,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

724

struct atmel_hlcdc_plane *plane = drm_plane_to_atmel_hlcdc_plane(p);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

727

const struct atmel_hlcdc_layer_desc *desc = plane->layer.desc;

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

830

static void atmel_hlcdc_atomic_disable(struct atmel_hlcdc_plane *plane,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

834

atmel_hlcdc_layer_write_reg(&plane->layer, ATMEL_HLCDC_LAYER_IDR,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

838

atmel_hlcdc_layer_write_reg(&plane->layer, ATMEL_HLCDC_LAYER_CHDR,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

844

atmel_hlcdc_layer_read_reg(&plane->layer, ATMEL_HLCDC_LAYER_ISR);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

847

static void atmel_xlcdc_atomic_disable(struct atmel_hlcdc_plane *plane,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

851

atmel_hlcdc_layer_write_reg(&plane->layer, ATMEL_XLCDC_LAYER_IDR,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

855

atmel_hlcdc_layer_write_reg(&plane->layer,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

868

atmel_hlcdc_layer_read_reg(&plane->layer, ATMEL_XLCDC_LAYER_ISR);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

874

struct atmel_hlcdc_plane *plane = drm_plane_to_atmel_hlcdc_plane(p);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

875

struct atmel_hlcdc_dc *dc = plane->base.dev->dev_private;

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

877

dc->desc->ops->lcdc_atomic_disable(plane, dc);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

880

static void atmel_hlcdc_atomic_update(struct atmel_hlcdc_plane *plane,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

886

atmel_hlcdc_layer_write_reg(&plane->layer, ATMEL_HLCDC_LAYER_IER,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

892

sr = atmel_hlcdc_layer_read_reg(&plane->layer, ATMEL_HLCDC_LAYER_CHSR);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

893

atmel_hlcdc_layer_write_reg(&plane->layer, ATMEL_HLCDC_LAYER_CHER,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

899

static void atmel_xlcdc_atomic_update(struct atmel_hlcdc_plane *plane,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

903

atmel_hlcdc_layer_write_reg(&plane->layer, ATMEL_XLCDC_LAYER_IER,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

908

atmel_hlcdc_layer_write_reg(&plane->layer, ATMEL_XLCDC_LAYER_ENR,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

926

struct atmel_hlcdc_plane *plane = drm_plane_to_atmel_hlcdc_plane(p);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

939

atmel_hlcdc_plane_update_pos_and_size(plane, hstate);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

940

dc->desc->ops->lcdc_update_general_settings(plane, hstate);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

941

atmel_hlcdc_plane_update_format(plane, hstate);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

942

atmel_hlcdc_plane_update_clut(plane, hstate);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

943

atmel_hlcdc_plane_update_buffers(plane, hstate);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

944

atmel_hlcdc_plane_update_disc_area(plane, hstate);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

946

dc->desc->ops->lcdc_atomic_update(plane, dc);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

949

static void atmel_hlcdc_csc_init(struct atmel_hlcdc_plane *plane,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

963

atmel_hlcdc_layer_write_cfg(&plane->layer,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

969

static void atmel_xlcdc_csc_init(struct atmel_hlcdc_plane *plane,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

987

atmel_hlcdc_layer_write_cfg(&plane->layer,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

997

atmel_hlcdc_layer_write_cfg(&plane->layer,

drivers/gpu/drm/clients/drm_log.c

180

static u32 drm_log_find_usable_format(struct drm_plane *plane)

drivers/gpu/drm/clients/drm_log.c

184

for (i = 0; i < plane->format_count; i++)

drivers/gpu/drm/clients/drm_log.c

185

if (drm_draw_can_convert_from_xrgb8888(plane->format_types[i]))

drivers/gpu/drm/clients/drm_log.c

186

return plane->format_types[i];

drivers/gpu/drm/drm_atomic.c

1578

struct drm_plane *plane;

drivers/gpu/drm/drm_atomic.c

1587

drm_for_each_plane_mask(plane, state->dev, old_crtc_state->plane_mask) {

drivers/gpu/drm/drm_atomic.c

1589

drm_atomic_get_plane_state(state, plane);

drivers/gpu/drm/drm_atomic.c

1595

ret = drm_atomic_add_affected_colorops(state, plane);

drivers/gpu/drm/drm_atomic.c

1626

struct drm_plane *plane)

drivers/gpu/drm/drm_atomic.c

1631

WARN_ON(!drm_atomic_get_new_plane_state(state, plane));

drivers/gpu/drm/drm_atomic.c

1633

drm_dbg_atomic(plane->dev,

drivers/gpu/drm/drm_atomic.c

1635

plane->base.id, plane->name, state);

drivers/gpu/drm/drm_atomic.c

1637

drm_for_each_colorop(colorop, plane->dev) {

drivers/gpu/drm/drm_atomic.c

1638

if (colorop->plane != plane)

drivers/gpu/drm/drm_atomic.c

1665

struct drm_plane *plane;

drivers/gpu/drm/drm_atomic.c

1684

for_each_oldnew_plane_in_state(state, plane, old_plane_state, new_plane_state, i) {

drivers/gpu/drm/drm_atomic.c

1688

plane->base.id, plane->name);

drivers/gpu/drm/drm_atomic.c

1823

int __drm_atomic_helper_disable_plane(struct drm_plane *plane,

drivers/gpu/drm/drm_atomic.c

2013

struct drm_plane *plane;

drivers/gpu/drm/drm_atomic.c

2030

for_each_new_plane_in_state(state, plane, plane_state, i)

drivers/gpu/drm/drm_atomic.c

2049

struct drm_plane *plane;

drivers/gpu/drm/drm_atomic.c

2060

drm_modeset_lock(&colorop->plane->mutex, NULL);

drivers/gpu/drm/drm_atomic.c

2063

drm_modeset_unlock(&colorop->plane->mutex);

drivers/gpu/drm/drm_atomic.c

2066

list_for_each_entry(plane, &config->plane_list, head) {

drivers/gpu/drm/drm_atomic.c

2068

drm_modeset_lock(&plane->mutex, NULL);

drivers/gpu/drm/drm_atomic.c

2069

drm_atomic_plane_print_state(p, plane->state);

drivers/gpu/drm/drm_atomic.c

2071

drm_modeset_unlock(&plane->mutex);

drivers/gpu/drm/drm_atomic.c

246

struct drm_plane *plane = state->planes[i].ptr;

drivers/gpu/drm/drm_atomic.c

248

if (!plane)

drivers/gpu/drm/drm_atomic.c

251

plane->funcs->atomic_destroy_state(plane,

drivers/gpu/drm/drm_atomic.c

548

struct drm_plane *plane)

drivers/gpu/drm/drm_atomic.c

550

int ret, index = drm_plane_index(plane);

drivers/gpu/drm/drm_atomic.c

557

WARN_ON(plane->fb);

drivers/gpu/drm/drm_atomic.c

558

WARN_ON(plane->old_fb);

drivers/gpu/drm/drm_atomic.c

559

WARN_ON(plane->crtc);

drivers/gpu/drm/drm_atomic.c

561

plane_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/drm_atomic.c

565

ret = drm_modeset_lock(&plane->mutex, state->acquire_ctx);

drivers/gpu/drm/drm_atomic.c

569

plane_state = plane->funcs->atomic_duplicate_state(plane);

drivers/gpu/drm/drm_atomic.c

574

state->planes[index].ptr = plane;

drivers/gpu/drm/drm_atomic.c

575

state->planes[index].old_state = plane->state;

drivers/gpu/drm/drm_atomic.c

579

drm_dbg_atomic(plane->dev, "Added [PLANE:%d:%s] %p state to %p\n",

drivers/gpu/drm/drm_atomic.c

580

plane->base.id, plane->name, plane_state, state);

drivers/gpu/drm/drm_atomic.c

623

ret = drm_modeset_lock(&colorop->plane->mutex, state->acquire_ctx);

drivers/gpu/drm/drm_atomic.c

707

struct drm_plane *plane = new_plane_state->plane;

drivers/gpu/drm/drm_atomic.c

716

drm_dbg_atomic(plane->dev, "[PLANE:%d:%s] CRTC set but no FB\n",

drivers/gpu/drm/drm_atomic.c

717

plane->base.id, plane->name);

drivers/gpu/drm/drm_atomic.c

720

drm_dbg_atomic(plane->dev, "[PLANE:%d:%s] FB set but no CRTC\n",

drivers/gpu/drm/drm_atomic.c

721

plane->base.id, plane->name);

drivers/gpu/drm/drm_atomic.c

730

if (!(plane->possible_crtcs & drm_crtc_mask(crtc))) {

drivers/gpu/drm/drm_atomic.c

731

drm_dbg_atomic(plane->dev,

drivers/gpu/drm/drm_atomic.c

734

plane->base.id, plane->name);

drivers/gpu/drm/drm_atomic.c

739

if (!drm_plane_has_format(plane, fb->format->format, fb->modifier)) {

drivers/gpu/drm/drm_atomic.c

740

drm_dbg_atomic(plane->dev,

drivers/gpu/drm/drm_atomic.c

742

plane->base.id, plane->name,

drivers/gpu/drm/drm_atomic.c

752

drm_dbg_atomic(plane->dev,

drivers/gpu/drm/drm_atomic.c

754

plane->base.id, plane->name,

drivers/gpu/drm/drm_atomic.c

768

drm_dbg_atomic(plane->dev,

drivers/gpu/drm/drm_atomic.c

771

plane->base.id, plane->name,

drivers/gpu/drm/drm_atomic.c

795

drm_dbg_atomic(plane->dev,

drivers/gpu/drm/drm_atomic.c

797

plane->base.id, plane->name, clips->x1,

drivers/gpu/drm/drm_atomic.c

806

drm_dbg_atomic(plane->dev,

drivers/gpu/drm/drm_atomic.c

808

plane->base.id, plane->name);

drivers/gpu/drm/drm_atomic.c

858

struct drm_plane *plane = state->plane;

drivers/gpu/drm/drm_atomic.c

862

drm_printf(p, "plane[%u]: %s\n", plane->base.id, plane->name);

drivers/gpu/drm/drm_atomic.c

878

if (plane->funcs->atomic_print_state)

drivers/gpu/drm/drm_atomic.c

879

plane->funcs->atomic_print_state(p, state);

drivers/gpu/drm/drm_atomic_helper.c

1024

struct drm_plane *plane;

drivers/gpu/drm/drm_atomic_helper.c

1028

for_each_oldnew_plane_in_state(state, plane, old_plane_state, new_plane_state, i) {

drivers/gpu/drm/drm_atomic_helper.c

1031

WARN_ON(!drm_modeset_is_locked(&plane->mutex));

drivers/gpu/drm/drm_atomic_helper.c

1033

funcs = plane->helper_private;

drivers/gpu/drm/drm_atomic_helper.c

1035

drm_atomic_helper_plane_changed(state, old_plane_state, new_plane_state, plane);

drivers/gpu/drm/drm_atomic_helper.c

1042

ret = funcs->atomic_check(plane, state);

drivers/gpu/drm/drm_atomic_helper.c

1044

drm_dbg_atomic(plane->dev,

drivers/gpu/drm/drm_atomic_helper.c

1046

plane->base.id, plane->name);

drivers/gpu/drm/drm_atomic_helper.c

1781

struct drm_plane *plane;

drivers/gpu/drm/drm_atomic_helper.c

1806

for_each_new_plane_in_state (state, plane, new_plane_state, i) {

drivers/gpu/drm/drm_atomic_helper.c

1838

struct drm_plane *plane;

drivers/gpu/drm/drm_atomic_helper.c

1844

for_each_new_plane_in_state(state, plane, new_plane_state, i) {

drivers/gpu/drm/drm_atomic_helper.c

2113

struct drm_plane *plane = NULL;

drivers/gpu/drm/drm_atomic_helper.c

2124

for_each_oldnew_plane_in_state(state, plane, old_plane_state, new_plane_state, i)

drivers/gpu/drm/drm_atomic_helper.c

2138

plane->base.id, plane->name);

drivers/gpu/drm/drm_atomic_helper.c

2142

funcs = plane->helper_private;

drivers/gpu/drm/drm_atomic_helper.c

2146

plane->base.id, plane->name);

drivers/gpu/drm/drm_atomic_helper.c

2153

plane->base.id, plane->name);

drivers/gpu/drm/drm_atomic_helper.c

2166

plane->base.id, plane->name);

drivers/gpu/drm/drm_atomic_helper.c

2170

ret = funcs->atomic_async_check(plane, state, false);

drivers/gpu/drm/drm_atomic_helper.c

2174

plane->base.id, plane->name);

drivers/gpu/drm/drm_atomic_helper.c

2195

struct drm_plane *plane;

drivers/gpu/drm/drm_atomic_helper.c

2200

for_each_new_plane_in_state(state, plane, plane_state, i) {

drivers/gpu/drm/drm_atomic_helper.c

2202

struct drm_framebuffer *old_fb = plane->state->fb;

drivers/gpu/drm/drm_atomic_helper.c

2204

funcs = plane->helper_private;

drivers/gpu/drm/drm_atomic_helper.c

2205

funcs->atomic_async_update(plane, state);

drivers/gpu/drm/drm_atomic_helper.c

2212

WARN_ON_ONCE(plane->state->fb != new_fb);

drivers/gpu/drm/drm_atomic_helper.c

2213

WARN_ON_ONCE(plane->state->crtc_x != plane_state->crtc_x);

drivers/gpu/drm/drm_atomic_helper.c

2214

WARN_ON_ONCE(plane->state->crtc_y != plane_state->crtc_y);

drivers/gpu/drm/drm_atomic_helper.c

2215

WARN_ON_ONCE(plane->state->src_x != plane_state->src_x);

drivers/gpu/drm/drm_atomic_helper.c

2216

WARN_ON_ONCE(plane->state->src_y != plane_state->src_y);

drivers/gpu/drm/drm_atomic_helper.c

2518

struct drm_plane *plane;

drivers/gpu/drm/drm_atomic_helper.c

2595

for_each_oldnew_plane_in_state(state, plane, old_plane_state, new_plane_state, i) {

drivers/gpu/drm/drm_atomic_helper.c

2602

drm_dbg_atomic(plane->dev,

drivers/gpu/drm/drm_atomic_helper.c

2604

plane->base.id, plane->name);

drivers/gpu/drm/drm_atomic_helper.c

2640

struct drm_plane *plane;

drivers/gpu/drm/drm_atomic_helper.c

2663

for_each_old_plane_in_state(state, plane, old_plane_state, i) {

drivers/gpu/drm/drm_atomic_helper.c

2666

drm_err(plane->dev,

drivers/gpu/drm/drm_atomic_helper.c

2668

plane->base.id, plane->name);

drivers/gpu/drm/drm_atomic_helper.c

2819

struct drm_plane *plane;

drivers/gpu/drm/drm_atomic_helper.c

2832

for_each_new_plane_in_state(state, plane, new_plane_state, i) {

drivers/gpu/drm/drm_atomic_helper.c

2835

funcs = plane->helper_private;

drivers/gpu/drm/drm_atomic_helper.c

2838

ret = funcs->prepare_fb(plane, new_plane_state);

drivers/gpu/drm/drm_atomic_helper.c

2847

ret = drm_gem_plane_helper_prepare_fb(plane, new_plane_state);

drivers/gpu/drm/drm_atomic_helper.c

2853

for_each_new_plane_in_state(state, plane, new_plane_state, i) {

drivers/gpu/drm/drm_atomic_helper.c

2854

const struct drm_plane_helper_funcs *funcs = plane->helper_private;

drivers/gpu/drm/drm_atomic_helper.c

2857

ret = funcs->begin_fb_access(plane, new_plane_state);

drivers/gpu/drm/drm_atomic_helper.c

2866

for_each_new_plane_in_state(state, plane, new_plane_state, j) {

drivers/gpu/drm/drm_atomic_helper.c

2867

const struct drm_plane_helper_funcs *funcs = plane->helper_private;

drivers/gpu/drm/drm_atomic_helper.c

2873

funcs->end_fb_access(plane, new_plane_state);

drivers/gpu/drm/drm_atomic_helper.c

2877

for_each_new_plane_in_state(state, plane, new_plane_state, j) {

drivers/gpu/drm/drm_atomic_helper.c

2883

funcs = plane->helper_private;

drivers/gpu/drm/drm_atomic_helper.c

2886

funcs->cleanup_fb(plane, new_plane_state);

drivers/gpu/drm/drm_atomic_helper.c

2906

struct drm_plane *plane;

drivers/gpu/drm/drm_atomic_helper.c

2910

for_each_new_plane_in_state(state, plane, new_plane_state, i) {

drivers/gpu/drm/drm_atomic_helper.c

2911

const struct drm_plane_helper_funcs *funcs = plane->helper_private;

drivers/gpu/drm/drm_atomic_helper.c

2914

funcs->end_fb_access(plane, new_plane_state);

drivers/gpu/drm/drm_atomic_helper.c

2917

for_each_new_plane_in_state(state, plane, new_plane_state, i) {

drivers/gpu/drm/drm_atomic_helper.c

2918

const struct drm_plane_helper_funcs *funcs = plane->helper_private;

drivers/gpu/drm/drm_atomic_helper.c

2921

funcs->cleanup_fb(plane, new_plane_state);

drivers/gpu/drm/drm_atomic_helper.c

2978

struct drm_plane *plane;

drivers/gpu/drm/drm_atomic_helper.c

2998

for_each_oldnew_plane_in_state(state, plane, old_plane_state, new_plane_state, i) {

drivers/gpu/drm/drm_atomic_helper.c

3002

funcs = plane->helper_private;

drivers/gpu/drm/drm_atomic_helper.c

3036

funcs->atomic_disable(plane, state);

drivers/gpu/drm/drm_atomic_helper.c

3038

funcs->atomic_update(plane, state);

drivers/gpu/drm/drm_atomic_helper.c

3042

funcs->atomic_enable(plane, state);

drivers/gpu/drm/drm_atomic_helper.c

3065

for_each_old_plane_in_state(state, plane, old_plane_state, i) {

drivers/gpu/drm/drm_atomic_helper.c

3066

const struct drm_plane_helper_funcs *funcs = plane->helper_private;

drivers/gpu/drm/drm_atomic_helper.c

3069

funcs->end_fb_access(plane, old_plane_state);

drivers/gpu/drm/drm_atomic_helper.c

3099

struct drm_plane *plane;

drivers/gpu/drm/drm_atomic_helper.c

3109

drm_for_each_plane_mask(plane, crtc->dev, plane_mask) {

drivers/gpu/drm/drm_atomic_helper.c

3111

drm_atomic_get_old_plane_state(old_state, plane);

drivers/gpu/drm/drm_atomic_helper.c

3113

drm_atomic_get_new_plane_state(old_state, plane);

drivers/gpu/drm/drm_atomic_helper.c

3117

plane_funcs = plane->helper_private;

drivers/gpu/drm/drm_atomic_helper.c

3128

plane_funcs->atomic_disable(plane, old_state);

drivers/gpu/drm/drm_atomic_helper.c

3130

plane_funcs->atomic_update(plane, old_state);

drivers/gpu/drm/drm_atomic_helper.c

3134

plane_funcs->atomic_enable(plane, old_state);

drivers/gpu/drm/drm_atomic_helper.c

3167

struct drm_plane *plane;

drivers/gpu/drm/drm_atomic_helper.c

3172

drm_atomic_crtc_state_for_each_plane(plane, old_crtc_state) {

drivers/gpu/drm/drm_atomic_helper.c

3174

plane->helper_private;

drivers/gpu/drm/drm_atomic_helper.c

3181

plane_funcs->atomic_disable(plane, NULL);

drivers/gpu/drm/drm_atomic_helper.c

3205

struct drm_plane *plane;

drivers/gpu/drm/drm_atomic_helper.c

3209

for_each_old_plane_in_state(state, plane, old_plane_state, i) {

drivers/gpu/drm/drm_atomic_helper.c

3210

const struct drm_plane_helper_funcs *funcs = plane->helper_private;

drivers/gpu/drm/drm_atomic_helper.c

3213

funcs->cleanup_fb(plane, old_plane_state);

drivers/gpu/drm/drm_atomic_helper.c

3261

struct drm_plane *plane;

drivers/gpu/drm/drm_atomic_helper.c

3301

for_each_old_plane_in_state(state, plane, old_plane_state, i) {

drivers/gpu/drm/drm_atomic_helper.c

3353

for_each_oldnew_plane_in_state(state, plane, old_plane_state, new_plane_state, i) {

drivers/gpu/drm/drm_atomic_helper.c

3354

WARN_ON(plane->state != old_plane_state);

drivers/gpu/drm/drm_atomic_helper.c

3360

plane->state = new_plane_state;

drivers/gpu/drm/drm_atomic_helper.c

3398

int drm_atomic_helper_update_plane(struct drm_plane *plane,

drivers/gpu/drm/drm_atomic_helper.c

3411

state = drm_atomic_commit_alloc(plane->dev);

drivers/gpu/drm/drm_atomic_helper.c

3416

plane_state = drm_atomic_get_plane_state(state, plane);

drivers/gpu/drm/drm_atomic_helper.c

3435

if (plane == crtc->cursor)

drivers/gpu/drm/drm_atomic_helper.c

3455

int drm_atomic_helper_disable_plane(struct drm_plane *plane,

drivers/gpu/drm/drm_atomic_helper.c

3462

state = drm_atomic_commit_alloc(plane->dev);

drivers/gpu/drm/drm_atomic_helper.c

3467

plane_state = drm_atomic_get_plane_state(state, plane);

drivers/gpu/drm/drm_atomic_helper.c

3473

if (plane_state->crtc && plane_state->crtc->cursor == plane)

drivers/gpu/drm/drm_atomic_helper.c

3476

ret = __drm_atomic_helper_disable_plane(plane, plane_state);

drivers/gpu/drm/drm_atomic_helper.c

3561

struct drm_plane *plane;

drivers/gpu/drm/drm_atomic_helper.c

3600

for_each_new_plane_in_state(state, plane, plane_state, i) {

drivers/gpu/drm/drm_atomic_helper.c

3725

struct drm_plane *plane;

drivers/gpu/drm/drm_atomic_helper.c

3746

drm_for_each_plane(plane, dev) {

drivers/gpu/drm/drm_atomic_helper.c

3749

plane_state = drm_atomic_get_plane_state(state, plane);

drivers/gpu/drm/drm_atomic_helper.c

3756

err = drm_atomic_add_affected_colorops(state, plane);

drivers/gpu/drm/drm_atomic_helper.c

3864

struct drm_plane *plane;

drivers/gpu/drm/drm_atomic_helper.c

3878

for_each_new_plane_in_state(state, plane, new_plane_state, i)

drivers/gpu/drm/drm_atomic_helper.c

3879

state->planes[i].old_state = plane->state;

drivers/gpu/drm/drm_atomic_helper.c

3936

struct drm_plane *plane = crtc->primary;

drivers/gpu/drm/drm_atomic_helper.c

3948

plane_state = drm_atomic_get_plane_state(state, plane);

drivers/gpu/drm/drm_atomic_helper.c

3992

struct drm_plane *plane = crtc->primary;

drivers/gpu/drm/drm_atomic_helper.c

3996

state = drm_atomic_commit_alloc(plane->dev);

drivers/gpu/drm/drm_atomic_helper.c

4036

struct drm_plane *plane = crtc->primary;

drivers/gpu/drm/drm_atomic_helper.c

4041

state = drm_atomic_commit_alloc(plane->dev);

drivers/gpu/drm/drm_atomic_helper.c

83

struct drm_plane *plane)

drivers/gpu/drm/drm_atomic_helper.c

924

drm_dbg_kms(plane_state->plane->dev,

drivers/gpu/drm/drm_atomic_helper.c

935

drm_dbg_kms(plane_state->plane->dev,

drivers/gpu/drm/drm_atomic_helper.c

960

drm_dbg_kms(plane_state->plane->dev,

drivers/gpu/drm/drm_atomic_helper.c

988

struct drm_plane *plane;

drivers/gpu/drm/drm_atomic_helper.c

991

drm_for_each_plane_mask(plane, dev, crtc_state->plane_mask) {

drivers/gpu/drm/drm_atomic_helper.c

992

if (plane->type == DRM_PLANE_TYPE_PRIMARY)

drivers/gpu/drm/drm_atomic_state_helper.c

248

struct drm_plane *plane)

drivers/gpu/drm/drm_atomic_state_helper.c

252

plane_state->plane = plane;

drivers/gpu/drm/drm_atomic_state_helper.c

258

if (plane->color_encoding_property) {

drivers/gpu/drm/drm_atomic_state_helper.c

259

if (!drm_object_property_get_default_value(&plane->base,

drivers/gpu/drm/drm_atomic_state_helper.c

260

plane->color_encoding_property,

drivers/gpu/drm/drm_atomic_state_helper.c

265

if (plane->color_range_property) {

drivers/gpu/drm/drm_atomic_state_helper.c

266

if (!drm_object_property_get_default_value(&plane->base,

drivers/gpu/drm/drm_atomic_state_helper.c

267

plane->color_range_property,

drivers/gpu/drm/drm_atomic_state_helper.c

272

if (plane->color_pipeline_property) {

drivers/gpu/drm/drm_atomic_state_helper.c

277

if (plane->zpos_property) {

drivers/gpu/drm/drm_atomic_state_helper.c

278

if (!drm_object_property_get_default_value(&plane->base,

drivers/gpu/drm/drm_atomic_state_helper.c

279

plane->zpos_property,

drivers/gpu/drm/drm_atomic_state_helper.c

286

if (plane->hotspot_x_property) {

drivers/gpu/drm/drm_atomic_state_helper.c

287

if (!drm_object_property_get_default_value(&plane->base,

drivers/gpu/drm/drm_atomic_state_helper.c

288

plane->hotspot_x_property,

drivers/gpu/drm/drm_atomic_state_helper.c

293

if (plane->hotspot_y_property) {

drivers/gpu/drm/drm_atomic_state_helper.c

294

if (!drm_object_property_get_default_value(&plane->base,

drivers/gpu/drm/drm_atomic_state_helper.c

295

plane->hotspot_y_property,

drivers/gpu/drm/drm_atomic_state_helper.c

314

void __drm_atomic_helper_plane_reset(struct drm_plane *plane,

drivers/gpu/drm/drm_atomic_state_helper.c

318

__drm_atomic_helper_plane_state_reset(plane_state, plane);

drivers/gpu/drm/drm_atomic_state_helper.c

320

plane->state = plane_state;

drivers/gpu/drm/drm_atomic_state_helper.c

331

void drm_atomic_helper_plane_reset(struct drm_plane *plane)

drivers/gpu/drm/drm_atomic_state_helper.c

333

if (plane->state)

drivers/gpu/drm/drm_atomic_state_helper.c

334

__drm_atomic_helper_plane_destroy_state(plane->state);

drivers/gpu/drm/drm_atomic_state_helper.c

336

kfree(plane->state);

drivers/gpu/drm/drm_atomic_state_helper.c

337

plane->state = kzalloc_obj(*plane->state);

drivers/gpu/drm/drm_atomic_state_helper.c

338

if (plane->state)

drivers/gpu/drm/drm_atomic_state_helper.c

339

__drm_atomic_helper_plane_reset(plane, plane->state);

drivers/gpu/drm/drm_atomic_state_helper.c

351

void __drm_atomic_helper_plane_duplicate_state(struct drm_plane *plane,

drivers/gpu/drm/drm_atomic_state_helper.c

354

memcpy(state, plane->state, sizeof(*state));

drivers/gpu/drm/drm_atomic_state_helper.c

374

drm_atomic_helper_plane_duplicate_state(struct drm_plane *plane)

drivers/gpu/drm/drm_atomic_state_helper.c

378

if (WARN_ON(!plane->state))

drivers/gpu/drm/drm_atomic_state_helper.c

383

__drm_atomic_helper_plane_duplicate_state(plane, state);

drivers/gpu/drm/drm_atomic_state_helper.c

420

void drm_atomic_helper_plane_destroy_state(struct drm_plane *plane,

drivers/gpu/drm/drm_atomic_uapi.c

1086

struct drm_plane *plane = obj_to_plane(obj);

drivers/gpu/drm/drm_atomic_uapi.c

1088

WARN_ON(!drm_modeset_is_locked(&plane->mutex));

drivers/gpu/drm/drm_atomic_uapi.c

1089

ret = drm_atomic_plane_get_property(plane,

drivers/gpu/drm/drm_atomic_uapi.c

1090

plane->state, property, val);

drivers/gpu/drm/drm_atomic_uapi.c

1096

if (colorop->plane)

drivers/gpu/drm/drm_atomic_uapi.c

1097

WARN_ON(!drm_modeset_is_locked(&colorop->plane->mutex));

drivers/gpu/drm/drm_atomic_uapi.c

1258

struct drm_plane *plane = obj_to_plane(obj);

drivers/gpu/drm/drm_atomic_uapi.c

1260

struct drm_mode_config *config = &plane->dev->mode_config;

drivers/gpu/drm/drm_atomic_uapi.c

1261

const struct drm_plane_helper_funcs *plane_funcs = plane->helper_private;

drivers/gpu/drm/drm_atomic_uapi.c

1263

plane_state = drm_atomic_get_plane_state(state, plane);

drivers/gpu/drm/drm_atomic_uapi.c

1271

ret = drm_atomic_plane_get_property(plane, plane_state,

drivers/gpu/drm/drm_atomic_uapi.c

1282

if (ret && plane->type != DRM_PLANE_TYPE_PRIMARY) {

drivers/gpu/drm/drm_atomic_uapi.c

1285

ret = plane_funcs->atomic_async_check(plane, state, true);

drivers/gpu/drm/drm_atomic_uapi.c

1290

obj->id, plane->name);

drivers/gpu/drm/drm_atomic_uapi.c

1296

ret = drm_atomic_plane_set_property(plane,

drivers/gpu/drm/drm_atomic_uapi.c

1320

plane_state = drm_atomic_get_plane_state(state, colorop->plane);

drivers/gpu/drm/drm_atomic_uapi.c

193

struct drm_plane *plane = plane_state->plane;

drivers/gpu/drm/drm_atomic_uapi.c

204

crtc_state->plane_mask &= ~drm_plane_mask(plane);

drivers/gpu/drm/drm_atomic_uapi.c

214

crtc_state->plane_mask |= drm_plane_mask(plane);

drivers/gpu/drm/drm_atomic_uapi.c

218

drm_dbg_atomic(plane->dev,

drivers/gpu/drm/drm_atomic_uapi.c

220

plane->base.id, plane->name, plane_state,

drivers/gpu/drm/drm_atomic_uapi.c

223

drm_dbg_atomic(plane->dev,

drivers/gpu/drm/drm_atomic_uapi.c

225

plane->base.id, plane->name, plane_state);

drivers/gpu/drm/drm_atomic_uapi.c

245

struct drm_plane *plane = plane_state->plane;

drivers/gpu/drm/drm_atomic_uapi.c

248

drm_dbg_atomic(plane->dev,

drivers/gpu/drm/drm_atomic_uapi.c

250

fb->base.id, plane->base.id, plane->name,

drivers/gpu/drm/drm_atomic_uapi.c

253

drm_dbg_atomic(plane->dev,

drivers/gpu/drm/drm_atomic_uapi.c

255

plane->base.id, plane->name, plane_state);

drivers/gpu/drm/drm_atomic_uapi.c

275

struct drm_plane *plane = plane_state->plane;

drivers/gpu/drm/drm_atomic_uapi.c

282

drm_dbg_atomic(plane->dev,

drivers/gpu/drm/drm_atomic_uapi.c

284

colorop->base.id, plane->base.id, plane->name,

drivers/gpu/drm/drm_atomic_uapi.c

287

drm_dbg_atomic(plane->dev,

drivers/gpu/drm/drm_atomic_uapi.c

289

plane->base.id, plane->name, plane_state);

drivers/gpu/drm/drm_atomic_uapi.c

535

static int drm_atomic_plane_set_property(struct drm_plane *plane,

drivers/gpu/drm/drm_atomic_uapi.c

539

struct drm_device *dev = plane->dev;

drivers/gpu/drm/drm_atomic_uapi.c

588

} else if (property == plane->alpha_property) {

drivers/gpu/drm/drm_atomic_uapi.c

590

} else if (property == plane->blend_mode_property) {

drivers/gpu/drm/drm_atomic_uapi.c

592

} else if (property == plane->rotation_property) {

drivers/gpu/drm/drm_atomic_uapi.c

594

drm_dbg_atomic(plane->dev,

drivers/gpu/drm/drm_atomic_uapi.c

596

plane->base.id, plane->name, val);

drivers/gpu/drm/drm_atomic_uapi.c

600

} else if (property == plane->zpos_property) {

drivers/gpu/drm/drm_atomic_uapi.c

602

} else if (property == plane->color_encoding_property) {

drivers/gpu/drm/drm_atomic_uapi.c

604

} else if (property == plane->color_range_property) {

drivers/gpu/drm/drm_atomic_uapi.c

606

} else if (property == plane->color_pipeline_property) {

drivers/gpu/drm/drm_atomic_uapi.c

623

} else if (property == plane->scaling_filter_property) {

drivers/gpu/drm/drm_atomic_uapi.c

625

} else if (plane->funcs->atomic_set_property) {

drivers/gpu/drm/drm_atomic_uapi.c

626

return plane->funcs->atomic_set_property(plane, state,

drivers/gpu/drm/drm_atomic_uapi.c

628

} else if (property == plane->hotspot_x_property) {

drivers/gpu/drm/drm_atomic_uapi.c

629

if (plane->type != DRM_PLANE_TYPE_CURSOR) {

drivers/gpu/drm/drm_atomic_uapi.c

630

drm_dbg_atomic(plane->dev,

drivers/gpu/drm/drm_atomic_uapi.c

632

plane->base.id, plane->name, val);

drivers/gpu/drm/drm_atomic_uapi.c

636

} else if (property == plane->hotspot_y_property) {

drivers/gpu/drm/drm_atomic_uapi.c

637

if (plane->type != DRM_PLANE_TYPE_CURSOR) {

drivers/gpu/drm/drm_atomic_uapi.c

638

drm_dbg_atomic(plane->dev,

drivers/gpu/drm/drm_atomic_uapi.c

640

plane->base.id, plane->name, val);

drivers/gpu/drm/drm_atomic_uapi.c

645

drm_dbg_atomic(plane->dev,

drivers/gpu/drm/drm_atomic_uapi.c

647

plane->base.id, plane->name,

drivers/gpu/drm/drm_atomic_uapi.c

656

drm_atomic_plane_get_property(struct drm_plane *plane,

drivers/gpu/drm/drm_atomic_uapi.c

660

struct drm_device *dev = plane->dev;

drivers/gpu/drm/drm_atomic_uapi.c

685

} else if (property == plane->alpha_property) {

drivers/gpu/drm/drm_atomic_uapi.c

687

} else if (property == plane->blend_mode_property) {

drivers/gpu/drm/drm_atomic_uapi.c

689

} else if (property == plane->rotation_property) {

drivers/gpu/drm/drm_atomic_uapi.c

691

} else if (property == plane->zpos_property) {

drivers/gpu/drm/drm_atomic_uapi.c

693

} else if (property == plane->color_encoding_property) {

drivers/gpu/drm/drm_atomic_uapi.c

695

} else if (property == plane->color_range_property) {

drivers/gpu/drm/drm_atomic_uapi.c

697

} else if (property == plane->color_pipeline_property) {

drivers/gpu/drm/drm_atomic_uapi.c

702

} else if (property == plane->scaling_filter_property) {

drivers/gpu/drm/drm_atomic_uapi.c

704

} else if (plane->funcs->atomic_get_property) {

drivers/gpu/drm/drm_atomic_uapi.c

705

return plane->funcs->atomic_get_property(plane, state, property, val);

drivers/gpu/drm/drm_atomic_uapi.c

706

} else if (property == plane->hotspot_x_property) {

drivers/gpu/drm/drm_atomic_uapi.c

708

} else if (property == plane->hotspot_y_property) {

drivers/gpu/drm/drm_atomic_uapi.c

713

plane->base.id, plane->name,

drivers/gpu/drm/drm_blend.c

240

int drm_plane_create_alpha_property(struct drm_plane *plane)

drivers/gpu/drm/drm_blend.c

244

prop = drm_property_create_range(plane->dev, 0, "alpha",

drivers/gpu/drm/drm_blend.c

249

drm_object_attach_property(&plane->base, prop, DRM_BLEND_ALPHA_OPAQUE);

drivers/gpu/drm/drm_blend.c

250

plane->alpha_property = prop;

drivers/gpu/drm/drm_blend.c

252

if (plane->state)

drivers/gpu/drm/drm_blend.c

253

plane->state->alpha = DRM_BLEND_ALPHA_OPAQUE;

drivers/gpu/drm/drm_blend.c

293

int drm_plane_create_rotation_property(struct drm_plane *plane,

drivers/gpu/drm/drm_blend.c

311

prop = drm_property_create_bitmask(plane->dev, 0, "rotation",

drivers/gpu/drm/drm_blend.c

317

drm_object_attach_property(&plane->base, prop, rotation);

drivers/gpu/drm/drm_blend.c

319

if (plane->state)

drivers/gpu/drm/drm_blend.c

320

plane->state->rotation = rotation;

drivers/gpu/drm/drm_blend.c

322

plane->rotation_property = prop;

drivers/gpu/drm/drm_blend.c

390

int drm_plane_create_zpos_property(struct drm_plane *plane,

drivers/gpu/drm/drm_blend.c

396

prop = drm_property_create_range(plane->dev, 0, "zpos", min, max);

drivers/gpu/drm/drm_blend.c

400

drm_object_attach_property(&plane->base, prop, zpos);

drivers/gpu/drm/drm_blend.c

402

plane->zpos_property = prop;

drivers/gpu/drm/drm_blend.c

404

if (plane->state) {

drivers/gpu/drm/drm_blend.c

405

plane->state->zpos = zpos;

drivers/gpu/drm/drm_blend.c

406

plane->state->normalized_zpos = zpos;

drivers/gpu/drm/drm_blend.c

429

int drm_plane_create_zpos_immutable_property(struct drm_plane *plane,

drivers/gpu/drm/drm_blend.c

434

prop = drm_property_create_range(plane->dev, DRM_MODE_PROP_IMMUTABLE,

drivers/gpu/drm/drm_blend.c

439

drm_object_attach_property(&plane->base, prop, zpos);

drivers/gpu/drm/drm_blend.c

441

plane->zpos_property = prop;

drivers/gpu/drm/drm_blend.c

443

if (plane->state) {

drivers/gpu/drm/drm_blend.c

444

plane->state->zpos = zpos;

drivers/gpu/drm/drm_blend.c

445

plane->state->normalized_zpos = zpos;

drivers/gpu/drm/drm_blend.c

460

return sa->plane->base.id - sb->plane->base.id;

drivers/gpu/drm/drm_blend.c

470

struct drm_plane *plane;

drivers/gpu/drm/drm_blend.c

485

drm_for_each_plane_mask(plane, dev, crtc_state->plane_mask) {

drivers/gpu/drm/drm_blend.c

487

drm_atomic_get_plane_state(state, plane);

drivers/gpu/drm/drm_blend.c

494

plane->base.id, plane->name, plane_state->zpos);

drivers/gpu/drm/drm_blend.c

500

plane = states[i]->plane;

drivers/gpu/drm/drm_blend.c

504

plane->base.id, plane->name, i);

drivers/gpu/drm/drm_blend.c

536

struct drm_plane *plane;

drivers/gpu/drm/drm_blend.c

540

for_each_oldnew_plane_in_state(state, plane, old_plane_state, new_plane_state, i) {

drivers/gpu/drm/drm_blend.c

592

int drm_plane_create_blend_mode_property(struct drm_plane *plane,

drivers/gpu/drm/drm_blend.c

595

struct drm_device *dev = plane->dev;

drivers/gpu/drm/drm_blend.c

633

drm_object_attach_property(&plane->base, prop, DRM_MODE_BLEND_PREMULTI);

drivers/gpu/drm/drm_blend.c

634

plane->blend_mode_property = prop;

drivers/gpu/drm/drm_client_modeset.c

1021

!plane->rotation_property)

drivers/gpu/drm/drm_client_modeset.c

1024

for (i = 0; i < plane->rotation_property->num_values; i++)

drivers/gpu/drm/drm_client_modeset.c

1025

valid_mask |= (1ULL << plane->rotation_property->values[i]);

drivers/gpu/drm/drm_client_modeset.c

1037

struct drm_plane *plane;

drivers/gpu/drm/drm_client_modeset.c

1053

drm_for_each_plane(plane, dev) {

drivers/gpu/drm/drm_client_modeset.c

1056

plane_state = drm_atomic_get_plane_state(state, plane);

drivers/gpu/drm/drm_client_modeset.c

1065

if (plane->type == DRM_PLANE_TYPE_PRIMARY)

drivers/gpu/drm/drm_client_modeset.c

1068

ret = __drm_atomic_helper_disable_plane(plane, plane_state);

drivers/gpu/drm/drm_client_modeset.c

1128

struct drm_plane *plane;

drivers/gpu/drm/drm_client_modeset.c

1132

drm_for_each_plane(plane, dev) {

drivers/gpu/drm/drm_client_modeset.c

1133

if (plane->type != DRM_PLANE_TYPE_PRIMARY)

drivers/gpu/drm/drm_client_modeset.c

1134

drm_plane_force_disable(plane);

drivers/gpu/drm/drm_client_modeset.c

1136

if (plane->rotation_property)

drivers/gpu/drm/drm_client_modeset.c

1137

drm_mode_plane_set_obj_prop(plane,

drivers/gpu/drm/drm_client_modeset.c

1138

plane->rotation_property,

drivers/gpu/drm/drm_client_modeset.c

963

struct drm_plane *plane = modeset->crtc->primary;

drivers/gpu/drm/drm_color_mgmt.c

531

int drm_plane_create_color_properties(struct drm_plane *plane,

drivers/gpu/drm/drm_color_mgmt.c

537

struct drm_device *dev = plane->dev;

drivers/gpu/drm/drm_color_mgmt.c

567

plane->color_encoding_property = prop;

drivers/gpu/drm/drm_color_mgmt.c

568

drm_object_attach_property(&plane->base, prop, default_encoding);

drivers/gpu/drm/drm_color_mgmt.c

569

if (plane->state)

drivers/gpu/drm/drm_color_mgmt.c

570

plane->state->color_encoding = default_encoding;

drivers/gpu/drm/drm_color_mgmt.c

586

plane->color_range_property = prop;

drivers/gpu/drm/drm_color_mgmt.c

587

drm_object_attach_property(&plane->base, prop, default_range);

drivers/gpu/drm/drm_color_mgmt.c

588

if (plane->state)

drivers/gpu/drm/drm_color_mgmt.c

589

plane->state->color_range = default_range;

drivers/gpu/drm/drm_colorop.c

111

colorop->plane = plane;

drivers/gpu/drm/drm_colorop.c

226

struct drm_plane *plane, const struct drm_colorop_funcs *funcs,

drivers/gpu/drm/drm_colorop.c

238

plane->base.id, plane->name);

drivers/gpu/drm/drm_colorop.c

244

plane->base.id, plane->name);

drivers/gpu/drm/drm_colorop.c

248

ret = drm_plane_colorop_init(dev, colorop, plane, funcs, DRM_COLOROP_1D_CURVE, flags);

drivers/gpu/drm/drm_colorop.c

312

struct drm_plane *plane,

drivers/gpu/drm/drm_colorop.c

321

ret = drm_plane_colorop_init(dev, colorop, plane, funcs, DRM_COLOROP_1D_LUT, flags);

drivers/gpu/drm/drm_colorop.c

358

struct drm_plane *plane, const struct drm_colorop_funcs *funcs,

drivers/gpu/drm/drm_colorop.c

363

ret = drm_plane_colorop_init(dev, colorop, plane, funcs, DRM_COLOROP_CTM_3X4, flags);

drivers/gpu/drm/drm_colorop.c

388

struct drm_plane *plane, const struct drm_colorop_funcs *funcs,

drivers/gpu/drm/drm_colorop.c

394

ret = drm_plane_colorop_init(dev, colorop, plane, funcs, DRM_COLOROP_MULTIPLIER, flags);

drivers/gpu/drm/drm_colorop.c

412

struct drm_plane *plane,

drivers/gpu/drm/drm_colorop.c

421

ret = drm_plane_colorop_init(dev, colorop, plane, funcs, DRM_COLOROP_3D_LUT, flags);

drivers/gpu/drm/drm_colorop.c

96

struct drm_plane *plane, const struct drm_colorop_funcs *funcs,

drivers/gpu/drm/drm_crtc.c

548

struct drm_plane *plane;

drivers/gpu/drm/drm_crtc.c

557

plane = crtc->primary;

drivers/gpu/drm/drm_crtc.c

561

drm_modeset_lock(&plane->mutex, NULL);

drivers/gpu/drm/drm_crtc.c

562

if (plane->state && plane->state->fb)

drivers/gpu/drm/drm_crtc.c

563

crtc_resp->fb_id = plane->state->fb->base.id;

drivers/gpu/drm/drm_crtc.c

564

else if (!plane->state && plane->fb)

drivers/gpu/drm/drm_crtc.c

565

crtc_resp->fb_id = plane->fb->base.id;

drivers/gpu/drm/drm_crtc.c

569

if (plane->state) {

drivers/gpu/drm/drm_crtc.c

570

crtc_resp->x = plane->state->src_x >> 16;

drivers/gpu/drm/drm_crtc.c

571

crtc_resp->y = plane->state->src_y >> 16;

drivers/gpu/drm/drm_crtc.c

573

drm_modeset_unlock(&plane->mutex);

drivers/gpu/drm/drm_crtc.c

618

struct drm_plane *plane = tmp->primary;

drivers/gpu/drm/drm_crtc.c

620

plane->old_fb = plane->fb;

drivers/gpu/drm/drm_crtc.c

627

struct drm_plane *plane = crtc->primary;

drivers/gpu/drm/drm_crtc.c

629

plane->crtc = fb ? crtc : NULL;

drivers/gpu/drm/drm_crtc.c

630

plane->fb = fb;

drivers/gpu/drm/drm_crtc.c

634

struct drm_plane *plane = tmp->primary;

drivers/gpu/drm/drm_crtc.c

636

if (plane->fb)

drivers/gpu/drm/drm_crtc.c

637

drm_framebuffer_get(plane->fb);

drivers/gpu/drm/drm_crtc.c

638

if (plane->old_fb)

drivers/gpu/drm/drm_crtc.c

639

drm_framebuffer_put(plane->old_fb);

drivers/gpu/drm/drm_crtc.c

640

plane->old_fb = NULL;

drivers/gpu/drm/drm_crtc.c

715

struct drm_plane *plane;

drivers/gpu/drm/drm_crtc.c

741

plane = crtc->primary;

drivers/gpu/drm/drm_crtc.c

744

if (crtc_req->mode_valid && !drm_lease_held(file_priv, plane->base.id))

drivers/gpu/drm/drm_crtc.c

756

if (plane->state)

drivers/gpu/drm/drm_crtc.c

757

old_fb = plane->state->fb;

drivers/gpu/drm/drm_crtc.c

759

old_fb = plane->fb;

drivers/gpu/drm/drm_crtc.c

808

if (!plane->format_default) {

drivers/gpu/drm/drm_crtc.c

809

if (!drm_plane_has_format(plane, fb->format->format, fb->modifier)) {

drivers/gpu/drm/drm_crtc_internal.h

248

int __drm_atomic_helper_disable_plane(struct drm_plane *plane,

drivers/gpu/drm/drm_damage_helper.c

118

struct drm_plane *plane;

drivers/gpu/drm/drm_damage_helper.c

161

drm_for_each_plane(plane, fb->dev) {

drivers/gpu/drm/drm_damage_helper.c

164

ret = drm_modeset_lock(&plane->mutex, state->acquire_ctx);

drivers/gpu/drm/drm_damage_helper.c

168

if (plane->state->fb != fb) {

drivers/gpu/drm/drm_damage_helper.c

169

drm_modeset_unlock(&plane->mutex);

drivers/gpu/drm/drm_damage_helper.c

173

plane_state = drm_atomic_get_plane_state(state, plane);

drivers/gpu/drm/drm_fb_dma_helper.c

104

dma_addr += fb->pitches[plane] * block_start_y;

drivers/gpu/drm/drm_fb_dma_helper.c

166

int drm_fb_dma_get_scanout_buffer(struct drm_plane *plane,

drivers/gpu/drm/drm_fb_dma_helper.c

172

if (!plane->state || !plane->state->fb)

drivers/gpu/drm/drm_fb_dma_helper.c

175

fb = plane->state->fb;

drivers/gpu/drm/drm_fb_dma_helper.c

50

unsigned int plane)

drivers/gpu/drm/drm_fb_dma_helper.c

54

gem = drm_gem_fb_get_obj(fb, plane);

drivers/gpu/drm/drm_fb_dma_helper.c

75

unsigned int plane)

drivers/gpu/drm/drm_fb_dma_helper.c

80

u32 block_w = drm_format_info_block_width(fb->format, plane);

drivers/gpu/drm/drm_fb_dma_helper.c

81

u32 block_h = drm_format_info_block_height(fb->format, plane);

drivers/gpu/drm/drm_fb_dma_helper.c

82

u32 block_size = fb->format->char_per_block[plane];

drivers/gpu/drm/drm_fb_dma_helper.c

88

obj = drm_fb_dma_get_gem_obj(fb, plane);

drivers/gpu/drm/drm_fb_dma_helper.c

92

dma_addr = obj->dma_addr + fb->offsets[plane];

drivers/gpu/drm/drm_fb_dma_helper.c

94

if (plane > 0) {

drivers/gpu/drm/drm_fb_helper.c

1395

struct drm_plane *plane = crtc->primary;

drivers/gpu/drm/drm_fb_helper.c

1407

plane->format_types,

drivers/gpu/drm/drm_fb_helper.c

1408

plane->format_count,

drivers/gpu/drm/drm_fb_helper.c

1420

plane->format_types,

drivers/gpu/drm/drm_fb_helper.c

1421

plane->format_count,

drivers/gpu/drm/drm_fb_helper.c

233

struct drm_plane *plane;

drivers/gpu/drm/drm_fb_helper.c

239

drm_for_each_plane(plane, dev) {

drivers/gpu/drm/drm_fb_helper.c

242

if (plane->type != DRM_PLANE_TYPE_PRIMARY)

drivers/gpu/drm/drm_fb_helper.c

245

ret = drm_modeset_lock(&plane->mutex, &ctx);

drivers/gpu/drm/drm_fb_helper.c

248

plane_state = plane->state;

drivers/gpu/drm/drm_fb_helper.c

260

drm_modeset_unlock(&plane->mutex);

drivers/gpu/drm/drm_fb_helper.c

285

struct drm_plane *plane = crtc->primary;

drivers/gpu/drm/drm_fb_helper.c

289

if (!plane || plane->fb != helper->fb)

drivers/gpu/drm/drm_fourcc.c

464

int plane)

drivers/gpu/drm/drm_fourcc.c

466

if (!info || plane < 0 || plane >= info->num_planes)

drivers/gpu/drm/drm_fourcc.c

469

if (!info->block_w[plane])

drivers/gpu/drm/drm_fourcc.c

471

return info->block_w[plane];

drivers/gpu/drm/drm_fourcc.c

484

int plane)

drivers/gpu/drm/drm_fourcc.c

486

if (!info || plane < 0 || plane >= info->num_planes)

drivers/gpu/drm/drm_fourcc.c

489

if (!info->block_h[plane])

drivers/gpu/drm/drm_fourcc.c

491

return info->block_h[plane];

drivers/gpu/drm/drm_fourcc.c

503

unsigned int drm_format_info_bpp(const struct drm_format_info *info, int plane)

drivers/gpu/drm/drm_fourcc.c

507

if (!info || plane < 0 || plane >= info->num_planes)

drivers/gpu/drm/drm_fourcc.c

510

block_size = drm_format_info_block_width(info, plane) *

drivers/gpu/drm/drm_fourcc.c

511

drm_format_info_block_height(info, plane);

drivers/gpu/drm/drm_fourcc.c

513

if (info->char_per_block[plane] * 8 % block_size) {

drivers/gpu/drm/drm_fourcc.c

518

return info->char_per_block[plane] * 8 / block_size;

drivers/gpu/drm/drm_fourcc.c

533

int plane, unsigned int buffer_width)

drivers/gpu/drm/drm_fourcc.c

535

if (!info || plane < 0 || plane >= info->num_planes)

drivers/gpu/drm/drm_fourcc.c

538

return DIV_ROUND_UP_ULL((u64)buffer_width * info->char_per_block[plane],

drivers/gpu/drm/drm_fourcc.c

539

drm_format_info_block_width(info, plane) *

drivers/gpu/drm/drm_fourcc.c

540

drm_format_info_block_height(info, plane));

drivers/gpu/drm/drm_framebuffer.c

1004

struct drm_plane *plane;

drivers/gpu/drm/drm_framebuffer.c

1027

drm_for_each_plane(plane, dev) {

drivers/gpu/drm/drm_framebuffer.c

1030

if (plane->state->fb != fb)

drivers/gpu/drm/drm_framebuffer.c

1035

plane->base.id, plane->name, fb->base.id);

drivers/gpu/drm/drm_framebuffer.c

1037

plane_state = drm_atomic_get_plane_state(state, plane);

drivers/gpu/drm/drm_framebuffer.c

1043

if (disable_crtcs && plane_state->crtc->primary == plane) {

drivers/gpu/drm/drm_framebuffer.c

1068

plane_mask |= drm_plane_mask(plane);

drivers/gpu/drm/drm_framebuffer.c

1107

struct drm_plane *plane;

drivers/gpu/drm/drm_framebuffer.c

1123

drm_for_each_plane(plane, dev) {

drivers/gpu/drm/drm_framebuffer.c

1124

if (plane->fb == fb) {

drivers/gpu/drm/drm_framebuffer.c

1127

plane->base.id, plane->name, fb->base.id);

drivers/gpu/drm/drm_framebuffer.c

1128

drm_plane_force_disable(plane);

drivers/gpu/drm/drm_gem_atomic_helper.c

114

int drm_gem_plane_helper_prepare_fb(struct drm_plane *plane,

drivers/gpu/drm/drm_gem_atomic_helper.c

197

__drm_gem_duplicate_shadow_plane_state(struct drm_plane *plane,

drivers/gpu/drm/drm_gem_atomic_helper.c

200

struct drm_plane_state *plane_state = plane->state;

drivers/gpu/drm/drm_gem_atomic_helper.c

204

__drm_atomic_helper_plane_duplicate_state(plane, &new_shadow_plane_state->base);

drivers/gpu/drm/drm_gem_atomic_helper.c

229

drm_gem_duplicate_shadow_plane_state(struct drm_plane *plane)

drivers/gpu/drm/drm_gem_atomic_helper.c

231

struct drm_plane_state *plane_state = plane->state;

drivers/gpu/drm/drm_gem_atomic_helper.c

240

__drm_gem_duplicate_shadow_plane_state(plane, new_shadow_plane_state);

drivers/gpu/drm/drm_gem_atomic_helper.c

269

void drm_gem_destroy_shadow_plane_state(struct drm_plane *plane,

drivers/gpu/drm/drm_gem_atomic_helper.c

288

void __drm_gem_reset_shadow_plane(struct drm_plane *plane,

drivers/gpu/drm/drm_gem_atomic_helper.c

292

__drm_atomic_helper_plane_reset(plane, &shadow_plane_state->base);

drivers/gpu/drm/drm_gem_atomic_helper.c

295

__drm_atomic_helper_plane_reset(plane, NULL);

drivers/gpu/drm/drm_gem_atomic_helper.c

309

void drm_gem_reset_shadow_plane(struct drm_plane *plane)

drivers/gpu/drm/drm_gem_atomic_helper.c

313

if (plane->state) {

drivers/gpu/drm/drm_gem_atomic_helper.c

314

drm_gem_destroy_shadow_plane_state(plane, plane->state);

drivers/gpu/drm/drm_gem_atomic_helper.c

315

plane->state = NULL; /* must be set to NULL here */

drivers/gpu/drm/drm_gem_atomic_helper.c

319

__drm_gem_reset_shadow_plane(plane, shadow_plane_state);

drivers/gpu/drm/drm_gem_atomic_helper.c

338

int drm_gem_begin_shadow_fb_access(struct drm_plane *plane, struct drm_plane_state *plane_state)

drivers/gpu/drm/drm_gem_atomic_helper.c

360

void drm_gem_end_shadow_fb_access(struct drm_plane *plane, struct drm_plane_state *plane_state)

drivers/gpu/drm/drm_gem_atomic_helper.c

388

return drm_gem_begin_shadow_fb_access(&pipe->plane, plane_state);

drivers/gpu/drm/drm_gem_atomic_helper.c

406

drm_gem_end_shadow_fb_access(&pipe->plane, plane_state);

drivers/gpu/drm/drm_gem_atomic_helper.c

419

drm_gem_reset_shadow_plane(&pipe->plane);

drivers/gpu/drm/drm_gem_atomic_helper.c

438

return drm_gem_duplicate_shadow_plane_state(&pipe->plane);

drivers/gpu/drm/drm_gem_atomic_helper.c

454

drm_gem_destroy_shadow_plane_state(&pipe->plane, plane_state);

drivers/gpu/drm/drm_gem_framebuffer_helper.c

56

unsigned int plane)

drivers/gpu/drm/drm_gem_framebuffer_helper.c

60

if (drm_WARN_ON_ONCE(dev, plane >= ARRAY_SIZE(fb->obj)))

drivers/gpu/drm/drm_gem_framebuffer_helper.c

62

else if (drm_WARN_ON_ONCE(dev, !fb->obj[plane]))

drivers/gpu/drm/drm_gem_framebuffer_helper.c

65

return fb->obj[plane];

drivers/gpu/drm/drm_gem_vram_helper.c

557

static void __drm_gem_vram_plane_helper_cleanup_fb(struct drm_plane *plane,

drivers/gpu/drm/drm_gem_vram_helper.c

590

drm_gem_vram_plane_helper_prepare_fb(struct drm_plane *plane,

drivers/gpu/drm/drm_gem_vram_helper.c

614

ret = drm_gem_plane_helper_prepare_fb(plane, new_state);

drivers/gpu/drm/drm_gem_vram_helper.c

621

__drm_gem_vram_plane_helper_cleanup_fb(plane, new_state, i);

drivers/gpu/drm/drm_gem_vram_helper.c

637

drm_gem_vram_plane_helper_cleanup_fb(struct drm_plane *plane,

drivers/gpu/drm/drm_gem_vram_helper.c

645

__drm_gem_vram_plane_helper_cleanup_fb(plane, old_state, fb->format->num_planes);

drivers/gpu/drm/drm_ioctl.c

377

struct drm_plane *plane;

drivers/gpu/drm/drm_ioctl.c

384

drm_for_each_plane(plane, dev) {

drivers/gpu/drm/drm_ioctl.c

385

if (plane->color_pipeline_property) {

drivers/gpu/drm/drm_mipi_dbi.c

346

int drm_mipi_dbi_plane_helper_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/drm_mipi_dbi.c

349

struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/drm_mipi_dbi.c

377

void drm_mipi_dbi_plane_helper_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/drm_mipi_dbi.c

380

struct drm_plane_state *plane_state = plane->state;

drivers/gpu/drm/drm_mipi_dbi.c

383

struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane);

drivers/gpu/drm/drm_mipi_dbi.c

390

if (drm_dev_enter(plane->dev, &idx)) {

drivers/gpu/drm/drm_mode_config.c

197

struct drm_plane *plane;

drivers/gpu/drm/drm_mode_config.c

205

drm_for_each_plane(plane, dev)

drivers/gpu/drm/drm_mode_config.c

206

if (plane->funcs->reset)

drivers/gpu/drm/drm_mode_config.c

207

plane->funcs->reset(plane);

drivers/gpu/drm/drm_mode_config.c

532

struct drm_plane *plane, *plt;

drivers/gpu/drm/drm_mode_config.c

568

list_for_each_entry_safe(plane, plt, &dev->mode_config.plane_list,

drivers/gpu/drm/drm_mode_config.c

570

plane->funcs->destroy(plane);

drivers/gpu/drm/drm_mode_config.c

681

struct drm_plane *plane;

drivers/gpu/drm/drm_mode_config.c

732

drm_for_each_plane(plane, dev) {

drivers/gpu/drm/drm_mode_config.c

733

if (plane->type == DRM_PLANE_TYPE_PRIMARY)

drivers/gpu/drm/drm_mode_object.c

430

struct drm_plane *plane = obj_to_plane(obj);

drivers/gpu/drm/drm_mode_object.c

432

if (prop == plane->color_encoding_property ||

drivers/gpu/drm/drm_mode_object.c

433

prop == plane->color_range_property)

drivers/gpu/drm/drm_mode_object.c

438

struct drm_plane *plane = obj_to_plane(obj);

drivers/gpu/drm/drm_mode_object.c

440

if (prop == plane->color_pipeline_property)

drivers/gpu/drm/drm_modeset_lock.c

456

struct drm_plane *plane;

drivers/gpu/drm/drm_modeset_lock.c

469

drm_for_each_plane(plane, dev) {

drivers/gpu/drm/drm_modeset_lock.c

470

ret = drm_modeset_lock(&plane->mutex, ctx);

drivers/gpu/drm/drm_panic.c

1001

static void debugfs_register_plane(struct drm_plane *plane, int index) {}

drivers/gpu/drm/drm_panic.c

1012

struct drm_plane *plane;

drivers/gpu/drm/drm_panic.c

1017

drm_for_each_plane(plane, dev)

drivers/gpu/drm/drm_panic.c

1018

if (plane->helper_private && plane->helper_private->get_scanout_buffer)

drivers/gpu/drm/drm_panic.c

1030

struct drm_plane *plane;

drivers/gpu/drm/drm_panic.c

1036

drm_for_each_plane(plane, dev) {

drivers/gpu/drm/drm_panic.c

1037

if (!plane->helper_private || !plane->helper_private->get_scanout_buffer)

drivers/gpu/drm/drm_panic.c

1039

plane->kmsg_panic.dump = drm_panic;

drivers/gpu/drm/drm_panic.c

1040

plane->kmsg_panic.max_reason = KMSG_DUMP_PANIC;

drivers/gpu/drm/drm_panic.c

1041

if (kmsg_dump_register(&plane->kmsg_panic))

drivers/gpu/drm/drm_panic.c

1044

debugfs_register_plane(plane, registered_plane);

drivers/gpu/drm/drm_panic.c

1058

struct drm_plane *plane;

drivers/gpu/drm/drm_panic.c

1063

drm_for_each_plane(plane, dev) {

drivers/gpu/drm/drm_panic.c

1064

if (!plane->helper_private || !plane->helper_private->get_scanout_buffer)

drivers/gpu/drm/drm_panic.c

1066

kmsg_dump_unregister(&plane->kmsg_panic);

drivers/gpu/drm/drm_panic.c

921

static void draw_panic_plane(struct drm_plane *plane, const char *description)

drivers/gpu/drm/drm_panic.c

927

if (!drm_panic_trylock(plane->dev, flags))

drivers/gpu/drm/drm_panic.c

930

ret = plane->helper_private->get_scanout_buffer(plane, &sb);

drivers/gpu/drm/drm_panic.c

942

if (plane->helper_private->panic_flush)

drivers/gpu/drm/drm_panic.c

943

plane->helper_private->panic_flush(plane);

drivers/gpu/drm/drm_panic.c

948

drm_panic_unlock(plane->dev, flags);

drivers/gpu/drm/drm_panic.c

958

struct drm_plane *plane = to_drm_plane(dumper);

drivers/gpu/drm/drm_panic.c

961

draw_panic_plane(plane, detail->description);

drivers/gpu/drm/drm_panic.c

979

struct drm_plane *plane = file->private_data;

drivers/gpu/drm/drm_panic.c

981

draw_panic_plane(plane, "Test from debugfs");

drivers/gpu/drm/drm_panic.c

992

static void debugfs_register_plane(struct drm_plane *plane, int index)

drivers/gpu/drm/drm_panic.c

997

debugfs_create_file(fname, 0200, plane->dev->debugfs_root,

drivers/gpu/drm/drm_panic.c

998

plane, &dbg_drm_panic_ops);

drivers/gpu/drm/drm_plane.c

1001

drm_for_each_plane(plane, dev) {

drivers/gpu/drm/drm_plane.c

1002

if (drm_plane_has_format(plane, format, modifier))

drivers/gpu/drm/drm_plane.c

1018

static int __setplane_internal(struct drm_plane *plane,

drivers/gpu/drm/drm_plane.c

1030

WARN_ON(drm_drv_uses_atomic_modeset(plane->dev));

drivers/gpu/drm/drm_plane.c

1034

plane->old_fb = plane->fb;

drivers/gpu/drm/drm_plane.c

1035

ret = plane->funcs->disable_plane(plane, ctx);

drivers/gpu/drm/drm_plane.c

1037

plane->crtc = NULL;

drivers/gpu/drm/drm_plane.c

1038

plane->fb = NULL;

drivers/gpu/drm/drm_plane.c

1040

plane->old_fb = NULL;

drivers/gpu/drm/drm_plane.c

1045

ret = __setplane_check(plane, crtc, fb,

drivers/gpu/drm/drm_plane.c

1051

plane->old_fb = plane->fb;

drivers/gpu/drm/drm_plane.c

1052

ret = plane->funcs->update_plane(plane, crtc, fb,

drivers/gpu/drm/drm_plane.c

1056

plane->crtc = crtc;

drivers/gpu/drm/drm_plane.c

1057

plane->fb = fb;

drivers/gpu/drm/drm_plane.c

1058

drm_framebuffer_get(plane->fb);

drivers/gpu/drm/drm_plane.c

1060

plane->old_fb = NULL;

drivers/gpu/drm/drm_plane.c

1064

if (plane->old_fb)

drivers/gpu/drm/drm_plane.c

1065

drm_framebuffer_put(plane->old_fb);

drivers/gpu/drm/drm_plane.c

1066

plane->old_fb = NULL;

drivers/gpu/drm/drm_plane.c

1071

static int __setplane_atomic(struct drm_plane *plane,

drivers/gpu/drm/drm_plane.c

1082

WARN_ON(!drm_drv_uses_atomic_modeset(plane->dev));

drivers/gpu/drm/drm_plane.c

1086

return plane->funcs->disable_plane(plane, ctx);

drivers/gpu/drm/drm_plane.c

1095

ret = __setplane_check(plane, crtc, fb,

drivers/gpu/drm/drm_plane.c

1101

return plane->funcs->update_plane(plane, crtc, fb,

drivers/gpu/drm/drm_plane.c

1106

static int setplane_internal(struct drm_plane *plane,

drivers/gpu/drm/drm_plane.c

1118

DRM_MODESET_LOCK_ALL_BEGIN(plane->dev, ctx,

drivers/gpu/drm/drm_plane.c

1121

if (drm_drv_uses_atomic_modeset(plane->dev))

drivers/gpu/drm/drm_plane.c

1122

ret = __setplane_atomic(plane, crtc, fb,

drivers/gpu/drm/drm_plane.c

1126

ret = __setplane_internal(plane, crtc, fb,

drivers/gpu/drm/drm_plane.c

1130

DRM_MODESET_LOCK_ALL_END(plane->dev, ctx, ret);

drivers/gpu/drm/drm_plane.c

1139

struct drm_plane *plane;

drivers/gpu/drm/drm_plane.c

1151

plane = drm_plane_find(dev, file_priv, plane_req->plane_id);

drivers/gpu/drm/drm_plane.c

1152

if (!plane) {

drivers/gpu/drm/drm_plane.c

1175

ret = setplane_internal(plane, crtc, fb,

drivers/gpu/drm/drm_plane.c

1193

struct drm_plane *plane = crtc->cursor;

drivers/gpu/drm/drm_plane.c

1207

BUG_ON(!plane);

drivers/gpu/drm/drm_plane.c

1208

WARN_ON(plane->crtc != crtc && plane->crtc != NULL);

drivers/gpu/drm/drm_plane.c

1223

if (plane->hotspot_x_property && plane->state)

drivers/gpu/drm/drm_plane.c

1224

plane->state->hotspot_x = req->hot_x;

drivers/gpu/drm/drm_plane.c

1225

if (plane->hotspot_y_property && plane->state)

drivers/gpu/drm/drm_plane.c

1226

plane->state->hotspot_y = req->hot_y;

drivers/gpu/drm/drm_plane.c

1231

if (plane->state)

drivers/gpu/drm/drm_plane.c

1232

fb = plane->state->fb;

drivers/gpu/drm/drm_plane.c

1234

fb = plane->fb;

drivers/gpu/drm/drm_plane.c

1256

ret = __setplane_atomic(plane, crtc, fb,

drivers/gpu/drm/drm_plane.c

1260

ret = __setplane_internal(plane, crtc, fb,

drivers/gpu/drm/drm_plane.c

1386

struct drm_plane *plane;

drivers/gpu/drm/drm_plane.c

1415

plane = crtc->primary;

drivers/gpu/drm/drm_plane.c

1417

if (!drm_lease_held(file_priv, plane->base.id))

drivers/gpu/drm/drm_plane.c

1464

ret = drm_modeset_lock(&plane->mutex, &ctx);

drivers/gpu/drm/drm_plane.c

1468

if (plane->state)

drivers/gpu/drm/drm_plane.c

1469

old_fb = plane->state->fb;

drivers/gpu/drm/drm_plane.c

1471

old_fb = plane->fb;

drivers/gpu/drm/drm_plane.c

1488

if (plane->state) {

drivers/gpu/drm/drm_plane.c

1489

const struct drm_plane_state *state = plane->state;

drivers/gpu/drm/drm_plane.c

1536

plane->old_fb = plane->fb;

drivers/gpu/drm/drm_plane.c

1549

plane->old_fb = NULL;

drivers/gpu/drm/drm_plane.c

1551

if (!plane->state) {

drivers/gpu/drm/drm_plane.c

1552

plane->fb = fb;

drivers/gpu/drm/drm_plane.c

1561

if (plane->old_fb)

drivers/gpu/drm/drm_plane.c

1562

drm_framebuffer_put(plane->old_fb);

drivers/gpu/drm/drm_plane.c

1563

plane->old_fb = NULL;

drivers/gpu/drm/drm_plane.c

1654

void drm_plane_enable_fb_damage_clips(struct drm_plane *plane)

drivers/gpu/drm/drm_plane.c

1656

struct drm_device *dev = plane->dev;

drivers/gpu/drm/drm_plane.c

1659

drm_object_attach_property(&plane->base, config->prop_fb_damage_clips,

drivers/gpu/drm/drm_plane.c

1702

struct drm_device *dev = state->plane->dev;

drivers/gpu/drm/drm_plane.c

1706

if (!drm_mode_obj_find_prop_id(&state->plane->base,

drivers/gpu/drm/drm_plane.c

1770

int drm_plane_create_scaling_filter_property(struct drm_plane *plane,

drivers/gpu/drm/drm_plane.c

1774

drm_create_scaling_filter_prop(plane->dev, supported_filters);

drivers/gpu/drm/drm_plane.c

1779

drm_object_attach_property(&plane->base, prop,

drivers/gpu/drm/drm_plane.c

1781

plane->scaling_filter_property = prop;

drivers/gpu/drm/drm_plane.c

1799

int drm_plane_add_size_hints_property(struct drm_plane *plane,

drivers/gpu/drm/drm_plane.c

1803

struct drm_device *dev = plane->dev;

drivers/gpu/drm/drm_plane.c

1808

if (drm_WARN_ON(dev, plane->type != DRM_PLANE_TYPE_CURSOR))

drivers/gpu/drm/drm_plane.c

1817

drm_object_attach_property(&plane->base, config->size_hints_property,

drivers/gpu/drm/drm_plane.c

1838

int drm_plane_create_color_pipeline_property(struct drm_plane *plane,

drivers/gpu/drm/drm_plane.c

1850

drm_err(plane->dev, "failed to allocate color pipeline\n");

drivers/gpu/drm/drm_plane.c

1865

prop = drm_property_create_enum(plane->dev, DRM_MODE_PROP_ATOMIC,

drivers/gpu/drm/drm_plane.c

1873

drm_object_attach_property(&plane->base, prop, 0);

drivers/gpu/drm/drm_plane.c

1874

plane->color_pipeline_property = prop;

drivers/gpu/drm/drm_plane.c

198

struct drm_plane *plane,

drivers/gpu/drm/drm_plane.c

200

(struct drm_plane *plane,

drivers/gpu/drm/drm_plane.c

210

formats_size = sizeof(__u32) * plane->format_count;

drivers/gpu/drm/drm_plane.c

217

sizeof(struct drm_format_modifier) * plane->modifier_count;

drivers/gpu/drm/drm_plane.c

233

blob_data->count_formats = plane->format_count;

drivers/gpu/drm/drm_plane.c

235

blob_data->count_modifiers = plane->modifier_count;

drivers/gpu/drm/drm_plane.c

240

memcpy(formats_ptr(blob_data), plane->format_types, formats_size);

drivers/gpu/drm/drm_plane.c

243

for (i = 0; i < plane->modifier_count; i++) {

drivers/gpu/drm/drm_plane.c

244

for (j = 0; j < plane->format_count; j++) {

drivers/gpu/drm/drm_plane.c

246

format_mod_supported(plane,

drivers/gpu/drm/drm_plane.c

247

plane->format_types[j],

drivers/gpu/drm/drm_plane.c

248

plane->modifiers[i])) {

drivers/gpu/drm/drm_plane.c

253

mod->modifier = plane->modifiers[i];

drivers/gpu/drm/drm_plane.c

330

static int drm_plane_create_hotspot_properties(struct drm_plane *plane)

drivers/gpu/drm/drm_plane.c

335

drm_WARN_ON(plane->dev,

drivers/gpu/drm/drm_plane.c

336

!drm_core_check_feature(plane->dev,

drivers/gpu/drm/drm_plane.c

339

prop_x = drm_property_create_signed_range(plane->dev, 0, "HOTSPOT_X",

drivers/gpu/drm/drm_plane.c

344

prop_y = drm_property_create_signed_range(plane->dev, 0, "HOTSPOT_Y",

drivers/gpu/drm/drm_plane.c

347

drm_property_destroy(plane->dev, prop_x);

drivers/gpu/drm/drm_plane.c

351

drm_object_attach_property(&plane->base, prop_x, 0);

drivers/gpu/drm/drm_plane.c

352

drm_object_attach_property(&plane->base, prop_y, 0);

drivers/gpu/drm/drm_plane.c

353

plane->hotspot_x_property = prop_x;

drivers/gpu/drm/drm_plane.c

354

plane->hotspot_y_property = prop_y;

drivers/gpu/drm/drm_plane.c

361

struct drm_plane *plane,

drivers/gpu/drm/drm_plane.c

393

ret = drm_mode_object_add(dev, &plane->base, DRM_MODE_OBJECT_PLANE);

drivers/gpu/drm/drm_plane.c

397

drm_modeset_lock_init(&plane->mutex);

drivers/gpu/drm/drm_plane.c

399

plane->base.properties = &plane->properties;

drivers/gpu/drm/drm_plane.c

400

plane->dev = dev;

drivers/gpu/drm/drm_plane.c

401

plane->funcs = funcs;

drivers/gpu/drm/drm_plane.c

402

plane->format_types = kmalloc_array(format_count, sizeof(uint32_t),

drivers/gpu/drm/drm_plane.c

404

if (!plane->format_types) {

drivers/gpu/drm/drm_plane.c

406

drm_mode_object_unregister(dev, &plane->base);

drivers/gpu/drm/drm_plane.c

426

plane->modifier_count = format_modifier_count;

drivers/gpu/drm/drm_plane.c

427

plane->modifiers = kmalloc_array(format_modifier_count,

drivers/gpu/drm/drm_plane.c

428

sizeof(*plane->modifiers),

drivers/gpu/drm/drm_plane.c

431

if (format_modifier_count && !plane->modifiers) {

drivers/gpu/drm/drm_plane.c

433

kfree(plane->format_types);

drivers/gpu/drm/drm_plane.c

434

drm_mode_object_unregister(dev, &plane->base);

drivers/gpu/drm/drm_plane.c

439

plane->name = kvasprintf(GFP_KERNEL, name, ap);

drivers/gpu/drm/drm_plane.c

441

plane->name = kasprintf(GFP_KERNEL, "plane-%d",

drivers/gpu/drm/drm_plane.c

444

if (!plane->name) {

drivers/gpu/drm/drm_plane.c

445

kfree(plane->format_types);

drivers/gpu/drm/drm_plane.c

446

kfree(plane->modifiers);

drivers/gpu/drm/drm_plane.c

447

drm_mode_object_unregister(dev, &plane->base);

drivers/gpu/drm/drm_plane.c

451

memcpy(plane->format_types, formats, format_count * sizeof(uint32_t));

drivers/gpu/drm/drm_plane.c

452

plane->format_count = format_count;

drivers/gpu/drm/drm_plane.c

453

memcpy(plane->modifiers, format_modifiers,

drivers/gpu/drm/drm_plane.c

455

plane->possible_crtcs = possible_crtcs;

drivers/gpu/drm/drm_plane.c

456

plane->type = type;

drivers/gpu/drm/drm_plane.c

458

list_add_tail(&plane->head, &config->plane_list);

drivers/gpu/drm/drm_plane.c

459

plane->index = config->num_total_plane++;

drivers/gpu/drm/drm_plane.c

461

drm_object_attach_property(&plane->base,

drivers/gpu/drm/drm_plane.c

463

plane->type);

drivers/gpu/drm/drm_plane.c

466

drm_object_attach_property(&plane->base, config->prop_fb_id, 0);

drivers/gpu/drm/drm_plane.c

467

drm_object_attach_property(&plane->base, config->prop_in_fence_fd, -1);

drivers/gpu/drm/drm_plane.c

468

drm_object_attach_property(&plane->base, config->prop_crtc_id, 0);

drivers/gpu/drm/drm_plane.c

469

drm_object_attach_property(&plane->base, config->prop_crtc_x, 0);

drivers/gpu/drm/drm_plane.c

470

drm_object_attach_property(&plane->base, config->prop_crtc_y, 0);

drivers/gpu/drm/drm_plane.c

471

drm_object_attach_property(&plane->base, config->prop_crtc_w, 0);

drivers/gpu/drm/drm_plane.c

472

drm_object_attach_property(&plane->base, config->prop_crtc_h, 0);

drivers/gpu/drm/drm_plane.c

473

drm_object_attach_property(&plane->base, config->prop_src_x, 0);

drivers/gpu/drm/drm_plane.c

474

drm_object_attach_property(&plane->base, config->prop_src_y, 0);

drivers/gpu/drm/drm_plane.c

475

drm_object_attach_property(&plane->base, config->prop_src_w, 0);

drivers/gpu/drm/drm_plane.c

476

drm_object_attach_property(&plane->base, config->prop_src_h, 0);

drivers/gpu/drm/drm_plane.c

480

drm_plane_create_hotspot_properties(plane);

drivers/gpu/drm/drm_plane.c

484

blob = create_in_format_blob(dev, plane,

drivers/gpu/drm/drm_plane.c

485

plane->funcs->format_mod_supported);

drivers/gpu/drm/drm_plane.c

487

drm_object_attach_property(&plane->base,

drivers/gpu/drm/drm_plane.c

492

if (plane->funcs->format_mod_supported_async) {

drivers/gpu/drm/drm_plane.c

493

blob = create_in_format_blob(dev, plane,

drivers/gpu/drm/drm_plane.c

494

plane->funcs->format_mod_supported_async);

drivers/gpu/drm/drm_plane.c

496

drm_object_attach_property(&plane->base,

drivers/gpu/drm/drm_plane.c

532

int drm_universal_plane_init(struct drm_device *dev, struct drm_plane *plane,

drivers/gpu/drm/drm_plane.c

546

ret = __drm_universal_plane_init(dev, plane, possible_crtcs, funcs,

drivers/gpu/drm/drm_plane.c

556

struct drm_plane *plane = ptr;

drivers/gpu/drm/drm_plane.c

558

if (WARN_ON(!plane->dev))

drivers/gpu/drm/drm_plane.c

561

drm_plane_cleanup(plane);

drivers/gpu/drm/drm_plane.c

573

struct drm_plane *plane;

drivers/gpu/drm/drm_plane.c

584

plane = container + offset;

drivers/gpu/drm/drm_plane.c

587

ret = __drm_universal_plane_init(dev, plane, possible_crtcs, funcs,

drivers/gpu/drm/drm_plane.c

595

plane);

drivers/gpu/drm/drm_plane.c

612

struct drm_plane *plane;

drivers/gpu/drm/drm_plane.c

623

plane = container + offset;

drivers/gpu/drm/drm_plane.c

626

ret = __drm_universal_plane_init(dev, plane, possible_crtcs, funcs,

drivers/gpu/drm/drm_plane.c

645

struct drm_plane *plane;

drivers/gpu/drm/drm_plane.c

648

drm_for_each_plane(plane, dev) {

drivers/gpu/drm/drm_plane.c

649

if (plane->funcs->late_register)

drivers/gpu/drm/drm_plane.c

650

ret = plane->funcs->late_register(plane);

drivers/gpu/drm/drm_plane.c

654

if (plane->zpos_property)

drivers/gpu/drm/drm_plane.c

667

struct drm_plane *plane;

drivers/gpu/drm/drm_plane.c

669

drm_for_each_plane(plane, dev) {

drivers/gpu/drm/drm_plane.c

670

if (plane->funcs->early_unregister)

drivers/gpu/drm/drm_plane.c

671

plane->funcs->early_unregister(plane);

drivers/gpu/drm/drm_plane.c

683

void drm_plane_cleanup(struct drm_plane *plane)

drivers/gpu/drm/drm_plane.c

685

struct drm_device *dev = plane->dev;

drivers/gpu/drm/drm_plane.c

687

drm_modeset_lock_fini(&plane->mutex);

drivers/gpu/drm/drm_plane.c

689

kfree(plane->format_types);

drivers/gpu/drm/drm_plane.c

690

kfree(plane->modifiers);

drivers/gpu/drm/drm_plane.c

691

drm_mode_object_unregister(dev, &plane->base);

drivers/gpu/drm/drm_plane.c

693

BUG_ON(list_empty(&plane->head));

drivers/gpu/drm/drm_plane.c

700

list_del(&plane->head);

drivers/gpu/drm/drm_plane.c

703

WARN_ON(plane->state && !plane->funcs->atomic_destroy_state);

drivers/gpu/drm/drm_plane.c

704

if (plane->state && plane->funcs->atomic_destroy_state)

drivers/gpu/drm/drm_plane.c

705

plane->funcs->atomic_destroy_state(plane, plane->state);

drivers/gpu/drm/drm_plane.c

707

kfree(plane->name);

drivers/gpu/drm/drm_plane.c

709

memset(plane, 0, sizeof(*plane));

drivers/gpu/drm/drm_plane.c

724

struct drm_plane *plane;

drivers/gpu/drm/drm_plane.c

726

drm_for_each_plane(plane, dev)

drivers/gpu/drm/drm_plane.c

727

if (idx == plane->index)

drivers/gpu/drm/drm_plane.c

728

return plane;

drivers/gpu/drm/drm_plane.c

749

void drm_plane_force_disable(struct drm_plane *plane)

drivers/gpu/drm/drm_plane.c

753

if (!plane->fb)

drivers/gpu/drm/drm_plane.c

756

WARN_ON(drm_drv_uses_atomic_modeset(plane->dev));

drivers/gpu/drm/drm_plane.c

758

plane->old_fb = plane->fb;

drivers/gpu/drm/drm_plane.c

759

ret = plane->funcs->disable_plane(plane, NULL);

drivers/gpu/drm/drm_plane.c

762

plane->old_fb = NULL;

drivers/gpu/drm/drm_plane.c

766

drm_framebuffer_put(plane->old_fb);

drivers/gpu/drm/drm_plane.c

767

plane->old_fb = NULL;

drivers/gpu/drm/drm_plane.c

768

plane->fb = NULL;

drivers/gpu/drm/drm_plane.c

769

plane->crtc = NULL;

drivers/gpu/drm/drm_plane.c

786

int drm_mode_plane_set_obj_prop(struct drm_plane *plane,

drivers/gpu/drm/drm_plane.c

791

struct drm_mode_object *obj = &plane->base;

drivers/gpu/drm/drm_plane.c

793

if (plane->funcs->set_property)

drivers/gpu/drm/drm_plane.c

794

ret = plane->funcs->set_property(plane, property, value);

drivers/gpu/drm/drm_plane.c

806

struct drm_plane *plane;

drivers/gpu/drm/drm_plane.c

819

drm_for_each_plane(plane, dev) {

drivers/gpu/drm/drm_plane.c

824

if (plane->type != DRM_PLANE_TYPE_OVERLAY &&

drivers/gpu/drm/drm_plane.c

835

if (plane->type == DRM_PLANE_TYPE_CURSOR &&

drivers/gpu/drm/drm_plane.c

841

if (drm_lease_held(file_priv, plane->base.id)) {

drivers/gpu/drm/drm_plane.c

843

put_user(plane->base.id, plane_ptr + count))

drivers/gpu/drm/drm_plane.c

857

struct drm_plane *plane;

drivers/gpu/drm/drm_plane.c

863

plane = drm_plane_find(dev, file_priv, plane_resp->plane_id);

drivers/gpu/drm/drm_plane.c

864

if (!plane)

drivers/gpu/drm/drm_plane.c

867

drm_modeset_lock(&plane->mutex, NULL);

drivers/gpu/drm/drm_plane.c

868

if (plane->state && plane->state->crtc && drm_lease_held(file_priv, plane->state->crtc->base.id))

drivers/gpu/drm/drm_plane.c

869

plane_resp->crtc_id = plane->state->crtc->base.id;

drivers/gpu/drm/drm_plane.c

870

else if (!plane->state && plane->crtc && drm_lease_held(file_priv, plane->crtc->base.id))

drivers/gpu/drm/drm_plane.c

871

plane_resp->crtc_id = plane->crtc->base.id;

drivers/gpu/drm/drm_plane.c

875

if (plane->state && plane->state->fb)

drivers/gpu/drm/drm_plane.c

876

plane_resp->fb_id = plane->state->fb->base.id;

drivers/gpu/drm/drm_plane.c

877

else if (!plane->state && plane->fb)

drivers/gpu/drm/drm_plane.c

878

plane_resp->fb_id = plane->fb->base.id;

drivers/gpu/drm/drm_plane.c

881

drm_modeset_unlock(&plane->mutex);

drivers/gpu/drm/drm_plane.c

883

plane_resp->plane_id = plane->base.id;

drivers/gpu/drm/drm_plane.c

885

plane->possible_crtcs);

drivers/gpu/drm/drm_plane.c

893

if (plane->format_count &&

drivers/gpu/drm/drm_plane.c

894

(plane_resp->count_format_types >= plane->format_count)) {

drivers/gpu/drm/drm_plane.c

897

plane->format_types,

drivers/gpu/drm/drm_plane.c

898

sizeof(uint32_t) * plane->format_count)) {

drivers/gpu/drm/drm_plane.c

902

plane_resp->count_format_types = plane->format_count;

drivers/gpu/drm/drm_plane.c

916

bool drm_plane_has_format(struct drm_plane *plane,

drivers/gpu/drm/drm_plane.c

921

for (i = 0; i < plane->format_count; i++) {

drivers/gpu/drm/drm_plane.c

922

if (format == plane->format_types[i])

drivers/gpu/drm/drm_plane.c

925

if (i == plane->format_count)

drivers/gpu/drm/drm_plane.c

928

if (plane->funcs->format_mod_supported) {

drivers/gpu/drm/drm_plane.c

929

if (!plane->funcs->format_mod_supported(plane, format, modifier))

drivers/gpu/drm/drm_plane.c

932

if (!plane->modifier_count)

drivers/gpu/drm/drm_plane.c

935

for (i = 0; i < plane->modifier_count; i++) {

drivers/gpu/drm/drm_plane.c

936

if (modifier == plane->modifiers[i])

drivers/gpu/drm/drm_plane.c

939

if (i == plane->modifier_count)

drivers/gpu/drm/drm_plane.c

947

static int __setplane_check(struct drm_plane *plane,

drivers/gpu/drm/drm_plane.c

958

if (!(plane->possible_crtcs & drm_crtc_mask(crtc))) {

drivers/gpu/drm/drm_plane.c

964

if (!drm_plane_has_format(plane, fb->format->format, fb->modifier)) {

drivers/gpu/drm/drm_plane.c

999

struct drm_plane *plane;

drivers/gpu/drm/drm_plane_helper.c

108

.plane = plane,

drivers/gpu/drm/drm_plane_helper.c

165

int drm_plane_helper_update_primary(struct drm_plane *plane, struct drm_crtc *crtc,

drivers/gpu/drm/drm_plane_helper.c

192

struct drm_device *dev = plane->dev;

drivers/gpu/drm/drm_plane_helper.c

200

ret = drm_plane_helper_check_update(plane, crtc, fb,

drivers/gpu/drm/drm_plane_helper.c

215

return plane->funcs->disable_plane(plane, ctx);

drivers/gpu/drm/drm_plane_helper.c

257

int drm_plane_helper_disable_primary(struct drm_plane *plane,

drivers/gpu/drm/drm_plane_helper.c

260

struct drm_device *dev = plane->dev;

drivers/gpu/drm/drm_plane_helper.c

276

void drm_plane_helper_destroy(struct drm_plane *plane)

drivers/gpu/drm/drm_plane_helper.c

278

drm_plane_cleanup(plane);

drivers/gpu/drm/drm_plane_helper.c

279

kfree(plane);

drivers/gpu/drm/drm_plane_helper.c

95

static int drm_plane_helper_check_update(struct drm_plane *plane,

drivers/gpu/drm/drm_simple_kms_helper.c

171

static int drm_simple_kms_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/drm_simple_kms_helper.c

175

plane);

drivers/gpu/drm/drm_simple_kms_helper.c

180

pipe = container_of(plane, struct drm_simple_display_pipe, plane);

drivers/gpu/drm/drm_simple_kms_helper.c

200

static void drm_simple_kms_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/drm_simple_kms_helper.c

204

plane);

drivers/gpu/drm/drm_simple_kms_helper.c

207

pipe = container_of(plane, struct drm_simple_display_pipe, plane);

drivers/gpu/drm/drm_simple_kms_helper.c

214

static int drm_simple_kms_plane_prepare_fb(struct drm_plane *plane,

drivers/gpu/drm/drm_simple_kms_helper.c

219

pipe = container_of(plane, struct drm_simple_display_pipe, plane);

drivers/gpu/drm/drm_simple_kms_helper.c

221

if (WARN_ON_ONCE(!drm_core_check_feature(plane->dev, DRIVER_GEM)))

drivers/gpu/drm/drm_simple_kms_helper.c

226

return drm_gem_plane_helper_prepare_fb(plane, state);

drivers/gpu/drm/drm_simple_kms_helper.c

232

static void drm_simple_kms_plane_cleanup_fb(struct drm_plane *plane,

drivers/gpu/drm/drm_simple_kms_helper.c

237

pipe = container_of(plane, struct drm_simple_display_pipe, plane);

drivers/gpu/drm/drm_simple_kms_helper.c

244

static int drm_simple_kms_plane_begin_fb_access(struct drm_plane *plane,

drivers/gpu/drm/drm_simple_kms_helper.c

249

pipe = container_of(plane, struct drm_simple_display_pipe, plane);

drivers/gpu/drm/drm_simple_kms_helper.c

256

static void drm_simple_kms_plane_end_fb_access(struct drm_plane *plane,

drivers/gpu/drm/drm_simple_kms_helper.c

261

pipe = container_of(plane, struct drm_simple_display_pipe, plane);

drivers/gpu/drm/drm_simple_kms_helper.c

268

static bool drm_simple_kms_format_mod_supported(struct drm_plane *plane,

drivers/gpu/drm/drm_simple_kms_helper.c

284

static void drm_simple_kms_plane_reset(struct drm_plane *plane)

drivers/gpu/drm/drm_simple_kms_helper.c

288

pipe = container_of(plane, struct drm_simple_display_pipe, plane);

drivers/gpu/drm/drm_simple_kms_helper.c

290

return drm_atomic_helper_plane_reset(plane);

drivers/gpu/drm/drm_simple_kms_helper.c

295

static struct drm_plane_state *drm_simple_kms_plane_duplicate_state(struct drm_plane *plane)

drivers/gpu/drm/drm_simple_kms_helper.c

299

pipe = container_of(plane, struct drm_simple_display_pipe, plane);

drivers/gpu/drm/drm_simple_kms_helper.c

301

return drm_atomic_helper_plane_duplicate_state(plane);

drivers/gpu/drm/drm_simple_kms_helper.c

306

static void drm_simple_kms_plane_destroy_state(struct drm_plane *plane,

drivers/gpu/drm/drm_simple_kms_helper.c

311

pipe = container_of(plane, struct drm_simple_display_pipe, plane);

drivers/gpu/drm/drm_simple_kms_helper.c

313

drm_atomic_helper_plane_destroy_state(plane, state);

drivers/gpu/drm/drm_simple_kms_helper.c

343

struct drm_plane *plane = &pipe->plane;

drivers/gpu/drm/drm_simple_kms_helper.c

350

drm_plane_helper_add(plane, &drm_simple_kms_plane_helper_funcs);

drivers/gpu/drm/drm_simple_kms_helper.c

351

ret = drm_universal_plane_init(dev, plane, 0,

drivers/gpu/drm/drm_simple_kms_helper.c

360

ret = drm_crtc_init_with_planes(dev, crtc, plane, NULL,

drivers/gpu/drm/drm_simple_kms_helper.c

75

struct drm_plane *plane;

drivers/gpu/drm/drm_simple_kms_helper.c

82

plane = &pipe->plane;

drivers/gpu/drm/drm_simple_kms_helper.c

83

pipe->funcs->enable(pipe, crtc->state, plane->state);

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

323

struct exynos_drm_plane *plane = &ctx->planes[win];

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

325

to_exynos_plane_state(plane->base.state);

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

402

struct exynos_drm_plane *plane)

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

405

to_exynos_plane_state(plane->base.state);

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

408

unsigned int win = plane->index;

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

459

struct exynos_drm_plane *plane)

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

462

unsigned int win = plane->index;

drivers/gpu/drm/exynos/exynos7_drm_decon.c

400

struct exynos_drm_plane *plane)

drivers/gpu/drm/exynos/exynos7_drm_decon.c

403

to_exynos_plane_state(plane->base.state);

drivers/gpu/drm/exynos/exynos7_drm_decon.c

410

unsigned int win = plane->index;

drivers/gpu/drm/exynos/exynos7_drm_decon.c

496

struct exynos_drm_plane *plane)

drivers/gpu/drm/exynos/exynos7_drm_decon.c

499

unsigned int win = plane->index;

drivers/gpu/drm/exynos/exynos_drm_crtc.c

174

struct drm_plane *plane,

drivers/gpu/drm/exynos/exynos_drm_crtc.c

193

ret = drm_crtc_init_with_planes(drm_dev, crtc, plane, NULL,

drivers/gpu/drm/exynos/exynos_drm_crtc.c

203

plane->funcs->destroy(plane);

drivers/gpu/drm/exynos/exynos_drm_crtc.h

18

struct drm_plane *plane,

drivers/gpu/drm/exynos/exynos_drm_drv.h

148

struct exynos_drm_plane *plane);

drivers/gpu/drm/exynos/exynos_drm_drv.h

150

struct exynos_drm_plane *plane);

drivers/gpu/drm/exynos/exynos_drm_fimd.c

666

struct exynos_drm_plane *plane = &ctx->planes[win];

drivers/gpu/drm/exynos/exynos_drm_fimd.c

668

to_exynos_plane_state(plane->base.state);

drivers/gpu/drm/exynos/exynos_drm_fimd.c

832

struct exynos_drm_plane *plane)

drivers/gpu/drm/exynos/exynos_drm_fimd.c

835

to_exynos_plane_state(plane->base.state);

drivers/gpu/drm/exynos/exynos_drm_fimd.c

841

unsigned int win = plane->index;

drivers/gpu/drm/exynos/exynos_drm_fimd.c

927

struct exynos_drm_plane *plane)

drivers/gpu/drm/exynos/exynos_drm_fimd.c

930

unsigned int win = plane->index;

drivers/gpu/drm/exynos/exynos_drm_plane.c

125

static void exynos_drm_plane_reset(struct drm_plane *plane)

drivers/gpu/drm/exynos/exynos_drm_plane.c

127

struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);

drivers/gpu/drm/exynos/exynos_drm_plane.c

130

if (plane->state) {

drivers/gpu/drm/exynos/exynos_drm_plane.c

131

exynos_state = to_exynos_plane_state(plane->state);

drivers/gpu/drm/exynos/exynos_drm_plane.c

132

__drm_atomic_helper_plane_destroy_state(plane->state);

drivers/gpu/drm/exynos/exynos_drm_plane.c

134

plane->state = NULL;

drivers/gpu/drm/exynos/exynos_drm_plane.c

139

__drm_atomic_helper_plane_reset(plane, &exynos_state->base);

drivers/gpu/drm/exynos/exynos_drm_plane.c

140

plane->state->zpos = exynos_plane->config->zpos;

drivers/gpu/drm/exynos/exynos_drm_plane.c

145

exynos_drm_plane_duplicate_state(struct drm_plane *plane)

drivers/gpu/drm/exynos/exynos_drm_plane.c

150

exynos_state = to_exynos_plane_state(plane->state);

drivers/gpu/drm/exynos/exynos_drm_plane.c

155

__drm_atomic_helper_plane_duplicate_state(plane, &copy->base);

drivers/gpu/drm/exynos/exynos_drm_plane.c

159

static void exynos_drm_plane_destroy_state(struct drm_plane *plane,

drivers/gpu/drm/exynos/exynos_drm_plane.c

232

static int exynos_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/exynos/exynos_drm_plane.c

236

plane);

drivers/gpu/drm/exynos/exynos_drm_plane.c

237

struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);

drivers/gpu/drm/exynos/exynos_drm_plane.c

256

static void exynos_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/exynos/exynos_drm_plane.c

260

plane);

drivers/gpu/drm/exynos/exynos_drm_plane.c

262

struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);

drivers/gpu/drm/exynos/exynos_drm_plane.c

271

static void exynos_plane_atomic_disable(struct drm_plane *plane,

drivers/gpu/drm/exynos/exynos_drm_plane.c

274

struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state, plane);

drivers/gpu/drm/exynos/exynos_drm_plane.c

275

struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);

drivers/gpu/drm/exynos/exynos_drm_plane.c

291

static void exynos_plane_attach_zpos_property(struct drm_plane *plane,

drivers/gpu/drm/exynos/exynos_drm_plane.c

295

drm_plane_create_zpos_immutable_property(plane, zpos);

drivers/gpu/drm/exynos/exynos_drm_plane.c

297

drm_plane_create_zpos_property(plane, zpos, 0, MAX_PLANE - 1);

drivers/gpu/drm/exynos/exynos_drm_plane.c

308

struct drm_plane *plane = &exynos_plane->base;

drivers/gpu/drm/exynos/exynos_drm_plane.c

330

drm_plane_create_blend_mode_property(plane, supported_modes);

drivers/gpu/drm/exynos/exynos_drm_plane.c

333

drm_plane_create_alpha_property(plane);

drivers/gpu/drm/exynos/exynos_drm_vidi.c

113

struct exynos_drm_plane *plane)

drivers/gpu/drm/exynos/exynos_drm_vidi.c

115

struct drm_plane_state *state = plane->base.state;

drivers/gpu/drm/exynos/exynos_mixer.c

515

struct exynos_drm_plane *plane)

drivers/gpu/drm/exynos/exynos_mixer.c

518

to_exynos_plane_state(plane->base.state);

drivers/gpu/drm/exynos/exynos_mixer.c

592

mixer_cfg_layer(ctx, plane->index, priority, true);

drivers/gpu/drm/exynos/exynos_mixer.c

602

struct exynos_drm_plane *plane)

drivers/gpu/drm/exynos/exynos_mixer.c

605

to_exynos_plane_state(plane->base.state);

drivers/gpu/drm/exynos/exynos_mixer.c

609

unsigned int win = plane->index;

drivers/gpu/drm/exynos/exynos_mixer.c

951

struct exynos_drm_plane *plane)

drivers/gpu/drm/exynos/exynos_mixer.c

955

DRM_DEV_DEBUG_KMS(mixer_ctx->dev, "win: %d\n", plane->index);

drivers/gpu/drm/exynos/exynos_mixer.c

960

if (plane->index == VP_DEFAULT_WIN)

drivers/gpu/drm/exynos/exynos_mixer.c

961

vp_video_buffer(mixer_ctx, plane);

drivers/gpu/drm/exynos/exynos_mixer.c

963

mixer_graph_buffer(mixer_ctx, plane);

drivers/gpu/drm/exynos/exynos_mixer.c

967

struct exynos_drm_plane *plane)

drivers/gpu/drm/exynos/exynos_mixer.c

972

DRM_DEV_DEBUG_KMS(mixer_ctx->dev, "win: %d\n", plane->index);

drivers/gpu/drm/exynos/exynos_mixer.c

978

mixer_cfg_layer(mixer_ctx, plane->index, 0, false);

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c

24

static int fsl_dcu_drm_plane_index(struct drm_plane *plane)

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c

26

struct fsl_dcu_drm_device *fsl_dev = plane->dev->dev_private;

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c

30

index = drm_plane_index(plane);

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c

38

static int fsl_dcu_drm_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c

42

plane);

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c

64

static void fsl_dcu_drm_plane_atomic_disable(struct drm_plane *plane,

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c

67

struct fsl_dcu_drm_device *fsl_dev = plane->dev->dev_private;

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c

71

index = fsl_dcu_drm_plane_index(plane);

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c

80

static void fsl_dcu_drm_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c

84

struct fsl_dcu_drm_device *fsl_dev = plane->dev->dev_private;

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c

86

plane);

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c

87

struct drm_framebuffer *fb = plane->state->fb;

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c

95

index = fsl_dcu_drm_plane_index(plane);

drivers/gpu/drm/gma500/psb_intel_display.c

504

gma_crtc->plane = pipe;

drivers/gpu/drm/gma500/psb_intel_display.c

518

dev_priv->plane_to_crtc_mapping[gma_crtc->plane] != NULL);

drivers/gpu/drm/gma500/psb_intel_display.c

519

dev_priv->plane_to_crtc_mapping[gma_crtc->plane] = &gma_crtc->base;

drivers/gpu/drm/gma500/psb_intel_drv.h

140

int plane;

drivers/gpu/drm/gud/gud_drv.c

292

ret = drm_plane_create_rotation_property(&gdrm->plane,

drivers/gpu/drm/gud/gud_drv.c

611

ret = drm_universal_plane_init(drm, &gdrm->plane, 0,

drivers/gpu/drm/gud/gud_drv.c

619

drm_plane_helper_add(&gdrm->plane, &gud_plane_helper_funcs);

drivers/gpu/drm/gud/gud_drv.c

620

drm_plane_enable_fb_damage_clips(&gdrm->plane);

drivers/gpu/drm/gud/gud_drv.c

628

ret = drm_crtc_init_with_planes(drm, &gdrm->crtc, &gdrm->plane, NULL,

drivers/gpu/drm/gud/gud_internal.h

17

struct drm_plane plane;

drivers/gpu/drm/gud/gud_internal.h

69

int gud_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/gud/gud_internal.h

71

void gud_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/gud/gud_pipe.c

453

int gud_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/gud/gud_pipe.c

456

struct gud_device *gdrm = to_gud_device(plane->dev);

drivers/gpu/drm/gud/gud_pipe.c

457

struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane);

drivers/gpu/drm/gud/gud_pipe.c

458

struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/gud/gud_pipe.c

516

drm_connector_list_iter_begin(plane->dev, &conn_iter);

drivers/gpu/drm/gud/gud_pipe.c

526

if (drm_WARN_ON_ONCE(plane->dev, !connector_state))

drivers/gpu/drm/gud/gud_pipe.c

538

if (drm_WARN_ON_ONCE(plane->dev, !req->format)) {

drivers/gpu/drm/gud/gud_pipe.c

560

drm_WARN_ON_ONCE(plane->dev, 1);

drivers/gpu/drm/gud/gud_pipe.c

616

void gud_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/gud/gud_pipe.c

619

struct drm_device *drm = plane->dev;

drivers/gpu/drm/gud/gud_pipe.c

621

struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(atomic_state, plane);

drivers/gpu/drm/gud/gud_pipe.c

622

struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(atomic_state, plane);

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

107

drm_dbg_atomic(plane->dev, "visible portion of plane is invalid\n");

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

112

drm_dbg_atomic(plane->dev, "wrong stride with 128-byte aligned\n");

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

118

static void hibmc_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

122

plane);

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

126

struct hibmc_drm_private *priv = to_hibmc_drm_private(plane->dev);

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

516

struct drm_plane *plane = &priv->primary_plane;

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

519

ret = drm_universal_plane_init(dev, plane, 1, &hibmc_plane_funcs,

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

531

drm_plane_helper_add(plane, &hibmc_plane_helper_funcs);

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

533

ret = drm_crtc_init_with_planes(dev, crtc, plane,

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

72

static int hibmc_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

76

plane);

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

91

drm_dbg_atomic(plane->dev, "scale not support\n");

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c

96

drm_dbg_atomic(plane->dev, "crtc_x/y of drm_plane state is invalid\n");

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

761

static int ade_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

765

plane);

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

808

static void ade_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

812

plane);

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

813

struct kirin_plane *kplane = to_kirin_plane(plane);

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

822

static void ade_plane_atomic_disable(struct drm_plane *plane,

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

825

struct kirin_plane *kplane = to_kirin_plane(plane);

drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c

42

struct drm_plane *plane,

drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c

59

ret = drm_crtc_init_with_planes(dev, crtc, plane, NULL,

drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c

71

static int kirin_drm_plane_init(struct drm_device *dev, struct drm_plane *plane,

drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c

77

ret = drm_universal_plane_init(dev, plane, 1, data->plane_funcs,

drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c

86

drm_plane_helper_add(plane, data->plane_helper_funcs);

drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.h

13

#define to_kirin_plane(plane) \

drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.h

14

container_of(plane, struct kirin_plane, base)

drivers/gpu/drm/hyperv/hyperv_drm.h

14

struct drm_plane plane;

drivers/gpu/drm/hyperv/hyperv_drm_modeset.c

108

struct drm_plane *plane = &hv->plane;

drivers/gpu/drm/hyperv/hyperv_drm_modeset.c

109

struct drm_plane_state *plane_state = plane->state;

drivers/gpu/drm/hyperv/hyperv_drm_modeset.c

138

static int hyperv_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/hyperv/hyperv_drm_modeset.c

141

struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/hyperv/hyperv_drm_modeset.c

142

struct hyperv_drm_device *hv = to_hv(plane->dev);

drivers/gpu/drm/hyperv/hyperv_drm_modeset.c

170

static void hyperv_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/hyperv/hyperv_drm_modeset.c

173

struct hyperv_drm_device *hv = to_hv(plane->dev);

drivers/gpu/drm/hyperv/hyperv_drm_modeset.c

174

struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state, plane);

drivers/gpu/drm/hyperv/hyperv_drm_modeset.c

175

struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/hyperv/hyperv_drm_modeset.c

193

static int hyperv_plane_get_scanout_buffer(struct drm_plane *plane,

drivers/gpu/drm/hyperv/hyperv_drm_modeset.c

196

struct hyperv_drm_device *hv = to_hv(plane->dev);

drivers/gpu/drm/hyperv/hyperv_drm_modeset.c

199

if (plane->state && plane->state->fb) {

drivers/gpu/drm/hyperv/hyperv_drm_modeset.c

200

sb->format = plane->state->fb->format;

drivers/gpu/drm/hyperv/hyperv_drm_modeset.c

201

sb->width = plane->state->fb->width;

drivers/gpu/drm/hyperv/hyperv_drm_modeset.c

202

sb->height = plane->state->fb->height;

drivers/gpu/drm/hyperv/hyperv_drm_modeset.c

203

sb->pitch[0] = plane->state->fb->pitches[0];

drivers/gpu/drm/hyperv/hyperv_drm_modeset.c

210

static void hyperv_plane_panic_flush(struct drm_plane *plane)

drivers/gpu/drm/hyperv/hyperv_drm_modeset.c

212

struct hyperv_drm_device *hv = to_hv(plane->dev);

drivers/gpu/drm/hyperv/hyperv_drm_modeset.c

215

if (plane->state && plane->state->fb) {

drivers/gpu/drm/hyperv/hyperv_drm_modeset.c

218

rect.x2 = plane->state->fb->width;

drivers/gpu/drm/hyperv/hyperv_drm_modeset.c

219

rect.y2 = plane->state->fb->height;

drivers/gpu/drm/hyperv/hyperv_drm_modeset.c

250

struct drm_plane *plane = &hv->plane;

drivers/gpu/drm/hyperv/hyperv_drm_modeset.c

255

ret = drm_universal_plane_init(dev, plane, 0,

drivers/gpu/drm/hyperv/hyperv_drm_modeset.c

262

drm_plane_helper_add(plane, &hyperv_plane_helper_funcs);

drivers/gpu/drm/hyperv/hyperv_drm_modeset.c

263

drm_plane_enable_fb_damage_clips(plane);

drivers/gpu/drm/hyperv/hyperv_drm_modeset.c

265

ret = drm_crtc_init_with_planes(dev, crtc, plane, NULL,

drivers/gpu/drm/i915/display/i9xx_plane.c

1000

plane->max_stride = i915_plane_max_stride;

drivers/gpu/drm/i915/display/i9xx_plane.c

1002

plane->max_stride = i8xx_plane_max_stride;

drivers/gpu/drm/i915/display/i9xx_plane.c

1005

plane->max_stride = hsw_primary_max_stride;

drivers/gpu/drm/i915/display/i9xx_plane.c

1007

plane->max_stride = ilk_primary_max_stride;

drivers/gpu/drm/i915/display/i9xx_plane.c

1011

plane->min_alignment = vlv_plane_min_alignment;

drivers/gpu/drm/i915/display/i9xx_plane.c

1013

plane->min_alignment = g4x_primary_min_alignment;

drivers/gpu/drm/i915/display/i9xx_plane.c

1015

plane->min_alignment = i965_plane_min_alignment;

drivers/gpu/drm/i915/display/i9xx_plane.c

1017

plane->min_alignment = i9xx_plane_min_alignment;

drivers/gpu/drm/i915/display/i9xx_plane.c

1021

plane->vtd_guard = 128;

drivers/gpu/drm/i915/display/i9xx_plane.c

1024

plane->update_arm = i830_plane_update_arm;

drivers/gpu/drm/i915/display/i9xx_plane.c

1026

plane->update_noarm = i9xx_plane_update_noarm;

drivers/gpu/drm/i915/display/i9xx_plane.c

1027

plane->update_arm = i9xx_plane_update_arm;

drivers/gpu/drm/i915/display/i9xx_plane.c

1029

plane->disable_arm = i9xx_plane_disable_arm;

drivers/gpu/drm/i915/display/i9xx_plane.c

1030

plane->get_hw_state = i9xx_plane_get_hw_state;

drivers/gpu/drm/i915/display/i9xx_plane.c

1031

plane->check_plane = i9xx_plane_check;

drivers/gpu/drm/i915/display/i9xx_plane.c

1034

plane->surf_offset = i965_plane_surf_offset;

drivers/gpu/drm/i915/display/i9xx_plane.c

1036

plane->surf_offset = i8xx_plane_surf_offset;

drivers/gpu/drm/i915/display/i9xx_plane.c

1039

plane->capture_error = g4x_primary_capture_error;

drivers/gpu/drm/i915/display/i9xx_plane.c

1041

plane->capture_error = i965_plane_capture_error;

drivers/gpu/drm/i915/display/i9xx_plane.c

1043

plane->capture_error = i8xx_plane_capture_error;

drivers/gpu/drm/i915/display/i9xx_plane.c

1047

plane->async_flip = vlv_primary_async_flip;

drivers/gpu/drm/i915/display/i9xx_plane.c

1048

plane->enable_flip_done = vlv_primary_enable_flip_done;

drivers/gpu/drm/i915/display/i9xx_plane.c

1049

plane->disable_flip_done = vlv_primary_disable_flip_done;

drivers/gpu/drm/i915/display/i9xx_plane.c

1050

plane->can_async_flip = i9xx_plane_can_async_flip;

drivers/gpu/drm/i915/display/i9xx_plane.c

1052

plane->need_async_flip_toggle_wa = true;

drivers/gpu/drm/i915/display/i9xx_plane.c

1053

plane->async_flip = g4x_primary_async_flip;

drivers/gpu/drm/i915/display/i9xx_plane.c

1054

plane->enable_flip_done = bdw_primary_enable_flip_done;

drivers/gpu/drm/i915/display/i9xx_plane.c

1055

plane->disable_flip_done = bdw_primary_disable_flip_done;

drivers/gpu/drm/i915/display/i9xx_plane.c

1056

plane->can_async_flip = i9xx_plane_can_async_flip;

drivers/gpu/drm/i915/display/i9xx_plane.c

1058

plane->async_flip = g4x_primary_async_flip;

drivers/gpu/drm/i915/display/i9xx_plane.c

1059

plane->enable_flip_done = ivb_primary_enable_flip_done;

drivers/gpu/drm/i915/display/i9xx_plane.c

1060

plane->disable_flip_done = ivb_primary_disable_flip_done;

drivers/gpu/drm/i915/display/i9xx_plane.c

1061

plane->can_async_flip = i9xx_plane_can_async_flip;

drivers/gpu/drm/i915/display/i9xx_plane.c

1063

plane->async_flip = g4x_primary_async_flip;

drivers/gpu/drm/i915/display/i9xx_plane.c

1064

plane->enable_flip_done = ilk_primary_enable_flip_done;

drivers/gpu/drm/i915/display/i9xx_plane.c

1065

plane->disable_flip_done = ilk_primary_disable_flip_done;

drivers/gpu/drm/i915/display/i9xx_plane.c

1066

plane->can_async_flip = i9xx_plane_can_async_flip;

drivers/gpu/drm/i915/display/i9xx_plane.c

1070

plane->disable_tiling = i9xx_disable_tiling;

drivers/gpu/drm/i915/display/i9xx_plane.c

1075

ret = drm_universal_plane_init(display->drm, &plane->base,

drivers/gpu/drm/i915/display/i9xx_plane.c

1082

ret = drm_universal_plane_init(display->drm, &plane->base,

drivers/gpu/drm/i915/display/i9xx_plane.c

1088

plane_name(plane->i9xx_plane));

drivers/gpu/drm/i915/display/i9xx_plane.c

1107

drm_plane_create_rotation_property(&plane->base,

drivers/gpu/drm/i915/display/i9xx_plane.c

1112

drm_plane_create_zpos_immutable_property(&plane->base, zpos);

drivers/gpu/drm/i915/display/i9xx_plane.c

1114

intel_plane_helper_add(plane);

drivers/gpu/drm/i915/display/i9xx_plane.c

1116

return plane;

drivers/gpu/drm/i915/display/i9xx_plane.c

1119

intel_plane_free(plane);

drivers/gpu/drm/i915/display/i9xx_plane.c

1162

struct intel_plane *plane = to_intel_plane(crtc->base.primary);

drivers/gpu/drm/i915/display/i9xx_plane.c

1163

enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;

drivers/gpu/drm/i915/display/i9xx_plane.c

1171

if (!plane->get_hw_state(plane, &pipe))

drivers/gpu/drm/i915/display/i9xx_plane.c

1239

plane->base.base.id, plane->base.name,

drivers/gpu/drm/i915/display/i9xx_plane.c

1250

struct intel_plane *plane = to_intel_plane(crtc->base.primary);

drivers/gpu/drm/i915/display/i9xx_plane.c

1252

to_intel_plane_state(plane->base.state);

drivers/gpu/drm/i915/display/i9xx_plane.c

1253

enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;

drivers/gpu/drm/i915/display/i9xx_plane.c

140

static bool i9xx_plane_has_windowing(struct intel_plane *plane)

drivers/gpu/drm/i915/display/i9xx_plane.c

142

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/i9xx_plane.c

143

enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;

drivers/gpu/drm/i915/display/i9xx_plane.c

230

struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);

drivers/gpu/drm/i915/display/i9xx_plane.c

251

plane->base.base.id, plane->base.name, src_w);

drivers/gpu/drm/i915/display/i9xx_plane.c

275

unsigned int alignment = plane->min_alignment(plane, fb, 0);

drivers/gpu/drm/i915/display/i9xx_plane.c

282

plane->base.base.id, plane->base.name);

drivers/gpu/drm/i915/display/i9xx_plane.c

330

struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);

drivers/gpu/drm/i915/display/i9xx_plane.c

340

i9xx_plane_has_windowing(plane));

drivers/gpu/drm/i915/display/i9xx_plane.c

439

struct intel_plane *plane,

drivers/gpu/drm/i915/display/i9xx_plane.c

443

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/i9xx_plane.c

444

enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;

drivers/gpu/drm/i915/display/i9xx_plane.c

468

struct intel_plane *plane,

drivers/gpu/drm/i915/display/i9xx_plane.c

472

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/i9xx_plane.c

473

enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;

drivers/gpu/drm/i915/display/i9xx_plane.c

481

if (plane->need_async_flip_toggle_wa &&

drivers/gpu/drm/i915/display/i9xx_plane.c

482

crtc_state->async_flip_planes & BIT(plane->id))

drivers/gpu/drm/i915/display/i9xx_plane.c

523

struct intel_plane *plane,

drivers/gpu/drm/i915/display/i9xx_plane.c

533

i9xx_plane_update_noarm(dsb, plane, crtc_state, plane_state);

drivers/gpu/drm/i915/display/i9xx_plane.c

534

i9xx_plane_update_arm(dsb, plane, crtc_state, plane_state);

drivers/gpu/drm/i915/display/i9xx_plane.c

538

struct intel_plane *plane,

drivers/gpu/drm/i915/display/i9xx_plane.c

541

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/i9xx_plane.c

542

enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;

drivers/gpu/drm/i915/display/i9xx_plane.c

566

struct intel_plane *plane,

drivers/gpu/drm/i915/display/i9xx_plane.c

569

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/i9xx_plane.c

570

enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;

drivers/gpu/drm/i915/display/i9xx_plane.c

578

struct intel_plane *plane,

drivers/gpu/drm/i915/display/i9xx_plane.c

581

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/i9xx_plane.c

582

enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;

drivers/gpu/drm/i915/display/i9xx_plane.c

589

struct intel_plane *plane,

drivers/gpu/drm/i915/display/i9xx_plane.c

592

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/i9xx_plane.c

593

enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;

drivers/gpu/drm/i915/display/i9xx_plane.c

601

struct intel_plane *plane,

drivers/gpu/drm/i915/display/i9xx_plane.c

606

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/i9xx_plane.c

608

enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;

drivers/gpu/drm/i915/display/i9xx_plane.c

619

struct intel_plane *plane,

drivers/gpu/drm/i915/display/i9xx_plane.c

624

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/i9xx_plane.c

625

enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;

drivers/gpu/drm/i915/display/i9xx_plane.c

631

bdw_primary_enable_flip_done(struct intel_plane *plane)

drivers/gpu/drm/i915/display/i9xx_plane.c

633

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/i9xx_plane.c

634

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/i9xx_plane.c

642

bdw_primary_disable_flip_done(struct intel_plane *plane)

drivers/gpu/drm/i915/display/i9xx_plane.c

644

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/i9xx_plane.c

645

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/i9xx_plane.c

653

ivb_primary_enable_flip_done(struct intel_plane *plane)

drivers/gpu/drm/i915/display/i9xx_plane.c

655

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/i9xx_plane.c

658

ilk_enable_display_irq(display, DE_PLANE_FLIP_DONE_IVB(plane->i9xx_plane));

drivers/gpu/drm/i915/display/i9xx_plane.c

663

ivb_primary_disable_flip_done(struct intel_plane *plane)

drivers/gpu/drm/i915/display/i9xx_plane.c

665

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/i9xx_plane.c

668

ilk_disable_display_irq(display, DE_PLANE_FLIP_DONE_IVB(plane->i9xx_plane));

drivers/gpu/drm/i915/display/i9xx_plane.c

673

ilk_primary_enable_flip_done(struct intel_plane *plane)

drivers/gpu/drm/i915/display/i9xx_plane.c

675

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/i9xx_plane.c

678

ilk_enable_display_irq(display, DE_PLANE_FLIP_DONE(plane->i9xx_plane));

drivers/gpu/drm/i915/display/i9xx_plane.c

683

ilk_primary_disable_flip_done(struct intel_plane *plane)

drivers/gpu/drm/i915/display/i9xx_plane.c

685

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/i9xx_plane.c

688

ilk_disable_display_irq(display, DE_PLANE_FLIP_DONE(plane->i9xx_plane));

drivers/gpu/drm/i915/display/i9xx_plane.c

693

vlv_primary_enable_flip_done(struct intel_plane *plane)

drivers/gpu/drm/i915/display/i9xx_plane.c

695

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/i9xx_plane.c

696

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/i9xx_plane.c

704

vlv_primary_disable_flip_done(struct intel_plane *plane)

drivers/gpu/drm/i915/display/i9xx_plane.c

706

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/i9xx_plane.c

707

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/i9xx_plane.c

719

static bool i9xx_plane_get_hw_state(struct intel_plane *plane,

drivers/gpu/drm/i915/display/i9xx_plane.c

722

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/i9xx_plane.c

724

enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;

drivers/gpu/drm/i915/display/i9xx_plane.c

734

power_domain = POWER_DOMAIN_PIPE(plane->pipe);

drivers/gpu/drm/i915/display/i9xx_plane.c

744

*pipe = plane->pipe;

drivers/gpu/drm/i915/display/i9xx_plane.c

754

hsw_primary_max_stride(struct intel_plane *plane,

drivers/gpu/drm/i915/display/i9xx_plane.c

765

ilk_primary_max_stride(struct intel_plane *plane,

drivers/gpu/drm/i915/display/i9xx_plane.c

779

i965_plane_max_stride(struct intel_plane *plane,

drivers/gpu/drm/i915/display/i9xx_plane.c

793

i915_plane_max_stride(struct intel_plane *plane,

drivers/gpu/drm/i915/display/i9xx_plane.c

804

i8xx_plane_max_stride(struct intel_plane *plane,

drivers/gpu/drm/i915/display/i9xx_plane.c

808

if (plane->i9xx_plane == PLANE_C)

drivers/gpu/drm/i915/display/i9xx_plane.c

814

unsigned int vlv_plane_min_alignment(struct intel_plane *plane,

drivers/gpu/drm/i915/display/i9xx_plane.c

818

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/i9xx_plane.c

820

if (intel_plane_can_async_flip(plane, fb->format, fb->modifier))

drivers/gpu/drm/i915/display/i9xx_plane.c

838

static unsigned int g4x_primary_min_alignment(struct intel_plane *plane,

drivers/gpu/drm/i915/display/i9xx_plane.c

842

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/i9xx_plane.c

844

if (intel_plane_can_async_flip(plane, fb->format, fb->modifier))

drivers/gpu/drm/i915/display/i9xx_plane.c

860

static unsigned int i965_plane_min_alignment(struct intel_plane *plane,

drivers/gpu/drm/i915/display/i9xx_plane.c

875

static unsigned int i9xx_plane_min_alignment(struct intel_plane *plane,

drivers/gpu/drm/i915/display/i9xx_plane.c

902

static void i9xx_disable_tiling(struct intel_plane *plane)

drivers/gpu/drm/i915/display/i9xx_plane.c

904

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/i9xx_plane.c

905

enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;

drivers/gpu/drm/i915/display/i9xx_plane.c

926

struct intel_plane *plane;

drivers/gpu/drm/i915/display/i9xx_plane.c

934

plane = intel_plane_alloc();

drivers/gpu/drm/i915/display/i9xx_plane.c

935

if (IS_ERR(plane))

drivers/gpu/drm/i915/display/i9xx_plane.c

936

return plane;

drivers/gpu/drm/i915/display/i9xx_plane.c

938

plane->pipe = pipe;

drivers/gpu/drm/i915/display/i9xx_plane.c

945

plane->i9xx_plane = (enum i9xx_plane_id) !pipe;

drivers/gpu/drm/i915/display/i9xx_plane.c

947

plane->i9xx_plane = (enum i9xx_plane_id) pipe;

drivers/gpu/drm/i915/display/i9xx_plane.c

948

plane->id = PLANE_PRIMARY;

drivers/gpu/drm/i915/display/i9xx_plane.c

949

plane->frontbuffer_bit = INTEL_FRONTBUFFER(pipe, plane->id);

drivers/gpu/drm/i915/display/i9xx_plane.c

951

intel_fbc_add_plane(i9xx_plane_fbc(display, plane->i9xx_plane), plane);

drivers/gpu/drm/i915/display/i9xx_plane.c

988

plane->min_cdclk = vlv_plane_min_cdclk;

drivers/gpu/drm/i915/display/i9xx_plane.c

990

plane->min_cdclk = hsw_plane_min_cdclk;

drivers/gpu/drm/i915/display/i9xx_plane.c

992

plane->min_cdclk = ivb_plane_min_cdclk;

drivers/gpu/drm/i915/display/i9xx_plane.c

994

plane->min_cdclk = i9xx_plane_min_cdclk;

drivers/gpu/drm/i915/display/i9xx_plane.c

998

plane->max_stride = i965_plane_max_stride;

drivers/gpu/drm/i915/display/i9xx_plane.h

21

unsigned int i965_plane_max_stride(struct intel_plane *plane,

drivers/gpu/drm/i915/display/i9xx_plane.h

24

unsigned int vlv_plane_min_alignment(struct intel_plane *plane,

drivers/gpu/drm/i915/display/i9xx_plane.h

38

static inline unsigned int i965_plane_max_stride(struct intel_plane *plane,

drivers/gpu/drm/i915/display/i9xx_plane_regs.h

100

#define PRIMSIZE(dev_priv, plane) _MMIO_TRANS2(dev_priv, plane, _PRIMSIZE_A)

drivers/gpu/drm/i915/display/i9xx_plane_regs.h

107

#define PRIMCNSTALPHA(dev_priv, plane) _MMIO_TRANS2(dev_priv, plane, _PRIMCNSTALPHA_A)

drivers/gpu/drm/i915/display/i9xx_plane_regs.h

12

#define DSPADDR_VLV(dev_priv, plane) _MMIO_PIPE2(dev_priv, plane, _DSPAADDR_VLV)

drivers/gpu/drm/i915/display/i9xx_plane_regs.h

15

#define DSPCNTR(dev_priv, plane) _MMIO_PIPE2(dev_priv, plane, _DSPACNTR)

drivers/gpu/drm/i915/display/i9xx_plane_regs.h

49

#define DSPADDR(dev_priv, plane) _MMIO_PIPE2(dev_priv, plane, _DSPAADDR)

drivers/gpu/drm/i915/display/i9xx_plane_regs.h

52

#define DSPLINOFF(dev_priv, plane) _MMIO_PIPE2(dev_priv, plane, _DSPALINOFF)

drivers/gpu/drm/i915/display/i9xx_plane_regs.h

55

#define DSPSTRIDE(dev_priv, plane) _MMIO_PIPE2(dev_priv, plane, _DSPASTRIDE)

drivers/gpu/drm/i915/display/i9xx_plane_regs.h

58

#define DSPPOS(dev_priv, plane) _MMIO_PIPE2(dev_priv, plane, _DSPAPOS)

drivers/gpu/drm/i915/display/i9xx_plane_regs.h

65

#define DSPSIZE(dev_priv, plane) _MMIO_PIPE2(dev_priv, plane, _DSPASIZE)

drivers/gpu/drm/i915/display/i9xx_plane_regs.h

72

#define DSPSURF(dev_priv, plane) _MMIO_PIPE2(dev_priv, plane, _DSPASURF)

drivers/gpu/drm/i915/display/i9xx_plane_regs.h

76

#define DSPTILEOFF(dev_priv, plane) _MMIO_PIPE2(dev_priv, plane, _DSPATILEOFF)

drivers/gpu/drm/i915/display/i9xx_plane_regs.h

83

#define DSPOFFSET(dev_priv, plane) _MMIO_PIPE2(dev_priv, plane, _DSPAOFFSET)

drivers/gpu/drm/i915/display/i9xx_plane_regs.h

86

#define DSPSURFLIVE(dev_priv, plane) _MMIO_PIPE2(dev_priv, plane, _DSPASURFLIVE)

drivers/gpu/drm/i915/display/i9xx_plane_regs.h

89

#define DSPGAMC(dev_priv, plane, i) _MMIO_PIPE2(dev_priv, plane, _DSPAGAMC + (5 - (i)) * 4) /* plane C only, 6 x u0.8 */

drivers/gpu/drm/i915/display/i9xx_plane_regs.h

93

#define PRIMPOS(dev_priv, plane) _MMIO_TRANS2(dev_priv, plane, _PRIMPOS_A)

drivers/gpu/drm/i915/display/i9xx_wm.c

1002

if (plane->id == PLANE_CURSOR) {

drivers/gpu/drm/i915/display/i9xx_wm.c

1004

} else if (plane->id == PLANE_PRIMARY &&

drivers/gpu/drm/i915/display/i9xx_wm.c

1016

wm += g4x_tlb_miss_wa(g4x_plane_fifo_size(plane->id, level),

drivers/gpu/drm/i915/display/i9xx_wm.c

1033

dirty |= raw->plane[plane_id] != value;

drivers/gpu/drm/i915/display/i9xx_wm.c

1034

raw->plane[plane_id] = value;

drivers/gpu/drm/i915/display/i9xx_wm.c

1067

struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);

drivers/gpu/drm/i915/display/i9xx_wm.c

1068

enum plane_id plane_id = plane->id;

drivers/gpu/drm/i915/display/i9xx_wm.c

1089

dirty |= raw->plane[plane_id] != wm;

drivers/gpu/drm/i915/display/i9xx_wm.c

1090

raw->plane[plane_id] = wm;

drivers/gpu/drm/i915/display/i9xx_wm.c

1097

raw->plane[plane_id]);

drivers/gpu/drm/i915/display/i9xx_wm.c

1121

plane->base.name,

drivers/gpu/drm/i915/display/i9xx_wm.c

1122

crtc_state->wm.g4x.raw[G4X_WM_LEVEL_NORMAL].plane[plane_id],

drivers/gpu/drm/i915/display/i9xx_wm.c

1123

crtc_state->wm.g4x.raw[G4X_WM_LEVEL_SR].plane[plane_id],

drivers/gpu/drm/i915/display/i9xx_wm.c

1124

crtc_state->wm.g4x.raw[G4X_WM_LEVEL_HPLL].plane[plane_id]);

drivers/gpu/drm/i915/display/i9xx_wm.c

1141

return raw->plane[plane_id] <= g4x_plane_fifo_size(plane_id, level);

drivers/gpu/drm/i915/display/i9xx_wm.c

1165

wm_state->wm.plane[plane_id] = USHRT_MAX;

drivers/gpu/drm/i915/display/i9xx_wm.c

1171

wm_state->sr.plane = USHRT_MAX;

drivers/gpu/drm/i915/display/i9xx_wm.c

1178

wm_state->hpll.plane = USHRT_MAX;

drivers/gpu/drm/i915/display/i9xx_wm.c

1215

wm_state->wm.plane[plane_id] = raw->plane[plane_id];

drivers/gpu/drm/i915/display/i9xx_wm.c

1222

wm_state->sr.plane = raw->plane[PLANE_PRIMARY];

drivers/gpu/drm/i915/display/i9xx_wm.c

1223

wm_state->sr.cursor = raw->plane[PLANE_CURSOR];

drivers/gpu/drm/i915/display/i9xx_wm.c

1233

wm_state->hpll.plane = raw->plane[PLANE_PRIMARY];

drivers/gpu/drm/i915/display/i9xx_wm.c

1234

wm_state->hpll.cursor = raw->plane[PLANE_CURSOR];

drivers/gpu/drm/i915/display/i9xx_wm.c

1267

struct intel_plane *plane;

drivers/gpu/drm/i915/display/i9xx_wm.c

1271

for_each_oldnew_intel_plane_in_state(state, plane,

drivers/gpu/drm/i915/display/i9xx_wm.c

1279

dirty |= BIT(plane->id);

drivers/gpu/drm/i915/display/i9xx_wm.c

1317

intermediate->wm.plane[plane_id] =

drivers/gpu/drm/i915/display/i9xx_wm.c

1318

max(optimal->wm.plane[plane_id],

drivers/gpu/drm/i915/display/i9xx_wm.c

1319

active->wm.plane[plane_id]);

drivers/gpu/drm/i915/display/i9xx_wm.c

1321

drm_WARN_ON(display->drm, intermediate->wm.plane[plane_id] >

drivers/gpu/drm/i915/display/i9xx_wm.c

1325

intermediate->sr.plane = max(optimal->sr.plane,

drivers/gpu/drm/i915/display/i9xx_wm.c

1326

active->sr.plane);

drivers/gpu/drm/i915/display/i9xx_wm.c

1332

intermediate->hpll.plane = max(optimal->hpll.plane,

drivers/gpu/drm/i915/display/i9xx_wm.c

1333

active->hpll.plane);

drivers/gpu/drm/i915/display/i9xx_wm.c

1340

(intermediate->sr.plane >

drivers/gpu/drm/i915/display/i9xx_wm.c

1346

(intermediate->sr.plane >

drivers/gpu/drm/i915/display/i9xx_wm.c

1516

struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);

drivers/gpu/drm/i915/display/i9xx_wm.c

1532

if (plane->id == PLANE_CURSOR) {

drivers/gpu/drm/i915/display/i9xx_wm.c

158

#define FW_WM(value, plane) \

drivers/gpu/drm/i915/display/i9xx_wm.c

1580

total_rate = raw->plane[PLANE_PRIMARY] +

drivers/gpu/drm/i915/display/i9xx_wm.c

1581

raw->plane[PLANE_SPRITE0] +

drivers/gpu/drm/i915/display/i9xx_wm.c

1582

raw->plane[PLANE_SPRITE1] +

drivers/gpu/drm/i915/display/i9xx_wm.c

159

(((value) << DSPFW_ ## plane ## _SHIFT) & DSPFW_ ## plane ## _MASK)

drivers/gpu/drm/i915/display/i9xx_wm.c

1595

fifo_state->plane[plane_id] = 0;

drivers/gpu/drm/i915/display/i9xx_wm.c

1599

rate = raw->plane[plane_id];

drivers/gpu/drm/i915/display/i9xx_wm.c

1600

fifo_state->plane[plane_id] = fifo_size * rate / total_rate;

drivers/gpu/drm/i915/display/i9xx_wm.c

1601

fifo_left -= fifo_state->plane[plane_id];

drivers/gpu/drm/i915/display/i9xx_wm.c

1604

fifo_state->plane[PLANE_SPRITE0] += sprite0_fifo_extra;

drivers/gpu/drm/i915/display/i9xx_wm.c

1607

fifo_state->plane[PLANE_CURSOR] = 63;

drivers/gpu/drm/i915/display/i9xx_wm.c

1622

fifo_state->plane[plane_id] += plane_extra;

drivers/gpu/drm/i915/display/i9xx_wm.c

1631

fifo_state->plane[PLANE_PRIMARY] = fifo_left;

drivers/gpu/drm/i915/display/i9xx_wm.c

1647

wm_state->wm[level].plane[plane_id] = USHRT_MAX;

drivers/gpu/drm/i915/display/i9xx_wm.c

1650

wm_state->sr[level].plane = USHRT_MAX;

drivers/gpu/drm/i915/display/i9xx_wm.c

1675

dirty |= raw->plane[plane_id] != value;

drivers/gpu/drm/i915/display/i9xx_wm.c

1676

raw->plane[plane_id] = value;

drivers/gpu/drm/i915/display/i9xx_wm.c

1686

struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);

drivers/gpu/drm/i915/display/i9xx_wm.c

1687

enum plane_id plane_id = plane->id;

drivers/gpu/drm/i915/display/i9xx_wm.c

1704

dirty |= raw->plane[plane_id] != wm;

drivers/gpu/drm/i915/display/i9xx_wm.c

1705

raw->plane[plane_id] = wm;

drivers/gpu/drm/i915/display/i9xx_wm.c

1715

plane->base.name,

drivers/gpu/drm/i915/display/i9xx_wm.c

1716

crtc_state->wm.vlv.raw[VLV_WM_LEVEL_PM2].plane[plane_id],

drivers/gpu/drm/i915/display/i9xx_wm.c

1717

crtc_state->wm.vlv.raw[VLV_WM_LEVEL_PM5].plane[plane_id],

drivers/gpu/drm/i915/display/i9xx_wm.c

1718

crtc_state->wm.vlv.raw[VLV_WM_LEVEL_DDR_DVFS].plane[plane_id]);

drivers/gpu/drm/i915/display/i9xx_wm.c

1731

return raw->plane[plane_id] <= fifo_state->plane[plane_id];

drivers/gpu/drm/i915/display/i9xx_wm.c

1771

wm_state->wm[level].plane[plane_id] =

drivers/gpu/drm/i915/display/i9xx_wm.c

1772

vlv_invert_wm_value(raw->plane[plane_id],

drivers/gpu/drm/i915/display/i9xx_wm.c

1773

fifo_state->plane[plane_id]);

drivers/gpu/drm/i915/display/i9xx_wm.c

1776

wm_state->sr[level].plane =

drivers/gpu/drm/i915/display/i9xx_wm.c

1777

vlv_invert_wm_value(max3(raw->plane[PLANE_PRIMARY],

drivers/gpu/drm/i915/display/i9xx_wm.c

1778

raw->plane[PLANE_SPRITE0],

drivers/gpu/drm/i915/display/i9xx_wm.c

1779

raw->plane[PLANE_SPRITE1]),

drivers/gpu/drm/i915/display/i9xx_wm.c

1783

vlv_invert_wm_value(raw->plane[PLANE_CURSOR],

drivers/gpu/drm/i915/display/i9xx_wm.c

1806

struct intel_plane *plane;

drivers/gpu/drm/i915/display/i9xx_wm.c

1810

for_each_oldnew_intel_plane_in_state(state, plane,

drivers/gpu/drm/i915/display/i9xx_wm.c

1818

dirty |= BIT(plane->id);

drivers/gpu/drm/i915/display/i9xx_wm.c

1859

#define VLV_FIFO(plane, value) \

drivers/gpu/drm/i915/display/i9xx_wm.c

1860

(((value) << DSPARB_ ## plane ## _SHIFT_VLV) & DSPARB_ ## plane ## _MASK_VLV)

drivers/gpu/drm/i915/display/i9xx_wm.c

1877

sprite0_start = fifo_state->plane[PLANE_PRIMARY];

drivers/gpu/drm/i915/display/i9xx_wm.c

1878

sprite1_start = fifo_state->plane[PLANE_SPRITE0] + sprite0_start;

drivers/gpu/drm/i915/display/i9xx_wm.c

1879

fifo_size = fifo_state->plane[PLANE_SPRITE1] + sprite1_start;

drivers/gpu/drm/i915/display/i9xx_wm.c

1881

drm_WARN_ON(display->drm, fifo_state->plane[PLANE_CURSOR] != 63);

drivers/gpu/drm/i915/display/i9xx_wm.c

1988

intermediate->wm[level].plane[plane_id] =

drivers/gpu/drm/i915/display/i9xx_wm.c

1989

min(optimal->wm[level].plane[plane_id],

drivers/gpu/drm/i915/display/i9xx_wm.c

1990

active->wm[level].plane[plane_id]);

drivers/gpu/drm/i915/display/i9xx_wm.c

1993

intermediate->sr[level].plane = min(optimal->sr[level].plane,

drivers/gpu/drm/i915/display/i9xx_wm.c

1994

active->sr[level].plane);

drivers/gpu/drm/i915/display/i9xx_wm.c

2064

wm->ddl[pipe].plane[PLANE_PRIMARY] = DDL_PRECISION_HIGH | 2;

drivers/gpu/drm/i915/display/i9xx_wm.c

2065

wm->ddl[pipe].plane[PLANE_SPRITE0] = DDL_PRECISION_HIGH | 2;

drivers/gpu/drm/i915/display/i9xx_wm.c

2066

wm->ddl[pipe].plane[PLANE_SPRITE1] = DDL_PRECISION_HIGH | 2;

drivers/gpu/drm/i915/display/i9xx_wm.c

2067

wm->ddl[pipe].plane[PLANE_CURSOR] = DDL_PRECISION_HIGH | 2;

drivers/gpu/drm/i915/display/i9xx_wm.c

2214

struct intel_plane *plane;

drivers/gpu/drm/i915/display/i9xx_wm.c

2216

for_each_intel_plane(display->drm, plane) {

drivers/gpu/drm/i915/display/i9xx_wm.c

2217

if (plane->id == PLANE_PRIMARY &&

drivers/gpu/drm/i915/display/i9xx_wm.c

2218

plane->i9xx_plane == i9xx_plane)

drivers/gpu/drm/i915/display/i9xx_wm.c

2219

return intel_crtc_for_pipe(display, plane->pipe);

drivers/gpu/drm/i915/display/i9xx_wm.c

2925

struct intel_plane *plane;

drivers/gpu/drm/i915/display/i9xx_wm.c

2935

intel_atomic_crtc_state_for_each_plane_state(plane, plane_state, crtc_state) {

drivers/gpu/drm/i915/display/i9xx_wm.c

2936

if (plane->base.type == DRM_PLANE_TYPE_PRIMARY)

drivers/gpu/drm/i915/display/i9xx_wm.c

2938

else if (plane->base.type == DRM_PLANE_TYPE_OVERLAY)

drivers/gpu/drm/i915/display/i9xx_wm.c

2940

else if (plane->base.type == DRM_PLANE_TYPE_CURSOR)

drivers/gpu/drm/i915/display/i9xx_wm.c

317

fifo_state->plane[PLANE_PRIMARY] = sprite0_start;

drivers/gpu/drm/i915/display/i9xx_wm.c

318

fifo_state->plane[PLANE_SPRITE0] = sprite1_start - sprite0_start;

drivers/gpu/drm/i915/display/i9xx_wm.c

319

fifo_state->plane[PLANE_SPRITE1] = 511 - sprite1_start;

drivers/gpu/drm/i915/display/i9xx_wm.c

320

fifo_state->plane[PLANE_CURSOR] = 63;

drivers/gpu/drm/i915/display/i9xx_wm.c

3537

struct drm_plane *plane;

drivers/gpu/drm/i915/display/i9xx_wm.c

3556

drm_for_each_plane(plane, state->dev) {

drivers/gpu/drm/i915/display/i9xx_wm.c

3559

plane_state = drm_atomic_get_plane_state(state, plane);

drivers/gpu/drm/i915/display/i9xx_wm.c

3656

#define _FW_WM(value, plane) \

drivers/gpu/drm/i915/display/i9xx_wm.c

3657

(((value) & DSPFW_ ## plane ## _MASK) >> DSPFW_ ## plane ## _SHIFT)

drivers/gpu/drm/i915/display/i9xx_wm.c

3658

#define _FW_WM_VLV(value, plane) \

drivers/gpu/drm/i915/display/i9xx_wm.c

3659

(((value) & DSPFW_ ## plane ## _MASK_VLV) >> DSPFW_ ## plane ## _SHIFT)

drivers/gpu/drm/i915/display/i9xx_wm.c

3667

wm->sr.plane = _FW_WM(tmp, SR);

drivers/gpu/drm/i915/display/i9xx_wm.c

3668

wm->pipe[PIPE_B].plane[PLANE_CURSOR] = _FW_WM(tmp, CURSORB);

drivers/gpu/drm/i915/display/i9xx_wm.c

3669

wm->pipe[PIPE_B].plane[PLANE_PRIMARY] = _FW_WM(tmp, PLANEB);

drivers/gpu/drm/i915/display/i9xx_wm.c

3670

wm->pipe[PIPE_A].plane[PLANE_PRIMARY] = _FW_WM(tmp, PLANEA);

drivers/gpu/drm/i915/display/i9xx_wm.c

3676

wm->pipe[PIPE_B].plane[PLANE_SPRITE0] = _FW_WM(tmp, SPRITEB);

drivers/gpu/drm/i915/display/i9xx_wm.c

3677

wm->pipe[PIPE_A].plane[PLANE_CURSOR] = _FW_WM(tmp, CURSORA);

drivers/gpu/drm/i915/display/i9xx_wm.c

3678

wm->pipe[PIPE_A].plane[PLANE_SPRITE0] = _FW_WM(tmp, SPRITEA);

drivers/gpu/drm/i915/display/i9xx_wm.c

3684

wm->hpll.plane = _FW_WM(tmp, HPLL_SR);

drivers/gpu/drm/i915/display/i9xx_wm.c

3696

wm->ddl[pipe].plane[PLANE_PRIMARY] =

drivers/gpu/drm/i915/display/i9xx_wm.c

3698

wm->ddl[pipe].plane[PLANE_CURSOR] =

drivers/gpu/drm/i915/display/i9xx_wm.c

3700

wm->ddl[pipe].plane[PLANE_SPRITE0] =

drivers/gpu/drm/i915/display/i9xx_wm.c

3702

wm->ddl[pipe].plane[PLANE_SPRITE1] =

drivers/gpu/drm/i915/display/i9xx_wm.c

3707

wm->sr.plane = _FW_WM(tmp, SR);

drivers/gpu/drm/i915/display/i9xx_wm.c

3708

wm->pipe[PIPE_B].plane[PLANE_CURSOR] = _FW_WM(tmp, CURSORB);

drivers/gpu/drm/i915/display/i9xx_wm.c

3709

wm->pipe[PIPE_B].plane[PLANE_PRIMARY] = _FW_WM_VLV(tmp, PLANEB);

drivers/gpu/drm/i915/display/i9xx_wm.c

3710

wm->pipe[PIPE_A].plane[PLANE_PRIMARY] = _FW_WM_VLV(tmp, PLANEA);

drivers/gpu/drm/i915/display/i9xx_wm.c

3713

wm->pipe[PIPE_A].plane[PLANE_SPRITE1] = _FW_WM_VLV(tmp, SPRITEB);

drivers/gpu/drm/i915/display/i9xx_wm.c

3714

wm->pipe[PIPE_A].plane[PLANE_CURSOR] = _FW_WM(tmp, CURSORA);

drivers/gpu/drm/i915/display/i9xx_wm.c

3715

wm->pipe[PIPE_A].plane[PLANE_SPRITE0] = _FW_WM_VLV(tmp, SPRITEA);

drivers/gpu/drm/i915/display/i9xx_wm.c

3722

wm->pipe[PIPE_B].plane[PLANE_SPRITE1] = _FW_WM_VLV(tmp, SPRITED);

drivers/gpu/drm/i915/display/i9xx_wm.c

3723

wm->pipe[PIPE_B].plane[PLANE_SPRITE0] = _FW_WM_VLV(tmp, SPRITEC);

drivers/gpu/drm/i915/display/i9xx_wm.c

3726

wm->pipe[PIPE_C].plane[PLANE_SPRITE1] = _FW_WM_VLV(tmp, SPRITEF);

drivers/gpu/drm/i915/display/i9xx_wm.c

3727

wm->pipe[PIPE_C].plane[PLANE_SPRITE0] = _FW_WM_VLV(tmp, SPRITEE);

drivers/gpu/drm/i915/display/i9xx_wm.c

3730

wm->pipe[PIPE_C].plane[PLANE_PRIMARY] = _FW_WM_VLV(tmp, PLANEC);

drivers/gpu/drm/i915/display/i9xx_wm.c

3731

wm->pipe[PIPE_C].plane[PLANE_CURSOR] = _FW_WM(tmp, CURSORC);

drivers/gpu/drm/i915/display/i9xx_wm.c

3734

wm->sr.plane |= _FW_WM(tmp, SR_HI) << 9;

drivers/gpu/drm/i915/display/i9xx_wm.c

3735

wm->pipe[PIPE_C].plane[PLANE_SPRITE1] |= _FW_WM(tmp, SPRITEF_HI) << 8;

drivers/gpu/drm/i915/display/i9xx_wm.c

3736

wm->pipe[PIPE_C].plane[PLANE_SPRITE0] |= _FW_WM(tmp, SPRITEE_HI) << 8;

drivers/gpu/drm/i915/display/i9xx_wm.c

3737

wm->pipe[PIPE_C].plane[PLANE_PRIMARY] |= _FW_WM(tmp, PLANEC_HI) << 8;

drivers/gpu/drm/i915/display/i9xx_wm.c

3738

wm->pipe[PIPE_B].plane[PLANE_SPRITE1] |= _FW_WM(tmp, SPRITED_HI) << 8;

drivers/gpu/drm/i915/display/i9xx_wm.c

3739

wm->pipe[PIPE_B].plane[PLANE_SPRITE0] |= _FW_WM(tmp, SPRITEC_HI) << 8;

drivers/gpu/drm/i915/display/i9xx_wm.c

3740

wm->pipe[PIPE_B].plane[PLANE_PRIMARY] |= _FW_WM(tmp, PLANEB_HI) << 8;

drivers/gpu/drm/i915/display/i9xx_wm.c

3741

wm->pipe[PIPE_A].plane[PLANE_SPRITE1] |= _FW_WM(tmp, SPRITEB_HI) << 8;

drivers/gpu/drm/i915/display/i9xx_wm.c

3742

wm->pipe[PIPE_A].plane[PLANE_SPRITE0] |= _FW_WM(tmp, SPRITEA_HI) << 8;

drivers/gpu/drm/i915/display/i9xx_wm.c

3743

wm->pipe[PIPE_A].plane[PLANE_PRIMARY] |= _FW_WM(tmp, PLANEA_HI) << 8;

drivers/gpu/drm/i915/display/i9xx_wm.c

3746

wm->pipe[PIPE_B].plane[PLANE_SPRITE1] = _FW_WM_VLV(tmp, SPRITED);

drivers/gpu/drm/i915/display/i9xx_wm.c

3747

wm->pipe[PIPE_B].plane[PLANE_SPRITE0] = _FW_WM_VLV(tmp, SPRITEC);

drivers/gpu/drm/i915/display/i9xx_wm.c

3750

wm->sr.plane |= _FW_WM(tmp, SR_HI) << 9;

drivers/gpu/drm/i915/display/i9xx_wm.c

3751

wm->pipe[PIPE_B].plane[PLANE_SPRITE1] |= _FW_WM(tmp, SPRITED_HI) << 8;

drivers/gpu/drm/i915/display/i9xx_wm.c

3752

wm->pipe[PIPE_B].plane[PLANE_SPRITE0] |= _FW_WM(tmp, SPRITEC_HI) << 8;

drivers/gpu/drm/i915/display/i9xx_wm.c

3753

wm->pipe[PIPE_B].plane[PLANE_PRIMARY] |= _FW_WM(tmp, PLANEB_HI) << 8;

drivers/gpu/drm/i915/display/i9xx_wm.c

3754

wm->pipe[PIPE_A].plane[PLANE_SPRITE1] |= _FW_WM(tmp, SPRITEB_HI) << 8;

drivers/gpu/drm/i915/display/i9xx_wm.c

3755

wm->pipe[PIPE_A].plane[PLANE_SPRITE0] |= _FW_WM(tmp, SPRITEA_HI) << 8;

drivers/gpu/drm/i915/display/i9xx_wm.c

3756

wm->pipe[PIPE_A].plane[PLANE_PRIMARY] |= _FW_WM(tmp, PLANEA_HI) << 8;

drivers/gpu/drm/i915/display/i9xx_wm.c

3789

active->wm.plane[plane_id] =

drivers/gpu/drm/i915/display/i9xx_wm.c

3790

wm->pipe[pipe].plane[plane_id];

drivers/gpu/drm/i915/display/i9xx_wm.c

3803

raw->plane[plane_id] = active->wm.plane[plane_id];

drivers/gpu/drm/i915/display/i9xx_wm.c

3810

raw->plane[PLANE_PRIMARY] = active->sr.plane;

drivers/gpu/drm/i915/display/i9xx_wm.c

3811

raw->plane[PLANE_CURSOR] = active->sr.cursor;

drivers/gpu/drm/i915/display/i9xx_wm.c

3812

raw->plane[PLANE_SPRITE0] = 0;

drivers/gpu/drm/i915/display/i9xx_wm.c

3820

raw->plane[PLANE_PRIMARY] = active->hpll.plane;

drivers/gpu/drm/i915/display/i9xx_wm.c

3821

raw->plane[PLANE_CURSOR] = active->hpll.cursor;

drivers/gpu/drm/i915/display/i9xx_wm.c

3822

raw->plane[PLANE_SPRITE0] = 0;

drivers/gpu/drm/i915/display/i9xx_wm.c

3840

wm->pipe[pipe].plane[PLANE_PRIMARY],

drivers/gpu/drm/i915/display/i9xx_wm.c

3841

wm->pipe[pipe].plane[PLANE_CURSOR],

drivers/gpu/drm/i915/display/i9xx_wm.c

3842

wm->pipe[pipe].plane[PLANE_SPRITE0]);

drivers/gpu/drm/i915/display/i9xx_wm.c

3847

wm->sr.plane, wm->sr.cursor, wm->sr.fbc);

drivers/gpu/drm/i915/display/i9xx_wm.c

3850

wm->hpll.plane, wm->hpll.cursor, wm->hpll.fbc);

drivers/gpu/drm/i915/display/i9xx_wm.c

3858

struct intel_plane *plane;

drivers/gpu/drm/i915/display/i9xx_wm.c

3863

for_each_intel_plane(display->drm, plane) {

drivers/gpu/drm/i915/display/i9xx_wm.c

3865

intel_crtc_for_pipe(display, plane->pipe);

drivers/gpu/drm/i915/display/i9xx_wm.c

3869

to_intel_plane_state(plane->base.state);

drivers/gpu/drm/i915/display/i9xx_wm.c

3870

enum plane_id plane_id = plane->id;

drivers/gpu/drm/i915/display/i9xx_wm.c

3880

raw->plane[plane_id] = 0;

drivers/gpu/drm/i915/display/i9xx_wm.c

3973

active->sr[level].plane = wm->sr.plane;

drivers/gpu/drm/i915/display/i9xx_wm.c

3977

active->wm[level].plane[plane_id] =

drivers/gpu/drm/i915/display/i9xx_wm.c

3978

wm->pipe[pipe].plane[plane_id];

drivers/gpu/drm/i915/display/i9xx_wm.c

3980

raw->plane[plane_id] =

drivers/gpu/drm/i915/display/i9xx_wm.c

3981

vlv_invert_wm_value(active->wm[level].plane[plane_id],

drivers/gpu/drm/i915/display/i9xx_wm.c

3982

fifo_state->plane[plane_id]);

drivers/gpu/drm/i915/display/i9xx_wm.c

3997

wm->pipe[pipe].plane[PLANE_PRIMARY],

drivers/gpu/drm/i915/display/i9xx_wm.c

3998

wm->pipe[pipe].plane[PLANE_CURSOR],

drivers/gpu/drm/i915/display/i9xx_wm.c

3999

wm->pipe[pipe].plane[PLANE_SPRITE0],

drivers/gpu/drm/i915/display/i9xx_wm.c

4000

wm->pipe[pipe].plane[PLANE_SPRITE1]);

drivers/gpu/drm/i915/display/i9xx_wm.c

4005

wm->sr.plane, wm->sr.cursor, wm->level, wm->cxsr);

drivers/gpu/drm/i915/display/i9xx_wm.c

4010

struct intel_plane *plane;

drivers/gpu/drm/i915/display/i9xx_wm.c

4015

for_each_intel_plane(display->drm, plane) {

drivers/gpu/drm/i915/display/i9xx_wm.c

4017

intel_crtc_for_pipe(display, plane->pipe);

drivers/gpu/drm/i915/display/i9xx_wm.c

4021

to_intel_plane_state(plane->base.state);

drivers/gpu/drm/i915/display/i9xx_wm.c

4022

enum plane_id plane_id = plane->id;

drivers/gpu/drm/i915/display/i9xx_wm.c

4032

raw->plane[plane_id] = 0;

drivers/gpu/drm/i915/display/i9xx_wm.c

775

struct intel_plane *plane;

drivers/gpu/drm/i915/display/i9xx_wm.c

778

for_each_oldnew_intel_plane_in_state(state, plane, old_plane_state,

drivers/gpu/drm/i915/display/i9xx_wm.c

780

if (plane->pipe != crtc->pipe)

drivers/gpu/drm/i915/display/i9xx_wm.c

815

FW_WM(wm->sr.plane, SR) |

drivers/gpu/drm/i915/display/i9xx_wm.c

816

FW_WM(wm->pipe[PIPE_B].plane[PLANE_CURSOR], CURSORB) |

drivers/gpu/drm/i915/display/i9xx_wm.c

817

FW_WM(wm->pipe[PIPE_B].plane[PLANE_PRIMARY], PLANEB) |

drivers/gpu/drm/i915/display/i9xx_wm.c

818

FW_WM(wm->pipe[PIPE_A].plane[PLANE_PRIMARY], PLANEA));

drivers/gpu/drm/i915/display/i9xx_wm.c

823

FW_WM(wm->pipe[PIPE_B].plane[PLANE_SPRITE0], SPRITEB) |

drivers/gpu/drm/i915/display/i9xx_wm.c

824

FW_WM(wm->pipe[PIPE_A].plane[PLANE_CURSOR], CURSORA) |

drivers/gpu/drm/i915/display/i9xx_wm.c

825

FW_WM(wm->pipe[PIPE_A].plane[PLANE_SPRITE0], SPRITEA));

drivers/gpu/drm/i915/display/i9xx_wm.c

830

FW_WM(wm->hpll.plane, HPLL_SR));

drivers/gpu/drm/i915/display/i9xx_wm.c

835

#define FW_WM_VLV(value, plane) \

drivers/gpu/drm/i915/display/i9xx_wm.c

836

(((value) << DSPFW_ ## plane ## _SHIFT) & DSPFW_ ## plane ## _MASK_VLV)

drivers/gpu/drm/i915/display/i9xx_wm.c

847

(wm->ddl[pipe].plane[PLANE_CURSOR] << DDL_CURSOR_SHIFT) |

drivers/gpu/drm/i915/display/i9xx_wm.c

848

(wm->ddl[pipe].plane[PLANE_SPRITE1] << DDL_SPRITE_SHIFT(1)) |

drivers/gpu/drm/i915/display/i9xx_wm.c

849

(wm->ddl[pipe].plane[PLANE_SPRITE0] << DDL_SPRITE_SHIFT(0)) |

drivers/gpu/drm/i915/display/i9xx_wm.c

850

(wm->ddl[pipe].plane[PLANE_PRIMARY] << DDL_PLANE_SHIFT));

drivers/gpu/drm/i915/display/i9xx_wm.c

865

FW_WM(wm->sr.plane, SR) |

drivers/gpu/drm/i915/display/i9xx_wm.c

866

FW_WM(wm->pipe[PIPE_B].plane[PLANE_CURSOR], CURSORB) |

drivers/gpu/drm/i915/display/i9xx_wm.c

867

FW_WM_VLV(wm->pipe[PIPE_B].plane[PLANE_PRIMARY], PLANEB) |

drivers/gpu/drm/i915/display/i9xx_wm.c

868

FW_WM_VLV(wm->pipe[PIPE_A].plane[PLANE_PRIMARY], PLANEA));

drivers/gpu/drm/i915/display/i9xx_wm.c

870

FW_WM_VLV(wm->pipe[PIPE_A].plane[PLANE_SPRITE1], SPRITEB) |

drivers/gpu/drm/i915/display/i9xx_wm.c

871

FW_WM(wm->pipe[PIPE_A].plane[PLANE_CURSOR], CURSORA) |

drivers/gpu/drm/i915/display/i9xx_wm.c

872

FW_WM_VLV(wm->pipe[PIPE_A].plane[PLANE_SPRITE0], SPRITEA));

drivers/gpu/drm/i915/display/i9xx_wm.c

878

FW_WM_VLV(wm->pipe[PIPE_B].plane[PLANE_SPRITE1], SPRITED) |

drivers/gpu/drm/i915/display/i9xx_wm.c

879

FW_WM_VLV(wm->pipe[PIPE_B].plane[PLANE_SPRITE0], SPRITEC));

drivers/gpu/drm/i915/display/i9xx_wm.c

881

FW_WM_VLV(wm->pipe[PIPE_C].plane[PLANE_SPRITE1], SPRITEF) |

drivers/gpu/drm/i915/display/i9xx_wm.c

882

FW_WM_VLV(wm->pipe[PIPE_C].plane[PLANE_SPRITE0], SPRITEE));

drivers/gpu/drm/i915/display/i9xx_wm.c

884

FW_WM_VLV(wm->pipe[PIPE_C].plane[PLANE_PRIMARY], PLANEC) |

drivers/gpu/drm/i915/display/i9xx_wm.c

885

FW_WM(wm->pipe[PIPE_C].plane[PLANE_CURSOR], CURSORC));

drivers/gpu/drm/i915/display/i9xx_wm.c

887

FW_WM(wm->sr.plane >> 9, SR_HI) |

drivers/gpu/drm/i915/display/i9xx_wm.c

888

FW_WM(wm->pipe[PIPE_C].plane[PLANE_SPRITE1] >> 8, SPRITEF_HI) |

drivers/gpu/drm/i915/display/i9xx_wm.c

889

FW_WM(wm->pipe[PIPE_C].plane[PLANE_SPRITE0] >> 8, SPRITEE_HI) |

drivers/gpu/drm/i915/display/i9xx_wm.c

890

FW_WM(wm->pipe[PIPE_C].plane[PLANE_PRIMARY] >> 8, PLANEC_HI) |

drivers/gpu/drm/i915/display/i9xx_wm.c

891

FW_WM(wm->pipe[PIPE_B].plane[PLANE_SPRITE1] >> 8, SPRITED_HI) |

drivers/gpu/drm/i915/display/i9xx_wm.c

892

FW_WM(wm->pipe[PIPE_B].plane[PLANE_SPRITE0] >> 8, SPRITEC_HI) |

drivers/gpu/drm/i915/display/i9xx_wm.c

893

FW_WM(wm->pipe[PIPE_B].plane[PLANE_PRIMARY] >> 8, PLANEB_HI) |

drivers/gpu/drm/i915/display/i9xx_wm.c

894

FW_WM(wm->pipe[PIPE_A].plane[PLANE_SPRITE1] >> 8, SPRITEB_HI) |

drivers/gpu/drm/i915/display/i9xx_wm.c

895

FW_WM(wm->pipe[PIPE_A].plane[PLANE_SPRITE0] >> 8, SPRITEA_HI) |

drivers/gpu/drm/i915/display/i9xx_wm.c

896

FW_WM(wm->pipe[PIPE_A].plane[PLANE_PRIMARY] >> 8, PLANEA_HI));

drivers/gpu/drm/i915/display/i9xx_wm.c

899

FW_WM_VLV(wm->pipe[PIPE_B].plane[PLANE_SPRITE1], SPRITED) |

drivers/gpu/drm/i915/display/i9xx_wm.c

900

FW_WM_VLV(wm->pipe[PIPE_B].plane[PLANE_SPRITE0], SPRITEC));

drivers/gpu/drm/i915/display/i9xx_wm.c

902

FW_WM(wm->sr.plane >> 9, SR_HI) |

drivers/gpu/drm/i915/display/i9xx_wm.c

903

FW_WM(wm->pipe[PIPE_B].plane[PLANE_SPRITE1] >> 8, SPRITED_HI) |

drivers/gpu/drm/i915/display/i9xx_wm.c

904

FW_WM(wm->pipe[PIPE_B].plane[PLANE_SPRITE0] >> 8, SPRITEC_HI) |

drivers/gpu/drm/i915/display/i9xx_wm.c

905

FW_WM(wm->pipe[PIPE_B].plane[PLANE_PRIMARY] >> 8, PLANEB_HI) |

drivers/gpu/drm/i915/display/i9xx_wm.c

906

FW_WM(wm->pipe[PIPE_A].plane[PLANE_SPRITE1] >> 8, SPRITEB_HI) |

drivers/gpu/drm/i915/display/i9xx_wm.c

907

FW_WM(wm->pipe[PIPE_A].plane[PLANE_SPRITE0] >> 8, SPRITEA_HI) |

drivers/gpu/drm/i915/display/i9xx_wm.c

908

FW_WM(wm->pipe[PIPE_A].plane[PLANE_PRIMARY] >> 8, PLANEA_HI));

drivers/gpu/drm/i915/display/i9xx_wm.c

973

struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);

drivers/gpu/drm/i915/display/i9xx_wm.c

994

if (plane->id == PLANE_PRIMARY &&

drivers/gpu/drm/i915/display/intel_cdclk.c

2930

struct intel_plane *plane;

drivers/gpu/drm/i915/display/intel_cdclk.c

2933

for_each_intel_plane_on_crtc(display->drm, crtc, plane)

drivers/gpu/drm/i915/display/intel_cdclk.c

2934

min_cdclk = max(min_cdclk, crtc_state->plane_min_cdclk[plane->id]);

drivers/gpu/drm/i915/display/intel_color.c

1078

struct intel_plane *plane = to_intel_plane(crtc->base.primary);

drivers/gpu/drm/i915/display/intel_color.c

1079

enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;

drivers/gpu/drm/i915/display/intel_color.c

1983

struct intel_plane *plane = to_intel_plane(crtc->base.primary);

drivers/gpu/drm/i915/display/intel_color.c

1986

plane->disable_arm(NULL, plane, crtc_state);

drivers/gpu/drm/i915/display/intel_color.c

2164

static bool need_plane_update(struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_color.c

2167

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/intel_color.c

2174

return crtc_state->active_planes & BIT(plane->id) ||

drivers/gpu/drm/i915/display/intel_color.c

2175

(DISPLAY_VER(display) < 9 && plane->id == PLANE_PRIMARY);

drivers/gpu/drm/i915/display/intel_color.c

2187

struct intel_plane *plane;

drivers/gpu/drm/i915/display/intel_color.c

2197

for_each_intel_plane_on_crtc(display->drm, crtc, plane) {

drivers/gpu/drm/i915/display/intel_color.c

2200

if (!need_plane_update(plane, new_crtc_state))

drivers/gpu/drm/i915/display/intel_color.c

2203

plane_state = intel_atomic_get_plane_state(state, plane);

drivers/gpu/drm/i915/display/intel_color.c

2207

new_crtc_state->update_planes |= BIT(plane->id);

drivers/gpu/drm/i915/display/intel_color.c

3872

enum pipe pipe = to_intel_plane(state->plane)->pipe;

drivers/gpu/drm/i915/display/intel_color.c

3873

enum plane_id plane = to_intel_plane(state->plane)->id;

drivers/gpu/drm/i915/display/intel_color.c

3880

if (!icl_is_hdr_plane(display, plane) || !blob)

drivers/gpu/drm/i915/display/intel_color.c

3928

intel_de_write_dsb(display, dsb, PLANE_CSC_COEFF(pipe, plane, 0),

drivers/gpu/drm/i915/display/intel_color.c

3930

intel_de_write_dsb(display, dsb, PLANE_CSC_COEFF(pipe, plane, 1),

drivers/gpu/drm/i915/display/intel_color.c

3933

intel_de_write_dsb(display, dsb, PLANE_CSC_COEFF(pipe, plane, 2),

drivers/gpu/drm/i915/display/intel_color.c

3935

intel_de_write_dsb(display, dsb, PLANE_CSC_COEFF(pipe, plane, 3),

drivers/gpu/drm/i915/display/intel_color.c

3938

intel_de_write_dsb(display, dsb, PLANE_CSC_COEFF(pipe, plane, 4),

drivers/gpu/drm/i915/display/intel_color.c

3940

intel_de_write_dsb(display, dsb, PLANE_CSC_COEFF(pipe, plane, 5),

drivers/gpu/drm/i915/display/intel_color.c

3943

intel_de_write_dsb(display, dsb, PLANE_CSC_PREOFF(pipe, plane, 0), 0);

drivers/gpu/drm/i915/display/intel_color.c

3944

intel_de_write_dsb(display, dsb, PLANE_CSC_PREOFF(pipe, plane, 1), 0);

drivers/gpu/drm/i915/display/intel_color.c

3945

intel_de_write_dsb(display, dsb, PLANE_CSC_PREOFF(pipe, plane, 2), 0);

drivers/gpu/drm/i915/display/intel_color.c

3951

PLANE_CSC_POSTOFF(pipe, plane, 0),

drivers/gpu/drm/i915/display/intel_color.c

3954

PLANE_CSC_POSTOFF(pipe, plane, 1),

drivers/gpu/drm/i915/display/intel_color.c

3957

PLANE_CSC_POSTOFF(pipe, plane, 2),

drivers/gpu/drm/i915/display/intel_color.c

3967

enum pipe pipe = to_intel_plane(state->plane)->pipe;

drivers/gpu/drm/i915/display/intel_color.c

3968

enum plane_id plane = to_intel_plane(state->plane)->id;

drivers/gpu/drm/i915/display/intel_color.c

3972

if (icl_is_hdr_plane(display, plane)) {

drivers/gpu/drm/i915/display/intel_color.c

3976

PLANE_PRE_CSC_GAMC_INDEX_ENH(pipe, plane, 0),

drivers/gpu/drm/i915/display/intel_color.c

3984

PLANE_PRE_CSC_GAMC_DATA_ENH(pipe, plane, 0),

drivers/gpu/drm/i915/display/intel_color.c

3992

PLANE_PRE_CSC_GAMC_DATA_ENH(pipe, plane, 0),

drivers/gpu/drm/i915/display/intel_color.c

4000

PLANE_PRE_CSC_GAMC_DATA_ENH(pipe, plane, 0), v);

drivers/gpu/drm/i915/display/intel_color.c

4005

PLANE_PRE_CSC_GAMC_DATA_ENH(pipe, plane, 0),

drivers/gpu/drm/i915/display/intel_color.c

4010

intel_de_write_dsb(display, dsb, PLANE_PRE_CSC_GAMC_INDEX_ENH(pipe, plane, 0), 0);

drivers/gpu/drm/i915/display/intel_color.c

4020

enum pipe pipe = to_intel_plane(state->plane)->pipe;

drivers/gpu/drm/i915/display/intel_color.c

4021

enum plane_id plane = to_intel_plane(state->plane)->id;

drivers/gpu/drm/i915/display/intel_color.c

4025

if (icl_is_hdr_plane(display, plane)) {

drivers/gpu/drm/i915/display/intel_color.c

4026

intel_de_write_dsb(display, dsb, PLANE_POST_CSC_GAMC_INDEX_ENH(pipe, plane, 0),

drivers/gpu/drm/i915/display/intel_color.c

4029

intel_de_write_dsb(display, dsb, PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH(pipe, plane, 0),

drivers/gpu/drm/i915/display/intel_color.c

4037

PLANE_POST_CSC_GAMC_DATA_ENH(pipe, plane, 0),

drivers/gpu/drm/i915/display/intel_color.c

4044

PLANE_POST_CSC_GAMC_DATA_ENH(pipe, plane, 0),

drivers/gpu/drm/i915/display/intel_color.c

4054

PLANE_POST_CSC_GAMC_DATA_ENH(pipe, plane, 0), v);

drivers/gpu/drm/i915/display/intel_color.c

4059

PLANE_POST_CSC_GAMC_DATA_ENH(pipe, plane, 0),

drivers/gpu/drm/i915/display/intel_color.c

4064

intel_de_write_dsb(display, dsb, PLANE_POST_CSC_GAMC_INDEX_ENH(pipe, plane, 0), 0);

drivers/gpu/drm/i915/display/intel_color.c

4066

PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH(pipe, plane, 0), 0);

drivers/gpu/drm/i915/display/intel_color_pipeline.c

114

int _intel_color_pipeline_plane_init(struct drm_plane *plane, struct drm_prop_enum_list *list,

drivers/gpu/drm/i915/display/intel_color_pipeline.c

117

struct drm_device *dev = plane->dev;

drivers/gpu/drm/i915/display/intel_color_pipeline.c

126

if (plane_has_3dlut(display, pipe, plane)) {

drivers/gpu/drm/i915/display/intel_color_pipeline.c

135

colorop[i] = intel_color_pipeline_plane_add_colorop(plane, prev,

drivers/gpu/drm/i915/display/intel_color_pipeline.c

156

int intel_color_pipeline_plane_init(struct drm_plane *plane, enum pipe pipe)

drivers/gpu/drm/i915/display/intel_color_pipeline.c

158

struct drm_device *dev = plane->dev;

drivers/gpu/drm/i915/display/intel_color_pipeline.c

166

if (!icl_is_hdr_plane(display, to_intel_plane(plane)->id))

drivers/gpu/drm/i915/display/intel_color_pipeline.c

170

ret = _intel_color_pipeline_plane_init(plane, &pipelines[len], pipe);

drivers/gpu/drm/i915/display/intel_color_pipeline.c

175

ret = drm_plane_create_color_pipeline_property(plane, pipelines, len);

drivers/gpu/drm/i915/display/intel_color_pipeline.c

47

struct drm_plane *plane)

drivers/gpu/drm/i915/display/intel_color_pipeline.c

51

plane->type == DRM_PLANE_TYPE_PRIMARY);

drivers/gpu/drm/i915/display/intel_color_pipeline.c

55

struct intel_colorop *intel_color_pipeline_plane_add_colorop(struct drm_plane *plane,

drivers/gpu/drm/i915/display/intel_color_pipeline.c

59

struct drm_device *dev = plane->dev;

drivers/gpu/drm/i915/display/intel_color_pipeline.c

71

&colorop->base, plane,

drivers/gpu/drm/i915/display/intel_color_pipeline.c

78

ret = drm_plane_colorop_ctm_3x4_init(dev, &colorop->base, plane,

drivers/gpu/drm/i915/display/intel_color_pipeline.c

83

ret = drm_plane_colorop_3dlut_init(dev, &colorop->base, plane,

drivers/gpu/drm/i915/display/intel_color_pipeline.c

89

ret = drm_plane_colorop_curve_1d_lut_init(dev, &colorop->base, plane,

drivers/gpu/drm/i915/display/intel_color_pipeline.c

96

drm_err(plane->dev, "Invalid colorop id [%d]", id);

drivers/gpu/drm/i915/display/intel_color_pipeline.h

12

int intel_color_pipeline_plane_init(struct drm_plane *plane, enum pipe pipe);

drivers/gpu/drm/i915/display/intel_crtc.c

357

struct intel_plane *plane;

drivers/gpu/drm/i915/display/intel_crtc.c

360

plane = skl_universal_plane_create(display, pipe, PLANE_2 + sprite);

drivers/gpu/drm/i915/display/intel_crtc.c

362

plane = intel_sprite_plane_create(display, pipe, sprite);

drivers/gpu/drm/i915/display/intel_crtc.c

363

if (IS_ERR(plane)) {

drivers/gpu/drm/i915/display/intel_crtc.c

364

ret = PTR_ERR(plane);

drivers/gpu/drm/i915/display/intel_crtc.c

367

crtc->plane_ids_mask |= BIT(plane->id);

drivers/gpu/drm/i915/display/intel_crtc.c

612

struct intel_plane *plane;

drivers/gpu/drm/i915/display/intel_crtc.c

616

for_each_oldnew_intel_plane_in_state(state, plane, old_plane_state,

drivers/gpu/drm/i915/display/intel_crtc.c

765

struct intel_plane *plane;

drivers/gpu/drm/i915/display/intel_crtc.c

769

for_each_old_intel_plane_in_state(state, plane, old_plane_state, i) {

drivers/gpu/drm/i915/display/intel_crtc_state_dump.c

117

struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);

drivers/gpu/drm/i915/display/intel_crtc_state_dump.c

122

plane->base.base.id, plane->base.name,

drivers/gpu/drm/i915/display/intel_crtc_state_dump.c

128

plane->base.base.id, plane->base.name,

drivers/gpu/drm/i915/display/intel_crtc_state_dump.c

183

struct intel_plane *plane;

drivers/gpu/drm/i915/display/intel_crtc_state_dump.c

396

for_each_new_intel_plane_in_state(state, plane, plane_state, i) {

drivers/gpu/drm/i915/display/intel_crtc_state_dump.c

397

if (plane->pipe == crtc->pipe)

drivers/gpu/drm/i915/display/intel_cursor.c

110

plane->base.base.id, plane->base.name);

drivers/gpu/drm/i915/display/intel_cursor.c

141

struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);

drivers/gpu/drm/i915/display/intel_cursor.c

149

plane->base.base.id, plane->base.name);

drivers/gpu/drm/i915/display/intel_cursor.c

184

i845_cursor_max_stride(struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_cursor.c

191

static unsigned int i845_cursor_min_alignment(struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_cursor.c

230

struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);

drivers/gpu/drm/i915/display/intel_cursor.c

246

plane->base.base.id, plane->base.name,

drivers/gpu/drm/i915/display/intel_cursor.c

263

plane->base.base.id, plane->base.name,

drivers/gpu/drm/i915/display/intel_cursor.c

275

struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_cursor.c

279

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/intel_cursor.c

298

if (plane->cursor.base != base ||

drivers/gpu/drm/i915/display/intel_cursor.c

299

plane->cursor.size != size ||

drivers/gpu/drm/i915/display/intel_cursor.c

300

plane->cursor.cntl != cntl) {

drivers/gpu/drm/i915/display/intel_cursor.c

307

plane->cursor.base = base;

drivers/gpu/drm/i915/display/intel_cursor.c

308

plane->cursor.size = size;

drivers/gpu/drm/i915/display/intel_cursor.c

309

plane->cursor.cntl = cntl;

drivers/gpu/drm/i915/display/intel_cursor.c

316

struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_cursor.c

319

i845_cursor_update_arm(dsb, plane, crtc_state, NULL);

drivers/gpu/drm/i915/display/intel_cursor.c

322

static bool i845_cursor_get_hw_state(struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_cursor.c

325

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/intel_cursor.c

345

i9xx_cursor_max_stride(struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_cursor.c

349

return plane->base.dev->mode_config.cursor_width * 4;

drivers/gpu/drm/i915/display/intel_cursor.c

352

static unsigned int i830_cursor_min_alignment(struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_cursor.c

360

static unsigned int i85x_cursor_min_alignment(struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_cursor.c

367

static unsigned int i9xx_cursor_min_alignment(struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_cursor.c

371

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/intel_cursor.c

474

struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);

drivers/gpu/drm/i915/display/intel_cursor.c

476

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/intel_cursor.c

491

plane->base.base.id, plane->base.name,

drivers/gpu/drm/i915/display/intel_cursor.c

504

plane->base.base.id, plane->base.name,

drivers/gpu/drm/i915/display/intel_cursor.c

523

plane->base.base.id, plane->base.name);

drivers/gpu/drm/i915/display/intel_cursor.c

533

struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_cursor.c

536

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/intel_cursor.c

537

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/intel_cursor.c

546

struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_cursor.c

550

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/intel_cursor.c

553

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/intel_cursor.c

565

struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_cursor.c

569

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/intel_cursor.c

570

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/intel_cursor.c

587

wa_16021440873(dsb, plane, crtc_state, plane_state);

drivers/gpu/drm/i915/display/intel_cursor.c

589

i9xx_cursor_disable_sel_fetch_arm(dsb, plane, crtc_state);

drivers/gpu/drm/i915/display/intel_cursor.c

617

struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_cursor.c

620

struct intel_display *display = to_intel_display(plane->base.dev);

drivers/gpu/drm/i915/display/intel_cursor.c

621

enum plane_id plane_id = plane->id;

drivers/gpu/drm/i915/display/intel_cursor.c

622

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/intel_cursor.c

650

struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_cursor.c

654

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/intel_cursor.c

655

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/intel_cursor.c

693

skl_write_cursor_wm(dsb, plane, crtc_state);

drivers/gpu/drm/i915/display/intel_cursor.c

696

i9xx_cursor_update_sel_fetch_arm(dsb, plane, crtc_state, plane_state);

drivers/gpu/drm/i915/display/intel_cursor.c

698

i9xx_cursor_disable_sel_fetch_arm(dsb, plane, crtc_state);

drivers/gpu/drm/i915/display/intel_cursor.c

700

if (plane->cursor.base != base ||

drivers/gpu/drm/i915/display/intel_cursor.c

701

plane->cursor.size != fbc_ctl ||

drivers/gpu/drm/i915/display/intel_cursor.c

702

plane->cursor.cntl != cntl) {

drivers/gpu/drm/i915/display/intel_cursor.c

709

plane->cursor.base = base;

drivers/gpu/drm/i915/display/intel_cursor.c

710

plane->cursor.size = fbc_ctl;

drivers/gpu/drm/i915/display/intel_cursor.c

711

plane->cursor.cntl = cntl;

drivers/gpu/drm/i915/display/intel_cursor.c

719

struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_cursor.c

722

i9xx_cursor_update_arm(dsb, plane, crtc_state, NULL);

drivers/gpu/drm/i915/display/intel_cursor.c

725

static bool i9xx_cursor_get_hw_state(struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_cursor.c

728

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/intel_cursor.c

739

power_domain = POWER_DOMAIN_PIPE(plane->pipe);

drivers/gpu/drm/i915/display/intel_cursor.c

744

val = intel_de_read(display, CURCNTR(display, plane->pipe));

drivers/gpu/drm/i915/display/intel_cursor.c

749

*pipe = plane->pipe;

drivers/gpu/drm/i915/display/intel_cursor.c

759

struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_cursor.c

76

&plane_state->uapi.plane->dev->mode_config;

drivers/gpu/drm/i915/display/intel_cursor.c

762

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/intel_cursor.c

770

struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_cursor.c

773

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/intel_cursor.c

793

struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);

drivers/gpu/drm/i915/display/intel_cursor.c

796

intel_plane_destroy_state(&plane->base, &plane_state->uapi);

drivers/gpu/drm/i915/display/intel_cursor.c

809

struct intel_plane *plane = to_intel_plane(_plane);

drivers/gpu/drm/i915/display/intel_cursor.c

811

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/intel_cursor.c

813

to_intel_plane_state(plane->base.state);

drivers/gpu/drm/i915/display/intel_cursor.c

858

new_plane_state = to_intel_plane_state(intel_plane_duplicate_state(&plane->base));

drivers/gpu/drm/i915/display/intel_cursor.c

87

struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);

drivers/gpu/drm/i915/display/intel_cursor.c

894

plane->frontbuffer_bit);

drivers/gpu/drm/i915/display/intel_cursor.c

897

plane->base.state = &new_plane_state->uapi;

drivers/gpu/drm/i915/display/intel_cursor.c

932

intel_plane_update_noarm(NULL, plane, crtc_state, new_plane_state);

drivers/gpu/drm/i915/display/intel_cursor.c

933

intel_plane_update_arm(NULL, plane, crtc_state, new_plane_state);

drivers/gpu/drm/i915/display/intel_cursor.c

935

intel_plane_disable_arm(NULL, plane, crtc_state);

drivers/gpu/drm/i915/display/intel_cursor.c

959

intel_plane_destroy_state(&plane->base, &new_plane_state->uapi);

drivers/gpu/drm/i915/display/intel_cursor.c

961

intel_plane_destroy_state(&plane->base, &old_plane_state->uapi);

drivers/gpu/drm/i915/display/intel_cursor.c

965

return drm_atomic_helper_update_plane(&plane->base, &crtc->base, fb,

drivers/gpu/drm/i915/display/intel_cursor.c

980

static void intel_cursor_add_size_hints_property(struct intel_plane *plane)

drivers/gpu/drm/i915/display/intel_cursor.c

982

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/intel_cursor.c

999

drm_plane_add_size_hints_property(&plane->base, hints, num_hints);

drivers/gpu/drm/i915/display/intel_display.c

1110

struct intel_plane *plane;

drivers/gpu/drm/i915/display/intel_display.c

1113

for_each_new_intel_plane_in_state(state, plane, plane_state, i) {

drivers/gpu/drm/i915/display/intel_display.c

1114

if (plane->pipe == crtc->pipe &&

drivers/gpu/drm/i915/display/intel_display.c

1115

update_planes & BIT(plane->id))

drivers/gpu/drm/i915/display/intel_display.c

1116

plane->enable_flip_done(plane);

drivers/gpu/drm/i915/display/intel_display.c

1127

struct intel_plane *plane;

drivers/gpu/drm/i915/display/intel_display.c

1130

for_each_new_intel_plane_in_state(state, plane, plane_state, i) {

drivers/gpu/drm/i915/display/intel_display.c

1131

if (plane->pipe == crtc->pipe &&

drivers/gpu/drm/i915/display/intel_display.c

1132

update_planes & BIT(plane->id))

drivers/gpu/drm/i915/display/intel_display.c

1133

plane->disable_flip_done(plane);

drivers/gpu/drm/i915/display/intel_display.c

1147

struct intel_plane *plane;

drivers/gpu/drm/i915/display/intel_display.c

1151

for_each_old_intel_plane_in_state(state, plane, old_plane_state, i) {

drivers/gpu/drm/i915/display/intel_display.c

1152

if (plane->need_async_flip_toggle_wa &&

drivers/gpu/drm/i915/display/intel_display.c

1153

plane->pipe == crtc->pipe &&

drivers/gpu/drm/i915/display/intel_display.c

1154

disable_async_flip_planes & BIT(plane->id)) {

drivers/gpu/drm/i915/display/intel_display.c

1159

intel_plane_async_flip(NULL, plane,

drivers/gpu/drm/i915/display/intel_display.c

1295

struct intel_plane *plane;

drivers/gpu/drm/i915/display/intel_display.c

1301

for_each_old_intel_plane_in_state(state, plane, old_plane_state, i) {

drivers/gpu/drm/i915/display/intel_display.c

1302

if (crtc->pipe != plane->pipe ||

drivers/gpu/drm/i915/display/intel_display.c

1303

!(update_mask & BIT(plane->id)))

drivers/gpu/drm/i915/display/intel_display.c

1306

intel_plane_disable_arm(NULL, plane, new_crtc_state);

drivers/gpu/drm/i915/display/intel_display.c

1309

fb_bits |= plane->frontbuffer_bit;

drivers/gpu/drm/i915/display/intel_display.c

395

static void assert_plane(struct intel_plane *plane, bool state)

drivers/gpu/drm/i915/display/intel_display.c

397

struct intel_display *display = to_intel_display(plane->base.dev);

drivers/gpu/drm/i915/display/intel_display.c

401

cur_state = plane->get_hw_state(plane, &pipe);

drivers/gpu/drm/i915/display/intel_display.c

405

plane->base.name, str_on_off(state),

drivers/gpu/drm/i915/display/intel_display.c

415

struct intel_plane *plane;

drivers/gpu/drm/i915/display/intel_display.c

417

for_each_intel_plane_on_crtc(display->drm, crtc, plane)

drivers/gpu/drm/i915/display/intel_display.c

418

assert_plane_disabled(plane);

drivers/gpu/drm/i915/display/intel_display.c

551

struct intel_plane *plane;

drivers/gpu/drm/i915/display/intel_display.c

5527

struct intel_plane *plane;

drivers/gpu/drm/i915/display/intel_display.c

5531

for_each_new_intel_plane_in_state(state, plane,

drivers/gpu/drm/i915/display/intel_display.c

5533

assert_plane(plane, plane_state->is_y_plane ||

drivers/gpu/drm/i915/display/intel_display.c

562

plane = to_intel_plane(crtc->base.primary);

drivers/gpu/drm/i915/display/intel_display.c

564

return plane->max_stride(plane, info, modifier,

drivers/gpu/drm/i915/display/intel_display.c

585

struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);

drivers/gpu/drm/i915/display/intel_display.c

590

crtc_state->uapi.plane_mask |= drm_plane_mask(&plane->base);

drivers/gpu/drm/i915/display/intel_display.c

592

crtc_state->uapi.plane_mask &= ~drm_plane_mask(&plane->base);

drivers/gpu/drm/i915/display/intel_display.c

598

struct drm_plane *plane;

drivers/gpu/drm/i915/display/intel_display.c

6004

struct intel_plane *plane;

drivers/gpu/drm/i915/display/intel_display.c

6035

for_each_oldnew_intel_plane_in_state(state, plane, old_plane_state,

drivers/gpu/drm/i915/display/intel_display.c

6037

if (plane->pipe != crtc->pipe)

drivers/gpu/drm/i915/display/intel_display.c

6047

if (!plane->async_flip) {

drivers/gpu/drm/i915/display/intel_display.c

6050

plane->base.base.id, plane->base.name);

drivers/gpu/drm/i915/display/intel_display.c

6057

plane->base.base.id, plane->base.name);

drivers/gpu/drm/i915/display/intel_display.c

6070

struct intel_plane *plane;

drivers/gpu/drm/i915/display/intel_display.c

608

drm_for_each_plane_mask(plane, display->drm,

drivers/gpu/drm/i915/display/intel_display.c

610

crtc_state->enabled_planes |= BIT(to_intel_plane(plane)->id);

drivers/gpu/drm/i915/display/intel_display.c

6100

for_each_oldnew_intel_plane_in_state(state, plane, old_plane_state,

drivers/gpu/drm/i915/display/intel_display.c

6102

if (plane->pipe != crtc->pipe)

drivers/gpu/drm/i915/display/intel_display.c

611

crtc_state->active_planes |= BIT(to_intel_plane(plane)->id);

drivers/gpu/drm/i915/display/intel_display.c

6111

new_crtc_state->do_async_flip && !plane->async_flip))

drivers/gpu/drm/i915/display/intel_display.c

6122

if (!plane->async_flip)

drivers/gpu/drm/i915/display/intel_display.c

6125

if (!intel_plane_can_async_flip(plane, new_plane_state->hw.fb->format,

drivers/gpu/drm/i915/display/intel_display.c

6129

plane->base.base.id, plane->base.name,

drivers/gpu/drm/i915/display/intel_display.c

6146

plane->base.base.id, plane->base.name);

drivers/gpu/drm/i915/display/intel_display.c

6154

plane->base.base.id, plane->base.name);

drivers/gpu/drm/i915/display/intel_display.c

616

struct intel_plane *plane)

drivers/gpu/drm/i915/display/intel_display.c

6162

plane->base.base.id, plane->base.name);

drivers/gpu/drm/i915/display/intel_display.c

6170

plane->base.base.id, plane->base.name);

drivers/gpu/drm/i915/display/intel_display.c

6178

plane->base.base.id, plane->base.name);

drivers/gpu/drm/i915/display/intel_display.c

6186

plane->base.base.id, plane->base.name);

drivers/gpu/drm/i915/display/intel_display.c

6193

plane->base.base.id, plane->base.name);

drivers/gpu/drm/i915/display/intel_display.c

6201

plane->base.base.id, plane->base.name);

drivers/gpu/drm/i915/display/intel_display.c

6208

plane->base.base.id, plane->base.name);

drivers/gpu/drm/i915/display/intel_display.c

6215

plane->base.base.id, plane->base.name);

drivers/gpu/drm/i915/display/intel_display.c

622

to_intel_plane_state(plane->base.state);

drivers/gpu/drm/i915/display/intel_display.c

6223

plane->base.base.id, plane->base.name);

drivers/gpu/drm/i915/display/intel_display.c

6236

struct intel_plane *plane;

drivers/gpu/drm/i915/display/intel_display.c

6247

for_each_new_intel_plane_in_state(state, plane, plane_state, i) {

drivers/gpu/drm/i915/display/intel_display.c

626

plane->base.base.id, plane->base.name,

drivers/gpu/drm/i915/display/intel_display.c

633

skl_wm_plane_disable_noatomic(crtc, plane);

drivers/gpu/drm/i915/display/intel_display.c

661

intel_plane_disable_arm(NULL, plane, crtc_state);

drivers/gpu/drm/i915/display/intel_display.c

7157

struct drm_plane *plane;

drivers/gpu/drm/i915/display/intel_display.c

7162

for_each_new_plane_in_state(&intel_state->base, plane, new_plane_state, i) {

drivers/gpu/drm/i915/display/intel_display.c

7212

struct intel_plane *plane;

drivers/gpu/drm/i915/display/intel_display.c

7216

for_each_new_intel_plane_in_state(state, plane, plane_state, i) {

drivers/gpu/drm/i915/display/intel_display.c

7665

struct intel_plane *plane;

drivers/gpu/drm/i915/display/intel_display.c

7668

for_each_oldnew_intel_plane_in_state(state, plane, old_plane_state,

drivers/gpu/drm/i915/display/intel_display.c

7672

plane->frontbuffer_bit);

drivers/gpu/drm/i915/display/intel_display.h

265

#define for_each_old_intel_plane_in_state(__state, plane, old_plane_state, __i) \

drivers/gpu/drm/i915/display/intel_display.h

268

((plane) = to_intel_plane((__state)->base.planes[__i].ptr), \

drivers/gpu/drm/i915/display/intel_display.h

271

for_each_if(plane)

drivers/gpu/drm/i915/display/intel_display.h

273

#define for_each_new_intel_plane_in_state(__state, plane, new_plane_state, __i) \

drivers/gpu/drm/i915/display/intel_display.h

276

((plane) = to_intel_plane((__state)->base.planes[__i].ptr), \

drivers/gpu/drm/i915/display/intel_display.h

279

for_each_if(plane)

drivers/gpu/drm/i915/display/intel_display.h

281

#define for_each_oldnew_intel_plane_in_state(__state, plane, old_plane_state, new_plane_state, __i) \

drivers/gpu/drm/i915/display/intel_display.h

284

((plane) = to_intel_plane((__state)->base.planes[__i].ptr), \

drivers/gpu/drm/i915/display/intel_display.h

288

for_each_if(plane)

drivers/gpu/drm/i915/display/intel_display.h

313

plane, plane_state, \

drivers/gpu/drm/i915/display/intel_display.h

315

for_each_intel_plane_mask(((crtc_state)->uapi.state->dev), (plane), \

drivers/gpu/drm/i915/display/intel_display.h

318

to_intel_plane_state(__drm_atomic_get_current_plane_state((crtc_state)->uapi.state, &plane->base))))

drivers/gpu/drm/i915/display/intel_display.h

460

struct intel_plane *plane);

drivers/gpu/drm/i915/display/intel_display_debugfs.c

343

static void intel_plane_uapi_info(struct seq_file *m, struct intel_plane *plane)

drivers/gpu/drm/i915/display/intel_display_debugfs.c

346

to_intel_plane_state(plane->base.state);

drivers/gpu/drm/i915/display/intel_display_debugfs.c

374

static void intel_plane_hw_info(struct seq_file *m, struct intel_plane *plane)

drivers/gpu/drm/i915/display/intel_display_debugfs.c

377

to_intel_plane_state(plane->base.state);

drivers/gpu/drm/i915/display/intel_display_debugfs.c

400

struct intel_plane *plane;

drivers/gpu/drm/i915/display/intel_display_debugfs.c

402

for_each_intel_plane_on_crtc(display->drm, crtc, plane) {

drivers/gpu/drm/i915/display/intel_display_debugfs.c

404

plane->base.base.id, plane->base.name,

drivers/gpu/drm/i915/display/intel_display_debugfs.c

405

plane_type(plane->base.type));

drivers/gpu/drm/i915/display/intel_display_debugfs.c

406

intel_plane_uapi_info(m, plane);

drivers/gpu/drm/i915/display/intel_display_debugfs.c

407

intel_plane_hw_info(m, plane);

drivers/gpu/drm/i915/display/intel_display_driver.c

162

struct intel_plane *plane;

drivers/gpu/drm/i915/display/intel_display_driver.c

164

for_each_intel_plane(display->drm, plane) {

drivers/gpu/drm/i915/display/intel_display_driver.c

166

plane->pipe);

drivers/gpu/drm/i915/display/intel_display_driver.c

168

plane->base.possible_crtcs = drm_crtc_mask(&crtc->base);

drivers/gpu/drm/i915/display/intel_display_irq.c

110

struct intel_plane *plane;

drivers/gpu/drm/i915/display/intel_display_irq.c

112

plane = intel_crtc_get_plane(crtc, plane_id);

drivers/gpu/drm/i915/display/intel_display_irq.c

113

if (!plane || !plane->capture_error)

drivers/gpu/drm/i915/display/intel_display_irq.c

116

plane->capture_error(crtc, plane, &error);

drivers/gpu/drm/i915/display/intel_display_irq.c

121

plane->base.base.id, plane->base.name,

drivers/gpu/drm/i915/display/intel_display_reg_defs.h

52

#define _PLANE(plane, a, b) _PICK_EVEN(plane, a, b)

drivers/gpu/drm/i915/display/intel_display_reg_defs.h

59

#define _MMIO_PLANE(plane, a, b) _MMIO(_PLANE(plane, a, b))

drivers/gpu/drm/i915/display/intel_display_regs.h

1391

#define DE_PLANE_FLIP_DONE_IVB(plane) (1 << (3 + 5 * (plane)))

drivers/gpu/drm/i915/display/intel_display_regs.h

1490

#define DE_PLANE_FLIP_DONE(plane) (1 << (26 + (plane)))

drivers/gpu/drm/i915/display/intel_display_trace.h

288

__entry->primary = wm->pipe[crtc->pipe].plane[PLANE_PRIMARY];

drivers/gpu/drm/i915/display/intel_display_trace.h

289

__entry->sprite = wm->pipe[crtc->pipe].plane[PLANE_SPRITE0];

drivers/gpu/drm/i915/display/intel_display_trace.h

290

__entry->cursor = wm->pipe[crtc->pipe].plane[PLANE_CURSOR];

drivers/gpu/drm/i915/display/intel_display_trace.h

291

__entry->sr_plane = wm->sr.plane;

drivers/gpu/drm/i915/display/intel_display_trace.h

294

__entry->hpll_plane = wm->hpll.plane;

drivers/gpu/drm/i915/display/intel_display_trace.h

337

__entry->primary = wm->pipe[crtc->pipe].plane[PLANE_PRIMARY];

drivers/gpu/drm/i915/display/intel_display_trace.h

338

__entry->sprite0 = wm->pipe[crtc->pipe].plane[PLANE_SPRITE0];

drivers/gpu/drm/i915/display/intel_display_trace.h

339

__entry->sprite1 = wm->pipe[crtc->pipe].plane[PLANE_SPRITE1];

drivers/gpu/drm/i915/display/intel_display_trace.h

340

__entry->cursor = wm->pipe[crtc->pipe].plane[PLANE_CURSOR];

drivers/gpu/drm/i915/display/intel_display_trace.h

341

__entry->sr_plane = wm->sr.plane;

drivers/gpu/drm/i915/display/intel_display_trace.h

384

TP_PROTO(struct intel_plane *plane, struct intel_crtc *crtc, bool async_flip),

drivers/gpu/drm/i915/display/intel_display_trace.h

385

TP_ARGS(plane, crtc, async_flip),

drivers/gpu/drm/i915/display/intel_display_trace.h

388

__string(dev, __dev_name_kms(plane))

drivers/gpu/drm/i915/display/intel_display_trace.h

393

__string(name, plane->base.name)

drivers/gpu/drm/i915/display/intel_display_trace.h

415

__string(dev, __dev_name_drm(plane_state->uapi.plane))

drivers/gpu/drm/i915/display/intel_display_trace.h

422

__string(name, plane_state->uapi.plane->name)

drivers/gpu/drm/i915/display/intel_display_trace.h

448

__string(dev, __dev_name_drm(plane_state->uapi.plane))

drivers/gpu/drm/i915/display/intel_display_trace.h

455

__string(name, plane_state->uapi.plane->name)

drivers/gpu/drm/i915/display/intel_display_trace.h

477

TP_PROTO(struct intel_plane *plane, struct intel_crtc *crtc),

drivers/gpu/drm/i915/display/intel_display_trace.h

478

TP_ARGS(plane, crtc),

drivers/gpu/drm/i915/display/intel_display_trace.h

481

__string(dev, __dev_name_kms(plane))

drivers/gpu/drm/i915/display/intel_display_trace.h

485

__string(name, plane->base.name)

drivers/gpu/drm/i915/display/intel_display_trace.h

502

TP_PROTO(struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_display_trace.h

504

TP_ARGS(plane, scaler_id, x, y, w, h),

drivers/gpu/drm/i915/display/intel_display_trace.h

507

__string(dev, __dev_name_kms(plane))

drivers/gpu/drm/i915/display/intel_display_trace.h

516

__string(name, plane->base.name)

drivers/gpu/drm/i915/display/intel_display_trace.h

520

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/intel_display_trace.h

521

struct intel_crtc *crtc = intel_crtc_for_pipe(display, plane->pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

601

TP_PROTO(struct intel_plane *plane),

drivers/gpu/drm/i915/display/intel_display_trace.h

602

TP_ARGS(plane),

drivers/gpu/drm/i915/display/intel_display_trace.h

605

__string(dev, __dev_name_kms(plane))

drivers/gpu/drm/i915/display/intel_display_trace.h

606

__string(name, plane->base.name)

drivers/gpu/drm/i915/display/intel_display_trace.h

613

struct intel_display *display = to_intel_display(plane->base.dev);

drivers/gpu/drm/i915/display/intel_display_trace.h

615

plane->pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

629

TP_PROTO(struct intel_plane *plane),

drivers/gpu/drm/i915/display/intel_display_trace.h

630

TP_ARGS(plane),

drivers/gpu/drm/i915/display/intel_display_trace.h

633

__string(dev, __dev_name_kms(plane))

drivers/gpu/drm/i915/display/intel_display_trace.h

634

__string(name, plane->base.name)

drivers/gpu/drm/i915/display/intel_display_trace.h

641

struct intel_display *display = to_intel_display(plane->base.dev);

drivers/gpu/drm/i915/display/intel_display_trace.h

643

plane->pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

657

TP_PROTO(struct intel_plane *plane),

drivers/gpu/drm/i915/display/intel_display_trace.h

658

TP_ARGS(plane),

drivers/gpu/drm/i915/display/intel_display_trace.h

661

__string(dev, __dev_name_kms(plane))

drivers/gpu/drm/i915/display/intel_display_trace.h

662

__string(name, plane->base.name)

drivers/gpu/drm/i915/display/intel_display_trace.h

669

struct intel_display *display = to_intel_display(plane->base.dev);

drivers/gpu/drm/i915/display/intel_display_trace.h

671

plane->pipe);

drivers/gpu/drm/i915/display/intel_display_types.h

1612

unsigned int (*min_alignment)(struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_display_types.h

1615

unsigned int (*max_stride)(struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_display_types.h

1621

struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_display_types.h

1626

struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_display_types.h

1631

struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_display_types.h

1634

struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_display_types.h

1636

bool (*get_hw_state)(struct intel_plane *plane, enum pipe *pipe);

drivers/gpu/drm/i915/display/intel_display_types.h

1643

struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_display_types.h

1647

void (*enable_flip_done)(struct intel_plane *plane);

drivers/gpu/drm/i915/display/intel_display_types.h

1648

void (*disable_flip_done)(struct intel_plane *plane);

drivers/gpu/drm/i915/display/intel_display_types.h

1650

void (*disable_tiling)(struct intel_plane *plane);

drivers/gpu/drm/i915/display/intel_display_types.h

2159

struct intel_plane *plane)

drivers/gpu/drm/i915/display/intel_display_types.h

2162

drm_atomic_get_plane_state(&state->base, &plane->base);

drivers/gpu/drm/i915/display/intel_display_types.h

2172

struct intel_plane *plane)

drivers/gpu/drm/i915/display/intel_display_types.h

2175

&plane->base));

drivers/gpu/drm/i915/display/intel_display_types.h

2180

struct intel_plane *plane)

drivers/gpu/drm/i915/display/intel_display_types.h

2183

&plane->base));

drivers/gpu/drm/i915/display/intel_display_types.h

2292

__drm_device_to_intel_display((p)->uapi.plane->dev)

drivers/gpu/drm/i915/display/intel_display_types.h

876

u16 plane[I915_MAX_PLANES];

drivers/gpu/drm/i915/display/intel_fb.c

1131

struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);

drivers/gpu/drm/i915/display/intel_fb.c

1135

unsigned int alignment = plane->min_alignment(plane, fb, color_plane);

drivers/gpu/drm/i915/display/intel_fb.c

1236

struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);

drivers/gpu/drm/i915/display/intel_fb.c

1241

if (plane->id == PLANE_CURSOR)

drivers/gpu/drm/i915/display/intel_fb.c

1288

struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);

drivers/gpu/drm/i915/display/intel_fb.c

1291

(plane->fbc && !plane_state->no_fbc_reason &&

drivers/gpu/drm/i915/display/intel_fb.c

1307

struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);

drivers/gpu/drm/i915/display/intel_fb.c

1327

max_stride = plane->max_stride(plane, fb->base.format,

drivers/gpu/drm/i915/display/intel_fb.c

1488

struct intel_remapped_plane_info *remap_info = &view->gtt.remapped.plane[color_plane];

drivers/gpu/drm/i915/display/intel_fb.c

1516

check_array_bounds(display, view->gtt.rotated.plane, color_plane);

drivers/gpu/drm/i915/display/intel_fb.c

1541

check_array_bounds(display, view->gtt.remapped.plane, color_plane);

drivers/gpu/drm/i915/display/intel_fb.c

1660

struct intel_plane *plane;

drivers/gpu/drm/i915/display/intel_fb.c

1663

for_each_intel_plane(display->drm, plane) {

drivers/gpu/drm/i915/display/intel_fb.c

1666

if (!drm_plane_has_format(&plane->base, fb->format->format, fb->modifier))

drivers/gpu/drm/i915/display/intel_fb.c

1669

plane_min_alignment = plane->min_alignment(plane, fb, 0);

drivers/gpu/drm/i915/display/intel_fb.c

1674

if (intel_plane_needs_physical(plane))

drivers/gpu/drm/i915/display/intel_fb.c

1686

struct intel_plane *plane;

drivers/gpu/drm/i915/display/intel_fb.c

1689

for_each_intel_plane(display->drm, plane) {

drivers/gpu/drm/i915/display/intel_fb.c

1690

if (!drm_plane_has_format(&plane->base, fb->format->format, fb->modifier))

drivers/gpu/drm/i915/display/intel_fb.c

1693

vtd_guard = max_t(unsigned int, vtd_guard, plane->vtd_guard);

drivers/gpu/drm/i915/display/intel_fb.c

1903

for (i = 0 ; i < ARRAY_SIZE(rot_info->plane); i++)

drivers/gpu/drm/i915/display/intel_fb.c

1904

size += rot_info->plane[i].dst_stride * rot_info->plane[i].width;

drivers/gpu/drm/i915/display/intel_fb.c

1914

for (i = 0 ; i < ARRAY_SIZE(rem_info->plane); i++) {

drivers/gpu/drm/i915/display/intel_fb.c

1917

if (rem_info->plane[i].linear)

drivers/gpu/drm/i915/display/intel_fb.c

1918

plane_size = rem_info->plane[i].size;

drivers/gpu/drm/i915/display/intel_fb.c

1920

plane_size = rem_info->plane[i].dst_stride * rem_info->plane[i].height;

drivers/gpu/drm/i915/display/intel_fb.c

2045

struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);

drivers/gpu/drm/i915/display/intel_fb.c

2062

max_stride = plane->max_stride(plane, fb->format,

drivers/gpu/drm/i915/display/intel_fb.c

2069

plane->base.base.id, plane->base.name, max_stride);

drivers/gpu/drm/i915/display/intel_fb.c

621

bool intel_fb_plane_supports_modifier(struct intel_plane *plane, u64 modifier)

drivers/gpu/drm/i915/display/intel_fb.c

625

for (i = 0; i < plane->base.modifier_count; i++)

drivers/gpu/drm/i915/display/intel_fb.c

626

if (plane->base.modifiers[i] == modifier)

drivers/gpu/drm/i915/display/intel_fb.h

48

bool intel_fb_plane_supports_modifier(struct intel_plane *plane, u64 modifier);

drivers/gpu/drm/i915/display/intel_fbc.c

1407

struct intel_plane *plane)

drivers/gpu/drm/i915/display/intel_fbc.c

1409

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/intel_fbc.c

1410

struct intel_fbc *fbc = plane->fbc;

drivers/gpu/drm/i915/display/intel_fbc.c

1417

if (fbc->state.plane == plane)

drivers/gpu/drm/i915/display/intel_fbc.c

1441

struct intel_plane *plane)

drivers/gpu/drm/i915/display/intel_fbc.c

1447

intel_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/i915/display/intel_fbc.c

1448

struct intel_fbc *fbc = plane->fbc;

drivers/gpu/drm/i915/display/intel_fbc.c

1452

WARN_ON(fbc_state->plane && fbc_state->plane != plane);

drivers/gpu/drm/i915/display/intel_fbc.c

1454

fbc_state->plane = plane;

drivers/gpu/drm/i915/display/intel_fbc.c

1493

struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);

drivers/gpu/drm/i915/display/intel_fbc.c

1494

struct intel_fbc *fbc = plane->fbc;

drivers/gpu/drm/i915/display/intel_fbc.c

1512

struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);

drivers/gpu/drm/i915/display/intel_fbc.c

1513

struct intel_fbc *fbc = plane->fbc;

drivers/gpu/drm/i915/display/intel_fbc.c

1542

struct intel_plane *plane;

drivers/gpu/drm/i915/display/intel_fbc.c

1548

for_each_new_intel_plane_in_state(state, plane, plane_state, i) {

drivers/gpu/drm/i915/display/intel_fbc.c

1549

struct intel_fbc *fbc = plane->fbc;

drivers/gpu/drm/i915/display/intel_fbc.c

1551

if (!fbc || plane->pipe != crtc->pipe)

drivers/gpu/drm/i915/display/intel_fbc.c

1556

if (fbc->state.plane == plane)

drivers/gpu/drm/i915/display/intel_fbc.c

1577

struct intel_plane *plane)

drivers/gpu/drm/i915/display/intel_fbc.c

1581

intel_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/i915/display/intel_fbc.c

1585

struct intel_fbc *fbc = plane->fbc;

drivers/gpu/drm/i915/display/intel_fbc.c

1739

struct intel_plane *plane = to_intel_plane(crtc->base.primary);

drivers/gpu/drm/i915/display/intel_fbc.c

1742

if (!plane->fbc)

drivers/gpu/drm/i915/display/intel_fbc.c

1759

struct intel_plane *plane)

drivers/gpu/drm/i915/display/intel_fbc.c

1764

intel_atomic_get_old_plane_state(state, plane);

drivers/gpu/drm/i915/display/intel_fbc.c

1766

intel_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/i915/display/intel_fbc.c

1804

struct intel_plane *plane)

drivers/gpu/drm/i915/display/intel_fbc.c

1807

struct intel_fbc *fbc = plane->fbc;

drivers/gpu/drm/i915/display/intel_fbc.c

1814

if (intel_fbc_can_flip_nuke(state, crtc, plane))

drivers/gpu/drm/i915/display/intel_fbc.c

1844

struct intel_plane *plane;

drivers/gpu/drm/i915/display/intel_fbc.c

1847

for_each_new_intel_plane_in_state(state, plane, plane_state, i) {

drivers/gpu/drm/i915/display/intel_fbc.c

1848

struct intel_fbc *fbc = plane->fbc;

drivers/gpu/drm/i915/display/intel_fbc.c

1850

if (!fbc || plane->pipe != crtc->pipe)

drivers/gpu/drm/i915/display/intel_fbc.c

1855

if (fbc->state.plane == plane)

drivers/gpu/drm/i915/display/intel_fbc.c

1856

need_vblank_wait |= __intel_fbc_pre_update(state, crtc, plane);

drivers/gpu/drm/i915/display/intel_fbc.c

1867

struct intel_plane *plane = fbc->state.plane;

drivers/gpu/drm/i915/display/intel_fbc.c

1873

plane->base.base.id, plane->base.name);

drivers/gpu/drm/i915/display/intel_fbc.c

1885

fbc->state.plane = NULL;

drivers/gpu/drm/i915/display/intel_fbc.c

1904

struct intel_plane *plane;

drivers/gpu/drm/i915/display/intel_fbc.c

1907

for_each_new_intel_plane_in_state(state, plane, plane_state, i) {

drivers/gpu/drm/i915/display/intel_fbc.c

1908

struct intel_fbc *fbc = plane->fbc;

drivers/gpu/drm/i915/display/intel_fbc.c

1910

if (!fbc || plane->pipe != crtc->pipe)

drivers/gpu/drm/i915/display/intel_fbc.c

1915

if (fbc->state.plane == plane)

drivers/gpu/drm/i915/display/intel_fbc.c

1924

if (fbc->state.plane)

drivers/gpu/drm/i915/display/intel_fbc.c

1925

return fbc->state.plane->frontbuffer_bit;

drivers/gpu/drm/i915/display/intel_fbc.c

2003

struct intel_plane *plane;

drivers/gpu/drm/i915/display/intel_fbc.c

2006

for_each_new_intel_plane_in_state(state, plane, plane_state, i) {

drivers/gpu/drm/i915/display/intel_fbc.c

2009

ret = intel_fbc_check_plane(state, plane);

drivers/gpu/drm/i915/display/intel_fbc.c

2019

struct intel_plane *plane)

drivers/gpu/drm/i915/display/intel_fbc.c

2023

intel_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/i915/display/intel_fbc.c

2024

struct intel_fbc *fbc = plane->fbc;

drivers/gpu/drm/i915/display/intel_fbc.c

2028

if (fbc->state.plane) {

drivers/gpu/drm/i915/display/intel_fbc.c

2029

if (fbc->state.plane != plane)

drivers/gpu/drm/i915/display/intel_fbc.c

2033

intel_fbc_update_state(state, crtc, plane);

drivers/gpu/drm/i915/display/intel_fbc.c

2063

plane->base.base.id, plane->base.name);

drivers/gpu/drm/i915/display/intel_fbc.c

2066

intel_fbc_update_state(state, crtc, plane);

drivers/gpu/drm/i915/display/intel_fbc.c

2086

struct intel_plane *plane;

drivers/gpu/drm/i915/display/intel_fbc.c

2088

for_each_intel_plane(display->drm, plane) {

drivers/gpu/drm/i915/display/intel_fbc.c

2089

struct intel_fbc *fbc = plane->fbc;

drivers/gpu/drm/i915/display/intel_fbc.c

2091

if (!fbc || plane->pipe != crtc->pipe)

drivers/gpu/drm/i915/display/intel_fbc.c

2095

if (fbc->state.plane == plane)

drivers/gpu/drm/i915/display/intel_fbc.c

2107

struct intel_plane *plane;

drivers/gpu/drm/i915/display/intel_fbc.c

2110

for_each_new_intel_plane_in_state(state, plane, plane_state, i) {

drivers/gpu/drm/i915/display/intel_fbc.c

2111

struct intel_fbc *fbc = plane->fbc;

drivers/gpu/drm/i915/display/intel_fbc.c

2113

if (!fbc || plane->pipe != crtc->pipe)

drivers/gpu/drm/i915/display/intel_fbc.c

2120

if (fbc->state.plane == plane)

drivers/gpu/drm/i915/display/intel_fbc.c

2123

__intel_fbc_enable(state, crtc, plane);

drivers/gpu/drm/i915/display/intel_fbc.c

2138

if (fbc->underrun_detected || !fbc->state.plane)

drivers/gpu/drm/i915/display/intel_fbc.c

2146

intel_crtc_wait_for_next_vblank(intel_crtc_for_pipe(display, fbc->state.plane->pipe));

drivers/gpu/drm/i915/display/intel_fbc.c

2281

void intel_fbc_add_plane(struct intel_fbc *fbc, struct intel_plane *plane)

drivers/gpu/drm/i915/display/intel_fbc.c

2283

plane->fbc = fbc;

drivers/gpu/drm/i915/display/intel_fbc.c

2379

struct intel_plane *plane;

drivers/gpu/drm/i915/display/intel_fbc.c

2400

for_each_intel_plane(display->drm, plane) {

drivers/gpu/drm/i915/display/intel_fbc.c

2402

to_intel_plane_state(plane->base.state);

drivers/gpu/drm/i915/display/intel_fbc.c

2404

if (plane->fbc != fbc)

drivers/gpu/drm/i915/display/intel_fbc.c

2408

fbc->state.plane == plane ? '*' : ' ',

drivers/gpu/drm/i915/display/intel_fbc.c

2409

plane->base.base.id, plane->base.name,

drivers/gpu/drm/i915/display/intel_fbc.c

2466

struct intel_plane *plane = to_intel_plane(crtc->base.primary);

drivers/gpu/drm/i915/display/intel_fbc.c

2468

if (plane->fbc)

drivers/gpu/drm/i915/display/intel_fbc.c

2469

intel_fbc_debugfs_add(plane->fbc, crtc->base.debugfs_entry);

drivers/gpu/drm/i915/display/intel_fbc.c

317

FBC_CTL_PLANE(fbc_state->plane->i9xx_plane);

drivers/gpu/drm/i915/display/intel_fbc.c

382

enum i9xx_plane_id i9xx_plane = fbc_state->plane->i9xx_plane;

drivers/gpu/drm/i915/display/intel_fbc.c

419

enum i9xx_plane_id i9xx_plane = fbc_state->plane->i9xx_plane;

drivers/gpu/drm/i915/display/intel_fbc.c

456

DPFC_CTL_PLANE_G4X(fbc_state->plane->i9xx_plane);

drivers/gpu/drm/i915/display/intel_fbc.c

667

dpfc_ctl |= DPFC_CTL_PLANE_IVB(fbc_state->plane->i9xx_plane);

drivers/gpu/drm/i915/display/intel_fbc.c

670

dpfc_ctl |= DPFC_CTL_PLANE_BINDING(fbc_state->plane->id);

drivers/gpu/drm/i915/display/intel_fbc.c

736

trace_intel_fbc_activate(fbc->state.plane);

drivers/gpu/drm/i915/display/intel_fbc.c

746

trace_intel_fbc_deactivate(fbc->state.plane);

drivers/gpu/drm/i915/display/intel_fbc.c

765

trace_intel_fbc_nuke(fbc->state.plane);

drivers/gpu/drm/i915/display/intel_fbc.c

84

struct intel_plane *plane;

drivers/gpu/drm/i915/display/intel_fbc.h

48

void intel_fbc_add_plane(struct intel_fbc *fbc, struct intel_plane *plane);

drivers/gpu/drm/i915/display/intel_fbc.h

58

struct intel_plane *plane);

drivers/gpu/drm/i915/display/intel_fbdev.c

386

struct intel_plane *plane =

drivers/gpu/drm/i915/display/intel_fbdev.c

389

to_intel_plane_state(plane->base.state);

drivers/gpu/drm/i915/display/intel_fbdev.c

402

plane->base.base.id, plane->base.name);

drivers/gpu/drm/i915/display/intel_fbdev.c

409

plane->base.base.id, plane->base.name);

drivers/gpu/drm/i915/display/intel_fbdev.c

425

struct intel_plane *plane =

drivers/gpu/drm/i915/display/intel_fbdev.c

437

plane->base.base.id, plane->base.name);

drivers/gpu/drm/i915/display/intel_fbdev.c

449

plane->base.base.id, plane->base.name,

drivers/gpu/drm/i915/display/intel_fbdev.c

469

plane->base.base.id, plane->base.name,

drivers/gpu/drm/i915/display/intel_fbdev.c

477

plane->base.base.id, plane->base.name,

drivers/gpu/drm/i915/display/intel_fbdev.c

495

struct intel_plane *plane =

drivers/gpu/drm/i915/display/intel_fbdev.c

498

to_intel_plane_state(plane->base.state);

drivers/gpu/drm/i915/display/intel_fbdev.c

505

plane->base.base.id, plane->base.name);

drivers/gpu/drm/i915/display/intel_initial_plane.c

123

struct intel_plane *plane = to_intel_plane(crtc->base.primary);

drivers/gpu/drm/i915/display/intel_initial_plane.c

124

struct intel_plane_state *plane_state = to_intel_plane_state(plane->base.state);

drivers/gpu/drm/i915/display/intel_initial_plane.c

155

ret = display->parent->initial_plane->setup(plane->base.state, plane_config, fb, vma);

drivers/gpu/drm/i915/display/intel_initial_plane.c

175

atomic_or(plane->frontbuffer_bit, &to_intel_frontbuffer(fb)->bits);

drivers/gpu/drm/i915/display/intel_initial_plane.c

187

intel_plane_disable_noatomic(crtc, plane);

drivers/gpu/drm/i915/display/intel_initial_plane.c

54

struct intel_plane *plane =

drivers/gpu/drm/i915/display/intel_initial_plane.c

57

to_intel_plane_state(plane->base.state);

drivers/gpu/drm/i915/display/intel_load_detect.c

26

struct drm_plane *plane;

drivers/gpu/drm/i915/display/intel_load_detect.c

34

for_each_new_plane_in_state(state, plane, plane_state, i) {

drivers/gpu/drm/i915/display/intel_modeset_setup.c

382

struct intel_plane *plane =

drivers/gpu/drm/i915/display/intel_modeset_setup.c

387

if (!plane->get_hw_state(plane, &pipe))

drivers/gpu/drm/i915/display/intel_modeset_setup.c

395

plane->base.base.id, plane->base.name);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

398

intel_plane_disable_noatomic(plane_crtc, plane);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

46

struct intel_plane *plane;

drivers/gpu/drm/i915/display/intel_modeset_setup.c

478

struct intel_plane *plane;

drivers/gpu/drm/i915/display/intel_modeset_setup.c

481

for_each_intel_plane_on_crtc(display->drm, crtc, plane) {

drivers/gpu/drm/i915/display/intel_modeset_setup.c

483

to_intel_plane_state(plane->base.state);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

486

plane->base.type != DRM_PLANE_TYPE_PRIMARY)

drivers/gpu/drm/i915/display/intel_modeset_setup.c

487

intel_plane_disable_noatomic(crtc, plane);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

54

for_each_intel_plane_on_crtc(display->drm, crtc, plane) {

drivers/gpu/drm/i915/display/intel_modeset_setup.c

56

to_intel_plane_state(plane->base.state);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

59

intel_plane_disable_noatomic(crtc, plane);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

663

struct intel_plane *plane;

drivers/gpu/drm/i915/display/intel_modeset_setup.c

666

for_each_intel_plane(display->drm, plane) {

drivers/gpu/drm/i915/display/intel_modeset_setup.c

668

to_intel_plane_state(plane->base.state);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

673

visible = plane->get_hw_state(plane, &pipe);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

682

plane->base.base.id, plane->base.name,

drivers/gpu/drm/i915/display/intel_modeset_setup.c

822

struct intel_plane *plane;

drivers/gpu/drm/i915/display/intel_modeset_setup.c

842

for_each_intel_plane_on_crtc(display->drm, crtc, plane) {

drivers/gpu/drm/i915/display/intel_modeset_setup.c

844

to_intel_plane_state(plane->base.state);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

851

crtc_state->data_rate[plane->id] =

drivers/gpu/drm/i915/display/intel_modeset_setup.c

857

if (plane_state->uapi.visible && plane->min_cdclk) {

drivers/gpu/drm/i915/display/intel_modeset_setup.c

859

crtc_state->plane_min_cdclk[plane->id] =

drivers/gpu/drm/i915/display/intel_modeset_setup.c

862

crtc_state->plane_min_cdclk[plane->id] =

drivers/gpu/drm/i915/display/intel_modeset_setup.c

867

plane->base.base.id, plane->base.name,

drivers/gpu/drm/i915/display/intel_modeset_setup.c

868

crtc_state->plane_min_cdclk[plane->id]);

drivers/gpu/drm/i915/display/intel_plane.c

100

intel_plane_destroy_state(&plane->base, plane->base.state);

drivers/gpu/drm/i915/display/intel_plane.c

1000

if (crtc->pipe != plane->pipe ||

drivers/gpu/drm/i915/display/intel_plane.c

1001

!(update_mask & BIT(plane->id)))

drivers/gpu/drm/i915/display/intel_plane.c

1007

intel_plane_update_noarm(dsb, plane,

drivers/gpu/drm/i915/display/intel_plane.c

101

kfree(plane);

drivers/gpu/drm/i915/display/intel_plane.c

1023

struct intel_plane *plane;

drivers/gpu/drm/i915/display/intel_plane.c

1030

while ((plane = skl_next_plane_to_commit(state, crtc, ddb, ddb_y, &update_mask))) {

drivers/gpu/drm/i915/display/intel_plane.c

1032

intel_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/i915/display/intel_plane.c

1040

intel_plane_update_arm(dsb, plane, new_crtc_state, new_plane_state);

drivers/gpu/drm/i915/display/intel_plane.c

1042

intel_plane_disable_arm(dsb, plane, new_crtc_state);

drivers/gpu/drm/i915/display/intel_plane.c

1054

struct intel_plane *plane;

drivers/gpu/drm/i915/display/intel_plane.c

1057

for_each_new_intel_plane_in_state(state, plane, new_plane_state, i) {

drivers/gpu/drm/i915/display/intel_plane.c

1058

if (crtc->pipe != plane->pipe ||

drivers/gpu/drm/i915/display/intel_plane.c

1059

!(update_mask & BIT(plane->id)))

drivers/gpu/drm/i915/display/intel_plane.c

1067

intel_plane_update_arm(dsb, plane, new_crtc_state, new_plane_state);

drivers/gpu/drm/i915/display/intel_plane.c

1069

intel_plane_disable_arm(dsb, plane, new_crtc_state);

drivers/gpu/drm/i915/display/intel_plane.c

1091

struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);

drivers/gpu/drm/i915/display/intel_plane.c

111

void intel_plane_destroy(struct drm_plane *plane)

drivers/gpu/drm/i915/display/intel_plane.c

1112

plane->base.base.id, plane->base.name,

drivers/gpu/drm/i915/display/intel_plane.c

1129

plane->base.base.id, plane->base.name,

drivers/gpu/drm/i915/display/intel_plane.c

113

drm_plane_cleanup(plane);

drivers/gpu/drm/i915/display/intel_plane.c

114

kfree(to_intel_plane(plane));

drivers/gpu/drm/i915/display/intel_plane.c

1143

struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);

drivers/gpu/drm/i915/display/intel_plane.c

1205

plane->base.base.id, plane->base.name,

drivers/gpu/drm/i915/display/intel_plane.c

1213

plane->base.base.id, plane->base.name,

drivers/gpu/drm/i915/display/intel_plane.c

1232

struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);

drivers/gpu/drm/i915/display/intel_plane.c

1235

if (!intel_plane_needs_physical(plane))

drivers/gpu/drm/i915/display/intel_plane.c

1238

return plane->min_alignment(plane, fb, 0);

drivers/gpu/drm/i915/display/intel_plane.c

1253

struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);

drivers/gpu/drm/i915/display/intel_plane.c

127

intel_plane_duplicate_state(struct drm_plane *plane)

drivers/gpu/drm/i915/display/intel_plane.c

1283

.needs_physical = intel_plane_needs_physical(plane),

drivers/gpu/drm/i915/display/intel_plane.c

1309

plane_state->surf = offset + plane->surf_offset(plane_state);

drivers/gpu/drm/i915/display/intel_plane.c

131

intel_state = to_intel_plane_state(plane->state);

drivers/gpu/drm/i915/display/intel_plane.c

137

__drm_atomic_helper_plane_duplicate_state(plane, &intel_state->uapi);

drivers/gpu/drm/i915/display/intel_plane.c

1388

struct intel_plane *plane = to_intel_plane(_plane);

drivers/gpu/drm/i915/display/intel_plane.c

1389

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/intel_plane.c

1395

intel_atomic_get_old_plane_state(state, plane);

drivers/gpu/drm/i915/display/intel_plane.c

1431

ret = drm_gem_plane_helper_prepare_fb(&plane->base, &new_plane_state->uapi);

drivers/gpu/drm/i915/display/intel_plane.c

1467

intel_cleanup_plane_fb(struct drm_plane *plane,

drivers/gpu/drm/i915/display/intel_plane.c

1470

struct intel_display *display = to_intel_display(plane->dev);

drivers/gpu/drm/i915/display/intel_plane.c

1532

struct intel_plane *plane = to_intel_plane(_plane);

drivers/gpu/drm/i915/display/intel_plane.c

1533

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/intel_plane.c

1534

const struct intel_plane_state *plane_state = to_intel_plane_state(plane->base.state);

drivers/gpu/drm/i915/display/intel_plane.c

1555

if (fb->base.modifier != DRM_FORMAT_MOD_LINEAR && plane->disable_tiling)

drivers/gpu/drm/i915/display/intel_plane.c

1556

plane->disable_tiling(plane);

drivers/gpu/drm/i915/display/intel_plane.c

1589

static int intel_get_scanout_buffer(struct drm_plane *plane,

drivers/gpu/drm/i915/display/intel_plane.c

1595

struct intel_display *display = to_intel_display(plane->dev);

drivers/gpu/drm/i915/display/intel_plane.c

1597

if (!plane->state || !plane->state->fb || !plane->state->visible)

drivers/gpu/drm/i915/display/intel_plane.c

1600

plane_state = to_intel_plane_state(plane->state);

drivers/gpu/drm/i915/display/intel_plane.c

1647

void intel_plane_helper_add(struct intel_plane *plane)

drivers/gpu/drm/i915/display/intel_plane.c

1649

if (plane->base.type == DRM_PLANE_TYPE_PRIMARY)

drivers/gpu/drm/i915/display/intel_plane.c

1650

drm_plane_helper_add(&plane->base, &intel_primary_plane_helper_funcs);

drivers/gpu/drm/i915/display/intel_plane.c

1652

drm_plane_helper_add(&plane->base, &intel_plane_helper_funcs);

drivers/gpu/drm/i915/display/intel_plane.c

1671

struct intel_plane *uv_plane = to_intel_plane(uv_plane_state->uapi.plane);

drivers/gpu/drm/i915/display/intel_plane.c

1672

struct intel_plane *y_plane = to_intel_plane(y_plane_state->uapi.plane);

drivers/gpu/drm/i915/display/intel_plane.c

169

intel_plane_destroy_state(struct drm_plane *plane,

drivers/gpu/drm/i915/display/intel_plane.c

1710

struct intel_plane *plane;

drivers/gpu/drm/i915/display/intel_plane.c

1719

for_each_new_intel_plane_in_state(state, plane, plane_state, i) {

drivers/gpu/drm/i915/display/intel_plane.c

1723

if (plane->pipe != crtc->pipe)

drivers/gpu/drm/i915/display/intel_plane.c

1726

if ((crtc_state->nv12_planes & BIT(plane->id)) == 0)

drivers/gpu/drm/i915/display/intel_plane.c

174

drm_WARN_ON(plane->dev, plane_state->ggtt_vma);

drivers/gpu/drm/i915/display/intel_plane.c

175

drm_WARN_ON(plane->dev, plane_state->dpt_vma);

drivers/gpu/drm/i915/display/intel_plane.c

1762

struct intel_plane *plane;

drivers/gpu/drm/i915/display/intel_plane.c

1764

for_each_intel_plane_on_crtc(display->drm, crtc, plane) {

drivers/gpu/drm/i915/display/intel_plane.c

1767

if ((plane_ids_mask & BIT(plane->id)) == 0)

drivers/gpu/drm/i915/display/intel_plane.c

1770

plane_state = intel_atomic_get_plane_state(state, plane);

drivers/gpu/drm/i915/display/intel_plane.c

1803

struct intel_plane *plane;

drivers/gpu/drm/i915/display/intel_plane.c

1807

for_each_new_intel_plane_in_state(state, plane, plane_state, i) {

drivers/gpu/drm/i915/display/intel_plane.c

1810

if ((joined_pipes & BIT(plane->pipe)) == 0)

drivers/gpu/drm/i915/display/intel_plane.c

1813

affected_planes |= BIT(plane->id);

drivers/gpu/drm/i915/display/intel_plane.c

1878

struct intel_plane *plane;

drivers/gpu/drm/i915/display/intel_plane.c

1886

for_each_new_intel_plane_in_state(state, plane, plane_state, i) {

drivers/gpu/drm/i915/display/intel_plane.c

1887

ret = plane_atomic_check(state, plane);

drivers/gpu/drm/i915/display/intel_plane.c

1891

plane->base.base.id, plane->base.name);

drivers/gpu/drm/i915/display/intel_plane.c

1922

for_each_new_intel_plane_in_state(state, plane, plane_state, i)

drivers/gpu/drm/i915/display/intel_plane.c

1923

intel_plane_calc_min_cdclk(state, plane);

drivers/gpu/drm/i915/display/intel_plane.c

206

bool intel_plane_needs_physical(struct intel_plane *plane)

drivers/gpu/drm/i915/display/intel_plane.c

208

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/intel_plane.c

210

return plane->id == PLANE_CURSOR &&

drivers/gpu/drm/i915/display/intel_plane.c

223

bool intel_plane_can_async_flip(struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_plane.c

231

return plane->can_async_flip && plane->can_async_flip(modifier);

drivers/gpu/drm/i915/display/intel_plane.c

237

struct intel_plane *plane = to_intel_plane(_plane);

drivers/gpu/drm/i915/display/intel_plane.c

240

if (!plane->base.funcs->format_mod_supported(&plane->base, format, modifier))

drivers/gpu/drm/i915/display/intel_plane.c

243

info = drm_get_format_info(plane->base.dev, format, modifier);

drivers/gpu/drm/i915/display/intel_plane.c

245

return intel_plane_can_async_flip(plane, info, modifier);

drivers/gpu/drm/i915/display/intel_plane.c

305

struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);

drivers/gpu/drm/i915/display/intel_plane.c

310

if (plane->id == PLANE_CURSOR)

drivers/gpu/drm/i915/display/intel_plane.c

331

skl_plane_relative_data_rate(crtc_state, plane, width, height,

drivers/gpu/drm/i915/display/intel_plane.c

342

struct intel_plane *plane)

drivers/gpu/drm/i915/display/intel_plane.c

345

intel_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/i915/display/intel_plane.c

349

if (!plane_state->uapi.visible || !plane->min_cdclk)

drivers/gpu/drm/i915/display/intel_plane.c

354

new_crtc_state->plane_min_cdclk[plane->id] =

drivers/gpu/drm/i915/display/intel_plane.c

355

plane->min_cdclk(new_crtc_state, plane_state);

drivers/gpu/drm/i915/display/intel_plane.c

493

struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);

drivers/gpu/drm/i915/display/intel_plane.c

507

crtc_state->enabled_planes &= ~BIT(plane->id);

drivers/gpu/drm/i915/display/intel_plane.c

508

crtc_state->active_planes &= ~BIT(plane->id);

drivers/gpu/drm/i915/display/intel_plane.c

509

crtc_state->update_planes |= BIT(plane->id);

drivers/gpu/drm/i915/display/intel_plane.c

510

crtc_state->data_rate[plane->id] = 0;

drivers/gpu/drm/i915/display/intel_plane.c

511

crtc_state->rel_data_rate[plane->id] = 0;

drivers/gpu/drm/i915/display/intel_plane.c

517

struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);

drivers/gpu/drm/i915/display/intel_plane.c

521

crtc_state->active_planes &= ~BIT(plane->id);

drivers/gpu/drm/i915/display/intel_plane.c

522

crtc_state->scaled_planes &= ~BIT(plane->id);

drivers/gpu/drm/i915/display/intel_plane.c

523

crtc_state->nv12_planes &= ~BIT(plane->id);

drivers/gpu/drm/i915/display/intel_plane.c

524

crtc_state->c8_planes &= ~BIT(plane->id);

drivers/gpu/drm/i915/display/intel_plane.c

525

crtc_state->async_flip_planes &= ~BIT(plane->id);

drivers/gpu/drm/i915/display/intel_plane.c

526

crtc_state->data_rate[plane->id] = 0;

drivers/gpu/drm/i915/display/intel_plane.c

527

crtc_state->data_rate_y[plane->id] = 0;

drivers/gpu/drm/i915/display/intel_plane.c

528

crtc_state->rel_data_rate[plane->id] = 0;

drivers/gpu/drm/i915/display/intel_plane.c

529

crtc_state->rel_data_rate_y[plane->id] = 0;

drivers/gpu/drm/i915/display/intel_plane.c

530

crtc_state->plane_min_cdclk[plane->id] = 0;

drivers/gpu/drm/i915/display/intel_plane.c

545

static bool intel_plane_do_async_flip(struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_plane.c

549

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/intel_plane.c

551

if (!plane->async_flip)

drivers/gpu/drm/i915/display/intel_plane.c

577

struct intel_plane *plane = to_intel_plane(new_plane_state->uapi.plane);

drivers/gpu/drm/i915/display/intel_plane.c

584

if (plane->id == PLANE_CURSOR)

drivers/gpu/drm/i915/display/intel_plane.c

606

if (plane->id == PLANE_PRIMARY) {

drivers/gpu/drm/i915/display/intel_plane.c

618

struct intel_plane *plane = to_intel_plane(new_plane_state->uapi.plane);

drivers/gpu/drm/i915/display/intel_plane.c

623

if (plane->id == PLANE_CURSOR)

drivers/gpu/drm/i915/display/intel_plane.c

66

struct intel_plane *plane)

drivers/gpu/drm/i915/display/intel_plane.c

676

struct intel_plane *plane = to_intel_plane(new_plane_state->uapi.plane);

drivers/gpu/drm/i915/display/intel_plane.c

683

if (DISPLAY_VER(display) >= 9 && plane->id != PLANE_CURSOR) {

drivers/gpu/drm/i915/display/intel_plane.c

70

__drm_atomic_helper_plane_state_reset(&plane_state->uapi, &plane->base);

drivers/gpu/drm/i915/display/intel_plane.c

719

plane->base.base.id, plane->base.name,

drivers/gpu/drm/i915/display/intel_plane.c

724

new_crtc_state->fb_bits |= plane->frontbuffer_bit;

drivers/gpu/drm/i915/display/intel_plane.c

734

if (intel_plane_do_async_flip(plane, old_crtc_state, new_crtc_state))

drivers/gpu/drm/i915/display/intel_plane.c

749

new_crtc_state->async_flip_planes |= BIT(plane->id);

drivers/gpu/drm/i915/display/intel_plane.c

760

struct intel_plane *plane = to_intel_plane(new_plane_state->uapi.plane);

drivers/gpu/drm/i915/display/intel_plane.c

765

new_crtc_state->enabled_planes &= ~BIT(plane->id);

drivers/gpu/drm/i915/display/intel_plane.c

770

ret = plane->check_plane(new_crtc_state, new_plane_state);

drivers/gpu/drm/i915/display/intel_plane.c

775

new_crtc_state->enabled_planes |= BIT(plane->id);

drivers/gpu/drm/i915/display/intel_plane.c

779

new_crtc_state->active_planes |= BIT(plane->id);

drivers/gpu/drm/i915/display/intel_plane.c

783

new_crtc_state->scaled_planes |= BIT(plane->id);

drivers/gpu/drm/i915/display/intel_plane.c

787

new_crtc_state->nv12_planes |= BIT(plane->id);

drivers/gpu/drm/i915/display/intel_plane.c

79

struct intel_plane *plane;

drivers/gpu/drm/i915/display/intel_plane.c

791

new_crtc_state->c8_planes |= BIT(plane->id);

drivers/gpu/drm/i915/display/intel_plane.c

794

new_crtc_state->update_planes |= BIT(plane->id);

drivers/gpu/drm/i915/display/intel_plane.c

798

new_crtc_state->data_rate_y[plane->id] =

drivers/gpu/drm/i915/display/intel_plane.c

800

new_crtc_state->data_rate[plane->id] =

drivers/gpu/drm/i915/display/intel_plane.c

803

new_crtc_state->rel_data_rate_y[plane->id] =

drivers/gpu/drm/i915/display/intel_plane.c

806

new_crtc_state->rel_data_rate[plane->id] =

drivers/gpu/drm/i915/display/intel_plane.c

81

plane = kzalloc_obj(*plane);

drivers/gpu/drm/i915/display/intel_plane.c

810

new_crtc_state->data_rate[plane->id] =

drivers/gpu/drm/i915/display/intel_plane.c

813

new_crtc_state->rel_data_rate[plane->id] =

drivers/gpu/drm/i915/display/intel_plane.c

82

if (!plane)

drivers/gpu/drm/i915/display/intel_plane.c

826

struct intel_plane *plane;

drivers/gpu/drm/i915/display/intel_plane.c

828

for_each_intel_plane_on_crtc(display->drm, crtc, plane) {

drivers/gpu/drm/i915/display/intel_plane.c

829

if (plane->id == plane_id)

drivers/gpu/drm/i915/display/intel_plane.c

830

return plane;

drivers/gpu/drm/i915/display/intel_plane.c

837

struct intel_plane *plane)

drivers/gpu/drm/i915/display/intel_plane.c

841

intel_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/i915/display/intel_plane.c

843

intel_atomic_get_old_plane_state(state, plane);

drivers/gpu/drm/i915/display/intel_plane.c

846

struct intel_crtc *crtc = intel_crtc_for_pipe(display, plane->pipe);

drivers/gpu/drm/i915/display/intel_plane.c

856

intel_crtc_get_plane(primary_crtc, plane->id);

drivers/gpu/drm/i915/display/intel_plane.c

87

kfree(plane);

drivers/gpu/drm/i915/display/intel_plane.c

895

struct intel_plane *plane;

drivers/gpu/drm/i915/display/intel_plane.c

901

for_each_new_intel_plane_in_state(state, plane, plane_state, i) {

drivers/gpu/drm/i915/display/intel_plane.c

902

enum plane_id plane_id = plane->id;

drivers/gpu/drm/i915/display/intel_plane.c

904

if (crtc->pipe != plane->pipe ||

drivers/gpu/drm/i915/display/intel_plane.c

91

intel_plane_state_reset(plane_state, plane);

drivers/gpu/drm/i915/display/intel_plane.c

918

return plane;

drivers/gpu/drm/i915/display/intel_plane.c

928

struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_plane.c

93

plane->base.state = &plane_state->uapi;

drivers/gpu/drm/i915/display/intel_plane.c

936

if (plane->fbc)

drivers/gpu/drm/i915/display/intel_plane.c

937

intel_fbc_dirty_rect_update_noarm(dsb, plane);

drivers/gpu/drm/i915/display/intel_plane.c

939

if (plane->update_noarm)

drivers/gpu/drm/i915/display/intel_plane.c

940

plane->update_noarm(dsb, plane, crtc_state, plane_state);

drivers/gpu/drm/i915/display/intel_plane.c

944

struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_plane.c

95

return plane;

drivers/gpu/drm/i915/display/intel_plane.c

951

trace_intel_plane_async_flip(plane, crtc, async_flip);

drivers/gpu/drm/i915/display/intel_plane.c

952

plane->async_flip(dsb, plane, crtc_state, plane_state, async_flip);

drivers/gpu/drm/i915/display/intel_plane.c

956

struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_plane.c

962

if (crtc_state->do_async_flip && plane->async_flip) {

drivers/gpu/drm/i915/display/intel_plane.c

963

intel_plane_async_flip(dsb, plane, crtc_state, plane_state, true);

drivers/gpu/drm/i915/display/intel_plane.c

968

plane->update_arm(dsb, plane, crtc_state, plane_state);

drivers/gpu/drm/i915/display/intel_plane.c

972

struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_plane.c

977

trace_intel_plane_disable_arm(plane, crtc);

drivers/gpu/drm/i915/display/intel_plane.c

978

plane->disable_arm(dsb, plane, crtc_state);

drivers/gpu/drm/i915/display/intel_plane.c

98

void intel_plane_free(struct intel_plane *plane)

drivers/gpu/drm/i915/display/intel_plane.c

989

struct intel_plane *plane;

drivers/gpu/drm/i915/display/intel_plane.c

999

for_each_new_intel_plane_in_state(state, plane, new_plane_state, i) {

drivers/gpu/drm/i915/display/intel_plane.h

26

bool intel_plane_can_async_flip(struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_plane.h

44

struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_plane.h

49

struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_plane.h

53

struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_plane.h

57

struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_plane.h

60

void intel_plane_free(struct intel_plane *plane);

drivers/gpu/drm/i915/display/intel_plane.h

61

void intel_plane_destroy(struct drm_plane *plane);

drivers/gpu/drm/i915/display/intel_plane.h

62

struct drm_plane_state *intel_plane_duplicate_state(struct drm_plane *plane);

drivers/gpu/drm/i915/display/intel_plane.h

63

void intel_plane_destroy_state(struct drm_plane *plane,

drivers/gpu/drm/i915/display/intel_plane.h

82

void intel_plane_helper_add(struct intel_plane *plane);

drivers/gpu/drm/i915/display/intel_plane.h

84

bool intel_plane_needs_physical(struct intel_plane *plane);

drivers/gpu/drm/i915/display/intel_plane.h

92

bool intel_plane_format_mod_supported_async(struct drm_plane *plane,

drivers/gpu/drm/i915/display/intel_psr.c

2814

struct intel_plane *plane;

drivers/gpu/drm/i915/display/intel_psr.c

2820

for_each_new_intel_plane_in_state(state, plane, new_plane_state, i) {

drivers/gpu/drm/i915/display/intel_psr.c

2826

if (plane->id != PLANE_CURSOR)

drivers/gpu/drm/i915/display/intel_psr.c

2938

struct intel_plane *plane;

drivers/gpu/drm/i915/display/intel_psr.c

2967

for_each_oldnew_intel_plane_in_state(state, plane, old_plane_state,

drivers/gpu/drm/i915/display/intel_psr.c

3084

for_each_oldnew_intel_plane_in_state(state, plane, old_plane_state,

drivers/gpu/drm/i915/display/intel_psr.c

3103

crtc_state->update_planes |= BIT(plane->id);

drivers/gpu/drm/i915/display/intel_psr.c

3116

crtc_state->update_planes |= BIT(plane->id);

drivers/gpu/drm/i915/display/intel_sprite.c

1081

struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);

drivers/gpu/drm/i915/display/intel_sprite.c

1083

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/intel_sprite.c

1111

struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);

drivers/gpu/drm/i915/display/intel_sprite.c

1113

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/intel_sprite.c

1136

struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_sprite.c

1140

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/intel_sprite.c

1141

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/intel_sprite.c

1166

struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_sprite.c

1170

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/intel_sprite.c

1171

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/intel_sprite.c

1207

struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_sprite.c

1210

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/intel_sprite.c

1211

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/intel_sprite.c

1220

struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_sprite.c

1223

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/intel_sprite.c

1231

g4x_sprite_get_hw_state(struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_sprite.c

1234

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/intel_sprite.c

1239

power_domain = POWER_DOMAIN_PIPE(plane->pipe);

drivers/gpu/drm/i915/display/intel_sprite.c

1244

ret = intel_de_read(display, DVSCNTR(plane->pipe)) & DVS_ENABLE;

drivers/gpu/drm/i915/display/intel_sprite.c

1246

*pipe = plane->pipe;

drivers/gpu/drm/i915/display/intel_sprite.c

143

struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);

drivers/gpu/drm/i915/display/intel_sprite.c

145

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/intel_sprite.c

146

enum plane_id plane_id = plane->id;

drivers/gpu/drm/i915/display/intel_sprite.c

1597

struct intel_plane *plane;

drivers/gpu/drm/i915/display/intel_sprite.c

1605

plane = intel_plane_alloc();

drivers/gpu/drm/i915/display/intel_sprite.c

1606

if (IS_ERR(plane))

drivers/gpu/drm/i915/display/intel_sprite.c

1607

return plane;

drivers/gpu/drm/i915/display/intel_sprite.c

1610

plane->update_noarm = vlv_sprite_update_noarm;

drivers/gpu/drm/i915/display/intel_sprite.c

1611

plane->update_arm = vlv_sprite_update_arm;

drivers/gpu/drm/i915/display/intel_sprite.c

1612

plane->disable_arm = vlv_sprite_disable_arm;

drivers/gpu/drm/i915/display/intel_sprite.c

1613

plane->capture_error = vlv_sprite_capture_error;

drivers/gpu/drm/i915/display/intel_sprite.c

1614

plane->get_hw_state = vlv_sprite_get_hw_state;

drivers/gpu/drm/i915/display/intel_sprite.c

1615

plane->check_plane = vlv_sprite_check;

drivers/gpu/drm/i915/display/intel_sprite.c

1616

plane->surf_offset = i965_plane_surf_offset;

drivers/gpu/drm/i915/display/intel_sprite.c

1617

plane->max_stride = i965_plane_max_stride;

drivers/gpu/drm/i915/display/intel_sprite.c

1618

plane->min_alignment = vlv_plane_min_alignment;

drivers/gpu/drm/i915/display/intel_sprite.c

1619

plane->min_cdclk = vlv_plane_min_cdclk;

drivers/gpu/drm/i915/display/intel_sprite.c

1623

plane->vtd_guard = 128;

drivers/gpu/drm/i915/display/intel_sprite.c

1635

plane->update_noarm = ivb_sprite_update_noarm;

drivers/gpu/drm/i915/display/intel_sprite.c

1636

plane->update_arm = ivb_sprite_update_arm;

drivers/gpu/drm/i915/display/intel_sprite.c

1637

plane->disable_arm = ivb_sprite_disable_arm;

drivers/gpu/drm/i915/display/intel_sprite.c

1638

plane->capture_error = ivb_sprite_capture_error;

drivers/gpu/drm/i915/display/intel_sprite.c

1639

plane->get_hw_state = ivb_sprite_get_hw_state;

drivers/gpu/drm/i915/display/intel_sprite.c

1640

plane->check_plane = g4x_sprite_check;

drivers/gpu/drm/i915/display/intel_sprite.c

1641

plane->surf_offset = i965_plane_surf_offset;

drivers/gpu/drm/i915/display/intel_sprite.c

1644

plane->max_stride = hsw_sprite_max_stride;

drivers/gpu/drm/i915/display/intel_sprite.c

1645

plane->min_cdclk = hsw_plane_min_cdclk;

drivers/gpu/drm/i915/display/intel_sprite.c

1647

plane->max_stride = g4x_sprite_max_stride;

drivers/gpu/drm/i915/display/intel_sprite.c

1648

plane->min_cdclk = ivb_sprite_min_cdclk;

drivers/gpu/drm/i915/display/intel_sprite.c

1651

plane->min_alignment = g4x_sprite_min_alignment;

drivers/gpu/drm/i915/display/intel_sprite.c

1654

plane->vtd_guard = 64;

drivers/gpu/drm/i915/display/intel_sprite.c

1661

plane->update_noarm = g4x_sprite_update_noarm;

drivers/gpu/drm/i915/display/intel_sprite.c

1662

plane->update_arm = g4x_sprite_update_arm;

drivers/gpu/drm/i915/display/intel_sprite.c

1663

plane->disable_arm = g4x_sprite_disable_arm;

drivers/gpu/drm/i915/display/intel_sprite.c

1664

plane->capture_error = g4x_sprite_capture_error;

drivers/gpu/drm/i915/display/intel_sprite.c

1665

plane->get_hw_state = g4x_sprite_get_hw_state;

drivers/gpu/drm/i915/display/intel_sprite.c

1666

plane->check_plane = g4x_sprite_check;

drivers/gpu/drm/i915/display/intel_sprite.c

1667

plane->surf_offset = i965_plane_surf_offset;

drivers/gpu/drm/i915/display/intel_sprite.c

1668

plane->max_stride = g4x_sprite_max_stride;

drivers/gpu/drm/i915/display/intel_sprite.c

1669

plane->min_alignment = g4x_sprite_min_alignment;

drivers/gpu/drm/i915/display/intel_sprite.c

1670

plane->min_cdclk = g4x_sprite_min_cdclk;

drivers/gpu/drm/i915/display/intel_sprite.c

1673

plane->vtd_guard = 64;

drivers/gpu/drm/i915/display/intel_sprite.c

1697

plane->pipe = pipe;

drivers/gpu/drm/i915/display/intel_sprite.c

1698

plane->id = PLANE_SPRITE0 + sprite;

drivers/gpu/drm/i915/display/intel_sprite.c

1699

plane->frontbuffer_bit = INTEL_FRONTBUFFER(pipe, plane->id);

drivers/gpu/drm/i915/display/intel_sprite.c

1703

ret = drm_universal_plane_init(display->drm, &plane->base,

drivers/gpu/drm/i915/display/intel_sprite.c

1713

drm_plane_create_rotation_property(&plane->base,

drivers/gpu/drm/i915/display/intel_sprite.c

1717

drm_plane_create_color_properties(&plane->base,

drivers/gpu/drm/i915/display/intel_sprite.c

1726

drm_plane_create_zpos_immutable_property(&plane->base, zpos);

drivers/gpu/drm/i915/display/intel_sprite.c

1728

intel_plane_helper_add(plane);

drivers/gpu/drm/i915/display/intel_sprite.c

1730

return plane;

drivers/gpu/drm/i915/display/intel_sprite.c

1733

intel_plane_free(plane);

drivers/gpu/drm/i915/display/intel_sprite.c

345

struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);

drivers/gpu/drm/i915/display/intel_sprite.c

347

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/intel_sprite.c

348

enum plane_id plane_id = plane->id;

drivers/gpu/drm/i915/display/intel_sprite.c

367

struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_sprite.c

371

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/intel_sprite.c

372

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/intel_sprite.c

373

enum plane_id plane_id = plane->id;

drivers/gpu/drm/i915/display/intel_sprite.c

389

struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_sprite.c

393

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/intel_sprite.c

394

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/intel_sprite.c

395

enum plane_id plane_id = plane->id;

drivers/gpu/drm/i915/display/intel_sprite.c

436

struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_sprite.c

439

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/intel_sprite.c

440

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/intel_sprite.c

441

enum plane_id plane_id = plane->id;

drivers/gpu/drm/i915/display/intel_sprite.c

448

struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_sprite.c

451

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/intel_sprite.c

453

error->ctl = intel_de_read(display, SPCNTR(crtc->pipe, plane->id));

drivers/gpu/drm/i915/display/intel_sprite.c

454

error->surf = intel_de_read(display, SPSURF(crtc->pipe, plane->id));

drivers/gpu/drm/i915/display/intel_sprite.c

455

error->surflive = intel_de_read(display, SPSURFLIVE(crtc->pipe, plane->id));

drivers/gpu/drm/i915/display/intel_sprite.c

459

vlv_sprite_get_hw_state(struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_sprite.c

462

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/intel_sprite.c

464

enum plane_id plane_id = plane->id;

drivers/gpu/drm/i915/display/intel_sprite.c

468

power_domain = POWER_DOMAIN_PIPE(plane->pipe);

drivers/gpu/drm/i915/display/intel_sprite.c

473

ret = intel_de_read(display, SPCNTR(plane->pipe, plane_id)) & SP_ENABLE;

drivers/gpu/drm/i915/display/intel_sprite.c

475

*pipe = plane->pipe;

drivers/gpu/drm/i915/display/intel_sprite.c

71

struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);

drivers/gpu/drm/i915/display/intel_sprite.c

73

enum plane_id plane_id = plane->id;

drivers/gpu/drm/i915/display/intel_sprite.c

762

struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);

drivers/gpu/drm/i915/display/intel_sprite.c

763

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/intel_sprite.c

790

struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_sprite.c

794

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/intel_sprite.c

795

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/intel_sprite.c

821

struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_sprite.c

825

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/intel_sprite.c

826

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/intel_sprite.c

866

struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_sprite.c

869

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/intel_sprite.c

870

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/intel_sprite.c

880

struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_sprite.c

883

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/intel_sprite.c

891

ivb_sprite_get_hw_state(struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_sprite.c

894

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/intel_sprite.c

899

power_domain = POWER_DOMAIN_PIPE(plane->pipe);

drivers/gpu/drm/i915/display/intel_sprite.c

904

ret = intel_de_read(display, SPRCTL(plane->pipe)) & SPRITE_ENABLE;

drivers/gpu/drm/i915/display/intel_sprite.c

906

*pipe = plane->pipe;

drivers/gpu/drm/i915/display/intel_sprite.c

960

g4x_sprite_max_stride(struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_sprite.c

974

hsw_sprite_max_stride(struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_sprite.c

984

static unsigned int g4x_sprite_min_alignment(struct intel_plane *plane,

drivers/gpu/drm/i915/display/intel_sprite.c

988

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/intel_sprite.h

18

enum pipe pipe, int plane);

drivers/gpu/drm/i915/display/intel_sprite.h

30

int pipe, int plane)

drivers/gpu/drm/i915/display/intel_sprite_uapi.c

104

to_intel_plane(plane)->pipe);

drivers/gpu/drm/i915/display/intel_sprite_uapi.c

20

struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);

drivers/gpu/drm/i915/display/intel_sprite_uapi.c

29

if (plane->id == PLANE_PRIMARY &&

drivers/gpu/drm/i915/display/intel_sprite_uapi.c

37

if (DISPLAY_VER(display) >= 9 && plane->id != PLANE_PRIMARY &&

drivers/gpu/drm/i915/display/intel_sprite_uapi.c

47

struct drm_plane *plane;

drivers/gpu/drm/i915/display/intel_sprite_uapi.c

67

plane = drm_plane_find(dev, file_priv, set->plane_id);

drivers/gpu/drm/i915/display/intel_sprite_uapi.c

68

if (!plane || plane->type != DRM_PLANE_TYPE_OVERLAY)

drivers/gpu/drm/i915/display/intel_sprite_uapi.c

77

to_intel_plane(plane)->id >= PLANE_3 &&

drivers/gpu/drm/i915/display/intel_sprite_uapi.c

83

state = drm_atomic_commit_alloc(plane->dev);

drivers/gpu/drm/i915/display/intel_sprite_uapi.c

92

plane_state = drm_atomic_get_plane_state(state, plane);

drivers/gpu/drm/i915/display/intel_wm.c

122

struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);

drivers/gpu/drm/i915/display/intel_wm.c

136

if (plane->id == PLANE_CURSOR)

drivers/gpu/drm/i915/display/intel_wm_types.h

27

u16 plane[I915_MAX_PLANES];

drivers/gpu/drm/i915/display/intel_wm_types.h

32

u16 plane;

drivers/gpu/drm/i915/display/intel_wm_types.h

38

u8 plane[I915_MAX_PLANES];

drivers/gpu/drm/i915/display/skl_scaler.c

308

struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);

drivers/gpu/drm/i915/display/skl_scaler.c

314

if (!icl_is_hdr_plane(display, plane->id) &&

drivers/gpu/drm/i915/display/skl_scaler.c

319

drm_plane_index(&plane->base),

drivers/gpu/drm/i915/display/skl_scaler.c

419

struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);

drivers/gpu/drm/i915/display/skl_scaler.c

423

} else if (icl_is_hdr_plane(display, plane->id)) {

drivers/gpu/drm/i915/display/skl_scaler.c

550

struct intel_plane *plane)

drivers/gpu/drm/i915/display/skl_scaler.c

560

if (drm_WARN_ON(display->drm, plane->pipe != crtc->pipe))

drivers/gpu/drm/i915/display/skl_scaler.c

563

plane_state = intel_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/i915/display/skl_scaler.c

573

plane_state = intel_atomic_get_plane_state(state, plane);

drivers/gpu/drm/i915/display/skl_scaler.c

579

crtc, "PLANE", plane->base.base.id,

drivers/gpu/drm/i915/display/skl_scaler.c

647

struct intel_plane *plane =

drivers/gpu/drm/i915/display/skl_scaler.c

650

ret = setup_plane_scaler(state, crtc, plane);

drivers/gpu/drm/i915/display/skl_scaler.c

857

struct intel_plane *plane,

drivers/gpu/drm/i915/display/skl_scaler.c

861

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/skl_scaler.c

863

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/skl_scaler.c

885

!icl_is_hdr_plane(display, plane->id)) {

drivers/gpu/drm/i915/display/skl_scaler.c

901

ps_ctrl = PS_SCALER_EN | PS_BINDING_PLANE(plane->id) | scaler->mode |

drivers/gpu/drm/i915/display/skl_scaler.c

904

trace_intel_plane_scaler_update_arm(plane, scaler_id,

drivers/gpu/drm/i915/display/skl_scaler.h

30

struct intel_plane *plane,

drivers/gpu/drm/i915/display/skl_universal_plane.c

1247

struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1253

if (fb->format->is_yuv && !icl_is_hdr_plane(display, plane->id)) {

drivers/gpu/drm/i915/display/skl_universal_plane.c

1378

struct intel_plane *plane,

drivers/gpu/drm/i915/display/skl_universal_plane.c

1381

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1382

enum plane_id plane_id = plane->id;

drivers/gpu/drm/i915/display/skl_universal_plane.c

1383

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/skl_universal_plane.c

1405

struct intel_plane *plane,

drivers/gpu/drm/i915/display/skl_universal_plane.c

1409

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1410

enum plane_id plane_id = plane->id;

drivers/gpu/drm/i915/display/skl_universal_plane.c

1411

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/skl_universal_plane.c

1431

skl_write_plane_wm(dsb, plane, crtc_state);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1436

struct intel_plane *plane,

drivers/gpu/drm/i915/display/skl_universal_plane.c

1440

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1441

enum plane_id plane_id = plane->id;

drivers/gpu/drm/i915/display/skl_universal_plane.c

1442

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/skl_universal_plane.c

1451

if (plane->need_async_flip_toggle_wa &&

drivers/gpu/drm/i915/display/skl_universal_plane.c

1452

crtc_state->async_flip_planes & BIT(plane->id))

drivers/gpu/drm/i915/display/skl_universal_plane.c

1488

skl_program_plane_scaler(dsb, plane, crtc_state, plane_state);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1502

struct intel_plane *plane,

drivers/gpu/drm/i915/display/skl_universal_plane.c

1507

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1508

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/skl_universal_plane.c

1524

intel_de_write_dsb(display, dsb, SEL_FETCH_PLANE_POS(pipe, plane->id), val);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1539

intel_de_write_dsb(display, dsb, SEL_FETCH_PLANE_OFFSET(pipe, plane->id), val);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1544

intel_de_write_dsb(display, dsb, SEL_FETCH_PLANE_SIZE(pipe, plane->id), val);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1549

struct intel_plane *plane,

drivers/gpu/drm/i915/display/skl_universal_plane.c

1553

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1554

enum plane_id plane_id = plane->id;

drivers/gpu/drm/i915/display/skl_universal_plane.c

1555

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/skl_universal_plane.c

1615

icl_program_input_csc(dsb, plane, plane_state);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1617

skl_write_plane_wm(dsb, plane, crtc_state);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1624

icl_plane_csc_load_black(dsb, plane, crtc_state);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1626

icl_plane_update_sel_fetch_noarm(dsb, plane, crtc_state, plane_state, color_plane);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1630

struct intel_plane *plane,

drivers/gpu/drm/i915/display/skl_universal_plane.c

1634

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1635

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/skl_universal_plane.c

1641

intel_de_write_dsb(display, dsb, SEL_FETCH_PLANE_CTL(pipe, plane->id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1644

icl_plane_disable_sel_fetch_arm(dsb, plane, crtc_state);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1649

struct intel_plane *plane,

drivers/gpu/drm/i915/display/skl_universal_plane.c

1653

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1654

enum plane_id plane_id = plane->id;

drivers/gpu/drm/i915/display/skl_universal_plane.c

1655

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/skl_universal_plane.c

1669

skl_program_plane_scaler(dsb, plane, crtc_state, plane_state);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1671

icl_plane_update_sel_fetch_arm(dsb, plane, crtc_state, plane_state);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1680

if (plane_has_normalizer(plane))

drivers/gpu/drm/i915/display/skl_universal_plane.c

1682

PLANE_PIXEL_NORMALIZE(plane->pipe, plane->id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1697

struct intel_plane *plane,

drivers/gpu/drm/i915/display/skl_universal_plane.c

1700

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1702

error->ctl = intel_de_read(display, PLANE_CTL(crtc->pipe, plane->id));

drivers/gpu/drm/i915/display/skl_universal_plane.c

1703

error->surf = intel_de_read(display, PLANE_SURF(crtc->pipe, plane->id));

drivers/gpu/drm/i915/display/skl_universal_plane.c

1704

error->surflive = intel_de_read(display, PLANE_SURFLIVE(crtc->pipe, plane->id));

drivers/gpu/drm/i915/display/skl_universal_plane.c

1709

struct intel_plane *plane,

drivers/gpu/drm/i915/display/skl_universal_plane.c

1714

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1715

enum plane_id plane_id = plane->id;

drivers/gpu/drm/i915/display/skl_universal_plane.c

1716

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/skl_universal_plane.c

1751

struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1762

plane->base.base.id, plane->base.name, rotation);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1771

plane->base.base.id, plane->base.name);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1783

plane->base.base.id, plane->base.name);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1791

plane->base.base.id, plane->base.name);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1816

plane->base.base.id, plane->base.name, &fb->format->format);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1829

plane->base.base.id, plane->base.name);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1839

plane->base.base.id, plane->base.name);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1850

struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1868

plane->base.base.id, plane->base.name,

drivers/gpu/drm/i915/display/skl_universal_plane.c

1881

struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1893

plane->base.base.id, plane->base.name);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1916

static int intel_plane_min_width(struct intel_plane *plane,

drivers/gpu/drm/i915/display/skl_universal_plane.c

1921

if (plane->min_width)

drivers/gpu/drm/i915/display/skl_universal_plane.c

1922

return plane->min_width(fb, color_plane, rotation);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1927

static int intel_plane_min_height(struct intel_plane *plane,

drivers/gpu/drm/i915/display/skl_universal_plane.c

1935

static int intel_plane_max_width(struct intel_plane *plane,

drivers/gpu/drm/i915/display/skl_universal_plane.c

1940

if (plane->max_width)

drivers/gpu/drm/i915/display/skl_universal_plane.c

1941

return plane->max_width(fb, color_plane, rotation);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1946

static int intel_plane_max_height(struct intel_plane *plane,

drivers/gpu/drm/i915/display/skl_universal_plane.c

1951

if (plane->max_height)

drivers/gpu/drm/i915/display/skl_universal_plane.c

1952

return plane->max_height(fb, color_plane, rotation);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1962

struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1967

unsigned int alignment = plane->min_alignment(plane, fb, ccs_plane);

drivers/gpu/drm/i915/display/skl_universal_plane.c

2007

struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);

drivers/gpu/drm/i915/display/skl_universal_plane.c

2011

unsigned int alignment = plane->min_alignment(plane, fb, 0);

drivers/gpu/drm/i915/display/skl_universal_plane.c

2042

plane->base.base.id, plane->base.name);

drivers/gpu/drm/i915/display/skl_universal_plane.c

2058

struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);

drivers/gpu/drm/i915/display/skl_universal_plane.c

2065

int min_width = intel_plane_min_width(plane, fb, 0, rotation);

drivers/gpu/drm/i915/display/skl_universal_plane.c

2066

int min_height = intel_plane_min_height(plane, fb, 0, rotation);

drivers/gpu/drm/i915/display/skl_universal_plane.c

2067

int max_width = intel_plane_max_width(plane, fb, 0, rotation);

drivers/gpu/drm/i915/display/skl_universal_plane.c

2068

int max_height = intel_plane_max_height(plane, fb, 0, rotation);

drivers/gpu/drm/i915/display/skl_universal_plane.c

2069

unsigned int alignment = plane->min_alignment(plane, fb, 0);

drivers/gpu/drm/i915/display/skl_universal_plane.c

2077

plane->base.base.id, plane->base.name,

drivers/gpu/drm/i915/display/skl_universal_plane.c

2105

plane->base.base.id, plane->base.name);

drivers/gpu/drm/i915/display/skl_universal_plane.c

2132

struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);

drivers/gpu/drm/i915/display/skl_universal_plane.c

2138

int min_width = intel_plane_min_width(plane, fb, uv_plane, rotation);

drivers/gpu/drm/i915/display/skl_universal_plane.c

2139

int min_height = intel_plane_min_height(plane, fb, uv_plane, rotation);

drivers/gpu/drm/i915/display/skl_universal_plane.c

2140

int max_width = intel_plane_max_width(plane, fb, uv_plane, rotation);

drivers/gpu/drm/i915/display/skl_universal_plane.c

2141

int max_height = intel_plane_max_height(plane, fb, uv_plane, rotation);

drivers/gpu/drm/i915/display/skl_universal_plane.c

2164

plane->base.base.id, plane->base.name,

drivers/gpu/drm/i915/display/skl_universal_plane.c

2175

unsigned int alignment = plane->min_alignment(plane, fb, uv_plane);

drivers/gpu/drm/i915/display/skl_universal_plane.c

2199

plane->base.base.id, plane->base.name);

drivers/gpu/drm/i915/display/skl_universal_plane.c

2369

struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);

drivers/gpu/drm/i915/display/skl_universal_plane.c

2427

icl_is_hdr_plane(display, plane->id))

drivers/gpu/drm/i915/display/skl_universal_plane.c

2442

struct intel_plane *uv_plane = to_intel_plane(uv_plane_state->uapi.plane);

drivers/gpu/drm/i915/display/skl_universal_plane.c

2443

struct intel_plane *y_plane = to_intel_plane(y_plane_state->uapi.plane);

drivers/gpu/drm/i915/display/skl_universal_plane.c

2545

struct intel_plane *plane = to_intel_plane(_plane);

drivers/gpu/drm/i915/display/skl_universal_plane.c

2547

if (!intel_fb_plane_supports_modifier(plane, modifier))

drivers/gpu/drm/i915/display/skl_universal_plane.c

2599

struct intel_plane *plane = to_intel_plane(_plane);

drivers/gpu/drm/i915/display/skl_universal_plane.c

2601

if (!intel_fb_plane_supports_modifier(plane, modifier))

drivers/gpu/drm/i915/display/skl_universal_plane.c

2653

struct intel_plane *plane = to_intel_plane(_plane);

drivers/gpu/drm/i915/display/skl_universal_plane.c

2655

if (!intel_fb_plane_supports_modifier(plane, modifier))

drivers/gpu/drm/i915/display/skl_universal_plane.c

2733

skl_plane_enable_flip_done(struct intel_plane *plane)

drivers/gpu/drm/i915/display/skl_universal_plane.c

2735

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/skl_universal_plane.c

2736

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/skl_universal_plane.c

2739

bdw_enable_pipe_irq(display, pipe, GEN9_PIPE_PLANE_FLIP_DONE(plane->id));

drivers/gpu/drm/i915/display/skl_universal_plane.c

2744

skl_plane_disable_flip_done(struct intel_plane *plane)

drivers/gpu/drm/i915/display/skl_universal_plane.c

2746

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/skl_universal_plane.c

2747

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/skl_universal_plane.c

2750

bdw_disable_pipe_irq(display, pipe, GEN9_PIPE_PLANE_FLIP_DONE(plane->id));

drivers/gpu/drm/i915/display/skl_universal_plane.c

2835

static void skl_disable_tiling(struct intel_plane *plane)

drivers/gpu/drm/i915/display/skl_universal_plane.c

2837

struct intel_plane_state *state = to_intel_plane_state(plane->base.state);

drivers/gpu/drm/i915/display/skl_universal_plane.c

2838

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/skl_universal_plane.c

2842

plane_ctl = intel_de_read(display, PLANE_CTL(plane->pipe, plane->id));

drivers/gpu/drm/i915/display/skl_universal_plane.c

2852

intel_de_write_fw(display, PLANE_STRIDE(plane->pipe, plane->id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

2855

intel_de_write_fw(display, PLANE_CTL(plane->pipe, plane->id), plane_ctl);

drivers/gpu/drm/i915/display/skl_universal_plane.c

2857

intel_de_write_fw(display, PLANE_SURF(plane->pipe, plane->id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

2866

struct intel_plane *plane;

drivers/gpu/drm/i915/display/skl_universal_plane.c

2876

plane = intel_plane_alloc();

drivers/gpu/drm/i915/display/skl_universal_plane.c

2877

if (IS_ERR(plane))

drivers/gpu/drm/i915/display/skl_universal_plane.c

2878

return plane;

drivers/gpu/drm/i915/display/skl_universal_plane.c

2880

plane->pipe = pipe;

drivers/gpu/drm/i915/display/skl_universal_plane.c

2881

plane->id = plane_id;

drivers/gpu/drm/i915/display/skl_universal_plane.c

2882

plane->frontbuffer_bit = INTEL_FRONTBUFFER(pipe, plane_id);

drivers/gpu/drm/i915/display/skl_universal_plane.c

2884

intel_fbc_add_plane(skl_plane_fbc(display, pipe, plane_id), plane);

drivers/gpu/drm/i915/display/skl_universal_plane.c

2887

plane->min_width = adl_plane_min_width;

drivers/gpu/drm/i915/display/skl_universal_plane.c

2888

plane->max_width = xe3_plane_max_width;

drivers/gpu/drm/i915/display/skl_universal_plane.c

2889

plane->max_height = icl_plane_max_height;

drivers/gpu/drm/i915/display/skl_universal_plane.c

2890

plane->min_cdclk = icl_plane_min_cdclk;

drivers/gpu/drm/i915/display/skl_universal_plane.c

2893

plane->min_width = adl_plane_min_width;

drivers/gpu/drm/i915/display/skl_universal_plane.c

2895

plane->min_width = icl_plane_min_width;

drivers/gpu/drm/i915/display/skl_universal_plane.c

2897

plane->max_width = icl_hdr_plane_max_width;

drivers/gpu/drm/i915/display/skl_universal_plane.c

2899

plane->max_width = icl_sdr_plane_max_width;

drivers/gpu/drm/i915/display/skl_universal_plane.c

2900

plane->max_height = icl_plane_max_height;

drivers/gpu/drm/i915/display/skl_universal_plane.c

2901

plane->min_cdclk = icl_plane_min_cdclk;

drivers/gpu/drm/i915/display/skl_universal_plane.c

2903

plane->max_width = glk_plane_max_width;

drivers/gpu/drm/i915/display/skl_universal_plane.c

2904

plane->max_height = skl_plane_max_height;

drivers/gpu/drm/i915/display/skl_universal_plane.c

2905

plane->min_cdclk = glk_plane_min_cdclk;

drivers/gpu/drm/i915/display/skl_universal_plane.c

2907

plane->max_width = skl_plane_max_width;

drivers/gpu/drm/i915/display/skl_universal_plane.c

2908

plane->max_height = skl_plane_max_height;

drivers/gpu/drm/i915/display/skl_universal_plane.c

2909

plane->min_cdclk = skl_plane_min_cdclk;

drivers/gpu/drm/i915/display/skl_universal_plane.c

2911

plane->disable_tiling = skl_disable_tiling;

drivers/gpu/drm/i915/display/skl_universal_plane.c

2913

plane->surf_offset = skl_plane_surf_offset;

drivers/gpu/drm/i915/display/skl_universal_plane.c

2916

plane->max_stride = adl_plane_max_stride;

drivers/gpu/drm/i915/display/skl_universal_plane.c

2918

plane->max_stride = skl_plane_max_stride;

drivers/gpu/drm/i915/display/skl_universal_plane.c

2921

plane->min_alignment = tgl_plane_min_alignment;

drivers/gpu/drm/i915/display/skl_universal_plane.c

2923

plane->min_alignment = skl_plane_min_alignment;

drivers/gpu/drm/i915/display/skl_universal_plane.c

2926

plane->vtd_guard = DISPLAY_VER(display) >= 10 ? 168 : 136;

drivers/gpu/drm/i915/display/skl_universal_plane.c

2929

plane->update_noarm = icl_plane_update_noarm;

drivers/gpu/drm/i915/display/skl_universal_plane.c

2930

plane->update_arm = icl_plane_update_arm;

drivers/gpu/drm/i915/display/skl_universal_plane.c

2931

plane->disable_arm = icl_plane_disable_arm;

drivers/gpu/drm/i915/display/skl_universal_plane.c

2933

plane->update_noarm = skl_plane_update_noarm;

drivers/gpu/drm/i915/display/skl_universal_plane.c

2934

plane->update_arm = skl_plane_update_arm;

drivers/gpu/drm/i915/display/skl_universal_plane.c

2935

plane->disable_arm = skl_plane_disable_arm;

drivers/gpu/drm/i915/display/skl_universal_plane.c

2937

plane->capture_error = skl_plane_capture_error;

drivers/gpu/drm/i915/display/skl_universal_plane.c

2938

plane->get_hw_state = skl_plane_get_hw_state;

drivers/gpu/drm/i915/display/skl_universal_plane.c

2939

plane->check_plane = skl_plane_check;

drivers/gpu/drm/i915/display/skl_universal_plane.c

2942

plane->need_async_flip_toggle_wa = IS_DISPLAY_VER(display, 9, 10);

drivers/gpu/drm/i915/display/skl_universal_plane.c

2943

plane->async_flip = skl_plane_async_flip;

drivers/gpu/drm/i915/display/skl_universal_plane.c

2944

plane->enable_flip_done = skl_plane_enable_flip_done;

drivers/gpu/drm/i915/display/skl_universal_plane.c

2945

plane->disable_flip_done = skl_plane_disable_flip_done;

drivers/gpu/drm/i915/display/skl_universal_plane.c

2948

plane->can_async_flip = tgl_plane_can_async_flip;

drivers/gpu/drm/i915/display/skl_universal_plane.c

2950

plane->can_async_flip = icl_plane_can_async_flip;

drivers/gpu/drm/i915/display/skl_universal_plane.c

2952

plane->can_async_flip = skl_plane_can_async_flip;

drivers/gpu/drm/i915/display/skl_universal_plane.c

2988

ret = drm_universal_plane_init(display->drm, &plane->base,

drivers/gpu/drm/i915/display/skl_universal_plane.c

3010

drm_plane_create_rotation_property(&plane->base,

drivers/gpu/drm/i915/display/skl_universal_plane.c

3019

drm_plane_create_color_properties(&plane->base,

drivers/gpu/drm/i915/display/skl_universal_plane.c

3027

intel_color_pipeline_plane_init(&plane->base, pipe);

drivers/gpu/drm/i915/display/skl_universal_plane.c

3029

drm_plane_create_alpha_property(&plane->base);

drivers/gpu/drm/i915/display/skl_universal_plane.c

3030

drm_plane_create_blend_mode_property(&plane->base,

drivers/gpu/drm/i915/display/skl_universal_plane.c

3035

drm_plane_create_zpos_immutable_property(&plane->base, plane_id);

drivers/gpu/drm/i915/display/skl_universal_plane.c

3038

drm_plane_enable_fb_damage_clips(&plane->base);

drivers/gpu/drm/i915/display/skl_universal_plane.c

3041

drm_plane_create_scaling_filter_property(&plane->base,

drivers/gpu/drm/i915/display/skl_universal_plane.c

3045

intel_plane_helper_add(plane);

drivers/gpu/drm/i915/display/skl_universal_plane.c

3047

return plane;

drivers/gpu/drm/i915/display/skl_universal_plane.c

3050

intel_plane_free(plane);

drivers/gpu/drm/i915/display/skl_universal_plane.c

3061

struct intel_plane *plane = to_intel_plane(crtc->base.primary);

drivers/gpu/drm/i915/display/skl_universal_plane.c

3062

enum plane_id plane_id = plane->id;

drivers/gpu/drm/i915/display/skl_universal_plane.c

3071

if (!plane->get_hw_state(plane, &pipe))

drivers/gpu/drm/i915/display/skl_universal_plane.c

3211

plane->base.base.id, plane->base.name,

drivers/gpu/drm/i915/display/skl_universal_plane.c

3226

struct intel_plane *plane = to_intel_plane(crtc->base.primary);

drivers/gpu/drm/i915/display/skl_universal_plane.c

3228

to_intel_plane_state(plane->base.state);

drivers/gpu/drm/i915/display/skl_universal_plane.c

3229

enum plane_id plane_id = plane->id;

drivers/gpu/drm/i915/display/skl_universal_plane.c

468

plane_max_stride(struct intel_plane *plane,

drivers/gpu/drm/i915/display/skl_universal_plane.c

483

adl_plane_max_stride(struct intel_plane *plane,

drivers/gpu/drm/i915/display/skl_universal_plane.c

490

return plane_max_stride(plane, info,

drivers/gpu/drm/i915/display/skl_universal_plane.c

496

skl_plane_max_stride(struct intel_plane *plane,

drivers/gpu/drm/i915/display/skl_universal_plane.c

503

return plane_max_stride(plane, info,

drivers/gpu/drm/i915/display/skl_universal_plane.c

581

static u32 tgl_plane_min_alignment(struct intel_plane *plane,

drivers/gpu/drm/i915/display/skl_universal_plane.c

585

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/skl_universal_plane.c

599

intel_plane_can_async_flip(plane, fb->format, fb->modifier))

drivers/gpu/drm/i915/display/skl_universal_plane.c

630

static u32 skl_plane_min_alignment(struct intel_plane *plane,

drivers/gpu/drm/i915/display/skl_universal_plane.c

677

struct intel_plane *plane,

drivers/gpu/drm/i915/display/skl_universal_plane.c

680

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/skl_universal_plane.c

681

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/skl_universal_plane.c

682

enum plane_id plane_id = plane->id;

drivers/gpu/drm/i915/display/skl_universal_plane.c

822

struct intel_plane *plane,

drivers/gpu/drm/i915/display/skl_universal_plane.c

825

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/skl_universal_plane.c

826

enum plane_id plane_id = plane->id;

drivers/gpu/drm/i915/display/skl_universal_plane.c

827

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/skl_universal_plane.c

868

struct intel_plane *plane,

drivers/gpu/drm/i915/display/skl_universal_plane.c

871

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/skl_universal_plane.c

872

enum plane_id plane_id = plane->id;

drivers/gpu/drm/i915/display/skl_universal_plane.c

873

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/skl_universal_plane.c

875

skl_write_plane_wm(dsb, plane, crtc_state);

drivers/gpu/drm/i915/display/skl_universal_plane.c

882

struct intel_plane *plane,

drivers/gpu/drm/i915/display/skl_universal_plane.c

885

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/skl_universal_plane.c

886

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/skl_universal_plane.c

891

intel_de_write_dsb(display, dsb, SEL_FETCH_PLANE_CTL(pipe, plane->id), 0);

drivers/gpu/drm/i915/display/skl_universal_plane.c

894

static bool plane_has_normalizer(struct intel_plane *plane)

drivers/gpu/drm/i915/display/skl_universal_plane.c

896

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/skl_universal_plane.c

898

return HAS_PIXEL_NORMALIZER(display) && icl_is_hdr_plane(display, plane->id);

drivers/gpu/drm/i915/display/skl_universal_plane.c

912

struct intel_plane *plane,

drivers/gpu/drm/i915/display/skl_universal_plane.c

915

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/skl_universal_plane.c

916

enum plane_id plane_id = plane->id;

drivers/gpu/drm/i915/display/skl_universal_plane.c

917

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/skl_universal_plane.c

922

skl_write_plane_wm(dsb, plane, crtc_state);

drivers/gpu/drm/i915/display/skl_universal_plane.c

924

icl_plane_disable_sel_fetch_arm(dsb, plane, crtc_state);

drivers/gpu/drm/i915/display/skl_universal_plane.c

926

if (plane_has_normalizer(plane))

drivers/gpu/drm/i915/display/skl_universal_plane.c

928

PLANE_PIXEL_NORMALIZE(plane->pipe, plane->id), 0);

drivers/gpu/drm/i915/display/skl_universal_plane.c

935

skl_plane_get_hw_state(struct intel_plane *plane,

drivers/gpu/drm/i915/display/skl_universal_plane.c

938

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/skl_universal_plane.c

940

enum plane_id plane_id = plane->id;

drivers/gpu/drm/i915/display/skl_universal_plane.c

944

power_domain = POWER_DOMAIN_PIPE(plane->pipe);

drivers/gpu/drm/i915/display/skl_universal_plane.c

949

ret = intel_de_read(display, PLANE_CTL(plane->pipe, plane_id)) & PLANE_CTL_ENABLE;

drivers/gpu/drm/i915/display/skl_universal_plane.c

951

*pipe = plane->pipe;

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

106

#define PLANE_STRIDE(pipe, plane) _MMIO_SKL_PLANE((pipe), (plane), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

11

#define _SKL_PLANE(pipe, plane, reg_1_a, reg_1_b, reg_2_a, reg_2_b) \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

116

#define PLANE_POS(pipe, plane) _MMIO_SKL_PLANE((pipe), (plane), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

12

_PLANE((plane), _PIPE((pipe), (reg_1_a), (reg_1_b)), _PIPE((pipe), (reg_2_a), (reg_2_b)))

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

128

#define PLANE_SIZE(pipe, plane) _MMIO_SKL_PLANE((pipe), (plane), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

13

#define _SKL_PLANE_DW(pipe, plane, dw, reg_1_a, reg_1_b, reg_2_a, reg_2_b) \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

14

(_SKL_PLANE((pipe), (plane), (reg_1_a), (reg_1_b), (reg_2_a), (reg_2_b)) + (dw) * 4)

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

140

#define PLANE_KEYVAL(pipe, plane) _MMIO_SKL_PLANE((pipe), (plane),\

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

148

#define PLANE_KEYMSK(pipe, plane) _MMIO_SKL_PLANE((pipe), (plane), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

15

#define _MMIO_SKL_PLANE(pipe, plane, reg_1_a, reg_1_b, reg_2_a, reg_2_b) \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

157

#define PLANE_SURF(pipe, plane) _MMIO_SKL_PLANE((pipe), (plane), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

16

_MMIO(_SKL_PLANE((pipe), (plane), (reg_1_a), (reg_1_b), (reg_2_a), (reg_2_b)))

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

168

#define PLANE_KEYMAX(pipe, plane) _MMIO_SKL_PLANE((pipe), (plane), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

17

#define _MMIO_SKL_PLANE_DW(pipe, plane, dw, reg_1_a, reg_1_b, reg_2_a, reg_2_b) \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

178

#define PLANE_OFFSET(pipe, plane) _MMIO_SKL_PLANE((pipe), (plane), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

18

_MMIO(_SKL_PLANE_DW((pipe), (plane), (dw), (reg_1_a), (reg_1_b), (reg_2_a), (reg_2_b)))

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

190

#define PLANE_SURFLIVE(pipe, plane) _MMIO_SKL_PLANE((pipe), (plane), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

198

#define PLANE_CC_VAL(pipe, plane, dw) _MMIO_SKL_PLANE_DW((pipe), (plane), (dw), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

20

#define _SEL_FETCH(pipe, plane, reg_1_a, reg_1_b, reg_2_a, reg_2_b, reg_5_a, reg_5_b, reg_6_a, reg_6_b) \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

206

#define PLANE_AUX_DIST(pipe, plane) _MMIO_SKL_PLANE((pipe), (plane), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

21

_PICK_EVEN_2RANGES((plane), PLANE_5, \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

217

#define PLANE_AUX_OFFSET(pipe, plane) _MMIO_SKL_PLANE((pipe), (plane), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

225

#define PLANE_CUS_CTL(pipe, plane) _MMIO_SKL_PLANE((pipe), (plane), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

249

#define PLANE_COLOR_CTL(pipe, plane) _MMIO_SKL_PLANE((pipe), (plane), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

26

#define _MMIO_SEL_FETCH(pipe, plane, reg_1_a, reg_1_b, reg_2_a, reg_2_b, reg_5_a, reg_5_b, reg_6_a, reg_6_b) \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

27

_MMIO(_SEL_FETCH((pipe), (plane), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

275

#define PLANE_INPUT_CSC_COEFF(pipe, plane, index) _MMIO_SKL_PLANE_DW((pipe), (plane), (index), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

283

#define PLANE_INPUT_CSC_PREOFF(pipe, plane, index) _MMIO_SKL_PLANE_DW((pipe), (plane), (index), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

291

#define PLANE_INPUT_CSC_POSTOFF(pipe, plane, index) _MMIO_SKL_PLANE_DW((pipe), (plane), (index), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

295

#define _MMIO_PLANE_GAMC(plane, i, a, b) _MMIO(_PIPE(plane, a, b) + (i) * 4)

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

305

#define PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH(pipe, plane, i) _MMIO_PLANE_GAMC(plane, i, _PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH_1(pipe), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

316

#define PLANE_POST_CSC_GAMC_SEG0_DATA_ENH(pipe, plane, i) _MMIO_PLANE_GAMC(plane, i, _PLANE_POST_CSC_GAMC_SEG0_DATA_ENH_1(pipe), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

327

#define PLANE_POST_CSC_GAMC_INDEX_ENH(pipe, plane, i) _MMIO_PLANE_GAMC(plane, i, _PLANE_POST_CSC_GAMC_INDEX_ENH_1(pipe), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

338

#define PLANE_POST_CSC_GAMC_DATA_ENH(pipe, plane, i) _MMIO_PLANE_GAMC(plane, i, _PLANE_POST_CSC_GAMC_DATA_ENH_1(pipe), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

349

#define PLANE_POST_CSC_GAMC_INDEX(pipe, plane, i) _MMIO_PLANE_GAMC(plane, i, _PLANE_POST_CSC_GAMC_INDEX_1(pipe), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

35

#define PLANE_CTL(pipe, plane) _MMIO_SKL_PLANE((pipe), (plane), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

360

#define PLANE_POST_CSC_GAMC_DATA(pipe, plane, i) _MMIO_PLANE_GAMC(plane, i, _PLANE_POST_CSC_GAMC_DATA_1(pipe), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

371

#define PLANE_PRE_CSC_GAMC_INDEX_ENH(pipe, plane, i) _MMIO_PLANE_GAMC(plane, i, _PLANE_PRE_CSC_GAMC_INDEX_ENH_1(pipe), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

383

#define PLANE_PRE_CSC_GAMC_DATA_ENH(pipe, plane, i) _MMIO_PLANE_GAMC(plane, i, _PLANE_PRE_CSC_GAMC_DATA_ENH_1(pipe), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

394

#define PLANE_PRE_CSC_GAMC_INDEX(pipe, plane, i) _MMIO_PLANE_GAMC(plane, i, _PLANE_PRE_CSC_GAMC_INDEX_1(pipe), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

405

#define PLANE_PRE_CSC_GAMC_DATA(pipe, plane, i) _MMIO_PLANE_GAMC(plane, i, _PLANE_PRE_CSC_GAMC_DATA_1(pipe), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

412

#define PLANE_CSC_COEFF(pipe, plane, index) _MMIO_SKL_PLANE_DW((pipe), (plane), (index), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

420

#define PLANE_CSC_PREOFF(pipe, plane, index) _MMIO_SKL_PLANE_DW((pipe), (plane), (index), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

428

#define PLANE_CSC_POSTOFF(pipe, plane, index) _MMIO_SKL_PLANE_DW((pipe), (plane), (index), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

435

#define PLANE_WM(pipe, plane, level) _MMIO_SKL_PLANE_DW((pipe), (plane), (level), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

448

#define PLANE_WM_SAGV(pipe, plane) _MMIO_SKL_PLANE((pipe), (plane), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

456

#define PLANE_WM_SAGV_TRANS(pipe, plane) _MMIO_SKL_PLANE((pipe), (plane), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

464

#define PLANE_WM_TRANS(pipe, plane) _MMIO_SKL_PLANE((pipe), (plane), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

472

#define PLANE_CHICKEN(pipe, plane) _MMIO_SKL_PLANE((pipe), (plane), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

481

#define PLANE_NV12_BUF_CFG(pipe, plane) _MMIO_SKL_PLANE((pipe), (plane), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

489

#define PLANE_BUF_CFG(pipe, plane) _MMIO_SKL_PLANE((pipe), (plane), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

503

#define PLANE_MIN_BUF_CFG(pipe, plane) _MMIO_SKL_PLANE((pipe), (plane), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

521

#define SEL_FETCH_PLANE_CTL(pipe, plane) _MMIO_SEL_FETCH((pipe), (plane),\

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

537

#define SEL_FETCH_PLANE_POS(pipe, plane) _MMIO_SEL_FETCH((pipe), (plane),\

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

552

#define SEL_FETCH_PLANE_SIZE(pipe, plane) _MMIO_SEL_FETCH((pipe), (plane),\

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

567

#define SEL_FETCH_PLANE_OFFSET(pipe, plane) _MMIO_SEL_FETCH((pipe), (plane),\

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

577

#define PLANE_PIXEL_NORMALIZE(pipe, plane) _MMIO_SKL_PLANE((pipe), (plane), \

drivers/gpu/drm/i915/display/skl_watermark.c

1264

struct intel_plane *plane)

drivers/gpu/drm/i915/display/skl_watermark.c

1266

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/skl_watermark.c

1271

plane->async_flip;

drivers/gpu/drm/i915/display/skl_watermark.c

1276

struct intel_plane *plane, int width, int height,

drivers/gpu/drm/i915/display/skl_watermark.c

1284

if (use_minimal_wm0_only(crtc_state, plane))

drivers/gpu/drm/i915/display/skl_watermark.c

1793

static bool xe3_auto_min_alloc_capable(struct intel_plane *plane, int level)

drivers/gpu/drm/i915/display/skl_watermark.c

1795

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/skl_watermark.c

1797

return DISPLAY_VER(display) >= 30 && level == 0 && plane->id != PLANE_CURSOR;

drivers/gpu/drm/i915/display/skl_watermark.c

1801

struct intel_plane *plane,

drivers/gpu/drm/i915/display/skl_watermark.c

1814

(use_minimal_wm0_only(crtc_state, plane) && level > 0)) {

drivers/gpu/drm/i915/display/skl_watermark.c

1937

result->auto_min_alloc_wm_enable = xe3_auto_min_alloc_capable(plane, level);

drivers/gpu/drm/i915/display/skl_watermark.c

1945

struct intel_plane *plane,

drivers/gpu/drm/i915/display/skl_watermark.c

1957

skl_compute_plane_wm(crtc_state, plane, level, latency,

drivers/gpu/drm/i915/display/skl_watermark.c

1965

struct intel_plane *plane,

drivers/gpu/drm/i915/display/skl_watermark.c

1978

skl_compute_plane_wm(crtc_state, plane, 0, latency,

drivers/gpu/drm/i915/display/skl_watermark.c

2048

struct intel_plane *plane, int color_plane)

drivers/gpu/drm/i915/display/skl_watermark.c

2051

struct skl_plane_wm *wm = &crtc_state->wm.skl.raw.planes[plane->id];

drivers/gpu/drm/i915/display/skl_watermark.c

2060

skl_compute_wm_levels(crtc_state, plane, &wm_params, wm->wm);

drivers/gpu/drm/i915/display/skl_watermark.c

2066

tgl_compute_sagv_wm(crtc_state, plane, &wm_params, wm);

drivers/gpu/drm/i915/display/skl_watermark.c

2077

struct intel_plane *plane)

drivers/gpu/drm/i915/display/skl_watermark.c

2080

struct skl_plane_wm *wm = &crtc_state->wm.skl.raw.planes[plane->id];

drivers/gpu/drm/i915/display/skl_watermark.c

2091

skl_compute_wm_levels(crtc_state, plane, &wm_params, uv_wm);

drivers/gpu/drm/i915/display/skl_watermark.c

2106

struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);

drivers/gpu/drm/i915/display/skl_watermark.c

2107

enum plane_id plane_id = plane->id;

drivers/gpu/drm/i915/display/skl_watermark.c

2118

plane, 0);

drivers/gpu/drm/i915/display/skl_watermark.c

2124

plane);

drivers/gpu/drm/i915/display/skl_watermark.c

2136

struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);

drivers/gpu/drm/i915/display/skl_watermark.c

2137

enum plane_id plane_id = plane->id;

drivers/gpu/drm/i915/display/skl_watermark.c

2161

plane, 1);

drivers/gpu/drm/i915/display/skl_watermark.c

2166

plane, 0);

drivers/gpu/drm/i915/display/skl_watermark.c

2177

struct intel_plane *plane = to_intel_plane(crtc_state->uapi.crtc->primary);

drivers/gpu/drm/i915/display/skl_watermark.c

2216

skl_compute_plane_wm(crtc_state, plane, level, latency, &wp, &wm, &wm);

drivers/gpu/drm/i915/display/skl_watermark.c

2349

struct intel_plane *plane;

drivers/gpu/drm/i915/display/skl_watermark.c

2352

for_each_new_intel_plane_in_state(state, plane, plane_state, i) {

drivers/gpu/drm/i915/display/skl_watermark.c

2358

if (plane->pipe != crtc->pipe)

drivers/gpu/drm/i915/display/skl_watermark.c

2442

struct intel_plane *plane;

drivers/gpu/drm/i915/display/skl_watermark.c

2444

for_each_intel_plane_on_crtc(display->drm, crtc, plane) {

drivers/gpu/drm/i915/display/skl_watermark.c

2446

enum plane_id plane_id = plane->id;

drivers/gpu/drm/i915/display/skl_watermark.c

2456

plane->base.base.id, plane->base.name);

drivers/gpu/drm/i915/display/skl_watermark.c

2460

plane_state = intel_atomic_get_plane_state(state, plane);

drivers/gpu/drm/i915/display/skl_watermark.c

2602

skl_print_plane_ddb_changes(struct intel_plane *plane,

drivers/gpu/drm/i915/display/skl_watermark.c

2607

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/skl_watermark.c

2611

plane->base.base.id, plane->base.name, ddb_name,

drivers/gpu/drm/i915/display/skl_watermark.c

2637

skl_print_plane_wm_changes(struct intel_plane *plane,

drivers/gpu/drm/i915/display/skl_watermark.c

2641

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/skl_watermark.c

2645

plane->base.base.id, plane->base.name,

drivers/gpu/drm/i915/display/skl_watermark.c

2651

plane->base.base.id, plane->base.name,

drivers/gpu/drm/i915/display/skl_watermark.c

2657

plane->base.base.id, plane->base.name,

drivers/gpu/drm/i915/display/skl_watermark.c

2663

plane->base.base.id, plane->base.name,

drivers/gpu/drm/i915/display/skl_watermark.c

2672

plane->base.base.id, plane->base.name,

drivers/gpu/drm/i915/display/skl_watermark.c

2688

struct intel_plane *plane;

drivers/gpu/drm/i915/display/skl_watermark.c

2700

for_each_intel_plane_on_crtc(display->drm, crtc, plane) {

drivers/gpu/drm/i915/display/skl_watermark.c

2701

enum plane_id plane_id = plane->id;

drivers/gpu/drm/i915/display/skl_watermark.c

2708

skl_print_plane_ddb_changes(plane, old, new, "ddb");

drivers/gpu/drm/i915/display/skl_watermark.c

2717

skl_print_plane_ddb_changes(plane, old, new, "ddb_y");

drivers/gpu/drm/i915/display/skl_watermark.c

2720

for_each_intel_plane_on_crtc(display->drm, crtc, plane) {

drivers/gpu/drm/i915/display/skl_watermark.c

2721

enum plane_id plane_id = plane->id;

drivers/gpu/drm/i915/display/skl_watermark.c

2730

skl_print_plane_wm_changes(plane, old_wm, new_wm);

drivers/gpu/drm/i915/display/skl_watermark.c

2735

static bool skl_plane_selected_wm_equals(struct intel_plane *plane,

drivers/gpu/drm/i915/display/skl_watermark.c

2739

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/skl_watermark.c

2743

if (!skl_wm_level_equals(skl_plane_wm_level(old_pipe_wm, plane->id, level),

drivers/gpu/drm/i915/display/skl_watermark.c

2744

skl_plane_wm_level(new_pipe_wm, plane->id, level)))

drivers/gpu/drm/i915/display/skl_watermark.c

2749

const struct skl_plane_wm *old_wm = &old_pipe_wm->planes[plane->id];

drivers/gpu/drm/i915/display/skl_watermark.c

2750

const struct skl_plane_wm *new_wm = &new_pipe_wm->planes[plane->id];

drivers/gpu/drm/i915/display/skl_watermark.c

2757

return skl_wm_level_equals(skl_plane_trans_wm(old_pipe_wm, plane->id),

drivers/gpu/drm/i915/display/skl_watermark.c

2758

skl_plane_trans_wm(new_pipe_wm, plane->id));

drivers/gpu/drm/i915/display/skl_watermark.c

2791

struct intel_plane *plane;

drivers/gpu/drm/i915/display/skl_watermark.c

2793

for_each_intel_plane_on_crtc(display->drm, crtc, plane) {

drivers/gpu/drm/i915/display/skl_watermark.c

2795

enum plane_id plane_id = plane->id;

drivers/gpu/drm/i915/display/skl_watermark.c

2806

skl_plane_selected_wm_equals(plane,

drivers/gpu/drm/i915/display/skl_watermark.c

2813

plane->base.base.id, plane->base.name);

drivers/gpu/drm/i915/display/skl_watermark.c

2817

plane_state = intel_atomic_get_plane_state(state, plane);

drivers/gpu/drm/i915/display/skl_watermark.c

3805

struct intel_plane *plane = to_intel_plane(crtc->base.primary);

drivers/gpu/drm/i915/display/skl_watermark.c

3807

to_intel_plane_state(plane->base.state);

drivers/gpu/drm/i915/display/skl_watermark.c

3812

intel_plane_disable_noatomic(crtc, plane);

drivers/gpu/drm/i915/display/skl_watermark.c

3849

struct intel_plane *plane)

drivers/gpu/drm/i915/display/skl_watermark.c

3858

skl_ddb_entry_init(&crtc_state->wm.skl.plane_ddb[plane->id], 0, 0);

drivers/gpu/drm/i915/display/skl_watermark.c

3859

skl_ddb_entry_init(&crtc_state->wm.skl.plane_ddb_y[plane->id], 0, 0);

drivers/gpu/drm/i915/display/skl_watermark.c

3861

crtc_state->wm.skl.plane_min_ddb[plane->id] = 0;

drivers/gpu/drm/i915/display/skl_watermark.c

3862

crtc_state->wm.skl.plane_interim_ddb[plane->id] = 0;

drivers/gpu/drm/i915/display/skl_watermark.c

3864

memset(&crtc_state->wm.skl.raw.planes[plane->id], 0,

drivers/gpu/drm/i915/display/skl_watermark.c

3865

sizeof(crtc_state->wm.skl.raw.planes[plane->id]));

drivers/gpu/drm/i915/display/skl_watermark.c

3866

memset(&crtc_state->wm.skl.optimal.planes[plane->id], 0,

drivers/gpu/drm/i915/display/skl_watermark.c

3867

sizeof(crtc_state->wm.skl.optimal.planes[plane->id]));

drivers/gpu/drm/i915/display/skl_watermark.c

3870

static void skl_wm_level_verify(struct intel_plane *plane,

drivers/gpu/drm/i915/display/skl_watermark.c

3875

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/skl_watermark.c

3882

plane->base.base.id, plane->base.name, wm_name,

drivers/gpu/drm/i915/display/skl_watermark.c

3887

static void skl_ddb_entry_verify(struct intel_plane *plane,

drivers/gpu/drm/i915/display/skl_watermark.c

3892

struct intel_display *display = to_intel_display(plane);

drivers/gpu/drm/i915/display/skl_watermark.c

3899

plane->base.base.id, plane->base.name, ddb_name,

drivers/gpu/drm/i915/display/skl_watermark.c

3918

struct intel_plane *plane;

drivers/gpu/drm/i915/display/skl_watermark.c

3942

for_each_intel_plane_on_crtc(display->drm, crtc, plane) {

drivers/gpu/drm/i915/display/skl_watermark.c

3944

&hw->wm.planes[plane->id];

drivers/gpu/drm/i915/display/skl_watermark.c

3946

&sw_wm->planes[plane->id];

drivers/gpu/drm/i915/display/skl_watermark.c

3953

skl_wm_level_verify(plane, wm_name,

drivers/gpu/drm/i915/display/skl_watermark.c

3955

skl_plane_wm_level(sw_wm, plane->id, level));

drivers/gpu/drm/i915/display/skl_watermark.c

3958

skl_wm_level_verify(plane, "trans WM",

drivers/gpu/drm/i915/display/skl_watermark.c

3960

skl_plane_trans_wm(sw_wm, plane->id));

drivers/gpu/drm/i915/display/skl_watermark.c

3963

skl_wm_level_verify(plane, "SAGV WM",

drivers/gpu/drm/i915/display/skl_watermark.c

3967

skl_wm_level_verify(plane, "SAGV trans WM",

drivers/gpu/drm/i915/display/skl_watermark.c

3972

skl_ddb_entry_verify(plane, "DDB",

drivers/gpu/drm/i915/display/skl_watermark.c

3973

&hw->ddb[plane->id],

drivers/gpu/drm/i915/display/skl_watermark.c

3974

&new_crtc_state->wm.skl.plane_ddb[plane->id]);

drivers/gpu/drm/i915/display/skl_watermark.c

3976

skl_ddb_entry_verify(plane, "DDB Y",

drivers/gpu/drm/i915/display/skl_watermark.c

3977

&hw->ddb_y[plane->id],

drivers/gpu/drm/i915/display/skl_watermark.c

3978

&new_crtc_state->wm.skl.plane_ddb_y[plane->id]);

drivers/gpu/drm/i915/display/skl_watermark.c

599

struct intel_plane *plane,

drivers/gpu/drm/i915/display/skl_watermark.c

633

struct intel_plane *plane = to_intel_plane(crtc_state->uapi.crtc->cursor);

drivers/gpu/drm/i915/display/skl_watermark.c

656

skl_compute_plane_wm(crtc_state, plane, level, latency, &wp, &wm, &wm);

drivers/gpu/drm/i915/display/skl_watermark.h

42

struct intel_plane *plane);

drivers/gpu/drm/i915/display/skl_watermark.h

59

struct intel_plane *plane, int width,

drivers/gpu/drm/i915/gvt/cmd_parser.c

1275

int plane;

drivers/gpu/drm/i915/gvt/cmd_parser.c

1288

int plane;

drivers/gpu/drm/i915/gvt/cmd_parser.c

1317

info->plane = gen8_plane_code[v].plane;

drivers/gpu/drm/i915/gvt/cmd_parser.c

1324

if (info->plane == PLANE_A) {

drivers/gpu/drm/i915/gvt/cmd_parser.c

1328

} else if (info->plane == PLANE_B) {

drivers/gpu/drm/i915/gvt/cmd_parser.c

1348

u32 plane = (dword0 & GENMASK(12, 8)) >> 8;

drivers/gpu/drm/i915/gvt/cmd_parser.c

1350

info->plane = PRIMARY_PLANE;

drivers/gpu/drm/i915/gvt/cmd_parser.c

1352

switch (plane) {

drivers/gpu/drm/i915/gvt/cmd_parser.c

1369

info->plane = SPRITE_PLANE;

drivers/gpu/drm/i915/gvt/cmd_parser.c

1374

info->plane = SPRITE_PLANE;

drivers/gpu/drm/i915/gvt/cmd_parser.c

1379

info->plane = SPRITE_PLANE;

drivers/gpu/drm/i915/gvt/cmd_parser.c

1383

gvt_vgpu_err("unknown plane code %d\n", plane);

drivers/gpu/drm/i915/gvt/cmd_parser.c

1448

if (info->plane == PLANE_PRIMARY)

drivers/gpu/drm/i915/gvt/fb_decoder.c

213

struct intel_vgpu_primary_plane_format *plane)

drivers/gpu/drm/i915/gvt/fb_decoder.c

225

plane->enabled = !!(val & DISP_ENABLE);

drivers/gpu/drm/i915/gvt/fb_decoder.c

226

if (!plane->enabled)

drivers/gpu/drm/i915/gvt/fb_decoder.c

230

plane->tiled = val & PLANE_CTL_TILED_MASK;

drivers/gpu/drm/i915/gvt/fb_decoder.c

242

plane->bpp = skl_pixel_formats[fmt].bpp;

drivers/gpu/drm/i915/gvt/fb_decoder.c

243

plane->drm_format = skl_pixel_formats[fmt].drm_format;

drivers/gpu/drm/i915/gvt/fb_decoder.c

245

plane->tiled = val & DISP_TILED;

drivers/gpu/drm/i915/gvt/fb_decoder.c

247

plane->bpp = bdw_pixel_formats[fmt].bpp;

drivers/gpu/drm/i915/gvt/fb_decoder.c

248

plane->drm_format = bdw_pixel_formats[fmt].drm_format;

drivers/gpu/drm/i915/gvt/fb_decoder.c

251

if (!plane->bpp) {

drivers/gpu/drm/i915/gvt/fb_decoder.c

256

plane->hw_format = fmt;

drivers/gpu/drm/i915/gvt/fb_decoder.c

258

plane->base = vgpu_vreg_t(vgpu, DSPSURF(display, pipe)) & I915_GTT_PAGE_MASK;

drivers/gpu/drm/i915/gvt/fb_decoder.c

259

if (!vgpu_gmadr_is_valid(vgpu, plane->base))

drivers/gpu/drm/i915/gvt/fb_decoder.c

262

plane->base_gpa = intel_vgpu_gma_to_gpa(vgpu->gtt.ggtt_mm, plane->base);

drivers/gpu/drm/i915/gvt/fb_decoder.c

263

if (plane->base_gpa == INTEL_GVT_INVALID_ADDR) {

drivers/gpu/drm/i915/gvt/fb_decoder.c

265

plane->base);

drivers/gpu/drm/i915/gvt/fb_decoder.c

269

plane->stride = intel_vgpu_get_stride(vgpu, pipe, plane->tiled,

drivers/gpu/drm/i915/gvt/fb_decoder.c

272

_PRI_PLANE_STRIDE_MASK, plane->bpp);

drivers/gpu/drm/i915/gvt/fb_decoder.c

274

plane->width = (vgpu_vreg_t(vgpu, PIPESRC(display, pipe)) & _PIPE_H_SRCSZ_MASK) >>

drivers/gpu/drm/i915/gvt/fb_decoder.c

276

plane->width += 1;

drivers/gpu/drm/i915/gvt/fb_decoder.c

277

plane->height = (vgpu_vreg_t(vgpu, PIPESRC(display, pipe)) &

drivers/gpu/drm/i915/gvt/fb_decoder.c

279

plane->height += 1; /* raw height is one minus the real value */

drivers/gpu/drm/i915/gvt/fb_decoder.c

282

plane->x_offset = (val & _PRI_PLANE_X_OFF_MASK) >>

drivers/gpu/drm/i915/gvt/fb_decoder.c

284

plane->y_offset = (val & _PRI_PLANE_Y_OFF_MASK) >>

drivers/gpu/drm/i915/gvt/fb_decoder.c

344

struct intel_vgpu_cursor_plane_format *plane)

drivers/gpu/drm/i915/gvt/fb_decoder.c

358

plane->enabled = (mode != MCURSOR_MODE_DISABLE);

drivers/gpu/drm/i915/gvt/fb_decoder.c

359

if (!plane->enabled)

drivers/gpu/drm/i915/gvt/fb_decoder.c

368

plane->mode = mode;

drivers/gpu/drm/i915/gvt/fb_decoder.c

369

plane->bpp = cursor_pixel_formats[index].bpp;

drivers/gpu/drm/i915/gvt/fb_decoder.c

370

plane->drm_format = cursor_pixel_formats[index].drm_format;

drivers/gpu/drm/i915/gvt/fb_decoder.c

371

plane->width = cursor_pixel_formats[index].width;

drivers/gpu/drm/i915/gvt/fb_decoder.c

372

plane->height = cursor_pixel_formats[index].height;

drivers/gpu/drm/i915/gvt/fb_decoder.c

382

plane->base = vgpu_vreg_t(vgpu, CURBASE(display, pipe)) & I915_GTT_PAGE_MASK;

drivers/gpu/drm/i915/gvt/fb_decoder.c

383

if (!vgpu_gmadr_is_valid(vgpu, plane->base))

drivers/gpu/drm/i915/gvt/fb_decoder.c

386

plane->base_gpa = intel_vgpu_gma_to_gpa(vgpu->gtt.ggtt_mm, plane->base);

drivers/gpu/drm/i915/gvt/fb_decoder.c

387

if (plane->base_gpa == INTEL_GVT_INVALID_ADDR) {

drivers/gpu/drm/i915/gvt/fb_decoder.c

389

plane->base);

drivers/gpu/drm/i915/gvt/fb_decoder.c

394

plane->x_pos = (val & _CURSOR_POS_X_MASK) >> _CURSOR_POS_X_SHIFT;

drivers/gpu/drm/i915/gvt/fb_decoder.c

395

plane->x_sign = (val & _CURSOR_SIGN_X_MASK) >> _CURSOR_SIGN_X_SHIFT;

drivers/gpu/drm/i915/gvt/fb_decoder.c

396

plane->y_pos = (val & _CURSOR_POS_Y_MASK) >> _CURSOR_POS_Y_SHIFT;

drivers/gpu/drm/i915/gvt/fb_decoder.c

397

plane->y_sign = (val & _CURSOR_SIGN_Y_MASK) >> _CURSOR_SIGN_Y_SHIFT;

drivers/gpu/drm/i915/gvt/fb_decoder.c

399

plane->x_hot = vgpu_vreg_t(vgpu, vgtif_reg(cursor_x_hot));

drivers/gpu/drm/i915/gvt/fb_decoder.c

400

plane->y_hot = vgpu_vreg_t(vgpu, vgtif_reg(cursor_y_hot));

drivers/gpu/drm/i915/gvt/fb_decoder.h

154

struct intel_vgpu_primary_plane_format *plane);

drivers/gpu/drm/i915/gvt/fb_decoder.h

156

struct intel_vgpu_cursor_plane_format *plane);

drivers/gpu/drm/i915/gvt/handlers.c

1077

enum plane_id plane = REG_50080_TO_PLANE(offset);

drivers/gpu/drm/i915/gvt/handlers.c

1078

int event = SKL_FLIP_EVENT(pipe, plane);

drivers/gpu/drm/i915/gvt/handlers.c

1081

if (plane == PLANE_PRIMARY) {

drivers/gpu/drm/i915/gvt/reg.h

60

#define SKL_FLIP_EVENT(pipe, plane) (PRIMARY_A_FLIP_DONE + (plane) * 3 + (pipe))

drivers/gpu/drm/i915/i915_debugfs.c

225

vma->gtt_view.rotated.plane[0].width,

drivers/gpu/drm/i915/i915_debugfs.c

226

vma->gtt_view.rotated.plane[0].height,

drivers/gpu/drm/i915/i915_debugfs.c

227

vma->gtt_view.rotated.plane[0].src_stride,

drivers/gpu/drm/i915/i915_debugfs.c

228

vma->gtt_view.rotated.plane[0].dst_stride,

drivers/gpu/drm/i915/i915_debugfs.c

229

vma->gtt_view.rotated.plane[0].offset,

drivers/gpu/drm/i915/i915_debugfs.c

230

vma->gtt_view.rotated.plane[1].width,

drivers/gpu/drm/i915/i915_debugfs.c

231

vma->gtt_view.rotated.plane[1].height,

drivers/gpu/drm/i915/i915_debugfs.c

232

vma->gtt_view.rotated.plane[1].src_stride,

drivers/gpu/drm/i915/i915_debugfs.c

233

vma->gtt_view.rotated.plane[1].dst_stride,

drivers/gpu/drm/i915/i915_debugfs.c

234

vma->gtt_view.rotated.plane[1].offset);

drivers/gpu/drm/i915/i915_debugfs.c

239

vma->gtt_view.remapped.plane[0].width,

drivers/gpu/drm/i915/i915_debugfs.c

240

vma->gtt_view.remapped.plane[0].height,

drivers/gpu/drm/i915/i915_debugfs.c

241

vma->gtt_view.remapped.plane[0].src_stride,

drivers/gpu/drm/i915/i915_debugfs.c

242

vma->gtt_view.remapped.plane[0].dst_stride,

drivers/gpu/drm/i915/i915_debugfs.c

243

vma->gtt_view.remapped.plane[0].offset,

drivers/gpu/drm/i915/i915_debugfs.c

244

vma->gtt_view.remapped.plane[1].width,

drivers/gpu/drm/i915/i915_debugfs.c

245

vma->gtt_view.remapped.plane[1].height,

drivers/gpu/drm/i915/i915_debugfs.c

246

vma->gtt_view.remapped.plane[1].src_stride,

drivers/gpu/drm/i915/i915_debugfs.c

247

vma->gtt_view.remapped.plane[1].dst_stride,

drivers/gpu/drm/i915/i915_debugfs.c

248

vma->gtt_view.remapped.plane[1].offset);

drivers/gpu/drm/i915/i915_gtt_view_types.h

28

struct intel_remapped_plane_info plane[2];

drivers/gpu/drm/i915/i915_gtt_view_types.h

37

struct intel_remapped_plane_info plane[4];

drivers/gpu/drm/i915/i915_initial_plane.c

257

struct drm_i915_private *dev_priv = to_i915(_plane_state->plane->dev);

drivers/gpu/drm/i915/i915_vma.c

1041

for (i = 0 ; i < ARRAY_SIZE(rot_info->plane); i++)

drivers/gpu/drm/i915/i915_vma.c

1042

sg = rotate_pages(obj, rot_info->plane[i].offset,

drivers/gpu/drm/i915/i915_vma.c

1043

rot_info->plane[i].width, rot_info->plane[i].height,

drivers/gpu/drm/i915/i915_vma.c

1044

rot_info->plane[i].src_stride,

drivers/gpu/drm/i915/i915_vma.c

1045

rot_info->plane[i].dst_stride,

drivers/gpu/drm/i915/i915_vma.c

1055

obj->base.size, rot_info->plane[0].width,

drivers/gpu/drm/i915/i915_vma.c

1056

rot_info->plane[0].height, size);

drivers/gpu/drm/i915/i915_vma.c

1205

if (rem_info->plane[color_plane].linear)

drivers/gpu/drm/i915/i915_vma.c

1207

rem_info->plane[color_plane].offset,

drivers/gpu/drm/i915/i915_vma.c

1209

rem_info->plane[color_plane].size,

drivers/gpu/drm/i915/i915_vma.c

1215

rem_info->plane[color_plane].offset,

drivers/gpu/drm/i915/i915_vma.c

1217

rem_info->plane[color_plane].width,

drivers/gpu/drm/i915/i915_vma.c

1218

rem_info->plane[color_plane].height,

drivers/gpu/drm/i915/i915_vma.c

1219

rem_info->plane[color_plane].src_stride,

drivers/gpu/drm/i915/i915_vma.c

1220

rem_info->plane[color_plane].dst_stride,

drivers/gpu/drm/i915/i915_vma.c

1251

for (i = 0 ; i < ARRAY_SIZE(rem_info->plane); i++)

drivers/gpu/drm/i915/i915_vma.c

1263

obj->base.size, rem_info->plane[0].width,

drivers/gpu/drm/i915/i915_vma.c

1264

rem_info->plane[0].height, size);

drivers/gpu/drm/i915/i915_vma_types.h

107

BUILD_BUG_ON(offsetof(struct intel_remapped_info, plane[0]) !=

drivers/gpu/drm/i915/i915_vma_types.h

108

offsetof(struct intel_rotation_info, plane[0]));

drivers/gpu/drm/i915/i915_vma_types.h

109

BUILD_BUG_ON(offsetofend(struct intel_remapped_info, plane[1]) !=

drivers/gpu/drm/i915/i915_vma_types.h

110

offsetofend(struct intel_rotation_info, plane[1]));

drivers/gpu/drm/i915/selftests/i915_vma.c

1006

.rotated.plane[0] = *p,

drivers/gpu/drm/i915/selftests/i915_vma.c

1008

struct intel_remapped_plane_info *plane_info = view.rotated.plane;

drivers/gpu/drm/i915/selftests/i915_vma.c

368

return (r->plane[n].src_stride * (r->plane[n].height - y - 1) +

drivers/gpu/drm/i915/selftests/i915_vma.c

369

r->plane[n].offset + x);

drivers/gpu/drm/i915/selftests/i915_vma.c

379

for (x = 0; x < r->plane[n].width; x++) {

drivers/gpu/drm/i915/selftests/i915_vma.c

382

for (y = 0; y < r->plane[n].height; y++) {

drivers/gpu/drm/i915/selftests/i915_vma.c

411

left = (r->plane[n].dst_stride - y) * PAGE_SIZE;

drivers/gpu/drm/i915/selftests/i915_vma.c

445

return (r->plane[n].src_stride * y +

drivers/gpu/drm/i915/selftests/i915_vma.c

446

r->plane[n].offset + x);

drivers/gpu/drm/i915/selftests/i915_vma.c

458

for (y = 0; y < r->plane[n].height; y++) {

drivers/gpu/drm/i915/selftests/i915_vma.c

459

for (x = 0; x < r->plane[n].width; x++) {

drivers/gpu/drm/i915/selftests/i915_vma.c

504

left = (r->plane[n].dst_stride - r->plane[n].width) * PAGE_SIZE;

drivers/gpu/drm/i915/selftests/i915_vma.c

597

.remapped.plane[0] = *a,

drivers/gpu/drm/i915/selftests/i915_vma.c

598

.remapped.plane[1] = *b,

drivers/gpu/drm/i915/selftests/i915_vma.c

600

struct intel_remapped_plane_info *plane_info = view.remapped.plane;

drivers/gpu/drm/i915/selftests/i915_vma.c

674

for (n = 0; n < ARRAY_SIZE(view.rotated.plane); n++) {

drivers/gpu/drm/imx/dc/dc-plane.c

104

dc_plane_dbg(plane, "no CRTC in plane state\n");

drivers/gpu/drm/imx/dc/dc-plane.c

118

dc_plane_dbg(plane, "failed to check plane state: %d\n", ret);

drivers/gpu/drm/imx/dc/dc-plane.c

130

dc_plane_atomic_update(struct drm_plane *plane, struct drm_atomic_commit *state)

drivers/gpu/drm/imx/dc/dc-plane.c

133

drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/imx/dc/dc-plane.c

134

struct dc_plane *dplane = to_dc_plane(plane);

drivers/gpu/drm/imx/dc/dc-plane.c

143

if (!drm_dev_enter(plane->dev, &idx))

drivers/gpu/drm/imx/dc/dc-plane.c

162

dc_plane_dbg(plane, "uses %s\n", fu_ops->get_name(fu));

drivers/gpu/drm/imx/dc/dc-plane.c

170

dc_plane_dbg(plane, "uses LayerBlend%d\n", dc_lb_get_id(lb));

drivers/gpu/drm/imx/dc/dc-plane.c

178

static void dc_plane_atomic_disable(struct drm_plane *plane,

drivers/gpu/drm/imx/dc/dc-plane.c

181

struct dc_plane *dplane = to_dc_plane(plane);

drivers/gpu/drm/imx/dc/dc-plane.c

185

if (!drm_dev_enter(plane->dev, &idx))

drivers/gpu/drm/imx/dc/dc-plane.c

206

struct drm_plane *plane = &dc_plane->base;

drivers/gpu/drm/imx/dc/dc-plane.c

209

ret = drm_universal_plane_init(&dc_drm->base, plane, 0, &dc_plane_funcs,

drivers/gpu/drm/imx/dc/dc-plane.c

216

drm_plane_helper_add(plane, &dc_plane_helper_funcs);

drivers/gpu/drm/imx/dc/dc-plane.c

218

dc_plane->fu = dc_drm->pe->fu_disp[plane->index];

drivers/gpu/drm/imx/dc/dc-plane.c

219

dc_plane->cf = dc_drm->pe->cf_cont[plane->index];

drivers/gpu/drm/imx/dc/dc-plane.c

220

dc_plane->lb = dc_drm->pe->lb[plane->index];

drivers/gpu/drm/imx/dc/dc-plane.c

221

dc_plane->ed = dc_drm->pe->ed_cont[plane->index];

drivers/gpu/drm/imx/dc/dc-plane.c

27

#define dc_plane_dbg(plane, fmt, ...) \

drivers/gpu/drm/imx/dc/dc-plane.c

29

struct drm_plane *_plane = (plane); \

drivers/gpu/drm/imx/dc/dc-plane.c

47

static inline struct dc_plane *to_dc_plane(struct drm_plane *plane)

drivers/gpu/drm/imx/dc/dc-plane.c

49

return container_of(plane, struct dc_plane, base);

drivers/gpu/drm/imx/dc/dc-plane.c

58

dc_plane_dbg(state->plane, "invalid source resolution\n");

drivers/gpu/drm/imx/dc/dc-plane.c

72

dc_plane_dbg(state->plane, "fb bad baddr alignment\n");

drivers/gpu/drm/imx/dc/dc-plane.c

78

dc_plane_dbg(state->plane, "fb pitches[0] is out of range\n");

drivers/gpu/drm/imx/dc/dc-plane.c

84

dc_plane_dbg(state->plane, "fb bad pitches[0] alignment\n");

drivers/gpu/drm/imx/dc/dc-plane.c

92

dc_plane_atomic_check(struct drm_plane *plane, struct drm_atomic_commit *state)

drivers/gpu/drm/imx/dc/dc-plane.c

95

drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/imx/dcss/dcss-crtc.c

190

crtc->plane[0] = dcss_plane_init(drm, drm_crtc_mask(&crtc->base),

drivers/gpu/drm/imx/dcss/dcss-crtc.c

192

if (IS_ERR(crtc->plane[0]))

drivers/gpu/drm/imx/dcss/dcss-crtc.c

193

return PTR_ERR(crtc->plane[0]);

drivers/gpu/drm/imx/dcss/dcss-crtc.c

198

ret = drm_crtc_init_with_planes(drm, &crtc->base, &crtc->plane[0]->base,

drivers/gpu/drm/imx/dcss/dcss-dpr.c

222

int plane, max_planes = 1;

drivers/gpu/drm/imx/dcss/dcss-dpr.c

229

for (plane = 0; plane < max_planes; plane++) {

drivers/gpu/drm/imx/dcss/dcss-dpr.c

230

yres = plane == 1 ? yres >> 1 : yres;

drivers/gpu/drm/imx/dcss/dcss-dpr.c

236

DCSS_DPR_FRAME_1P_PIX_X_CTRL + plane * gap);

drivers/gpu/drm/imx/dcss/dcss-dpr.c

238

DCSS_DPR_FRAME_1P_PIX_Y_CTRL + plane * gap);

drivers/gpu/drm/imx/dcss/dcss-dpr.c

240

dcss_dpr_write(ch, 2, DCSS_DPR_FRAME_1P_CTRL0 + plane * gap);

drivers/gpu/drm/imx/dcss/dcss-kms.h

21

struct dcss_plane *plane[3];

drivers/gpu/drm/imx/dcss/dcss-plane.c

142

static int dcss_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/imx/dcss/dcss-plane.c

146

plane);

drivers/gpu/drm/imx/dcss/dcss-plane.c

147

struct dcss_plane *dcss_plane = to_dcss_plane(plane);

drivers/gpu/drm/imx/dcss/dcss-plane.c

148

struct dcss_dev *dcss = plane->dev->dev_private;

drivers/gpu/drm/imx/dcss/dcss-plane.c

150

bool is_primary_plane = plane->type == DRM_PLANE_TYPE_PRIMARY;

drivers/gpu/drm/imx/dcss/dcss-plane.c

205

!plane->funcs->format_mod_supported(plane,

drivers/gpu/drm/imx/dcss/dcss-plane.c

217

struct drm_plane *plane = &dcss_plane->base;

drivers/gpu/drm/imx/dcss/dcss-plane.c

218

struct drm_plane_state *state = plane->state;

drivers/gpu/drm/imx/dcss/dcss-plane.c

219

struct dcss_dev *dcss = plane->dev->dev_private;

drivers/gpu/drm/imx/dcss/dcss-plane.c

269

static void dcss_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/imx/dcss/dcss-plane.c

273

plane);

drivers/gpu/drm/imx/dcss/dcss-plane.c

275

plane);

drivers/gpu/drm/imx/dcss/dcss-plane.c

276

struct dcss_plane *dcss_plane = to_dcss_plane(plane);

drivers/gpu/drm/imx/dcss/dcss-plane.c

277

struct dcss_dev *dcss = plane->dev->dev_private;

drivers/gpu/drm/imx/dcss/dcss-plane.c

298

src = plane->state->src;

drivers/gpu/drm/imx/dcss/dcss-plane.c

299

dst = plane->state->dst;

drivers/gpu/drm/imx/dcss/dcss-plane.c

309

if (plane->type == DRM_PLANE_TYPE_OVERLAY &&

drivers/gpu/drm/imx/dcss/dcss-plane.c

354

static void dcss_plane_atomic_disable(struct drm_plane *plane,

drivers/gpu/drm/imx/dcss/dcss-plane.c

357

struct dcss_plane *dcss_plane = to_dcss_plane(plane);

drivers/gpu/drm/imx/dcss/dcss-plane.c

358

struct dcss_dev *dcss = plane->dev->dev_private;

drivers/gpu/drm/imx/dcss/dcss-plane.c

62

static void dcss_plane_destroy(struct drm_plane *plane)

drivers/gpu/drm/imx/dcss/dcss-plane.c

64

struct dcss_plane *dcss_plane = container_of(plane, struct dcss_plane,

drivers/gpu/drm/imx/dcss/dcss-plane.c

67

drm_plane_cleanup(plane);

drivers/gpu/drm/imx/dcss/dcss-plane.c

71

static bool dcss_plane_format_mod_supported(struct drm_plane *plane,

drivers/gpu/drm/imx/dcss/dcss-plane.c

75

switch (plane->type) {

drivers/gpu/drm/imx/ipuv3/imx-drm-core.c

102

for_each_old_plane_in_state(state, plane, old_plane_state, i)

drivers/gpu/drm/imx/ipuv3/imx-drm-core.c

103

ipu_plane_disable_deferred(plane);

drivers/gpu/drm/imx/ipuv3/imx-drm-core.c

74

struct drm_plane *plane;

drivers/gpu/drm/imx/ipuv3/imx-drm-core.c

87

for_each_oldnew_plane_in_state(state, plane, old_plane_state, new_plane_state, i) {

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

184

for (i = 0; i < ARRAY_SIZE(ipu_crtc->plane); i++) {

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

185

struct ipu_plane *plane = ipu_crtc->plane[i];

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

187

if (!plane)

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

190

if (ipu_plane_atomic_update_pending(&plane->base))

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

194

if (i == ARRAY_SIZE(ipu_crtc->plane)) {

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

36

struct ipu_plane *plane[2];

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

389

ipu_crtc->plane[0] = primary_plane;

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

404

ipu_crtc->plane[1] = ipu_plane_init(drm, ipu, pdata->dma[1],

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

408

if (IS_ERR(ipu_crtc->plane[1]))

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

409

ipu_crtc->plane[1] = NULL;

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

412

ipu_crtc->irq = ipu_plane_irq(ipu_crtc->plane[0]);

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

66

struct drm_plane *plane;

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

68

drm_atomic_crtc_state_for_each_plane(plane, old_crtc_state) {

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

69

if (plane == &ipu_crtc->plane[0]->base)

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

71

if (ipu_crtc->plane[1] && plane == &ipu_crtc->plane[1]->base)

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

76

ipu_plane_disable(ipu_crtc->plane[1], true);

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c

78

ipu_plane_disable(ipu_crtc->plane[0], true);

drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c

126

drm_plane_state_to_eba(struct drm_plane_state *state, int plane)

drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c

133

dma_obj = drm_fb_dma_get_gem_obj(fb, plane);

drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c

136

return dma_obj->dma_addr + fb->offsets[plane] + fb->pitches[plane] * y +

drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c

137

fb->format->cpp[plane] * x;

drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c

290

void ipu_plane_disable_deferred(struct drm_plane *plane)

drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c

292

struct ipu_plane *ipu_plane = to_ipu_plane(plane);

drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c

300

static void ipu_plane_state_reset(struct drm_plane *plane)

drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c

304

if (plane->state) {

drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c

305

ipu_state = to_ipu_plane_state(plane->state);

drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c

306

__drm_atomic_helper_plane_destroy_state(plane->state);

drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c

308

plane->state = NULL;

drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c

314

__drm_atomic_helper_plane_reset(plane, &ipu_state->base);

drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c

318

ipu_plane_duplicate_state(struct drm_plane *plane)

drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c

322

if (WARN_ON(!plane->state))

drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c

327

__drm_atomic_helper_plane_duplicate_state(plane, &state->base);

drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c

332

static void ipu_plane_destroy_state(struct drm_plane *plane,

drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c

341

static bool ipu_plane_format_mod_supported(struct drm_plane *plane,

drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c

344

struct ipu_soc *ipu = to_ipu_plane(plane)->ipu;

drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c

367

static int ipu_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c

371

plane);

drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c

373

plane);

drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c

375

struct device *dev = plane->dev->dev;

drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c

379

bool can_position = (plane->type == DRM_PLANE_TYPE_OVERLAY);

drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c

405

switch (plane->type) {

drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c

414

dev_warn(dev, "Unsupported plane type %d\n", plane->type);

drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c

529

static void ipu_plane_atomic_disable(struct drm_plane *plane,

drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c

532

struct ipu_plane *ipu_plane = to_ipu_plane(plane);

drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c

574

static void ipu_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c

578

plane);

drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c

579

struct ipu_plane *ipu_plane = to_ipu_plane(plane);

drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c

581

plane);

drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c

783

bool ipu_plane_atomic_update_pending(struct drm_plane *plane)

drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c

785

struct ipu_plane *ipu_plane = to_ipu_plane(plane);

drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c

786

struct drm_plane_state *state = plane->state;

drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c

813

struct drm_plane *plane;

drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c

832

for_each_new_plane_in_state(state, plane, plane_state, i) {

drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c

834

ipu_plane = to_ipu_plane(plane);

drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c

857

for_each_new_plane_in_state(state, plane, plane_state, i) {

drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c

859

ipu_plane = to_ipu_plane(plane);

drivers/gpu/drm/imx/ipuv3/ipuv3-plane.h

37

int ipu_plane_mode_set(struct ipu_plane *plane, struct drm_crtc *crtc,

drivers/gpu/drm/imx/ipuv3/ipuv3-plane.h

44

int ipu_plane_irq(struct ipu_plane *plane);

drivers/gpu/drm/imx/ipuv3/ipuv3-plane.h

47

void ipu_plane_disable_deferred(struct drm_plane *plane);

drivers/gpu/drm/imx/ipuv3/ipuv3-plane.h

48

bool ipu_plane_atomic_update_pending(struct drm_plane *plane);

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

142

struct drm_plane_state *new_state = pipe->plane.state;

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

302

struct drm_plane_state *new_state = pipe->plane.state;

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

1092

unsigned int plane)

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

1094

ingenic_drm_configure_hwdesc(priv, plane, plane, 0xf0 | plane);

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

461

static int ingenic_drm_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

465

plane);

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

467

plane);

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

468

struct ingenic_drm *priv = drm_device_get_priv(plane->dev);

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

477

if (priv->soc_info->plane_f0_not_working && plane == &priv->f0)

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

529

struct drm_plane *plane)

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

534

if (plane != &priv->f0)

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

543

void ingenic_drm_plane_disable(struct device *dev, struct drm_plane *plane)

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

549

if (plane != &priv->f0)

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

558

static void ingenic_drm_plane_atomic_disable(struct drm_plane *plane,

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

561

struct ingenic_drm *priv = drm_device_get_priv(plane->dev);

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

563

ingenic_drm_plane_disable(priv->dev, plane);

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

567

struct drm_plane *plane, u32 fourcc)

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

570

struct drm_plane_state *state = plane->state;

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

574

ingenic_drm_plane_enable(priv, plane);

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

576

if (priv->soc_info->has_osd && plane != &priv->f0) {

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

624

if (plane != &priv->f0) {

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

662

static void ingenic_drm_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

665

struct ingenic_drm *priv = drm_device_get_priv(plane->dev);

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

666

struct drm_plane_state *newstate = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

667

struct drm_plane_state *oldstate = drm_atomic_get_old_plane_state(state, plane);

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

680

plane_id = !!(priv->soc_info->has_osd && plane != &priv->f0);

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

725

ingenic_drm_plane_config(priv->dev, plane, fourcc);

drivers/gpu/drm/ingenic/ingenic-drm.h

226

struct drm_plane *plane, u32 fourcc);

drivers/gpu/drm/ingenic/ingenic-drm.h

227

void ingenic_drm_plane_disable(struct device *dev, struct drm_plane *plane);

drivers/gpu/drm/ingenic/ingenic-ipu.c

323

static void ingenic_ipu_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/ingenic/ingenic-ipu.c

326

struct ingenic_ipu *ipu = plane_to_ingenic_ipu(plane);

drivers/gpu/drm/ingenic/ingenic-ipu.c

327

struct drm_plane_state *newstate = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/ingenic/ingenic-ipu.c

328

struct drm_plane_state *oldstate = drm_atomic_get_old_plane_state(state, plane);

drivers/gpu/drm/ingenic/ingenic-ipu.c

387

ingenic_drm_plane_config(ipu->master, plane, DRM_FORMAT_XRGB8888);

drivers/gpu/drm/ingenic/ingenic-ipu.c

55

struct drm_plane plane;

drivers/gpu/drm/ingenic/ingenic-ipu.c

567

static int ingenic_ipu_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/ingenic/ingenic-ipu.c

571

plane);

drivers/gpu/drm/ingenic/ingenic-ipu.c

573

plane);

drivers/gpu/drm/ingenic/ingenic-ipu.c

575

struct ingenic_ipu *ipu = plane_to_ingenic_ipu(plane);

drivers/gpu/drm/ingenic/ingenic-ipu.c

655

static void ingenic_ipu_plane_atomic_disable(struct drm_plane *plane,

drivers/gpu/drm/ingenic/ingenic-ipu.c

658

struct ingenic_ipu *ipu = plane_to_ingenic_ipu(plane);

drivers/gpu/drm/ingenic/ingenic-ipu.c

663

ingenic_drm_plane_disable(ipu->master, plane);

drivers/gpu/drm/ingenic/ingenic-ipu.c

678

ingenic_ipu_plane_atomic_get_property(struct drm_plane *plane,

drivers/gpu/drm/ingenic/ingenic-ipu.c

682

struct ingenic_ipu *ipu = plane_to_ingenic_ipu(plane);

drivers/gpu/drm/ingenic/ingenic-ipu.c

693

ingenic_ipu_plane_atomic_set_property(struct drm_plane *plane,

drivers/gpu/drm/ingenic/ingenic-ipu.c

697

struct ingenic_ipu *ipu = plane_to_ingenic_ipu(plane);

drivers/gpu/drm/ingenic/ingenic-ipu.c

77

static inline struct ingenic_ipu *plane_to_ingenic_ipu(struct drm_plane *plane)

drivers/gpu/drm/ingenic/ingenic-ipu.c

79

return container_of(plane, struct ingenic_ipu, plane);

drivers/gpu/drm/ingenic/ingenic-ipu.c

813

struct drm_plane *plane;

drivers/gpu/drm/ingenic/ingenic-ipu.c

863

plane = &ipu->plane;

drivers/gpu/drm/ingenic/ingenic-ipu.c

864

dev_set_drvdata(dev, plane);

drivers/gpu/drm/ingenic/ingenic-ipu.c

866

drm_plane_helper_add(plane, &ingenic_ipu_plane_helper_funcs);

drivers/gpu/drm/ingenic/ingenic-ipu.c

868

err = drm_universal_plane_init(drm, plane, 1, &ingenic_ipu_plane_funcs,

drivers/gpu/drm/ingenic/ingenic-ipu.c

877

drm_plane_enable_fb_damage_clips(plane);

drivers/gpu/drm/ingenic/ingenic-ipu.c

895

drm_object_attach_property(&plane->base, ipu->sharpness_prop,

drivers/gpu/drm/kmb/kmb_drv.h

54

struct kmb_plane *plane;

drivers/gpu/drm/kmb/kmb_plane.c

106

kmb = to_kmb(plane->dev);

drivers/gpu/drm/kmb/kmb_plane.c

112

ret = check_pixel_format(plane, fb->format->format);

drivers/gpu/drm/kmb/kmb_plane.c

131

can_position = (plane->type == DRM_PLANE_TYPE_OVERLAY);

drivers/gpu/drm/kmb/kmb_plane.c

141

static void kmb_plane_atomic_disable(struct drm_plane *plane,

drivers/gpu/drm/kmb/kmb_plane.c

144

struct kmb_plane *kmb_plane = to_kmb_plane(plane);

drivers/gpu/drm/kmb/kmb_plane.c

148

kmb = to_kmb(plane->dev);

drivers/gpu/drm/kmb/kmb_plane.c

341

static void kmb_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/kmb/kmb_plane.c

345

plane);

drivers/gpu/drm/kmb/kmb_plane.c

347

plane);

drivers/gpu/drm/kmb/kmb_plane.c

362

if (!plane || !new_plane_state || !old_plane_state)

drivers/gpu/drm/kmb/kmb_plane.c

370

kmb_plane = to_kmb_plane(plane);

drivers/gpu/drm/kmb/kmb_plane.c

372

kmb = to_kmb(plane->dev);

drivers/gpu/drm/kmb/kmb_plane.c

467

kmb_plane_set_alpha(kmb, plane->state, plane_id, &val);

drivers/gpu/drm/kmb/kmb_plane.c

552

void kmb_plane_destroy(struct drm_plane *plane)

drivers/gpu/drm/kmb/kmb_plane.c

554

struct kmb_plane *kmb_plane = to_kmb_plane(plane);

drivers/gpu/drm/kmb/kmb_plane.c

556

drm_plane_cleanup(plane);

drivers/gpu/drm/kmb/kmb_plane.c

572

struct kmb_plane *plane = NULL;

drivers/gpu/drm/kmb/kmb_plane.c

584

plane = drmm_kzalloc(drm, sizeof(*plane), GFP_KERNEL);

drivers/gpu/drm/kmb/kmb_plane.c

586

if (!plane) {

drivers/gpu/drm/kmb/kmb_plane.c

601

ret = drm_universal_plane_init(drm, &plane->base_plane,

drivers/gpu/drm/kmb/kmb_plane.c

613

drm_plane_create_alpha_property(&plane->base_plane);

drivers/gpu/drm/kmb/kmb_plane.c

615

drm_plane_create_blend_mode_property(&plane->base_plane,

drivers/gpu/drm/kmb/kmb_plane.c

618

drm_plane_create_zpos_immutable_property(&plane->base_plane, i);

drivers/gpu/drm/kmb/kmb_plane.c

620

drm_plane_helper_add(&plane->base_plane,

drivers/gpu/drm/kmb/kmb_plane.c

624

primary = plane;

drivers/gpu/drm/kmb/kmb_plane.c

625

kmb->plane = plane;

drivers/gpu/drm/kmb/kmb_plane.c

629

plane->id = i;

drivers/gpu/drm/kmb/kmb_plane.c

639

drmm_kfree(drm, plane);

drivers/gpu/drm/kmb/kmb_plane.c

68

static unsigned int check_pixel_format(struct drm_plane *plane, u32 format)

drivers/gpu/drm/kmb/kmb_plane.c

71

struct kmb_plane *kmb_plane = to_kmb_plane(plane);

drivers/gpu/drm/kmb/kmb_plane.c

76

kmb = to_kmb(plane->dev);

drivers/gpu/drm/kmb/kmb_plane.c

85

for (i = 0; i < plane->format_count; i++) {

drivers/gpu/drm/kmb/kmb_plane.c

86

if (plane->format_types[i] == format)

drivers/gpu/drm/kmb/kmb_plane.c

92

static int kmb_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/kmb/kmb_plane.c

96

plane);

drivers/gpu/drm/kmb/kmb_plane.c

98

struct kmb_plane *kmb_plane = to_kmb_plane(plane);

drivers/gpu/drm/kmb/kmb_plane.h

73

void kmb_plane_destroy(struct drm_plane *plane);

drivers/gpu/drm/loongson/lsdc_drv.h

140

void (*update_fb_addr)(struct lsdc_primary *plane, u64 addr);

drivers/gpu/drm/loongson/lsdc_drv.h

141

void (*update_fb_stride)(struct lsdc_primary *plane, u32 stride);

drivers/gpu/drm/loongson/lsdc_drv.h

142

void (*update_fb_format)(struct lsdc_primary *plane,

drivers/gpu/drm/loongson/lsdc_drv.h

157

void (*update_bo_addr)(struct lsdc_cursor *plane, u64 addr);

drivers/gpu/drm/loongson/lsdc_drv.h

158

void (*update_cfg)(struct lsdc_cursor *plane,

drivers/gpu/drm/loongson/lsdc_drv.h

161

void (*update_position)(struct lsdc_cursor *plane, int x, int y);

drivers/gpu/drm/loongson/lsdc_drv.h

215

struct drm_plane *plane,

drivers/gpu/drm/loongson/lsdc_drv.h

219

struct drm_plane *plane,

drivers/gpu/drm/loongson/lsdc_drv.h

243

to_lsdc_primary(struct drm_plane *plane)

drivers/gpu/drm/loongson/lsdc_drv.h

245

return container_of(plane, struct lsdc_primary, base);

drivers/gpu/drm/loongson/lsdc_drv.h

249

to_lsdc_cursor(struct drm_plane *plane)

drivers/gpu/drm/loongson/lsdc_drv.h

251

return container_of(plane, struct lsdc_cursor, base);

drivers/gpu/drm/loongson/lsdc_drv.h

333

struct drm_plane *plane,

drivers/gpu/drm/loongson/lsdc_drv.h

337

struct drm_plane *plane,

drivers/gpu/drm/loongson/lsdc_drv.h

341

struct drm_plane *plane,

drivers/gpu/drm/loongson/lsdc_plane.c

100

static int lsdc_plane_prepare_fb(struct drm_plane *plane,

drivers/gpu/drm/loongson/lsdc_plane.c

115

drm_err(plane->dev, "bo %p reserve failed\n", lbo);

drivers/gpu/drm/loongson/lsdc_plane.c

124

drm_err(plane->dev, "bo %p pin failed\n", lbo);

drivers/gpu/drm/loongson/lsdc_plane.c

130

if (plane->type != DRM_PLANE_TYPE_CURSOR)

drivers/gpu/drm/loongson/lsdc_plane.c

131

drm_dbg(plane->dev,

drivers/gpu/drm/loongson/lsdc_plane.c

133

plane->name, lbo, gpu_vaddr, lsdc_bo_size(lbo));

drivers/gpu/drm/loongson/lsdc_plane.c

135

return drm_gem_plane_helper_prepare_fb(plane, new_state);

drivers/gpu/drm/loongson/lsdc_plane.c

138

static void lsdc_plane_cleanup_fb(struct drm_plane *plane,

drivers/gpu/drm/loongson/lsdc_plane.c

152

drm_err(plane->dev, "%p reserve failed\n", lbo);

drivers/gpu/drm/loongson/lsdc_plane.c

162

if (plane->type != DRM_PLANE_TYPE_CURSOR)

drivers/gpu/drm/loongson/lsdc_plane.c

163

drm_dbg(plane->dev, "%s unpin\n", plane->name);

drivers/gpu/drm/loongson/lsdc_plane.c

174

static int lsdc_cursor_plane_atomic_async_check(struct drm_plane *plane,

drivers/gpu/drm/loongson/lsdc_plane.c

181

new_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/loongson/lsdc_plane.c

183

if (!plane->state || !plane->state->fb) {

drivers/gpu/drm/loongson/lsdc_plane.c

184

drm_dbg(plane->dev, "%s: state is NULL\n", plane->name);

drivers/gpu/drm/loongson/lsdc_plane.c

189

drm_dbg(plane->dev, "unsupported cursor size: %ux%u\n",

drivers/gpu/drm/loongson/lsdc_plane.c

195

drm_dbg(plane->dev, "unsupported cursor size: %ux%u\n",

drivers/gpu/drm/loongson/lsdc_plane.c

204

if (plane->state->crtc != new_state->crtc ||

drivers/gpu/drm/loongson/lsdc_plane.c

205

plane->state->src_w != new_state->src_w ||

drivers/gpu/drm/loongson/lsdc_plane.c

206

plane->state->src_h != new_state->src_h ||

drivers/gpu/drm/loongson/lsdc_plane.c

207

plane->state->crtc_w != new_state->crtc_w ||

drivers/gpu/drm/loongson/lsdc_plane.c

208

plane->state->crtc_h != new_state->crtc_h)

drivers/gpu/drm/loongson/lsdc_plane.c

211

if (new_state->visible != plane->state->visible)

drivers/gpu/drm/loongson/lsdc_plane.c

214

return drm_atomic_helper_check_plane_state(plane->state,

drivers/gpu/drm/loongson/lsdc_plane.c

221

static void lsdc_cursor_plane_atomic_async_update(struct drm_plane *plane,

drivers/gpu/drm/loongson/lsdc_plane.c

224

struct lsdc_cursor *cursor = to_lsdc_cursor(plane);

drivers/gpu/drm/loongson/lsdc_plane.c

226

struct drm_framebuffer *old_fb = plane->state->fb;

drivers/gpu/drm/loongson/lsdc_plane.c

230

new_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/loongson/lsdc_plane.c

232

new_fb = plane->state->fb;

drivers/gpu/drm/loongson/lsdc_plane.c

234

plane->state->crtc_x = new_state->crtc_x;

drivers/gpu/drm/loongson/lsdc_plane.c

235

plane->state->crtc_y = new_state->crtc_y;

drivers/gpu/drm/loongson/lsdc_plane.c

236

plane->state->crtc_h = new_state->crtc_h;

drivers/gpu/drm/loongson/lsdc_plane.c

237

plane->state->crtc_w = new_state->crtc_w;

drivers/gpu/drm/loongson/lsdc_plane.c

238

plane->state->src_x = new_state->src_x;

drivers/gpu/drm/loongson/lsdc_plane.c

239

plane->state->src_y = new_state->src_y;

drivers/gpu/drm/loongson/lsdc_plane.c

240

plane->state->src_h = new_state->src_h;

drivers/gpu/drm/loongson/lsdc_plane.c

241

plane->state->src_w = new_state->src_w;

drivers/gpu/drm/loongson/lsdc_plane.c

242

swap(plane->state->fb, new_state->fb);

drivers/gpu/drm/loongson/lsdc_plane.c

270

static int ls7a1000_cursor_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/loongson/lsdc_plane.c

277

new_plane_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/loongson/lsdc_plane.c

281

drm_dbg(plane->dev, "%s is not bind to a crtc\n", plane->name);

drivers/gpu/drm/loongson/lsdc_plane.c

286

drm_dbg(plane->dev, "unsupported cursor size: %ux%u\n",

drivers/gpu/drm/loongson/lsdc_plane.c

300

static void ls7a1000_cursor_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/loongson/lsdc_plane.c

303

struct lsdc_cursor *cursor = to_lsdc_cursor(plane);

drivers/gpu/drm/loongson/lsdc_plane.c

304

struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane);

drivers/gpu/drm/loongson/lsdc_plane.c

305

struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/loongson/lsdc_plane.c

322

static void ls7a1000_cursor_plane_atomic_disable(struct drm_plane *plane,

drivers/gpu/drm/loongson/lsdc_plane.c

325

struct lsdc_cursor *cursor = to_lsdc_cursor(plane);

drivers/gpu/drm/loongson/lsdc_plane.c

343

static int ls7a2000_cursor_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/loongson/lsdc_plane.c

350

new_plane_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/loongson/lsdc_plane.c

354

drm_dbg(plane->dev, "%s is not bind to a crtc\n", plane->name);

drivers/gpu/drm/loongson/lsdc_plane.c

359

drm_dbg(plane->dev, "unsupported cursor size: %ux%u\n",

drivers/gpu/drm/loongson/lsdc_plane.c

365

drm_dbg(plane->dev, "unsupported cursor size: %ux%u\n",

drivers/gpu/drm/loongson/lsdc_plane.c

381

static void ls7a2000_cursor_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/loongson/lsdc_plane.c

384

struct lsdc_cursor *cursor = to_lsdc_cursor(plane);

drivers/gpu/drm/loongson/lsdc_plane.c

385

struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane);

drivers/gpu/drm/loongson/lsdc_plane.c

386

struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/loongson/lsdc_plane.c

418

static void ls7a2000_cursor_plane_atomic_disable(struct drm_plane *plane,

drivers/gpu/drm/loongson/lsdc_plane.c

421

struct lsdc_cursor *cursor = to_lsdc_cursor(plane);

drivers/gpu/drm/loongson/lsdc_plane.c

50

static int lsdc_primary_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/loongson/lsdc_plane.c

53

struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/loongson/lsdc_plane.c

69

static void lsdc_primary_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/loongson/lsdc_plane.c

72

struct lsdc_primary *primary = to_lsdc_primary(plane);

drivers/gpu/drm/loongson/lsdc_plane.c

722

struct drm_plane *plane,

drivers/gpu/drm/loongson/lsdc_plane.c

725

struct lsdc_primary *primary = to_lsdc_primary(plane);

drivers/gpu/drm/loongson/lsdc_plane.c

728

ret = drm_universal_plane_init(ddev, plane, 1 << index,

drivers/gpu/drm/loongson/lsdc_plane.c

738

drm_plane_helper_add(plane, &lsdc_primary_helper_funcs);

drivers/gpu/drm/loongson/lsdc_plane.c

74

struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane);

drivers/gpu/drm/loongson/lsdc_plane.c

747

struct drm_plane *plane,

drivers/gpu/drm/loongson/lsdc_plane.c

75

struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/loongson/lsdc_plane.c

750

struct lsdc_cursor *cursor = to_lsdc_cursor(plane);

drivers/gpu/drm/loongson/lsdc_plane.c

753

ret = drm_universal_plane_init(ddev, plane, 1 << index,

drivers/gpu/drm/loongson/lsdc_plane.c

766

drm_plane_helper_add(plane, &ls7a1000_cursor_plane_helper_funcs);

drivers/gpu/drm/loongson/lsdc_plane.c

772

struct drm_plane *plane,

drivers/gpu/drm/loongson/lsdc_plane.c

775

struct lsdc_cursor *cursor = to_lsdc_cursor(plane);

drivers/gpu/drm/loongson/lsdc_plane.c

778

ret = drm_universal_plane_init(ddev, plane, 1 << index,

drivers/gpu/drm/loongson/lsdc_plane.c

791

drm_plane_helper_add(plane, &ls7a2000_cursor_plane_helper_funcs);

drivers/gpu/drm/loongson/lsdc_plane.c

89

static void lsdc_primary_atomic_disable(struct drm_plane *plane,

drivers/gpu/drm/loongson/lsdc_plane.c

97

drm_dbg(plane->dev, "%s disabled\n", plane->name);

drivers/gpu/drm/mcde/mcde_display.c

1157

struct drm_plane *plane = &pipe->plane;

drivers/gpu/drm/mcde/mcde_display.c

1161

struct drm_framebuffer *fb = plane->state->fb;

drivers/gpu/drm/mcde/mcde_display.c

1391

struct drm_plane *plane = &pipe->plane;

drivers/gpu/drm/mcde/mcde_display.c

1392

struct drm_plane_state *pstate = plane->state;

drivers/gpu/drm/mcde/mcde_display.c

165

struct drm_framebuffer *old_fb = pipe->plane.state->fb;

drivers/gpu/drm/mediatek/mtk_crtc.c

257

struct drm_plane *plane,

drivers/gpu/drm/mediatek/mtk_crtc.c

263

unsigned int local_index = plane - mtk_crtc->planes;

drivers/gpu/drm/mediatek/mtk_crtc.c

274

WARN(1, "Failed to find component for plane %d\n", plane->index);

drivers/gpu/drm/mediatek/mtk_crtc.c

305

struct drm_plane *plane = &mtk_crtc->planes[i];

drivers/gpu/drm/mediatek/mtk_crtc.c

308

plane_state = to_mtk_plane_state(plane->state);

drivers/gpu/drm/mediatek/mtk_crtc.c

317

struct drm_plane *plane = &mtk_crtc->planes[i];

drivers/gpu/drm/mediatek/mtk_crtc.c

320

plane_state = to_mtk_plane_state(plane->state);

drivers/gpu/drm/mediatek/mtk_crtc.c

418

struct drm_plane *plane = &mtk_crtc->planes[i];

drivers/gpu/drm/mediatek/mtk_crtc.c

423

plane_state = to_mtk_plane_state(plane->state);

drivers/gpu/drm/mediatek/mtk_crtc.c

427

comp = mtk_ddp_comp_for_plane(crtc, plane, &local_layer);

drivers/gpu/drm/mediatek/mtk_crtc.c

511

struct drm_plane *plane = &mtk_crtc->planes[i];

drivers/gpu/drm/mediatek/mtk_crtc.c

514

plane_state = to_mtk_plane_state(plane->state);

drivers/gpu/drm/mediatek/mtk_crtc.c

519

comp = mtk_ddp_comp_for_plane(crtc, plane, &local_layer);

drivers/gpu/drm/mediatek/mtk_crtc.c

535

struct drm_plane *plane = &mtk_crtc->planes[i];

drivers/gpu/drm/mediatek/mtk_crtc.c

538

plane_state = to_mtk_plane_state(plane->state);

drivers/gpu/drm/mediatek/mtk_crtc.c

543

comp = mtk_ddp_comp_for_plane(crtc, plane, &local_layer);

drivers/gpu/drm/mediatek/mtk_crtc.c

579

struct drm_plane *plane = &mtk_crtc->planes[i];

drivers/gpu/drm/mediatek/mtk_crtc.c

582

plane_state = to_mtk_plane_state(plane->state);

drivers/gpu/drm/mediatek/mtk_crtc.c

721

int mtk_crtc_plane_check(struct drm_crtc *crtc, struct drm_plane *plane,

drivers/gpu/drm/mediatek/mtk_crtc.c

727

comp = mtk_ddp_comp_for_plane(crtc, plane, &local_layer);

drivers/gpu/drm/mediatek/mtk_crtc.c

733

void mtk_crtc_plane_disable(struct drm_crtc *crtc, struct drm_plane *plane)

drivers/gpu/drm/mediatek/mtk_crtc.c

737

struct mtk_plane_state *plane_state = to_mtk_plane_state(plane->state);

drivers/gpu/drm/mediatek/mtk_crtc.c

752

if (mtk_plane->index == plane->index) {

drivers/gpu/drm/mediatek/mtk_crtc.c

766

void mtk_crtc_async_update(struct drm_crtc *crtc, struct drm_plane *plane,

drivers/gpu/drm/mediatek/mtk_crtc.c

819

struct drm_plane *plane = &mtk_crtc->planes[i];

drivers/gpu/drm/mediatek/mtk_crtc.c

822

plane_state = to_mtk_plane_state(plane->state);

drivers/gpu/drm/mediatek/mtk_crtc.h

22

int mtk_crtc_plane_check(struct drm_crtc *crtc, struct drm_plane *plane,

drivers/gpu/drm/mediatek/mtk_crtc.h

24

void mtk_crtc_plane_disable(struct drm_crtc *crtc, struct drm_plane *plane);

drivers/gpu/drm/mediatek/mtk_crtc.h

25

void mtk_crtc_async_update(struct drm_crtc *crtc, struct drm_plane *plane,

drivers/gpu/drm/mediatek/mtk_plane.c

107

return drm_atomic_helper_check_plane_state(plane->state, crtc_state,

drivers/gpu/drm/mediatek/mtk_plane.c

195

static void mtk_plane_atomic_async_update(struct drm_plane *plane,

drivers/gpu/drm/mediatek/mtk_plane.c

199

plane);

drivers/gpu/drm/mediatek/mtk_plane.c

200

struct mtk_plane_state *new_plane_state = to_mtk_plane_state(plane->state);

drivers/gpu/drm/mediatek/mtk_plane.c

202

plane->state->crtc_x = new_state->crtc_x;

drivers/gpu/drm/mediatek/mtk_plane.c

203

plane->state->crtc_y = new_state->crtc_y;

drivers/gpu/drm/mediatek/mtk_plane.c

204

plane->state->crtc_h = new_state->crtc_h;

drivers/gpu/drm/mediatek/mtk_plane.c

205

plane->state->crtc_w = new_state->crtc_w;

drivers/gpu/drm/mediatek/mtk_plane.c

206

plane->state->src_x = new_state->src_x;

drivers/gpu/drm/mediatek/mtk_plane.c

207

plane->state->src_y = new_state->src_y;

drivers/gpu/drm/mediatek/mtk_plane.c

208

plane->state->src_h = new_state->src_h;

drivers/gpu/drm/mediatek/mtk_plane.c

209

plane->state->src_w = new_state->src_w;

drivers/gpu/drm/mediatek/mtk_plane.c

210

plane->state->dst.x1 = new_state->dst.x1;

drivers/gpu/drm/mediatek/mtk_plane.c

211

plane->state->dst.y1 = new_state->dst.y1;

drivers/gpu/drm/mediatek/mtk_plane.c

214

swap(plane->state->fb, new_state->fb);

drivers/gpu/drm/mediatek/mtk_plane.c

217

mtk_crtc_async_update(new_state->crtc, plane, state);

drivers/gpu/drm/mediatek/mtk_plane.c

230

static int mtk_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/mediatek/mtk_plane.c

234

plane);

drivers/gpu/drm/mediatek/mtk_plane.c

245

ret = mtk_crtc_plane_check(new_plane_state->crtc, plane,

drivers/gpu/drm/mediatek/mtk_plane.c

262

static void mtk_plane_atomic_disable(struct drm_plane *plane,

drivers/gpu/drm/mediatek/mtk_plane.c

266

plane);

drivers/gpu/drm/mediatek/mtk_plane.c

269

plane);

drivers/gpu/drm/mediatek/mtk_plane.c

276

mtk_crtc_plane_disable(old_state->crtc, plane);

drivers/gpu/drm/mediatek/mtk_plane.c

279

static void mtk_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/mediatek/mtk_plane.c

28

static void mtk_plane_reset(struct drm_plane *plane)

drivers/gpu/drm/mediatek/mtk_plane.c

283

plane);

drivers/gpu/drm/mediatek/mtk_plane.c

290

mtk_plane_atomic_disable(plane, state);

drivers/gpu/drm/mediatek/mtk_plane.c

307

int mtk_plane_init(struct drm_device *dev, struct drm_plane *plane,

drivers/gpu/drm/mediatek/mtk_plane.c

32

if (plane->state) {

drivers/gpu/drm/mediatek/mtk_plane.c

320

err = drm_universal_plane_init(dev, plane, possible_crtcs,

drivers/gpu/drm/mediatek/mtk_plane.c

33

__drm_atomic_helper_plane_destroy_state(plane->state);

drivers/gpu/drm/mediatek/mtk_plane.c

340

err = drm_plane_create_zpos_immutable_property(plane, plane_idx);

drivers/gpu/drm/mediatek/mtk_plane.c

347

err = drm_plane_create_rotation_property(plane,

drivers/gpu/drm/mediatek/mtk_plane.c

35

state = to_mtk_plane_state(plane->state);

drivers/gpu/drm/mediatek/mtk_plane.c

354

err = drm_plane_create_alpha_property(plane);

drivers/gpu/drm/mediatek/mtk_plane.c

359

err = drm_plane_create_blend_mode_property(plane, blend_modes);

drivers/gpu/drm/mediatek/mtk_plane.c

364

drm_plane_helper_add(plane, &mtk_plane_helper_funcs);

drivers/gpu/drm/mediatek/mtk_plane.c

43

__drm_atomic_helper_plane_reset(plane, &state->base);

drivers/gpu/drm/mediatek/mtk_plane.c

45

state->base.plane = plane;

drivers/gpu/drm/mediatek/mtk_plane.c

50

static struct drm_plane_state *mtk_plane_duplicate_state(struct drm_plane *plane)

drivers/gpu/drm/mediatek/mtk_plane.c

52

struct mtk_plane_state *old_state = to_mtk_plane_state(plane->state);

drivers/gpu/drm/mediatek/mtk_plane.c

59

__drm_atomic_helper_plane_duplicate_state(plane, &state->base);

drivers/gpu/drm/mediatek/mtk_plane.c

61

WARN_ON(state->base.plane != plane);

drivers/gpu/drm/mediatek/mtk_plane.c

68

static bool mtk_plane_format_mod_supported(struct drm_plane *plane,

drivers/gpu/drm/mediatek/mtk_plane.c

75

static void mtk_plane_destroy_state(struct drm_plane *plane,

drivers/gpu/drm/mediatek/mtk_plane.c

82

static int mtk_plane_atomic_async_check(struct drm_plane *plane,

drivers/gpu/drm/mediatek/mtk_plane.c

86

plane);

drivers/gpu/drm/mediatek/mtk_plane.c

90

if (plane != new_plane_state->crtc->cursor)

drivers/gpu/drm/mediatek/mtk_plane.c

93

if (!plane->state)

drivers/gpu/drm/mediatek/mtk_plane.c

96

if (!plane->state->fb)

drivers/gpu/drm/mediatek/mtk_plane.c

99

ret = mtk_crtc_plane_check(new_plane_state->crtc, plane,

drivers/gpu/drm/mediatek/mtk_plane.h

49

int mtk_plane_init(struct drm_device *dev, struct drm_plane *plane,

drivers/gpu/drm/meson/meson_overlay.c

169

static int meson_overlay_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/meson/meson_overlay.c

173

plane);

drivers/gpu/drm/meson/meson_overlay.c

230

struct drm_plane *plane,

drivers/gpu/drm/meson/meson_overlay.c

235

struct drm_plane_state *state = plane->state;

drivers/gpu/drm/meson/meson_overlay.c

472

static void meson_overlay_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/meson/meson_overlay.c

475

struct meson_overlay *meson_overlay = to_meson_overlay(plane);

drivers/gpu/drm/meson/meson_overlay.c

477

plane);

drivers/gpu/drm/meson/meson_overlay.c

551

meson_overlay_setup_scaler_params(priv, plane, interlace_mode);

drivers/gpu/drm/meson/meson_overlay.c

726

static void meson_overlay_atomic_disable(struct drm_plane *plane,

drivers/gpu/drm/meson/meson_overlay.c

729

struct meson_overlay *meson_overlay = to_meson_overlay(plane);

drivers/gpu/drm/meson/meson_overlay.c

754

static bool meson_overlay_format_mod_supported(struct drm_plane *plane,

drivers/gpu/drm/meson/meson_overlay.c

838

struct drm_plane *plane;

drivers/gpu/drm/meson/meson_overlay.c

848

plane = &meson_overlay->base;

drivers/gpu/drm/meson/meson_overlay.c

850

drm_universal_plane_init(priv->drm, plane, 0xFF,

drivers/gpu/drm/meson/meson_overlay.c

857

drm_plane_helper_add(plane, &meson_overlay_helper_funcs);

drivers/gpu/drm/meson/meson_overlay.c

860

drm_plane_create_zpos_immutable_property(plane, 0);

drivers/gpu/drm/meson/meson_overlay.c

862

priv->overlay_plane = plane;

drivers/gpu/drm/meson/meson_plane.c

134

static void meson_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/meson/meson_plane.c

137

struct meson_plane *meson_plane = to_meson_plane(plane);

drivers/gpu/drm/meson/meson_plane.c

139

plane);

drivers/gpu/drm/meson/meson_plane.c

400

static void meson_plane_atomic_disable(struct drm_plane *plane,

drivers/gpu/drm/meson/meson_plane.c

403

struct meson_plane *meson_plane = to_meson_plane(plane);

drivers/gpu/drm/meson/meson_plane.c

429

static bool meson_plane_format_mod_supported(struct drm_plane *plane,

drivers/gpu/drm/meson/meson_plane.c

432

struct meson_plane *meson_plane = to_meson_plane(plane);

drivers/gpu/drm/meson/meson_plane.c

449

for (i = 0 ; i < plane->modifier_count ; ++i)

drivers/gpu/drm/meson/meson_plane.c

450

if (plane->modifiers[i] == modifier)

drivers/gpu/drm/meson/meson_plane.c

453

if (i == plane->modifier_count) {

drivers/gpu/drm/meson/meson_plane.c

536

struct drm_plane *plane;

drivers/gpu/drm/meson/meson_plane.c

546

plane = &meson_plane->base;

drivers/gpu/drm/meson/meson_plane.c

553

ret = drm_universal_plane_init(priv->drm, plane, 0xFF,

drivers/gpu/drm/meson/meson_plane.c

564

drm_plane_helper_add(plane, &meson_plane_helper_funcs);

drivers/gpu/drm/meson/meson_plane.c

567

drm_plane_create_zpos_immutable_property(plane, 1);

drivers/gpu/drm/meson/meson_plane.c

569

priv->primary_plane = plane;

drivers/gpu/drm/meson/meson_plane.c

75

static int meson_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/meson/meson_plane.c

79

plane);

drivers/gpu/drm/mgag200/mgag200_drv.h

366

int mgag200_primary_plane_helper_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/mgag200/mgag200_drv.h

368

void mgag200_primary_plane_helper_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/mgag200/mgag200_drv.h

370

void mgag200_primary_plane_helper_atomic_enable(struct drm_plane *plane,

drivers/gpu/drm/mgag200/mgag200_drv.h

372

void mgag200_primary_plane_helper_atomic_disable(struct drm_plane *plane,

drivers/gpu/drm/mgag200/mgag200_drv.h

374

int mgag200_primary_plane_helper_get_scanout_buffer(struct drm_plane *plane,

drivers/gpu/drm/mgag200/mgag200_mode.c

465

int mgag200_primary_plane_helper_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/mgag200/mgag200_mode.c

468

struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(new_state, plane);

drivers/gpu/drm/mgag200/mgag200_mode.c

488

if (plane->state)

drivers/gpu/drm/mgag200/mgag200_mode.c

489

fb = plane->state->fb;

drivers/gpu/drm/mgag200/mgag200_mode.c

500

void mgag200_primary_plane_helper_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/mgag200/mgag200_mode.c

503

struct drm_device *dev = plane->dev;

drivers/gpu/drm/mgag200/mgag200_mode.c

505

struct drm_plane_state *plane_state = plane->state;

drivers/gpu/drm/mgag200/mgag200_mode.c

506

struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(old_state, plane);

drivers/gpu/drm/mgag200/mgag200_mode.c

523

void mgag200_primary_plane_helper_atomic_enable(struct drm_plane *plane,

drivers/gpu/drm/mgag200/mgag200_mode.c

526

struct drm_device *dev = plane->dev;

drivers/gpu/drm/mgag200/mgag200_mode.c

536

void mgag200_primary_plane_helper_atomic_disable(struct drm_plane *plane,

drivers/gpu/drm/mgag200/mgag200_mode.c

539

struct drm_device *dev = plane->dev;

drivers/gpu/drm/mgag200/mgag200_mode.c

549

int mgag200_primary_plane_helper_get_scanout_buffer(struct drm_plane *plane,

drivers/gpu/drm/mgag200/mgag200_mode.c

552

struct mga_device *mdev = to_mga_device(plane->dev);

drivers/gpu/drm/mgag200/mgag200_mode.c

555

if (plane->state && plane->state->fb) {

drivers/gpu/drm/mgag200/mgag200_mode.c

556

sb->format = plane->state->fb->format;

drivers/gpu/drm/mgag200/mgag200_mode.c

557

sb->width = plane->state->fb->width;

drivers/gpu/drm/mgag200/mgag200_mode.c

558

sb->height = plane->state->fb->height;

drivers/gpu/drm/mgag200/mgag200_mode.c

559

sb->pitch[0] = plane->state->fb->pitches[0];

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

104

drm_atomic_crtc_for_each_plane(plane, crtc) {

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

105

pstate = to_dpu_plane_state(plane->state);

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

63

struct drm_plane *plane;

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

68

drm_atomic_crtc_for_each_plane(plane, crtc) {

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

69

pstate = to_dpu_plane_state(plane->state);

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

95

struct drm_plane *plane;

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1330

struct drm_plane *plane;

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1344

drm_atomic_crtc_state_for_each_plane(plane, crtc_state) {

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1346

drm_atomic_get_plane_state(state, plane);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1531

struct drm_plane *plane;

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1571

drm_atomic_crtc_state_for_each_plane_state(plane, pstate, crtc_state) {

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1577

dpu_crtc->name, plane->base.id, rc);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1689

struct drm_plane *plane;

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1720

drm_atomic_crtc_for_each_plane(plane, crtc) {

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1721

pstate = to_dpu_plane_state(plane->state);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1722

state = plane->state;

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1727

seq_printf(s, "\tplane:%u stage:%d\n", plane->base.id,

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1730

if (plane->state->fb) {

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1731

fb = plane->state->fb;

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1878

struct drm_crtc *dpu_crtc_init(struct drm_device *dev, struct drm_plane *plane,

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1888

plane, cursor,

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

397

struct drm_plane *plane,

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

414

state = plane->state;

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

416

trace_dpu_crtc_setup_mixer(DRMID(crtc), DRMID(plane),

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

424

plane->base.id,

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

441

struct drm_plane *plane;

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

455

drm_atomic_crtc_for_each_plane(plane, crtc) {

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

456

state = plane->state;

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

482

_dpu_crtc_blend_setup_pipe(crtc, plane,

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

947

struct drm_plane *plane;

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

992

drm_atomic_crtc_for_each_plane(plane, crtc) {

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

994

dpu_plane_set_error(plane, true);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

995

dpu_plane_flush(plane);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h

253

struct drm_crtc *dpu_crtc_init(struct drm_device *dev, struct drm_plane *plane,

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

126

struct drm_plane *plane;

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

128

drm_for_each_plane(plane, kms->dev) {

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

129

if (plane->fb && plane->state) {

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

130

dpu_plane_danger_signal_ctrl(plane, enable);

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

132

plane->base.id, plane->fb->width,

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

133

plane->fb->height);

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

135

plane->state->src_x >> 16,

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

136

plane->state->src_y >> 16,

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

137

plane->state->src_w >> 16,

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

138

plane->state->src_h >> 16,

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

139

plane->state->crtc_x, plane->state->crtc_y,

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

140

plane->state->crtc_w, plane->state->crtc_h);

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

142

DPU_DEBUG("Inactive plane:%d\n", plane->base.id);

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

806

struct drm_plane *primary_planes[MAX_PLANES], *plane;

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

855

plane = dpu_plane_init_virtual(dev, type, (1UL << max_crtc_count) - 1);

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

857

plane = dpu_plane_init(dev, catalog->sspp[i].id, type,

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

859

if (IS_ERR(plane)) {

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

861

ret = PTR_ERR(plane);

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

866

cursor_planes[cursor_planes_idx++] = plane;

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

868

primary_planes[primary_planes_idx++] = plane;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

101

struct msm_drm_private *priv = plane->dev->dev_private;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1051

static int dpu_plane_atomic_check_sspp(struct drm_plane *plane,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1056

drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1057

struct dpu_plane *pdpu = to_dpu_plane(plane);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1172

static int dpu_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1176

drm_atomic_get_plane_state(state, plane);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1178

drm_atomic_get_old_plane_state(state, plane);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1189

ret = dpu_plane_atomic_check_nosspp(plane, plane_state, crtc_state);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1219

struct drm_plane *plane = plane_state->plane;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1220

struct dpu_kms *dpu_kms = _dpu_plane_get_kms(plane);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1258

struct drm_plane *plane = plane_state->plane;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1259

struct dpu_kms *dpu_kms = _dpu_plane_get_kms(plane);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1278

ret = dpu_plane_split(plane, plane_state, crtc_state);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1309

return dpu_plane_atomic_check_sspp(plane, state, crtc_state);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1318

struct drm_plane *plane = plane_state->plane;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1319

struct dpu_kms *dpu_kms = _dpu_plane_get_kms(plane);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1325

struct dpu_plane *pdpu = to_dpu_plane(plane);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1332

ret = dpu_plane_split(plane, plane_state, crtc_state);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1348

return dpu_plane_atomic_check_sspp(plane, state, crtc_state);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1415

void dpu_plane_flush(struct drm_plane *plane)

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1421

if (!plane || !plane->state) {

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1426

pdpu = to_dpu_plane(plane);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1427

pstate = to_dpu_plane_state(plane->state);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1445

if (plane->state)

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1454

void dpu_plane_set_error(struct drm_plane *plane, bool error)

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1458

if (!plane)

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1461

pdpu = to_dpu_plane(plane);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1465

static void dpu_plane_sspp_update_pipe(struct drm_plane *plane,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1473

struct dpu_plane *pdpu = to_dpu_plane(plane);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1474

struct drm_plane_state *state = plane->state;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1484

_dpu_plane_set_qos_ctrl(plane, pipe, false);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1526

_dpu_plane_set_qos_lut(plane, pipe, fmt, pipe_cfg);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1530

_dpu_plane_set_ot_limit(plane, pipe, pipe_cfg, frame_rate);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1533

_dpu_plane_set_qos_remap(plane, pipe);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1536

static void dpu_plane_sspp_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1539

struct dpu_plane *pdpu = to_dpu_plane(plane);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1540

struct drm_plane_state *state = plane->state;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1565

dpu_plane_sspp_update_pipe(plane, &pstate->pipe[i],

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1588

static void _dpu_plane_atomic_disable(struct drm_plane *plane)

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1590

struct drm_plane_state *state = plane->state;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1600

trace_dpu_plane_disable(DRMID(plane), false,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1619

static void dpu_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1622

struct dpu_plane *pdpu = to_dpu_plane(plane);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1624

plane);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1631

_dpu_plane_atomic_disable(plane);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1633

dpu_plane_sspp_atomic_update(plane, new_state);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1637

static void dpu_plane_destroy_state(struct drm_plane *plane,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1645

dpu_plane_duplicate_state(struct drm_plane *plane)

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1651

if (!plane) {

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1654

} else if (!plane->state) {

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1659

old_state = to_dpu_plane_state(plane->state);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1660

pdpu = to_dpu_plane(plane);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1671

__drm_atomic_helper_plane_duplicate_state(plane, &pstate->base);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1731

static void dpu_plane_reset(struct drm_plane *plane)

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1736

if (!plane) {

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1741

pdpu = to_dpu_plane(plane);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1745

if (plane->state) {

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1746

dpu_plane_destroy_state(plane, plane->state);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1747

plane->state = NULL;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1756

__drm_atomic_helper_plane_reset(plane, &pstate->base);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1760

void dpu_plane_danger_signal_ctrl(struct drm_plane *plane, bool enable)

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1762

struct dpu_plane *pdpu = to_dpu_plane(plane);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1763

struct dpu_plane_state *pstate = to_dpu_plane_state(plane->state);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1764

struct dpu_kms *dpu_kms = _dpu_plane_get_kms(plane);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1774

_dpu_plane_set_qos_ctrl(plane, &pstate->pipe[i], enable);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1780

static bool dpu_plane_format_mod_supported(struct drm_plane *plane,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1783

struct dpu_kms *dpu_kms = _dpu_plane_get_kms(plane);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1829

struct drm_plane *plane = NULL;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1844

plane = &pdpu->base;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1849

ret = drm_plane_create_zpos_property(plane, 0, 0, DPU_ZPOS_MAX);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1853

drm_plane_create_alpha_property(plane);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1854

drm_plane_create_blend_mode_property(plane,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1864

drm_plane_create_rotation_property(plane,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1867

drm_plane_enable_fb_damage_clips(plane);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1869

DPU_DEBUG("%s created for pipe:%u id:%u\n", plane->name,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1870

pipe, plane->base.id);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1871

return plane;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1887

struct drm_plane *plane = NULL;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1900

plane = dpu_plane_init_common(dev, type, possible_crtcs,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1905

if (IS_ERR(plane))

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1906

return plane;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1908

drm_plane_helper_add(plane, &dpu_plane_helper_funcs);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1910

DPU_DEBUG("%s created for pipe:%u id:%u\n", plane->name,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1911

pipe, plane->base.id);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1913

return plane;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1928

struct drm_plane *plane = NULL;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1950

plane = dpu_plane_init_common(dev, type, possible_crtcs,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1955

if (IS_ERR(plane))

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1956

return plane;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1958

drm_plane_helper_add(plane, &dpu_plane_virtual_helper_funcs);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

196

static int _dpu_plane_calc_fill_level(struct drm_plane *plane,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1960

DPU_DEBUG("%s created virtual id:%u\n", plane->name, plane->base.id);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1962

return plane;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

213

pdpu = to_dpu_plane(plane);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

253

static void _dpu_plane_set_qos_lut(struct drm_plane *plane,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

257

struct dpu_plane *pdpu = to_dpu_plane(plane);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

270

total_fl = _dpu_plane_calc_fill_level(plane, pipe, lut_usage, fmt,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

318

static void _dpu_plane_set_qos_ctrl(struct drm_plane *plane,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

322

struct dpu_plane *pdpu = to_dpu_plane(plane);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

360

static void _dpu_plane_set_ot_limit(struct drm_plane *plane,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

365

struct dpu_plane *pdpu = to_dpu_plane(plane);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

367

struct dpu_kms *dpu_kms = _dpu_plane_get_kms(plane);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

395

static void _dpu_plane_set_qos_remap(struct drm_plane *plane,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

398

struct dpu_plane *pdpu = to_dpu_plane(plane);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

400

struct dpu_kms *dpu_kms = _dpu_plane_get_kms(plane);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

618

const struct drm_plane *plane = &pdpu->base;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

619

struct msm_drm_private *priv = plane->dev->dev_private;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

620

struct dpu_plane_state *pstate = to_dpu_plane_state(plane->state);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

645

static int dpu_plane_prepare_fb(struct drm_plane *plane,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

649

struct dpu_plane *pdpu = to_dpu_plane(plane);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

663

drm_gem_plane_helper_prepare_fb(plane, new_state);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

674

static void dpu_plane_cleanup_fb(struct drm_plane *plane,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

677

struct dpu_plane *pdpu = to_dpu_plane(plane);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

815

static int dpu_plane_atomic_check_nosspp(struct drm_plane *plane,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

820

struct dpu_plane *pdpu = to_dpu_plane(plane);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

871

static int dpu_plane_split(struct drm_plane *plane,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

875

struct dpu_plane *pdpu = to_dpu_plane(plane);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

99

static struct dpu_kms *_dpu_plane_get_kms(struct drm_plane *plane)

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h

51

void dpu_plane_flush(struct drm_plane *plane);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h

53

void dpu_plane_set_error(struct drm_plane *plane, bool error);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h

63

int dpu_plane_color_fill(struct drm_plane *plane,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h

67

void dpu_plane_danger_signal_ctrl(struct drm_plane *plane, bool enable);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h

69

static inline void dpu_plane_danger_signal_ctrl(struct drm_plane *plane, bool enable) {}

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

154

struct drm_plane *plane;

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

156

drm_atomic_crtc_for_each_plane(plane, crtc) {

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

157

enum mdp4_pipe pipe_id = mdp4_plane_pipe(plane);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

171

struct drm_plane *plane;

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

180

drm_atomic_crtc_for_each_plane(plane, crtc) {

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

181

enum mdp4_pipe pipe_id = mdp4_plane_pipe(plane);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

185

msm_framebuffer_format(plane->state->fb);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

627

struct drm_plane *plane, int ovlp_id,

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

635

plane, NULL,

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

80

struct drm_plane *plane;

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

83

drm_atomic_crtc_for_each_plane(plane, crtc) {

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

84

enum mdp4_pipe pipe_id = mdp4_plane_pipe(plane);

drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c

293

struct drm_plane *plane;

drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c

316

plane = mdp4_plane_init(dev, vg_planes[i], false);

drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c

317

if (IS_ERR(plane)) {

drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c

320

ret = PTR_ERR(plane);

drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c

326

plane = mdp4_plane_init(dev, rgb_planes[i], true);

drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c

327

if (IS_ERR(plane)) {

drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c

330

ret = PTR_ERR(plane);

drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c

334

crtc = mdp4_crtc_init(dev, plane, i,

drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h

179

enum mdp4_pipe mdp4_plane_pipe(struct drm_plane *plane);

drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h

188

struct drm_plane *plane, int ovlp_id,

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

104

static int mdp4_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

110

static void mdp4_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

114

plane);

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

117

ret = mdp4_plane_mode_set(plane,

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

134

static void mdp4_plane_set_scanout(struct drm_plane *plane,

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

137

struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

138

struct mdp4_kms *mdp4_kms = get_kms(plane);

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

188

static int mdp4_plane_mode_set(struct drm_plane *plane,

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

195

struct drm_device *dev = plane->dev;

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

196

struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

197

struct mdp4_kms *mdp4_kms = get_kms(plane);

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

293

mdp4_plane_set_scanout(plane, fb);

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

341

enum mdp4_pipe mdp4_plane_pipe(struct drm_plane *plane)

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

343

struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

398

struct drm_plane *plane = NULL;

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

41

static void mdp4_plane_set_scanout(struct drm_plane *plane,

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

424

plane = &mdp4_plane->base;

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

429

drm_plane_helper_add(plane, &mdp4_plane_helper_funcs);

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

43

static int mdp4_plane_mode_set(struct drm_plane *plane,

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

431

mdp4_plane_install_properties(plane, &plane->base);

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

433

drm_plane_enable_fb_damage_clips(plane);

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

435

return plane;

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

50

static struct mdp4_kms *get_kms(struct drm_plane *plane)

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

52

struct msm_drm_private *priv = plane->dev->dev_private;

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

57

static void mdp4_plane_install_properties(struct drm_plane *plane,

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

63

static int mdp4_plane_set_property(struct drm_plane *plane,

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

79

static int mdp4_plane_prepare_fb(struct drm_plane *plane,

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

85

drm_gem_plane_helper_prepare_fb(plane, new_state);

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

90

static void mdp4_plane_cleanup_fb(struct drm_plane *plane,

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

93

struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

114

struct drm_plane *plane;

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

121

drm_atomic_crtc_for_each_plane(plane, crtc) {

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

122

if (!plane->state->visible)

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

124

flush_mask |= mdp5_plane_get_flush(plane);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1320

struct drm_plane *plane,

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

1328

plane, cursor_plane,

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

217

struct drm_plane *plane;

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

243

drm_atomic_crtc_for_each_plane(plane, crtc) {

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

246

if (!plane->state->visible)

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

249

pstate = to_mdp5_plane_state(plane->state);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

251

stage[pstate->stage][PIPE_LEFT] = mdp5_plane_pipe(plane);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

258

mdp5_plane_pipe(plane);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

264

right_pipe = mdp5_plane_right_pipe(plane);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

289

plane = pstates[i]->base.plane;

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

649

struct drm_plane *plane;

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

700

struct drm_plane *plane;

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

714

drm_atomic_crtc_state_for_each_plane_state(plane, pstate, crtc_state) {

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

721

pstates[cnt].plane = plane;

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

735

if (plane->type == DRM_PLANE_TYPE_CURSOR)

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

763

(pstates[cnt - 1].plane->type != DRM_PLANE_TYPE_CURSOR));

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

782

pstates[i].plane->name,

drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c

417

struct drm_plane *plane;

drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c

427

plane = mdp5_plane_init(dev, type);

drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c

428

if (IS_ERR(plane)) {

drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c

429

ret = PTR_ERR(plane);

drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c

435

primary[pi++] = plane;

drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c

437

cursor[ci++] = plane;

drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h

274

uint32_t mdp5_plane_get_flush(struct drm_plane *plane);

drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h

275

enum mdp5_pipe mdp5_plane_pipe(struct drm_plane *plane);

drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h

276

enum mdp5_pipe mdp5_plane_right_pipe(struct drm_plane *plane);

drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h

288

struct drm_plane *plane,

drivers/gpu/drm/msm/disp/mdp5/mdp5_pipe.c

110

(*hwpipe)->name, plane->name, caps);

drivers/gpu/drm/msm/disp/mdp5/mdp5_pipe.c

111

new_state->hwpipe_to_plane[(*hwpipe)->idx] = plane;

drivers/gpu/drm/msm/disp/mdp5/mdp5_pipe.c

115

(*r_hwpipe)->name, plane->name, caps);

drivers/gpu/drm/msm/disp/mdp5/mdp5_pipe.c

116

new_state->hwpipe_to_plane[(*r_hwpipe)->idx] = plane;

drivers/gpu/drm/msm/disp/mdp5/mdp5_pipe.c

53

plane->type != DRM_PLANE_TYPE_CURSOR)

drivers/gpu/drm/msm/disp/mdp5/mdp5_pipe.c

9

int mdp5_pipe_assign(struct drm_atomic_commit *s, struct drm_plane *plane,

drivers/gpu/drm/msm/disp/mdp5/mdp5_pipe.h

36

int mdp5_pipe_assign(struct drm_atomic_commit *s, struct drm_plane *plane,

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

1021

struct drm_plane *plane = NULL;

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

103

if (WARN_ON(!plane->state))

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

1031

plane = &mdp5_plane->base;

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

1033

drm_plane_helper_add(plane, &mdp5_plane_helper_funcs);

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

1035

mdp5_plane_install_properties(plane, &plane->base);

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

1037

drm_plane_enable_fb_damage_clips(plane);

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

1039

return plane;

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

106

mdp5_state = kmemdup(to_mdp5_plane_state(plane->state),

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

111

__drm_atomic_helper_plane_duplicate_state(plane, &mdp5_state->base);

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

116

static void mdp5_plane_destroy_state(struct drm_plane *plane,

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

135

static int mdp5_plane_prepare_fb(struct drm_plane *plane,

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

143

drm_gem_plane_helper_prepare_fb(plane, new_state);

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

148

static void mdp5_plane_cleanup_fb(struct drm_plane *plane,

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

157

DBG("%s: cleanup: FB[%u]", plane->name, fb->base.id);

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

165

struct drm_plane *plane = state->plane;

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

166

struct drm_plane_state *old_state = plane->state;

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

167

struct mdp5_cfg *config = mdp5_cfg_get_config(get_kms(plane)->cfg);

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

176

DBG("%s: check (%d -> %d)", plane->name,

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

218

struct mdp5_kms *mdp5_kms = get_kms(plane);

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

23

static int mdp5_plane_mode_set(struct drm_plane *plane,

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

240

if (plane->type == DRM_PLANE_TYPE_CURSOR)

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

27

static struct mdp5_kms *get_kms(struct drm_plane *plane)

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

279

ret = mdp5_pipe_assign(state->state, plane, caps,

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

285

plane->name);

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

29

struct msm_drm_private *priv = plane->dev->dev_private;

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

325

static int mdp5_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

329

plane);

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

331

plane);

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

346

static void mdp5_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

350

plane);

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

352

DBG("%s: update", plane->name);

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

357

ret = mdp5_plane_mode_set(plane,

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

365

static int mdp5_plane_atomic_async_check(struct drm_plane *plane,

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

369

plane);

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

388

if (plane->state->crtc != new_plane_state->crtc ||

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

389

plane->state->src_w != new_plane_state->src_w ||

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

39

static void mdp5_plane_install_properties(struct drm_plane *plane,

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

390

plane->state->src_h != new_plane_state->src_h ||

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

391

plane->state->crtc_w != new_plane_state->crtc_w ||

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

392

plane->state->crtc_h != new_plane_state->crtc_h ||

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

393

!plane->state->fb ||

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

394

plane->state->fb != new_plane_state->fb)

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

413

if (new_plane_state->visible != plane->state->visible)

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

419

static void mdp5_plane_atomic_async_update(struct drm_plane *plane,

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

423

plane);

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

424

struct drm_framebuffer *old_fb = plane->state->fb;

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

426

plane->state->src_x = new_state->src_x;

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

427

plane->state->src_y = new_state->src_y;

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

428

plane->state->crtc_x = new_state->crtc_x;

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

429

plane->state->crtc_y = new_state->crtc_y;

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

437

ret = mdp5_plane_mode_set(plane, new_state->crtc, new_state->fb,

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

44

drm_plane_create_rotation_property(plane,

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

443

mdp5_ctl_commit(ctl, pipeline, mdp5_plane_get_flush(plane), true);

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

446

*to_mdp5_plane_state(plane->state) =

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

50

drm_plane_create_alpha_property(plane);

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

51

drm_plane_create_blend_mode_property(plane,

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

56

if (plane->type == DRM_PLANE_TYPE_PRIMARY)

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

570

static int calc_scalex_steps(struct drm_plane *plane,

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

575

struct mdp5_kms *mdp5_kms = get_kms(plane);

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

59

zpos = STAGE0 + drm_plane_index(plane);

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

593

static int calc_scaley_steps(struct drm_plane *plane,

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

598

struct mdp5_kms *mdp5_kms = get_kms(plane);

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

60

drm_plane_create_zpos_property(plane, zpos, 1, 255);

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

68

struct mdp5_kms *mdp5_kms = get_kms(state->plane);

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

83

static void mdp5_plane_reset(struct drm_plane *plane)

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

839

static int mdp5_plane_mode_set(struct drm_plane *plane,

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

843

struct drm_plane_state *pstate = plane->state;

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

845

struct mdp5_kms *mdp5_kms = get_kms(plane);

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

87

if (plane->state)

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

88

__drm_atomic_helper_plane_destroy_state(plane->state);

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

891

DBG("%s: FB[%u] %u,%u,%u,%u -> CRTC[%u] %d,%d,%u,%u", plane->name,

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

90

kfree(to_mdp5_plane_state(plane->state));

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

907

ret = calc_scalex_steps(plane, pix_format, src_w, crtc_w, step.x);

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

91

plane->state = NULL;

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

911

ret = calc_scaley_steps(plane, pix_format, src_h, crtc_h, step.y);

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

95

__drm_atomic_helper_plane_reset(plane, &mdp5_state->base);

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

955

enum mdp5_pipe mdp5_plane_pipe(struct drm_plane *plane)

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

957

struct mdp5_plane_state *pstate = to_mdp5_plane_state(plane->state);

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

965

enum mdp5_pipe mdp5_plane_right_pipe(struct drm_plane *plane)

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

967

struct mdp5_plane_state *pstate = to_mdp5_plane_state(plane->state);

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

975

uint32_t mdp5_plane_get_flush(struct drm_plane *plane)

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

977

struct mdp5_plane_state *pstate = to_mdp5_plane_state(plane->state);

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

99

mdp5_plane_duplicate_state(struct drm_plane *plane)

drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c

339

struct drm_plane *plane = hwpstate->hwpipe_to_plane[hwpipe->idx];

drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c

348

plane ? plane->name : "(null)");

drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c

39

static inline u32 pipe2client(enum mdp5_pipe pipe, int plane)

drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c

43

if (WARN_ON(plane >= pipe2nclients(pipe)))

drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c

58

return mdp5_cfg->smp.clients[pipe] + plane;

drivers/gpu/drm/msm/msm_drv.h

258

uint32_t msm_framebuffer_iova(struct drm_framebuffer *fb, int plane);

drivers/gpu/drm/msm/msm_drv.h

259

struct drm_gem_object *msm_framebuffer_bo(struct drm_framebuffer *fb, int plane);

drivers/gpu/drm/msm/msm_fb.c

125

uint32_t msm_framebuffer_iova(struct drm_framebuffer *fb, int plane)

drivers/gpu/drm/msm/msm_fb.c

128

return msm_fb->iova[plane] + fb->offsets[plane];

drivers/gpu/drm/msm/msm_fb.c

131

struct drm_gem_object *msm_framebuffer_bo(struct drm_framebuffer *fb, int plane)

drivers/gpu/drm/msm/msm_fb.c

133

return drm_gem_fb_get_obj(fb, plane);

drivers/gpu/drm/mxsfb/lcdif_kms.c

666

static int lcdif_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/mxsfb/lcdif_kms.c

670

plane);

drivers/gpu/drm/mxsfb/lcdif_kms.c

671

struct lcdif_drm_private *lcdif = to_lcdif_drm_private(plane->dev);

drivers/gpu/drm/mxsfb/lcdif_kms.c

683

static void lcdif_plane_primary_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/mxsfb/lcdif_kms.c

686

struct lcdif_drm_private *lcdif = to_lcdif_drm_private(plane->dev);

drivers/gpu/drm/mxsfb/lcdif_kms.c

688

plane);

drivers/gpu/drm/mxsfb/lcdif_kms.c

700

static bool lcdif_format_mod_supported(struct drm_plane *plane,

drivers/gpu/drm/mxsfb/mxsfb_kms.c

522

static int mxsfb_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/mxsfb/mxsfb_kms.c

526

plane);

drivers/gpu/drm/mxsfb/mxsfb_kms.c

527

struct mxsfb_drm_private *mxsfb = to_mxsfb_drm_private(plane->dev);

drivers/gpu/drm/mxsfb/mxsfb_kms.c

539

static void mxsfb_plane_primary_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/mxsfb/mxsfb_kms.c

542

struct mxsfb_drm_private *mxsfb = to_mxsfb_drm_private(plane->dev);

drivers/gpu/drm/mxsfb/mxsfb_kms.c

544

plane);

drivers/gpu/drm/mxsfb/mxsfb_kms.c

552

static void mxsfb_plane_overlay_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/mxsfb/mxsfb_kms.c

556

plane);

drivers/gpu/drm/mxsfb/mxsfb_kms.c

557

struct mxsfb_drm_private *mxsfb = to_mxsfb_drm_private(plane->dev);

drivers/gpu/drm/mxsfb/mxsfb_kms.c

559

plane);

drivers/gpu/drm/mxsfb/mxsfb_kms.c

615

static void mxsfb_plane_overlay_atomic_disable(struct drm_plane *plane,

drivers/gpu/drm/mxsfb/mxsfb_kms.c

618

struct mxsfb_drm_private *mxsfb = to_mxsfb_drm_private(plane->dev);

drivers/gpu/drm/mxsfb/mxsfb_kms.c

623

static bool mxsfb_format_mod_supported(struct drm_plane *plane,

drivers/gpu/drm/nouveau/dispnv04/hw.c

291

bool save, unsigned plane)

drivers/gpu/drm/nouveau/dispnv04/hw.c

295

NVWriteVgaSeq(dev, 0, NV_VIO_SR_PLANE_MASK_INDEX, 1 << plane);

drivers/gpu/drm/nouveau/dispnv04/hw.c

296

NVWriteVgaGr(dev, 0, NV_VIO_GX_READ_MAP_INDEX, plane);

drivers/gpu/drm/nouveau/dispnv04/hw.c

299

nv04_display(dev)->saved_vga_font[plane][i] =

drivers/gpu/drm/nouveau/dispnv04/hw.c

302

iowrite32_native(nv04_display(dev)->saved_vga_font[plane][i],

drivers/gpu/drm/nouveau/dispnv04/hw.c

315

unsigned plane;

drivers/gpu/drm/nouveau/dispnv04/hw.c

356

for (plane = 0; plane < 4; plane++)

drivers/gpu/drm/nouveau/dispnv04/hw.c

357

nouveau_vga_font_io(dev, iovram, save, plane);

drivers/gpu/drm/nouveau/dispnv04/overlay.c

113

nv10_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,

drivers/gpu/drm/nouveau/dispnv04/overlay.c

120

struct nouveau_drm *drm = nouveau_drm(plane->dev);

drivers/gpu/drm/nouveau/dispnv04/overlay.c

123

container_of(plane, struct nouveau_plane, base);

drivers/gpu/drm/nouveau/dispnv04/overlay.c

192

nv10_disable_plane(struct drm_plane *plane,

drivers/gpu/drm/nouveau/dispnv04/overlay.c

195

struct nvif_object *dev = &nouveau_drm(plane->dev)->client.device.object;

drivers/gpu/drm/nouveau/dispnv04/overlay.c

197

container_of(plane, struct nouveau_plane, base);

drivers/gpu/drm/nouveau/dispnv04/overlay.c

209

nv_destroy_plane(struct drm_plane *plane)

drivers/gpu/drm/nouveau/dispnv04/overlay.c

211

drm_plane_force_disable(plane);

drivers/gpu/drm/nouveau/dispnv04/overlay.c

212

drm_plane_cleanup(plane);

drivers/gpu/drm/nouveau/dispnv04/overlay.c

213

kfree(plane);

drivers/gpu/drm/nouveau/dispnv04/overlay.c

217

nv10_set_params(struct nouveau_plane *plane)

drivers/gpu/drm/nouveau/dispnv04/overlay.c

219

struct nvif_object *dev = &nouveau_drm(plane->base.dev)->client.device.object;

drivers/gpu/drm/nouveau/dispnv04/overlay.c

220

u32 luma = (plane->brightness - 512) << 16 | plane->contrast;

drivers/gpu/drm/nouveau/dispnv04/overlay.c

221

u32 chroma = ((sin_mul(plane->hue, plane->saturation) & 0xffff) << 16) |

drivers/gpu/drm/nouveau/dispnv04/overlay.c

222

(cos_mul(plane->hue, plane->saturation) & 0xffff);

drivers/gpu/drm/nouveau/dispnv04/overlay.c

229

nvif_wr32(dev, NV_PVIDEO_COLOR_KEY, plane->colorkey & 0xffffff);

drivers/gpu/drm/nouveau/dispnv04/overlay.c

231

if (plane->cur) {

drivers/gpu/drm/nouveau/dispnv04/overlay.c

232

if (plane->color_encoding == DRM_COLOR_YCBCR_BT709)

drivers/gpu/drm/nouveau/dispnv04/overlay.c

234

if (plane->colorkey & (1 << 24))

drivers/gpu/drm/nouveau/dispnv04/overlay.c

236

nvif_mask(dev, NV_PVIDEO_FORMAT(plane->flip),

drivers/gpu/drm/nouveau/dispnv04/overlay.c

244

nv_set_property(struct drm_plane *plane,

drivers/gpu/drm/nouveau/dispnv04/overlay.c

249

container_of(plane, struct nouveau_plane, base);

drivers/gpu/drm/nouveau/dispnv04/overlay.c

282

struct nouveau_plane *plane = kzalloc_obj(struct nouveau_plane);

drivers/gpu/drm/nouveau/dispnv04/overlay.c

286

if (!plane)

drivers/gpu/drm/nouveau/dispnv04/overlay.c

299

ret = drm_universal_plane_init(device, &plane->base, 3 /* both crtc's */,

drivers/gpu/drm/nouveau/dispnv04/overlay.c

307

plane->props.colorkey = drm_property_create_range(

drivers/gpu/drm/nouveau/dispnv04/overlay.c

309

plane->props.contrast = drm_property_create_range(

drivers/gpu/drm/nouveau/dispnv04/overlay.c

311

plane->props.brightness = drm_property_create_range(

drivers/gpu/drm/nouveau/dispnv04/overlay.c

313

plane->props.hue = drm_property_create_range(

drivers/gpu/drm/nouveau/dispnv04/overlay.c

315

plane->props.saturation = drm_property_create_range(

drivers/gpu/drm/nouveau/dispnv04/overlay.c

317

if (!plane->props.colorkey ||

drivers/gpu/drm/nouveau/dispnv04/overlay.c

318

!plane->props.contrast ||

drivers/gpu/drm/nouveau/dispnv04/overlay.c

319

!plane->props.brightness ||

drivers/gpu/drm/nouveau/dispnv04/overlay.c

320

!plane->props.hue ||

drivers/gpu/drm/nouveau/dispnv04/overlay.c

321

!plane->props.saturation)

drivers/gpu/drm/nouveau/dispnv04/overlay.c

324

plane->colorkey = 0;

drivers/gpu/drm/nouveau/dispnv04/overlay.c

325

drm_object_attach_property(&plane->base.base,

drivers/gpu/drm/nouveau/dispnv04/overlay.c

326

plane->props.colorkey, plane->colorkey);

drivers/gpu/drm/nouveau/dispnv04/overlay.c

328

plane->contrast = 0x1000;

drivers/gpu/drm/nouveau/dispnv04/overlay.c

329

drm_object_attach_property(&plane->base.base,

drivers/gpu/drm/nouveau/dispnv04/overlay.c

330

plane->props.contrast, plane->contrast);

drivers/gpu/drm/nouveau/dispnv04/overlay.c

332

plane->brightness = 512;

drivers/gpu/drm/nouveau/dispnv04/overlay.c

333

drm_object_attach_property(&plane->base.base,

drivers/gpu/drm/nouveau/dispnv04/overlay.c

334

plane->props.brightness, plane->brightness);

drivers/gpu/drm/nouveau/dispnv04/overlay.c

336

plane->hue = 0;

drivers/gpu/drm/nouveau/dispnv04/overlay.c

337

drm_object_attach_property(&plane->base.base,

drivers/gpu/drm/nouveau/dispnv04/overlay.c

338

plane->props.hue, plane->hue);

drivers/gpu/drm/nouveau/dispnv04/overlay.c

340

plane->saturation = 0x1000;

drivers/gpu/drm/nouveau/dispnv04/overlay.c

341

drm_object_attach_property(&plane->base.base,

drivers/gpu/drm/nouveau/dispnv04/overlay.c

342

plane->props.saturation, plane->saturation);

drivers/gpu/drm/nouveau/dispnv04/overlay.c

344

plane->color_encoding = DRM_COLOR_YCBCR_BT601;

drivers/gpu/drm/nouveau/dispnv04/overlay.c

345

drm_plane_create_color_properties(&plane->base,

drivers/gpu/drm/nouveau/dispnv04/overlay.c

352

plane->set_params = nv10_set_params;

drivers/gpu/drm/nouveau/dispnv04/overlay.c

353

nv10_set_params(plane);

drivers/gpu/drm/nouveau/dispnv04/overlay.c

354

drm_plane_force_disable(&plane->base);

drivers/gpu/drm/nouveau/dispnv04/overlay.c

357

drm_plane_cleanup(&plane->base);

drivers/gpu/drm/nouveau/dispnv04/overlay.c

359

kfree(plane);

drivers/gpu/drm/nouveau/dispnv04/overlay.c

364

nv04_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,

drivers/gpu/drm/nouveau/dispnv04/overlay.c

371

struct nvif_object *dev = &nouveau_drm(plane->dev)->client.device.object;

drivers/gpu/drm/nouveau/dispnv04/overlay.c

373

container_of(plane, struct nouveau_plane, base);

drivers/gpu/drm/nouveau/dispnv04/overlay.c

443

nv04_disable_plane(struct drm_plane *plane,

drivers/gpu/drm/nouveau/dispnv04/overlay.c

446

struct nvif_object *dev = &nouveau_drm(plane->dev)->client.device.object;

drivers/gpu/drm/nouveau/dispnv04/overlay.c

448

container_of(plane, struct nouveau_plane, base);

drivers/gpu/drm/nouveau/dispnv04/overlay.c

473

struct nouveau_plane *plane = kzalloc_obj(struct nouveau_plane);

drivers/gpu/drm/nouveau/dispnv04/overlay.c

476

if (!plane)

drivers/gpu/drm/nouveau/dispnv04/overlay.c

479

ret = drm_universal_plane_init(device, &plane->base, 1 /* single crtc */,

drivers/gpu/drm/nouveau/dispnv04/overlay.c

486

plane->props.colorkey = drm_property_create_range(

drivers/gpu/drm/nouveau/dispnv04/overlay.c

488

plane->props.brightness = drm_property_create_range(

drivers/gpu/drm/nouveau/dispnv04/overlay.c

490

if (!plane->props.colorkey ||

drivers/gpu/drm/nouveau/dispnv04/overlay.c

491

!plane->props.brightness)

drivers/gpu/drm/nouveau/dispnv04/overlay.c

494

plane->colorkey = 0;

drivers/gpu/drm/nouveau/dispnv04/overlay.c

495

drm_object_attach_property(&plane->base.base,

drivers/gpu/drm/nouveau/dispnv04/overlay.c

496

plane->props.colorkey, plane->colorkey);

drivers/gpu/drm/nouveau/dispnv04/overlay.c

498

plane->brightness = 512;

drivers/gpu/drm/nouveau/dispnv04/overlay.c

499

drm_object_attach_property(&plane->base.base,

drivers/gpu/drm/nouveau/dispnv04/overlay.c

500

plane->props.brightness, plane->brightness);

drivers/gpu/drm/nouveau/dispnv04/overlay.c

502

drm_plane_force_disable(&plane->base);

drivers/gpu/drm/nouveau/dispnv04/overlay.c

505

drm_plane_cleanup(&plane->base);

drivers/gpu/drm/nouveau/dispnv04/overlay.c

507

kfree(plane);

drivers/gpu/drm/nouveau/dispnv50/curs507a.c

102

struct nouveau_drm *drm = nouveau_drm(wndw->plane.dev);

drivers/gpu/drm/nouveau/dispnv50/curs507a.c

133

wndw->plane.name, asyw->image.pitch[0], asyw->image.w);

drivers/gpu/drm/nouveau/dispnv50/curs507a.c

141

wndw->plane.name, asyw->image.w, asyw->image.h);

drivers/gpu/drm/nouveau/dispnv50/curs507a.c

149

wndw->plane.name, fb->format->format);

drivers/gpu/drm/nouveau/dispnv50/curs507a.c

37

nvif_msec(&nouveau_drm(wndw->plane.dev)->client.device, 100,

drivers/gpu/drm/nouveau/dispnv50/curs507a.c

81

u32 handle = nv50_disp(wndw->plane.dev)->core->chan.vram.handle;

drivers/gpu/drm/nouveau/dispnv50/disp.c

2156

struct drm_plane *plane;

drivers/gpu/drm/nouveau/dispnv50/disp.c

2159

for_each_new_plane_in_state(state, plane, new_plane_state, i) {

drivers/gpu/drm/nouveau/dispnv50/disp.c

2160

struct nv50_wndw *wndw = nv50_wndw(plane);

drivers/gpu/drm/nouveau/dispnv50/disp.c

2175

struct drm_plane *plane;

drivers/gpu/drm/nouveau/dispnv50/disp.c

2216

for_each_new_plane_in_state(state, plane, new_plane_state, i) {

drivers/gpu/drm/nouveau/dispnv50/disp.c

2218

struct nv50_wndw *wndw = nv50_wndw(plane);

drivers/gpu/drm/nouveau/dispnv50/disp.c

2220

NV_ATOMIC(drm, "%s: clr %02x (set %02x)\n", plane->name,

drivers/gpu/drm/nouveau/dispnv50/disp.c

2345

for_each_new_plane_in_state(state, plane, new_plane_state, i) {

drivers/gpu/drm/nouveau/dispnv50/disp.c

2347

struct nv50_wndw *wndw = nv50_wndw(plane);

drivers/gpu/drm/nouveau/dispnv50/disp.c

2349

NV_ATOMIC(drm, "%s: set %02x (clr %02x)\n", plane->name,

drivers/gpu/drm/nouveau/dispnv50/disp.c

2380

for_each_new_plane_in_state(state, plane, new_plane_state, i) {

drivers/gpu/drm/nouveau/dispnv50/disp.c

2382

struct nv50_wndw *wndw = nv50_wndw(plane);

drivers/gpu/drm/nouveau/dispnv50/disp.c

2385

NV_ERROR(drm, "%s: timeout\n", plane->name);

drivers/gpu/drm/nouveau/dispnv50/disp.c

2431

struct drm_plane *plane;

drivers/gpu/drm/nouveau/dispnv50/disp.c

2460

for_each_new_plane_in_state(state, plane, new_plane_state, i) {

drivers/gpu/drm/nouveau/dispnv50/disp.c

2462

struct nv50_wndw *wndw = nv50_wndw(plane);

drivers/gpu/drm/nouveau/dispnv50/head.c

611

drm_crtc_init_with_planes(dev, crtc, &base->plane, &curs->plane,

drivers/gpu/drm/nouveau/dispnv50/wndw.c

123

struct nv50_disp *disp = nv50_disp(wndw->plane.dev);

drivers/gpu/drm/nouveau/dispnv50/wndw.c

188

struct nv50_disp *disp = nv50_disp(wndw->plane.dev);

drivers/gpu/drm/nouveau/dispnv50/wndw.c

204

struct nouveau_drm *drm = nouveau_drm(wndw->plane.dev);

drivers/gpu/drm/nouveau/dispnv50/wndw.c

205

NV_ATOMIC(drm, "%s release\n", wndw->plane.name);

drivers/gpu/drm/nouveau/dispnv50/wndw.c

281

struct nouveau_drm *drm = nouveau_drm(wndw->plane.dev);

drivers/gpu/drm/nouveau/dispnv50/wndw.c

286

NV_ATOMIC(drm, "%s acquire\n", wndw->plane.name);

drivers/gpu/drm/nouveau/dispnv50/wndw.c

443

nv50_wndw_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/nouveau/dispnv50/wndw.c

447

plane);

drivers/gpu/drm/nouveau/dispnv50/wndw.c

448

struct nouveau_drm *drm = nouveau_drm(plane->dev);

drivers/gpu/drm/nouveau/dispnv50/wndw.c

449

struct nv50_wndw *wndw = nv50_wndw(plane);

drivers/gpu/drm/nouveau/dispnv50/wndw.c

450

struct nv50_wndw_atom *armw = nv50_wndw_atom(wndw->plane.state);

drivers/gpu/drm/nouveau/dispnv50/wndw.c

456

NV_ATOMIC(drm, "%s atomic_check\n", plane->name);

drivers/gpu/drm/nouveau/dispnv50/wndw.c

524

nv50_wndw_cleanup_fb(struct drm_plane *plane, struct drm_plane_state *old_state)

drivers/gpu/drm/nouveau/dispnv50/wndw.c

526

struct nouveau_drm *drm = nouveau_drm(plane->dev);

drivers/gpu/drm/nouveau/dispnv50/wndw.c

529

NV_ATOMIC(drm, "%s cleanup: %p\n", plane->name, old_state->fb);

drivers/gpu/drm/nouveau/dispnv50/wndw.c

538

nv50_wndw_prepare_fb(struct drm_plane *plane, struct drm_plane_state *state)

drivers/gpu/drm/nouveau/dispnv50/wndw.c

541

struct nouveau_drm *drm = nouveau_drm(plane->dev);

drivers/gpu/drm/nouveau/dispnv50/wndw.c

542

struct nv50_wndw *wndw = nv50_wndw(plane);

drivers/gpu/drm/nouveau/dispnv50/wndw.c

549

NV_ATOMIC(drm, "%s prepare: %p\n", plane->name, fb);

drivers/gpu/drm/nouveau/dispnv50/wndw.c

579

ret = drm_gem_plane_helper_prepare_fb(plane, state);

drivers/gpu/drm/nouveau/dispnv50/wndw.c

651

nv50_wndw_get_scanout_buffer(struct drm_plane *plane, struct drm_scanout_buffer *sb)

drivers/gpu/drm/nouveau/dispnv50/wndw.c

655

struct nouveau_drm *drm = nouveau_drm(plane->dev);

drivers/gpu/drm/nouveau/dispnv50/wndw.c

661

if (!plane->state || !plane->state->fb)

drivers/gpu/drm/nouveau/dispnv50/wndw.c

664

fb = plane->state->fb;

drivers/gpu/drm/nouveau/dispnv50/wndw.c

672

drm_warn(plane->dev, "nouveau bo map failed, panic won't be displayed\n");

drivers/gpu/drm/nouveau/dispnv50/wndw.c

720

nv50_wndw_atomic_destroy_state(struct drm_plane *plane,

drivers/gpu/drm/nouveau/dispnv50/wndw.c

729

nv50_wndw_atomic_duplicate_state(struct drm_plane *plane)

drivers/gpu/drm/nouveau/dispnv50/wndw.c

731

struct nv50_wndw_atom *armw = nv50_wndw_atom(plane->state);

drivers/gpu/drm/nouveau/dispnv50/wndw.c

735

__drm_atomic_helper_plane_duplicate_state(plane, &asyw->state);

drivers/gpu/drm/nouveau/dispnv50/wndw.c

749

nv50_wndw_zpos_default(struct drm_plane *plane)

drivers/gpu/drm/nouveau/dispnv50/wndw.c

751

return (plane->type == DRM_PLANE_TYPE_PRIMARY) ? 0 :

drivers/gpu/drm/nouveau/dispnv50/wndw.c

752

(plane->type == DRM_PLANE_TYPE_OVERLAY) ? 1 : 255;

drivers/gpu/drm/nouveau/dispnv50/wndw.c

756

nv50_wndw_reset(struct drm_plane *plane)

drivers/gpu/drm/nouveau/dispnv50/wndw.c

763

if (plane->state)

drivers/gpu/drm/nouveau/dispnv50/wndw.c

764

plane->funcs->atomic_destroy_state(plane, plane->state);

drivers/gpu/drm/nouveau/dispnv50/wndw.c

766

__drm_atomic_helper_plane_reset(plane, &asyw->state);

drivers/gpu/drm/nouveau/dispnv50/wndw.c

770

nv50_wndw_destroy(struct drm_plane *plane)

drivers/gpu/drm/nouveau/dispnv50/wndw.c

772

struct nv50_wndw *wndw = nv50_wndw(plane);

drivers/gpu/drm/nouveau/dispnv50/wndw.c

784

drm_plane_cleanup(&wndw->plane);

drivers/gpu/drm/nouveau/dispnv50/wndw.c

792

static bool nv50_plane_format_mod_supported(struct drm_plane *plane,

drivers/gpu/drm/nouveau/dispnv50/wndw.c

795

struct nouveau_drm *drm = nouveau_drm(plane->dev);

drivers/gpu/drm/nouveau/dispnv50/wndw.c

883

ret = drm_universal_plane_init(dev, &wndw->plane, heads, &nv50_wndw, format, nformat,

drivers/gpu/drm/nouveau/dispnv50/wndw.c

892

drm_plane_helper_add(&wndw->plane, &nv50_wndw_primary_helper);

drivers/gpu/drm/nouveau/dispnv50/wndw.c

894

drm_plane_helper_add(&wndw->plane, &nv50_wndw_helper);

drivers/gpu/drm/nouveau/dispnv50/wndw.c

903

ret = drm_plane_create_zpos_property(&wndw->plane,

drivers/gpu/drm/nouveau/dispnv50/wndw.c

904

nv50_wndw_zpos_default(&wndw->plane), 0, 254);

drivers/gpu/drm/nouveau/dispnv50/wndw.c

908

ret = drm_plane_create_alpha_property(&wndw->plane);

drivers/gpu/drm/nouveau/dispnv50/wndw.c

912

ret = drm_plane_create_blend_mode_property(&wndw->plane,

drivers/gpu/drm/nouveau/dispnv50/wndw.c

919

ret = drm_plane_create_zpos_immutable_property(&wndw->plane,

drivers/gpu/drm/nouveau/dispnv50/wndw.c

920

nv50_wndw_zpos_default(&wndw->plane));

drivers/gpu/drm/nouveau/dispnv50/wndw.h

24

struct drm_plane plane;

drivers/gpu/drm/nouveau/dispnv50/wndw.h

3

#define nv50_wndw(p) container_of((p), struct nv50_wndw, plane)

drivers/gpu/drm/nouveau/dispnv50/wndwca7e.c

158

struct nv50_disp *disp = nv50_disp(wndw->plane.dev);

drivers/gpu/drm/omapdrm/dss/dispc.c

1003

enum omap_plane_id plane,

drivers/gpu/drm/omapdrm/dss/dispc.c

1013

shift = shifts[plane];

drivers/gpu/drm/omapdrm/dss/dispc.c

1018

enum omap_plane_id plane, s32 inc)

drivers/gpu/drm/omapdrm/dss/dispc.c

1020

dispc_write_reg(dispc, DISPC_OVL_PIXEL_INC(plane), inc);

drivers/gpu/drm/omapdrm/dss/dispc.c

1024

enum omap_plane_id plane, s32 inc)

drivers/gpu/drm/omapdrm/dss/dispc.c

1026

dispc_write_reg(dispc, DISPC_OVL_ROW_INC(plane), inc);

drivers/gpu/drm/omapdrm/dss/dispc.c

1030

enum omap_plane_id plane, u32 fourcc)

drivers/gpu/drm/omapdrm/dss/dispc.c

1033

if (plane != OMAP_DSS_GFX) {

drivers/gpu/drm/omapdrm/dss/dispc.c

1099

REG_FLD_MOD(dispc, DISPC_OVL_ATTRIBUTES(plane), m, 4, 1);

drivers/gpu/drm/omapdrm/dss/dispc.c

1103

enum omap_plane_id plane,

drivers/gpu/drm/omapdrm/dss/dispc.c

1110

REG_FLD_MOD(dispc, DISPC_OVL_ATTRIBUTES(plane), 1, 29, 29);

drivers/gpu/drm/omapdrm/dss/dispc.c

1112

REG_FLD_MOD(dispc, DISPC_OVL_ATTRIBUTES(plane), 0, 29, 29);

drivers/gpu/drm/omapdrm/dss/dispc.c

1116

enum omap_plane_id plane,

drivers/gpu/drm/omapdrm/dss/dispc.c

1123

switch (plane) {

drivers/gpu/drm/omapdrm/dss/dispc.c

1137

val = dispc_read_reg(dispc, DISPC_OVL_ATTRIBUTES(plane));

drivers/gpu/drm/omapdrm/dss/dispc.c

1175

dispc_write_reg(dispc, DISPC_OVL_ATTRIBUTES(plane), val);

drivers/gpu/drm/omapdrm/dss/dispc.c

1179

enum omap_plane_id plane)

drivers/gpu/drm/omapdrm/dss/dispc.c

1184

switch (plane) {

drivers/gpu/drm/omapdrm/dss/dispc.c

1198

val = dispc_read_reg(dispc, DISPC_OVL_ATTRIBUTES(plane));

drivers/gpu/drm/omapdrm/dss/dispc.c

1220

enum omap_plane_id plane,

drivers/gpu/drm/omapdrm/dss/dispc.c

1226

shift = shifts[plane];

drivers/gpu/drm/omapdrm/dss/dispc.c

1227

REG_FLD_MOD(dispc, DISPC_OVL_ATTRIBUTES(plane), burst_size,

drivers/gpu/drm/omapdrm/dss/dispc.c

1244

enum omap_plane_id plane)

drivers/gpu/drm/omapdrm/dss/dispc.c

1251

enum omap_plane_id plane, u32 fourcc)

drivers/gpu/drm/omapdrm/dss/dispc.c

1256

modes = dispc->feat->supported_color_modes[plane];

drivers/gpu/drm/omapdrm/dss/dispc.c

1267

enum omap_plane_id plane)

drivers/gpu/drm/omapdrm/dss/dispc.c

1269

return dispc->feat->supported_color_modes[plane];

drivers/gpu/drm/omapdrm/dss/dispc.c

1303

enum omap_plane_id plane, bool enable)

drivers/gpu/drm/omapdrm/dss/dispc.c

1307

BUG_ON(plane == OMAP_DSS_GFX);

drivers/gpu/drm/omapdrm/dss/dispc.c

1309

val = dispc_read_reg(dispc, DISPC_OVL_ATTRIBUTES(plane));

drivers/gpu/drm/omapdrm/dss/dispc.c

1311

dispc_write_reg(dispc, DISPC_OVL_ATTRIBUTES(plane), val);

drivers/gpu/drm/omapdrm/dss/dispc.c

1315

enum omap_plane_id plane,

drivers/gpu/drm/omapdrm/dss/dispc.c

1325

shift = shifts[plane];

drivers/gpu/drm/omapdrm/dss/dispc.c

1326

REG_FLD_MOD(dispc, DISPC_OVL_ATTRIBUTES(plane), enable, shift, shift);

drivers/gpu/drm/omapdrm/dss/dispc.c

1416

enum omap_plane_id plane)

drivers/gpu/drm/omapdrm/dss/dispc.c

1422

if (dispc->fifo_assignment[fifo] == plane)

drivers/gpu/drm/omapdrm/dss/dispc.c

1430

enum omap_plane_id plane,

drivers/gpu/drm/omapdrm/dss/dispc.c

1450

plane,

drivers/gpu/drm/omapdrm/dss/dispc.c

1451

REG_GET(dispc, DISPC_OVL_FIFO_THRESHOLD(plane),

drivers/gpu/drm/omapdrm/dss/dispc.c

1453

REG_GET(dispc, DISPC_OVL_FIFO_THRESHOLD(plane),

drivers/gpu/drm/omapdrm/dss/dispc.c

1457

dispc_write_reg(dispc, DISPC_OVL_FIFO_THRESHOLD(plane),

drivers/gpu/drm/omapdrm/dss/dispc.c

1467

dispc->feat->set_max_preload && plane != OMAP_DSS_WB)

drivers/gpu/drm/omapdrm/dss/dispc.c

1468

dispc_write_reg(dispc, DISPC_OVL_PRELOAD(plane),

drivers/gpu/drm/omapdrm/dss/dispc.c

1473

enum omap_plane_id plane,

drivers/gpu/drm/omapdrm/dss/dispc.c

1485

burst_size = dispc_ovl_get_burst_size(dispc, plane);

drivers/gpu/drm/omapdrm/dss/dispc.c

1486

ovl_fifo_size = dispc_ovl_get_fifo_size(dispc, plane);

drivers/gpu/drm/omapdrm/dss/dispc.c

1505

} else if (plane == OMAP_DSS_WB) {

drivers/gpu/drm/omapdrm/dss/dispc.c

1520

enum omap_plane_id plane, bool enable)

drivers/gpu/drm/omapdrm/dss/dispc.c

1524

if (plane == OMAP_DSS_GFX)

drivers/gpu/drm/omapdrm/dss/dispc.c

1529

REG_FLD_MOD(dispc, DISPC_OVL_ATTRIBUTES(plane), enable, bit, bit);

drivers/gpu/drm/omapdrm/dss/dispc.c

1533

enum omap_plane_id plane,

drivers/gpu/drm/omapdrm/dss/dispc.c

1536

dispc_write_reg(dispc, DISPC_OVL_MFLAG_THRESHOLD(plane),

drivers/gpu/drm/omapdrm/dss/dispc.c

1598

enum omap_plane_id plane,

drivers/gpu/drm/omapdrm/dss/dispc.c

1614

dispc_write_reg(dispc, DISPC_OVL_FIR(plane), val);

drivers/gpu/drm/omapdrm/dss/dispc.c

1617

dispc_write_reg(dispc, DISPC_OVL_FIR2(plane), val);

drivers/gpu/drm/omapdrm/dss/dispc.c

1622

enum omap_plane_id plane, int haccu,

drivers/gpu/drm/omapdrm/dss/dispc.c

1636

dispc_write_reg(dispc, DISPC_OVL_ACCU0(plane), val);

drivers/gpu/drm/omapdrm/dss/dispc.c

1640

enum omap_plane_id plane, int haccu,

drivers/gpu/drm/omapdrm/dss/dispc.c

1654

dispc_write_reg(dispc, DISPC_OVL_ACCU1(plane), val);

drivers/gpu/drm/omapdrm/dss/dispc.c

1658

enum omap_plane_id plane, int haccu,

drivers/gpu/drm/omapdrm/dss/dispc.c

1664

dispc_write_reg(dispc, DISPC_OVL_ACCU2_0(plane), val);

drivers/gpu/drm/omapdrm/dss/dispc.c

1668

enum omap_plane_id plane, int haccu,

drivers/gpu/drm/omapdrm/dss/dispc.c

1674

dispc_write_reg(dispc, DISPC_OVL_ACCU2_1(plane), val);

drivers/gpu/drm/omapdrm/dss/dispc.c

1678

enum omap_plane_id plane,

drivers/gpu/drm/omapdrm/dss/dispc.c

1689

dispc_ovl_set_scale_coef(dispc, plane, fir_hinc, fir_vinc, five_taps,

drivers/gpu/drm/omapdrm/dss/dispc.c

1691

dispc_ovl_set_fir(dispc, plane, fir_hinc, fir_vinc, color_comp);

drivers/gpu/drm/omapdrm/dss/dispc.c

1695

enum omap_plane_id plane,

drivers/gpu/drm/omapdrm/dss/dispc.c

1779

dispc_ovl_set_vid_accu2_0(dispc, plane, h_accu2_0, v_accu2_0);

drivers/gpu/drm/omapdrm/dss/dispc.c

1780

dispc_ovl_set_vid_accu2_1(dispc, plane, h_accu2_1, v_accu2_1);

drivers/gpu/drm/omapdrm/dss/dispc.c

1784

enum omap_plane_id plane,

drivers/gpu/drm/omapdrm/dss/dispc.c

1795

dispc_ovl_set_scale_param(dispc, plane, orig_width, orig_height,

drivers/gpu/drm/omapdrm/dss/dispc.c

1798

l = dispc_read_reg(dispc, DISPC_OVL_ATTRIBUTES(plane));

drivers/gpu/drm/omapdrm/dss/dispc.c

1819

dispc_write_reg(dispc, DISPC_OVL_ATTRIBUTES(plane), l);

drivers/gpu/drm/omapdrm/dss/dispc.c

1834

dispc_ovl_set_vid_accu0(dispc, plane, 0, accu0);

drivers/gpu/drm/omapdrm/dss/dispc.c

1835

dispc_ovl_set_vid_accu1(dispc, plane, 0, accu1);

drivers/gpu/drm/omapdrm/dss/dispc.c

1839

enum omap_plane_id plane,

drivers/gpu/drm/omapdrm/dss/dispc.c

1848

bool chroma_upscale = plane != OMAP_DSS_WB;

drivers/gpu/drm/omapdrm/dss/dispc.c

1858

if (plane != OMAP_DSS_WB)

drivers/gpu/drm/omapdrm/dss/dispc.c

1859

REG_FLD_MOD(dispc, DISPC_OVL_ATTRIBUTES2(plane),

drivers/gpu/drm/omapdrm/dss/dispc.c

1864

dispc_ovl_set_accu_uv(dispc, plane, orig_width, orig_height, out_width,

drivers/gpu/drm/omapdrm/dss/dispc.c

1907

dispc_ovl_set_scale_param(dispc, plane, orig_width, orig_height,

drivers/gpu/drm/omapdrm/dss/dispc.c

1911

if (plane != OMAP_DSS_WB)

drivers/gpu/drm/omapdrm/dss/dispc.c

1912

REG_FLD_MOD(dispc, DISPC_OVL_ATTRIBUTES2(plane),

drivers/gpu/drm/omapdrm/dss/dispc.c

1916

REG_FLD_MOD(dispc, DISPC_OVL_ATTRIBUTES(plane), scale_x ? 1 : 0, 5, 5);

drivers/gpu/drm/omapdrm/dss/dispc.c

1918

REG_FLD_MOD(dispc, DISPC_OVL_ATTRIBUTES(plane), scale_y ? 1 : 0, 6, 6);

drivers/gpu/drm/omapdrm/dss/dispc.c

1922

enum omap_plane_id plane,

drivers/gpu/drm/omapdrm/dss/dispc.c

1929

BUG_ON(plane == OMAP_DSS_GFX);

drivers/gpu/drm/omapdrm/dss/dispc.c

1931

dispc_ovl_set_scaling_common(dispc, plane, orig_width, orig_height,

drivers/gpu/drm/omapdrm/dss/dispc.c

1935

dispc_ovl_set_scaling_uv(dispc, plane, orig_width, orig_height,

drivers/gpu/drm/omapdrm/dss/dispc.c

1941

enum omap_plane_id plane, u8 rotation,

drivers/gpu/drm/omapdrm/dss/dispc.c

1997

REG_FLD_MOD(dispc, DISPC_OVL_ATTRIBUTES(plane), vidrot, 13, 12);

drivers/gpu/drm/omapdrm/dss/dispc.c

1999

REG_FLD_MOD(dispc, DISPC_OVL_ATTRIBUTES(plane),

drivers/gpu/drm/omapdrm/dss/dispc.c

2002

if (dispc_ovl_color_mode_supported(dispc, plane, DRM_FORMAT_NV12)) {

drivers/gpu/drm/omapdrm/dss/dispc.c

2009

REG_FLD_MOD(dispc, DISPC_OVL_ATTRIBUTES(plane),

drivers/gpu/drm/omapdrm/dss/dispc.c

2447

enum omap_overlay_caps dispc_ovl_get_caps(struct dispc_device *dispc, enum omap_plane_id plane)

drivers/gpu/drm/omapdrm/dss/dispc.c

2449

return dispc->feat->overlay_caps[plane];

drivers/gpu/drm/omapdrm/dss/dispc.c

2456

enum omap_plane_id plane,

drivers/gpu/drm/omapdrm/dss/dispc.c

2489

if (plane == OMAP_DSS_WB) {

drivers/gpu/drm/omapdrm/dss/dispc.c

2571

enum omap_plane_id plane,

drivers/gpu/drm/omapdrm/dss/dispc.c

2597

unsigned long pclk = dispc_plane_pclk_rate(dispc, plane);

drivers/gpu/drm/omapdrm/dss/dispc.c

2598

unsigned long lclk = dispc_plane_lclk_rate(dispc, plane);

drivers/gpu/drm/omapdrm/dss/dispc.c

2604

if (plane == OMAP_DSS_WB)

drivers/gpu/drm/omapdrm/dss/dispc.c

2618

if (plane != OMAP_DSS_WB) {

drivers/gpu/drm/omapdrm/dss/dispc.c

2633

if (!dispc_ovl_color_mode_supported(dispc, plane, fourcc))

drivers/gpu/drm/omapdrm/dss/dispc.c

2636

r = dispc_ovl_calc_scaling(dispc, plane, pclk, lclk, caps, vm, in_width,

drivers/gpu/drm/omapdrm/dss/dispc.c

2684

if (plane == OMAP_DSS_WB)

drivers/gpu/drm/omapdrm/dss/dispc.c

2698

dispc_ovl_set_color_mode(dispc, plane, fourcc);

drivers/gpu/drm/omapdrm/dss/dispc.c

2700

dispc_ovl_configure_burst_type(dispc, plane, rotation_type);

drivers/gpu/drm/omapdrm/dss/dispc.c

2705

dispc_ovl_set_ba0(dispc, plane, paddr + offset0);

drivers/gpu/drm/omapdrm/dss/dispc.c

2706

dispc_ovl_set_ba1(dispc, plane, paddr + offset1);

drivers/gpu/drm/omapdrm/dss/dispc.c

2709

dispc_ovl_set_ba0_uv(dispc, plane, p_uv_addr + offset0);

drivers/gpu/drm/omapdrm/dss/dispc.c

2710

dispc_ovl_set_ba1_uv(dispc, plane, p_uv_addr + offset1);

drivers/gpu/drm/omapdrm/dss/dispc.c

2716

dispc_ovl_set_row_inc(dispc, plane, row_inc);

drivers/gpu/drm/omapdrm/dss/dispc.c

2717

dispc_ovl_set_pix_inc(dispc, plane, pix_inc);

drivers/gpu/drm/omapdrm/dss/dispc.c

2722

dispc_ovl_set_pos(dispc, plane, caps, pos_x, pos_y);

drivers/gpu/drm/omapdrm/dss/dispc.c

2724

dispc_ovl_set_input_size(dispc, plane, in_width, in_height);

drivers/gpu/drm/omapdrm/dss/dispc.c

2727

dispc_ovl_set_scaling(dispc, plane, in_width, in_height,

drivers/gpu/drm/omapdrm/dss/dispc.c

2730

dispc_ovl_set_output_size(dispc, plane, out_width, out_height);

drivers/gpu/drm/omapdrm/dss/dispc.c

2731

dispc_ovl_set_vid_color_conv(dispc, plane, cconv);

drivers/gpu/drm/omapdrm/dss/dispc.c

2733

if (plane != OMAP_DSS_WB)

drivers/gpu/drm/omapdrm/dss/dispc.c

2734

dispc_ovl_set_csc(dispc, plane, color_encoding, color_range);

drivers/gpu/drm/omapdrm/dss/dispc.c

2737

dispc_ovl_set_rotation_attrs(dispc, plane, rotation, rotation_type,

drivers/gpu/drm/omapdrm/dss/dispc.c

2740

dispc_ovl_set_zorder(dispc, plane, caps, zorder);

drivers/gpu/drm/omapdrm/dss/dispc.c

2741

dispc_ovl_set_pre_mult_alpha(dispc, plane, caps, pre_mult_alpha);

drivers/gpu/drm/omapdrm/dss/dispc.c

2742

dispc_ovl_setup_global_alpha(dispc, plane, caps, global_alpha);

drivers/gpu/drm/omapdrm/dss/dispc.c

2744

dispc_ovl_enable_replication(dispc, plane, caps, replication);

drivers/gpu/drm/omapdrm/dss/dispc.c

2750

enum omap_plane_id plane,

drivers/gpu/drm/omapdrm/dss/dispc.c

2756

enum omap_overlay_caps caps = dispc->feat->overlay_caps[plane];

drivers/gpu/drm/omapdrm/dss/dispc.c

2761

plane, &oi->paddr, &oi->p_uv_addr, oi->screen_width, oi->pos_x,

drivers/gpu/drm/omapdrm/dss/dispc.c

2765

dispc_ovl_set_channel_out(dispc, plane, channel);

drivers/gpu/drm/omapdrm/dss/dispc.c

2767

r = dispc_ovl_setup_common(dispc, plane, caps, oi->paddr, oi->p_uv_addr,

drivers/gpu/drm/omapdrm/dss/dispc.c

2778

enum omap_plane_id plane, bool enable)

drivers/gpu/drm/omapdrm/dss/dispc.c

2780

DSSDBG("dispc_enable_plane %d, %d\n", plane, enable);

drivers/gpu/drm/omapdrm/dss/dispc.c

2782

REG_FLD_MOD(dispc, DISPC_OVL_ATTRIBUTES(plane), enable ? 1 : 0, 0, 0);

drivers/gpu/drm/omapdrm/dss/dispc.c

3247

enum omap_plane_id plane)

drivers/gpu/drm/omapdrm/dss/dispc.c

3251

if (plane == OMAP_DSS_WB)

drivers/gpu/drm/omapdrm/dss/dispc.c

3254

channel = dispc_ovl_get_channel_out(dispc, plane);

drivers/gpu/drm/omapdrm/dss/dispc.c

3260

enum omap_plane_id plane)

drivers/gpu/drm/omapdrm/dss/dispc.c

3264

if (plane == OMAP_DSS_WB)

drivers/gpu/drm/omapdrm/dss/dispc.c

3267

channel = dispc_ovl_get_channel_out(dispc, plane);

drivers/gpu/drm/omapdrm/dss/dispc.c

3485

#define DISPC_REG(plane, name, i) name(plane, i)

drivers/gpu/drm/omapdrm/dss/dispc.c

3486

#define DUMPREG(dispc, plane, name, i) \

drivers/gpu/drm/omapdrm/dss/dispc.c

3487

seq_printf(s, "%s_%d(%s)%*s %08x\n", #name, i, p_names[plane], \

drivers/gpu/drm/omapdrm/dss/dispc.c

3488

(int)(46 - strlen(#name) - strlen(p_names[plane])), " ", \

drivers/gpu/drm/omapdrm/dss/dispc.c

3489

dispc_read_reg(dispc, DISPC_REG(plane, name, i)))

drivers/gpu/drm/omapdrm/dss/dispc.c

352

enum omap_plane_id plane);

drivers/gpu/drm/omapdrm/dss/dispc.c

354

enum omap_plane_id plane);

drivers/gpu/drm/omapdrm/dss/dispc.c

725

enum omap_plane_id plane, int reg,

drivers/gpu/drm/omapdrm/dss/dispc.c

728

dispc_write_reg(dispc, DISPC_OVL_FIR_COEF_H(plane, reg), value);

drivers/gpu/drm/omapdrm/dss/dispc.c

732

enum omap_plane_id plane, int reg,

drivers/gpu/drm/omapdrm/dss/dispc.c

735

dispc_write_reg(dispc, DISPC_OVL_FIR_COEF_HV(plane, reg), value);

drivers/gpu/drm/omapdrm/dss/dispc.c

739

enum omap_plane_id plane, int reg,

drivers/gpu/drm/omapdrm/dss/dispc.c

742

dispc_write_reg(dispc, DISPC_OVL_FIR_COEF_V(plane, reg), value);

drivers/gpu/drm/omapdrm/dss/dispc.c

746

enum omap_plane_id plane, int reg,

drivers/gpu/drm/omapdrm/dss/dispc.c

749

BUG_ON(plane == OMAP_DSS_GFX);

drivers/gpu/drm/omapdrm/dss/dispc.c

751

dispc_write_reg(dispc, DISPC_OVL_FIR_COEF_H2(plane, reg), value);

drivers/gpu/drm/omapdrm/dss/dispc.c

755

enum omap_plane_id plane, int reg,

drivers/gpu/drm/omapdrm/dss/dispc.c

758

BUG_ON(plane == OMAP_DSS_GFX);

drivers/gpu/drm/omapdrm/dss/dispc.c

760

dispc_write_reg(dispc, DISPC_OVL_FIR_COEF_HV2(plane, reg), value);

drivers/gpu/drm/omapdrm/dss/dispc.c

764

enum omap_plane_id plane, int reg,

drivers/gpu/drm/omapdrm/dss/dispc.c

767

BUG_ON(plane == OMAP_DSS_GFX);

drivers/gpu/drm/omapdrm/dss/dispc.c

769

dispc_write_reg(dispc, DISPC_OVL_FIR_COEF_V2(plane, reg), value);

drivers/gpu/drm/omapdrm/dss/dispc.c

773

enum omap_plane_id plane, int fir_hinc,

drivers/gpu/drm/omapdrm/dss/dispc.c

802

dispc_ovl_write_firh_reg(dispc, plane, i, h);

drivers/gpu/drm/omapdrm/dss/dispc.c

803

dispc_ovl_write_firhv_reg(dispc, plane, i, hv);

drivers/gpu/drm/omapdrm/dss/dispc.c

805

dispc_ovl_write_firh2_reg(dispc, plane, i, h);

drivers/gpu/drm/omapdrm/dss/dispc.c

806

dispc_ovl_write_firhv2_reg(dispc, plane, i, hv);

drivers/gpu/drm/omapdrm/dss/dispc.c

817

dispc_ovl_write_firv_reg(dispc, plane, i, v);

drivers/gpu/drm/omapdrm/dss/dispc.c

819

dispc_ovl_write_firv2_reg(dispc, plane, i, v);

drivers/gpu/drm/omapdrm/dss/dispc.c

830

enum omap_plane_id plane,

drivers/gpu/drm/omapdrm/dss/dispc.c

835

dispc_write_reg(dispc, DISPC_OVL_CONV_COEF(plane, 0), CVAL(ct->rcr, ct->ry));

drivers/gpu/drm/omapdrm/dss/dispc.c

836

dispc_write_reg(dispc, DISPC_OVL_CONV_COEF(plane, 1), CVAL(ct->gy, ct->rcb));

drivers/gpu/drm/omapdrm/dss/dispc.c

837

dispc_write_reg(dispc, DISPC_OVL_CONV_COEF(plane, 2), CVAL(ct->gcb, ct->gcr));

drivers/gpu/drm/omapdrm/dss/dispc.c

838

dispc_write_reg(dispc, DISPC_OVL_CONV_COEF(plane, 3), CVAL(ct->bcr, ct->by));

drivers/gpu/drm/omapdrm/dss/dispc.c

839

dispc_write_reg(dispc, DISPC_OVL_CONV_COEF(plane, 4), CVAL(0, ct->bcb));

drivers/gpu/drm/omapdrm/dss/dispc.c

841

REG_FLD_MOD(dispc, DISPC_OVL_ATTRIBUTES(plane), ct->full_range, 11, 11);

drivers/gpu/drm/omapdrm/dss/dispc.c

879

enum omap_plane_id plane,

drivers/gpu/drm/omapdrm/dss/dispc.c

901

dispc_ovl_write_color_conv_coef(dispc, plane, csc);

drivers/gpu/drm/omapdrm/dss/dispc.c

905

enum omap_plane_id plane, u32 paddr)

drivers/gpu/drm/omapdrm/dss/dispc.c

907

dispc_write_reg(dispc, DISPC_OVL_BA0(plane), paddr);

drivers/gpu/drm/omapdrm/dss/dispc.c

911

enum omap_plane_id plane, u32 paddr)

drivers/gpu/drm/omapdrm/dss/dispc.c

913

dispc_write_reg(dispc, DISPC_OVL_BA1(plane), paddr);

drivers/gpu/drm/omapdrm/dss/dispc.c

917

enum omap_plane_id plane, u32 paddr)

drivers/gpu/drm/omapdrm/dss/dispc.c

919

dispc_write_reg(dispc, DISPC_OVL_BA0_UV(plane), paddr);

drivers/gpu/drm/omapdrm/dss/dispc.c

923

enum omap_plane_id plane, u32 paddr)

drivers/gpu/drm/omapdrm/dss/dispc.c

925

dispc_write_reg(dispc, DISPC_OVL_BA1_UV(plane), paddr);

drivers/gpu/drm/omapdrm/dss/dispc.c

929

enum omap_plane_id plane,

drivers/gpu/drm/omapdrm/dss/dispc.c

939

dispc_write_reg(dispc, DISPC_OVL_POSITION(plane), val);

drivers/gpu/drm/omapdrm/dss/dispc.c

943

enum omap_plane_id plane, int width,

drivers/gpu/drm/omapdrm/dss/dispc.c

948

if (plane == OMAP_DSS_GFX || plane == OMAP_DSS_WB)

drivers/gpu/drm/omapdrm/dss/dispc.c

949

dispc_write_reg(dispc, DISPC_OVL_SIZE(plane), val);

drivers/gpu/drm/omapdrm/dss/dispc.c

951

dispc_write_reg(dispc, DISPC_OVL_PICTURE_SIZE(plane), val);

drivers/gpu/drm/omapdrm/dss/dispc.c

955

enum omap_plane_id plane, int width,

drivers/gpu/drm/omapdrm/dss/dispc.c

960

BUG_ON(plane == OMAP_DSS_GFX);

drivers/gpu/drm/omapdrm/dss/dispc.c

964

if (plane == OMAP_DSS_WB)

drivers/gpu/drm/omapdrm/dss/dispc.c

965

dispc_write_reg(dispc, DISPC_OVL_PICTURE_SIZE(plane), val);

drivers/gpu/drm/omapdrm/dss/dispc.c

967

dispc_write_reg(dispc, DISPC_OVL_SIZE(plane), val);

drivers/gpu/drm/omapdrm/dss/dispc.c

971

enum omap_plane_id plane,

drivers/gpu/drm/omapdrm/dss/dispc.c

977

REG_FLD_MOD(dispc, DISPC_OVL_ATTRIBUTES(plane), zorder, 27, 26);

drivers/gpu/drm/omapdrm/dss/dispc.c

992

enum omap_plane_id plane,

drivers/gpu/drm/omapdrm/dss/dispc.c

999

REG_FLD_MOD(dispc, DISPC_OVL_ATTRIBUTES(plane), enable ? 1 : 0, 28, 28);

drivers/gpu/drm/omapdrm/dss/dispc.h

342

static inline u16 DISPC_OVL_BASE(enum omap_plane_id plane)

drivers/gpu/drm/omapdrm/dss/dispc.h

344

switch (plane) {

drivers/gpu/drm/omapdrm/dss/dispc.h

362

static inline u16 DISPC_BA0_OFFSET(enum omap_plane_id plane)

drivers/gpu/drm/omapdrm/dss/dispc.h

364

switch (plane) {

drivers/gpu/drm/omapdrm/dss/dispc.h

378

static inline u16 DISPC_BA1_OFFSET(enum omap_plane_id plane)

drivers/gpu/drm/omapdrm/dss/dispc.h

380

switch (plane) {

drivers/gpu/drm/omapdrm/dss/dispc.h

394

static inline u16 DISPC_BA0_UV_OFFSET(enum omap_plane_id plane)

drivers/gpu/drm/omapdrm/dss/dispc.h

396

switch (plane) {

drivers/gpu/drm/omapdrm/dss/dispc.h

414

static inline u16 DISPC_BA1_UV_OFFSET(enum omap_plane_id plane)

drivers/gpu/drm/omapdrm/dss/dispc.h

416

switch (plane) {

drivers/gpu/drm/omapdrm/dss/dispc.h

434

static inline u16 DISPC_POS_OFFSET(enum omap_plane_id plane)

drivers/gpu/drm/omapdrm/dss/dispc.h

436

switch (plane) {

drivers/gpu/drm/omapdrm/dss/dispc.h

449

static inline u16 DISPC_SIZE_OFFSET(enum omap_plane_id plane)

drivers/gpu/drm/omapdrm/dss/dispc.h

451

switch (plane) {

drivers/gpu/drm/omapdrm/dss/dispc.h

465

static inline u16 DISPC_ATTR_OFFSET(enum omap_plane_id plane)

drivers/gpu/drm/omapdrm/dss/dispc.h

467

switch (plane) {

drivers/gpu/drm/omapdrm/dss/dispc.h

482

static inline u16 DISPC_ATTR2_OFFSET(enum omap_plane_id plane)

drivers/gpu/drm/omapdrm/dss/dispc.h

484

switch (plane) {

drivers/gpu/drm/omapdrm/dss/dispc.h

502

static inline u16 DISPC_FIFO_THRESH_OFFSET(enum omap_plane_id plane)

drivers/gpu/drm/omapdrm/dss/dispc.h

504

switch (plane) {

drivers/gpu/drm/omapdrm/dss/dispc.h

519

static inline u16 DISPC_FIFO_SIZE_STATUS_OFFSET(enum omap_plane_id plane)

drivers/gpu/drm/omapdrm/dss/dispc.h

521

switch (plane) {

drivers/gpu/drm/omapdrm/dss/dispc.h

536

static inline u16 DISPC_ROW_INC_OFFSET(enum omap_plane_id plane)

drivers/gpu/drm/omapdrm/dss/dispc.h

538

switch (plane) {

drivers/gpu/drm/omapdrm/dss/dispc.h

553

static inline u16 DISPC_PIX_INC_OFFSET(enum omap_plane_id plane)

drivers/gpu/drm/omapdrm/dss/dispc.h

555

switch (plane) {

drivers/gpu/drm/omapdrm/dss/dispc.h

570

static inline u16 DISPC_WINDOW_SKIP_OFFSET(enum omap_plane_id plane)

drivers/gpu/drm/omapdrm/dss/dispc.h

572

switch (plane) {

drivers/gpu/drm/omapdrm/dss/dispc.h

586

static inline u16 DISPC_TABLE_BA_OFFSET(enum omap_plane_id plane)

drivers/gpu/drm/omapdrm/dss/dispc.h

588

switch (plane) {

drivers/gpu/drm/omapdrm/dss/dispc.h

602

static inline u16 DISPC_FIR_OFFSET(enum omap_plane_id plane)

drivers/gpu/drm/omapdrm/dss/dispc.h

604

switch (plane) {

drivers/gpu/drm/omapdrm/dss/dispc.h

620

static inline u16 DISPC_FIR2_OFFSET(enum omap_plane_id plane)

drivers/gpu/drm/omapdrm/dss/dispc.h

622

switch (plane) {

drivers/gpu/drm/omapdrm/dss/dispc.h

640

static inline u16 DISPC_PIC_SIZE_OFFSET(enum omap_plane_id plane)

drivers/gpu/drm/omapdrm/dss/dispc.h

642

switch (plane) {

drivers/gpu/drm/omapdrm/dss/dispc.h

659

static inline u16 DISPC_ACCU0_OFFSET(enum omap_plane_id plane)

drivers/gpu/drm/omapdrm/dss/dispc.h

661

switch (plane) {

drivers/gpu/drm/omapdrm/dss/dispc.h

677

static inline u16 DISPC_ACCU2_0_OFFSET(enum omap_plane_id plane)

drivers/gpu/drm/omapdrm/dss/dispc.h

679

switch (plane) {

drivers/gpu/drm/omapdrm/dss/dispc.h

697

static inline u16 DISPC_ACCU1_OFFSET(enum omap_plane_id plane)

drivers/gpu/drm/omapdrm/dss/dispc.h

699

switch (plane) {

drivers/gpu/drm/omapdrm/dss/dispc.h

715

static inline u16 DISPC_ACCU2_1_OFFSET(enum omap_plane_id plane)

drivers/gpu/drm/omapdrm/dss/dispc.h

717

switch (plane) {

drivers/gpu/drm/omapdrm/dss/dispc.h

736

static inline u16 DISPC_FIR_COEF_H_OFFSET(enum omap_plane_id plane, u16 i)

drivers/gpu/drm/omapdrm/dss/dispc.h

738

switch (plane) {

drivers/gpu/drm/omapdrm/dss/dispc.h

755

static inline u16 DISPC_FIR_COEF_H2_OFFSET(enum omap_plane_id plane, u16 i)

drivers/gpu/drm/omapdrm/dss/dispc.h

757

switch (plane) {

drivers/gpu/drm/omapdrm/dss/dispc.h

776

static inline u16 DISPC_FIR_COEF_HV_OFFSET(enum omap_plane_id plane, u16 i)

drivers/gpu/drm/omapdrm/dss/dispc.h

778

switch (plane) {

drivers/gpu/drm/omapdrm/dss/dispc.h

795

static inline u16 DISPC_FIR_COEF_HV2_OFFSET(enum omap_plane_id plane, u16 i)

drivers/gpu/drm/omapdrm/dss/dispc.h

797

switch (plane) {

drivers/gpu/drm/omapdrm/dss/dispc.h

816

static inline u16 DISPC_CONV_COEF_OFFSET(enum omap_plane_id plane, u16 i)

drivers/gpu/drm/omapdrm/dss/dispc.h

818

switch (plane) {

drivers/gpu/drm/omapdrm/dss/dispc.h

834

static inline u16 DISPC_FIR_COEF_V_OFFSET(enum omap_plane_id plane, u16 i)

drivers/gpu/drm/omapdrm/dss/dispc.h

836

switch (plane) {

drivers/gpu/drm/omapdrm/dss/dispc.h

854

static inline u16 DISPC_FIR_COEF_V2_OFFSET(enum omap_plane_id plane, u16 i)

drivers/gpu/drm/omapdrm/dss/dispc.h

856

switch (plane) {

drivers/gpu/drm/omapdrm/dss/dispc.h

874

static inline u16 DISPC_PRELOAD_OFFSET(enum omap_plane_id plane)

drivers/gpu/drm/omapdrm/dss/dispc.h

876

switch (plane) {

drivers/gpu/drm/omapdrm/dss/dispc.h

891

static inline u16 DISPC_MFLAG_THRESHOLD_OFFSET(enum omap_plane_id plane)

drivers/gpu/drm/omapdrm/dss/dispc.h

893

switch (plane) {

drivers/gpu/drm/omapdrm/dss/dss.h

398

enum omap_plane_id plane);

drivers/gpu/drm/omapdrm/dss/dss.h

402

enum omap_plane_id plane, u32 fourcc);

drivers/gpu/drm/omapdrm/dss/dss.h

403

enum omap_overlay_caps dispc_ovl_get_caps(struct dispc_device *dispc, enum omap_plane_id plane);

drivers/gpu/drm/omapdrm/dss/dss.h

452

enum omap_plane_id plane,

drivers/gpu/drm/omapdrm/dss/dss.h

458

enum omap_plane_id plane, bool enable);

drivers/gpu/drm/omapdrm/dss/dss.h

478

enum omap_plane_id plane, u32 low, u32 high);

drivers/gpu/drm/omapdrm/dss/dss.h

480

enum omap_plane_id plane,

drivers/gpu/drm/omapdrm/omap_crtc.c

784

struct drm_plane *plane)

drivers/gpu/drm/omapdrm/omap_crtc.c

821

ret = drm_crtc_init_with_planes(dev, crtc, plane, NULL,

drivers/gpu/drm/omapdrm/omap_crtc.h

27

struct drm_plane *plane);

drivers/gpu/drm/omapdrm/omap_drv.c

128

return sa->plane->base.id - sb->plane->base.id;

drivers/gpu/drm/omapdrm/omap_drv.c

143

struct drm_plane *plane;

drivers/gpu/drm/omapdrm/omap_drv.c

165

drm_for_each_plane_mask(plane, dev, new_state->plane_mask) {

drivers/gpu/drm/omapdrm/omap_drv.c

168

plane);

drivers/gpu/drm/omapdrm/omap_drv.c

180

plane = states[i]->plane;

drivers/gpu/drm/omapdrm/omap_drv.c

184

plane->base.id, plane->name,

drivers/gpu/drm/omapdrm/omap_drv.c

442

struct drm_plane *plane;

drivers/gpu/drm/omapdrm/omap_drv.c

447

plane = omap_plane_init(dev, i, type, plane_crtc_mask);

drivers/gpu/drm/omapdrm/omap_drv.c

448

if (IS_ERR(plane))

drivers/gpu/drm/omapdrm/omap_drv.c

449

return PTR_ERR(plane);

drivers/gpu/drm/omapdrm/omap_drv.c

451

priv->planes[priv->num_planes++] = plane;

drivers/gpu/drm/omapdrm/omap_fb.c

273

struct plane *plane = &omap_fb->planes[i];

drivers/gpu/drm/omapdrm/omap_fb.c

274

ret = omap_gem_pin(fb->obj[i], &plane->dma_addr);

drivers/gpu/drm/omapdrm/omap_fb.c

288

struct plane *plane = &omap_fb->planes[i];

drivers/gpu/drm/omapdrm/omap_fb.c

290

plane->dma_addr = 0;

drivers/gpu/drm/omapdrm/omap_fb.c

314

struct plane *plane = &omap_fb->planes[i];

drivers/gpu/drm/omapdrm/omap_fb.c

316

plane->dma_addr = 0;

drivers/gpu/drm/omapdrm/omap_fb.c

423

struct plane *plane = &omap_fb->planes[i];

drivers/gpu/drm/omapdrm/omap_fb.c

438

plane->dma_addr = 0;

drivers/gpu/drm/omapdrm/omap_fb.c

57

struct plane planes[2];

drivers/gpu/drm/omapdrm/omap_fb.c

90

struct plane *plane = &omap_fb->planes[n];

drivers/gpu/drm/omapdrm/omap_fb.c

97

return plane->dma_addr + offset;

drivers/gpu/drm/omapdrm/omap_overlay.c

102

r_ovl->name, plane->name, caps);

drivers/gpu/drm/omapdrm/omap_overlay.c

69

int omap_overlay_assign(struct drm_atomic_commit *s, struct drm_plane *plane,

drivers/gpu/drm/omapdrm/omap_overlay.c

82

overlay_map[ovl->idx] = plane;

drivers/gpu/drm/omapdrm/omap_overlay.c

94

overlay_map[r_ovl->idx] = plane;

drivers/gpu/drm/omapdrm/omap_overlay.c

98

DBG("%s: assign to plane %s caps %x", ovl->name, plane->name, caps);

drivers/gpu/drm/omapdrm/omap_overlay.h

30

int omap_overlay_assign(struct drm_atomic_commit *s, struct drm_plane *plane,

drivers/gpu/drm/omapdrm/omap_plane.c

145

dev_err(plane->dev->dev, "Failed to setup plane %s\n",

drivers/gpu/drm/omapdrm/omap_plane.c

146

plane->name);

drivers/gpu/drm/omapdrm/omap_plane.c

158

dev_err(plane->dev->dev, "Failed to setup plane right-overlay %s\n",

drivers/gpu/drm/omapdrm/omap_plane.c

159

plane->name);

drivers/gpu/drm/omapdrm/omap_plane.c

169

static void omap_plane_atomic_disable(struct drm_plane *plane,

drivers/gpu/drm/omapdrm/omap_plane.c

172

struct omap_drm_private *priv = plane->dev->dev_private;

drivers/gpu/drm/omapdrm/omap_plane.c

173

struct omap_plane *omap_plane = to_omap_plane(plane);

drivers/gpu/drm/omapdrm/omap_plane.c

175

plane);

drivers/gpu/drm/omapdrm/omap_plane.c

177

plane);

drivers/gpu/drm/omapdrm/omap_plane.c

188

new_state->zpos = plane->type == DRM_PLANE_TYPE_PRIMARY ? 0 : omap_plane->id;

drivers/gpu/drm/omapdrm/omap_plane.c

201

static int omap_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/omapdrm/omap_plane.c

205

plane);

drivers/gpu/drm/omapdrm/omap_plane.c

207

plane);

drivers/gpu/drm/omapdrm/omap_plane.c

208

struct omap_drm_private *priv = plane->dev->dev_private;

drivers/gpu/drm/omapdrm/omap_plane.c

229

crtc = new_plane_state->crtc ? new_plane_state->crtc : plane->state->crtc;

drivers/gpu/drm/omapdrm/omap_plane.c

250

DBG("%s: visible %d -> %d", plane->name,

drivers/gpu/drm/omapdrm/omap_plane.c

339

ret = omap_overlay_assign(state, plane, caps, fourcc, &new_ovl,

drivers/gpu/drm/omapdrm/omap_plane.c

342

DBG("%s: failed to assign hw_overlay", plane->name);

drivers/gpu/drm/omapdrm/omap_plane.c

355

DBG("plane: %s overlay_id: %d", plane->name, omap_state->overlay->id);

drivers/gpu/drm/omapdrm/omap_plane.c

358

DBG("plane: %s r_overlay_id: %d", plane->name, omap_state->r_overlay->id);

drivers/gpu/drm/omapdrm/omap_plane.c

371

static void omap_plane_destroy(struct drm_plane *plane)

drivers/gpu/drm/omapdrm/omap_plane.c

373

struct omap_plane *omap_plane = to_omap_plane(plane);

drivers/gpu/drm/omapdrm/omap_plane.c

375

DBG("%s", plane->name);

drivers/gpu/drm/omapdrm/omap_plane.c

377

drm_plane_cleanup(plane);

drivers/gpu/drm/omapdrm/omap_plane.c

383

void omap_plane_install_properties(struct drm_plane *plane,

drivers/gpu/drm/omapdrm/omap_plane.c

386

struct drm_device *dev = plane->dev;

drivers/gpu/drm/omapdrm/omap_plane.c

390

if (!plane->rotation_property)

drivers/gpu/drm/omapdrm/omap_plane.c

391

drm_plane_create_rotation_property(plane,

drivers/gpu/drm/omapdrm/omap_plane.c

398

if (plane->rotation_property && obj != &plane->base)

drivers/gpu/drm/omapdrm/omap_plane.c

399

drm_object_attach_property(obj, plane->rotation_property,

drivers/gpu/drm/omapdrm/omap_plane.c

406

static void omap_plane_reset(struct drm_plane *plane)

drivers/gpu/drm/omapdrm/omap_plane.c

410

if (plane->state)

drivers/gpu/drm/omapdrm/omap_plane.c

411

drm_atomic_helper_plane_destroy_state(plane, plane->state);

drivers/gpu/drm/omapdrm/omap_plane.c

417

__drm_atomic_helper_plane_reset(plane, &omap_state->base);

drivers/gpu/drm/omapdrm/omap_plane.c

421

omap_plane_atomic_duplicate_state(struct drm_plane *plane)

drivers/gpu/drm/omapdrm/omap_plane.c

425

if (WARN_ON(!plane->state))

drivers/gpu/drm/omapdrm/omap_plane.c

428

current_state = to_omap_plane_state(plane->state);

drivers/gpu/drm/omapdrm/omap_plane.c

434

__drm_atomic_helper_plane_duplicate_state(plane, &state->base);

drivers/gpu/drm/omapdrm/omap_plane.c

46

static int omap_plane_prepare_fb(struct drm_plane *plane,

drivers/gpu/drm/omapdrm/omap_plane.c

461

static int omap_plane_atomic_set_property(struct drm_plane *plane,

drivers/gpu/drm/omapdrm/omap_plane.c

466

struct omap_drm_private *priv = plane->dev->dev_private;

drivers/gpu/drm/omapdrm/omap_plane.c

476

static int omap_plane_atomic_get_property(struct drm_plane *plane,

drivers/gpu/drm/omapdrm/omap_plane.c

481

struct omap_drm_private *priv = plane->dev->dev_private;

drivers/gpu/drm/omapdrm/omap_plane.c

503

static bool omap_plane_supports_yuv(struct drm_plane *plane)

drivers/gpu/drm/omapdrm/omap_plane.c

505

struct omap_drm_private *priv = plane->dev->dev_private;

drivers/gpu/drm/omapdrm/omap_plane.c

506

struct omap_plane *omap_plane = to_omap_plane(plane);

drivers/gpu/drm/omapdrm/omap_plane.c

52

drm_gem_plane_helper_prepare_fb(plane, new_state);

drivers/gpu/drm/omapdrm/omap_plane.c

526

struct drm_plane *plane;

drivers/gpu/drm/omapdrm/omap_plane.c

549

plane = &omap_plane->base;

drivers/gpu/drm/omapdrm/omap_plane.c

551

ret = drm_universal_plane_init(dev, plane, possible_crtcs,

drivers/gpu/drm/omapdrm/omap_plane.c

557

drm_plane_helper_add(plane, &omap_plane_helper_funcs);

drivers/gpu/drm/omapdrm/omap_plane.c

559

omap_plane_install_properties(plane, &plane->base);

drivers/gpu/drm/omapdrm/omap_plane.c

565

if (plane->type == DRM_PLANE_TYPE_PRIMARY)

drivers/gpu/drm/omapdrm/omap_plane.c

569

drm_plane_create_zpos_property(plane, zpos, 0, num_planes - 1);

drivers/gpu/drm/omapdrm/omap_plane.c

57

static void omap_plane_cleanup_fb(struct drm_plane *plane,

drivers/gpu/drm/omapdrm/omap_plane.c

570

drm_plane_create_alpha_property(plane);

drivers/gpu/drm/omapdrm/omap_plane.c

571

drm_plane_create_blend_mode_property(plane, BIT(DRM_MODE_BLEND_PREMULTI) |

drivers/gpu/drm/omapdrm/omap_plane.c

574

if (omap_plane_supports_yuv(plane))

drivers/gpu/drm/omapdrm/omap_plane.c

575

drm_plane_create_color_properties(plane,

drivers/gpu/drm/omapdrm/omap_plane.c

583

return plane;

drivers/gpu/drm/omapdrm/omap_plane.c

64

static void omap_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/omapdrm/omap_plane.c

67

struct omap_drm_private *priv = plane->dev->dev_private;

drivers/gpu/drm/omapdrm/omap_plane.c

69

plane);

drivers/gpu/drm/omapdrm/omap_plane.c

71

plane);

drivers/gpu/drm/omapdrm/omap_plane.c

91

DBG("[PLANE:%d:%s] no overlay attached", plane->base.id, plane->name);

drivers/gpu/drm/omapdrm/omap_plane.c

96

DBG("%s, crtc=%p fb=%p", plane->name, new_state->crtc,

drivers/gpu/drm/omapdrm/omap_plane.h

23

void omap_plane_install_properties(struct drm_plane *plane,

drivers/gpu/drm/pl111/pl111_display.c

125

struct drm_plane *plane = &pipe->plane;

drivers/gpu/drm/pl111/pl111_display.c

129

struct drm_framebuffer *fb = plane->state->fb;

drivers/gpu/drm/pl111/pl111_display.c

397

struct drm_plane *plane = &pipe->plane;

drivers/gpu/drm/pl111/pl111_display.c

398

struct drm_plane_state *pstate = plane->state;

drivers/gpu/drm/pl111/pl111_display.c

91

struct drm_framebuffer *old_fb = pipe->plane.state->fb;

drivers/gpu/drm/qxl/qxl_display.c

497

static int qxl_primary_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/qxl/qxl_display.c

501

plane);

drivers/gpu/drm/qxl/qxl_display.c

502

struct qxl_device *qdev = to_qxl(plane->dev);

drivers/gpu/drm/qxl/qxl_display.c

664

static void qxl_primary_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/qxl/qxl_display.c

668

plane);

drivers/gpu/drm/qxl/qxl_display.c

669

struct qxl_device *qdev = to_qxl(plane->dev);

drivers/gpu/drm/qxl/qxl_display.c

686

qxl_primary_apply_cursor(qdev, plane->state);

drivers/gpu/drm/qxl/qxl_display.c

697

static void qxl_primary_atomic_disable(struct drm_plane *plane,

drivers/gpu/drm/qxl/qxl_display.c

701

plane);

drivers/gpu/drm/qxl/qxl_display.c

702

struct qxl_device *qdev = to_qxl(plane->dev);

drivers/gpu/drm/qxl/qxl_display.c

714

static void qxl_cursor_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/qxl/qxl_display.c

718

plane);

drivers/gpu/drm/qxl/qxl_display.c

720

plane);

drivers/gpu/drm/qxl/qxl_display.c

721

struct qxl_device *qdev = to_qxl(plane->dev);

drivers/gpu/drm/qxl/qxl_display.c

731

static void qxl_cursor_atomic_disable(struct drm_plane *plane,

drivers/gpu/drm/qxl/qxl_display.c

735

plane);

drivers/gpu/drm/qxl/qxl_display.c

736

struct qxl_device *qdev = to_qxl(plane->dev);

drivers/gpu/drm/qxl/qxl_display.c

855

static int qxl_plane_prepare_fb(struct drm_plane *plane,

drivers/gpu/drm/qxl/qxl_display.c

858

struct qxl_device *qdev = to_qxl(plane->dev);

drivers/gpu/drm/qxl/qxl_display.c

869

if (plane->type == DRM_PLANE_TYPE_PRIMARY &&

drivers/gpu/drm/qxl/qxl_display.c

874

if (plane->type == DRM_PLANE_TYPE_CURSOR &&

drivers/gpu/drm/qxl/qxl_display.c

875

plane->state->fb != new_state->fb) {

drivers/gpu/drm/qxl/qxl_display.c

889

return drm_gem_plane_helper_prepare_fb(plane, new_state);

drivers/gpu/drm/qxl/qxl_display.c

892

static void qxl_plane_cleanup_fb(struct drm_plane *plane,

drivers/gpu/drm/qxl/qxl_display.c

910

if (old_state->fb != plane->state->fb && user_bo->shadow) {

drivers/gpu/drm/qxl/qxl_display.c

964

struct drm_plane *plane;

drivers/gpu/drm/qxl/qxl_display.c

984

plane = kzalloc(sizeof(*plane), GFP_KERNEL);

drivers/gpu/drm/qxl/qxl_display.c

985

if (!plane)

drivers/gpu/drm/qxl/qxl_display.c

988

err = drm_universal_plane_init(&qdev->ddev, plane, possible_crtcs,

drivers/gpu/drm/qxl/qxl_display.c

994

drm_plane_helper_add(plane, helper_funcs);

drivers/gpu/drm/qxl/qxl_display.c

996

return plane;

drivers/gpu/drm/qxl/qxl_display.c

999

kfree(plane);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

1067

if (index == rcrtc->vsp->planes[i].plane.base.id)

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

1291

primary = &rcrtc->vsp->planes[rcrtc->vsp_pipe].plane;

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

1293

primary = &rgrp->planes[swindex % 2].plane;

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

330

static unsigned int plane_zpos(struct rcar_du_plane *plane)

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

332

return plane->plane.state->normalized_zpos;

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

336

plane_format(struct rcar_du_plane *plane)

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

338

return to_rcar_plane_state(plane->plane.state)->format;

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

353

struct rcar_du_plane *plane = &rcrtc->group->planes[i];

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

356

if (plane->plane.state->crtc != &rcrtc->crtc ||

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

357

!plane->plane.state->visible)

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

362

if (plane_zpos(planes[j-1]) <= plane_zpos(plane))

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

367

planes[j] = plane;

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

368

prio += plane_format(plane)->planes * 4;

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

372

struct rcar_du_plane *plane = planes[i];

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

373

struct drm_plane_state *state = plane->plane.state;

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

380

if (plane_format(plane)->planes == 2) {

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

929

struct drm_plane *plane = &rcrtc->vsp->planes[i].plane;

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

932

sprintf(name, "plane%u", plane->base.id);

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

106

if (plane->group->index != 0)

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

112

fixed = plane->group->index == 0 ? 1 : 0;

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

147

struct rcar_du_plane *plane;

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

150

plane = to_rcar_plane(drm_plane);

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

155

plane->group->index, plane - plane->group->planes);

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

165

index = plane - plane->group->planes;

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

166

group_freed_planes[plane->group->index] |= 1 << index;

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

178

groups |= 1 << plane->group->index;

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

181

index = plane - plane->group->planes;

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

182

group_freed_planes[plane->group->index] |= 1 << index;

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

208

struct rcar_du_plane *plane = &group->planes[i];

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

212

s = drm_atomic_get_plane_state(state, &plane->plane);

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

227

__func__, plane->group->index,

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

228

plane - plane->group->planes);

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

237

__func__, plane->group->index,

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

238

plane - plane->group->planes,

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

256

struct rcar_du_plane *plane;

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

261

plane = to_rcar_plane(drm_plane);

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

266

plane->group->index, plane - plane->group->planes);

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

283

? plane->group->dptsr_planes

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

284

: ~plane->group->dptsr_planes;

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

285

free = group_free_planes[plane->group->index];

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

287

idx = rcar_du_plane_hwalloc(plane, new_plane_state,

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

290

idx = rcar_du_plane_hwalloc(plane, new_plane_state,

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

303

group_free_planes[plane->group->index] &=

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

307

__func__, plane->group->index,

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

308

group_free_planes[plane->group->index]);

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

592

int __rcar_du_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

596

struct drm_device *dev = plane->dev;

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

637

static int rcar_du_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

641

plane);

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

644

return __rcar_du_plane_atomic_check(plane, new_plane_state,

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

648

static void rcar_du_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

651

struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state, plane);

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

652

struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

653

struct rcar_du_plane *rplane = to_rcar_plane(plane);

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

690

rcar_du_plane_atomic_duplicate_state(struct drm_plane *plane)

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

695

if (WARN_ON(!plane->state))

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

698

state = to_rcar_plane_state(plane->state);

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

703

__drm_atomic_helper_plane_duplicate_state(plane, &copy->state);

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

708

static void rcar_du_plane_atomic_destroy_state(struct drm_plane *plane,

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

715

static void rcar_du_plane_reset(struct drm_plane *plane)

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

719

if (plane->state) {

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

720

rcar_du_plane_atomic_destroy_state(plane, plane->state);

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

721

plane->state = NULL;

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

728

__drm_atomic_helper_plane_reset(plane, &state->state);

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

735

static int rcar_du_plane_atomic_set_property(struct drm_plane *plane,

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

741

struct rcar_du_device *rcdu = to_rcar_plane(plane)->group->dev;

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

751

static int rcar_du_plane_atomic_get_property(struct drm_plane *plane,

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

757

struct rcar_du_device *rcdu = to_rcar_plane(plane)->group->dev;

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

810

struct rcar_du_plane *plane = &rgrp->planes[i];

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

812

plane->group = rgrp;

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

814

ret = drm_universal_plane_init(&rcdu->ddev, &plane->plane,

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

822

drm_plane_helper_add(&plane->plane,

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

825

drm_plane_helper_add(&plane->plane,

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

828

drm_plane_create_alpha_property(&plane->plane);

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

831

drm_plane_create_zpos_immutable_property(&plane->plane,

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

834

drm_object_attach_property(&plane->plane.base,

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

837

drm_plane_create_zpos_property(&plane->plane, 1, 1, 7);

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

96

static int rcar_du_plane_hwalloc(struct rcar_du_plane *plane,

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.h

34

struct drm_plane plane;

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.h

38

static inline struct rcar_du_plane *to_rcar_plane(struct drm_plane *plane)

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.h

40

return container_of(plane, struct rcar_du_plane, plane);

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.h

69

int __rcar_du_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.h

78

static inline void rcar_du_plane_setup(struct rcar_du_plane *plane)

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.h

81

to_rcar_plane_state(plane->plane.state);

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.h

83

return __rcar_du_plane_setup(plane->group, state);

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

220

static void rcar_du_vsp_plane_setup(struct rcar_du_vsp_plane *plane)

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

223

to_rcar_vsp_plane_state(plane->plane.state);

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

225

struct drm_framebuffer *fb = plane->plane.state->fb;

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

255

vsp1_du_atomic_update(plane->vsp->vsp, crtc->vsp_pipe,

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

256

plane->index, &cfg);

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

321

static int rcar_du_vsp_plane_prepare_fb(struct drm_plane *plane,

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

325

struct rcar_du_vsp *vsp = to_rcar_vsp_plane(plane)->vsp;

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

339

return drm_gem_plane_helper_prepare_fb(plane, state);

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

355

static void rcar_du_vsp_plane_cleanup_fb(struct drm_plane *plane,

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

359

struct rcar_du_vsp *vsp = to_rcar_vsp_plane(plane)->vsp;

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

367

static int rcar_du_vsp_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

371

plane);

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

374

return __rcar_du_plane_atomic_check(plane, new_plane_state,

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

378

static void rcar_du_vsp_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

381

struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state, plane);

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

382

struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

383

struct rcar_du_vsp_plane *rplane = to_rcar_vsp_plane(plane);

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

401

rcar_du_vsp_plane_atomic_duplicate_state(struct drm_plane *plane)

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

405

if (WARN_ON(!plane->state))

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

412

__drm_atomic_helper_plane_duplicate_state(plane, &copy->state);

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

417

static void rcar_du_vsp_plane_atomic_destroy_state(struct drm_plane *plane,

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

424

static void rcar_du_vsp_plane_reset(struct drm_plane *plane)

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

428

if (plane->state) {

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

429

rcar_du_vsp_plane_atomic_destroy_state(plane, plane->state);

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

430

plane->state = NULL;

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

437

__drm_atomic_helper_plane_reset(plane, &state->state);

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

455

struct rcar_du_vsp_plane *plane = &vsp->planes[i];

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

457

drm_plane_cleanup(&plane->plane);

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

515

struct rcar_du_vsp_plane *plane = &vsp->planes[i];

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

527

plane->vsp = vsp;

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

528

plane->index = i;

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

530

ret = drm_universal_plane_init(&rcdu->ddev, &plane->plane,

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

537

drm_plane_helper_add(&plane->plane,

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

540

drm_plane_create_alpha_property(&plane->plane);

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

541

drm_plane_create_zpos_property(&plane->plane, i, 0,

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

544

drm_plane_create_blend_mode_property(&plane->plane,

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.h

22

struct drm_plane plane;

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.h

38

return container_of(p, struct rcar_du_vsp_plane, plane);

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

118

static void rzg2l_du_vsp_plane_setup(struct rzg2l_du_vsp_plane *plane)

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

121

to_rzg2l_vsp_plane_state(plane->plane.state);

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

123

struct drm_framebuffer *fb = plane->plane.state->fb;

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

172

vsp1_du_atomic_update(plane->vsp->vsp, crtc->vsp_pipe,

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

173

plane->index, &cfg);

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

176

static int __rzg2l_du_vsp_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

215

static int rzg2l_du_vsp_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

219

plane);

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

222

return __rzg2l_du_vsp_plane_atomic_check(plane, new_plane_state, &rstate->format);

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

225

static void rzg2l_du_vsp_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

228

struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state, plane);

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

229

struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

230

struct rzg2l_du_vsp_plane *rplane = to_rzg2l_vsp_plane(plane);

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

246

rzg2l_du_vsp_plane_atomic_duplicate_state(struct drm_plane *plane)

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

250

if (WARN_ON(!plane->state))

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

257

__drm_atomic_helper_plane_duplicate_state(plane, &copy->state);

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

262

static void rzg2l_du_vsp_plane_atomic_destroy_state(struct drm_plane *plane,

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

269

static void rzg2l_du_vsp_plane_reset(struct drm_plane *plane)

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

273

if (plane->state) {

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

274

rzg2l_du_vsp_plane_atomic_destroy_state(plane, plane->state);

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

275

plane->state = NULL;

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

282

__drm_atomic_helper_plane_reset(plane, &state->state);

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

344

struct rzg2l_du_vsp_plane *plane;

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

346

plane = drmm_universal_plane_alloc(&rcdu->ddev, struct rzg2l_du_vsp_plane,

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

347

plane, crtcs, &rzg2l_du_vsp_plane_funcs,

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

351

if (IS_ERR(plane))

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

352

return PTR_ERR(plane);

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

354

plane->vsp = vsp;

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

355

plane->index = i;

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

357

drm_plane_helper_add(&plane->plane,

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

360

drm_plane_create_alpha_property(&plane->plane);

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

361

drm_plane_create_zpos_property(&plane->plane, i, 0,

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

364

drm_plane_create_blend_mode_property(&plane->plane,

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

78

struct drm_plane *plane = NULL;

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

80

drm_for_each_plane(plane, &rcdu->ddev) {

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

81

struct rzg2l_du_vsp_plane *vsp_plane = to_rzg2l_vsp_plane(plane);

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

87

return plane ? plane : ERR_PTR(-EINVAL);

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.h

25

struct drm_plane plane;

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.h

39

return container_of(p, struct rzg2l_du_vsp_plane, plane);

drivers/gpu/drm/renesas/shmobile/shmob_drm_crtc.c

380

struct drm_plane *primary, *plane;

drivers/gpu/drm/renesas/shmobile/shmob_drm_crtc.c

391

plane = shmob_drm_plane_create(sdev, DRM_PLANE_TYPE_OVERLAY, i);

drivers/gpu/drm/renesas/shmobile/shmob_drm_crtc.c

392

if (IS_ERR(plane))

drivers/gpu/drm/renesas/shmobile/shmob_drm_crtc.c

393

return PTR_ERR(plane);

drivers/gpu/drm/renesas/shmobile/shmob_drm_plane.c

145

static int shmob_drm_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/renesas/shmobile/shmob_drm_plane.c

148

struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/renesas/shmobile/shmob_drm_plane.c

151

bool is_primary = plane->type == DRM_PLANE_TYPE_PRIMARY;

drivers/gpu/drm/renesas/shmobile/shmob_drm_plane.c

183

dev_dbg(plane->dev->dev,

drivers/gpu/drm/renesas/shmobile/shmob_drm_plane.c

194

static void shmob_drm_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/renesas/shmobile/shmob_drm_plane.c

197

struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/renesas/shmobile/shmob_drm_plane.c

198

struct shmob_drm_plane *splane = to_shmob_plane(plane);

drivers/gpu/drm/renesas/shmobile/shmob_drm_plane.c

203

if (plane->type == DRM_PLANE_TYPE_PRIMARY)

drivers/gpu/drm/renesas/shmobile/shmob_drm_plane.c

209

static void shmob_drm_plane_atomic_disable(struct drm_plane *plane,

drivers/gpu/drm/renesas/shmobile/shmob_drm_plane.c

212

struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state, plane);

drivers/gpu/drm/renesas/shmobile/shmob_drm_plane.c

213

struct shmob_drm_device *sdev = to_shmob_device(plane->dev);

drivers/gpu/drm/renesas/shmobile/shmob_drm_plane.c

214

struct shmob_drm_plane *splane = to_shmob_plane(plane);

drivers/gpu/drm/renesas/shmobile/shmob_drm_plane.c

219

if (plane->type != DRM_PLANE_TYPE_OVERLAY)

drivers/gpu/drm/renesas/shmobile/shmob_drm_plane.c

229

shmob_drm_plane_atomic_duplicate_state(struct drm_plane *plane)

drivers/gpu/drm/renesas/shmobile/shmob_drm_plane.c

234

if (WARN_ON(!plane->state))

drivers/gpu/drm/renesas/shmobile/shmob_drm_plane.c

237

state = to_shmob_plane_state(plane->state);

drivers/gpu/drm/renesas/shmobile/shmob_drm_plane.c

242

__drm_atomic_helper_plane_duplicate_state(plane, &copy->base);

drivers/gpu/drm/renesas/shmobile/shmob_drm_plane.c

247

static void shmob_drm_plane_atomic_destroy_state(struct drm_plane *plane,

drivers/gpu/drm/renesas/shmobile/shmob_drm_plane.c

254

static void shmob_drm_plane_reset(struct drm_plane *plane)

drivers/gpu/drm/renesas/shmobile/shmob_drm_plane.c

258

if (plane->state) {

drivers/gpu/drm/renesas/shmobile/shmob_drm_plane.c

259

shmob_drm_plane_atomic_destroy_state(plane, plane->state);

drivers/gpu/drm/renesas/shmobile/shmob_drm_plane.c

260

plane->state = NULL;

drivers/gpu/drm/renesas/shmobile/shmob_drm_plane.c

267

__drm_atomic_helper_plane_reset(plane, &state->base);

drivers/gpu/drm/renesas/shmobile/shmob_drm_plane.c

35

static inline struct shmob_drm_plane *to_shmob_plane(struct drm_plane *plane)

drivers/gpu/drm/renesas/shmobile/shmob_drm_plane.c

37

return container_of(plane, struct shmob_drm_plane, base);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1073

static int vop_plane_atomic_async_check(struct drm_plane *plane,

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1077

plane);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1078

struct vop_win *vop_win = to_vop_win(plane);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1086

if (plane != new_plane_state->crtc->cursor)

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1089

if (!plane->state)

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1092

if (!plane->state->fb)

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1100

crtc_state = plane->crtc->state;

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1102

return drm_atomic_helper_check_plane_state(plane->state, crtc_state,

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1107

static void vop_plane_atomic_async_update(struct drm_plane *plane,

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1111

plane);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1112

struct vop *vop = to_vop(plane->state->crtc);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1113

struct drm_framebuffer *old_fb = plane->state->fb;

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1115

plane->state->crtc_x = new_state->crtc_x;

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1116

plane->state->crtc_y = new_state->crtc_y;

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1117

plane->state->crtc_h = new_state->crtc_h;

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1118

plane->state->crtc_w = new_state->crtc_w;

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1119

plane->state->src_x = new_state->src_x;

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1120

plane->state->src_y = new_state->src_y;

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1121

plane->state->src_h = new_state->src_h;

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1122

plane->state->src_w = new_state->src_w;

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1123

swap(plane->state->fb, new_state->fb);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1126

vop_plane_atomic_update(plane, state);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1139

if (old_fb && plane->state->fb != old_fb) {

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1141

WARN_ON(drm_crtc_vblank_get(plane->state->crtc) != 0);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1523

struct drm_plane *plane;

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1540

drm_atomic_crtc_state_for_each_plane(plane, crtc_state) {

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1542

drm_atomic_get_plane_state(crtc_state->state, plane);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1545

plane->name);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1572

struct drm_plane *plane;

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1609

for_each_oldnew_plane_in_state(old_state, plane, old_plane_state,

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1843

static void vop_plane_add_properties(struct drm_plane *plane,

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1851

drm_plane_create_rotation_property(plane, DRM_MODE_ROTATE_0,

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1860

struct drm_plane *primary = NULL, *cursor = NULL, *plane, *tmp;

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1891

plane = &vop_win->base;

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1892

drm_plane_helper_add(plane, &plane_helper_funcs);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1893

vop_plane_add_properties(plane, win_data);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1894

if (plane->type == DRM_PLANE_TYPE_PRIMARY)

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1895

primary = plane;

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1896

else if (plane->type == DRM_PLANE_TYPE_CURSOR)

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1897

cursor = plane;

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1965

list_for_each_entry_safe(plane, tmp, &drm_dev->mode_config.plane_list,

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1967

drm_plane_cleanup(plane);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1975

struct drm_plane *plane, *tmp;

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1989

list_for_each_entry_safe(plane, tmp, &drm_dev->mode_config.plane_list,

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1991

drm_plane_cleanup(plane);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

796

static bool rockchip_mod_supported(struct drm_plane *plane,

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

811

static int vop_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

815

plane);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

819

struct vop_win *vop_win = to_vop_win(plane);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

891

static void vop_plane_atomic_disable(struct drm_plane *plane,

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

895

plane);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

896

struct vop_win *vop_win = to_vop_win(plane);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

909

static void vop_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

913

plane);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

915

struct vop_win *vop_win = to_vop_win(plane);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

946

vop_plane_atomic_disable(plane, state);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1093

static void vop2_plane_atomic_disable(struct drm_plane *plane,

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1097

struct vop2_win *win = to_vop2_win(plane);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1103

old_pstate = drm_atomic_get_old_plane_state(state, plane);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1115

static void vop2_plane_setup_color_key(struct drm_plane *plane, u32 color_key)

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1117

struct drm_plane_state *pstate = plane->state;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1119

struct vop2_win *win = to_vop2_win(plane);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1161

static void vop2_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1164

struct drm_plane_state *pstate = plane->state;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1166

struct vop2_win *win = to_vop2_win(plane);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1201

vop2_plane_atomic_disable(plane, state);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1384

vop2_plane_setup_color_key(plane, 0);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1846

struct drm_plane *plane;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1855

drm_atomic_crtc_state_for_each_plane(plane, crtc_state)

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1922

static int vop2_plane_state_dump(struct seq_file *s, struct drm_plane *plane)

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1924

struct vop2_win *win = to_vop2_win(plane);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1925

struct drm_plane_state *pstate = plane->state;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1984

struct drm_plane *plane;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2016

drm_atomic_crtc_for_each_plane(plane, crtc) {

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2017

vop2_plane_state_dump(s, plane);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2367

struct drm_plane *plane;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2485

plane = &vp->primary_plane->base;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2487

ret = drm_crtc_init_with_planes(drm, &vp->crtc, plane, NULL,

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2527

struct drm_plane *plane, *tmpp;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2529

list_for_each_entry_safe(plane, tmpp, plane_list, head)

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2530

drm_plane_cleanup(plane);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

370

static bool rockchip_vop2_mod_supported(struct drm_plane *plane, u32 format,

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

373

struct vop2_win *win = to_vop2_win(plane);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

405

for (i = 0; i < plane->modifier_count; i++) {

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

406

if (plane->modifiers[i] == modifier)

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

981

static int vop2_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

984

struct drm_plane_state *pstate = drm_atomic_get_new_plane_state(astate, plane);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

989

struct vop2_win *win = to_vop2_win(plane);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1962

struct drm_plane *plane;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1978

drm_atomic_crtc_for_each_plane(plane, &vp->crtc) {

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1979

struct vop2_win *win = to_vop2_win(plane);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1981

if (plane->state->normalized_zpos == 0 &&

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1982

!is_opaque(plane->state->alpha) &&

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1990

dst_global_alpha = plane->state->alpha;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2006

drm_atomic_crtc_for_each_plane(plane, &vp->crtc) {

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2007

struct vop2_win *win = to_vop2_win(plane);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2008

int zpos = plane->state->normalized_zpos;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2016

if (plane->state->pixel_blend_mode == DRM_MODE_BLEND_PREMULTI)

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2021

plane = &win->base;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2022

fb = plane->state->fb;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2033

alpha_config.src_glb_alpha_value = plane->state->alpha;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2045

alpha_config.src_glb_alpha_value = plane->state->alpha;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2135

struct drm_plane *plane;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2197

drm_atomic_crtc_for_each_plane(plane, &vp->crtc) {

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2198

struct vop2_win *win = to_vop2_win(plane);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2201

layer_id = (u8)(plane->state->normalized_zpos + ofs);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2363

struct drm_plane *plane;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2367

drm_atomic_crtc_for_each_plane(plane, crtc) {

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2368

struct vop2_win *win = to_vop2_win(plane);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2390

struct drm_plane *plane;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2402

drm_atomic_crtc_for_each_plane(plane, &vp->crtc) {

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2403

struct vop2_win *win = to_vop2_win(plane);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2405

layer_sel &= ~RK3568_OVL_LAYER_SEL__LAYER(plane->state->normalized_zpos,

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2407

layer_sel |= RK3568_OVL_LAYER_SEL__LAYER(plane->state->normalized_zpos,

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2416

struct drm_plane *plane;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2419

drm_atomic_crtc_for_each_plane(plane, &vp->crtc) {

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2420

win = to_vop2_win(plane);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2429

struct drm_plane *plane;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2433

drm_atomic_crtc_for_each_plane(plane, crtc) {

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2434

struct vop2_win *win = to_vop2_win(plane);

drivers/gpu/drm/sitronix/st7571.c

326

static int st7571_primary_plane_helper_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/sitronix/st7571.c

329

struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/sitronix/st7571.c

342

static void st7571_primary_plane_helper_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/sitronix/st7571.c

345

struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane);

drivers/gpu/drm/sitronix/st7571.c

346

struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/sitronix/st7571.c

350

struct drm_device *drm = plane->dev;

drivers/gpu/drm/sitronix/st7571.c

352

struct st7571_device *st7571 = drm_to_st7571(plane->dev);

drivers/gpu/drm/sitronix/st7571.c

381

static void st7571_primary_plane_helper_atomic_disable(struct drm_plane *plane,

drivers/gpu/drm/sitronix/st7571.c

384

struct drm_device *drm = plane->dev;

drivers/gpu/drm/sitronix/st7571.c

385

struct st7571_device *st7571 = drm_to_st7571(plane->dev);

drivers/gpu/drm/sitronix/st7586.c

173

static void st7586_plane_helper_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/sitronix/st7586.c

176

struct drm_plane_state *plane_state = plane->state;

drivers/gpu/drm/sitronix/st7586.c

179

struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane);

drivers/gpu/drm/sitronix/st7586.c

186

if (!drm_dev_enter(plane->dev, &idx))

drivers/gpu/drm/sitronix/st7586.c

368

struct drm_plane *plane;

drivers/gpu/drm/sitronix/st7586.c

425

plane = &st7586->plane;

drivers/gpu/drm/sitronix/st7586.c

426

ret = drm_universal_plane_init(drm, plane, 0, &st7586_plane_funcs,

drivers/gpu/drm/sitronix/st7586.c

432

drm_plane_helper_add(plane, &st7586_plane_helper_funcs);

drivers/gpu/drm/sitronix/st7586.c

433

drm_plane_enable_fb_damage_clips(plane);

drivers/gpu/drm/sitronix/st7586.c

436

ret = drm_crtc_init_with_planes(drm, crtc, plane, NULL, &st7586_crtc_funcs, NULL);

drivers/gpu/drm/sitronix/st7586.c

55

struct drm_plane plane;

drivers/gpu/drm/sitronix/st7735r.c

244

struct drm_plane *plane;

drivers/gpu/drm/sitronix/st7735r.c

305

plane = &st7735r->plane;

drivers/gpu/drm/sitronix/st7735r.c

306

ret = drm_universal_plane_init(drm, plane, 0, &st7735r_plane_funcs,

drivers/gpu/drm/sitronix/st7735r.c

312

drm_plane_helper_add(plane, &st7735r_plane_helper_funcs);

drivers/gpu/drm/sitronix/st7735r.c

313

drm_plane_enable_fb_damage_clips(plane);

drivers/gpu/drm/sitronix/st7735r.c

316

ret = drm_crtc_init_with_planes(drm, crtc, plane, NULL, &st7735r_crtc_funcs, NULL);

drivers/gpu/drm/sitronix/st7735r.c

59

struct drm_plane plane;

drivers/gpu/drm/sitronix/st7920.c

340

static int st7920_primary_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/sitronix/st7920.c

343

struct drm_device *drm = plane->dev;

drivers/gpu/drm/sitronix/st7920.c

345

struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/sitronix/st7920.c

389

static void st7920_primary_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/sitronix/st7920.c

392

struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/sitronix/st7920.c

393

struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane);

drivers/gpu/drm/sitronix/st7920.c

400

struct drm_device *drm = plane->dev;

drivers/gpu/drm/sitronix/st7920.c

422

drm_err_once(plane->dev, "Failed to write to device: %d.\n", ret);

drivers/gpu/drm/sitronix/st7920.c

431

static void st7920_primary_plane_atomic_disable(struct drm_plane *plane,

drivers/gpu/drm/sitronix/st7920.c

434

struct drm_device *drm = plane->dev;

drivers/gpu/drm/sitronix/st7920.c

436

struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/sitronix/st7920.c

456

static void st7920_primary_plane_reset(struct drm_plane *plane)

drivers/gpu/drm/sitronix/st7920.c

460

drm_WARN_ON_ONCE(plane->dev, plane->state);

drivers/gpu/drm/sitronix/st7920.c

466

__drm_gem_reset_shadow_plane(plane, &st7920_state->base);

drivers/gpu/drm/sitronix/st7920.c

469

static struct drm_plane_state *st7920_primary_plane_duplicate_state(struct drm_plane *plane)

drivers/gpu/drm/sitronix/st7920.c

474

if (drm_WARN_ON_ONCE(plane->dev, !plane->state))

drivers/gpu/drm/sitronix/st7920.c

483

__drm_gem_duplicate_shadow_plane_state(plane, new_shadow_plane_state);

drivers/gpu/drm/sitronix/st7920.c

488

static void st7920_primary_plane_destroy_state(struct drm_plane *plane,

drivers/gpu/drm/solomon/ssd130x.c

1076

static int ssd130x_primary_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/solomon/ssd130x.c

1079

struct drm_device *drm = plane->dev;

drivers/gpu/drm/solomon/ssd130x.c

1081

struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/solomon/ssd130x.c

1125

static int ssd132x_primary_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/solomon/ssd130x.c

1128

struct drm_device *drm = plane->dev;

drivers/gpu/drm/solomon/ssd130x.c

1130

struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/solomon/ssd130x.c

1174

static int ssd133x_primary_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/solomon/ssd130x.c

1177

struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/solomon/ssd130x.c

1197

static void ssd130x_primary_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/solomon/ssd130x.c

1200

struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/solomon/ssd130x.c

1201

struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane);

drivers/gpu/drm/solomon/ssd130x.c

1208

struct drm_device *drm = plane->dev;

drivers/gpu/drm/solomon/ssd130x.c

1238

static void ssd132x_primary_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/solomon/ssd130x.c

1241

struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/solomon/ssd130x.c

1242

struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane);

drivers/gpu/drm/solomon/ssd130x.c

1249

struct drm_device *drm = plane->dev;

drivers/gpu/drm/solomon/ssd130x.c

1279

static void ssd133x_primary_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/solomon/ssd130x.c

1282

struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/solomon/ssd130x.c

1283

struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane);

drivers/gpu/drm/solomon/ssd130x.c

1289

struct drm_device *drm = plane->dev;

drivers/gpu/drm/solomon/ssd130x.c

1318

static void ssd130x_primary_plane_atomic_disable(struct drm_plane *plane,

drivers/gpu/drm/solomon/ssd130x.c

1321

struct drm_device *drm = plane->dev;

drivers/gpu/drm/solomon/ssd130x.c

1323

struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/solomon/ssd130x.c

1342

static void ssd132x_primary_plane_atomic_disable(struct drm_plane *plane,

drivers/gpu/drm/solomon/ssd130x.c

1345

struct drm_device *drm = plane->dev;

drivers/gpu/drm/solomon/ssd130x.c

1347

struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/solomon/ssd130x.c

1366

static void ssd133x_primary_plane_atomic_disable(struct drm_plane *plane,

drivers/gpu/drm/solomon/ssd130x.c

1369

struct drm_device *drm = plane->dev;

drivers/gpu/drm/solomon/ssd130x.c

1371

struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/solomon/ssd130x.c

1391

static void ssd130x_primary_plane_reset(struct drm_plane *plane)

drivers/gpu/drm/solomon/ssd130x.c

1395

drm_WARN_ON_ONCE(plane->dev, plane->state);

drivers/gpu/drm/solomon/ssd130x.c

1401

__drm_gem_reset_shadow_plane(plane, &ssd130x_state->base);

drivers/gpu/drm/solomon/ssd130x.c

1404

static struct drm_plane_state *ssd130x_primary_plane_duplicate_state(struct drm_plane *plane)

drivers/gpu/drm/solomon/ssd130x.c

1410

if (drm_WARN_ON_ONCE(plane->dev, !plane->state))

drivers/gpu/drm/solomon/ssd130x.c

1413

old_ssd130x_state = to_ssd130x_plane_state(plane->state);

drivers/gpu/drm/solomon/ssd130x.c

1423

__drm_gem_duplicate_shadow_plane_state(plane, new_shadow_plane_state);

drivers/gpu/drm/solomon/ssd130x.c

1428

static void ssd130x_primary_plane_destroy_state(struct drm_plane *plane,

drivers/gpu/drm/sprd/sprd_dpu.c

503

static int sprd_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/sprd/sprd_dpu.c

507

plane);

drivers/gpu/drm/sprd/sprd_dpu.c

549

static void sprd_plane_create_properties(struct sprd_plane *plane, int index)

drivers/gpu/drm/sprd/sprd_dpu.c

556

drm_plane_create_rotation_property(&plane->base,

drivers/gpu/drm/sprd/sprd_dpu.c

562

drm_plane_create_alpha_property(&plane->base);

drivers/gpu/drm/sprd/sprd_dpu.c

565

drm_plane_create_blend_mode_property(&plane->base, supported_modes);

drivers/gpu/drm/sprd/sprd_dpu.c

568

drm_plane_create_zpos_immutable_property(&plane->base, index);

drivers/gpu/drm/sprd/sprd_dpu.c

588

struct sprd_plane *plane, *primary;

drivers/gpu/drm/sprd/sprd_dpu.c

596

plane = drmm_universal_plane_alloc(drm, struct sprd_plane, base,

drivers/gpu/drm/sprd/sprd_dpu.c

600

if (IS_ERR(plane)) {

drivers/gpu/drm/sprd/sprd_dpu.c

602

return plane;

drivers/gpu/drm/sprd/sprd_dpu.c

605

drm_plane_helper_add(&plane->base, &sprd_plane_helper_funcs);

drivers/gpu/drm/sprd/sprd_dpu.c

607

sprd_plane_create_properties(plane, i);

drivers/gpu/drm/sprd/sprd_dpu.c

610

primary = plane;

drivers/gpu/drm/sprd/sprd_dpu.c

819

struct sprd_plane *plane;

drivers/gpu/drm/sprd/sprd_dpu.c

822

plane = sprd_planes_init(drm);

drivers/gpu/drm/sprd/sprd_dpu.c

823

if (IS_ERR(plane))

drivers/gpu/drm/sprd/sprd_dpu.c

824

return PTR_ERR(plane);

drivers/gpu/drm/sprd/sprd_dpu.c

826

dpu = sprd_crtc_init(drm, &plane->base, dev);

drivers/gpu/drm/sti/sti_crtc.c

148

struct sti_plane *plane = to_sti_plane(p);

drivers/gpu/drm/sti/sti_crtc.c

150

switch (plane->status) {

drivers/gpu/drm/sti/sti_crtc.c

158

sti_plane_to_str(plane));

drivers/gpu/drm/sti/sti_crtc.c

160

if (sti_mixer_set_plane_depth(mixer, plane)) {

drivers/gpu/drm/sti/sti_crtc.c

162

sti_plane_to_str(plane));

drivers/gpu/drm/sti/sti_crtc.c

166

if (sti_mixer_set_plane_status(mixer, plane, true)) {

drivers/gpu/drm/sti/sti_crtc.c

168

sti_plane_to_str(plane));

drivers/gpu/drm/sti/sti_crtc.c

173

if (plane->desc == STI_HQVDP_0)

drivers/gpu/drm/sti/sti_crtc.c

176

plane->status = STI_PLANE_READY;

drivers/gpu/drm/sti/sti_crtc.c

182

sti_plane_to_str(plane));

drivers/gpu/drm/sti/sti_crtc.c

184

if (sti_mixer_set_plane_status(mixer, plane, false)) {

drivers/gpu/drm/sti/sti_crtc.c

186

sti_plane_to_str(plane));

drivers/gpu/drm/sti/sti_crtc.c

190

if (plane->desc == STI_CURSOR)

drivers/gpu/drm/sti/sti_crtc.c

192

plane->status = STI_PLANE_DISABLED;

drivers/gpu/drm/sti/sti_crtc.c

195

plane->status = STI_PLANE_FLUSHING;

drivers/gpu/drm/sti/sti_crtc.c

198

if (plane->desc == STI_HQVDP_0)

drivers/gpu/drm/sti/sti_crtc.c

269

struct sti_plane *plane = to_sti_plane(p);

drivers/gpu/drm/sti/sti_crtc.c

271

if ((plane->desc & STI_PLANE_TYPE_MASK) <= STI_VDP)

drivers/gpu/drm/sti/sti_crtc.c

272

if (plane->status != STI_PLANE_DISABLED)

drivers/gpu/drm/sti/sti_cursor.c

114

sti_plane_to_str(&cursor->plane), cursor->regs);

drivers/gpu/drm/sti/sti_cursor.c

190

struct sti_plane *plane = to_sti_plane(drm_plane);

drivers/gpu/drm/sti/sti_cursor.c

191

struct sti_cursor *cursor = to_sti_cursor(plane);

drivers/gpu/drm/sti/sti_cursor.c

257

drm_plane->base.id, sti_plane_to_str(plane));

drivers/gpu/drm/sti/sti_cursor.c

268

struct sti_plane *plane = to_sti_plane(drm_plane);

drivers/gpu/drm/sti/sti_cursor.c

269

struct sti_cursor *cursor = to_sti_cursor(plane);

drivers/gpu/drm/sti/sti_cursor.c

313

sti_plane_update_fps(plane, true, false);

drivers/gpu/drm/sti/sti_cursor.c

315

plane->status = STI_PLANE_UPDATED;

drivers/gpu/drm/sti/sti_cursor.c

323

struct sti_plane *plane = to_sti_plane(drm_plane);

drivers/gpu/drm/sti/sti_cursor.c

334

drm_plane->base.id, sti_plane_to_str(plane));

drivers/gpu/drm/sti/sti_cursor.c

336

plane->status = STI_PLANE_DISABLING;

drivers/gpu/drm/sti/sti_cursor.c

347

struct sti_plane *plane = to_sti_plane(drm_plane);

drivers/gpu/drm/sti/sti_cursor.c

348

struct sti_cursor *cursor = to_sti_cursor(plane);

drivers/gpu/drm/sti/sti_cursor.c

392

cursor->plane.desc = desc;

drivers/gpu/drm/sti/sti_cursor.c

393

cursor->plane.status = STI_PLANE_DISABLED;

drivers/gpu/drm/sti/sti_cursor.c

397

res = drm_universal_plane_init(drm_dev, &cursor->plane.drm_plane,

drivers/gpu/drm/sti/sti_cursor.c

408

drm_plane_helper_add(&cursor->plane.drm_plane,

drivers/gpu/drm/sti/sti_cursor.c

411

sti_plane_init_property(&cursor->plane, DRM_PLANE_TYPE_CURSOR);

drivers/gpu/drm/sti/sti_cursor.c

413

return &cursor->plane.drm_plane;

drivers/gpu/drm/sti/sti_cursor.c

65

struct sti_plane plane;

drivers/gpu/drm/sti/sti_cursor.c

79

#define to_sti_cursor(x) container_of(x, struct sti_cursor, plane)

drivers/gpu/drm/sti/sti_drv.c

47

struct sti_plane *plane = to_sti_plane(p);

drivers/gpu/drm/sti/sti_drv.c

49

*val |= plane->fps_info.output << i;

drivers/gpu/drm/sti/sti_drv.c

63

struct sti_plane *plane = to_sti_plane(p);

drivers/gpu/drm/sti/sti_drv.c

65

memset(&plane->fps_info, 0, sizeof(plane->fps_info));

drivers/gpu/drm/sti/sti_drv.c

66

plane->fps_info.output = (val >> i) & 1;

drivers/gpu/drm/sti/sti_drv.c

84

struct sti_plane *plane = to_sti_plane(p);

drivers/gpu/drm/sti/sti_drv.c

87

plane->fps_info.fps_str,

drivers/gpu/drm/sti/sti_drv.c

88

plane->fps_info.fips_str);

drivers/gpu/drm/sti/sti_gdp.c

124

struct sti_plane plane;

drivers/gpu/drm/sti/sti_gdp.c

136

#define to_sti_gdp(x) container_of(x, struct sti_gdp, plane)

drivers/gpu/drm/sti/sti_gdp.c

220

struct drm_plane *drm_plane = &gdp->plane.drm_plane;

drivers/gpu/drm/sti/sti_gdp.c

228

sti_plane_to_str(&gdp->plane), gdp->regs);

drivers/gpu/drm/sti/sti_gdp.c

290

seq_printf(s, "\n%s[%d].top", sti_plane_to_str(&gdp->plane), b);

drivers/gpu/drm/sti/sti_gdp.c

292

seq_printf(s, "\n%s[%d].btm", sti_plane_to_str(&gdp->plane), b);

drivers/gpu/drm/sti/sti_gdp.c

325

switch (gdp->plane.desc) {

drivers/gpu/drm/sti/sti_gdp.c

414

sti_plane_to_str(&gdp->plane), hw_nvn);

drivers/gpu/drm/sti/sti_gdp.c

446

hw_nvn, sti_plane_to_str(&gdp->plane));

drivers/gpu/drm/sti/sti_gdp.c

461

DRM_DEBUG_DRIVER("%s\n", sti_plane_to_str(&gdp->plane));

drivers/gpu/drm/sti/sti_gdp.c

475

gdp->plane.status = STI_PLANE_DISABLED;

drivers/gpu/drm/sti/sti_gdp.c

495

if (gdp->plane.status == STI_PLANE_FLUSHING) {

drivers/gpu/drm/sti/sti_gdp.c

498

sti_plane_to_str(&gdp->plane));

drivers/gpu/drm/sti/sti_gdp.c

563

switch (gdp->plane.desc) {

drivers/gpu/drm/sti/sti_gdp.c

625

struct sti_plane *plane = to_sti_plane(drm_plane);

drivers/gpu/drm/sti/sti_gdp.c

626

struct sti_gdp *gdp = to_sti_gdp(plane);

drivers/gpu/drm/sti/sti_gdp.c

698

drm_plane->base.id, sti_plane_to_str(plane));

drivers/gpu/drm/sti/sti_gdp.c

700

sti_plane_to_str(plane),

drivers/gpu/drm/sti/sti_gdp.c

714

struct sti_plane *plane = to_sti_plane(drm_plane);

drivers/gpu/drm/sti/sti_gdp.c

715

struct sti_gdp *gdp = to_sti_gdp(plane);

drivers/gpu/drm/sti/sti_gdp.c

745

plane->status = STI_PLANE_UPDATED;

drivers/gpu/drm/sti/sti_gdp.c

775

sti_plane_to_str(plane), top_field, btm_field);

drivers/gpu/drm/sti/sti_gdp.c

845

sti_plane_to_str(plane));

drivers/gpu/drm/sti/sti_gdp.c

870

sti_plane_update_fps(plane, true, false);

drivers/gpu/drm/sti/sti_gdp.c

872

plane->status = STI_PLANE_UPDATED;

drivers/gpu/drm/sti/sti_gdp.c

880

struct sti_plane *plane = to_sti_plane(drm_plane);

drivers/gpu/drm/sti/sti_gdp.c

891

drm_plane->base.id, sti_plane_to_str(plane));

drivers/gpu/drm/sti/sti_gdp.c

893

plane->status = STI_PLANE_DISABLING;

drivers/gpu/drm/sti/sti_gdp.c

904

struct sti_plane *plane = to_sti_plane(drm_plane);

drivers/gpu/drm/sti/sti_gdp.c

905

struct sti_gdp *gdp = to_sti_gdp(plane);

drivers/gpu/drm/sti/sti_gdp.c

937

gdp->plane.desc = desc;

drivers/gpu/drm/sti/sti_gdp.c

938

gdp->plane.status = STI_PLANE_DISABLED;

drivers/gpu/drm/sti/sti_gdp.c

944

res = drm_universal_plane_init(drm_dev, &gdp->plane.drm_plane,

drivers/gpu/drm/sti/sti_gdp.c

955

drm_plane_helper_add(&gdp->plane.drm_plane, &sti_gdp_helpers_funcs);

drivers/gpu/drm/sti/sti_gdp.c

957

sti_plane_init_property(&gdp->plane, type);

drivers/gpu/drm/sti/sti_gdp.c

959

return &gdp->plane.drm_plane;

drivers/gpu/drm/sti/sti_hqvdp.c

1027

struct sti_plane *plane = to_sti_plane(drm_plane);

drivers/gpu/drm/sti/sti_hqvdp.c

1028

struct sti_hqvdp *hqvdp = to_sti_hqvdp(plane);

drivers/gpu/drm/sti/sti_hqvdp.c

1108

drm_plane->base.id, sti_plane_to_str(plane));

drivers/gpu/drm/sti/sti_hqvdp.c

1110

sti_plane_to_str(plane),

drivers/gpu/drm/sti/sti_hqvdp.c

1124

struct sti_plane *plane = to_sti_plane(drm_plane);

drivers/gpu/drm/sti/sti_hqvdp.c

1125

struct sti_hqvdp *hqvdp = to_sti_hqvdp(plane);

drivers/gpu/drm/sti/sti_hqvdp.c

1150

plane->status = STI_PLANE_UPDATED;

drivers/gpu/drm/sti/sti_hqvdp.c

1246

sti_plane_update_fps(plane, true, true);

drivers/gpu/drm/sti/sti_hqvdp.c

1248

plane->status = STI_PLANE_UPDATED;

drivers/gpu/drm/sti/sti_hqvdp.c

1256

struct sti_plane *plane = to_sti_plane(drm_plane);

drivers/gpu/drm/sti/sti_hqvdp.c

1267

drm_plane->base.id, sti_plane_to_str(plane));

drivers/gpu/drm/sti/sti_hqvdp.c

1269

plane->status = STI_PLANE_DISABLING;

drivers/gpu/drm/sti/sti_hqvdp.c

1280

struct sti_plane *plane = to_sti_plane(drm_plane);

drivers/gpu/drm/sti/sti_hqvdp.c

1281

struct sti_hqvdp *hqvdp = to_sti_hqvdp(plane);

drivers/gpu/drm/sti/sti_hqvdp.c

1304

hqvdp->plane.desc = desc;

drivers/gpu/drm/sti/sti_hqvdp.c

1305

hqvdp->plane.status = STI_PLANE_DISABLED;

drivers/gpu/drm/sti/sti_hqvdp.c

1309

res = drm_universal_plane_init(drm_dev, &hqvdp->plane.drm_plane, 1,

drivers/gpu/drm/sti/sti_hqvdp.c

1319

drm_plane_helper_add(&hqvdp->plane.drm_plane, &sti_hqvdp_helpers_funcs);

drivers/gpu/drm/sti/sti_hqvdp.c

1321

sti_plane_init_property(&hqvdp->plane, DRM_PLANE_TYPE_OVERLAY);

drivers/gpu/drm/sti/sti_hqvdp.c

1323

return &hqvdp->plane.drm_plane;

drivers/gpu/drm/sti/sti_hqvdp.c

1330

struct drm_plane *plane;

drivers/gpu/drm/sti/sti_hqvdp.c

1337

plane = sti_hqvdp_create(drm_dev, hqvdp->dev, STI_HQVDP_0);

drivers/gpu/drm/sti/sti_hqvdp.c

1338

if (!plane)

drivers/gpu/drm/sti/sti_hqvdp.c

350

struct sti_plane plane;

drivers/gpu/drm/sti/sti_hqvdp.c

363

#define to_sti_hqvdp(x) container_of(x, struct sti_hqvdp, plane)

drivers/gpu/drm/sti/sti_hqvdp.c

574

sti_plane_to_str(&hqvdp->plane), hqvdp->regs);

drivers/gpu/drm/sti/sti_hqvdp.c

761

DRM_DEBUG_DRIVER("%s\n", sti_plane_to_str(&hqvdp->plane));

drivers/gpu/drm/sti/sti_hqvdp.c

783

hqvdp->plane.status = STI_PLANE_DISABLED;

drivers/gpu/drm/sti/sti_hqvdp.c

809

if (hqvdp->plane.status == STI_PLANE_FLUSHING) {

drivers/gpu/drm/sti/sti_hqvdp.c

812

sti_plane_to_str(&hqvdp->plane));

drivers/gpu/drm/sti/sti_hqvdp.c

846

sti_plane_update_fps(&hqvdp->plane, false, true);

drivers/gpu/drm/sti/sti_mixer.c

237

int sti_mixer_set_plane_depth(struct sti_mixer *mixer, struct sti_plane *plane)

drivers/gpu/drm/sti/sti_mixer.c

239

int plane_id, depth = plane->drm_plane.state->normalized_zpos;

drivers/gpu/drm/sti/sti_mixer.c

243

switch (plane->desc) {

drivers/gpu/drm/sti/sti_mixer.c

263

DRM_ERROR("Unknown plane %d\n", plane->desc);

drivers/gpu/drm/sti/sti_mixer.c

279

sti_plane_to_str(plane), depth);

drivers/gpu/drm/sti/sti_mixer.c

314

static u32 sti_mixer_get_plane_mask(struct sti_plane *plane)

drivers/gpu/drm/sti/sti_mixer.c

316

switch (plane->desc) {

drivers/gpu/drm/sti/sti_mixer.c

337

struct sti_plane *plane, bool status)

drivers/gpu/drm/sti/sti_mixer.c

342

sti_mixer_to_str(mixer), sti_plane_to_str(plane));

drivers/gpu/drm/sti/sti_mixer.c

344

mask = sti_mixer_get_plane_mask(plane);

drivers/gpu/drm/sti/sti_mixer.h

54

struct sti_plane *plane, bool status);

drivers/gpu/drm/sti/sti_mixer.h

55

int sti_mixer_set_plane_depth(struct sti_mixer *mixer, struct sti_plane *plane);

drivers/gpu/drm/sti/sti_plane.c

100

plane->fps_info.fps_str,

drivers/gpu/drm/sti/sti_plane.c

101

plane->fps_info.fips_str);

drivers/gpu/drm/sti/sti_plane.c

133

void sti_plane_init_property(struct sti_plane *plane,

drivers/gpu/drm/sti/sti_plane.c

136

sti_plane_attach_zorder_property(&plane->drm_plane, type);

drivers/gpu/drm/sti/sti_plane.c

139

plane->drm_plane.base.id, sti_plane_to_str(plane));

drivers/gpu/drm/sti/sti_plane.c

21

const char *sti_plane_to_str(struct sti_plane *plane)

drivers/gpu/drm/sti/sti_plane.c

23

switch (plane->desc) {

drivers/gpu/drm/sti/sti_plane.c

43

void sti_plane_update_fps(struct sti_plane *plane,

drivers/gpu/drm/sti/sti_plane.c

47

struct drm_plane_state *state = plane->drm_plane.state;

drivers/gpu/drm/sti/sti_plane.c

55

fps = &plane->fps_info;

drivers/gpu/drm/sti/sti_plane.c

76

snprintf(plane->fps_info.fps_str, FPS_LENGTH,

drivers/gpu/drm/sti/sti_plane.c

78

plane->drm_plane.name,

drivers/gpu/drm/sti/sti_plane.c

83

sti_plane_to_str(plane));

drivers/gpu/drm/sti/sti_plane.c

91

snprintf(plane->fps_info.fips_str,

drivers/gpu/drm/sti/sti_plane.c

95

plane->fps_info.fips_str[0] = '\0';

drivers/gpu/drm/sti/sti_plane.h

76

const char *sti_plane_to_str(struct sti_plane *plane);

drivers/gpu/drm/sti/sti_plane.h

77

void sti_plane_update_fps(struct sti_plane *plane,

drivers/gpu/drm/sti/sti_plane.h

81

void sti_plane_init_property(struct sti_plane *plane,

drivers/gpu/drm/stm/ltdc.c

1238

static int ltdc_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/stm/ltdc.c

1242

plane);

drivers/gpu/drm/stm/ltdc.c

1246

drm_dbg_driver(plane->dev, "\n");

drivers/gpu/drm/stm/ltdc.c

1257

drm_dbg_driver(plane->dev, "Scaling is not supported");

drivers/gpu/drm/stm/ltdc.c

1265

static void ltdc_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/stm/ltdc.c

1268

struct ltdc_device *ldev = plane_to_ltdc(plane);

drivers/gpu/drm/stm/ltdc.c

1270

plane);

drivers/gpu/drm/stm/ltdc.c

1272

u32 lofs = plane->index * LAY_OFS;

drivers/gpu/drm/stm/ltdc.c

1283

drm_dbg_driver(plane->dev, "fb or crtc NULL");

drivers/gpu/drm/stm/ltdc.c

1293

drm_dbg_driver(plane->dev, "plane:%d fb:%d (%dx%d)@(%d,%d) -> (%dx%d)@(%d,%d)\n",

drivers/gpu/drm/stm/ltdc.c

1294

plane->base.id, fb->base.id,

drivers/gpu/drm/stm/ltdc.c

1322

val = ltdc_set_flexible_pixel_format(plane, pf);

drivers/gpu/drm/stm/ltdc.c

1342

plane->type != DRM_PLANE_TYPE_PRIMARY)

drivers/gpu/drm/stm/ltdc.c

1464

ltdc_set_ycbcr_coeffs(plane);

drivers/gpu/drm/stm/ltdc.c

1467

ltdc_set_ycbcr_config(plane, fb->format->format);

drivers/gpu/drm/stm/ltdc.c

1489

ldev->plane_fpsi[plane->index].counter++;

drivers/gpu/drm/stm/ltdc.c

1511

static void ltdc_plane_atomic_disable(struct drm_plane *plane,

drivers/gpu/drm/stm/ltdc.c

1515

plane);

drivers/gpu/drm/stm/ltdc.c

1516

struct ltdc_device *ldev = plane_to_ltdc(plane);

drivers/gpu/drm/stm/ltdc.c

1517

u32 lofs = plane->index * LAY_OFS;

drivers/gpu/drm/stm/ltdc.c

1530

drm_dbg_driver(plane->dev, "CRTC:%d plane:%d\n",

drivers/gpu/drm/stm/ltdc.c

1531

oldstate->crtc->base.id, plane->base.id);

drivers/gpu/drm/stm/ltdc.c

1537

struct drm_plane *plane = state->plane;

drivers/gpu/drm/stm/ltdc.c

1538

struct ltdc_device *ldev = plane_to_ltdc(plane);

drivers/gpu/drm/stm/ltdc.c

1539

struct fps_info *fpsi = &ldev->plane_fpsi[plane->index];

drivers/gpu/drm/stm/ltdc.c

1575

struct drm_plane *plane;

drivers/gpu/drm/stm/ltdc.c

1624

plane = drmm_universal_plane_alloc(ddev, struct drm_plane, dev,

drivers/gpu/drm/stm/ltdc.c

1627

if (IS_ERR(plane))

drivers/gpu/drm/stm/ltdc.c

1632

drm_plane_create_color_properties(plane,

drivers/gpu/drm/stm/ltdc.c

1641

drm_plane_helper_add(plane, &ltdc_plane_helper_funcs);

drivers/gpu/drm/stm/ltdc.c

1643

drm_plane_create_alpha_property(plane);

drivers/gpu/drm/stm/ltdc.c

1645

drm_dbg_driver(plane->dev, "plane:%d created\n", plane->base.id);

drivers/gpu/drm/stm/ltdc.c

1647

return plane;

drivers/gpu/drm/stm/ltdc.c

495

static inline struct ltdc_device *plane_to_ltdc(struct drm_plane *plane)

drivers/gpu/drm/stm/ltdc.c

497

return (struct ltdc_device *)plane->dev->dev_private;

drivers/gpu/drm/stm/ltdc.c

553

static inline u32 ltdc_set_flexible_pixel_format(struct drm_plane *plane, enum ltdc_pix_fmt pix_fmt)

drivers/gpu/drm/stm/ltdc.c

555

struct ltdc_device *ldev = plane_to_ltdc(plane);

drivers/gpu/drm/stm/ltdc.c

556

u32 lofs = plane->index * LAY_OFS, ret = PF_FLEXIBLE;

drivers/gpu/drm/stm/ltdc.c

615

static inline void ltdc_set_ycbcr_config(struct drm_plane *plane, u32 drm_pix_fmt)

drivers/gpu/drm/stm/ltdc.c

617

struct ltdc_device *ldev = plane_to_ltdc(plane);

drivers/gpu/drm/stm/ltdc.c

618

struct drm_plane_state *state = plane->state;

drivers/gpu/drm/stm/ltdc.c

619

u32 lofs = plane->index * LAY_OFS;

drivers/gpu/drm/stm/ltdc.c

647

drm_err(plane->dev, "Unsupported pixel format: %u\n", drm_pix_fmt);

drivers/gpu/drm/stm/ltdc.c

661

static inline void ltdc_set_ycbcr_coeffs(struct drm_plane *plane)

drivers/gpu/drm/stm/ltdc.c

663

struct ltdc_device *ldev = plane_to_ltdc(plane);

drivers/gpu/drm/stm/ltdc.c

664

struct drm_plane_state *state = plane->state;

drivers/gpu/drm/stm/ltdc.c

667

u32 lofs = plane->index * LAY_OFS;

drivers/gpu/drm/stm/ltdc.c

670

drm_err(plane->dev, "color encoding %d not supported, use bt601 by default\n", enc);

drivers/gpu/drm/stm/ltdc.c

676

drm_err(plane->dev,

drivers/gpu/drm/stm/ltdc.c

682

drm_err(plane->dev, "Color encoding=%d, range=%d\n", enc, ran);

drivers/gpu/drm/sun4i/sun4i_backend.c

173

int layer, struct drm_plane *plane)

drivers/gpu/drm/sun4i/sun4i_backend.c

175

struct drm_plane_state *state = plane->state;

drivers/gpu/drm/sun4i/sun4i_backend.c

197

int layer, struct drm_plane *plane)

drivers/gpu/drm/sun4i/sun4i_backend.c

199

struct drm_plane_state *state = plane->state;

drivers/gpu/drm/sun4i/sun4i_backend.c

254

int layer, struct drm_plane *plane)

drivers/gpu/drm/sun4i/sun4i_backend.c

256

struct drm_plane_state *state = plane->state;

drivers/gpu/drm/sun4i/sun4i_backend.c

275

return sun4i_backend_update_yuv_format(backend, layer, plane);

drivers/gpu/drm/sun4i/sun4i_backend.c

330

int layer, struct drm_plane *plane)

drivers/gpu/drm/sun4i/sun4i_backend.c

332

struct drm_plane_state *state = plane->state;

drivers/gpu/drm/sun4i/sun4i_backend.c

368

struct drm_plane *plane)

drivers/gpu/drm/sun4i/sun4i_backend.c

370

struct drm_plane_state *state = plane->state;

drivers/gpu/drm/sun4i/sun4i_backend.c

411

struct sun4i_layer *layer = plane_to_sun4i_layer(state->plane);

drivers/gpu/drm/sun4i/sun4i_backend.c

477

struct drm_plane *plane;

drivers/gpu/drm/sun4i/sun4i_backend.c

491

drm_for_each_plane_mask(plane, drm, crtc_state->plane_mask) {

drivers/gpu/drm/sun4i/sun4i_backend.c

493

drm_atomic_get_plane_state(state, plane);

drivers/gpu/drm/sun4i/sun4i_backend.c

507

plane->index);

drivers/gpu/drm/sun4i/sun4i_backend.h

199

int layer, struct drm_plane *plane);

drivers/gpu/drm/sun4i/sun4i_backend.h

201

int layer, struct drm_plane *plane);

drivers/gpu/drm/sun4i/sun4i_backend.h

203

int layer, struct drm_plane *plane);

drivers/gpu/drm/sun4i/sun4i_backend.h

207

int layer, struct drm_plane *plane);

drivers/gpu/drm/sun4i/sun4i_crtc.c

216

struct drm_plane *plane = planes[i];

drivers/gpu/drm/sun4i/sun4i_crtc.c

218

switch (plane->type) {

drivers/gpu/drm/sun4i/sun4i_crtc.c

220

primary = plane;

drivers/gpu/drm/sun4i/sun4i_crtc.c

223

cursor = plane;

drivers/gpu/drm/sun4i/sun4i_crtc.c

249

struct drm_plane *plane = planes[i];

drivers/gpu/drm/sun4i/sun4i_crtc.c

251

if (plane->type == DRM_PLANE_TYPE_OVERLAY)

drivers/gpu/drm/sun4i/sun4i_crtc.c

252

plane->possible_crtcs = possible_crtcs;

drivers/gpu/drm/sun4i/sun4i_frontend.c

158

struct drm_plane *plane)

drivers/gpu/drm/sun4i/sun4i_frontend.c

160

struct drm_plane_state *state = plane->state;

drivers/gpu/drm/sun4i/sun4i_frontend.c

404

struct drm_plane *plane, uint32_t out_fmt)

drivers/gpu/drm/sun4i/sun4i_frontend.c

406

struct drm_plane_state *state = plane->state;

drivers/gpu/drm/sun4i/sun4i_frontend.c

497

struct drm_plane *plane)

drivers/gpu/drm/sun4i/sun4i_frontend.c

499

struct drm_plane_state *state = plane->state;

drivers/gpu/drm/sun4i/sun4i_frontend.h

144

struct drm_plane *plane);

drivers/gpu/drm/sun4i/sun4i_frontend.h

146

struct drm_plane *plane);

drivers/gpu/drm/sun4i/sun4i_frontend.h

148

struct drm_plane *plane, uint32_t out_fmt);

drivers/gpu/drm/sun4i/sun4i_layer.c

105

sun4i_backend_update_layer_formats(backend, layer->id, plane);

drivers/gpu/drm/sun4i/sun4i_layer.c

106

sun4i_backend_update_layer_buffer(backend, layer->id, plane);

drivers/gpu/drm/sun4i/sun4i_layer.c

109

sun4i_backend_update_layer_coord(backend, layer->id, plane);

drivers/gpu/drm/sun4i/sun4i_layer.c

110

sun4i_backend_update_layer_zpos(backend, layer->id, plane);

drivers/gpu/drm/sun4i/sun4i_layer.c

114

static bool sun4i_layer_format_mod_supported(struct drm_plane *plane,

drivers/gpu/drm/sun4i/sun4i_layer.c

117

struct sun4i_layer *layer = plane_to_sun4i_layer(plane);

drivers/gpu/drm/sun4i/sun4i_layer.c

19

static void sun4i_backend_layer_reset(struct drm_plane *plane)

drivers/gpu/drm/sun4i/sun4i_layer.c

215

ret = drm_universal_plane_init(drm, &layer->plane, 0,

drivers/gpu/drm/sun4i/sun4i_layer.c

224

drm_plane_helper_add(&layer->plane,

drivers/gpu/drm/sun4i/sun4i_layer.c

227

drm_plane_create_alpha_property(&layer->plane);

drivers/gpu/drm/sun4i/sun4i_layer.c

228

drm_plane_create_zpos_property(&layer->plane, layer->id,

drivers/gpu/drm/sun4i/sun4i_layer.c

23

if (plane->state) {

drivers/gpu/drm/sun4i/sun4i_layer.c

24

state = state_to_sun4i_layer_state(plane->state);

drivers/gpu/drm/sun4i/sun4i_layer.c

258

planes[i] = &layer->plane;

drivers/gpu/drm/sun4i/sun4i_layer.c

29

plane->state = NULL;

drivers/gpu/drm/sun4i/sun4i_layer.c

34

__drm_atomic_helper_plane_reset(plane, &state->state);

drivers/gpu/drm/sun4i/sun4i_layer.c

38

sun4i_backend_layer_duplicate_state(struct drm_plane *plane)

drivers/gpu/drm/sun4i/sun4i_layer.c

40

struct sun4i_layer_state *orig = state_to_sun4i_layer_state(plane->state);

drivers/gpu/drm/sun4i/sun4i_layer.c

47

__drm_atomic_helper_plane_duplicate_state(plane, &copy->state);

drivers/gpu/drm/sun4i/sun4i_layer.c

53

static void sun4i_backend_layer_destroy_state(struct drm_plane *plane,

drivers/gpu/drm/sun4i/sun4i_layer.c

63

static void sun4i_backend_layer_atomic_disable(struct drm_plane *plane,

drivers/gpu/drm/sun4i/sun4i_layer.c

67

plane);

drivers/gpu/drm/sun4i/sun4i_layer.c

69

struct sun4i_layer *layer = plane_to_sun4i_layer(plane);

drivers/gpu/drm/sun4i/sun4i_layer.c

83

static void sun4i_backend_layer_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/sun4i/sun4i_layer.c

87

plane);

drivers/gpu/drm/sun4i/sun4i_layer.c

89

struct sun4i_layer *layer = plane_to_sun4i_layer(plane);

drivers/gpu/drm/sun4i/sun4i_layer.c

97

sun4i_frontend_update_coord(frontend, plane);

drivers/gpu/drm/sun4i/sun4i_layer.c

98

sun4i_frontend_update_buffer(frontend, plane);

drivers/gpu/drm/sun4i/sun4i_layer.c

99

sun4i_frontend_update_formats(frontend, plane,

drivers/gpu/drm/sun4i/sun4i_layer.h

15

struct drm_plane plane;

drivers/gpu/drm/sun4i/sun4i_layer.h

28

plane_to_sun4i_layer(struct drm_plane *plane)

drivers/gpu/drm/sun4i/sun4i_layer.h

30

return container_of(plane, struct sun4i_layer, plane);

drivers/gpu/drm/sun4i/sun8i_mixer.c

262

struct drm_plane *plane;

drivers/gpu/drm/sun4i/sun8i_mixer.c

267

drm_for_each_plane(plane, state->dev) {

drivers/gpu/drm/sun4i/sun8i_mixer.c

268

struct sun8i_layer *layer = plane_to_sun8i_layer(plane);

drivers/gpu/drm/sun4i/sun8i_mixer.c

272

if (!(plane->possible_crtcs & drm_crtc_mask(crtc)))

drivers/gpu/drm/sun4i/sun8i_mixer.c

275

plane_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/sun4i/sun8i_mixer.c

277

plane_state = plane->state;

drivers/gpu/drm/sun4i/sun8i_mixer.c

287

plane->base.id, layer->index, layer->overlay,

drivers/gpu/drm/sun4i/sun8i_mixer.c

349

planes[i] = &layer->plane;

drivers/gpu/drm/sun4i/sun8i_mixer.c

374

planes[index] = &layer->plane;

drivers/gpu/drm/sun4i/sun8i_mixer.h

228

struct drm_plane plane;

drivers/gpu/drm/sun4i/sun8i_mixer.h

238

plane_to_sun8i_layer(struct drm_plane *plane)

drivers/gpu/drm/sun4i/sun8i_mixer.h

240

return container_of(plane, struct sun8i_layer, plane);

drivers/gpu/drm/sun4i/sun8i_ui_layer.c

123

struct drm_plane *plane)

drivers/gpu/drm/sun4i/sun8i_ui_layer.c

125

struct drm_plane_state *state = plane->state;

drivers/gpu/drm/sun4i/sun8i_ui_layer.c

148

static int sun8i_ui_layer_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/sun4i/sun8i_ui_layer.c

152

plane);

drivers/gpu/drm/sun4i/sun8i_ui_layer.c

153

struct sun8i_layer *layer = plane_to_sun8i_layer(plane);

drivers/gpu/drm/sun4i/sun8i_ui_layer.c

189

static void sun8i_ui_layer_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/sun4i/sun8i_ui_layer.c

193

plane);

drivers/gpu/drm/sun4i/sun8i_ui_layer.c

194

struct sun8i_layer *layer = plane_to_sun8i_layer(plane);

drivers/gpu/drm/sun4i/sun8i_ui_layer.c

201

sun8i_ui_layer_update_attributes(layer, plane);

drivers/gpu/drm/sun4i/sun8i_ui_layer.c

202

sun8i_ui_layer_update_coord(layer, plane);

drivers/gpu/drm/sun4i/sun8i_ui_layer.c

203

sun8i_ui_layer_update_buffer(layer, plane);

drivers/gpu/drm/sun4i/sun8i_ui_layer.c

270

ret = drm_universal_plane_init(drm, &layer->plane, 0,

drivers/gpu/drm/sun4i/sun8i_ui_layer.c

280

ret = drm_plane_create_alpha_property(&layer->plane);

drivers/gpu/drm/sun4i/sun8i_ui_layer.c

286

ret = drm_plane_create_zpos_property(&layer->plane, index,

drivers/gpu/drm/sun4i/sun8i_ui_layer.c

293

drm_plane_helper_add(&layer->plane, &sun8i_ui_layer_helper_funcs);

drivers/gpu/drm/sun4i/sun8i_ui_layer.c

38

struct drm_plane *plane)

drivers/gpu/drm/sun4i/sun8i_ui_layer.c

40

struct drm_plane_state *state = plane->state;

drivers/gpu/drm/sun4i/sun8i_ui_layer.c

60

struct drm_plane *plane)

drivers/gpu/drm/sun4i/sun8i_ui_layer.c

62

struct drm_plane_state *state = plane->state;

drivers/gpu/drm/sun4i/sun8i_vi_layer.c

139

mode = &plane->state->crtc->state->mode;

drivers/gpu/drm/sun4i/sun8i_vi_layer.c

195

struct drm_plane *plane)

drivers/gpu/drm/sun4i/sun8i_vi_layer.c

197

struct drm_plane_state *state = plane->state;

drivers/gpu/drm/sun4i/sun8i_vi_layer.c

228

static int sun8i_vi_layer_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/sun4i/sun8i_vi_layer.c

232

plane);

drivers/gpu/drm/sun4i/sun8i_vi_layer.c

233

struct sun8i_layer *layer = plane_to_sun8i_layer(plane);

drivers/gpu/drm/sun4i/sun8i_vi_layer.c

268

static void sun8i_vi_layer_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/sun4i/sun8i_vi_layer.c

272

plane);

drivers/gpu/drm/sun4i/sun8i_vi_layer.c

273

struct sun8i_layer *layer = plane_to_sun8i_layer(plane);

drivers/gpu/drm/sun4i/sun8i_vi_layer.c

280

sun8i_vi_layer_update_attributes(layer, plane);

drivers/gpu/drm/sun4i/sun8i_vi_layer.c

281

sun8i_vi_layer_update_coord(layer, plane);

drivers/gpu/drm/sun4i/sun8i_vi_layer.c

283

sun8i_vi_layer_update_buffer(layer, plane);

drivers/gpu/drm/sun4i/sun8i_vi_layer.c

32

struct drm_plane *plane)

drivers/gpu/drm/sun4i/sun8i_vi_layer.c

34

struct drm_plane_state *state = plane->state;

drivers/gpu/drm/sun4i/sun8i_vi_layer.c

421

ret = drm_universal_plane_init(drm, &layer->plane, 0,

drivers/gpu/drm/sun4i/sun8i_vi_layer.c

432

ret = drm_plane_create_alpha_property(&layer->plane);

drivers/gpu/drm/sun4i/sun8i_vi_layer.c

439

ret = drm_plane_create_zpos_property(&layer->plane, index,

drivers/gpu/drm/sun4i/sun8i_vi_layer.c

454

ret = drm_plane_create_color_properties(&layer->plane,

drivers/gpu/drm/sun4i/sun8i_vi_layer.c

464

drm_plane_helper_add(&layer->plane, &sun8i_vi_layer_helper_funcs);

drivers/gpu/drm/sun4i/sun8i_vi_layer.c

64

struct drm_plane *plane)

drivers/gpu/drm/sun4i/sun8i_vi_layer.c

66

struct drm_plane_state *state = plane->state;

drivers/gpu/drm/sun4i/sun8i_vi_layer.h

17

#define SUN8I_MIXER_CHAN_VI_LAYER_PITCH(base, layer, plane) \

drivers/gpu/drm/sun4i/sun8i_vi_layer.h

18

((base) + 0x30 * (layer) + 0xc + 4 * (plane))

drivers/gpu/drm/sun4i/sun8i_vi_layer.h

19

#define SUN8I_MIXER_CHAN_VI_LAYER_TOP_LADDR(base, layer, plane) \

drivers/gpu/drm/sun4i/sun8i_vi_layer.h

20

((base) + 0x30 * (layer) + 0x18 + 4 * (plane))

drivers/gpu/drm/sysfb/drm_sysfb_helper.h

111

int drm_sysfb_plane_helper_begin_fb_access(struct drm_plane *plane,

drivers/gpu/drm/sysfb/drm_sysfb_helper.h

113

int drm_sysfb_plane_helper_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/sysfb/drm_sysfb_helper.h

115

void drm_sysfb_plane_helper_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/sysfb/drm_sysfb_helper.h

117

void drm_sysfb_plane_helper_atomic_disable(struct drm_plane *plane,

drivers/gpu/drm/sysfb/drm_sysfb_helper.h

119

int drm_sysfb_plane_helper_get_scanout_buffer(struct drm_plane *plane,

drivers/gpu/drm/sysfb/drm_sysfb_helper.h

137

void drm_sysfb_plane_reset(struct drm_plane *plane);

drivers/gpu/drm/sysfb/drm_sysfb_helper.h

138

struct drm_plane_state *drm_sysfb_plane_atomic_duplicate_state(struct drm_plane *plane);

drivers/gpu/drm/sysfb/drm_sysfb_helper.h

139

void drm_sysfb_plane_atomic_destroy_state(struct drm_plane *plane,

drivers/gpu/drm/sysfb/drm_sysfb_modeset.c

241

int drm_sysfb_plane_helper_begin_fb_access(struct drm_plane *plane,

drivers/gpu/drm/sysfb/drm_sysfb_modeset.c

244

struct drm_device *dev = plane->dev;

drivers/gpu/drm/sysfb/drm_sysfb_modeset.c

252

ret = drm_gem_begin_shadow_fb_access(plane, plane_state);

drivers/gpu/drm/sysfb/drm_sysfb_modeset.c

280

drm_gem_end_shadow_fb_access(plane, plane_state);

drivers/gpu/drm/sysfb/drm_sysfb_modeset.c

285

int drm_sysfb_plane_helper_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/sysfb/drm_sysfb_modeset.c

288

struct drm_sysfb_device *sysfb = to_drm_sysfb_device(plane->dev);

drivers/gpu/drm/sysfb/drm_sysfb_modeset.c

289

struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(new_state, plane);

drivers/gpu/drm/sysfb/drm_sysfb_modeset.c

329

void drm_sysfb_plane_helper_atomic_update(struct drm_plane *plane, struct drm_atomic_commit *state)

drivers/gpu/drm/sysfb/drm_sysfb_modeset.c

331

struct drm_device *dev = plane->dev;

drivers/gpu/drm/sysfb/drm_sysfb_modeset.c

333

struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/sysfb/drm_sysfb_modeset.c

334

struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane);

drivers/gpu/drm/sysfb/drm_sysfb_modeset.c

373

void drm_sysfb_plane_helper_atomic_disable(struct drm_plane *plane,

drivers/gpu/drm/sysfb/drm_sysfb_modeset.c

376

struct drm_device *dev = plane->dev;

drivers/gpu/drm/sysfb/drm_sysfb_modeset.c

379

struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/sysfb/drm_sysfb_modeset.c

408

int drm_sysfb_plane_helper_get_scanout_buffer(struct drm_plane *plane,

drivers/gpu/drm/sysfb/drm_sysfb_modeset.c

411

struct drm_sysfb_device *sysfb = to_drm_sysfb_device(plane->dev);

drivers/gpu/drm/sysfb/drm_sysfb_modeset.c

423

void drm_sysfb_plane_reset(struct drm_plane *plane)

drivers/gpu/drm/sysfb/drm_sysfb_modeset.c

427

if (plane->state)

drivers/gpu/drm/sysfb/drm_sysfb_modeset.c

428

drm_sysfb_plane_state_destroy(to_drm_sysfb_plane_state(plane->state));

drivers/gpu/drm/sysfb/drm_sysfb_modeset.c

432

__drm_gem_reset_shadow_plane(plane, &sysfb_plane_state->base);

drivers/gpu/drm/sysfb/drm_sysfb_modeset.c

434

__drm_gem_reset_shadow_plane(plane, NULL);

drivers/gpu/drm/sysfb/drm_sysfb_modeset.c

438

struct drm_plane_state *drm_sysfb_plane_atomic_duplicate_state(struct drm_plane *plane)

drivers/gpu/drm/sysfb/drm_sysfb_modeset.c

440

struct drm_device *dev = plane->dev;

drivers/gpu/drm/sysfb/drm_sysfb_modeset.c

441

struct drm_plane_state *plane_state = plane->state;

drivers/gpu/drm/sysfb/drm_sysfb_modeset.c

455

__drm_gem_duplicate_shadow_plane_state(plane, new_shadow_plane_state);

drivers/gpu/drm/sysfb/drm_sysfb_modeset.c

462

void drm_sysfb_plane_atomic_destroy_state(struct drm_plane *plane,

drivers/gpu/drm/sysfb/vesadrm.c

250

static int vesadrm_primary_plane_helper_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/sysfb/vesadrm.c

253

struct drm_sysfb_device *sysfb = to_drm_sysfb_device(plane->dev);

drivers/gpu/drm/sysfb/vesadrm.c

254

struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(new_state, plane);

drivers/gpu/drm/sysfb/vesadrm.c

260

ret = drm_sysfb_plane_helper_atomic_check(plane, new_state);

drivers/gpu/drm/tegra/dc.c

1003

static void __tegra_cursor_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/tegra/dc.c

1008

struct tegra_drm *tegra = plane->dev->dev_private;

drivers/gpu/drm/tegra/dc.c

1101

static void tegra_cursor_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/tegra/dc.c

1104

struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/tegra/dc.c

1106

__tegra_cursor_atomic_update(plane, new_state);

drivers/gpu/drm/tegra/dc.c

1109

static void tegra_cursor_atomic_disable(struct drm_plane *plane,

drivers/gpu/drm/tegra/dc.c

1113

plane);

drivers/gpu/drm/tegra/dc.c

1128

static int tegra_cursor_atomic_async_check(struct drm_plane *plane, struct drm_atomic_commit *state,

drivers/gpu/drm/tegra/dc.c

1131

struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/tegra/dc.c

1143

if (plane->state->crtc != new_state->crtc ||

drivers/gpu/drm/tegra/dc.c

1144

plane->state->src_w != new_state->src_w ||

drivers/gpu/drm/tegra/dc.c

1145

plane->state->src_h != new_state->src_h ||

drivers/gpu/drm/tegra/dc.c

1146

plane->state->crtc_w != new_state->crtc_w ||

drivers/gpu/drm/tegra/dc.c

1147

plane->state->crtc_h != new_state->crtc_h ||

drivers/gpu/drm/tegra/dc.c

1148

plane->state->fb != new_state->fb ||

drivers/gpu/drm/tegra/dc.c

1149

plane->state->fb == NULL)

drivers/gpu/drm/tegra/dc.c

1160

if (new_state->visible != plane->state->visible)

drivers/gpu/drm/tegra/dc.c

1166

static void tegra_cursor_atomic_async_update(struct drm_plane *plane,

drivers/gpu/drm/tegra/dc.c

1169

struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/tegra/dc.c

1172

plane->state->src_x = new_state->src_x;

drivers/gpu/drm/tegra/dc.c

1173

plane->state->src_y = new_state->src_y;

drivers/gpu/drm/tegra/dc.c

1174

plane->state->crtc_x = new_state->crtc_x;

drivers/gpu/drm/tegra/dc.c

1175

plane->state->crtc_y = new_state->crtc_y;

drivers/gpu/drm/tegra/dc.c

1178

struct tegra_plane *p = to_tegra_plane(plane);

drivers/gpu/drm/tegra/dc.c

1181

__tegra_cursor_atomic_update(plane, new_state);

drivers/gpu/drm/tegra/dc.c

1212

struct tegra_plane *plane;

drivers/gpu/drm/tegra/dc.c

1217

plane = kzalloc_obj(*plane);

drivers/gpu/drm/tegra/dc.c

1218

if (!plane)

drivers/gpu/drm/tegra/dc.c

1228

plane->index = 6;

drivers/gpu/drm/tegra/dc.c

1229

plane->dc = dc;

drivers/gpu/drm/tegra/dc.c

1235

err = tegra_plane_interconnect_init(plane);

drivers/gpu/drm/tegra/dc.c

1237

kfree(plane);

drivers/gpu/drm/tegra/dc.c

1245

err = drm_universal_plane_init(drm, &plane->base, possible_crtcs,

drivers/gpu/drm/tegra/dc.c

1250

kfree(plane);

drivers/gpu/drm/tegra/dc.c

1254

drm_plane_helper_add(&plane->base, &tegra_cursor_plane_helper_funcs);

drivers/gpu/drm/tegra/dc.c

1255

drm_plane_create_zpos_immutable_property(&plane->base, 255);

drivers/gpu/drm/tegra/dc.c

1257

return &plane->base;

drivers/gpu/drm/tegra/dc.c

1359

struct tegra_plane *plane;

drivers/gpu/drm/tegra/dc.c

1365

plane = kzalloc_obj(*plane);

drivers/gpu/drm/tegra/dc.c

1366

if (!plane)

drivers/gpu/drm/tegra/dc.c

1369

plane->offset = 0xa00 + 0x200 * index;

drivers/gpu/drm/tegra/dc.c

1370

plane->index = index;

drivers/gpu/drm/tegra/dc.c

1371

plane->dc = dc;

drivers/gpu/drm/tegra/dc.c

1376

err = tegra_plane_interconnect_init(plane);

drivers/gpu/drm/tegra/dc.c

1378

kfree(plane);

drivers/gpu/drm/tegra/dc.c

1387

err = drm_universal_plane_init(drm, &plane->base, possible_crtcs,

drivers/gpu/drm/tegra/dc.c

1392

kfree(plane);

drivers/gpu/drm/tegra/dc.c

1396

drm_plane_helper_add(&plane->base, &tegra_plane_helper_funcs);

drivers/gpu/drm/tegra/dc.c

1397

drm_plane_create_zpos_property(&plane->base, plane->index, 0, 255);

drivers/gpu/drm/tegra/dc.c

1399

err = drm_plane_create_rotation_property(&plane->base,

drivers/gpu/drm/tegra/dc.c

1409

return &plane->base;

drivers/gpu/drm/tegra/dc.c

1415

struct drm_plane *plane, *primary = NULL;

drivers/gpu/drm/tegra/dc.c

1431

plane = tegra_shared_plane_create(drm, dc,

drivers/gpu/drm/tegra/dc.c

1434

if (IS_ERR(plane))

drivers/gpu/drm/tegra/dc.c

1435

return plane;

drivers/gpu/drm/tegra/dc.c

1442

primary = plane;

drivers/gpu/drm/tegra/dc.c

159

static inline unsigned int tegra_plane_offset(struct tegra_plane *plane,

drivers/gpu/drm/tegra/dc.c

164

return plane->offset + offset;

drivers/gpu/drm/tegra/dc.c

169

return plane->offset + offset;

drivers/gpu/drm/tegra/dc.c

174

return plane->offset + offset;

drivers/gpu/drm/tegra/dc.c

177

dev_WARN(plane->dc->dev, "invalid offset: %x\n", offset);

drivers/gpu/drm/tegra/dc.c

179

return plane->offset + offset;

drivers/gpu/drm/tegra/dc.c

182

static inline u32 tegra_plane_readl(struct tegra_plane *plane,

drivers/gpu/drm/tegra/dc.c

185

return tegra_dc_readl(plane->dc, tegra_plane_offset(plane, offset));

drivers/gpu/drm/tegra/dc.c

188

static inline void tegra_plane_writel(struct tegra_plane *plane, u32 value,

drivers/gpu/drm/tegra/dc.c

191

tegra_dc_writel(plane->dc, value, tegra_plane_offset(plane, offset));

drivers/gpu/drm/tegra/dc.c

2110

struct drm_plane *plane;

drivers/gpu/drm/tegra/dc.c

2126

drm_atomic_crtc_for_each_plane(plane, crtc) {

drivers/gpu/drm/tegra/dc.c

2127

tegra = to_tegra_plane(plane);

drivers/gpu/drm/tegra/dc.c

2136

for_each_old_plane_in_state(old_crtc_state->state, plane,

drivers/gpu/drm/tegra/dc.c

2139

new_tegra_state = to_const_tegra_plane_state(plane->state);

drivers/gpu/drm/tegra/dc.c

2140

tegra = to_tegra_plane(plane);

drivers/gpu/drm/tegra/dc.c

2165

window.src.h = drm_rect_height(&plane->state->src) >> 16;

drivers/gpu/drm/tegra/dc.c

2166

window.dst.h = drm_rect_height(&plane->state->dst);

drivers/gpu/drm/tegra/dc.c

2436

if (state->plane->type != DRM_PLANE_TYPE_CURSOR)

drivers/gpu/drm/tegra/dc.c

2455

struct drm_plane *plane;

drivers/gpu/drm/tegra/dc.c

2468

drm_atomic_crtc_state_for_each_plane_state(plane, other_state, state) {

drivers/gpu/drm/tegra/dc.c

2471

tegra = to_tegra_plane(other_state->plane);

drivers/gpu/drm/tegra/dc.c

2502

struct drm_plane *plane;

drivers/gpu/drm/tegra/dc.c

2526

drm_atomic_crtc_state_for_each_plane_state(plane, plane_state, new_state) {

drivers/gpu/drm/tegra/dc.c

2528

tegra = to_tegra_plane(plane);

drivers/gpu/drm/tegra/dc.c

2556

drm_atomic_crtc_state_for_each_plane_state(plane, plane_state, new_state) {

drivers/gpu/drm/tegra/dc.c

2566

tegra = to_tegra_plane(plane);

drivers/gpu/drm/tegra/dc.c

2591

new_plane_state = drm_atomic_get_plane_state(state, plane);

drivers/gpu/drm/tegra/dc.c

267

static void tegra_plane_setup_blending_legacy(struct tegra_plane *plane)

drivers/gpu/drm/tegra/dc.c

282

tegra_plane_writel(plane, blendnokey, DC_WIN_BLEND_NOKEY);

drivers/gpu/drm/tegra/dc.c

283

tegra_plane_writel(plane, foreground, DC_WIN_BLEND_1WIN);

drivers/gpu/drm/tegra/dc.c

285

state = to_tegra_plane_state(plane->base.state);

drivers/gpu/drm/tegra/dc.c

362

tegra_plane_writel(plane, background[0], DC_WIN_BLEND_2WIN_X);

drivers/gpu/drm/tegra/dc.c

363

tegra_plane_writel(plane, background[1], DC_WIN_BLEND_2WIN_Y);

drivers/gpu/drm/tegra/dc.c

364

tegra_plane_writel(plane, background[2], DC_WIN_BLEND_3WIN_XY);

drivers/gpu/drm/tegra/dc.c

381

tegra_plane_writel(plane, blending[0], DC_WIN_BLEND_2WIN_X);

drivers/gpu/drm/tegra/dc.c

382

tegra_plane_writel(plane, blending[1], DC_WIN_BLEND_2WIN_Y);

drivers/gpu/drm/tegra/dc.c

383

tegra_plane_writel(plane, background[2], DC_WIN_BLEND_3WIN_XY);

drivers/gpu/drm/tegra/dc.c

387

tegra_plane_writel(plane, foreground, DC_WIN_BLEND_2WIN_X);

drivers/gpu/drm/tegra/dc.c

388

tegra_plane_writel(plane, foreground, DC_WIN_BLEND_2WIN_Y);

drivers/gpu/drm/tegra/dc.c

389

tegra_plane_writel(plane, foreground, DC_WIN_BLEND_3WIN_XY);

drivers/gpu/drm/tegra/dc.c

394

static void tegra_plane_setup_blending(struct tegra_plane *plane,

drivers/gpu/drm/tegra/dc.c

402

tegra_plane_writel(plane, value, DC_WIN_BLEND_MATCH_SELECT);

drivers/gpu/drm/tegra/dc.c

407

tegra_plane_writel(plane, value, DC_WIN_BLEND_NOMATCH_SELECT);

drivers/gpu/drm/tegra/dc.c

410

tegra_plane_writel(plane, value, DC_WIN_BLEND_LAYER_CONTROL);

drivers/gpu/drm/tegra/dc.c

414

tegra_plane_use_horizontal_filtering(struct tegra_plane *plane,

drivers/gpu/drm/tegra/dc.c

417

struct tegra_dc *dc = plane->dc;

drivers/gpu/drm/tegra/dc.c

422

if (plane->index == 0 && dc->soc->has_win_a_without_filters)

drivers/gpu/drm/tegra/dc.c

429

tegra_plane_use_vertical_filtering(struct tegra_plane *plane,

drivers/gpu/drm/tegra/dc.c

432

struct tegra_dc *dc = plane->dc;

drivers/gpu/drm/tegra/dc.c

437

if (plane->index == 0 && dc->soc->has_win_a_without_filters)

drivers/gpu/drm/tegra/dc.c

440

if (plane->index == 2 && dc->soc->has_win_c_without_vert_filter)

drivers/gpu/drm/tegra/dc.c

446

static void tegra_dc_setup_window(struct tegra_plane *plane,

drivers/gpu/drm/tegra/dc.c

450

struct tegra_dc *dc = plane->dc;

drivers/gpu/drm/tegra/dc.c

465

tegra_plane_writel(plane, window->format, DC_WIN_COLOR_DEPTH);

drivers/gpu/drm/tegra/dc.c

466

tegra_plane_writel(plane, window->swap, DC_WIN_BYTE_SWAP);

drivers/gpu/drm/tegra/dc.c

469

tegra_plane_writel(plane, value, DC_WIN_POSITION);

drivers/gpu/drm/tegra/dc.c

472

tegra_plane_writel(plane, value, DC_WIN_SIZE);

drivers/gpu/drm/tegra/dc.c

486

tegra_plane_writel(plane, value, DC_WIN_PRESCALED_SIZE);

drivers/gpu/drm/tegra/dc.c

499

tegra_plane_writel(plane, value, DC_WIN_DDA_INC);

drivers/gpu/drm/tegra/dc.c

504

tegra_plane_writel(plane, h_dda, DC_WIN_H_INITIAL_DDA);

drivers/gpu/drm/tegra/dc.c

505

tegra_plane_writel(plane, v_dda, DC_WIN_V_INITIAL_DDA);

drivers/gpu/drm/tegra/dc.c

507

tegra_plane_writel(plane, 0, DC_WIN_UV_BUF_STRIDE);

drivers/gpu/drm/tegra/dc.c

508

tegra_plane_writel(plane, 0, DC_WIN_BUF_STRIDE);

drivers/gpu/drm/tegra/dc.c

510

tegra_plane_writel(plane, window->base[0], DC_WINBUF_START_ADDR);

drivers/gpu/drm/tegra/dc.c

513

tegra_plane_writel(plane, window->base[1], DC_WINBUF_START_ADDR_U);

drivers/gpu/drm/tegra/dc.c

516

tegra_plane_writel(plane, window->base[2], DC_WINBUF_START_ADDR_V);

drivers/gpu/drm/tegra/dc.c

519

tegra_plane_writel(plane, value, DC_WIN_LINE_STRIDE);

drivers/gpu/drm/tegra/dc.c

521

tegra_plane_writel(plane, window->stride[0], DC_WIN_LINE_STRIDE);

drivers/gpu/drm/tegra/dc.c

524

tegra_plane_writel(plane, h_offset, DC_WINBUF_ADDR_H_OFFSET);

drivers/gpu/drm/tegra/dc.c

525

tegra_plane_writel(plane, v_offset, DC_WINBUF_ADDR_V_OFFSET);

drivers/gpu/drm/tegra/dc.c

545

tegra_plane_writel(plane, value, DC_WINBUF_SURFACE_KIND);

drivers/gpu/drm/tegra/dc.c

566

tegra_plane_writel(plane, value, DC_WIN_BUFFER_ADDR_MODE);

drivers/gpu/drm/tegra/dc.c

573

tegra_plane_writel(plane, 0x00f0, DC_WIN_CSC_YOF);

drivers/gpu/drm/tegra/dc.c

574

tegra_plane_writel(plane, 0x012a, DC_WIN_CSC_KYRGB);

drivers/gpu/drm/tegra/dc.c

575

tegra_plane_writel(plane, 0x0000, DC_WIN_CSC_KUR);

drivers/gpu/drm/tegra/dc.c

576

tegra_plane_writel(plane, 0x0198, DC_WIN_CSC_KVR);

drivers/gpu/drm/tegra/dc.c

577

tegra_plane_writel(plane, 0x039b, DC_WIN_CSC_KUG);

drivers/gpu/drm/tegra/dc.c

578

tegra_plane_writel(plane, 0x032f, DC_WIN_CSC_KVG);

drivers/gpu/drm/tegra/dc.c

579

tegra_plane_writel(plane, 0x0204, DC_WIN_CSC_KUB);

drivers/gpu/drm/tegra/dc.c

580

tegra_plane_writel(plane, 0x0000, DC_WIN_CSC_KVB);

drivers/gpu/drm/tegra/dc.c

593

if (tegra_plane_use_horizontal_filtering(plane, window)) {

drivers/gpu/drm/tegra/dc.c

598

tegra_plane_writel(plane, 0x00008000, DC_WIN_H_FILTER_P(0));

drivers/gpu/drm/tegra/dc.c

599

tegra_plane_writel(plane, 0x3e087ce1, DC_WIN_H_FILTER_P(1));

drivers/gpu/drm/tegra/dc.c

600

tegra_plane_writel(plane, 0x3b117ac1, DC_WIN_H_FILTER_P(2));

drivers/gpu/drm/tegra/dc.c

601

tegra_plane_writel(plane, 0x591b73aa, DC_WIN_H_FILTER_P(3));

drivers/gpu/drm/tegra/dc.c

602

tegra_plane_writel(plane, 0x57256d9a, DC_WIN_H_FILTER_P(4));

drivers/gpu/drm/tegra/dc.c

603

tegra_plane_writel(plane, 0x552f668b, DC_WIN_H_FILTER_P(5));

drivers/gpu/drm/tegra/dc.c

604

tegra_plane_writel(plane, 0x73385e8b, DC_WIN_H_FILTER_P(6));

drivers/gpu/drm/tegra/dc.c

605

tegra_plane_writel(plane, 0x72435583, DC_WIN_H_FILTER_P(7));

drivers/gpu/drm/tegra/dc.c

606

tegra_plane_writel(plane, 0x714c4c8b, DC_WIN_H_FILTER_P(8));

drivers/gpu/drm/tegra/dc.c

607

tegra_plane_writel(plane, 0x70554393, DC_WIN_H_FILTER_P(9));

drivers/gpu/drm/tegra/dc.c

608

tegra_plane_writel(plane, 0x715e389b, DC_WIN_H_FILTER_P(10));

drivers/gpu/drm/tegra/dc.c

609

tegra_plane_writel(plane, 0x71662faa, DC_WIN_H_FILTER_P(11));

drivers/gpu/drm/tegra/dc.c

610

tegra_plane_writel(plane, 0x536d25ba, DC_WIN_H_FILTER_P(12));

drivers/gpu/drm/tegra/dc.c

611

tegra_plane_writel(plane, 0x55731bca, DC_WIN_H_FILTER_P(13));

drivers/gpu/drm/tegra/dc.c

612

tegra_plane_writel(plane, 0x387a11d9, DC_WIN_H_FILTER_P(14));

drivers/gpu/drm/tegra/dc.c

613

tegra_plane_writel(plane, 0x3c7c08f1, DC_WIN_H_FILTER_P(15));

drivers/gpu/drm/tegra/dc.c

618

if (tegra_plane_use_vertical_filtering(plane, window)) {

drivers/gpu/drm/tegra/dc.c

626

tegra_plane_writel(plane, k, DC_WIN_V_FILTER_P(i));

drivers/gpu/drm/tegra/dc.c

631

tegra_plane_writel(plane, value, DC_WIN_WIN_OPTIONS);

drivers/gpu/drm/tegra/dc.c

634

tegra_plane_setup_blending_legacy(plane);

drivers/gpu/drm/tegra/dc.c

636

tegra_plane_setup_blending(plane, window);

drivers/gpu/drm/tegra/dc.c

717

static int tegra_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/tegra/dc.c

721

plane);

drivers/gpu/drm/tegra/dc.c

728

struct tegra_plane *tegra = to_tegra_plane(plane);

drivers/gpu/drm/tegra/dc.c

809

static void tegra_plane_atomic_disable(struct drm_plane *plane,

drivers/gpu/drm/tegra/dc.c

813

plane);

drivers/gpu/drm/tegra/dc.c

814

struct tegra_plane *p = to_tegra_plane(plane);

drivers/gpu/drm/tegra/dc.c

826

static void tegra_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/tegra/dc.c

830

plane);

drivers/gpu/drm/tegra/dc.c

833

struct tegra_plane *p = to_tegra_plane(plane);

drivers/gpu/drm/tegra/dc.c

842

return tegra_plane_atomic_disable(plane, state);

drivers/gpu/drm/tegra/dc.c

908

struct tegra_plane *plane;

drivers/gpu/drm/tegra/dc.c

914

plane = kzalloc_obj(*plane);

drivers/gpu/drm/tegra/dc.c

915

if (!plane)

drivers/gpu/drm/tegra/dc.c

919

plane->offset = 0xa00;

drivers/gpu/drm/tegra/dc.c

920

plane->index = 0;

drivers/gpu/drm/tegra/dc.c

921

plane->dc = dc;

drivers/gpu/drm/tegra/dc.c

927

err = tegra_plane_interconnect_init(plane);

drivers/gpu/drm/tegra/dc.c

929

kfree(plane);

drivers/gpu/drm/tegra/dc.c

933

err = drm_universal_plane_init(drm, &plane->base, possible_crtcs,

drivers/gpu/drm/tegra/dc.c

937

kfree(plane);

drivers/gpu/drm/tegra/dc.c

941

drm_plane_helper_add(&plane->base, &tegra_plane_helper_funcs);

drivers/gpu/drm/tegra/dc.c

942

drm_plane_create_zpos_property(&plane->base, plane->index, 0, 255);

drivers/gpu/drm/tegra/dc.c

944

err = drm_plane_create_rotation_property(&plane->base,

drivers/gpu/drm/tegra/dc.c

954

return &plane->base;

drivers/gpu/drm/tegra/dc.c

965

static int tegra_cursor_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/tegra/dc.c

969

plane);

drivers/gpu/drm/tegra/dc.c

971

struct tegra_plane *tegra = to_tegra_plane(plane);

drivers/gpu/drm/tegra/hub.c

102

static inline u32 tegra_plane_readl(struct tegra_plane *plane,

drivers/gpu/drm/tegra/hub.c

105

return tegra_dc_readl(plane->dc, tegra_plane_offset(plane, offset));

drivers/gpu/drm/tegra/hub.c

108

static inline void tegra_plane_writel(struct tegra_plane *plane, u32 value,

drivers/gpu/drm/tegra/hub.c

111

tegra_dc_writel(plane->dc, value, tegra_plane_offset(plane, offset));

drivers/gpu/drm/tegra/hub.c

195

static void tegra_shared_plane_update(struct tegra_plane *plane)

drivers/gpu/drm/tegra/hub.c

197

struct tegra_dc *dc = plane->dc;

drivers/gpu/drm/tegra/hub.c

201

mask = COMMON_UPDATE | WIN_A_UPDATE << plane->base.index;

drivers/gpu/drm/tegra/hub.c

215

static void tegra_shared_plane_activate(struct tegra_plane *plane)

drivers/gpu/drm/tegra/hub.c

217

struct tegra_dc *dc = plane->dc;

drivers/gpu/drm/tegra/hub.c

221

mask = COMMON_ACTREQ | WIN_A_ACT_REQ << plane->base.index;

drivers/gpu/drm/tegra/hub.c

236

tegra_shared_plane_get_owner(struct tegra_plane *plane, struct tegra_dc *dc)

drivers/gpu/drm/tegra/hub.c

239

tegra_plane_offset(plane, DC_WIN_CORE_WINDOWGROUP_SET_CONTROL);

drivers/gpu/drm/tegra/hub.c

245

struct tegra_plane *plane)

drivers/gpu/drm/tegra/hub.c

249

if (tegra_shared_plane_get_owner(plane, dc) == dc->pipe) {

drivers/gpu/drm/tegra/hub.c

250

if (plane->dc == dc)

drivers/gpu/drm/tegra/hub.c

254

dc->pipe, plane->index);

drivers/gpu/drm/tegra/hub.c

260

static int tegra_shared_plane_set_owner(struct tegra_plane *plane,

drivers/gpu/drm/tegra/hub.c

264

tegra_plane_offset(plane, DC_WIN_CORE_WINDOWGROUP_SET_CONTROL);

drivers/gpu/drm/tegra/hub.c

265

struct tegra_dc *old = plane->dc, *dc = new ? new : old;

drivers/gpu/drm/tegra/hub.c

267

unsigned int owner, index = plane->index;

drivers/gpu/drm/tegra/hub.c

296

plane->dc = new;

drivers/gpu/drm/tegra/hub.c

301

static void tegra_shared_plane_setup_scaler(struct tegra_plane *plane)

drivers/gpu/drm/tegra/hub.c

362

tegra_plane_writel(plane, value,

drivers/gpu/drm/tegra/hub.c

370

struct tegra_plane *plane)

drivers/gpu/drm/tegra/hub.c

375

if (!tegra_dc_owns_shared_plane(dc, plane)) {

drivers/gpu/drm/tegra/hub.c

376

err = tegra_shared_plane_set_owner(plane, dc);

drivers/gpu/drm/tegra/hub.c

381

value = tegra_plane_readl(plane, DC_WIN_CORE_IHUB_LINEBUF_CONFIG);

drivers/gpu/drm/tegra/hub.c

383

tegra_plane_writel(plane, value, DC_WIN_CORE_IHUB_LINEBUF_CONFIG);

drivers/gpu/drm/tegra/hub.c

385

value = tegra_plane_readl(plane, DC_WIN_CORE_IHUB_WGRP_FETCH_METER);

drivers/gpu/drm/tegra/hub.c

387

tegra_plane_writel(plane, value, DC_WIN_CORE_IHUB_WGRP_FETCH_METER);

drivers/gpu/drm/tegra/hub.c

390

value = tegra_plane_readl(plane, DC_WIN_CORE_IHUB_WGRP_LATENCY_CTLA);

drivers/gpu/drm/tegra/hub.c

392

tegra_plane_writel(plane, value, DC_WIN_CORE_IHUB_WGRP_LATENCY_CTLA);

drivers/gpu/drm/tegra/hub.c

394

value = tegra_plane_readl(plane, DC_WIN_CORE_IHUB_WGRP_LATENCY_CTLB);

drivers/gpu/drm/tegra/hub.c

396

tegra_plane_writel(plane, value, DC_WIN_CORE_IHUB_WGRP_LATENCY_CTLB);

drivers/gpu/drm/tegra/hub.c

399

value = tegra_plane_readl(plane, DC_WIN_CORE_PRECOMP_WGRP_PIPE_METER);

drivers/gpu/drm/tegra/hub.c

401

tegra_plane_writel(plane, value, DC_WIN_CORE_PRECOMP_WGRP_PIPE_METER);

drivers/gpu/drm/tegra/hub.c

404

value = tegra_plane_readl(plane, DC_WIN_CORE_IHUB_WGRP_POOL_CONFIG);

drivers/gpu/drm/tegra/hub.c

406

tegra_plane_writel(plane, value, DC_WIN_CORE_IHUB_WGRP_POOL_CONFIG);

drivers/gpu/drm/tegra/hub.c

408

value = tegra_plane_readl(plane, DC_WIN_CORE_IHUB_THREAD_GROUP);

drivers/gpu/drm/tegra/hub.c

410

value |= THREAD_NUM(plane->base.index);

drivers/gpu/drm/tegra/hub.c

412

tegra_plane_writel(plane, value, DC_WIN_CORE_IHUB_THREAD_GROUP);

drivers/gpu/drm/tegra/hub.c

414

tegra_shared_plane_setup_scaler(plane);

drivers/gpu/drm/tegra/hub.c

416

tegra_shared_plane_update(plane);

drivers/gpu/drm/tegra/hub.c

417

tegra_shared_plane_activate(plane);

drivers/gpu/drm/tegra/hub.c

421

struct tegra_plane *plane)

drivers/gpu/drm/tegra/hub.c

423

tegra_shared_plane_set_owner(plane, NULL);

drivers/gpu/drm/tegra/hub.c

426

static int tegra_shared_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/tegra/hub.c

430

plane);

drivers/gpu/drm/tegra/hub.c

432

struct tegra_shared_plane *tegra = to_tegra_shared_plane(plane);

drivers/gpu/drm/tegra/hub.c

484

static void tegra_shared_plane_atomic_disable(struct drm_plane *plane,

drivers/gpu/drm/tegra/hub.c

488

plane);

drivers/gpu/drm/tegra/hub.c

489

struct tegra_plane *p = to_tegra_plane(plane);

drivers/gpu/drm/tegra/hub.c

534

static void tegra_shared_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/tegra/hub.c

538

plane);

drivers/gpu/drm/tegra/hub.c

543

struct tegra_plane *p = to_tegra_plane(plane);

drivers/gpu/drm/tegra/hub.c

555

tegra_shared_plane_atomic_disable(plane, state);

drivers/gpu/drm/tegra/hub.c

764

struct tegra_shared_plane *plane;

drivers/gpu/drm/tegra/hub.c

772

plane = kzalloc_obj(*plane);

drivers/gpu/drm/tegra/hub.c

773

if (!plane)

drivers/gpu/drm/tegra/hub.c

776

plane->base.offset = 0x0a00 + 0x0300 * index;

drivers/gpu/drm/tegra/hub.c

777

plane->base.index = index;

drivers/gpu/drm/tegra/hub.c

779

plane->wgrp = &hub->wgrps[wgrp];

drivers/gpu/drm/tegra/hub.c

780

plane->wgrp->parent = &dc->client;

drivers/gpu/drm/tegra/hub.c

782

p = &plane->base.base;

drivers/gpu/drm/tegra/hub.c

79

static inline unsigned int tegra_plane_offset(struct tegra_plane *plane,

drivers/gpu/drm/tegra/hub.c

795

kfree(plane);

drivers/gpu/drm/tegra/hub.c

84

return plane->offset + offset;

drivers/gpu/drm/tegra/hub.c

89

return plane->offset + offset;

drivers/gpu/drm/tegra/hub.c

94

return plane->offset + offset;

drivers/gpu/drm/tegra/hub.c

97

dev_WARN(plane->dc->dev, "invalid offset: %x\n", offset);

drivers/gpu/drm/tegra/hub.c

99

return plane->offset + offset;

drivers/gpu/drm/tegra/hub.h

30

to_tegra_shared_plane(struct drm_plane *plane)

drivers/gpu/drm/tegra/hub.h

32

return container_of(plane, struct tegra_shared_plane, base.base);

drivers/gpu/drm/tegra/plane.c

107

static bool tegra_plane_format_mod_supported(struct drm_plane *plane,

drivers/gpu/drm/tegra/plane.c

119

if (!tegra_plane_supports_sector_layout(plane))

drivers/gpu/drm/tegra/plane.c

19

static void tegra_plane_destroy(struct drm_plane *plane)

drivers/gpu/drm/tegra/plane.c

200

int tegra_plane_prepare_fb(struct drm_plane *plane,

drivers/gpu/drm/tegra/plane.c

209

err = drm_gem_plane_helper_prepare_fb(plane, state);

drivers/gpu/drm/tegra/plane.c

21

struct tegra_plane *p = to_tegra_plane(plane);

drivers/gpu/drm/tegra/plane.c

216

void tegra_plane_cleanup_fb(struct drm_plane *plane,

drivers/gpu/drm/tegra/plane.c

23

drm_plane_cleanup(plane);

drivers/gpu/drm/tegra/plane.c

27

static void tegra_plane_reset(struct drm_plane *plane)

drivers/gpu/drm/tegra/plane.c

29

struct tegra_plane *p = to_tegra_plane(plane);

drivers/gpu/drm/tegra/plane.c

297

int tegra_plane_state_add(struct tegra_plane *plane,

drivers/gpu/drm/tegra/plane.c

321

tegra->planes |= WIN_A_ACT_REQ << plane->index;

drivers/gpu/drm/tegra/plane.c

33

if (plane->state)

drivers/gpu/drm/tegra/plane.c

34

__drm_atomic_helper_plane_destroy_state(plane->state);

drivers/gpu/drm/tegra/plane.c

36

kfree(plane->state);

drivers/gpu/drm/tegra/plane.c

37

plane->state = NULL;

drivers/gpu/drm/tegra/plane.c

41

plane->state = &state->base;

drivers/gpu/drm/tegra/plane.c

42

plane->state->plane = plane;

drivers/gpu/drm/tegra/plane.c

43

plane->state->zpos = p->index;

drivers/gpu/drm/tegra/plane.c

44

plane->state->normalized_zpos = p->index;

drivers/gpu/drm/tegra/plane.c

52

tegra_plane_atomic_duplicate_state(struct drm_plane *plane)

drivers/gpu/drm/tegra/plane.c

54

struct tegra_plane_state *state = to_tegra_plane_state(plane->state);

drivers/gpu/drm/tegra/plane.c

62

__drm_atomic_helper_plane_duplicate_state(plane, &copy->base);

drivers/gpu/drm/tegra/plane.c

621

struct drm_plane *plane;

drivers/gpu/drm/tegra/plane.c

631

drm_for_each_plane(plane, tegra->base.dev) {

drivers/gpu/drm/tegra/plane.c

632

struct tegra_plane *p = to_tegra_plane(plane);

drivers/gpu/drm/tegra/plane.c

639

plane);

drivers/gpu/drm/tegra/plane.c

647

static unsigned int tegra_plane_get_overlap_index(struct tegra_plane *plane,

drivers/gpu/drm/tegra/plane.c

652

WARN_ON(plane == other);

drivers/gpu/drm/tegra/plane.c

655

if (i == plane->index)

drivers/gpu/drm/tegra/plane.c

671

struct drm_plane *plane;

drivers/gpu/drm/tegra/plane.c

674

for_each_new_plane_in_state(state->base.state, plane, new, i) {

drivers/gpu/drm/tegra/plane.c

675

struct tegra_plane *p = to_tegra_plane(plane);

drivers/gpu/drm/tegra/plane.c

710

struct drm_plane *plane;

drivers/gpu/drm/tegra/plane.c

726

drm_for_each_plane(plane, tegra->base.dev) {

drivers/gpu/drm/tegra/plane.c

727

struct tegra_plane *p = to_tegra_plane(plane);

drivers/gpu/drm/tegra/plane.c

733

new = drm_atomic_get_new_plane_state(state->base.state, plane);

drivers/gpu/drm/tegra/plane.c

767

int tegra_plane_interconnect_init(struct tegra_plane *plane)

drivers/gpu/drm/tegra/plane.c

769

const char *icc_name = tegra_plane_icc_names[plane->index];

drivers/gpu/drm/tegra/plane.c

770

struct device *dev = plane->dc->dev;

drivers/gpu/drm/tegra/plane.c

771

struct tegra_dc *dc = plane->dc;

drivers/gpu/drm/tegra/plane.c

774

if (WARN_ON(plane->index >= TEGRA_DC_LEGACY_PLANES_NUM) ||

drivers/gpu/drm/tegra/plane.c

775

WARN_ON(!tegra_plane_icc_names[plane->index]))

drivers/gpu/drm/tegra/plane.c

778

plane->icc_mem = devm_of_icc_get(dev, icc_name);

drivers/gpu/drm/tegra/plane.c

779

err = PTR_ERR_OR_ZERO(plane->icc_mem);

drivers/gpu/drm/tegra/plane.c

785

if (plane->index == 1 && dc->soc->has_win_b_vfilter_mem_client) {

drivers/gpu/drm/tegra/plane.c

786

plane->icc_mem_vfilter = devm_of_icc_get(dev, "winb-vfilter");

drivers/gpu/drm/tegra/plane.c

787

err = PTR_ERR_OR_ZERO(plane->icc_mem_vfilter);

drivers/gpu/drm/tegra/plane.c

84

static void tegra_plane_atomic_destroy_state(struct drm_plane *plane,

drivers/gpu/drm/tegra/plane.c

91

static bool tegra_plane_supports_sector_layout(struct drm_plane *plane)

drivers/gpu/drm/tegra/plane.c

95

drm_for_each_crtc(crtc, plane->dev) {

drivers/gpu/drm/tegra/plane.c

96

if (plane->possible_crtcs & drm_crtc_mask(crtc)) {

drivers/gpu/drm/tegra/plane.h

33

static inline struct tegra_plane *to_tegra_plane(struct drm_plane *plane)

drivers/gpu/drm/tegra/plane.h

35

return container_of(plane, struct tegra_plane, base);

drivers/gpu/drm/tegra/plane.h

83

int tegra_plane_prepare_fb(struct drm_plane *plane,

drivers/gpu/drm/tegra/plane.h

85

void tegra_plane_cleanup_fb(struct drm_plane *plane,

drivers/gpu/drm/tegra/plane.h

88

int tegra_plane_state_add(struct tegra_plane *plane,

drivers/gpu/drm/tegra/plane.h

96

int tegra_plane_interconnect_init(struct tegra_plane *plane);

drivers/gpu/drm/tests/drm_atomic_commit_test.c

34

struct drm_plane *plane;

drivers/gpu/drm/tests/drm_atomic_commit_test.c

90

priv->plane = drm_kunit_helper_create_primary_plane(test, drm,

drivers/gpu/drm/tests/drm_atomic_commit_test.c

95

KUNIT_ASSERT_NOT_ERR_OR_NULL(test, priv->plane);

drivers/gpu/drm/tests/drm_atomic_commit_test.c

98

priv->plane, NULL,

drivers/gpu/drm/tests/drm_atomic_test.c

16

struct drm_plane *plane;

drivers/gpu/drm/tests/drm_atomic_test.c

37

struct drm_plane *plane;

drivers/gpu/drm/tests/drm_atomic_test.c

53

plane = drm_kunit_helper_create_primary_plane(test, drm,

drivers/gpu/drm/tests/drm_atomic_test.c

58

if (IS_ERR(plane))

drivers/gpu/drm/tests/drm_atomic_test.c

59

return ERR_CAST(plane);

drivers/gpu/drm/tests/drm_atomic_test.c

60

priv->plane = plane;

drivers/gpu/drm/tests/drm_atomic_test.c

63

plane, NULL,

drivers/gpu/drm/tests/drm_bridge_test.c

139

priv->plane = drm_kunit_helper_create_primary_plane(test, drm,

drivers/gpu/drm/tests/drm_bridge_test.c

144

if (IS_ERR(priv->plane))

drivers/gpu/drm/tests/drm_bridge_test.c

145

return ERR_CAST(priv->plane);

drivers/gpu/drm/tests/drm_bridge_test.c

148

priv->plane, NULL,

drivers/gpu/drm/tests/drm_bridge_test.c

32

struct drm_plane *plane;

drivers/gpu/drm/tests/drm_damage_helper_test.c

19

struct drm_plane plane;

drivers/gpu/drm/tests/drm_damage_helper_test.c

40

mock->old_state.plane = &mock->plane;

drivers/gpu/drm/tests/drm_damage_helper_test.c

41

mock->state.plane = &mock->plane;

drivers/gpu/drm/tests/drm_damage_helper_test.c

46

mock->plane.dev = &mock->device;

drivers/gpu/drm/tests/drm_damage_helper_test.c

48

mock->plane.base.properties = &mock->obj_props;

drivers/gpu/drm/tests/drm_damage_helper_test.c

52

drm_plane_enable_fb_damage_clips(&mock->plane);

drivers/gpu/drm/tests/drm_format_helper_test.c

575

const struct drm_rect *clip, int plane)

drivers/gpu/drm/tests/drm_format_helper_test.c

583

dst_pitch = drm_format_info_min_pitch(dst_fi, plane, drm_rect_width(clip));

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

222

priv->plane = drm_kunit_helper_create_primary_plane(test, drm,

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

227

KUNIT_ASSERT_NOT_ERR_OR_NULL(test, priv->plane);

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

230

priv->plane, NULL,

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

31

struct drm_plane *plane;

drivers/gpu/drm/tests/drm_kunit_helpers.c

181

struct drm_plane *plane;

drivers/gpu/drm/tests/drm_kunit_helpers.c

197

plane = __drmm_universal_plane_alloc(drm,

drivers/gpu/drm/tests/drm_kunit_helpers.c

206

KUNIT_ASSERT_NOT_ERR_OR_NULL(test, plane);

drivers/gpu/drm/tests/drm_kunit_helpers.c

208

drm_plane_helper_add(plane, helper_funcs);

drivers/gpu/drm/tests/drm_kunit_helpers.c

210

return plane;

drivers/gpu/drm/tests/drm_plane_helper_test.c

50

struct drm_plane *plane;

drivers/gpu/drm/tests/drm_plane_helper_test.c

54

plane = kunit_kzalloc(test, sizeof(*plane), GFP_KERNEL);

drivers/gpu/drm/tests/drm_plane_helper_test.c

55

KUNIT_ASSERT_NOT_NULL(test, plane);

drivers/gpu/drm/tests/drm_plane_helper_test.c

64

mock->plane = plane;

drivers/gpu/drm/tidss/tidss_crtc.c

137

struct drm_plane *plane;

drivers/gpu/drm/tidss/tidss_crtc.c

141

for_each_new_plane_in_state(ostate, plane, pstate, i) {

drivers/gpu/drm/tidss/tidss_crtc.c

152

struct tidss_plane *tplane = to_tidss_plane(plane);

drivers/gpu/drm/tidss/tidss_irq.c

83

struct drm_plane *plane = tidss->planes[i];

drivers/gpu/drm/tidss/tidss_irq.c

84

struct tidss_plane *tplane = to_tidss_plane(plane);

drivers/gpu/drm/tidss/tidss_irq.c

87

tidss_plane_error_irq(plane, irqstatus);

drivers/gpu/drm/tidss/tidss_irq.h

35

#define DSS_IRQ_PLANE_BIT_N(plane, bit) \

drivers/gpu/drm/tidss/tidss_irq.h

36

(DSS_IRQ_VP_BIT_N(TIDSS_MAX_PORTS, 0) + 1 * (plane) + (bit))

drivers/gpu/drm/tidss/tidss_irq.h

39

#define DSS_IRQ_PLANE_BIT(plane, bit) \

drivers/gpu/drm/tidss/tidss_irq.h

40

BIT(DSS_IRQ_PLANE_BIT_N((plane), (bit)))

drivers/gpu/drm/tidss/tidss_irq.h

47

static inline dispc_irq_t DSS_IRQ_PLANE_MASK(u32 plane)

drivers/gpu/drm/tidss/tidss_irq.h

49

return GENMASK(DSS_IRQ_PLANE_BIT_N((plane), 0),

drivers/gpu/drm/tidss/tidss_irq.h

50

DSS_IRQ_PLANE_BIT_N((plane), 0));

drivers/gpu/drm/tidss/tidss_irq.h

58

#define DSS_IRQ_PLANE_FIFO_UNDERFLOW(plane) DSS_IRQ_PLANE_BIT((plane), 0)

drivers/gpu/drm/tidss/tidss_kms.c

224

tidss->planes[tidss->num_planes++] = &tplane->plane;

drivers/gpu/drm/tidss/tidss_kms.c

227

&tplane->plane);

drivers/gpu/drm/tidss/tidss_kms.c

259

tidss->planes[tidss->num_planes++] = &tplane->plane;

drivers/gpu/drm/tidss/tidss_kms.c

74

struct drm_plane *plane;

drivers/gpu/drm/tidss/tidss_kms.c

93

for_each_oldnew_plane_in_state(state, plane, opstate, npstate, i) {

drivers/gpu/drm/tidss/tidss_plane.c

115

static void tidss_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/tidss/tidss_plane.c

118

struct drm_device *ddev = plane->dev;

drivers/gpu/drm/tidss/tidss_plane.c

120

struct tidss_plane *tplane = to_tidss_plane(plane);

drivers/gpu/drm/tidss/tidss_plane.c

122

plane);

drivers/gpu/drm/tidss/tidss_plane.c

135

static void tidss_plane_atomic_enable(struct drm_plane *plane,

drivers/gpu/drm/tidss/tidss_plane.c

138

struct drm_device *ddev = plane->dev;

drivers/gpu/drm/tidss/tidss_plane.c

140

struct tidss_plane *tplane = to_tidss_plane(plane);

drivers/gpu/drm/tidss/tidss_plane.c

145

static void tidss_plane_atomic_disable(struct drm_plane *plane,

drivers/gpu/drm/tidss/tidss_plane.c

148

struct drm_device *ddev = plane->dev;

drivers/gpu/drm/tidss/tidss_plane.c

150

struct tidss_plane *tplane = to_tidss_plane(plane);

drivers/gpu/drm/tidss/tidss_plane.c

155

static void drm_plane_destroy(struct drm_plane *plane)

drivers/gpu/drm/tidss/tidss_plane.c

157

struct tidss_plane *tplane = to_tidss_plane(plane);

drivers/gpu/drm/tidss/tidss_plane.c

159

drm_plane_cleanup(plane);

drivers/gpu/drm/tidss/tidss_plane.c

21

void tidss_plane_error_irq(struct drm_plane *plane, u64 irqstatus)

drivers/gpu/drm/tidss/tidss_plane.c

215

ret = drm_universal_plane_init(&tidss->ddev, &tplane->plane,

drivers/gpu/drm/tidss/tidss_plane.c

224

drm_plane_helper_add(&tplane->plane, &tidss_primary_plane_helper_funcs);

drivers/gpu/drm/tidss/tidss_plane.c

226

drm_plane_helper_add(&tplane->plane, &tidss_plane_helper_funcs);

drivers/gpu/drm/tidss/tidss_plane.c

228

drm_plane_create_zpos_property(&tplane->plane, tidss->num_planes, 0,

drivers/gpu/drm/tidss/tidss_plane.c

23

struct tidss_plane *tplane = to_tidss_plane(plane);

drivers/gpu/drm/tidss/tidss_plane.c

231

ret = drm_plane_create_color_properties(&tplane->plane,

drivers/gpu/drm/tidss/tidss_plane.c

239

ret = drm_plane_create_alpha_property(&tplane->plane);

drivers/gpu/drm/tidss/tidss_plane.c

243

ret = drm_plane_create_blend_mode_property(&tplane->plane, blend_modes);

drivers/gpu/drm/tidss/tidss_plane.c

25

dev_err_ratelimited(plane->dev->dev, "Plane%u underflow (irq %llx)\n",

drivers/gpu/drm/tidss/tidss_plane.c

31

static int tidss_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/tidss/tidss_plane.c

35

plane);

drivers/gpu/drm/tidss/tidss_plane.c

36

struct drm_device *ddev = plane->dev;

drivers/gpu/drm/tidss/tidss_plane.c

38

struct tidss_plane *tplane = to_tidss_plane(plane);

drivers/gpu/drm/tidss/tidss_plane.h

12

#define to_tidss_plane(p) container_of((p), struct tidss_plane, plane)

drivers/gpu/drm/tidss/tidss_plane.h

17

struct drm_plane plane;

drivers/gpu/drm/tidss/tidss_plane.h

27

void tidss_plane_error_irq(struct drm_plane *plane, u64 irqstatus);

drivers/gpu/drm/tilcdc/tilcdc_plane.c

103

struct tilcdc_plane *plane;

drivers/gpu/drm/tilcdc/tilcdc_plane.c

105

plane = drmm_universal_plane_alloc(dev, struct tilcdc_plane, base,

drivers/gpu/drm/tilcdc/tilcdc_plane.c

110

if (IS_ERR(plane))

drivers/gpu/drm/tilcdc/tilcdc_plane.c

111

return plane;

drivers/gpu/drm/tilcdc/tilcdc_plane.c

113

drm_plane_helper_add(&plane->base, &plane_helper_funcs);

drivers/gpu/drm/tilcdc/tilcdc_plane.c

115

return plane;

drivers/gpu/drm/tilcdc/tilcdc_plane.c

22

static int tilcdc_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/tilcdc/tilcdc_plane.c

26

plane);

drivers/gpu/drm/tilcdc/tilcdc_plane.c

29

plane);

drivers/gpu/drm/tilcdc/tilcdc_plane.c

39

drm_err(plane->dev, "%s: crtc position must be zero.",

drivers/gpu/drm/tilcdc/tilcdc_plane.c

51

drm_err(plane->dev,

drivers/gpu/drm/tilcdc/tilcdc_plane.c

61

drm_err(plane->dev,

drivers/gpu/drm/tilcdc/tilcdc_plane.c

67

drm_dbg(plane->dev,

drivers/gpu/drm/tilcdc/tilcdc_plane.c

76

static void tilcdc_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/tilcdc/tilcdc_plane.c

80

plane);

drivers/gpu/drm/tiny/appletbdrm.c

318

static int appletbdrm_primary_plane_helper_begin_fb_access(struct drm_plane *plane,

drivers/gpu/drm/tiny/appletbdrm.c

327

drm_atomic_helper_damage_iter_init(&iter, plane->state, new_plane_state);

drivers/gpu/drm/tiny/appletbdrm.c

352

return drm_gem_begin_shadow_fb_access(plane, new_plane_state);

drivers/gpu/drm/tiny/appletbdrm.c

355

static int appletbdrm_primary_plane_helper_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/tiny/appletbdrm.c

358

struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/tiny/appletbdrm.c

476

static void appletbdrm_primary_plane_helper_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/tiny/appletbdrm.c

479

struct appletbdrm_device *adev = drm_to_adev(plane->dev);

drivers/gpu/drm/tiny/appletbdrm.c

480

struct drm_device *drm = plane->dev;

drivers/gpu/drm/tiny/appletbdrm.c

481

struct drm_plane_state *plane_state = plane->state;

drivers/gpu/drm/tiny/appletbdrm.c

482

struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(old_state, plane);

drivers/gpu/drm/tiny/appletbdrm.c

493

static void appletbdrm_primary_plane_helper_atomic_disable(struct drm_plane *plane,

drivers/gpu/drm/tiny/appletbdrm.c

496

struct drm_device *dev = plane->dev;

drivers/gpu/drm/tiny/appletbdrm.c

508

static void appletbdrm_primary_plane_reset(struct drm_plane *plane)

drivers/gpu/drm/tiny/appletbdrm.c

512

WARN_ON(plane->state);

drivers/gpu/drm/tiny/appletbdrm.c

518

__drm_gem_reset_shadow_plane(plane, &appletbdrm_state->base);

drivers/gpu/drm/tiny/appletbdrm.c

521

static struct drm_plane_state *appletbdrm_primary_plane_duplicate_state(struct drm_plane *plane)

drivers/gpu/drm/tiny/appletbdrm.c

526

if (WARN_ON(!plane->state))

drivers/gpu/drm/tiny/appletbdrm.c

542

__drm_gem_duplicate_shadow_plane_state(plane, new_shadow_plane_state);

drivers/gpu/drm/tiny/appletbdrm.c

547

static void appletbdrm_primary_plane_destroy_state(struct drm_plane *plane,

drivers/gpu/drm/tiny/arcpgu.c

120

const struct drm_framebuffer *fb = arcpgu->pipe.plane.state->fb;

drivers/gpu/drm/tiny/arcpgu.c

227

if (!pipe->plane.state->fb)

drivers/gpu/drm/tiny/arcpgu.c

231

gem = drm_fb_dma_get_gem_obj(pipe->plane.state->fb, 0);

drivers/gpu/drm/tiny/bochs.c

421

static int bochs_primary_plane_helper_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/tiny/bochs.c

424

struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/tiny/bochs.c

444

static void bochs_primary_plane_helper_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/tiny/bochs.c

447

struct drm_device *dev = plane->dev;

drivers/gpu/drm/tiny/bochs.c

449

struct drm_plane_state *plane_state = plane->state;

drivers/gpu/drm/tiny/bochs.c

450

struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane);

drivers/gpu/drm/tiny/bochs.c

476

static int bochs_primary_plane_helper_get_scanout_buffer(struct drm_plane *plane,

drivers/gpu/drm/tiny/bochs.c

479

struct bochs_device *bochs = to_bochs_device(plane->dev);

drivers/gpu/drm/tiny/bochs.c

482

if (plane->state && plane->state->fb) {

drivers/gpu/drm/tiny/bochs.c

483

sb->format = plane->state->fb->format;

drivers/gpu/drm/tiny/bochs.c

484

sb->width = plane->state->fb->width;

drivers/gpu/drm/tiny/bochs.c

485

sb->height = plane->state->fb->height;

drivers/gpu/drm/tiny/bochs.c

486

sb->pitch[0] = plane->state->fb->pitches[0];

drivers/gpu/drm/tiny/cirrus-qemu.c

298

static int cirrus_primary_plane_helper_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/tiny/cirrus-qemu.c

301

struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/tiny/cirrus-qemu.c

328

static void cirrus_primary_plane_helper_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/tiny/cirrus-qemu.c

331

struct cirrus_device *cirrus = to_cirrus(plane->dev);

drivers/gpu/drm/tiny/cirrus-qemu.c

332

struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/tiny/cirrus-qemu.c

335

struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane);

drivers/gpu/drm/tiny/gm12u320.c

581

struct drm_plane_state *state = pipe->plane.state;

drivers/gpu/drm/tiny/hx8357d.c

286

struct drm_plane *plane;

drivers/gpu/drm/tiny/hx8357d.c

330

plane = &hx8357d->plane;

drivers/gpu/drm/tiny/hx8357d.c

331

ret = drm_universal_plane_init(drm, plane, 0, &hx8357d_plane_funcs,

drivers/gpu/drm/tiny/hx8357d.c

337

drm_plane_helper_add(plane, &hx8357d_plane_helper_funcs);

drivers/gpu/drm/tiny/hx8357d.c

338

drm_plane_enable_fb_damage_clips(plane);

drivers/gpu/drm/tiny/hx8357d.c

341

ret = drm_crtc_init_with_planes(drm, crtc, plane, NULL, &hx8357d_crtc_funcs, NULL);

drivers/gpu/drm/tiny/hx8357d.c

52

struct drm_plane plane;

drivers/gpu/drm/tiny/ili9163.c

206

struct drm_plane *plane;

drivers/gpu/drm/tiny/ili9163.c

261

plane = &ili9163->plane;

drivers/gpu/drm/tiny/ili9163.c

262

ret = drm_universal_plane_init(drm, plane, 0, &ili9163_plane_funcs,

drivers/gpu/drm/tiny/ili9163.c

268

drm_plane_helper_add(plane, &ili9163_plane_helper_funcs);

drivers/gpu/drm/tiny/ili9163.c

269

drm_plane_enable_fb_damage_clips(plane);

drivers/gpu/drm/tiny/ili9163.c

272

ret = drm_crtc_init_with_planes(drm, crtc, plane, NULL, &ili9163_crtc_funcs, NULL);

drivers/gpu/drm/tiny/ili9163.c

41

struct drm_plane plane;

drivers/gpu/drm/tiny/ili9225.c

181

static void ili9225_plane_helper_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/tiny/ili9225.c

184

struct drm_device *drm = plane->dev;

drivers/gpu/drm/tiny/ili9225.c

185

struct drm_plane_state *plane_state = plane->state;

drivers/gpu/drm/tiny/ili9225.c

188

struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane);

drivers/gpu/drm/tiny/ili9225.c

440

struct drm_plane *plane;

drivers/gpu/drm/tiny/ili9225.c

488

plane = &ili9225->plane;

drivers/gpu/drm/tiny/ili9225.c

489

ret = drm_universal_plane_init(drm, plane, 0, &ili9225_plane_funcs,

drivers/gpu/drm/tiny/ili9225.c

495

drm_plane_helper_add(plane, &ili9225_plane_helper_funcs);

drivers/gpu/drm/tiny/ili9225.c

496

drm_plane_enable_fb_damage_clips(plane);

drivers/gpu/drm/tiny/ili9225.c

499

ret = drm_crtc_init_with_planes(drm, crtc, plane, NULL, &ili9225_crtc_funcs, NULL);

drivers/gpu/drm/tiny/ili9225.c

77

struct drm_plane plane;

drivers/gpu/drm/tiny/ili9341.c

243

struct drm_plane *plane;

drivers/gpu/drm/tiny/ili9341.c

292

plane = &ili9341->plane;

drivers/gpu/drm/tiny/ili9341.c

293

ret = drm_universal_plane_init(drm, plane, 0, &ili9341_plane_funcs,

drivers/gpu/drm/tiny/ili9341.c

299

drm_plane_helper_add(plane, &ili9341_plane_helper_funcs);

drivers/gpu/drm/tiny/ili9341.c

300

drm_plane_enable_fb_damage_clips(plane);

drivers/gpu/drm/tiny/ili9341.c

303

ret = drm_crtc_init_with_planes(drm, crtc, plane, NULL, &ili9341_crtc_funcs, NULL);

drivers/gpu/drm/tiny/ili9341.c

58

struct drm_plane plane;

drivers/gpu/drm/tiny/ili9486.c

268

struct drm_plane *plane;

drivers/gpu/drm/tiny/ili9486.c

320

plane = &ili9486->plane;

drivers/gpu/drm/tiny/ili9486.c

321

ret = drm_universal_plane_init(drm, plane, 0, &ili9486_plane_funcs,

drivers/gpu/drm/tiny/ili9486.c

327

drm_plane_helper_add(plane, &ili9486_plane_helper_funcs);

drivers/gpu/drm/tiny/ili9486.c

328

drm_plane_enable_fb_damage_clips(plane);

drivers/gpu/drm/tiny/ili9486.c

331

ret = drm_crtc_init_with_planes(drm, crtc, plane, NULL, &ili9486_crtc_funcs, NULL);

drivers/gpu/drm/tiny/ili9486.c

42

struct drm_plane plane;

drivers/gpu/drm/tiny/mi0283qt.c

247

struct drm_plane *plane;

drivers/gpu/drm/tiny/mi0283qt.c

300

plane = &mi0283qt->plane;

drivers/gpu/drm/tiny/mi0283qt.c

301

ret = drm_universal_plane_init(drm, plane, 0, &mi0283qt_plane_funcs,

drivers/gpu/drm/tiny/mi0283qt.c

307

drm_plane_helper_add(plane, &mi0283qt_plane_helper_funcs);

drivers/gpu/drm/tiny/mi0283qt.c

308

drm_plane_enable_fb_damage_clips(plane);

drivers/gpu/drm/tiny/mi0283qt.c

311

ret = drm_crtc_init_with_planes(drm, crtc, plane, NULL, &mi0283qt_crtc_funcs, NULL);

drivers/gpu/drm/tiny/mi0283qt.c

56

struct drm_plane plane;

drivers/gpu/drm/tiny/panel-mipi-dbi.c

239

struct drm_plane plane;

drivers/gpu/drm/tiny/panel-mipi-dbi.c

384

struct drm_plane *plane;

drivers/gpu/drm/tiny/panel-mipi-dbi.c

458

plane = &panel_mipi_dbi->plane;

drivers/gpu/drm/tiny/panel-mipi-dbi.c

459

ret = drm_universal_plane_init(drm, plane, 0, &panel_mipi_dbi_plane_funcs,

drivers/gpu/drm/tiny/panel-mipi-dbi.c

465

drm_plane_helper_add(plane, &panel_mipi_dbi_plane_helper_funcs);

drivers/gpu/drm/tiny/panel-mipi-dbi.c

466

drm_plane_enable_fb_damage_clips(plane);

drivers/gpu/drm/tiny/panel-mipi-dbi.c

469

ret = drm_crtc_init_with_planes(drm, crtc, plane, NULL, &panel_mipi_dbi_crtc_funcs,

drivers/gpu/drm/tiny/pixpaper.c

1091

ret = drm_universal_plane_init(drm, &panel->plane, 1,

drivers/gpu/drm/tiny/pixpaper.c

1097

drm_plane_helper_add(&panel->plane, &pixpaper_plane_helper_funcs);

drivers/gpu/drm/tiny/pixpaper.c

1099

ret = drm_crtc_init_with_planes(drm, &panel->crtc, &panel->plane, NULL,

drivers/gpu/drm/tiny/pixpaper.c

497

struct drm_plane plane;

drivers/gpu/drm/tiny/pixpaper.c

776

static int pixpaper_plane_helper_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/tiny/pixpaper.c

780

drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/tiny/pixpaper.c

860

static void pixpaper_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/tiny/pixpaper.c

864

drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/tiny/repaper.c

833

struct drm_plane_state *state = pipe->plane.state;

drivers/gpu/drm/tiny/sharp-memory.c

224

static int sharp_memory_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/tiny/sharp-memory.c

227

struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/tiny/sharp-memory.c

231

smd = container_of(plane, struct sharp_memory_device, plane);

drivers/gpu/drm/tiny/sharp-memory.c

240

static void sharp_memory_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/tiny/sharp-memory.c

243

struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state, plane);

drivers/gpu/drm/tiny/sharp-memory.c

244

struct drm_plane_state *plane_state = plane->state;

drivers/gpu/drm/tiny/sharp-memory.c

249

smd = container_of(plane, struct sharp_memory_device, plane);

drivers/gpu/drm/tiny/sharp-memory.c

265

static bool sharp_memory_format_mod_supported(struct drm_plane *plane,

drivers/gpu/drm/tiny/sharp-memory.c

463

struct drm_plane *plane = &smd->plane;

drivers/gpu/drm/tiny/sharp-memory.c

467

drm_plane_helper_add(plane, &sharp_memory_plane_helper_funcs);

drivers/gpu/drm/tiny/sharp-memory.c

468

ret = drm_universal_plane_init(dev, plane, 0,

drivers/gpu/drm/tiny/sharp-memory.c

477

ret = drm_crtc_init_with_planes(dev, crtc, plane, NULL,

drivers/gpu/drm/tiny/sharp-memory.c

622

drm_plane_enable_fb_damage_clips(&smd->plane);

drivers/gpu/drm/tiny/sharp-memory.c

63

struct drm_plane plane;

drivers/gpu/drm/tve200/tve200_display.c

127

struct drm_plane *plane = &pipe->plane;

drivers/gpu/drm/tve200/tve200_display.c

131

struct drm_framebuffer *fb = plane->state->fb;

drivers/gpu/drm/tve200/tve200_display.c

265

struct drm_plane *plane = &pipe->plane;

drivers/gpu/drm/tve200/tve200_display.c

266

struct drm_plane_state *pstate = plane->state;

drivers/gpu/drm/tve200/tve200_display.c

77

struct drm_framebuffer *old_fb = pipe->plane.state->fb;

drivers/gpu/drm/udl/udl_modeset.c

266

static int udl_primary_plane_helper_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/udl/udl_modeset.c

269

struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/udl/udl_modeset.c

282

static void udl_primary_plane_helper_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/udl/udl_modeset.c

285

struct drm_device *dev = plane->dev;

drivers/gpu/drm/udl/udl_modeset.c

286

struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/udl/udl_modeset.c

289

struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane);

drivers/gpu/drm/vboxvideo/vbox_mode.c

258

static int vbox_primary_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/vboxvideo/vbox_mode.c

262

plane);

drivers/gpu/drm/vboxvideo/vbox_mode.c

278

static void vbox_primary_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/vboxvideo/vbox_mode.c

282

plane);

drivers/gpu/drm/vboxvideo/vbox_mode.c

324

static void vbox_primary_atomic_disable(struct drm_plane *plane,

drivers/gpu/drm/vboxvideo/vbox_mode.c

328

plane);

drivers/gpu/drm/vboxvideo/vbox_mode.c

337

static int vbox_cursor_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/vboxvideo/vbox_mode.c

341

plane);

drivers/gpu/drm/vboxvideo/vbox_mode.c

389

static void vbox_cursor_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/vboxvideo/vbox_mode.c

393

plane);

drivers/gpu/drm/vboxvideo/vbox_mode.c

395

plane);

drivers/gpu/drm/vboxvideo/vbox_mode.c

397

container_of(plane->dev, struct vbox_private, ddev);

drivers/gpu/drm/vboxvideo/vbox_mode.c

440

static void vbox_cursor_atomic_disable(struct drm_plane *plane,

drivers/gpu/drm/vboxvideo/vbox_mode.c

444

plane);

drivers/gpu/drm/vboxvideo/vbox_mode.c

446

container_of(plane->dev, struct vbox_private, ddev);

drivers/gpu/drm/vboxvideo/vbox_mode.c

512

struct drm_plane *plane;

drivers/gpu/drm/vboxvideo/vbox_mode.c

531

plane = kzalloc_obj(*plane);

drivers/gpu/drm/vboxvideo/vbox_mode.c

532

if (!plane)

drivers/gpu/drm/vboxvideo/vbox_mode.c

535

err = drm_universal_plane_init(&vbox->ddev, plane, possible_crtcs,

drivers/gpu/drm/vboxvideo/vbox_mode.c

541

drm_plane_helper_add(plane, helper_funcs);

drivers/gpu/drm/vboxvideo/vbox_mode.c

543

return plane;

drivers/gpu/drm/vboxvideo/vbox_mode.c

546

kfree(plane);

drivers/gpu/drm/vc4/tests/vc4_mock.c

112

struct drm_plane *plane;

drivers/gpu/drm/vc4/tests/vc4_mock.c

117

plane = vc4_dummy_plane(test, drm, DRM_PLANE_TYPE_PRIMARY);

drivers/gpu/drm/vc4/tests/vc4_mock.c

118

KUNIT_ASSERT_NOT_ERR_OR_NULL(test, plane);

drivers/gpu/drm/vc4/tests/vc4_mock.c

120

dummy_crtc = vc4_mock_pv(test, drm, plane, pipe->data);

drivers/gpu/drm/vc4/tests/vc4_mock.h

33

struct drm_plane *plane,

drivers/gpu/drm/vc4/tests/vc4_mock_crtc.c

22

struct drm_plane *plane,

drivers/gpu/drm/vc4/tests/vc4_mock_crtc.c

34

vc4_crtc, data, plane,

drivers/gpu/drm/vc4/tests/vc4_mock_plane.c

13

struct drm_plane *plane;

drivers/gpu/drm/vc4/tests/vc4_mock_plane.c

17

plane = drm_kunit_helper_create_primary_plane(test, drm,

drivers/gpu/drm/vc4/tests/vc4_mock_plane.c

22

KUNIT_ASSERT_NOT_ERR_OR_NULL(test, plane);

drivers/gpu/drm/vc4/tests/vc4_mock_plane.c

24

return plane;

drivers/gpu/drm/vc4/vc4_crtc.c

1017

flip_state->old_fb = plane->state->fb;

drivers/gpu/drm/vc4/vc4_crtc.c

1027

drm_atomic_set_fb_for_plane(plane->state, fb);

drivers/gpu/drm/vc4/vc4_crtc.c

898

struct drm_plane *plane = crtc->primary;

drivers/gpu/drm/vc4/vc4_crtc.c

900

vc4_plane_async_set_fb(plane, flip_state->fb);

drivers/gpu/drm/vc4/vc4_crtc.c

997

struct drm_plane *plane = crtc->primary;

drivers/gpu/drm/vc4/vc4_drv.h

1046

u32 vc4_plane_write_dlist(struct drm_plane *plane, u32 __iomem *dlist);

drivers/gpu/drm/vc4/vc4_drv.h

1048

void vc4_plane_async_set_fb(struct drm_plane *plane,

drivers/gpu/drm/vc4/vc4_hvs.c

796

struct drm_plane *plane;

drivers/gpu/drm/vc4/vc4_hvs.c

808

drm_atomic_crtc_state_for_each_plane_state(plane, plane_state, crtc_state) {

drivers/gpu/drm/vc4/vc4_hvs.c

813

plane->base.id, plane->name,

drivers/gpu/drm/vc4/vc4_hvs.c

937

struct drm_plane *plane;

drivers/gpu/drm/vc4/vc4_hvs.c

966

drm_atomic_crtc_for_each_plane(plane, crtc) {

drivers/gpu/drm/vc4/vc4_hvs.c

967

if (plane->state->normalized_zpos != zpos)

drivers/gpu/drm/vc4/vc4_hvs.c

980

vc4_plane_state = to_vc4_plane_state(plane->state);

drivers/gpu/drm/vc4/vc4_hvs.c

984

dlist_next += vc4_plane_write_dlist(plane, dlist_next);

drivers/gpu/drm/vc4/vc4_kms.c

662

struct drm_plane *plane;

drivers/gpu/drm/vc4/vc4_kms.c

671

for_each_oldnew_plane_in_state(state, plane, old_plane_state,

drivers/gpu/drm/vc4/vc4_plane.c

1058

struct drm_device *drm = state->plane->dev;

drivers/gpu/drm/vc4/vc4_plane.c

1204

static int vc4_plane_mode_set(struct drm_plane *plane,

drivers/gpu/drm/vc4/vc4_plane.c

1207

struct vc4_dev *vc4 = to_vc4_dev(plane->dev);

drivers/gpu/drm/vc4/vc4_plane.c

1700

struct vc4_dev *vc4 = to_vc4_dev(state->plane->dev);

drivers/gpu/drm/vc4/vc4_plane.c

1734

static int vc6_plane_mode_set(struct drm_plane *plane,

drivers/gpu/drm/vc4/vc4_plane.c

1737

struct drm_device *drm = plane->dev;

drivers/gpu/drm/vc4/vc4_plane.c

2113

plane->base.id, plane->name, vc4_state->dlist_count);

drivers/gpu/drm/vc4/vc4_plane.c

2125

static int vc4_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/vc4/vc4_plane.c

2128

struct vc4_dev *vc4 = to_vc4_dev(plane->dev);

drivers/gpu/drm/vc4/vc4_plane.c

2130

plane);

drivers/gpu/drm/vc4/vc4_plane.c

2138

drm_atomic_get_old_plane_state(state, plane);

drivers/gpu/drm/vc4/vc4_plane.c

2148

ret = vc6_plane_mode_set(plane, new_plane_state);

drivers/gpu/drm/vc4/vc4_plane.c

2150

ret = vc4_plane_mode_set(plane, new_plane_state);

drivers/gpu/drm/vc4/vc4_plane.c

2171

static void vc4_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/vc4/vc4_plane.c

2181

u32 vc4_plane_write_dlist(struct drm_plane *plane, u32 __iomem *dlist)

drivers/gpu/drm/vc4/vc4_plane.c

2183

struct vc4_plane_state *vc4_state = to_vc4_plane_state(plane->state);

drivers/gpu/drm/vc4/vc4_plane.c

2187

if (!drm_dev_enter(plane->dev, &idx))

drivers/gpu/drm/vc4/vc4_plane.c

2212

void vc4_plane_async_set_fb(struct drm_plane *plane, struct drm_framebuffer *fb)

drivers/gpu/drm/vc4/vc4_plane.c

2214

struct vc4_plane_state *vc4_state = to_vc4_plane_state(plane->state);

drivers/gpu/drm/vc4/vc4_plane.c

2216

struct vc4_dev *vc4 = to_vc4_dev(plane->dev);

drivers/gpu/drm/vc4/vc4_plane.c

2220

if (!drm_dev_enter(plane->dev, &idx))

drivers/gpu/drm/vc4/vc4_plane.c

2226

WARN_ON_ONCE(plane->state->crtc_x < 0 || plane->state->crtc_y < 0);

drivers/gpu/drm/vc4/vc4_plane.c

2263

static void vc4_plane_atomic_async_update(struct drm_plane *plane,

drivers/gpu/drm/vc4/vc4_plane.c

2267

plane);

drivers/gpu/drm/vc4/vc4_plane.c

2271

if (!drm_dev_enter(plane->dev, &idx))

drivers/gpu/drm/vc4/vc4_plane.c

2274

swap(plane->state->fb, new_plane_state->fb);

drivers/gpu/drm/vc4/vc4_plane.c

2275

plane->state->crtc_x = new_plane_state->crtc_x;

drivers/gpu/drm/vc4/vc4_plane.c

2276

plane->state->crtc_y = new_plane_state->crtc_y;

drivers/gpu/drm/vc4/vc4_plane.c

2277

plane->state->crtc_w = new_plane_state->crtc_w;

drivers/gpu/drm/vc4/vc4_plane.c

2278

plane->state->crtc_h = new_plane_state->crtc_h;

drivers/gpu/drm/vc4/vc4_plane.c

2279

plane->state->src_x = new_plane_state->src_x;

drivers/gpu/drm/vc4/vc4_plane.c

2280

plane->state->src_y = new_plane_state->src_y;

drivers/gpu/drm/vc4/vc4_plane.c

2281

plane->state->src_w = new_plane_state->src_w;

drivers/gpu/drm/vc4/vc4_plane.c

2282

plane->state->src_h = new_plane_state->src_h;

drivers/gpu/drm/vc4/vc4_plane.c

2283

plane->state->alpha = new_plane_state->alpha;

drivers/gpu/drm/vc4/vc4_plane.c

2284

plane->state->pixel_blend_mode = new_plane_state->pixel_blend_mode;

drivers/gpu/drm/vc4/vc4_plane.c

2285

plane->state->rotation = new_plane_state->rotation;

drivers/gpu/drm/vc4/vc4_plane.c

2286

plane->state->zpos = new_plane_state->zpos;

drivers/gpu/drm/vc4/vc4_plane.c

2287

plane->state->normalized_zpos = new_plane_state->normalized_zpos;

drivers/gpu/drm/vc4/vc4_plane.c

2288

plane->state->color_encoding = new_plane_state->color_encoding;

drivers/gpu/drm/vc4/vc4_plane.c

2289

plane->state->color_range = new_plane_state->color_range;

drivers/gpu/drm/vc4/vc4_plane.c

2290

plane->state->src = new_plane_state->src;

drivers/gpu/drm/vc4/vc4_plane.c

2291

plane->state->dst = new_plane_state->dst;

drivers/gpu/drm/vc4/vc4_plane.c

2292

plane->state->visible = new_plane_state->visible;

drivers/gpu/drm/vc4/vc4_plane.c

2295

vc4_state = to_vc4_plane_state(plane->state);

drivers/gpu/drm/vc4/vc4_plane.c

2337

static int vc4_plane_atomic_async_check(struct drm_plane *plane,

drivers/gpu/drm/vc4/vc4_plane.c

2340

struct vc4_dev *vc4 = to_vc4_dev(plane->dev);

drivers/gpu/drm/vc4/vc4_plane.c

2342

plane);

drivers/gpu/drm/vc4/vc4_plane.c

2348

ret = vc4_plane_mode_set(plane, new_plane_state);

drivers/gpu/drm/vc4/vc4_plane.c

2350

ret = vc6_plane_mode_set(plane, new_plane_state);

drivers/gpu/drm/vc4/vc4_plane.c

2354

old_vc4_state = to_vc4_plane_state(plane->state);

drivers/gpu/drm/vc4/vc4_plane.c

2364

vc4_lbm_size(plane->state) != vc4_lbm_size(new_plane_state))

drivers/gpu/drm/vc4/vc4_plane.c

2385

static int vc4_prepare_fb(struct drm_plane *plane,

drivers/gpu/drm/vc4/vc4_plane.c

2396

ret = drm_gem_plane_helper_prepare_fb(plane, state);

drivers/gpu/drm/vc4/vc4_plane.c

2403

static void vc4_cleanup_fb(struct drm_plane *plane,

drivers/gpu/drm/vc4/vc4_plane.c

2431

static bool vc4_format_mod_supported(struct drm_plane *plane,

drivers/gpu/drm/vc4/vc4_plane.c

2509

struct drm_plane *plane;

drivers/gpu/drm/vc4/vc4_plane.c

2537

plane = &vc4_plane->base;

drivers/gpu/drm/vc4/vc4_plane.c

2540

drm_plane_helper_add(plane, &vc5_plane_helper_funcs);

drivers/gpu/drm/vc4/vc4_plane.c

2542

drm_plane_helper_add(plane, &vc4_plane_helper_funcs);

drivers/gpu/drm/vc4/vc4_plane.c

2544

drm_plane_create_alpha_property(plane);

drivers/gpu/drm/vc4/vc4_plane.c

2545

drm_plane_create_blend_mode_property(plane,

drivers/gpu/drm/vc4/vc4_plane.c

2549

drm_plane_create_rotation_property(plane, DRM_MODE_ROTATE_0,

drivers/gpu/drm/vc4/vc4_plane.c

2555

drm_plane_create_color_properties(plane,

drivers/gpu/drm/vc4/vc4_plane.c

2565

drm_plane_create_zpos_immutable_property(plane, 0);

drivers/gpu/drm/vc4/vc4_plane.c

2567

return plane;

drivers/gpu/drm/vc4/vc4_plane.c

2588

struct drm_plane *plane =

drivers/gpu/drm/vc4/vc4_plane.c

2592

if (IS_ERR(plane))

drivers/gpu/drm/vc4/vc4_plane.c

2598

drm_plane_create_zpos_property(plane, i + 1, 1,

drivers/gpu/drm/vc4/vc4_plane.c

278

static struct drm_plane_state *vc4_plane_duplicate_state(struct drm_plane *plane)

drivers/gpu/drm/vc4/vc4_plane.c

280

struct vc4_dev *vc4 = to_vc4_dev(plane->dev);

drivers/gpu/drm/vc4/vc4_plane.c

285

if (WARN_ON(!plane->state))

drivers/gpu/drm/vc4/vc4_plane.c

288

vc4_state = kmemdup(plane->state, sizeof(*vc4_state), GFP_KERNEL);

drivers/gpu/drm/vc4/vc4_plane.c

301

__drm_atomic_helper_plane_duplicate_state(plane, &vc4_state->base);

drivers/gpu/drm/vc4/vc4_plane.c

332

static void vc4_plane_destroy_state(struct drm_plane *plane,

drivers/gpu/drm/vc4/vc4_plane.c

335

struct vc4_dev *vc4 = to_vc4_dev(plane->dev);

drivers/gpu/drm/vc4/vc4_plane.c

366

static void vc4_plane_reset(struct drm_plane *plane)

drivers/gpu/drm/vc4/vc4_plane.c

370

if (plane->state)

drivers/gpu/drm/vc4/vc4_plane.c

371

__drm_atomic_helper_plane_destroy_state(plane->state);

drivers/gpu/drm/vc4/vc4_plane.c

373

kfree(plane->state);

drivers/gpu/drm/vc4/vc4_plane.c

379

__drm_atomic_helper_plane_reset(plane, &vc4_state->base);

drivers/gpu/drm/vc4/vc4_plane.c

413

static u32 vc4_get_scl_field(struct drm_plane_state *state, int plane)

drivers/gpu/drm/vc4/vc4_plane.c

417

switch (vc4_state->x_scaling[plane] << 2 | vc4_state->y_scaling[plane]) {

drivers/gpu/drm/vc4/vc4_plane.c

570

struct vc4_dev *vc4 = to_vc4_dev(vc4_state->base.plane->dev);

drivers/gpu/drm/vc4/vc4_plane.c

600

struct vc4_dev *vc4 = to_vc4_dev(vc4_state->base.plane->dev);

drivers/gpu/drm/vc4/vc4_plane.c

662

struct vc4_dev *vc4 = to_vc4_dev(state->plane->dev);

drivers/gpu/drm/vc4/vc4_plane.c

801

struct vc4_dev *vc4 = to_vc4_dev(state->plane->dev);

drivers/gpu/drm/vc4/vc4_plane.c

815

unsigned int plane)

drivers/gpu/drm/vc4/vc4_plane.c

818

unsigned int stride = state->fb->pitches[plane];

drivers/gpu/drm/vc4/vc4_plane.c

835

struct vc4_dev *vc4 = to_vc4_dev(state->plane->dev);

drivers/gpu/drm/vc4/vc4_plane.c

924

struct drm_device *drm = state->plane->dev;

drivers/gpu/drm/vc4/vc4_plane.c

926

struct drm_plane *plane = state->plane;

drivers/gpu/drm/vc4/vc4_plane.c

945

plane->base.id, plane->name, lbm_size);

drivers/gpu/drm/vc4/vc4_plane.c

979

struct drm_device *drm = state->plane->dev;

drivers/gpu/drm/verisilicon/vs_cursor_plane.c

100

static void vs_cursor_plane_atomic_enable(struct drm_plane *plane,

drivers/gpu/drm/verisilicon/vs_cursor_plane.c

104

plane);

drivers/gpu/drm/verisilicon/vs_cursor_plane.c

117

static void vs_cursor_plane_atomic_disable(struct drm_plane *plane,

drivers/gpu/drm/verisilicon/vs_cursor_plane.c

121

plane);

drivers/gpu/drm/verisilicon/vs_cursor_plane.c

134

static void vs_cursor_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/verisilicon/vs_cursor_plane.c

138

plane);

drivers/gpu/drm/verisilicon/vs_cursor_plane.c

147

vs_cursor_plane_atomic_disable(plane, atomic_state);

drivers/gpu/drm/verisilicon/vs_cursor_plane.c

252

struct drm_plane *plane;

drivers/gpu/drm/verisilicon/vs_cursor_plane.c

258

plane = drmm_universal_plane_alloc(drm_dev, struct drm_plane, dev, 0,

drivers/gpu/drm/verisilicon/vs_cursor_plane.c

266

if (IS_ERR(plane))

drivers/gpu/drm/verisilicon/vs_cursor_plane.c

267

return plane;

drivers/gpu/drm/verisilicon/vs_cursor_plane.c

269

drm_plane_helper_add(plane, &vs_cursor_plane_helper_funcs);

drivers/gpu/drm/verisilicon/vs_cursor_plane.c

271

return plane;

drivers/gpu/drm/verisilicon/vs_cursor_plane.c

42

static int vs_cursor_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/verisilicon/vs_cursor_plane.c

46

plane);

drivers/gpu/drm/verisilicon/vs_plane.c

130

struct drm_plane_state *vs_plane_duplicate_state(struct drm_plane *plane)

drivers/gpu/drm/verisilicon/vs_plane.c

134

if (drm_WARN_ON(plane->dev, !plane->state))

drivers/gpu/drm/verisilicon/vs_plane.c

137

vs_state_old = to_vs_plane_state(plane->state);

drivers/gpu/drm/verisilicon/vs_plane.c

143

__drm_atomic_helper_plane_duplicate_state(plane, &vs_state->base);

drivers/gpu/drm/verisilicon/vs_plane.c

151

void vs_plane_destroy_state(struct drm_plane *plane,

drivers/gpu/drm/verisilicon/vs_plane.c

159

void vs_plane_reset(struct drm_plane *plane)

drivers/gpu/drm/verisilicon/vs_plane.c

163

if (plane->state) {

drivers/gpu/drm/verisilicon/vs_plane.c

164

__drm_atomic_helper_plane_destroy_state(plane->state);

drivers/gpu/drm/verisilicon/vs_plane.c

165

kfree(plane->state);

drivers/gpu/drm/verisilicon/vs_plane.c

166

plane->state = NULL;

drivers/gpu/drm/verisilicon/vs_plane.c

173

__drm_atomic_helper_plane_reset(plane, &vs_state->base);

drivers/gpu/drm/verisilicon/vs_plane.h

81

struct drm_plane_state *vs_plane_duplicate_state(struct drm_plane *plane);

drivers/gpu/drm/verisilicon/vs_plane.h

82

void vs_plane_destroy_state(struct drm_plane *plane,

drivers/gpu/drm/verisilicon/vs_plane.h

84

void vs_plane_reset(struct drm_plane *plane);

drivers/gpu/drm/verisilicon/vs_primary_plane.c

101

plane);

drivers/gpu/drm/verisilicon/vs_primary_plane.c

111

vs_primary_plane_atomic_disable(plane, atomic_state);

drivers/gpu/drm/verisilicon/vs_primary_plane.c

167

struct drm_plane *plane;

drivers/gpu/drm/verisilicon/vs_primary_plane.c

169

plane = drmm_universal_plane_alloc(drm_dev, struct drm_plane, dev, 0,

drivers/gpu/drm/verisilicon/vs_primary_plane.c

177

if (IS_ERR(plane))

drivers/gpu/drm/verisilicon/vs_primary_plane.c

178

return plane;

drivers/gpu/drm/verisilicon/vs_primary_plane.c

180

drm_plane_helper_add(plane, &vs_primary_plane_helper_funcs);

drivers/gpu/drm/verisilicon/vs_primary_plane.c

182

return plane;

drivers/gpu/drm/verisilicon/vs_primary_plane.c

23

static int vs_primary_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/verisilicon/vs_primary_plane.c

27

plane);

drivers/gpu/drm/verisilicon/vs_primary_plane.c

50

if (drm_WARN_ON_ONCE(plane->dev, ret))

drivers/gpu/drm/verisilicon/vs_primary_plane.c

62

static void vs_primary_plane_atomic_enable(struct drm_plane *plane,

drivers/gpu/drm/verisilicon/vs_primary_plane.c

66

plane);

drivers/gpu/drm/verisilicon/vs_primary_plane.c

81

static void vs_primary_plane_atomic_disable(struct drm_plane *plane,

drivers/gpu/drm/verisilicon/vs_primary_plane.c

85

plane);

drivers/gpu/drm/verisilicon/vs_primary_plane.c

97

static void vs_primary_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/virtio/virtgpu_plane.c

103

plane);

drivers/gpu/drm/virtio/virtgpu_plane.c

105

plane);

drivers/gpu/drm/virtio/virtgpu_plane.c

106

bool is_cursor = plane->type == DRM_PLANE_TYPE_CURSOR;

drivers/gpu/drm/virtio/virtgpu_plane.c

181

static void virtio_gpu_panic_resource_flush(struct drm_plane *plane,

drivers/gpu/drm/virtio/virtgpu_plane.c

185

struct drm_device *dev = plane->dev;

drivers/gpu/drm/virtio/virtgpu_plane.c

190

vgfb = to_virtio_gpu_framebuffer(plane->state->fb);

drivers/gpu/drm/virtio/virtgpu_plane.c

198

static void virtio_gpu_resource_flush(struct drm_plane *plane,

drivers/gpu/drm/virtio/virtgpu_plane.c

202

struct drm_device *dev = plane->dev;

drivers/gpu/drm/virtio/virtgpu_plane.c

208

vgfb = to_virtio_gpu_framebuffer(plane->state->fb);

drivers/gpu/drm/virtio/virtgpu_plane.c

209

vgplane_st = to_virtio_gpu_plane_state(plane->state);

drivers/gpu/drm/virtio/virtgpu_plane.c

235

static void virtio_gpu_primary_plane_update(struct drm_plane *plane,

drivers/gpu/drm/virtio/virtgpu_plane.c

239

plane);

drivers/gpu/drm/virtio/virtgpu_plane.c

240

struct drm_device *dev = plane->dev;

drivers/gpu/drm/virtio/virtgpu_plane.c

246

if (plane->state->crtc)

drivers/gpu/drm/virtio/virtgpu_plane.c

247

output = drm_crtc_to_virtio_gpu_output(plane->state->crtc);

drivers/gpu/drm/virtio/virtgpu_plane.c

253

if (!plane->state->fb || !output->crtc.state->active) {

drivers/gpu/drm/virtio/virtgpu_plane.c

256

plane->state->src_w >> 16,

drivers/gpu/drm/virtio/virtgpu_plane.c

257

plane->state->src_h >> 16,

drivers/gpu/drm/virtio/virtgpu_plane.c

263

if (!drm_atomic_helper_damage_merged(old_state, plane->state, &rect))

drivers/gpu/drm/virtio/virtgpu_plane.c

266

bo = gem_to_virtio_gpu_obj(plane->state->fb->obj[0]);

drivers/gpu/drm/virtio/virtgpu_plane.c

268

virtio_gpu_update_dumb_bo(vgdev, plane->state, &rect);

drivers/gpu/drm/virtio/virtgpu_plane.c

270

if (plane->state->fb != old_state->fb ||

drivers/gpu/drm/virtio/virtgpu_plane.c

271

plane->state->src_w != old_state->src_w ||

drivers/gpu/drm/virtio/virtgpu_plane.c

272

plane->state->src_h != old_state->src_h ||

drivers/gpu/drm/virtio/virtgpu_plane.c

273

plane->state->src_x != old_state->src_x ||

drivers/gpu/drm/virtio/virtgpu_plane.c

274

plane->state->src_y != old_state->src_y ||

drivers/gpu/drm/virtio/virtgpu_plane.c

279

plane->state->crtc_w, plane->state->crtc_h,

drivers/gpu/drm/virtio/virtgpu_plane.c

280

plane->state->crtc_x, plane->state->crtc_y,

drivers/gpu/drm/virtio/virtgpu_plane.c

281

plane->state->src_w >> 16,

drivers/gpu/drm/virtio/virtgpu_plane.c

282

plane->state->src_h >> 16,

drivers/gpu/drm/virtio/virtgpu_plane.c

283

plane->state->src_x >> 16,

drivers/gpu/drm/virtio/virtgpu_plane.c

284

plane->state->src_y >> 16);

drivers/gpu/drm/virtio/virtgpu_plane.c

289

plane->state->fb,

drivers/gpu/drm/virtio/virtgpu_plane.c

290

plane->state->src_w >> 16,

drivers/gpu/drm/virtio/virtgpu_plane.c

291

plane->state->src_h >> 16,

drivers/gpu/drm/virtio/virtgpu_plane.c

292

plane->state->src_x >> 16,

drivers/gpu/drm/virtio/virtgpu_plane.c

293

plane->state->src_y >> 16);

drivers/gpu/drm/virtio/virtgpu_plane.c

297

plane->state->src_w >> 16,

drivers/gpu/drm/virtio/virtgpu_plane.c

298

plane->state->src_h >> 16,

drivers/gpu/drm/virtio/virtgpu_plane.c

299

plane->state->src_x >> 16,

drivers/gpu/drm/virtio/virtgpu_plane.c

300

plane->state->src_y >> 16);

drivers/gpu/drm/virtio/virtgpu_plane.c

304

virtio_gpu_resource_flush(plane,

drivers/gpu/drm/virtio/virtgpu_plane.c

311

static int virtio_gpu_prepare_imported_obj(struct drm_plane *plane,

drivers/gpu/drm/virtio/virtgpu_plane.c

315

struct virtio_gpu_device *vgdev = plane->dev->dev_private;

drivers/gpu/drm/virtio/virtgpu_plane.c

349

static int virtio_gpu_plane_prepare_fb(struct drm_plane *plane,

drivers/gpu/drm/virtio/virtgpu_plane.c

352

struct drm_device *dev = plane->dev;

drivers/gpu/drm/virtio/virtgpu_plane.c

367

drm_gem_plane_helper_prepare_fb(plane, new_state);

drivers/gpu/drm/virtio/virtgpu_plane.c

369

if (!bo || (plane->type == DRM_PLANE_TYPE_PRIMARY && !bo->guest_blob))

drivers/gpu/drm/virtio/virtgpu_plane.c

382

ret = virtio_gpu_prepare_imported_obj(plane, new_state, obj);

drivers/gpu/drm/virtio/virtgpu_plane.c

408

static void virtio_gpu_plane_cleanup_fb(struct drm_plane *plane,

drivers/gpu/drm/virtio/virtgpu_plane.c

428

static void virtio_gpu_cursor_plane_update(struct drm_plane *plane,

drivers/gpu/drm/virtio/virtgpu_plane.c

432

plane);

drivers/gpu/drm/virtio/virtgpu_plane.c

433

struct drm_device *dev = plane->dev;

drivers/gpu/drm/virtio/virtgpu_plane.c

441

if (plane->state->crtc)

drivers/gpu/drm/virtio/virtgpu_plane.c

442

output = drm_crtc_to_virtio_gpu_output(plane->state->crtc);

drivers/gpu/drm/virtio/virtgpu_plane.c

448

if (plane->state->fb) {

drivers/gpu/drm/virtio/virtgpu_plane.c

449

vgfb = to_virtio_gpu_framebuffer(plane->state->fb);

drivers/gpu/drm/virtio/virtgpu_plane.c

450

vgplane_st = to_virtio_gpu_plane_state(plane->state);

drivers/gpu/drm/virtio/virtgpu_plane.c

457

if (bo && bo->dumb && (plane->state->fb != old_state->fb)) {

drivers/gpu/drm/virtio/virtgpu_plane.c

471

plane->state->crtc_w,

drivers/gpu/drm/virtio/virtgpu_plane.c

472

plane->state->crtc_h,

drivers/gpu/drm/virtio/virtgpu_plane.c

478

if (plane->state->fb != old_state->fb) {

drivers/gpu/drm/virtio/virtgpu_plane.c

480

plane->state->crtc_x,

drivers/gpu/drm/virtio/virtgpu_plane.c

481

plane->state->crtc_y,

drivers/gpu/drm/virtio/virtgpu_plane.c

482

plane->state->hotspot_x,

drivers/gpu/drm/virtio/virtgpu_plane.c

483

plane->state->hotspot_y);

drivers/gpu/drm/virtio/virtgpu_plane.c

487

if (plane->state->fb) {

drivers/gpu/drm/virtio/virtgpu_plane.c

489

cpu_to_le32(plane->state->hotspot_x);

drivers/gpu/drm/virtio/virtgpu_plane.c

491

cpu_to_le32(plane->state->hotspot_y);

drivers/gpu/drm/virtio/virtgpu_plane.c

498

plane->state->crtc_x,

drivers/gpu/drm/virtio/virtgpu_plane.c

499

plane->state->crtc_y);

drivers/gpu/drm/virtio/virtgpu_plane.c

503

output->cursor.pos.x = cpu_to_le32(plane->state->crtc_x);

drivers/gpu/drm/virtio/virtgpu_plane.c

504

output->cursor.pos.y = cpu_to_le32(plane->state->crtc_y);

drivers/gpu/drm/virtio/virtgpu_plane.c

508

static int virtio_drm_get_scanout_buffer(struct drm_plane *plane,

drivers/gpu/drm/virtio/virtgpu_plane.c

513

if (!plane->state || !plane->state->fb || !plane->state->visible)

drivers/gpu/drm/virtio/virtgpu_plane.c

516

bo = gem_to_virtio_gpu_obj(plane->state->fb->obj[0]);

drivers/gpu/drm/virtio/virtgpu_plane.c

532

sb->format = plane->state->fb->format;

drivers/gpu/drm/virtio/virtgpu_plane.c

533

sb->height = plane->state->fb->height;

drivers/gpu/drm/virtio/virtgpu_plane.c

534

sb->width = plane->state->fb->width;

drivers/gpu/drm/virtio/virtgpu_plane.c

535

sb->pitch[0] = plane->state->fb->pitches[0];

drivers/gpu/drm/virtio/virtgpu_plane.c

539

static void virtio_panic_flush(struct drm_plane *plane)

drivers/gpu/drm/virtio/virtgpu_plane.c

542

struct drm_device *dev = plane->dev;

drivers/gpu/drm/virtio/virtgpu_plane.c

548

rect.x2 = plane->state->fb->width;

drivers/gpu/drm/virtio/virtgpu_plane.c

549

rect.y2 = plane->state->fb->height;

drivers/gpu/drm/virtio/virtgpu_plane.c

551

bo = gem_to_virtio_gpu_obj(plane->state->fb->obj[0]);

drivers/gpu/drm/virtio/virtgpu_plane.c

554

if (virtio_gpu_panic_update_dumb_bo(vgdev, plane->state,

drivers/gpu/drm/virtio/virtgpu_plane.c

559

virtio_gpu_panic_resource_flush(plane,

drivers/gpu/drm/virtio/virtgpu_plane.c

560

plane->state->src_x >> 16,

drivers/gpu/drm/virtio/virtgpu_plane.c

561

plane->state->src_y >> 16,

drivers/gpu/drm/virtio/virtgpu_plane.c

562

plane->state->src_w >> 16,

drivers/gpu/drm/virtio/virtgpu_plane.c

563

plane->state->src_h >> 16);

drivers/gpu/drm/virtio/virtgpu_plane.c

588

struct drm_plane *plane;

drivers/gpu/drm/virtio/virtgpu_plane.c

602

plane = drmm_universal_plane_alloc(dev, struct drm_plane, dev,

drivers/gpu/drm/virtio/virtgpu_plane.c

605

if (IS_ERR(plane))

drivers/gpu/drm/virtio/virtgpu_plane.c

606

return plane;

drivers/gpu/drm/virtio/virtgpu_plane.c

608

drm_plane_helper_add(plane, funcs);

drivers/gpu/drm/virtio/virtgpu_plane.c

611

drm_plane_enable_fb_damage_clips(plane);

drivers/gpu/drm/virtio/virtgpu_plane.c

613

return plane;

drivers/gpu/drm/virtio/virtgpu_plane.c

75

drm_plane_state *virtio_gpu_plane_duplicate_state(struct drm_plane *plane)

drivers/gpu/drm/virtio/virtgpu_plane.c

79

if (WARN_ON(!plane->state))

drivers/gpu/drm/virtio/virtgpu_plane.c

86

__drm_atomic_helper_plane_duplicate_state(plane, &new->base);

drivers/gpu/drm/virtio/virtgpu_plane.c

99

static int virtio_gpu_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/vkms/vkms_colorop.c

113

int vkms_initialize_colorops(struct drm_plane *plane)

drivers/gpu/drm/vkms/vkms_colorop.c

119

ret = vkms_initialize_color_pipeline(plane, &pipeline);

drivers/gpu/drm/vkms/vkms_colorop.c

124

ret = drm_plane_create_color_pipeline_property(plane, &pipeline, 1);

drivers/gpu/drm/vkms/vkms_colorop.c

21

static int vkms_initialize_color_pipeline(struct drm_plane *plane, struct drm_prop_enum_list *list)

drivers/gpu/drm/vkms/vkms_colorop.c

24

struct drm_device *dev = plane->dev;

drivers/gpu/drm/vkms/vkms_colorop.c

38

ret = drm_plane_colorop_curve_1d_init(dev, ops[i], plane, &vkms_colorop_funcs,

drivers/gpu/drm/vkms/vkms_colorop.c

56

ret = drm_plane_colorop_ctm_3x4_init(dev, ops[i], plane, &vkms_colorop_funcs,

drivers/gpu/drm/vkms/vkms_colorop.c

73

ret = drm_plane_colorop_ctm_3x4_init(dev, ops[i], plane, &vkms_colorop_funcs,

drivers/gpu/drm/vkms/vkms_colorop.c

90

ret = drm_plane_colorop_curve_1d_init(dev, ops[i], plane, &vkms_colorop_funcs,

drivers/gpu/drm/vkms/vkms_composer.c

476

struct vkms_plane_state **plane = crtc_state->active_planes;

drivers/gpu/drm/vkms/vkms_composer.c

502

blend_line(plane[i], y, crtc_x_limit, stage_buffer, output_buffer);

drivers/gpu/drm/vkms/vkms_config.h

55

struct vkms_plane *plane;

drivers/gpu/drm/vkms/vkms_configfs.c

246

struct vkms_configfs_plane *plane;

drivers/gpu/drm/vkms/vkms_configfs.c

253

plane = plane_possible_crtcs_item_to_vkms_configfs_plane(src);

drivers/gpu/drm/vkms/vkms_configfs.c

256

scoped_guard(mutex, &plane->dev->lock) {

drivers/gpu/drm/vkms/vkms_configfs.c

257

if (plane->dev->enabled)

drivers/gpu/drm/vkms/vkms_configfs.c

260

ret = vkms_config_plane_attach_crtc(plane->config, crtc->config);

drivers/gpu/drm/vkms/vkms_configfs.c

269

struct vkms_configfs_plane *plane;

drivers/gpu/drm/vkms/vkms_configfs.c

272

plane = plane_possible_crtcs_item_to_vkms_configfs_plane(src);

drivers/gpu/drm/vkms/vkms_configfs.c

275

scoped_guard(mutex, &plane->dev->lock)

drivers/gpu/drm/vkms/vkms_configfs.c

276

vkms_config_plane_detach_crtc(plane->config, crtc->config);

drivers/gpu/drm/vkms/vkms_configfs.c

291

struct vkms_configfs_plane *plane;

drivers/gpu/drm/vkms/vkms_configfs.c

294

plane = plane_item_to_vkms_configfs_plane(item);

drivers/gpu/drm/vkms/vkms_configfs.c

296

scoped_guard(mutex, &plane->dev->lock)

drivers/gpu/drm/vkms/vkms_configfs.c

297

type = vkms_config_plane_get_type(plane->config);

drivers/gpu/drm/vkms/vkms_configfs.c

305

struct vkms_configfs_plane *plane;

drivers/gpu/drm/vkms/vkms_configfs.c

308

plane = plane_item_to_vkms_configfs_plane(item);

drivers/gpu/drm/vkms/vkms_configfs.c

317

scoped_guard(mutex, &plane->dev->lock) {

drivers/gpu/drm/vkms/vkms_configfs.c

318

if (plane->dev->enabled)

drivers/gpu/drm/vkms/vkms_configfs.c

321

vkms_config_plane_set_type(plane->config, type);

drivers/gpu/drm/vkms/vkms_configfs.c

336

struct vkms_configfs_plane *plane;

drivers/gpu/drm/vkms/vkms_configfs.c

339

plane = plane_item_to_vkms_configfs_plane(item);

drivers/gpu/drm/vkms/vkms_configfs.c

340

lock = &plane->dev->lock;

drivers/gpu/drm/vkms/vkms_configfs.c

343

vkms_config_destroy_plane(plane->config);

drivers/gpu/drm/vkms/vkms_configfs.c

344

kfree(plane);

drivers/gpu/drm/vkms/vkms_configfs.c

362

struct vkms_configfs_plane *plane;

drivers/gpu/drm/vkms/vkms_configfs.c

371

plane = kzalloc(sizeof(*plane), GFP_KERNEL);

drivers/gpu/drm/vkms/vkms_configfs.c

372

if (!plane)

drivers/gpu/drm/vkms/vkms_configfs.c

375

plane->dev = dev;

drivers/gpu/drm/vkms/vkms_configfs.c

377

plane->config = vkms_config_create_plane(dev->config);

drivers/gpu/drm/vkms/vkms_configfs.c

378

if (IS_ERR(plane->config)) {

drivers/gpu/drm/vkms/vkms_configfs.c

379

ret = PTR_ERR(plane->config);

drivers/gpu/drm/vkms/vkms_configfs.c

380

kfree(plane);

drivers/gpu/drm/vkms/vkms_configfs.c

384

config_group_init_type_name(&plane->group, name, &plane_item_type);

drivers/gpu/drm/vkms/vkms_configfs.c

386

config_group_init_type_name(&plane->possible_crtcs_group,

drivers/gpu/drm/vkms/vkms_configfs.c

389

configfs_add_default_group(&plane->possible_crtcs_group,

drivers/gpu/drm/vkms/vkms_configfs.c

390

&plane->group);

drivers/gpu/drm/vkms/vkms_configfs.c

393

return &plane->group;

drivers/gpu/drm/vkms/vkms_crtc.c

119

struct drm_plane *plane;

drivers/gpu/drm/vkms/vkms_crtc.c

130

drm_for_each_plane_mask(plane, crtc->dev, crtc_state->plane_mask) {

drivers/gpu/drm/vkms/vkms_crtc.c

131

plane_state = drm_atomic_get_new_plane_state(crtc_state->state, plane);

drivers/gpu/drm/vkms/vkms_crtc.c

146

drm_for_each_plane_mask(plane, crtc->dev, crtc_state->plane_mask) {

drivers/gpu/drm/vkms/vkms_crtc.c

147

plane_state = drm_atomic_get_new_plane_state(crtc_state->state, plane);

drivers/gpu/drm/vkms/vkms_drv.h

122

typedef void (*pixel_read_line_t)(const struct vkms_plane_state *plane, int x_start,

drivers/gpu/drm/vkms/vkms_drv.h

327

int vkms_initialize_colorops(struct drm_plane *plane);

drivers/gpu/drm/vkms/vkms_formats.c

319

static void function_name(const struct vkms_plane_state *plane, int x_start, \

drivers/gpu/drm/vkms/vkms_formats.c

324

int step = get_block_step_bytes(plane->frame_info->fb, direction, 0); \

drivers/gpu/drm/vkms/vkms_formats.c

327

packed_pixels_addr_1x1(plane->frame_info, x_start, y_start, 0, &src_pixels); \

drivers/gpu/drm/vkms/vkms_formats.c

377

static void Rx_read_line(const struct vkms_plane_state *plane, int x_start,

drivers/gpu/drm/vkms/vkms_formats.c

382

int bits_per_pixel = drm_format_info_bpp(plane->frame_info->fb->format, 0);

drivers/gpu/drm/vkms/vkms_formats.c

386

WARN_ONCE(drm_format_info_block_height(plane->frame_info->fb->format, 0) != 1,

drivers/gpu/drm/vkms/vkms_formats.c

389

packed_pixels_addr(plane->frame_info, x_start, y_start, 0, &src_pixels, &rem_x, &rem_y);

drivers/gpu/drm/vkms/vkms_formats.c

391

int step = get_block_step_bytes(plane->frame_info->fb, direction, 0);

drivers/gpu/drm/vkms/vkms_formats.c

429

static void R1_read_line(const struct vkms_plane_state *plane, int x_start,

drivers/gpu/drm/vkms/vkms_formats.c

433

Rx_read_line(plane, x_start, y_start, direction, count, out_pixel);

drivers/gpu/drm/vkms/vkms_formats.c

436

static void R2_read_line(const struct vkms_plane_state *plane, int x_start,

drivers/gpu/drm/vkms/vkms_formats.c

440

Rx_read_line(plane, x_start, y_start, direction, count, out_pixel);

drivers/gpu/drm/vkms/vkms_formats.c

443

static void R4_read_line(const struct vkms_plane_state *plane, int x_start,

drivers/gpu/drm/vkms/vkms_formats.c

447

Rx_read_line(plane, x_start, y_start, direction, count, out_pixel);

drivers/gpu/drm/vkms/vkms_formats.c

499

static void function_name(const struct vkms_plane_state *plane, int x_start, \

drivers/gpu/drm/vkms/vkms_formats.c

506

packed_pixels_addr_1x1(plane->frame_info, x_start, y_start, 0, \

drivers/gpu/drm/vkms/vkms_formats.c

508

packed_pixels_addr_1x1(plane->frame_info, \

drivers/gpu/drm/vkms/vkms_formats.c

509

x_start / plane->frame_info->fb->format->hsub, \

drivers/gpu/drm/vkms/vkms_formats.c

510

y_start / plane->frame_info->fb->format->vsub, 1, \

drivers/gpu/drm/vkms/vkms_formats.c

512

int step_1 = get_block_step_bytes(plane->frame_info->fb, direction, 0); \

drivers/gpu/drm/vkms/vkms_formats.c

513

int step_2 = get_block_step_bytes(plane->frame_info->fb, direction, 1); \

drivers/gpu/drm/vkms/vkms_formats.c

514

int subsampling = get_subsampling(plane->frame_info->fb->format, direction); \

drivers/gpu/drm/vkms/vkms_formats.c

516

const struct conversion_matrix *conversion_matrix = &plane->conversion_matrix; \

drivers/gpu/drm/vkms/vkms_formats.c

543

static void planar_yuv_read_line(const struct vkms_plane_state *plane, int x_start,

drivers/gpu/drm/vkms/vkms_formats.c

551

packed_pixels_addr_1x1(plane->frame_info, x_start, y_start, 0,

drivers/gpu/drm/vkms/vkms_formats.c

553

packed_pixels_addr_1x1(plane->frame_info,

drivers/gpu/drm/vkms/vkms_formats.c

554

x_start / plane->frame_info->fb->format->hsub,

drivers/gpu/drm/vkms/vkms_formats.c

555

y_start / plane->frame_info->fb->format->vsub, 1,

drivers/gpu/drm/vkms/vkms_formats.c

557

packed_pixels_addr_1x1(plane->frame_info,

drivers/gpu/drm/vkms/vkms_formats.c

558

x_start / plane->frame_info->fb->format->hsub,

drivers/gpu/drm/vkms/vkms_formats.c

559

y_start / plane->frame_info->fb->format->vsub, 2,

drivers/gpu/drm/vkms/vkms_formats.c

561

int step_y = get_block_step_bytes(plane->frame_info->fb, direction, 0);

drivers/gpu/drm/vkms/vkms_formats.c

562

int step_channel_1 = get_block_step_bytes(plane->frame_info->fb, direction, 1);

drivers/gpu/drm/vkms/vkms_formats.c

563

int step_channel_2 = get_block_step_bytes(plane->frame_info->fb, direction, 2);

drivers/gpu/drm/vkms/vkms_formats.c

564

int subsampling = get_subsampling(plane->frame_info->fb->format, direction);

drivers/gpu/drm/vkms/vkms_formats.c

566

const struct conversion_matrix *conversion_matrix = &plane->conversion_matrix;

drivers/gpu/drm/vkms/vkms_output.c

23

plane_cfg->plane = vkms_plane_init(vkmsdev, plane_cfg);

drivers/gpu/drm/vkms/vkms_output.c

24

if (IS_ERR(plane_cfg->plane)) {

drivers/gpu/drm/vkms/vkms_output.c

26

return PTR_ERR(plane_cfg->plane);

drivers/gpu/drm/vkms/vkms_output.c

36

crtc_cfg->crtc = vkms_crtc_init(dev, &primary->plane->base,

drivers/gpu/drm/vkms/vkms_output.c

37

cursor ? &cursor->plane->base : NULL);

drivers/gpu/drm/vkms/vkms_output.c

56

plane_cfg->plane->base.possible_crtcs |=

drivers/gpu/drm/vkms/vkms_plane.c

102

if (plane->state) {

drivers/gpu/drm/vkms/vkms_plane.c

103

vkms_plane_destroy_state(plane, plane->state);

drivers/gpu/drm/vkms/vkms_plane.c

104

plane->state = NULL; /* must be set to NULL here */

drivers/gpu/drm/vkms/vkms_plane.c

113

__drm_gem_reset_shadow_plane(plane, &vkms_state->base);

drivers/gpu/drm/vkms/vkms_plane.c

124

static void vkms_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/vkms/vkms_plane.c

128

plane);

drivers/gpu/drm/vkms/vkms_plane.c

155

static int vkms_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/vkms/vkms_plane.c

159

plane);

drivers/gpu/drm/vkms/vkms_plane.c

181

static int vkms_prepare_fb(struct drm_plane *plane,

drivers/gpu/drm/vkms/vkms_plane.c

193

ret = drm_gem_plane_helper_prepare_fb(plane, state);

drivers/gpu/drm/vkms/vkms_plane.c

200

static void vkms_cleanup_fb(struct drm_plane *plane,

drivers/gpu/drm/vkms/vkms_plane.c

225

struct vkms_plane *plane;

drivers/gpu/drm/vkms/vkms_plane.c

227

plane = drmm_universal_plane_alloc(dev, struct vkms_plane, base, 0,

drivers/gpu/drm/vkms/vkms_plane.c

232

if (IS_ERR(plane))

drivers/gpu/drm/vkms/vkms_plane.c

233

return plane;

drivers/gpu/drm/vkms/vkms_plane.c

235

drm_plane_helper_add(&plane->base, &vkms_plane_helper_funcs);

drivers/gpu/drm/vkms/vkms_plane.c

237

drm_plane_create_rotation_property(&plane->base, DRM_MODE_ROTATE_0,

drivers/gpu/drm/vkms/vkms_plane.c

240

drm_plane_create_color_properties(&plane->base,

drivers/gpu/drm/vkms/vkms_plane.c

250

vkms_initialize_colorops(&plane->base);

drivers/gpu/drm/vkms/vkms_plane.c

252

return plane;

drivers/gpu/drm/vkms/vkms_plane.c

54

vkms_plane_duplicate_state(struct drm_plane *plane)

drivers/gpu/drm/vkms/vkms_plane.c

72

__drm_gem_duplicate_shadow_plane_state(plane, &vkms_state->base);

drivers/gpu/drm/vkms/vkms_plane.c

77

static void vkms_plane_destroy_state(struct drm_plane *plane,

drivers/gpu/drm/vkms/vkms_plane.c

98

static void vkms_plane_reset(struct drm_plane *plane)

drivers/gpu/drm/vmwgfx/device_include/svga3d_cmd.h

746

float plane[4];

drivers/gpu/drm/vmwgfx/vmwgfx_cursor_plane.c

407

void vmw_cursor_plane_destroy(struct drm_plane *plane)

drivers/gpu/drm/vmwgfx/vmwgfx_cursor_plane.c

409

struct vmw_cursor_plane *vcp = vmw_plane_to_vcp(plane);

drivers/gpu/drm/vmwgfx/vmwgfx_cursor_plane.c

412

vmw_cursor_update_position(vmw_priv(plane->dev), false, 0, 0);

drivers/gpu/drm/vmwgfx/vmwgfx_cursor_plane.c

417

drm_plane_cleanup(plane);

drivers/gpu/drm/vmwgfx/vmwgfx_cursor_plane.c

467

vmw_cursor_plane_cleanup_fb(struct drm_plane *plane,

drivers/gpu/drm/vmwgfx/vmwgfx_cursor_plane.c

470

struct vmw_cursor_plane *vcp = vmw_plane_to_vcp(plane);

drivers/gpu/drm/vmwgfx/vmwgfx_cursor_plane.c

595

int vmw_cursor_plane_prepare_fb(struct drm_plane *plane,

drivers/gpu/drm/vmwgfx/vmwgfx_cursor_plane.c

599

struct vmw_cursor_plane *vcp = vmw_plane_to_vcp(plane);

drivers/gpu/drm/vmwgfx/vmwgfx_cursor_plane.c

601

struct vmw_plane_state *old_vps = vmw_plane_state_to_vps(plane->state);

drivers/gpu/drm/vmwgfx/vmwgfx_cursor_plane.c

602

struct vmw_private *vmw = vmw_priv(plane->dev);

drivers/gpu/drm/vmwgfx/vmwgfx_cursor_plane.c

692

int vmw_cursor_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/vmwgfx/vmwgfx_cursor_plane.c

696

drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/vmwgfx/vmwgfx_cursor_plane.c

697

struct vmw_private *vmw = vmw_priv(plane->dev);

drivers/gpu/drm/vmwgfx/vmwgfx_cursor_plane.c

741

vmw_cursor_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/vmwgfx/vmwgfx_cursor_plane.c

746

drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/vmwgfx/vmwgfx_cursor_plane.c

748

drm_atomic_get_old_plane_state(state, plane);

drivers/gpu/drm/vmwgfx/vmwgfx_cursor_plane.c

750

struct vmw_private *dev_priv = vmw_priv(plane->dev);

drivers/gpu/drm/vmwgfx/vmwgfx_cursor_plane.h

71

void vmw_cursor_plane_destroy(struct drm_plane *plane);

drivers/gpu/drm/vmwgfx/vmwgfx_cursor_plane.h

73

int vmw_cursor_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/vmwgfx/vmwgfx_cursor_plane.h

75

void vmw_cursor_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/vmwgfx/vmwgfx_cursor_plane.h

77

int vmw_cursor_plane_prepare_fb(struct drm_plane *plane,

drivers/gpu/drm/vmwgfx/vmwgfx_cursor_plane.h

79

void vmw_cursor_plane_cleanup_fb(struct drm_plane *plane,

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

103

int vmw_du_primary_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

107

plane);

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

109

plane);

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

1527

struct drm_plane *plane = crtc->primary;

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

1529

if (plane->state->fb == &framebuffer->base)

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

1735

struct drm_plane_state *state = update->plane->state;

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

264

vmw_du_plane_duplicate_state(struct drm_plane *plane)

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

269

vps = kmemdup(plane->state, sizeof(*vps), GFP_KERNEL);

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

283

__drm_atomic_helper_plane_duplicate_state(plane, state);

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

296

void vmw_du_plane_reset(struct drm_plane *plane)

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

300

if (plane->state)

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

301

vmw_du_plane_destroy_state(plane, plane->state);

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

310

__drm_atomic_helper_plane_reset(plane, &vps->base);

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

323

vmw_du_plane_destroy_state(struct drm_plane *plane,

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

331

drm_atomic_helper_plane_destroy_state(plane, state);

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

45

void vmw_du_primary_plane_destroy(struct drm_plane *plane)

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

47

drm_plane_cleanup(plane);

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

82

vmw_du_plane_cleanup_fb(struct drm_plane *plane,

drivers/gpu/drm/vmwgfx/vmwgfx_kms.h

104

struct drm_plane *plane;

drivers/gpu/drm/vmwgfx/vmwgfx_kms.h

407

void vmw_du_primary_plane_destroy(struct drm_plane *plane);

drivers/gpu/drm/vmwgfx/vmwgfx_kms.h

410

int vmw_du_primary_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/vmwgfx/vmwgfx_kms.h

412

void vmw_du_plane_cleanup_fb(struct drm_plane *plane,

drivers/gpu/drm/vmwgfx/vmwgfx_kms.h

414

void vmw_du_plane_reset(struct drm_plane *plane);

drivers/gpu/drm/vmwgfx/vmwgfx_kms.h

415

struct drm_plane_state *vmw_du_plane_duplicate_state(struct drm_plane *plane);

drivers/gpu/drm/vmwgfx/vmwgfx_kms.h

416

void vmw_du_plane_destroy_state(struct drm_plane *plane,

drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c

312

vmw_ldu_primary_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c

316

plane);

drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c

318

plane);

drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c

326

dev_priv = vmw_priv(plane->dev);

drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c

356

drm_WARN_ONCE(plane->dev, ret,

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

374

vmw_sou_primary_plane_cleanup_fb(struct drm_plane *plane,

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

378

struct drm_crtc *crtc = plane->state->crtc ?

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

379

plane->state->crtc : old_state->crtc;

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

387

vmw_du_plane_cleanup_fb(plane, old_state);

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

402

vmw_sou_primary_plane_prepare_fb(struct drm_plane *plane,

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

406

struct drm_crtc *crtc = plane->state->crtc ?: new_state->crtc;

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

532

struct drm_plane *plane,

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

540

bo_update.base.plane = plane;

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

543

bo_update.base.du = vmw_crtc_to_du(plane->state->crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

634

struct drm_plane_state *state = update->plane->state;

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

694

struct drm_plane *plane,

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

702

srf_update.base.plane = plane;

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

705

srf_update.base.du = vmw_crtc_to_du(plane->state->crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

721

vmw_sou_primary_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

724

struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state, plane);

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

725

struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

737

ret = vmw_sou_plane_update_bo(dev_priv, plane,

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

740

ret = vmw_sou_plane_update_surface(dev_priv, plane,

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

1244

struct drm_plane *plane,

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

1252

bo_update.base.plane = plane;

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

1255

bo_update.base.du = vmw_crtc_to_du(plane->state->crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

1354

struct drm_plane *plane,

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

1363

stdu = vmw_crtc_to_stdu(plane->state->crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

1367

srf_update.plane = plane;

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

1370

srf_update.du = vmw_crtc_to_du(plane->state->crtc);

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

1401

vmw_stdu_primary_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

1404

struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state, plane);

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

1405

struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

1429

ret = vmw_stdu_plane_update_bo(dev_priv, plane,

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

1432

ret = vmw_stdu_plane_update_surface(dev_priv, plane,

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

943

vmw_stdu_primary_plane_cleanup_fb(struct drm_plane *plane,

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

950

vmw_du_plane_cleanup_fb(plane, old_state);

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

970

vmw_stdu_primary_plane_prepare_fb(struct drm_plane *plane,

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

973

struct vmw_private *dev_priv = vmw_priv(plane->dev);

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

980

struct drm_plane_state *old_state = plane->state;

drivers/gpu/drm/xe/display/xe_fb_pin.c

101

for (column = 0; column < plane->width; column++) {

drivers/gpu/drm/xe/display/xe_fb_pin.c

110

plane->dst_stride - plane->width);

drivers/gpu/drm/xe/display/xe_fb_pin.c

123

for (i = 0; i < ARRAY_SIZE(remap_info->plane); i++) {

drivers/gpu/drm/xe/display/xe_fb_pin.c

124

const struct intel_remapped_plane_info *plane =

drivers/gpu/drm/xe/display/xe_fb_pin.c

125

&remap_info->plane[i];

drivers/gpu/drm/xe/display/xe_fb_pin.c

127

if (!plane->linear && !plane->width && !plane->height)

drivers/gpu/drm/xe/display/xe_fb_pin.c

139

if (plane->linear)

drivers/gpu/drm/xe/display/xe_fb_pin.c

140

dest = write_dpt_remapped_linear(bo, map, dest, plane);

drivers/gpu/drm/xe/display/xe_fb_pin.c

142

dest = write_dpt_remapped_tiled(bo, map, dest, plane);

drivers/gpu/drm/xe/display/xe_fb_pin.c

210

for (i = 0; i < ARRAY_SIZE(rot_info->plane); i++)

drivers/gpu/drm/xe/display/xe_fb_pin.c

212

rot_info->plane[i].offset,

drivers/gpu/drm/xe/display/xe_fb_pin.c

213

rot_info->plane[i].width,

drivers/gpu/drm/xe/display/xe_fb_pin.c

214

rot_info->plane[i].height,

drivers/gpu/drm/xe/display/xe_fb_pin.c

215

rot_info->plane[i].src_stride,

drivers/gpu/drm/xe/display/xe_fb_pin.c

216

rot_info->plane[i].dst_stride);

drivers/gpu/drm/xe/display/xe_fb_pin.c

265

for (u32 i = 0; i < ARRAY_SIZE(rot_info->plane); i++)

drivers/gpu/drm/xe/display/xe_fb_pin.c

267

bo, rot_info->plane[i].offset,

drivers/gpu/drm/xe/display/xe_fb_pin.c

268

rot_info->plane[i].width,

drivers/gpu/drm/xe/display/xe_fb_pin.c

269

rot_info->plane[i].height,

drivers/gpu/drm/xe/display/xe_fb_pin.c

270

rot_info->plane[i].src_stride,

drivers/gpu/drm/xe/display/xe_fb_pin.c

271

rot_info->plane[i].dst_stride);

drivers/gpu/drm/xe/display/xe_fb_pin.c

66

const struct intel_remapped_plane_info *plane)

drivers/gpu/drm/xe/display/xe_fb_pin.c

72

unsigned int offset = plane->offset * XE_PAGE_SIZE;

drivers/gpu/drm/xe/display/xe_fb_pin.c

73

unsigned int size = plane->size;

drivers/gpu/drm/xe/display/xe_fb_pin.c

89

const struct intel_remapped_plane_info *plane)

drivers/gpu/drm/xe/display/xe_fb_pin.c

97

for (row = 0; row < plane->height; row++) {

drivers/gpu/drm/xe/display/xe_fb_pin.c

98

offset = (plane->offset + plane->src_stride * row) *

drivers/gpu/drm/xen/xen_drm_front_kms.c

185

&pipe->plane);

drivers/gpu/drm/xlnx/zynqmp_kms.c

100

struct zynqmp_disp_layer *layer = dpsub->layers[plane->index];

drivers/gpu/drm/xlnx/zynqmp_kms.c

121

if (plane->index == ZYNQMP_DPSUB_LAYER_GFX)

drivers/gpu/drm/xlnx/zynqmp_kms.c

123

plane->state->alpha >> 8);

drivers/gpu/drm/xlnx/zynqmp_kms.c

156

struct drm_plane *plane = &dpsub->drm->planes[i];

drivers/gpu/drm/xlnx/zynqmp_kms.c

168

ret = drm_universal_plane_init(&dpsub->drm->dev, plane, 0,

drivers/gpu/drm/xlnx/zynqmp_kms.c

176

drm_plane_helper_add(plane, &zynqmp_dpsub_plane_helper_funcs);

drivers/gpu/drm/xlnx/zynqmp_kms.c

178

drm_plane_create_zpos_immutable_property(plane, i);

drivers/gpu/drm/xlnx/zynqmp_kms.c

180

drm_plane_create_alpha_property(plane);

drivers/gpu/drm/xlnx/zynqmp_kms.c

320

struct drm_plane *plane = &dpsub->drm->planes[ZYNQMP_DPSUB_LAYER_GFX];

drivers/gpu/drm/xlnx/zynqmp_kms.c

324

ret = drm_crtc_init_with_planes(&dpsub->drm->dev, crtc, plane,

drivers/gpu/drm/xlnx/zynqmp_kms.c

55

static int zynqmp_dpsub_plane_atomic_check(struct drm_plane *plane,

drivers/gpu/drm/xlnx/zynqmp_kms.c

59

plane);

drivers/gpu/drm/xlnx/zynqmp_kms.c

76

static void zynqmp_dpsub_plane_atomic_disable(struct drm_plane *plane,

drivers/gpu/drm/xlnx/zynqmp_kms.c

80

plane);

drivers/gpu/drm/xlnx/zynqmp_kms.c

81

struct zynqmp_dpsub *dpsub = to_zynqmp_dpsub(plane->dev);

drivers/gpu/drm/xlnx/zynqmp_kms.c

82

struct zynqmp_disp_layer *layer = dpsub->layers[plane->index];

drivers/gpu/drm/xlnx/zynqmp_kms.c

89

if (plane->index == ZYNQMP_DPSUB_LAYER_GFX)

drivers/gpu/drm/xlnx/zynqmp_kms.c

91

plane->state->alpha >> 8);

drivers/gpu/drm/xlnx/zynqmp_kms.c

94

static void zynqmp_dpsub_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/xlnx/zynqmp_kms.c

97

struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state, plane);

drivers/gpu/drm/xlnx/zynqmp_kms.c

98

struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state, plane);

drivers/gpu/drm/xlnx/zynqmp_kms.c

99

struct zynqmp_dpsub *dpsub = to_zynqmp_dpsub(plane->dev);

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

115

unsigned plane;

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

120

for (plane = 0; plane < TPG_MAX_PLANES; plane++) {

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

121

unsigned pixelsz = plane ? 2 : 4;

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

123

tpg->lines[pat][plane] =

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

125

if (!tpg->lines[pat][plane]) {

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

129

if (plane == 0)

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

131

tpg->downsampled_lines[pat][plane] =

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

133

if (!tpg->downsampled_lines[pat][plane]) {

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

139

for (plane = 0; plane < TPG_MAX_PLANES; plane++) {

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

140

unsigned pixelsz = plane ? 2 : 4;

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

142

tpg->contrast_line[plane] =

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

144

if (!tpg->contrast_line[plane]) {

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

148

tpg->black_line[plane] =

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

150

if (!tpg->black_line[plane]) {

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

154

tpg->random_line[plane] =

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

156

if (!tpg->random_line[plane]) {

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

164

for (plane = 0; plane < TPG_MAX_PLANES; plane++) {

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

165

vfree(tpg->contrast_line[plane]);

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

166

vfree(tpg->black_line[plane]);

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

167

vfree(tpg->random_line[plane]);

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

168

tpg->contrast_line[plane] = NULL;

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

169

tpg->black_line[plane] = NULL;

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

170

tpg->random_line[plane] = NULL;

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

174

for (plane = 0; plane < TPG_MAX_PLANES; plane++) {

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

175

vfree(tpg->lines[pat][plane]);

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

176

tpg->lines[pat][plane] = NULL;

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

177

if (plane == 0)

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

179

vfree(tpg->downsampled_lines[pat][plane]);

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

180

tpg->downsampled_lines[pat][plane] = NULL;

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

189

unsigned plane;

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

192

for (plane = 0; plane < TPG_MAX_PLANES; plane++) {

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

193

vfree(tpg->lines[pat][plane]);

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

194

tpg->lines[pat][plane] = NULL;

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

195

if (plane == 0)

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

197

vfree(tpg->downsampled_lines[pat][plane]);

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

198

tpg->downsampled_lines[pat][plane] = NULL;

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

200

for (plane = 0; plane < TPG_MAX_PLANES; plane++) {

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

201

vfree(tpg->contrast_line[plane]);

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

202

vfree(tpg->black_line[plane]);

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

203

vfree(tpg->random_line[plane]);

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

204

tpg->contrast_line[plane] = NULL;

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

205

tpg->black_line[plane] = NULL;

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

206

tpg->random_line[plane] = NULL;

drivers/media/common/videobuf2/videobuf2-core.c

1264

unsigned int plane;

drivers/media/common/videobuf2/videobuf2-core.c

1275

for (plane = 0; plane < vb->num_planes; ++plane) {

drivers/media/common/videobuf2/videobuf2-core.c

1277

if (vb->planes[plane].m.userptr &&

drivers/media/common/videobuf2/videobuf2-core.c

1278

vb->planes[plane].m.userptr == planes[plane].m.userptr

drivers/media/common/videobuf2/videobuf2-core.c

1279

&& vb->planes[plane].length == planes[plane].length)

drivers/media/common/videobuf2/videobuf2-core.c

1283

plane);

drivers/media/common/videobuf2/videobuf2-core.c

1286

if (planes[plane].length < vb->planes[plane].min_length) {

drivers/media/common/videobuf2/videobuf2-core.c

1288

planes[plane].length,

drivers/media/common/videobuf2/videobuf2-core.c

1289

vb->planes[plane].min_length,

drivers/media/common/videobuf2/videobuf2-core.c

1290

plane);

drivers/media/common/videobuf2/videobuf2-core.c

1296

if (vb->planes[plane].mem_priv) {

drivers/media/common/videobuf2/videobuf2-core.c

1302

call_void_memop(vb, put_userptr, vb->planes[plane].mem_priv);

drivers/media/common/videobuf2/videobuf2-core.c

1305

vb->planes[plane].mem_priv = NULL;

drivers/media/common/videobuf2/videobuf2-core.c

1306

vb->planes[plane].bytesused = 0;

drivers/media/common/videobuf2/videobuf2-core.c

1307

vb->planes[plane].length = 0;

drivers/media/common/videobuf2/videobuf2-core.c

1308

vb->planes[plane].m.userptr = 0;

drivers/media/common/videobuf2/videobuf2-core.c

1309

vb->planes[plane].data_offset = 0;

drivers/media/common/videobuf2/videobuf2-core.c

1314

q->alloc_devs[plane] ? : q->dev,

drivers/media/common/videobuf2/videobuf2-core.c

1315

planes[plane].m.userptr,

drivers/media/common/videobuf2/videobuf2-core.c

1316

planes[plane].length);

drivers/media/common/videobuf2/videobuf2-core.c

1319

plane);

drivers/media/common/videobuf2/videobuf2-core.c

1323

vb->planes[plane].mem_priv = mem_priv;

drivers/media/common/videobuf2/videobuf2-core.c

1330

for (plane = 0; plane < vb->num_planes; ++plane) {

drivers/media/common/videobuf2/videobuf2-core.c

1331

vb->planes[plane].bytesused = planes[plane].bytesused;

drivers/media/common/videobuf2/videobuf2-core.c

1332

vb->planes[plane].length = planes[plane].length;

drivers/media/common/videobuf2/videobuf2-core.c

1333

vb->planes[plane].m.userptr = planes[plane].m.userptr;

drivers/media/common/videobuf2/videobuf2-core.c

1334

vb->planes[plane].data_offset = planes[plane].data_offset;

drivers/media/common/videobuf2/videobuf2-core.c

1360

for (plane = 0; plane < vb->num_planes; ++plane) {

drivers/media/common/videobuf2/videobuf2-core.c

1361

if (vb->planes[plane].mem_priv)

drivers/media/common/videobuf2/videobuf2-core.c

1363

vb->planes[plane].mem_priv);

drivers/media/common/videobuf2/videobuf2-core.c

1364

vb->planes[plane].mem_priv = NULL;

drivers/media/common/videobuf2/videobuf2-core.c

1365

vb->planes[plane].m.userptr = 0;

drivers/media/common/videobuf2/videobuf2-core.c

1366

vb->planes[plane].length = 0;

drivers/media/common/videobuf2/videobuf2-core.c

1380

unsigned int plane, i;

drivers/media/common/videobuf2/videobuf2-core.c

1391

for (plane = 0; plane < vb->num_planes; ++plane) {

drivers/media/common/videobuf2/videobuf2-core.c

1392

struct dma_buf *dbuf = dma_buf_get(planes[plane].m.fd);

drivers/media/common/videobuf2/videobuf2-core.c

1394

planes[plane].dbuf = dbuf;

drivers/media/common/videobuf2/videobuf2-core.c

1398

plane);

drivers/media/common/videobuf2/videobuf2-core.c

1404

if (planes[plane].length == 0)

drivers/media/common/videobuf2/videobuf2-core.c

1405

planes[plane].length = dbuf->size;

drivers/media/common/videobuf2/videobuf2-core.c

1407

if (planes[plane].length < vb->planes[plane].min_length) {

drivers/media/common/videobuf2/videobuf2-core.c

1409

planes[plane].length, plane,

drivers/media/common/videobuf2/videobuf2-core.c

1410

vb->planes[plane].min_length);

drivers/media/common/videobuf2/videobuf2-core.c

1416

if (dbuf == vb->planes[plane].dbuf &&

drivers/media/common/videobuf2/videobuf2-core.c

1417

vb->planes[plane].length == planes[plane].length)

drivers/media/common/videobuf2/videobuf2-core.c

1420

dprintk(q, 3, "buffer for plane %d changed\n", plane);

drivers/media/common/videobuf2/videobuf2-core.c

1432

for (plane = 0; plane < vb->num_planes; ++plane) {

drivers/media/common/videobuf2/videobuf2-core.c

1438

for (i = 0; i < plane; ++i) {

drivers/media/common/videobuf2/videobuf2-core.c

1439

if (planes[plane].dbuf == vb->planes[i].dbuf &&

drivers/media/common/videobuf2/videobuf2-core.c

1440

q->alloc_devs[plane] == q->alloc_devs[i]) {

drivers/media/common/videobuf2/videobuf2-core.c

1441

vb->planes[plane].dbuf_duplicated = true;

drivers/media/common/videobuf2/videobuf2-core.c

1442

vb->planes[plane].dbuf = vb->planes[i].dbuf;

drivers/media/common/videobuf2/videobuf2-core.c

1443

vb->planes[plane].mem_priv = vb->planes[i].mem_priv;

drivers/media/common/videobuf2/videobuf2-core.c

1448

if (vb->planes[plane].dbuf_duplicated)

drivers/media/common/videobuf2/videobuf2-core.c

1454

q->alloc_devs[plane] ? : q->dev,

drivers/media/common/videobuf2/videobuf2-core.c

1455

planes[plane].dbuf,

drivers/media/common/videobuf2/videobuf2-core.c

1456

planes[plane].length);

drivers/media/common/videobuf2/videobuf2-core.c

1463

vb->planes[plane].dbuf = planes[plane].dbuf;

drivers/media/common/videobuf2/videobuf2-core.c

1464

vb->planes[plane].mem_priv = mem_priv;

drivers/media/common/videobuf2/videobuf2-core.c

1471

ret = call_memop(vb, map_dmabuf, vb->planes[plane].mem_priv);

drivers/media/common/videobuf2/videobuf2-core.c

1474

plane);

drivers/media/common/videobuf2/videobuf2-core.c

1477

vb->planes[plane].dbuf_mapped = 1;

drivers/media/common/videobuf2/videobuf2-core.c

1480

for (plane = 0; plane < vb->num_planes; ++plane)

drivers/media/common/videobuf2/videobuf2-core.c

1481

dma_buf_put(planes[plane].dbuf);

drivers/media/common/videobuf2/videobuf2-core.c

1488

for (plane = 0; plane < vb->num_planes; ++plane) {

drivers/media/common/videobuf2/videobuf2-core.c

1489

vb->planes[plane].bytesused = planes[plane].bytesused;

drivers/media/common/videobuf2/videobuf2-core.c

1490

vb->planes[plane].length = planes[plane].length;

drivers/media/common/videobuf2/videobuf2-core.c

1491

vb->planes[plane].m.fd = planes[plane].m.fd;

drivers/media/common/videobuf2/videobuf2-core.c

1492

vb->planes[plane].data_offset = planes[plane].data_offset;

drivers/media/common/videobuf2/videobuf2-core.c

1517

for (plane = 0; plane < vb->num_planes; ++plane) {

drivers/media/common/videobuf2/videobuf2-core.c

1518

if (!IS_ERR_OR_NULL(planes[plane].dbuf))

drivers/media/common/videobuf2/videobuf2-core.c

1519

dma_buf_put(planes[plane].dbuf);

drivers/media/common/videobuf2/videobuf2-core.c

227

int plane;

drivers/media/common/videobuf2/videobuf2-core.c

234

for (plane = 0; plane < vb->num_planes; ++plane) {

drivers/media/common/videobuf2/videobuf2-core.c

236

unsigned long size = PAGE_ALIGN(vb->planes[plane].length);

drivers/media/common/videobuf2/videobuf2-core.c

2389

struct vb2_buffer **vb, unsigned int *plane)

drivers/media/common/videobuf2/videobuf2-core.c

239

if (size < vb->planes[plane].length)

drivers/media/common/videobuf2/videobuf2-core.c

2411

*plane = (offset >> PAGE_SHIFT) & PLANE_INDEX_MASK;

drivers/media/common/videobuf2/videobuf2-core.c

2416

if (*plane >= (*vb)->num_planes)

drivers/media/common/videobuf2/videobuf2-core.c

2423

struct vb2_buffer *vb, unsigned int plane, unsigned int flags)

drivers/media/common/videobuf2/videobuf2-core.c

244

q->alloc_devs[plane] ? : q->dev,

drivers/media/common/videobuf2/videobuf2-core.c

2449

if (plane >= vb->num_planes) {

drivers/media/common/videobuf2/videobuf2-core.c

2459

vb_plane = &vb->planes[plane];

drivers/media/common/videobuf2/videobuf2-core.c

2467

vb->index, plane);

drivers/media/common/videobuf2/videobuf2-core.c

2474

vb->index, plane, ret);

drivers/media/common/videobuf2/videobuf2-core.c

2480

vb->index, plane, ret);

drivers/media/common/videobuf2/videobuf2-core.c

2491

unsigned int plane = 0;

drivers/media/common/videobuf2/videobuf2-core.c

2520

ret = __find_plane_by_offset(q, offset, &vb, &plane);

drivers/media/common/videobuf2/videobuf2-core.c

2529

length = PAGE_ALIGN(vb->planes[plane].length);

drivers/media/common/videobuf2/videobuf2-core.c

253

vb->planes[plane].mem_priv = mem_priv;

drivers/media/common/videobuf2/videobuf2-core.c

2544

ret = call_memop(vb, mmap, vb->planes[plane].mem_priv, vma);

drivers/media/common/videobuf2/videobuf2-core.c

2551

dprintk(q, 3, "buffer %u, plane %d successfully mapped\n", vb->index, plane);

drivers/media/common/videobuf2/videobuf2-core.c

2565

unsigned int plane;

drivers/media/common/videobuf2/videobuf2-core.c

2575

ret = __find_plane_by_offset(q, offset, &vb, &plane);

drivers/media/common/videobuf2/videobuf2-core.c

2579

vaddr = vb2_plane_vaddr(vb, plane);

drivers/media/common/videobuf2/videobuf2-core.c

259

for (; plane > 0; --plane) {

drivers/media/common/videobuf2/videobuf2-core.c

260

call_void_memop(vb, put, vb->planes[plane - 1].mem_priv);

drivers/media/common/videobuf2/videobuf2-core.c

261

vb->planes[plane - 1].mem_priv = NULL;

drivers/media/common/videobuf2/videobuf2-core.c

272

unsigned int plane;

drivers/media/common/videobuf2/videobuf2-core.c

274

for (plane = 0; plane < vb->num_planes; ++plane) {

drivers/media/common/videobuf2/videobuf2-core.c

275

call_void_memop(vb, put, vb->planes[plane].mem_priv);

drivers/media/common/videobuf2/videobuf2-core.c

276

vb->planes[plane].mem_priv = NULL;

drivers/media/common/videobuf2/videobuf2-core.c

278

plane, vb->index);

drivers/media/common/videobuf2/videobuf2-core.c

288

unsigned int plane;

drivers/media/common/videobuf2/videobuf2-core.c

290

for (plane = 0; plane < vb->num_planes; ++plane) {

drivers/media/common/videobuf2/videobuf2-core.c

291

if (vb->planes[plane].mem_priv)

drivers/media/common/videobuf2/videobuf2-core.c

292

call_void_memop(vb, put_userptr, vb->planes[plane].mem_priv);

drivers/media/common/videobuf2/videobuf2-core.c

293

vb->planes[plane].mem_priv = NULL;

drivers/media/common/videobuf2/videobuf2-core.c

330

int plane;

drivers/media/common/videobuf2/videobuf2-core.c

338

for (plane = vb->num_planes - 1; plane >= 0; --plane)

drivers/media/common/videobuf2/videobuf2-core.c

339

__vb2_plane_dmabuf_put(vb, &vb->planes[plane]);

drivers/media/common/videobuf2/videobuf2-core.c

348

unsigned int plane;

drivers/media/common/videobuf2/videobuf2-core.c

354

for (plane = 0; plane < vb->num_planes; ++plane)

drivers/media/common/videobuf2/videobuf2-core.c

355

call_void_memop(vb, prepare, vb->planes[plane].mem_priv);

drivers/media/common/videobuf2/videobuf2-core.c

364

unsigned int plane;

drivers/media/common/videobuf2/videobuf2-core.c

370

for (plane = 0; plane < vb->num_planes; ++plane)

drivers/media/common/videobuf2/videobuf2-core.c

371

call_void_memop(vb, finish, vb->planes[plane].mem_priv);

drivers/media/common/videobuf2/videobuf2-core.c

381

unsigned int plane;

drivers/media/common/videobuf2/videobuf2-core.c

400

for (plane = 0; plane < vb->num_planes; ++plane) {

drivers/media/common/videobuf2/videobuf2-core.c

401

vb->planes[plane].m.offset = offset + (plane << PAGE_SHIFT);

drivers/media/common/videobuf2/videobuf2-core.c

404

vb->index, plane, offset);

drivers/media/common/videobuf2/videobuf2-core.c

470

unsigned int buffer, plane;

drivers/media/common/videobuf2/videobuf2-core.c

513

for (plane = 0; plane < num_planes; ++plane) {

drivers/media/common/videobuf2/videobuf2-core.c

514

vb->planes[plane].length = plane_sizes[plane];

drivers/media/common/videobuf2/videobuf2-core.c

515

vb->planes[plane].min_length = plane_sizes[plane];

drivers/media/common/videobuf2/videobuf2-core.c

696

unsigned int plane;

drivers/media/common/videobuf2/videobuf2-core.c

697

for (plane = 0; plane < vb->num_planes; ++plane) {

drivers/media/common/videobuf2/videobuf2-core.c

698

void *mem_priv = vb->planes[plane].mem_priv;

drivers/media/common/videobuf2/videobuf2-v4l2.c

105

for (plane = 0; plane < vb->num_planes; ++plane) {

drivers/media/common/videobuf2/videobuf2-v4l2.c

108

? b->m.planes[plane].length

drivers/media/common/videobuf2/videobuf2-v4l2.c

109

: vb->planes[plane].length;

drivers/media/common/videobuf2/videobuf2-v4l2.c

110

bytesused = b->m.planes[plane].bytesused

drivers/media/common/videobuf2/videobuf2-v4l2.c

111

? b->m.planes[plane].bytesused : length;

drivers/media/common/videobuf2/videobuf2-v4l2.c

113

if (b->m.planes[plane].bytesused > length)

drivers/media/common/videobuf2/videobuf2-v4l2.c

116

if (b->m.planes[plane].data_offset > 0 &&

drivers/media/common/videobuf2/videobuf2-v4l2.c

117

b->m.planes[plane].data_offset >= bytesused)

drivers/media/common/videobuf2/videobuf2-v4l2.c

181

unsigned int plane;

drivers/media/common/videobuf2/videobuf2-v4l2.c

209

for (plane = 0; plane < vb->num_planes; ++plane) {

drivers/media/common/videobuf2/videobuf2-v4l2.c

210

planes[plane].m.userptr =

drivers/media/common/videobuf2/videobuf2-v4l2.c

211

b->m.planes[plane].m.userptr;

drivers/media/common/videobuf2/videobuf2-v4l2.c

212

planes[plane].length =

drivers/media/common/videobuf2/videobuf2-v4l2.c

213

b->m.planes[plane].length;

drivers/media/common/videobuf2/videobuf2-v4l2.c

217

for (plane = 0; plane < vb->num_planes; ++plane) {

drivers/media/common/videobuf2/videobuf2-v4l2.c

218

planes[plane].m.fd =

drivers/media/common/videobuf2/videobuf2-v4l2.c

219

b->m.planes[plane].m.fd;

drivers/media/common/videobuf2/videobuf2-v4l2.c

220

planes[plane].length =

drivers/media/common/videobuf2/videobuf2-v4l2.c

221

b->m.planes[plane].length;

drivers/media/common/videobuf2/videobuf2-v4l2.c

225

for (plane = 0; plane < vb->num_planes; ++plane) {

drivers/media/common/videobuf2/videobuf2-v4l2.c

226

planes[plane].m.offset =

drivers/media/common/videobuf2/videobuf2-v4l2.c

227

vb->planes[plane].m.offset;

drivers/media/common/videobuf2/videobuf2-v4l2.c

228

planes[plane].length =

drivers/media/common/videobuf2/videobuf2-v4l2.c

229

vb->planes[plane].length;

drivers/media/common/videobuf2/videobuf2-v4l2.c

252

for (plane = 0; plane < vb->num_planes; ++plane) {

drivers/media/common/videobuf2/videobuf2-v4l2.c

253

struct vb2_plane *pdst = &planes[plane];

drivers/media/common/videobuf2/videobuf2-v4l2.c

254

struct v4l2_plane *psrc = &b->m.planes[plane];

drivers/media/common/videobuf2/videobuf2-v4l2.c

484

unsigned int plane;

drivers/media/common/videobuf2/videobuf2-v4l2.c

506

for (plane = 0; plane < vb->num_planes; ++plane) {

drivers/media/common/videobuf2/videobuf2-v4l2.c

507

struct v4l2_plane *pdst = &b->m.planes[plane];

drivers/media/common/videobuf2/videobuf2-v4l2.c

508

struct vb2_plane *psrc = &vb->planes[plane];

drivers/media/common/videobuf2/videobuf2-v4l2.c

591

unsigned int plane;

drivers/media/common/videobuf2/videobuf2-v4l2.c

596

for (plane = 0; plane < vb->num_planes; ++plane) {

drivers/media/common/videobuf2/videobuf2-v4l2.c

598

planes[plane].m = vbuf->planes[plane].m;

drivers/media/common/videobuf2/videobuf2-v4l2.c

599

planes[plane].length = vbuf->planes[plane].length;

drivers/media/common/videobuf2/videobuf2-v4l2.c

601

planes[plane].bytesused = vbuf->planes[plane].bytesused;

drivers/media/common/videobuf2/videobuf2-v4l2.c

602

planes[plane].data_offset = vbuf->planes[plane].data_offset;

drivers/media/common/videobuf2/videobuf2-v4l2.c

900

eb->plane, eb->flags);

drivers/media/common/videobuf2/videobuf2-v4l2.c

99

unsigned int plane;

drivers/media/platform/amlogic/c3/isp/c3-isp-capture.c

331

struct v4l2_plane_pix_format *plane;

drivers/media/platform/amlogic/c3/isp/c3-isp-capture.c

355

plane = &pix_mp->plane_fmt[i];

drivers/media/platform/amlogic/c3/isp/c3-isp-capture.c

357

plane->bytesperline = DIV_ROUND_UP(pix_mp->width, hdiv) *

drivers/media/platform/amlogic/c3/isp/c3-isp-capture.c

359

plane->bytesperline = ALIGN(plane->bytesperline,

drivers/media/platform/amlogic/c3/isp/c3-isp-capture.c

361

plane->sizeimage = plane->bytesperline *

drivers/media/platform/arm/mali-c55/mali-c55-capture.c

458

enum mali_c55_planes plane)

drivers/media/platform/arm/mali-c55/mali-c55-capture.c

679

struct v4l2_plane_pix_format *plane, *y_plane;

drivers/media/platform/arm/mali-c55/mali-c55-capture.c

714

plane = &pix_mp->plane_fmt[i];

drivers/media/platform/arm/mali-c55/mali-c55-capture.c

716

plane->bytesperline = DIV_ROUND_UP(info->bpp[i] * pix_mp->width,

drivers/media/platform/arm/mali-c55/mali-c55-capture.c

718

plane->sizeimage = DIV_ROUND_UP(plane->bytesperline *

drivers/media/platform/arm/mali-c55/mali-c55-capture.c

724

plane = &pix_mp->plane_fmt[i];

drivers/media/platform/arm/mali-c55/mali-c55-capture.c

725

y_plane->sizeimage += plane->sizeimage;

drivers/media/platform/arm/mali-c55/mali-c55-common.h

291

enum mali_c55_planes plane);

drivers/media/platform/cadence/cdns-csi2rx.c

35

#define CSI2RX_STATIC_CFG_DLANE_MAP(llane, plane) ((plane) << (16 + (llane) * 4))

drivers/media/platform/chips-media/wave5/wave5-vpu-dec.c

1510

u32 plane;

drivers/media/platform/chips-media/wave5/wave5-vpu-dec.c

1515

for (plane = 0; plane < inst->dst_fmt.num_planes; plane++)

drivers/media/platform/chips-media/wave5/wave5-vpu-dec.c

1516

vb2_set_plane_payload(&buf->vb2_buf, plane, 0);

drivers/media/platform/mediatek/mdp3/mtk-mdp3-regs.c

327

u32 bytesperline, unsigned int plane)

drivers/media/platform/mediatek/mdp3/mtk-mdp3-regs.c

334

if (plane == 0)

drivers/media/platform/mediatek/mdp3/mtk-mdp3-regs.c

336

if (plane < MDP_COLOR_GET_PLANE_COUNT(c)) {

drivers/media/platform/mediatek/mdp3/mtk-mdp3-regs.c

346

u32 pix_stride, unsigned int plane)

drivers/media/platform/mediatek/mdp3/mtk-mdp3-regs.c

351

if (plane == 0)

drivers/media/platform/mediatek/mdp3/mtk-mdp3-regs.c

353

if (plane < MDP_COLOR_GET_PLANE_COUNT(c)) {

drivers/media/platform/mediatek/mdp3/mtk-mdp3-regs.c

364

u32 stride, u32 height, unsigned int plane)

drivers/media/platform/mediatek/mdp3/mtk-mdp3-regs.c

371

if (plane == 0)

drivers/media/platform/mediatek/mdp3/mtk-mdp3-regs.c

373

if (plane < MDP_COLOR_GET_PLANE_COUNT(c)) {

drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_req_lat_if.c

1796

int w, h, plane, size;

drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_req_lat_if.c

1799

plane = instance->ctx->q_data[MTK_Q_DATA_DST].fmt->num_planes;

drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_req_lat_if.c

1806

if (plane == 1)

drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_req_lat_if.c

1830

if (plane == 1)

drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp9_req_lat_if.c

1668

int plane;

drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp9_req_lat_if.c

1674

plane = instance->ctx->q_data[MTK_Q_DATA_DST].fmt->num_planes;

drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp9_req_lat_if.c

1681

if (plane == 1)

drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp9_req_lat_if.c

1717

if (plane == 1)

drivers/media/platform/nvidia/tegra-vde/v4l2.c

434

struct v4l2_plane_pix_format *plane;

drivers/media/platform/nvidia/tegra-vde/v4l2.c

456

plane = &pixfmt->plane_fmt[i];

drivers/media/platform/nvidia/tegra-vde/v4l2.c

457

plane->bytesperline = ALIGN(width, VDE_ATOM * 2) / hdiv;

drivers/media/platform/nvidia/tegra-vde/v4l2.c

458

plane->sizeimage = plane->bytesperline * height / vdiv;

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

451

struct v4l2_plane_pix_format *plane = &pix->plane_fmt[i];

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

456

bpl = clamp(plane->bytesperline,

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

462

plane->bytesperline = bpl;

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

464

plane->sizeimage = plane->bytesperline * pix->height;

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

466

plane->sizeimage /= fmt->vsub;

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

476

struct v4l2_plane_pix_format *plane = &pix->plane_fmt[i];

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

478

pix->plane_fmt[0].sizeimage += plane->sizeimage;

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

479

plane->bytesperline = 0;

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

480

plane->sizeimage = 0;

drivers/media/platform/qcom/camss/camss-format.h

15

#define PER_PLANE_DATA(plane, h_fract_num, h_fract_den, v_fract_num, v_fract_den, _bpp) \

drivers/media/platform/qcom/camss/camss-format.h

16

.hsub[(plane)].numerator = (h_fract_num), \

drivers/media/platform/qcom/camss/camss-format.h

17

.hsub[(plane)].denominator = (h_fract_den), \

drivers/media/platform/qcom/camss/camss-format.h

18

.vsub[(plane)].numerator = (v_fract_num), \

drivers/media/platform/qcom/camss/camss-format.h

19

.vsub[(plane)].denominator = (v_fract_den), \

drivers/media/platform/qcom/camss/camss-format.h

20

.bpp[(plane)] = (_bpp)

drivers/media/platform/qcom/camss/camss-vfe-4-1.c

282

static void vfe_get_wm_sizes(struct v4l2_pix_format_mplane *pix, u8 plane,

drivers/media/platform/qcom/camss/camss-vfe-4-1.c

291

if (plane == 1)

drivers/media/platform/qcom/camss/camss-vfe-4-1.c

297

u8 plane, u32 enable)

drivers/media/platform/qcom/camss/camss-vfe-4-1.c

304

vfe_get_wm_sizes(pix, plane, &width, &height, &bytesperline);

drivers/media/platform/qcom/camss/camss-vfe-4-7.c

359

static void vfe_get_wm_sizes(struct v4l2_pix_format_mplane *pix, u8 plane,

drivers/media/platform/qcom/camss/camss-vfe-4-7.c

369

if (plane == 1)

drivers/media/platform/qcom/camss/camss-vfe-4-7.c

380

*bytesperline = pix->plane_fmt[plane].bytesperline;

drivers/media/platform/qcom/camss/camss-vfe-4-7.c

387

u8 plane, u32 enable)

drivers/media/platform/qcom/camss/camss-vfe-4-7.c

394

vfe_get_wm_sizes(pix, plane, &width, &height, &bytesperline);

drivers/media/platform/qcom/camss/camss-vfe-4-8.c

332

static void vfe_get_wm_sizes(struct v4l2_pix_format_mplane *pix, u8 plane,

drivers/media/platform/qcom/camss/camss-vfe-4-8.c

342

if (plane == 1)

drivers/media/platform/qcom/camss/camss-vfe-4-8.c

353

*bytesperline = pix->plane_fmt[plane].bytesperline;

drivers/media/platform/qcom/camss/camss-vfe-4-8.c

360

u8 plane, u32 enable)

drivers/media/platform/qcom/camss/camss-vfe-4-8.c

367

vfe_get_wm_sizes(pix, plane, &width, &height, &bytesperline);

drivers/media/platform/qcom/camss/camss-vfe-gen1.h

49

u8 plane, u32 enable);

drivers/media/platform/qcom/iris/iris_buffer.c

495

void iris_get_internal_buffers(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_buffer.c

502

if (V4L2_TYPE_IS_OUTPUT(plane)) {

drivers/media/platform/qcom/iris/iris_buffer.c

514

if (V4L2_TYPE_IS_OUTPUT(plane)) {

drivers/media/platform/qcom/iris/iris_buffer.c

560

int iris_create_internal_buffers(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_buffer.c

569

if (V4L2_TYPE_IS_OUTPUT(plane)) {

drivers/media/platform/qcom/iris/iris_buffer.c

577

if (V4L2_TYPE_IS_OUTPUT(plane)) {

drivers/media/platform/qcom/iris/iris_buffer.c

636

int iris_queue_internal_buffers(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_buffer.c

646

if (V4L2_TYPE_IS_OUTPUT(plane)) {

drivers/media/platform/qcom/iris/iris_buffer.c

654

if (V4L2_TYPE_IS_OUTPUT(plane)) {

drivers/media/platform/qcom/iris/iris_buffer.c

695

static int iris_destroy_internal_buffers(struct iris_inst *inst, u32 plane, bool force)

drivers/media/platform/qcom/iris/iris_buffer.c

705

if (V4L2_TYPE_IS_OUTPUT(plane)) {

drivers/media/platform/qcom/iris/iris_buffer.c

713

if (V4L2_TYPE_IS_OUTPUT(plane)) {

drivers/media/platform/qcom/iris/iris_buffer.c

755

int iris_destroy_all_internal_buffers(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_buffer.c

757

return iris_destroy_internal_buffers(inst, plane, true);

drivers/media/platform/qcom/iris/iris_buffer.c

760

int iris_destroy_dequeued_internal_buffers(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_buffer.c

762

return iris_destroy_internal_buffers(inst, plane, false);

drivers/media/platform/qcom/iris/iris_buffer.h

111

void iris_get_internal_buffers(struct iris_inst *inst, u32 plane);

drivers/media/platform/qcom/iris/iris_buffer.h

112

int iris_create_internal_buffers(struct iris_inst *inst, u32 plane);

drivers/media/platform/qcom/iris/iris_buffer.h

113

int iris_queue_internal_buffers(struct iris_inst *inst, u32 plane);

drivers/media/platform/qcom/iris/iris_buffer.h

116

int iris_destroy_all_internal_buffers(struct iris_inst *inst, u32 plane);

drivers/media/platform/qcom/iris/iris_buffer.h

117

int iris_destroy_dequeued_internal_buffers(struct iris_inst *inst, u32 plane);

drivers/media/platform/qcom/iris/iris_common.c

201

int iris_session_streamoff(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_common.c

207

switch (plane) {

drivers/media/platform/qcom/iris/iris_common.c

218

ret = hfi_ops->session_stop(inst, plane);

drivers/media/platform/qcom/iris/iris_common.c

222

ret = iris_inst_state_change_streamoff(inst, plane);

drivers/media/platform/qcom/iris/iris_common.h

16

int iris_session_streamoff(struct iris_inst *inst, u32 plane);

drivers/media/platform/qcom/iris/iris_ctrls.c

1480

int iris_set_properties(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_ctrls.c

1487

ret = hfi_ops->session_set_config_params(inst, plane);

drivers/media/platform/qcom/iris/iris_ctrls.h

50

int iris_set_properties(struct iris_inst *inst, u32 plane);

drivers/media/platform/qcom/iris/iris_hfi_common.h

105

int (*handle)(struct iris_inst *inst, u32 plane);

drivers/media/platform/qcom/iris/iris_hfi_common.h

120

int (*session_set_config_params)(struct iris_inst *inst, u32 plane);

drivers/media/platform/qcom/iris/iris_hfi_common.h

122

u32 packet_type, u32 flag, u32 plane, u32 payload_type,

drivers/media/platform/qcom/iris/iris_hfi_common.h

125

int (*session_start)(struct iris_inst *inst, u32 plane);

drivers/media/platform/qcom/iris/iris_hfi_common.h

128

int (*session_pause)(struct iris_inst *inst, u32 plane);

drivers/media/platform/qcom/iris/iris_hfi_common.h

129

int (*session_resume_drc)(struct iris_inst *inst, u32 plane);

drivers/media/platform/qcom/iris/iris_hfi_common.h

130

int (*session_stop)(struct iris_inst *inst, u32 plane);

drivers/media/platform/qcom/iris/iris_hfi_common.h

131

int (*session_drain)(struct iris_inst *inst, u32 plane);

drivers/media/platform/qcom/iris/iris_hfi_common.h

132

int (*session_resume_drain)(struct iris_inst *inst, u32 plane);

drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c

1002

static int iris_hfi_gen1_set_frame_rate(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c

1007

if (V4L2_TYPE_IS_OUTPUT(plane))

drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c

1016

static int iris_hfi_gen1_set_stride(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c

1035

static int iris_hfi_gen1_session_set_config_params(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c

1092

if (V4L2_TYPE_IS_OUTPUT(plane)) {

drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c

1095

} else if (V4L2_TYPE_IS_CAPTURE(plane)) {

drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c

1109

ret = handler[j].handle(inst, plane);

drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c

151

static int iris_hfi_gen1_session_start(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c

157

if (!V4L2_TYPE_IS_OUTPUT(plane))

drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c

188

static int iris_hfi_gen1_session_stop(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c

198

if (V4L2_TYPE_IS_OUTPUT(plane))

drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c

200

else if (V4L2_TYPE_IS_CAPTURE(plane))

drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c

265

static int iris_hfi_gen1_session_continue(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c

453

static int iris_hfi_gen1_session_drain(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c

780

u32 flag, u32 plane, u32 payload_type,

drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c

786

static int iris_hfi_gen1_set_resolution(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c

812

static int iris_hfi_gen1_decide_core(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c

822

static int iris_hfi_gen1_set_raw_format(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c

862

static int iris_hfi_gen1_set_format_constraints(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c

885

static int iris_hfi_gen1_set_num_bufs(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c

932

static int iris_hfi_gen1_set_multistream(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c

967

static int iris_hfi_gen1_set_bufsize(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

103

switch (plane) {

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

1054

static int iris_hfi_gen2_subscribe_property(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

1066

if (V4L2_TYPE_IS_OUTPUT(plane)) {

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

1099

plane,

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

1105

static int iris_hfi_gen2_session_start(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

1110

ret = iris_hfi_gen2_subscribe_change_param(inst, plane);

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

1114

ret = iris_hfi_gen2_subscribe_property(inst, plane);

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

1122

iris_hfi_gen2_get_port(inst, plane),

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

1132

static int iris_hfi_gen2_session_stop(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

1147

iris_hfi_gen2_get_port(inst, plane),

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

1161

static int iris_hfi_gen2_session_pause(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

1169

iris_hfi_gen2_get_port(inst, plane),

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

1179

static int iris_hfi_gen2_session_resume_drc(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

1188

iris_hfi_gen2_get_port(inst, plane),

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

1198

static int iris_hfi_gen2_session_resume_drain(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

1207

iris_hfi_gen2_get_port(inst, plane),

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

1217

static int iris_hfi_gen2_session_drain(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

1221

if (!V4L2_TYPE_IS_OUTPUT(plane))

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

1229

iris_hfi_gen2_get_port(inst, plane),

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

153

u32 plane, u32 payload_type, void *payload,

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

161

plane,

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

170

static int iris_hfi_gen2_set_raw_resolution(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

173

u32 port = iris_hfi_gen2_get_port(inst, plane);

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

191

static int iris_hfi_gen2_set_bitstream_resolution(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

194

u32 port = iris_hfi_gen2_get_port(inst, plane);

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

227

static int iris_hfi_gen2_set_crop_offsets(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

230

u32 port = iris_hfi_gen2_get_port(inst, plane);

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

236

if (V4L2_TYPE_IS_OUTPUT(plane)) {

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

249

if (V4L2_TYPE_IS_OUTPUT(plane)) {

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

285

static int iris_hfi_gen2_set_bit_depth(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

288

u32 port = iris_hfi_gen2_get_port(inst, plane);

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

302

static int iris_hfi_gen2_set_coded_frames(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

305

u32 port = iris_hfi_gen2_get_port(inst, plane);

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

321

static int iris_hfi_gen2_set_min_output_count(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

325

u32 port = iris_hfi_gen2_get_port(inst, plane);

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

338

static int iris_hfi_gen2_set_picture_order_count(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

341

u32 port = iris_hfi_gen2_get_port(inst, plane);

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

355

static int iris_hfi_gen2_set_colorspace(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

364

u32 port = iris_hfi_gen2_get_port(inst, plane);

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

398

static int iris_hfi_gen2_set_profile(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

430

static int iris_hfi_gen2_set_level(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

462

static int iris_hfi_gen2_set_opb_enable(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

464

u32 port = iris_hfi_gen2_get_port(inst, plane);

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

476

static int iris_hfi_gen2_set_colorformat(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

478

u32 port = iris_hfi_gen2_get_port(inst, plane);

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

512

static int iris_hfi_gen2_set_linear_stride_scanline(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

515

u32 port = iris_hfi_gen2_get_port(inst, plane);

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

547

static int iris_hfi_gen2_set_ubwc_stride_scanline(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

551

u32 port = iris_hfi_gen2_get_port(inst, plane);

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

602

static int iris_hfi_gen2_set_tier(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

621

static int iris_hfi_gen2_set_frame_rate(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

635

static int iris_hfi_gen2_set_film_grain(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

652

static int iris_hfi_gen2_set_super_block(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

669

static int iris_hfi_gen2_session_set_config_params(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

699

if (V4L2_TYPE_IS_OUTPUT(plane)) {

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

720

if (V4L2_TYPE_IS_OUTPUT(plane)) {

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

735

ret = prop_type_handle_arr[j].handle(inst, plane);

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

878

u32 cmd, u32 plane, u32 payload_type,

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

887

iris_hfi_gen2_get_port(inst, plane),

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

897

static int iris_hfi_gen2_subscribe_change_param(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

91

static u32 iris_hfi_gen2_get_port(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

912

if ((V4L2_TYPE_IS_OUTPUT(plane) && inst_hfi_gen2->ipsc_properties_set) ||

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

913

(V4L2_TYPE_IS_CAPTURE(plane) && inst_hfi_gen2->opsc_properties_set)) {

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

914

dev_dbg(core->dev, "%cPSC already set\n", V4L2_TYPE_IS_OUTPUT(plane) ? 'I' : 'O');

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

94

switch (plane) {

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

948

plane,

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

955

if (V4L2_TYPE_IS_OUTPUT(plane)) {

drivers/media/platform/qcom/iris/iris_state.c

228

int iris_inst_sub_state_change_pause(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_state.c

232

if (V4L2_TYPE_IS_OUTPUT(plane)) {

drivers/media/platform/qcom/iris/iris_state.c

70

int iris_inst_state_change_streamon(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_state.c

74

if (V4L2_TYPE_IS_OUTPUT(plane)) {

drivers/media/platform/qcom/iris/iris_state.c

79

} else if (V4L2_TYPE_IS_CAPTURE(plane)) {

drivers/media/platform/qcom/iris/iris_state.c

89

int iris_inst_state_change_streamoff(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_state.c

93

if (V4L2_TYPE_IS_OUTPUT(plane)) {

drivers/media/platform/qcom/iris/iris_state.c

98

} else if (V4L2_TYPE_IS_CAPTURE(plane)) {

drivers/media/platform/qcom/iris/iris_state.h

136

int iris_inst_state_change_streamon(struct iris_inst *inst, u32 plane);

drivers/media/platform/qcom/iris/iris_state.h

137

int iris_inst_state_change_streamoff(struct iris_inst *inst, u32 plane);

drivers/media/platform/qcom/iris/iris_state.h

141

int iris_inst_sub_state_change_pause(struct iris_inst *inst, u32 plane);

drivers/media/platform/qcom/iris/iris_vidc.c

244

static void iris_check_num_queued_internal_buffers(struct iris_inst *inst, u32 plane)

drivers/media/platform/qcom/iris/iris_vidc.c

253

if (V4L2_TYPE_IS_OUTPUT(plane)) {

drivers/media/platform/renesas/renesas-ceu.c

559

static void ceu_update_plane_sizes(struct v4l2_plane_pix_format *plane,

drivers/media/platform/renesas/renesas-ceu.c

562

memset(plane, 0, sizeof(*plane));

drivers/media/platform/renesas/renesas-ceu.c

564

plane->sizeimage = szimage;

drivers/media/platform/renesas/renesas-ceu.c

565

if (plane->bytesperline < bpl || plane->bytesperline > CEU_MAX_BPL)

drivers/media/platform/renesas/renesas-ceu.c

566

plane->bytesperline = bpl;

drivers/media/platform/rockchip/rga/rga-buf.c

107

int plane)

drivers/media/platform/rockchip/rga/rga-buf.c

111

if (plane == 0)

drivers/media/platform/rockchip/rga/rga-buf.c

113

if (plane == 1)

drivers/media/platform/rockchip/rga/rga-buf.c

115

if (plane == 2)

drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c

1240

struct v4l2_plane_pix_format *plane = &pixm->plane_fmt[i];

drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c

1243

plane->bytesperline = DIV_ROUND_UP(stride, info->hdiv) *

drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c

1245

plane->sizeimage = plane->bytesperline *

drivers/media/platform/samsung/exynos-gsc/gsc-core.h

393

u32 get_plane_size(struct gsc_frame *fr, unsigned int plane);

drivers/media/platform/samsung/exynos4-is/fimc-capture.c

221

unsigned int plane = ffs(f->fmt->mdataplanes) - 1;

drivers/media/platform/samsung/exynos4-is/fimc-capture.c

222

unsigned int size = f->payload[plane];

drivers/media/platform/samsung/exynos4-is/fimc-capture.c

229

vaddr = vb2_plane_vaddr(&v_buf->vb.vb2_buf, plane);

drivers/media/platform/samsung/exynos4-is/fimc-is-param.c

702

isp->dma1_input.plane = 0;

drivers/media/platform/samsung/exynos4-is/fimc-is-param.c

714

isp->dma2_input.plane = 0;

drivers/media/platform/samsung/exynos4-is/fimc-is-param.c

777

isp->dma1_output.plane = 0;

drivers/media/platform/samsung/exynos4-is/fimc-is-param.c

793

isp->dma2_output.plane = 0;

drivers/media/platform/samsung/exynos4-is/fimc-is-param.c

829

drc->dma_input.plane = 0;

drivers/media/platform/samsung/exynos4-is/fimc-is-param.c

868

fd->dma_input.plane = 0;

drivers/media/platform/samsung/exynos4-is/fimc-is-param.h

482

u32 plane;

drivers/media/platform/samsung/exynos4-is/fimc-is-param.h

507

u32 plane;

drivers/media/platform/samsung/exynos4-is/fimc-isp-video.c

430

dma->plane = ifmt->memplanes;

drivers/media/platform/sunxi/sun4i-csi/sun4i_dma.c

102

for (plane = 0; plane < csi->fmt.num_planes; plane++) {

drivers/media/platform/sunxi/sun4i-csi/sun4i_dma.c

103

writel(addr, csi->regs + CSI_BUF_ADDR_REG(plane, slot));

drivers/media/platform/sunxi/sun4i-csi/sun4i_dma.c

104

addr += csi->fmt.plane_fmt[plane].sizeimage;

drivers/media/platform/sunxi/sun4i-csi/sun4i_dma.c

115

unsigned int plane;

drivers/media/platform/sunxi/sun4i-csi/sun4i_dma.c

133

for (plane = 0; plane < csi->fmt.num_planes; plane++) {

drivers/media/platform/sunxi/sun4i-csi/sun4i_dma.c

137

plane);

drivers/media/platform/sunxi/sun4i-csi/sun4i_dma.c

138

writel(buf_addr, csi->regs + CSI_BUF_ADDR_REG(plane, slot));

drivers/media/platform/sunxi/sun4i-csi/sun4i_dma.c

97

unsigned int plane;

drivers/media/platform/ti/vpe/vip.c

644

int channel, plane = 0;

drivers/media/platform/ti/vpe/vip.c

661

plane = 1;

drivers/media/platform/ti/vpe/vip.c

739

fmt->vpdma_fmt[plane], dma_addr,

drivers/media/platform/ti/vpe/vpe.c

1043

int plane = fmt->coplanar ? p_data->vb_part : 0;

drivers/media/platform/ti/vpe/vpe.c

1046

vpdma_fmt = fmt->vpdma_fmt[plane];

drivers/media/platform/ti/vpe/vpe.c

1051

if (pix->num_planes == 1 && plane) {

drivers/media/platform/ti/vpe/vpe.c

1056

dma_addr = vb2_dma_contig_plane_dma_addr(vb, plane);

drivers/media/platform/ti/vpe/vpe.c

1110

int plane = fmt->coplanar ? p_data->vb_part : 0;

drivers/media/platform/ti/vpe/vpe.c

1112

vpdma_fmt = fmt->vpdma_fmt[plane];

drivers/media/platform/ti/vpe/vpe.c

1117

if (pix->num_planes == 1 && plane) {

drivers/media/platform/ti/vpe/vpe.c

1122

dma_addr = vb2_dma_contig_plane_dma_addr(vb, plane);

drivers/media/platform/ti/vpe/vpe.c

1163

if (plane)

drivers/media/test-drivers/vicodec/vicodec-core.c

832

struct v4l2_plane_pix_format *plane;

drivers/media/test-drivers/vicodec/vicodec-core.c

861

plane = pix_mp->plane_fmt;

drivers/media/test-drivers/vicodec/vicodec-core.c

875

plane->bytesperline =

drivers/media/test-drivers/vicodec/vicodec-core.c

877

plane->sizeimage = pix_mp->width * pix_mp->height *

drivers/media/test-drivers/vicodec/vicodec-core.c

880

plane->sizeimage += sizeof(struct fwht_cframe_hdr);

drivers/media/v4l2-core/v4l2-common.c

420

static inline unsigned int v4l2_format_block_width(const struct v4l2_format_info *info, int plane)

drivers/media/v4l2-core/v4l2-common.c

422

if (!info->block_w[plane])

drivers/media/v4l2-core/v4l2-common.c

424

return info->block_w[plane];

drivers/media/v4l2-core/v4l2-common.c

427

static inline unsigned int v4l2_format_block_height(const struct v4l2_format_info *info, int plane)

drivers/media/v4l2-core/v4l2-common.c

429

if (!info->block_h[plane])

drivers/media/v4l2-core/v4l2-common.c

431

return info->block_h[plane];

drivers/media/v4l2-core/v4l2-common.c

434

static inline unsigned int v4l2_format_plane_stride(const struct v4l2_format_info *info, int plane,

drivers/media/v4l2-core/v4l2-common.c

437

unsigned int hdiv = plane ? info->hdiv : 1;

drivers/media/v4l2-core/v4l2-common.c

439

ALIGN(width, v4l2_format_block_width(info, plane));

drivers/media/v4l2-core/v4l2-common.c

453

if (plane == 0)

drivers/media/v4l2-core/v4l2-common.c

459

return ALIGN(DIV_ROUND_UP(aligned_width, hdiv) * info->bpp[plane] /

drivers/media/v4l2-core/v4l2-common.c

460

info->bpp_div[plane],

drivers/media/v4l2-core/v4l2-common.c

464

static inline unsigned int v4l2_format_plane_height(const struct v4l2_format_info *info, int plane,

drivers/media/v4l2-core/v4l2-common.c

467

unsigned int vdiv = plane ? info->vdiv : 1;

drivers/media/v4l2-core/v4l2-common.c

469

ALIGN(height, v4l2_format_block_height(info, plane));

drivers/media/v4l2-core/v4l2-common.c

474

static inline unsigned int v4l2_format_plane_size(const struct v4l2_format_info *info, int plane,

drivers/media/v4l2-core/v4l2-common.c

478

return v4l2_format_plane_stride(info, plane, width, stride_alignment) *

drivers/media/v4l2-core/v4l2-common.c

479

v4l2_format_plane_height(info, plane, height);

drivers/media/v4l2-core/v4l2-common.c

504

struct v4l2_plane_pix_format *plane;

drivers/media/v4l2-core/v4l2-common.c

517

plane = &pixfmt->plane_fmt[0];

drivers/media/v4l2-core/v4l2-common.c

518

plane->bytesperline = v4l2_format_plane_stride(info, 0, width,

drivers/media/v4l2-core/v4l2-common.c

520

plane->sizeimage = 0;

drivers/media/v4l2-core/v4l2-common.c

523

plane->sizeimage +=

drivers/media/v4l2-core/v4l2-common.c

528

plane = &pixfmt->plane_fmt[i];

drivers/media/v4l2-core/v4l2-common.c

529

plane->bytesperline =

drivers/media/v4l2-core/v4l2-common.c

532

plane->sizeimage = plane->bytesperline *

drivers/media/v4l2-core/v4l2-ioctl.c

442

const struct v4l2_plane *plane;

drivers/media/v4l2-core/v4l2-ioctl.c

458

plane = &p->m.planes[i];

drivers/media/v4l2-core/v4l2-ioctl.c

461

i, plane->bytesused, plane->data_offset,

drivers/media/v4l2-core/v4l2-ioctl.c

462

plane->m.userptr, plane->length);

drivers/media/v4l2-core/v4l2-ioctl.c

480

p->index, p->plane, p->flags);

drivers/mtd/nand/spi/core.c

1257

unsigned int plane)

drivers/mtd/nand/spi/core.c

1281

info.offset = plane << fls(nand->memorg.pagesize);

drivers/mtd/nand/spi/core.c

1292

spinand->dirmaps[plane].wdesc = desc;

drivers/mtd/nand/spi/core.c

1305

spinand->dirmaps[plane].rdesc = desc;

drivers/mtd/nand/spi/core.c

504

rdesc = spinand->dirmaps[req->pos.plane].rdesc;

drivers/mtd/nand/spi/core.c

518

column |= req->pos.plane << fls(nanddev_page_size(nand));

drivers/mtd/nand/spi/core.c

604

wdesc = spinand->dirmaps[req->pos.plane].wdesc;

drivers/mtd/nand/spi/core.c

613

column |= req->pos.plane << fls(nanddev_page_size(nand));

drivers/staging/media/atomisp/pci/runtime/frame/src/frame.c

24

static void frame_init_plane(struct ia_css_frame_plane *plane,

drivers/staging/media/atomisp/pci/runtime/frame/src/frame.c

31

struct ia_css_frame_plane *plane,

drivers/staging/media/atomisp/pci/runtime/frame/src/frame.c

38

struct ia_css_frame_plane *plane,

drivers/staging/media/atomisp/pci/runtime/frame/src/frame.c

442

static void frame_init_plane(struct ia_css_frame_plane *plane,

drivers/staging/media/atomisp/pci/runtime/frame/src/frame.c

448

plane->height = height;

drivers/staging/media/atomisp/pci/runtime/frame/src/frame.c

449

plane->width = width;

drivers/staging/media/atomisp/pci/runtime/frame/src/frame.c

450

plane->stride = stride;

drivers/staging/media/atomisp/pci/runtime/frame/src/frame.c

451

plane->offset = offset;

drivers/staging/media/atomisp/pci/runtime/frame/src/frame.c

455

struct ia_css_frame_plane *plane,

drivers/staging/media/atomisp/pci/runtime/frame/src/frame.c

472

frame_init_plane(plane, subpixels_per_line, stride, height, 0);

drivers/staging/media/atomisp/pci/runtime/frame/src/frame.c

477

struct ia_css_frame_plane *plane,

drivers/staging/media/atomisp/pci/runtime/frame/src/frame.c

490

frame_init_plane(plane, subpixels_per_line, stride, height, 0);

drivers/staging/media/meson/vdec/codec_vp9.c

1546

int plane, coef_plane_start, coef_count_plane_start;

drivers/staging/media/meson/vdec/codec_vp9.c

1578

for (plane = 0 ; plane < 2 ; plane++) {

drivers/staging/media/sunxi/cedrus/cedrus.h

230

unsigned int plane)

drivers/staging/media/sunxi/cedrus/cedrus.h

235

pix_fmt->height * plane : 0);

drivers/staging/media/sunxi/cedrus/cedrus.h

240

unsigned int plane)

drivers/staging/media/sunxi/cedrus/cedrus.h

242

return buf ? cedrus_buf_addr(buf, &ctx->dst_fmt, plane) : 0;

drivers/video/fbdev/au1200fb.c

1041

int screen_size, plane;

drivers/video/fbdev/au1200fb.c

1046

plane = fbdev->plane;

drivers/video/fbdev/au1200fb.c

1050

var->xres = win->w[plane].xres;

drivers/video/fbdev/au1200fb.c

1051

var->yres = win->w[plane].yres;

drivers/video/fbdev/au1200fb.c

1057

var->bits_per_pixel = winbpp(win->w[plane].mode_winctrl1);

drivers/video/fbdev/au1200fb.c

1293

static void set_window(unsigned int plane,

drivers/video/fbdev/au1200fb.c

1300

val = lcd->window[plane].winctrl0 & ~(LCD_WINCTRL0_OX |

drivers/video/fbdev/au1200fb.c

1304

lcd->window[plane].winctrl0 = val;

drivers/video/fbdev/au1200fb.c

1307

val = lcd->window[plane].winctrl0 & ~(LCD_WINCTRL0_A);

drivers/video/fbdev/au1200fb.c

1309

lcd->window[plane].winctrl0 = val;

drivers/video/fbdev/au1200fb.c

1312

val = lcd->window[plane].winctrl0 & ~(LCD_WINCTRL0_AEN);

drivers/video/fbdev/au1200fb.c

1314

lcd->window[plane].winctrl0 = val;

drivers/video/fbdev/au1200fb.c

1319

val = lcd->window[plane].winctrl1 & ~(LCD_WINCTRL1_PRI);

drivers/video/fbdev/au1200fb.c

1321

lcd->window[plane].winctrl1 = val;

drivers/video/fbdev/au1200fb.c

1324

val = lcd->window[plane].winctrl1 & ~(LCD_WINCTRL1_PIPE);

drivers/video/fbdev/au1200fb.c

1326

lcd->window[plane].winctrl1 = val;

drivers/video/fbdev/au1200fb.c

1329

val = lcd->window[plane].winctrl1 & ~(LCD_WINCTRL1_FRM);

drivers/video/fbdev/au1200fb.c

1331

lcd->window[plane].winctrl1 = val;

drivers/video/fbdev/au1200fb.c

1334

val = lcd->window[plane].winctrl1 & ~(LCD_WINCTRL1_CCO);

drivers/video/fbdev/au1200fb.c

1336

lcd->window[plane].winctrl1 = val;

drivers/video/fbdev/au1200fb.c

1339

val = lcd->window[plane].winctrl1 & ~(LCD_WINCTRL1_PO);

drivers/video/fbdev/au1200fb.c

1341

lcd->window[plane].winctrl1 = val;

drivers/video/fbdev/au1200fb.c

1344

val = lcd->window[plane].winctrl1 & ~(LCD_WINCTRL1_SZX |

drivers/video/fbdev/au1200fb.c

1348

lcd->window[plane].winctrl1 = val;

drivers/video/fbdev/au1200fb.c

1351

val = lcd->window[plane].winctrl2 & ~(LCD_WINCTRL2_BX);

drivers/video/fbdev/au1200fb.c

1353

lcd->window[plane].winctrl2 = val;

drivers/video/fbdev/au1200fb.c

1358

val = lcd->window[plane].winctrl2 & ~(LCD_WINCTRL2_CKMODE);

drivers/video/fbdev/au1200fb.c

1360

lcd->window[plane].winctrl2 = val;

drivers/video/fbdev/au1200fb.c

1363

val = lcd->window[plane].winctrl2 & ~(LCD_WINCTRL2_DBM);

drivers/video/fbdev/au1200fb.c

1365

lcd->window[plane].winctrl2 = val;

drivers/video/fbdev/au1200fb.c

1368

val = lcd->window[plane].winctrl2 & ~(LCD_WINCTRL2_RAM);

drivers/video/fbdev/au1200fb.c

1370

lcd->window[plane].winctrl2 = val;

drivers/video/fbdev/au1200fb.c

1376

val = lcd->window[plane].winctrl2 & ~(LCD_WINCTRL2_SCX |

drivers/video/fbdev/au1200fb.c

1380

lcd->window[plane].winctrl2 = val;

drivers/video/fbdev/au1200fb.c

1385

val &= ~(1<<plane);

drivers/video/fbdev/au1200fb.c

1386

val |= (pdata->enable & 1) << plane;

drivers/video/fbdev/au1200fb.c

1392

static void get_window(unsigned int plane,

drivers/video/fbdev/au1200fb.c

1396

pdata->xpos = (lcd->window[plane].winctrl0 & LCD_WINCTRL0_OX) >> 21;

drivers/video/fbdev/au1200fb.c

1397

pdata->ypos = (lcd->window[plane].winctrl0 & LCD_WINCTRL0_OY) >> 10;

drivers/video/fbdev/au1200fb.c

1398

pdata->alpha_color = (lcd->window[plane].winctrl0 & LCD_WINCTRL0_A) >> 2;

drivers/video/fbdev/au1200fb.c

1399

pdata->alpha_mode = (lcd->window[plane].winctrl0 & LCD_WINCTRL0_AEN) >> 1;

drivers/video/fbdev/au1200fb.c

1402

pdata->priority = (lcd->window[plane].winctrl1& LCD_WINCTRL1_PRI) >> 30;

drivers/video/fbdev/au1200fb.c

1403

pdata->channel = (lcd->window[plane].winctrl1 & LCD_WINCTRL1_PIPE) >> 29;

drivers/video/fbdev/au1200fb.c

1404

pdata->buffer_format = (lcd->window[plane].winctrl1 & LCD_WINCTRL1_FRM) >> 25;

drivers/video/fbdev/au1200fb.c

1405

pdata->color_order = (lcd->window[plane].winctrl1 & LCD_WINCTRL1_CCO) >> 24;

drivers/video/fbdev/au1200fb.c

1406

pdata->pixel_order = (lcd->window[plane].winctrl1 & LCD_WINCTRL1_PO) >> 22;

drivers/video/fbdev/au1200fb.c

1407

pdata->xsize = ((lcd->window[plane].winctrl1 & LCD_WINCTRL1_SZX) >> 11) + 1;

drivers/video/fbdev/au1200fb.c

1408

pdata->ysize = (lcd->window[plane].winctrl1 & LCD_WINCTRL1_SZY) + 1;

drivers/video/fbdev/au1200fb.c

1411

pdata->colorkey_mode = (lcd->window[plane].winctrl2 & LCD_WINCTRL2_CKMODE) >> 24;

drivers/video/fbdev/au1200fb.c

1412

pdata->double_buffer_mode = (lcd->window[plane].winctrl2 & LCD_WINCTRL2_DBM) >> 23;

drivers/video/fbdev/au1200fb.c

1413

pdata->ram_array_mode = (lcd->window[plane].winctrl2 & LCD_WINCTRL2_RAM) >> 21;

drivers/video/fbdev/au1200fb.c

1415

pdata->enable = (lcd->winenable >> plane) & 1;

drivers/video/fbdev/au1200fb.c

1423

int plane;

drivers/video/fbdev/au1200fb.c

1426

plane = fbinfo2index(info);

drivers/video/fbdev/au1200fb.c

1427

print_dbg("au1200fb: ioctl %d on plane %d\n", cmd, plane);

drivers/video/fbdev/au1200fb.c

1450

set_window(plane, &iodata.window);

drivers/video/fbdev/au1200fb.c

1455

get_window(plane, &iodata.window);

drivers/video/fbdev/au1200fb.c

152

int plane;

drivers/video/fbdev/au1200fb.c

1526

bpp = winbpp(win->w[fbdev->plane].mode_winctrl1);

drivers/video/fbdev/au1200fb.c

1653

int bpp, plane, ret, irq;

drivers/video/fbdev/au1200fb.c

1672

for (plane = 0; plane < device_count; ++plane) {

drivers/video/fbdev/au1200fb.c

1673

bpp = winbpp(win->w[plane].mode_winctrl1);

drivers/video/fbdev/au1200fb.c

1674

if (win->w[plane].xres == 0)

drivers/video/fbdev/au1200fb.c

1675

win->w[plane].xres = panel->Xres;

drivers/video/fbdev/au1200fb.c

1676

if (win->w[plane].yres == 0)

drivers/video/fbdev/au1200fb.c

1677

win->w[plane].yres = panel->Yres;

drivers/video/fbdev/au1200fb.c

1686

_au1200fb_infos[plane] = fbi;

drivers/video/fbdev/au1200fb.c

1692

fbdev->plane = plane;

drivers/video/fbdev/au1200fb.c

1695

fbdev->fb_len = (win->w[plane].xres * win->w[plane].yres * bpp) / 8;

drivers/video/fbdev/au1200fb.c

1748

for (plane = 0; plane < device_count; ++plane) {

drivers/video/fbdev/au1200fb.c

1749

fbi = _au1200fb_infos[plane];

drivers/video/fbdev/au1200fb.c

1760

_au1200fb_infos[plane] = NULL;

drivers/video/fbdev/au1200fb.c

1769

int plane;

drivers/video/fbdev/au1200fb.c

1774

for (plane = 0; plane < device_count; ++plane) {

drivers/video/fbdev/au1200fb.c

1775

fbi = _au1200fb_infos[plane];

drivers/video/fbdev/au1200fb.c

1784

_au1200fb_infos[plane] = NULL;

drivers/video/fbdev/au1200fb.c

702

static int au1200_setlocation (struct au1200fb_device *fbdev, int plane,

drivers/video/fbdev/au1200fb.c

710

winctrl0 = lcd->window[plane].winctrl0;

drivers/video/fbdev/au1200fb.c

711

winctrl1 = lcd->window[plane].winctrl1;

drivers/video/fbdev/au1200fb.c

716

xsz = win->w[plane].xres;

drivers/video/fbdev/au1200fb.c

717

ysz = win->w[plane].yres;

drivers/video/fbdev/au1200fb.c

718

if ((xpos + win->w[plane].xres) > panel->Xres) {

drivers/video/fbdev/au1200fb.c

724

if ((ypos + win->w[plane].yres) > panel->Yres) {

drivers/video/fbdev/au1200fb.c

732

xsz = win->w[plane].xres + xpos;

drivers/video/fbdev/au1200fb.c

733

fb_offset += (((0 - xpos) * winbpp(lcd->window[plane].winctrl1))/8);

drivers/video/fbdev/au1200fb.c

740

ysz = win->w[plane].yres + ypos;

drivers/video/fbdev/au1200fb.c

747

win->w[plane].xpos = xpos;

drivers/video/fbdev/au1200fb.c

748

win->w[plane].ypos = ypos;

drivers/video/fbdev/au1200fb.c

758

winenable = lcd->winenable & (1 << plane);

drivers/video/fbdev/au1200fb.c

760

lcd->winenable &= ~(1 << plane);

drivers/video/fbdev/au1200fb.c

761

lcd->window[plane].winctrl0 = winctrl0;

drivers/video/fbdev/au1200fb.c

762

lcd->window[plane].winctrl1 = winctrl1;

drivers/video/fbdev/au1200fb.c

763

lcd->window[plane].winbuf0 =

drivers/video/fbdev/au1200fb.c

764

lcd->window[plane].winbuf1 = fbdev->fb_phys;

drivers/video/fbdev/au1200fb.c

765

lcd->window[plane].winbufctrl = 0; /* select winbuf0 */

drivers/video/fbdev/au1200fb.c

939

int plane = fbdev->plane;

drivers/video/fbdev/au1200fb.c

941

lcd->window[plane].winctrl1 = ( 0

drivers/video/fbdev/au1200fb.c

942

| LCD_WINCTRL1_PRI_N(plane)

drivers/video/fbdev/au1200fb.c

943

| win->w[plane].mode_winctrl1 /* FRM,CCO,PO,PIPE */

drivers/video/fbdev/au1200fb.c

946

au1200_setlocation(fbdev, plane, win->w[plane].xpos, win->w[plane].ypos);

drivers/video/fbdev/au1200fb.c

948

lcd->window[plane].winctrl2 = ( 0

drivers/video/fbdev/au1200fb.c

955

lcd->winenable |= win->w[plane].mode_winenable;

drivers/video/fbdev/omap/hwa742.c

526

static int hwa742_setup_plane(int plane, int channel_out,

drivers/video/fbdev/omap/hwa742.c

531

if (plane != OMAPFB_PLANE_GFX ||

drivers/video/fbdev/omap/hwa742.c

538

static int hwa742_enable_plane(int plane, int enable)

drivers/video/fbdev/omap/hwa742.c

540

if (plane != 0)

drivers/video/fbdev/omap/hwa742.c

543

hwa742.int_ctrl->enable_plane(plane, enable);

drivers/video/fbdev/omap/hwa742.c

898

static void hwa742_get_caps(int plane, struct omapfb_caps *caps)

drivers/video/fbdev/omap/hwa742.c

900

hwa742.int_ctrl->get_caps(plane, caps);

drivers/video/fbdev/omap/lcdc.c

175

struct omapfb_plane_struct *plane = lcdc.fbdev->fb_info[0]->par;

drivers/video/fbdev/omap/lcdc.c

184

if (plane->info.mirror || (src & 3) ||

drivers/video/fbdev/omap/lcdc.c

227

omap_set_lcd_dma_b1_mirror(plane->info.mirror);

drivers/video/fbdev/omap/lcdc.c

282

static int omap_lcdc_setup_plane(int plane, int channel_out,

drivers/video/fbdev/omap/lcdc.c

298

if (plane != 0 || channel_out != 0 || pos_x != 0 || pos_y != 0 ||

drivers/video/fbdev/omap/lcdc.c

303

"w %d h %d\n", plane, pos_x, pos_y, width, height);

drivers/video/fbdev/omap/lcdc.c

369

static int omap_lcdc_enable_plane(int plane, int enable)

drivers/video/fbdev/omap/lcdc.c

373

plane, enable, lcdc.update_mode, lcdc.ext_mode);

drivers/video/fbdev/omap/lcdc.c

374

if (plane != OMAPFB_PLANE_GFX)

drivers/video/fbdev/omap/lcdc.c

573

static void omap_lcdc_get_caps(int plane, struct omapfb_caps *caps)

drivers/video/fbdev/omap/omapfb.h

150

void (*get_caps) (int plane, struct omapfb_caps *caps);

drivers/video/fbdev/omap/omapfb.h

153

int (*setup_plane) (int plane, int channel_out,

drivers/video/fbdev/omap/omapfb.h

159

int (*setup_mem) (int plane, size_t size,

drivers/video/fbdev/omap/omapfb.h

163

int (*set_scale) (int plane,

drivers/video/fbdev/omap/omapfb.h

166

int (*enable_plane) (int plane, int enable);

drivers/video/fbdev/omap/omapfb_main.c

1019

static void omapfb_get_caps(struct omapfb_device *fbdev, int plane,

drivers/video/fbdev/omap/omapfb_main.c

1023

fbdev->ctrl->get_caps(plane, caps);

drivers/video/fbdev/omap/omapfb_main.c

1054

struct omapfb_plane_struct *plane = fbi->par;

drivers/video/fbdev/omap/omapfb_main.c

1055

struct omapfb_device *fbdev = plane->fbdev;

drivers/video/fbdev/omap/omapfb_main.c

1159

omapfb_get_caps(fbdev, plane->idx, &p.caps);

drivers/video/fbdev/omap/omapfb_main.c

1202

struct omapfb_plane_struct *plane = info->par;

drivers/video/fbdev/omap/omapfb_main.c

1203

struct omapfb_device *fbdev = plane->fbdev;

drivers/video/fbdev/omap/omapfb_main.c

1243

int plane;

drivers/video/fbdev/omap/omapfb_main.c

1247

plane = 0;

drivers/video/fbdev/omap/omapfb_main.c

1248

while (plane < OMAPFB_PLANE_NUM) {

drivers/video/fbdev/omap/omapfb_main.c

1249

omapfb_get_caps(fbdev, plane, &caps);

drivers/video/fbdev/omap/omapfb_main.c

1252

plane, caps.ctrl, caps.plane_color, caps.wnd_color);

drivers/video/fbdev/omap/omapfb_main.c

1253

plane++;

drivers/video/fbdev/omap/omapfb_main.c

1264

int plane;

drivers/video/fbdev/omap/omapfb_main.c

1267

plane = 0;

drivers/video/fbdev/omap/omapfb_main.c

1268

while (plane < OMAPFB_PLANE_NUM) {

drivers/video/fbdev/omap/omapfb_main.c

1269

omapfb_get_caps(fbdev, plane, &caps);

drivers/video/fbdev/omap/omapfb_main.c

1270

size += sysfs_emit_at(buf, size, "plane#%d:\n", plane);

drivers/video/fbdev/omap/omapfb_main.c

1289

plane++;

drivers/video/fbdev/omap/omapfb_main.c

1494

struct omapfb_plane_struct *plane;

drivers/video/fbdev/omap/omapfb_main.c

1501

plane = fbi->par;

drivers/video/fbdev/omap/omapfb_main.c

1502

plane->idx = i;

drivers/video/fbdev/omap/omapfb_main.c

1503

plane->fbdev = fbdev;

drivers/video/fbdev/omap/omapfb_main.c

1504

plane->info.mirror = def_mirror;

drivers/video/fbdev/omap/omapfb_main.c

1512

plane->info.out_width = fbi->var.xres;

drivers/video/fbdev/omap/omapfb_main.c

1513

plane->info.out_height = fbi->var.yres;

drivers/video/fbdev/omap/omapfb_main.c

181

struct omapfb_plane_struct *plane = fbi->par;

drivers/video/fbdev/omap/omapfb_main.c

182

struct omapfb_device *fbdev = plane->fbdev;

drivers/video/fbdev/omap/omapfb_main.c

190

r = fbdev->ctrl->setup_plane(plane->idx, plane->info.channel_out,

drivers/video/fbdev/omap/omapfb_main.c

192

plane->info.pos_x, plane->info.pos_y,

drivers/video/fbdev/omap/omapfb_main.c

193

var->xres, var->yres, plane->color_mode);

drivers/video/fbdev/omap/omapfb_main.c

204

r = fbdev->ctrl->set_scale(plane->idx,

drivers/video/fbdev/omap/omapfb_main.c

206

plane->info.out_width,

drivers/video/fbdev/omap/omapfb_main.c

207

plane->info.out_height);

drivers/video/fbdev/omap/omapfb_main.c

240

struct omapfb_plane_struct *plane = info->par;

drivers/video/fbdev/omap/omapfb_main.c

241

struct omapfb_device *fbdev = plane->fbdev;

drivers/video/fbdev/omap/omapfb_main.c

245

switch (plane->color_mode) {

drivers/video/fbdev/omap/omapfb_main.c

314

struct omapfb_plane_struct *plane = fbi->par;

drivers/video/fbdev/omap/omapfb_main.c

315

struct omapfb_device *fbdev = plane->fbdev;

drivers/video/fbdev/omap/omapfb_main.c

355

struct omapfb_plane_struct *plane = fbi->par;

drivers/video/fbdev/omap/omapfb_main.c

356

struct omapfb_device *fbdev = plane->fbdev;

drivers/video/fbdev/omap/omapfb_main.c

372

struct omapfb_plane_struct *plane = fbi->par;

drivers/video/fbdev/omap/omapfb_main.c

376

rg = &plane->fbdev->mem_desc.region[plane->idx];

drivers/video/fbdev/omap/omapfb_main.c

411

static int set_color_mode(struct omapfb_plane_struct *plane,

drivers/video/fbdev/omap/omapfb_main.c

419

plane->color_mode = var->nonstd;

drivers/video/fbdev/omap/omapfb_main.c

423

plane->color_mode = var->nonstd;

drivers/video/fbdev/omap/omapfb_main.c

427

plane->color_mode = var->nonstd;

drivers/video/fbdev/omap/omapfb_main.c

435

plane->color_mode = OMAPFB_COLOR_CLUT_1BPP;

drivers/video/fbdev/omap/omapfb_main.c

438

plane->color_mode = OMAPFB_COLOR_CLUT_2BPP;

drivers/video/fbdev/omap/omapfb_main.c

441

plane->color_mode = OMAPFB_COLOR_CLUT_4BPP;

drivers/video/fbdev/omap/omapfb_main.c

444

plane->color_mode = OMAPFB_COLOR_CLUT_8BPP;

drivers/video/fbdev/omap/omapfb_main.c

450

if (plane->fbdev->panel->bpp == 12)

drivers/video/fbdev/omap/omapfb_main.c

451

plane->color_mode = OMAPFB_COLOR_RGB444;

drivers/video/fbdev/omap/omapfb_main.c

453

plane->color_mode = OMAPFB_COLOR_RGB565;

drivers/video/fbdev/omap/omapfb_main.c

472

struct omapfb_plane_struct *plane = fbi->par;

drivers/video/fbdev/omap/omapfb_main.c

473

struct omapfb_device *fbdev = plane->fbdev;

drivers/video/fbdev/omap/omapfb_main.c

476

if (set_color_mode(plane, var) < 0)

drivers/video/fbdev/omap/omapfb_main.c

480

if (plane->color_mode == OMAPFB_COLOR_RGB444)

drivers/video/fbdev/omap/omapfb_main.c

523

max_frame_size = fbdev->mem_desc.region[plane->idx].size;

drivers/video/fbdev/omap/omapfb_main.c

548

if (plane->color_mode == OMAPFB_COLOR_RGB444) {

drivers/video/fbdev/omap/omapfb_main.c

598

struct omapfb_plane_struct *plane = fbi->par;

drivers/video/fbdev/omap/omapfb_main.c

599

struct omapfb_device *fbdev = plane->fbdev;

drivers/video/fbdev/omap/omapfb_main.c

625

struct omapfb_plane_struct *plane = fbi->par;

drivers/video/fbdev/omap/omapfb_main.c

626

struct omapfb_device *fbdev = plane->fbdev;

drivers/video/fbdev/omap/omapfb_main.c

633

else if (mirror != plane->info.mirror) {

drivers/video/fbdev/omap/omapfb_main.c

634

plane->info.mirror = mirror;

drivers/video/fbdev/omap/omapfb_main.c

648

struct omapfb_plane_struct *plane = fbi->par;

drivers/video/fbdev/omap/omapfb_main.c

649

struct omapfb_device *fbdev = plane->fbdev;

drivers/video/fbdev/omap/omapfb_main.c

667

struct omapfb_plane_struct *plane = fbi->par;

drivers/video/fbdev/omap/omapfb_main.c

668

struct omapfb_device *fbdev = plane->fbdev;

drivers/video/fbdev/omap/omapfb_main.c

685

struct omapfb_plane_struct *plane = fbi->par;

drivers/video/fbdev/omap/omapfb_main.c

686

struct omapfb_device *fbdev = plane->fbdev;

drivers/video/fbdev/omap/omapfb_main.c

729

struct omapfb_plane_struct *plane = fbi->par;

drivers/video/fbdev/omap/omapfb_main.c

732

omapfb_rqueue_lock(plane->fbdev);

drivers/video/fbdev/omap/omapfb_main.c

734

omapfb_rqueue_unlock(plane->fbdev);

drivers/video/fbdev/omap/omapfb_main.c

741

struct omapfb_plane_struct *plane = fbi->par;

drivers/video/fbdev/omap/omapfb_main.c

742

struct omapfb_device *fbdev = plane->fbdev;

drivers/video/fbdev/omap/omapfb_main.c

769

struct omapfb_plane_struct *plane = fbi->par;

drivers/video/fbdev/omap/omapfb_main.c

770

struct omapfb_device *fbdev = plane->fbdev;

drivers/video/fbdev/omap/omapfb_main.c

780

if (pi->enabled && !fbdev->mem_desc.region[plane->idx].size) {

drivers/video/fbdev/omap/omapfb_main.c

788

old_info = plane->info;

drivers/video/fbdev/omap/omapfb_main.c

789

plane->info = *pi;

drivers/video/fbdev/omap/omapfb_main.c

793

plane->info = old_info;

drivers/video/fbdev/omap/omapfb_main.c

797

r = fbdev->ctrl->enable_plane(plane->idx, pi->enabled);

drivers/video/fbdev/omap/omapfb_main.c

799

plane->info = old_info;

drivers/video/fbdev/omap/omapfb_main.c

809

struct omapfb_plane_struct *plane = fbi->par;

drivers/video/fbdev/omap/omapfb_main.c

811

*pi = plane->info;

drivers/video/fbdev/omap/omapfb_main.c

817

struct omapfb_plane_struct *plane = fbi->par;

drivers/video/fbdev/omap/omapfb_main.c

818

struct omapfb_device *fbdev = plane->fbdev;

drivers/video/fbdev/omap/omapfb_main.c

819

struct omapfb_mem_region *rg = &fbdev->mem_desc.region[plane->idx];

drivers/video/fbdev/omap/omapfb_main.c

830

if (plane->info.enabled) {

drivers/video/fbdev/omap/omapfb_main.c

857

r = fbdev->ctrl->setup_mem(plane->idx, size, mi->type, &paddr);

drivers/video/fbdev/omap/omapfb_main.c

891

struct omapfb_plane_struct *plane = fbi->par;

drivers/video/fbdev/omap/omapfb_main.c

892

struct omapfb_device *fbdev = plane->fbdev;

drivers/video/fbdev/omap/omapfb_main.c

895

rg = &fbdev->mem_desc.region[plane->idx];

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1003

static void dispc_ovl_set_burst_size(enum omap_plane plane,

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1009

shift = shifts[plane];

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1010

REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), burst_size, shift + 1, shift);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1025

static u32 dispc_ovl_get_burst_size(enum omap_plane plane)

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1074

static void dispc_ovl_set_vid_color_conv(enum omap_plane plane, bool enable)

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1078

BUG_ON(plane == OMAP_DSS_GFX);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1080

val = dispc_read_reg(DISPC_OVL_ATTRIBUTES(plane));

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1082

dispc_write_reg(DISPC_OVL_ATTRIBUTES(plane), val);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1085

static void dispc_ovl_enable_replication(enum omap_plane plane,

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1094

shift = shifts[plane];

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1095

REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), enable, shift, shift);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1182

static u32 dispc_ovl_get_fifo_size(enum omap_plane plane)

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1188

if (dispc.fifo_assignment[fifo] == plane)

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1195

void dispc_ovl_set_fifo_threshold(enum omap_plane plane, u32 low, u32 high)

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1212

plane,

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1213

REG_GET(DISPC_OVL_FIFO_THRESHOLD(plane),

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1215

REG_GET(DISPC_OVL_FIFO_THRESHOLD(plane),

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1219

dispc_write_reg(DISPC_OVL_FIFO_THRESHOLD(plane),

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1229

plane != OMAP_DSS_WB)

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1230

dispc_write_reg(DISPC_OVL_PRELOAD(plane), min(high, 0xfffu));

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1233

void dispc_ovl_compute_fifo_thresholds(enum omap_plane plane,

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1246

burst_size = dispc_ovl_get_burst_size(plane);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1247

ovl_fifo_size = dispc_ovl_get_fifo_size(plane);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1266

} else if (plane == OMAP_DSS_WB) {

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1280

static void dispc_ovl_set_mflag(enum omap_plane plane, bool enable)

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1284

if (plane == OMAP_DSS_GFX)

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1289

REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), enable, bit, bit);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1292

static void dispc_ovl_set_mflag_threshold(enum omap_plane plane,

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1295

dispc_write_reg(DISPC_OVL_MFLAG_THRESHOLD(plane),

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1356

static void dispc_ovl_set_fir(enum omap_plane plane,

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1372

dispc_write_reg(DISPC_OVL_FIR(plane), val);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1375

dispc_write_reg(DISPC_OVL_FIR2(plane), val);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1379

static void dispc_ovl_set_vid_accu0(enum omap_plane plane, int haccu, int vaccu)

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1390

dispc_write_reg(DISPC_OVL_ACCU0(plane), val);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1393

static void dispc_ovl_set_vid_accu1(enum omap_plane plane, int haccu, int vaccu)

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1404

dispc_write_reg(DISPC_OVL_ACCU1(plane), val);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1407

static void dispc_ovl_set_vid_accu2_0(enum omap_plane plane, int haccu,

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1413

dispc_write_reg(DISPC_OVL_ACCU2_0(plane), val);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1416

static void dispc_ovl_set_vid_accu2_1(enum omap_plane plane, int haccu,

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1422

dispc_write_reg(DISPC_OVL_ACCU2_1(plane), val);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1425

static void dispc_ovl_set_scale_param(enum omap_plane plane,

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1436

dispc_ovl_set_scale_coef(plane, fir_hinc, fir_vinc, five_taps,

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1438

dispc_ovl_set_fir(plane, fir_hinc, fir_vinc, color_comp);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1441

static void dispc_ovl_set_accu_uv(enum omap_plane plane,

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1525

dispc_ovl_set_vid_accu2_0(plane, h_accu2_0, v_accu2_0);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1526

dispc_ovl_set_vid_accu2_1(plane, h_accu2_1, v_accu2_1);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1529

static void dispc_ovl_set_scaling_common(enum omap_plane plane,

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1540

dispc_ovl_set_scale_param(plane, orig_width, orig_height,

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1543

l = dispc_read_reg(DISPC_OVL_ATTRIBUTES(plane));

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1564

dispc_write_reg(DISPC_OVL_ATTRIBUTES(plane), l);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1579

dispc_ovl_set_vid_accu0(plane, 0, accu0);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1580

dispc_ovl_set_vid_accu1(plane, 0, accu1);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1583

static void dispc_ovl_set_scaling_uv(enum omap_plane plane,

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1592

bool chroma_upscale = plane != OMAP_DSS_WB;

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1600

if (plane != OMAP_DSS_WB)

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1601

REG_FLD_MOD(DISPC_OVL_ATTRIBUTES2(plane), 0, 8, 8);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1605

dispc_ovl_set_accu_uv(plane, orig_width, orig_height, out_width,

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1649

dispc_ovl_set_scale_param(plane, orig_width, orig_height,

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1653

if (plane != OMAP_DSS_WB)

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1654

REG_FLD_MOD(DISPC_OVL_ATTRIBUTES2(plane),

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1658

REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), scale_x ? 1 : 0, 5, 5);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1660

REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), scale_y ? 1 : 0, 6, 6);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1663

static void dispc_ovl_set_scaling(enum omap_plane plane,

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1670

BUG_ON(plane == OMAP_DSS_GFX);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1672

dispc_ovl_set_scaling_common(plane,

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1679

dispc_ovl_set_scaling_uv(plane,

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1687

static void dispc_ovl_set_rotation_attrs(enum omap_plane plane, u8 rotation,

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1744

REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), vidrot, 13, 12);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1746

REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane),

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1754

REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), doublestride, 22, 22);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

248

static unsigned long dispc_plane_pclk_rate(enum omap_plane plane);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

249

static unsigned long dispc_plane_lclk_rate(enum omap_plane plane);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

2500

int dispc_ovl_check(enum omap_plane plane, enum omap_channel channel,

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

2505

enum omap_overlay_caps caps = dss_feat_get_overlay_caps(plane);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

2531

if (!dss_feat_color_mode_supported(plane, oi->color_mode))

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

2541

static int dispc_ovl_setup_common(enum omap_plane plane,

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

2562

unsigned long pclk = dispc_plane_pclk_rate(plane);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

2563

unsigned long lclk = dispc_plane_lclk_rate(plane);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

2600

if (!dss_feat_color_mode_supported(plane, color_mode))

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

2686

dispc_ovl_set_color_mode(plane, color_mode);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

2688

dispc_ovl_configure_burst_type(plane, rotation_type);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

2690

dispc_ovl_set_ba0(plane, paddr + offset0);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

2691

dispc_ovl_set_ba1(plane, paddr + offset1);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

2694

dispc_ovl_set_ba0_uv(plane, p_uv_addr + offset0);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

2695

dispc_ovl_set_ba1_uv(plane, p_uv_addr + offset1);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

2701

dispc_ovl_set_row_inc(plane, row_inc);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

2702

dispc_ovl_set_pix_inc(plane, pix_inc);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

2707

dispc_ovl_set_pos(plane, caps, pos_x, pos_y);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

2709

dispc_ovl_set_input_size(plane, in_width, in_height);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

2712

dispc_ovl_set_scaling(plane, in_width, in_height, out_width,

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

2715

dispc_ovl_set_output_size(plane, out_width, out_height);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

2716

dispc_ovl_set_vid_color_conv(plane, cconv);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

2719

dispc_ovl_set_rotation_attrs(plane, rotation, rotation_type, mirror,

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

2722

dispc_ovl_set_zorder(plane, caps, zorder);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

2723

dispc_ovl_set_pre_mult_alpha(plane, caps, pre_mult_alpha);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

2724

dispc_ovl_setup_global_alpha(plane, caps, global_alpha);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

2726

dispc_ovl_enable_replication(plane, caps, replication);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

2731

int dispc_ovl_setup(enum omap_plane plane, const struct omap_overlay_info *oi,

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

2739

if (plane == OMAP_DSS_WB)

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

2742

caps = dss_feat_get_overlay_caps(plane);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

2743

channel = dispc_ovl_get_channel_out(plane);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

2747

plane, &oi->paddr, &oi->p_uv_addr, oi->screen_width, oi->pos_x,

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

2751

r = dispc_ovl_setup_common(plane, caps, oi->paddr, oi->p_uv_addr,

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

2761

int dispc_ovl_enable(enum omap_plane plane, bool enable)

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

2763

DSSDBG("dispc_enable_plane %d, %d\n", plane, enable);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

2765

REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), enable ? 1 : 0, 0, 0);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

2771

bool dispc_ovl_enabled(enum omap_plane plane)

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

2773

return REG_GET(DISPC_OVL_ATTRIBUTES(plane), 0, 0);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

3287

static unsigned long dispc_plane_pclk_rate(enum omap_plane plane)

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

3291

if (plane == OMAP_DSS_WB)

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

3294

channel = dispc_ovl_get_channel_out(plane);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

3299

static unsigned long dispc_plane_lclk_rate(enum omap_plane plane)

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

3303

if (plane == OMAP_DSS_WB)

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

3306

channel = dispc_ovl_get_channel_out(plane);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

3521

#define DISPC_REG(plane, name, i) name(plane, i)

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

3522

#define DUMPREG(plane, name, i) \

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

3523

seq_printf(s, "%s_%d(%s)%*s %08x\n", #name, i, p_names[plane], \

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

3524

(int)(46 - strlen(#name) - strlen(p_names[plane])), " ", \

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

3525

dispc_read_reg(DISPC_REG(plane, name, i)))

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

578

static void dispc_ovl_write_firh_reg(enum omap_plane plane, int reg, u32 value)

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

580

dispc_write_reg(DISPC_OVL_FIR_COEF_H(plane, reg), value);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

583

static void dispc_ovl_write_firhv_reg(enum omap_plane plane, int reg, u32 value)

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

585

dispc_write_reg(DISPC_OVL_FIR_COEF_HV(plane, reg), value);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

588

static void dispc_ovl_write_firv_reg(enum omap_plane plane, int reg, u32 value)

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

590

dispc_write_reg(DISPC_OVL_FIR_COEF_V(plane, reg), value);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

593

static void dispc_ovl_write_firh2_reg(enum omap_plane plane, int reg, u32 value)

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

595

BUG_ON(plane == OMAP_DSS_GFX);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

597

dispc_write_reg(DISPC_OVL_FIR_COEF_H2(plane, reg), value);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

600

static void dispc_ovl_write_firhv2_reg(enum omap_plane plane, int reg,

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

603

BUG_ON(plane == OMAP_DSS_GFX);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

605

dispc_write_reg(DISPC_OVL_FIR_COEF_HV2(plane, reg), value);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

608

static void dispc_ovl_write_firv2_reg(enum omap_plane plane, int reg, u32 value)

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

610

BUG_ON(plane == OMAP_DSS_GFX);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

612

dispc_write_reg(DISPC_OVL_FIR_COEF_V2(plane, reg), value);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

615

static void dispc_ovl_set_scale_coef(enum omap_plane plane, int fir_hinc,

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

638

dispc_ovl_write_firh_reg(plane, i, h);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

639

dispc_ovl_write_firhv_reg(plane, i, hv);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

641

dispc_ovl_write_firh2_reg(plane, i, h);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

642

dispc_ovl_write_firhv2_reg(plane, i, hv);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

653

dispc_ovl_write_firv_reg(plane, i, v);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

655

dispc_ovl_write_firv2_reg(plane, i, v);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

661

static void dispc_ovl_write_color_conv_coef(enum omap_plane plane,

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

666

dispc_write_reg(DISPC_OVL_CONV_COEF(plane, 0), CVAL(ct->rcr, ct->ry));

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

667

dispc_write_reg(DISPC_OVL_CONV_COEF(plane, 1), CVAL(ct->gy, ct->rcb));

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

668

dispc_write_reg(DISPC_OVL_CONV_COEF(plane, 2), CVAL(ct->gcb, ct->gcr));

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

669

dispc_write_reg(DISPC_OVL_CONV_COEF(plane, 3), CVAL(ct->bcr, ct->by));

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

670

dispc_write_reg(DISPC_OVL_CONV_COEF(plane, 4), CVAL(0, ct->bcb));

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

672

REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), ct->full_range, 11, 11);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

697

static void dispc_ovl_set_ba0(enum omap_plane plane, u32 paddr)

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

699

dispc_write_reg(DISPC_OVL_BA0(plane), paddr);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

702

static void dispc_ovl_set_ba1(enum omap_plane plane, u32 paddr)

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

704

dispc_write_reg(DISPC_OVL_BA1(plane), paddr);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

707

static void dispc_ovl_set_ba0_uv(enum omap_plane plane, u32 paddr)

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

709

dispc_write_reg(DISPC_OVL_BA0_UV(plane), paddr);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

712

static void dispc_ovl_set_ba1_uv(enum omap_plane plane, u32 paddr)

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

714

dispc_write_reg(DISPC_OVL_BA1_UV(plane), paddr);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

717

static void dispc_ovl_set_pos(enum omap_plane plane,

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

727

dispc_write_reg(DISPC_OVL_POSITION(plane), val);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

730

static void dispc_ovl_set_input_size(enum omap_plane plane, int width,

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

735

if (plane == OMAP_DSS_GFX || plane == OMAP_DSS_WB)

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

736

dispc_write_reg(DISPC_OVL_SIZE(plane), val);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

738

dispc_write_reg(DISPC_OVL_PICTURE_SIZE(plane), val);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

741

static void dispc_ovl_set_output_size(enum omap_plane plane, int width,

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

746

BUG_ON(plane == OMAP_DSS_GFX);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

750

if (plane == OMAP_DSS_WB)

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

751

dispc_write_reg(DISPC_OVL_PICTURE_SIZE(plane), val);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

753

dispc_write_reg(DISPC_OVL_SIZE(plane), val);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

756

static void dispc_ovl_set_zorder(enum omap_plane plane,

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

762

REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), zorder, 27, 26);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

776

static void dispc_ovl_set_pre_mult_alpha(enum omap_plane plane,

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

782

REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), enable ? 1 : 0, 28, 28);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

785

static void dispc_ovl_setup_global_alpha(enum omap_plane plane,

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

794

shift = shifts[plane];

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

798

static void dispc_ovl_set_pix_inc(enum omap_plane plane, s32 inc)

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

800

dispc_write_reg(DISPC_OVL_PIXEL_INC(plane), inc);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

803

static void dispc_ovl_set_row_inc(enum omap_plane plane, s32 inc)

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

805

dispc_write_reg(DISPC_OVL_ROW_INC(plane), inc);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

808

static void dispc_ovl_set_color_mode(enum omap_plane plane,

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

812

if (plane != OMAP_DSS_GFX) {

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

886

REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), m, 4, 1);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

889

static void dispc_ovl_configure_burst_type(enum omap_plane plane,

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

896

REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), 1, 29, 29);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

898

REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), 0, 29, 29);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

901

void dispc_ovl_set_channel_out(enum omap_plane plane, enum omap_channel channel)

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

907

switch (plane) {

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

921

val = dispc_read_reg(DISPC_OVL_ATTRIBUTES(plane));

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

959

dispc_write_reg(DISPC_OVL_ATTRIBUTES(plane), val);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

963

static enum omap_channel dispc_ovl_get_channel_out(enum omap_plane plane)

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

968

switch (plane) {

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

982

val = dispc_read_reg(DISPC_OVL_ATTRIBUTES(plane));

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

339

static inline u16 DISPC_OVL_BASE(enum omap_plane plane)

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

341

switch (plane) {

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

359

static inline u16 DISPC_BA0_OFFSET(enum omap_plane plane)

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

361

switch (plane) {

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

375

static inline u16 DISPC_BA1_OFFSET(enum omap_plane plane)

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

377

switch (plane) {

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

391

static inline u16 DISPC_BA0_UV_OFFSET(enum omap_plane plane)

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

393

switch (plane) {

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

411

static inline u16 DISPC_BA1_UV_OFFSET(enum omap_plane plane)

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

413

switch (plane) {

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

431

static inline u16 DISPC_POS_OFFSET(enum omap_plane plane)

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

433

switch (plane) {

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

446

static inline u16 DISPC_SIZE_OFFSET(enum omap_plane plane)

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

448

switch (plane) {

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

462

static inline u16 DISPC_ATTR_OFFSET(enum omap_plane plane)

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

464

switch (plane) {

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

479

static inline u16 DISPC_ATTR2_OFFSET(enum omap_plane plane)

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

481

switch (plane) {

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

499

static inline u16 DISPC_FIFO_THRESH_OFFSET(enum omap_plane plane)

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

501

switch (plane) {

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

516

static inline u16 DISPC_FIFO_SIZE_STATUS_OFFSET(enum omap_plane plane)

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

518

switch (plane) {

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

533

static inline u16 DISPC_ROW_INC_OFFSET(enum omap_plane plane)

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

535

switch (plane) {

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

550

static inline u16 DISPC_PIX_INC_OFFSET(enum omap_plane plane)

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

552

switch (plane) {

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

567

static inline u16 DISPC_WINDOW_SKIP_OFFSET(enum omap_plane plane)

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

569

switch (plane) {

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

583

static inline u16 DISPC_TABLE_BA_OFFSET(enum omap_plane plane)

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

585

switch (plane) {

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

599

static inline u16 DISPC_FIR_OFFSET(enum omap_plane plane)

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

601

switch (plane) {

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

617

static inline u16 DISPC_FIR2_OFFSET(enum omap_plane plane)

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

619

switch (plane) {

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

637

static inline u16 DISPC_PIC_SIZE_OFFSET(enum omap_plane plane)

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

639

switch (plane) {

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

656

static inline u16 DISPC_ACCU0_OFFSET(enum omap_plane plane)

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

658

switch (plane) {

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

674

static inline u16 DISPC_ACCU2_0_OFFSET(enum omap_plane plane)

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

676

switch (plane) {

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

694

static inline u16 DISPC_ACCU1_OFFSET(enum omap_plane plane)

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

696

switch (plane) {

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

712

static inline u16 DISPC_ACCU2_1_OFFSET(enum omap_plane plane)

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

714

switch (plane) {

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

733

static inline u16 DISPC_FIR_COEF_H_OFFSET(enum omap_plane plane, u16 i)

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

735

switch (plane) {

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

752

static inline u16 DISPC_FIR_COEF_H2_OFFSET(enum omap_plane plane, u16 i)

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

754

switch (plane) {

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

773

static inline u16 DISPC_FIR_COEF_HV_OFFSET(enum omap_plane plane, u16 i)

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

775

switch (plane) {

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

792

static inline u16 DISPC_FIR_COEF_HV2_OFFSET(enum omap_plane plane, u16 i)

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

794

switch (plane) {

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

813

static inline u16 DISPC_CONV_COEF_OFFSET(enum omap_plane plane, u16 i)

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

815

switch (plane) {

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

831

static inline u16 DISPC_FIR_COEF_V_OFFSET(enum omap_plane plane, u16 i)

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

833

switch (plane) {

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

851

static inline u16 DISPC_FIR_COEF_V2_OFFSET(enum omap_plane plane, u16 i)

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

853

switch (plane) {

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

871

static inline u16 DISPC_PRELOAD_OFFSET(enum omap_plane plane)

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

873

switch (plane) {

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

888

static inline u16 DISPC_MFLAG_THRESHOLD_OFFSET(enum omap_plane plane)

drivers/video/fbdev/omap2/omapfb/dss/dispc.h

890

switch (plane) {

drivers/video/fbdev/omap2/omapfb/dss/dss.h

383

void dispc_ovl_set_fifo_threshold(enum omap_plane plane, u32 low, u32 high);

drivers/video/fbdev/omap2/omapfb/dss/dss.h

384

void dispc_ovl_compute_fifo_thresholds(enum omap_plane plane,

drivers/video/fbdev/omap2/omapfb/dss/dss.h

417

int dispc_ovl_check(enum omap_plane plane, enum omap_channel channel,

drivers/video/fbdev/omap2/omapfb/dss/dss.h

422

int dispc_ovl_enable(enum omap_plane plane, bool enable);

drivers/video/fbdev/omap2/omapfb/dss/dss.h

423

bool dispc_ovl_enabled(enum omap_plane plane);

drivers/video/fbdev/omap2/omapfb/dss/dss.h

424

void dispc_ovl_set_channel_out(enum omap_plane plane,

drivers/video/fbdev/omap2/omapfb/dss/dss.h

426

int dispc_ovl_setup(enum omap_plane plane, const struct omap_overlay_info *oi,

drivers/video/fbdev/omap2/omapfb/dss/dss_features.c

834

enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane)

drivers/video/fbdev/omap2/omapfb/dss/dss_features.c

836

return omap_current_dss_features->supported_color_modes[plane];

drivers/video/fbdev/omap2/omapfb/dss/dss_features.c

840

enum omap_overlay_caps dss_feat_get_overlay_caps(enum omap_plane plane)

drivers/video/fbdev/omap2/omapfb/dss/dss_features.c

842

return omap_current_dss_features->overlay_caps[plane];

drivers/video/fbdev/omap2/omapfb/dss/dss_features.c

845

bool dss_feat_color_mode_supported(enum omap_plane plane,

drivers/video/fbdev/omap2/omapfb/dss/dss_features.c

848

return omap_current_dss_features->supported_color_modes[plane] &

drivers/video/fbdev/omap2/omapfb/dss/dss_features.h

80

enum omap_overlay_caps dss_feat_get_overlay_caps(enum omap_plane plane);

drivers/video/fbdev/omap2/omapfb/dss/dss_features.h

81

bool dss_feat_color_mode_supported(enum omap_plane plane,

include/drm/drm_atomic.h

1119

#define for_each_oldnew_plane_in_state(__state, plane, old_plane_state, new_plane_state, __i) \

include/drm/drm_atomic.h

1124

((plane) = (__state)->planes[__i].ptr, \

include/drm/drm_atomic.h

1125

(void)(plane) /* Only to avoid unused-but-set-variable warning */, \

include/drm/drm_atomic.h

1142

#define for_each_oldnew_plane_in_state_reverse(__state, plane, old_plane_state, new_plane_state, __i) \

include/drm/drm_atomic.h

1147

((plane) = (__state)->planes[__i].ptr, \

include/drm/drm_atomic.h

1159

#define for_each_new_plane_in_state_reverse(__state, plane, new_plane_state, __i) \

include/drm/drm_atomic.h

1164

((plane) = (__state)->planes[__i].ptr, \

include/drm/drm_atomic.h

1178

#define for_each_old_plane_in_state(__state, plane, old_plane_state, __i) \

include/drm/drm_atomic.h

1183

((plane) = (__state)->planes[__i].ptr, \

include/drm/drm_atomic.h

1196

#define for_each_new_plane_in_state(__state, plane, new_plane_state, __i) \

include/drm/drm_atomic.h

1201

((plane) = (__state)->planes[__i].ptr, \

include/drm/drm_atomic.h

1202

(void)(plane) /* Only to avoid unused-but-set-variable warning */, \

include/drm/drm_atomic.h

723

struct drm_plane *plane);

include/drm/drm_atomic.h

810

struct drm_plane *plane)

include/drm/drm_atomic.h

812

return state->planes[drm_plane_index(plane)].old_state;

include/drm/drm_atomic.h

825

struct drm_plane *plane)

include/drm/drm_atomic.h

827

return state->planes[drm_plane_index(plane)].new_state;

include/drm/drm_atomic.h

898

struct drm_plane *plane)

include/drm/drm_atomic.h

902

plane_state = drm_atomic_get_new_plane_state(state, plane);

include/drm/drm_atomic.h

909

return plane->state;

include/drm/drm_atomic.h

923

struct drm_plane *plane);

include/drm/drm_atomic_helper.h

149

int drm_atomic_helper_update_plane(struct drm_plane *plane,

include/drm/drm_atomic_helper.h

157

int drm_atomic_helper_disable_plane(struct drm_plane *plane,

include/drm/drm_atomic_helper.h

200

#define drm_atomic_crtc_for_each_plane(plane, crtc) \

include/drm/drm_atomic_helper.h

201

drm_for_each_plane_mask(plane, (crtc)->dev, (crtc)->state->plane_mask)

include/drm/drm_atomic_helper.h

213

#define drm_atomic_crtc_state_for_each_plane(plane, crtc_state) \

include/drm/drm_atomic_helper.h

214

drm_for_each_plane_mask(plane, (crtc_state)->state->dev, (crtc_state)->plane_mask)

include/drm/drm_atomic_helper.h

231

#define drm_atomic_crtc_state_for_each_plane_state(plane, plane_state, crtc_state) \

include/drm/drm_atomic_helper.h

232

drm_for_each_plane_mask(plane, (crtc_state)->state->dev, (crtc_state)->plane_mask) \

include/drm/drm_atomic_helper.h

235

plane)))

include/drm/drm_atomic_state_helper.h

57

struct drm_plane *plane);

include/drm/drm_atomic_state_helper.h

58

void __drm_atomic_helper_plane_reset(struct drm_plane *plane,

include/drm/drm_atomic_state_helper.h

60

void drm_atomic_helper_plane_reset(struct drm_plane *plane);

include/drm/drm_atomic_state_helper.h

61

void __drm_atomic_helper_plane_duplicate_state(struct drm_plane *plane,

include/drm/drm_atomic_state_helper.h

64

drm_atomic_helper_plane_duplicate_state(struct drm_plane *plane);

include/drm/drm_atomic_state_helper.h

66

void drm_atomic_helper_plane_destroy_state(struct drm_plane *plane,

include/drm/drm_blend.h

46

int drm_plane_create_alpha_property(struct drm_plane *plane);

include/drm/drm_blend.h

47

int drm_plane_create_rotation_property(struct drm_plane *plane,

include/drm/drm_blend.h

53

int drm_plane_create_zpos_property(struct drm_plane *plane,

include/drm/drm_blend.h

56

int drm_plane_create_zpos_immutable_property(struct drm_plane *plane,

include/drm/drm_blend.h

60

int drm_plane_create_blend_mode_property(struct drm_plane *plane,

include/drm/drm_color_mgmt.h

116

int drm_plane_create_color_properties(struct drm_plane *plane,

include/drm/drm_colorop.h

256

struct drm_plane *plane;

include/drm/drm_colorop.h

406

struct drm_plane *plane, const struct drm_colorop_funcs *funcs,

include/drm/drm_colorop.h

409

struct drm_plane *plane,

include/drm/drm_colorop.h

415

struct drm_plane *plane, const struct drm_colorop_funcs *funcs,

include/drm/drm_colorop.h

418

struct drm_plane *plane, const struct drm_colorop_funcs *funcs,

include/drm/drm_colorop.h

421

struct drm_plane *plane, const struct drm_colorop_funcs *funcs,

include/drm/drm_fb_dma_helper.h

14

unsigned int plane);

include/drm/drm_fb_dma_helper.h

18

unsigned int plane);

include/drm/drm_fb_dma_helper.h

24

int drm_fb_dma_get_scanout_buffer(struct drm_plane *plane,

include/drm/drm_fourcc.h

274

int plane)

include/drm/drm_fourcc.h

276

if (!info || plane >= info->num_planes)

include/drm/drm_fourcc.h

279

if (plane == 0)

include/drm/drm_fourcc.h

296

int plane)

include/drm/drm_fourcc.h

298

if (!info || plane >= info->num_planes)

include/drm/drm_fourcc.h

301

if (plane == 0)

include/drm/drm_fourcc.h

317

int plane);

include/drm/drm_fourcc.h

319

int plane);

include/drm/drm_fourcc.h

320

unsigned int drm_format_info_bpp(const struct drm_format_info *info, int plane);

include/drm/drm_fourcc.h

322

int plane, unsigned int buffer_width);

include/drm/drm_gem_atomic_helper.h

114

int drm_gem_begin_shadow_fb_access(struct drm_plane *plane, struct drm_plane_state *plane_state);

include/drm/drm_gem_atomic_helper.h

115

void drm_gem_end_shadow_fb_access(struct drm_plane *plane, struct drm_plane_state *plane_state);

include/drm/drm_gem_atomic_helper.h

18

int drm_gem_plane_helper_prepare_fb(struct drm_plane *plane, struct drm_plane_state *state);

include/drm/drm_gem_atomic_helper.h

91

void __drm_gem_duplicate_shadow_plane_state(struct drm_plane *plane,

include/drm/drm_gem_atomic_helper.h

94

void __drm_gem_reset_shadow_plane(struct drm_plane *plane,

include/drm/drm_gem_atomic_helper.h

97

void drm_gem_reset_shadow_plane(struct drm_plane *plane);

include/drm/drm_gem_atomic_helper.h

98

struct drm_plane_state *drm_gem_duplicate_shadow_plane_state(struct drm_plane *plane);

include/drm/drm_gem_atomic_helper.h

99

void drm_gem_destroy_shadow_plane_state(struct drm_plane *plane,

include/drm/drm_gem_framebuffer_helper.h

20

unsigned int plane);

include/drm/drm_gem_vram_helper.h

119

drm_gem_vram_plane_helper_prepare_fb(struct drm_plane *plane,

include/drm/drm_gem_vram_helper.h

122

drm_gem_vram_plane_helper_cleanup_fb(struct drm_plane *plane,

include/drm/drm_mipi_dbi.h

222

int drm_mipi_dbi_plane_helper_atomic_check(struct drm_plane *plane,

include/drm/drm_mipi_dbi.h

224

void drm_mipi_dbi_plane_helper_atomic_update(struct drm_plane *plane,

include/drm/drm_modeset_helper_vtables.h

1232

int (*prepare_fb)(struct drm_plane *plane,

include/drm/drm_modeset_helper_vtables.h

1243

void (*cleanup_fb)(struct drm_plane *plane,

include/drm/drm_modeset_helper_vtables.h

1266

int (*begin_fb_access)(struct drm_plane *plane, struct drm_plane_state *new_plane_state);

include/drm/drm_modeset_helper_vtables.h

1274

void (*end_fb_access)(struct drm_plane *plane, struct drm_plane_state *new_plane_state);

include/drm/drm_modeset_helper_vtables.h

1311

int (*atomic_check)(struct drm_plane *plane,

include/drm/drm_modeset_helper_vtables.h

1328

void (*atomic_update)(struct drm_plane *plane,

include/drm/drm_modeset_helper_vtables.h

1353

void (*atomic_enable)(struct drm_plane *plane,

include/drm/drm_modeset_helper_vtables.h

1378

void (*atomic_disable)(struct drm_plane *plane,

include/drm/drm_modeset_helper_vtables.h

1402

int (*atomic_async_check)(struct drm_plane *plane,

include/drm/drm_modeset_helper_vtables.h

1439

void (*atomic_async_update)(struct drm_plane *plane,

include/drm/drm_modeset_helper_vtables.h

1462

int (*get_scanout_buffer)(struct drm_plane *plane,

include/drm/drm_modeset_helper_vtables.h

1478

void (*panic_flush)(struct drm_plane *plane);

include/drm/drm_modeset_helper_vtables.h

1486

static inline void drm_plane_helper_add(struct drm_plane *plane,

include/drm/drm_modeset_helper_vtables.h

1489

plane->helper_private = funcs;

include/drm/drm_plane.h

1005

#define drm_for_each_plane(plane, dev) \

include/drm/drm_plane.h

1006

list_for_each_entry(plane, &(dev)->mode_config.plane_list, head)

include/drm/drm_plane.h

1008

bool drm_plane_has_format(struct drm_plane *plane,

include/drm/drm_plane.h

1013

void drm_plane_enable_fb_damage_clips(struct drm_plane *plane);

include/drm/drm_plane.h

1019

int drm_plane_create_scaling_filter_property(struct drm_plane *plane,

include/drm/drm_plane.h

1021

int drm_plane_add_size_hints_property(struct drm_plane *plane,

include/drm/drm_plane.h

1025

int drm_plane_create_color_pipeline_property(struct drm_plane *plane,

include/drm/drm_plane.h

327

int (*update_plane)(struct drm_plane *plane,

include/drm/drm_plane.h

350

int (*disable_plane)(struct drm_plane *plane,

include/drm/drm_plane.h

360

void (*destroy)(struct drm_plane *plane);

include/drm/drm_plane.h

372

void (*reset)(struct drm_plane *plane);

include/drm/drm_plane.h

388

int (*set_property)(struct drm_plane *plane,

include/drm/drm_plane.h

422

struct drm_plane_state *(*atomic_duplicate_state)(struct drm_plane *plane);

include/drm/drm_plane.h

432

void (*atomic_destroy_state)(struct drm_plane *plane,

include/drm/drm_plane.h

477

int (*atomic_set_property)(struct drm_plane *plane,

include/drm/drm_plane.h

500

int (*atomic_get_property)(struct drm_plane *plane,

include/drm/drm_plane.h

517

int (*late_register)(struct drm_plane *plane);

include/drm/drm_plane.h

528

void (*early_unregister)(struct drm_plane *plane);

include/drm/drm_plane.h

558

bool (*format_mod_supported)(struct drm_plane *plane, uint32_t format,

include/drm/drm_plane.h

56

struct drm_plane *plane;

include/drm/drm_plane.h

574

bool (*format_mod_supported_async)(struct drm_plane *plane,

include/drm/drm_plane.h

828

struct drm_plane *plane,

include/drm/drm_plane.h

836

void drm_plane_cleanup(struct drm_plane *plane);

include/drm/drm_plane.h

934

static inline unsigned int drm_plane_index(const struct drm_plane *plane)

include/drm/drm_plane.h

936

return plane->index;

include/drm/drm_plane.h

943

static inline u32 drm_plane_mask(const struct drm_plane *plane)

include/drm/drm_plane.h

945

return 1 << drm_plane_index(plane);

include/drm/drm_plane.h

949

void drm_plane_force_disable(struct drm_plane *plane);

include/drm/drm_plane.h

951

int drm_mode_plane_set_obj_prop(struct drm_plane *plane,

include/drm/drm_plane.h

981

#define drm_for_each_plane_mask(plane, dev, plane_mask) \

include/drm/drm_plane.h

982

list_for_each_entry((plane), &(dev)->mode_config.plane_list, head) \

include/drm/drm_plane.h

983

for_each_if ((plane_mask) & drm_plane_mask(plane))

include/drm/drm_plane.h

994

#define drm_for_each_legacy_plane(plane, dev) \

include/drm/drm_plane.h

995

list_for_each_entry(plane, &(dev)->mode_config.plane_list, head) \

include/drm/drm_plane.h

996

for_each_if (plane->type == DRM_PLANE_TYPE_OVERLAY)

include/drm/drm_plane_helper.h

34

int drm_plane_helper_update_primary(struct drm_plane *plane, struct drm_crtc *crtc,

include/drm/drm_plane_helper.h

41

int drm_plane_helper_disable_primary(struct drm_plane *plane,

include/drm/drm_plane_helper.h

43

void drm_plane_helper_destroy(struct drm_plane *plane);

include/drm/drm_simple_kms_helper.h

54

struct drm_plane plane;

include/linux/mtd/nand.h

759

pos->plane = pos->eraseblock % nand->memorg.planes_per_lun;

include/linux/mtd/nand.h

80

unsigned int plane;

include/linux/mtd/nand.h

849

pos->plane = 0;

include/linux/mtd/nand.h

871

pos->plane = 0;

include/linux/mtd/nand.h

891

pos->plane = pos->eraseblock % nand->memorg.planes_per_lun;

include/media/tpg/v4l2-tpg.h

434

static inline unsigned tpg_g_twopixelsize(const struct tpg_data *tpg, unsigned plane)

include/media/tpg/v4l2-tpg.h

436

return tpg->twopixelsize[plane];

include/media/tpg/v4l2-tpg.h

440

unsigned plane, unsigned x)

include/media/tpg/v4l2-tpg.h

442

return ((x / tpg->hdownsampling[plane]) & tpg->hmask[plane]) *

include/media/tpg/v4l2-tpg.h

443

tpg->twopixelsize[plane] / 2;

include/media/tpg/v4l2-tpg.h

452

unsigned plane, unsigned x)

include/media/tpg/v4l2-tpg.h

454

return tpg_hdiv(tpg, plane, tpg_hscale(tpg, x));

include/media/tpg/v4l2-tpg.h

457

static inline unsigned tpg_g_bytesperline(const struct tpg_data *tpg, unsigned plane)

include/media/tpg/v4l2-tpg.h

459

return tpg->bytesperline[plane];

include/media/tpg/v4l2-tpg.h

462

static inline void tpg_s_bytesperline(struct tpg_data *tpg, unsigned plane, unsigned bpl)

include/media/tpg/v4l2-tpg.h

467

tpg->bytesperline[plane] = bpl;

include/media/tpg/v4l2-tpg.h

481

static inline unsigned tpg_g_line_width(const struct tpg_data *tpg, unsigned plane)

include/media/tpg/v4l2-tpg.h

487

return tpg_g_bytesperline(tpg, plane);

include/media/tpg/v4l2-tpg.h

497

unsigned plane, unsigned bpl)

include/media/tpg/v4l2-tpg.h

513

static inline unsigned tpg_calc_plane_size(const struct tpg_data *tpg, unsigned plane)

include/media/tpg/v4l2-tpg.h

515

if (plane >= tpg_g_planes(tpg))

include/media/tpg/v4l2-tpg.h

518

return tpg_g_bytesperline(tpg, plane) * tpg->buf_height /

include/media/tpg/v4l2-tpg.h

519

tpg->vdownsampling[plane];

include/media/videobuf2-core.h

977

struct vb2_buffer *vb, unsigned int plane, unsigned int flags);

include/uapi/linux/videodev2.h

1284

__u32 plane;

include/video/omapfb_dss.h

770

enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane);

samples/vfio-mdev/mbochs.c

1102

struct vfio_device_gfx_plane_info *plane)

samples/vfio-mdev/mbochs.c

1108

if (plane->flags & VFIO_GFX_PLANE_TYPE_PROBE) {

samples/vfio-mdev/mbochs.c

1109

if (plane->flags == (VFIO_GFX_PLANE_TYPE_PROBE |

samples/vfio-mdev/mbochs.c

1115

if (plane->flags != VFIO_GFX_PLANE_TYPE_DMABUF)

samples/vfio-mdev/mbochs.c

1118

plane->drm_format_mod = 0;

samples/vfio-mdev/mbochs.c

1119

plane->x_pos = 0;

samples/vfio-mdev/mbochs.c

1120

plane->y_pos = 0;

samples/vfio-mdev/mbochs.c

1121

plane->x_hot = 0;

samples/vfio-mdev/mbochs.c

1122

plane->y_hot = 0;

samples/vfio-mdev/mbochs.c

1127

if (plane->drm_plane_type == DRM_PLANE_TYPE_PRIMARY)

samples/vfio-mdev/mbochs.c

1130

plane->drm_format = 0;

samples/vfio-mdev/mbochs.c

1131

plane->width = 0;

samples/vfio-mdev/mbochs.c

1132

plane->height = 0;

samples/vfio-mdev/mbochs.c

1133

plane->stride = 0;

samples/vfio-mdev/mbochs.c

1134

plane->size = 0;

samples/vfio-mdev/mbochs.c

1135

plane->dmabuf_id = 0;

samples/vfio-mdev/mbochs.c

1147

plane->drm_format = dmabuf->mode.drm_format;

samples/vfio-mdev/mbochs.c

1148

plane->width = dmabuf->mode.width;

samples/vfio-mdev/mbochs.c

1149

plane->height = dmabuf->mode.height;

samples/vfio-mdev/mbochs.c

1150

plane->stride = dmabuf->mode.stride;

samples/vfio-mdev/mbochs.c

1151

plane->size = dmabuf->mode.size;

samples/vfio-mdev/mbochs.c

1152

plane->dmabuf_id = dmabuf->id;

samples/vfio-mdev/mbochs.c

1155

if (plane->drm_plane_type == DRM_PLANE_TYPE_PRIMARY &&

samples/vfio-mdev/mbochs.c

1156

mdev_state->active_id != plane->dmabuf_id) {

samples/vfio-mdev/mbochs.c

1158

__func__, mdev_state->active_id, plane->dmabuf_id);

samples/vfio-mdev/mbochs.c

1159

mdev_state->active_id = plane->dmabuf_id;

samples/vfio-mdev/mbochs.c

1244

struct vfio_device_gfx_plane_info plane = {};

samples/vfio-mdev/mbochs.c

1249

if (copy_from_user(&plane, (void __user *)arg, minsz))

samples/vfio-mdev/mbochs.c

1252

if (plane.argsz < minsz)

samples/vfio-mdev/mbochs.c

1255

ret = mbochs_query_gfx_plane(mdev_state, &plane);

samples/vfio-mdev/mbochs.c

1259

if (copy_to_user((void __user *)arg, &plane, minsz))

samples/vfio-mdev/mdpy.c

488

struct vfio_device_gfx_plane_info *plane)

samples/vfio-mdev/mdpy.c

490

if (plane->flags & VFIO_GFX_PLANE_TYPE_PROBE) {

samples/vfio-mdev/mdpy.c

491

if (plane->flags == (VFIO_GFX_PLANE_TYPE_PROBE |

samples/vfio-mdev/mdpy.c

497

if (plane->flags != VFIO_GFX_PLANE_TYPE_REGION)

samples/vfio-mdev/mdpy.c

500

plane->drm_format = mdev_state->type->format;

samples/vfio-mdev/mdpy.c

501

plane->width = mdev_state->type->width;

samples/vfio-mdev/mdpy.c

502

plane->height = mdev_state->type->height;

samples/vfio-mdev/mdpy.c

503

plane->stride = (mdev_state->type->width *

samples/vfio-mdev/mdpy.c

505

plane->size = mdev_state->memsize;

samples/vfio-mdev/mdpy.c

506

plane->region_index = MDPY_DISPLAY_REGION;

samples/vfio-mdev/mdpy.c

509

plane->drm_format_mod = 0;

samples/vfio-mdev/mdpy.c

510

plane->x_pos = 0;

samples/vfio-mdev/mdpy.c

511

plane->y_pos = 0;

samples/vfio-mdev/mdpy.c

512

plane->x_hot = 0;

samples/vfio-mdev/mdpy.c

513

plane->y_hot = 0;

samples/vfio-mdev/mdpy.c

576

struct vfio_device_gfx_plane_info plane = {};

samples/vfio-mdev/mdpy.c

581

if (copy_from_user(&plane, (void __user *)arg, minsz))

samples/vfio-mdev/mdpy.c

584

if (plane.argsz < minsz)

samples/vfio-mdev/mdpy.c

587

ret = mdpy_query_gfx_plane(mdev_state, &plane);

samples/vfio-mdev/mdpy.c

591

if (copy_to_user((void __user *)arg, &plane, minsz))