arch/arc/mm/cache.c

972

write_aux_reg(ARC_REG_IO_COH_AP0_SIZE, order_base_2(mem_sz >> 10) - 2);

arch/arm64/mm/mmu.c

1268

int order = order_base_2(levels);

arch/powerpc/kvm/book3s_hv_builtin.c

60

VM_BUG_ON(order_base_2(nr_pages) < KVM_CMA_CHUNK_ORDER - PAGE_SHIFT);

arch/powerpc/kvm/book3s_hv_builtin.c

62

return cma_alloc(kvm_cma, nr_pages, order_base_2(HPT_ALIGN_PAGES),

arch/powerpc/platforms/pseries/iommu.c

1449

int max_ram_len = order_base_2(ddw_memory_hotplug_max());

arch/powerpc/platforms/pseries/iommu.c

1579

ddw_sz = min(order_base_2(query.largest_available_block << page_shift),

arch/powerpc/platforms/pseries/iommu.c

2081

window_shift = order_base_2(window_size);

arch/powerpc/platforms/pseries/iommu.c

834

prop->window_shift = cpu_to_be32(order_base_2(size));

arch/x86/kernel/cpu/mce/genpool.c

125

order = order_base_2(sizeof(struct mce_evt_llist));

arch/x86/kvm/x86.c

13874

return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));

drivers/clk/mvebu/armada-37xx-periph.c

667

rate->width = order_base_2(table_size);

drivers/clk/sunxi/clk-sun9i-core.c

161

_p = order_base_2(DIV_ROUND_UP(req->parent_rate, req->rate));

drivers/clk/sunxi/clk-sun9i-core.c

247

req->p = order_base_2(div);

drivers/clk/sunxi/clk-sunxi.c

266

div = order_base_2(DIV_ROUND_UP(req->parent_rate, req->rate));

drivers/dax/device.c

434

order_base_2(dev_dax->align >> PAGE_SHIFT);

drivers/edac/sb_edac.c

1664

pvt->channel[i].dimm[j].rowbits = order_base_2(rows);

drivers/edac/sb_edac.c

1665

pvt->channel[i].dimm[j].colbits = order_base_2(cols);

drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c

49

rb_bufsz = order_base_2(ring_size / 4);

drivers/gpu/drm/amd/amdgpu/cik_ih.c

127

rb_bufsz = order_base_2(adev->irq.ih.ring_size / 4);

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

453

rb_bufsz = order_base_2(ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/cz_ih.c

129

rb_bufsz = order_base_2(adev->irq.ih.ring_size / 4);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

5161

(order_base_2(num_sc) << PA_SC_TILE_STEERING_OVERRIDE__NUM_SC__SHIFT) &

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

5164

(order_base_2(num_rb_per_sc) << PA_SC_TILE_STEERING_OVERRIDE__NUM_RB_PER_SC__SHIFT) &

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

5167

(order_base_2(num_packer_per_sc) << PA_SC_TILE_STEERING_OVERRIDE__NUM_PACKER_PER_SC__SHIFT) &

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6528

rb_bufsz = order_base_2(ring->ring_size / 8);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6571

rb_bufsz = order_base_2(ring->ring_size / 8);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6825

rb_bufsz = order_base_2(prop->queue_size / 4) - 1;

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6938

(order_base_2(GFX10_MEC_HPD_SIZE / 4) - 1));

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6984

(order_base_2(prop->queue_size / 4) - 1));

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6986

(order_base_2(AMDGPU_GPU_PAGE_SIZE / 4) - 1));

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3785

rb_bufsz = order_base_2(ring->ring_size / 8);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3825

rb_bufsz = order_base_2(ring->ring_size / 8);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4192

rb_bufsz = order_base_2(prop->queue_size / 4) - 1;

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4334

(order_base_2(GFX11_MEC_HPD_SIZE / 4) - 1));

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4380

(order_base_2(prop->queue_size / 4) - 1));

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4382

(order_base_2(AMDGPU_GPU_PAGE_SIZE / 4) - 1));

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2741

rb_bufsz = order_base_2(ring->ring_size / 8);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3032

rb_bufsz = order_base_2(prop->queue_size / 4) - 1;

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3172

(order_base_2(GFX12_MEC_HPD_SIZE / 4) - 1));

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3218

(order_base_2(prop->queue_size / 4) - 1));

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3220

(order_base_2(AMDGPU_GPU_PAGE_SIZE / 4) - 1));

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2184

(order_base_2(GFX12_MEC_HPD_SIZE / 4) - 1));

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2230

(order_base_2(prop->queue_size / 4) - 1));

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2232

(order_base_2(AMDGPU_GPU_PAGE_SIZE / 4) - 1));

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2155

rb_bufsz = order_base_2(ring->ring_size / 8);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2156

tmp = (order_base_2(AMDGPU_GPU_PAGE_SIZE/8) << 8) | rb_bufsz;

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2244

rb_bufsz = order_base_2(ring->ring_size / 8);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2245

tmp = (order_base_2(AMDGPU_GPU_PAGE_SIZE/8) << 8) | rb_bufsz;

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2264

rb_bufsz = order_base_2(ring->ring_size / 8);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2265

tmp = (order_base_2(AMDGPU_GPU_PAGE_SIZE/8) << 8) | rb_bufsz;

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2551

rb_bufsz = order_base_2(ring->ring_size / 8);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2552

tmp = (order_base_2(AMDGPU_GPU_PAGE_SIZE/8) << 8) | rb_bufsz;

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2784

tmp |= order_base_2(GFX7_MEC_HPD_SIZE / 8);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2861

order_base_2(ring->ring_size / 8);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2863

(order_base_2(AMDGPU_GPU_PAGE_SIZE/8) << 8);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4242

rb_bufsz = order_base_2(ring->ring_size / 8);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4424

(order_base_2(GFX8_MEC_HPD_SIZE / 4) - 1));

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4453

(order_base_2(ring->ring_size / 4) - 1));

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4455

(order_base_2(AMDGPU_GPU_PAGE_SIZE / 4) - 1));

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3407

rb_bufsz = order_base_2(ring->ring_size / 8);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3582

(order_base_2(GFX9_MEC_HPD_SIZE / 4) - 1));

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3629

(order_base_2(ring->ring_size / 4) - 1));

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3631

(order_base_2(AMDGPU_GPU_PAGE_SIZE / 4) - 1));

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

1855

(order_base_2(GFX9_MEC_HPD_SIZE / 4) - 1));

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

1905

(order_base_2(ring->ring_size / 4) - 1));

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

1907

((order_base_2(AMDGPU_GPU_PAGE_SIZE / 4) - 1) << 8));

drivers/gpu/drm/amd/amdgpu/iceland_ih.c

129

rb_bufsz = order_base_2(adev->irq.ih.ring_size / 4);

drivers/gpu/drm/amd/amdgpu/ih_v6_0.c

217

int rb_bufsz = order_base_2(ih->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/ih_v6_1.c

189

int rb_bufsz = order_base_2(ih->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/ih_v7_0.c

189

int rb_bufsz = order_base_2(ih->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1139

(order_base_2(MES_EOP_SIZE / 4) - 1));

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1179

(order_base_2(ring->ring_size / 4) - 1));

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1181

((order_base_2(AMDGPU_GPU_PAGE_SIZE / 4) - 1) << 8));

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1291

(order_base_2(MES_EOP_SIZE / 4) - 1));

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1331

(order_base_2(ring->ring_size / 4) - 1));

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1333

((order_base_2(AMDGPU_GPU_PAGE_SIZE / 4) - 1) << 8));

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1266

(order_base_2(MES_EOP_SIZE / 4) - 1));

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1306

(order_base_2(ring->ring_size / 4) - 1));

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1308

((order_base_2(AMDGPU_GPU_PAGE_SIZE / 4) - 1) << 8));

drivers/gpu/drm/amd/amdgpu/navi10_ih.c

215

int rb_bufsz = order_base_2(ih->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c

426

rb_bufsz = order_base_2(ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

666

rb_bufsz = order_base_2(ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1068

uint32_t rb_bufsz = order_base_2(ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

663

uint32_t rb_bufsz = order_base_2(ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

704

rb_bufsz = order_base_2(ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

966

order_base_2(prop->queue_size / 4) << SDMA0_RLC0_RB_CNTL__RB_SIZE__SHIFT |

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

553

rb_bufsz = order_base_2(ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

866

order_base_2(prop->queue_size / 4) << SDMA0_RLC0_RB_CNTL__RB_SIZE__SHIFT |

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

498

rb_bufsz = order_base_2(ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

864

order_base_2(prop->queue_size / 4) << SDMA0_QUEUE0_RB_CNTL__RB_SIZE__SHIFT |

drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c

488

rb_bufsz = order_base_2(ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c

882

order_base_2(prop->queue_size / 4) << SDMA0_QUEUE0_RB_CNTL__RB_SIZE__SHIFT |

drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c

470

rb_bufsz = order_base_2(ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c

875

order_base_2(prop->queue_size / 4) << SDMA0_SDMA_QUEUE0_RB_CNTL__RB_SIZE__SHIFT |

drivers/gpu/drm/amd/amdgpu/si_dma.c

155

rb_bufsz = order_base_2(ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/si_ih.c

78

rb_bufsz = order_base_2(adev->irq.ih.ring_size / 4);

drivers/gpu/drm/amd/amdgpu/tonga_ih.c

125

rb_bufsz = order_base_2(adev->irq.ih.ring_size / 4);

drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c

443

rb_bufsz = order_base_2(ring->ring_size);

drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c

401

rb_bufsz = order_base_2(ring->ring_size);

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

419

rb_bufsz = order_base_2(ring->ring_size);

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

838

rb_bufsz = order_base_2(ring->ring_size);

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

1085

rb_bufsz = order_base_2(ring->ring_size);

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

918

size = order_base_2(ring->ring_size);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1127

rb_bufsz = order_base_2(ring->ring_size);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

963

rb_bufsz = order_base_2(ring->ring_size);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1131

rb_bufsz = order_base_2(ring->ring_size);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

2077

tmp = order_base_2(ring->ring_size);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

952

rb_bufsz = order_base_2(ring->ring_size);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1107

rb_bufsz = order_base_2(ring->ring_size);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1297

rb_bufsz = order_base_2(ring->ring_size);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1520

rb_bufsz = order_base_2(ring->ring_size);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1138

rb_bufsz = order_base_2(ring->ring_size);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1329

rb_bufsz = order_base_2(ring->ring_size);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1519

tmp = order_base_2(ring->ring_size);

drivers/gpu/drm/amd/amdgpu/vega10_ih.c

160

int rb_bufsz = order_base_2(ih->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/vega20_ih.c

196

int rb_bufsz = order_base_2(ih->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/vpe_v2_0.c

191

rb_bufsz = order_base_2(ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c

217

rb_bufsz = order_base_2(ring->ring_size / 4);

drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_cik.c

191

m->cp_hqd_pq_control |= order_base_2(q->queue_size / 4) - 1;

drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_cik.c

230

m->sdma_rlc_rb_cntl = order_base_2(q->queue_size / 4)

drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_cik.c

351

m->cp_hqd_pq_control |= order_base_2(q->queue_size / 4) - 1;

drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c

280

m->cp_hqd_pq_control |= order_base_2(q->queue_size / 4) - 1;

drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c

313

min(0xA, order_base_2(q->eop_ring_buffer_size / 4) - 1) : 0;

drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c

552

m->sdmax_rlcx_rb_cntl = order_base_2(q->queue_size / 4)

drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_vi.c

186

m->cp_hqd_pq_control |= order_base_2(q->queue_size / 4) - 1;

drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_vi.c

218

order_base_2(q->eop_ring_buffer_size / 4) - 1) : 0;

drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_vi.c

376

m->sdmax_rlcx_rb_cntl = order_base_2(q->queue_size / 4)

drivers/gpu/drm/etnaviv/etnaviv_cmdbuf.c

120

int order = order_base_2(ALIGN(cmdbuf->size, SUBALLOC_GRANULE) /

drivers/gpu/drm/etnaviv/etnaviv_cmdbuf.c

92

order = order_base_2(ALIGN(size, SUBALLOC_GRANULE) / SUBALLOC_GRANULE);

drivers/gpu/drm/i915/display/intel_display_types.h

1834

#define INTEL_DP_LANE_COUNT_EXP_BITS order_base_2(INTEL_DP_MAX_SUPPORTED_LANE_CONFIGS)

drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c

2274

order_base_2(ce->parallel.number_children

drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c

2299

order_base_2(ce->parallel.number_children

drivers/gpu/drm/nouveau/nvkm/core/ramht.c

153

ramht->bits = order_base_2(ramht->size);

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/gr.c

224

align = order_base_2(size);

drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.c

380

u8 page = max(order_base_2(align), 12);

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/base.c

89

ptp->shift = order_base_2(size);

drivers/gpu/drm/radeon/cik.c

4069

rb_bufsz = order_base_2(ring->ring_size / 8);

drivers/gpu/drm/radeon/cik.c

4070

tmp = (order_base_2(RADEON_GPU_PAGE_SIZE/8) << 8) | rb_bufsz;

drivers/gpu/drm/radeon/cik.c

4549

tmp |= order_base_2(MEC_HPD_SIZE / 8);

drivers/gpu/drm/radeon/cik.c

4663

order_base_2(rdev->ring[idx].ring_size / 8);

drivers/gpu/drm/radeon/cik.c

4665

(order_base_2(RADEON_GPU_PAGE_SIZE/8) << 8);

drivers/gpu/drm/radeon/cik.c

6969

rb_bufsz = order_base_2(rdev->ih.ring_size / 4);

drivers/gpu/drm/radeon/cik_sdma.c

387

rb_bufsz = order_base_2(ring->ring_size / 4);

drivers/gpu/drm/radeon/evergreen.c

3087

rb_bufsz = order_base_2(ring->ring_size / 8);

drivers/gpu/drm/radeon/evergreen.c

3088

tmp = (order_base_2(RADEON_GPU_PAGE_SIZE/8) << 8) | rb_bufsz;

drivers/gpu/drm/radeon/ni.c

1668

rb_cntl = order_base_2(ring->ring_size / 8);

drivers/gpu/drm/radeon/ni.c

1669

rb_cntl |= order_base_2(RADEON_GPU_PAGE_SIZE/8) << 8;

drivers/gpu/drm/radeon/ni_dma.c

209

rb_bufsz = order_base_2(ring->ring_size / 4);

drivers/gpu/drm/radeon/r100.c

1169

rb_bufsz = order_base_2(ring_size / 8);

drivers/gpu/drm/radeon/r600.c

2730

rb_bufsz = order_base_2(ring->ring_size / 8);

drivers/gpu/drm/radeon/r600.c

2731

tmp = (order_base_2(RADEON_GPU_PAGE_SIZE/8) << 8) | rb_bufsz;

drivers/gpu/drm/radeon/r600.c

2786

rb_bufsz = order_base_2(ring_size / 8);

drivers/gpu/drm/radeon/r600.c

3471

rb_bufsz = order_base_2(ring_size / 4);

drivers/gpu/drm/radeon/r600.c

3708

rb_bufsz = order_base_2(rdev->ih.ring_size / 4);

drivers/gpu/drm/radeon/r600_dma.c

130

rb_bufsz = order_base_2(ring->ring_size / 4);

drivers/gpu/drm/radeon/si.c

3649

rb_bufsz = order_base_2(ring->ring_size / 8);

drivers/gpu/drm/radeon/si.c

3650

tmp = (order_base_2(RADEON_GPU_PAGE_SIZE/8) << 8) | rb_bufsz;

drivers/gpu/drm/radeon/si.c

3680

rb_bufsz = order_base_2(ring->ring_size / 8);

drivers/gpu/drm/radeon/si.c

3681

tmp = (order_base_2(RADEON_GPU_PAGE_SIZE/8) << 8) | rb_bufsz;

drivers/gpu/drm/radeon/si.c

3704

rb_bufsz = order_base_2(ring->ring_size / 8);

drivers/gpu/drm/radeon/si.c

3705

tmp = (order_base_2(RADEON_GPU_PAGE_SIZE/8) << 8) | rb_bufsz;

drivers/gpu/drm/radeon/si.c

5992

rb_bufsz = order_base_2(rdev->ih.ring_size / 4);

drivers/gpu/drm/radeon/uvd_v1_0.c

377

rb_bufsz = order_base_2(ring->ring_size);

drivers/hwmon/aspeed-g6-pwm-tach.c

205

div_h = order_base_2(DIV64_U64_ROUND_UP(priv->clk_rate * expect_period, divisor));

drivers/iio/adc/max11410.c

558

gain = order_base_2(val2);

drivers/infiniband/hw/efa/efa_verbs.c

1668

params.page_shift = order_base_2(pg_sz);

drivers/infiniband/hw/hns/hns_roce_alloc.c

89

buf->trunk_shift = order_base_2(ALIGN(size, PAGE_SIZE));

drivers/infiniband/hw/hns/hns_roce_alloc.c

92

buf->trunk_shift = order_base_2(ALIGN(page_size, PAGE_SIZE));

drivers/infiniband/hw/hns/hns_roce_mr.c

843

buf_attr->page_shift = order_base_2(page_sz);

drivers/infiniband/hw/hns/hns_roce_mr.c

930

order_base_2(DIV_ROUND_UP(buf_size, HNS_HW_PAGE_SIZE));

drivers/infiniband/hw/ionic/ionic_controlpath.c

1107

mr->buf.page_size_log2 = order_base_2(ibmr->page_size);

drivers/infiniband/hw/ionic/ionic_controlpath.c

1439

order_base_2(attr->max_dest_rd_atomic + 1);

drivers/infiniband/hw/ionic/ionic_controlpath.c

1446

order_base_2(attr->max_rd_atomic + 2) - 1;

drivers/infiniband/hw/ionic/ionic_controlpath.c

1732

qp->sq_cmb_order = order_base_2(qp->sq.size / PAGE_SIZE);

drivers/infiniband/hw/ionic/ionic_controlpath.c

1958

qp->rq_cmb_order = order_base_2(qp->rq.size / PAGE_SIZE);

drivers/infiniband/hw/ionic/ionic_datapath.c

1113

wqe->reg_mr.page_size_log2 = order_base_2(mr->ibmr.page_size);

drivers/infiniband/hw/ionic/ionic_ibdev.c

272

order_base_2(dev->lif_cfg.cq_count / dev->lif_cfg.udma_count);

drivers/infiniband/hw/ionic/ionic_ibdev.c

281

order_base_2(dev->lif_cfg.qp_count / dev->lif_cfg.udma_count);

drivers/infiniband/hw/ionic/ionic_pgtbl.c

115

buf->page_size_log2 = order_base_2(page_size);

drivers/infiniband/hw/ionic/ionic_queue.c

20

q->depth_log2 = order_base_2(depth + 1);

drivers/infiniband/hw/ionic/ionic_queue.c

21

q->stride_log2 = order_base_2(stride);

drivers/infiniband/hw/mana/main.c

402

create_req->gdma_page_type = order_base_2(page_sz) - MANA_PAGE_SHIFT;

drivers/infiniband/hw/mlx4/mlx4_ib.h

958

return order_base_2(pg_sz);

drivers/infiniband/hw/mlx5/cq.c

1387

page_shift = order_base_2(page_size);

drivers/infiniband/hw/mlx5/cq.c

790

order_base_2(page_size) - MLX5_ADAPTER_PAGE_SHIFT);

drivers/infiniband/hw/mlx5/devx.c

2305

pgsz_bitmap &= GENMASK_ULL(max_t(u64, order_base_2(umem->length),

drivers/infiniband/hw/mlx5/devx.c

2378

order_base_2(page_size) - MLX5_ADAPTER_PAGE_SHIFT);

drivers/infiniband/hw/mlx5/mlx5_ib.h

94

GENMASK(31, order_base_2(scale)), scale, \

drivers/infiniband/hw/mlx5/mr.c

1148

mr->page_shift = order_base_2(page_size);

drivers/infiniband/hw/mlx5/mr.c

467

mr->page_shift = order_base_2(page_size);

drivers/infiniband/hw/mlx5/mr.c

559

mr->page_shift = order_base_2(page_size);

drivers/infiniband/hw/mlx5/odp.c

865

page_shift = order_base_2(page_size);

drivers/infiniband/hw/mlx5/qp.c

1053

order_base_2(page_size) - MLX5_ADAPTER_PAGE_SHIFT);

drivers/infiniband/hw/mlx5/qp.c

1420

order_base_2(page_size) - MLX5_ADAPTER_PAGE_SHIFT);

drivers/infiniband/hw/mlx5/qp.c

1507

order_base_2(page_size) - MLX5_ADAPTER_PAGE_SHIFT);

drivers/infiniband/hw/mlx5/qp.c

913

rwq->page_shift = order_base_2(page_size);

drivers/infiniband/hw/mlx5/srq_cmd.c

100

in->log_page_size = order_base_2(page_size) - MLX5_ADAPTER_PAGE_SHIFT;

drivers/infiniband/hw/mlx5/umr.c

1008

max_page_shift = order_base_2(mr->ibmr.length);

drivers/infiniband/sw/rxe/rxe_queue.c

81

q->log2_elem_size = order_base_2(elem_size);

drivers/iommu/iova.c

810

unsigned int log_size = order_base_2(size);

drivers/iommu/iova.c

866

unsigned int log_size = order_base_2(size);

drivers/iommu/virtio-iommu.c

1242

order_base_2(viommu->geometry.aperture_end));

drivers/irqchip/irq-armada-370-xp.c

277

order_base_2(nr_irqs));

drivers/irqchip/irq-armada-370-xp.c

299

bitmap_release_region(mpic->msi_used, d->hwirq, order_base_2(nr_irqs));

drivers/irqchip/irq-gic-v5-its.c

238

final_span = order_base_2(num_events % events_per_l2_table);

drivers/irqchip/irq-gic-v5-its.c

489

event_id_bits = order_base_2(its_dev->num_events);

drivers/media/platform/allegro-dvt/nal-h264.c

313

order_base_2(pps->num_slice_groups_minus1 + 1),

drivers/mmc/host/usdhi6rol0.c

891

val = order_base_2(ticks) - 13;

drivers/net/ethernet/cadence/macb_main.c

4384

queue_id = order_base_2(entry->gate_mask);

drivers/net/ethernet/intel/ice/ice_lib.c

1024

pow = (u16)order_base_2(num_rxq_per_tc);

drivers/net/ethernet/intel/ice/ice_lib.c

1197

pow = order_base_2(qcount);

drivers/net/ethernet/intel/ice/ice_lib.c

3280

pow = order_base_2(tc0_qcount);

drivers/net/ethernet/marvell/octeontx2/nic/qos.h

42

DECLARE_HASHTABLE(qos_hlist, order_base_2(OTX2_QOS_MAX_LEAF_NODES));

drivers/net/ethernet/mellanox/mlx4/main.c

3951

log_num_mac = order_base_2(saved_value.vu32);

drivers/net/ethernet/mellanox/mlx5/core/alloc.c

398

buf->page_shift = clamp_t(int, order_base_2(size),

drivers/net/ethernet/mellanox/mlx5/core/en.h

103

MLX5_MPWRQ_LOG_STRIDE_SZ(mdev, order_base_2(MLX5E_RX_MAX_HEAD))

drivers/net/ethernet/mellanox/mlx5/core/en.h

122

#define MLX5E_ORDER2_MAX_PACKET_MTU (order_base_2(10 * 1024))

drivers/net/ethernet/mellanox/mlx5/core/en.h

86

order_base_2(MLX5_SKB_FRAG_SZ(XDP_PACKET_HEADROOM + MLX5E_RX_MAX_HEAD))

drivers/net/ethernet/mellanox/mlx5/core/en/htb.c

21

DECLARE_HASHTABLE(qos_tc2node, order_base_2(MLX5E_QOS_MAX_LEAF_NODES));

drivers/net/ethernet/mellanox/mlx5/core/en/params.c

1241

return max_t(u8, MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE, order_base_2(wqebbs));

drivers/net/ethernet/mellanox/mlx5/core/en/params.c

316

order_base_2(linear_stride_sz);

drivers/net/ethernet/mellanox/mlx5/core/en/params.c

34

req_page_shift = order_base_2(xsk->chunk_size);

drivers/net/ethernet/mellanox/mlx5/core/en/params.c

36

req_page_shift = order_base_2(qcfg->rx_page_size);

drivers/net/ethernet/mellanox/mlx5/core/en/params.c

398

log_stride_sz = order_base_2(linear_stride_sz);

drivers/net/ethernet/mellanox/mlx5/core/en/params.c

441

return order_base_2(DIV_ROUND_UP(MLX5E_SHAMPO_WQ_RESRV_SIZE,

drivers/net/ethernet/mellanox/mlx5/core/en/params.c

450

return order_base_2(mlx5e_rx_get_linear_stride_sz(mdev, params,

drivers/net/ethernet/mellanox/mlx5/core/en/params.c

822

info->log_num_frags = order_base_2(info->num_frags);

drivers/net/ethernet/mellanox/mlx5/core/en/params.c

841

return order_base_2(sz);

drivers/net/ethernet/mellanox/mlx5/core/en/params.c

869

return order_base_2((wqe_size / rsrv_size) * wq_size * (pkt_per_rsrv + 1));

drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c

437

log_rq_size = order_base_2(param->rx_pending);

drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c

438

log_sq_size = order_base_2(param->tx_pending);

drivers/net/ethernet/mellanox/mlx5/core/en_main.c

1178

order_base_2(rq->mpwqe.shampo->hd_per_wq));

drivers/net/ethernet/mellanox/mlx5/core/eq.c

257

u8 log_eq_size = order_base_2(param->nent + MLX5_NUM_SPARE_EQE);

drivers/net/ethernet/mellanox/mlx5/core/wc.c

17

#define TEST_WC_LOG_CQ_SZ (order_base_2(TEST_WC_NUM_WQES))

drivers/net/ethernet/netronome/nfp/abm/cls.c

127

bits_per_prio = roundup_pow_of_two(order_base_2(abm->num_bands));

drivers/net/ethernet/netronome/nfp/abm/cls.c

132

base_shift = 8 - order_base_2(abm->num_prios);

drivers/net/ethernet/netronome/nfp/abm/ctrl.c

319

size = roundup_pow_of_two(order_base_2(abm->num_bands));

drivers/net/ethernet/netronome/nfp/abm/ctrl.c

392

abm->dscp_mask = GENMASK(7, 8 - order_base_2(abm->num_prios));

drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp.c

633

buf_order = order_base_2(roundup_pow_of_two(max_size));

drivers/net/ethernet/pensando/ionic/ionic_lif.c

675

new->cmb_order = order_base_2(new->cmb_q_size / PAGE_SIZE);

drivers/net/ethernet/stmicro/stmmac/stmmac_main.c

2250

pp_params.order = order_base_2(num_pages);

drivers/net/ethernet/ti/cpsw_ale.c

1603

ale->port_num_bits = order_base_2(ale->params.ale_ports);

drivers/pci/controller/cadence/pcie-cadence-ep.c

231

u8 mmc = order_base_2(nr_irqs);

drivers/pci/controller/dwc/pcie-designware-ep.c

702

u8 mmc = order_base_2(nr_irqs);

drivers/pci/controller/dwc/pcie-designware-host.c

182

order_base_2(nr_irqs));

drivers/pci/controller/dwc/pcie-designware-host.c

202

bitmap_release_region(pp->msi_irq_in_use, d->hwirq, order_base_2(nr_irqs));

drivers/pci/controller/dwc/pcie-tegra194.c

1152

pcie->aspm_l1_enter_lat = min_t(u32, order_base_2(us), 7);

drivers/pci/controller/pci-aardvark.c

1354

order_base_2(nr_irqs));

drivers/pci/controller/pci-aardvark.c

1375

bitmap_release_region(pcie->msi_used, d->hwirq, order_base_2(nr_irqs));

drivers/pci/controller/pci-tegra.c

1643

hwirq = bitmap_find_free_region(msi->used, INT_PCI_MSI_NR, order_base_2(nr_irqs));

drivers/pci/controller/pci-tegra.c

1668

bitmap_release_region(msi->used, d->hwirq, order_base_2(nr_irqs));

drivers/pci/controller/pcie-apple.c

246

order_base_2(nr_irqs));

drivers/pci/controller/pcie-apple.c

275

bitmap_release_region(pcie->bitmap, d->hwirq, order_base_2(nr_irqs));

drivers/pci/controller/pcie-brcmstb.c

602

order_base_2(nr_irqs));

drivers/pci/controller/pcie-brcmstb.c

612

bitmap_release_region(msi->used, hwirq, order_base_2(nr_irqs));

drivers/pci/controller/pcie-iproc-msi.c

264

order_base_2(msi->nr_cpus * nr_irqs));

drivers/pci/controller/pcie-iproc-msi.c

292

order_base_2(msi->nr_cpus * nr_irqs));

drivers/pci/controller/pcie-mediatek-gen3.c

696

order_base_2(nr_irqs));

drivers/pci/controller/pcie-mediatek-gen3.c

723

order_base_2(nr_irqs));

drivers/pci/controller/pcie-rcar-ep.c

263

u8 mmc = order_base_2(nr_irqs);

drivers/pci/controller/pcie-rcar-host.c

654

hwirq = bitmap_find_free_region(msi->used, INT_PCI_MSI_NR, order_base_2(nr_irqs));

drivers/pci/controller/pcie-rcar-host.c

677

bitmap_release_region(msi->used, d->hwirq, order_base_2(nr_irqs));

drivers/pci/controller/pcie-rockchip-ep.c

315

u8 mmc = order_base_2(nr_irqs);

drivers/pci/controller/pcie-rzg3s-host.c

652

order_base_2(nr_irqs));

drivers/pci/controller/pcie-rzg3s-host.c

676

bitmap_release_region(msi->map, d->hwirq, order_base_2(nr_irqs));

drivers/pci/controller/pcie-xilinx.c

230

hwirq = bitmap_find_free_region(pcie->msi_map, XILINX_NUM_MSI_IRQS, order_base_2(nr_irqs));

drivers/pci/controller/pcie-xilinx.c

253

bitmap_release_region(pcie->msi_map, d->hwirq, order_base_2(nr_irqs));

drivers/pci/endpoint/functions/pci-epf-mhi.c

744

order_base_2(info->msi_count));

drivers/phy/allwinner/phy-sun6i-mipi-dphy.c

300

div = 16 >> order_base_2(DIV_ROUND_UP(mipi_symbol_rate, 264000000));

drivers/pinctrl/intel/pinctrl-intel.c

873

v = order_base_2(debounce * NSEC_PER_USEC / DEBOUNCE_PERIOD_NSEC);

drivers/pinctrl/qcom/pinctrl-msm.c

185

mask = GENMASK(g->mux_bit + order_base_2(g->nfuncs) - 1, g->mux_bit);

drivers/pwm/pwm-sl28cpld.c

142

prescaler = order_base_2(prescaler);

drivers/ras/amd/atl/denormalize.c

166

num_intlv_bits = order_base_2(ctx->map.num_intlv_chan);

drivers/ras/amd/atl/map.c

548

ctx->map.total_intlv_bits = order_base_2(ctx->map.total_intlv_chan);

drivers/soc/ti/knav_qmss_queue.c

1728

kdev->inst_shift = order_base_2(size);

drivers/spi/spi-sun6i.c

401

div = min(SUN6I_CLK_CTL_CDR1_MASK, order_base_2(div_cdr1));

drivers/watchdog/imgpdc_wdt.c

119

val |= order_base_2(wdt->wdt_dev.timeout * clk_rate) - 1;

drivers/watchdog/imgpdc_wdt.c

212

if (order_base_2(clk_rate) > PDC_WDT_CONFIG_DELAY_MASK + 1) {

drivers/watchdog/imgpdc_wdt.c

217

if (order_base_2(clk_rate) == 0)

drivers/watchdog/mlx_wdt.c

120

hw_timeout = order_base_2(timeout * MLXREG_WDT_CLOCK_SCALE);

fs/ext4/mballoc.c

3607

int blocksize_bits = order_base_2(size);

include/linux/blkdev.h

1627

return order_base_2(size >> SECTOR_SHIFT) + SECTOR_SHIFT;

include/linux/log2.h

231

return order_base_2(n) + 1;

include/linux/log2.h

232

return order_base_2(n);

include/linux/mm_inline.h

142

return workingset ? MAX_NR_TIERS - 1 : order_base_2(refs);

include/linux/mm_types.h

672

#define STRUCT_PAGE_MAX_SHIFT (order_base_2(sizeof(struct page)))

include/linux/page-flags.h

275

shift = order + order_base_2(sizeof(struct page));

kernel/bounds.c

23

DEFINE(NR_CPUS_BITS, order_base_2(CONFIG_NR_CPUS));

kernel/bounds.c

27

DEFINE(LRU_GEN_WIDTH, order_base_2(MAX_NR_GENS + 1));

kernel/events/ring_buffer.c

847

if (order_base_2(size) > PAGE_SHIFT+MAX_PAGE_ORDER)

kernel/rcu/tasks.h

149

.percpu_enqueue_shift = order_base_2(CONFIG_NR_CPUS), \

kernel/rcu/tasks.h

508

WRITE_ONCE(rtp->percpu_enqueue_shift, order_base_2(rcu_task_cpu_ids));

kernel/time/timer_migration.c

2139

cpulvl = DIV_ROUND_UP(order_base_2(cpus_per_node),

kernel/time/timer_migration.c

2143

nodelvl = DIV_ROUND_UP(order_base_2(nnodes),

mm/hugetlb.c

4167

BUG_ON(order < order_base_2(__NR_USED_SUBPAGE));

mm/percpu-km.c

65

pages = alloc_pages(gfp, order_base_2(nr_pages));

mm/percpu-km.c

98

__free_pages(chunk->data, order_base_2(nr_pages));

net/ipv4/tcp_metrics.c

1029

tcp_metrics_hash_log = order_base_2(slots);

net/netfilter/ipvs/ip_vs_conn.c

2022

max_avail = order_base_2(totalram_pages()) + PAGE_SHIFT;

net/netfilter/ipvs/ip_vs_conn.c

2026

max_avail -= order_base_2(sizeof(struct ip_vs_conn));

net/netfilter/ipvs/ip_vs_core.c

217

t->bits = order_base_2(buckets);

sound/soc/sunxi/sun8i-codec.c

561

return order_base_2(div);