arch/m68k/coldfire/intc-5249.c

22

u32 imr;

arch/m68k/coldfire/intc-5249.c

23

imr = readl(MCFSIM2_GPIOINTENABLE);

arch/m68k/coldfire/intc-5249.c

24

imr &= ~(0x1 << (d->irq - MCF_IRQ_GPIO0));

arch/m68k/coldfire/intc-5249.c

25

writel(imr, MCFSIM2_GPIOINTENABLE);

arch/m68k/coldfire/intc-5249.c

30

u32 imr;

arch/m68k/coldfire/intc-5249.c

31

imr = readl(MCFSIM2_GPIOINTENABLE);

arch/m68k/coldfire/intc-5249.c

32

imr |= (0x1 << (d->irq - MCF_IRQ_GPIO0));

arch/m68k/coldfire/intc-5249.c

33

writel(imr, MCFSIM2_GPIOINTENABLE);

arch/m68k/coldfire/intc-525x.c

23

u32 imr = readl(MCFSIM2_GPIOINTENABLE);

arch/m68k/coldfire/intc-525x.c

28

imr &= ~(0x001 << irq);

arch/m68k/coldfire/intc-525x.c

30

imr &= ~(0x100 << irq);

arch/m68k/coldfire/intc-525x.c

31

writel(imr, MCFSIM2_GPIOINTENABLE);

arch/m68k/coldfire/intc-525x.c

36

u32 imr = readl(MCFSIM2_GPIOINTENABLE);

arch/m68k/coldfire/intc-525x.c

41

imr |= (0x001 << irq);

arch/m68k/coldfire/intc-525x.c

43

imr |= (0x100 << irq);

arch/m68k/coldfire/intc-525x.c

44

writel(imr, MCFSIM2_GPIOINTENABLE);

arch/m68k/coldfire/intc-525x.c

49

u32 imr = 0;

arch/m68k/coldfire/intc-525x.c

54

imr |= (0x001 << irq);

arch/m68k/coldfire/intc-525x.c

56

imr |= (0x100 << irq);

arch/m68k/coldfire/intc-525x.c

57

writel(imr, MCFSIM2_GPIOINTCLEAR);

arch/m68k/coldfire/intc.c

47

u16 imr;

arch/m68k/coldfire/intc.c

48

imr = __raw_readw(MCFSIM_IMR);

arch/m68k/coldfire/intc.c

49

__raw_writew(imr | (0x1 << index), MCFSIM_IMR);

arch/m68k/coldfire/intc.c

54

u16 imr;

arch/m68k/coldfire/intc.c

55

imr = __raw_readw(MCFSIM_IMR);

arch/m68k/coldfire/intc.c

56

__raw_writew(imr & ~(0x1 << index), MCFSIM_IMR);

arch/m68k/coldfire/intc.c

61

u16 imr;

arch/m68k/coldfire/intc.c

62

imr = __raw_readw(MCFSIM_IMR);

arch/m68k/coldfire/intc.c

63

imr |= mask;

arch/m68k/coldfire/intc.c

64

__raw_writew(imr, MCFSIM_IMR);

arch/m68k/coldfire/intc.c

71

u32 imr;

arch/m68k/coldfire/intc.c

72

imr = __raw_readl(MCFSIM_IMR);

arch/m68k/coldfire/intc.c

73

__raw_writel(imr | (0x1 << index), MCFSIM_IMR);

arch/m68k/coldfire/intc.c

78

u32 imr;

arch/m68k/coldfire/intc.c

79

imr = __raw_readl(MCFSIM_IMR);

arch/m68k/coldfire/intc.c

80

__raw_writel(imr & ~(0x1 << index), MCFSIM_IMR);

arch/m68k/coldfire/intc.c

85

u32 imr;

arch/m68k/coldfire/intc.c

86

imr = __raw_readl(MCFSIM_IMR);

arch/m68k/coldfire/intc.c

87

imr |= mask;

arch/m68k/coldfire/intc.c

88

__raw_writel(imr, MCFSIM_IMR);

arch/m68k/include/asm/mcfintc.h

79

static inline void mcf_mapirq2imr(int irq, int imr)

arch/m68k/include/asm/mcfintc.h

81

mcf_irq2imr[irq] = imr;

arch/mips/include/asm/sgi/heart.h

112

u64 imr[HEART_MAX_CPUS]; /* + 0x10000 */

arch/mips/kernel/irq_txx9.c

149

__raw_writel(0, &txx9_ircptr->imr);

arch/mips/kernel/irq_txx9.c

157

__raw_writel(irc_elevel, &txx9_ircptr->imr);

arch/mips/kernel/irq_txx9.c

28

u32 imr;

arch/mips/sgi-ip30/ip30-irq.c

105

mask = (heart_read(&heart_regs->imr[cpu]) &

arch/mips/sgi-ip30/ip30-irq.c

150

heart_write(*mask, &heart_regs->imr[hd->cpu]);

arch/mips/sgi-ip30/ip30-irq.c

159

heart_write(*mask, &heart_regs->imr[hd->cpu]);

arch/mips/sgi-ip30/ip30-irq.c

169

heart_write(*mask, &heart_regs->imr[hd->cpu]);

arch/mips/sgi-ip30/ip30-irq.c

259

heart_write(*mask, &heart_regs->imr[cpu]);

arch/mips/sgi-ip30/ip30-irq.c

272

heart_write(HEART_CLR_ALL_MASK, &heart_regs->imr[0]);

arch/mips/sgi-ip30/ip30-irq.c

273

heart_write(HEART_CLR_ALL_MASK, &heart_regs->imr[1]);

arch/mips/sgi-ip30/ip30-irq.c

274

heart_write(HEART_CLR_ALL_MASK, &heart_regs->imr[2]);

arch/mips/sgi-ip30/ip30-irq.c

275

heart_write(HEART_CLR_ALL_MASK, &heart_regs->imr[3]);

arch/mips/sgi-ip30/ip30-irq.c

283

heart_write(*mask, &heart_regs->imr[0]);

arch/mips/sgi-ip30/ip30-irq.c

286

heart_write(*mask, &heart_regs->imr[1]);

arch/mips/sgi-ip30/ip30-irq.c

51

mask = heart_read(&heart_regs->imr[cpu]);

arch/mips/sgi-ip30/ip30-irq.c

60

heart_write(mask & ~(pending), &heart_regs->imr[cpu]);

arch/mips/sgi-ip30/ip30-irq.c

94

heart_write(mask, &heart_regs->imr[cpu]);

arch/powerpc/include/asm/mpc52xx_psc.h

184

u16 imr;

arch/powerpc/include/asm/mpc52xx_psc.h

187

#define mpc52xx_psc_imr isr_imr.imr

arch/powerpc/include/asm/mpc52xx_psc.h

330

u16 imr; /* PSC + 0x24 */

arch/powerpc/sysdev/fsl_rmu.c

1013

setbits32(&rmu->msg_regs->imr, RIO_MSG_IMR_MI);

arch/powerpc/sysdev/fsl_rmu.c

118

u32 imr;

arch/powerpc/sysdev/fsl_rmu.c

904

out_be32(&rmu->msg_regs->imr, 0x001b0060);

arch/powerpc/sysdev/fsl_rmu.c

907

setbits32(&rmu->msg_regs->imr, (get_bitmask_order(entries) - 2) << 12);

arch/powerpc/sysdev/fsl_rmu.c

910

setbits32(&rmu->msg_regs->imr, 0x1);

arch/powerpc/sysdev/fsl_rmu.c

930

out_be32(&rmu->msg_regs->imr, 0);

arch/x86/include/uapi/asm/kvm.h

66

__u8 imr; /* interrupt mask register */

arch/x86/kvm/i8259.c

116

return (s->imr & mask) ? -1 : ret;

arch/x86/kvm/i8259.c

141

mask = s->irr & ~s->imr;

arch/x86/kvm/i8259.c

205

s->pics[irq >> 3].imr, ret == 0);

arch/x86/kvm/i8259.c

277

s->imr = 0;

arch/x86/kvm/i8259.c

364

u8 imr_diff = s->imr ^ val,

arch/x86/kvm/i8259.c

366

s->imr = val;

arch/x86/kvm/i8259.c

373

!!(s->imr & (1 << irq)));

arch/x86/kvm/i8259.c

435

ret = s->imr;

arch/x86/kvm/irq.h

33

u8 imr; /* interrupt mask register */

arch/x86/kvm/trace.h

584

TP_PROTO(__u8 chip, __u8 pin, __u8 elcr, __u8 imr, bool coalesced),

arch/x86/kvm/trace.h

585

TP_ARGS(chip, pin, elcr, imr, coalesced),

arch/x86/kvm/trace.h

591

__field( __u8, imr )

arch/x86/kvm/trace.h

599

__entry->imr = imr;

arch/x86/kvm/trace.h

606

(__entry->imr & (1 << __entry->pin)) ? "|masked":"",

arch/x86/platform/intel-quark/imr.c

110

static int imr_read(struct imr_device *idev, u32 imr_id, struct imr_regs *imr)

arch/x86/platform/intel-quark/imr.c

115

ret = iosf_mbi_read(QRK_MBI_UNIT_MM, MBI_REG_READ, reg++, &imr->addr_lo);

arch/x86/platform/intel-quark/imr.c

119

ret = iosf_mbi_read(QRK_MBI_UNIT_MM, MBI_REG_READ, reg++, &imr->addr_hi);

arch/x86/platform/intel-quark/imr.c

123

ret = iosf_mbi_read(QRK_MBI_UNIT_MM, MBI_REG_READ, reg++, &imr->rmask);

arch/x86/platform/intel-quark/imr.c

127

return iosf_mbi_read(QRK_MBI_UNIT_MM, MBI_REG_READ, reg++, &imr->wmask);

arch/x86/platform/intel-quark/imr.c

141

static int imr_write(struct imr_device *idev, u32 imr_id, struct imr_regs *imr)

arch/x86/platform/intel-quark/imr.c

149

ret = iosf_mbi_write(QRK_MBI_UNIT_MM, MBI_REG_WRITE, reg++, imr->addr_lo);

arch/x86/platform/intel-quark/imr.c

153

ret = iosf_mbi_write(QRK_MBI_UNIT_MM, MBI_REG_WRITE, reg++, imr->addr_hi);

arch/x86/platform/intel-quark/imr.c

157

ret = iosf_mbi_write(QRK_MBI_UNIT_MM, MBI_REG_WRITE, reg++, imr->rmask);

arch/x86/platform/intel-quark/imr.c

161

ret = iosf_mbi_write(QRK_MBI_UNIT_MM, MBI_REG_WRITE, reg++, imr->wmask);

arch/x86/platform/intel-quark/imr.c

175

imr_to_phys(imr->addr_lo), imr_to_phys(imr->addr_hi) + IMR_MASK);

arch/x86/platform/intel-quark/imr.c

193

struct imr_regs imr;

arch/x86/platform/intel-quark/imr.c

201

ret = imr_read(idev, i, &imr);

arch/x86/platform/intel-quark/imr.c

210

if (imr_is_enabled(&imr)) {

arch/x86/platform/intel-quark/imr.c

211

base = imr_to_phys(imr.addr_lo);

arch/x86/platform/intel-quark/imr.c

212

end = imr_to_phys(imr.addr_hi) + IMR_MASK;

arch/x86/platform/intel-quark/imr.c

221

&base, &end, size, imr.rmask, imr.wmask,

arch/x86/platform/intel-quark/imr.c

222

imr_is_enabled(&imr) ? "enabled " : "disabled",

arch/x86/platform/intel-quark/imr.c

223

imr.addr_lo & IMR_LOCK ? "locked" : "unlocked");

arch/x86/platform/intel-quark/imr.c

284

static inline int imr_address_overlap(phys_addr_t addr, struct imr_regs *imr)

arch/x86/platform/intel-quark/imr.c

286

return addr >= imr_to_phys(imr->addr_lo) && addr <= imr_to_phys(imr->addr_hi);

arch/x86/platform/intel-quark/imr.c

304

struct imr_regs imr;

arch/x86/platform/intel-quark/imr.c

324

imr.addr_lo = phys_to_imr(base);

arch/x86/platform/intel-quark/imr.c

325

imr.addr_hi = phys_to_imr(end);

arch/x86/platform/intel-quark/imr.c

326

imr.rmask = rmask;

arch/x86/platform/intel-quark/imr.c

327

imr.wmask = wmask;

arch/x86/platform/intel-quark/imr.c

328

if (!imr_is_enabled(&imr))

arch/x86/platform/intel-quark/imr.c

341

ret = imr_read(idev, i, &imr);

arch/x86/platform/intel-quark/imr.c

347

if (imr_is_enabled(&imr)) {

arch/x86/platform/intel-quark/imr.c

348

if (imr_address_overlap(base, &imr))

arch/x86/platform/intel-quark/imr.c

350

if (imr_address_overlap(end, &imr))

arch/x86/platform/intel-quark/imr.c

367

imr.addr_lo = phys_to_imr(base);

arch/x86/platform/intel-quark/imr.c

368

imr.addr_hi = phys_to_imr(end);

arch/x86/platform/intel-quark/imr.c

369

imr.rmask = rmask;

arch/x86/platform/intel-quark/imr.c

370

imr.wmask = wmask;

arch/x86/platform/intel-quark/imr.c

372

ret = imr_write(idev, reg, &imr);

arch/x86/platform/intel-quark/imr.c

379

imr.addr_lo = 0;

arch/x86/platform/intel-quark/imr.c

380

imr.addr_hi = 0;

arch/x86/platform/intel-quark/imr.c

381

imr.rmask = IMR_READ_ACCESS_ALL;

arch/x86/platform/intel-quark/imr.c

382

imr.wmask = IMR_WRITE_ACCESS_ALL;

arch/x86/platform/intel-quark/imr.c

383

imr_write(idev, reg, &imr);

arch/x86/platform/intel-quark/imr.c

413

struct imr_regs imr;

arch/x86/platform/intel-quark/imr.c

438

ret = imr_read(idev, reg, &imr);

arch/x86/platform/intel-quark/imr.c

442

if (!imr_is_enabled(&imr) || imr.addr_lo & IMR_LOCK) {

arch/x86/platform/intel-quark/imr.c

450

ret = imr_read(idev, i, &imr);

arch/x86/platform/intel-quark/imr.c

454

if (!imr_is_enabled(&imr) || imr.addr_lo & IMR_LOCK)

arch/x86/platform/intel-quark/imr.c

457

if ((imr_to_phys(imr.addr_lo) == base) &&

arch/x86/platform/intel-quark/imr.c

458

(imr_to_phys(imr.addr_hi) == end)) {

arch/x86/platform/intel-quark/imr.c

474

imr.addr_lo = 0;

arch/x86/platform/intel-quark/imr.c

475

imr.addr_hi = 0;

arch/x86/platform/intel-quark/imr.c

476

imr.rmask = IMR_READ_ACCESS_ALL;

arch/x86/platform/intel-quark/imr.c

477

imr.wmask = IMR_WRITE_ACCESS_ALL;

arch/x86/platform/intel-quark/imr.c

479

ret = imr_write(idev, reg, &imr);

arch/x86/platform/intel-quark/imr.c

92

static inline int imr_is_enabled(struct imr_regs *imr)

arch/x86/platform/intel-quark/imr.c

94

return !(imr->rmask == IMR_READ_ACCESS_ALL &&

arch/x86/platform/intel-quark/imr.c

95

imr->wmask == IMR_WRITE_ACCESS_ALL &&

arch/x86/platform/intel-quark/imr.c

96

imr_to_phys(imr->addr_lo) == 0 &&

arch/x86/platform/intel-quark/imr.c

97

imr_to_phys(imr->addr_hi) == 0);

drivers/atm/fore200e.c

496

fore200e->regs.pca.imr = fore200e->virt_base + PCA200E_IMR_OFFSET;

drivers/atm/fore200e.h

774

volatile u32 __iomem * imr; /* address of host interrupt mask register */

drivers/clocksource/timer-atmel-tcb.c

101

writel(tcb_cache[i].imr, tcaddr + ATMEL_TC_REG(i, IER));

drivers/clocksource/timer-atmel-tcb.c

45

u32 imr;

drivers/clocksource/timer-atmel-tcb.c

79

tcb_cache[i].imr = readl(tcaddr + ATMEL_TC_REG(i, IMR));

drivers/crypto/ccree/cc_driver.c

186

u32 imr;

drivers/crypto/ccree/cc_driver.c

200

imr = cc_ioread(drvdata, CC_REG(HOST_IMR));

drivers/crypto/ccree/cc_driver.c

211

cc_iowrite(drvdata, CC_REG(HOST_IMR), imr | drvdata->comp_mask);

drivers/crypto/ccree/cc_driver.c

221

cc_iowrite(drvdata, CC_REG(HOST_IMR), imr | CC_GPR0_IRQ_MASK);

drivers/dma/at_hdmac.c

831

u32 status, pending, imr;

drivers/dma/at_hdmac.c

835

imr = dma_readl(atdma, EBCIMR);

drivers/dma/at_hdmac.c

837

pending = status & imr;

drivers/dma/at_hdmac.c

844

status, imr, pending);

drivers/dma/at_xdmac.c

1827

u32 imr, status, pending;

drivers/dma/at_xdmac.c

1832

imr = at_xdmac_read(atxdmac, AT_XDMAC_GIM);

drivers/dma/at_xdmac.c

1834

pending = status & imr;

drivers/dma/at_xdmac.c

1838

__func__, status, imr, pending);

drivers/dma/xilinx/zynqmp_dma.c

729

u32 isr, imr, status;

drivers/dma/xilinx/zynqmp_dma.c

733

imr = readl(chan->regs + ZYNQMP_DMA_IMR);

drivers/dma/xilinx/zynqmp_dma.c

734

status = isr & ~imr;

drivers/gpio/gpio-mxc.c

549

port->gpio_saved_reg.imr = readl(port->base + GPIO_IMR);

drivers/gpio/gpio-mxc.c

55

u32 imr;

drivers/gpio/gpio-mxc.c

562

writel(port->gpio_saved_reg.imr, port->base + GPIO_IMR);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c

648

unsigned int imr, isr;

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c

651

regmap_read(dc->hlcdc->regmap, ATMEL_HLCDC_IMR, &imr);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c

653

status = imr & isr;

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c

913

regmap_read(regmap, ATMEL_HLCDC_IMR, &dc->suspend.imr);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c

914

regmap_write(regmap, ATMEL_HLCDC_IDR, dc->suspend.imr);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c

926

regmap_write(dc->hlcdc->regmap, ATMEL_HLCDC_IER, dc->suspend.imr);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h

356

u32 imr;

drivers/gpu/drm/i915/display/intel_display_irq.c

35

intel_de_write(display, regs.imr, 0xffffffff);

drivers/gpu/drm/i915/display/intel_display_irq.c

36

intel_de_posting_read(display, regs.imr);

drivers/gpu/drm/i915/display/intel_display_irq.c

72

intel_de_write(display, regs.imr, imr_val);

drivers/gpu/drm/i915/display/intel_display_irq.c

73

intel_de_posting_read(display, regs.imr);

drivers/gpu/drm/i915/gvt/interrupt.c

203

u32 imr = *(u32 *)p_data;

drivers/gpu/drm/i915/gvt/interrupt.c

205

trace_write_ir(vgpu->id, "IMR", reg, imr, vgpu_vreg(vgpu, reg),

drivers/gpu/drm/i915/gvt/interrupt.c

206

(vgpu_vreg(vgpu, reg) ^ imr));

drivers/gpu/drm/i915/gvt/interrupt.c

208

vgpu_vreg(vgpu, reg) = imr;

drivers/gpu/drm/i915/gvt/interrupt.c

391

u32 imr = regbase_to_imr(

drivers/gpu/drm/i915/gvt/interrupt.c

394

vgpu_vreg(vgpu, iir) |= (set_bits & ~vgpu_vreg(vgpu, imr));

drivers/gpu/drm/i915/i915_irq.c

120

intel_uncore_write(uncore, regs.imr, imr_val);

drivers/gpu/drm/i915/i915_irq.c

121

intel_uncore_posting_read(uncore, regs.imr);

drivers/gpu/drm/i915/i915_irq.c

83

intel_uncore_write(uncore, regs.imr, 0xffffffff);

drivers/gpu/drm/i915/i915_irq.c

84

intel_uncore_posting_read(uncore, regs.imr);

drivers/gpu/drm/i915/i915_reg_defs.h

213

i915_reg_t imr;

drivers/gpu/drm/i915/i915_reg_defs.h

219

((const struct i915_irq_regs){ .imr = (_imr), .ier = (_ier), .iir = (_iir) })

drivers/i2c/busses/i2c-at91-core.c

45

dev->imr = at91_twi_read(dev, AT91_TWI_IMR) & AT91_TWI_INT_MASK;

drivers/i2c/busses/i2c-at91-core.c

51

at91_twi_write(dev, AT91_TWI_IER, dev->imr);

drivers/i2c/busses/i2c-at91.h

146

unsigned imr;

drivers/iio/adc/at91-sama5d2_adc.c

1432

u32 status, imr, eoc = 0, eoc_imr;

drivers/iio/adc/at91-sama5d2_adc.c

1440

at91_adc_irq_mask(st, &imr, &eoc_imr);

drivers/iio/adc/at91-sama5d2_adc.c

1685

u32 status, eoc, imr, eoc_imr;

drivers/iio/adc/at91-sama5d2_adc.c

1690

at91_adc_irq_mask(st, &imr, &eoc_imr);

drivers/iio/adc/at91-sama5d2_adc.c

1692

if (!(status & imr) && !(eoc & eoc_imr))

drivers/iio/adc/imx93_adc.c

208

u32 imr, mcr, pcda;

drivers/iio/adc/imx93_adc.c

220

imr = FIELD_PREP(IMX93_ADC_IMR_EOC_MASK, 1);

drivers/iio/adc/imx93_adc.c

221

writel(imr, adc->regs + IMX93_ADC_IMR);

drivers/iio/adc/twl4030-madc.c

170

u8 imr;

drivers/iio/adc/twl4030-madc.c

448

ret = twl_i2c_read_u8(TWL4030_MODULE_MADC, &val, madc->imr);

drivers/iio/adc/twl4030-madc.c

451

madc->imr);

drivers/iio/adc/twl4030-madc.c

455

ret = twl_i2c_write_u8(TWL4030_MODULE_MADC, val, madc->imr);

drivers/iio/adc/twl4030-madc.c

458

"unable to write imr register 0x%X\n", madc->imr);

drivers/iio/adc/twl4030-madc.c

480

ret = twl_i2c_read_u8(TWL4030_MODULE_MADC, &imr_val, madc->imr);

drivers/iio/adc/twl4030-madc.c

483

madc->imr);

drivers/iio/adc/twl4030-madc.c

784

madc->imr = madc->use_second_irq ? TWL4030_MADC_IMR2 :

drivers/infiniband/hw/mlx5/odp.c

107

struct mlx5_ib_mr *imr, int flags)

drivers/infiniband/hw/mlx5/odp.c

109

struct mlx5_core_dev *dev = mr_to_mdev(imr)->mdev;

drivers/infiniband/hw/mlx5/odp.c

113

cpu_to_be32(imr->null_mmkey.key) :

drivers/infiniband/hw/mlx5/odp.c

114

mr_to_mdev(imr)->mkeys.null_mkey;

drivers/infiniband/hw/mlx5/odp.c

143

lockdep_assert_held(&to_ib_umem_odp(imr->umem)->umem_mutex);

drivers/infiniband/hw/mlx5/odp.c

146

struct mlx5_ib_mr *mtt = xa_load(&imr->implicit_children, idx);

drivers/infiniband/hw/mlx5/odp.c

215

struct mlx5_ib_mr *imr = mr->parent;

drivers/infiniband/hw/mlx5/odp.c

216

struct ib_umem_odp *odp_imr = to_ib_umem_odp(imr->umem);

drivers/infiniband/hw/mlx5/odp.c

228

mlx5r_deref_odp_mkey(&imr->mmkey);

drivers/infiniband/hw/mlx5/odp.c

235

struct mlx5_ib_mr *imr = mr->parent;

drivers/infiniband/hw/mlx5/odp.c

244

if (!refcount_inc_not_zero(&imr->mmkey.usecount))

drivers/infiniband/hw/mlx5/odp.c

247

xa_lock(&imr->implicit_children);

drivers/infiniband/hw/mlx5/odp.c

248

if (__xa_cmpxchg(&imr->implicit_children, idx, mr, NULL, GFP_KERNEL) !=

drivers/infiniband/hw/mlx5/odp.c

250

xa_unlock(&imr->implicit_children);

drivers/infiniband/hw/mlx5/odp.c

251

mlx5r_deref_odp_mkey(&imr->mmkey);

drivers/infiniband/hw/mlx5/odp.c

258

xa_unlock(&imr->implicit_children);

drivers/infiniband/hw/mlx5/odp.c

466

static struct mlx5_ib_mr *implicit_get_child_mr(struct mlx5_ib_mr *imr,

drivers/infiniband/hw/mlx5/odp.c

469

struct mlx5_ib_dev *dev = mr_to_mdev(imr);

drivers/infiniband/hw/mlx5/odp.c

475

odp = ib_umem_odp_alloc_child(to_ib_umem_odp(imr->umem),

drivers/infiniband/hw/mlx5/odp.c

481

mr = mlx5_mr_cache_alloc(dev, imr->access_flags,

drivers/infiniband/hw/mlx5/odp.c

489

mr->access_flags = imr->access_flags;

drivers/infiniband/hw/mlx5/odp.c

490

mr->ibmr.pd = imr->ibmr.pd;

drivers/infiniband/hw/mlx5/odp.c

491

mr->ibmr.device = &mr_to_mdev(imr)->ib_dev;

drivers/infiniband/hw/mlx5/odp.c

496

mr->parent = imr;

drivers/infiniband/hw/mlx5/odp.c

515

xa_lock(&imr->implicit_children);

drivers/infiniband/hw/mlx5/odp.c

516

ret = __xa_cmpxchg(&imr->implicit_children, idx, NULL, mr,

drivers/infiniband/hw/mlx5/odp.c

536

__xa_erase(&imr->implicit_children, idx);

drivers/infiniband/hw/mlx5/odp.c

541

xa_unlock(&imr->implicit_children);

drivers/infiniband/hw/mlx5/odp.c

542

mlx5_ib_dbg(mr_to_mdev(imr), "key %x mr %p\n", mr->mmkey.key, mr);

drivers/infiniband/hw/mlx5/odp.c

546

xa_unlock(&imr->implicit_children);

drivers/infiniband/hw/mlx5/odp.c

560

struct mlx5_ib_mr *imr,

drivers/infiniband/hw/mlx5/odp.c

592

err = mlx5_core_create_mkey(dev->mdev, &imr->null_mmkey.key, in, inlen);

drivers/infiniband/hw/mlx5/odp.c

596

imr->null_mmkey.type = MLX5_MKEY_NULL;

drivers/infiniband/hw/mlx5/odp.c

608

struct mlx5_ib_mr *imr;

drivers/infiniband/hw/mlx5/odp.c

618

imr = mlx5_mr_cache_alloc(dev, access_flags, MLX5_MKC_ACCESS_MODE_KSM,

drivers/infiniband/hw/mlx5/odp.c

620

if (IS_ERR(imr)) {

drivers/infiniband/hw/mlx5/odp.c

622

return imr;

drivers/infiniband/hw/mlx5/odp.c

625

imr->access_flags = access_flags;

drivers/infiniband/hw/mlx5/odp.c

626

imr->ibmr.pd = &pd->ibpd;

drivers/infiniband/hw/mlx5/odp.c

627

imr->ibmr.iova = 0;

drivers/infiniband/hw/mlx5/odp.c

628

imr->umem = &umem_odp->umem;

drivers/infiniband/hw/mlx5/odp.c

629

imr->ibmr.lkey = imr->mmkey.key;

drivers/infiniband/hw/mlx5/odp.c

630

imr->ibmr.rkey = imr->mmkey.key;

drivers/infiniband/hw/mlx5/odp.c

631

imr->ibmr.device = &dev->ib_dev;

drivers/infiniband/hw/mlx5/odp.c

632

imr->is_odp_implicit = true;

drivers/infiniband/hw/mlx5/odp.c

633

xa_init(&imr->implicit_children);

drivers/infiniband/hw/mlx5/odp.c

636

err = alloc_implicit_mr_null_mkey(dev, imr, pd);

drivers/infiniband/hw/mlx5/odp.c

640

err = mlx5r_store_odp_mkey(dev, &imr->null_mmkey);

drivers/infiniband/hw/mlx5/odp.c

645

err = mlx5r_umr_update_xlt(imr, 0,

drivers/infiniband/hw/mlx5/odp.c

654

err = mlx5r_store_odp_mkey(dev, &imr->mmkey);

drivers/infiniband/hw/mlx5/odp.c

658

mlx5_ib_dbg(dev, "key %x mr %p\n", imr->mmkey.key, imr);

drivers/infiniband/hw/mlx5/odp.c

659

return imr;

drivers/infiniband/hw/mlx5/odp.c

662

mlx5_ib_dereg_mr(&imr->ibmr, NULL);

drivers/infiniband/hw/mlx5/odp.c

746

static int pagefault_implicit_mr(struct mlx5_ib_mr *imr,

drivers/infiniband/hw/mlx5/odp.c

768

xa_lock(&imr->implicit_children);

drivers/infiniband/hw/mlx5/odp.c

769

mtt = xa_load(&imr->implicit_children, idx);

drivers/infiniband/hw/mlx5/odp.c

771

xa_unlock(&imr->implicit_children);

drivers/infiniband/hw/mlx5/odp.c

772

mtt = implicit_get_child_mr(imr, idx);

drivers/infiniband/hw/mlx5/odp.c

781

xa_unlock(&imr->implicit_children);

drivers/infiniband/hw/mlx5/odp.c

821

err = mlx5r_umr_update_xlt(imr, upd_start_idx, upd_len, 0,

drivers/infiniband/hw/mlx5/odp.c

826

mlx5_ib_err(mr_to_mdev(imr), "Failed to update PAS\n");

drivers/ipack/devices/ipoctal.c

351

&block_regs[i].w.imr);

drivers/ipack/devices/scc2698.h

71

u8 d5, imr; /* Interrupt mask register of block */

drivers/mfd/twl4030-irq.c

419

u32 imr;

drivers/mfd/twl4030-irq.c

441

agent->imr |= BIT(data->irq - agent->irq_base);

drivers/mfd/twl4030-irq.c

449

agent->imr &= ~BIT(data->irq - agent->irq_base);

drivers/mfd/twl4030-irq.c

483

} imr;

drivers/mfd/twl4030-irq.c

486

imr.word = cpu_to_le32(agent->imr);

drivers/mfd/twl4030-irq.c

490

status = twl_i2c_write(sih->module, imr.bytes,

drivers/mfd/twl4030-irq.c

640

agent->imr = ~0;

drivers/net/can/grcan.c

1252

grcan_set_bits(&regs->imr, GRCAN_IRQ_TX | GRCAN_IRQ_RX);

drivers/net/can/grcan.c

485

grcan_write_reg(&regs->imr, GRCAN_IRQ_NONE);

drivers/net/can/grcan.c

58

u32 imr; /* 0x110 */

drivers/net/can/grcan.c

790

grcan_clear_bits(&regs->imr, GRCAN_IRQ_TX | GRCAN_IRQ_RX);

drivers/net/can/grcan.c

825

u32 imr = grcan_read_reg(&regs->imr);

drivers/net/can/grcan.c

853

grcan_write_reg(&regs->imr, imr);

drivers/net/can/grcan.c

993

grcan_write_reg(&regs->imr, GRCAN_IRQ_DEFAULT);

drivers/net/ethernet/apple/mace.c

337

out_8(&mb->imr, 0xff); /* disable all intrs for now */

drivers/net/ethernet/apple/mace.c

496

out_8(&mb->imr, RCVINT);

drivers/net/ethernet/apple/mace.c

510

out_8(&mb->imr, 0xff); /* disable all intrs */

drivers/net/ethernet/apple/mace.c

865

out_8(&mb->imr, RCVINT);

drivers/net/ethernet/apple/mace.h

21

REG(imr); /* interrupt mask register */

drivers/net/ethernet/apple/macmace.c

285

mb->imr = 0xFF; /* disable all intrs for now */

drivers/net/ethernet/apple/macmace.c

415

mb->imr = RCVINT;

drivers/net/ethernet/apple/macmace.c

437

mb->imr = 0xFF; /* disable all irqs */

drivers/net/ethernet/apple/macmace.c

630

mb->imr = RCVINT;

drivers/net/ethernet/atheros/atlx/atlx.c

145

unsigned int imr)

drivers/net/ethernet/atheros/atlx/atlx.c

147

iowrite32(imr, adapter->hw.hw_addr + REG_IMR);

drivers/net/ethernet/davicom/dm9000.c

901

unsigned int imr;

drivers/net/ethernet/davicom/dm9000.c

950

imr = IMR_PAR | IMR_PTM | IMR_PRM;

drivers/net/ethernet/davicom/dm9000.c

952

imr |= IMR_LNKCHNG;

drivers/net/ethernet/davicom/dm9000.c

954

db->imr_all = imr;

drivers/net/ethernet/realtek/rtase/rtase.h

278

u32 imr;

drivers/net/ethernet/realtek/rtase/rtase_main.c

1009

rtase_w32(tp, ivec->imr_addr, ivec->imr);

drivers/net/ethernet/realtek/rtase/rtase_main.c

1013

rtase_w16(tp, ivec->imr_addr, ivec->imr);

drivers/net/ethernet/realtek/rtase/rtase_main.c

1086

rtase_w32(tp, ivec->imr_addr, ivec->imr);

drivers/net/ethernet/realtek/rtase/rtase_main.c

1088

rtase_w16(tp, ivec->imr_addr, ivec->imr);

drivers/net/ethernet/realtek/rtase/rtase_main.c

1978

tp->int_vector[0].imr = RTASE_ROK | RTASE_RDU | RTASE_TOK |

drivers/net/ethernet/realtek/rtase/rtase_main.c

1992

tp->int_vector[i].imr = RTASE_Q_ROK | RTASE_Q_RDU |

drivers/net/ethernet/sis/sis900.c

1059

sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxDESC);

drivers/net/ethernet/sis/sis900.c

1552

sw32(imr, 0x0000);

drivers/net/ethernet/sis/sis900.c

1584

sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxDESC);

drivers/net/ethernet/sis/sis900.c

1970

sw32(imr, 0x0000);

drivers/net/ethernet/sis/sis900.c

2453

sw32(imr, 0);

drivers/net/ethernet/sis/sis900.c

2539

sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxDESC);

drivers/net/ethernet/wiznet/w5100.c

598

u32 imr;

drivers/net/ethernet/wiznet/w5100.c

601

imr = W5500_SIMR;

drivers/net/ethernet/wiznet/w5100.c

603

imr = W5100_IMR;

drivers/net/ethernet/wiznet/w5100.c

605

w5100_write(priv, imr, mask);

drivers/net/wireless/ath/ath5k/dma.c

455

u32 trigger_level, imr;

drivers/net/wireless/ath/ath5k/dma.c

461

imr = ath5k_hw_set_imr(ah, ah->ah_imr & ~AR5K_INT_GLOBAL);

drivers/net/wireless/ath/ath5k/dma.c

488

ath5k_hw_set_imr(ah, imr);

drivers/net/wireless/intel/iwlwifi/fw/api/alive.h

106

struct iwl_imr_alive_info imr;

drivers/net/wireless/intel/iwlwifi/fw/api/alive.h

97

struct iwl_imr_alive_info imr;

drivers/net/wireless/intel/iwlwifi/mld/fw.c

142

iwl_mld_alive_imr_data(trans, &palive->imr);

drivers/net/wireless/intel/iwlwifi/mvm/fw.c

141

le32_to_cpu(palive->imr.enabled);

drivers/net/wireless/intel/iwlwifi/mvm/fw.c

143

le32_to_cpu(palive->imr.size);

drivers/net/wireless/intel/iwlwifi/mvm/fw.c

147

palive->imr.base_addr;

drivers/net/wireless/realtek/rtw88/mac.c

276

u32 imr = 0;

drivers/net/wireless/realtek/rtw88/mac.c

304

imr = rtw_read32(rtwdev, REG_SDIO_HIMR);

drivers/net/wireless/realtek/rtw88/mac.c

322

rtw_write32(rtwdev, REG_SDIO_HIMR, imr);

drivers/net/wireless/realtek/rtw89/mac.c

3632

const struct rtw89_imr_info *imr = rtwdev->chip->imr_info;

drivers/net/wireless/realtek/rtw89/mac.c

3635

rtw89_write32_set(rtwdev, R_AX_WDRLS_ERR_IMR, imr->wdrls_imr_set);

drivers/net/wireless/realtek/rtw89/mac.c

3640

const struct rtw89_imr_info *imr = rtwdev->chip->imr_info;

drivers/net/wireless/realtek/rtw89/mac.c

3642

rtw89_write32_set(rtwdev, imr->wsec_imr_reg, imr->wsec_imr_set);

drivers/net/wireless/realtek/rtw89/mac.c

3648

const struct rtw89_imr_info *imr = rtwdev->chip->imr_info;

drivers/net/wireless/realtek/rtw89/mac.c

3663

imr->mpdu_tx_imr_set);

drivers/net/wireless/realtek/rtw89/mac.c

3670

imr->mpdu_rx_imr_set);

drivers/net/wireless/realtek/rtw89/mac.c

3675

const struct rtw89_imr_info *imr = rtwdev->chip->imr_info;

drivers/net/wireless/realtek/rtw89/mac.c

3682

imr->sta_sch_imr_set);

drivers/net/wireless/realtek/rtw89/mac.c

3687

const struct rtw89_imr_info *imr = rtwdev->chip->imr_info;

drivers/net/wireless/realtek/rtw89/mac.c

3689

rtw89_write32_clr(rtwdev, imr->txpktctl_imr_b0_reg,

drivers/net/wireless/realtek/rtw89/mac.c

3690

imr->txpktctl_imr_b0_clr);

drivers/net/wireless/realtek/rtw89/mac.c

3691

rtw89_write32_set(rtwdev, imr->txpktctl_imr_b0_reg,

drivers/net/wireless/realtek/rtw89/mac.c

3692

imr->txpktctl_imr_b0_set);

drivers/net/wireless/realtek/rtw89/mac.c

3693

rtw89_write32_clr(rtwdev, imr->txpktctl_imr_b1_reg,

drivers/net/wireless/realtek/rtw89/mac.c

3694

imr->txpktctl_imr_b1_clr);

drivers/net/wireless/realtek/rtw89/mac.c

3695

rtw89_write32_set(rtwdev, imr->txpktctl_imr_b1_reg,

drivers/net/wireless/realtek/rtw89/mac.c

3696

imr->txpktctl_imr_b1_set);

drivers/net/wireless/realtek/rtw89/mac.c

3701

const struct rtw89_imr_info *imr = rtwdev->chip->imr_info;

drivers/net/wireless/realtek/rtw89/mac.c

3703

rtw89_write32_clr(rtwdev, R_AX_WDE_ERR_IMR, imr->wde_imr_clr);

drivers/net/wireless/realtek/rtw89/mac.c

3704

rtw89_write32_set(rtwdev, R_AX_WDE_ERR_IMR, imr->wde_imr_set);

drivers/net/wireless/realtek/rtw89/mac.c

3709

const struct rtw89_imr_info *imr = rtwdev->chip->imr_info;

drivers/net/wireless/realtek/rtw89/mac.c

3711

rtw89_write32_clr(rtwdev, R_AX_PLE_ERR_IMR, imr->ple_imr_clr);

drivers/net/wireless/realtek/rtw89/mac.c

3712

rtw89_write32_set(rtwdev, R_AX_PLE_ERR_IMR, imr->ple_imr_set);

drivers/net/wireless/realtek/rtw89/mac.c

3723

const struct rtw89_imr_info *imr = rtwdev->chip->imr_info;

drivers/net/wireless/realtek/rtw89/mac.c

3726

imr->host_disp_imr_clr);

drivers/net/wireless/realtek/rtw89/mac.c

3728

imr->host_disp_imr_set);

drivers/net/wireless/realtek/rtw89/mac.c

3730

imr->cpu_disp_imr_clr);

drivers/net/wireless/realtek/rtw89/mac.c

3732

imr->cpu_disp_imr_set);

drivers/net/wireless/realtek/rtw89/mac.c

3734

imr->other_disp_imr_clr);

drivers/net/wireless/realtek/rtw89/mac.c

3736

imr->other_disp_imr_set);

drivers/net/wireless/realtek/rtw89/mac.c

3747

const struct rtw89_imr_info *imr = rtwdev->chip->imr_info;

drivers/net/wireless/realtek/rtw89/mac.c

3749

rtw89_write32_set(rtwdev, imr->bbrpt_com_err_imr_reg,

drivers/net/wireless/realtek/rtw89/mac.c

3751

rtw89_write32_clr(rtwdev, imr->bbrpt_chinfo_err_imr_reg,

drivers/net/wireless/realtek/rtw89/mac.c

3753

rtw89_write32_set(rtwdev, imr->bbrpt_chinfo_err_imr_reg,

drivers/net/wireless/realtek/rtw89/mac.c

3754

imr->bbrpt_err_imr_set);

drivers/net/wireless/realtek/rtw89/mac.c

3755

rtw89_write32_set(rtwdev, imr->bbrpt_dfs_err_imr_reg,

drivers/net/wireless/realtek/rtw89/mac.c

3772

const struct rtw89_imr_info *imr = rtwdev->chip->imr_info;

drivers/net/wireless/realtek/rtw89/mac.c

3776

rtw89_write32_clr(rtwdev, reg, imr->ptcl_imr_clr);

drivers/net/wireless/realtek/rtw89/mac.c

3777

rtw89_write32_set(rtwdev, reg, imr->ptcl_imr_set);

drivers/net/wireless/realtek/rtw89/mac.c

3782

const struct rtw89_imr_info *imr = rtwdev->chip->imr_info;

drivers/net/wireless/realtek/rtw89/mac.c

3786

reg = rtw89_mac_reg_by_idx(rtwdev, imr->cdma_imr_0_reg, mac_idx);

drivers/net/wireless/realtek/rtw89/mac.c

3787

rtw89_write32_clr(rtwdev, reg, imr->cdma_imr_0_clr);

drivers/net/wireless/realtek/rtw89/mac.c

3788

rtw89_write32_set(rtwdev, reg, imr->cdma_imr_0_set);

drivers/net/wireless/realtek/rtw89/mac.c

3791

reg = rtw89_mac_reg_by_idx(rtwdev, imr->cdma_imr_1_reg, mac_idx);

drivers/net/wireless/realtek/rtw89/mac.c

3792

rtw89_write32_clr(rtwdev, reg, imr->cdma_imr_1_clr);

drivers/net/wireless/realtek/rtw89/mac.c

3793

rtw89_write32_set(rtwdev, reg, imr->cdma_imr_1_set);

drivers/net/wireless/realtek/rtw89/mac.c

3799

const struct rtw89_imr_info *imr = rtwdev->chip->imr_info;

drivers/net/wireless/realtek/rtw89/mac.c

3802

reg = rtw89_mac_reg_by_idx(rtwdev, imr->phy_intf_imr_reg, mac_idx);

drivers/net/wireless/realtek/rtw89/mac.c

3803

rtw89_write32_clr(rtwdev, reg, imr->phy_intf_imr_clr);

drivers/net/wireless/realtek/rtw89/mac.c

3804

rtw89_write32_set(rtwdev, reg, imr->phy_intf_imr_set);

drivers/net/wireless/realtek/rtw89/mac.c

3809

const struct rtw89_imr_info *imr = rtwdev->chip->imr_info;

drivers/net/wireless/realtek/rtw89/mac.c

3812

reg = rtw89_mac_reg_by_idx(rtwdev, imr->rmac_imr_reg, mac_idx);

drivers/net/wireless/realtek/rtw89/mac.c

3813

rtw89_write32_clr(rtwdev, reg, imr->rmac_imr_clr);

drivers/net/wireless/realtek/rtw89/mac.c

3814

rtw89_write32_set(rtwdev, reg, imr->rmac_imr_set);

drivers/net/wireless/realtek/rtw89/mac.c

3819

const struct rtw89_imr_info *imr = rtwdev->chip->imr_info;

drivers/net/wireless/realtek/rtw89/mac.c

3822

reg = rtw89_mac_reg_by_idx(rtwdev, imr->tmac_imr_reg, mac_idx);

drivers/net/wireless/realtek/rtw89/mac.c

3823

rtw89_write32_clr(rtwdev, reg, imr->tmac_imr_clr);

drivers/net/wireless/realtek/rtw89/mac.c

3824

rtw89_write32_set(rtwdev, reg, imr->tmac_imr_set);

drivers/net/wireless/realtek/rtw89/mac.c

784

u32 dmac_err, imr, isr;

drivers/net/wireless/realtek/rtw89/mac.c

794

imr = rtw89_read32(rtwdev, R_AX_TXPKTCTL_B0_ERRFLAG_IMR);

drivers/net/wireless/realtek/rtw89/mac.c

798

((isr & imr) & B_AX_B0_ISR_ERR_CMDPSR_FRZTO)) {

drivers/nvme/host/core.c

2300

c.imr.opcode = nvme_cmd_io_mgmt_recv;

drivers/nvme/host/core.c

2301

c.imr.nsid = cpu_to_le32(head->ns_id);

drivers/nvme/host/core.c

2302

c.imr.mo = NVME_IO_MGMT_RECV_MO_RUHS;

drivers/nvme/host/core.c

2303

c.imr.numd = cpu_to_le32(nvme_bytes_to_numd(size));

drivers/parisc/dino.c

145

u32 imr; /* IRQ's which are enabled */

drivers/parisc/dino.c

304

dino_dev->imr &= ~(DINO_MASK_IRQ(local_irq));

drivers/parisc/dino.c

305

__raw_writel(dino_dev->imr, dino_dev->hba.base_addr+DINO_IMR);

drivers/parisc/dino.c

325

dino_dev->imr |= DINO_MASK_IRQ(local_irq); /* used in dino_isr() */

drivers/parisc/dino.c

326

__raw_writel( dino_dev->imr, dino_dev->hba.base_addr+DINO_IMR);

drivers/parisc/dino.c

419

mask = __raw_readl(dino_dev->hba.base_addr+DINO_ILR) & dino_dev->imr;

drivers/parisc/gsc.c

108

u32 imr;

drivers/parisc/gsc.c

111

irq_dev->name, imr);

drivers/parisc/gsc.c

114

imr = gsc_readl(irq_dev->hpa + OFFSET_IMR);

drivers/parisc/gsc.c

115

imr &= ~(1 << local_irq);

drivers/parisc/gsc.c

116

gsc_writel(imr, irq_dev->hpa + OFFSET_IMR);

drivers/parisc/gsc.c

123

u32 imr;

drivers/parisc/gsc.c

126

irq_dev->name, imr);

drivers/parisc/gsc.c

129

imr = gsc_readl(irq_dev->hpa + OFFSET_IMR);

drivers/parisc/gsc.c

130

imr |= 1 << local_irq;

drivers/parisc/gsc.c

131

gsc_writel(imr, irq_dev->hpa + OFFSET_IMR);

drivers/pcmcia/pxa2xx_sharpsl.c

110

unsigned short cpr, ncpr, ccr, nccr, mcr, nmcr, imr, nimr;

drivers/pcmcia/pxa2xx_sharpsl.c

131

nimr = (imr = read_scoop_reg(scoop, SCOOP_IMR)) & ~0x003E;

drivers/pcmcia/pxa2xx_sharpsl.c

169

if (imr != nimr)

drivers/pinctrl/pinctrl-at91-pio4.c

1004

atmel_pioctrl->pm_suspend_backup[i].imr =

drivers/pinctrl/pinctrl-at91-pio4.c

1029

atmel_pioctrl->pm_suspend_backup[i].imr);

drivers/pinctrl/pinctrl-at91-pio4.c

143

u32 imr;

drivers/rtc/rtc-at91sam9.c

462

rtc->imr = mr & (AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN);

drivers/rtc/rtc-at91sam9.c

463

rtt_writel(rtc, MR, mr & ~rtc->imr);

drivers/rtc/rtc-at91sam9.c

479

rtc->imr = mr & (AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN);

drivers/rtc/rtc-at91sam9.c

480

if (rtc->imr) {

drivers/rtc/rtc-at91sam9.c

492

rtt_writel(rtc, MR, mr & ~rtc->imr);

drivers/rtc/rtc-at91sam9.c

504

if (rtc->imr) {

drivers/rtc/rtc-at91sam9.c

510

rtt_writel(rtc, MR, mr | rtc->imr);

drivers/rtc/rtc-at91sam9.c

71

u32 imr;

drivers/spi/spi-altera-core.c

156

hw->imr |= ALTERA_SPI_CONTROL_IRRDY_MSK;

drivers/spi/spi-altera-core.c

157

altr_spi_writel(hw, ALTERA_SPI_CONTROL, hw->imr);

drivers/spi/spi-altera-core.c

194

hw->imr &= ~ALTERA_SPI_CONTROL_IRRDY_MSK;

drivers/spi/spi-altera-core.c

195

altr_spi_writel(hw, ALTERA_SPI_CONTROL, hw->imr);

drivers/spi/spi-altera-core.c

213

hw->imr = 0; /* disable spi interrupts */

drivers/spi/spi-altera-core.c

214

altr_spi_writel(hw, ALTERA_SPI_CONTROL, hw->imr);

drivers/spi/spi-altera-core.c

78

hw->imr &= ~ALTERA_SPI_CONTROL_SSO_MSK;

drivers/spi/spi-altera-core.c

79

altr_spi_writel(hw, ALTERA_SPI_CONTROL, hw->imr);

drivers/spi/spi-altera-core.c

84

hw->imr |= ALTERA_SPI_CONTROL_SSO_MSK;

drivers/spi/spi-altera-core.c

85

altr_spi_writel(hw, ALTERA_SPI_CONTROL, hw->imr);

drivers/spi/spi-atmel.c

1111

u32 status, pending, imr;

drivers/spi/spi-atmel.c

1115

imr = spi_readl(as, IMR);

drivers/spi/spi-atmel.c

1117

pending = status & imr;

drivers/spi/spi-atmel.c

1169

u32 status, pending, imr;

drivers/spi/spi-atmel.c

1172

imr = spi_readl(as, IMR);

drivers/spi/spi-atmel.c

1174

pending = status & imr;

drivers/spi/spi-dw-dma.c

470

u16 imr, dma_ctrl;

drivers/spi/spi-dw-dma.c

494

imr = DW_SPI_INT_TXOI;

drivers/spi/spi-dw-dma.c

496

imr |= DW_SPI_INT_RXUI | DW_SPI_INT_RXOI;

drivers/spi/spi-dw-dma.c

497

dw_spi_umask_intr(dws, imr);

drivers/spi/spi-mpc512x-psc.c

398

out_be16(psc_addr(mps, isr_imr.imr), 0);

drivers/tty/serial/altera_uart.c

113

unsigned short imr = pp->imr;

drivers/tty/serial/altera_uart.c

120

imr &= ALTERA_UART_CONTROL_TRBK_MSK | ALTERA_UART_CONTROL_RTS_MSK;

drivers/tty/serial/altera_uart.c

122

altera_uart_writel(&pp->port, imr, ALTERA_UART_CONTROL_REG);

drivers/tty/serial/altera_uart.c

131

pp->imr |= ALTERA_UART_CONTROL_RTS_MSK;

drivers/tty/serial/altera_uart.c

133

pp->imr &= ~ALTERA_UART_CONTROL_RTS_MSK;

drivers/tty/serial/altera_uart.c

141

pp->imr |= ALTERA_UART_CONTROL_TRDY_MSK;

drivers/tty/serial/altera_uart.c

149

pp->imr &= ~ALTERA_UART_CONTROL_TRDY_MSK;

drivers/tty/serial/altera_uart.c

157

pp->imr &= ~ALTERA_UART_CONTROL_RRDY_MSK;

drivers/tty/serial/altera_uart.c

168

pp->imr |= ALTERA_UART_CONTROL_TRBK_MSK;

drivers/tty/serial/altera_uart.c

170

pp->imr &= ~ALTERA_UART_CONTROL_TRBK_MSK;

drivers/tty/serial/altera_uart.c

264

isr = altera_uart_readl(port, ALTERA_UART_STATUS_REG) & pp->imr;

drivers/tty/serial/altera_uart.c

318

pp->imr = ALTERA_UART_CONTROL_RRDY_MSK;

drivers/tty/serial/altera_uart.c

334

pp->imr = 0;

drivers/tty/serial/altera_uart.c

80

unsigned short imr; /* Local IMR mirror */

drivers/tty/serial/ar933x_uart.c

570

u32 imr;

drivers/tty/serial/ar933x_uart.c

573

imr = ar933x_uart_read(up, AR933X_UART_INT_EN_REG);

drivers/tty/serial/ar933x_uart.c

579

ar933x_uart_write(up, AR933X_UART_INT_EN_REG, imr);

drivers/tty/serial/ar933x_uart.c

590

ar933x_uart_write(up, AR933X_UART_INT_EN_REG, imr);

drivers/tty/serial/ar933x_uart.c

599

u32 imr;

drivers/tty/serial/ar933x_uart.c

602

imr = ar933x_uart_read(up, AR933X_UART_INT_EN_REG);

drivers/tty/serial/ar933x_uart.c

617

ar933x_uart_write(up, AR933X_UART_INT_EN_REG, imr);

drivers/tty/serial/atmel_serial.c

176

u32 imr;

drivers/tty/serial/atmel_serial.c

2109

unsigned int old_mode, mode, imr, quot, div, cd, fp = 0;

drivers/tty/serial/atmel_serial.c

2197

imr = atmel_uart_readl(port, ATMEL_US_IMR);

drivers/tty/serial/atmel_serial.c

2354

atmel_uart_writel(port, ATMEL_US_IER, imr);

drivers/tty/serial/atmel_serial.c

2570

unsigned int status, imr;

drivers/tty/serial/atmel_serial.c

2576

imr = atmel_uart_readl(port, ATMEL_US_IMR);

drivers/tty/serial/atmel_serial.c

2603

atmel_uart_writel(port, ATMEL_US_IER, imr);

drivers/tty/serial/atmel_serial.c

2743

atmel_port->cache.imr = atmel_uart_readl(port, ATMEL_US_IMR);

drivers/tty/serial/atmel_serial.c

2776

atmel_uart_writel(port, ATMEL_US_IER, atmel_port->cache.imr);

drivers/tty/serial/mcf.c

108

pp->imr |= MCFUART_UIR_TXREADY;

drivers/tty/serial/mcf.c

109

writeb(pp->imr, port->membase + MCFUART_UIMR);

drivers/tty/serial/mcf.c

118

pp->imr &= ~MCFUART_UIR_TXREADY;

drivers/tty/serial/mcf.c

119

writeb(pp->imr, port->membase + MCFUART_UIMR);

drivers/tty/serial/mcf.c

128

pp->imr &= ~MCFUART_UIR_RXREADY;

drivers/tty/serial/mcf.c

129

writeb(pp->imr, port->membase + MCFUART_UIMR);

drivers/tty/serial/mcf.c

164

pp->imr = MCFUART_UIR_RXREADY;

drivers/tty/serial/mcf.c

165

writeb(pp->imr, port->membase + MCFUART_UIMR);

drivers/tty/serial/mcf.c

182

pp->imr = 0;

drivers/tty/serial/mcf.c

183

writeb(pp->imr, port->membase + MCFUART_UIMR);

drivers/tty/serial/mcf.c

351

isr = readb(port->membase + MCFUART_UISR) & pp->imr;

drivers/tty/serial/mcf.c

55

unsigned char imr; /* Local IMR mirror */

drivers/tty/serial/msm_serial.c

1177

msm_port->imr = MSM_UART_IMR_RXLEV | MSM_UART_IMR_RXSTALE |

drivers/tty/serial/msm_serial.c

1180

msm_write(port, msm_port->imr, MSM_UART_IMR);

drivers/tty/serial/msm_serial.c

1258

msm_port->imr = 0;

drivers/tty/serial/msm_serial.c

1499

u32 imr;

drivers/tty/serial/msm_serial.c

1504

imr = msm_read(port, MSM_UART_IMR);

drivers/tty/serial/msm_serial.c

1513

msm_write(port, imr, MSM_UART_IMR);

drivers/tty/serial/msm_serial.c

1520

u32 imr;

drivers/tty/serial/msm_serial.c

1524

imr = msm_read(port, MSM_UART_IMR);

drivers/tty/serial/msm_serial.c

1542

msm_write(port, imr, MSM_UART_IMR);

drivers/tty/serial/msm_serial.c

182

unsigned int imr;

drivers/tty/serial/msm_serial.c

427

msm_port->imr &= ~MSM_UART_IMR_TXLEV;

drivers/tty/serial/msm_serial.c

428

msm_write(port, msm_port->imr, MSM_UART_IMR);

drivers/tty/serial/msm_serial.c

440

msm_port->imr |= MSM_UART_IMR_TXLEV;

drivers/tty/serial/msm_serial.c

441

msm_write(port, msm_port->imr, MSM_UART_IMR);

drivers/tty/serial/msm_serial.c

486

msm_port->imr |= MSM_UART_IMR_TXLEV;

drivers/tty/serial/msm_serial.c

487

msm_write(port, msm_port->imr, MSM_UART_IMR);

drivers/tty/serial/msm_serial.c

536

msm_port->imr &= ~MSM_UART_IMR_TXLEV;

drivers/tty/serial/msm_serial.c

537

msm_write(port, msm_port->imr, MSM_UART_IMR);

drivers/tty/serial/msm_serial.c

656

msm_port->imr &= ~(MSM_UART_IMR_RXLEV | MSM_UART_IMR_RXSTALE);

drivers/tty/serial/msm_serial.c

663

msm_port->imr |= MSM_UART_IMR_RXSTALE;

drivers/tty/serial/msm_serial.c

665

msm_write(uart, msm_port->imr, MSM_UART_IMR);

drivers/tty/serial/msm_serial.c

702

msm_port->imr |= MSM_UART_IMR_RXLEV | MSM_UART_IMR_RXSTALE;

drivers/tty/serial/msm_serial.c

703

msm_write(uart, msm_port->imr, MSM_UART_IMR);

drivers/tty/serial/msm_serial.c

711

msm_port->imr &= ~(MSM_UART_IMR_RXLEV | MSM_UART_IMR_RXSTALE);

drivers/tty/serial/msm_serial.c

712

msm_write(port, msm_port->imr, MSM_UART_IMR);

drivers/tty/serial/msm_serial.c

722

msm_port->imr |= MSM_UART_IMR_DELTA_CTS;

drivers/tty/serial/msm_serial.c

723

msm_write(port, msm_port->imr, MSM_UART_IMR);

drivers/tty/serial/msm_serial.c

991

msm_write(port, msm_port->imr, MSM_UART_IMR); /* restore interrupt */

drivers/tty/serial/sccnxp.c

1000

s->imr = 0;

drivers/tty/serial/sccnxp.c

117

u8 imr;

drivers/tty/serial/sccnxp.c

358

s->imr |= mask << (port->line * 4);

drivers/tty/serial/sccnxp.c

359

sccnxp_write(port, SCCNXP_IMR_REG, s->imr);

drivers/tty/serial/sccnxp.c

366

s->imr &= ~(mask << (port->line * 4));

drivers/tty/serial/sccnxp.c

367

sccnxp_write(port, SCCNXP_IMR_REG, s->imr);

drivers/tty/serial/sccnxp.c

488

isr &= s->imr;

drivers/tty/serial/xilinx_uartps.c

1377

unsigned int imr, ctrl;

drivers/tty/serial/xilinx_uartps.c

1386

imr = readl(port->membase + CDNS_UART_IMR);

drivers/tty/serial/xilinx_uartps.c

1387

writel(imr, port->membase + CDNS_UART_IDR);

drivers/tty/serial/xilinx_uartps.c

1403

writel(imr, port->membase + CDNS_UART_IER);

drivers/video/fbdev/i810/i810.h

235

u16 bltcntl, hwstam, ier, iir, imr;

drivers/video/fbdev/i810/i810_main.c

583

i810_writew(IMR, mmio, par->hw_state.imr);

drivers/video/fbdev/i810/i810_main.c

661

par->hw_state.imr = i810_readw(IMR, mmio);

include/linux/igmp.h

115

extern int ip_mc_join_group(struct sock *sk, struct ip_mreqn *imr);

include/linux/igmp.h

116

extern int ip_mc_join_group_ssm(struct sock *sk, struct ip_mreqn *imr,

include/linux/igmp.h

118

extern int ip_mc_leave_group(struct sock *sk, struct ip_mreqn *imr);

include/linux/nvme.h

2002

struct nvme_io_mgmt_recv_cmd imr;

include/linux/spi/altera.h

37

u32 imr;

net/ipv4/igmp.c

1915

static struct in_device *ip_mc_find_dev(struct net *net, struct ip_mreqn *imr)

net/ipv4/igmp.c

1920

if (imr->imr_ifindex) {

net/ipv4/igmp.c

1921

idev = inetdev_by_index(net, imr->imr_ifindex);

net/ipv4/igmp.c

1924

if (imr->imr_address.s_addr) {

net/ipv4/igmp.c

1925

dev = __ip_dev_find(net, imr->imr_address.s_addr, false);

net/ipv4/igmp.c

1932

imr->imr_multiaddr.s_addr,

net/ipv4/igmp.c

1941

imr->imr_ifindex = dev->ifindex;

net/ipv4/igmp.c

2261

static int __ip_mc_join_group(struct sock *sk, struct ip_mreqn *imr,

net/ipv4/igmp.c

2264

__be32 addr = imr->imr_multiaddr.s_addr;

net/ipv4/igmp.c

2278

in_dev = ip_mc_find_dev(net, imr);

net/ipv4/igmp.c

2286

ifindex = imr->imr_ifindex;

net/ipv4/igmp.c

2300

memcpy(&iml->multi, imr, sizeof(*imr));

net/ipv4/igmp.c

2313

int ip_mc_join_group(struct sock *sk, struct ip_mreqn *imr)

net/ipv4/igmp.c

2315

return __ip_mc_join_group(sk, imr, MCAST_EXCLUDE);

net/ipv4/igmp.c

2321

int ip_mc_join_group_ssm(struct sock *sk, struct ip_mreqn *imr,

net/ipv4/igmp.c

2324

return __ip_mc_join_group(sk, imr, mode);

net/ipv4/igmp.c

2347

int ip_mc_leave_group(struct sock *sk, struct ip_mreqn *imr)

net/ipv4/igmp.c

2354

__be32 group = imr->imr_multiaddr.s_addr;

net/ipv4/igmp.c

2360

in_dev = ip_mc_find_dev(net, imr);

net/ipv4/igmp.c

2361

if (!imr->imr_ifindex && !imr->imr_address.s_addr && !in_dev) {

net/ipv4/igmp.c

2365

ifindex = imr->imr_ifindex;

net/ipv4/igmp.c

2374

} else if (imr->imr_address.s_addr && imr->imr_address.s_addr !=

net/ipv4/igmp.c

2399

struct ip_mreqn imr;

net/ipv4/igmp.c

2414

imr.imr_multiaddr.s_addr = mreqs->imr_multiaddr;

net/ipv4/igmp.c

2415

imr.imr_address.s_addr = mreqs->imr_interface;

net/ipv4/igmp.c

2416

imr.imr_ifindex = ifindex;

net/ipv4/igmp.c

2417

in_dev = ip_mc_find_dev(net, &imr);

net/ipv4/igmp.c

2427

imr.imr_multiaddr.s_addr) &&

net/ipv4/igmp.c

2428

(pmc->multi.imr_ifindex == imr.imr_ifindex))

net/ipv4/igmp.c

2530

err = ip_mc_leave_group(sk, &imr);

net/ipv4/igmp.c

2537

struct ip_mreqn imr;

net/ipv4/igmp.c

2554

imr.imr_multiaddr.s_addr = msf->imsf_multiaddr;

net/ipv4/igmp.c

2555

imr.imr_address.s_addr = msf->imsf_interface;

net/ipv4/igmp.c

2556

imr.imr_ifindex = ifindex;

net/ipv4/igmp.c

2557

in_dev = ip_mc_find_dev(net, &imr);

net/ipv4/igmp.c

2572

pmc->multi.imr_ifindex == imr.imr_ifindex)

net/ipv4/igmp.c

2621

err = ip_mc_leave_group(sk, &imr);

net/ipv4/igmp.c

2628

struct ip_mreqn imr;

net/ipv4/igmp.c

2641

imr.imr_multiaddr.s_addr = msf->imsf_multiaddr;

net/ipv4/igmp.c

2642

imr.imr_address.s_addr = msf->imsf_interface;

net/ipv4/igmp.c

2643

imr.imr_ifindex = 0;

net/ipv4/igmp.c

2644

in_dev = ip_mc_find_dev(net, &imr);

net/ipv4/igmp.c

2654

pmc->multi.imr_ifindex == imr.imr_ifindex)

sound/soc/atmel/atmel-i2s.c

212

unsigned int sr, imr, pending, ch, mask;

sound/soc/atmel/atmel-i2s.c

216

regmap_read(dev->regmap, ATMEL_I2SC_IMR, &imr);

sound/soc/atmel/atmel-i2s.c

217

pending = sr & imr;

sound/soc/atmel/mchp-spdifrx.c

348

u32 sr, imr, pending;

sound/soc/atmel/mchp-spdifrx.c

353

regmap_read(dev->regmap, SPDIFRX_IMR, &imr);

sound/soc/atmel/mchp-spdifrx.c

354

pending = sr & imr;

sound/soc/atmel/mchp-spdifrx.c

355

dev_dbg(dev->dev, "ISR: %#x, IMR: %#x, pending: %#x\n", sr, imr,

sound/soc/atmel/mchp-spdiftx.c

245

u32 sr, imr, pending, idr = 0;

sound/soc/atmel/mchp-spdiftx.c

248

regmap_read(dev->regmap, SPDIFTX_IMR, &imr);

sound/soc/atmel/mchp-spdiftx.c

249

pending = sr & imr;

sound/soc/fsl/mpc5200_dma.c

118

u16 imr;

sound/soc/fsl/mpc5200_dma.c

178

imr = 0;

sound/soc/fsl/mpc5200_dma.c

180

imr |= MPC52xx_PSC_IMR_TXEMP;

sound/soc/fsl/mpc5200_dma.c

182

imr |= MPC52xx_PSC_IMR_ORERR;

sound/soc/fsl/mpc5200_dma.c

183

out_be16(&regs->isr_imr.imr, psc_dma->imr | imr);

sound/soc/fsl/mpc5200_dma.c

258

out_be16(&psc_dma->psc_regs->isr_imr.imr, psc_dma->imr);

sound/soc/fsl/mpc5200_dma.c

375

out_be16(&psc_dma->psc_regs->isr_imr.imr, psc_dma->imr);

sound/soc/fsl/mpc5200_dma.h

61

int imr;

sound/soc/fsl/mpc5200_psc_ac97.c

300

psc_dma->imr = 0;

sound/soc/fsl/mpc5200_psc_ac97.c

301

out_be16(&psc_dma->psc_regs->isr_imr.imr, psc_dma->imr);

sound/soc/intel/atom/sst/sst.c

50

union sst_imr_reg_mrfld imr;

sound/soc/intel/atom/sst/sst.c

80

imr.full = sst_shim_read64(drv->shim, SST_IMRX);

sound/soc/intel/atom/sst/sst.c

81

imr.part.busy_interrupt = 1;

sound/soc/intel/atom/sst/sst.c

82

sst_shim_write64(drv->shim, SST_IMRX, imr.full);

sound/soc/intel/atom/sst/sst_ipc.c

181

union interrupt_reg_mrfld imr;

sound/soc/intel/atom/sst/sst_ipc.c

186

imr.full = sst_shim_read64(sst_drv_ctx->shim, SST_IMRX);

sound/soc/intel/atom/sst/sst_ipc.c

201

imr.part.busy_interrupt = 0;

sound/soc/intel/atom/sst/sst_ipc.c

202

sst_shim_write64(sst_drv_ctx->shim, SST_IMRX, imr.full);

sound/soc/stm/stm32_sai_sub.c

616

unsigned int sr, imr, flags;

sound/soc/stm/stm32_sai_sub.c

619

stm32_sai_sub_reg_rd(sai, STM_SAI_IMR_REGX, &imr);

sound/soc/stm/stm32_sai_sub.c

622

flags = sr & imr;

sound/soc/stm/stm32_sai_sub.c

896

int imr, cr2, ret;

sound/soc/stm/stm32_sai_sub.c

921

imr = SAI_XIMR_OVRUDRIE;

sound/soc/stm/stm32_sai_sub.c

925

imr |= SAI_XIMR_MUTEDETIE;

sound/soc/stm/stm32_sai_sub.c

929

imr |= SAI_XIMR_WCKCFGIE;

sound/soc/stm/stm32_sai_sub.c

931

imr |= SAI_XIMR_AFSDETIE | SAI_XIMR_LFSDETIE;

sound/soc/stm/stm32_sai_sub.c

934

SAI_XIMR_MASK, imr);

sound/soc/stm/stm32_spdifrx.c

324

int cr, cr_mask, imr, ret;

sound/soc/stm/stm32_spdifrx.c

328

imr = SPDIFRX_IMR_IFEIE | SPDIFRX_IMR_SYNCDIE | SPDIFRX_IMR_PERRIE;

sound/soc/stm/stm32_spdifrx.c

329

ret = regmap_update_bits(spdifrx->regmap, STM32_SPDIFRX_IMR, imr, imr);

sound/soc/stm/stm32_spdifrx.c

669

unsigned int cr, mask, sr, imr;

sound/soc/stm/stm32_spdifrx.c

674

regmap_read(spdifrx->regmap, STM32_SPDIFRX_IMR, &imr);

sound/soc/stm/stm32_spdifrx.c

676

mask = imr & SPDIFRX_XIMR_MASK;

sound/soc/stm/stm32_spdifrx.c

684

sr, imr);

tools/arch/x86/include/uapi/asm/kvm.h

66

__u8 imr; /* interrupt mask register */

tools/testing/selftests/net/timestamping.c

331

struct ip_mreq imr;

tools/testing/selftests/net/timestamping.c

431

imr.imr_multiaddr.s_addr = iaddr.s_addr;

tools/testing/selftests/net/timestamping.c

432

imr.imr_interface.s_addr =

tools/testing/selftests/net/timestamping.c

435

&imr.imr_interface.s_addr, sizeof(struct in_addr)) < 0)

tools/testing/selftests/net/timestamping.c

440

&imr, sizeof(struct ip_mreq)) < 0)