fls64
return fls64(x) - 1;
return fls64(x);
tag_lsb = fls64((u64)phys_to_virt(memblock_start_of_DRAM()) ^
ror = fls64(~imm);
shift = max(round_down((inverse ? (fls64(rev_tmp) - 1) :
(fls64(nrm_tmp) - 1)), 16), 0);
int bit = fls64(ciu_sum) - 1;
int bit = fls64(ciu_sum) - 1;
int bit = fls64(ciu_sum) - 1;
line = fls64(sum) - 1;
bit = fls64(src) - 1;
line = fls64(sum) - 1;
vmbits = fls64(read_c0_entryhi_64() & 0x3fffffffffffe000ULL);
bit = fls64(msi_bits);
do_IRQ(fls64(mask_h) - 1);
do_IRQ(63 + fls64(mask_l));
do_IRQ(fls64(mask) - 1);
hwirq = fls64(e) - 1;
dev_max_ddw = fls64(dma_mask);
return fls64(mask) >> 3;
m_end += pa_start & ~((1ul << fls64(m_mask)) - 1);
bit = fls64(*cntr_mask);
bit = fls64(*fixed_cntr_mask);
if (!new_weight && fls64(c1->idxmsk64) < INTEL_PMC_IDX_FIXED) {
fls64(new_mask) > fls64(check_mask))
fls64(new_mask) < fls64(check_mask))
if (fls64(x86_pmu.fixed_cntr_mask64) > INTEL_PMC_MAX_FIXED)
intel_v5_gen_event_constraints[fls64(x86_pmu.fixed_cntr_mask64)].weight = -1;
return fls64(hybrid(pmu, cntr_mask64));
return fls64(hybrid(pmu, fixed_cntr_mask64));
index, _min_socket, _max_socket, _min_pnode, _max_pnode, fls64(gend));
hi = fls64(tmp);
xfeature_idx = fls64(xfeatures_print)-1;
unsigned int topmost = fls64(xfeatures) - 1;
fls64(AVIC_PHYSICAL_ID_ENTRY_BACKING_PAGE_MASK));
bit_set = fls64(rw_tbl->flags) - 1;
msb = fls64(number);
(mask == 0) ? 64 : fls64(mask); \
int dev = fls64(mask) - 1;
int cable = fls64(cables) - 1;
tmp = DIV_ROUND_UP(fls64(tmp) - 1, 9) - 1;
*frag = min_t(unsigned int, ffs(start) - 1, fls64(end - start) - 1);
above = fls64(__sync_branch_prefix(p, id) ^ p->prefix);
for (pot = fls64(hole_end - 1) - 1;
__func__, pot, fls64(hole_end - 1) - 1)) {
drm->runl_nr = fls64(runlists->data);
device->runlists = fls64(a->v.runlists.data);
region_width = max(fls64(region_start ^ (region_end - 1)),
ncores = fls64(pfdev->features.shader_present);
region_width = max(fls64(*region_start ^ (region_end - 1)),
if (bit >= fls64(engine_info[i].mask))
if (fls64(man) + exp > (int)sizeof(long) * 8 - 1)
int posn = fls64(reg_copy);
msb_diff = fls64(end ^ address) - 1;
return fls64(addrspace_size) - 2;
f->exponent = fls64(KEY_INODE(r) ^ KEY_INODE(l)) + 64;
f->exponent = fls64(r->low ^ l->low);
for (test_bit = fls64(ic->meta_device_sectors) - 1; test_bit >= 3; test_bit--) {
slot = fls64((u64)cinfo->recovery_map) - 1;
bit = fls64(data & (BIT_ULL(offset) - 1));
info->win_order = fls64(resource_size(res)) - 1;
if (fls64(cfg->device_size) < fls64(BRCMNAND_MIN_DEVSIZE)) {
device_size = fls64(cfg->device_size) - fls64(BRCMNAND_MIN_DEVSIZE);
highest_bit = fls64(le64_to_cpu(pcaps.phy_type_high));
highest_bit = fls64(le64_to_cpu(pcaps.phy_type_low));
u64 max_val_cycles_rounded = 1ULL << fls64(max_val_cycles - 1);
map->map[i] = fls64(map->map[i]) - 1;
return fls64(bs512) - 1;
int bs = fls64(burst) - 1;
qos.dscp_rewr.map[i] = fls64(dscp_rewr_map.map[i]) - 1;
dscp = fls64(dscp_rewr_map.map[i]) - 1;
return a ? fls64(a) + 64U : fls64(b);
if (__ffs64(tpart_vec) != (fls64(tpart_vec) - 1)) {
sz = 1ULL << fls64(sz - 1);
u64 sz = 1ULL << fls64(size - 1);
u64 sz = 1ULL << fls64(size - 1);
win_size = (1ULL << (fls64(size)-1)) |
pcie->memc_size[0] = 1ULL << fls64(tot_size - 1);
size = 1ULL << fls64(size - 1);
u64 size = 1ULL << fls64(epf_bar->size - 1);
sz = 1ULL << fls64(sz - 1);
int num_pass_bits = fls64(pci_addr ^ (pci_addr + size - 1));
order = fls64(size);
return sysfs_emit(buf, "%d\n", fls64(pdev->dma_mask));
return sysfs_emit(buf, "%d\n", fls64(dev->coherent_dma_mask));
last_tx = fls64(chan->tx_ts_mask);
return (fls64(route) + TB_ROUTE_SHIFT - 1) / TB_ROUTE_SHIFT;
if (xen_create_contiguous_region(phys, order, fls64(dma_mask),
return fls64(sb->s_maxbytes - 1) - du_bits;
return fls64(v) - 1;
return fls64(size);
return fls64(l);
return BITS_PER_LONG - fls64(x);
size_t index = fls64(value);
return fls64(n) - 1;
return fls64(feature) - 1;
prefixlen = 64 - fls64(diff);
u8 bits = fls64(chi);
k = fls64(p); /* k is the most-significant 0-to-1 flip */
k = fls64(p); /* k is the most-significant 1-to-0 flip */
return fls64(reg->umax_value);
return (1ULL << (fls64(max_dma) - 1)) * 2 - 1;
count_fls = fls64(count);
nsec_fls = fls64(nsec);
frequency_fls = fls64(frequency);
if (fls64(nr_pages) + fls64(PAGE_SIZE) > 64)
if (((int)sizeof(u64)*8 - fls64(mult) < fls64(tmp)) ||
((int)sizeof(u64)*8 - fls64(mult) < fls64(rem)))
if (BITS_TO_BYTES(fls64(*delta) + tkr->shift) >= sizeof(*delta))
return 64 - fls64(val);
m = 1ULL << ((fls64(x) - 1) & ~1ULL);
KUNIT_EXPECT_EQ(test, fls64(input), 0);
fls64_result = fls64(input);
KUNIT_EXPECT_EQ_MSG(test, fls64(input), fls(input_32),
input, input_32, fls64(input), fls(input_32));
validate_ffs64_result(test, tc->input, fls64(tc->input),
b = fls64(a);
if (__ffs64(mask) + hweight64(mask) != fls64(mask)) {
_pos = fls64((l - 1) >> 13); \
last_rx_ts = fls64(ts_info.rx_ts_mask);
last_tx_ts = fls64(ts_info.tx_ts_mask);
return fls64(l);
return fls64(n) - 1;
b = fls64(a);